diff --git a/package/firmware/linux-firmware/broadcom.mk b/package/firmware/linux-firmware/broadcom.mk index eeed8ec9c..baeb23150 100644 --- a/package/firmware/linux-firmware/broadcom.mk +++ b/package/firmware/linux-firmware/broadcom.mk @@ -52,6 +52,24 @@ define Package/brcmfmac-firmware-43430-sdio/install endef $(eval $(call BuildPackage,brcmfmac-firmware-43430-sdio)) +Package/brcmfmac-firmware-43430-sdio-rpi-3b = $(call Package/firmware-default,Broadcom BCM43430 NVRAM for Raspberry Pi 3B) +define Package/brcmfmac-firmware-43430-sdio-rpi-3b/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/brcm/brcmfmac43430-sdio.raspberrypi,3-model-b.txt \ + $(1)/lib/firmware/brcm/brcmfmac43430-sdio.raspberrypi,3-model-b.txt +endef +$(eval $(call BuildPackage,brcmfmac-firmware-43430-sdio-rpi-3b)) + +Package/brcmfmac-firmware-43430-sdio-rpi-zero-w = $(call Package/firmware-default,Broadcom BCM43430 NVRAM for Raspberry Pi Zero W) +define Package/brcmfmac-firmware-43430-sdio-rpi-zero-w/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/brcm/brcmfmac43430-sdio.raspberrypi,3-model-b.txt \ + $(1)/lib/firmware/brcm/brcmfmac43430-sdio.raspberrypi,model-zero-w.txt +endef +$(eval $(call BuildPackage,brcmfmac-firmware-43430-sdio-rpi-zero-w)) + Package/brcmfmac-firmware-43430a0-sdio = $(call Package/firmware-default,Broadcom BCM43430a0 FullMac SDIO firmware) define Package/brcmfmac-firmware-43430a0-sdio/install $(INSTALL_DIR) $(1)/lib/firmware/brcm @@ -70,6 +88,24 @@ define Package/brcmfmac-firmware-43455-sdio/install endef $(eval $(call BuildPackage,brcmfmac-firmware-43455-sdio)) +Package/brcmfmac-firmware-43455-sdio-rpi-3b-plus = $(call Package/firmware-default,Broadcom BCM43455 NVRAM for Raspberry Pi 3B+) +define Package/brcmfmac-firmware-43455-sdio-rpi-3b-plus/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/brcm/brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt \ + $(1)/lib/firmware/brcm/brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt +endef +$(eval $(call BuildPackage,brcmfmac-firmware-43455-sdio-rpi-3b-plus)) + +Package/brcmfmac-firmware-43455-sdio-rpi-4b = $(call Package/firmware-default,Broadcom BCM43455 NVRAM for Raspberry Pi 4B) +define Package/brcmfmac-firmware-43455-sdio-rpi-4b/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/brcm/brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt \ + $(1)/lib/firmware/brcm/brcmfmac43455-sdio.raspberrypi,4-model-b.txt +endef +$(eval $(call BuildPackage,brcmfmac-firmware-43455-sdio-rpi-4b)) + Package/brcmfmac-firmware-usb = $(call Package/firmware-default,Broadcom BCM43xx fullmac USB firmware) define Package/brcmfmac-firmware-usb/install $(INSTALL_DIR) $(1)/lib/firmware/brcm diff --git a/package/kernel/brcm2708-gpu-fw/Makefile b/package/kernel/brcm2708-gpu-fw/Makefile index 2d6dc3d81..c1195f217 100644 --- a/package/kernel/brcm2708-gpu-fw/Makefile +++ b/package/kernel/brcm2708-gpu-fw/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2012-2016 OpenWrt.org +# Copyright (C) 2012-2019 OpenWrt.org # Copyright (C) 2017 LEDE project # # This is free software, licensed under the GNU General Public License v2. @@ -9,8 +9,8 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=brcm2708-gpu-fw -PKG_VERSION:=2018-11-29 -PKG_RELEASE:=b428bdd819df8d0ad3009b64492a4b3d1f9453e4 +PKG_VERSION:=2019-07-09 +PKG_RELEASE:=025759b8634c2f8df35203be02c19a0633f1cec1 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_RELEASE) @@ -33,7 +33,7 @@ define Download/bootcode_bin FILE:=$(RPI_FIRMWARE_FILE)-bootcode.bin URL:=$(RPI_FIRMWARE_URL) URL_FILE:=bootcode.bin - HASH:=7b24659eb049333eec69f59cf0c5aa0d49eab5ed67726af3c6f0c9bcf1e3f9e3 + HASH:=6948c07f60f93489bbbc78747a1dc09ff0b1de42035c915fbd6453cdbd0e6475 endef $(eval $(call Download,bootcode_bin)) @@ -41,7 +41,7 @@ define Download/fixup_dat FILE:=$(RPI_FIRMWARE_FILE)-fixup.dat URL:=$(RPI_FIRMWARE_URL) URL_FILE:=fixup.dat - HASH:=5e5946fe7c0b1f5e270f43a17aef5f6da5758d5e544ed37137628c972c9b8061 + HASH:=d63bc6d3516dbb860091a34ec3ce584fafb4dc79740c11da9be87572849c2e02 endef $(eval $(call Download,fixup_dat)) @@ -49,23 +49,47 @@ define Download/fixup_cd_dat FILE:=$(RPI_FIRMWARE_FILE)-fixup_cd.dat URL:=$(RPI_FIRMWARE_URL) URL_FILE:=fixup_cd.dat - HASH:=d7ed04063af818695f6d2f6ffdde8304c19385051c9cee7f8d6d5b20851e4e55 + HASH:=eba5b57f49d2e8c1b2261e59297256bdff4751aeb3c7a16e60044799bcfd6b68 endef $(eval $(call Download,fixup_cd_dat)) define Download/fixup_x_dat FILE:=$(RPI_FIRMWARE_FILE)-fixup_x.dat URL:=$(RPI_FIRMWARE_URL) - HASH:=ec99af78227d9ffa2e46ab80a96aa762187467fe33876e4d8085377e7d0f76c2 URL_FILE:=fixup_x.dat + HASH:=74cc843d28f07940f7f9e618d2f5ff8c0ed245599bb45457bab1960e56cbf672 endef $(eval $(call Download,fixup_x_dat)) +define Download/fixup4_dat + FILE:=$(RPI_FIRMWARE_FILE)-fixup4.dat + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=fixup4.dat + HASH:=d8b44fd10c87ae51d4cce14a692f7f322574d63f7255f9776a61005c37183c5a +endef +$(eval $(call Download,fixup4_dat)) + +define Download/fixup4cd_dat + FILE:=$(RPI_FIRMWARE_FILE)-fixup4cd.dat + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=fixup4cd.dat + HASH:=efc3fa3cd5f94e08687824bf149ed8c9a11bbd3e8ebac034934246dbf502300c +endef +$(eval $(call Download,fixup4cd_dat)) + +define Download/fixup4x_dat + FILE:=$(RPI_FIRMWARE_FILE)-fixup4x.dat + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=fixup4x.dat + HASH:=866c11f0770246fba0756ee671cf118313ee23be88decae09114b123db2f26bd +endef +$(eval $(call Download,fixup4x_dat)) + define Download/start_elf FILE:=$(RPI_FIRMWARE_FILE)-start.elf URL:=$(RPI_FIRMWARE_URL) URL_FILE:=start.elf - HASH:=7e69d068c249cd859f5c44a8cf80a5e96a3f3fbeeeb0260de7373130a1d9b0fe + HASH:=c9f831786f4c03d58110baddef4da32f56387d1af191866f839dffb9b0671aab endef $(eval $(call Download,start_elf)) @@ -73,18 +97,42 @@ define Download/start_cd_elf FILE:=$(RPI_FIRMWARE_FILE)-start_cd.elf URL:=$(RPI_FIRMWARE_URL) URL_FILE:=start_cd.elf - HASH:=08aee2119a19c3556099ff875181d8e5440ebd1cecf1a5936b9340fe41da4428 + HASH:=c7ba345f71b1e5fed2cbc9d16dbb1b658546c1365e92302828f4f75ccb693df5 endef $(eval $(call Download,start_cd_elf)) define Download/start_x_elf FILE:=$(RPI_FIRMWARE_FILE)-start_x.elf URL:=$(RPI_FIRMWARE_URL) - HASH:=4fa98ee8eca7427aa013c1ad4a70d7b4cd01dcc08264307d1cb62f7c9ddfeed9 URL_FILE:=start_x.elf + HASH:=ab51744e7048a67758ac133ed20e3f482e40f81780915b88efb97647f838771e endef $(eval $(call Download,start_x_elf)) +define Download/start4_elf + FILE:=$(RPI_FIRMWARE_FILE)-start4.elf + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=start4.elf + HASH:=2691df2baa2d24dc08a7c7c99381555a819722a92c2b80731452724ddcd3e6d0 +endef +$(eval $(call Download,start4_elf)) + +define Download/start4cd_elf + FILE:=$(RPI_FIRMWARE_FILE)-start4cd.elf + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=start4cd.elf + HASH:=5e0d5e20b212daab99c2dd57a363ccd64ed27c8bbd0205efee07a731e6ae1a4e +endef +$(eval $(call Download,start4cd_elf)) + +define Download/start4x_elf + FILE:=$(RPI_FIRMWARE_FILE)-start4x.elf + URL:=$(RPI_FIRMWARE_URL) + URL_FILE:=start4x.elf + HASH:=67a748bb67267cfea45597681e8400a1794956dd9b7906032991cb6ce2d8742b +endef +$(eval $(call Download,start4x_elf)) + define Package/brcm2708-gpu-fw SECTION:=boot CATEGORY:=Boot Loaders @@ -105,9 +153,15 @@ define Build/Prepare cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup.dat $(PKG_BUILD_DIR)/fixup.dat cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_cd.dat $(PKG_BUILD_DIR)/fixup_cd.dat cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup_x.dat $(PKG_BUILD_DIR)/fixup_x.dat + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4.dat $(PKG_BUILD_DIR)/fixup4.dat + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4cd.dat $(PKG_BUILD_DIR)/fixup4cd.dat + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-fixup4x.dat $(PKG_BUILD_DIR)/fixup4x.dat cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start.elf $(PKG_BUILD_DIR)/start.elf cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_cd.elf $(PKG_BUILD_DIR)/start_cd.elf cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start_x.elf $(PKG_BUILD_DIR)/start_x.elf + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4.elf $(PKG_BUILD_DIR)/start4.elf + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4cd.elf $(PKG_BUILD_DIR)/start4cd.elf + cp $(DL_DIR)/$(RPI_FIRMWARE_FILE)-start4x.elf $(PKG_BUILD_DIR)/start4x.elf endef define Build/Compile @@ -124,9 +178,15 @@ define Build/InstallDev $(CP) $(PKG_BUILD_DIR)/start.elf $(KERNEL_BUILD_DIR) $(CP) $(PKG_BUILD_DIR)/start_cd.elf $(KERNEL_BUILD_DIR) $(CP) $(PKG_BUILD_DIR)/start_x.elf $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/start4.elf $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/start4cd.elf $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/start4x.elf $(KERNEL_BUILD_DIR) $(CP) $(PKG_BUILD_DIR)/fixup.dat $(KERNEL_BUILD_DIR) $(CP) $(PKG_BUILD_DIR)/fixup_cd.dat $(KERNEL_BUILD_DIR) $(CP) $(PKG_BUILD_DIR)/fixup_x.dat $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/fixup4.dat $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/fixup4cd.dat $(KERNEL_BUILD_DIR) + $(CP) $(PKG_BUILD_DIR)/fixup4x.dat $(KERNEL_BUILD_DIR) endef $(eval $(call BuildPackage,brcm2708-gpu-fw)) diff --git a/target/linux/brcm2708/Makefile b/target/linux/brcm2708/Makefile index 11908f5c2..b96723b4d 100644 --- a/target/linux/brcm2708/Makefile +++ b/target/linux/brcm2708/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2012-2016 OpenWrt.org +# Copyright (C) 2012-2019 OpenWrt.org # Copyright (C) 2017 LEDE project # # This is free software, licensed under the GNU General Public License v2. @@ -14,7 +14,7 @@ FEATURES:=ext4 audio usb usbgadget display gpio fpu squashfs rootfs-part boot-pa MAINTAINER:=Álvaro Fernández Rojas SUBTARGETS:=bcm2708 bcm2709 bcm2710 -KERNEL_PATCHVER:=4.14 +KERNEL_PATCHVER:=4.19 define Target/Description Build firmware image for Broadcom BCM27xx SoC devices. diff --git a/target/linux/brcm2708/base-files/etc/board.d/02_network b/target/linux/brcm2708/base-files/etc/board.d/02_network index c8449bb78..33aa15d85 100755 --- a/target/linux/brcm2708/base-files/etc/board.d/02_network +++ b/target/linux/brcm2708/base-files/etc/board.d/02_network @@ -16,7 +16,8 @@ raspberrypi,model-b-plus |\ raspberrypi,model-b-rev2 |\ raspberrypi,2-model-b |\ raspberrypi,3-model-b |\ -raspberrypi,3-model-b-plus) +raspberrypi,3-model-b-plus |\ +raspberrypi,4-model-b) ucidef_set_interface_lan "eth0" ;; diff --git a/target/linux/brcm2708/base-files/lib/preinit/05_set_preinit_iface_brcm2708 b/target/linux/brcm2708/base-files/lib/preinit/05_set_preinit_iface_brcm2708 index 3a5c198fc..bbb95149c 100644 --- a/target/linux/brcm2708/base-files/lib/preinit/05_set_preinit_iface_brcm2708 +++ b/target/linux/brcm2708/base-files/lib/preinit/05_set_preinit_iface_brcm2708 @@ -9,6 +9,7 @@ set_preinit_iface() { raspberrypi,2-model-b |\ raspberrypi,3-model-b |\ raspberrypi,3-model-b-plus |\ + raspberrypi,4-model-b |\ raspberrypi,model-b |\ raspberrypi,model-b-plus |\ raspberrypi,model-b-rev2) diff --git a/target/linux/brcm2708/base-files/lib/upgrade/platform.sh b/target/linux/brcm2708/base-files/lib/upgrade/platform.sh index 62eede53d..37e479272 100644 --- a/target/linux/brcm2708/base-files/lib/upgrade/platform.sh +++ b/target/linux/brcm2708/base-files/lib/upgrade/platform.sh @@ -9,7 +9,7 @@ platform_check_image() { [ "$#" -gt 1 ] && return 1 - export_bootdevice && export_partdevice diskdev -2 || { + export_bootdevice && export_partdevice diskdev 0 || { echo "Unable to determine upgrade device" return 1 } @@ -38,7 +38,7 @@ platform_check_image() { platform_do_upgrade() { local diskdev partdev diff - export_bootdevice && export_partdevice diskdev -2 || { + export_bootdevice && export_partdevice diskdev 0 || { echo "Unable to determine upgrade device" return 1 } @@ -72,10 +72,6 @@ platform_do_upgrade() { #iterate over each partition from the image and write it to the boot disk while read part start size; do - # root is /dev/sd[a|b]2 and not /dev/sd[a|b] this causes some problem - # one of which is this offset, I'm not sure what's the best fix, so - # here's a WA. - let part=$((part - 2)) if export_partdevice partdev $part; then echo "Writing image to /dev/$partdev..." get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync @@ -92,8 +88,7 @@ platform_do_upgrade() { platform_copy_config() { local partdev - # Same as above /dev/sd[a|b]2 is root, so /boot is -1 - if export_partdevice partdev -1; then + if export_partdevice partdev 1; then mkdir -p /boot [ -f /boot/kernel.img ] || mount -t vfat -o rw,noatime "/dev/$partdev" /boot cp -af "$CONF_TAR" /boot/ diff --git a/target/linux/brcm2708/bcm2708/config-4.9 b/target/linux/brcm2708/bcm2708/config-4.19 similarity index 83% rename from target/linux/brcm2708/bcm2708/config-4.9 rename to target/linux/brcm2708/bcm2708/config-4.19 index 116dd257d..44a3019f4 100644 --- a/target/linux/brcm2708/bcm2708/config-4.9 +++ b/target/linux/brcm2708/bcm2708/config-4.19 @@ -3,19 +3,25 @@ CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_BCM=y CONFIG_ARCH_BCM2835=y CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_KCOV=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_HAS_PHYS_TO_DMA=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set CONFIG_ARCH_MULTI_V6=y CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_NR_GPIO=0 -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y @@ -23,15 +29,17 @@ CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +# CONFIG_ARGON_MEM is not set CONFIG_ARM=y CONFIG_ARM_AMBA=y CONFIG_ARM_BCM2835_CPUFREQ=y CONFIG_ARM_CPU_SUSPEND=y CONFIG_ARM_ERRATA_411920=y +CONFIG_ARM_GIC=y CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_L1_CACHE_SHIFT=5 CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SCMI_PROTOCOL is not set # CONFIG_ARM_SP805_WATCHDOG is not set CONFIG_ARM_THUMB=y CONFIG_ARM_TIMER_SP804=y @@ -39,39 +47,43 @@ CONFIG_ARM_UNWIND=y CONFIG_AUTO_ZRELADDR=y # CONFIG_BACKLIGHT_CLASS_DEVICE is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BCM2708_VCHIQ=y CONFIG_BCM2708_VCMEM=y -# CONFIG_BCM2835_DEVGPIOMEM is not set +CONFIG_BCM2835_DEVGPIOMEM=y CONFIG_BCM2835_FAST_MEMCPY=y CONFIG_BCM2835_MBOX=y +CONFIG_BCM2835_POWER=y # CONFIG_BCM2835_SMI is not set -# CONFIG_BCM2835_THERMAL is not set +CONFIG_BCM2835_THERMAL=y CONFIG_BCM2835_TIMER=y +CONFIG_BCM2835_VCHIQ=y +# CONFIG_BCM2835_VCHIQ_MMAL is not set CONFIG_BCM2835_WDT=y CONFIG_BCM_VCIO=y -CONFIG_BCM_VC_CMA=y CONFIG_BCM_VC_SM=y -# CONFIG_BINFMT_FLAT is not set +# CONFIG_BCM_VC_SM_CMA is not set +CONFIG_BCM_VIDEOCORE=y # CONFIG_BLK_DEV_INITRD is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_SD=y +CONFIG_BLK_SCSI_REQUEST=y +# CONFIG_BRCMSTB_THERMAL is not set CONFIG_BRCM_CHAR_DRIVERS=y +# CONFIG_BT_MTKUART is not set CONFIG_BUILD_BIN2C=y # CONFIG_CACHE_L2X0 is not set +CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_MBYTES=5 # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_MIN is not set @@ -108,9 +120,11 @@ CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_PABRT_V6=y CONFIG_CPU_PM=y # CONFIG_CPU_THERMAL is not set +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V6=y CONFIG_CPU_V6K=y CONFIG_CRC16=y +CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y @@ -120,7 +134,6 @@ CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_UART_8250 is not set # CONFIG_DEBUG_USER is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_DEADLINE is not set @@ -131,6 +144,7 @@ CONFIG_DMA_BCM2835=y CONFIG_DMA_CMA=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y +CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNOTIFY=y CONFIG_DTC=y @@ -153,8 +167,8 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y # CONFIG_FB_RPISENSE is not set +CONFIG_FB_SIMPLE=y CONFIG_FIQ=y -CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_FIX_EARLYCON_MEM=y # CONFIG_FONTS is not set CONFIG_FONT_8x16=y @@ -166,54 +180,58 @@ CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set CONFIG_FREEZER=y +CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GPIOLIB=y -# CONFIG_GPIO_BCM_EXP is not set +CONFIG_GPIOLIB_IRQCHIP=y # CONFIG_GPIO_BCM_VIRT is not set +CONFIG_GPIO_RASPBERRYPI_EXP=y CONFIG_GPIO_SYSFS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -# CONFIG_HAVE_ARCH_BITREVERSE is not set CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_HAVE_ARCH_TRACEHOOK=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y CONFIG_HAVE_MEMBLOCK=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_HAVE_NET_DSA=y @@ -224,11 +242,16 @@ CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_PROC_CPU=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_UID16=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_HID_BIGBEN_FF is not set CONFIG_HW_CONSOLE=y CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +# CONFIG_I2C_BCM2708 is not set +CONFIG_I2C_BOARDINFO=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_INPUT=y @@ -236,10 +259,10 @@ CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IOMMU_HELPER=y CONFIG_IOSCHED_CFQ=y CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y CONFIG_JBD2=y @@ -249,18 +272,20 @@ CONFIG_KERNEL_GZIP=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGER_INPUT=y CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y CONFIG_MAC_PARTITION=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAILBOX=y # CONFIG_MAILBOX_TEST is not set CONFIG_MAX_RAW_DEVS=256 +CONFIG_MEMFD_CREATE=y CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_RPISENSE_CORE is not set CONFIG_MFD_SYSCON=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGHT_HAVE_PCI=y @@ -268,6 +293,7 @@ CONFIG_MIGRATION=y CONFIG_MMC=y CONFIG_MMC_BCM2835=y CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_MMC=y CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 CONFIG_MMC_BCM2835_SDHOST=y CONFIG_MMC_BLOCK=y @@ -276,7 +302,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD is not set -CONFIG_MULTI_IRQ_HANDLER=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_KM=y CONFIG_NLS=y @@ -286,6 +311,7 @@ CONFIG_NO_BOOTMEM=y CONFIG_NO_HZ=y CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y +CONFIG_NVMEM=y CONFIG_OABI_COMPAT=y CONFIG_OF=y CONFIG_OF_ADDRESS=y @@ -295,6 +321,7 @@ CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y CONFIG_OF_NET=y CONFIG_OF_OVERLAY=y CONFIG_OF_RESERVED_MEM=y @@ -302,8 +329,6 @@ CONFIG_OF_RESOLVE=y CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PCI_DOMAINS_GENERIC is not set -# CONFIG_PCI_SYSCALL is not set CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PINCTRL=y @@ -317,20 +342,18 @@ CONFIG_PM_GENERIC_DOMAINS_SLEEP=y CONFIG_PM_SLEEP=y CONFIG_POWER_SUPPLY=y CONFIG_PRINTK_TIME=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_SYSFS=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set CONFIG_RAW_DRIVER=y -# CONFIG_RCU_STALL_COMMON is not set +CONFIG_REFCOUNT_FULL=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RESET_CONTROLLER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set CONFIG_SCSI=y # CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_PROC_FS is not set @@ -341,9 +364,10 @@ CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=1 CONFIG_SERIAL_8250_RUNTIME_UARTS=0 CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_AMBA_PL010 is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SG_POOL=y CONFIG_SPARSE_IRQ=y @@ -351,16 +375,19 @@ CONFIG_SRCU=y # CONFIG_STRIP_ASM_SYMS is not set CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y # CONFIG_TEXTSEARCH is not set CONFIG_THERMAL=y -CONFIG_THERMAL_BCM2835=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_OF=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set CONFIG_UEVENT_HELPER_PATH="" # CONFIG_UID16 is not set CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" @@ -376,7 +403,6 @@ CONFIG_USB_SUPPORT=y CONFIG_USB_UAS=y CONFIG_USB_USBNET=y CONFIG_USE_OF=y -CONFIG_VECTORS_BASE=0xffff0000 CONFIG_VFP=y CONFIG_VT=y CONFIG_VT_CONSOLE=y diff --git a/target/linux/brcm2708/bcm2708/target.mk b/target/linux/brcm2708/bcm2708/target.mk index a35ec666d..ecee8154a 100644 --- a/target/linux/brcm2708/bcm2708/target.mk +++ b/target/linux/brcm2708/bcm2708/target.mk @@ -1,12 +1,13 @@ # -# Copyright (C) 2015 OpenWrt.org +# Copyright (C) 2015-2019 OpenWrt.org # SUBTARGET:=bcm2708 -BOARDNAME:=BCM2708 based boards +BOARDNAME:=BCM2708 boards (32 bit) CPU_TYPE:=arm1176jzf-s CPU_SUBTYPE:=vfp define Target/Description - Build firmware image for Broadcom BCM2708 SoC devices. + Build firmware image for BCM2708 devices. + This firmware features a 32 bit kernel. endef diff --git a/target/linux/brcm2708/bcm2709/config-4.9 b/target/linux/brcm2708/bcm2709/config-4.19 similarity index 75% rename from target/linux/brcm2708/bcm2709/config-4.9 rename to target/linux/brcm2708/bcm2709/config-4.19 index 0910fa6ea..e7a14a59b 100644 --- a/target/linux/brcm2708/bcm2709/config-4.9 +++ b/target/linux/brcm2708/bcm2709/config-4.19 @@ -1,23 +1,33 @@ # CONFIG_AIO is not set CONFIG_ALIGNMENT_TRAP=y +# CONFIG_ARCH_AXXIA is not set CONFIG_ARCH_BCM=y CONFIG_ARCH_BCM2835=y +# CONFIG_ARCH_BCM_HR2 is not set CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_KCOV=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_HAS_PHYS_TO_DMA=y +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAS_TICK_BROADCAST=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_NR_GPIO=0 -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y @@ -25,19 +35,21 @@ CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +# CONFIG_ARGON_MEM is not set CONFIG_ARM=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y CONFIG_ARM_BCM2835_CPUFREQ=y CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_GIC=y CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set +CONFIG_ARM_LPAE=y CONFIG_ARM_PATCH_IDIV=y CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_SCPI_PROTOCOL is not set +# CONFIG_ARM_SCMI_PROTOCOL is not set # CONFIG_ARM_SP805_WATCHDOG is not set CONFIG_ARM_THUMB=y # CONFIG_ARM_THUMBEE is not set @@ -47,38 +59,48 @@ CONFIG_ARM_VIRT_EXT=y CONFIG_AUTO_ZRELADDR=y # CONFIG_BACKLIGHT_CLASS_DEVICE is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BCM2708_VCHIQ=y CONFIG_BCM2708_VCMEM=y -# CONFIG_BCM2835_DEVGPIOMEM is not set +CONFIG_BCM2835_DEVGPIOMEM=y CONFIG_BCM2835_MBOX=y +CONFIG_BCM2835_POWER=y # CONFIG_BCM2835_SMI is not set -# CONFIG_BCM2835_THERMAL is not set +CONFIG_BCM2835_THERMAL=y CONFIG_BCM2835_TIMER=y +CONFIG_BCM2835_VCHIQ=y +# CONFIG_BCM2835_VCHIQ_MMAL is not set CONFIG_BCM2835_WDT=y +CONFIG_BCM7XXX_PHY=y +CONFIG_BCMGENET=y +CONFIG_BCM_NET_PHYLIB=y CONFIG_BCM_VCIO=y -CONFIG_BCM_VC_CMA=y CONFIG_BCM_VC_SM=y -# CONFIG_BINFMT_FLAT is not set +# CONFIG_BCM_VC_SM_CMA is not set +CONFIG_BCM_VIDEOCORE=y # CONFIG_BLK_DEV_INITRD is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BOUNCE=y +CONFIG_BRCMSTB_THERMAL=y CONFIG_BRCM_CHAR_DRIVERS=y +CONFIG_BROADCOM_PHY=y +# CONFIG_BT_MTKUART is not set CONFIG_BUILD_BIN2C=y # CONFIG_CACHE_L2X0 is not set +CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_MBYTES=5 # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_MIN is not set @@ -116,12 +138,15 @@ CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_PABRT_V7=y CONFIG_CPU_PM=y CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y # CONFIG_CPU_THERMAL is not set +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V7=y CONFIG_CPU_V7=y CONFIG_CRC16=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y @@ -134,7 +159,6 @@ CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_UART_8250 is not set # CONFIG_DEBUG_USER is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_DEADLINE is not set @@ -145,6 +169,7 @@ CONFIG_DMA_BCM2835=y CONFIG_DMA_CMA=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y +CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNOTIFY=y CONFIG_DTC=y @@ -152,6 +177,7 @@ CONFIG_DUMMY_CONSOLE=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_EXTCON_ARIZONA is not set CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y @@ -167,8 +193,9 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y # CONFIG_FB_RPISENSE is not set +CONFIG_FB_SIMPLE=y CONFIG_FIQ=y -CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y # CONFIG_FONTS is not set CONFIG_FONT_8x16=y @@ -180,26 +207,37 @@ CONFIG_FRAMEBUFFER_CONSOLE=y # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set CONFIG_FREEZER=y +CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GPIOLIB=y -CONFIG_GPIO_BCM_EXP=y +CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_BCM_VIRT=y +CONFIG_GPIO_RASPBERRYPI_EXP=y CONFIG_GPIO_SYSFS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDEN_BRANCH_PREDICTOR=y @@ -207,31 +245,33 @@ CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set CONFIG_HAVE_ARCH_BITREVERSE=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_HAVE_IDE=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y CONFIG_HAVE_MEMBLOCK=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_HAVE_NET_DSA=y @@ -241,14 +281,23 @@ CONFIG_HAVE_PERF_EVENTS=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_RCU_TABLE_FREE=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y CONFIG_HAVE_SMP=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_UID16=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y CONFIG_HOTPLUG_CPU=y +# CONFIG_HUGETLBFS is not set CONFIG_HW_CONSOLE=y CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +# CONFIG_I2C_BCM2708 is not set +CONFIG_I2C_BOARDINFO=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_INPUT=y @@ -256,10 +305,10 @@ CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IOMMU_HELPER=y CONFIG_IOSCHED_CFQ=y CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y CONFIG_JBD2=y @@ -269,35 +318,45 @@ CONFIG_KERNEL_GZIP=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGER_INPUT=y CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y CONFIG_MAC_PARTITION=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAILBOX=y # CONFIG_MAILBOX_TEST is not set CONFIG_MAX_RAW_DEVS=256 +CONFIG_MDIO_BCM_UNIMAC=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_RPISENSE_CORE is not set CONFIG_MFD_SYSCON=y +CONFIG_MICROCHIP_PHY=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_MIGRATION=y CONFIG_MMC=y CONFIG_MMC_BCM2835=y CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_MMC=y CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 CONFIG_MMC_BCM2835_SDHOST=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_IPROC=y +# CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_TIFM_SD is not set CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD is not set -CONFIG_MULTI_IRQ_HANDLER=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEON=y @@ -310,6 +369,7 @@ CONFIG_NO_HZ=y CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y CONFIG_OABI_COMPAT=y CONFIG_OF=y CONFIG_OF_ADDRESS=y @@ -319,6 +379,8 @@ CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y CONFIG_OF_NET=y CONFIG_OF_OVERLAY=y CONFIG_OF_RESERVED_MEM=y @@ -326,11 +388,18 @@ CONFIG_OF_RESOLVE=y CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -# CONFIG_PCI_DOMAINS_GENERIC is not set -# CONFIG_PCI_SYSCALL is not set +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PCI=y +CONFIG_PCIE_BRCMSTB=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_V3_SEMI is not set CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_BCM2835=y CONFIG_PM=y @@ -343,23 +412,24 @@ CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y CONFIG_POWER_SUPPLY=y CONFIG_PRINTK_TIME=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_SYSFS=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set CONFIG_RAW_DRIVER=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y +CONFIG_REFCOUNT_FULL=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set CONFIG_SCSI=y # CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_PROC_FS is not set @@ -370,9 +440,10 @@ CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=1 CONFIG_SERIAL_8250_RUNTIME_UARTS=0 CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_AMBA_PL010 is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SG_POOL=y CONFIG_SMP=y @@ -382,19 +453,24 @@ CONFIG_SRCU=y # CONFIG_STRIP_ASM_SYMS is not set CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y -CONFIG_SWIOTLB=y +CONFIG_SWPHY=y CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y # CONFIG_TEXTSEARCH is not set CONFIG_THERMAL=y -CONFIG_THERMAL_BCM2835=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_OF=y # CONFIG_THUMB2_KERNEL is not set CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y CONFIG_UEVENT_HELPER_PATH="" # CONFIG_UID16 is not set CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" @@ -406,16 +482,18 @@ CONFIG_USB_DWCOTG=y CONFIG_USB_LAN78XX=y CONFIG_USB_NET_DRIVERS=y CONFIG_USB_NET_SMSC95XX=y +CONFIG_USB_PCI=y CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y CONFIG_USB_UAS=y +# CONFIG_USB_UHCI_HCD is not set CONFIG_USB_USBNET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y CONFIG_USE_OF=y -CONFIG_VECTORS_BASE=0xffff0000 CONFIG_VFP=y CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y diff --git a/target/linux/brcm2708/bcm2709/target.mk b/target/linux/brcm2708/bcm2709/target.mk index be4f459af..c253ffd3d 100644 --- a/target/linux/brcm2708/bcm2709/target.mk +++ b/target/linux/brcm2708/bcm2709/target.mk @@ -1,13 +1,14 @@ # -# Copyright (C) 2015 OpenWrt.org +# Copyright (C) 2015-2019 OpenWrt.org # Copyright (C) 2017 LEDE project # SUBTARGET:=bcm2709 -BOARDNAME:=BCM2709/BCM2710 32 bit based boards +BOARDNAME:=BCM2709/BCM2710/BCM2711 boards (32 bit) CPU_TYPE:=cortex-a7 CPU_SUBTYPE:=neon-vfpv4 define Target/Description - Build firmware image for Broadcom BCM2709/BCM2710 32 bit SoC devices. + Build firmware image for BCM2709/BCM2710/BCM2711 devices. + This firmware features a 32 bit kernel. endef diff --git a/target/linux/brcm2708/bcm2710/config-4.14 b/target/linux/brcm2708/bcm2710/config-4.14 index 9faf7f762..d7170c787 100644 --- a/target/linux/brcm2708/bcm2710/config-4.14 +++ b/target/linux/brcm2708/bcm2710/config-4.14 @@ -60,7 +60,6 @@ CONFIG_ARM64_PAN=y # CONFIG_ARM64_PTDUMP_DEBUGFS is not set # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set CONFIG_ARM64_SSBD=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set CONFIG_ARM64_UAO=y CONFIG_ARM64_VA_BITS=39 CONFIG_ARM64_VA_BITS_39=y @@ -119,7 +118,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_XGENE=y -# CONFIG_COMPAT is not set CONFIG_CONFIGFS_FS=y CONFIG_CONSOLE_TRANSLATIONS=y # CONFIG_CPUFREQ_DT is not set diff --git a/target/linux/brcm2708/bcm2710/config-4.9 b/target/linux/brcm2708/bcm2710/config-4.19 similarity index 69% rename from target/linux/brcm2708/bcm2710/config-4.9 rename to target/linux/brcm2708/bcm2710/config-4.19 index ae772c6dd..762a24df4 100644 --- a/target/linux/brcm2708/bcm2710/config-4.9 +++ b/target/linux/brcm2708/bcm2710/config-4.19 @@ -4,30 +4,72 @@ CONFIG_ARCH_BCM2835=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y CONFIG_ARCH_HAS_GIGANTIC_PAGE=y CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y CONFIG_ARCH_HAS_KCOV=y +CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y +CONFIG_ARCH_HAS_PTE_SPECIAL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_INLINE_READ_LOCK=y +CONFIG_ARCH_INLINE_READ_LOCK_BH=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_READ_UNLOCK=y +CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_SPIN_LOCK=y +CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y +CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_ARCH_INLINE_WRITE_LOCK=y +CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y +CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=24 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_INT128=y +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +# CONFIG_ARGON_MEM is not set CONFIG_ARM64=y # CONFIG_ARM64_16K_PAGES is not set CONFIG_ARM64_4K_PAGES=y @@ -42,12 +84,16 @@ CONFIG_ARM64_ERRATUM_832075=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_HW_AFDBM=y # CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_MODULE_CMODEL_LARGE=y +CONFIG_ARM64_MODULE_PLTS=y CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PAN=y -# CONFIG_ARM64_PTDUMP is not set +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set CONFIG_ARM64_SSBD=y +CONFIG_ARM64_SVE=y CONFIG_ARM64_UAO=y CONFIG_ARM64_VA_BITS=39 CONFIG_ARM64_VA_BITS_39=y @@ -56,55 +102,64 @@ CONFIG_ARM64_VHE=y CONFIG_ARM_AMBA=y CONFIG_ARM_ARCH_TIMER=y CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y CONFIG_ARM_BCM2835_CPUFREQ=y CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SCMI_PROTOCOL is not set # CONFIG_ARM_SP805_WATCHDOG is not set CONFIG_ARM_TIMER_SP804=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_BACKLIGHT_CLASS_DEVICE is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_BCM2708_VCHIQ is not set CONFIG_BCM2708_VCMEM=y -# CONFIG_BCM2835_DEVGPIOMEM is not set +CONFIG_BCM2835_DEVGPIOMEM=y CONFIG_BCM2835_MBOX=y +CONFIG_BCM2835_POWER=y # CONFIG_BCM2835_SMI is not set -# CONFIG_BCM2835_THERMAL is not set +CONFIG_BCM2835_THERMAL=y +CONFIG_BCM2835_VCHIQ=y +# CONFIG_BCM2835_VCHIQ_MMAL is not set CONFIG_BCM2835_WDT=y -# CONFIG_BCM_PDC_MBOX is not set # CONFIG_BCM_VCIO is not set +# CONFIG_BCM_VC_SM is not set +# CONFIG_BCM_VC_SM_CMA is not set +CONFIG_BCM_VIDEOCORE=y # CONFIG_BLK_DEV_INITRD is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_BLK_DEV_SD=y -CONFIG_BOUNCE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BRCMSTB_THERMAL=y CONFIG_BRCM_CHAR_DRIVERS=y +# CONFIG_BT_MTKUART is not set CONFIG_BUILD_BIN2C=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23154=y CONFIG_CAVIUM_ERRATUM_27456=y +CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 CONFIG_CMA_AREAS=7 # CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=16 +CONFIG_CMA_SIZE_MBYTES=5 # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_VERSATILE is not set CONFIG_COMMON_CLK_XGENE=y -# CONFIG_COMPAT is not set CONFIG_CONFIGFS_FS=y CONFIG_CONSOLE_TRANSLATIONS=y # CONFIG_CPUFREQ_DT is not set @@ -130,6 +185,7 @@ CONFIG_CPU_RMAP=y CONFIG_CRC16=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y @@ -139,10 +195,8 @@ CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_DCACHE_WORD_ACCESS=y -# CONFIG_DEBUG_ALIGN_RODATA is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_RODATA=y CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_IOSCHED="cfq" @@ -150,6 +204,7 @@ CONFIG_DMADEVICES=y CONFIG_DMA_BCM2708=y CONFIG_DMA_BCM2835=y CONFIG_DMA_CMA=y +CONFIG_DMA_DIRECT_OPS=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y CONFIG_DMA_VIRTUAL_CHANNELS=y @@ -158,6 +213,7 @@ CONFIG_DTC=y CONFIG_DUMMY_CONSOLE=y CONFIG_EDAC_SUPPORT=y CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_EXTCON_ARIZONA is not set CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y @@ -173,8 +229,10 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y # CONFIG_FB_RPISENSE is not set -CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FB_SIMPLE=y +CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y +# CONFIG_FLATMEM_MANUAL is not set # CONFIG_FONTS is not set CONFIG_FONT_8x16=y CONFIG_FONT_8x8=y @@ -185,9 +243,11 @@ CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAME_POINTER=y CONFIG_FREEZER=y CONFIG_FSL_ERRATUM_A008585=y +CONFIG_FS_IOMAP=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CLOCKEVENTS=y @@ -196,27 +256,33 @@ CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GPIOLIB=y -CONFIG_GPIO_BCM_EXP=y +CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_BCM_VIRT=y +CONFIG_GPIO_RASPBERRYPI_EXP=y CONFIG_GPIO_SYSFS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDEN_BRANCH_PREDICTOR=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAS_IOPORT_MAP=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y CONFIG_HAVE_ARCH_BITREVERSE=y @@ -225,12 +291,13 @@ CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_HAVE_CMPXCHG_DOUBLE=y @@ -239,7 +306,6 @@ CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_BUGVERBOSE=y CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_EBPF_JIT=y @@ -248,10 +314,11 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_GENERIC_RCU_GUP=y +CONFIG_HAVE_GENERIC_GUP=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MEMBLOCK=y CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_HAVE_NET_DSA=y CONFIG_HAVE_PATA_PLATFORM=y CONFIG_HAVE_PERF_EVENTS=y @@ -259,20 +326,45 @@ CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_RCU_TABLE_FREE=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_HID_BIGBEN_FF is not set +CONFIG_HOLES_IN_ZONE=y CONFIG_HOTPLUG_CPU=y # CONFIG_HUGETLBFS is not set CONFIG_HW_CONSOLE=y +CONFIG_I2C=y +# CONFIG_I2C_BCM2708 is not set +CONFIG_I2C_BOARDINFO=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INLINE_READ_LOCK=y +CONFIG_INLINE_READ_LOCK_BH=y +CONFIG_INLINE_READ_LOCK_IRQ=y +CONFIG_INLINE_READ_LOCK_IRQSAVE=y +CONFIG_INLINE_READ_UNLOCK_BH=y +CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_SPIN_LOCK=y +CONFIG_INLINE_SPIN_LOCK_BH=y +CONFIG_INLINE_SPIN_LOCK_IRQ=y +CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y +CONFIG_INLINE_SPIN_TRYLOCK=y +CONFIG_INLINE_SPIN_TRYLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_BH=y +CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y +CONFIG_INLINE_WRITE_LOCK=y +CONFIG_INLINE_WRITE_LOCK_BH=y +CONFIG_INLINE_WRITE_LOCK_IRQ=y +CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y +CONFIG_INLINE_WRITE_UNLOCK_BH=y +CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y CONFIG_INPUT=y CONFIG_INPUT_MOUSEDEV=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_IOMMU_HELPER=y CONFIG_IOSCHED_CFQ=y CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y @@ -284,6 +376,7 @@ CONFIG_JBD2=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGER_INPUT=y CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LOGO=y CONFIG_LOGO_LINUX_CLUT224=y @@ -294,18 +387,29 @@ CONFIG_MAGIC_SYSRQ=y CONFIG_MAILBOX=y # CONFIG_MAILBOX_TEST is not set CONFIG_MAX_RAW_DEVS=256 +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y CONFIG_MEMORY_ISOLATION=y +CONFIG_MFD_CORE=y +# CONFIG_MFD_RPISENSE_CORE is not set CONFIG_MFD_SYSCON=y +CONFIG_MICROCHIP_PHY=y CONFIG_MIGRATION=y CONFIG_MMC=y CONFIG_MMC_BCM2835=y CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_MMC=y CONFIG_MMC_BCM2835_PIO_DMA_BARRIER=2 CONFIG_MMC_BCM2835_SDHOST=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_IPROC=y +# CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y +# CONFIG_MMC_TIFM_SD is not set CONFIG_MODULES_USE_ELF_RELA=y # CONFIG_MTD is not set CONFIG_MUTEX_SPIN_ON_OWNER=y @@ -319,9 +423,9 @@ CONFIG_NO_BOOTMEM=y CONFIG_NO_HZ=y CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_IDLE=y -CONFIG_NO_IOPORT_MAP=y CONFIG_NR_CPUS=4 # CONFIG_NUMA is not set +CONFIG_NVMEM=y CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_CONFIGFS=y @@ -330,18 +434,23 @@ CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y CONFIG_OF_NET=y CONFIG_OF_OVERLAY=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_PADATA=y CONFIG_PARTITION_PERCPU=y -# CONFIG_PCI_DOMAINS is not set -# CONFIG_PCI_DOMAINS_GENERIC is not set -# CONFIG_PCI_SYSCALL is not set +CONFIG_PCI=y +# CONFIG_PCIE_BRCMSTB is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_XGENE is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_BCM2835=y CONFIG_PM=y @@ -355,24 +464,27 @@ CONFIG_PM_SLEEP_SMP=y CONFIG_POWER_RESET=y CONFIG_POWER_SUPPLY=y CONFIG_PRINTK_TIME=y -CONFIG_PWM=y -CONFIG_PWM_BCM2835=y -CONFIG_PWM_SYSFS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_POWER=y CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set CONFIG_RAW_DRIVER=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y +CONFIG_REFCOUNT_FULL=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set CONFIG_SCSI=y # CONFIG_SCSI_LOWLEVEL is not set # CONFIG_SCSI_PROC_FS is not set @@ -385,6 +497,8 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=0 CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SG_POOL=y CONFIG_SMP=y @@ -399,17 +513,23 @@ CONFIG_SRCU=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_SWIOTLB=y +CONFIG_SWPHY=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y # CONFIG_TEXTSEARCH is not set CONFIG_THERMAL=y -CONFIG_THERMAL_BCM2835=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_TOUCHSCREEN_RPI_FT5406 is not set CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_USB=y @@ -424,6 +544,7 @@ CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y CONFIG_USB_UAS=y CONFIG_USB_USBNET=y +CONFIG_VMAP_STACK=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y @@ -432,3 +553,4 @@ CONFIG_WATCHDOG_CORE=y CONFIG_XPS=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_BCJ=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/brcm2708/bcm2710/target.mk b/target/linux/brcm2708/bcm2710/target.mk index 72b34306c..efaac457f 100644 --- a/target/linux/brcm2708/bcm2710/target.mk +++ b/target/linux/brcm2708/bcm2710/target.mk @@ -1,13 +1,14 @@ # -# Copyright (C) 2016 OpenWrt.org +# Copyright (C) 2016-2019 OpenWrt.org # Copyright (C) 2017 LEDE project # ARCH:=aarch64 SUBTARGET:=bcm2710 -BOARDNAME:=BCM2710 64 bit based boards +BOARDNAME:=BCM2710 boards (64 bit) CPU_TYPE:=cortex-a53 define Target/Description - Build firmware image for Broadcom BCM2710 64 bit SoC devices. + Build firmware image for BCM2710 devices. + This firmware features a 64 bit kernel. endef diff --git a/target/linux/brcm2708/image/Makefile b/target/linux/brcm2708/image/Makefile index cd00d7f39..c850acdc2 100644 --- a/target/linux/brcm2708/image/Makefile +++ b/target/linux/brcm2708/image/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2012-2015 OpenWrt.org +# Copyright (C) 2012-2019 OpenWrt.org # Copyright (C) 2016-2017 LEDE project # # This is free software, licensed under the GNU General Public License v2. @@ -21,18 +21,12 @@ define Build/kernel-img mv $@.tmp $@ endef -define Build/boot-img +define Build/boot-common rm -f $@.boot mkfs.fat -C $@.boot $(FAT32_BLOCKS) mcopy -i $@.boot $(KDIR)/COPYING.linux :: mcopy -i $@.boot $(KDIR)/bootcode.bin :: mcopy -i $@.boot $(KDIR)/LICENCE.broadcom :: - mcopy -i $@.boot $(KDIR)/start.elf :: - mcopy -i $@.boot $(KDIR)/start_cd.elf :: - mcopy -i $@.boot $(KDIR)/start_x.elf :: - mcopy -i $@.boot $(KDIR)/fixup.dat :: - mcopy -i $@.boot $(KDIR)/fixup_cd.dat :: - mcopy -i $@.boot $(KDIR)/fixup_x.dat :: mcopy -i $@.boot cmdline.txt :: mcopy -i $@.boot config.txt :: mcopy -i $@.boot $(IMAGE_KERNEL) ::$(KERNEL_IMG) @@ -42,6 +36,24 @@ define Build/boot-img mcopy -i $@.boot $(DTS_DIR)/overlays/README ::/overlays/ endef +define Build/boot-2708 + mcopy -i $@.boot $(KDIR)/start.elf :: + mcopy -i $@.boot $(KDIR)/start_cd.elf :: + mcopy -i $@.boot $(KDIR)/start_x.elf :: + mcopy -i $@.boot $(KDIR)/fixup.dat :: + mcopy -i $@.boot $(KDIR)/fixup_cd.dat :: + mcopy -i $@.boot $(KDIR)/fixup_x.dat :: +endef + + define Build/boot-2711 + mcopy -i $@.boot $(KDIR)/start4.elf :: + mcopy -i $@.boot $(KDIR)/start4cd.elf :: + mcopy -i $@.boot $(KDIR)/start4x.elf :: + mcopy -i $@.boot $(KDIR)/fixup4.dat :: + mcopy -i $@.boot $(KDIR)/fixup4cd.dat :: + mcopy -i $@.boot $(KDIR)/fixup4x.dat :: +endef + define Build/sdcard-img ./gen_rpi_sdcard_img.sh $@ $@.boot $(IMAGE_ROOTFS) \ $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE) @@ -52,33 +64,43 @@ define Device/Default KERNEL := kernel-bin | kernel-img KERNEL_IMG := kernel.img IMAGES := factory.img.gz sysupgrade.img.gz - IMAGE/sysupgrade.img.gz := boot-img | sdcard-img | gzip | append-metadata - IMAGE/factory.img.gz := boot-img | sdcard-img | gzip + IMAGE/sysupgrade.img.gz := boot-common | boot-2708 | sdcard-img | gzip | append-metadata + IMAGE/factory.img.gz := boot-common | boot-2708 | sdcard-img | gzip endef define Device/rpi DEVICE_TITLE := Raspberry Pi B/B+/CM/Zero/ZeroW - DEVICE_DTS := bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm bcm2708-rpi-0-w + DEVICE_DTS := bcm2708-rpi-b bcm2708-rpi-b-plus bcm2708-rpi-cm bcm2708-rpi-zero bcm2708-rpi-zero-w SUPPORTED_DEVICES := \ rpi-b rpi-b-plus rpi-cm rpi-zero rpi-zero-w \ raspberrypi,model-b raspberrypi,model-b-plus raspberrypi,model-b-rev2 \ raspberrypi,compute-module raspberrypi,compute-module-1 \ raspberrypi,model-zero raspberrypi,model-zero-w - DEVICE_PACKAGES := brcmfmac-firmware-43430-sdio brcmfmac-board-rpi2 kmod-brcmfmac wpad-basic + DEVICE_PACKAGES := \ + brcmfmac-firmware-43430-sdio \ + brcmfmac-firmware-43430-sdio-rpi-zero-w \ + kmod-brcmfmac wpad-basic endef ifeq ($(SUBTARGET),bcm2708) TARGET_DEVICES += rpi endif define Device/rpi-2 - DEVICE_TITLE := Raspberry Pi 2B/3B/3B+/3CM - DEVICE_DTS := bcm2709-rpi-2-b bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2710-rpi-cm3 + DEVICE_TITLE := Raspberry Pi 2B/3B/3B+/3CM/4B + DEVICE_DTS := bcm2709-rpi-2-b bcm2710-rpi-3-b bcm2710-rpi-3-b-plus bcm2711-rpi-4-b bcm2710-rpi-cm3 SUPPORTED_DEVICES := \ rpi-2-b rpi-3-b rpi-3-b-plus rpi-cm \ raspberrypi,2-model-b \ raspberrypi,3-model-b raspberrypi,3-model-b-plus \ raspberrypi,3-compute-module raspberrypi,compute-module-3 - DEVICE_PACKAGES := brcmfmac-firmware-43430-sdio brcmfmac-firmware-43455-sdio brcmfmac-board-rpi2 brcmfmac-board-rpi3 kmod-brcmfmac wpad-basic + DEVICE_PACKAGES := \ + brcmfmac-firmware-43430-sdio \ + brcmfmac-firmware-43430-sdio-rpi-3b \ + brcmfmac-firmware-43455-sdio brcmfmac-firmware-43455-clm_blob \ + brcmfmac-firmware-43455-sdio-rpi-3b-plus brcmfmac-firmware-43455-sdio-rpi-4b \ + kmod-brcmfmac wpad-basic + IMAGE/sysupgrade.img.gz := boot-common | boot-2708 | boot-2711 | sdcard-img | gzip | append-metadata + IMAGE/factory.img.gz := boot-common | boot-2708 | boot-2711 | sdcard-img | gzip endef ifeq ($(SUBTARGET),bcm2709) TARGET_DEVICES += rpi-2 @@ -86,13 +108,18 @@ endif define Device/rpi-3 KERNEL_IMG := kernel8.img - DEVICE_TITLE := Raspberry Pi 3B/3B+ - DEVICE_DTS := broadcom/bcm2710-rpi-3-b broadcom/bcm2710-rpi-3-b-plus + DEVICE_TITLE := Raspberry Pi 3B/3B+/3CM + DEVICE_DTS := broadcom/bcm2710-rpi-3-b broadcom/bcm2710-rpi-3-b-plus broadcom/bcm2710-rpi-cm3 SUPPORTED_DEVICES := \ rpi-3-b rpi-3-b-plus \ raspberrypi,3-model-b raspberrypi,3-model-b-plus \ raspberrypi,3-compute-module raspberrypi,compute-module-3 - DEVICE_PACKAGES := brcmfmac-firmware-43430-sdio brcmfmac-board-rpi2 brcmfmac-firmware-43455-sdio brcmfmac-board-rpi3 kmod-brcmfmac wpad-basic + DEVICE_PACKAGES := \ + brcmfmac-firmware-43430-sdio \ + brcmfmac-firmware-43430-sdio-rpi-3b \ + brcmfmac-firmware-43455-sdio brcmfmac-firmware-43455-clm_blob \ + brcmfmac-firmware-43455-sdio-rpi-3b-plus \ + kmod-brcmfmac wpad-basic endef ifeq ($(SUBTARGET),bcm2710) TARGET_DEVICES += rpi-3 diff --git a/target/linux/brcm2708/image/cmdline.txt b/target/linux/brcm2708/image/cmdline.txt index c1099afb0..d9b7d867a 100644 --- a/target/linux/brcm2708/image/cmdline.txt +++ b/target/linux/brcm2708/image/cmdline.txt @@ -1 +1 @@ -dwc_otg.lpm_enable=0 console=serial0,115200 kgdboc=serial0,115200 console=tty1 root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait +console=serial0,115200 console=tty1 root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait diff --git a/target/linux/brcm2708/image/config.txt b/target/linux/brcm2708/image/config.txt index 329aaccc5..0b963a99a 100644 --- a/target/linux/brcm2708/image/config.txt +++ b/target/linux/brcm2708/image/config.txt @@ -1,961 +1,8 @@ ################################################################################ -## Raspberry Pi Configuration Settings -## -## Revision 14, 2012/10/22 -## -## Details taken from the eLinux wiki -## For up-to-date information please refer to wiki page. -## -## Wiki Location : http://elinux.org/RPi_config.txt -## -## -## Description: -## Details of each setting are described with each section that begins with -## a double hashed comment ('##') -## It is up to the user to remove the single hashed comment ('#') from each -## option they want to enable, and to set the specific value of that option. -## -## WARNING: Setting the following combination of parameters will set a -## permanent bit within the SOC and your warranty is void. -## over_voltage>0, and at least one of the following: -## force_turbo=1 -## current_limit_override=0x5A000020 -## temp_limit>85 -## -## Overclock settings will be disabled at runtime if the SoC reaches temp_limit -## +# Bootloader configuration - config.txt ################################################################################ ################################################################################ -## Standard Definition Video Settings +# For overclocking and various other settings, see: +# https://www.raspberrypi.org/documentation/configuration/config-txt/README.md ################################################################################ - -## sdtv_mode -## defines the TV standard for composite output -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal NTSC (Default) -## 1 Japanese version of NTSC - no pedestal -## 2 Normal PAL -## 3 Brazilian version of PAL - 525/60 rather than 625/50, different -## subcarrier -## -#sdtv_mode=0 - -## sdtv_aspect -## defines the aspect ratio for composite output -## -## Value Description -## ------------------------------------------------------------------------- -## 1 4:3 (Default) -## 2 14:9 -## 3 16:9 -## -#sdtv_aspect=1 - -## sdtv_disable_colourburst -## Disables colour burst on composite output. The picture will be -## monochrome, but possibly sharper -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Colour burst is enabled (Default) -## 1 Colour burst is disabled -## -#sdtv_disable_colourburst=1 - -################################################################################ -## High Definition Video Settings -################################################################################ - -## hdmi_safe -## Use "safe mode" settings to try to boot with maximum hdmi compatibility. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Enabled (this does: hdmi_force_hotplug=1, config_hdmi_boost=4, -## hdmi_group=1, hdmi_mode=1, -## disable_overscan=0) -## -#hdmi_safe=1 - -## hdmi_force_hotplug -## Pretends HDMI hotplug signal is asserted so it appears a HDMI display -## is attached -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Use HDMI mode even if no HDMI monitor is detected -## -#hdmi_force_hotplug=1 - -## hdmi_ignore_hotplug -## Pretends HDMI hotplug signal is not asserted so it appears a HDMI -## display is not attached -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disabled (Default) -## 1 Use composite mode even if HDMI monitor is detected -## -#hdmi_ignore_hotplug=1 - -## hdmi_drive -## chooses between HDMI and DVI modes -## -## Value Description -## ------------------------------------------------------------------------- -## 1 Normal DVI mode (No sound) -## 2 Normal HDMI mode (Sound will be sent if supported and enabled) -## -#hdmi_drive=2 - -## hdmi_ignore_edid -## Enables the ignoring of EDID/display data -## -#hdmi_ignore_edid=0xa5000080 - -## hdmi_edid_file -## Read the EDID data from the edid.dat file instead of from the attached -## device -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Read EDID data from attached device (Default) -## 1 Read EDID data from edid.txt file -## -#hdmi_edid_file=1 - -## hdmi_force_edid_audio -## Pretends all audio formats are supported by display, allowing -## passthrough of DTS/AC3 even when not reported as supported. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use EDID provided values (Default) -## 1 Pretend all audio formats are supported -## -#hdmi_force_edid_audio=1 - -## avoid_edid_fuzzy_match -## Avoid fuzzy matching of modes described in edid. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use fuzzy matching (Default) -## 1 Avoid fuzzy matching -## -#avoid_edid_fuzzy_match=1 - -## hdmi_group -## Defines the HDMI type -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Use the preferred group reported by the edid (Default) -## 1 CEA -## 2 DMT -## -#hdmi_group=1 - -## hdmi_mode -## defines screen resolution in CEA or DMT format -## -## H means 16:9 variant (of a normally 4:3 mode). -## 2x means pixel doubled (i.e. higher clock rate, with each pixel repeated -## twice) -## 4x means pixel quadrupled (i.e. higher clock rate, with each pixel -## repeated four times) -## reduced blanking means fewer bytes are used for blanking within the data -## stream (i.e. lower clock rate, with fewer wasted bytes) -## -## Value hdmi_group=CEA hdmi_group=DMT -## ------------------------------------------------------------------------- -## 1 VGA 640x350 85Hz -## 2 480p 60Hz 640x400 85Hz -## 3 480p 60Hz H 720x400 85Hz -## 4 720p 60Hz 640x480 60Hz -## 5 1080i 60Hz 640x480 72Hz -## 6 480i 60Hz 640x480 75Hz -## 7 480i 60Hz H 640x480 85Hz -## 8 240p 60Hz 800x600 56Hz -## 9 240p 60Hz H 800x600 60Hz -## 10 480i 60Hz 4x 800x600 72Hz -## 11 480i 60Hz 4x H 800x600 75Hz -## 12 240p 60Hz 4x 800x600 85Hz -## 13 240p 60Hz 4x H 800x600 120Hz -## 14 480p 60Hz 2x 848x480 60Hz -## 15 480p 60Hz 2x H 1024x768 43Hz DO NOT USE -## 16 1080p 60Hz 1024x768 60Hz -## 17 576p 50Hz 1024x768 70Hz -## 18 576p 50Hz H 1024x768 75Hz -## 19 720p 50Hz 1024x768 85Hz -## 20 1080i 50Hz 1024x768 120Hz -## 21 576i 50Hz 1152x864 75Hz -## 22 576i 50Hz H 1280x768 reduced blanking -## 23 288p 50Hz 1280x768 60Hz -## 24 288p 50Hz H 1280x768 75Hz -## 25 576i 50Hz 4x 1280x768 85Hz -## 26 576i 50Hz 4x H 1280x768 120Hz reduced blanking -## 27 288p 50Hz 4x 1280x800 reduced blanking -## 28 288p 50Hz 4x H 1280x800 60Hz -## 29 576p 50Hz 2x 1280x800 75Hz -## 30 576p 50Hz 2x H 1280x800 85Hz -## 31 1080p 50Hz 1280x800 120Hz reduced blanking -## 32 1080p 24Hz 1280x960 60Hz -## 33 1080p 25Hz 1280x960 85Hz -## 34 1080p 30Hz 1280x960 120Hz reduced blanking -## 35 480p 60Hz 4x 1280x1024 60Hz -## 36 480p 60Hz 4x H 1280x1024 75Hz -## 37 576p 50Hz 4x 1280x1024 85Hz -## 38 576p 50Hz 4x H 1280x1024 120Hz reduced blanking -## 39 1080i 50Hz reduced blanking 1360x768 60Hz -## 40 1080i 100Hz 1360x768 120Hz reduced blanking -## 41 720p 100Hz 1400x1050 reduced blanking -## 42 576p 100Hz 1400x1050 60Hz -## 43 576p 100Hz H 1400x1050 75Hz -## 44 576i 100Hz 1400x1050 85Hz -## 45 576i 100Hz H 1400x1050 120Hz reduced blanking -## 46 1080i 120Hz 1440x900 reduced blanking -## 47 720p 120Hz 1440x900 60Hz -## 48 480p 120Hz 1440x900 75Hz -## 49 480p 120Hz H 1440x900 85Hz -## 50 480i 120Hz 1440x900 120Hz reduced blanking -## 51 480i 120Hz H 1600x1200 60Hz -## 52 576p 200Hz 1600x1200 65Hz -## 53 576p 200Hz H 1600x1200 70Hz -## 54 576i 200Hz 1600x1200 75Hz -## 55 576i 200Hz H 1600x1200 85Hz -## 56 480p 240Hz 1600x1200 120Hz reduced blanking -## 57 480p 240Hz H 1680x1050 reduced blanking -## 58 480i 240Hz 1680x1050 60Hz -## 59 480i 240Hz H 1680x1050 75Hz -## 60 1680x1050 85Hz -## 61 1680x1050 120Hz reduced blanking -## 62 1792x1344 60Hz -## 63 1792x1344 75Hz -## 64 1792x1344 120Hz reduced blanking -## 65 1856x1392 60Hz -## 66 1856x1392 75Hz -## 67 1856x1392 120Hz reduced blanking -## 68 1920x1200 reduced blanking -## 69 1920x1200 60Hz -## 70 1920x1200 75Hz -## 71 1920x1200 85Hz -## 72 1920x1200 120Hz reduced blanking -## 73 1920x1440 60Hz -## 74 1920x1440 75Hz -## 75 1920x1440 120Hz reduced blanking -## 76 2560x1600 reduced blanking -## 77 2560x1600 60Hz -## 78 2560x1600 75Hz -## 79 2560x1600 85Hz -## 80 2560x1600 120Hz reduced blanking -## 81 1366x768 60Hz -## 82 1080p 60Hz -## 83 1600x900 reduced blanking -## 84 2048x1152 reduced blanking -## 85 720p 60Hz -## 86 1366x768 reduced blanking -## -#hdmi_mode=1 - -## config_hdmi_boost -## configure the signal strength of the HDMI interface. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 (Default) -## 1 -## 2 -## 3 -## 4 Try if you have interference issues with HDMI -## 5 -## 6 -## 7 Maximum -## -#config_hdmi_boost=0 - -## hdmi_ignore_cec_init -## Doesn't sent initial active source message. Avoids bringing -## (CEC enabled) TV out of standby and channel switch when rebooting. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal behaviour (Default) -## 1 Doesn't sent initial active source message -## -#hdmi_ignore_cec_init=1 - -## hdmi_ignore_cec -## Pretends CEC is not supported at all by TV. -## No CEC functions will be supported. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Normal behaviour (Default) -## 1 Pretend CEC is not supported by TV -## -#hdmi_ignore_cec=1 - -################################################################################ -## Overscan Video Settings -################################################################################ - -## overscan_left -## Number of pixels to skip on left -## -#overscan_left=0 - -## overscan_right -## Number of pixels to skip on right -## -#overscan_right=0 - -## overscan_top -## Number of pixels to skip on top -## -#overscan_top=0 - -## overscan_bottom -## Number of pixels to skip on bottom -## -#overscan_bottom=0 - -## disable_overscan -## Set to 1 to disable overscan -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Overscan Enabled (Default) -## 1 Overscan Disabled -## -#disable_overscan=1 - -################################################################################ -## Framebuffer Video Settings -################################################################################ - -## framebuffer_width -## Console framebuffer width in pixels. Default is display width minus -## overscan. -## -#framebuffer_width=0 - -## framebuffer_height -## Console framebuffer height in pixels. Default is display height minus -## overscan. -## -#framebuffer_height=0 - -## framebuffer_depth -## Console framebuffer depth in bits per pixel. -## -## Value Description -## ------------------------------------------------------------------------- -## 8 Valid, but default RGB palette makes an unreadable screen -## 16 (Default) -## 24 Looks better but has corruption issues as of 2012/06/15 -## 32 Has no corruption issues but needs framebuffer_ignore_alpha=1 -## and shows the wrong colors as of 2012/06/15 -## -#framebuffer_depth=16 - -## framebuffer_ignore_alpha -## Set to 1 to disable alpha channel. Helps with 32bit. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable Alpha Channel (Default) -## 1 Disable Alpha Channel -## -#framebuffer_ignore_alpha=0 - -################################################################################ -## General Video Settings -################################################################################ - -## display_rotate -## Rotate the display clockwise or flip the display. -## The 90 and 270 degrees rotation options require additional memory on GPU, -## so won't work with the 16M GPU split. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 0 degrees (Default) -## 1 90 degrees -## 2 180 degrees -## 3 270 degrees -## 0x10000 Horizontal flip -## 0x20000 Vertical flip -## -#display_rotate=0 - -################################################################################ -## Licensed Codecs -## -## Hardware decoding of additional codecs can be enabled by purchasing a -## license that is locked to the CPU serial number of your Raspberry Pi. -## -## Up to 8 licenses per CODEC can be specified as a comma seperated list. -## -################################################################################ - -## decode_MPG2 -## License key to allow hardware MPEG-2 decoding. -## -#decode_MPG2=0x12345678 - -## decode_WVC1 -## License key to allow hardware VC-1 decoding. -## -#decode_WVC1=0x12345678 - -################################################################################ -## Test Settings -################################################################################ - -## test_mode -## Enable test sound/image during boot for manufacturing test. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Disable Test Mod (Default) -## 1 Enable Test Mode -## -#test_mode=0 - -################################################################################ -## Memory Settings -################################################################################ - -## disable_l2cache -## Disable arm access to GPU's L2 cache. Needs corresponding L2 disabled -## kernel. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable L2 Cache (Default) -## 1 Disable L2 cache -## -#disable_l2cache=0 - -## gpu_mem -## GPU memory allocation in MB for all board revisions. -## -## Default 64 -## -#gpu_mem=128 - -## gpu_mem_256 -## GPU memory allocation in MB for 256MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_256=128 - -## gpu_mem_512 -## GPU memory allocation in MB for 512MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_512=128 - -## gpu_mem_1024 -## GPU memory allocation in MB for 1024MB board revision. -## This option overrides gpu_mem. -## -#gpu_mem_1024=128 - -################################################################################ -## Boot Option Settings -################################################################################ - -## disable_commandline_tags -## Stop start.elf from filling in ATAGS (memory from 0x100) before -## launching kernel -## -#disable_commandline_tags=2 - -## enable_uart -## Enables or disables uart pin multiplexing -## Raspberry Pi 1/2: if unset, uart is enabled by default -## Raspberry Pi 3: if unset uart is disabled by default -## -enable_uart=1 - -## cmdline (string) -## Command line parameters. Can be used instead of cmdline.txt file -## -#cmdline="" - -## kernel (string) -## Alternative name to use when loading kernel. -## -#kernel="" - -## kernel_address -## Address to load kernel.img file at -## -#kernel_address=0x8000 - -## ramfsfile (string) -## ramfs file to load -## -#ramfsfile="" - -## ramfsaddr -## Address to load ramfs file at -## -#ramfsaddr=0x00000000 - -## initramfs (string address) -## ramfs file and address to load it at (it's like ramfsfile+ramfsaddr in -## one option). -## -## NOTE: this option uses different syntax than all other options - you -## should not use "=" character here. -## -#initramfs initramf.gz 0x00800000 - -## device_tree_address -## Address to load device_tree at -## -#device_tree_address=0x100 - -## init_uart_baud -## Initial uart baud rate. -## -## Default 115200 -## -#init_uart_baud=115200 - -## init_uart_clock -## Initial uart clock. -## -## Default 3000000 (3MHz) -## -#init_uart_clock=3000000 - -## init_emmc_clock -## Initial emmc clock, increasing this can speedup your SD-card. -## -## Default 100000000 (100mhz) -## -#init_emmc_clock=100000000 - -## boot_delay -## Wait for a given number of seconds in start.elf before loading -## kernel.img. -## -## delay = (1000 * boot_delay) + boot_delay_ms -## -## Default 1 -## -#boot_delay=0 - -## boot_delay_ms -## Wait for a given number of milliseconds in start.elf before loading -## kernel.img. -## -## delay = (1000 * boot_delay) + boot_delay_ms -## -## Default 0 -## -#boot_delay_ms=0 - -## avoid_safe_mode -## Adding a jumper between pins 5 & 6 of P1 enables a recovery Safe Mode. -## If pins 5 & 6 are used for connecting to external devices (e.g. GPIO), -## then this setting can be used to ensure Safe Mode is not triggered. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Respect Safe Mode input (Default) -## 1 Ignore Safe Mode input -## -#avoid_safe_mode=1 - -################################################################################ -## Overclocking Settings -## -## ARM, SDRAM and GPU each have their own PLLs and can have unrelated -## frequencies. -## -## The GPU core, h264, v3d and isp share a PLL, so need to have related -## frequencies. -## pll_freq = floor(2400 / (2 * core_freq)) * (2 * core_freq) -## gpu_freq = pll_freq / [even number] -## -## The effective gpu_freq is automatically rounded to nearest even integer, so -## asking for core_freq = 500 and gpu_freq = 300 will result in divisor of -## 2000/300 = 6.666 => 6 and so 333.33MHz. -## -## -## Standard Profiles: -## arm_freq core_freq sdram_freq over_voltage -## ------------------------------------------------------------------------- -## None 700 250 400 0 -## Modest 800 300 400 0 -## Medium 900 333 450 2 -## High 950 450 450 6 -## Turbo 1000 500 500 6 -## -################################################################################ - -## force_turbo -## Control the kernel "ondemand" governor. It has no effect if no overclock -## settings are specified. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Enable dynamic clocks and voltage for the ARM core, GPU core and -## SDRAM (Default). -## Overclocking of h264_freq, v3d_freq and isp_freq is ignored. -## 1 Disable dynamic clocks and voltage for the ARM core, GPU core -## and SDRAM. -## Overclocking of h264_freq, v3d_freq and isp_freq is allowed. -## -#force_turbo=0 - -## initial_turbo -## Enables turbo mode from boot for the given value in seconds (up to 60) -## or until cpufreq sets a frequency. Can help with sdcard corruption if -## overclocked. -## -## Default 0 -## -#initial_turbo=0 - -## temp_limit -## Overheat protection. Sets clocks and voltages to default when the SoC -## reaches this Celsius value. -## Setting this higher than default voids warranty. -## -## Default 85 -## -#temp_limit=85 - -## arm_freq -## Frequency of ARM in MHz. -## -## Default 700. -## -#arm_freq=700 - -## arm_freq_min -## Minimum frequency of ARM in MHz (used for dynamic clocking). -## -## Default 700. -## -#arm_freq_min=700 - -## gpu_freq -## Sets core_freq, h264_freq, isp_freq, v3d_freq together. -## -## Default 250. -## -#gpu_freq=250 - -## core_freq -## Frequency of GPU processor core in MHz. It has an impact on ARM -## performance since it drives L2 cache. -## -## Default 250. -## -#core_freq=250 - -## core_freq_min -## Minimum frequency of GPU processor core in MHz (used for dynamic -## clocking). It has an impact on ARM performance since it drives L2 cache. -## -## Default 250. -## -#core_freq_min=250 - -## h264_freq -## Frequency of hardware video block in MHz. -## -## Default 250. -## -#h264_freq=250 - -## isp_freq -## Frequency of image sensor pipeline block in MHz. -## -## Default 250. -## -#isp_freq=250 - -## v3d_freq -## Frequency of 3D block in MHz. -## -## Default 250. -## -#v3d_freq=250 - -## sdram_freq -## Frequency of SDRAM in MHz. -## -## Default 400. -## -#sdram_freq=400 - -## sdram_freq_min -## Minimum frequency of SDRAM in MHz (used for dynamic clocking). -## -## Default 400. -## -#sdram_freq_min=400 - -## avoid_pwm_pll -## Unlink core_freq from the rest of the gpu. Analog audio should still -## work, but from a fractional divider, so lower quality. -## -## Value Description -## ------------------------------------------------------------------------- -## 0 Linked core_freq (Default) -## 1 Unlinked core_freq -## -#avoid_pwm_pll=1 - -################################################################################ -## Voltage Settings -################################################################################ - -## current_limit_override -## Disables SMPS current limit protection. Can help if you are currently -## hitting a reboot failure when overclocking too high. -## -#current_limit_override=0x5A000020 - -## over_voltage -## ARM/GPU core voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V (requires force_turbo=1) -## 8 1.4 V (requires force_turbo=1) -## -#over_voltage=0 - -## over_voltage_min -## Minimum ARM/GPU core voltage adjust (used for dynamic clocking). -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V (requires force_turbo=1) -## 8 1.4 V (requires force_turbo=1) -## -#over_voltage_min=0 - -## over_voltage_sdram -## Sets over_voltage_sdram_c, over_voltage_sdram_i, over_voltage_sdram_p -## together -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram=0 - -## over_voltage_sdram_c -## SDRAM controller voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_c=0 - -## over_voltage_sdram_i -## SDRAM I/O voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_i=0 - -## over_voltage_sdram_p -## SDRAM phy voltage adjust. -## -## Value Description -## ------------------------------------------------------------------------- -## -16 0.8 V -## -15 0.825 V -## -14 0.85 V -## -13 0.875 V -## -12 0.9 V -## -11 0.925 V -## -10 0.95 V -## -9 0.975 V -## -8 1.0 V -## -7 1.025 V -## -6 1.05 V -## -5 1.075 V -## -4 1.1 V -## -3 1.125 V -## -2 1.15 V -## -1 1.175 V -## 0 1.2 V (Default) -## 1 1.225 V -## 2 1.25 V -## 3 1.275 V -## 4 1.3 V -## 5 1.325 V -## 6 1.35 V -## 7 1.375 V -## 8 1.4 V -## -#over_voltage_sdram_p=0 - -################################################################################ -## Device Tree Settings -################################################################################ - -dtparam=random=on -dtparam=watchdog=on -dtparam=audio=on -dtparam=i2c0=on -dtparam=i2c1=on -dtparam=spi=on - -#dtoverlay=adau1977-adc -#dtoverlay=allo-piano-dac-pcm512x-audio -#dtoverlay=audioinjector-wm8731-audio -#dtoverlay=dionaudio-loco -#dtoverlay=hifiberry-amp -#dtoverlay=hifiberry-dac -#dtoverlay=hifiberry-dacplus -#dtoverlay=hifiberry-digi -#dtoverlay=hifiberry-digi-pro -#dtoverlay=iqaudio-dac -#dtoverlay=iqaudio-dacplus -#dtoverlay=iqaudio-digi-wm8804-audio -#dtoverlay=justboom-dac -#dtoverlay=justboom-digi -#dtoverlay=pisound -#dtoverlay=raspidac3 -#dtoverlay=rpi-dac -#dtoverlay=rpi-proto -#dtoverlay=rra-digidac1-wm8741-audio diff --git a/target/linux/brcm2708/modules.mk b/target/linux/brcm2708/modules.mk index a05c9a1fb..3e51e8487 100644 --- a/target/linux/brcm2708/modules.mk +++ b/target/linux/brcm2708/modules.mk @@ -1,868 +1,8 @@ # -# Copyright (C) 2012-2016 OpenWrt.org +# Copyright (C) 2019 OpenWrt.org # # This is free software, licensed under the GNU General Public License v2. # See /LICENSE for more information. # -define KernelPackage/drm-vc4 - SUBMENU:=$(VIDEO_MENU) - TITLE:=Broadcom VC4 Graphics - DEPENDS:= \ - @TARGET_brcm2708 +kmod-drm \ - +kmod-sound-core \ - +kmod-sound-soc-core - KCONFIG:= \ - CONFIG_DRM_VC4 \ - CONFIG_DRM_VC4_HDMI_CEC=n - FILES:= \ - $(LINUX_DIR)/drivers/gpu/drm/vc4/vc4.ko \ - $(LINUX_DIR)/drivers/gpu/drm/drm_kms_helper.ko - AUTOLOAD:=$(call AutoProbe,vc4) -endef - -define KernelPackage/drm-vc4/description - Direct Rendering Manager (DRM) support for Broadcom VideoCore IV GPU - used in BCM2835, BCM2836 and BCM2837 SoCs (e.g. Raspberry Pi). -endef - -$(eval $(call KernelPackage,drm-vc4)) - - -define KernelPackage/hwmon-rpi-poe-fan - SUBMENU:=$(HWMON_MENU) - TITLE:=Raspberry Pi PoE HAT fan - DEPENDS:=@TARGET_brcm2708 +kmod-hwmon-core - KCONFIG:=CONFIG_SENSORS_RPI_POE_FAN - FILES:=$(LINUX_DIR)/drivers/hwmon/rpi-poe-fan.ko - AUTOLOAD:=$(call AutoProbe,rpi-poe-fan) -endef - -define KernelPackage/hwmon-rpi-poe-fan/description - Raspberry Pi PoE HAT fan driver -endef - -$(eval $(call KernelPackage,hwmon-rpi-poe-fan)) - - -define KernelPackage/sound-arm-bcm2835 - TITLE:=BCM2835 ALSA driver - KCONFIG:= \ - CONFIG_SND_ARM=y \ - CONFIG_SND_BCM2835 \ - CONFIG_SND_ARMAACI=n - FILES:= \ - $(LINUX_DIR)/drivers/staging/vc04_services/bcm2835-audio/snd-bcm2835.ko - AUTOLOAD:=$(call AutoLoad,68,snd-bcm2835) - DEPENDS:=@TARGET_brcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-arm-bcm2835/description - This package contains the BCM2835 ALSA pcm card driver -endef - -$(eval $(call KernelPackage,sound-arm-bcm2835)) - - -define KernelPackage/sound-soc-bcm2835-i2s - TITLE:=SoC Audio support for the Broadcom 2835 I2S module - KCONFIG:= \ - CONFIG_SND_BCM2835_SOC_I2S \ - CONFIG_SND_SOC_DMAENGINE_PCM=y \ - CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-bcm2835-i2s.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-bcm2835-i2s) - DEPENDS:=@TARGET_brcm2708 +kmod-sound-soc-core - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-bcm2835-i2s/description - This package contains support for codecs attached to the Broadcom 2835 I2S interface -endef - -$(eval $(call KernelPackage,sound-soc-bcm2835-i2s)) - - -define KernelPackage/sound-soc-3dlab-nano-player - TITLE:=Support for 3Dlab Nano Player - KCONFIG:= CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER - FILES:=$(LINUX_DIR)/sound/soc/bcm/snd-soc-3dlab-nano-player.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-3dlab-nano-player) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-3dlab-nano-player/description - This package contains support for 3Dlab Nano Player -endef - -$(eval $(call KernelPackage,sound-soc-3dlab-nano-player)) - - -define KernelPackage/sound-soc-adau1977-adc - TITLE:=Support for ADAU1977 ADC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_ADAU1977_ADC \ - CONFIG_SND_SOC_ADAU1977 \ - CONFIG_SND_SOC_ADAU1977_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-adau1977-adc.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-adau1977.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-adau1977-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-adau1977 snd-soc-adau1977-i2c \ - snd-soc-adau1977-adc) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-adau1977-adc/description - This package contains support for ADAU1977 ADC -endef - -$(eval $(call KernelPackage,sound-soc-adau1977-adc)) - - -define KernelPackage/sound-soc-allo-boss-dac - TITLE:=Support for Allo Boss DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-boss-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ - snd-soc-allo-boss-dac) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-allo-boss-dac/description - This package contains support for Allo Boss DAC -endef - -$(eval $(call KernelPackage,sound-soc-allo-boss-dac)) - - -define KernelPackage/sound-soc-allo-digione - TITLE:=Support for Allo Piano DigiOne - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-digione.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ - snd-soc-allo-digione) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-allo-digione/description - This package contains support for Allo DigiOne -endef - -$(eval $(call KernelPackage,sound-soc-allo-digione)) - - -define KernelPackage/sound-soc-allo-piano-dac - TITLE:=Support for Allo Piano DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-piano-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ - snd-soc-allo-piano-dac) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-allo-piano-dac/description - This package contains support for Allo Piano DAC -endef - -$(eval $(call KernelPackage,sound-soc-allo-piano-dac)) - - -define KernelPackage/sound-soc-allo-piano-dac-plus - TITLE:=Support for Allo Piano DAC Plus - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-piano-dac-plus.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ - snd-soc-allo-piano-dac-plus) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-allo-piano-dac-plus/description - This package contains support for Allo Piano DAC Plus -endef - -$(eval $(call KernelPackage,sound-soc-allo-piano-dac-plus)) - - -define KernelPackage/sound-soc-allo-katana-codec - TITLE:=Support for Allo Katana DAC - KCONFIG:= \ - CONFIG_SND_AUDIO_GRAPH_CARD \ - CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C \ - CONFIG_SND_SIMPLE_CARD_UTILS - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-katana-codec.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ - snd-soc-allo-katana-codec) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-allo-katana-codec/description - This package contains support for Allo Katana DAC -endef - -$(eval $(call KernelPackage,sound-soc-allo-katana-codec)) - - -define KernelPackage/sound-soc-audioinjector-octo-soundcard - TITLE:=Support for AudioInjector Octo soundcard - KCONFIG:= \ - CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD \ - CONFIG_SND_SOC_CS42XX8 \ - CONFIG_SND_SOC_CS42XX8_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-audioinjector-octo-soundcard.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-cs42xx8.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-cs42xx8-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc- \ - snd-soc-audioinjector-octo-soundcard) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-audioinjector-octo-soundcard/description - This package contains support for AudioInjector Octo soundcard -endef - -$(eval $(call KernelPackage,sound-soc-audioinjector-octo-soundcard)) - - -define KernelPackage/sound-soc-audioinjector-pi-soundcard - TITLE:=Support for AudioInjector Pi soundcard - KCONFIG:= \ - CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD \ - CONFIG_SND_SOC_WM8731 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-audioinjector-pi-soundcard.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8731.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8731 \ - snd-soc-audioinjector-pi-soundcard) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c \ - +kmod-regmap-spi - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-audioinjector-pi-soundcard/description - This package contains support for AudioInjector Pi soundcard -endef - -$(eval $(call KernelPackage,sound-soc-audioinjector-pi-soundcard)) - -define KernelPackage/sound-soc-digidac1-soundcard - TITLE:=Support for RRA DigiDAC1 - KCONFIG:= \ - CONFIG_SND_DIGIDAC1_SOUNDCARD \ - CONFIG_SND_SOC_WM8741 \ - CONFIG_SND_SOC_WM8804 \ - CONFIG_SND_SOC_WM8804_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-digidac1-soundcard.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8741.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8741 \ - snd-soc-wm8804 snd-soc-wm8804-i2c \ - snd-soc-digidac1-soundcard) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c \ - +kmod-regmap-spi - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-digidac1-soundcard/description - This package contains support for RRA DigiDAC1 -endef - -$(eval $(call KernelPackage,sound-soc-digidac1-soundcard)) - -define KernelPackage/sound-soc-dionaudio-loco - TITLE:=Support for Dion Audio LOCO DAC-AMP - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO \ - CONFIG_SND_SOC_PCM5102A - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-dionaudio-loco.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a \ - snd-soc-dionaudio-loco) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-dionaudio-loco/description - This package contains support for Dion Audio LOCO DAC-AMP -endef - -$(eval $(call KernelPackage,sound-soc-dionaudio-loco)) - -define KernelPackage/sound-soc-dionaudio-loco-v2 - TITLE:=Support for Dion Audio LOCO-V2 DAC-AMP - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2 \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-dionaudio-loco.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-pcm512x-i2c \ - snd-soc-dionaudio-loco) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-dionaudio-loco-v2/description - This package contains support for Dion Audio LOCO-V2 DAC-AMP -endef - -$(eval $(call KernelPackage,sound-soc-dionaudio-loco-v2)) - -define KernelPackage/sound-soc-fe-pi - TITLE:=Support for Fe-Pi Audio Sound Card - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO \ - CONFIG_SND_SOC_SGTL5000 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-fe-pi-audio.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-sgtl5000.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-sgtl5000 \ - snd-soc-fe-pi-audio) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-fe-pi/description - This package contains support for Fe-Pi Audio Sound Card -endef - -$(eval $(call KernelPackage,sound-soc-fe-pi)) - - -define KernelPackage/sound-soc-googlevoicehat - TITLE:=Support for Google VoiceHAT Sound Card - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD \ - CONFIG_SND_SOC_VOICEHAT - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-googlevoicehat-codec.ko \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-googlevoicehat-soundcard.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-googlevoicehat-codec \ - snd-soc-googlevoicehat-soundcard) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-googlevoicehat/description - This package contains support for Google VoiceHAT Sound Card -endef - -$(eval $(call KernelPackage,sound-soc-googlevoicehat)) - - -define KernelPackage/sound-soc-hifiberry-dac - TITLE:=Support for HifiBerry DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC \ - CONFIG_SND_SOC_PCM5102A - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a snd-soc-hifiberry-dac) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-hifiberry-dac/description - This package contains support for HifiBerry DAC -endef - -$(eval $(call KernelPackage,sound-soc-hifiberry-dac)) - -define KernelPackage/sound-soc-hifiberry-dacplus - TITLE:=Support for HifiBerry DAC+ / DAC+ Pro - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS \ - CONFIG_SND_SOC_PCM512x - FILES:= \ - $(LINUX_DIR)/drivers/clk/clk-hifiberry-dacpro.ko \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-dacplus.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko - AUTOLOAD:=$(call AutoLoad,68,clk-hifiberry-dacpro snd-soc-pcm512x \ - snd-soc-hifiberry-dacplus) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-hifiberry-dacplus/description - This package contains support for HifiBerry DAC+ / DAC+ Pro -endef - -$(eval $(call KernelPackage,sound-soc-hifiberry-dacplus)) - -define KernelPackage/sound-soc-hifiberry-digi - TITLE:=Support for HifiBerry Digi / Digi+ / Digi+ Pro - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI \ - CONFIG_SND_SOC_WM8804 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-digi.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-hifiberry-digi) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-hifiberry-digi/description - This package contains support for HifiBerry Digi -endef - -$(eval $(call KernelPackage,sound-soc-hifiberry-digi)) - -define KernelPackage/sound-soc-hifiberry-amp - TITLE:=Support for HifiBerry Amp - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP \ - CONFIG_SND_SOC_TAS5713 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-amp.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-tas5713.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-tas5713 snd-soc-hifiberry-amp) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-hifiberry-amp/description - This package contains support for HifiBerry Amp -endef - -$(eval $(call KernelPackage,sound-soc-hifiberry-amp)) - -define KernelPackage/sound-soc-iqaudio-dac - TITLE:=Support for IQaudIO-DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC \ - CONFIG_SND_SOC_PCM512x \ - CONFIG_SND_SOC_PCM512x_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-iqaudio-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-pcm512x-i2c \ - snd-soc-iqaudio-dac) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-iqaudio-dac/description - This package contains support for IQaudIO-DAC -endef - -$(eval $(call KernelPackage,sound-soc-iqaudio-dac)) - -define KernelPackage/sound-soc-iqaudio-digi - TITLE:=Support for IQaudIO-DIGI - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI \ - CONFIG_SND_SOC_WM8804 \ - CONFIG_SND_SOC_WM8804_I2C - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-iqaudio-digi.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-wm8804-i2c \ - snd-soc-iqaudio-digi) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-iqaudio-digi/description - This package contains support for IQaudIO-DIGI -endef - -$(eval $(call KernelPackage,sound-soc-iqaudio-digi)) - -define KernelPackage/sound-soc-justboom-dac - TITLE:=Support for JustBoom DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC \ - CONFIG_SND_SOC_PCM512x - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-justboom-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-justboom-dac) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-justboom-dac/description - This package contains support for JustBoom DAC -endef - -$(eval $(call KernelPackage,sound-soc-justboom-dac)) - -define KernelPackage/sound-soc-justboom-digi - TITLE:=Support for JustBoom Digi - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI \ - CONFIG_SND_SOC_WM8804 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-justboom-digi.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-justboom-digi) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-justboom-digi/description - This package contains support for JustBoom Digi -endef - -$(eval $(call KernelPackage,sound-soc-justboom-digi)) - -define KernelPackage/sound-soc-pisound - TITLE:=Support for Blokas Labs PiSound - KCONFIG:= \ - CONFIG_SND_PISOUND \ - CONFIG_SND_SOC_PCM5102A - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-pisound.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a snd-soc-pisound) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-pisound/description - This package contains support for Blokas Labs PiSound -endef - -$(eval $(call KernelPackage,sound-soc-pisound)) - - -define KernelPackage/sound-soc-rpi-cirrus - TITLE:=Support for Cirrus Logic Audio Card - KCONFIG:= \ - CONFIG_GPIO_ARIZONA \ - CONFIG_INPUT_ARIZONA_HAPTICS=n \ - CONFIG_MFD_ARIZONA=y \ - CONFIG_MFD_ARIZONA_I2C \ - CONFIG_MFD_CS47L24=n \ - CONFIG_MFD_WM5102=n \ - CONFIG_MFD_WM5110=n \ - CONFIG_MFD_WM8997=n \ - CONFIG_MFD_WM8998=n \ - CONFIG_REGULATOR_ARIZONA \ - CONFIG_REGULATOR_ARIZONA_LDO1 \ - CONFIG_REGULATOR_ARIZONA_MICSUPP \ - CONFIG_SND_BCM2708_SOC_RPI_CIRRUS \ - CONFIG_SND_SOC_ARIZONA \ - CONFIG_SND_SOC_WM5102 \ - CONFIG_SND_SOC_WM8804 \ - CONFIG_SND_SOC_WM_ADSP - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-cirrus.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-arizona.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm-adsp.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm5102.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm1794a snd-soc-rpi-cirrus) - DEPENDS:= \ - +kmod-i2c-bcm2708 \ - kmod-sound-soc-bcm2835-i2s - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-rpi-cirrus/description - This package contains support for RPi-Cirrus -endef - -$(eval $(call KernelPackage,sound-soc-rpi-cirrus)) - - -define KernelPackage/sound-soc-rpi-dac - TITLE:=Support for RPi-DAC - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_RPI_DAC \ - CONFIG_SND_SOC_PCM1794A - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-dac.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm1794a.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm1794a snd-soc-rpi-dac) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-rpi-dac/description - This package contains support for RPi-DAC -endef - -$(eval $(call KernelPackage,sound-soc-rpi-dac)) - -define KernelPackage/sound-soc-rpi-proto - TITLE:=Support for RPi-PROTO - KCONFIG:= \ - CONFIG_SND_BCM2708_SOC_RPI_PROTO \ - CONFIG_SND_SOC_WM8731 - FILES:= \ - $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-proto.ko \ - $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8731.ko - AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8731 snd-soc-rpi-proto) - DEPENDS:= \ - kmod-sound-soc-bcm2835-i2s \ - +kmod-i2c-bcm2708 \ - +kmod-regmap-i2c \ - +kmod-regmap-spi - $(call AddDepends/sound) -endef - -define KernelPackage/sound-soc-rpi-proto/description - This package contains support for RPi-PROTO -endef - -$(eval $(call KernelPackage,sound-soc-rpi-proto)) - - -define KernelPackage/random-bcm2835 - SUBMENU:=$(OTHER_MENU) - TITLE:=BCM2835 HW Random Number Generator - KCONFIG:=CONFIG_HW_RANDOM_BCM2835 - FILES:=$(LINUX_DIR)/drivers/char/hw_random/bcm2835-rng.ko - AUTOLOAD:=$(call AutoLoad,11,bcm2835-rng) - DEPENDS:=@TARGET_brcm2708 +kmod-random-core -endef - -define KernelPackage/random-bcm2835/description - This package contains the Broadcom 2835 HW random number generator driver -endef - -$(eval $(call KernelPackage,random-bcm2835)) - - -define KernelPackage/smi-bcm2835 - SUBMENU:=$(OTHER_MENU) - TITLE:=BCM2835 SMI driver - KCONFIG:=CONFIG_BCM2835_SMI - FILES:=$(LINUX_DIR)/drivers/misc/bcm2835_smi.ko - AUTOLOAD:=$(call AutoLoad,20,bcm2835_smi) - DEPENDS:=@TARGET_brcm2708 -endef - -define KernelPackage/smi-bcm2835/description - This package contains the Character device driver for Broadcom Secondary - Memory Interface -endef - -$(eval $(call KernelPackage,smi-bcm2835)) - -define KernelPackage/smi-bcm2835-dev - SUBMENU:=$(OTHER_MENU) - TITLE:=BCM2835 SMI device driver - KCONFIG:=CONFIG_BCM2835_SMI_DEV - FILES:=$(LINUX_DIR)/drivers/char/broadcom/bcm2835_smi_dev.ko - AUTOLOAD:=$(call AutoLoad,21,bcm2835_smi_dev) - DEPENDS:=@TARGET_brcm2708 +kmod-smi-bcm2835 -endef - -define KernelPackage/smi-bcm2835-dev/description - This driver provides a character device interface (ioctl + read/write) to - Broadcom's Secondary Memory interface. The low-level functionality is provided - by the SMI driver itself. -endef - -$(eval $(call KernelPackage,smi-bcm2835-dev)) - - -define KernelPackage/spi-bcm2835 - SUBMENU:=$(SPI_MENU) - TITLE:=BCM2835 SPI controller driver - KCONFIG:=\ - CONFIG_SPI=y \ - CONFIG_SPI_BCM2835 \ - CONFIG_SPI_MASTER=y - FILES:=$(LINUX_DIR)/drivers/spi/spi-bcm2835.ko - AUTOLOAD:=$(call AutoLoad,89,spi-bcm2835) - DEPENDS:=@TARGET_brcm2708 -endef - -define KernelPackage/spi-bcm2835/description - This package contains the Broadcom 2835 SPI master controller driver -endef - -$(eval $(call KernelPackage,spi-bcm2835)) - -define KernelPackage/spi-bcm2835-aux - SUBMENU:=$(SPI_MENU) - TITLE:=BCM2835 Aux SPI controller driver - KCONFIG:=\ - CONFIG_SPI=y \ - CONFIG_SPI_BCM2835AUX \ - CONFIG_SPI_MASTER=y - FILES:=$(LINUX_DIR)/drivers/spi/spi-bcm2835aux.ko - AUTOLOAD:=$(call AutoLoad,89,spi-bcm2835aux) - DEPENDS:=@TARGET_brcm2708 -endef - -define KernelPackage/spi-bcm2835-aux/description - This package contains the Broadcom 2835 Aux SPI master controller driver -endef - -$(eval $(call KernelPackage,spi-bcm2835-aux)) - - -define KernelPackage/hwmon-bcm2835 - TITLE:=BCM2835 HWMON driver - KCONFIG:=CONFIG_SENSORS_BCM2835 - FILES:=$(LINUX_DIR)/drivers/hwmon/bcm2835-hwmon.ko - AUTOLOAD:=$(call AutoLoad,60,bcm2835-hwmon) - $(call AddDepends/hwmon,@TARGET_brcm2708) -endef - -define KernelPackage/hwmon-bcm2835/description - Kernel module for BCM2835 thermal monitor chip -endef - -$(eval $(call KernelPackage,hwmon-bcm2835)) - - -I2C_BCM2708_MODULES:=\ - CONFIG_I2C_BCM2708:drivers/i2c/busses/i2c-bcm2708 - -define KernelPackage/i2c-bcm2708 - $(call i2c_defaults,$(I2C_BCM2708_MODULES),59) - TITLE:=Broadcom BCM2708 I2C master controller driver - KCONFIG+= \ - CONFIG_I2C_BCM2708_BAUDRATE=100000 - DEPENDS:=@TARGET_brcm2708 +kmod-i2c-core -endef - -define KernelPackage/i2c-bcm2708/description - This package contains the Broadcom 2708 I2C master controller driver -endef - -$(eval $(call KernelPackage,i2c-bcm2708)) - -I2C_BCM2835_MODULES:=\ - CONFIG_I2C_BCM2835:drivers/i2c/busses/i2c-bcm2835 - -define KernelPackage/i2c-bcm2835 - $(call i2c_defaults,$(I2C_BCM2835_MODULES),59) - TITLE:=Broadcom BCM2835 I2C master controller driver - DEPENDS:=@TARGET_brcm2708 +kmod-i2c-core -endef - -define KernelPackage/i2c-bcm2835/description - This package contains the Broadcom 2835 I2C master controller driver -endef - -$(eval $(call KernelPackage,i2c-bcm2835)) - - -define KernelPackage/video-bcm2835 - TITLE:=Broadcom BCM2835 camera interface driver - KCONFIG:= \ - CONFIG_VIDEO_BCM2835 \ - CONFIG_VIDEO_BCM2835_MMAL - FILES:= \ - $(LINUX_DIR)/drivers/staging/vc04_services/bcm2835-camera/bcm2835-v4l2.ko - AUTOLOAD:=$(call AutoLoad,65,bcm2835-v4l2) - $(call AddDepends/video,@TARGET_brcm2708 +kmod-video-videobuf2) -endef - -define KernelPackage/video-bcm2835/description - This is a V4L2 driver for the Broadcom 2835 MMAL camera host interface -endef - -$(eval $(call KernelPackage,video-bcm2835)) +include $(TOPDIR)/target/linux/brcm2708/modules/*.mk diff --git a/target/linux/brcm2708/modules/hwmon.mk b/target/linux/brcm2708/modules/hwmon.mk new file mode 100644 index 000000000..9b790010b --- /dev/null +++ b/target/linux/brcm2708/modules/hwmon.mk @@ -0,0 +1,36 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define KernelPackage/hwmon-raspberrypi + TITLE:=Raspberry Pi voltage monitor + KCONFIG:=CONFIG_SENSORS_RASPBERRYPI_HWMON + FILES:=$(LINUX_DIR)/drivers/hwmon/raspberrypi-hwmon.ko + AUTOLOAD:=$(call AutoLoad,60,raspberrypi-hwmon) + $(call AddDepends/hwmon,@TARGET_brcm2708) +endef + +define KernelPackage/hwmon-raspberrypi/description + Kernel module for voltage sensor on the Raspberry Pi +endef + +$(eval $(call KernelPackage,hwmon-raspberrypi)) + + +define KernelPackage/hwmon-rpi-poe-fan + SUBMENU:=$(HWMON_MENU) + TITLE:=Raspberry Pi PoE HAT fan + DEPENDS:=@TARGET_brcm2708 +kmod-hwmon-core + KCONFIG:=CONFIG_SENSORS_RPI_POE_FAN + FILES:=$(LINUX_DIR)/drivers/hwmon/rpi-poe-fan.ko + AUTOLOAD:=$(call AutoProbe,rpi-poe-fan) +endef + +define KernelPackage/hwmon-rpi-poe-fan/description + Raspberry Pi PoE HAT fan driver +endef + +$(eval $(call KernelPackage,hwmon-rpi-poe-fan)) diff --git a/target/linux/brcm2708/modules/i2c.mk b/target/linux/brcm2708/modules/i2c.mk new file mode 100644 index 000000000..ebba032f9 --- /dev/null +++ b/target/linux/brcm2708/modules/i2c.mk @@ -0,0 +1,21 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +I2C_BCM2835_MODULES:=\ + CONFIG_I2C_BCM2835:drivers/i2c/busses/i2c-bcm2835 + +define KernelPackage/i2c-bcm2835 + $(call i2c_defaults,$(I2C_BCM2835_MODULES),59) + TITLE:=Broadcom BCM2835 I2C master controller driver + DEPENDS:=@TARGET_brcm2708 +kmod-i2c-core +endef + +define KernelPackage/i2c-bcm2835/description + This package contains the Broadcom 2835 I2C master controller driver +endef + +$(eval $(call KernelPackage,i2c-bcm2835)) diff --git a/target/linux/brcm2708/modules/other.mk b/target/linux/brcm2708/modules/other.mk new file mode 100644 index 000000000..ce3b2b6fb --- /dev/null +++ b/target/linux/brcm2708/modules/other.mk @@ -0,0 +1,75 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define KernelPackage/pwm-bcm2835 + SUBMENU:=$(OTHER_MENU) + TITLE:=BCM2835 PWM driver + KCONFIG:= \ + CONFIG_PWM=y \ + CONFIG_PWM_BCM2835 + FILES:=$(LINUX_DIR)/drivers/pwm/pwm-bcm2835.ko + AUTOLOAD:=$(call AutoLoad,60,pwm-bcm2835) + DEPENDS:=@TARGET_brcm2708 +endef + +define KernelPackage/pwm-bcm2835/description + This package contains the PWM framework driver for BCM2835 controller (Raspberry Pi) +endef + +$(eval $(call KernelPackage,pwm-bcm2835)) + + +define KernelPackage/random-bcm2835 + SUBMENU:=$(OTHER_MENU) + TITLE:=BCM2835 HW Random Number Generator + KCONFIG:= \ + CONFIG_HW_RANDOM_BCM2835 + FILES:=$(LINUX_DIR)/drivers/char/hw_random/bcm2835-rng.ko + AUTOLOAD:=$(call AutoLoad,11,bcm2835-rng) + DEPENDS:=@TARGET_brcm2708 +kmod-random-core +endef + +define KernelPackage/random-bcm2835/description + This package contains the Broadcom 2835 HW random number generator driver +endef + +$(eval $(call KernelPackage,random-bcm2835)) + + +define KernelPackage/smi-bcm2835 + SUBMENU:=$(OTHER_MENU) + TITLE:=BCM2835 SMI driver + KCONFIG:=CONFIG_BCM2835_SMI + FILES:=$(LINUX_DIR)/drivers/misc/bcm2835_smi.ko + AUTOLOAD:=$(call AutoLoad,20,bcm2835_smi) + DEPENDS:=@TARGET_brcm2708 +endef + +define KernelPackage/smi-bcm2835/description + This package contains the Character device driver for Broadcom Secondary + Memory Interface +endef + +$(eval $(call KernelPackage,smi-bcm2835)) + + +define KernelPackage/smi-bcm2835-dev + SUBMENU:=$(OTHER_MENU) + TITLE:=BCM2835 SMI device driver + KCONFIG:=CONFIG_BCM2835_SMI_DEV + FILES:=$(LINUX_DIR)/drivers/char/broadcom/bcm2835_smi_dev.ko + AUTOLOAD:=$(call AutoLoad,21,bcm2835_smi_dev) + DEPENDS:=@TARGET_brcm2708 +kmod-smi-bcm2835 +endef + +define KernelPackage/smi-bcm2835-dev/description + This driver provides a character device interface (ioctl + read/write) to + Broadcom's Secondary Memory interface. The low-level functionality is provided + by the SMI driver itself. +endef + +$(eval $(call KernelPackage,smi-bcm2835-dev)) diff --git a/target/linux/brcm2708/modules/sound.mk b/target/linux/brcm2708/modules/sound.mk new file mode 100644 index 000000000..9f0a72394 --- /dev/null +++ b/target/linux/brcm2708/modules/sound.mk @@ -0,0 +1,805 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define KernelPackage/sound-arm-bcm2835 + TITLE:=BCM2835 ALSA driver + KCONFIG:= \ + CONFIG_SND_ARM=y \ + CONFIG_SND_BCM2835 \ + CONFIG_SND_ARMAACI=n + FILES:= \ + $(LINUX_DIR)/drivers/staging/vc04_services/bcm2835-audio/snd-bcm2835.ko + AUTOLOAD:=$(call AutoLoad,68,snd-bcm2835) + DEPENDS:=@TARGET_brcm2708 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-arm-bcm2835/description + This package contains the BCM2835 ALSA pcm card driver +endef + +$(eval $(call KernelPackage,sound-arm-bcm2835)) + + +define KernelPackage/sound-soc-bcm2835-i2s + TITLE:=SoC Audio support for the Broadcom 2835 I2S module + KCONFIG:= \ + CONFIG_SND_BCM2835_SOC_I2S \ + CONFIG_SND_SOC_AD193X_SPI=n \ + CONFIG_SND_SOC_AD193X_I2C=n \ + CONFIG_SND_SOC_DMAENGINE_PCM=y \ + CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-bcm2835-i2s.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-bcm2835-i2s) + DEPENDS:=@TARGET_brcm2708 +kmod-sound-soc-core + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-bcm2835-i2s/description + This package contains support for codecs attached to the Broadcom 2835 I2S interface +endef + +$(eval $(call KernelPackage,sound-soc-bcm2835-i2s)) + + +define KernelPackage/sound-soc-rpi-simple-soundcard + TITLE:=Support for Raspberry Pi simple soundcards + KCONFIG:= \ + CONFIG_SND_RPI_SIMPLE_SOUNDCARD + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-simple-soundcard.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-rpi-simple-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-rpi-simple-soundcard/description + This package contains support for Raspbery Pi simple soundcards +endef + +$(eval $(call KernelPackage,sound-soc-rpi-simple-soundcard)) + + +define KernelPackage/sound-soc-rpi-wm8804-soundcard + TITLE:=Support for Raspberry Pi generic WM8804 soundcards + KCONFIG:= \ + CONFIG_SND_RPI_WM8804_SOUNDCARD + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-wm8804-soundcard.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-rpi-wm8804-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-rpi-wm8804-soundcard/description + This package contains support for Raspbery Pi simple soundcards +endef + +$(eval $(call KernelPackage,sound-soc-rpi-wm8804-soundcard)) + + +define KernelPackage/sound-soc-adau1977-adc + TITLE:=Support for ADAU1977 ADC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC \ + CONFIG_SND_SOC_ADAU1977 \ + CONFIG_SND_SOC_ADAU1977_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-adau1977.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-adau1977-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-adau1977 snd-soc-adau1977-i2c) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-adau1977-adc/description + This package contains support for ADAU1977 ADC +endef + +$(eval $(call KernelPackage,sound-soc-adau1977-adc)) + + +define KernelPackage/sound-soc-allo-boss-dac + TITLE:=Support for Allo Boss DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-boss-dac.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ + snd-soc-allo-boss-dac) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-allo-boss-dac/description + This package contains support for Allo Boss DAC +endef + +$(eval $(call KernelPackage,sound-soc-allo-boss-dac)) + + +define KernelPackage/sound-soc-allo-digione + TITLE:=Support for Allo Piano DigiOne + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE \ + CONFIG_SND_SOC_WM8804 \ + CONFIG_SND_SOC_WM8804_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804-i2c snd-soc-wm8804 \ + snd-soc-allo-digione) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-wm8804-soundcard \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-allo-digione/description + This package contains support for Allo DigiOne +endef + +$(eval $(call KernelPackage,sound-soc-allo-digione)) + + +define KernelPackage/sound-soc-allo-piano-dac + TITLE:=Support for Allo Piano DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-piano-dac.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ + snd-soc-allo-piano-dac) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-allo-piano-dac/description + This package contains support for Allo Piano DAC +endef + +$(eval $(call KernelPackage,sound-soc-allo-piano-dac)) + + +define KernelPackage/sound-soc-allo-piano-dac-plus + TITLE:=Support for Allo Piano DAC Plus + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-piano-dac-plus.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ + snd-soc-allo-piano-dac-plus) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-allo-piano-dac-plus/description + This package contains support for Allo Piano DAC Plus +endef + +$(eval $(call KernelPackage,sound-soc-allo-piano-dac-plus)) + + +define KernelPackage/sound-soc-audiosense-pi + TITLE:=Support for AudioSense Add-On Soundcard + KCONFIG:= \ + CONFIG_SND_AUDIOSENSE_PI \ + CONFIG_SND_SOC_TLV320AIC32X4 \ + CONFIG_SND_SOC_TLV320AIC32X4_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-audiosense-pi.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-tlv320aic32x4.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-tlv320aic32x4-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-tlv320aic32x4-i2c snd-soc-tlv320aic32x4 \ + snd-soc-audiosense-pi) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-audiosense-pi/description + This package contains support for AudioSense Add-On Soundcard +endef + +$(eval $(call KernelPackage,sound-soc-audiosense-pi)) + + +define KernelPackage/sound-soc-allo-katana-codec + TITLE:=Support for Allo Katana DAC + KCONFIG:= \ + CONFIG_SND_AUDIO_GRAPH_CARD \ + CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C \ + CONFIG_SND_SIMPLE_CARD_UTILS + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-allo-katana-codec.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x-i2c snd-soc-pcm512x \ + snd-soc-allo-katana-codec) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-allo-katana-codec/description + This package contains support for Allo Katana DAC +endef + +$(eval $(call KernelPackage,sound-soc-allo-katana-codec)) + + +define KernelPackage/sound-soc-audioinjector-octo-soundcard + TITLE:=Support for AudioInjector Octo soundcard + KCONFIG:= \ + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD \ + CONFIG_SND_SOC_CS42XX8 \ + CONFIG_SND_SOC_CS42XX8_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-audioinjector-octo-soundcard.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-cs42xx8.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-cs42xx8-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc- \ + snd-soc-audioinjector-octo-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-audioinjector-octo-soundcard/description + This package contains support for AudioInjector Octo soundcard +endef + +$(eval $(call KernelPackage,sound-soc-audioinjector-octo-soundcard)) + + +define KernelPackage/sound-soc-audioinjector-pi-soundcard + TITLE:=Support for AudioInjector Pi soundcard + KCONFIG:= \ + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD \ + CONFIG_SND_SOC_WM8731 + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-audioinjector-pi-soundcard.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8731.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8731 \ + snd-soc-audioinjector-pi-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c \ + +kmod-regmap-spi + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-audioinjector-pi-soundcard/description + This package contains support for AudioInjector Pi soundcard +endef + +$(eval $(call KernelPackage,sound-soc-audioinjector-pi-soundcard)) + + +define KernelPackage/sound-soc-digidac1-soundcard + TITLE:=Support for RRA DigiDAC1 + KCONFIG:= \ + CONFIG_SND_DIGIDAC1_SOUNDCARD \ + CONFIG_SND_SOC_WM8741 \ + CONFIG_SND_SOC_WM8804 \ + CONFIG_SND_SOC_WM8804_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-digidac1-soundcard.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8741.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8741 \ + snd-soc-wm8804 snd-soc-wm8804-i2c \ + snd-soc-digidac1-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c \ + +kmod-regmap-spi + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-digidac1-soundcard/description + This package contains support for RRA DigiDAC1 +endef + +$(eval $(call KernelPackage,sound-soc-digidac1-soundcard)) + + +define KernelPackage/sound-soc-dionaudio-loco + TITLE:=Support for Dion Audio LOCO DAC-AMP + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO \ + CONFIG_SND_SOC_PCM5102A + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-dionaudio-loco.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a \ + snd-soc-dionaudio-loco) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-dionaudio-loco/description + This package contains support for Dion Audio LOCO DAC-AMP +endef + +$(eval $(call KernelPackage,sound-soc-dionaudio-loco)) + + +define KernelPackage/sound-soc-dionaudio-loco-v2 + TITLE:=Support for Dion Audio LOCO-V2 DAC-AMP + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2 \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-dionaudio-loco.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-pcm512x-i2c \ + snd-soc-dionaudio-loco) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-dionaudio-loco-v2/description + This package contains support for Dion Audio LOCO-V2 DAC-AMP +endef + +$(eval $(call KernelPackage,sound-soc-dionaudio-loco-v2)) + + +define KernelPackage/sound-soc-fe-pi + TITLE:=Support for Fe-Pi Audio Sound Card + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO \ + CONFIG_SND_SOC_SGTL5000 + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-fe-pi-audio.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-sgtl5000.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-sgtl5000 \ + snd-soc-fe-pi-audio) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-fe-pi/description + This package contains support for Fe-Pi Audio Sound Card +endef + +$(eval $(call KernelPackage,sound-soc-fe-pi)) + + +define KernelPackage/sound-soc-googlevoicehat + TITLE:=Support for Google VoiceHAT Sound Card + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD \ + CONFIG_SND_SOC_VOICEHAT + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-googlevoicehat-codec.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-googlevoicehat-codec) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-googlevoicehat/description + This package contains support for Google VoiceHAT Sound Card +endef + +$(eval $(call KernelPackage,sound-soc-googlevoicehat)) + + +define KernelPackage/sound-soc-hifiberry-dac + TITLE:=Support for HifiBerry DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC \ + CONFIG_SND_SOC_PCM5102A + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-hifiberry-dac/description + This package contains support for HifiBerry DAC +endef + +$(eval $(call KernelPackage,sound-soc-hifiberry-dac)) + + +define KernelPackage/sound-soc-hifiberry-dacplus + TITLE:=Support for HifiBerry DAC+ / DAC+ Pro + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS \ + CONFIG_SND_SOC_PCM512x + FILES:= \ + $(LINUX_DIR)/drivers/clk/clk-hifiberry-dacpro.ko \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-dacplus.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko + AUTOLOAD:=$(call AutoLoad,68,clk-hifiberry-dacpro snd-soc-pcm512x \ + snd-soc-hifiberry-dacplus) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-hifiberry-dacplus/description + This package contains support for HifiBerry DAC+ / DAC+ Pro +endef + +$(eval $(call KernelPackage,sound-soc-hifiberry-dacplus)) + + +define KernelPackage/sound-soc-hifiberry-dacplusadc + TITLE:=Support for HifiBerry DAC+ADC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_DMIC + FILES:= \ + $(LINUX_DIR)/drivers/clk/clk-hifiberry-dacpro.ko \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-hifiberry-dacplusadc.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-dmic.ko + AUTOLOAD:=$(call AutoLoad,68,clk-hifiberry-dacpro snd-soc-pcm512x \ + snd-soc-dmic snd-soc-hifiberry-dacplusadc) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-hifiberry-dacplusadc/description + This package contains support for HifiBerry DAC+ADC +endef + +$(eval $(call KernelPackage,sound-soc-hifiberry-dacplusadc)) + + +define KernelPackage/sound-soc-hifiberry-digi + TITLE:=Support for HifiBerry Digi / Digi+ / Digi+ Pro + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI \ + CONFIG_SND_SOC_WM8804 + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-wm8804-soundcard \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-hifiberry-digi/description + This package contains support for HifiBerry Digi +endef + +$(eval $(call KernelPackage,sound-soc-hifiberry-digi)) + + +define KernelPackage/sound-soc-hifiberry-amp + TITLE:=Support for HifiBerry Amp + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP \ + CONFIG_SND_SOC_TAS5713 + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-tas5713.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-tas5713) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-hifiberry-amp/description + This package contains support for HifiBerry Amp +endef + +$(eval $(call KernelPackage,sound-soc-hifiberry-amp)) + + +define KernelPackage/sound-soc-iqaudio-codec + TITLE:=Support for IQaudIO-CODEC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC \ + CONFIG_SND_SOC_DA7213 + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-iqaudio-codec.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-da7213.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-da7213 snd-soc-iqaudio-codec) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-iqaudio-codec/description + This package contains support for IQaudIO-CODEC +endef + +$(eval $(call KernelPackage,sound-soc-iqaudio-codec)) + + +define KernelPackage/sound-soc-iqaudio-dac + TITLE:=Support for IQaudIO-DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC \ + CONFIG_SND_SOC_PCM512x \ + CONFIG_SND_SOC_PCM512x_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-iqaudio-dac.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-pcm512x-i2c \ + snd-soc-iqaudio-dac) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-iqaudio-dac/description + This package contains support for IQaudIO-DAC +endef + +$(eval $(call KernelPackage,sound-soc-iqaudio-dac)) + + +define KernelPackage/sound-soc-iqaudio-digi + TITLE:=Support for IQaudIO-DIGI + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI \ + CONFIG_SND_SOC_WM8804 \ + CONFIG_SND_SOC_WM8804_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804-i2c.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804 snd-soc-wm8804-i2c) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-wm8804-soundcard \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-iqaudio-digi/description + This package contains support for IQaudIO-DIGI +endef + +$(eval $(call KernelPackage,sound-soc-iqaudio-digi)) + + +define KernelPackage/sound-soc-i-sabe-q2m + TITLE:=Support for Audiophonics I-Sabre Q2M DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M \ + CONFIG_SND_SOC_I_SABRE_CODEC + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-i-sabre-q2m.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-i-sabre-codec.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-i-sabre-codec snd-soc-i-sabre-q2m) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-i-sabe-q2m/description + This package contains support for Audiophonics I-SABRE Q2M DAC +endef + +$(eval $(call KernelPackage,sound-soc-i-sabe-q2m)) + + +define KernelPackage/sound-soc-justboom-dac + TITLE:=Support for JustBoom DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC \ + CONFIG_SND_SOC_PCM512x + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-justboom-dac.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm512x.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm512x snd-soc-justboom-dac) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-justboom-dac/description + This package contains support for JustBoom DAC +endef + +$(eval $(call KernelPackage,sound-soc-justboom-dac)) + + +define KernelPackage/sound-soc-justboom-digi + TITLE:=Support for JustBoom Digi + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI \ + CONFIG_SND_SOC_WM8804 + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8804) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-wm8804-soundcard \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-justboom-digi/description + This package contains support for JustBoom Digi +endef + +$(eval $(call KernelPackage,sound-soc-justboom-digi)) + + +define KernelPackage/sound-soc-pisound + TITLE:=Support for Blokas Labs PiSound + KCONFIG:= \ + CONFIG_SND_PISOUND \ + CONFIG_SND_SOC_PCM5102A + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-pisound.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm5102a.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm5102a snd-soc-pisound) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-pisound/description + This package contains support for Blokas Labs PiSound +endef + +$(eval $(call KernelPackage,sound-soc-pisound)) + + +define KernelPackage/sound-soc-rpi-cirrus + TITLE:=Support for Cirrus Logic Audio Card + KCONFIG:= \ + CONFIG_GPIO_ARIZONA \ + CONFIG_INPUT_ARIZONA_HAPTICS=n \ + CONFIG_MFD_ARIZONA=y \ + CONFIG_MFD_ARIZONA_I2C \ + CONFIG_MFD_CS47L24=n \ + CONFIG_MFD_WM5102=n \ + CONFIG_MFD_WM5110=n \ + CONFIG_MFD_WM8997=n \ + CONFIG_MFD_WM8998=n \ + CONFIG_REGULATOR_ARIZONA \ + CONFIG_REGULATOR_ARIZONA_LDO1 \ + CONFIG_REGULATOR_ARIZONA_MICSUPP \ + CONFIG_SND_BCM2708_SOC_RPI_CIRRUS \ + CONFIG_SND_SOC_ARIZONA \ + CONFIG_SND_SOC_WM5102 \ + CONFIG_SND_SOC_WM8804 \ + CONFIG_SND_SOC_WM_ADSP + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-cirrus.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-arizona.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm-adsp.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm5102.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8804.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm1794a snd-soc-rpi-cirrus) + DEPENDS:= \ + +kmod-i2c-bcm2835 \ + kmod-sound-soc-bcm2835-i2s + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-rpi-cirrus/description + This package contains support for RPi-Cirrus +endef + +$(eval $(call KernelPackage,sound-soc-rpi-cirrus)) + + +define KernelPackage/sound-soc-rpi-dac + TITLE:=Support for RPi-DAC + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_RPI_DAC \ + CONFIG_SND_SOC_PCM1794A + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-pcm1794a.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-pcm1794a) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard \ + +kmod-i2c-bcm2835 + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-rpi-dac/description + This package contains support for RPi-DAC +endef + +$(eval $(call KernelPackage,sound-soc-rpi-dac)) + + +define KernelPackage/sound-soc-rpi-proto + TITLE:=Support for RPi-PROTO + KCONFIG:= \ + CONFIG_SND_BCM2708_SOC_RPI_PROTO \ + CONFIG_SND_SOC_WM8731 + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-rpi-proto.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8731.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-wm8731 snd-soc-rpi-proto) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c \ + +kmod-regmap-spi + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-rpi-proto/description + This package contains support for RPi-PROTO +endef + +$(eval $(call KernelPackage,sound-soc-rpi-proto)) diff --git a/target/linux/brcm2708/modules/spi.mk b/target/linux/brcm2708/modules/spi.mk new file mode 100644 index 000000000..eaddbadf6 --- /dev/null +++ b/target/linux/brcm2708/modules/spi.mk @@ -0,0 +1,43 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define KernelPackage/spi-bcm2835 + SUBMENU:=$(SPI_MENU) + TITLE:=BCM2835 SPI controller driver + KCONFIG:=\ + CONFIG_SPI=y \ + CONFIG_SPI_BCM2835 \ + CONFIG_SPI_MASTER=y + FILES:=$(LINUX_DIR)/drivers/spi/spi-bcm2835.ko + AUTOLOAD:=$(call AutoLoad,89,spi-bcm2835) + DEPENDS:=@TARGET_brcm2708 +endef + +define KernelPackage/spi-bcm2835/description + This package contains the Broadcom 2835 SPI master controller driver +endef + +$(eval $(call KernelPackage,spi-bcm2835)) + + +define KernelPackage/spi-bcm2835-aux + SUBMENU:=$(SPI_MENU) + TITLE:=BCM2835 Aux SPI controller driver + KCONFIG:=\ + CONFIG_SPI=y \ + CONFIG_SPI_BCM2835AUX \ + CONFIG_SPI_MASTER=y + FILES:=$(LINUX_DIR)/drivers/spi/spi-bcm2835aux.ko + AUTOLOAD:=$(call AutoLoad,89,spi-bcm2835aux) + DEPENDS:=@TARGET_brcm2708 +endef + +define KernelPackage/spi-bcm2835-aux/description + This package contains the Broadcom 2835 Aux SPI master controller driver +endef + +$(eval $(call KernelPackage,spi-bcm2835-aux)) diff --git a/target/linux/brcm2708/modules/video.mk b/target/linux/brcm2708/modules/video.mk new file mode 100644 index 000000000..7f5b05060 --- /dev/null +++ b/target/linux/brcm2708/modules/video.mk @@ -0,0 +1,85 @@ +# +# Copyright (C) 2019 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define KernelPackage/camera-bcm2835 + TITLE:=BCM2835 Camera + KCONFIG:= \ + CONFIG_VIDEO_BCM2835 \ + CONFIG_VIDEO_BCM2835_MMAL + FILES:= \ + $(LINUX_DIR)/drivers/staging/vc04_services/bcm2835-camera/bcm2835-v4l2.ko + AUTOLOAD:=$(call AutoLoad,65,bcm2835-v4l2) + $(call AddDepends/video,@TARGET_brcm2708 +kmod-vchiq-mmal-bcm2835 +kmod-video-videobuf2) +endef + +define KernelPackage/camera-bcm2835/description + Camera host interface devices for Broadcom BCM2835 SoC. + This operates over the VCHIQ interface to a service running on VideoCore. +endef + +$(eval $(call KernelPackage,camera-bcm2835)) + + +define KernelPackage/drm-vc4 + SUBMENU:=$(VIDEO_MENU) + TITLE:=Broadcom VC4 Graphics + DEPENDS:= \ + @TARGET_brcm2708 +kmod-drm \ + +kmod-sound-core \ + +kmod-sound-soc-core + KCONFIG:= \ + CONFIG_DRM_VC4 \ + CONFIG_DRM_VC4_HDMI_CEC=n \ + CONFIG_DRM_V3D=n \ + CONFIG_DRM_TVE200=n + FILES:= \ + $(LINUX_DIR)/drivers/gpu/drm/vc4/vc4.ko \ + $(LINUX_DIR)/drivers/gpu/drm/drm_kms_helper.ko + AUTOLOAD:=$(call AutoProbe,vc4) +endef + +define KernelPackage/drm-vc4/description + Direct Rendering Manager (DRM) support for Broadcom VideoCore IV GPU + used in BCM2835, BCM2836 and BCM2837 SoCs (e.g. Raspberry Pi). +endef + +$(eval $(call KernelPackage,drm-vc4)) + + +define KernelPackage/vc-sm-cma + TITLE:=VideoCore Shared Memory (CMA) driver + KCONFIG:= \ + CONFIG_BCM_VC_SM_CMA + FILES:= \ + $(LINUX_DIR)/drivers/staging/vc04_services/vc-sm-cma/vc-sm-cma.ko + $(call AddDepends/video,@TARGET_brcm2708) +endef + +define KernelPackage/vc-sm-cma/description + Shared memory interface that supports sharing dmabufs with VideoCore. + This operates over the VCHIQ interface to a service running on VideoCore. +endef + +$(eval $(call KernelPackage,vc-sm-cma)) + + +define KernelPackage/vchiq-mmal-bcm2835 + TITLE:=BCM2835 MMAL VCHIQ service + KCONFIG:= \ + CONFIG_BCM2835_VCHIQ_MMAL \ + CONFIG_VIDEO_CODEC_BCM2835=n + FILES:= \ + $(LINUX_DIR)/drivers/staging/vc04_services/vchiq-mmal/bcm2835-mmal-vchiq.ko + $(call AddDepends/video,@TARGET_brcm2708 +kmod-vc-sm-cma) +endef + +define KernelPackage/vchiq-mmal-bcm2835/description + Enables the MMAL API over VCHIQ as used for the + majority of the multimedia services on VideoCore. +endef + +$(eval $(call KernelPackage,vchiq-mmal-bcm2835)) diff --git a/target/linux/brcm2708/patches-4.19/950-0001-arm-partially-revert-702b94bff3c50542a6e4ab9a4f4cef0.patch b/target/linux/brcm2708/patches-4.19/950-0001-arm-partially-revert-702b94bff3c50542a6e4ab9a4f4cef0.patch new file mode 100644 index 000000000..1f0645051 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0001-arm-partially-revert-702b94bff3c50542a6e4ab9a4f4cef0.patch @@ -0,0 +1,99 @@ +From d76972193fe88bb13028ba8277736a6aec4b8c8a Mon Sep 17 00:00:00 2001 +From: Dan Pasanen +Date: Thu, 21 Sep 2017 09:55:42 -0500 +Subject: [PATCH 001/703] arm: partially revert + 702b94bff3c50542a6e4ab9a4f4cef093262fe65 + +* Re-expose some dmi APIs for use in VCSM +--- + arch/arm/include/asm/cacheflush.h | 21 +++++++++++++++++++++ + arch/arm/include/asm/glue-cache.h | 2 ++ + arch/arm/mm/proc-macros.S | 2 ++ + arch/arm/mm/proc-syms.c | 3 +++ + 4 files changed, 28 insertions(+) + +--- a/arch/arm/include/asm/cacheflush.h ++++ b/arch/arm/include/asm/cacheflush.h +@@ -94,6 +94,21 @@ + * DMA Cache Coherency + * =================== + * ++ * dma_inv_range(start, end) ++ * ++ * Invalidate (discard) the specified virtual address range. ++ * May not write back any entries. If 'start' or 'end' ++ * are not cache line aligned, those lines must be written ++ * back. ++ * - start - virtual start address ++ * - end - virtual end address ++ * ++ * dma_clean_range(start, end) ++ * ++ * Clean (write back) the specified virtual address range. ++ * - start - virtual start address ++ * - end - virtual end address ++ * + * dma_flush_range(start, end) + * + * Clean and invalidate the specified virtual address range. +@@ -115,6 +130,8 @@ struct cpu_cache_fns { + void (*dma_map_area)(const void *, size_t, int); + void (*dma_unmap_area)(const void *, size_t, int); + ++ void (*dma_inv_range)(const void *, const void *); ++ void (*dma_clean_range)(const void *, const void *); + void (*dma_flush_range)(const void *, const void *); + } __no_randomize_layout; + +@@ -140,6 +157,8 @@ extern struct cpu_cache_fns cpu_cache; + * is visible to DMA, or data written by DMA to system memory is + * visible to the CPU. + */ ++#define dmac_inv_range cpu_cache.dma_inv_range ++#define dmac_clean_range cpu_cache.dma_clean_range + #define dmac_flush_range cpu_cache.dma_flush_range + + #else +@@ -159,6 +178,8 @@ extern void __cpuc_flush_dcache_area(voi + * is visible to DMA, or data written by DMA to system memory is + * visible to the CPU. + */ ++extern void dmac_inv_range(const void *, const void *); ++extern void dmac_clean_range(const void *, const void *); + extern void dmac_flush_range(const void *, const void *); + + #endif +--- a/arch/arm/include/asm/glue-cache.h ++++ b/arch/arm/include/asm/glue-cache.h +@@ -158,6 +158,8 @@ static inline void nop_dma_unmap_area(co + #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) + #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) + ++#define dmac_inv_range __glue(_CACHE,_dma_inv_range) ++#define dmac_clean_range __glue(_CACHE,_dma_clean_range) + #define dmac_flush_range __glue(_CACHE,_dma_flush_range) + #endif + +--- a/arch/arm/mm/proc-macros.S ++++ b/arch/arm/mm/proc-macros.S +@@ -335,6 +335,8 @@ ENTRY(\name\()_cache_fns) + .long \name\()_flush_kern_dcache_area + .long \name\()_dma_map_area + .long \name\()_dma_unmap_area ++ .long \name\()_dma_inv_range ++ .long \name\()_dma_clean_range + .long \name\()_dma_flush_range + .size \name\()_cache_fns, . - \name\()_cache_fns + .endm +--- a/arch/arm/mm/proc-syms.c ++++ b/arch/arm/mm/proc-syms.c +@@ -30,6 +30,9 @@ EXPORT_SYMBOL(__cpuc_flush_user_all); + EXPORT_SYMBOL(__cpuc_flush_user_range); + EXPORT_SYMBOL(__cpuc_coherent_kern_range); + EXPORT_SYMBOL(__cpuc_flush_dcache_area); ++EXPORT_SYMBOL(dmac_inv_range); ++EXPORT_SYMBOL(dmac_clean_range); ++EXPORT_SYMBOL(dmac_flush_range); + #else + EXPORT_SYMBOL(cpu_cache); + #endif diff --git a/target/linux/brcm2708/patches-4.9/950-0001-smsx95xx-fix-crimes-against-truesize.patch b/target/linux/brcm2708/patches-4.19/950-0002-smsx95xx-fix-crimes-against-truesize.patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0001-smsx95xx-fix-crimes-against-truesize.patch rename to target/linux/brcm2708/patches-4.19/950-0002-smsx95xx-fix-crimes-against-truesize.patch index b0de3f211..80071355a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0001-smsx95xx-fix-crimes-against-truesize.patch +++ b/target/linux/brcm2708/patches-4.19/950-0002-smsx95xx-fix-crimes-against-truesize.patch @@ -1,7 +1,7 @@ -From c01a3230d8cdd396dcec2619646f6cf2753481d8 Mon Sep 17 00:00:00 2001 +From 8f4948a1503a76cbeb5823d8b17990bf3a3c57a6 Mon Sep 17 00:00:00 2001 From: Steve Glendinning Date: Thu, 19 Feb 2015 18:47:12 +0000 -Subject: [PATCH] smsx95xx: fix crimes against truesize +Subject: [PATCH 002/703] smsx95xx: fix crimes against truesize smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings. @@ -25,7 +25,7 @@ Signed-off-by: Steve Glendinning static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data, int in_pm) { -@@ -1961,7 +1965,8 @@ static int smsc95xx_rx_fixup(struct usbn +@@ -1972,7 +1976,8 @@ static int smsc95xx_rx_fixup(struct usbn if (dev->net->features & NETIF_F_RXCSUM) smsc95xx_rx_csum_offload(skb); skb_trim(skb, skb->len - 4); /* remove fcs */ @@ -35,7 +35,7 @@ Signed-off-by: Steve Glendinning return 1; } -@@ -1979,7 +1984,8 @@ static int smsc95xx_rx_fixup(struct usbn +@@ -1990,7 +1995,8 @@ static int smsc95xx_rx_fixup(struct usbn if (dev->net->features & NETIF_F_RXCSUM) smsc95xx_rx_csum_offload(ax_skb); skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ diff --git a/target/linux/brcm2708/patches-4.9/950-0002-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch b/target/linux/brcm2708/patches-4.19/950-0003-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch similarity index 90% rename from target/linux/brcm2708/patches-4.9/950-0002-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch rename to target/linux/brcm2708/patches-4.19/950-0003-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch index 763b5c737..a4ef606a1 100644 --- a/target/linux/brcm2708/patches-4.9/950-0002-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch +++ b/target/linux/brcm2708/patches-4.19/950-0003-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch @@ -1,8 +1,8 @@ -From 8272cd893c3bca2f047dcf06ae11d9ada6d26f33 Mon Sep 17 00:00:00 2001 +From 623b0f5e0a439af4beef58317b224d4d3d2a969c Mon Sep 17 00:00:00 2001 From: Sam Nazarko Date: Fri, 1 Apr 2016 17:27:21 +0100 -Subject: [PATCH] smsc95xx: Experimental: Enable turbo_mode and packetsize=2560 - by default +Subject: [PATCH 003/703] smsc95xx: Experimental: Enable turbo_mode and + packetsize=2560 by default See: http://forum.kodi.tv/showthread.php?tid=285288 --- diff --git a/target/linux/brcm2708/patches-4.9/950-0003-Allow-mac-address-to-be-set-in-smsc95xx.patch b/target/linux/brcm2708/patches-4.19/950-0004-Allow-mac-address-to-be-set-in-smsc95xx.patch similarity index 95% rename from target/linux/brcm2708/patches-4.9/950-0003-Allow-mac-address-to-be-set-in-smsc95xx.patch rename to target/linux/brcm2708/patches-4.19/950-0004-Allow-mac-address-to-be-set-in-smsc95xx.patch index fdf5fc86d..70d4a57d9 100644 --- a/target/linux/brcm2708/patches-4.9/950-0003-Allow-mac-address-to-be-set-in-smsc95xx.patch +++ b/target/linux/brcm2708/patches-4.19/950-0004-Allow-mac-address-to-be-set-in-smsc95xx.patch @@ -1,11 +1,11 @@ -From 2e70eba32ed21b1a909b9ae6a06b3384a33fc5a4 Mon Sep 17 00:00:00 2001 +From 80592905099a4f0fa5d166d58785eacef968ba4e Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 26 Mar 2013 17:26:38 +0000 -Subject: [PATCH] Allow mac address to be set in smsc95xx +Subject: [PATCH 004/703] Allow mac address to be set in smsc95xx Signed-off-by: popcornmix --- - drivers/net/usb/smsc95xx.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++ + drivers/net/usb/smsc95xx.c | 56 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) --- a/drivers/net/usb/smsc95xx.c diff --git a/target/linux/brcm2708/patches-4.9/950-0004-Protect-__release_resource-against-resources-without.patch b/target/linux/brcm2708/patches-4.19/950-0005-Protect-__release_resource-against-resources-without.patch similarity index 71% rename from target/linux/brcm2708/patches-4.9/950-0004-Protect-__release_resource-against-resources-without.patch rename to target/linux/brcm2708/patches-4.19/950-0005-Protect-__release_resource-against-resources-without.patch index 4b80ab0be..bf30cd913 100644 --- a/target/linux/brcm2708/patches-4.9/950-0004-Protect-__release_resource-against-resources-without.patch +++ b/target/linux/brcm2708/patches-4.19/950-0005-Protect-__release_resource-against-resources-without.patch @@ -1,7 +1,8 @@ -From 3115fe312a2c751954f1ab0f0ba07aea1c1c7d1b Mon Sep 17 00:00:00 2001 +From b5e65f6a5a75c72d56d98c9543ff549710aa2d72 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 13 Mar 2015 12:43:36 +0000 -Subject: [PATCH] Protect __release_resource against resources without parents +Subject: [PATCH 005/703] Protect __release_resource against resources without + parents Without this patch, removing a device tree overlay can crash here. @@ -12,7 +13,7 @@ Signed-off-by: Phil Elwell --- a/kernel/resource.c +++ b/kernel/resource.c -@@ -246,6 +246,12 @@ static int __release_resource(struct res +@@ -213,6 +213,12 @@ static int __release_resource(struct res { struct resource *tmp, **p, *chd; diff --git a/target/linux/brcm2708/patches-4.9/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch b/target/linux/brcm2708/patches-4.19/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch similarity index 76% rename from target/linux/brcm2708/patches-4.9/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch rename to target/linux/brcm2708/patches-4.19/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch index 5f5bd8360..3237b2a81 100644 --- a/target/linux/brcm2708/patches-4.9/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch +++ b/target/linux/brcm2708/patches-4.19/950-0006-irq-bcm2836-Prevent-spurious-interrupts-and-trap-the.patch @@ -1,7 +1,8 @@ -From 0badcb291f4fb5c3477c37b4ad4a0e27dd863272 Mon Sep 17 00:00:00 2001 +From da00086d33452442af1009580f8e40164fc4e97f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 4 Dec 2015 17:41:50 +0000 -Subject: [PATCH] irq-bcm2836: Prevent spurious interrupts, and trap them early +Subject: [PATCH 006/703] irq-bcm2836: Prevent spurious interrupts, and trap + them early The old arch-specific IRQ macros included a dsb to ensure the write to clear the mailbox interrupt completed before returning @@ -16,7 +17,7 @@ though, so trap them early. --- a/drivers/irqchip/irq-bcm2836.c +++ b/drivers/irqchip/irq-bcm2836.c -@@ -175,6 +175,7 @@ __exception_irq_entry bcm2836_arm_irqchi +@@ -144,6 +144,7 @@ __exception_irq_entry bcm2836_arm_irqchi u32 ipi = ffs(mbox_val) - 1; writel(1 << ipi, mailbox0); diff --git a/target/linux/brcm2708/patches-4.9/950-0146-irq-bcm2836-Avoid-Invalid-trigger-warning.patch b/target/linux/brcm2708/patches-4.19/950-0007-irq-bcm2836-Avoid-Invalid-trigger-warning.patch similarity index 63% rename from target/linux/brcm2708/patches-4.9/950-0146-irq-bcm2836-Avoid-Invalid-trigger-warning.patch rename to target/linux/brcm2708/patches-4.19/950-0007-irq-bcm2836-Avoid-Invalid-trigger-warning.patch index db9fd39d4..54f445234 100644 --- a/target/linux/brcm2708/patches-4.9/950-0146-irq-bcm2836-Avoid-Invalid-trigger-warning.patch +++ b/target/linux/brcm2708/patches-4.19/950-0007-irq-bcm2836-Avoid-Invalid-trigger-warning.patch @@ -1,7 +1,7 @@ -From 4a849cef15885cf5dd901fafe45d3fa51b2b2a09 Mon Sep 17 00:00:00 2001 +From 23f28161eadbc84b976b1a6ff4c8e4fdfa38aa93 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 9 Feb 2017 14:33:30 +0000 -Subject: [PATCH] irq-bcm2836: Avoid "Invalid trigger warning" +Subject: [PATCH 007/703] irq-bcm2836: Avoid "Invalid trigger warning" Initialise the level for each IRQ to avoid a warning from the arm arch timer code. @@ -13,12 +13,12 @@ Signed-off-by: Phil Elwell --- a/drivers/irqchip/irq-bcm2836.c +++ b/drivers/irqchip/irq-bcm2836.c -@@ -178,7 +178,7 @@ static void bcm2836_arm_irqchip_register - +@@ -124,7 +124,7 @@ static int bcm2836_map(struct irq_domain irq_set_percpu_devid(irq); - irq_set_chip_and_handler(irq, chip, handle_percpu_devid_irq); + irq_domain_set_info(d, irq, hw, chip, d->host_data, + handle_percpu_devid_irq, NULL, NULL); - irq_set_status_flags(irq, IRQ_NOAUTOEN); + irq_set_status_flags(irq, IRQ_NOAUTOEN | IRQ_TYPE_LEVEL_LOW); - } - static void + return 0; + } diff --git a/target/linux/brcm2708/patches-4.9/950-0007-irqchip-bcm2835-Add-FIQ-support.patch b/target/linux/brcm2708/patches-4.19/950-0008-irqchip-bcm2835-Add-FIQ-support.patch similarity index 88% rename from target/linux/brcm2708/patches-4.9/950-0007-irqchip-bcm2835-Add-FIQ-support.patch rename to target/linux/brcm2708/patches-4.19/950-0008-irqchip-bcm2835-Add-FIQ-support.patch index 56be640fd..77a918153 100644 --- a/target/linux/brcm2708/patches-4.9/950-0007-irqchip-bcm2835-Add-FIQ-support.patch +++ b/target/linux/brcm2708/patches-4.19/950-0008-irqchip-bcm2835-Add-FIQ-support.patch @@ -1,7 +1,7 @@ -From 697bdb968798a2bb37c767582ba54fc6486c5de8 Mon Sep 17 00:00:00 2001 +From 06cc1d14e061ef7169947f09f1e356cec9e0a790 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 12 Jun 2015 19:01:05 +0200 -Subject: [PATCH] irqchip: bcm2835: Add FIQ support +Subject: [PATCH 008/703] irqchip: bcm2835: Add FIQ support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -15,14 +15,14 @@ Reviewed-by: Eric Anholt Acked-by: Stephen Warren --- arch/arm/mach-bcm/Kconfig | 1 + - drivers/irqchip/irq-bcm2835.c | 51 ++++++++++++++++++++++++++++++++++++++----- + drivers/irqchip/irq-bcm2835.c | 51 +++++++++++++++++++++++++++++++---- 2 files changed, 47 insertions(+), 5 deletions(-) --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig -@@ -152,6 +152,7 @@ config ARCH_BCM2835 +@@ -165,6 +165,7 @@ config ARCH_BCM2835 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 - select CLKSRC_OF + select TIMER_OF select BCM2835_TIMER + select FIQ select PINCTRL @@ -94,9 +94,9 @@ Acked-by: Stephen Warren } static struct irq_chip armctrl_chip = { -@@ -150,8 +178,9 @@ static int __init armctrl_of_init(struct - panic("%s: unable to map IC registers\n", - node->full_name); +@@ -149,8 +177,9 @@ static int __init armctrl_of_init(struct + if (!base) + panic("%pOF: unable to map IC registers\n", node); - intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0), - &armctrl_ops, NULL); @@ -104,9 +104,9 @@ Acked-by: Stephen Warren + intc.domain = irq_domain_add_linear(node, NUMBER_IRQS * 2, + &armctrl_ops, NULL); if (!intc.domain) - panic("%s: unable to create IRQ domain\n", node->full_name); + panic("%pOF: unable to create IRQ domain\n", node); -@@ -181,6 +210,18 @@ static int __init armctrl_of_init(struct +@@ -180,6 +209,18 @@ static int __init armctrl_of_init(struct set_handle_irq(bcm2835_handle_irq); } diff --git a/target/linux/brcm2708/patches-4.9/950-0008-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch b/target/linux/brcm2708/patches-4.19/950-0009-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch similarity index 92% rename from target/linux/brcm2708/patches-4.9/950-0008-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch rename to target/linux/brcm2708/patches-4.19/950-0009-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch index 9c7515f4e..1efa0b4d9 100644 --- a/target/linux/brcm2708/patches-4.9/950-0008-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch +++ b/target/linux/brcm2708/patches-4.19/950-0009-irqchip-irq-bcm2835-Add-2836-FIQ-support.patch @@ -1,14 +1,14 @@ -From 78b53021ae0715792fb6a89bd9e7c02fc254be5c Mon Sep 17 00:00:00 2001 +From 9c8894afe627b270aad44c64f4e70c659468d7ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 23 Oct 2015 16:26:55 +0200 -Subject: [PATCH] irqchip: irq-bcm2835: Add 2836 FIQ support +Subject: [PATCH 009/703] irqchip: irq-bcm2835: Add 2836 FIQ support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Noralf Trønnes --- - drivers/irqchip/irq-bcm2835.c | 43 +++++++++++++++++++++++++++++++++++++++++-- + drivers/irqchip/irq-bcm2835.c | 43 +++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-) --- a/drivers/irqchip/irq-bcm2835.c @@ -81,7 +81,7 @@ Signed-off-by: Noralf Trønnes } static struct irq_chip armctrl_chip = { -@@ -210,6 +240,15 @@ static int __init armctrl_of_init(struct +@@ -209,6 +239,15 @@ static int __init armctrl_of_init(struct set_handle_irq(bcm2835_handle_irq); } diff --git a/target/linux/brcm2708/patches-4.9/950-0009-spidev-Add-spidev-compatible-string-to-silence-warni.patch b/target/linux/brcm2708/patches-4.19/950-0010-spidev-Add-spidev-compatible-string-to-silence-warni.patch similarity index 57% rename from target/linux/brcm2708/patches-4.9/950-0009-spidev-Add-spidev-compatible-string-to-silence-warni.patch rename to target/linux/brcm2708/patches-4.19/950-0010-spidev-Add-spidev-compatible-string-to-silence-warni.patch index 0c5f0eef1..f0f6c1b9c 100644 --- a/target/linux/brcm2708/patches-4.9/950-0009-spidev-Add-spidev-compatible-string-to-silence-warni.patch +++ b/target/linux/brcm2708/patches-4.19/950-0010-spidev-Add-spidev-compatible-string-to-silence-warni.patch @@ -1,7 +1,8 @@ -From 21a313f8517a1be2b0962710ffe9ad94e7334ba1 Mon Sep 17 00:00:00 2001 +From 97e88641862862585d6ae8aaae034946ceab8ceb Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 14 Jul 2015 10:26:09 +0100 -Subject: [PATCH] spidev: Add "spidev" compatible string to silence warning +Subject: [PATCH 010/703] spidev: Add "spidev" compatible string to silence + warning See: https://github.com/raspberrypi/linux/issues/1054 --- @@ -10,9 +11,9 @@ See: https://github.com/raspberrypi/linux/issues/1054 --- a/drivers/spi/spidev.c +++ b/drivers/spi/spidev.c -@@ -697,6 +697,7 @@ static const struct of_device_id spidev_ - { .compatible = "rohm,dh2228fv" }, - { .compatible = "lineartechnology,ltc2488" }, +@@ -670,6 +670,7 @@ static const struct of_device_id spidev_ + { .compatible = "ge,achc" }, + { .compatible = "semtech,sx1301" }, { .compatible = "siliconlabs,si3210" }, + { .compatible = "spidev" }, {}, diff --git a/target/linux/brcm2708/patches-4.9/950-0015-spi-bcm2835-Support-pin-groups-other-than-7-11.patch b/target/linux/brcm2708/patches-4.19/950-0011-spi-bcm2835-Support-pin-groups-other-than-7-11.patch similarity index 94% rename from target/linux/brcm2708/patches-4.9/950-0015-spi-bcm2835-Support-pin-groups-other-than-7-11.patch rename to target/linux/brcm2708/patches-4.19/950-0011-spi-bcm2835-Support-pin-groups-other-than-7-11.patch index c4cda8090..3955fb0cf 100644 --- a/target/linux/brcm2708/patches-4.9/950-0015-spi-bcm2835-Support-pin-groups-other-than-7-11.patch +++ b/target/linux/brcm2708/patches-4.19/950-0011-spi-bcm2835-Support-pin-groups-other-than-7-11.patch @@ -1,7 +1,7 @@ -From 6603973d0897c1a9b3b1a813c8ab1204efe98fe0 Mon Sep 17 00:00:00 2001 +From 5d9d6d510a0e7d2e3eee1ed663f0157c719c90ec Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 24 Jun 2015 14:10:44 +0100 -Subject: [PATCH] spi-bcm2835: Support pin groups other than 7-11 +Subject: [PATCH 011/703] spi-bcm2835: Support pin groups other than 7-11 The spi-bcm2835 driver automatically uses GPIO chip-selects due to some unreliability of the native ones. In doing so it chooses the @@ -14,7 +14,7 @@ selects. Signed-off-by: Phil Elwell --- - drivers/spi/spi-bcm2835.c | 45 +++++++++++++++++++++++++++++++++++++-------- + drivers/spi/spi-bcm2835.c | 45 ++++++++++++++++++++++++++++++++------- 1 file changed, 37 insertions(+), 8 deletions(-) --- a/drivers/spi/spi-bcm2835.c diff --git a/target/linux/brcm2708/patches-4.9/950-0016-spi-bcm2835-Disable-forced-software-CS.patch b/target/linux/brcm2708/patches-4.19/950-0012-spi-bcm2835-Disable-forced-software-CS.patch similarity index 86% rename from target/linux/brcm2708/patches-4.9/950-0016-spi-bcm2835-Disable-forced-software-CS.patch rename to target/linux/brcm2708/patches-4.19/950-0012-spi-bcm2835-Disable-forced-software-CS.patch index 2abef97ad..091ede137 100644 --- a/target/linux/brcm2708/patches-4.9/950-0016-spi-bcm2835-Disable-forced-software-CS.patch +++ b/target/linux/brcm2708/patches-4.19/950-0012-spi-bcm2835-Disable-forced-software-CS.patch @@ -1,7 +1,7 @@ -From c0aaf0d4213bfc9df85c397cd974f7a6f15255f2 Mon Sep 17 00:00:00 2001 +From 8d654c03c8e0730e67fc4e7d6435da05ddf4e284 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 1 Jul 2016 22:09:24 +0100 -Subject: [PATCH] spi-bcm2835: Disable forced software CS +Subject: [PATCH 012/703] spi-bcm2835: Disable forced software CS Select software CS in bcm2708_common.dtsi, and disable the automatic conversion in the driver to allow hardware CS to be re-enabled with an diff --git a/target/linux/brcm2708/patches-4.9/950-0017-spi-bcm2835-Remove-unused-code.patch b/target/linux/brcm2708/patches-4.19/950-0013-spi-bcm2835-Remove-unused-code.patch similarity index 94% rename from target/linux/brcm2708/patches-4.9/950-0017-spi-bcm2835-Remove-unused-code.patch rename to target/linux/brcm2708/patches-4.19/950-0013-spi-bcm2835-Remove-unused-code.patch index ef6bb5299..de39a0445 100644 --- a/target/linux/brcm2708/patches-4.9/950-0017-spi-bcm2835-Remove-unused-code.patch +++ b/target/linux/brcm2708/patches-4.19/950-0013-spi-bcm2835-Remove-unused-code.patch @@ -1,10 +1,10 @@ -From 21f7f9d8146dd9e5a860198781febf78aafee3d1 Mon Sep 17 00:00:00 2001 +From 5a6dcccb576167d1e50c922bfb7bf6cffbdaa671 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 8 Nov 2016 21:35:38 +0000 -Subject: [PATCH] spi-bcm2835: Remove unused code +Subject: [PATCH 013/703] spi-bcm2835: Remove unused code --- - drivers/spi/spi-bcm2835.c | 61 ----------------------------------------------- + drivers/spi/spi-bcm2835.c | 61 --------------------------------------- 1 file changed, 61 deletions(-) --- a/drivers/spi/spi-bcm2835.c diff --git a/target/linux/brcm2708/patches-4.9/950-0019-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch b/target/linux/brcm2708/patches-4.19/950-0014-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0019-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch rename to target/linux/brcm2708/patches-4.19/950-0014-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch index c402fe283..a865803f6 100644 --- a/target/linux/brcm2708/patches-4.9/950-0019-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch +++ b/target/linux/brcm2708/patches-4.19/950-0014-dmaengine-bcm2835-Load-driver-early-and-support-lega.patch @@ -1,7 +1,8 @@ -From e4f0f7daebca7005c67bf7ae3f6f59df587e91d5 Mon Sep 17 00:00:00 2001 +From abbc7f81bb68293439c0a325b5a590d28b91b819 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Sat, 3 Oct 2015 22:22:55 +0200 -Subject: [PATCH] dmaengine: bcm2835: Load driver early and support legacy API +Subject: [PATCH 014/703] dmaengine: bcm2835: Load driver early and support + legacy API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -19,7 +20,7 @@ Signed-off-by: Noralf Trønnes --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig -@@ -108,7 +108,7 @@ config COH901318 +@@ -131,7 +131,7 @@ config COH901318 config DMA_BCM2835 tristate "BCM2835 DMA engine support" @@ -46,7 +47,7 @@ Signed-off-by: Noralf Trønnes struct bcm2835_dmadev { struct dma_device ddev; -@@ -925,6 +927,9 @@ static int bcm2835_dma_probe(struct plat +@@ -912,6 +914,9 @@ static int bcm2835_dma_probe(struct plat base = devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(base)) return PTR_ERR(base); @@ -56,7 +57,7 @@ Signed-off-by: Noralf Trønnes od->base = base; -@@ -962,6 +967,9 @@ static int bcm2835_dma_probe(struct plat +@@ -950,6 +955,9 @@ static int bcm2835_dma_probe(struct plat goto err_no_dma; } @@ -66,7 +67,7 @@ Signed-off-by: Noralf Trønnes /* get irqs for each channel that we support */ for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) { /* skip masked out channels */ -@@ -1036,6 +1044,7 @@ static int bcm2835_dma_remove(struct pla +@@ -1024,6 +1032,7 @@ static int bcm2835_dma_remove(struct pla { struct bcm2835_dmadev *od = platform_get_drvdata(pdev); @@ -74,7 +75,7 @@ Signed-off-by: Noralf Trønnes dma_async_device_unregister(&od->ddev); bcm2835_dma_free(od); -@@ -1051,7 +1060,22 @@ static struct platform_driver bcm2835_dm +@@ -1039,7 +1048,22 @@ static struct platform_driver bcm2835_dm }, }; diff --git a/target/linux/brcm2708/patches-4.19/950-0015-firmware-Updated-mailbox-header.patch b/target/linux/brcm2708/patches-4.19/950-0015-firmware-Updated-mailbox-header.patch new file mode 100644 index 000000000..be01e20c0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0015-firmware-Updated-mailbox-header.patch @@ -0,0 +1,36 @@ +From 8d00375a0645102bc58fc5c8e4c05efbcfbbbd71 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 25 Jan 2016 17:25:12 +0000 +Subject: [PATCH 015/703] firmware: Updated mailbox header + +--- + include/soc/bcm2835/raspberrypi-firmware.h | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -12,6 +12,8 @@ + #include + #include + ++#define RPI_FIRMWARE_CHAN_FB 1 ++ + struct rpi_firmware; + + enum rpi_firmware_property_status { +@@ -76,6 +78,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021, + RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030, + RPI_FIRMWARE_GET_THROTTLED = 0x00030046, ++ RPI_FIRMWARE_GET_CLOCK_MEASURED = 0x00030047, ++ RPI_FIRMWARE_NOTIFY_REBOOT = 0x00030048, + RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001, + RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002, + RPI_FIRMWARE_SET_VOLTAGE = 0x00038003, +@@ -158,5 +162,6 @@ static inline struct rpi_firmware *rpi_f + return NULL; + } + #endif ++int rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data); + + #endif /* __SOC_RASPBERRY_FIRMWARE_H__ */ diff --git a/target/linux/brcm2708/patches-4.9/950-0022-rtc-Add-SPI-alias-for-pcf2123-driver.patch b/target/linux/brcm2708/patches-4.19/950-0016-rtc-Add-SPI-alias-for-pcf2123-driver.patch similarity index 81% rename from target/linux/brcm2708/patches-4.9/950-0022-rtc-Add-SPI-alias-for-pcf2123-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0016-rtc-Add-SPI-alias-for-pcf2123-driver.patch index 4992165a2..1cb84b17f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0022-rtc-Add-SPI-alias-for-pcf2123-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0016-rtc-Add-SPI-alias-for-pcf2123-driver.patch @@ -1,7 +1,7 @@ -From ffa1e97926ba3e22f7e41e2b5e16737461bf31ae Mon Sep 17 00:00:00 2001 +From afbee813c2e801c74c1732eb4511e5fd32027245 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 15 Jun 2016 16:48:41 +0100 -Subject: [PATCH] rtc: Add SPI alias for pcf2123 driver +Subject: [PATCH 016/703] rtc: Add SPI alias for pcf2123 driver Without this alias, Device Tree won't cause the driver to be loaded. diff --git a/target/linux/brcm2708/patches-4.9/950-0023-watchdog-bcm2835-Support-setting-reboot-partition.patch b/target/linux/brcm2708/patches-4.19/950-0017-watchdog-bcm2835-Support-setting-reboot-partition.patch similarity index 57% rename from target/linux/brcm2708/patches-4.9/950-0023-watchdog-bcm2835-Support-setting-reboot-partition.patch rename to target/linux/brcm2708/patches-4.19/950-0017-watchdog-bcm2835-Support-setting-reboot-partition.patch index 392ce7023..63b3c63e8 100644 --- a/target/linux/brcm2708/patches-4.9/950-0023-watchdog-bcm2835-Support-setting-reboot-partition.patch +++ b/target/linux/brcm2708/patches-4.19/950-0017-watchdog-bcm2835-Support-setting-reboot-partition.patch @@ -1,7 +1,7 @@ -From 0e690096e05c3b4e806381ff38124dbdae3ba877 Mon Sep 17 00:00:00 2001 +From 3091f3a65590ab446e9c637377efa55dc3b8996f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 7 Oct 2016 16:50:59 +0200 -Subject: [PATCH] watchdog: bcm2835: Support setting reboot partition +Subject: [PATCH 017/703] watchdog: bcm2835: Support setting reboot partition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -16,42 +16,39 @@ If the partition doesn't exist, the firmware falls back to partition 0. Signed-off-by: Noralf Trønnes --- - drivers/watchdog/bcm2835_wdt.c | 61 +++++++++++++++++++++++++----------------- - 1 file changed, 36 insertions(+), 25 deletions(-) + drivers/watchdog/bcm2835_wdt.c | 49 +++++++++++++++++++--------------- + 1 file changed, 27 insertions(+), 22 deletions(-) --- a/drivers/watchdog/bcm2835_wdt.c +++ b/drivers/watchdog/bcm2835_wdt.c -@@ -35,13 +35,7 @@ +@@ -31,13 +31,7 @@ #define PM_RSTC_WRCFG_SET 0x00000030 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 #define PM_RSTC_RESET 0x00000102 - -/* -- * The Raspberry Pi firmware uses the RSTS register to know which partiton -- * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10. -- * Partiton 63 is a special partition used by the firmware to indicate halt. +- * The Raspberry Pi firmware uses the RSTS register to know which partition +- * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10. +- * Partition 63 is a special partition used by the firmware to indicate halt. - */ -#define PM_RSTS_RASPBERRYPI_HALT 0x555 -+#define PM_RSTS_PARTITION_CLR 0xfffffaaa ++#define PM_RSTS_PARTITION_CLR 0xfffffaaa #define SECS_TO_WDOG_TICKS(x) ((x) << 16) #define WDOG_TICKS_TO_SECS(x) ((x) >> 16) -@@ -111,15 +105,28 @@ static struct watchdog_device bcm2835_wd - .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET), - }; +@@ -94,9 +88,24 @@ static unsigned int bcm2835_wdt_get_time + return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET); + } --static int --bcm2835_restart(struct notifier_block *this, unsigned long mode, void *cmd) +-static void __bcm2835_restart(struct bcm2835_wdt *wdt) +/* + * The Raspberry Pi firmware uses the RSTS register to know which partiton + * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10. + * Partiton 63 is a special partition used by the firmware to indicate halt. + */ + -+static void bcm2835_restart(struct bcm2835_wdt *wdt, u8 partition) ++static void __bcm2835_restart(struct bcm2835_wdt *wdt, u8 partition) { -- struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt, -- restart_handler); - u32 val; + u32 val, rsts; + @@ -66,32 +63,22 @@ Signed-off-by: Noralf Trønnes /* use a timeout of 10 ticks (~150us) */ writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG); -+ - val = readl_relaxed(wdt->base + PM_RSTC); - val &= PM_RSTC_WRCFG_CLR; - val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET; -@@ -127,6 +134,20 @@ bcm2835_restart(struct notifier_block *t +@@ -114,7 +123,13 @@ static int bcm2835_restart(struct watchd + { + struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog); - /* No sleeping, possibly atomic. */ - mdelay(1); -+} -+ -+static int bcm2835_restart_notifier_call(struct notifier_block *this, -+ unsigned long mode, void *cmd) -+{ -+ struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt, -+ restart_handler); +- __bcm2835_restart(wdt); + unsigned long long val; + u8 partition = 0; + -+ if (cmd && !kstrtoull(cmd, 0, &val) && val <= 63) ++ if (data && !kstrtoull(data, 0, &val) && val <= 63) + partition = val; + -+ bcm2835_restart(wdt, partition); ++ __bcm2835_restart(wdt, partition); return 0; } -@@ -142,19 +163,9 @@ static void bcm2835_power_off(void) +@@ -152,19 +167,9 @@ static void bcm2835_power_off(void) of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt"); struct platform_device *pdev = of_find_device_by_node(np); struct bcm2835_wdt *wdt = platform_get_drvdata(pdev); @@ -107,18 +94,9 @@ Signed-off-by: Noralf Trønnes - writel_relaxed(val, wdt->base + PM_RSTS); - /* Continue with normal reset mechanism */ -- bcm2835_restart(&wdt->restart_handler, REBOOT_HARD, NULL); +- __bcm2835_restart(wdt); + /* Partition 63 tells the firmware that this is a halt */ -+ bcm2835_restart(wdt, 63); ++ __bcm2835_restart(wdt, 63); } static int bcm2835_wdt_probe(struct platform_device *pdev) -@@ -188,7 +199,7 @@ static int bcm2835_wdt_probe(struct plat - return err; - } - -- wdt->restart_handler.notifier_call = bcm2835_restart; -+ wdt->restart_handler.notifier_call = bcm2835_restart_notifier_call; - wdt->restart_handler.priority = 128; - register_restart_handler(&wdt->restart_handler); - if (pm_power_off == NULL) diff --git a/target/linux/brcm2708/patches-4.9/950-0024-reboot-Use-power-off-rather-than-busy-spinning-when-.patch b/target/linux/brcm2708/patches-4.19/950-0018-reboot-Use-power-off-rather-than-busy-spinning-when-.patch similarity index 62% rename from target/linux/brcm2708/patches-4.9/950-0024-reboot-Use-power-off-rather-than-busy-spinning-when-.patch rename to target/linux/brcm2708/patches-4.19/950-0018-reboot-Use-power-off-rather-than-busy-spinning-when-.patch index d29517e23..0223a4ac5 100644 --- a/target/linux/brcm2708/patches-4.9/950-0024-reboot-Use-power-off-rather-than-busy-spinning-when-.patch +++ b/target/linux/brcm2708/patches-4.19/950-0018-reboot-Use-power-off-rather-than-busy-spinning-when-.patch @@ -1,8 +1,8 @@ -From 527f4308ee55e8727c486528879b7945b6404a72 Mon Sep 17 00:00:00 2001 +From 49dc030939b6332a4d1dca0c2b12ea9f559dcf2f Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 5 Apr 2016 19:40:12 +0100 -Subject: [PATCH] reboot: Use power off rather than busy spinning when halt is - requested +Subject: [PATCH 018/703] reboot: Use power off rather than busy spinning when + halt is requested --- arch/arm/kernel/reboot.c | 4 +--- @@ -10,7 +10,7 @@ Subject: [PATCH] reboot: Use power off rather than busy spinning when halt is --- a/arch/arm/kernel/reboot.c +++ b/arch/arm/kernel/reboot.c -@@ -102,9 +102,7 @@ void machine_shutdown(void) +@@ -105,9 +105,7 @@ void machine_shutdown(void) */ void machine_halt(void) { diff --git a/target/linux/brcm2708/patches-4.9/950-0025-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch b/target/linux/brcm2708/patches-4.19/950-0019-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch similarity index 79% rename from target/linux/brcm2708/patches-4.9/950-0025-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch rename to target/linux/brcm2708/patches-4.19/950-0019-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch index 90c0a0eca..50193198f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0025-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch +++ b/target/linux/brcm2708/patches-4.19/950-0019-bcm-Make-RASPBERRYPI_POWER-depend-on-PM.patch @@ -1,7 +1,7 @@ -From d63e8989dc891121464a86cec95952f104edf383 Mon Sep 17 00:00:00 2001 +From 9fdc1aa7e5d82029afb4e14c3ef3613264f6eca0 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 9 Nov 2016 13:02:52 +0000 -Subject: [PATCH] bcm: Make RASPBERRYPI_POWER depend on PM +Subject: [PATCH 019/703] bcm: Make RASPBERRYPI_POWER depend on PM --- drivers/soc/bcm/Kconfig | 1 + diff --git a/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch b/target/linux/brcm2708/patches-4.19/950-0020-Register-the-clocks-early-during-the-boot-process-so.patch similarity index 68% rename from target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch rename to target/linux/brcm2708/patches-4.19/950-0020-Register-the-clocks-early-during-the-boot-process-so.patch index ec174b0c9..616a977ee 100644 --- a/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch +++ b/target/linux/brcm2708/patches-4.19/950-0020-Register-the-clocks-early-during-the-boot-process-so.patch @@ -1,10 +1,10 @@ -From 492d6b9c3f1f8cc1eb890dc0eafacae51d6ba2f0 Mon Sep 17 00:00:00 2001 +From 4900c14f9c0f514162496e6a3f71c51a50e7b376 Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Fri, 2 Sep 2016 16:45:27 +0100 -Subject: [PATCH] Register the clocks early during the boot process, so that - special/critical clocks can get enabled early on in the boot process avoiding - the risk of disabling a clock, pll_divider or pll when a claiming driver - fails to install propperly - maybe it needs to defer. +Subject: [PATCH 020/703] Register the clocks early during the boot process, so + that special/critical clocks can get enabled early on in the boot process + avoiding the risk of disabling a clock, pll_divider or pll when a claiming + driver fails to install propperly - maybe it needs to defer. Signed-off-by: Martin Sperl --- @@ -13,7 +13,7 @@ Signed-off-by: Martin Sperl --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1909,8 +1909,15 @@ static int bcm2835_clk_probe(struct plat +@@ -2184,8 +2184,15 @@ static int bcm2835_clk_probe(struct plat if (ret) return ret; @@ -30,7 +30,7 @@ Signed-off-by: Martin Sperl } static const struct of_device_id bcm2835_clk_of_match[] = { -@@ -1927,7 +1934,11 @@ static struct platform_driver bcm2835_cl +@@ -2202,7 +2209,11 @@ static struct platform_driver bcm2835_cl .probe = bcm2835_clk_probe, }; diff --git a/target/linux/brcm2708/patches-4.19/950-0021-bcm2835-rng-Avoid-initialising-if-already-enabled.patch b/target/linux/brcm2708/patches-4.19/950-0021-bcm2835-rng-Avoid-initialising-if-already-enabled.patch new file mode 100644 index 000000000..5e197ba30 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0021-bcm2835-rng-Avoid-initialising-if-already-enabled.patch @@ -0,0 +1,25 @@ +From bc5b619aa9eaa634e49483c95b3681171cb4d900 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 6 Dec 2016 17:05:39 +0000 +Subject: [PATCH 021/703] bcm2835-rng: Avoid initialising if already enabled + +Avoids the 0x40000 cycles of warmup again if firmware has already used it +--- + drivers/char/hw_random/bcm2835-rng.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/char/hw_random/bcm2835-rng.c ++++ b/drivers/char/hw_random/bcm2835-rng.c +@@ -105,8 +105,10 @@ static int bcm2835_rng_init(struct hwrng + } + + /* set warm-up count & enable */ +- rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS); +- rng_writel(priv, RNG_RBGEN, RNG_CTRL); ++ if (!(rng_readl(priv, RNG_CTRL) & RNG_RBGEN)) { ++ rng_writel(priv, RNG_WARMUP_COUNT, RNG_STATUS); ++ rng_writel(priv, RNG_RBGEN, RNG_CTRL); ++ } + + return ret; + } diff --git a/target/linux/brcm2708/patches-4.9/950-0028-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch b/target/linux/brcm2708/patches-4.19/950-0022-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch similarity index 57% rename from target/linux/brcm2708/patches-4.9/950-0028-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch rename to target/linux/brcm2708/patches-4.19/950-0022-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch index 8e7002436..eb216e40a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0028-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch +++ b/target/linux/brcm2708/patches-4.19/950-0022-kbuild-Ignore-dtco-targets-when-filtering-symbols.patch @@ -1,7 +1,7 @@ -From d438958d741a4edbb641791461ee8f6c34495a89 Mon Sep 17 00:00:00 2001 +From 30a4c0ff154b3ce8fd0df9054d03cee55dacc8d0 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 24 Aug 2016 16:28:44 +0100 -Subject: [PATCH] kbuild: Ignore dtco targets when filtering symbols +Subject: [PATCH 022/703] kbuild: Ignore dtco targets when filtering symbols --- scripts/Kbuild.include | 2 +- @@ -9,12 +9,12 @@ Subject: [PATCH] kbuild: Ignore dtco targets when filtering symbols --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include -@@ -296,7 +296,7 @@ ksym_dep_filter = +@@ -287,7 +287,7 @@ ksym_dep_filter = $(CPP) $(call flags_nodeps,c_flags) -D__KSYM_DEPS__ $< ;; \ as_*_S|cpp_s_S) \ $(CPP) $(call flags_nodeps,a_flags) -D__KSYM_DEPS__ $< ;; \ -- boot*|build*|*cpp_lds_S|dtc|host*|vdso*) : ;; \ -+ boot*|build*|*cpp_lds_S|dtc*|host*|vdso*) : ;; \ +- boot*|build*|cpp_its_S|*cpp_lds_S|dtc|host*|vdso*) : ;; \ ++ boot*|build*|cpp_its_S|*cpp_lds_S|dtc*|host*|vdso*) : ;; \ *) echo "Don't know how to preprocess $(1)" >&2; false ;; \ - esac | tr ";" "\n" | sed -rn 's/^.*=== __KSYM_(.*) ===.*$$/KSYM_\1/p' + esac | tr ";" "\n" | sed -n 's/^.*=== __KSYM_\(.*\) ===.*$$/_\1/p' diff --git a/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch b/target/linux/brcm2708/patches-4.19/950-0023-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch similarity index 77% rename from target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch rename to target/linux/brcm2708/patches-4.19/950-0023-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch index a8e5e1b64..478d0c998 100644 --- a/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch +++ b/target/linux/brcm2708/patches-4.19/950-0023-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch @@ -1,7 +1,7 @@ -From a2ca8b47db0d08735e1c0ebeaf34e88522091662 Mon Sep 17 00:00:00 2001 +From 06ad042c1d3b3471c478fee39a7539ac39b752ff Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 Feb 2017 17:20:08 +0000 -Subject: [PATCH] clk-bcm2835: Mark used PLLs and dividers CRITICAL +Subject: [PATCH 023/703] clk-bcm2835: Mark used PLLs and dividers CRITICAL The VPU configures and relies on several PLLs and dividers. Mark all enabled dividers and their PLLs as CRITICAL to prevent the kernel from @@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1372,6 +1372,11 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1362,6 +1362,11 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.hw.init = &init; divider->div.table = NULL; diff --git a/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch b/target/linux/brcm2708/patches-4.19/950-0024-clk-bcm2835-Add-claim-clocks-property.patch similarity index 64% rename from target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch rename to target/linux/brcm2708/patches-4.19/950-0024-clk-bcm2835-Add-claim-clocks-property.patch index 021f7521b..e80c99bcb 100644 --- a/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch +++ b/target/linux/brcm2708/patches-4.19/950-0024-clk-bcm2835-Add-claim-clocks-property.patch @@ -1,7 +1,7 @@ -From 5c1128ebe6c7a4af3f1784a640df7f3698233e9d Mon Sep 17 00:00:00 2001 +From 14e1d51f1737da7b2bf59df95db6f977179e0497 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 Feb 2017 17:20:08 +0000 -Subject: [PATCH] clk-bcm2835: Add claim-clocks property +Subject: [PATCH 024/703] clk-bcm2835: Add claim-clocks property The claim-clocks property can be used to prevent PLLs and dividers from being marked as critical. It contains a vector of clock IDs, @@ -12,43 +12,12 @@ PLLH_PIX for the vc4_kms_v3d driver. Signed-off-by: Phil Elwell --- - arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 14 +++++++++ - drivers/clk/bcm/clk-bcm2835.c | 34 ++++++++++++++++++++-- - 2 files changed, 46 insertions(+), 2 deletions(-) + drivers/clk/bcm/clk-bcm2835.c | 34 ++++++++++++++++++++++++++++++++-- + 1 file changed, 32 insertions(+), 2 deletions(-) ---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -@@ -5,6 +5,8 @@ - /dts-v1/; - /plugin/; - -+#include -+ - / { - compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; - -@@ -155,6 +157,18 @@ - }; - }; - -+ fragment@19 { -+ target = <&clocks>; -+ __overlay__ { -+ claim-clocks = < -+ BCM2835_PLLD_DSI0 -+ BCM2835_PLLD_DSI1 -+ BCM2835_PLLH_AUX -+ BCM2835_PLLH_PIX -+ >; -+ }; -+ }; -+ - __overrides__ { - cma-256 = <0>,"+0-1-2-3-4"; - cma-192 = <0>,"-0+1-2-3-4"; --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1304,6 +1304,8 @@ static const struct clk_ops bcm2835_vpu_ +@@ -1294,6 +1294,8 @@ static const struct clk_ops bcm2835_vpu_ .debug_init = bcm2835_clock_debug_init, }; @@ -57,7 +26,7 @@ Signed-off-by: Phil Elwell static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman, const struct bcm2835_pll_data *data) { -@@ -1320,6 +1322,9 @@ static struct clk_hw *bcm2835_register_p +@@ -1310,6 +1312,9 @@ static struct clk_hw *bcm2835_register_p init.ops = &bcm2835_pll_clk_ops; init.flags = CLK_IGNORE_UNUSED; @@ -67,7 +36,7 @@ Signed-off-by: Phil Elwell pll = kzalloc(sizeof(*pll), GFP_KERNEL); if (!pll) return NULL; -@@ -1373,8 +1378,10 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1363,8 +1368,10 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.table = NULL; if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) { @@ -80,7 +49,7 @@ Signed-off-by: Phil Elwell } divider->cprman = cprman; -@@ -2110,6 +2117,8 @@ static const struct bcm2835_clk_desc clk +@@ -2116,6 +2123,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_PERIICTL), }; @@ -89,7 +58,7 @@ Signed-off-by: Phil Elwell /* * Permanently take a reference on the parent of the SDRAM clock. * -@@ -2129,6 +2138,19 @@ static int bcm2835_mark_sdc_parent_criti +@@ -2135,6 +2144,19 @@ static int bcm2835_mark_sdc_parent_criti return clk_prepare_enable(parent); } @@ -109,15 +78,15 @@ Signed-off-by: Phil Elwell static int bcm2835_clk_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -@@ -2138,6 +2160,7 @@ static int bcm2835_clk_probe(struct plat +@@ -2144,6 +2166,7 @@ static int bcm2835_clk_probe(struct plat const struct bcm2835_clk_desc *desc; const size_t asize = ARRAY_SIZE(clk_desc_array); size_t i; + u32 clk_id; int ret; - cprman = devm_kzalloc(dev, sizeof(*cprman) + -@@ -2153,6 +2176,13 @@ static int bcm2835_clk_probe(struct plat + cprman = devm_kzalloc(dev, +@@ -2159,6 +2182,13 @@ static int bcm2835_clk_probe(struct plat if (IS_ERR(cprman->regs)) return PTR_ERR(cprman->regs); diff --git a/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Read-max-core-clock-from-firmware.patch b/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Read-max-core-clock-from-firmware.patch new file mode 100644 index 000000000..66a0d2a42 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0025-clk-bcm2835-Read-max-core-clock-from-firmware.patch @@ -0,0 +1,115 @@ +From 9e24627b07ac0553c9fc00a069fcc10c22a3cb6f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 6 Mar 2017 09:06:18 +0000 +Subject: [PATCH 025/703] clk-bcm2835: Read max core clock from firmware + +The VPU is responsible for managing the core clock, usually under +direction from the bcm2835-cpufreq driver but not via the clk-bcm2835 +driver. Since the core frequency can change without warning, it is +safer to report the maximum clock rate to users of the core clock - +I2C, SPI and the mini UART - to err on the safe side when calculating +clock divisors. + +If the DT node for the clock driver includes a reference to the +firmware node, use the firmware API to query the maximum core clock +instead of reading the divider registers. + +Prior to this patch, a "100KHz" I2C bus was sometimes clocked at about +160KHz. In particular, switching to the 4.9 kernel was likely to break +SenseHAT usage on a Pi3. + +Signed-off-by: Phil Elwell +--- + drivers/clk/bcm/clk-bcm2835.c | 39 ++++++++++++++++++++++++++++++++++- + 1 file changed, 38 insertions(+), 1 deletion(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -44,6 +44,7 @@ + #include + #include + #include ++#include + + #define CM_PASSWORD 0x5a000000 + +@@ -298,6 +299,8 @@ + #define LOCK_TIMEOUT_NS 100000000 + #define BCM2835_MAX_FB_RATE 1750000000u + ++#define VCMSG_ID_CORE_CLOCK 4 ++ + /* + * Names of clocks used within the driver that need to be replaced + * with an external parent's name. This array is in the order that +@@ -316,6 +319,7 @@ static const char *const cprman_parent_n + struct bcm2835_cprman { + struct device *dev; + void __iomem *regs; ++ struct rpi_firmware *fw; + spinlock_t regs_lock; /* spinlock for all clocks */ + + /* +@@ -998,6 +1002,30 @@ static unsigned long bcm2835_clock_get_r + return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); + } + ++static unsigned long bcm2835_clock_get_rate_vpu(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); ++ struct bcm2835_cprman *cprman = clock->cprman; ++ ++ if (cprman->fw) { ++ struct { ++ u32 id; ++ u32 val; ++ } packet; ++ ++ packet.id = VCMSG_ID_CORE_CLOCK; ++ packet.val = 0; ++ ++ if (!rpi_firmware_property(cprman->fw, ++ RPI_FIRMWARE_GET_MAX_CLOCK_RATE, ++ &packet, sizeof(packet))) ++ return packet.val; ++ } ++ ++ return bcm2835_clock_get_rate(hw, parent_rate); ++} ++ + static void bcm2835_clock_wait_busy(struct bcm2835_clock *clock) + { + struct bcm2835_cprman *cprman = clock->cprman; +@@ -1286,7 +1314,7 @@ static int bcm2835_vpu_clock_is_on(struc + */ + static const struct clk_ops bcm2835_vpu_clock_clk_ops = { + .is_prepared = bcm2835_vpu_clock_is_on, +- .recalc_rate = bcm2835_clock_get_rate, ++ .recalc_rate = bcm2835_clock_get_rate_vpu, + .set_rate = bcm2835_clock_set_rate, + .determine_rate = bcm2835_clock_determine_rate, + .set_parent = bcm2835_clock_set_parent, +@@ -2165,6 +2193,7 @@ static int bcm2835_clk_probe(struct plat + struct resource *res; + const struct bcm2835_clk_desc *desc; + const size_t asize = ARRAY_SIZE(clk_desc_array); ++ struct device_node *fw_node; + size_t i; + u32 clk_id; + int ret; +@@ -2182,6 +2211,14 @@ static int bcm2835_clk_probe(struct plat + if (IS_ERR(cprman->regs)) + return PTR_ERR(cprman->regs); + ++ fw_node = of_parse_phandle(dev->of_node, "firmware", 0); ++ if (fw_node) { ++ struct rpi_firmware *fw = rpi_firmware_get(NULL); ++ if (!fw) ++ return -EPROBE_DEFER; ++ cprman->fw = fw; ++ } ++ + memset(bcm2835_clk_claimed, 0, sizeof(bcm2835_clk_claimed)); + for (i = 0; + !of_property_read_u32_index(pdev->dev.of_node, "claim-clocks", diff --git a/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/brcm2708/patches-4.19/950-0026-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch similarity index 74% rename from target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch rename to target/linux/brcm2708/patches-4.19/950-0026-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch index fc662619d..ffbe31c8c 100644 --- a/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch +++ b/target/linux/brcm2708/patches-4.19/950-0026-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -1,7 +1,8 @@ -From 599e7165ec6477139dae4f32a12e8d49d5dd8859 Mon Sep 17 00:00:00 2001 +From fabb3595bd356f058329ff94a3c5e31df5d84217 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 9 May 2016 17:28:18 -0700 -Subject: [PATCH] clk: bcm2835: Mark GPIO clocks enabled at boot as critical. +Subject: [PATCH 026/703] clk: bcm2835: Mark GPIO clocks enabled at boot as + critical. These divide off of PLLD_PER and are used for the ethernet and wifi PHYs source PLLs. Neither of them is currently represented by a phy @@ -19,11 +20,10 @@ Signed-off-by: Eric Anholt --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1268,6 +1268,15 @@ static struct clk_hw *bcm2835_register_c - init.name = data->name; +@@ -1454,6 +1454,15 @@ static struct clk_hw *bcm2835_register_c init.flags = data->flags | CLK_IGNORE_UNUSED; -+ /* + /* + * Some GPIO clocks for ethernet/wifi PLLs are marked as + * critical (since some platforms use them), but if the + * firmware didn't have them turned on then they clearly @@ -32,6 +32,7 @@ Signed-off-by: Eric Anholt + if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0) + init.flags &= ~CLK_IS_CRITICAL; + - if (data->is_vpu_clock) { - init.ops = &bcm2835_vpu_clock_clk_ops; - } else { ++ /* + * Pass the CLK_SET_RATE_PARENT flag if we are allowed to propagate + * rate changes on at least of the parents. + */ diff --git a/target/linux/brcm2708/patches-4.9/950-0147-sound-Demote-deferral-errors-to-INFO-level.patch b/target/linux/brcm2708/patches-4.19/950-0027-sound-Demote-deferral-errors-to-INFO-level.patch similarity index 65% rename from target/linux/brcm2708/patches-4.9/950-0147-sound-Demote-deferral-errors-to-INFO-level.patch rename to target/linux/brcm2708/patches-4.19/950-0027-sound-Demote-deferral-errors-to-INFO-level.patch index 0a08eb9a1..3db0a7523 100644 --- a/target/linux/brcm2708/patches-4.9/950-0147-sound-Demote-deferral-errors-to-INFO-level.patch +++ b/target/linux/brcm2708/patches-4.19/950-0027-sound-Demote-deferral-errors-to-INFO-level.patch @@ -1,7 +1,7 @@ -From b78e78fa375e3aa1e91b35030e8dfc930ba425f2 Mon Sep 17 00:00:00 2001 +From 34dfe2b3ea493bc57c2b85280c28dbe0b3c1d1dc Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 9 Feb 2017 14:36:44 +0000 -Subject: [PATCH] sound: Demote deferral errors to INFO level +Subject: [PATCH 027/703] sound: Demote deferral errors to INFO level At present there is no mechanism to specify driver load order, which can lead to deferrals and repeated retries until successful. @@ -10,21 +10,23 @@ INFO and mention that the operation will be retried. Signed-off-by: Phil Elwell --- - sound/soc/soc-core.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) + sound/soc/soc-core.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c -@@ -1013,7 +1013,7 @@ static int soc_bind_dai_link(struct snd_ +@@ -868,8 +868,8 @@ static int soc_bind_dai_link(struct snd_ cpu_dai_component.dai_name = dai_link->cpu_dai_name; rtd->cpu_dai = snd_soc_find_dai(&cpu_dai_component); if (!rtd->cpu_dai) { -- dev_err(card->dev, "ASoC: CPU DAI %s not registered\n", +- dev_info(card->dev, "ASoC: CPU DAI %s not registered\n", +- dai_link->cpu_dai_name); + dev_info(card->dev, "ASoC: CPU DAI %s not registered - will retry\n", - dai_link->cpu_dai_name); ++ dai_link->cpu_dai_name); goto _err_defer; } -@@ -1025,7 +1025,7 @@ static int soc_bind_dai_link(struct snd_ + snd_soc_rtdcom_add(rtd, rtd->cpu_dai->component); +@@ -881,7 +881,7 @@ static int soc_bind_dai_link(struct snd_ for (i = 0; i < rtd->num_codecs; i++) { codec_dais[i] = snd_soc_find_dai(&codecs[i]); if (!codec_dais[i]) { diff --git a/target/linux/brcm2708/patches-4.9/950-0149-Update-vfpmodule.c.patch b/target/linux/brcm2708/patches-4.19/950-0028-Update-vfpmodule.c.patch similarity index 93% rename from target/linux/brcm2708/patches-4.9/950-0149-Update-vfpmodule.c.patch rename to target/linux/brcm2708/patches-4.19/950-0028-Update-vfpmodule.c.patch index 78606ed61..afb0e3f78 100644 --- a/target/linux/brcm2708/patches-4.9/950-0149-Update-vfpmodule.c.patch +++ b/target/linux/brcm2708/patches-4.19/950-0028-Update-vfpmodule.c.patch @@ -1,7 +1,7 @@ -From aa00ca3b0296c40a6b5a1ad32258d5b655a28c70 Mon Sep 17 00:00:00 2001 +From dae5f48d60cccc2214a09c11b84373988e57e2f5 Mon Sep 17 00:00:00 2001 From: Claggy3 Date: Sat, 11 Feb 2017 14:00:30 +0000 -Subject: [PATCH] Update vfpmodule.c +Subject: [PATCH 028/703] Update vfpmodule.c Christopher Alexander Tobias Schulze - May 2, 2015, 11:57 a.m. This patch fixes a problem with VFP state save and restore related @@ -74,7 +74,7 @@ Signed-off-by: Christopher Alexander Tobias Schulze #endif /* -@@ -463,13 +466,16 @@ static int vfp_pm_suspend(void) +@@ -462,13 +465,16 @@ static int vfp_pm_suspend(void) /* if vfp is on, then save state for resumption */ if (fpexc & FPEXC_EN) { pr_debug("%s: saving vfp state\n", __func__); @@ -92,7 +92,7 @@ Signed-off-by: Christopher Alexander Tobias Schulze vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); fmxr(FPEXC, fpexc); #endif -@@ -532,7 +538,8 @@ void vfp_sync_hwstate(struct thread_info +@@ -531,7 +537,8 @@ void vfp_sync_hwstate(struct thread_info /* * Save the last VFP state on this CPU. */ @@ -102,7 +102,7 @@ Signed-off-by: Christopher Alexander Tobias Schulze vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN); fmxr(FPEXC, fpexc); } -@@ -602,6 +609,7 @@ int vfp_restore_user_hwstate(struct user +@@ -597,6 +604,7 @@ int vfp_restore_user_hwstate(struct user struct thread_info *thread = current_thread_info(); struct vfp_hard_struct *hwstate = &thread->vfpstate.hard; unsigned long fpexc; @@ -110,7 +110,7 @@ Signed-off-by: Christopher Alexander Tobias Schulze /* Disable VFP to avoid corrupting the new thread state. */ vfp_flush_hwstate(thread); -@@ -624,8 +632,12 @@ int vfp_restore_user_hwstate(struct user +@@ -619,8 +627,12 @@ int vfp_restore_user_hwstate(struct user /* Ensure the VFP is enabled. */ fpexc |= FPEXC_EN; @@ -125,7 +125,7 @@ Signed-off-by: Christopher Alexander Tobias Schulze hwstate->fpexc = fpexc; hwstate->fpinst = ufp_exc->fpinst; -@@ -695,7 +707,8 @@ void kernel_neon_begin(void) +@@ -690,7 +702,8 @@ void kernel_neon_begin(void) cpu = get_cpu(); fpexc = fmrx(FPEXC) | FPEXC_EN; diff --git a/target/linux/brcm2708/patches-4.9/950-0113-i2c-bcm2835-Add-debug-support.patch b/target/linux/brcm2708/patches-4.19/950-0029-i2c-bcm2835-Add-debug-support.patch similarity index 90% rename from target/linux/brcm2708/patches-4.9/950-0113-i2c-bcm2835-Add-debug-support.patch rename to target/linux/brcm2708/patches-4.19/950-0029-i2c-bcm2835-Add-debug-support.patch index 8e31bcc5e..bf985e0f6 100644 --- a/target/linux/brcm2708/patches-4.9/950-0113-i2c-bcm2835-Add-debug-support.patch +++ b/target/linux/brcm2708/patches-4.19/950-0029-i2c-bcm2835-Add-debug-support.patch @@ -1,7 +1,7 @@ -From 98629f09f3ceb7f2a559b48b4a70028485583f5e Mon Sep 17 00:00:00 2001 +From c7e79d0b9906e274e220f568ed49e5f00ee5187f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Tue, 1 Nov 2016 15:15:41 +0100 -Subject: [PATCH] i2c: bcm2835: Add debug support +Subject: [PATCH 029/703] i2c: bcm2835: Add debug support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -32,12 +32,12 @@ Example output, debug=3: Signed-off-by: Noralf Trønnes --- - drivers/i2c/busses/i2c-bcm2835.c | 99 +++++++++++++++++++++++++++++++++++++++- + drivers/i2c/busses/i2c-bcm2835.c | 99 +++++++++++++++++++++++++++++++- 1 file changed, 98 insertions(+), 1 deletion(-) --- a/drivers/i2c/busses/i2c-bcm2835.c +++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -53,6 +53,18 @@ +@@ -56,6 +56,18 @@ #define BCM2835_I2C_CDIV_MIN 0x0002 #define BCM2835_I2C_CDIV_MAX 0xFFFE @@ -56,7 +56,7 @@ Signed-off-by: Noralf Trønnes struct bcm2835_i2c_dev { struct device *dev; void __iomem *regs; -@@ -66,8 +78,78 @@ struct bcm2835_i2c_dev { +@@ -69,8 +81,78 @@ struct bcm2835_i2c_dev { u32 msg_err; u8 *msg_buf; size_t msg_buf_remaining; @@ -135,15 +135,15 @@ Signed-off-by: Noralf Trønnes static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev, u32 reg, u32 val) { -@@ -170,6 +252,7 @@ static void bcm2835_i2c_start_transfer(s +@@ -189,6 +271,7 @@ static void bcm2835_i2c_start_transfer(s bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr); bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len); bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c); + bcm2835_debug_add(i2c_dev, ~0); } - /* -@@ -187,6 +270,7 @@ static irqreturn_t bcm2835_i2c_isr(int t + static void bcm2835_i2c_finish_transfer(struct bcm2835_i2c_dev *i2c_dev) +@@ -215,6 +298,7 @@ static irqreturn_t bcm2835_i2c_isr(int t u32 val, err; val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); @@ -151,7 +151,7 @@ Signed-off-by: Noralf Trønnes err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR); if (err) { -@@ -253,6 +337,13 @@ static int bcm2835_i2c_xfer(struct i2c_a +@@ -281,6 +365,13 @@ static int bcm2835_i2c_xfer(struct i2c_a unsigned long time_left; int i, ret; @@ -165,10 +165,10 @@ Signed-off-by: Noralf Trønnes for (i = 0; i < (num - 1); i++) if (msgs[i].flags & I2C_M_RD) { dev_warn_once(i2c_dev->dev, -@@ -272,6 +363,10 @@ static int bcm2835_i2c_xfer(struct i2c_a +@@ -303,6 +394,10 @@ static int bcm2835_i2c_xfer(struct i2c_a + + bcm2835_i2c_finish_transfer(i2c_dev); - time_left = wait_for_completion_timeout(&i2c_dev->completion, - adap->timeout); + if (debug > 1 || (debug && (!time_left || i2c_dev->msg_err))) + bcm2835_debug_print(i2c_dev); + i2c_dev->debug_num_msgs = 0; @@ -176,7 +176,7 @@ Signed-off-by: Noralf Trønnes if (!time_left) { bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); -@@ -282,7 +377,9 @@ static int bcm2835_i2c_xfer(struct i2c_a +@@ -313,7 +408,9 @@ static int bcm2835_i2c_xfer(struct i2c_a if (!i2c_dev->msg_err) return num; diff --git a/target/linux/brcm2708/patches-4.19/950-0030-mm-Remove-the-PFN-busy-warning.patch b/target/linux/brcm2708/patches-4.19/950-0030-mm-Remove-the-PFN-busy-warning.patch new file mode 100644 index 000000000..246b0281b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0030-mm-Remove-the-PFN-busy-warning.patch @@ -0,0 +1,25 @@ +From 72ed3b77a672a8a94dab5d08739fac5b4df488d2 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 18 Dec 2014 16:07:15 -0800 +Subject: [PATCH 030/703] mm: Remove the PFN busy warning + +See commit dae803e165a11bc88ca8dbc07a11077caf97bbcb -- the warning is +expected sometimes when using CMA. However, that commit still spams +my kernel log with these warnings. + +Signed-off-by: Eric Anholt +--- + mm/page_alloc.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/mm/page_alloc.c ++++ b/mm/page_alloc.c +@@ -7972,8 +7972,6 @@ int alloc_contig_range(unsigned long sta + + /* Make sure the range is really isolated. */ + if (test_pages_isolated(outer_start, end, false)) { +- pr_info_ratelimited("%s: [%lx, %lx) PFNs busy\n", +- __func__, outer_start, end); + ret = -EBUSY; + goto done; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0031-ASoC-Add-prompt-for-ICS43432-codec.patch b/target/linux/brcm2708/patches-4.19/950-0031-ASoC-Add-prompt-for-ICS43432-codec.patch new file mode 100644 index 000000000..a0070427e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0031-ASoC-Add-prompt-for-ICS43432-codec.patch @@ -0,0 +1,25 @@ +From 14e894cf24f588a4066b171b846934ebe44afc5d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 23 Mar 2017 10:06:56 +0000 +Subject: [PATCH 031/703] ASoC: Add prompt for ICS43432 codec + +Without a prompt string, a config setting can't be included in a +defconfig. Give CONFIG_SND_SOC_ICS43432 a prompt so that Pi soundcards +can use the driver. + +Signed-off-by: Phil Elwell +--- + sound/soc/codecs/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -616,7 +616,7 @@ config SND_SOC_HDAC_HDMI + select HDMI + + config SND_SOC_ICS43432 +- tristate ++ tristate "InvenSense ICS43432 I2S microphone codec" + + config SND_SOC_INNO_RK3036 + tristate "Inno codec driver for RK3036 SoC" diff --git a/target/linux/brcm2708/patches-4.19/950-0032-irqchip-irq-bcm2836-Remove-regmap-and-syscon-use.patch b/target/linux/brcm2708/patches-4.19/950-0032-irqchip-irq-bcm2836-Remove-regmap-and-syscon-use.patch new file mode 100644 index 000000000..b55d9364e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0032-irqchip-irq-bcm2836-Remove-regmap-and-syscon-use.patch @@ -0,0 +1,112 @@ +From a580882d64f92ec0b025f6ddcfcea985412eb430 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 23 Jan 2018 16:52:45 +0000 +Subject: [PATCH 032/703] irqchip: irq-bcm2836: Remove regmap and syscon use + +The syscon node defines a register range that duplicates that used by +the local_intc node on bcm2836/7. Since irq-bcm2835 and irq-bcm2836 are +built in and always present together (both drivers are enabled by +CONFIG_ARCH_BCM2835), it is possible to replace the syscon usage with a +global variable that simplifies the code. Doing so does lose the +locking provided by regmap, but as only one side is using the regmap +interface (irq-bcm2835 uses readl and write) there is no loss of +atomicity. + +See: https://github.com/raspberrypi/firmware/issues/926 + +Signed-off-by: Phil Elwell +--- + drivers/irqchip/irq-bcm2835.c | 32 ++++++++++++-------------------- + drivers/irqchip/irq-bcm2836.c | 5 +++++ + 2 files changed, 17 insertions(+), 20 deletions(-) + +--- a/drivers/irqchip/irq-bcm2835.c ++++ b/drivers/irqchip/irq-bcm2835.c +@@ -50,8 +50,6 @@ + #include + #include + #include +-#include +-#include + + #include + #include +@@ -100,7 +98,7 @@ struct armctrl_ic { + void __iomem *enable[NR_BANKS]; + void __iomem *disable[NR_BANKS]; + struct irq_domain *domain; +- struct regmap *local_regmap; ++ void __iomem *local_base; + }; + + static struct armctrl_ic intc __read_mostly; +@@ -137,24 +135,20 @@ static void armctrl_unmask_irq(struct ir + if (d->hwirq >= NUMBER_IRQS) { + if (num_online_cpus() > 1) { + unsigned int data; +- int ret; + +- if (!intc.local_regmap) { +- pr_err("FIQ is disabled due to missing regmap\n"); ++ if (!intc.local_base) { ++ pr_err("FIQ is disabled due to missing arm_local_intc\n"); + return; + } + +- ret = regmap_read(intc.local_regmap, +- ARM_LOCAL_GPU_INT_ROUTING, &data); +- if (ret) { +- pr_err("Failed to read int routing %d\n", ret); +- return; +- } ++ data = readl_relaxed(intc.local_base + ++ ARM_LOCAL_GPU_INT_ROUTING); + + data &= ~0xc; + data |= (1 << 2); +- regmap_write(intc.local_regmap, +- ARM_LOCAL_GPU_INT_ROUTING, data); ++ writel_relaxed(data, ++ intc.local_base + ++ ARM_LOCAL_GPU_INT_ROUTING); + } + + writel_relaxed(REG_FIQ_ENABLE | hwirq_to_fiq(d->hwirq), +@@ -240,12 +234,10 @@ static int __init armctrl_of_init(struct + } + + if (is_2836) { +- intc.local_regmap = +- syscon_regmap_lookup_by_compatible("brcm,bcm2836-arm-local"); +- if (IS_ERR(intc.local_regmap)) { +- pr_err("Failed to get local register map. FIQ is disabled for cpus > 1\n"); +- intc.local_regmap = NULL; +- } ++ extern void __iomem * __attribute__((weak)) arm_local_intc; ++ intc.local_base = arm_local_intc; ++ if (!intc.local_base) ++ pr_err("Failed to get local intc base. FIQ is disabled for cpus > 1\n"); + } + + /* Make a duplicate irq range which is used to enable FIQ */ +--- a/drivers/irqchip/irq-bcm2836.c ++++ b/drivers/irqchip/irq-bcm2836.c +@@ -30,6 +30,9 @@ struct bcm2836_arm_irqchip_intc { + + static struct bcm2836_arm_irqchip_intc intc __read_mostly; + ++void __iomem *arm_local_intc; ++EXPORT_SYMBOL_GPL(arm_local_intc); ++ + static void bcm2836_arm_irqchip_mask_per_cpu_irq(unsigned int reg_offset, + unsigned int bit, + int cpu) +@@ -234,6 +237,8 @@ static int __init bcm2836_arm_irqchip_l1 + panic("%pOF: unable to map local interrupt registers\n", node); + } + ++ arm_local_intc = intc.base; ++ + bcm2835_init_local_timer_frequency(); + + intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1, diff --git a/target/linux/brcm2708/patches-4.19/950-0033-lan78xx-Enable-LEDs-and-auto-negotiation.patch b/target/linux/brcm2708/patches-4.19/950-0033-lan78xx-Enable-LEDs-and-auto-negotiation.patch new file mode 100644 index 000000000..ace760088 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0033-lan78xx-Enable-LEDs-and-auto-negotiation.patch @@ -0,0 +1,48 @@ +From a3d3dea9ca36f4f5adbf741f36b06ce05b70c2bb Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 17 Oct 2017 15:04:29 +0100 +Subject: [PATCH 033/703] lan78xx: Enable LEDs and auto-negotiation + +For applications of the LAN78xx that don't have valid programmed +EEPROMs or OTPs, enabling both LEDs and auto-negotiation by default +seems reasonable. + +Signed-off-by: Phil Elwell +--- + drivers/net/usb/lan78xx.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -2472,6 +2472,11 @@ static int lan78xx_reset(struct lan78xx_ + int ret = 0; + unsigned long timeout; + u8 sig; ++ bool has_eeprom; ++ bool has_otp; ++ ++ has_eeprom = !lan78xx_read_eeprom(dev, 0, 0, NULL); ++ has_otp = !lan78xx_read_otp(dev, 0, 0, NULL); + + ret = lan78xx_read_reg(dev, HW_CFG, &buf); + buf |= HW_CFG_LRST_; +@@ -2525,6 +2530,9 @@ static int lan78xx_reset(struct lan78xx_ + + ret = lan78xx_read_reg(dev, HW_CFG, &buf); + buf |= HW_CFG_MEF_; ++ /* If no valid EEPROM and no valid OTP, enable the LEDs by default */ ++ if (!has_eeprom && !has_otp) ++ buf |= HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_; + ret = lan78xx_write_reg(dev, HW_CFG, buf); + + ret = lan78xx_read_reg(dev, USB_CFG0, &buf); +@@ -2580,6 +2588,9 @@ static int lan78xx_reset(struct lan78xx_ + buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_; + } + } ++ /* If no valid EEPROM and no valid OTP, enable AUTO negotiation */ ++ if (!has_eeprom && !has_otp) ++ buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_; + ret = lan78xx_write_reg(dev, MAC_CR, buf); + + ret = lan78xx_read_reg(dev, MAC_TX, &buf); diff --git a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch b/target/linux/brcm2708/patches-4.19/950-0034-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch similarity index 81% rename from target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch rename to target/linux/brcm2708/patches-4.19/950-0034-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch index a6f034682..7b93c4cab 100644 --- a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch +++ b/target/linux/brcm2708/patches-4.19/950-0034-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch @@ -1,7 +1,7 @@ -From b34475b447c7e97fa9c4a854849f6e856fe59931 Mon Sep 17 00:00:00 2001 +From 3ff31acbe9b371f1b9247cc50e7751eaf98b4cef Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 23 Feb 2016 17:26:48 +0000 -Subject: [PATCH] amba_pl011: Don't use DT aliases for numbering +Subject: [PATCH 034/703] amba_pl011: Don't use DT aliases for numbering The pl011 driver looks for DT aliases of the form "serial", and if found uses as the device ID. This can cause @@ -14,7 +14,7 @@ use the same logic. --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c -@@ -2517,7 +2517,12 @@ static int pl011_setup_port(struct devic +@@ -2578,7 +2578,12 @@ static int pl011_setup_port(struct devic if (IS_ERR(base)) return PTR_ERR(base); diff --git a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch b/target/linux/brcm2708/patches-4.19/950-0035-amba_pl011-Round-input-clock-up.patch similarity index 83% rename from target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch rename to target/linux/brcm2708/patches-4.19/950-0035-amba_pl011-Round-input-clock-up.patch index ad532c511..db425ff8b 100644 --- a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch +++ b/target/linux/brcm2708/patches-4.19/950-0035-amba_pl011-Round-input-clock-up.patch @@ -1,7 +1,7 @@ -From 0360d687752df3c5546dd1534904a6e0168b6360 Mon Sep 17 00:00:00 2001 +From 5f626b06eb9efa01ca364a60378b3998d12e2f99 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 1 Mar 2017 16:07:39 +0000 -Subject: [PATCH] amba_pl011: Round input clock up +Subject: [PATCH 035/703] amba_pl011: Round input clock up The UART clock is initialised to be as close to the requested frequency as possible without exceeding it. Now that there is a @@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c -@@ -1651,6 +1651,23 @@ static void pl011_put_poll_char(struct u +@@ -1652,6 +1652,23 @@ static void pl011_put_poll_char(struct u #endif /* CONFIG_CONSOLE_POLL */ @@ -50,7 +50,7 @@ Signed-off-by: Phil Elwell static int pl011_hwinit(struct uart_port *port) { struct uart_amba_port *uap = -@@ -1667,7 +1684,7 @@ static int pl011_hwinit(struct uart_port +@@ -1668,7 +1685,7 @@ static int pl011_hwinit(struct uart_port if (retval) return retval; @@ -59,7 +59,7 @@ Signed-off-by: Phil Elwell /* Clear pending error and receive interrupts */ pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | -@@ -2321,7 +2338,7 @@ static int __init pl011_console_setup(st +@@ -2324,7 +2341,7 @@ static int __init pl011_console_setup(st plat->init(); } @@ -68,7 +68,7 @@ Signed-off-by: Phil Elwell if (uap->vendor->fixed_options) { baud = uap->fixed_baud; -@@ -2448,6 +2465,7 @@ static struct uart_driver amba_reg = { +@@ -2509,6 +2526,7 @@ static struct uart_driver amba_reg = { .cons = AMBA_CONSOLE, }; @@ -76,7 +76,7 @@ Signed-off-by: Phil Elwell static int pl011_probe_dt_alias(int index, struct device *dev) { struct device_node *np; -@@ -2479,6 +2497,7 @@ static int pl011_probe_dt_alias(int inde +@@ -2540,6 +2558,7 @@ static int pl011_probe_dt_alias(int inde return ret; } diff --git a/target/linux/brcm2708/patches-4.19/950-0036-amba_pl011-Insert-mb-for-correct-FIFO-handling.patch b/target/linux/brcm2708/patches-4.19/950-0036-amba_pl011-Insert-mb-for-correct-FIFO-handling.patch new file mode 100644 index 000000000..d98a85985 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0036-amba_pl011-Insert-mb-for-correct-FIFO-handling.patch @@ -0,0 +1,27 @@ +From 0ebd5e2c627c3c41a1081f6c1b7e7caa13e5b12e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 29 Sep 2017 10:32:19 +0100 +Subject: [PATCH 036/703] amba_pl011: Insert mb() for correct FIFO handling + +The pl011 register accessor functions use the _relaxed versions of the +standard readl() and writel() functions, meaning that there are no +automatic memory barriers. When polling a FIFO status register to check +for fullness, it is necessary to ensure that any outstanding writes have +completed; otherwise the flags are effectively stale, making it possible +that the next write is to a full FIFO. + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/amba-pl011.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -1385,6 +1385,7 @@ static bool pl011_tx_char(struct uart_am + return false; /* unable to transmit character */ + + pl011_write(c, uap, REG_DR); ++ mb(); + uap->port.icount.tx++; + + return true; diff --git a/target/linux/brcm2708/patches-4.19/950-0037-amba_pl011-Add-cts-event-workaround-DT-property.patch b/target/linux/brcm2708/patches-4.19/950-0037-amba_pl011-Add-cts-event-workaround-DT-property.patch new file mode 100644 index 000000000..51f70b6e1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0037-amba_pl011-Add-cts-event-workaround-DT-property.patch @@ -0,0 +1,47 @@ +From 9106531665bc17788096fcbc00dac3dd8a4ba2e8 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 29 Sep 2017 10:32:19 +0100 +Subject: [PATCH 037/703] amba_pl011: Add cts-event-workaround DT property + +The BCM2835 PL011 implementation seems to have a bug that can lead to a +transmission lockup if CTS changes frequently. A workaround was added to +the driver with a vendor-specific flag to enable it, but this flag is +currently not set for ARM implementations. + +Add a "cts-event-workaround" property to Pi DTBs and use the presence +of that property to force the flag to be enabled in the driver. + +See: https://github.com/raspberrypi/linux/issues/1280 + +Signed-off-by: Phil Elwell +--- + Documentation/devicetree/bindings/serial/pl011.txt | 3 +++ + drivers/tty/serial/amba-pl011.c | 5 +++++ + 2 files changed, 8 insertions(+) + +--- a/Documentation/devicetree/bindings/serial/pl011.txt ++++ b/Documentation/devicetree/bindings/serial/pl011.txt +@@ -35,6 +35,9 @@ Optional properties: + - poll-timeout-ms: + Poll timeout when auto-poll is set, default + 3000ms. ++- cts-event-workaround: ++ Enables the (otherwise vendor-specific) workaround for the ++ CTS-induced TX lockup. + + See also bindings/arm/primecell.txt + +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -2661,6 +2661,11 @@ static int pl011_probe(struct amba_devic + if (IS_ERR(uap->clk)) + return PTR_ERR(uap->clk); + ++ if (of_property_read_bool(dev->dev.of_node, "cts-event-workaround")) { ++ vendor->cts_event_workaround = true; ++ dev_info(&dev->dev, "cts_event_workaround enabled\n"); ++ } ++ + uap->reg_offset = vendor->reg_offset; + uap->vendor = vendor; + uap->fifosize = vendor->get_fifosize(dev); diff --git a/target/linux/brcm2708/patches-4.9/950-0011-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch b/target/linux/brcm2708/patches-4.19/950-0038-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch similarity index 63% rename from target/linux/brcm2708/patches-4.9/950-0011-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch rename to target/linux/brcm2708/patches-4.19/950-0038-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch index ae5215225..65f0ea36f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0011-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch +++ b/target/linux/brcm2708/patches-4.19/950-0038-pinctrl-bcm2835-Set-base-to-0-give-expected-gpio-num.patch @@ -1,7 +1,8 @@ -From ea9188a48450ddab740fe5ffe6733fb2362ea5c8 Mon Sep 17 00:00:00 2001 +From d52da4747de6ca008f86a73fbf153526c164c0ee Mon Sep 17 00:00:00 2001 From: notro Date: Thu, 10 Jul 2014 13:59:47 +0200 -Subject: [PATCH] pinctrl-bcm2835: Set base to 0 give expected gpio numbering +Subject: [PATCH 038/703] pinctrl-bcm2835: Set base to 0 give expected gpio + numbering Signed-off-by: Noralf Tronnes --- @@ -10,10 +11,10 @@ Signed-off-by: Noralf Tronnes --- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c +++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -380,7 +380,7 @@ static struct gpio_chip bcm2835_gpio_chi +@@ -352,7 +352,7 @@ static const struct gpio_chip bcm2835_gp + .get_direction = bcm2835_gpio_get_direction, .get = bcm2835_gpio_get, .set = bcm2835_gpio_set, - .to_irq = bcm2835_gpio_to_irq, - .base = -1, + .base = 0, .ngpio = BCM2835_NUM_GPIOS, diff --git a/target/linux/brcm2708/patches-4.9/950-0030-Main-bcm2708-bcm2709-linux-port.patch b/target/linux/brcm2708/patches-4.19/950-0039-Main-bcm2708-bcm2709-linux-port.patch similarity index 71% rename from target/linux/brcm2708/patches-4.9/950-0030-Main-bcm2708-bcm2709-linux-port.patch rename to target/linux/brcm2708/patches-4.19/950-0039-Main-bcm2708-bcm2709-linux-port.patch index 20e5419a7..0257095db 100644 --- a/target/linux/brcm2708/patches-4.9/950-0030-Main-bcm2708-bcm2709-linux-port.patch +++ b/target/linux/brcm2708/patches-4.19/950-0039-Main-bcm2708-bcm2709-linux-port.patch @@ -1,7 +1,7 @@ -From 9874eb6473865b9d975a7c3756099955e7454e21 Mon Sep 17 00:00:00 2001 +From 712b8ef1f284c70fc5612894c1a793c7d6b96eae Mon Sep 17 00:00:00 2001 From: popcornmix Date: Sun, 12 May 2013 12:24:19 +0100 -Subject: [PATCH] Main bcm2708/bcm2709 linux port +Subject: [PATCH 039/703] Main bcm2708/bcm2709 linux port MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -23,17 +23,18 @@ The watchdog driver already has support for reboot/poweroff. Make use of this and remove the code from the platform files. Signed-off-by: Noralf Trønnes + +board_bcm2835: Remove coherent dma pool increase - API has gone --- arch/arm/mach-bcm/Kconfig | 1 + - arch/arm/mach-bcm/board_bcm2835.c | 17 +++++++++++++++++ arch/arm/mm/proc-v6.S | 15 ++++++++++++--- drivers/irqchip/irq-bcm2835.c | 7 ++++++- drivers/mailbox/bcm2835-mailbox.c | 18 ++++++++++++++++-- - 5 files changed, 52 insertions(+), 6 deletions(-) + 4 files changed, 35 insertions(+), 6 deletions(-) --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig -@@ -155,6 +155,7 @@ config ARCH_BCM2835 +@@ -168,6 +168,7 @@ config ARCH_BCM2835 select FIQ select PINCTRL select PINCTRL_BCM2835 @@ -41,56 +42,6 @@ Signed-off-by: Noralf Trønnes help This enables support for the Broadcom BCM2835 and BCM2836 SoCs. This SoC is used in the Raspberry Pi and Roku 2 devices. ---- a/arch/arm/mach-bcm/board_bcm2835.c -+++ b/arch/arm/mach-bcm/board_bcm2835.c -@@ -16,17 +16,21 @@ - #include - #include - #include -+#include - #include - - #include - #include - -+#include -+ - static void __init bcm2835_init(void) - { - struct device_node *np = of_find_node_by_path("/system"); - u32 val; - u64 val64; - -+ vc_cma_early_init(); - bcm2835_init_clocks(); - - if (!of_property_read_u32(np, "linux,revision", &val)) -@@ -35,6 +39,17 @@ static void __init bcm2835_init(void) - system_serial_low = val64; - } - -+static void __init bcm2835_init_early(void) -+{ -+ /* dwc_otg needs this for bounce buffers on non-aligned transfers */ -+ init_dma_coherent_pool_size(SZ_1M); -+} -+ -+static void __init bcm2835_board_reserve(void) -+{ -+ vc_cma_reserve(); -+} -+ - static const char * const bcm2835_compat[] = { - #ifdef CONFIG_ARCH_MULTI_V6 - "brcm,bcm2835", -@@ -47,5 +62,7 @@ static const char * const bcm2835_compat - - DT_MACHINE_START(BCM2835, "BCM2835") - .init_machine = bcm2835_init, -+ .reserve = bcm2835_board_reserve, -+ .init_early = bcm2835_init_early, - .dt_compat = bcm2835_compat - MACHINE_END --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -73,10 +73,19 @@ ENDPROC(cpu_v6_reset) @@ -118,8 +69,8 @@ Signed-off-by: Noralf Trønnes ENTRY(cpu_v6_dcache_clean_area) --- a/drivers/irqchip/irq-bcm2835.c +++ b/drivers/irqchip/irq-bcm2835.c -@@ -54,7 +54,9 @@ - #include +@@ -52,7 +52,9 @@ + #include #include +#ifndef CONFIG_ARM64 @@ -128,7 +79,7 @@ Signed-off-by: Noralf Trønnes /* Put the bank and irq (32 bits) into the hwirq */ #define MAKE_HWIRQ(b, n) (((b) << 5) | (n)) -@@ -82,6 +84,7 @@ +@@ -80,6 +82,7 @@ #define NR_BANKS 3 #define IRQS_PER_BANK 32 #define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0) @@ -136,7 +87,7 @@ Signed-off-by: Noralf Trønnes #define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0)) static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 }; -@@ -256,10 +259,12 @@ static int __init armctrl_of_init(struct +@@ -247,10 +250,12 @@ static int __init armctrl_of_init(struct MAKE_HWIRQ(b, i) + NUMBER_IRQS); BUG_ON(irq <= 0); irq_set_chip(irq, &armctrl_chip); diff --git a/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch b/target/linux/brcm2708/patches-4.19/950-0040-Add-dwc_otg-driver.patch similarity index 98% rename from target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0040-Add-dwc_otg-driver.patch index 707e1a34a..8f0fe5596 100644 --- a/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0040-Add-dwc_otg-driver.patch @@ -1,7 +1,7 @@ -From 65f57e56fcf9d40383718f0bcd9e6f95a34ca1aa Mon Sep 17 00:00:00 2001 +From 21ea0e6ad04f26557d5d707f2848c576534d2fa0 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 1 May 2013 19:46:17 +0100 -Subject: [PATCH] Add dwc_otg driver +Subject: [PATCH 040/703] Add dwc_otg driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -501,78 +501,299 @@ dwc_otg: Pass struct device to dma_alloc*() This makes it possible to get the bus address from Device Tree. Signed-off-by: Noralf Trønnes + +dwc_otg: fix summarize urb->actual_length for isochronous transfers + +Kernel does not copy input data of ISO transfers to userspace +if actual_length is set only in ISO transfers and not summarized +in urb->actual_length. Fixes raspberrypi/linux#903 + +fiq_fsm: Use correct states when starting isoc OUT transfers + +In fiq_fsm_start_next_periodic() if an isochronous OUT transfer +was selected, no regard was given as to whether this was a single-packet +transfer or a multi-packet staged transfer. + +For single-packet transfers, this had the effect of repeatedly sending +OUT packets with bogus data and lengths. + +Eventually if the channel was repeatedly enabled enough times, this +would lock up the OTG core and no further bus transfers would happen. + +Set the FSM state up properly if we select a single-packet transfer. + +Fixes https://github.com/raspberrypi/linux/issues/1842 + +dwc_otg: make nak_holdoff work as intended with empty queues + +If URBs reading from non-periodic split endpoints were dequeued and +the last transfer from the endpoint was a NAK handshake, the resulting +qh->nak_frame value was stale which would result in unnecessarily long +polling intervals for the first subsequent transfer with a fresh URB. + +Fixup qh->nak_frame in dwc_otg_hcd_urb_dequeue and also guard against +a case where a single URB is submitted to the endpoint, a NAK was +received on the transfer immediately prior to receiving data and the +device subsequently resubmits another URB past the qh->nak_frame interval. + +Fixes https://github.com/raspberrypi/linux/issues/1709 + +dwc_otg: fix split transaction data toggle handling around dequeues + +See https://github.com/raspberrypi/linux/issues/1709 + +Fix several issues regarding endpoint state when URBs are dequeued +- If the HCD is disconnected, flush FIQ-enabled channels properly +- Save the data toggle state for bulk endpoints if the last transfer + from an endpoint where URBs were dequeued returned a data packet +- Reset hc->start_pkt_count properly in assign_and_init_hc() + +dwc_otg: fix several potential crash sources + +On root port disconnect events, the host driver state is cleared and +in-progress host channels are forcibly stopped. This doesn't play +well with the FIQ running in the background, so: +- Guard the disconnect callback with both the host spinlock and FIQ + spinlock +- Move qtd dereference in dwc_otg_handle_hc_fsm() after the early-out + so we don't dereference a qtd that has gone away +- Turn catch-all BUG()s in dwc_otg_handle_hc_fsm() into warnings. + +dwc_otg: delete hcd->channel_lock + +The lock serves no purpose as it is only held while the HCD spinlock +is already being held. + +dwc_otg: remove unnecessary dma-mode channel halts on disconnect interrupt + +Host channels are already halted in kill_urbs_in_qh_list() with the +subsequent interrupt processing behaving as if the URB was dequeued +via HCD callback. + +There's no need to clobber the host channel registers a second time +as this exposes races between the driver and host channel resulting +in hcd->free_hc_list becoming corrupted. + +dwcotg: Allow to build without FIQ on ARM64 + +Signed-off-by: popcornmix + +dwc_otg: make periodic scheduling behave properly for FS buses + +If the root port is in full-speed mode, transfer times at 12mbit/s +would be calculated but matched against high-speed quotas. + +Reinitialise hcd->frame_usecs[i] on each port enable event so that +full-speed bandwidth can be tracked sensibly. + +Also, don't bother using the FIQ for transfers when in full-speed +mode - at the slower bus speed, interrupt frequency is reduced by +an order of magnitude. + +Related issue: https://github.com/raspberrypi/linux/issues/2020 + +dwc_otg: fiq_fsm: Make isochronous compatibility checks work properly + +Get rid of the spammy printk and local pointer mangling. +Also, there is a nominal benefit for using fiq_fsm for isochronous +transfers in FS mode (~1.1k IRQs per second vs 2.1k IRQs per second) +so remove the root port speed check. + +dwc_otg: add module parameter int_ep_interval_min + +Add a module parameter (defaulting to ignored) that clamps the polling rate +of high-speed Interrupt endpoints to a minimum microframe interval. + +The parameter is modifiable at runtime as it is used when activating new +endpoints (such as on device connect). + +dwc_otg: fiq_fsm: Add non-periodic TT exclusivity constraints + +Certain hub types do not discriminate between pipe direction (IN or OUT) +when considering non-periodic transfers. Therefore these hubs get confused +if multiple transfers are issued in different directions with the same +device address and endpoint number. + +Constrain queuing non-periodic split transactions so they are performed +serially in such cases. + +Related: https://github.com/raspberrypi/linux/issues/2024 + +dwc_otg: Fixup change to DRIVER_ATTR interface + +dwc_otg: Fix compilation warnings + +Signed-off-by: Phil Elwell + +USB_DWCOTG: Disable building dwc_otg as a module (#2265) + +When dwc_otg is built as a module, build will fail with the following +error: + +ERROR: "DWC_TASK_HI_SCHEDULE" [drivers/usb/host/dwc_otg/dwc_otg.ko] undefined! +scripts/Makefile.modpost:91: recipe for target '__modpost' failed +make[1]: *** [__modpost] Error 1 +Makefile:1199: recipe for target 'modules' failed +make: *** [modules] Error 2 + +Even if the error is solved by including the missing +DWC_TASK_HI_SCHEDULE function, the kernel will panic when loading +dwc_otg. + +As a workaround, simply prevent user from building dwc_otg as a module +as the current kernel does not support it. + +See: https://github.com/raspberrypi/linux/issues/2258 + +Signed-off-by: Malik Olivier Boussejra + +dwc_otg: New timer API + +dwc_otg: Fix removed ACCESS_ONCE->READ_ONCE + +dwc_otg: don't unconditionally force host mode in dwc_otg_cil_init() + +Add the ability to disable force_host_mode for those that want to use +dwc_otg in both device and host modes. + +dwc_otg: Fix a regression when dequeueing isochronous transfers + +In 282bed95 (dwc_otg: make nak_holdoff work as intended with empty queues) +the dequeue mechanism was changed to leave FIQ-enabled transfers to run +to completion - to avoid leaving hub TT buffers with stale packets lying +around. + +This broke FIQ-accelerated isochronous transfers, as this then meant that +dozens of transfers were performed after the dequeue function returned. + +Restore the state machine fence for isochronous transfers. + +fiq_fsm: rewind DMA pointer for OUT transactions that fail (#2288) + +See: https://github.com/raspberrypi/linux/issues/2140 + +dwc_otg: add smp_mb() to prevent driver state corruption on boot + +Occasional crashes have been seen where the FIQ code dereferences +invalid/random pointers immediately after being set up, leading to +panic on boot. + +The crash occurs as the FIQ code races against hcd_init_fiq() and +the hcd_init_fiq() code races against the outstanding memory stores +from dwc_otg_hcd_init(). Use explicit barriers after touching +driver state. + +usb: dwc_otg: fix memory corruption in dwc_otg driver + +[Upstream commit 51b1b6491752ac066ee8d32cc66042fcc955fef6] + +The move from the staging tree to the main tree exposed a +longstanding memory corruption bug in the dwc2 driver. The +reordering of the driver initialization caused the dwc2 driver +to corrupt the initialization data of the sdhci driver on the +Raspberry Pi platform, which made the bug show up. + +The error is in calling to_usb_device(hsotg->dev), since ->dev +is not a member of struct usb_device. The easiest fix is to +just remove the offending code, since it is not really needed. + +Thanks to Stephen Warren for tracking down the cause of this. + +Reported-by: Andre Heider +Tested-by: Stephen Warren +Signed-off-by: Paul Zimmerman +Signed-off-by: Greg Kroah-Hartman +[lukas: port from upstream dwc2 to out-of-tree dwc_otg driver] +Signed-off-by: Lukas Wunner + +usb: dwb_otg: Fix unreachable switch statement warning + +This warning appears with GCC 7.3.0 from toolchains.bootlin.com: + +../drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c: In function ‘fiq_fsm_update_hs_isoc’: +../drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c:595:61: warning: statement will never be executed [-Wswitch-unreachable] + st->hctsiz_copy.b.xfersize = nrpackets * st->hcchar_copy.b.mps; + ~~~~~~~~~~~~~~~~~^~~~ + +Signed-off-by: Nathan Chancellor + +dwc_otg: fiq_fsm: fix incorrect DMA register offset calculation + +Rationalise the offset and update all call sites. + +Fixes https://github.com/raspberrypi/linux/issues/2408 --- - arch/arm/include/asm/irqflags.h | 16 +- - arch/arm/kernel/fiqasm.S | 4 + - drivers/usb/Makefile | 1 + - drivers/usb/core/generic.c | 1 + - drivers/usb/core/hub.c | 2 +- - drivers/usb/core/message.c | 79 + - drivers/usb/core/otg_whitelist.h | 114 +- - drivers/usb/gadget/file_storage.c | 3676 ++++++++++ - drivers/usb/host/Kconfig | 13 + - drivers/usb/host/Makefile | 2 + - drivers/usb/host/dwc_common_port/Makefile | 58 + - drivers/usb/host/dwc_common_port/Makefile.fbsd | 17 + - drivers/usb/host/dwc_common_port/Makefile.linux | 49 + - drivers/usb/host/dwc_common_port/changes.txt | 174 + - drivers/usb/host/dwc_common_port/doc/doxygen.cfg | 270 + - drivers/usb/host/dwc_common_port/dwc_cc.c | 532 ++ - drivers/usb/host/dwc_common_port/dwc_cc.h | 224 + - drivers/usb/host/dwc_common_port/dwc_common_fbsd.c | 1308 ++++ - .../usb/host/dwc_common_port/dwc_common_linux.c | 1418 ++++ - drivers/usb/host/dwc_common_port/dwc_common_nbsd.c | 1275 ++++ - drivers/usb/host/dwc_common_port/dwc_crypto.c | 308 + - drivers/usb/host/dwc_common_port/dwc_crypto.h | 111 + - drivers/usb/host/dwc_common_port/dwc_dh.c | 291 + - drivers/usb/host/dwc_common_port/dwc_dh.h | 106 + - drivers/usb/host/dwc_common_port/dwc_list.h | 594 ++ - drivers/usb/host/dwc_common_port/dwc_mem.c | 245 + - drivers/usb/host/dwc_common_port/dwc_modpow.c | 636 ++ - drivers/usb/host/dwc_common_port/dwc_modpow.h | 34 + - drivers/usb/host/dwc_common_port/dwc_notifier.c | 319 + - drivers/usb/host/dwc_common_port/dwc_notifier.h | 122 + - drivers/usb/host/dwc_common_port/dwc_os.h | 1276 ++++ - drivers/usb/host/dwc_common_port/usb.h | 946 +++ - drivers/usb/host/dwc_otg/Makefile | 82 + - drivers/usb/host/dwc_otg/doc/doxygen.cfg | 224 + - drivers/usb/host/dwc_otg/dummy_audio.c | 1574 +++++ - drivers/usb/host/dwc_otg/dwc_cfi_common.h | 142 + - drivers/usb/host/dwc_otg/dwc_otg_adp.c | 854 +++ - drivers/usb/host/dwc_otg/dwc_otg_adp.h | 80 + - drivers/usb/host/dwc_otg/dwc_otg_attr.c | 1210 ++++ - drivers/usb/host/dwc_otg/dwc_otg_attr.h | 89 + - drivers/usb/host/dwc_otg/dwc_otg_cfi.c | 1876 +++++ - drivers/usb/host/dwc_otg/dwc_otg_cfi.h | 320 + - drivers/usb/host/dwc_otg/dwc_otg_cil.c | 7141 ++++++++++++++++++++ - drivers/usb/host/dwc_otg/dwc_otg_cil.h | 1464 ++++ - drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 1594 +++++ - drivers/usb/host/dwc_otg/dwc_otg_core_if.h | 705 ++ - drivers/usb/host/dwc_otg/dwc_otg_dbg.h | 117 + - drivers/usb/host/dwc_otg/dwc_otg_driver.c | 1757 +++++ - drivers/usb/host/dwc_otg/dwc_otg_driver.h | 86 + - drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 1355 ++++ - drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 370 + - drivers/usb/host/dwc_otg/dwc_otg_fiq_stub.S | 80 + - drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4260 ++++++++++++ - drivers/usb/host/dwc_otg/dwc_otg_hcd.h | 868 +++ - drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c | 1139 ++++ - drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h | 417 ++ - drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 2727 ++++++++ - drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 1005 +++ - drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c | 963 +++ - drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 188 + - drivers/usb/host/dwc_otg/dwc_otg_pcd.c | 2725 ++++++++ - drivers/usb/host/dwc_otg/dwc_otg_pcd.h | 273 + - drivers/usb/host/dwc_otg/dwc_otg_pcd_if.h | 361 + - drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c | 5148 ++++++++++++++ - drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c | 1280 ++++ - drivers/usb/host/dwc_otg/dwc_otg_regs.h | 2550 +++++++ - drivers/usb/host/dwc_otg/test/Makefile | 16 + - drivers/usb/host/dwc_otg/test/dwc_otg_test.pm | 337 + - drivers/usb/host/dwc_otg/test/test_mod_param.pl | 133 + - drivers/usb/host/dwc_otg/test/test_sysfs.pl | 193 + - 70 files changed, 59908 insertions(+), 16 deletions(-) + arch/arm/include/asm/irqflags.h | 16 +- + arch/arm/kernel/fiqasm.S | 4 + + drivers/usb/Makefile | 1 + + drivers/usb/core/generic.c | 1 + + drivers/usb/core/hub.c | 2 +- + drivers/usb/core/message.c | 79 + + drivers/usb/core/otg_whitelist.h | 114 +- + drivers/usb/gadget/file_storage.c | 3676 +++++++++ + drivers/usb/host/Kconfig | 10 + + drivers/usb/host/Makefile | 2 + + drivers/usb/host/dwc_common_port/Makefile | 58 + + .../usb/host/dwc_common_port/Makefile.fbsd | 17 + + .../usb/host/dwc_common_port/Makefile.linux | 49 + + drivers/usb/host/dwc_common_port/changes.txt | 174 + + .../usb/host/dwc_common_port/doc/doxygen.cfg | 270 + + drivers/usb/host/dwc_common_port/dwc_cc.c | 532 ++ + drivers/usb/host/dwc_common_port/dwc_cc.h | 224 + + .../host/dwc_common_port/dwc_common_fbsd.c | 1308 +++ + .../host/dwc_common_port/dwc_common_linux.c | 1409 ++++ + .../host/dwc_common_port/dwc_common_nbsd.c | 1275 +++ + drivers/usb/host/dwc_common_port/dwc_crypto.c | 308 + + drivers/usb/host/dwc_common_port/dwc_crypto.h | 111 + + drivers/usb/host/dwc_common_port/dwc_dh.c | 291 + + drivers/usb/host/dwc_common_port/dwc_dh.h | 106 + + drivers/usb/host/dwc_common_port/dwc_list.h | 594 ++ + drivers/usb/host/dwc_common_port/dwc_mem.c | 245 + + drivers/usb/host/dwc_common_port/dwc_modpow.c | 636 ++ + drivers/usb/host/dwc_common_port/dwc_modpow.h | 34 + + .../usb/host/dwc_common_port/dwc_notifier.c | 319 + + .../usb/host/dwc_common_port/dwc_notifier.h | 122 + + drivers/usb/host/dwc_common_port/dwc_os.h | 1276 +++ + drivers/usb/host/dwc_common_port/usb.h | 946 +++ + drivers/usb/host/dwc_otg/Makefile | 82 + + drivers/usb/host/dwc_otg/doc/doxygen.cfg | 224 + + drivers/usb/host/dwc_otg/dummy_audio.c | 1574 ++++ + drivers/usb/host/dwc_otg/dwc_cfi_common.h | 142 + + drivers/usb/host/dwc_otg/dwc_otg_adp.c | 854 ++ + drivers/usb/host/dwc_otg/dwc_otg_adp.h | 80 + + drivers/usb/host/dwc_otg/dwc_otg_attr.c | 1212 +++ + drivers/usb/host/dwc_otg/dwc_otg_attr.h | 89 + + drivers/usb/host/dwc_otg/dwc_otg_cfi.c | 1876 +++++ + drivers/usb/host/dwc_otg/dwc_otg_cfi.h | 320 + + drivers/usb/host/dwc_otg/dwc_otg_cil.c | 7146 +++++++++++++++++ + drivers/usb/host/dwc_otg/dwc_otg_cil.h | 1464 ++++ + drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 1596 ++++ + drivers/usb/host/dwc_otg/dwc_otg_core_if.h | 705 ++ + drivers/usb/host/dwc_otg/dwc_otg_dbg.h | 117 + + drivers/usb/host/dwc_otg/dwc_otg_driver.c | 1767 ++++ + drivers/usb/host/dwc_otg/dwc_otg_driver.h | 86 + + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 1401 ++++ + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 372 + + drivers/usb/host/dwc_otg/dwc_otg_fiq_stub.S | 80 + + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4297 ++++++++++ + drivers/usb/host/dwc_otg/dwc_otg_hcd.h | 870 ++ + drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c | 1134 +++ + drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h | 417 + + drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 2752 +++++++ + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 1002 +++ + drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c | 971 +++ + drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 188 + + drivers/usb/host/dwc_otg/dwc_otg_pcd.c | 2725 +++++++ + drivers/usb/host/dwc_otg/dwc_otg_pcd.h | 273 + + drivers/usb/host/dwc_otg/dwc_otg_pcd_if.h | 361 + + drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c | 5148 ++++++++++++ + drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c | 1280 +++ + drivers/usb/host/dwc_otg/dwc_otg_regs.h | 2550 ++++++ + drivers/usb/host/dwc_otg/test/Makefile | 16 + + drivers/usb/host/dwc_otg/test/dwc_otg_test.pm | 337 + + .../usb/host/dwc_otg/test/test_mod_param.pl | 133 + + drivers/usb/host/dwc_otg/test/test_sysfs.pl | 193 + + 70 files changed, 60027 insertions(+), 16 deletions(-) create mode 100644 drivers/usb/gadget/file_storage.c create mode 100644 drivers/usb/host/dwc_common_port/Makefile create mode 100644 drivers/usb/host/dwc_common_port/Makefile.fbsd @@ -637,7 +858,7 @@ Signed-off-by: Noralf Trønnes --- a/arch/arm/include/asm/irqflags.h +++ b/arch/arm/include/asm/irqflags.h -@@ -162,13 +162,23 @@ static inline unsigned long arch_local_s +@@ -163,13 +163,23 @@ static inline unsigned long arch_local_s } /* @@ -676,7 +897,7 @@ Signed-off-by: Noralf Trønnes +ENDPROC(__FIQ_Branch) --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile -@@ -7,6 +7,7 @@ +@@ -8,6 +8,7 @@ obj-$(CONFIG_USB) += core/ obj-$(CONFIG_USB_SUPPORT) += phy/ @@ -686,7 +907,7 @@ Signed-off-by: Noralf Trønnes obj-$(CONFIG_USB_ISP1760) += isp1760/ --- a/drivers/usb/core/generic.c +++ b/drivers/usb/core/generic.c -@@ -152,6 +152,7 @@ int usb_choose_configuration(struct usb_ +@@ -154,6 +154,7 @@ int usb_choose_configuration(struct usb_ dev_warn(&udev->dev, "no configuration chosen from %d choice%s\n", num_configs, plural(num_configs)); @@ -696,18 +917,18 @@ Signed-off-by: Noralf Trønnes } --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c -@@ -5074,7 +5074,7 @@ static void port_event(struct usb_hub *h - if (portchange & USB_PORT_STAT_C_OVERCURRENT) { +@@ -5207,7 +5207,7 @@ static void port_event(struct usb_hub *h u16 status = 0, unused; + port_dev->over_current_count++; -- dev_dbg(&port_dev->dev, "over-current change\n"); -+ dev_notice(&port_dev->dev, "over-current change\n"); +- dev_dbg(&port_dev->dev, "over-current change #%u\n", ++ dev_notice(&port_dev->dev, "over-current change #%u\n", + port_dev->over_current_count); usb_clear_port_feature(hdev, port1, USB_PORT_FEAT_C_OVER_CURRENT); - msleep(100); /* Cool down */ --- a/drivers/usb/core/message.c +++ b/drivers/usb/core/message.c -@@ -1923,6 +1923,85 @@ free_interfaces: +@@ -1993,6 +1993,85 @@ free_interfaces: if (cp->string == NULL && !(dev->quirks & USB_QUIRK_CONFIG_INTF_STRINGS)) cp->string = usb_cache_string(dev, cp->desc.iConfiguration); @@ -795,7 +1016,7 @@ Signed-off-by: Noralf Trønnes usb_unlocked_enable_lpm(dev); --- a/drivers/usb/core/otg_whitelist.h +++ b/drivers/usb/core/otg_whitelist.h -@@ -19,33 +19,82 @@ +@@ -15,33 +15,82 @@ static struct usb_device_id whitelist_table[] = { /* hubs are optional in OTG, but very handy ... */ @@ -884,7 +1105,7 @@ Signed-off-by: Noralf Trønnes static int is_targeted(struct usb_device *dev) { struct usb_device_id *id = whitelist_table; -@@ -95,16 +144,57 @@ static int is_targeted(struct usb_device +@@ -91,16 +140,57 @@ static int is_targeted(struct usb_device continue; return 1; @@ -4629,29 +4850,26 @@ Signed-off-by: Noralf Trønnes +module_exit(fsg_cleanup); --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig -@@ -754,6 +754,19 @@ config USB_HWA_HCD +@@ -748,6 +748,16 @@ config USB_HWA_HCD To compile this driver a module, choose M here: the module will be called "hwa-hc". +config USB_DWCOTG -+ tristate "Synopsis DWC host support" -+ depends on USB ++ bool "Synopsis DWC host support" ++ depends on USB && (FIQ || ARM64) + help + The Synopsis DWC controller is a dual-role + host/peripheral/OTG ("On The Go") USB controllers. + + Enable this option to support this IP in host controller mode. + If unsure, say N. -+ -+ To compile this driver as a module, choose M here: the -+ modules built will be called dwc_otg and dwc_common_port. + config USB_IMX21_HCD tristate "i.MX21 HCD support" depends on ARM && ARCH_MXC --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile -@@ -74,6 +74,8 @@ obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o +@@ -83,6 +83,8 @@ obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o @@ -7318,7 +7536,7 @@ Signed-off-by: Noralf Trønnes +} --- /dev/null +++ b/drivers/usb/host/dwc_common_port/dwc_common_linux.c -@@ -0,0 +1,1418 @@ +@@ -0,0 +1,1409 @@ +#include +#include +#include @@ -8025,7 +8243,7 @@ Signed-off-by: Noralf Trønnes +/* Timers */ + +struct dwc_timer { -+ struct timer_list *t; ++ struct timer_list t; + char *name; + dwc_timer_callback_t cb; + void *data; @@ -8033,9 +8251,9 @@ Signed-off-by: Noralf Trønnes + dwc_spinlock_t *lock; +}; + -+static void timer_callback(unsigned long data) ++static void timer_callback(struct timer_list *tt) +{ -+ dwc_timer_t *timer = (dwc_timer_t *)data; ++ dwc_timer_t *timer = from_timer(timer, tt, t); + dwc_irqflags_t flags; + + DWC_SPINLOCK_IRQSAVE(timer->lock, &flags); @@ -8054,12 +8272,6 @@ Signed-off-by: Noralf Trønnes + return NULL; + } + -+ t->t = DWC_ALLOC(sizeof(*t->t)); -+ if (!t->t) { -+ DWC_ERROR("Cannot allocate memory for timer->t"); -+ goto no_timer; -+ } -+ + t->name = DWC_STRDUP(name); + if (!t->name) { + DWC_ERROR("Cannot allocate memory for timer->name"); @@ -8077,8 +8289,8 @@ Signed-off-by: Noralf Trønnes + } + + t->scheduled = 0; -+ t->t->expires = jiffies; -+ setup_timer(t->t, timer_callback, (unsigned long)t); ++ t->t.expires = jiffies; ++ timer_setup(&t->t, timer_callback, 0); + + t->cb = cb; + t->data = data; @@ -8088,8 +8300,6 @@ Signed-off-by: Noralf Trønnes + no_lock: + DWC_FREE(t->name); + no_name: -+ DWC_FREE(t->t); -+ no_timer: + DWC_FREE(t); + return NULL; +} @@ -8101,13 +8311,12 @@ Signed-off-by: Noralf Trønnes + DWC_SPINLOCK_IRQSAVE(timer->lock, &flags); + + if (timer->scheduled) { -+ del_timer(timer->t); ++ del_timer(&timer->t); + timer->scheduled = 0; + } + + DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags); + DWC_SPINLOCK_FREE(timer->lock); -+ DWC_FREE(timer->t); + DWC_FREE(timer->name); + DWC_FREE(timer); +} @@ -8121,11 +8330,11 @@ Signed-off-by: Noralf Trønnes + if (!timer->scheduled) { + timer->scheduled = 1; + DWC_DEBUGC("Scheduling timer %s to expire in +%d msec", timer->name, time); -+ timer->t->expires = jiffies + msecs_to_jiffies(time); -+ add_timer(timer->t); ++ timer->t.expires = jiffies + msecs_to_jiffies(time); ++ add_timer(&timer->t); + } else { + DWC_DEBUGC("Modifying timer %s to expire in +%d msec", timer->name, time); -+ mod_timer(timer->t, jiffies + msecs_to_jiffies(time)); ++ mod_timer(&timer->t, jiffies + msecs_to_jiffies(time)); + } + + DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags); @@ -8133,7 +8342,7 @@ Signed-off-by: Noralf Trønnes + +void DWC_TIMER_CANCEL(dwc_timer_t *timer) +{ -+ del_timer(timer->t); ++ del_timer(&timer->t); +} + + @@ -18015,7 +18224,7 @@ Signed-off-by: Noralf Trønnes +#endif //__DWC_OTG_ADP_H__ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_attr.c -@@ -0,0 +1,1210 @@ +@@ -0,0 +1,1212 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.c $ + * $Revision: #44 $ @@ -18936,9 +19145,11 @@ Signed-off-by: Noralf Trønnes +static ssize_t spramdump_show(struct device *_dev, + struct device_attribute *attr, char *buf) +{ -+ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++#if 0 ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); + -+ //dwc_otg_dump_spram(otg_dev->core_if); ++ dwc_otg_dump_spram(otg_dev->core_if); ++#endif + + return sprintf(buf, "SPRAM Dump\n"); +} @@ -21522,7 +21733,7 @@ Signed-off-by: Noralf Trønnes +#endif /* (__DWC_OTG_CFI_H__) */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_cil.c -@@ -0,0 +1,7141 @@ +@@ -0,0 +1,7146 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil.c $ + * $Revision: #191 $ @@ -21586,6 +21797,8 @@ Signed-off-by: Noralf Trønnes +#include "dwc_otg_regs.h" +#include "dwc_otg_cil.h" + ++extern bool cil_force_host; ++ +static int dwc_otg_setup_params(dwc_otg_core_if_t * core_if); + +/** @@ -21717,7 +21930,10 @@ Signed-off-by: Noralf Trønnes + core_if->hptxfsiz.d32 = + DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz); + gusbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); -+ gusbcfg.b.force_host_mode = 1; ++ if (cil_force_host) ++ gusbcfg.b.force_host_mode = 1; ++ else ++ gusbcfg.b.force_host_mode = 0; + DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32); + dwc_mdelay(100); + } @@ -30133,7 +30349,7 @@ Signed-off-by: Noralf Trønnes +#endif --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c -@@ -0,0 +1,1594 @@ +@@ -0,0 +1,1596 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil_intr.c $ + * $Revision: #32 $ @@ -31109,7 +31325,9 @@ Signed-off-by: Noralf Trønnes + } else { + if (core_if->op_state == A_HOST) { + /* A-Cable still connected but device disconnected. */ ++ DWC_SPINUNLOCK(core_if->lock); + cil_hcd_disconnect(core_if); ++ DWC_SPINLOCK(core_if->lock); + if (core_if->adp_enable) { + gpwrdn_data_t gpwrdn = { .d32 = 0 }; + cil_hcd_stop(core_if); @@ -32558,7 +32776,7 @@ Signed-off-by: Noralf Trønnes +#endif --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c -@@ -0,0 +1,1757 @@ +@@ -0,0 +1,1767 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $ + * $Revision: #92 $ @@ -32808,8 +33026,12 @@ Signed-off-by: Noralf Trønnes +//Bulk split-transaction NAK holdoff in microframes +uint16_t nak_holdoff = 8; + ++//Force host mode during CIL re-init ++bool cil_force_host = true; ++ +unsigned short fiq_fsm_mask = 0x0F; + ++unsigned short int_ep_interval_min = 0; +/** + * This function shows the Driver Version. + */ @@ -32819,7 +33041,7 @@ Signed-off-by: Noralf Trønnes + DWC_DRIVER_VERSION); +} + -+static DRIVER_ATTR(version, S_IRUGO, version_show, NULL); ++static DRIVER_ATTR_RO(version); + +/** + * Global Debug Level Mask. @@ -32829,7 +33051,7 @@ Signed-off-by: Noralf Trønnes +/** + * This function shows the driver Debug Level. + */ -+static ssize_t dbg_level_show(struct device_driver *drv, char *buf) ++static ssize_t debuglevel_show(struct device_driver *drv, char *buf) +{ + return sprintf(buf, "0x%0x\n", g_dbg_lvl); +} @@ -32837,15 +33059,14 @@ Signed-off-by: Noralf Trønnes +/** + * This function stores the driver Debug Level. + */ -+static ssize_t dbg_level_store(struct device_driver *drv, const char *buf, ++static ssize_t debuglevel_store(struct device_driver *drv, const char *buf, + size_t count) +{ + g_dbg_lvl = simple_strtoul(buf, NULL, 16); + return count; +} + -+static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show, -+ dbg_level_store); ++static DRIVER_ATTR_RW(debuglevel); + +/** + * This function is called during module intialization @@ -33959,7 +34180,14 @@ Signed-off-by: Noralf Trønnes + "Bit 1 : Periodic split transactions\n" + "Bit 2 : High-speed multi-transfer isochronous\n" + "All other bits should be set 0."); ++module_param(int_ep_interval_min, ushort, 0644); ++MODULE_PARM_DESC(int_ep_interval_min, "Clamp high-speed Interrupt endpoints to a minimum polling interval.\n" ++ "0..1 = Use endpoint default\n" ++ "2..n = Minimum interval n microframes. Use powers of 2.\n"); + ++module_param(cil_force_host, bool, 0644); ++MODULE_PARM_DESC(cil_force_host, "On a connector-ID status change, " ++ "force Host Mode regardless of OTG state."); + +/** @page "Module Parameters" + * @@ -34407,7 +34635,7 @@ Signed-off-by: Noralf Trønnes +#endif --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c -@@ -0,0 +1,1355 @@ +@@ -0,0 +1,1401 @@ +/* + * dwc_otg_fiq_fsm.c - The finite state machine FIQ + * @@ -34494,7 +34722,6 @@ Signed-off-by: Noralf Trønnes + unsigned long tmp; + uint32_t newval; + fiq_lock_t lockval; -+ smp_mb__before_spinlock(); + /* Nested locking, yay. If we are on the same CPU as the fiq, then the disable + * will be sufficient. If we are on a different CPU, then the lock protects us. */ + prefetchw(&lock->slock); @@ -34510,7 +34737,7 @@ Signed-off-by: Noralf Trønnes + + while (lockval.tickets.next != lockval.tickets.owner) { + wfe(); -+ lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner); ++ lockval.tickets.owner = READ_ONCE(lock->tickets.owner); + } + smp_mb(); +} @@ -34584,6 +34811,32 @@ Signed-off-by: Noralf Trønnes + mb(); +} + ++/** ++ * fiq_fsm_restart_np_pending() - Restart a single non-periodic contended transfer ++ * @st: Pointer to the channel's state ++ * @num_channels: Total number of host channels ++ * @orig_channel: Channel index of completed transfer ++ * ++ * In the case where an IN and OUT transfer are simultaneously scheduled to the ++ * same device/EP, inadequate hub implementations will misbehave. Once the first ++ * transfer is complete, a pending non-periodic split can then be issued. ++ */ ++static void notrace fiq_fsm_restart_np_pending(struct fiq_state *st, int num_channels, int orig_channel) ++{ ++ int i; ++ int dev_addr = st->channel[orig_channel].hcchar_copy.b.devaddr; ++ int ep_num = st->channel[orig_channel].hcchar_copy.b.epnum; ++ for (i = 0; i < num_channels; i++) { ++ if (st->channel[i].fsm == FIQ_NP_SSPLIT_PENDING && ++ st->channel[i].hcchar_copy.b.devaddr == dev_addr && ++ st->channel[i].hcchar_copy.b.epnum == ep_num) { ++ st->channel[i].fsm = FIQ_NP_SSPLIT_STARTED; ++ fiq_fsm_restart_channel(st, i, 0); ++ break; ++ } ++ } ++} ++ +static inline int notrace fiq_get_xfer_len(struct fiq_state *st, int n) +{ + /* The xfersize register is a bit wonky. For IN transfers, it decrements by the packet size. */ @@ -34618,7 +34871,7 @@ Signed-off-by: Noralf Trønnes + BUG(); + + hcdma.d32 = (dma_addr_t) &blob->channel[n].index[i].buf[0]; -+ FIQ_WRITE(st->dwc_regs_base + HC_DMA + (HC_OFFSET * n), hcdma.d32); ++ FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA, hcdma.d32); + st->channel[n].dma_info.index = i; + return 0; +} @@ -34635,6 +34888,15 @@ Signed-off-by: Noralf Trønnes +} + +/** ++ * fiq_fsm_reload_hcdma() - for OUT transactions, rewind DMA pointer ++ */ ++static void notrace fiq_fsm_reload_hcdma(struct fiq_state *st, int n) ++{ ++ hcdma_data_t hcdma = st->channel[n].hcdma_copy; ++ FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA, hcdma.d32); ++} ++ ++/** + * fiq_iso_out_advance() - update DMA address and split position bits + * for isochronous OUT transactions. + * @@ -34661,7 +34923,7 @@ Signed-off-by: Noralf Trønnes + + /* New DMA address - address of bounce buffer referred to in index */ + hcdma.d32 = (uint32_t) &blob->channel[n].index[i].buf[0]; -+ //hcdma.d32 = FIQ_READ(st->dwc_regs_base + HC_DMA + (HC_OFFSET * n)); ++ //hcdma.d32 = FIQ_READ(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA); + //hcdma.d32 += st->channel[n].dma_info.slot_len[i]; + fiq_print(FIQDBG_INT, st, "LAST: %01d ", last); + fiq_print(FIQDBG_INT, st, "LEN: %03d", st->channel[n].dma_info.slot_len[i]); @@ -34676,7 +34938,7 @@ Signed-off-by: Noralf Trønnes + st->channel[n].dma_info.index++; + FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HCSPLT, hcsplt.d32); + FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HCTSIZ, hctsiz.d32); -+ FIQ_WRITE(st->dwc_regs_base + HC_DMA + (HC_OFFSET * n), hcdma.d32); ++ FIQ_WRITE(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA, hcdma.d32); + return last; +} + @@ -34884,7 +35146,10 @@ Signed-off-by: Noralf Trønnes + if (st->channel[n].fsm == FIQ_PER_ISO_OUT_PENDING) { + if (!fiq_fsm_tt_in_use(st, num_channels, n)) { + fiq_print(FIQDBG_INT, st, "NEXTISO "); -+ st->channel[n].fsm = FIQ_PER_ISO_OUT_ACTIVE; ++ if (st->channel[n].nrpackets == 1) ++ st->channel[n].fsm = FIQ_PER_ISO_OUT_LAST; ++ else ++ st->channel[n].fsm = FIQ_PER_ISO_OUT_ACTIVE; + fiq_fsm_restart_channel(st, n, 0); + break; + } @@ -34920,7 +35185,7 @@ Signed-off-by: Noralf Trønnes + + /* grab the next DMA address offset from the array */ + hcdma.d32 = st->hcdma_copy.d32 + st->hs_isoc_info.iso_desc[st->hs_isoc_info.index].offset; -+ FIQ_WRITE(state->dwc_regs_base + HC_DMA + (HC_OFFSET * n), hcdma.d32); ++ FIQ_WRITE(state->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA, hcdma.d32); + + /* We need to set multi_count. This is a bit tricky - has to be set per-transaction as + * the core needs to be told to send the correct number. Caution: for IN transfers, @@ -34947,8 +35212,8 @@ Signed-off-by: Noralf Trønnes + } + + } else { -+ switch (st->hcchar_copy.b.multicnt) { + st->hctsiz_copy.b.xfersize = nrpackets * st->hcchar_copy.b.mps; ++ switch (st->hcchar_copy.b.multicnt) { + case 1: + st->hctsiz_copy.b.pid = DWC_PID_DATA0; + break; @@ -35192,11 +35457,14 @@ Signed-off-by: Noralf Trønnes + fiq_fsm_setup_csplit(state, n); + } else if (hcint.b.nak) { + // No buffer space in TT. Retry on a uframe boundary. ++ fiq_fsm_reload_hcdma(state, n); + st->fsm = FIQ_NP_SSPLIT_RETRY; + handled = 1; + } else if (hcint.b.xacterr) { + // The only other one we care about is xacterr. This implies HS bus error - retry. + st->nr_errors++; ++ if(st->hcchar_copy.b.epdir == 0) ++ fiq_fsm_reload_hcdma(state, n); + st->fsm = FIQ_NP_SSPLIT_RETRY; + if (st->nr_errors >= 3) { + st->fsm = FIQ_NP_SPLIT_HS_ABORTED; @@ -35260,6 +35528,9 @@ Signed-off-by: Noralf Trønnes + st->fsm = FIQ_NP_SPLIT_HS_ABORTED; + } + } ++ if (st->fsm != FIQ_NP_IN_CSPLIT_RETRY) { ++ fiq_fsm_restart_np_pending(state, num_channels, n); ++ } + break; + + case FIQ_NP_OUT_CSPLIT_RETRY: @@ -35309,6 +35580,9 @@ Signed-off-by: Noralf Trønnes + st->fsm = FIQ_NP_SPLIT_HS_ABORTED; + } + } ++ if (st->fsm != FIQ_NP_OUT_CSPLIT_RETRY) { ++ fiq_fsm_restart_np_pending(state, num_channels, n); ++ } + break; + + /* Periodic split states (except isoc out) */ @@ -35765,7 +36039,7 @@ Signed-off-by: Noralf Trønnes +} --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h -@@ -0,0 +1,370 @@ +@@ -0,0 +1,372 @@ +/* + * dwc_otg_fiq_fsm.h - Finite state machine FIQ header definitions + * @@ -35862,7 +36136,7 @@ Signed-off-by: Noralf Trønnes +#define HC_START 0x500 +#define HC_OFFSET 0x020 + -+#define HC_DMA 0x514 ++#define HC_DMA 0x14 + +#define HCCHAR 0x00 +#define HCSPLT 0x04 @@ -35938,6 +36212,8 @@ Signed-off-by: Noralf Trønnes + /* Nonperiodic state groups */ + FIQ_NP_SSPLIT_STARTED = 1, + FIQ_NP_SSPLIT_RETRY = 2, ++ /* TT contention - working around hub bugs */ ++ FIQ_NP_SSPLIT_PENDING = 33, + FIQ_NP_OUT_CSPLIT_RETRY = 3, + FIQ_NP_IN_CSPLIT_RETRY = 4, + FIQ_NP_SPLIT_DONE = 5, @@ -36221,7 +36497,7 @@ Signed-off-by: Noralf Trønnes +END(_dwc_otg_fiq_stub) --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -@@ -0,0 +1,4260 @@ +@@ -0,0 +1,4297 @@ + +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.c $ @@ -36413,14 +36689,25 @@ Signed-off-by: Noralf Trønnes + + } + if(qh->channel) { ++ int n = qh->channel->hc_num; + /* Using hcchar.chen == 1 is not a reliable test. + * It is possible that the channel has already halted + * but not yet been through the IRQ handler. + */ -+ dwc_otg_hc_halt(hcd->core_if, qh->channel, -+ DWC_OTG_HC_XFER_URB_DEQUEUE); -+ if(microframe_schedule) -+ hcd->available_host_channels++; ++ if (fiq_fsm_enable && (hcd->fiq_state->channel[qh->channel->hc_num].fsm != FIQ_PASSTHROUGH)) { ++ local_fiq_disable(); ++ fiq_fsm_spin_lock(&hcd->fiq_state->lock); ++ qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; ++ qh->channel->halt_pending = 1; ++ if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || ++ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) ++ hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; ++ fiq_fsm_spin_unlock(&hcd->fiq_state->lock); ++ local_fiq_enable(); ++ } else { ++ dwc_otg_hc_halt(hcd->core_if, qh->channel, ++ DWC_OTG_HC_XFER_URB_DEQUEUE); ++ } + qh->channel = NULL; + } + dwc_otg_hcd_qh_remove(hcd, qh); @@ -36509,13 +36796,16 @@ Signed-off-by: Noralf Trønnes + gintsts_data_t intr; + dwc_otg_hcd_t *dwc_otg_hcd = p; + ++ DWC_SPINLOCK(dwc_otg_hcd->lock); + /* + * Set status flags for the hub driver. + */ + dwc_otg_hcd->flags.b.port_connect_status_change = 1; + dwc_otg_hcd->flags.b.port_connect_status = 0; -+ if(fiq_enable) ++ if(fiq_enable) { + local_fiq_disable(); ++ fiq_fsm_spin_lock(&dwc_otg_hcd->fiq_state->lock); ++ } + /* + * Shutdown any transfers in process by clearing the Tx FIFO Empty + * interrupt mask and status bits and disabling subsequent host @@ -36585,47 +36875,23 @@ Signed-off-by: Noralf Trønnes + } + } + -+ for (i = 0; i < num_channels; i++) { -+ channel = dwc_otg_hcd->hc_ptr_array[i]; -+ if (DWC_CIRCLEQ_EMPTY_ENTRY(channel, hc_list_entry)) { -+ hc_regs = -+ dwc_otg_hcd->core_if->host_if->hc_regs[i]; -+ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); -+ if (hcchar.b.chen) { -+ /* Halt the channel. */ -+ hcchar.b.chdis = 1; -+ DWC_WRITE_REG32(&hc_regs->hcchar, -+ hcchar.d32); -+ } -+ -+ dwc_otg_hc_cleanup(dwc_otg_hcd->core_if, -+ channel); -+ DWC_CIRCLEQ_INSERT_TAIL -+ (&dwc_otg_hcd->free_hc_list, channel, -+ hc_list_entry); -+ /* -+ * Added for Descriptor DMA to prevent channel double cleanup -+ * in release_channel_ddma(). Which called from ep_disable -+ * when device disconnect. -+ */ -+ channel->qh = NULL; -+ } -+ } + if(fiq_fsm_enable) { + for(i=0; i < 128; i++) { + dwc_otg_hcd->hub_port[i] = 0; + } + } -+ + } + -+ if(fiq_enable) ++ if(fiq_enable) { ++ fiq_fsm_spin_unlock(&dwc_otg_hcd->fiq_state->lock); + local_fiq_enable(); ++ } + + if (dwc_otg_hcd->fops->disconnect) { + dwc_otg_hcd->fops->disconnect(dwc_otg_hcd); + } + ++ DWC_SPINUNLOCK(dwc_otg_hcd->lock); + return 1; +} + @@ -36838,9 +37104,15 @@ Signed-off-by: Noralf Trønnes + /* In FIQ FSM mode, we need to shut down carefully. + * The FIQ may attempt to restart a disabled channel */ + if (fiq_fsm_enable && (hcd->fiq_state->channel[n].fsm != FIQ_PASSTHROUGH)) { ++ local_fiq_disable(); ++ fiq_fsm_spin_lock(&hcd->fiq_state->lock); + qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; + qh->channel->halt_pending = 1; -+ hcd->fiq_state->channel[n].fsm = FIQ_DEQUEUE_ISSUED; ++ if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || ++ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) ++ hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; ++ fiq_fsm_spin_unlock(&hcd->fiq_state->lock); ++ local_fiq_enable(); + } else { + dwc_otg_hc_halt(hcd->core_if, qh->channel, + DWC_OTG_HC_XFER_URB_DEQUEUE); @@ -36858,6 +37130,8 @@ Signed-off-by: Noralf Trønnes + hcd->core_if->dma_desc_enable?"DMA ":""); + if (!hcd->core_if->dma_desc_enable) { + uint8_t b = urb_qtd->in_process; ++ if (nak_holdoff && qh->do_split && dwc_qh_is_non_per(qh)) ++ qh->nak_frame = 0xFFFF; + dwc_otg_hcd_qtd_remove_and_free(hcd, urb_qtd, qh); + if (b) { + dwc_otg_hcd_qh_deactivate(hcd, qh, 0); @@ -37148,7 +37422,6 @@ Signed-off-by: Noralf Trønnes + } else if (dwc_otg_hcd->status_buf != NULL) { + DWC_FREE(dwc_otg_hcd->status_buf); + } -+ DWC_SPINLOCK_FREE(dwc_otg_hcd->channel_lock); + DWC_SPINLOCK_FREE(dwc_otg_hcd->lock); + /* Set core_if's lock pointer to NULL */ + dwc_otg_hcd->core_if->lock = NULL; @@ -37167,8 +37440,6 @@ Signed-off-by: Noralf Trønnes + DWC_FREE(dwc_otg_hcd); +} + -+int init_hcd_usecs(dwc_otg_hcd_t *_hcd); -+ +int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if) +{ + struct device *dev = dwc_otg_hcd_to_dev(hcd); @@ -37179,10 +37450,8 @@ Signed-off-by: Noralf Trønnes + +#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_SPINLOCK)) + DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->lock); -+ DWC_SPINLOCK_ALLOC_LINUX_DEBUG(hcd->channel_lock); +#else + hcd->lock = DWC_SPINLOCK_ALLOC(); -+ hcd->channel_lock = DWC_SPINLOCK_ALLOC(); +#endif + DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n", + hcd, core_if); @@ -37488,6 +37757,7 @@ Signed-off-by: Noralf Trønnes + if (qh->do_split) { + uint32_t hub_addr, port_addr; + hc->do_split = 1; ++ hc->start_pkt_count = 1; + hc->xact_pos = qtd->isoc_split_pos; + /* We don't need to do complete splits anymore */ +// if(fiq_fsm_enable) @@ -37667,6 +37937,7 @@ Signed-off-by: Noralf Trønnes + +/** + * fiq_fsm_transaction_suitable() - Test a QH for compatibility with the FIQ ++ * @hcd: Pointer to the dwc_otg_hcd struct + * @qh: pointer to the endpoint's queue head + * + * Transaction start/end control flow is grafted onto the existing dwc_otg @@ -37676,7 +37947,7 @@ Signed-off-by: Noralf Trønnes + * Returns: 0 for unsuitable, 1 implies the FIQ can be enabled for this transaction. + */ + -+int fiq_fsm_transaction_suitable(dwc_otg_qh_t *qh) ++int fiq_fsm_transaction_suitable(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh) +{ + if (qh->do_split) { + switch (qh->ep_type) { @@ -37695,28 +37966,22 @@ Signed-off-by: Noralf Trønnes + } + } else if (qh->ep_type == UE_ISOCHRONOUS) { + if (fiq_fsm_mask & (1 << 2)) { -+ /* HS ISOCH support. We test for compatibility: ++ /* ISOCH support. We test for compatibility: + * - DWORD aligned buffers + * - Must be at least 2 transfers (otherwise pointless to use the FIQ) + * If yes, then the fsm enqueue function will handle the state machine setup. + */ + dwc_otg_qtd_t *qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); + dwc_otg_hcd_urb_t *urb = qtd->urb; -+ struct dwc_otg_hcd_iso_packet_desc (*iso_descs)[0] = &urb->iso_descs; -+ int nr_iso_frames = urb->packet_count; ++ dwc_dma_t ptr; + int i; -+ uint32_t ptr; + -+ if (nr_iso_frames < 2) ++ if (urb->packet_count < 2) + return 0; -+ for (i = 0; i < nr_iso_frames; i++) { -+ ptr = urb->dma + iso_descs[i]->offset; -+ if (ptr & 0x3) { -+ printk_ratelimited("%s: Non-Dword aligned isochronous frame offset." -+ " Cannot queue FIQ-accelerated transfer to device %d endpoint %d\n", -+ __FUNCTION__, qh->channel->dev_addr, qh->channel->ep_num); ++ for (i = 0; i < urb->packet_count; i++) { ++ ptr = urb->dma + urb->iso_descs[i].offset; ++ if (ptr & 0x3) + return 0; -+ } + } + return 1; + } @@ -37817,6 +38082,45 @@ Signed-off-by: Noralf Trønnes + } +} + ++/** ++ * fiq_fsm_np_tt_contended() - Avoid performing contended non-periodic transfers ++ * @hcd: Pointer to the dwc_otg_hcd struct ++ * @qh: Pointer to the endpoint's queue head ++ * ++ * Certain hub chips don't differentiate between IN and OUT non-periodic pipes ++ * with the same endpoint number. If transfers get completed out of order ++ * (disregarding the direction token) then the hub can lock up ++ * or return erroneous responses. ++ * ++ * Returns 1 if initiating the transfer would cause contention, 0 otherwise. ++ */ ++int fiq_fsm_np_tt_contended(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh) ++{ ++ int i; ++ struct fiq_channel_state *st; ++ int dev_addr = qh->channel->dev_addr; ++ int ep_num = qh->channel->ep_num; ++ for (i = 0; i < hcd->core_if->core_params->host_channels; i++) { ++ if (i == qh->channel->hc_num) ++ continue; ++ st = &hcd->fiq_state->channel[i]; ++ switch (st->fsm) { ++ case FIQ_NP_SSPLIT_STARTED: ++ case FIQ_NP_SSPLIT_RETRY: ++ case FIQ_NP_SSPLIT_PENDING: ++ case FIQ_NP_OUT_CSPLIT_RETRY: ++ case FIQ_NP_IN_CSPLIT_RETRY: ++ if (st->hcchar_copy.b.devaddr == dev_addr && ++ st->hcchar_copy.b.epnum == ep_num) ++ return 1; ++ break; ++ default: ++ break; ++ } ++ } ++ return 0; ++} ++ +/* + * Pushing a periodic request into the queue near the EOF1 point + * in a microframe causes erroneous behaviour (frmovrun) interrupt. @@ -37962,8 +38266,20 @@ Signed-off-by: Noralf Trønnes + int hub_addr, port_addr, frame, uframe; + struct fiq_channel_state *st = &hcd->fiq_state->channel[hc->hc_num]; + -+ if (st->fsm != FIQ_PASSTHROUGH) ++ /* ++ * Non-periodic channel assignments stay in the non_periodic_active queue. ++ * Therefore we get repeatedly called until the FIQ's done processing this channel. ++ */ ++ if (qh->channel->xfer_started == 1) + return 0; ++ ++ if (st->fsm != FIQ_PASSTHROUGH) { ++ pr_warn_ratelimited("%s:%d: Queue called for an active channel\n", __func__, __LINE__); ++ return 0; ++ } ++ ++ qh->channel->xfer_started = 1; ++ + st->nr_errors = 0; + + st->hcchar_copy.d32 = 0; @@ -38127,7 +38443,12 @@ Signed-off-by: Noralf Trønnes + switch (hc->ep_type) { + case UE_CONTROL: + case UE_BULK: -+ st->fsm = FIQ_NP_SSPLIT_STARTED; ++ if (fiq_fsm_np_tt_contended(hcd, qh)) { ++ st->fsm = FIQ_NP_SSPLIT_PENDING; ++ start_immediate = 0; ++ } else { ++ st->fsm = FIQ_NP_SSPLIT_STARTED; ++ } + break; + case UE_ISOCHRONOUS: + if (hc->ep_is_in) { @@ -38151,7 +38472,12 @@ Signed-off-by: Noralf Trønnes + break; + case UE_INTERRUPT: + if (fiq_fsm_mask & 0x8) { -+ st->fsm = FIQ_NP_SSPLIT_STARTED; ++ if (fiq_fsm_np_tt_contended(hcd, qh)) { ++ st->fsm = FIQ_NP_SSPLIT_PENDING; ++ start_immediate = 0; ++ } else { ++ st->fsm = FIQ_NP_SSPLIT_STARTED; ++ } + } else if (start_immediate) { + st->fsm = FIQ_PER_SSPLIT_STARTED; + } else { @@ -38189,8 +38515,6 @@ Signed-off-by: Noralf Trønnes + dwc_list_link_t *qh_ptr; + dwc_otg_qh_t *qh; + int num_channels; -+ dwc_irqflags_t flags; -+ dwc_spinlock_t *channel_lock = hcd->channel_lock; + dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; + +#ifdef DEBUG_HOST_CHANNELS @@ -38209,13 +38533,10 @@ Signed-off-by: Noralf Trønnes + + if (microframe_schedule) { + // Make sure we leave one channel for non periodic transactions. -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels <= 1) { -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + break; + } + hcd->available_host_channels--; -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); +#ifdef DEBUG_HOST_CHANNELS + last_sel_trans_num_per_scheduled++; +#endif /* DEBUG_HOST_CHANNELS */ @@ -38228,10 +38549,8 @@ Signed-off-by: Noralf Trønnes + * periodic assigned schedule. + */ + qh_ptr = DWC_LIST_NEXT(qh_ptr); -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, + &qh->qh_list_entry); -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + } + + /* @@ -38269,13 +38588,10 @@ Signed-off-by: Noralf Trønnes + } + + if (microframe_schedule) { -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels < 1) { -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + break; + } + hcd->available_host_channels--; -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); +#ifdef DEBUG_HOST_CHANNELS + last_sel_trans_num_nonper_scheduled++; +#endif /* DEBUG_HOST_CHANNELS */ @@ -38288,11 +38604,8 @@ Signed-off-by: Noralf Trønnes + * non-periodic active schedule. + */ + qh_ptr = DWC_LIST_NEXT(qh_ptr); -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active, + &qh->qh_list_entry); -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); -+ + + if (!microframe_schedule) + hcd->non_periodic_channels++; @@ -38456,7 +38769,7 @@ Signed-off-by: Noralf Trønnes + continue; + } + -+ if (fiq_fsm_enable && fiq_fsm_transaction_suitable(qh)) { ++ if (fiq_fsm_enable && fiq_fsm_transaction_suitable(hcd, qh)) { + if (qh->do_split) + fiq_fsm_queue_split_transaction(hcd, qh); + else @@ -38593,7 +38906,7 @@ Signed-off-by: Noralf Trønnes + qh = DWC_LIST_ENTRY(hcd->non_periodic_qh_ptr, dwc_otg_qh_t, + qh_list_entry); + -+ if(fiq_fsm_enable && fiq_fsm_transaction_suitable(qh)) { ++ if(fiq_fsm_enable && fiq_fsm_transaction_suitable(hcd, qh)) { + fiq_fsm_queue_split_transaction(hcd, qh); + } else { + status = queue_transaction(hcd, qh->channel, @@ -40484,7 +40797,7 @@ Signed-off-by: Noralf Trønnes +#endif /* DWC_DEVICE_ONLY */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.h -@@ -0,0 +1,868 @@ +@@ -0,0 +1,870 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.h $ + * $Revision: #58 $ @@ -40897,7 +41210,8 @@ Signed-off-by: Noralf Trønnes + unsigned port_suspend_change:1; + unsigned port_over_current_change:1; + unsigned port_l1_change:1; -+ unsigned reserved:26; ++ unsigned port_speed:2; ++ unsigned reserved:24; + } b; + } flags; + @@ -41055,7 +41369,6 @@ Signed-off-by: Noralf Trønnes + + /* */ + dwc_spinlock_t *lock; -+ dwc_spinlock_t *channel_lock; + /** + * Private data that could be used by OS wrapper. + */ @@ -41117,7 +41430,7 @@ Signed-off-by: Noralf Trønnes +void dwc_otg_hcd_release_port(dwc_otg_hcd_t * dwc_otg_hcd, dwc_otg_qh_t *qh); + +extern int fiq_fsm_queue_transaction(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh); -+extern int fiq_fsm_transaction_suitable(dwc_otg_qh_t *qh); ++extern int fiq_fsm_transaction_suitable(dwc_otg_hcd_t *hcd, dwc_otg_qh_t *qh); +extern void dwc_otg_cleanup_fiq_channel(dwc_otg_hcd_t *hcd, uint32_t num); + +/** @} */ @@ -41311,6 +41624,8 @@ Signed-off-by: Noralf Trønnes + return frame & 0x7; +} + ++extern void init_hcd_usecs(dwc_otg_hcd_t *_hcd); ++ +void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc, + dwc_otg_hc_regs_t * hc_regs, + dwc_otg_qtd_t * qtd); @@ -41355,7 +41670,7 @@ Signed-off-by: Noralf Trønnes +#endif /* DWC_DEVICE_ONLY */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c -@@ -0,0 +1,1139 @@ +@@ -0,0 +1,1134 @@ +/*========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_ddma.c $ + * $Revision: #10 $ @@ -41637,17 +41952,12 @@ Signed-off-by: Noralf Trønnes + +static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) +{ -+ dwc_irqflags_t flags; -+ dwc_spinlock_t *channel_lock = hcd->channel_lock; -+ + dwc_hc_t *hc = qh->channel; + if (dwc_qh_is_non_per(qh)) { -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (!microframe_schedule) + hcd->non_periodic_channels--; + else + hcd->available_host_channels++; -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + } else + update_frame_list(hcd, qh, 0); + @@ -42917,7 +43227,7 @@ Signed-off-by: Noralf Trønnes +#endif /* DWC_DEVICE_ONLY */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c -@@ -0,0 +1,2727 @@ +@@ -0,0 +1,2752 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_intr.c $ + * $Revision: #89 $ @@ -43434,6 +43744,10 @@ Signed-off-by: Noralf Trønnes + dwc_otg_host_if_t *host_if = + dwc_otg_hcd->core_if->host_if; + ++ dwc_otg_hcd->flags.b.port_speed = hprt0.b.prtspd; ++ if (microframe_schedule) ++ init_hcd_usecs(dwc_otg_hcd); ++ + /* Every time when port enables calculate + * HFIR.FrInterval + */ @@ -43863,8 +44177,6 @@ Signed-off-by: Noralf Trønnes +{ + dwc_otg_transaction_type_e tr_type; + int free_qtd; -+ dwc_irqflags_t flags; -+ dwc_spinlock_t *channel_lock = hcd->channel_lock; + + int hog_port = 0; + @@ -43953,11 +44265,8 @@ Signed-off-by: Noralf Trønnes + break; + } + } else { -+ -+ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + hcd->available_host_channels++; + fiq_print(FIQDBG_INT, hcd->fiq_state, "AHC = %d ", hcd->available_host_channels); -+ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + } + + /* Try to queue more transfers now that there's a free channel. */ @@ -45293,23 +45602,35 @@ Signed-off-by: Noralf Trønnes +{ + struct fiq_channel_state *st = &hcd->fiq_state->channel[num]; + dwc_hc_t *hc = hcd->hc_ptr_array[num]; -+ dwc_otg_qtd_t *qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); -+ dwc_otg_qh_t *qh = hc->qh; ++ dwc_otg_qtd_t *qtd; + dwc_otg_hc_regs_t *hc_regs = hcd->core_if->host_if->hc_regs[num]; + hcint_data_t hcint = hcd->fiq_state->channel[num].hcint_copy; ++ hctsiz_data_t hctsiz = hcd->fiq_state->channel[num].hctsiz_copy; + int hostchannels = 0; + fiq_print(FIQDBG_INT, hcd->fiq_state, "OUT %01d %01d ", num , st->fsm); + + hostchannels = hcd->available_host_channels; ++ if (hc->halt_pending) { ++ /* Dequeue: The FIQ was allowed to complete the transfer but state has been cleared. */ ++ if (hc->qh && st->fsm == FIQ_NP_SPLIT_DONE && ++ hcint.b.xfercomp && hc->qh->ep_type == UE_BULK) { ++ if (hctsiz.b.pid == DWC_HCTSIZ_DATA0) { ++ hc->qh->data_toggle = DWC_OTG_HC_PID_DATA1; ++ } else { ++ hc->qh->data_toggle = DWC_OTG_HC_PID_DATA0; ++ } ++ } ++ release_channel(hcd, hc, NULL, hc->halt_status); ++ return; ++ } ++ ++ qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); + switch (st->fsm) { + case FIQ_TEST: + break; + + case FIQ_DEQUEUE_ISSUED: -+ /* hc_halt was called. QTD no longer exists. */ -+ /* TODO: for a nonperiodic split transaction, need to issue a -+ * CLEAR_TT_BUFFER hub command if we were in the start-split phase. -+ */ ++ /* Handled above, but keep for posterity */ + release_channel(hcd, hc, NULL, hc->halt_status); + break; + @@ -45322,6 +45643,11 @@ Signed-off-by: Noralf Trønnes + handle_hc_xfercomp_intr(hcd, hc, hc_regs, qtd); + } else if (hcint.b.nak) { + handle_hc_nak_intr(hcd, hc, hc_regs, qtd); ++ } else { ++ DWC_WARN("Unexpected IRQ state on FSM transaction:" ++ "dev_addr=%d ep=%d fsm=%d, hcint=0x%08x\n", ++ hc->dev_addr, hc->ep_num, st->fsm, hcint.d32); ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS); + } + break; + @@ -45337,8 +45663,10 @@ Signed-off-by: Noralf Trønnes + } else if (hcint.b.ahberr) { + handle_hc_ahberr_intr(hcd, hc, hc_regs, qtd); + } else { -+ local_fiq_disable(); -+ BUG(); ++ DWC_WARN("Unexpected IRQ state on FSM transaction:" ++ "dev_addr=%d ep=%d fsm=%d, hcint=0x%08x\n", ++ hc->dev_addr, hc->ep_num, st->fsm, hcint.d32); ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS); + } + break; + @@ -45354,8 +45682,10 @@ Signed-off-by: Noralf Trønnes + } else if (hcint.b.ahberr) { + handle_hc_ahberr_intr(hcd, hc, hc_regs, qtd); + } else { -+ local_fiq_disable(); -+ BUG(); ++ DWC_WARN("Unexpected IRQ state on FSM transaction:" ++ "dev_addr=%d ep=%d fsm=%d, hcint=0x%08x\n", ++ hc->dev_addr, hc->ep_num, st->fsm, hcint.d32); ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS); + } + break; + @@ -45413,7 +45743,7 @@ Signed-off-by: Noralf Trønnes + } else { + frame_desc->status = 0; + /* Unswizzle dma */ -+ len = dwc_otg_fiq_unsetup_per_dma(hcd, qh, qtd, num); ++ len = dwc_otg_fiq_unsetup_per_dma(hcd, hc->qh, qtd, num); + frame_desc->actual_length = len; + } + qtd->isoc_frame_index++; @@ -45475,7 +45805,7 @@ Signed-off-by: Noralf Trønnes + * The status is recorded as the interrupt state should the transaction + * fail. + */ -+ dwc_otg_fiq_unmangle_isoc(hcd, qh, qtd, num); ++ dwc_otg_fiq_unmangle_isoc(hcd, hc->qh, qtd, num); + hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0); + release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE); + break; @@ -45558,10 +45888,15 @@ Signed-off-by: Noralf Trønnes + hc = dwc_otg_hcd->hc_ptr_array[num]; + hc_regs = dwc_otg_hcd->core_if->host_if->hc_regs[num]; + if(hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) { -+ /* We are responding to a channel disable. Driver -+ * state is cleared - our qtd has gone away. ++ /* A dequeue was issued for this transfer. Our QTD has gone away ++ * but in the case of a FIQ transfer, the transfer would have run ++ * to completion. + */ -+ release_channel(dwc_otg_hcd, hc, NULL, hc->halt_status); ++ if (fiq_fsm_enable && dwc_otg_hcd->fiq_state->channel[num].fsm != FIQ_PASSTHROUGH) { ++ dwc_otg_hcd_handle_hc_fsm(dwc_otg_hcd, num); ++ } else { ++ release_channel(dwc_otg_hcd, hc, NULL, hc->halt_status); ++ } + return 1; + } + qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); @@ -45647,7 +45982,7 @@ Signed-off-by: Noralf Trønnes +#endif /* DWC_DEVICE_ONLY */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c -@@ -0,0 +1,1005 @@ +@@ -0,0 +1,1002 @@ + +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_linux.c $ @@ -45975,10 +46310,12 @@ Signed-off-by: Noralf Trønnes + int i; + + urb->error_count = dwc_otg_hcd_urb_get_error_count(dwc_otg_urb); ++ urb->actual_length = 0; + for (i = 0; i < urb->number_of_packets; ++i) { + urb->iso_frame_desc[i].actual_length = + dwc_otg_hcd_urb_get_iso_desc_actual_length + (dwc_otg_urb, i); ++ urb->actual_length += urb->iso_frame_desc[i].actual_length; + urb->iso_frame_desc[i].status = + dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_urb, i); + } @@ -46096,7 +46433,7 @@ Signed-off-by: Noralf Trønnes + DWC_WARN("MPHI periph has NOT been enabled"); +#endif + // Enable FIQ interrupt from USB peripheral -+#ifdef CONFIG_MULTI_IRQ_HANDLER ++#ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER + irq = platform_get_irq(otg_dev->os_dep.platformdev, 1); +#else + irq = INTERRUPT_VC_USB; @@ -46105,6 +46442,11 @@ Signed-off-by: Noralf Trønnes + DWC_ERROR("Can't get FIQ irq"); + return; + } ++ /* ++ * We could take an interrupt immediately after enabling the FIQ. ++ * Ensure coherency of hcd->fiq_state. ++ */ ++ smp_mb(); + enable_fiq(irq); + local_fiq_enable(); +} @@ -46175,7 +46517,11 @@ Signed-off-by: Noralf Trønnes + + if (fiq_enable) { + if (num_online_cpus() > 1) { -+ /* bcm2709: can run the FIQ on a separate core to IRQs */ ++ /* ++ * bcm2709: can run the FIQ on a separate core to IRQs. ++ * Ensure driver state is visible to other cores before setting up the FIQ. ++ */ ++ smp_mb(); + smp_call_function_single(1, hcd_init_fiq, otg_dev, 1); + } else { + smp_call_function_single(0, hcd_init_fiq, otg_dev, 1); @@ -46579,25 +46925,11 @@ Signed-off-by: Noralf Trønnes +static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) +{ + dwc_irqflags_t flags; -+ struct usb_device *udev = NULL; -+ int epnum = usb_endpoint_num(&ep->desc); -+ int is_out = usb_endpoint_dir_out(&ep->desc); -+ int is_control = usb_endpoint_xfer_control(&ep->desc); + dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); -+ struct device *dev = DWC_OTG_OS_GETDEV(dwc_otg_hcd->otg_dev->os_dep); -+ -+ if (dev) -+ udev = to_usb_device(dev); -+ else -+ return; + + DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", epnum); + + DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); -+ usb_settoggle(udev, epnum, is_out, 0); -+ if (is_control) -+ usb_settoggle(udev, epnum, !is_out, 0); -+ + if (ep->hcpriv) { + dwc_otg_hcd_endpoint_reset(dwc_otg_hcd, ep->hcpriv); + } @@ -46655,7 +46987,7 @@ Signed-off-by: Noralf Trønnes +#endif /* DWC_DEVICE_ONLY */ --- /dev/null +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c -@@ -0,0 +1,963 @@ +@@ -0,0 +1,971 @@ +/* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_queue.c $ + * $Revision: #44 $ @@ -46701,6 +47033,7 @@ Signed-off-by: Noralf Trønnes +#include "dwc_otg_regs.h" + +extern bool microframe_schedule; ++extern unsigned short int_ep_interval_min; + +/** + * Free each QTD in the QH's QTD-list then free the QH. QH should already be @@ -46876,21 +47209,19 @@ Signed-off-by: Noralf Trønnes + SCHEDULE_SLOP); + qh->interval = urb->interval; + -+#if 0 -+ /* Increase interrupt polling rate for debugging. */ -+ if (qh->ep_type == UE_INTERRUPT) { -+ qh->interval = 8; -+ } -+#endif + hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0); -+ if ((hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) && -+ ((dev_speed == USB_SPEED_LOW) || -+ (dev_speed == USB_SPEED_FULL))) { -+ qh->interval *= 8; -+ qh->sched_frame |= 0x7; -+ qh->start_split_frame = qh->sched_frame; ++ if (hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) { ++ if (dev_speed == USB_SPEED_LOW || ++ dev_speed == USB_SPEED_FULL) { ++ qh->interval *= 8; ++ qh->sched_frame |= 0x7; ++ qh->start_split_frame = qh->sched_frame; ++ } else if (int_ep_interval_min >= 2 && ++ qh->interval < int_ep_interval_min && ++ qh->ep_type == UE_INTERRUPT) { ++ qh->interval = int_ep_interval_min; ++ } + } -+ + } + + DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD QH Initialized\n"); @@ -47066,13 +47397,17 @@ Signed-off-by: Noralf Trønnes +/* + * called from dwc_otg_hcd.c:dwc_otg_hcd_init + */ -+int init_hcd_usecs(dwc_otg_hcd_t *_hcd) ++void init_hcd_usecs(dwc_otg_hcd_t *_hcd) +{ + int i; -+ for (i=0; i<8; i++) { -+ _hcd->frame_usecs[i] = max_uframe_usecs[i]; ++ if (_hcd->flags.b.port_speed == DWC_HPRT0_PRTSPD_FULL_SPEED) { ++ _hcd->frame_usecs[0] = 900; ++ for (i = 1; i < 8; i++) ++ _hcd->frame_usecs[i] = 0; ++ } else { ++ for (i = 0; i < 8; i++) ++ _hcd->frame_usecs[i] = max_uframe_usecs[i]; + } -+ return 0; +} + +static int find_single_uframe(dwc_otg_hcd_t * _hcd, dwc_otg_qh_t * _qh) @@ -47199,8 +47534,9 @@ Signed-off-by: Noralf Trønnes + int ret; + ret = -1; + -+ if (_qh->speed == USB_SPEED_HIGH) { -+ /* if this is a hs transaction we need a full frame */ ++ if (_qh->speed == USB_SPEED_HIGH || ++ _hcd->flags.b.port_speed == DWC_HPRT0_PRTSPD_FULL_SPEED) { ++ /* if this is a hs transaction we need a full frame - or account for FS usecs */ + ret = find_single_uframe(_hcd, _qh); + } else { + /* if this is a fs transaction we may need a sequence of frames */ @@ -47285,7 +47621,7 @@ Signed-off-by: Noralf Trønnes + if (status) { + DWC_INFO("%s: Insufficient periodic bandwidth for " + "periodic transfer.\n", __func__); -+ return status; ++ return -DWC_E_NO_SPACE; + } + status = check_max_xfer_size(hcd, qh); + if (status) { @@ -47451,6 +47787,10 @@ Signed-off-by: Noralf Trønnes + /* Add back to inactive non-periodic schedule. */ + dwc_otg_hcd_qh_add(hcd, qh); + //hcd->fiq_state->kick_np_queues = 1; ++ } else { ++ if(nak_holdoff && qh->do_split) { ++ qh->nak_frame = 0xFFFF; ++ } + } + } else { + uint16_t frame_number = dwc_otg_hcd_get_frame_number(hcd); diff --git a/target/linux/brcm2708/patches-4.9/950-0032-bcm2708-framebuffer-driver.patch b/target/linux/brcm2708/patches-4.19/950-0041-bcm2708-framebuffer-driver.patch similarity index 98% rename from target/linux/brcm2708/patches-4.9/950-0032-bcm2708-framebuffer-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0041-bcm2708-framebuffer-driver.patch index b7c05c161..8a157861a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0032-bcm2708-framebuffer-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0041-bcm2708-framebuffer-driver.patch @@ -1,7 +1,7 @@ -From cca69d888eb770c496cca83d37accb62a22e84c7 Mon Sep 17 00:00:00 2001 +From a79eeea4c9cecd4770ee03ba8444c01cea34b3c1 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 17 Jun 2015 17:06:34 +0100 -Subject: [PATCH] bcm2708 framebuffer driver +Subject: [PATCH 041/703] bcm2708 framebuffer driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -74,17 +74,26 @@ Add bcm2708-fb to Device Tree and don't add the platform device when booting in DT mode. Signed-off-by: Noralf Trønnes + +Cleanup of bcm2708_fb file to kernel coding standards + +Some minor change to function - remove a use of +in_atomic, plus replacing various debug messages +that manually specify the function name with +("%s",.__func__) + +Signed-off-by: James Hughes --- drivers/video/fbdev/Kconfig | 14 + drivers/video/fbdev/Makefile | 1 + - drivers/video/fbdev/bcm2708_fb.c | 844 ++++++++++ - drivers/video/logo/logo_linux_clut224.ppm | 2483 ++++++++++------------------- - 4 files changed, 1740 insertions(+), 1602 deletions(-) + drivers/video/fbdev/bcm2708_fb.c | 864 +++++++ + drivers/video/logo/logo_linux_clut224.ppm | 2483 ++++++++------------- + 4 files changed, 1760 insertions(+), 1602 deletions(-) create mode 100644 drivers/video/fbdev/bcm2708_fb.c --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig -@@ -228,6 +228,20 @@ config FB_TILEBLITTING +@@ -236,6 +236,20 @@ config FB_TILEBLITTING comment "Frame buffer hardware drivers" depends on FB @@ -107,7 +116,7 @@ Signed-off-by: Noralf Trønnes depends on FB && SPARC --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_FB_MACMODES) += macmod +@@ -11,6 +11,7 @@ obj-$(CONFIG_FB_MACMODES) += macmod obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o # Hardware specific drivers go first @@ -117,7 +126,7 @@ Signed-off-by: Noralf Trønnes obj-$(CONFIG_FB_CLPS711X) += clps711x-fb.o --- /dev/null +++ b/drivers/video/fbdev/bcm2708_fb.c -@@ -0,0 +1,844 @@ +@@ -0,0 +1,864 @@ +/* + * linux/drivers/video/bcm2708_fb.c + * @@ -159,9 +168,10 @@ Signed-off-by: Noralf Trønnes +#define MODULE_NAME "bcm2708_fb" + +#ifdef BCM2708_FB_DEBUG -+#define print_debug(fmt,...) pr_debug("%s:%s:%d: "fmt, MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) ++#define print_debug(fmt, ...) pr_debug("%s:%s:%d: "fmt, \ ++ MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) +#else -+#define print_debug(fmt,...) ++#define print_debug(fmt, ...) +#endif + +/* This is limited to 16 characters when displayed by X startup */ @@ -169,10 +179,10 @@ Signed-off-by: Noralf Trønnes + +#define DRIVER_NAME "bcm2708_fb" + -+static int fbwidth = 800; /* module parameter */ -+static int fbheight = 480; /* module parameter */ -+static int fbdepth = 32; /* module parameter */ -+static int fbswap = 0; /* module parameter */ ++static int fbwidth = 800; /* module parameter */ ++static int fbheight = 480; /* module parameter */ ++static int fbdepth = 32; /* module parameter */ ++static int fbswap; /* module parameter */ + +static u32 dma_busy_wait_threshold = 1<<15; +module_param(dma_busy_wait_threshold, int, 0644); @@ -338,11 +348,13 @@ Signed-off-by: Noralf Trønnes + struct fb_info *info) +{ + /* info input, var output */ -+ print_debug("bcm2708_fb_check_var info(%p) %dx%d (%dx%d), %d, %d\n", info, ++ print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", ++ __func__, ++ info, + info->var.xres, info->var.yres, info->var.xres_virtual, + info->var.yres_virtual, (int)info->screen_size, + info->var.bits_per_pixel); -+ print_debug("bcm2708_fb_check_var var(%p) %dx%d (%dx%d), %d\n", var, ++ print_debug("%s(%p) %dx%d (%dx%d), %d\n", __func__, var, + var->xres, var->yres, var->xres_virtual, var->yres_virtual, + var->bits_per_pixel); + @@ -350,7 +362,7 @@ Signed-off-by: Noralf Trønnes + var->bits_per_pixel = 16; + + if (bcm2708_fb_set_bitfields(var) != 0) { -+ pr_err("bcm2708_fb_check_var: invalid bits_per_pixel %d\n", ++ pr_err("%s: invalid bits_per_pixel %d\n", __func__, + var->bits_per_pixel); + return -EINVAL; + } @@ -362,9 +374,8 @@ Signed-off-by: Noralf Trønnes + if (var->yres_virtual == -1) { + var->yres_virtual = 480; + -+ pr_err -+ ("bcm2708_fb_check_var: virtual resolution set to maximum of %dx%d\n", -+ var->xres_virtual, var->yres_virtual); ++ pr_err("%s: virtual resolution set to maximum of %dx%d\n", ++ __func__, var->xres_virtual, var->yres_virtual); + } + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; @@ -408,7 +419,7 @@ Signed-off-by: Noralf Trønnes + }; + int ret; + -+ print_debug("bcm2708_fb_set_par info(%p) %dx%d (%dx%d), %d, %d\n", info, ++ print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info, + info->var.xres, info->var.yres, info->var.xres_virtual, + info->var.yres_virtual, (int)info->screen_size, + info->var.bits_per_pixel); @@ -443,11 +454,12 @@ Signed-off-by: Noralf Trønnes + return -ENOMEM; + } + -+ print_debug -+ ("BCM2708FB: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d\n", -+ (void *)fb->fb.screen_base, (void *)fb->fb_bus_address, -+ fbinfo.xres, fbinfo.yres, fbinfo.bpp, -+ fbinfo.pitch, (int)fb->fb.screen_size); ++ print_debug( ++ "%s: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d\n", ++ __func__, ++ (void *)fb->fb.screen_base, (void *)fb->fb_bus_address, ++ fbinfo.xres, fbinfo.yres, fbinfo.bpp, ++ fbinfo.pitch, (int)fb->fb.screen_size); + + return 0; +} @@ -466,7 +478,6 @@ Signed-off-by: Noralf Trønnes +{ + struct bcm2708_fb *fb = to_bcm2708(info); + -+ /*print_debug("BCM2708FB: setcolreg %d:(%02x,%02x,%02x,%02x) %x\n", regno, red, green, blue, transp, fb->fb.fix.visual);*/ + if (fb->fb.var.bits_per_pixel <= 8) { + if (regno < 256) { + /* blue [23:16], green [15:8], red [7:0] */ @@ -474,8 +485,12 @@ Signed-off-by: Noralf Trønnes + ((green >> 8) & 0xff) << 8 | + ((blue >> 8) & 0xff) << 16; + } -+ /* Hack: we need to tell GPU the palette has changed, but currently bcm2708_fb_set_par takes noticable time when called for every (256) colour */ -+ /* So just call it for what looks like the last colour in a list for now. */ ++ /* Hack: we need to tell GPU the palette has changed, but ++ * currently bcm2708_fb_set_par takes noticeable time when ++ * called for every (256) colour ++ * So just call it for what looks like the last colour in a ++ * list for now. ++ */ + if (regno == 15 || regno == 255) { + struct packet { + u32 offset; @@ -489,19 +504,23 @@ Signed-off-by: Noralf Trønnes + return -ENOMEM; + packet->offset = 0; + packet->length = regno + 1; -+ memcpy(packet->cmap, fb->gpu_cmap, sizeof(packet->cmap)); -+ ret = rpi_firmware_property(fb->fw, RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE, -+ packet, (2 + packet->length) * sizeof(u32)); ++ memcpy(packet->cmap, fb->gpu_cmap, ++ sizeof(packet->cmap)); ++ ret = rpi_firmware_property(fb->fw, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE, ++ packet, ++ (2 + packet->length) * sizeof(u32)); + if (ret || packet->offset) -+ dev_err(info->device, "Failed to set palette (%d,%u)\n", ++ dev_err(info->device, ++ "Failed to set palette (%d,%u)\n", + ret, packet->offset); + kfree(packet); + } -+ } else if (regno < 16) { ++ } else if (regno < 16) { + fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) | -+ convert_bitfield(blue, &fb->fb.var.blue) | -+ convert_bitfield(green, &fb->fb.var.green) | -+ convert_bitfield(red, &fb->fb.var.red); ++ convert_bitfield(blue, &fb->fb.var.blue) | ++ convert_bitfield(green, &fb->fb.var.green) | ++ convert_bitfield(red, &fb->fb.var.red); + } + return regno > 255; +} @@ -529,20 +548,23 @@ Signed-off-by: Noralf Trønnes + ret = rpi_firmware_property(fb->fw, RPI_FIRMWARE_FRAMEBUFFER_BLANK, + &value, sizeof(value)); + if (ret) -+ dev_err(info->device, "bcm2708_fb_blank(%d) failed: %d\n", ++ dev_err(info->device, "%s(%d) failed: %d\n", __func__, + blank_mode, ret); + + return ret; +} + -+static int bcm2708_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) ++static int bcm2708_fb_pan_display(struct fb_var_screeninfo *var, ++ struct fb_info *info) +{ + s32 result; ++ + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; + result = bcm2708_fb_set_par(info); + if (result != 0) -+ pr_err("bcm2708_fb_pan_display(%d,%d) returns=%d\n", var->xoffset, var->yoffset, result); ++ pr_err("%s(%d,%d) returns=%d\n", __func__, ++ var->xoffset, var->yoffset, result); + return result; +} + @@ -607,13 +629,13 @@ Signed-off-by: Noralf Trønnes + struct bcm2708_fb *fb = to_bcm2708(info); + struct bcm2708_dma_cb *cb = fb->cb_base; + int bytes_per_pixel = (info->var.bits_per_pixel + 7) >> 3; ++ + /* Channel 0 supports larger bursts and is a bit faster */ + int burst_size = (fb->dma_chan == 0) ? 8 : 2; + int pixels = region->width * region->height; + + /* Fallback to cfb_copyarea() if we don't like something */ -+ if (in_atomic() || -+ bytes_per_pixel > 4 || ++ if (bytes_per_pixel > 4 || + info->var.xres * info->var.yres > 1920 * 1200 || + region->width <= 0 || region->width > info->var.xres || + region->height <= 0 || region->height > info->var.yres || @@ -677,6 +699,7 @@ Signed-off-by: Noralf Trønnes + } else { + /* A single dma control block is enough. */ + int sy, dy, stride; ++ + if (region->dy <= region->sy) { + /* processing from top to bottom */ + dy = region->dy; @@ -708,6 +731,7 @@ Signed-off-by: Noralf Trønnes + bcm_dma_wait_idle(fb->dma_chan_base); + } else { + void __iomem *dma_chan = fb->dma_chan_base; ++ + cb->info |= BCM2708_DMA_INT_EN; + bcm_dma_start(fb->dma_chan_base, fb->cb_handle); + while (bcm_dma_is_busy(dma_chan)) { @@ -805,8 +829,8 @@ Signed-off-by: Noralf Trønnes + if (ret) + return ret; + -+ print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n", fbwidth, -+ fbheight, fbdepth, fbswap); ++ print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n", ++ fbwidth, fbheight, fbdepth, fbswap); + + ret = register_framebuffer(&fb->fb); + print_debug("BCM2708FB: register framebuffer (%d)\n", ret); @@ -827,19 +851,17 @@ Signed-off-by: Noralf Trønnes + + fw_np = of_parse_phandle(dev->dev.of_node, "firmware", 0); +/* Remove comment when booting without Device Tree is no longer supported -+ if (!fw_np) { -+ dev_err(&dev->dev, "Missing firmware node\n"); -+ return -ENOENT; -+ } -+*/ ++ * if (!fw_np) { ++ * dev_err(&dev->dev, "Missing firmware node\n"); ++ * return -ENOENT; ++ * } ++ */ + fw = rpi_firmware_get(fw_np); + if (!fw) + return -EPROBE_DEFER; + + fb = kzalloc(sizeof(struct bcm2708_fb), GFP_KERNEL); + if (!fb) { -+ dev_err(&dev->dev, -+ "could not allocate new bcm2708_fb struct\n"); + ret = -ENOMEM; + goto free_region; + } @@ -880,6 +902,13 @@ Signed-off-by: Noralf Trønnes + fb->dev = dev; + fb->fb.device = &dev->dev; + ++ /* failure here isn't fatal, but we'll fail in vc_mem_copy if ++ * fb->gpu is not valid ++ */ ++ rpi_firmware_property(fb->fw, ++ RPI_FIRMWARE_GET_VC_MEMORY, ++ &fb->gpu, sizeof(fb->gpu)); ++ + ret = bcm2708_fb_register(fb); + if (ret == 0) { + platform_set_drvdata(dev, fb); diff --git a/target/linux/brcm2708/patches-4.9/950-0057-Speed-up-console-framebuffer-imageblit-function.patch b/target/linux/brcm2708/patches-4.19/950-0042-Speed-up-console-framebuffer-imageblit-function.patch similarity index 97% rename from target/linux/brcm2708/patches-4.9/950-0057-Speed-up-console-framebuffer-imageblit-function.patch rename to target/linux/brcm2708/patches-4.19/950-0042-Speed-up-console-framebuffer-imageblit-function.patch index 8d6337a94..f8214e24f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0057-Speed-up-console-framebuffer-imageblit-function.patch +++ b/target/linux/brcm2708/patches-4.19/950-0042-Speed-up-console-framebuffer-imageblit-function.patch @@ -1,7 +1,7 @@ -From fead9bc9e55df547b54a9cd55d932b209090cfeb Mon Sep 17 00:00:00 2001 +From a1e59cb06aaa97771f2d39777017f8de6f237507 Mon Sep 17 00:00:00 2001 From: Harm Hanemaaijer Date: Thu, 20 Jun 2013 20:21:39 +0200 -Subject: [PATCH] Speed up console framebuffer imageblit function +Subject: [PATCH 042/703] Speed up console framebuffer imageblit function Especially on platforms with a slower CPU but a relatively high framebuffer fill bandwidth, like current ARM devices, the existing @@ -29,7 +29,7 @@ the greater benefit for 32bpp. Signed-off-by: Harm Hanemaaijer --- - drivers/video/fbdev/core/cfbimgblt.c | 152 +++++++++++++++++++++++++++++++++-- + drivers/video/fbdev/core/cfbimgblt.c | 152 ++++++++++++++++++++++++++- 1 file changed, 147 insertions(+), 5 deletions(-) --- a/drivers/video/fbdev/core/cfbimgblt.c diff --git a/target/linux/brcm2708/patches-4.9/950-0033-dmaengine-Add-support-for-BCM2708.patch b/target/linux/brcm2708/patches-4.19/950-0043-dmaengine-Add-support-for-BCM2708.patch similarity index 93% rename from target/linux/brcm2708/patches-4.9/950-0033-dmaengine-Add-support-for-BCM2708.patch rename to target/linux/brcm2708/patches-4.19/950-0043-dmaengine-Add-support-for-BCM2708.patch index a2f45519b..d2ded22af 100644 --- a/target/linux/brcm2708/patches-4.9/950-0033-dmaengine-Add-support-for-BCM2708.patch +++ b/target/linux/brcm2708/patches-4.19/950-0043-dmaengine-Add-support-for-BCM2708.patch @@ -1,7 +1,7 @@ -From 33444cee555204ee605e6ec9050b04e874fb0090 Mon Sep 17 00:00:00 2001 +From 3b7f7192307a3cc84215a42c42065758dd638986 Mon Sep 17 00:00:00 2001 From: Florian Meier Date: Fri, 22 Nov 2013 14:22:53 +0100 -Subject: [PATCH] dmaengine: Add support for BCM2708 +Subject: [PATCH 043/703] dmaengine: Add support for BCM2708 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -150,18 +150,35 @@ but we still need the legacy DMA API. Signed-off-by: Noralf Trønnes bcm2708-dmaengine - Fix arm64 portability/build issues + +dma-bcm2708: Fix module compilation of CONFIG_DMA_BCM2708 + +bcm2708-dmaengine.c defines functions like bcm_dma_start which are +defined as well in dma-bcm2708.h as inline versions when +CONFIG_DMA_BCM2708 is not defined. This works fine when +CONFIG_DMA_BCM2708 is built in, but when it is selected as module build +fails with redefinition errors because in the build system when +CONFIG_DMA_BCM2708 is selected as module, the macro becomes +CONFIG_DMA_BCM2708_MODULE. + +This patch makes the header use CONFIG_DMA_BCM2708_MODULE too when +available. + +Fixes https://github.com/raspberrypi/linux/issues/2056 + +Signed-off-by: Andrei Gherzan --- drivers/dma/Kconfig | 6 +- drivers/dma/Makefile | 1 + - drivers/dma/bcm2708-dmaengine.c | 281 ++++++++++++++++++++++++++++++ - include/linux/platform_data/dma-bcm2708.h | 143 +++++++++++++++ + drivers/dma/bcm2708-dmaengine.c | 281 ++++++++++++++++++++++ + include/linux/platform_data/dma-bcm2708.h | 143 +++++++++++ 4 files changed, 430 insertions(+), 1 deletion(-) create mode 100644 drivers/dma/bcm2708-dmaengine.c create mode 100644 include/linux/platform_data/dma-bcm2708.h --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig -@@ -108,7 +108,7 @@ config COH901318 +@@ -131,7 +131,7 @@ config COH901318 config DMA_BCM2835 tristate "BCM2835 DMA engine support" @@ -170,7 +187,7 @@ bcm2708-dmaengine - Fix arm64 portability/build issues select DMA_ENGINE select DMA_VIRTUAL_CHANNELS -@@ -499,6 +499,10 @@ config TIMB_DMA +@@ -576,6 +576,10 @@ config TIMB_DMA help Enable support for the Timberdale FPGA DMA engine. @@ -178,14 +195,14 @@ bcm2708-dmaengine - Fix arm64 portability/build issues + tristate "BCM2708 DMA legacy API support" + depends on DMA_BCM2835 + - config TI_CPPI41 - tristate "AM33xx CPPI41 DMA support" - depends on ARCH_OMAP + config XGENE_DMA + tristate "APM X-Gene DMA support" + depends on ARCH_XGENE || COMPILE_TEST --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile -@@ -18,6 +18,7 @@ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o - obj-$(CONFIG_AT_XDMAC) += at_xdmac.o +@@ -21,6 +21,7 @@ obj-$(CONFIG_AT_XDMAC) += at_xdmac.o obj-$(CONFIG_AXI_DMAC) += dma-axi-dmac.o + obj-$(CONFIG_BCM_SBA_RAID) += bcm-sba-raid.o obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o +obj-$(CONFIG_DMA_BCM2708) += bcm2708-dmaengine.o obj-$(CONFIG_DMA_BCM2835) += bcm2835-dma.o @@ -555,7 +572,7 @@ bcm2708-dmaengine - Fix arm64 portability/build issues +struct scatterlist; +struct platform_device; + -+#ifdef CONFIG_DMA_BCM2708 ++#if defined(CONFIG_DMA_BCM2708) || defined(CONFIG_DMA_BCM2708_MODULE) + +int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len); +void bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block); @@ -618,6 +635,6 @@ bcm2708-dmaengine - Fix arm64 portability/build issues + return 0; +} + -+#endif /* CONFIG_DMA_BCM2708 */ ++#endif /* CONFIG_DMA_BCM2708 || CONFIG_DMA_BCM2708_MODULE */ + +#endif /* _PLAT_BCM2708_DMA_H */ diff --git a/target/linux/brcm2708/patches-4.9/950-0034-MMC-added-alternative-MMC-driver.patch b/target/linux/brcm2708/patches-4.19/950-0044-MMC-added-alternative-MMC-driver.patch similarity index 87% rename from target/linux/brcm2708/patches-4.9/950-0034-MMC-added-alternative-MMC-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0044-MMC-added-alternative-MMC-driver.patch index 70fb8f3d8..3cd347da9 100644 --- a/target/linux/brcm2708/patches-4.9/950-0034-MMC-added-alternative-MMC-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0044-MMC-added-alternative-MMC-driver.patch @@ -1,7 +1,7 @@ -From 1620619c5fa6acae1e119d6461b5c9a2a9416e69 Mon Sep 17 00:00:00 2001 +From c34520567bf3dbca64cb871dacab7230c61726f6 Mon Sep 17 00:00:00 2001 From: gellert Date: Fri, 15 Aug 2014 16:35:06 +0100 -Subject: [PATCH] MMC: added alternative MMC driver +Subject: [PATCH 044/703] MMC: added alternative MMC driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -82,47 +82,162 @@ doesn't need to claim two channels. See: https://github.com/raspberrypi/linux/issues/1327 +Signed-off-by: Phil Elwell + +bcm2835-mmc: New timer API + +mmc: bcm2835-mmc: Support underclocking + +Support underclocking of the SD bus using the max-frequency DT property +(which currently has no DT parameter). The sd_overclock parameter +already provides another way to achieve the same thing which should be +equivalent in end result, but it is a bug not to support max-frequency +as well. + +See: https://github.com/raspberrypi/linux/issues/2350 + Signed-off-by: Phil Elwell --- - drivers/mmc/core/quirks.c | 10 + + drivers/mmc/core/block.c | 28 +- + drivers/mmc/core/core.c | 3 +- + drivers/mmc/core/host.c | 17 +- + drivers/mmc/core/quirks.h | 8 + drivers/mmc/host/Kconfig | 29 + drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/bcm2835-mmc.c | 1574 ++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 1614 insertions(+) + drivers/mmc/host/bcm2835-mmc.c | 1582 ++++++++++++++++++++++++++++++++ + include/linux/mmc/card.h | 2 + + 8 files changed, 1665 insertions(+), 5 deletions(-) create mode 100644 drivers/mmc/host/bcm2835-mmc.c ---- a/drivers/mmc/core/quirks.c -+++ b/drivers/mmc/core/quirks.c -@@ -53,6 +53,9 @@ static const struct mmc_fixup mmc_fixup_ +--- a/drivers/mmc/core/block.c ++++ b/drivers/mmc/core/block.c +@@ -167,6 +167,13 @@ static DEFINE_MUTEX(open_lock); + module_param(perdev_minors, int, 0444); + MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device"); - void mmc_fixup_device(struct mmc_card *card, const struct mmc_fixup *table) ++/* ++ * Allow quirks to be overridden for the current card ++ */ ++static char *card_quirks; ++module_param(card_quirks, charp, 0644); ++MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)"); ++ + static inline int mmc_blk_part_switch(struct mmc_card *card, + unsigned int part_type); + +@@ -2919,6 +2926,7 @@ static int mmc_blk_probe(struct mmc_card { -+#ifdef CONFIG_MMC_BCM2835 -+ extern unsigned mmc_debug; -+#endif - const struct mmc_fixup *f; - u64 rev = cid_rev_card(card); + struct mmc_blk_data *md, *part_md; + char cap_str[10]; ++ char quirk_str[24]; -@@ -79,5 +82,12 @@ void mmc_fixup_device(struct mmc_card *c - f->vendor_fixup(card, f->data); - } - } -+ /* SDHCI on BCM2708 - bug causes a certain sequence of CMD23 operations to fail. -+ * Disable this flag for all cards (fall-back to CMD25/CMD18 multi-block transfers). -+ */ -+#ifdef CONFIG_MMC_BCM2835 -+ if (mmc_debug & (1<<13)) -+ card->quirks |= MMC_QUIRK_BLK_NO_CMD23; -+#endif + /* + * Check that the card supports the command class(es) we need. +@@ -2926,7 +2934,16 @@ static int mmc_blk_probe(struct mmc_card + if (!(card->csd.cmdclass & CCC_BLOCK_READ)) + return -ENODEV; + +- mmc_fixup_device(card, mmc_blk_fixups); ++ if (card_quirks) { ++ unsigned long quirks; ++ if (kstrtoul(card_quirks, 0, &quirks) == 0) ++ card->quirks = (unsigned int)quirks; ++ else ++ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n", ++ card_quirks); ++ } ++ else ++ mmc_fixup_device(card, mmc_blk_fixups); + + card->complete_wq = alloc_workqueue("mmc_complete", + WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); +@@ -2941,9 +2958,14 @@ static int mmc_blk_probe(struct mmc_card + + string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2, + cap_str, sizeof(cap_str)); +- pr_info("%s: %s %s %s %s\n", ++ if (card->quirks) ++ snprintf(quirk_str, sizeof(quirk_str), ++ " (quirks 0x%08x)", card->quirks); ++ else ++ quirk_str[0] = '\0'; ++ pr_info("%s: %s %s %s%s%s\n", + md->disk->disk_name, mmc_card_id(card), mmc_card_name(card), +- cap_str, md->read_only ? "(ro)" : ""); ++ cap_str, md->read_only ? " (ro)" : "", quirk_str); + + if (mmc_blk_alloc_parts(card, md)) + goto out; +--- a/drivers/mmc/core/core.c ++++ b/drivers/mmc/core/core.c +@@ -2230,7 +2230,8 @@ EXPORT_SYMBOL(mmc_erase); + int mmc_can_erase(struct mmc_card *card) + { + if ((card->host->caps & MMC_CAP_ERASE) && +- (card->csd.cmdclass & CCC_ERASE) && card->erase_size) ++ (card->csd.cmdclass & CCC_ERASE) && card->erase_size && ++ !(card->quirks & MMC_QUIRK_ERASE_BROKEN)) + return 1; + return 0; } - EXPORT_SYMBOL(mmc_fixup_device); +--- a/drivers/mmc/core/host.c ++++ b/drivers/mmc/core/host.c +@@ -359,15 +359,30 @@ struct mmc_host *mmc_alloc_host(int extr + { + int err; + struct mmc_host *host; ++ int id; + + host = kzalloc(sizeof(struct mmc_host) + extra, GFP_KERNEL); + if (!host) + return NULL; + ++ /* If OF aliases exist, start dynamic assignment after highest */ ++ id = of_alias_get_highest_id("mmc"); ++ id = (id < 0) ? 0 : id + 1; ++ ++ /* If this devices has OF node, maybe it has an alias */ ++ if (dev->of_node) { ++ int of_id = of_alias_get_id(dev->of_node, "mmc"); ++ ++ if (of_id < 0) ++ dev_warn(dev, "/aliases ID not available\n"); ++ else ++ id = of_id; ++ } ++ + /* scanning will be enabled when we're ready */ + host->rescan_disable = 1; + +- err = ida_simple_get(&mmc_host_ida, 0, 0, GFP_KERNEL); ++ err = ida_simple_get(&mmc_host_ida, id, 0, GFP_KERNEL); + if (err < 0) { + kfree(host); + return NULL; +--- a/drivers/mmc/core/quirks.h ++++ b/drivers/mmc/core/quirks.h +@@ -99,6 +99,14 @@ static const struct mmc_fixup mmc_blk_fi + MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc, + MMC_QUIRK_TRIM_BROKEN), + ++ /* ++ * On some Kingston SD cards, multiple erases of less than 64 ++ * sectors can cause corruption. ++ */ ++ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN), ++ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN), ++ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk, MMC_QUIRK_ERASE_BROKEN), ++ + END_FIXUP + }; + --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -4,6 +4,35 @@ comment "MMC/SD/SDIO Host Controller Drivers" -+config MMC_BCM2835 ++config MMC_BCM2835_MMC + tristate "MMC support on BCM2835" + depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835 + help @@ -134,7 +249,7 @@ Signed-off-by: Phil Elwell + +config MMC_BCM2835_DMA + bool "DMA support on BCM2835 Arasan controller" -+ depends on MMC_BCM2835 ++ depends on MMC_BCM2835_MMC + help + Enable DMA support on the Arasan SDHCI controller in Broadcom 2708 + based chips. @@ -143,7 +258,7 @@ Signed-off-by: Phil Elwell + +config MMC_BCM2835_PIO_DMA_BARRIER + int "Block count limit for PIO transfers" -+ depends on MMC_BCM2835 && MMC_BCM2835_DMA ++ depends on MMC_BCM2835_MMC && MMC_BCM2835_DMA + range 0 256 + default 2 + help @@ -151,22 +266,22 @@ Signed-off-by: Phil Elwell + + If unsure, say 2 here. + - config MMC_ARMMMCI - tristate "ARM AMBA Multimedia Card Interface support" - depends on ARM_AMBA + config MMC_DEBUG + bool "MMC host drivers debugging" + depends on MMC != n --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile -@@ -18,6 +18,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c +@@ -21,6 +21,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o obj-$(CONFIG_MMC_SDHCI_F_SDH30) += sdhci_f_sdh30.o obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o -+obj-$(CONFIG_MMC_BCM2835) += bcm2835-mmc.o ++obj-$(CONFIG_MMC_BCM2835_MMC) += bcm2835-mmc.o obj-$(CONFIG_MMC_WBSD) += wbsd.o obj-$(CONFIG_MMC_AU1X) += au1xmmc.o obj-$(CONFIG_MMC_MTK) += mtk-sd.o --- /dev/null +++ b/drivers/mmc/host/bcm2835-mmc.c -@@ -0,0 +1,1574 @@ +@@ -0,0 +1,1582 @@ +/* + * BCM2835 MMC host driver. + * @@ -284,6 +399,7 @@ Signed-off-by: Phil Elwell + + bool have_dma; + bool use_dma; ++ bool wait_for_dma; + /*end of DMA part*/ + + int max_delay; /* maximum length of time spent waiting */ @@ -419,7 +535,7 @@ Signed-off-by: Phil Elwell + bcm2835_mmc_readl(host, SDHCI_INT_ENABLE), + bcm2835_mmc_readl(host, SDHCI_SIGNAL_ENABLE)); + pr_debug(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", -+ bcm2835_mmc_readw(host, SDHCI_ACMD12_ERR), ++ bcm2835_mmc_readw(host, SDHCI_AUTO_CMD_STATUS), + bcm2835_mmc_readw(host, SDHCI_SLOT_INT_STATUS)); + pr_debug(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n", + bcm2835_mmc_readl(host, SDHCI_CAPABILITIES), @@ -510,6 +626,8 @@ Signed-off-by: Phil Elwell + + spin_lock_irqsave(&host->lock, flags); + ++ host->use_dma = false; ++ + if (host->data && !(host->data->flags & MMC_DATA_WRITE)) { + /* otherwise handled in SDHCI IRQ */ + dma_chan = host->dma_chan_rxtx; @@ -520,6 +638,9 @@ Signed-off-by: Phil Elwell + dir_data); + + bcm2835_mmc_finish_data(host); ++ } else if (host->wait_for_dma) { ++ host->wait_for_dma = false; ++ tasklet_schedule(&host->finish_tasklet); + } + + spin_unlock_irqrestore(&host->lock, flags); @@ -859,6 +980,7 @@ Signed-off-by: Phil Elwell + mod_timer(&host->timer, timeout); + + host->cmd = cmd; ++ host->use_dma = false; + + bcm2835_mmc_prepare_data(host, cmd); + @@ -928,8 +1050,11 @@ Signed-off-by: Phil Elwell + } + + bcm2835_mmc_send_command(host, data->stop); -+ } else ++ } else if (host->use_dma) { ++ host->wait_for_dma = true; ++ } else { + tasklet_schedule(&host->finish_tasklet); ++ } +} + +static void bcm2835_mmc_finish_command(struct bcm2835_host *host) @@ -979,13 +1104,11 @@ Signed-off-by: Phil Elwell +} + + -+static void bcm2835_mmc_timeout_timer(unsigned long data) ++static void bcm2835_mmc_timeout_timer(struct timer_list *t) +{ -+ struct bcm2835_host *host; ++ struct bcm2835_host *host = from_timer(host, t, timer); + unsigned long flags; + -+ host = (struct bcm2835_host *)data; -+ + spin_lock_irqsave(&host->lock, flags); + + if (host->mrq) { @@ -1469,8 +1592,8 @@ Signed-off-by: Phil Elwell + + host->clk_mul = 0; + -+ mmc->f_max = host->max_clk; -+ mmc->f_max = host->max_clk; ++ if (!mmc->f_max || mmc->f_max > host->max_clk) ++ mmc->f_max = host->max_clk; + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; + + /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */ @@ -1523,14 +1646,14 @@ Signed-off-by: Phil Elwell + if (ret == 0) { + host->dma_cfg_rx = cfg; + -+ host->use_dma = true; ++ host->have_dma = true; + } else { + pr_err("%s: unable to configure DMA channel. " -+ "Faling back to PIO\n", ++ "Falling back to PIO\n", + mmc_hostname(mmc)); + dma_release_channel(host->dma_chan_rxtx); + host->dma_chan_rxtx = NULL; -+ host->use_dma = false; ++ host->have_dma = false; + } + } +#endif @@ -1546,7 +1669,7 @@ Signed-off-by: Phil Elwell + tasklet_init(&host->finish_tasklet, + bcm2835_mmc_tasklet_finish, (unsigned long)host); + -+ setup_timer(&host->timer, bcm2835_mmc_timeout_timer, (unsigned long)host); ++ timer_setup(&host->timer, bcm2835_mmc_timeout_timer, 0); + init_waitqueue_head(&host->buf_ready_int); + + bcm2835_mmc_init(host, 0); @@ -1741,3 +1864,14 @@ Signed-off-by: Phil Elwell +MODULE_DESCRIPTION("BCM2835 SDHCI driver"); +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Gellert Weisz"); +--- a/include/linux/mmc/card.h ++++ b/include/linux/mmc/card.h +@@ -271,6 +271,8 @@ struct mmc_card { + #define MMC_QUIRK_TRIM_BROKEN (1<<12) /* Skip trim */ + #define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */ + ++#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */ ++ + bool reenable_cmdq; /* Re-enable Command Queue */ + + unsigned int erase_size; /* erase size in sectors */ diff --git a/target/linux/brcm2708/patches-4.9/950-0035-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch b/target/linux/brcm2708/patches-4.19/950-0045-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch similarity index 97% rename from target/linux/brcm2708/patches-4.9/950-0035-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch rename to target/linux/brcm2708/patches-4.19/950-0045-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch index c4597ec3c..cdd9656e7 100644 --- a/target/linux/brcm2708/patches-4.9/950-0035-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch +++ b/target/linux/brcm2708/patches-4.19/950-0045-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch @@ -1,7 +1,8 @@ -From 5da331581bb2a8d90f6a7a7bdf8c1b30efe3cf64 Mon Sep 17 00:00:00 2001 +From 878b9058f3939881f570d84e8584f5ff9f79a847 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 25 Mar 2015 17:49:47 +0000 -Subject: [PATCH] Adding bcm2835-sdhost driver, and an overlay to enable it +Subject: [PATCH 045/703] Adding bcm2835-sdhost driver, and an overlay to + enable it BCM2835 has two SD card interfaces. This driver uses the other one. @@ -159,25 +160,49 @@ Also: See: https://github.com/raspberrypi/linux/pull/1492 +Signed-off-by: Phil Elwell + +bcm2835-sdhost: mmc_card_blockaddr fix + +Get the definition of mmc_card_blockaddr from drivers/mmc/core/card.h. + +Signed-off-by: Phil Elwell + +bcm2835-sdhost: New timer API + +mmc: bcm2835-sdhost: Support underclocking + +Support underclocking of the SD bus in two ways: +1. using the max-frequency DT property (which currently has no DT + parameter), and +2. using the exiting sd_overclock parameter. + +The two methods differ slightly - in the former the MMC subsystem is +aware of the underclocking, while in the latter it isn't - but the +end results should be the same. + +See: https://github.com/raspberrypi/linux/issues/2350 + +Signed-off-by: Phil Elwell + +mmc: bcm2835-sdhost: Add include + +highmem.h (needed for kmap_atomic) is pulled in by one of the other +include files, but only with some CONFIG settings. Make the inclusion +explicit to cater for cases where the CONFIG setting is absent. + +See: https://github.com/raspberrypi/linux/issues/2366 + Signed-off-by: Phil Elwell --- - drivers/mmc/host/Kconfig | 12 +- + drivers/mmc/host/Kconfig | 10 + drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/bcm2835-sdhost.c | 2189 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 2201 insertions(+), 1 deletion(-) + drivers/mmc/host/bcm2835-sdhost.c | 2191 +++++++++++++++++++++++++++++ + 3 files changed, 2202 insertions(+) create mode 100644 drivers/mmc/host/bcm2835-sdhost.c --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig -@@ -6,7 +6,7 @@ comment "MMC/SD/SDIO Host Controller Dri - - config MMC_BCM2835 - tristate "MMC support on BCM2835" -- depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835 -+ depends on ARCH_BCM2835 - help - This selects the MMC Interface on BCM2835. - @@ -33,6 +33,16 @@ config MMC_BCM2835_PIO_DMA_BARRIER If unsure, say 2 here. @@ -192,22 +217,22 @@ Signed-off-by: Phil Elwell + + If unsure, say N. + - config MMC_ARMMMCI - tristate "ARM AMBA Multimedia Card Interface support" - depends on ARM_AMBA + config MMC_DEBUG + bool "MMC host drivers debugging" + depends on MMC != n --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile -@@ -18,6 +18,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c - obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o +@@ -22,6 +22,7 @@ obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci obj-$(CONFIG_MMC_SDHCI_F_SDH30) += sdhci_f_sdh30.o obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o + obj-$(CONFIG_MMC_BCM2835_MMC) += bcm2835-mmc.o +obj-$(CONFIG_MMC_BCM2835_SDHOST) += bcm2835-sdhost.o - obj-$(CONFIG_MMC_BCM2835) += bcm2835-mmc.o obj-$(CONFIG_MMC_WBSD) += wbsd.o obj-$(CONFIG_MMC_AU1X) += au1xmmc.o + obj-$(CONFIG_MMC_MTK) += mtk-sd.o --- /dev/null +++ b/drivers/mmc/host/bcm2835-sdhost.c -@@ -0,0 +1,2189 @@ +@@ -0,0 +1,2191 @@ +/* + * BCM2835 SD host driver. + * @@ -261,8 +286,13 @@ Signed-off-by: Phil Elwell +#include +#include +#include ++#include ++#include +#include + ++/* For mmc_card_blockaddr */ ++#include "../core/card.h" ++ +#define DRIVER_NAME "sdhost-bcm2835" + +#define SDCMD 0x00 /* Command to SD card - 16 R/W */ @@ -1509,13 +1539,11 @@ Signed-off-by: Phil Elwell + log_event("FCM>", (u32)host->mrq, (u32)host->cmd); +} + -+static void bcm2835_sdhost_timeout(unsigned long data) ++static void bcm2835_sdhost_timeout(struct timer_list *t) +{ -+ struct bcm2835_host *host; ++ struct bcm2835_host *host = from_timer(host, t, timer); + unsigned long flags; + -+ host = (struct bcm2835_host *)data; -+ + spin_lock_irqsave(&host->lock, flags); + log_event("TIM<", 0, 0); + @@ -1725,8 +1753,7 @@ Signed-off-by: Phil Elwell + if (host->debug) + pr_info("%s: set_clock(%d)\n", mmc_hostname(host->mmc), clock); + -+ if ((host->overclock_50 > 50) && -+ (clock == 50*MHZ)) ++ if (host->overclock_50 && (clock == 50*MHZ)) + clock = host->overclock_50 * MHZ + (MHZ - 1); + + /* The SDCDIV register has 11 bits, and holds (div - 2). @@ -2100,7 +2127,8 @@ Signed-off-by: Phil Elwell + + mmc = host->mmc; + -+ mmc->f_max = host->max_clk; ++ if (!mmc->f_max || mmc->f_max > host->max_clk) ++ mmc->f_max = host->max_clk; + mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; + + mmc->max_busy_timeout = (~(unsigned int)0)/(mmc->f_max/1000); @@ -2176,8 +2204,7 @@ Signed-off-by: Phil Elwell + + INIT_WORK(&host->cmd_wait_wq, bcm2835_sdhost_cmd_wait_work); + -+ setup_timer(&host->timer, bcm2835_sdhost_timeout, -+ (unsigned long)host); ++ timer_setup(&host->timer, bcm2835_sdhost_timeout, 0); + + bcm2835_sdhost_init(host, 0); + diff --git a/target/linux/brcm2708/patches-4.9/950-0039-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch b/target/linux/brcm2708/patches-4.19/950-0046-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch similarity index 94% rename from target/linux/brcm2708/patches-4.9/950-0039-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch rename to target/linux/brcm2708/patches-4.19/950-0046-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch index 6a22bdf97..044b573f7 100644 --- a/target/linux/brcm2708/patches-4.9/950-0039-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch +++ b/target/linux/brcm2708/patches-4.19/950-0046-vc_mem-Add-vc_mem-driver-for-querying-firmware-memor.patch @@ -1,8 +1,8 @@ -From 94c0e75bc85ad2a034c501b6d3640b880b9c3bb7 Mon Sep 17 00:00:00 2001 +From 93e55dab09f9790d4cb547a9ac0a3c4803e682db Mon Sep 17 00:00:00 2001 From: popcornmix Date: Fri, 28 Oct 2016 15:36:43 +0100 -Subject: [PATCH] vc_mem: Add vc_mem driver for querying firmware memory - addresses +Subject: [PATCH 046/703] vc_mem: Add vc_mem driver for querying firmware + memory addresses MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -15,29 +15,29 @@ Make the vc_mem module available for ARCH_BCM2835 by moving it. Signed-off-by: Noralf Trønnes --- - drivers/char/broadcom/Kconfig | 12 +- + drivers/char/broadcom/Kconfig | 18 ++ drivers/char/broadcom/Makefile | 1 + - drivers/char/broadcom/vc_mem.c | 422 ++++++++++++++++++++++++++++++++++++++++ - include/linux/broadcom/vc_mem.h | 35 ++++ - 4 files changed, 469 insertions(+), 1 deletion(-) + drivers/char/broadcom/vc_mem.c | 422 ++++++++++++++++++++++++++++++++ + include/linux/broadcom/vc_mem.h | 35 +++ + 4 files changed, 476 insertions(+) + create mode 100644 drivers/char/broadcom/Kconfig + create mode 100644 drivers/char/broadcom/Makefile create mode 100644 drivers/char/broadcom/vc_mem.c create mode 100644 include/linux/broadcom/vc_mem.h ---- a/drivers/char/broadcom/Kconfig +--- /dev/null +++ b/drivers/char/broadcom/Kconfig -@@ -7,9 +7,19 @@ menuconfig BRCM_CHAR_DRIVERS - help - Broadcom's char drivers - -+if BRCM_CHAR_DRIVERS +@@ -0,0 +1,18 @@ ++# ++# Broadcom char driver config ++# + - config BCM_VC_CMA - bool "Videocore CMA" -- depends on CMA && BRCM_CHAR_DRIVERS && BCM2708_VCHIQ -+ depends on CMA && BCM2708_VCHIQ - default n - help - Helper for videocore CMA access. ++menuconfig BRCM_CHAR_DRIVERS ++ bool "Broadcom Char Drivers" ++ help ++ Broadcom's char drivers ++ ++if BRCM_CHAR_DRIVERS + +config BCM2708_VCMEM + bool "Videocore Memory" @@ -46,10 +46,9 @@ Signed-off-by: Noralf Trønnes + Helper for videocore memory access and total size allocation. + +endif ---- a/drivers/char/broadcom/Makefile +--- /dev/null +++ b/drivers/char/broadcom/Makefile -@@ -1 +1,2 @@ - obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ +@@ -0,0 +1 @@ +obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o --- /dev/null +++ b/drivers/char/broadcom/vc_mem.c @@ -76,7 +75,7 @@ Signed-off-by: Noralf Trønnes +#include +#include +#include -+#include ++#include +#include +#include + diff --git a/target/linux/brcm2708/patches-4.9/950-0040-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch b/target/linux/brcm2708/patches-4.19/950-0047-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch similarity index 65% rename from target/linux/brcm2708/patches-4.9/950-0040-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch rename to target/linux/brcm2708/patches-4.19/950-0047-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch index ff1cfad30..72957fd78 100644 --- a/target/linux/brcm2708/patches-4.9/950-0040-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch +++ b/target/linux/brcm2708/patches-4.19/950-0047-vcsm-VideoCore-shared-memory-service-for-BCM2835.patch @@ -1,7 +1,7 @@ -From b62c07606f1673e2e0b9e70ce89e48fc240a7ee1 Mon Sep 17 00:00:00 2001 +From 949b8ddbdd7d0865f71b93cc3774b738f229062a Mon Sep 17 00:00:00 2001 From: Tim Gover Date: Tue, 22 Jul 2014 15:41:04 +0100 -Subject: [PATCH] vcsm: VideoCore shared memory service for BCM2835 +Subject: [PATCH 047/703] vcsm: VideoCore shared memory service for BCM2835 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -41,17 +41,106 @@ vcsm: Add ioctl for custom cache flushing vc-sm: Move headers out of arch directory Signed-off-by: Noralf Trønnes + +vcsm: Treat EBUSY as success rather than SIGBUS + +Currently if two cores access the same page concurrently one will return VM_FAULT_NOPAGE +and the other VM_FAULT_SIGBUS crashing the user code. + +Also report when mapping fails. + +Signed-off-by: popcornmix + +vcsm: Provide new ioctl to clean/invalidate a 2D block + +vcsm: Convert to loading via device tree. + +Signed-off-by: Dave Stevenson + +VCSM: New option to import a DMABUF for VPU use + +Takes a dmabuf, and then calls over to the VPU to wrap +it into a suitable handle. + +Signed-off-by: Dave Stevenson + +vcsm: fix multi-platform build + +vcsm: add macros for cache functions + +vcsm: use dma APIs for cache functions + +* Will handle multi-platform builds + +vcsm: Fix up macros to avoid breaking numbers used by existing apps + +vcsm: Define cache operation constants in user header + +Without this change, users have to use raw values (1, 2, 3) to specify +cache operation. + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Support for finding user/vc handle in memory pool + +vmcs_sm_{usr,vc}_handle_from_pid_and_address() were failing to find +handle if specified user pointer is not exactly the one that the memory +locking call returned even if the pointer is in range of map/resource. +So fixed the functions to match the range. + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Unify cache manipulating functions + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Fix obscure conditions + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Fix memory leaking on clean_invalid2 ioctl handler + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Describe the use of cache operation constants + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Fix obscure conditions again + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Add no-op cache operation constant + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Revert to do page-table-walk-based cache manipulating on some ioctl calls + +On FLUSH, INVALID, CLEAN_INVALID ioctl calls, cache operations based on +page table walk were used in case that the buffer of the cache is not +pinned. So reverted to do page-table-based cache manipulating. + +Signed-off-by: Sugizaki Yukimasa + +vcsm: Define cache operation constants in user header + +Without this change, users have to use raw values (1, 2, 3) to specify +cache operation. + +Signed-off-by: Sugizaki Yukimasa --- - drivers/char/broadcom/Kconfig | 9 + + drivers/char/Kconfig | 2 + + drivers/char/Makefile | 1 + + drivers/char/broadcom/Kconfig | 10 + drivers/char/broadcom/Makefile | 1 + drivers/char/broadcom/vc_sm/Makefile | 9 + - drivers/char/broadcom/vc_sm/vc_sm_defs.h | 181 ++ - drivers/char/broadcom/vc_sm/vc_sm_knl.h | 55 + - drivers/char/broadcom/vc_sm/vc_vchi_sm.c | 492 +++++ - drivers/char/broadcom/vc_sm/vc_vchi_sm.h | 82 + - drivers/char/broadcom/vc_sm/vmcs_sm.c | 3213 ++++++++++++++++++++++++++++++ - include/linux/broadcom/vmcs_sm_ioctl.h | 248 +++ - 9 files changed, 4290 insertions(+) + drivers/char/broadcom/vc_sm/vc_sm_defs.h | 237 ++ + drivers/char/broadcom/vc_sm/vc_sm_knl.h | 53 + + drivers/char/broadcom/vc_sm/vc_vchi_sm.c | 516 ++++ + drivers/char/broadcom/vc_sm/vc_vchi_sm.h | 102 + + drivers/char/broadcom/vc_sm/vmcs_sm.c | 3543 ++++++++++++++++++++++ + include/linux/broadcom/vmcs_sm_ioctl.h | 294 ++ + 11 files changed, 4768 insertions(+) create mode 100644 drivers/char/broadcom/vc_sm/Makefile create mode 100644 drivers/char/broadcom/vc_sm/vc_sm_defs.h create mode 100644 drivers/char/broadcom/vc_sm/vc_sm_knl.h @@ -60,25 +149,43 @@ Signed-off-by: Noralf Trønnes create mode 100644 drivers/char/broadcom/vc_sm/vmcs_sm.c create mode 100644 include/linux/broadcom/vmcs_sm_ioctl.h +--- a/drivers/char/Kconfig ++++ b/drivers/char/Kconfig +@@ -5,6 +5,8 @@ + + menu "Character devices" + ++source "drivers/char/broadcom/Kconfig" ++ + source "drivers/tty/Kconfig" + + config DEVMEM +--- a/drivers/char/Makefile ++++ b/drivers/char/Makefile +@@ -58,3 +58,4 @@ js-rtc-y = rtc.o + obj-$(CONFIG_XILLYBUS) += xillybus/ + obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o + obj-$(CONFIG_ADI) += adi.o ++obj-$(CONFIG_BRCM_CHAR_DRIVERS) += broadcom/ --- a/drivers/char/broadcom/Kconfig +++ b/drivers/char/broadcom/Kconfig -@@ -23,3 +23,12 @@ config BCM2708_VCMEM +@@ -16,3 +16,13 @@ config BCM2708_VCMEM Helper for videocore memory access and total size allocation. endif + +config BCM_VC_SM + bool "VMCS Shared Memory" -+ depends on BCM2708_VCHIQ ++ depends on BCM2835_VCHIQ + select BCM2708_VCMEM ++ select DMA_SHARED_BUFFER + default n + help + Support for the VC shared memory on the Broadcom reference + design. Uses the VCHIQ stack. --- a/drivers/char/broadcom/Makefile +++ b/drivers/char/broadcom/Makefile -@@ -1,2 +1,3 @@ - obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ +@@ -1 +1,2 @@ obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o +obj-$(CONFIG_BCM_VC_SM) += vc_sm/ --- /dev/null @@ -95,20 +202,22 @@ Signed-off-by: Noralf Trønnes + vc_vchi_sm.o --- /dev/null +++ b/drivers/char/broadcom/vc_sm/vc_sm_defs.h -@@ -0,0 +1,181 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ +@@ -0,0 +1,237 @@ ++/* ++ **************************************************************************** ++ * Copyright 2011 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ **************************************************************************** ++ */ + +#ifndef __VC_SM_DEFS_H__INCLUDED__ +#define __VC_SM_DEFS_H__INCLUDED__ @@ -117,15 +226,16 @@ Signed-off-by: Noralf Trønnes +#define VC_SM_SERVER_NAME MAKE_FOURCC("SMEM") + +/* Maximum message length */ -+#define VC_SM_MAX_MSG_LEN (sizeof(VC_SM_MSG_UNION_T) + \ -+ sizeof(VC_SM_MSG_HDR_T)) -+#define VC_SM_MAX_RSP_LEN (sizeof(VC_SM_MSG_UNION_T)) ++#define VC_SM_MAX_MSG_LEN (sizeof(union vc_sm_msg_union_t) + \ ++ sizeof(struct vc_sm_msg_hdr_t)) ++#define VC_SM_MAX_RSP_LEN (sizeof(union vc_sm_msg_union_t)) + +/* Resource name maximum size */ +#define VC_SM_RESOURCE_NAME 32 + -+/* All message types supported for HOST->VC direction */ -+typedef enum { ++enum vc_sm_msg_type { ++ /* Message types supported for HOST->VC direction */ ++ + /* Allocate shared memory block */ + VC_SM_MSG_TYPE_ALLOC, + /* Lock allocated shared memory block */ @@ -143,28 +253,42 @@ Signed-off-by: Noralf Trønnes + + /* A previously applied action will need to be reverted */ + VC_SM_MSG_TYPE_ACTION_CLEAN, ++ ++ /* ++ * Import a physical address and wrap into a MEM_HANDLE_T. ++ * Release with VC_SM_MSG_TYPE_FREE. ++ */ ++ VC_SM_MSG_TYPE_IMPORT, ++ ++ /* Message types supported for VC->HOST direction */ ++ ++ /* ++ * VC has finished with an imported memory allocation. ++ * Release any Linux reference counts on the underlying block. ++ */ ++ VC_SM_MSG_TYPE_RELEASED, ++ + VC_SM_MSG_TYPE_MAX -+} VC_SM_MSG_TYPE; ++}; + +/* Type of memory to be allocated */ -+typedef enum { ++enum vc_sm_alloc_type_t { + VC_SM_ALLOC_CACHED, + VC_SM_ALLOC_NON_CACHED, -+ -+} VC_SM_ALLOC_TYPE_T; ++}; + +/* Message header for all messages in HOST->VC direction */ -+typedef struct { ++struct vc_sm_msg_hdr_t { + int32_t type; + uint32_t trans_id; + uint8_t body[0]; + -+} VC_SM_MSG_HDR_T; ++}; + +/* Request to allocate memory (HOST->VC) */ -+typedef struct { ++struct vc_sm_alloc_t { + /* type of memory to allocate */ -+ VC_SM_ALLOC_TYPE_T type; ++ enum vc_sm_alloc_type_t type; + /* byte amount of data to allocate per unit */ + uint32_t base_unit; + /* number of unit to allocate */ @@ -176,123 +300,164 @@ Signed-off-by: Noralf Trønnes + /* resource name (for easier tracking on vc side) */ + char name[VC_SM_RESOURCE_NAME]; + -+} VC_SM_ALLOC_T; ++}; + +/* Result of a requested memory allocation (VC->HOST) */ -+typedef struct { ++struct vc_sm_alloc_result_t { + /* Transaction identifier */ + uint32_t trans_id; + + /* Resource handle */ + uint32_t res_handle; + /* Pointer to resource buffer */ -+ void *res_mem; ++ uint32_t res_mem; + /* Resource base size (bytes) */ + uint32_t res_base_size; + /* Resource number */ + uint32_t res_num; + -+} VC_SM_ALLOC_RESULT_T; ++}; + +/* Request to free a previously allocated memory (HOST->VC) */ -+typedef struct { ++struct vc_sm_free_t { + /* Resource handle (returned from alloc) */ + uint32_t res_handle; + /* Resource buffer (returned from alloc) */ -+ void *res_mem; ++ uint32_t res_mem; + -+} VC_SM_FREE_T; ++}; + +/* Request to lock a previously allocated memory (HOST->VC) */ -+typedef struct { ++struct vc_sm_lock_unlock_t { + /* Resource handle (returned from alloc) */ + uint32_t res_handle; + /* Resource buffer (returned from alloc) */ -+ void *res_mem; ++ uint32_t res_mem; + -+} VC_SM_LOCK_UNLOCK_T; ++}; + +/* Request to resize a previously allocated memory (HOST->VC) */ -+typedef struct { ++struct vc_sm_resize_t { + /* Resource handle (returned from alloc) */ + uint32_t res_handle; + /* Resource buffer (returned from alloc) */ -+ void *res_mem; ++ uint32_t res_mem; + /* Resource *new* size requested (bytes) */ + uint32_t res_new_size; + -+} VC_SM_RESIZE_T; ++}; + +/* Result of a requested memory lock (VC->HOST) */ -+typedef struct { ++struct vc_sm_lock_result_t { + /* Transaction identifier */ + uint32_t trans_id; + + /* Resource handle */ + uint32_t res_handle; + /* Pointer to resource buffer */ -+ void *res_mem; -+ /* Pointer to former resource buffer if the memory -+ * was reallocated */ -+ void *res_old_mem; ++ uint32_t res_mem; ++ /* ++ * Pointer to former resource buffer if the memory ++ * was reallocated ++ */ ++ uint32_t res_old_mem; + -+} VC_SM_LOCK_RESULT_T; ++}; + +/* Generic result for a request (VC->HOST) */ -+typedef struct { ++struct vc_sm_result_t { + /* Transaction identifier */ + uint32_t trans_id; + + int32_t success; + -+} VC_SM_RESULT_T; ++}; + +/* Request to revert a previously applied action (HOST->VC) */ -+typedef struct { ++struct vc_sm_action_clean_t { + /* Action of interest */ -+ VC_SM_MSG_TYPE res_action; ++ enum vc_sm_msg_type res_action; + /* Transaction identifier for the action of interest */ + uint32_t action_trans_id; + -+} VC_SM_ACTION_CLEAN_T; ++}; + +/* Request to remove all data associated with a given allocator (HOST->VC) */ -+typedef struct { ++struct vc_sm_free_all_t { + /* Allocator identifier */ + uint32_t allocator; ++}; + -+} VC_SM_FREE_ALL_T; ++/* Request to import memory (HOST->VC) */ ++struct vc_sm_import { ++ /* type of memory to allocate */ ++ enum vc_sm_alloc_type_t type; ++ /* pointer to the VC (ie physical) address of the allocated memory */ ++ uint32_t addr; ++ /* size of buffer */ ++ uint32_t size; ++ /* opaque handle returned in RELEASED messages */ ++ int32_t kernel_id; ++ /* Allocator identifier */ ++ uint32_t allocator; ++ /* resource name (for easier tracking on vc side) */ ++ char name[VC_SM_RESOURCE_NAME]; ++}; ++ ++/* Result of a requested memory import (VC->HOST) */ ++struct vc_sm_import_result { ++ /* Transaction identifier */ ++ uint32_t trans_id; ++ ++ /* Resource handle */ ++ uint32_t res_handle; ++}; ++ ++/* Notification that VC has finished with an allocation (VC->HOST) */ ++struct vc_sm_released { ++ /* pointer to the VC (ie physical) address of the allocated memory */ ++ uint32_t addr; ++ /* size of buffer */ ++ uint32_t size; ++ /* opaque handle returned in RELEASED messages */ ++ int32_t kernel_id; ++}; + +/* Union of ALL messages */ -+typedef union { -+ VC_SM_ALLOC_T alloc; -+ VC_SM_ALLOC_RESULT_T alloc_result; -+ VC_SM_FREE_T free; -+ VC_SM_ACTION_CLEAN_T action_clean; -+ VC_SM_RESIZE_T resize; -+ VC_SM_LOCK_RESULT_T lock_result; -+ VC_SM_RESULT_T result; -+ VC_SM_FREE_ALL_T free_all; -+ -+} VC_SM_MSG_UNION_T; ++union vc_sm_msg_union_t { ++ struct vc_sm_alloc_t alloc; ++ struct vc_sm_alloc_result_t alloc_result; ++ struct vc_sm_free_t free; ++ struct vc_sm_lock_unlock_t lock_unlock; ++ struct vc_sm_action_clean_t action_clean; ++ struct vc_sm_resize_t resize; ++ struct vc_sm_lock_result_t lock_result; ++ struct vc_sm_result_t result; ++ struct vc_sm_free_all_t free_all; ++ struct vc_sm_import import; ++ struct vc_sm_import_result import_result; ++ struct vc_sm_released released; ++}; + +#endif /* __VC_SM_DEFS_H__INCLUDED__ */ --- /dev/null +++ b/drivers/char/broadcom/vc_sm/vc_sm_knl.h -@@ -0,0 +1,55 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ +@@ -0,0 +1,53 @@ ++/* ++ **************************************************************************** ++ * Copyright 2011 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ **************************************************************************** ++ */ + +#ifndef __VC_SM_KNL_H__INCLUDED__ +#define __VC_SM_KNL_H__INCLUDED__ @@ -302,55 +467,53 @@ Signed-off-by: Noralf Trønnes +#endif + +/* Type of memory to be locked (ie mapped) */ -+typedef enum { ++enum vc_sm_lock_cache_mode { + VC_SM_LOCK_CACHED, + VC_SM_LOCK_NON_CACHED, ++}; + -+} VC_SM_LOCK_CACHE_MODE_T; ++/* Allocate a shared memory handle and block. */ ++int vc_sm_alloc(struct vc_sm_alloc_t *alloc, int *handle); + -+/* Allocate a shared memory handle and block. -+*/ -+int vc_sm_alloc(VC_SM_ALLOC_T *alloc, int *handle); -+ -+/* Free a previously allocated shared memory handle and block. -+*/ ++/* Free a previously allocated shared memory handle and block. */ +int vc_sm_free(int handle); + -+/* Lock a memory handle for use by kernel. -+*/ -+int vc_sm_lock(int handle, VC_SM_LOCK_CACHE_MODE_T mode, -+ long unsigned int *data); ++/* Lock a memory handle for use by kernel. */ ++int vc_sm_lock(int handle, enum vc_sm_lock_cache_mode mode, ++ unsigned long *data); + -+/* Unlock a memory handle in use by kernel. -+*/ ++/* Unlock a memory handle in use by kernel. */ +int vc_sm_unlock(int handle, int flush, int no_vc_unlock); + -+/* Get an internal resource handle mapped from the external one. -+*/ ++/* Get an internal resource handle mapped from the external one. */ +int vc_sm_int_handle(int handle); + -+/* Map a shared memory region for use by kernel. -+*/ -+int vc_sm_map(int handle, unsigned int sm_addr, VC_SM_LOCK_CACHE_MODE_T mode, -+ long unsigned int *data); ++/* Map a shared memory region for use by kernel. */ ++int vc_sm_map(int handle, unsigned int sm_addr, ++ enum vc_sm_lock_cache_mode mode, unsigned long *data); ++ ++/* Import a block of memory into the GPU space. */ ++int vc_sm_import_dmabuf(struct dma_buf *dmabuf, int *handle); + +#endif /* __VC_SM_KNL_H__INCLUDED__ */ --- /dev/null +++ b/drivers/char/broadcom/vc_sm/vc_vchi_sm.c -@@ -0,0 +1,492 @@ -+/***************************************************************************** -+* Copyright 2011-2012 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ +@@ -0,0 +1,516 @@ ++/* ++ **************************************************************************** ++ * Copyright 2011-2012 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ **************************************************************************** ++ */ + +/* ---- Include Files ----------------------------------------------------- */ +#include @@ -411,13 +574,23 @@ Signed-off-by: Noralf Trønnes +/* ---- Private Function Prototypes -------------------------------------- */ + +/* ---- Private Functions ------------------------------------------------ */ ++static int ++bcm2835_vchi_msg_queue(VCHI_SERVICE_HANDLE_T handle, ++ void *data, ++ unsigned int size) ++{ ++ return vchi_queue_kernel_message(handle, ++ data, ++ size); ++} ++ +static struct +sm_cmd_rsp_blk *vc_vchi_cmd_create(struct sm_instance *instance, -+ VC_SM_MSG_TYPE id, void *msg, ++ enum vc_sm_msg_type id, void *msg, + uint32_t size, int wait) +{ + struct sm_cmd_rsp_blk *blk; -+ VC_SM_MSG_HDR_T *hdr; ++ struct vc_sm_msg_hdr_t *hdr; + + if (down_interruptible(&instance->free_sema)) { + blk = kmalloc(sizeof(*blk), GFP_KERNEL); @@ -439,7 +612,7 @@ Signed-off-by: Noralf Trønnes + blk->wait = wait; + blk->length = sizeof(*hdr) + size; + -+ hdr = (VC_SM_MSG_HDR_T *) blk->msg; ++ hdr = (struct vc_sm_msg_hdr_t *) blk->msg; + hdr->type = id; + mutex_lock(&instance->lock); + hdr->trans_id = blk->id = ++instance->trans_id; @@ -469,7 +642,7 @@ Signed-off-by: Noralf Trønnes +{ + struct sm_instance *instance = arg; + struct sm_cmd_rsp_blk *cmd = NULL, *cmd_tmp; -+ VC_SM_RESULT_T *reply; ++ struct vc_sm_result_t *reply; + uint32_t reply_len; + int32_t status; + int svc_use = 1; @@ -483,7 +656,6 @@ Signed-off-by: Noralf Trønnes + svc_use = 1; + + do { -+ unsigned int flags; + /* + * Get new command and move it to response list + */ @@ -502,11 +674,9 @@ Signed-off-by: Noralf Trønnes + mutex_unlock(&instance->lock); + + /* Send the command */ -+ flags = VCHI_FLAGS_BLOCK_UNTIL_QUEUED; -+ status = vchi_msg_queue( ++ status = bcm2835_vchi_msg_queue( + instance->vchi_handle[0], -+ cmd->msg, cmd->length, -+ flags, NULL); ++ cmd->msg, cmd->length); + if (status) { + pr_err("%s: failed to queue message (%d)", + __func__, status); @@ -588,7 +758,7 @@ Signed-off-by: Noralf Trønnes + } +} + -+VC_VCHI_SM_HANDLE_T vc_vchi_sm_init(VCHI_INSTANCE_T vchi_instance, ++struct sm_instance *vc_vchi_sm_init(VCHI_INSTANCE_T vchi_instance, + VCHI_CONNECTION_T **vchi_connections, + uint32_t num_connections) +{ @@ -658,7 +828,8 @@ Signed-off-by: Noralf Trønnes + set_user_nice(instance->io_thread, -10); + wake_up_process(instance->io_thread); + -+ pr_debug("%s: success - instance 0x%x", __func__, (unsigned)instance); ++ pr_debug("%s: success - instance 0x%x", __func__, ++ (unsigned int)instance); + return instance; + +err_close_services: @@ -672,7 +843,7 @@ Signed-off-by: Noralf Trønnes + return NULL; +} + -+int vc_vchi_sm_stop(VC_VCHI_SM_HANDLE_T *handle) ++int vc_vchi_sm_stop(struct sm_instance **handle) +{ + struct sm_instance *instance; + uint32_t i; @@ -692,6 +863,7 @@ Signed-off-by: Noralf Trønnes + /* Close all VCHI service connections */ + for (i = 0; i < instance->num_connections; i++) { + int32_t success; ++ + vchi_service_use(instance->vchi_handle[i]); + + success = vchi_service_close(instance->vchi_handle[i]); @@ -706,8 +878,8 @@ Signed-off-by: Noralf Trønnes + return -EINVAL; +} + -+int vc_vchi_sm_send_msg(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_MSG_TYPE msg_id, ++int vc_vchi_sm_send_msg(struct sm_instance *handle, ++ enum vc_sm_msg_type msg_id, + void *msg, uint32_t msg_size, + void *result, uint32_t result_size, + uint32_t *cur_trans_id, uint8_t wait_reply) @@ -766,7 +938,8 @@ Signed-off-by: Noralf Trønnes + if (result && result_size) { + memcpy(result, cmd_blk->msg, result_size); + } else { -+ VC_SM_RESULT_T *res = (VC_SM_RESULT_T *) cmd_blk->msg; ++ struct vc_sm_result_t *res = ++ (struct vc_sm_result_t *) cmd_blk->msg; + status = (res->success == 0) ? 0 : -ENXIO; + } + @@ -777,32 +950,34 @@ Signed-off-by: Noralf Trønnes + return status; +} + -+int vc_vchi_sm_alloc(VC_VCHI_SM_HANDLE_T handle, VC_SM_ALLOC_T *msg, -+ VC_SM_ALLOC_RESULT_T *result, uint32_t *cur_trans_id) ++int vc_vchi_sm_alloc(struct sm_instance *handle, struct vc_sm_alloc_t *msg, ++ struct vc_sm_alloc_result_t *result, ++ uint32_t *cur_trans_id) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_ALLOC, + msg, sizeof(*msg), result, sizeof(*result), + cur_trans_id, 1); +} + -+int vc_vchi_sm_free(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_FREE_T *msg, uint32_t *cur_trans_id) ++int vc_vchi_sm_free(struct sm_instance *handle, ++ struct vc_sm_free_t *msg, uint32_t *cur_trans_id) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_FREE, + msg, sizeof(*msg), 0, 0, cur_trans_id, 0); +} + -+int vc_vchi_sm_lock(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_LOCK_UNLOCK_T *msg, -+ VC_SM_LOCK_RESULT_T *result, uint32_t *cur_trans_id) ++int vc_vchi_sm_lock(struct sm_instance *handle, ++ struct vc_sm_lock_unlock_t *msg, ++ struct vc_sm_lock_result_t *result, ++ uint32_t *cur_trans_id) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_LOCK, + msg, sizeof(*msg), result, sizeof(*result), + cur_trans_id, 1); +} + -+int vc_vchi_sm_unlock(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_LOCK_UNLOCK_T *msg, ++int vc_vchi_sm_unlock(struct sm_instance *handle, ++ struct vc_sm_lock_unlock_t *msg, + uint32_t *cur_trans_id, uint8_t wait_reply) +{ + return vc_vchi_sm_send_msg(handle, wait_reply ? @@ -812,40 +987,52 @@ Signed-off-by: Noralf Trønnes + wait_reply); +} + -+int vc_vchi_sm_resize(VC_VCHI_SM_HANDLE_T handle, VC_SM_RESIZE_T *msg, -+ uint32_t *cur_trans_id) ++int vc_vchi_sm_resize(struct sm_instance *handle, struct vc_sm_resize_t *msg, ++ uint32_t *cur_trans_id) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_RESIZE, + msg, sizeof(*msg), 0, 0, cur_trans_id, 1); +} + -+int vc_vchi_sm_walk_alloc(VC_VCHI_SM_HANDLE_T handle) ++int vc_vchi_sm_walk_alloc(struct sm_instance *handle) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_WALK_ALLOC, + 0, 0, 0, 0, 0, 0); +} + -+int vc_vchi_sm_clean_up(VC_VCHI_SM_HANDLE_T handle, VC_SM_ACTION_CLEAN_T *msg) ++int vc_vchi_sm_clean_up(struct sm_instance *handle, ++ struct vc_sm_action_clean_t *msg) +{ + return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_ACTION_CLEAN, + msg, sizeof(*msg), 0, 0, 0, 0); +} ++ ++int vc_vchi_sm_import(struct sm_instance *handle, struct vc_sm_import *msg, ++ struct vc_sm_import_result *result, ++ uint32_t *cur_trans_id) ++{ ++ return vc_vchi_sm_send_msg(handle, VC_SM_MSG_TYPE_IMPORT, ++ msg, sizeof(*msg), result, sizeof(*result), ++ cur_trans_id, 1); ++} --- /dev/null +++ b/drivers/char/broadcom/vc_sm/vc_vchi_sm.h -@@ -0,0 +1,82 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ +@@ -0,0 +1,102 @@ ++/* ++ **************************************************************************** ++ * Copyright 2011 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ **************************************************************************** ++ */ + +#ifndef __VC_VCHI_SM_H__INCLUDED__ +#define __VC_VCHI_SM_H__INCLUDED__ @@ -854,83 +1041,103 @@ Signed-off-by: Noralf Trønnes + +#include "vc_sm_defs.h" + -+/* Forward declare. -+*/ -+typedef struct sm_instance *VC_VCHI_SM_HANDLE_T; ++/* ++ * Forward declare. ++ */ ++struct sm_instance; + -+/* Initialize the shared memory service, opens up vchi connection to talk to it. -+*/ -+VC_VCHI_SM_HANDLE_T vc_vchi_sm_init(VCHI_INSTANCE_T vchi_instance, ++/* ++ * Initialize the shared memory service, opens up vchi connection to talk to it. ++ */ ++struct sm_instance *vc_vchi_sm_init(VCHI_INSTANCE_T vchi_instance, + VCHI_CONNECTION_T **vchi_connections, + uint32_t num_connections); + -+/* Terminates the shared memory service. -+*/ -+int vc_vchi_sm_stop(VC_VCHI_SM_HANDLE_T *handle); ++/* ++ * Terminates the shared memory service. ++ */ ++int vc_vchi_sm_stop(struct sm_instance **handle); + -+/* Ask the shared memory service to allocate some memory on videocre and -+** return the result of this allocation (which upon success will be a pointer -+** to some memory in videocore space). -+*/ -+int vc_vchi_sm_alloc(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_ALLOC_T *alloc, -+ VC_SM_ALLOC_RESULT_T *alloc_result, uint32_t *trans_id); ++/* ++ * Ask the shared memory service to allocate some memory on videocre and ++ * return the result of this allocation (which upon success will be a pointer ++ * to some memory in videocore space). ++ */ ++int vc_vchi_sm_alloc(struct sm_instance *handle, struct vc_sm_alloc_t *alloc, ++ struct vc_sm_alloc_result_t *alloc_result, ++ uint32_t *trans_id); + -+/* Ask the shared memory service to free up some memory that was previously -+** allocated by the vc_vchi_sm_alloc function call. -+*/ -+int vc_vchi_sm_free(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_FREE_T *free, uint32_t *trans_id); ++/* ++ * Ask the shared memory service to free up some memory that was previously ++ * allocated by the vc_vchi_sm_alloc function call. ++ */ ++int vc_vchi_sm_free(struct sm_instance *handle, ++ struct vc_sm_free_t *free, uint32_t *trans_id); + -+/* Ask the shared memory service to lock up some memory that was previously -+** allocated by the vc_vchi_sm_alloc function call. -+*/ -+int vc_vchi_sm_lock(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_LOCK_UNLOCK_T *lock_unlock, -+ VC_SM_LOCK_RESULT_T *lock_result, uint32_t *trans_id); ++/* ++ * Ask the shared memory service to lock up some memory that was previously ++ * allocated by the vc_vchi_sm_alloc function call. ++ */ ++int vc_vchi_sm_lock(struct sm_instance *handle, ++ struct vc_sm_lock_unlock_t *lock_unlock, ++ struct vc_sm_lock_result_t *lock_result, ++ uint32_t *trans_id); + -+/* Ask the shared memory service to unlock some memory that was previously -+** allocated by the vc_vchi_sm_alloc function call. -+*/ -+int vc_vchi_sm_unlock(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_LOCK_UNLOCK_T *lock_unlock, ++/* ++ * Ask the shared memory service to unlock some memory that was previously ++ * allocated by the vc_vchi_sm_alloc function call. ++ */ ++int vc_vchi_sm_unlock(struct sm_instance *handle, ++ struct vc_sm_lock_unlock_t *lock_unlock, + uint32_t *trans_id, uint8_t wait_reply); + -+/* Ask the shared memory service to resize some memory that was previously -+** allocated by the vc_vchi_sm_alloc function call. -+*/ -+int vc_vchi_sm_resize(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_RESIZE_T *resize, uint32_t *trans_id); ++/* ++ * Ask the shared memory service to resize some memory that was previously ++ * allocated by the vc_vchi_sm_alloc function call. ++ */ ++int vc_vchi_sm_resize(struct sm_instance *handle, ++ struct vc_sm_resize_t *resize, uint32_t *trans_id); + -+/* Walk the allocated resources on the videocore side, the allocation will -+** show up in the log. This is purely for debug/information and takes no -+** specific actions. -+*/ -+int vc_vchi_sm_walk_alloc(VC_VCHI_SM_HANDLE_T handle); ++/* ++ * Walk the allocated resources on the videocore side, the allocation will ++ * show up in the log. This is purely for debug/information and takes no ++ * specific actions. ++ */ ++int vc_vchi_sm_walk_alloc(struct sm_instance *handle); + -+/* Clean up following a previously interrupted action which left the system -+** in a bad state of some sort. -+*/ -+int vc_vchi_sm_clean_up(VC_VCHI_SM_HANDLE_T handle, -+ VC_SM_ACTION_CLEAN_T *action_clean); ++/* ++ * Clean up following a previously interrupted action which left the system ++ * in a bad state of some sort. ++ */ ++int vc_vchi_sm_clean_up(struct sm_instance *handle, ++ struct vc_sm_action_clean_t *action_clean); ++ ++/* ++ * Import a contiguous block of memory and wrap it in a GPU MEM_HANDLE_T. ++ */ ++int vc_vchi_sm_import(struct sm_instance *handle, struct vc_sm_import *msg, ++ struct vc_sm_import_result *result, ++ uint32_t *cur_trans_id); + +#endif /* __VC_VCHI_SM_H__INCLUDED__ */ --- /dev/null +++ b/drivers/char/broadcom/vc_sm/vmcs_sm.c -@@ -0,0 +1,3213 @@ -+/***************************************************************************** -+* Copyright 2011-2012 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ +@@ -0,0 +1,3543 @@ ++/* ++ **************************************************************************** ++ * Copyright 2011-2012 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ **************************************************************************** ++ */ + +/* ---- Include Files ----------------------------------------------------- */ + @@ -939,6 +1146,7 @@ Signed-off-by: Noralf Trønnes +#include +#include +#include ++#include +#include +#include +#include @@ -947,6 +1155,8 @@ Signed-off-by: Noralf Trønnes +#include +#include +#include ++#include ++#include +#include +#include +#include @@ -965,6 +1175,7 @@ Signed-off-by: Noralf Trønnes +/* ---- Private Constants and Types --------------------------------------- */ + +#define DEVICE_NAME "vcsm" ++#define DRIVER_NAME "bcm2835-vcsm" +#define DEVICE_MINOR 0 + +#define VC_SM_DIR_ROOT_NAME "vc-smem" @@ -975,9 +1186,8 @@ Signed-off-by: Noralf Trønnes +#define VC_SM_DEBUG "debug" +#define VC_SM_WRITE_BUF_SIZE 128 + -+/* Statistics tracked per resource and globally. -+*/ -+enum SM_STATS_T { ++/* Statistics tracked per resource and globally. */ ++enum sm_stats_t { + /* Attempt. */ + ALLOC, + FREE, @@ -986,6 +1196,7 @@ Signed-off-by: Noralf Trønnes + MAP, + FLUSH, + INVALID, ++ IMPORT, + + END_ATTEMPT, + @@ -997,6 +1208,7 @@ Signed-off-by: Noralf Trønnes + MAP_FAIL, + FLUSH_FAIL, + INVALID_FAIL, ++ IMPORT_FAIL, + + END_ALL, + @@ -1010,38 +1222,37 @@ Signed-off-by: Noralf Trønnes + "Map", + "Cache Flush", + "Cache Invalidate", ++ "Import", +}; + +typedef int (*VC_SM_SHOW) (struct seq_file *s, void *v); -+struct SM_PDE_T { ++struct sm_pde_t { + VC_SM_SHOW show; /* Debug fs function hookup. */ + struct dentry *dir_entry; /* Debug fs directory entry. */ + void *priv_data; /* Private data */ + +}; + -+/* Single resource allocation tracked for all devices. -+*/ ++/* Single resource allocation tracked for all devices. */ +struct sm_mmap { + struct list_head map_list; /* Linked list of maps. */ + -+ struct SM_RESOURCE_T *resource; /* Pointer to the resource. */ ++ struct sm_resource_t *resource; /* Pointer to the resource. */ + -+ pid_t res_pid; /* PID owning that resource. */ ++ pid_t res_pid; /* PID owning that resource. */ + unsigned int res_vc_hdl; /* Resource handle (videocore). */ + unsigned int res_usr_hdl; /* Resource handle (user). */ + -+ long unsigned int res_addr; /* Mapped virtual address. */ ++ unsigned long res_addr; /* Mapped virtual address. */ + struct vm_area_struct *vma; /* VM area for this mapping. */ -+ unsigned int ref_count; /* Reference count to this vma. */ ++ unsigned int ref_count; /* Reference count to this vma. */ + + /* Used to link maps associated with a resource. */ + struct list_head resource_map_list; +}; + -+/* Single resource allocation tracked for each opened device. -+*/ -+struct SM_RESOURCE_T { ++/* Single resource allocation tracked for each opened device. */ ++struct sm_resource_t { + struct list_head resource_list; /* List of resources. */ + struct list_head global_resource_list; /* Global list of resources. */ + @@ -1054,49 +1265,55 @@ Signed-off-by: Noralf Trønnes + void *res_base_mem; /* Resource base memory address. */ + uint32_t res_size; /* Resource size allocated. */ + enum vmcs_sm_cache_e res_cached; /* Resource cache type. */ -+ struct SM_RESOURCE_T *res_shared; /* Shared resource */ ++ struct sm_resource_t *res_shared; /* Shared resource */ + -+ enum SM_STATS_T res_stats[END_ALL]; /* Resource statistics. */ ++ enum sm_stats_t res_stats[END_ALL]; /* Resource statistics. */ + + uint8_t map_count; /* Counter of mappings for this resource. */ + struct list_head map_list; /* Maps associated with a resource. */ + -+ struct SM_PRIV_DATA_T *private; ++ /* DMABUF related fields */ ++ struct dma_buf *dma_buf; ++ struct dma_buf_attachment *attach; ++ struct sg_table *sgt; ++ dma_addr_t dma_addr; ++ ++ struct sm_priv_data_t *private; ++ bool map; /* whether to map pages up front */ +}; + -+/* Private file data associated with each opened device. -+*/ -+struct SM_PRIV_DATA_T { ++/* Private file data associated with each opened device. */ ++struct sm_priv_data_t { + struct list_head resource_list; /* List of resources. */ + + pid_t pid; /* PID of creator. */ + + struct dentry *dir_pid; /* Debug fs entries root. */ -+ struct SM_PDE_T dir_stats; /* Debug fs entries statistics sub-tree. */ -+ struct SM_PDE_T dir_res; /* Debug fs resource sub-tree. */ ++ struct sm_pde_t dir_stats; /* Debug fs entries statistics sub-tree. */ ++ struct sm_pde_t dir_res; /* Debug fs resource sub-tree. */ + + int restart_sys; /* Tracks restart on interrupt. */ -+ VC_SM_MSG_TYPE int_action; /* Interrupted action. */ ++ enum vc_sm_msg_type int_action; /* Interrupted action. */ + uint32_t int_trans_id; /* Interrupted transaction. */ + +}; + -+/* Global state information. -+*/ -+struct SM_STATE_T { -+ VC_VCHI_SM_HANDLE_T sm_handle; /* Handle for videocore service. */ ++/* Global state information. */ ++struct sm_state_t { ++ struct platform_device *pdev; ++ struct sm_instance *sm_handle; /* Handle for videocore service. */ + struct dentry *dir_root; /* Debug fs entries root. */ + struct dentry *dir_alloc; /* Debug fs entries allocations. */ -+ struct SM_PDE_T dir_stats; /* Debug fs entries statistics sub-tree. */ -+ struct SM_PDE_T dir_state; /* Debug fs entries state sub-tree. */ ++ struct sm_pde_t dir_stats; /* Debug fs entries statistics sub-tree. */ ++ struct sm_pde_t dir_state; /* Debug fs entries state sub-tree. */ + struct dentry *debug; /* Debug fs entries debug. */ + + struct mutex map_lock; /* Global map lock. */ + struct list_head map_list; /* List of maps. */ + struct list_head resource_list; /* List of resources. */ + -+ enum SM_STATS_T deceased[END_ALL]; /* Natural termination stats. */ -+ enum SM_STATS_T terminated[END_ALL]; /* Forced termination stats. */ ++ enum sm_stats_t deceased[END_ALL]; /* Natural termination stats. */ ++ enum sm_stats_t terminated[END_ALL]; /* Forced termination stats. */ + uint32_t res_deceased_cnt; /* Natural termination counter. */ + uint32_t res_terminated_cnt; /* Forced termination counter. */ + @@ -1105,7 +1322,7 @@ Signed-off-by: Noralf Trønnes + struct class *sm_class; /* Class. */ + struct device *sm_dev; /* Device. */ + -+ struct SM_PRIV_DATA_T *data_knl; /* Kernel internal data tracking. */ ++ struct sm_priv_data_t *data_knl; /* Kernel internal data tracking. */ + + struct mutex lock; /* Global lock. */ + uint32_t guid; /* GUID (next) tracker. */ @@ -1114,7 +1331,7 @@ Signed-off-by: Noralf Trønnes + +/* ---- Private Variables ----------------------------------------------- */ + -+static struct SM_STATE_T *sm_state; ++static struct sm_state_t *sm_state; +static int sm_inited; + +#if 0 @@ -1130,18 +1347,20 @@ Signed-off-by: Noralf Trønnes + +/* ---- Private Functions ------------------------------------------------ */ + -+static inline unsigned vcaddr_to_pfn(unsigned long vc_addr) ++static inline unsigned int vcaddr_to_pfn(unsigned long vc_addr) +{ + unsigned long pfn = vc_addr & 0x3FFFFFFF; ++ + pfn += mm_vc_mem_phys_addr; + pfn >>= PAGE_SHIFT; + return pfn; +} + -+/* Carries over to the state statistics the statistics once owned by a deceased -+** resource. -+*/ -+static void vc_sm_resource_deceased(struct SM_RESOURCE_T *p_res, int terminated) ++/* ++ * Carries over to the state statistics the statistics once owned by a deceased ++ * resource. ++ */ ++static void vc_sm_resource_deceased(struct sm_resource_t *p_res, int terminated) +{ + if (sm_state != NULL) { + if (p_res != NULL) { @@ -1164,9 +1383,10 @@ Signed-off-by: Noralf Trønnes + } +} + -+/* Fetch a videocore handle corresponding to a mapping of the pid+address -+** returns 0 (ie NULL) if no such handle exists in the global map. -+*/ ++/* ++ * Fetch a videocore handle corresponding to a mapping of the pid+address ++ * returns 0 (ie NULL) if no such handle exists in the global map. ++ */ +static unsigned int vmcs_sm_vc_handle_from_pid_and_address(unsigned int pid, + unsigned int addr) +{ @@ -1178,11 +1398,13 @@ Signed-off-by: Noralf Trønnes + + mutex_lock(&(sm_state->map_lock)); + -+ /* Lookup the resource. -+ */ ++ /* Lookup the resource. */ + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { -+ if (map->res_pid != pid || map->res_addr != addr) ++ if (map->res_pid != pid) ++ continue; ++ if (addr < map->res_addr || ++ addr >= (map->res_addr + map->resource->res_size)) + continue; + + pr_debug("[%s]: global map %p (pid %u, addr %lx) -> vc-hdl %x (usr-hdl %x)\n", @@ -1197,13 +1419,14 @@ Signed-off-by: Noralf Trønnes + mutex_unlock(&(sm_state->map_lock)); + +out: -+ /* Use a debug log here as it may be a valid situation that we query -+ ** for something that is not mapped, we do not want a kernel log each -+ ** time around. -+ ** -+ ** There are other error log that would pop up accordingly if someone -+ ** subsequently tries to use something invalid after being told not to -+ ** use it... ++ /* ++ * Use a debug log here as it may be a valid situation that we query ++ * for something that is not mapped, we do not want a kernel log each ++ * time around. ++ * ++ * There are other error log that would pop up accordingly if someone ++ * subsequently tries to use something invalid after being told not to ++ * use it... + */ + if (handle == 0) { + pr_debug("[%s]: not a valid map (pid %u, addr %x)\n", @@ -1213,9 +1436,10 @@ Signed-off-by: Noralf Trønnes + return handle; +} + -+/* Fetch a user handle corresponding to a mapping of the pid+address -+** returns 0 (ie NULL) if no such handle exists in the global map. -+*/ ++/* ++ * Fetch a user handle corresponding to a mapping of the pid+address ++ * returns 0 (ie NULL) if no such handle exists in the global map. ++ */ +static unsigned int vmcs_sm_usr_handle_from_pid_and_address(unsigned int pid, + unsigned int addr) +{ @@ -1227,11 +1451,13 @@ Signed-off-by: Noralf Trønnes + + mutex_lock(&(sm_state->map_lock)); + -+ /* Lookup the resource. -+ */ ++ /* Lookup the resource. */ + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { -+ if (map->res_pid != pid || map->res_addr != addr) ++ if (map->res_pid != pid) ++ continue; ++ if (addr < map->res_addr || ++ addr >= (map->res_addr + map->resource->res_size)) + continue; + + pr_debug("[%s]: global map %p (pid %u, addr %lx) -> usr-hdl %x (vc-hdl %x)\n", @@ -1246,7 +1472,8 @@ Signed-off-by: Noralf Trønnes + mutex_unlock(&(sm_state->map_lock)); + +out: -+ /* Use a debug log here as it may be a valid situation that we query ++ /* ++ * Use a debug log here as it may be a valid situation that we query + * for something that is not mapped yet. + * + * There are other error log that would pop up accordingly if someone @@ -1261,9 +1488,10 @@ Signed-off-by: Noralf Trønnes +} + +#if defined(DO_NOT_USE) -+/* Fetch an address corresponding to a mapping of the pid+handle -+** returns 0 (ie NULL) if no such address exists in the global map. -+*/ ++/* ++ * Fetch an address corresponding to a mapping of the pid+handle ++ * returns 0 (ie NULL) if no such address exists in the global map. ++ */ +static unsigned int vmcs_sm_usr_address_from_pid_and_vc_handle(unsigned int pid, + unsigned int hdl) +{ @@ -1275,8 +1503,7 @@ Signed-off-by: Noralf Trønnes + + mutex_lock(&(sm_state->map_lock)); + -+ /* Lookup the resource. -+ */ ++ /* Lookup the resource. */ + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { + if (map->res_pid != pid || map->res_vc_hdl != hdl) @@ -1294,13 +1521,14 @@ Signed-off-by: Noralf Trønnes + mutex_unlock(&(sm_state->map_lock)); + +out: -+ /* Use a debug log here as it may be a valid situation that we query -+ ** for something that is not mapped, we do not want a kernel log each -+ ** time around. -+ ** -+ ** There are other error log that would pop up accordingly if someone -+ ** subsequently tries to use something invalid after being told not to -+ ** use it... ++ /* ++ * Use a debug log here as it may be a valid situation that we query ++ * for something that is not mapped, we do not want a kernel log each ++ * time around. ++ * ++ * There are other error log that would pop up accordingly if someone ++ * subsequently tries to use something invalid after being told not to ++ * use it... + */ + if (addr == 0) + pr_debug("[%s]: not a valid map (pid %u, hdl %x)\n", @@ -1310,9 +1538,10 @@ Signed-off-by: Noralf Trønnes +} +#endif + -+/* Fetch an address corresponding to a mapping of the pid+handle -+** returns 0 (ie NULL) if no such address exists in the global map. -+*/ ++/* ++ * Fetch an address corresponding to a mapping of the pid+handle ++ * returns 0 (ie NULL) if no such address exists in the global map. ++ */ +static unsigned int vmcs_sm_usr_address_from_pid_and_usr_handle(unsigned int + pid, + unsigned int @@ -1326,8 +1555,7 @@ Signed-off-by: Noralf Trønnes + + mutex_lock(&(sm_state->map_lock)); + -+ /* Lookup the resource. -+ */ ++ /* Lookup the resource. */ + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { + if (map->res_pid != pid || map->res_usr_hdl != hdl) @@ -1345,7 +1573,8 @@ Signed-off-by: Noralf Trønnes + mutex_unlock(&(sm_state->map_lock)); + +out: -+ /* Use a debug log here as it may be a valid situation that we query ++ /* ++ * Use a debug log here as it may be a valid situation that we query + * for something that is not mapped, we do not want a kernel log each + * time around. + * @@ -1360,19 +1589,16 @@ Signed-off-by: Noralf Trønnes + return addr; +} + -+/* Adds a resource mapping to the global data list. -+*/ -+static void vmcs_sm_add_map(struct SM_STATE_T *state, -+ struct SM_RESOURCE_T *resource, struct sm_mmap *map) ++/* Adds a resource mapping to the global data list. */ ++static void vmcs_sm_add_map(struct sm_state_t *state, ++ struct sm_resource_t *resource, struct sm_mmap *map) +{ + mutex_lock(&(state->map_lock)); + -+ /* Add to the global list of mappings -+ */ ++ /* Add to the global list of mappings */ + list_add(&map->map_list, &state->map_list); + -+ /* Add to the list of mappings for this resource -+ */ ++ /* Add to the list of mappings for this resource */ + list_add(&map->resource_map_list, &resource->map_list); + resource->map_count++; + @@ -1383,20 +1609,17 @@ Signed-off-by: Noralf Trønnes + map->res_usr_hdl, map->res_addr); +} + -+/* Removes a resource mapping from the global data list. -+*/ -+static void vmcs_sm_remove_map(struct SM_STATE_T *state, -+ struct SM_RESOURCE_T *resource, ++/* Removes a resource mapping from the global data list. */ ++static void vmcs_sm_remove_map(struct sm_state_t *state, ++ struct sm_resource_t *resource, + struct sm_mmap *map) +{ + mutex_lock(&(state->map_lock)); + -+ /* Remove from the global list of mappings -+ */ ++ /* Remove from the global list of mappings */ + list_del(&map->map_list); + -+ /* Remove from the list of mapping for this resource -+ */ ++ /* Remove from the list of mapping for this resource */ + list_del(&map->resource_map_list); + if (resource->map_count > 0) + resource->map_count--; @@ -1410,12 +1633,13 @@ Signed-off-by: Noralf Trønnes + kfree(map); +} + -+/* Read callback for the global state proc entry. -+*/ ++/* Read callback for the global state proc entry. */ +static int vc_sm_global_state_show(struct seq_file *s, void *v) +{ + struct sm_mmap *map = NULL; ++ struct sm_resource_t *resource = NULL; + int map_count = 0; ++ int resource_count = 0; + + if (sm_state == NULL) + return 0; @@ -1423,11 +1647,44 @@ Signed-off-by: Noralf Trønnes + seq_printf(s, "\nVC-ServiceHandle 0x%x\n", + (unsigned int)sm_state->sm_handle); + -+ /* Log all applicable mapping(s). -+ */ ++ /* Log all applicable mapping(s). */ + + mutex_lock(&(sm_state->map_lock)); ++ seq_puts(s, "\nResources\n"); ++ if (!list_empty(&sm_state->resource_list)) { ++ list_for_each_entry(resource, &sm_state->resource_list, ++ global_resource_list) { ++ resource_count++; + ++ seq_printf(s, "\nResource %p\n", ++ resource); ++ seq_printf(s, " PID %u\n", ++ resource->pid); ++ seq_printf(s, " RES_GUID 0x%x\n", ++ resource->res_guid); ++ seq_printf(s, " LOCK_COUNT %u\n", ++ resource->lock_count); ++ seq_printf(s, " REF_COUNT %u\n", ++ resource->ref_count); ++ seq_printf(s, " res_handle 0x%X\n", ++ resource->res_handle); ++ seq_printf(s, " res_base_mem %p\n", ++ resource->res_base_mem); ++ seq_printf(s, " SIZE %d\n", ++ resource->res_size); ++ seq_printf(s, " DMABUF %p\n", ++ resource->dma_buf); ++ seq_printf(s, " ATTACH %p\n", ++ resource->attach); ++ seq_printf(s, " SGT %p\n", ++ resource->sgt); ++ seq_printf(s, " DMA_ADDR %pad\n", ++ &resource->dma_addr); ++ } ++ } ++ seq_printf(s, "\n\nTotal resource count: %d\n\n", resource_count); ++ ++ seq_puts(s, "\nMappings\n"); + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { + map_count++; @@ -1442,6 +1699,8 @@ Signed-off-by: Noralf Trønnes + map->res_usr_hdl); + seq_printf(s, " USR-ADDR 0x%lx\n", + map->res_addr); ++ seq_printf(s, " SIZE %d\n", ++ map->resource->res_size); + } + } + @@ -1455,8 +1714,7 @@ Signed-off-by: Noralf Trønnes +{ + int ix; + -+ /* Global state tracked statistics. -+ */ ++ /* Global state tracked statistics. */ + if (sm_state != NULL) { + seq_puts(s, "\nDeceased Resources Statistics\n"); + @@ -1502,24 +1760,22 @@ Signed-off-by: Noralf Trønnes +} + +#if 0 -+/* Read callback for the statistics proc entry. -+*/ ++/* Read callback for the statistics proc entry. */ +static int vc_sm_statistics_show(struct seq_file *s, void *v) +{ + int ix; -+ struct SM_PRIV_DATA_T *file_data; -+ struct SM_RESOURCE_T *resource; ++ struct sm_priv_data_t *file_data; ++ struct sm_resource_t *resource; + int res_count = 0; -+ struct SM_PDE_T *p_pde; ++ struct sm_pde_t *p_pde; + -+ p_pde = (struct SM_PDE_T *)(s->private); -+ file_data = (struct SM_PRIV_DATA_T *)(p_pde->priv_data); ++ p_pde = (struct sm_pde_t *)(s->private); ++ file_data = (struct sm_priv_data_t *)(p_pde->priv_data); + + if (file_data == NULL) + return 0; + -+ /* Per process statistics. -+ */ ++ /* Per process statistics. */ + + seq_printf(s, "\nStatistics for TGID %d\n", file_data->pid); + @@ -1565,13 +1821,13 @@ Signed-off-by: Noralf Trønnes +/* Read callback for the allocation proc entry. */ +static int vc_sm_alloc_show(struct seq_file *s, void *v) +{ -+ struct SM_PRIV_DATA_T *file_data; -+ struct SM_RESOURCE_T *resource; ++ struct sm_priv_data_t *file_data; ++ struct sm_resource_t *resource; + int alloc_count = 0; -+ struct SM_PDE_T *p_pde; ++ struct sm_pde_t *p_pde; + -+ p_pde = (struct SM_PDE_T *)(s->private); -+ file_data = (struct SM_PRIV_DATA_T *)(p_pde->priv_data); ++ p_pde = (struct sm_pde_t *)(s->private); ++ file_data = (struct sm_priv_data_t *)(p_pde->priv_data); + + if (!file_data) + return 0; @@ -1613,9 +1869,9 @@ Signed-off-by: Noralf Trønnes + +static int vc_sm_seq_file_show(struct seq_file *s, void *v) +{ -+ struct SM_PDE_T *sm_pde; ++ struct sm_pde_t *sm_pde; + -+ sm_pde = (struct SM_PDE_T *)(s->private); ++ sm_pde = (struct sm_pde_t *)(s->private); + + if (sm_pde && sm_pde->show) + sm_pde->show(s, v); @@ -1635,11 +1891,12 @@ Signed-off-by: Noralf Trønnes + .release = single_release, +}; + -+/* Adds a resource to the private data list which tracks all the allocated -+** data. -+*/ -+static void vmcs_sm_add_resource(struct SM_PRIV_DATA_T *privdata, -+ struct SM_RESOURCE_T *resource) ++/* ++ * Adds a resource to the private data list which tracks all the allocated ++ * data. ++ */ ++static void vmcs_sm_add_resource(struct sm_priv_data_t *privdata, ++ struct sm_resource_t *resource) +{ + mutex_lock(&(sm_state->map_lock)); + list_add(&resource->resource_list, &privdata->resource_list); @@ -1651,14 +1908,15 @@ Signed-off-by: Noralf Trønnes + resource->res_handle, resource->res_size, resource->res_cached); +} + -+/* Locates a resource and acquire a reference on it. -+** The resource won't be deleted while there is a reference on it. -+*/ -+static struct SM_RESOURCE_T *vmcs_sm_acquire_resource(struct SM_PRIV_DATA_T ++/* ++ * Locates a resource and acquire a reference on it. ++ * The resource won't be deleted while there is a reference on it. ++ */ ++static struct sm_resource_t *vmcs_sm_acquire_resource(struct sm_priv_data_t + *private, + unsigned int res_guid) +{ -+ struct SM_RESOURCE_T *resource, *ret = NULL; ++ struct sm_resource_t *resource, *ret = NULL; + + mutex_lock(&(sm_state->map_lock)); + @@ -1680,13 +1938,14 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Locates a resource and acquire a reference on it. -+** The resource won't be deleted while there is a reference on it. -+*/ -+static struct SM_RESOURCE_T *vmcs_sm_acquire_first_resource( -+ struct SM_PRIV_DATA_T *private) ++/* ++ * Locates a resource and acquire a reference on it. ++ * The resource won't be deleted while there is a reference on it. ++ */ ++static struct sm_resource_t *vmcs_sm_acquire_first_resource( ++ struct sm_priv_data_t *private) +{ -+ struct SM_RESOURCE_T *resource, *ret = NULL; ++ struct sm_resource_t *resource, *ret = NULL; + + mutex_lock(&(sm_state->map_lock)); + @@ -1705,13 +1964,14 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Locates a resource and acquire a reference on it. -+** The resource won't be deleted while there is a reference on it. -+*/ -+static struct SM_RESOURCE_T *vmcs_sm_acquire_global_resource(unsigned int ++/* ++ * Locates a resource and acquire a reference on it. ++ * The resource won't be deleted while there is a reference on it. ++ */ ++static struct sm_resource_t *vmcs_sm_acquire_global_resource(unsigned int + res_guid) +{ -+ struct SM_RESOURCE_T *resource, *ret = NULL; ++ struct sm_resource_t *resource, *ret = NULL; + + mutex_lock(&(sm_state->map_lock)); + @@ -1734,14 +1994,15 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Release a previously acquired resource. -+** The resource will be deleted when its refcount reaches 0. -+*/ -+static void vmcs_sm_release_resource(struct SM_RESOURCE_T *resource, int force) ++/* ++ * Release a previously acquired resource. ++ * The resource will be deleted when its refcount reaches 0. ++ */ ++static void vmcs_sm_release_resource(struct sm_resource_t *resource, int force) +{ -+ struct SM_PRIV_DATA_T *private = resource->private; ++ struct sm_priv_data_t *private = resource->private; + struct sm_mmap *map, *map_tmp; -+ struct SM_RESOURCE_T *res_tmp; ++ struct sm_resource_t *res_tmp; + int ret; + + mutex_lock(&(sm_state->map_lock)); @@ -1758,7 +2019,8 @@ Signed-off-by: Noralf Trønnes + list_del(&resource->resource_list); + list_del(&resource->global_resource_list); + -+ /* Walk the global resource list, find out if the resource is used ++ /* ++ * Walk the global resource list, find out if the resource is used + * somewhere else. In which case we don't want to delete it. + */ + list_for_each_entry(res_tmp, &sm_state->resource_list, @@ -1783,7 +2045,7 @@ Signed-off-by: Noralf Trønnes + resource_map_list) { + ret = + do_munmap(current->mm, map->res_addr, -+ resource->res_size); ++ resource->res_size, NULL); + if (ret) { + pr_err("[%s]: could not unmap resource %p\n", + __func__, resource); @@ -1792,11 +2054,10 @@ Signed-off-by: Noralf Trønnes + up_write(¤t->mm->mmap_sem); + } + -+ /* Free up the videocore allocated resource. -+ */ ++ /* Free up the videocore allocated resource. */ + if (resource->res_handle) { -+ VC_SM_FREE_T free = { -+ resource->res_handle, resource->res_base_mem ++ struct vc_sm_free_t free = { ++ resource->res_handle, (uint32_t)resource->res_base_mem + }; + int status = vc_vchi_sm_free(sm_state->sm_handle, &free, + &private->int_trans_id); @@ -1808,27 +2069,33 @@ Signed-off-by: Noralf Trønnes + } + } + -+ /* Free up the shared resource. -+ */ ++ if (resource->sgt) ++ dma_buf_unmap_attachment(resource->attach, resource->sgt, ++ DMA_BIDIRECTIONAL); ++ if (resource->attach) ++ dma_buf_detach(resource->dma_buf, resource->attach); ++ if (resource->dma_buf) ++ dma_buf_put(resource->dma_buf); ++ ++ /* Free up the shared resource. */ + if (resource->res_shared) + vmcs_sm_release_resource(resource->res_shared, 0); + -+ /* Free up the local resource tracking this allocation. -+ */ ++ /* Free up the local resource tracking this allocation. */ + vc_sm_resource_deceased(resource, force); + kfree(resource); +} + -+/* Dump the map table for the driver. If process is -1, dumps the whole table, -+** if process is a valid pid (non -1) dump only the entries associated with the -+** pid of interest. -+*/ ++/* ++ * Dump the map table for the driver. If process is -1, dumps the whole table, ++ * if process is a valid pid (non -1) dump only the entries associated with the ++ * pid of interest. ++ */ +static void vmcs_sm_host_walk_map_per_pid(int pid) +{ + struct sm_mmap *map = NULL; + -+ /* Make sure the device was started properly. -+ */ ++ /* Make sure the device was started properly. */ + if (sm_state == NULL) { + pr_err("[%s]: invalid device\n", __func__); + return; @@ -1836,8 +2103,7 @@ Signed-off-by: Noralf Trønnes + + mutex_lock(&(sm_state->map_lock)); + -+ /* Log all applicable mapping(s). -+ */ ++ /* Log all applicable mapping(s). */ + if (!list_empty(&sm_state->map_list)) { + list_for_each_entry(map, &sm_state->map_list, map_list) { + if (pid == -1 || map->res_pid == pid) { @@ -1849,19 +2115,17 @@ Signed-off-by: Noralf Trønnes + } + + mutex_unlock(&(sm_state->map_lock)); -+ -+ return; +} + -+/* Dump the allocation table from host side point of view. This only dumps the -+** data allocated for this process/device referenced by the file_data. -+*/ -+static void vmcs_sm_host_walk_alloc(struct SM_PRIV_DATA_T *file_data) ++/* ++ * Dump the allocation table from host side point of view. This only dumps the ++ * data allocated for this process/device referenced by the file_data. ++ */ ++static void vmcs_sm_host_walk_alloc(struct sm_priv_data_t *file_data) +{ -+ struct SM_RESOURCE_T *resource = NULL; ++ struct sm_resource_t *resource = NULL; + -+ /* Make sure the device was started properly. -+ */ ++ /* Make sure the device was started properly. */ + if ((sm_state == NULL) || (file_data == NULL)) { + pr_err("[%s]: invalid device\n", __func__); + return; @@ -1880,16 +2144,13 @@ Signed-off-by: Noralf Trønnes + } + + mutex_unlock(&(sm_state->map_lock)); -+ -+ return; +} + -+/* Create support for private data tracking. -+*/ -+static struct SM_PRIV_DATA_T *vc_sm_create_priv_data(pid_t id) ++/* Create support for private data tracking. */ ++static struct sm_priv_data_t *vc_sm_create_priv_data(pid_t id) +{ + char alloc_name[32]; -+ struct SM_PRIV_DATA_T *file_data = NULL; ++ struct sm_priv_data_t *file_data = NULL; + + /* Allocate private structure. */ + file_data = kzalloc(sizeof(*file_data), GFP_KERNEL); @@ -1913,7 +2174,7 @@ Signed-off-by: Noralf Trønnes + } else { + struct dentry *dir_entry; + -+ dir_entry = debugfs_create_file(VC_SM_RESOURCES, S_IRUGO, ++ dir_entry = debugfs_create_file(VC_SM_RESOURCES, 0444, + file_data->dir_pid, file_data, + vc_sm_debug_fs_fops); + @@ -1921,7 +2182,7 @@ Signed-off-by: Noralf Trønnes + file_data->dir_res.priv_data = file_data; + file_data->dir_res.show = &vc_sm_alloc_show; + -+ dir_entry = debugfs_create_file(VC_SM_STATS, S_IRUGO, ++ dir_entry = debugfs_create_file(VC_SM_STATS, 0444, + file_data->dir_pid, file_data, + vc_sm_debug_fs_fops); + @@ -1936,15 +2197,15 @@ Signed-off-by: Noralf Trønnes + return file_data; +} + -+/* Open the device. Creates a private state to help track all allocation -+** associated with this device. -+*/ ++/* ++ * Open the device. Creates a private state to help track all allocation ++ * associated with this device. ++ */ +static int vc_sm_open(struct inode *inode, struct file *file) +{ + int ret = 0; + -+ /* Make sure the device was started properly. -+ */ ++ /* Make sure the device was started properly. */ + if (!sm_state) { + pr_err("[%s]: invalid device\n", __func__); + ret = -EPERM; @@ -1963,18 +2224,18 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Close the device. Free up all resources still associated with this device -+** at the time. -+*/ ++/* ++ * Close the device. Free up all resources still associated with this device ++ * at the time. ++ */ +static int vc_sm_release(struct inode *inode, struct file *file) +{ -+ struct SM_PRIV_DATA_T *file_data = -+ (struct SM_PRIV_DATA_T *)file->private_data; -+ struct SM_RESOURCE_T *resource; ++ struct sm_priv_data_t *file_data = ++ (struct sm_priv_data_t *)file->private_data; ++ struct sm_resource_t *resource; + int ret = 0; + -+ /* Make sure the device was started properly. -+ */ ++ /* Make sure the device was started properly. */ + if (sm_state == NULL || file_data == NULL) { + pr_err("[%s]: invalid device\n", __func__); + ret = -EPERM; @@ -1984,7 +2245,7 @@ Signed-off-by: Noralf Trønnes + pr_debug("[%s]: using private data %p\n", __func__, file_data); + + if (file_data->restart_sys == -EINTR) { -+ VC_SM_ACTION_CLEAN_T action_clean; ++ struct vc_sm_action_clean_t action_clean; + + pr_debug("[%s]: releasing following EINTR on %u (trans_id: %u) (likely due to signal)...\n", + __func__, file_data->int_action, @@ -2004,8 +2265,7 @@ Signed-off-by: Noralf Trønnes + /* Remove the corresponding proc entry. */ + debugfs_remove_recursive(file_data->dir_pid); + -+ /* Terminate the private data. -+ */ ++ /* Terminate the private data. */ + kfree(file_data); + +out: @@ -2033,39 +2293,36 @@ Signed-off-by: Noralf Trønnes + + map->ref_count--; + -+ /* Remove from the map table. -+ */ ++ /* Remove from the map table. */ + if (map->ref_count == 0) + vmcs_sm_remove_map(sm_state, map->resource, map); +} + -+static int vcsm_vma_fault(struct vm_area_struct *vma, struct vm_fault *vmf) ++static int vcsm_vma_fault(struct vm_fault *vmf) +{ -+ struct sm_mmap *map = (struct sm_mmap *)vma->vm_private_data; -+ struct SM_RESOURCE_T *resource = map->resource; ++ struct sm_mmap *map = (struct sm_mmap *)vmf->vma->vm_private_data; ++ struct sm_resource_t *resource = map->resource; + pgoff_t page_offset; + unsigned long pfn; + int ret = 0; + -+ /* Lock the resource if necessary. -+ */ ++ /* Lock the resource if necessary. */ + if (!resource->lock_count) { -+ VC_SM_LOCK_UNLOCK_T lock_unlock; -+ VC_SM_LOCK_RESULT_T lock_result; ++ struct vc_sm_lock_unlock_t lock_unlock; ++ struct vc_sm_lock_result_t lock_result; + int status; + + lock_unlock.res_handle = resource->res_handle; -+ lock_unlock.res_mem = resource->res_base_mem; ++ lock_unlock.res_mem = (uint32_t)resource->res_base_mem; + + pr_debug("[%s]: attempt to lock data - hdl %x, base address %p\n", -+ __func__, lock_unlock.res_handle, lock_unlock.res_mem); ++ __func__, lock_unlock.res_handle, ++ (void *)lock_unlock.res_mem); + -+ /* Lock the videocore allocated resource. -+ */ ++ /* Lock the videocore allocated resource. */ + status = vc_vchi_sm_lock(sm_state->sm_handle, + &lock_unlock, &lock_result, 0); -+ if ((status != 0) || -+ ((status == 0) && (lock_result.res_mem == NULL))) { ++ if (status || !lock_result.res_mem) { + pr_err("[%s]: failed to lock memory on videocore (status: %u)\n", + __func__, status); + resource->res_stats[LOCK_FAIL]++; @@ -2079,55 +2336,120 @@ Signed-off-by: Noralf Trønnes + resource->res_stats[LOCK]++; + resource->lock_count++; + -+ /* Keep track of the new base memory. -+ */ -+ if ((lock_result.res_mem != NULL) && -+ (lock_result.res_old_mem != NULL) && ++ /* Keep track of the new base memory. */ ++ if (lock_result.res_mem && ++ lock_result.res_old_mem && + (lock_result.res_mem != lock_result.res_old_mem)) { -+ resource->res_base_mem = lock_result.res_mem; ++ resource->res_base_mem = (void *)lock_result.res_mem; + } + } + + /* We don't use vmf->pgoff since that has the fake offset */ -+ page_offset = ((unsigned long)vmf->virtual_address - vma->vm_start); ++ page_offset = ((unsigned long)vmf->address - vmf->vma->vm_start); + pfn = (uint32_t)resource->res_base_mem & 0x3FFFFFFF; + pfn += mm_vc_mem_phys_addr; + pfn += page_offset; + pfn >>= PAGE_SHIFT; + + /* Finally, remap it */ -+ ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn); ++ ret = vm_insert_pfn(vmf->vma, (unsigned long)vmf->address, pfn); + + switch (ret) { + case 0: + case -ERESTARTSYS: ++ /* ++ * EBUSY is ok: this just means that another thread ++ * already did the job. ++ */ ++ case -EBUSY: + return VM_FAULT_NOPAGE; + case -ENOMEM: + case -EAGAIN: ++ pr_err("[%s]: failed to map page pfn:%lx virt:%lx ret:%d\n", __func__, ++ pfn, (unsigned long)vmf->address, ret); + return VM_FAULT_OOM; + default: ++ pr_err("[%s]: failed to map page pfn:%lx virt:%lx ret:%d\n", __func__, ++ pfn, (unsigned long)vmf->address, ret); + return VM_FAULT_SIGBUS; + } +} + -+static struct vm_operations_struct vcsm_vm_ops = { ++static const struct vm_operations_struct vcsm_vm_ops = { + .open = vcsm_vma_open, + .close = vcsm_vma_close, + .fault = vcsm_vma_fault, +}; + -+/* Walks a VMA and clean each valid page from the cache */ -+static void vcsm_vma_cache_clean_page_range(unsigned long addr, -+ unsigned long end) ++/* Converts VCSM_CACHE_OP_* to an operating function. */ ++static void (*cache_op_to_func(const unsigned cache_op)) ++ (const void*, const void*) ++{ ++ switch (cache_op) { ++ case VCSM_CACHE_OP_NOP: ++ return NULL; ++ ++ case VCSM_CACHE_OP_INV: ++ return dmac_inv_range; ++ ++ case VCSM_CACHE_OP_CLEAN: ++ return dmac_clean_range; ++ ++ case VCSM_CACHE_OP_FLUSH: ++ return dmac_flush_range; ++ ++ default: ++ pr_err("[%s]: Invalid cache_op: 0x%08x\n", __func__, cache_op); ++ return NULL; ++ } ++} ++ ++/* ++ * Clean/invalid/flush cache of which buffer is already pinned (i.e. accessed). ++ */ ++static int clean_invalid_contiguous_mem_2d(const void __user *addr, ++ const size_t block_count, const size_t block_size, const size_t stride, ++ const unsigned cache_op) ++{ ++ size_t i; ++ void (*op_fn)(const void*, const void*); ++ ++ if (!block_size) { ++ pr_err("[%s]: size cannot be 0\n", __func__); ++ return -EINVAL; ++ } ++ ++ op_fn = cache_op_to_func(cache_op); ++ if (op_fn == NULL) ++ return -EINVAL; ++ ++ for (i = 0; i < block_count; i ++, addr += stride) ++ op_fn(addr, addr + block_size); ++ ++ return 0; ++} ++ ++/* Clean/invalid/flush cache of which buffer may be non-pinned. */ ++/* The caller must lock current->mm->mmap_sem for read. */ ++static int clean_invalid_mem_walk(unsigned long addr, const size_t size, ++ const unsigned cache_op) +{ + pgd_t *pgd; + pud_t *pud; + pmd_t *pmd; + pte_t *pte; + unsigned long pgd_next, pud_next, pmd_next; ++ const unsigned long end = ALIGN(addr + size, PAGE_SIZE); ++ void (*op_fn)(const void*, const void*); ++ ++ addr &= PAGE_MASK; + + if (addr >= end) -+ return; ++ return 0; ++ ++ op_fn = cache_op_to_func(cache_op); ++ if (op_fn == NULL) ++ return -EINVAL; + + /* Walk PGD */ + pgd = pgd_offset(current->mm, addr); @@ -2154,37 +2476,102 @@ Signed-off-by: Noralf Trønnes + /* Walk PTE */ + pte = pte_offset_map(pmd, addr); + do { -+ if (pte_none(*pte) -+ || !pte_present(*pte)) ++ if (pte_none(*pte) || !pte_present(*pte)) + continue; + -+ /* Clean + invalidate */ -+ dmac_flush_range((const void *) addr, -+ (const void *) -+ (addr + PAGE_SIZE)); -+ -+ } while (pte++, addr += -+ PAGE_SIZE, addr != pmd_next); ++ op_fn((const void __user*) addr, ++ (const void __user*) (addr + PAGE_SIZE)); ++ } while (pte++, addr += PAGE_SIZE, addr != pmd_next); + pte_unmap(pte); + + } while (pmd++, addr = pmd_next, addr != pud_next); + + } while (pud++, addr = pud_next, addr != pgd_next); ++ + } while (pgd++, addr = pgd_next, addr != end); ++ ++ return 0; +} + -+/* Map an allocated data into something that the user space. -+*/ ++/* Clean/invalid/flush cache of buffer in resource */ ++static int clean_invalid_resource_walk(const void __user *addr, ++ const size_t size, const unsigned cache_op, const int usr_hdl, ++ struct sm_resource_t *resource) ++{ ++ int err; ++ enum sm_stats_t stat_attempt, stat_failure; ++ void __user *res_addr; ++ ++ if (resource == NULL) { ++ pr_err("[%s]: resource is NULL\n", __func__); ++ return -EINVAL; ++ } ++ if (resource->res_cached != VMCS_SM_CACHE_HOST && ++ resource->res_cached != VMCS_SM_CACHE_BOTH) ++ return 0; ++ ++ switch (cache_op) { ++ case VCSM_CACHE_OP_NOP: ++ return 0; ++ case VCSM_CACHE_OP_INV: ++ stat_attempt = INVALID; ++ stat_failure = INVALID_FAIL; ++ break; ++ case VCSM_CACHE_OP_CLEAN: ++ /* Like the original VMCS_SM_CMD_CLEAN_INVALID ioctl handler does. */ ++ stat_attempt = FLUSH; ++ stat_failure = FLUSH_FAIL; ++ break; ++ case VCSM_CACHE_OP_FLUSH: ++ stat_attempt = FLUSH; ++ stat_failure = FLUSH_FAIL; ++ break; ++ default: ++ pr_err("[%s]: Invalid cache_op: 0x%08x\n", __func__, cache_op); ++ return -EINVAL; ++ } ++ resource->res_stats[stat_attempt]++; ++ ++ if (size > resource->res_size) { ++ pr_err("[%s]: size (0x%08zu) is larger than res_size (0x%08zu)\n", ++ __func__, size, resource->res_size); ++ return -EFAULT; ++ } ++ res_addr = (void __user*) vmcs_sm_usr_address_from_pid_and_usr_handle( ++ current->tgid, usr_hdl); ++ if (res_addr == NULL) { ++ pr_err("[%s]: Failed to get user address " ++ "from pid (%d) and user handle (%d)\n", __func__, current->tgid, ++ resource->res_handle); ++ return -EINVAL; ++ } ++ if (!(res_addr <= addr && addr + size <= res_addr + resource->res_size)) { ++ pr_err("[%s]: Addr (0x%p-0x%p) out of range (0x%p-0x%p)\n", ++ __func__, addr, addr + size, res_addr, ++ res_addr + resource->res_size); ++ return -EFAULT; ++ } ++ ++ down_read(¤t->mm->mmap_sem); ++ err = clean_invalid_mem_walk((unsigned long) addr, size, cache_op); ++ up_read(¤t->mm->mmap_sem); ++ ++ if (err) ++ resource->res_stats[stat_failure]++; ++ ++ return err; ++} ++ ++/* Map an allocated data into something that the user space. */ +static int vc_sm_mmap(struct file *file, struct vm_area_struct *vma) +{ + int ret = 0; -+ struct SM_PRIV_DATA_T *file_data = -+ (struct SM_PRIV_DATA_T *)file->private_data; -+ struct SM_RESOURCE_T *resource = NULL; ++ struct sm_priv_data_t *file_data = ++ (struct sm_priv_data_t *)file->private_data; ++ struct sm_resource_t *resource = NULL; + struct sm_mmap *map = NULL; + -+ /* Make sure the device was started properly. -+ */ ++ /* Make sure the device was started properly. */ + if ((sm_state == NULL) || (file_data == NULL)) { + pr_err("[%s]: invalid device\n", __func__); + return -EPERM; @@ -2193,11 +2580,12 @@ Signed-off-by: Noralf Trønnes + pr_debug("[%s]: private data %p, guid %x\n", __func__, file_data, + ((unsigned int)vma->vm_pgoff << PAGE_SHIFT)); + -+ /* We lookup to make sure that the data we are being asked to mmap is -+ ** something that we allocated. -+ ** -+ ** We use the offset information as the key to tell us which resource -+ ** we are mapping. ++ /* ++ * We lookup to make sure that the data we are being asked to mmap is ++ * something that we allocated. ++ * ++ * We use the offset information as the key to tell us which resource ++ * we are mapping. + */ + resource = vmcs_sm_acquire_resource(file_data, + ((unsigned int)vma->vm_pgoff << @@ -2212,8 +2600,7 @@ Signed-off-by: Noralf Trønnes + __func__, resource->res_guid, current->tgid, resource->pid, + file_data->pid); + -+ /* Check permissions. -+ */ ++ /* Check permissions. */ + if (resource->pid && (resource->pid != current->tgid)) { + pr_err("[%s]: current tgid %u != %u owner\n", + __func__, current->tgid, resource->pid); @@ -2221,8 +2608,7 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* Verify that what we are asked to mmap is proper. -+ */ ++ /* Verify that what we are asked to mmap is proper. */ + if (resource->res_size != (unsigned int)(vma->vm_end - vma->vm_start)) { + pr_err("[%s]: size inconsistency (resource: %u - mmap: %u)\n", + __func__, @@ -2233,7 +2619,8 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* Keep track of the tuple in the global resource list such that one ++ /* ++ * Keep track of the tuple in the global resource list such that one + * can do a mapping lookup for address/memory handle. + */ + map = kzalloc(sizeof(*map), GFP_KERNEL); @@ -2247,13 +2634,14 @@ Signed-off-by: Noralf Trønnes + map->res_pid = current->tgid; + map->res_vc_hdl = resource->res_handle; + map->res_usr_hdl = resource->res_guid; -+ map->res_addr = (long unsigned int)vma->vm_start; ++ map->res_addr = (unsigned long)vma->vm_start; + map->resource = resource; + map->vma = vma; + vmcs_sm_add_map(sm_state, resource, map); + -+ /* We are not actually mapping the pages, we just provide a fault -+ ** handler to allow pages to be mapped when accessed ++ /* ++ * We are not actually mapping the pages, we just provide a fault ++ * handler to allow pages to be mapped when accessed + */ + vma->vm_flags |= + VM_IO | VM_PFNMAP | VM_DONTCOPY | VM_DONTEXPAND; @@ -2267,8 +2655,7 @@ Signed-off-by: Noralf Trønnes + + if ((resource->res_cached == VMCS_SM_CACHE_NONE) || + (resource->res_cached == VMCS_SM_CACHE_VC)) { -+ /* Allocated non host cached memory, honour it. -+ */ ++ /* Allocated non host cached memory, honour it. */ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + } + @@ -2287,6 +2674,22 @@ Signed-off-by: Noralf Trønnes + vcsm_vma_open(vma); + resource->res_stats[MAP]++; + vmcs_sm_release_resource(resource, 0); ++ ++ if (resource->map) { ++ /* We don't use vmf->pgoff since that has the fake offset */ ++ unsigned long addr; ++ ++ for (addr = vma->vm_start; addr < vma->vm_end; addr += PAGE_SIZE) { ++ /* Finally, remap it */ ++ unsigned long pfn = (unsigned long)resource->res_base_mem & 0x3FFFFFFF; ++ ++ pfn += mm_vc_mem_phys_addr; ++ pfn += addr - vma->vm_start; ++ pfn >>= PAGE_SHIFT; ++ ret = vm_insert_pfn(vma, addr, pfn); ++ } ++ } ++ + return 0; + +error: @@ -2295,20 +2698,27 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Allocate a shared memory handle and block. -+*/ -+int vc_sm_ioctl_alloc(struct SM_PRIV_DATA_T *private, ++/* Allocate a shared memory handle and block. */ ++int vc_sm_ioctl_alloc(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_alloc *ioparam) +{ + int ret = 0; + int status; -+ struct SM_RESOURCE_T *resource; -+ VC_SM_ALLOC_T alloc = { 0 }; -+ VC_SM_ALLOC_RESULT_T result = { 0 }; ++ struct sm_resource_t *resource; ++ struct vc_sm_alloc_t alloc = { 0 }; ++ struct vc_sm_alloc_result_t result = { 0 }; ++ enum vmcs_sm_cache_e cached = ioparam->cached; ++ bool map = false; ++ ++ /* flag to requst buffer is mapped up front, rather than lazily */ ++ if (cached & 0x80) { ++ map = true; ++ cached &= ~0x80; ++ } + + /* Setup our allocation parameters */ -+ alloc.type = ((ioparam->cached == VMCS_SM_CACHE_VC) -+ || (ioparam->cached == ++ alloc.type = ((cached == VMCS_SM_CACHE_VC) ++ || (cached == + VMCS_SM_CACHE_BOTH)) ? VC_SM_ALLOC_CACHED : + VC_SM_ALLOC_NON_CACHED; + alloc.base_unit = ioparam->size; @@ -2330,8 +2740,7 @@ Signed-off-by: Noralf Trønnes + __func__, alloc.name, alloc.type, ioparam->size, + alloc.base_unit, alloc.num_unit, alloc.alignement); + -+ /* Allocate local resource to track this allocation. -+ */ ++ /* Allocate local resource to track this allocation. */ + resource = kzalloc(sizeof(*resource), GFP_KERNEL); + if (!resource) { + ret = -ENOMEM; @@ -2341,8 +2750,7 @@ Signed-off-by: Noralf Trønnes + resource->ref_count++; + resource->pid = current->tgid; + -+ /* Allocate the videocore resource. -+ */ ++ /* Allocate the videocore resource. */ + status = vc_vchi_sm_alloc(sm_state->sm_handle, &alloc, &result, + &private->int_trans_id); + if (status == -EINTR) { @@ -2352,7 +2760,7 @@ Signed-off-by: Noralf Trønnes + private->restart_sys = -EINTR; + private->int_action = VC_SM_MSG_TYPE_ALLOC; + goto error; -+ } else if (status != 0 || (status == 0 && result.res_mem == NULL)) { ++ } else if (status != 0 || !result.res_mem) { + pr_err("[%s]: failed to allocate memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, private->int_trans_id); + ret = -ENOMEM; @@ -2360,15 +2768,16 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* Keep track of the resource we created. -+ */ ++ /* Keep track of the resource we created. */ + resource->private = private; + resource->res_handle = result.res_handle; -+ resource->res_base_mem = result.res_mem; ++ resource->res_base_mem = (void *)result.res_mem; + resource->res_size = alloc.base_unit * alloc.num_unit; -+ resource->res_cached = ioparam->cached; ++ resource->res_cached = cached; ++ resource->map = map; + -+ /* Kernel/user GUID. This global identifier is used for mmap'ing the ++ /* ++ * Kernel/user GUID. This global identifier is used for mmap'ing the + * allocated region from user space, it is passed as the mmap'ing + * offset, we use it to 'hide' the videocore handle/address. + */ @@ -2400,12 +2809,11 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Share an allocate memory handle and block. -+*/ -+int vc_sm_ioctl_alloc_share(struct SM_PRIV_DATA_T *private, ++/* Share an allocate memory handle and block.*/ ++int vc_sm_ioctl_alloc_share(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_alloc_share *ioparam) +{ -+ struct SM_RESOURCE_T *resource, *shared_resource; ++ struct sm_resource_t *resource, *shared_resource; + int ret = 0; + + pr_debug("[%s]: attempt to share resource %u\n", __func__, @@ -2417,8 +2825,7 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* Allocate local resource to track this allocation. -+ */ ++ /* Allocate local resource to track this allocation. */ + resource = kzalloc(sizeof(*resource), GFP_KERNEL); + if (resource == NULL) { + pr_err("[%s]: failed to allocate local tracking resource\n", @@ -2430,8 +2837,7 @@ Signed-off-by: Noralf Trønnes + resource->ref_count++; + resource->pid = current->tgid; + -+ /* Keep track of the resource we created. -+ */ ++ /* Keep track of the resource we created. */ + resource->private = private; + resource->res_handle = shared_resource->res_handle; + resource->res_base_mem = shared_resource->res_base_mem; @@ -2465,12 +2871,11 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Free a previously allocated shared memory handle and block. -+*/ -+static int vc_sm_ioctl_free(struct SM_PRIV_DATA_T *private, ++/* Free a previously allocated shared memory handle and block.*/ ++static int vc_sm_ioctl_free(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_free *ioparam) +{ -+ struct SM_RESOURCE_T *resource = ++ struct sm_resource_t *resource = + vmcs_sm_acquire_resource(private, ioparam->handle); + + if (resource == NULL) { @@ -2479,8 +2884,7 @@ Signed-off-by: Noralf Trønnes + return -EINVAL; + } + -+ /* Check permissions. -+ */ ++ /* Check permissions. */ + if (resource->pid && (resource->pid != current->tgid)) { + pr_err("[%s]: current tgid %u != %u owner\n", + __func__, current->tgid, resource->pid); @@ -2493,18 +2897,16 @@ Signed-off-by: Noralf Trønnes + return 0; +} + -+/* Resize a previously allocated shared memory handle and block. -+*/ -+static int vc_sm_ioctl_resize(struct SM_PRIV_DATA_T *private, ++/* Resize a previously allocated shared memory handle and block. */ ++static int vc_sm_ioctl_resize(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_resize *ioparam) +{ + int ret = 0; + int status; -+ VC_SM_RESIZE_T resize; -+ struct SM_RESOURCE_T *resource; ++ struct vc_sm_resize_t resize; ++ struct sm_resource_t *resource; + -+ /* Locate resource from GUID. -+ */ ++ /* Locate resource from GUID. */ + resource = vmcs_sm_acquire_resource(private, ioparam->handle); + if (!resource) { + pr_err("[%s]: failed resource - guid %x\n", @@ -2513,9 +2915,10 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* If the resource is locked, its reference count will be not NULL, -+ ** in which case we will not be allowed to resize it anyways, so -+ ** reject the attempt here. ++ /* ++ * If the resource is locked, its reference count will be not NULL, ++ * in which case we will not be allowed to resize it anyways, so ++ * reject the attempt here. + */ + if (resource->lock_count != 0) { + pr_err("[%s]: cannot resize - guid %x, ref-cnt %d\n", @@ -2524,8 +2927,7 @@ Signed-off-by: Noralf Trønnes + goto error; + } + -+ /* Check permissions. -+ */ ++ /* Check permissions. */ + if (resource->pid && (resource->pid != current->tgid)) { + pr_err("[%s]: current tgid %u != %u owner\n", __func__, + current->tgid, resource->pid); @@ -2541,14 +2943,14 @@ Signed-off-by: Noralf Trønnes + } + + resize.res_handle = resource->res_handle; -+ resize.res_mem = resource->res_base_mem; ++ resize.res_mem = (uint32_t)resource->res_base_mem; + resize.res_new_size = ioparam->new_size; + + pr_debug("[%s]: attempt to resize data - guid %x, hdl %x, base address %p\n", -+ __func__, ioparam->handle, resize.res_handle, resize.res_mem); ++ __func__, ioparam->handle, resize.res_handle, ++ (void *)resize.res_mem); + -+ /* Resize the videocore allocated resource. -+ */ ++ /* Resize the videocore allocated resource. */ + status = vc_vchi_sm_resize(sm_state->sm_handle, &resize, + &private->int_trans_id); + if (status == -EINTR) { @@ -2558,7 +2960,7 @@ Signed-off-by: Noralf Trønnes + private->restart_sys = -EINTR; + private->int_action = VC_SM_MSG_TYPE_RESIZE; + goto error; -+ } else if (status != 0) { ++ } else if (status) { + pr_err("[%s]: failed to resize memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, private->int_trans_id); + ret = -EPERM; @@ -2569,8 +2971,7 @@ Signed-off-by: Noralf Trønnes + __func__, resize.res_handle, resource->res_size, + resize.res_new_size); + -+ /* Successfully resized, save the information and inform the user. -+ */ ++ /* Successfully resized, save the information and inform the user. */ + ioparam->old_size = resource->res_size; + resource->res_size = resize.res_new_size; + @@ -2581,33 +2982,30 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Lock a previously allocated shared memory handle and block. -+*/ -+static int vc_sm_ioctl_lock(struct SM_PRIV_DATA_T *private, ++/* Lock a previously allocated shared memory handle and block. */ ++static int vc_sm_ioctl_lock(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_lock_unlock *ioparam, + int change_cache, enum vmcs_sm_cache_e cache_type, + unsigned int vc_addr) +{ + int status; -+ VC_SM_LOCK_UNLOCK_T lock; -+ VC_SM_LOCK_RESULT_T result; -+ struct SM_RESOURCE_T *resource; ++ struct vc_sm_lock_unlock_t lock; ++ struct vc_sm_lock_result_t result; ++ struct sm_resource_t *resource; + int ret = 0; + struct sm_mmap *map, *map_tmp; -+ long unsigned int phys_addr; ++ unsigned long phys_addr; + + map = NULL; + -+ /* Locate resource from GUID. -+ */ ++ /* Locate resource from GUID. */ + resource = vmcs_sm_acquire_resource(private, ioparam->handle); + if (resource == NULL) { + ret = -EINVAL; + goto error; + } + -+ /* Check permissions. -+ */ ++ /* Check permissions. */ + if (resource->pid && (resource->pid != current->tgid)) { + pr_err("[%s]: current tgid %u != %u owner\n", __func__, + current->tgid, resource->pid); @@ -2616,17 +3014,15 @@ Signed-off-by: Noralf Trønnes + } + + lock.res_handle = resource->res_handle; -+ lock.res_mem = resource->res_base_mem; ++ lock.res_mem = (uint32_t)resource->res_base_mem; + -+ /* Take the lock and get the address to be mapped. -+ */ ++ /* Take the lock and get the address to be mapped. */ + if (vc_addr == 0) { + pr_debug("[%s]: attempt to lock data - guid %x, hdl %x, base address %p\n", + __func__, ioparam->handle, lock.res_handle, -+ lock.res_mem); ++ (void *)lock.res_mem); + -+ /* Lock the videocore allocated resource. -+ */ ++ /* Lock the videocore allocated resource. */ + status = vc_vchi_sm_lock(sm_state->sm_handle, &lock, &result, + &private->int_trans_id); + if (status == -EINTR) { @@ -2636,8 +3032,8 @@ Signed-off-by: Noralf Trønnes + private->restart_sys = -EINTR; + private->int_action = VC_SM_MSG_TYPE_LOCK; + goto error; -+ } else if (status != 0 || -+ (status == 0 && result.res_mem == NULL)) { ++ } else if (status || ++ (!status && !(void *)result.res_mem)) { + pr_err("[%s]: failed to lock memory on videocore (status: %u, trans_id: %u)\n", + __func__, status, private->int_trans_id); + ret = -EPERM; @@ -2646,27 +3042,24 @@ Signed-off-by: Noralf Trønnes + } + + pr_debug("[%s]: succeed to lock data - hdl %x, base address %p (%p), ref-cnt %d\n", -+ __func__, lock.res_handle, result.res_mem, -+ lock.res_mem, resource->lock_count); ++ __func__, lock.res_handle, (void *)result.res_mem, ++ (void *)lock.res_mem, resource->lock_count); + } -+ /* Lock assumed taken already, address to be mapped is known. -+ */ ++ /* Lock assumed taken already, address to be mapped is known. */ + else + resource->res_base_mem = (void *)vc_addr; + + resource->res_stats[LOCK]++; + resource->lock_count++; + -+ /* Keep track of the new base memory allocation if it has changed. -+ */ ++ /* Keep track of the new base memory allocation if it has changed. */ + if ((vc_addr == 0) && -+ (result.res_mem != NULL) && -+ (result.res_old_mem != NULL) && ++ ((void *)result.res_mem) && ++ ((void *)result.res_old_mem) && + (result.res_mem != result.res_old_mem)) { -+ resource->res_base_mem = result.res_mem; ++ resource->res_base_mem = (void *)result.res_mem; + -+ /* Kernel allocated resources. -+ */ ++ /* Kernel allocated resources. */ + if (resource->pid == 0) { + if (!list_empty(&resource->map_list)) { + list_for_each_entry_safe(map, map_tmp, @@ -2698,8 +3091,7 @@ Signed-off-by: Noralf Trønnes + __func__, resource->map_count, private->pid, + current->tgid, ioparam->handle, ioparam->addr); + } else { -+ /* Kernel allocated resources. -+ */ ++ /* Kernel allocated resources. */ + if (resource->pid == 0) { + pr_debug("[%s]: attempt mapping kernel resource - guid %x, hdl %x\n", + __func__, ioparam->handle, lock.res_handle); @@ -2718,7 +3110,7 @@ Signed-off-by: Noralf Trønnes + phys_addr += mm_vc_mem_phys_addr; + if (resource->res_cached + == VMCS_SM_CACHE_HOST) { -+ ioparam->addr = (long unsigned int) ++ ioparam->addr = (unsigned long) + /* TODO - make cached work */ + ioremap_nocache(phys_addr, + resource->res_size); @@ -2727,7 +3119,7 @@ Signed-off-by: Noralf Trønnes + __func__, ioparam->handle, + lock.res_handle, ioparam->addr); + } else { -+ ioparam->addr = (long unsigned int) ++ ioparam->addr = (unsigned long) + ioremap_nocache(phys_addr, + resource->res_size); + @@ -2756,30 +3148,27 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Unlock a previously allocated shared memory handle and block. -+*/ -+static int vc_sm_ioctl_unlock(struct SM_PRIV_DATA_T *private, ++/* Unlock a previously allocated shared memory handle and block.*/ ++static int vc_sm_ioctl_unlock(struct sm_priv_data_t *private, + struct vmcs_sm_ioctl_lock_unlock *ioparam, + int flush, int wait_reply, int no_vc_unlock) +{ + int status; -+ VC_SM_LOCK_UNLOCK_T unlock; ++ struct vc_sm_lock_unlock_t unlock; + struct sm_mmap *map, *map_tmp; -+ struct SM_RESOURCE_T *resource; ++ struct sm_resource_t *resource; + int ret = 0; + + map = NULL; + -+ /* Locate resource from GUID. -+ */ ++ /* Locate resource from GUID. */ + resource = vmcs_sm_acquire_resource(private, ioparam->handle); + if (resource == NULL) { + ret = -EINVAL; + goto error; + } + -+ /* Check permissions. -+ */ ++ /* Check permissions. */ + if (resource->pid && (resource->pid != current->tgid)) { + pr_err("[%s]: current tgid %u != %u owner\n", + __func__, current->tgid, resource->pid); @@ -2788,17 +3177,18 @@ Signed-off-by: Noralf Trønnes + } + + unlock.res_handle = resource->res_handle; -+ unlock.res_mem = resource->res_base_mem; ++ unlock.res_mem = (uint32_t)resource->res_base_mem; + + pr_debug("[%s]: attempt to unlock data - guid %x, hdl %x, base address %p\n", -+ __func__, ioparam->handle, unlock.res_handle, unlock.res_mem); ++ __func__, ioparam->handle, unlock.res_handle, ++ (void *)unlock.res_mem); + -+ /* User space allocated resources. -+ */ ++ /* User space allocated resources. */ + if (resource->pid) { + /* Flush if requested */ + if (resource->res_cached && flush) { + dma_addr_t phys_addr = 0; ++ + resource->res_stats[FLUSH]++; + + phys_addr = @@ -2811,13 +3201,13 @@ Signed-off-by: Noralf Trønnes + list_for_each_entry(map, &resource->map_list, + resource_map_list) { + if (map->vma) { -+ unsigned long start; -+ unsigned long end; -+ start = map->vma->vm_start; -+ end = map->vma->vm_end; ++ const unsigned long start = map->vma->vm_start; ++ const unsigned long end = map->vma->vm_end; + -+ vcsm_vma_cache_clean_page_range( -+ start, end); ++ ret = clean_invalid_mem_walk(start, end - start, ++ VCSM_CACHE_OP_FLUSH); ++ if (ret) ++ goto error; + } + } + up_read(¤t->mm->mmap_sem); @@ -2855,7 +3245,7 @@ Signed-off-by: Noralf Trønnes + if (flush && + (resource->res_cached == + VMCS_SM_CACHE_HOST)) { -+ long unsigned int ++ unsigned long + phys_addr; + phys_addr = (uint32_t) + resource->res_base_mem & 0x3FFFFFFF; @@ -2891,12 +3281,10 @@ Signed-off-by: Noralf Trønnes + } + + if (resource->lock_count) { -+ /* Bypass the videocore unlock. -+ */ ++ /* Bypass the videocore unlock. */ + if (no_vc_unlock) + status = 0; -+ /* Unlock the videocore allocated resource. -+ */ ++ /* Unlock the videocore allocated resource. */ + else { + status = + vc_vchi_sm_unlock(sm_state->sm_handle, &unlock, @@ -2926,7 +3314,7 @@ Signed-off-by: Noralf Trønnes + } + + pr_debug("[%s]: success to unlock data - hdl %x, base address %p, ref-cnt %d\n", -+ __func__, unlock.res_handle, unlock.res_mem, ++ __func__, unlock.res_handle, (void *)unlock.res_mem, + resource->lock_count); + +error: @@ -2936,14 +3324,143 @@ Signed-off-by: Noralf Trønnes + return ret; +} + ++/* Import a contiguous block of memory to be shared with VC. */ ++int vc_sm_ioctl_import_dmabuf(struct sm_priv_data_t *private, ++ struct vmcs_sm_ioctl_import_dmabuf *ioparam, ++ struct dma_buf *src_dma_buf) ++{ ++ int ret = 0; ++ int status; ++ struct sm_resource_t *resource = NULL; ++ struct vc_sm_import import = { 0 }; ++ struct vc_sm_import_result result = { 0 }; ++ struct dma_buf *dma_buf; ++ struct dma_buf_attachment *attach = NULL; ++ struct sg_table *sgt = NULL; ++ ++ /* Setup our allocation parameters */ ++ if (src_dma_buf) { ++ get_dma_buf(src_dma_buf); ++ dma_buf = src_dma_buf; ++ } else { ++ dma_buf = dma_buf_get(ioparam->dmabuf_fd); ++ } ++ if (IS_ERR(dma_buf)) ++ return PTR_ERR(dma_buf); ++ ++ attach = dma_buf_attach(dma_buf, &sm_state->pdev->dev); ++ if (IS_ERR(attach)) { ++ ret = PTR_ERR(attach); ++ goto error; ++ } ++ ++ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); ++ if (IS_ERR(sgt)) { ++ ret = PTR_ERR(sgt); ++ goto error; ++ } ++ ++ /* Verify that the address block is contiguous */ ++ if (sgt->nents != 1) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ import.type = ((ioparam->cached == VMCS_SM_CACHE_VC) || ++ (ioparam->cached == VMCS_SM_CACHE_BOTH)) ? ++ VC_SM_ALLOC_CACHED : VC_SM_ALLOC_NON_CACHED; ++ import.addr = (uint32_t)sg_dma_address(sgt->sgl); ++ import.size = sg_dma_len(sgt->sgl); ++ import.allocator = current->tgid; ++ ++ if (*ioparam->name) ++ memcpy(import.name, ioparam->name, sizeof(import.name) - 1); ++ else ++ memcpy(import.name, VMCS_SM_RESOURCE_NAME_DEFAULT, ++ sizeof(VMCS_SM_RESOURCE_NAME_DEFAULT)); ++ ++ pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %p, size %u\n", ++ __func__, import.name, import.type, ++ (void *)import.addr, import.size); ++ ++ /* Allocate local resource to track this allocation. */ ++ resource = kzalloc(sizeof(*resource), GFP_KERNEL); ++ if (!resource) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ INIT_LIST_HEAD(&resource->map_list); ++ resource->ref_count++; ++ resource->pid = current->tgid; ++ ++ /* Allocate the videocore resource. */ ++ status = vc_vchi_sm_import(sm_state->sm_handle, &import, &result, ++ &private->int_trans_id); ++ if (status == -EINTR) { ++ pr_debug("[%s]: requesting import memory action restart (trans_id: %u)\n", ++ __func__, private->int_trans_id); ++ ret = -ERESTARTSYS; ++ private->restart_sys = -EINTR; ++ private->int_action = VC_SM_MSG_TYPE_IMPORT; ++ goto error; ++ } else if (status || !result.res_handle) { ++ pr_debug("[%s]: failed to import memory on videocore (status: %u, trans_id: %u)\n", ++ __func__, status, private->int_trans_id); ++ ret = -ENOMEM; ++ resource->res_stats[ALLOC_FAIL]++; ++ goto error; ++ } ++ ++ /* Keep track of the resource we created. */ ++ resource->private = private; ++ resource->res_handle = result.res_handle; ++ resource->res_size = import.size; ++ resource->res_cached = ioparam->cached; ++ ++ resource->dma_buf = dma_buf; ++ resource->attach = attach; ++ resource->sgt = sgt; ++ resource->dma_addr = sg_dma_address(sgt->sgl); ++ ++ /* ++ * Kernel/user GUID. This global identifier is used for mmap'ing the ++ * allocated region from user space, it is passed as the mmap'ing ++ * offset, we use it to 'hide' the videocore handle/address. ++ */ ++ mutex_lock(&sm_state->lock); ++ resource->res_guid = ++sm_state->guid; ++ mutex_unlock(&sm_state->lock); ++ resource->res_guid <<= PAGE_SHIFT; ++ ++ vmcs_sm_add_resource(private, resource); ++ ++ /* We're done */ ++ resource->res_stats[IMPORT]++; ++ ioparam->handle = resource->res_guid; ++ return 0; ++ ++error: ++ resource->res_stats[IMPORT_FAIL]++; ++ if (resource) { ++ vc_sm_resource_deceased(resource, 1); ++ kfree(resource); ++ } ++ if (sgt) ++ dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); ++ if (attach) ++ dma_buf_detach(dma_buf, attach); ++ dma_buf_put(dma_buf); ++ return ret; ++} ++ +/* Handle control from host. */ +static long vc_sm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) +{ + int ret = 0; + unsigned int cmdnr = _IOC_NR(cmd); -+ struct SM_PRIV_DATA_T *file_data = -+ (struct SM_PRIV_DATA_T *)file->private_data; -+ struct SM_RESOURCE_T *resource = NULL; ++ struct sm_priv_data_t *file_data = ++ (struct sm_priv_data_t *)file->private_data; ++ struct sm_resource_t *resource = NULL; + + /* Validate we can work with this device. */ + if ((sm_state == NULL) || (file_data == NULL)) { @@ -2957,7 +3474,7 @@ Signed-off-by: Noralf Trønnes + + /* Action is a re-post of a previously interrupted action? */ + if (file_data->restart_sys == -EINTR) { -+ VC_SM_ACTION_CLEAN_T action_clean; ++ struct vc_sm_action_clean_t action_clean; + + pr_debug("[%s]: clean up of action %u (trans_id: %u) following EINTR\n", + __func__, file_data->int_action, @@ -2971,8 +3488,7 @@ Signed-off-by: Noralf Trønnes + file_data->restart_sys = 0; + } + -+ /* Now process the command. -+ */ ++ /* Now process the command. */ + switch (cmdnr) { + /* New memory allocation. + */ @@ -2980,8 +3496,7 @@ Signed-off-by: Noralf Trønnes + { + struct vmcs_sm_ioctl_alloc ioparam; + -+ /* Get the parameter data. -+ */ ++ /* Get the parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3003,20 +3518,17 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + } + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; + -+ /* Share existing memory allocation. -+ */ ++ /* Share existing memory allocation. */ + case VMCS_SM_CMD_ALLOC_SHARE: + { + struct vmcs_sm_ioctl_alloc_share ioparam; + -+ /* Get the parameter data. -+ */ ++ /* Get the parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3027,8 +3539,7 @@ Signed-off-by: Noralf Trønnes + + ret = vc_sm_ioctl_alloc_share(file_data, &ioparam); + -+ /* Copy result back to user. -+ */ ++ /* Copy result back to user. */ + if (!ret + && copy_to_user((void *)arg, &ioparam, + sizeof(ioparam)) != 0) { @@ -3041,21 +3552,50 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + } + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; + -+ /* Lock (attempt to) *and* register a cache behavior change. -+ */ ++ case VMCS_SM_CMD_IMPORT_DMABUF: ++ { ++ struct vmcs_sm_ioctl_import_dmabuf ioparam; ++ ++ /* Get the parameter data. */ ++ if (copy_from_user ++ (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { ++ pr_err("[%s]: failed to copy-from-user for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ ret = vc_sm_ioctl_import_dmabuf(file_data, &ioparam, ++ NULL); ++ if (!ret && ++ (copy_to_user((void *)arg, ++ &ioparam, sizeof(ioparam)) != 0)) { ++ struct vmcs_sm_ioctl_free freeparam = { ++ ioparam.handle ++ }; ++ pr_err("[%s]: failed to copy-to-user for cmd %x\n", ++ __func__, cmdnr); ++ vc_sm_ioctl_free(file_data, &freeparam); ++ ret = -EFAULT; ++ } ++ ++ /* Done. */ ++ goto out; ++ } ++ break; ++ ++ /* Lock (attempt to) *and* register a cache behavior change. */ + case VMCS_SM_CMD_LOCK_CACHE: + { + struct vmcs_sm_ioctl_lock_cache ioparam; + struct vmcs_sm_ioctl_lock_unlock lock; + -+ /* Get parameter data. -+ */ ++ /* Get parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3069,20 +3609,17 @@ Signed-off-by: Noralf Trønnes + vc_sm_ioctl_lock(file_data, &lock, 1, + ioparam.cached, 0); + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; + -+ /* Lock (attempt to) existing memory allocation. -+ */ ++ /* Lock (attempt to) existing memory allocation. */ + case VMCS_SM_CMD_LOCK: + { + struct vmcs_sm_ioctl_lock_unlock ioparam; + -+ /* Get parameter data. -+ */ ++ /* Get parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3093,8 +3630,7 @@ Signed-off-by: Noralf Trønnes + + ret = vc_sm_ioctl_lock(file_data, &ioparam, 0, 0, 0); + -+ /* Copy result back to user. -+ */ ++ /* Copy result back to user. */ + if (copy_to_user((void *)arg, &ioparam, sizeof(ioparam)) + != 0) { + pr_err("[%s]: failed to copy-to-user for cmd %x\n", @@ -3102,20 +3638,17 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + } + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; + -+ /* Unlock (attempt to) existing memory allocation. -+ */ ++ /* Unlock (attempt to) existing memory allocation. */ + case VMCS_SM_CMD_UNLOCK: + { + struct vmcs_sm_ioctl_lock_unlock ioparam; + -+ /* Get parameter data. -+ */ ++ /* Get parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3126,20 +3659,17 @@ Signed-off-by: Noralf Trønnes + + ret = vc_sm_ioctl_unlock(file_data, &ioparam, 0, 1, 0); + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; + -+ /* Resize (attempt to) existing memory allocation. -+ */ ++ /* Resize (attempt to) existing memory allocation. */ + case VMCS_SM_CMD_RESIZE: + { + struct vmcs_sm_ioctl_resize ioparam; + -+ /* Get parameter data. -+ */ ++ /* Get parameter data. */ + if (copy_from_user + (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3150,17 +3680,13 @@ Signed-off-by: Noralf Trønnes + + ret = vc_sm_ioctl_resize(file_data, &ioparam); + -+ /* Copy result back to user. -+ */ ++ /* Copy result back to user. */ + if (copy_to_user((void *)arg, &ioparam, sizeof(ioparam)) + != 0) { + pr_err("[%s]: failed to copy-to-user for cmd %x\n", + __func__, cmdnr); + ret = -EFAULT; + } -+ -+ /* Done. -+ */ + goto out; + } + break; @@ -3205,7 +3731,7 @@ Signed-off-by: Noralf Trønnes + goto out; + } + break; -+/* Walk mapping table on host, information shows up in the ++ /* Walk mapping table on host, information shows up in the + ** kernel log. + */ + case VMCS_SM_CMD_HOST_WALK_MAP: @@ -3244,7 +3770,7 @@ Signed-off-by: Noralf Trønnes + { + struct vmcs_sm_ioctl_walk ioparam; + -+ /* Get parameter data. */ ++ /* Get parameter data. */ + if (copy_from_user(&ioparam, + (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3301,8 +3827,7 @@ Signed-off-by: Noralf Trønnes + { + struct vmcs_sm_ioctl_chk ioparam; + -+ /* Get parameter data. -+ */ ++ /* Get parameter data. */ + if (copy_from_user(&ioparam, + (void *)arg, sizeof(ioparam)) != 0) { + pr_err("[%s]: failed to copy-from-user for cmd %x\n", @@ -3317,7 +3842,8 @@ Signed-off-by: Noralf Trønnes + vmcs_sm_acquire_resource(file_data, ioparam.handle); + if (resource == NULL) + ret = -EINVAL; -+ /* If the resource is cacheable, return additional ++ /* ++ * If the resource is cacheable, return additional + * information that may be needed to flush the cache. + */ + else if ((resource->res_cached == VMCS_SM_CACHE_HOST) || @@ -3343,8 +3869,7 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + } + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; @@ -3423,8 +3948,7 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + } + -+ /* Done. -+ */ ++ /* Done. */ + goto out; + } + break; @@ -3506,8 +4030,7 @@ Signed-off-by: Noralf Trønnes + } + break; + -+ /* Maps a user address given process and vc handle. -+ */ ++ /* Maps a user address given process and vc handle. */ + case VMCS_SM_CMD_MAPPED_USR_ADDRESS: + { + struct vmcs_sm_ioctl_map ioparam; @@ -3558,41 +4081,17 @@ Signed-off-by: Noralf Trønnes + /* Locate resource from GUID. */ + resource = + vmcs_sm_acquire_resource(file_data, ioparam.handle); -+ -+ if ((resource != NULL) && resource->res_cached) { -+ dma_addr_t phys_addr = 0; -+ -+ resource->res_stats[FLUSH]++; -+ -+ phys_addr = -+ (dma_addr_t)((uint32_t) -+ resource->res_base_mem & -+ 0x3FFFFFFF); -+ phys_addr += (dma_addr_t)mm_vc_mem_phys_addr; -+ -+ /* L1 cache flush */ -+ down_read(¤t->mm->mmap_sem); -+ vcsm_vma_cache_clean_page_range((unsigned long) -+ ioparam.addr, -+ (unsigned long) -+ ioparam.addr + -+ ioparam.size); -+ up_read(¤t->mm->mmap_sem); -+ -+ /* L2 cache flush */ -+ outer_clean_range(phys_addr, -+ phys_addr + -+ (size_t) ioparam.size); -+ } else if (resource == NULL) { ++ if (resource == NULL) { + ret = -EINVAL; + goto out; + } + -+ if (resource) -+ vmcs_sm_release_resource(resource, 0); -+ -+ /* Done. */ -+ goto out; ++ ret = clean_invalid_resource_walk((void __user*) ioparam.addr, ++ ioparam.size, VCSM_CACHE_OP_FLUSH, ioparam.handle, ++ resource); ++ vmcs_sm_release_resource(resource, 0); ++ if (ret) ++ goto out; + } + break; + @@ -3610,46 +4109,19 @@ Signed-off-by: Noralf Trønnes + goto out; + } + -+ /* Locate resource from GUID. -+ */ ++ /* Locate resource from GUID. */ + resource = + vmcs_sm_acquire_resource(file_data, ioparam.handle); -+ -+ if ((resource != NULL) && resource->res_cached) { -+ dma_addr_t phys_addr = 0; -+ -+ resource->res_stats[INVALID]++; -+ -+ phys_addr = -+ (dma_addr_t)((uint32_t) -+ resource->res_base_mem & -+ 0x3FFFFFFF); -+ phys_addr += (dma_addr_t)mm_vc_mem_phys_addr; -+ -+ /* L2 cache invalidate */ -+ outer_inv_range(phys_addr, -+ phys_addr + -+ (size_t) ioparam.size); -+ -+ /* L1 cache invalidate */ -+ down_read(¤t->mm->mmap_sem); -+ vcsm_vma_cache_clean_page_range((unsigned long) -+ ioparam.addr, -+ (unsigned long) -+ ioparam.addr + -+ ioparam.size); -+ up_read(¤t->mm->mmap_sem); -+ } else if (resource == NULL) { ++ if (resource == NULL) { + ret = -EINVAL; + goto out; + } + -+ if (resource) -+ vmcs_sm_release_resource(resource, 0); -+ -+ /* Done. -+ */ -+ goto out; ++ ret = clean_invalid_resource_walk((void __user*) ioparam.addr, ++ ioparam.size, VCSM_CACHE_OP_INV, ioparam.handle, resource); ++ vmcs_sm_release_resource(resource, 0); ++ if (ret) ++ goto out; + } + break; + @@ -3667,40 +4139,76 @@ Signed-off-by: Noralf Trønnes + ret = -EFAULT; + goto out; + } -+ for (i=0; ires_cached) { -+ unsigned long base = ioparam.s[i].addr & ~(PAGE_SIZE-1); -+ unsigned long end = (ioparam.s[i].addr + ioparam.s[i].size + PAGE_SIZE-1) & ~(PAGE_SIZE-1); -+ resource->res_stats[ioparam.s[i].cmd == 1 ? INVALID:FLUSH]++; -+ -+ /* L1/L2 cache flush */ -+ down_read(¤t->mm->mmap_sem); -+ vcsm_vma_cache_clean_page_range(base, end); -+ up_read(¤t->mm->mmap_sem); -+ } else if (resource == NULL) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ if (resource) -+ vmcs_sm_release_resource(resource, 0); -+ } ++ for (i = 0; i < sizeof(ioparam.s) / sizeof(*ioparam.s); i++) { ++ if (ioparam.s[i].cmd == VCSM_CACHE_OP_NOP) + break; ++ ++ /* Locate resource from GUID. */ ++ resource = ++ vmcs_sm_acquire_resource(file_data, ioparam.s[i].handle); ++ if (resource == NULL) { ++ ret = -EINVAL; ++ goto out; + } ++ ++ ret = clean_invalid_resource_walk( ++ (void __user*) ioparam.s[i].addr, ioparam.s[i].size, ++ ioparam.s[i].cmd, ioparam.s[i].handle, resource); ++ vmcs_sm_release_resource(resource, 0); ++ if (ret) ++ goto out; + } + } + break; ++ /* ++ * Flush/Invalidate the cache for a given mapping. ++ * Blocks must be pinned (i.e. accessed) before this call. ++ */ ++ case VMCS_SM_CMD_CLEAN_INVALID2: ++ { ++ int i; ++ struct vmcs_sm_ioctl_clean_invalid2 ioparam; ++ struct vmcs_sm_ioctl_clean_invalid_block *block = NULL; ++ ++ /* Get parameter data. */ ++ if (copy_from_user(&ioparam, ++ (void *)arg, sizeof(ioparam)) != 0) { ++ pr_err("[%s]: failed to copy-from-user header for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ goto out; ++ } ++ block = kmalloc(ioparam.op_count * ++ sizeof(struct vmcs_sm_ioctl_clean_invalid_block), ++ GFP_KERNEL); ++ if (!block) { ++ ret = -EFAULT; ++ goto out; ++ } ++ if (copy_from_user(block, ++ (void *)(arg + sizeof(ioparam)), ioparam.op_count * sizeof(struct vmcs_sm_ioctl_clean_invalid_block)) != 0) { ++ pr_err("[%s]: failed to copy-from-user payload for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ for (i = 0; i < ioparam.op_count; i++) { ++ const struct vmcs_sm_ioctl_clean_invalid_block * const op = block + i; ++ ++ if (op->invalidate_mode == VCSM_CACHE_OP_NOP) ++ continue; ++ ++ ret = clean_invalid_contiguous_mem_2d( ++ (void __user*) op->start_address, op->block_count, ++ op->block_size, op->inter_block_stride, ++ op->invalidate_mode); ++ if (ret) ++ break; ++ } ++ kfree(block); ++ } ++ break; + + default: + { @@ -3714,8 +4222,7 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Device operations that we managed in this driver. -+*/ ++/* Device operations that we managed in this driver. */ +static const struct file_operations vmcs_sm_ops = { + .owner = THIS_MODULE, + .unlocked_ioctl = vc_sm_ioctl, @@ -3724,8 +4231,7 @@ Signed-off-by: Noralf Trønnes + .mmap = vc_sm_mmap, +}; + -+/* Creation of device. -+*/ ++/* Creation of device. */ +static int vc_sm_create_sharedmemory(void) +{ + int ret; @@ -3735,8 +4241,7 @@ Signed-off-by: Noralf Trønnes + goto out; + } + -+ /* Create a device class for creating dev nodes. -+ */ ++ /* Create a device class for creating dev nodes. */ + sm_state->sm_class = class_create(THIS_MODULE, "vc-sm"); + if (IS_ERR(sm_state->sm_class)) { + pr_err("[%s]: unable to create device class\n", __func__); @@ -3744,8 +4249,7 @@ Signed-off-by: Noralf Trønnes + goto out; + } + -+ /* Create a character driver. -+ */ ++ /* Create a character driver. */ + ret = alloc_chrdev_region(&sm_state->sm_devid, + DEVICE_MINOR, 1, DEVICE_NAME); + if (ret != 0) { @@ -3760,8 +4264,7 @@ Signed-off-by: Noralf Trønnes + goto out_chrdev_unreg; + } + -+ /* Create a device node. -+ */ ++ /* Create a device node. */ + sm_state->sm_dev = device_create(sm_state->sm_class, + NULL, + MKDEV(MAJOR(sm_state->sm_devid), @@ -3786,25 +4289,21 @@ Signed-off-by: Noralf Trønnes + return ret; +} + -+/* Termination of the device. -+*/ ++/* Termination of the device. */ +static int vc_sm_remove_sharedmemory(void) +{ + int ret; + + if (sm_state == NULL) { -+ /* Nothing to do. -+ */ ++ /* Nothing to do. */ + ret = 0; + goto out; + } + -+ /* Remove the sharedmemory character driver. -+ */ ++ /* Remove the sharedmemory character driver. */ + cdev_del(&sm_state->sm_cdev); + -+ /* Unregister region. -+ */ ++ /* Unregister region. */ + unregister_chrdev_region(sm_state->sm_devid, 1); + + ret = 0; @@ -3823,20 +4322,9 @@ Signed-off-by: Noralf Trønnes + + pr_info("[%s]: start\n", __func__); + -+ /* Allocate memory for the state structure. -+ */ -+ sm_state = kzalloc(sizeof(struct SM_STATE_T), GFP_KERNEL); -+ if (sm_state == NULL) { -+ pr_err("[%s]: failed to allocate memory\n", __func__); -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ mutex_init(&sm_state->lock); -+ mutex_init(&sm_state->map_lock); -+ -+ /* Initialize and create a VCHI connection for the shared memory service -+ ** running on videocore. ++ /* ++ * Initialize and create a VCHI connection for the shared memory service ++ * running on videocore. + */ + ret = vchi_initialise(&vchi_instance); + if (ret != 0) { @@ -3879,12 +4367,12 @@ Signed-off-by: Noralf Trønnes + + sm_state->dir_state.show = &vc_sm_global_state_show; + sm_state->dir_state.dir_entry = debugfs_create_file(VC_SM_STATE, -+ S_IRUGO, sm_state->dir_root, &sm_state->dir_state, ++ 0444, sm_state->dir_root, &sm_state->dir_state, + &vc_sm_debug_fs_fops); + + sm_state->dir_stats.show = &vc_sm_global_statistics_show; + sm_state->dir_stats.dir_entry = debugfs_create_file(VC_SM_STATS, -+ S_IRUGO, sm_state->dir_root, &sm_state->dir_stats, ++ 0444, sm_state->dir_root, &sm_state->dir_stats, + &vc_sm_debug_fs_fops); + + /* Create the proc entry children. */ @@ -3909,8 +4397,7 @@ Signed-off-by: Noralf Trønnes + goto err_remove_shared_memory; + } + -+ /* Done! -+ */ ++ /* Done! */ + sm_inited = 1; + goto out; + @@ -3927,49 +4414,53 @@ Signed-off-by: Noralf Trønnes +} + +/* Driver loading. */ -+static int __init vc_sm_init(void) ++static int bcm2835_vcsm_probe(struct platform_device *pdev) +{ + pr_info("vc-sm: Videocore shared memory driver\n"); ++ ++ sm_state = kzalloc(sizeof(*sm_state), GFP_KERNEL); ++ if (!sm_state) ++ return -ENOMEM; ++ sm_state->pdev = pdev; ++ mutex_init(&sm_state->lock); ++ mutex_init(&sm_state->map_lock); ++ + vchiq_add_connected_callback(vc_sm_connected_init); + return 0; +} + +/* Driver unloading. */ -+static void __exit vc_sm_exit(void) ++static int bcm2835_vcsm_remove(struct platform_device *pdev) +{ + pr_debug("[%s]: start\n", __func__); + if (sm_inited) { -+ /* Remove shared memory device. -+ */ ++ /* Remove shared memory device. */ + vc_sm_remove_sharedmemory(); + -+ /* Remove all proc entries. -+ */ ++ /* Remove all proc entries. */ + debugfs_remove_recursive(sm_state->dir_root); + -+ /* Stop the videocore shared memory service. -+ */ ++ /* Stop the videocore shared memory service. */ + vc_vchi_sm_stop(&sm_state->sm_handle); + -+ /* Free the memory for the state structure. -+ */ ++ /* Free the memory for the state structure. */ + mutex_destroy(&(sm_state->map_lock)); + kfree(sm_state); + } + + pr_debug("[%s]: end\n", __func__); ++ return 0; +} + +#if defined(__KERNEL__) +/* Allocate a shared memory handle and block. */ -+int vc_sm_alloc(VC_SM_ALLOC_T *alloc, int *handle) ++int vc_sm_alloc(struct vc_sm_alloc_t *alloc, int *handle) +{ + struct vmcs_sm_ioctl_alloc ioparam = { 0 }; + int ret; -+ struct SM_RESOURCE_T *resource; ++ struct sm_resource_t *resource; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || alloc == NULL || handle == NULL) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; @@ -3990,8 +4481,7 @@ Signed-off-by: Noralf Trønnes + resource->pid = 0; + vmcs_sm_release_resource(resource, 0); + -+ /* Assign valid handle at this time. -+ */ ++ /* Assign valid handle at this time. */ + *handle = ioparam.handle; + } else { + ret = -ENOMEM; @@ -4002,22 +4492,19 @@ Signed-off-by: Noralf Trønnes +} +EXPORT_SYMBOL_GPL(vc_sm_alloc); + -+/* Get an internal resource handle mapped from the external one. -+*/ ++/* Get an internal resource handle mapped from the external one. */ +int vc_sm_int_handle(int handle) +{ -+ struct SM_RESOURCE_T *resource; ++ struct sm_resource_t *resource; + int ret = 0; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || handle == 0) { + pr_err("[%s]: invalid input\n", __func__); + return 0; + } + -+ /* Locate resource from GUID. -+ */ ++ /* Locate resource from GUID. */ + resource = vmcs_sm_acquire_resource(sm_state->data_knl, handle); + if (resource) { + ret = resource->res_handle; @@ -4028,14 +4515,12 @@ Signed-off-by: Noralf Trønnes +} +EXPORT_SYMBOL_GPL(vc_sm_int_handle); + -+/* Free a previously allocated shared memory handle and block. -+*/ ++/* Free a previously allocated shared memory handle and block. */ +int vc_sm_free(int handle) +{ + struct vmcs_sm_ioctl_free ioparam = { handle }; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || handle == 0) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; @@ -4045,16 +4530,14 @@ Signed-off-by: Noralf Trønnes +} +EXPORT_SYMBOL_GPL(vc_sm_free); + -+/* Lock a memory handle for use by kernel. -+*/ -+int vc_sm_lock(int handle, VC_SM_LOCK_CACHE_MODE_T mode, -+ long unsigned int *data) ++/* Lock a memory handle for use by kernel. */ ++int vc_sm_lock(int handle, enum vc_sm_lock_cache_mode mode, ++ unsigned long *data) +{ + struct vmcs_sm_ioctl_lock_unlock ioparam; + int ret; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || handle == 0 || data == NULL) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; @@ -4075,14 +4558,12 @@ Signed-off-by: Noralf Trønnes +} +EXPORT_SYMBOL_GPL(vc_sm_lock); + -+/* Unlock a memory handle in use by kernel. -+*/ ++/* Unlock a memory handle in use by kernel. */ +int vc_sm_unlock(int handle, int flush, int no_vc_unlock) +{ + struct vmcs_sm_ioctl_lock_unlock ioparam; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || handle == 0) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; @@ -4094,16 +4575,14 @@ Signed-off-by: Noralf Trønnes +} +EXPORT_SYMBOL_GPL(vc_sm_unlock); + -+/* Map a shared memory region for use by kernel. -+*/ -+int vc_sm_map(int handle, unsigned int sm_addr, VC_SM_LOCK_CACHE_MODE_T mode, -+ long unsigned int *data) ++/* Map a shared memory region for use by kernel. */ ++int vc_sm_map(int handle, unsigned int sm_addr, ++ enum vc_sm_lock_cache_mode mode, unsigned long *data) +{ + struct vmcs_sm_ioctl_lock_unlock ioparam; + int ret; + -+ /* Validate we can work with this device. -+ */ ++ /* Validate we can work with this device. */ + if (sm_state == NULL || handle == 0 || data == NULL || sm_addr == 0) { + pr_err("[%s]: invalid input\n", __func__); + return -EPERM; @@ -4123,17 +4602,73 @@ Signed-off-by: Noralf Trønnes + return ret; +} +EXPORT_SYMBOL_GPL(vc_sm_map); ++ ++/* Import a dmabuf to be shared with VC. */ ++int vc_sm_import_dmabuf(struct dma_buf *dmabuf, int *handle) ++{ ++ struct vmcs_sm_ioctl_import_dmabuf ioparam = { 0 }; ++ int ret; ++ struct sm_resource_t *resource; ++ ++ /* Validate we can work with this device. */ ++ if (!sm_state || !dmabuf || !handle) { ++ pr_err("[%s]: invalid input\n", __func__); ++ return -EPERM; ++ } ++ ++ ioparam.cached = 0; ++ strcpy(ioparam.name, "KRNL DMABUF"); ++ ++ ret = vc_sm_ioctl_import_dmabuf(sm_state->data_knl, &ioparam, dmabuf); ++ ++ if (!ret) { ++ resource = vmcs_sm_acquire_resource(sm_state->data_knl, ++ ioparam.handle); ++ if (resource) { ++ resource->pid = 0; ++ vmcs_sm_release_resource(resource, 0); ++ ++ /* Assign valid handle at this time.*/ ++ *handle = ioparam.handle; ++ } else { ++ ret = -ENOMEM; ++ } ++ } ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vc_sm_import_dmabuf); +#endif + -+late_initcall(vc_sm_init); -+module_exit(vc_sm_exit); ++/* ++ * Register the driver with device tree ++ */ ++ ++static const struct of_device_id bcm2835_vcsm_of_match[] = { ++ {.compatible = "raspberrypi,bcm2835-vcsm",}, ++ { /* sentinel */ }, ++}; ++ ++MODULE_DEVICE_TABLE(of, bcm2835_vcsm_of_match); ++ ++static struct platform_driver bcm2835_vcsm_driver = { ++ .probe = bcm2835_vcsm_probe, ++ .remove = bcm2835_vcsm_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = bcm2835_vcsm_of_match, ++ }, ++}; ++ ++module_platform_driver(bcm2835_vcsm_driver); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("VideoCore SharedMemory Driver"); +MODULE_LICENSE("GPL v2"); --- /dev/null +++ b/include/linux/broadcom/vmcs_sm_ioctl.h -@@ -0,0 +1,248 @@ +@@ -0,0 +1,294 @@ +/***************************************************************************** +* Copyright 2011 Broadcom Corporation. All rights reserved. +* @@ -4198,8 +4733,11 @@ Signed-off-by: Noralf Trønnes + VMCS_SM_CMD_HOST_WALK_PID_MAP, + + VMCS_SM_CMD_CLEAN_INVALID, ++ VMCS_SM_CMD_CLEAN_INVALID2, + -+ VMCS_SM_CMD_LAST /* Do no delete */ ++ VMCS_SM_CMD_IMPORT_DMABUF, ++ ++ VMCS_SM_CMD_LAST /* Do not delete */ +}; + +/* Cache type supported, conveniently matches the user space definition in @@ -4212,6 +4750,11 @@ Signed-off-by: Noralf Trønnes + VMCS_SM_CACHE_BOTH, +}; + ++/* Cache functions */ ++#define VCSM_CACHE_OP_INV 0x01 ++#define VCSM_CACHE_OP_CLEAN 0x02 ++#define VCSM_CACHE_OP_FLUSH 0x03 ++ +/* IOCTL Data structures */ +struct vmcs_sm_ioctl_alloc { + /* user -> kernel */ @@ -4301,6 +4844,15 @@ Signed-off-by: Noralf Trønnes + unsigned int size; +}; + ++/* ++ * Cache functions to be set to struct vmcs_sm_ioctl_clean_invalid cmd and ++ * vmcs_sm_ioctl_clean_invalid2 invalidate_mode. ++ */ ++#define VCSM_CACHE_OP_NOP 0x00 ++#define VCSM_CACHE_OP_INV 0x01 ++#define VCSM_CACHE_OP_CLEAN 0x02 ++#define VCSM_CACHE_OP_FLUSH 0x03 ++ +struct vmcs_sm_ioctl_clean_invalid { + /* user -> kernel */ + struct { @@ -4311,6 +4863,28 @@ Signed-off-by: Noralf Trønnes + } s[8]; +}; + ++struct vmcs_sm_ioctl_clean_invalid2 { ++ uint8_t op_count; ++ uint8_t zero[3]; ++ struct vmcs_sm_ioctl_clean_invalid_block { ++ uint16_t invalidate_mode; ++ uint16_t block_count; ++ void * start_address; ++ uint32_t block_size; ++ uint32_t inter_block_stride; ++ } s[0]; ++}; ++ ++struct vmcs_sm_ioctl_import_dmabuf { ++ /* user -> kernel */ ++ int dmabuf_fd; ++ enum vmcs_sm_cache_e cached; ++ char name[VMCS_SM_RESOURCE_NAME]; ++ ++ /* kernel -> user */ ++ unsigned int handle; ++}; ++ +/* IOCTL numbers */ +#define VMCS_SM_IOCTL_MEM_ALLOC\ + _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_ALLOC,\ @@ -4342,6 +4916,9 @@ Signed-off-by: Noralf Trønnes +#define VMCS_SM_IOCTL_MEM_CLEAN_INVALID\ + _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_CLEAN_INVALID,\ + struct vmcs_sm_ioctl_clean_invalid) ++#define VMCS_SM_IOCTL_MEM_CLEAN_INVALID2\ ++ _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_CLEAN_INVALID2,\ ++ struct vmcs_sm_ioctl_clean_invalid2) + +#define VMCS_SM_IOCTL_SIZE_USR_HDL\ + _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_SIZE_USR_HANDLE,\ @@ -4377,6 +4954,10 @@ Signed-off-by: Noralf Trønnes + _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_HOST_WALK_PID_MAP,\ + struct vmcs_sm_ioctl_walk) + ++#define VMCS_SM_IOCTL_MEM_IMPORT_DMABUF\ ++ _IOR(VMCS_SM_MAGIC_TYPE, VMCS_SM_CMD_IMPORT_DMABUF,\ ++ struct vmcs_sm_ioctl_import_dmabuf) ++ +/* ---- Variable Externs ------------------------------------------------- */ + +/* ---- Function Prototypes ---------------------------------------------- */ diff --git a/target/linux/brcm2708/patches-4.9/950-0041-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch b/target/linux/brcm2708/patches-4.19/950-0048-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch similarity index 95% rename from target/linux/brcm2708/patches-4.9/950-0041-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch rename to target/linux/brcm2708/patches-4.19/950-0048-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch index 618cb9f8d..e9a122797 100644 --- a/target/linux/brcm2708/patches-4.9/950-0041-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch +++ b/target/linux/brcm2708/patches-4.19/950-0048-Add-dev-gpiomem-device-for-rootless-user-GPIO-access.patch @@ -1,7 +1,7 @@ -From 0f326aa0cf8a16ab7f29606b2eda7186f1fb9367 Mon Sep 17 00:00:00 2001 +From 1a2c16ef68cbba94eee5d916e77269bca572830d Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Fri, 21 Aug 2015 23:14:48 +0100 -Subject: [PATCH] Add /dev/gpiomem device for rootless user GPIO access +Subject: [PATCH 048/703] Add /dev/gpiomem device for rootless user GPIO access Signed-off-by: Luke Wren @@ -11,15 +11,15 @@ Build on ARCH_BCM2835, and fail to probe if no IO resource. See: https://github.com/raspberrypi/linux/issues/1154 --- - drivers/char/broadcom/Kconfig | 9 ++ + drivers/char/broadcom/Kconfig | 9 + drivers/char/broadcom/Makefile | 3 + - drivers/char/broadcom/bcm2835-gpiomem.c | 260 ++++++++++++++++++++++++++++++++ - 3 files changed, 272 insertions(+) + drivers/char/broadcom/bcm2835-gpiomem.c | 258 ++++++++++++++++++++++++ + 3 files changed, 270 insertions(+) create mode 100644 drivers/char/broadcom/bcm2835-gpiomem.c --- a/drivers/char/broadcom/Kconfig +++ b/drivers/char/broadcom/Kconfig -@@ -32,3 +32,12 @@ config BCM_VC_SM +@@ -26,3 +26,12 @@ config BCM_VC_SM help Support for the VC shared memory on the Broadcom reference design. Uses the VCHIQ stack. @@ -34,8 +34,7 @@ See: https://github.com/raspberrypi/linux/issues/1154 + --- a/drivers/char/broadcom/Makefile +++ b/drivers/char/broadcom/Makefile -@@ -1,3 +1,6 @@ - obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ +@@ -1,2 +1,5 @@ obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o obj-$(CONFIG_BCM_VC_SM) += vc_sm/ + @@ -43,7 +42,7 @@ See: https://github.com/raspberrypi/linux/issues/1154 + --- /dev/null +++ b/drivers/char/broadcom/bcm2835-gpiomem.c -@@ -0,0 +1,260 @@ +@@ -0,0 +1,258 @@ +/** + * GPIO memory device driver + * @@ -122,8 +121,6 @@ See: https://github.com/raspberrypi/linux/issues/1154 + int dev = iminor(inode); + int ret = 0; + -+ dev_info(inst->dev, "gpiomem device opened."); -+ + if (dev != DEVICE_MINOR) { + dev_err(inst->dev, "Unknown minor device: %d", dev); + ret = -ENXIO; diff --git a/target/linux/brcm2708/patches-4.9/950-0042-Add-SMI-driver.patch b/target/linux/brcm2708/patches-4.19/950-0049-Add-SMI-driver.patch similarity index 98% rename from target/linux/brcm2708/patches-4.9/950-0042-Add-SMI-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0049-Add-SMI-driver.patch index 3d75e705b..fdb144d6a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0042-Add-SMI-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0049-Add-SMI-driver.patch @@ -1,19 +1,19 @@ -From 8b3f935c48ff65dfb8985ce3e6c631530cd1471a Mon Sep 17 00:00:00 2001 +From edaa95330a802b1bcc26cfcd90404ebadd82965b Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Sat, 5 Sep 2015 01:14:45 +0100 -Subject: [PATCH] Add SMI driver +Subject: [PATCH 049/703] Add SMI driver Signed-off-by: Luke Wren --- - .../bindings/misc/brcm,bcm2835-smi-dev.txt | 17 + - .../devicetree/bindings/misc/brcm,bcm2835-smi.txt | 48 + - drivers/char/broadcom/Kconfig | 8 + - drivers/char/broadcom/Makefile | 2 +- - drivers/char/broadcom/bcm2835_smi_dev.c | 402 +++++++++ - drivers/misc/Kconfig | 8 + - drivers/misc/Makefile | 1 + - drivers/misc/bcm2835_smi.c | 985 +++++++++++++++++++++ - include/linux/broadcom/bcm2835_smi.h | 391 ++++++++ + .../bindings/misc/brcm,bcm2835-smi-dev.txt | 17 + + .../bindings/misc/brcm,bcm2835-smi.txt | 48 + + drivers/char/broadcom/Kconfig | 8 + + drivers/char/broadcom/Makefile | 2 +- + drivers/char/broadcom/bcm2835_smi_dev.c | 402 +++++++ + drivers/misc/Kconfig | 8 + + drivers/misc/Makefile | 1 + + drivers/misc/bcm2835_smi.c | 985 ++++++++++++++++++ + include/linux/broadcom/bcm2835_smi.h | 391 +++++++ 9 files changed, 1861 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/misc/brcm,bcm2835-smi-dev.txt create mode 100644 Documentation/devicetree/bindings/misc/brcm,bcm2835-smi.txt @@ -94,7 +94,7 @@ Signed-off-by: Luke Wren + --- a/drivers/char/broadcom/Kconfig +++ b/drivers/char/broadcom/Kconfig -@@ -41,3 +41,11 @@ config BCM2835_DEVGPIOMEM +@@ -35,3 +35,11 @@ config BCM2835_DEVGPIOMEM on the 2835. Calling mmap(/dev/gpiomem) will map the GPIO register page to the user's pointer. @@ -108,7 +108,7 @@ Signed-off-by: Luke Wren + by the SMI driver itself. --- a/drivers/char/broadcom/Makefile +++ b/drivers/char/broadcom/Makefile -@@ -3,4 +3,4 @@ obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o +@@ -2,4 +2,4 @@ obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o obj-$(CONFIG_BCM_VC_SM) += vc_sm/ obj-$(CONFIG_BCM2835_DEVGPIOMEM)+= bcm2835-gpiomem.o @@ -538,14 +538,14 @@ Signed-off-by: Luke Wren depends on (I2C || SPI) && SYSFS --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile -@@ -9,6 +9,7 @@ obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_ +@@ -11,6 +11,7 @@ obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_ obj-$(CONFIG_INTEL_MID_PTI) += pti.o obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o +obj-$(CONFIG_BCM2835_SMI) += bcm2835_smi.o obj-$(CONFIG_DUMMY_IRQ) += dummy-irq.o obj-$(CONFIG_ICS932S401) += ics932s401.o - obj-$(CONFIG_LKDTM) += lkdtm.o + obj-$(CONFIG_LKDTM) += lkdtm/ --- /dev/null +++ b/drivers/misc/bcm2835_smi.c @@ -0,0 +1,985 @@ diff --git a/target/linux/brcm2708/patches-4.9/950-0043-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch b/target/linux/brcm2708/patches-4.19/950-0050-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch similarity index 95% rename from target/linux/brcm2708/patches-4.9/950-0043-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch rename to target/linux/brcm2708/patches-4.19/950-0050-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch index 69f68c79e..b68ccc713 100644 --- a/target/linux/brcm2708/patches-4.9/950-0043-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch +++ b/target/linux/brcm2708/patches-4.19/950-0050-MISC-bcm2835-smi-use-clock-manager-and-fix-reload-is.patch @@ -1,7 +1,8 @@ -From 6bc6d433aaed4d4a5d5be44e70d9de865a850048 Mon Sep 17 00:00:00 2001 +From 1216c1cccdd7e1eafd6859c9522cdef5c2e4ac8d Mon Sep 17 00:00:00 2001 From: Martin Sperl Date: Tue, 26 Apr 2016 14:59:21 +0000 -Subject: [PATCH] MISC: bcm2835: smi: use clock manager and fix reload issues +Subject: [PATCH 050/703] MISC: bcm2835: smi: use clock manager and fix reload + issues Use clock manager instead of self-made clockmanager. @@ -10,7 +11,7 @@ Also fix some error paths that showd up during development Signed-off-by: Martin Sperl --- - drivers/misc/bcm2835_smi.c | 86 +++++++++++++++------------------------------- + drivers/misc/bcm2835_smi.c | 86 +++++++++++++------------------------- 1 file changed, 28 insertions(+), 58 deletions(-) --- a/drivers/misc/bcm2835_smi.c diff --git a/target/linux/brcm2708/patches-4.9/950-0044-Add-SMI-NAND-driver.patch b/target/linux/brcm2708/patches-4.19/950-0051-Add-SMI-NAND-driver.patch similarity index 90% rename from target/linux/brcm2708/patches-4.9/950-0044-Add-SMI-NAND-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0051-Add-SMI-NAND-driver.patch index ec6010a29..04d9e46fd 100644 --- a/target/linux/brcm2708/patches-4.9/950-0044-Add-SMI-NAND-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0051-Add-SMI-NAND-driver.patch @@ -1,17 +1,17 @@ -From be64c4dbf6be17ce20ee214478509a3738256d46 Mon Sep 17 00:00:00 2001 +From a3f0263e2d5deb675dfe7fb0c31167e86d762e27 Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Sat, 5 Sep 2015 01:16:10 +0100 -Subject: [PATCH] Add SMI NAND driver +Subject: [PATCH 051/703] Add SMI NAND driver Signed-off-by: Luke Wren --- - .../bindings/mtd/brcm,bcm2835-smi-nand.txt | 42 ++++ - drivers/mtd/nand/Kconfig | 7 + - drivers/mtd/nand/Makefile | 1 + - drivers/mtd/nand/bcm2835_smi_nand.c | 267 +++++++++++++++++++++ - 4 files changed, 317 insertions(+) + .../bindings/mtd/brcm,bcm2835-smi-nand.txt | 42 +++ + drivers/mtd/nand/raw/Kconfig | 7 + + drivers/mtd/nand/raw/Makefile | 1 + + drivers/mtd/nand/raw/bcm2835_smi_nand.c | 258 ++++++++++++++++++ + 4 files changed, 308 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/brcm,bcm2835-smi-nand.txt - create mode 100644 drivers/mtd/nand/bcm2835_smi_nand.c + create mode 100644 drivers/mtd/nand/raw/bcm2835_smi_nand.c --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/brcm,bcm2835-smi-nand.txt @@ -59,9 +59,9 @@ Signed-off-by: Luke Wren + }; +}; \ No newline at end of file ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -41,6 +41,13 @@ config MTD_SM_COMMON +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -40,6 +40,13 @@ config MTD_SM_COMMON tristate default n @@ -75,19 +75,19 @@ Signed-off-by: Luke Wren config MTD_NAND_DENALI tristate ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_MTD_NAND_DENALI) += denali +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_NAND_DENALI) += denali obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o +obj-$(CONFIG_MTD_NAND_BCM2835_SMI) += bcm2835_smi_nand.o - obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o + obj-$(CONFIG_MTD_NAND_TANGO) += tango_nand.o obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o --- /dev/null -+++ b/drivers/mtd/nand/bcm2835_smi_nand.c -@@ -0,0 +1,267 @@ ++++ b/drivers/mtd/nand/raw/bcm2835_smi_nand.c +@@ -0,0 +1,258 @@ +/** + * NAND flash driver for Broadcom Secondary Memory Interface + * @@ -129,7 +129,7 @@ Signed-off-by: Luke Wren +#include +#include +#include -+#include ++#include +#include + +#include @@ -298,20 +298,11 @@ Signed-off-by: Luke Wren + this->IO_ADDR_R = (void *)0xdeadbeef; + this->IO_ADDR_W = (void *)0xdeadbeef; + -+ /* First scan to find the device and get the page size */ ++ /* Scan to find the device and get the page size */ + -+ if (nand_scan_ident(mtd, 1, NULL)) ++ if (nand_scan(mtd, 1)) + return -ENXIO; + -+ /* Second phase scan */ -+ -+ if (nand_scan_tail(mtd)) -+ return -ENXIO; -+ -+ ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0); -+ if (!ret) -+ return 0; -+ + nand_release(mtd); + return -EINVAL; +} diff --git a/target/linux/brcm2708/patches-4.9/950-0046-Add-cpufreq-driver.patch b/target/linux/brcm2708/patches-4.19/950-0052-Add-cpufreq-driver.patch similarity index 78% rename from target/linux/brcm2708/patches-4.9/950-0046-Add-cpufreq-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0052-Add-cpufreq-driver.patch index 7c5691c12..3ef91c98b 100644 --- a/target/linux/brcm2708/patches-4.9/950-0046-Add-cpufreq-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0052-Add-cpufreq-driver.patch @@ -1,21 +1,26 @@ -From 7d4719c360b755637c2e68f9855be282cd0065b6 Mon Sep 17 00:00:00 2001 +From 6ae7a56fdff2578805c6f17f03b5bc1b1f9d45a8 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 3 Jul 2013 00:49:20 +0100 -Subject: [PATCH] Add cpufreq driver +Subject: [PATCH 052/703] Add cpufreq driver Signed-off-by: popcornmix + +bcm2835-cpufreq: Change licence to GPLv2 + +Signed-off-by: Eben Upton +Signed-off-by: Dom Cobley --- drivers/cpufreq/Kconfig.arm | 9 ++ drivers/cpufreq/Makefile | 1 + - drivers/cpufreq/bcm2835-cpufreq.c | 218 ++++++++++++++++++++++++++++++++++++++ - 3 files changed, 228 insertions(+) + drivers/cpufreq/bcm2835-cpufreq.c | 210 ++++++++++++++++++++++++++++++ + 3 files changed, 220 insertions(+) create mode 100644 drivers/cpufreq/bcm2835-cpufreq.c --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm -@@ -220,6 +220,15 @@ config ARM_STI_CPUFREQ - this config option if you wish to add CPUFreq support for STi based - SoCs. +@@ -260,6 +260,15 @@ config ARM_TANGO_CPUFREQ + depends on CPUFREQ_DT && ARCH_TANGO + default y +config ARM_BCM2835_CPUFREQ + depends on RASPBERRYPI_FIRMWARE @@ -27,43 +32,35 @@ Signed-off-by: popcornmix + If in doubt, say N. + config ARM_TEGRA20_CPUFREQ - bool "Tegra20 CPUFreq support" + tristate "Tegra20 CPUFreq support" depends on ARCH_TEGRA --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile -@@ -75,6 +75,7 @@ obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa11 - obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o +@@ -80,6 +80,7 @@ obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi- obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o + obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o +obj-$(CONFIG_ARM_BCM2835_CPUFREQ) += bcm2835-cpufreq.o obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o - obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ) += vexpress-spc-cpufreq.o + obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o --- /dev/null +++ b/drivers/cpufreq/bcm2835-cpufreq.c -@@ -0,0 +1,218 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+/***************************************************************************** -+* FILENAME: bcm2835-cpufreq.h -+* DESCRIPTION: This driver dynamically manages the CPU Frequency of the ARM -+* processor. Messages are sent to Videocore either setting or requesting the -+* frequency of the ARM in order to match an appropiate frequency to the current -+* usage of the processor. The policy which selects the frequency to use is -+* defined in the kernel .config file, but can be changed during runtime. -+*****************************************************************************/ +@@ -0,0 +1,210 @@ ++/* ++ * Copyright 2011 Broadcom Corporation. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; version 2 ++ * of the License. ++ * ++ * This driver dynamically manages the CPU Frequency of the ARM ++ * processor. Messages are sent to Videocore either setting or requesting the ++ * frequency of the ARM in order to match an appropiate frequency to the current ++ * usage of the processor. The policy which selects the frequency to use is ++ * defined in the kernel .config file, but can be changed during runtime. ++ */ + +/* ---------- INCLUDES ---------- */ +#include diff --git a/target/linux/brcm2708/patches-4.9/950-0048-Add-Chris-Boot-s-i2c-driver.patch b/target/linux/brcm2708/patches-4.19/950-0053-Add-Chris-Boot-s-i2c-driver.patch similarity index 99% rename from target/linux/brcm2708/patches-4.9/950-0048-Add-Chris-Boot-s-i2c-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0053-Add-Chris-Boot-s-i2c-driver.patch index b86fb40b6..1869c9a27 100644 --- a/target/linux/brcm2708/patches-4.9/950-0048-Add-Chris-Boot-s-i2c-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0053-Add-Chris-Boot-s-i2c-driver.patch @@ -1,7 +1,7 @@ -From af4e8a3c7b645480f57ec14ded02fba6976ff2d5 Mon Sep 17 00:00:00 2001 +From 3ae115e0812cdaaa3404c84354f40f1e1402fadf Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 17 Jun 2015 15:44:08 +0100 -Subject: [PATCH] Add Chris Boot's i2c driver +Subject: [PATCH 053/703] Add Chris Boot's i2c driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -100,7 +100,7 @@ both bcm2708_bsc_fifo_fill and ~drain are changed as well. --- drivers/i2c/busses/Kconfig | 19 ++ drivers/i2c/busses/Makefile | 2 + - drivers/i2c/busses/i2c-bcm2708.c | 512 +++++++++++++++++++++++++++++++++++++++ + drivers/i2c/busses/i2c-bcm2708.c | 512 +++++++++++++++++++++++++++++++ 3 files changed, 533 insertions(+) create mode 100644 drivers/i2c/busses/i2c-bcm2708.c @@ -134,7 +134,7 @@ both bcm2708_bsc_fifo_fill and ~drain are changed as well. depends on PCI --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile -@@ -2,6 +2,8 @@ +@@ -3,6 +3,8 @@ # Makefile for the i2c bus drivers. # diff --git a/target/linux/brcm2708/patches-4.9/950-0049-char-broadcom-Add-vcio-module.patch b/target/linux/brcm2708/patches-4.19/950-0054-char-broadcom-Add-vcio-module.patch similarity index 95% rename from target/linux/brcm2708/patches-4.9/950-0049-char-broadcom-Add-vcio-module.patch rename to target/linux/brcm2708/patches-4.19/950-0054-char-broadcom-Add-vcio-module.patch index c37c0f613..f268d1188 100644 --- a/target/linux/brcm2708/patches-4.9/950-0049-char-broadcom-Add-vcio-module.patch +++ b/target/linux/brcm2708/patches-4.19/950-0054-char-broadcom-Add-vcio-module.patch @@ -1,7 +1,7 @@ -From 2e8101a5e6228109d2cd5b965b6077e63e643d6b Mon Sep 17 00:00:00 2001 +From 9fc71e9f5ee71c3f91b43c8c94a0db17349b938c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 26 Jun 2015 14:27:06 +0200 -Subject: [PATCH] char: broadcom: Add vcio module +Subject: [PATCH 054/703] char: broadcom: Add vcio module MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -13,13 +13,13 @@ Signed-off-by: Noralf Trønnes --- drivers/char/broadcom/Kconfig | 6 ++ drivers/char/broadcom/Makefile | 1 + - drivers/char/broadcom/vcio.c | 175 +++++++++++++++++++++++++++++++++++++++++ + drivers/char/broadcom/vcio.c | 175 +++++++++++++++++++++++++++++++++ 3 files changed, 182 insertions(+) create mode 100644 drivers/char/broadcom/vcio.c --- a/drivers/char/broadcom/Kconfig +++ b/drivers/char/broadcom/Kconfig -@@ -22,6 +22,12 @@ config BCM2708_VCMEM +@@ -15,6 +15,12 @@ config BCM2708_VCMEM help Helper for videocore memory access and total size allocation. @@ -34,8 +34,7 @@ Signed-off-by: Noralf Trønnes config BCM_VC_SM --- a/drivers/char/broadcom/Makefile +++ b/drivers/char/broadcom/Makefile -@@ -1,5 +1,6 @@ - obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ +@@ -1,4 +1,5 @@ obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o +obj-$(CONFIG_BCM_VCIO) += vcio.o obj-$(CONFIG_BCM_VC_SM) += vc_sm/ diff --git a/target/linux/brcm2708/patches-4.9/950-0050-firmware-bcm2835-Support-ARCH_BCM270x.patch b/target/linux/brcm2708/patches-4.19/950-0055-firmware-bcm2835-Support-ARCH_BCM270x.patch similarity index 78% rename from target/linux/brcm2708/patches-4.9/950-0050-firmware-bcm2835-Support-ARCH_BCM270x.patch rename to target/linux/brcm2708/patches-4.19/950-0055-firmware-bcm2835-Support-ARCH_BCM270x.patch index ecaf614c1..590a92735 100644 --- a/target/linux/brcm2708/patches-4.9/950-0050-firmware-bcm2835-Support-ARCH_BCM270x.patch +++ b/target/linux/brcm2708/patches-4.19/950-0055-firmware-bcm2835-Support-ARCH_BCM270x.patch @@ -1,7 +1,7 @@ -From f281fd683848cd432f7b73c869676be6362ce1b8 Mon Sep 17 00:00:00 2001 +From 2df6434c1ff682a80f65bde7a9e026f4e0d20df1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Fri, 26 Jun 2015 14:25:01 +0200 -Subject: [PATCH] firmware: bcm2835: Support ARCH_BCM270x +Subject: [PATCH 055/703] firmware: bcm2835: Support ARCH_BCM270x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -27,7 +27,7 @@ Signed-off-by: Noralf Trønnes --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -28,6 +28,8 @@ struct rpi_firmware { +@@ -32,6 +32,8 @@ struct rpi_firmware { u32 enabled; }; @@ -36,23 +36,23 @@ Signed-off-by: Noralf Trønnes static DEFINE_MUTEX(transaction_lock); static void response_callback(struct mbox_client *cl, void *msg) -@@ -207,6 +209,7 @@ static int rpi_firmware_probe(struct pla +@@ -229,6 +231,7 @@ static int rpi_firmware_probe(struct pla init_completion(&fw->c); platform_set_drvdata(pdev, fw); + g_pdev = pdev; rpi_firmware_print_firmware_revision(fw); - -@@ -218,6 +221,7 @@ static int rpi_firmware_remove(struct pl - struct rpi_firmware *fw = platform_get_drvdata(pdev); - + rpi_register_hwmon_driver(dev, fw); +@@ -243,6 +246,7 @@ static int rpi_firmware_remove(struct pl + platform_device_unregister(rpi_hwmon); + rpi_hwmon = NULL; mbox_free_channel(fw->chan); + g_pdev = NULL; return 0; } -@@ -230,7 +234,7 @@ static int rpi_firmware_remove(struct pl +@@ -255,7 +259,7 @@ static int rpi_firmware_remove(struct pl */ struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node) { @@ -61,7 +61,7 @@ Signed-off-by: Noralf Trønnes if (!pdev) return NULL; -@@ -253,7 +257,18 @@ static struct platform_driver rpi_firmwa +@@ -278,7 +282,18 @@ static struct platform_driver rpi_firmwa .probe = rpi_firmware_probe, .remove = rpi_firmware_remove, }; diff --git a/target/linux/brcm2708/patches-4.9/950-0052-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch b/target/linux/brcm2708/patches-4.19/950-0056-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch similarity index 91% rename from target/linux/brcm2708/patches-4.9/950-0052-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch rename to target/linux/brcm2708/patches-4.19/950-0056-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch index 7ae4edd5c..098a2c62c 100644 --- a/target/linux/brcm2708/patches-4.9/950-0052-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch +++ b/target/linux/brcm2708/patches-4.19/950-0056-scripts-Add-mkknlimg-and-knlinfo-scripts-from-tools-.patch @@ -1,7 +1,8 @@ -From c1275c733d61290f7477eb7bbaea96d04206eff3 Mon Sep 17 00:00:00 2001 +From bce7a71e1f399b6dcea8a145cc5fff4653450c50 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 11 May 2015 09:00:42 +0100 -Subject: [PATCH] scripts: Add mkknlimg and knlinfo scripts from tools repo +Subject: [PATCH 056/703] scripts: Add mkknlimg and knlinfo scripts from tools + repo The Raspberry Pi firmware looks for a trailer on the kernel image to determine whether it was compiled with Device Tree support enabled. @@ -65,10 +66,29 @@ With the death of ARCH_BCM2708 and ARCH_BCM2709, a new way is needed to determine if this is a "downstream" build that wants the firmware to load a bcm27xx .dtb. The vc_cma driver is used downstream but not upstream, making vc_cma_init a suitable predicate symbol. + +mkknlimg: Find some more downstream-only strings + +See: https://github.com/raspberrypi/linux/issues/1920 + +Signed-off-by: Phil Elwell + +scripts: Update mkknlimg, just in case + +With the removal of the vc_cma driver, mkknlimg lost an indication that +the user had built a downstream kernel. Update the script, adding a few +more key strings, in case it is still being used. + +Note that mkknlimg is now deprecated, except to tag kernels as upstream +(283x), and thus requiring upstream DTBs. + +See: https://github.com/raspberrypi/linux/issues/2239 + +Signed-off-by: Phil Elwell --- - scripts/knlinfo | 171 +++++++++++++++++++++++++++++++++++ - scripts/mkknlimg | 264 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 435 insertions(+) + scripts/knlinfo | 171 +++++++++++++++++++++++++++++++ + scripts/mkknlimg | 262 +++++++++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 433 insertions(+) create mode 100755 scripts/knlinfo create mode 100755 scripts/mkknlimg @@ -248,7 +268,7 @@ upstream, making vc_cma_init a suitable predicate symbol. +} --- /dev/null +++ b/scripts/mkknlimg -@@ -0,0 +1,264 @@ +@@ -0,0 +1,262 @@ +#!/usr/bin/env perl +# ---------------------------------------------------------------------- +# mkknlimg by Phil Elwell for Raspberry Pi @@ -319,17 +339,15 @@ upstream, making vc_cma_init a suitable predicate symbol. + +my $wanted_strings = +{ -+ 'bcm2708_fb' => FLAG_PI, + 'brcm,bcm2835-mmc' => FLAG_PI, + 'brcm,bcm2835-sdhost' => FLAG_PI, -+ 'brcm,bcm2708-pinctrl' => FLAG_PI | FLAG_DTOK, + 'brcm,bcm2835-gpio' => FLAG_PI | FLAG_DTOK, -+ 'brcm,bcm2708' => FLAG_PI | FLAG_DTOK | FLAG_270X, -+ 'brcm,bcm2709' => FLAG_PI | FLAG_DTOK | FLAG_270X, ++ 'brcm,bcm2708-fb' => FLAG_PI | FLAG_DTOK | FLAG_270X, ++ 'brcm,bcm2708-usb' => FLAG_PI | FLAG_DTOK | FLAG_270X, + 'brcm,bcm2835' => FLAG_PI | FLAG_DTOK | FLAG_283X, + 'brcm,bcm2836' => FLAG_PI | FLAG_DTOK | FLAG_283X, ++ 'brcm,bcm2837' => FLAG_PI | FLAG_DTOK | FLAG_283X, + 'of_cfs_init' => FLAG_DTOK | FLAG_DDTK, -+ 'vc_cma_init' => FLAG_PI | FLAG_270X, +}; + +my $res = try_extract($kernel_file, $tmpfile1); diff --git a/target/linux/brcm2708/patches-4.9/950-0054-BCM2708-Add-core-Device-Tree-support.patch b/target/linux/brcm2708/patches-4.19/950-0057-BCM2708-Add-core-Device-Tree-support.patch similarity index 55% rename from target/linux/brcm2708/patches-4.9/950-0054-BCM2708-Add-core-Device-Tree-support.patch rename to target/linux/brcm2708/patches-4.19/950-0057-BCM2708-Add-core-Device-Tree-support.patch index 92ccb7bff..94501ef34 100644 --- a/target/linux/brcm2708/patches-4.9/950-0054-BCM2708-Add-core-Device-Tree-support.patch +++ b/target/linux/brcm2708/patches-4.19/950-0057-BCM2708-Add-core-Device-Tree-support.patch @@ -1,7 +1,7 @@ -From 589cd87acedc0e24214934816b6c16b4e76a894d Mon Sep 17 00:00:00 2001 +From ef38e1a2b9c83fb10ac6fffdfa26da71776a3abb Mon Sep 17 00:00:00 2001 From: notro Date: Wed, 9 Jul 2014 14:46:08 +0200 -Subject: [PATCH] BCM2708: Add core Device Tree support +Subject: [PATCH 057/703] BCM2708: Add core Device Tree support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -182,123 +182,187 @@ Patch the kernel, which has faulty rules to generate .dtbo the way yocto does Signed-off-by: Herve Jourdain Signed-off-by: Khem Raj + +BCM270X: Drop position requirement for CMA in VC4 overlay. + +No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f, +and will probably let peeople that want to choose a larger CMA +allocation (particularly on pi0/1). + +Signed-off-by: Eric Anholt + +BCM270X_DT: RPi Device Tree tidy + +Use the upstream sdhost node, add thermal-zones, and factor out some +common elements. + +Signed-off-by: Phil Elwell + +kbuild: Silence unhelpful DTC warnings + +Signed-off-by: Phil Elwell --- - arch/arm/Makefile | 2 + - arch/arm/boot/.gitignore | 2 +- - arch/arm/boot/dts/Makefile | 19 + - arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 156 +++ - arch/arm/boot/dts/bcm2708-rpi-b.dts | 146 +++ - arch/arm/boot/dts/bcm2708-rpi-cm.dts | 105 ++ - arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 50 + - arch/arm/boot/dts/bcm2708-rpi.dtsi | 109 ++ - arch/arm/boot/dts/bcm2708.dtsi | 16 + - arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 156 +++ - arch/arm/boot/dts/bcm2709.dtsi | 22 + - arch/arm/boot/dts/bcm270x.dtsi | 141 ++ - arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 203 +++ - arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 155 +++ - arch/arm/boot/dts/bcm2710.dtsi | 155 +++ - arch/arm/boot/dts/overlays/Makefile | 105 ++ - arch/arm/boot/dts/overlays/README | 1368 ++++++++++++++++++++ - .../arm/boot/dts/overlays/adau1977-adc-overlay.dts | 53 + - arch/arm/boot/dts/overlays/ads1015-overlay.dts | 98 ++ - arch/arm/boot/dts/overlays/ads7846-overlay.dts | 89 ++ - .../dts/overlays/akkordion-iqdacplus-overlay.dts | 46 + - .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 + - arch/arm/boot/dts/overlays/at86rf233-overlay.dts | 57 + - .../audioinjector-wm8731-audio-overlay.dts | 39 + - arch/arm/boot/dts/overlays/audremap-overlay.dts | 19 + - .../dts/overlays/bmp085_i2c-sensor-overlay.dts | 23 + - arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 + - .../boot/dts/overlays/dionaudio-loco-overlay.dts | 39 + - arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 + - arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 + - arch/arm/boot/dts/overlays/dwc-otg-overlay.dts | 20 + - arch/arm/boot/dts/overlays/dwc2-overlay.dts | 29 + - arch/arm/boot/dts/overlays/enc28j60-overlay.dts | 53 + - .../boot/dts/overlays/enc28j60-spi2-overlay.dts | 47 + - arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 44 + - .../boot/dts/overlays/gpio-poweroff-overlay.dts | 34 + - .../boot/dts/overlays/hifiberry-amp-overlay.dts | 39 + - .../boot/dts/overlays/hifiberry-dac-overlay.dts | 34 + - .../dts/overlays/hifiberry-dacplus-overlay.dts | 56 + - .../boot/dts/overlays/hifiberry-digi-overlay.dts | 39 + - .../dts/overlays/hifiberry-digi-pro-overlay.dts | 41 + - arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 ++ - arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 +++ - arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 + - arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 43 + - arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 ++ - .../boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 + - arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 83 ++ - arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts | 34 + - .../arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts | 61 + - .../arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts | 37 + - .../boot/dts/overlays/i2s-gpio28-31-overlay.dts | 18 + - arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 43 + - .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 46 + - .../overlays/iqaudio-digi-wm8804-audio-overlay.dts | 47 + - .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 43 + - .../boot/dts/overlays/justboom-digi-overlay.dts | 39 + - arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts | 57 + - arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 54 + - arch/arm/boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++++++++ - .../arm/boot/dts/overlays/mcp2515-can0-overlay.dts | 73 ++ - .../arm/boot/dts/overlays/mcp2515-can1-overlay.dts | 73 ++ - arch/arm/boot/dts/overlays/midi-uart0-overlay.dts | 36 + - arch/arm/boot/dts/overlays/mmc-overlay.dts | 38 + - arch/arm/boot/dts/overlays/mz61581-overlay.dts | 117 ++ - arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts | 27 + - .../boot/dts/overlays/pi3-disable-bt-overlay.dts | 46 + - .../boot/dts/overlays/pi3-miniuart-bt-overlay.dts | 64 + - arch/arm/boot/dts/overlays/piscreen-overlay.dts | 102 ++ - arch/arm/boot/dts/overlays/piscreen2r-overlay.dts | 106 ++ - arch/arm/boot/dts/overlays/pisound-overlay.dts | 114 ++ - arch/arm/boot/dts/overlays/pitft22-overlay.dts | 69 + - .../dts/overlays/pitft28-capacitive-overlay.dts | 91 ++ - .../dts/overlays/pitft28-resistive-overlay.dts | 121 ++ - .../dts/overlays/pitft35-resistive-overlay.dts | 121 ++ - arch/arm/boot/dts/overlays/pps-gpio-overlay.dts | 35 + - arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts | 47 + - arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 + - arch/arm/boot/dts/overlays/qca7000-overlay.dts | 52 + - arch/arm/boot/dts/overlays/raspidac3-overlay.dts | 45 + - .../boot/dts/overlays/rpi-backlight-overlay.dts | 21 + - arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 + - arch/arm/boot/dts/overlays/rpi-display-overlay.dts | 89 ++ - arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts | 17 + - arch/arm/boot/dts/overlays/rpi-proto-overlay.dts | 39 + - arch/arm/boot/dts/overlays/rpi-sense-overlay.dts | 47 + - .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 81 ++ - .../boot/dts/overlays/sc16is750-i2c-overlay.dts | 37 + - .../boot/dts/overlays/sc16is752-spi1-overlay.dts | 61 + - arch/arm/boot/dts/overlays/sdhost-overlay.dts | 32 + - arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts | 36 + - arch/arm/boot/dts/overlays/sdio-overlay.dts | 36 + - arch/arm/boot/dts/overlays/sdtweak-overlay.dts | 23 + - arch/arm/boot/dts/overlays/smi-dev-overlay.dts | 18 + - arch/arm/boot/dts/overlays/smi-nand-overlay.dts | 69 + - arch/arm/boot/dts/overlays/smi-overlay.dts | 37 + - .../boot/dts/overlays/spi-gpio35-39-overlay.dts | 31 + - arch/arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 + - arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 + - arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts | 57 + - arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts | 69 + - arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts | 81 ++ - arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts | 57 + - arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts | 69 + - arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts | 81 ++ - arch/arm/boot/dts/overlays/tinylcd35-overlay.dts | 224 ++++ - arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 + - .../arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts | 89 ++ - arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 136 ++ - arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 + - arch/arm/boot/dts/overlays/w1-gpio-overlay.dts | 39 + - .../boot/dts/overlays/w1-gpio-pullup-overlay.dts | 41 + - arch/arm/boot/dts/overlays/wittypi-overlay.dts | 44 + - scripts/Makefile.dtbinst | 10 +- - scripts/Makefile.lib | 11 + - 115 files changed, 8979 insertions(+), 4 deletions(-) + .gitignore | 2 +- + arch/arm/Makefile | 2 + + arch/arm/boot/dts/Makefile | 21 + + arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 166 ++ + arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 122 ++ + arch/arm/boot/dts/bcm2708-rpi-b.dts | 112 + + arch/arm/boot/dts/bcm2708-rpi-cm.dts | 95 + + arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 17 + + arch/arm/boot/dts/bcm2708-rpi.dtsi | 159 ++ + arch/arm/boot/dts/bcm2708.dtsi | 11 + + arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 123 ++ + arch/arm/boot/dts/bcm2709.dtsi | 19 + + arch/arm/boot/dts/bcm270x.dtsi | 152 ++ + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 ++ + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 191 ++ + arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 129 ++ + arch/arm/boot/dts/bcm2710.dtsi | 29 + + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 17 + + arch/arm/boot/dts/overlays/Makefile | 145 ++ + arch/arm/boot/dts/overlays/README | 1952 +++++++++++++++++ + .../dts/overlays/adau1977-adc-overlay.dts | 40 + + .../dts/overlays/adau7002-simple-overlay.dts | 52 + + .../arm/boot/dts/overlays/ads1015-overlay.dts | 98 + + .../arm/boot/dts/overlays/ads1115-overlay.dts | 103 + + .../arm/boot/dts/overlays/ads7846-overlay.dts | 89 + + .../overlays/akkordion-iqdacplus-overlay.dts | 49 + + .../allo-boss-dac-pcm512x-audio-overlay.dts | 59 + + .../dts/overlays/allo-digione-overlay.dts | 44 + + .../allo-katana-dac-audio-overlay.dts | 57 + + .../allo-piano-dac-pcm512x-audio-overlay.dts | 54 + + ...o-piano-dac-plus-pcm512x-audio-overlay.dts | 55 + + .../boot/dts/overlays/applepi-dac-overlay.dts | 57 + + .../boot/dts/overlays/at86rf233-overlay.dts | 57 + + .../overlays/audioinjector-addons-overlay.dts | 59 + + .../audioinjector-wm8731-audio-overlay.dts | 39 + + .../boot/dts/overlays/audremap-overlay.dts | 19 + + .../boot/dts/overlays/balena-fin-overlay.dts | 79 + + .../overlays/bmp085_i2c-sensor-overlay.dts | 23 + + arch/arm/boot/dts/overlays/dht11-overlay.dts | 39 + + .../dts/overlays/dionaudio-loco-overlay.dts | 39 + + .../overlays/dionaudio-loco-v2-overlay.dts | 49 + + arch/arm/boot/dts/overlays/dpi18-overlay.dts | 31 + + arch/arm/boot/dts/overlays/dpi24-overlay.dts | 31 + + .../arm/boot/dts/overlays/dwc-otg-overlay.dts | 20 + + arch/arm/boot/dts/overlays/dwc2-overlay.dts | 28 + + .../boot/dts/overlays/enc28j60-overlay.dts | 53 + + .../dts/overlays/enc28j60-spi2-overlay.dts | 47 + + .../arm/boot/dts/overlays/exc3000-overlay.dts | 48 + + .../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 + + arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 + + .../googlevoicehat-soundcard-overlay.dts | 49 + + .../arm/boot/dts/overlays/gpio-ir-overlay.dts | 48 + + .../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 + + .../boot/dts/overlays/gpio-key-overlay.dts | 48 + + .../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 + + .../dts/overlays/gpio-poweroff-overlay.dts | 36 + + .../dts/overlays/gpio-shutdown-overlay.dts | 80 + + .../dts/overlays/hifiberry-amp-overlay.dts | 39 + + .../dts/overlays/hifiberry-dac-overlay.dts | 34 + + .../overlays/hifiberry-dacplus-overlay.dts | 59 + + .../dts/overlays/hifiberry-digi-overlay.dts | 41 + + .../overlays/hifiberry-digi-pro-overlay.dts | 43 + + arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 + + arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 ++ + .../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 + + .../boot/dts/overlays/i2c-gpio-overlay.dts | 43 + + .../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 ++ + .../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 + + .../dts/overlays/i2c-rtc-gpio-overlay.dts | 183 ++ + .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 181 ++ + .../boot/dts/overlays/i2c-sensor-overlay.dts | 223 ++ + .../dts/overlays/i2c0-bcm2708-overlay.dts | 69 + + .../dts/overlays/i2c1-bcm2708-overlay.dts | 43 + + .../dts/overlays/i2s-gpio28-31-overlay.dts | 18 + + .../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 + + .../dts/overlays/iqaudio-dacplus-overlay.dts | 49 + + .../iqaudio-digi-wm8804-audio-overlay.dts | 47 + + .../dts/overlays/jedec-spi-nor-overlay.dts | 309 +++ + .../dts/overlays/justboom-dac-overlay.dts | 46 + + .../dts/overlays/justboom-digi-overlay.dts | 41 + + .../boot/dts/overlays/lirc-rpi-overlay.dts | 57 + + .../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 + + .../boot/dts/overlays/mbed-dac-overlay.dts | 64 + + .../boot/dts/overlays/mcp23017-overlay.dts | 54 + + .../boot/dts/overlays/mcp23s17-overlay.dts | 732 +++++++ + .../dts/overlays/mcp2515-can0-overlay.dts | 73 + + .../dts/overlays/mcp2515-can1-overlay.dts | 73 + + .../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 ++ + .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++ + .../dts/overlays/media-center-overlay.dts | 134 ++ + .../boot/dts/overlays/midi-uart0-overlay.dts | 36 + + .../boot/dts/overlays/midi-uart1-overlay.dts | 43 + + arch/arm/boot/dts/overlays/mmc-overlay.dts | 39 + + .../arm/boot/dts/overlays/mpu6050-overlay.dts | 28 + + .../arm/boot/dts/overlays/mz61581-overlay.dts | 117 + + .../arm/boot/dts/overlays/papirus-overlay.dts | 89 + + .../boot/dts/overlays/pi3-act-led-overlay.dts | 27 + + .../dts/overlays/pi3-disable-bt-overlay.dts | 46 + + .../dts/overlays/pi3-disable-wifi-overlay.dts | 13 + + .../dts/overlays/pi3-miniuart-bt-overlay.dts | 74 + + arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 + + .../boot/dts/overlays/piscreen-overlay.dts | 102 + + .../boot/dts/overlays/piscreen2r-overlay.dts | 106 + + .../arm/boot/dts/overlays/pisound-overlay.dts | 120 + + .../arm/boot/dts/overlays/pitft22-overlay.dts | 69 + + .../overlays/pitft28-capacitive-overlay.dts | 91 + + .../overlays/pitft28-resistive-overlay.dts | 121 + + .../overlays/pitft35-resistive-overlay.dts | 121 + + .../boot/dts/overlays/pps-gpio-overlay.dts | 38 + + .../boot/dts/overlays/pwm-2chan-overlay.dts | 47 + + .../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 + + arch/arm/boot/dts/overlays/pwm-overlay.dts | 43 + + .../arm/boot/dts/overlays/qca7000-overlay.dts | 52 + + .../dts/overlays/rotary-encoder-overlay.dts | 59 + + .../dts/overlays/rpi-backlight-overlay.dts | 21 + + .../overlays/rpi-cirrus-wm5102-overlay.dts | 146 ++ + .../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 + + .../boot/dts/overlays/rpi-display-overlay.dts | 91 + + .../boot/dts/overlays/rpi-ft5406-overlay.dts | 30 + + .../boot/dts/overlays/rpi-proto-overlay.dts | 39 + + .../boot/dts/overlays/rpi-sense-overlay.dts | 47 + + arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 31 + + .../rra-digidac1-wm8741-audio-overlay.dts | 49 + + .../dts/overlays/sc16is750-i2c-overlay.dts | 37 + + .../dts/overlays/sc16is752-i2c-overlay.dts | 40 + + .../dts/overlays/sc16is752-spi1-overlay.dts | 61 + + arch/arm/boot/dts/overlays/sdhost-overlay.dts | 31 + + .../boot/dts/overlays/sdio-1bit-overlay.dts | 63 + + arch/arm/boot/dts/overlays/sdio-overlay.dts | 63 + + .../arm/boot/dts/overlays/sdtweak-overlay.dts | 25 + + .../arm/boot/dts/overlays/smi-dev-overlay.dts | 18 + + .../boot/dts/overlays/smi-nand-overlay.dts | 69 + + arch/arm/boot/dts/overlays/smi-overlay.dts | 37 + + .../dts/overlays/spi-gpio35-39-overlay.dts | 31 + + .../arm/boot/dts/overlays/spi-rtc-overlay.dts | 33 + + .../arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 + + .../boot/dts/overlays/spi0-hw-cs-overlay.dts | 26 + + .../boot/dts/overlays/spi1-1cs-overlay.dts | 57 + + .../boot/dts/overlays/spi1-2cs-overlay.dts | 69 + + .../boot/dts/overlays/spi1-3cs-overlay.dts | 81 + + .../boot/dts/overlays/spi2-1cs-overlay.dts | 57 + + .../boot/dts/overlays/spi2-2cs-overlay.dts | 69 + + .../boot/dts/overlays/spi2-3cs-overlay.dts | 81 + + .../dts/overlays/superaudioboard-overlay.dts | 73 + + arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++++++++ + .../boot/dts/overlays/tinylcd35-overlay.dts | 224 ++ + arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 + + arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 + + .../upstream-aux-interrupt-overlay.dts | 33 + + .../boot/dts/overlays/upstream-overlay.dts | 154 ++ + .../dts/overlays/vc4-fkms-v3d-overlay.dts | 89 + + .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 151 ++ + arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 + + .../arm/boot/dts/overlays/w1-gpio-overlay.dts | 41 + + .../dts/overlays/w1-gpio-pullup-overlay.dts | 43 + + .../arm/boot/dts/overlays/wittypi-overlay.dts | 44 + + scripts/Makefile.dtbinst | 8 +- + scripts/Makefile.lib | 13 + + 159 files changed, 14852 insertions(+), 4 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2708-rpi-0-w.dts create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts @@ -308,30 +372,49 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts create mode 100644 arch/arm/boot/dts/bcm2709.dtsi create mode 100644 arch/arm/boot/dts/bcm270x.dtsi + create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts create mode 100644 arch/arm/boot/dts/bcm2710.dtsi create mode 100644 arch/arm/boot/dts/overlays/Makefile create mode 100644 arch/arm/boot/dts/overlays/README create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts @@ -343,6 +426,7 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts @@ -351,19 +435,30 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts + create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts + create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts @@ -373,17 +468,21 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/raspidac3-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts @@ -394,6 +493,7 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts @@ -401,8 +501,13 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts + create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts + create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts @@ -410,9 +515,20 @@ Signed-off-by: Khem Raj create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts +--- a/.gitignore ++++ b/.gitignore +@@ -15,7 +15,7 @@ + *.bin + *.bz2 + *.c.[012]*.* +-*.dtb ++*.dtb* + *.dtb.S + *.dwo + *.elf --- a/arch/arm/Makefile +++ b/arch/arm/Makefile -@@ -334,6 +334,8 @@ $(INSTALL_TARGETS): +@@ -341,6 +341,8 @@ $(INSTALL_TARGETS): %.dtb: | scripts $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@ @@ -421,69 +537,220 @@ Signed-off-by: Khem Raj PHONY += dtbs dtbs_install ---- a/arch/arm/boot/.gitignore -+++ b/arch/arm/boot/.gitignore -@@ -3,4 +3,4 @@ zImage - xipImage - bootpImage - uImage --*.dtb -+*.dtb* --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -1,5 +1,13 @@ - ifeq ($(CONFIG_OF),y) - +@@ -1,4 +1,15 @@ + # SPDX-License-Identifier: GPL-2.0 ++ +dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2708-rpi-b.dtb \ + bcm2708-rpi-b-plus.dtb \ + bcm2708-rpi-cm.dtb \ ++ bcm2708-rpi-0-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ ++ bcm2710-rpi-3-b-plus.dtb \ + bcm2710-rpi-cm3.dtb + dtb-$(CONFIG_ARCH_ALPINE) += \ alpine-db.dtb dtb-$(CONFIG_MACH_ARTPEC6) += \ -@@ -955,10 +963,21 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ - dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb - dtb-$(CONFIG_ARCH_ASPEED) += aspeed-bmc-opp-palmetto.dtb \ - aspeed-ast2500-evb.dtb +@@ -1207,3 +1218,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-bmc-opp-zaius.dtb \ + aspeed-bmc-portwell-neptune.dtb \ + aspeed-bmc-quanta-q71l.dtb + +targets += dtbs dtbs_install +targets += $(dtb-y) + - endif - - dtstree := $(srctree)/$(src) - dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) - - always := $(dtb-y) +subdir-y := overlays - clean-files := *.dtb + +# Enable fixups to support overlays on BCM2835 platforms +ifeq ($(CONFIG_ARCH_BCM2835),y) -+ DTC_FLAGS ?= -@ -H epapr -+ dts-dirs += overlays ++ DTC_FLAGS ?= -@ +endif --- /dev/null -+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -@@ -0,0 +1,156 @@ ++++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts +@@ -0,0 +1,166 @@ +/dts-v1/; + +#include "bcm2708.dtsi" + +/ { ++ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; ++ model = "Raspberry Pi Zero W"; ++ ++ chosen { ++ bootargs = "8250.nr_uarts=1"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ }; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = <1>; /* output */ ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = <4>; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = <7>; /* ALT3 = SD1 */ ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ bt_pins: bt_pins { ++ brcm,pins = <43>; ++ brcm,function = <4>; /* alt0:GPCLK2 */ ++ brcm,pull = <0>; /* none */ ++ }; ++ ++ uart0_pins: uart0_pins { ++ brcm,pins = <30 31 32 33>; ++ brcm,function = <7>; /* alt3=UART0 */ ++ brcm,pull = <2 0 0 2>; /* up none none up */ ++ }; ++ ++ uart1_pins: uart1_pins { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ ++ audio_pins: audio_pins { ++ brcm,pins = <>; ++ brcm,function = <>; ++ }; ++}; ++ ++&mmc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ non-removable; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins &bt_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++&random { ++ status = "okay"; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 47 0>; ++ }; ++}; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts +@@ -0,0 +1,122 @@ ++/dts-v1/; ++ ++#include "bcm2708.dtsi" ++#include "bcm283x-rpi-smsc9514.dtsi" ++ ++/ { + model = "Raspberry Pi Model B+"; +}; + +&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ @@ -515,17 +782,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ +&uart0 { + status = "okay"; +}; @@ -540,7 +796,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -548,7 +804,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -598,17 +854,6 @@ Signed-off-by: Khem Raj + +/ { + __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; @@ -616,33 +861,21 @@ Signed-off-by: Khem Raj + pwr_led_gpio = <&pwr_led>,"gpios:4"; + pwr_led_activelow = <&pwr_led>,"gpios:8"; + pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts -@@ -0,0 +1,146 @@ +@@ -0,0 +1,112 @@ +/dts-v1/; + +#include "bcm2708.dtsi" ++#include "bcm283x-rpi-smsc9512.dtsi" + +/ { + model = "Raspberry Pi Model B"; +}; + +&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ @@ -674,17 +907,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ +&uart0 { + status = "okay"; +}; @@ -699,7 +921,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -707,7 +929,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -751,33 +973,14 @@ Signed-off-by: Khem Raj + +/ { + __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts -@@ -0,0 +1,105 @@ +@@ -0,0 +1,95 @@ +/dts-v1/; + +#include "bcm2708-rpi-cm.dtsi" @@ -832,7 +1035,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -840,7 +1043,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -865,43 +1068,19 @@ Signed-off-by: Khem Raj + pinctrl-0 = <&i2s_pins>; +}; + ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ +&hdmi { + hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; +}; -+ -+/ { -+ __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ }; -+}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi -@@ -0,0 +1,50 @@ +@@ -0,0 +1,17 @@ +#include "bcm2708.dtsi" + -+&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+}; -+ -+&gpio { -+ mmc_pins: mmc_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <7>; /* alt3 */ -+ }; -+}; -+ +&leds { + act_led: act { + label = "led0"; @@ -910,35 +1089,16 @@ Signed-off-by: Khem Raj + }; +}; + -+ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+ brcm,overclock-50 = <0>; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ +/ { + __overrides__ { + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&mmc>,"brcm,overclock-50:0"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi -@@ -0,0 +1,109 @@ +@@ -0,0 +1,159 @@ +/* Downstream version of bcm2835-rpi.dtsi */ + +#include @@ -962,6 +1122,7 @@ Signed-off-by: Khem Raj + gpio = &gpio; + uart0 = &uart0; + sdhost = &sdhost; ++ mmc0 = &sdhost; + i2s = &i2s; + spi0 = &spi0; + i2c0 = &i2c0; @@ -969,13 +1130,14 @@ Signed-off-by: Khem Raj + spi1 = &spi1; + spi2 = &spi2; + mmc = &mmc; ++ mmc1 = &mmc; + i2c1 = &i2c1; + i2c2 = &i2c2; + usb = &usb; + leds = &leds; + fb = &fb; -+ vchiq = &vchiq; + thermal = &thermal; ++ axiperf = &axiperf; + }; + + leds: leds { @@ -1005,17 +1167,16 @@ Signed-off-by: Khem Raj + status = "disabled"; + }; + -+ vchiq: vchiq { ++ mailbox@7e00b840 { + compatible = "brcm,bcm2835-vchiq"; -+ reg = <0x7e00b840 0xf>; ++ reg = <0x7e00b840 0x3c>; + interrupts = <0 2>; -+ cache-line-size = <32>; -+ firmware = <&firmware>; + }; + -+ thermal: thermal@7e212000 { -+ compatible = "brcm,bcm2835-thermal"; ++ vcsm: vcsm { ++ compatible = "raspberrypi,bcm2835-vcsm"; + firmware = <&firmware>; ++ status = "okay"; + }; + + /* Onboard audio */ @@ -1029,11 +1190,31 @@ Signed-off-by: Khem Raj + sound: sound { + status = "disabled"; + }; -+ + }; + + __overrides__ { -+ cache_line_size = <&vchiq>, "cache-line-size:0"; ++ cache_line_size; ++ ++ uart0 = <&uart0>,"status"; ++ uart1 = <&uart1>,"status"; ++ i2s = <&i2s>,"status"; ++ spi = <&spi0>,"status"; ++ i2c0 = <&i2c0>,"status"; ++ i2c1 = <&i2c1>,"status"; ++ i2c2_iknowwhatimdoing = <&i2c2>,"status"; ++ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; ++ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; ++ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; ++ ++ audio = <&audio>,"status"; ++ watchdog = <&watchdog>,"status"; ++ random = <&random>,"status"; ++ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; ++ sd_force_pio = <&sdhost>,"brcm,force-pio?"; ++ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; ++ sd_debug = <&sdhost>,"brcm,debug"; ++ sdio_overclock = <&mmc>,"brcm,overclock-50:0"; ++ axiperf = <&axiperf>,"status"; + }; +}; + @@ -1048,42 +1229,63 @@ Signed-off-by: Khem Raj +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; ++ ++&clocks { ++ firmware = <&firmware>; ++}; ++ ++sdhost_pins: &sdhost_gpio48 { ++ /* Add alias */ ++}; ++ ++&sdhost { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdhost_gpio48>; ++ bus-width = <4>; ++ brcm,overclock-50 = <0>; ++ brcm,pio-limit = <1>; ++ status = "okay"; ++}; ++ ++&fb { ++ status = "okay"; ++}; ++ ++&cpu_thermal { ++ /delete-node/ trips; ++}; ++ ++&vec { ++ status = "disabled"; ++}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2708.dtsi -@@ -0,0 +1,16 @@ +@@ -0,0 +1,11 @@ +#include "bcm2835.dtsi" +#include "bcm270x.dtsi" +#include "bcm2708-rpi.dtsi" + +/ { -+ soc { -+ timer@7e003000 { -+ compatible = "brcm,bcm2835-system-timer"; -+ reg = <0x7e003000 0x1000>; -+ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; -+ clock-frequency = <1000000>; -+ }; -+ }; -+ + /delete-node/ cpus; ++ ++ __overrides__ { ++ arm_freq; ++ }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -@@ -0,0 +1,156 @@ +@@ -0,0 +1,123 @@ +/dts-v1/; + +#include "bcm2709.dtsi" ++#include "bcm283x-rpi-smsc9514.dtsi" + +/ { ++ compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; + model = "Raspberry Pi 2 Model B"; +}; + +&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ @@ -1115,17 +1317,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ +&uart0 { + status = "okay"; +}; @@ -1140,7 +1331,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -1148,7 +1339,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -1198,17 +1389,6 @@ Signed-off-by: Khem Raj + +/ { + __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; @@ -1216,19 +1396,11 @@ Signed-off-by: Khem Raj + pwr_led_gpio = <&pwr_led>,"gpios:4"; + pwr_led_activelow = <&pwr_led>,"gpios:8"; + pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2709.dtsi -@@ -0,0 +1,22 @@ +@@ -0,0 +1,19 @@ +#include "bcm2836.dtsi" +#include "bcm270x.dtsi" +#include "bcm2708-rpi.dtsi" @@ -1238,10 +1410,7 @@ Signed-off-by: Khem Raj + ranges = <0x7e000000 0x3f000000 0x01000000>, + <0x40000000 0x40000000 0x00040000>; + -+ syscon@40000000 { -+ compatible = "brcm,bcm2836-arm-local", "syscon"; -+ reg = <0x40000000 0x100>; -+ }; ++ /delete-node/ timer@7e003000; + }; + + __overrides__ { @@ -1253,27 +1422,22 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm270x.dtsi -@@ -0,0 +1,141 @@ +@@ -0,0 +1,152 @@ +/* Downstream bcm283x.dtsi diff */ -+#include "dt-bindings/power/raspberrypi-power.h" ++#include + +/ { + chosen { + bootargs = ""; ++ /delete-property/ stdout-path; + }; + + soc: soc { + -+ /delete-node/ timer@7e003000; -+ + watchdog: watchdog@7e100000 { + /* Add alias */ + }; + -+ cprman: cprman@7e101000 { -+ /* Add alias */ -+ }; -+ + random: rng@7e104000 { + /* Add alias */ + }; @@ -1282,16 +1446,9 @@ Signed-off-by: Khem Raj + interrupts = <2 17>, <2 18>; + }; + -+ sdhost: sdhost@7e202000 { -+ compatible = "brcm,bcm2835-sdhost"; -+ reg = <0x7e202000 0x100>; -+ interrupts = <2 24>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+ brcm,overclock-50 = <0>; -+ brcm,pio-limit = <1>; -+ status = "disabled"; ++ serial@7e201000 { /* uart0 */ ++ /* Enable CTS bug workaround */ ++ cts-event-workaround; + }; + + i2s@7e203000 { /* i2s */ @@ -1330,7 +1487,7 @@ Signed-off-by: Khem Raj + /delete-node/ sdhci@7e300000; + + mmc: mmc@7e300000 { -+ compatible = "brcm,bcm2835-mmc"; ++ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; + clocks = <&clocks BCM2835_CLOCK_EMMC>; @@ -1359,7 +1516,7 @@ Signed-off-by: Khem Raj + reg = <0x7e600000 0x100>; + interrupts = <2 16>; + clocks = <&clocks BCM2835_CLOCK_SMI>; -+ assigned-clocks = <&cprman BCM2835_CLOCK_SMI>; ++ assigned-clocks = <&clocks BCM2835_CLOCK_SMI>; + assigned-clock-rates = <125000000>; + dmas = <&dma 4>; + dma-names = "rx-tx"; @@ -1389,33 +1546,58 @@ Signed-off-by: Khem Raj + status = "disabled"; + }; + -+ gpu: gpu { -+ /* Add alias */ ++ axiperf: axiperf { ++ compatible = "brcm,bcm2835-axiperf"; ++ reg = <0x7e009800 0x100>, ++ <0x7ee08000 0x100>; ++ firmware = <&firmware>; + status = "disabled"; + }; + }; ++ ++ vdd_5v0_reg: fixedregulator_5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vdd_3v3_reg: fixedregulator_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++}; ++ ++&vc4 { ++ status = "disabled"; +}; --- /dev/null -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -@@ -0,0 +1,203 @@ ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -0,0 +1,183 @@ +/dts-v1/; + -+#ifdef RPI364 -+/memreserve/ 0x00000000 0x00001000; -+#endif -+ +#include "bcm2710.dtsi" ++#include "bcm283x-rpi-lan7515.dtsi" + +/ { -+ model = "Raspberry Pi 3 Model B"; ++ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; ++ model = "Raspberry Pi 3 Model B+"; ++ ++ chosen { ++ bootargs = "8250.nr_uarts=1"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ }; +}; + +&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ @@ -1471,13 +1653,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ +&mmc { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; @@ -1488,8 +1663,8 @@ Signed-off-by: Khem Raj +}; + +&soc { -+ virtgpio: virtgpio { -+ compatible = "brcm,bcm2835-virtgpio"; ++ expgpio: expgpio { ++ compatible = "brcm,bcm2835-expgpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; @@ -1497,10 +1672,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&fb { -+ status = "okay"; -+}; -+ +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins &bt_pins>; @@ -1523,7 +1694,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -1531,7 +1702,201 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 29 0>; ++ }; ++ ++ pwr_led: pwr { ++ label = "led1"; ++ linux,default-trigger = "default-on"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&hdmi { ++ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ ++ pwr_led_gpio = <&pwr_led>,"gpios:4"; ++ pwr_led_activelow = <&pwr_led>,"gpios:8"; ++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -0,0 +1,191 @@ ++/dts-v1/; ++ ++#include "bcm2710.dtsi" ++#include "bcm283x-rpi-smsc9514.dtsi" ++ ++/ { ++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ++ model = "Raspberry Pi 3 Model B"; ++ ++ chosen { ++ bootargs = "8250.nr_uarts=1"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ }; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = <1>; /* output */ ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = <4>; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = <7>; // alt3 = SD1 ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ bt_pins: bt_pins { ++ brcm,pins = <43>; ++ brcm,function = <4>; /* alt0:GPCLK2 */ ++ brcm,pull = <0>; ++ }; ++ ++ uart0_pins: uart0_pins { ++ brcm,pins = <32 33>; ++ brcm,function = <7>; /* alt3=UART0 */ ++ brcm,pull = <0 2>; ++ }; ++ ++ uart1_pins: uart1_pins { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ ++ audio_pins: audio_pins { ++ brcm,pins = <40 41>; ++ brcm,function = <4>; ++ }; ++}; ++ ++&mmc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ non-removable; ++ bus-width = <4>; ++ status = "okay"; ++ brcm,overclock-50 = <0>; ++}; ++ ++&soc { ++ virtgpio: virtgpio { ++ compatible = "brcm,bcm2835-virtgpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; ++ ++ expgpio: expgpio { ++ compatible = "brcm,bcm2835-expgpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins &bt_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -1562,6 +1927,16 @@ Signed-off-by: Khem Raj + linux,default-trigger = "mmc0"; + gpios = <&virtgpio 0 0>; + }; ++ ++ pwr_led: pwr { ++ label = "led1"; ++ linux,default-trigger = "input"; ++ gpios = <&expgpio 7 0>; ++ }; ++}; ++ ++&hdmi { ++ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; +}; + +&audio { @@ -1570,40 +1945,19 @@ Signed-off-by: Khem Raj +}; + +/ { -+ chosen { -+ bootargs = "8250.nr_uarts=1"; -+ }; -+}; -+ -+/ { + __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; + -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; ++ pwr_led_gpio = <&pwr_led>,"gpios:4"; ++ pwr_led_activelow = <&pwr_led>,"gpios:8"; ++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -@@ -0,0 +1,155 @@ +@@ -0,0 +1,129 @@ +/dts-v1/; + +#include "bcm2710.dtsi" @@ -1612,13 +1966,11 @@ Signed-off-by: Khem Raj + model = "Raspberry Pi Compute Module 3"; +}; + -+&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ brcm,pull = <0 2 2 2 2 2>; -+ }; ++&uart0 { ++ status = "okay"; ++}; + ++&gpio { + spi0_pins: spi0_pins { + brcm,pins = <9 10 11>; + brcm,function = <4>; /* alt0 */ @@ -1650,15 +2002,6 @@ Signed-off-by: Khem Raj + }; +}; + -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+ brcm,overclock-50 = <0>; -+}; -+ +&soc { + virtgpio: virtgpio { + compatible = "brcm,bcm2835-virtgpio"; @@ -1667,10 +2010,14 @@ Signed-off-by: Khem Raj + firmware = <&firmware>; + status = "okay"; + }; -+}; + -+&fb { -+ status = "okay"; ++ expgpio: expgpio { ++ compatible = "brcm,bcm2835-expgpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; +}; + +&spi0 { @@ -1683,7 +2030,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1{ @@ -1691,7 +2038,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + }; +}; + @@ -1725,7 +2072,7 @@ Signed-off-by: Khem Raj +}; + +&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; +}; + +&audio { @@ -1735,53 +2082,22 @@ Signed-off-by: Khem Raj + +/ { + __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ + act_led_gpio = <&act_led>,"gpios:4"; + act_led_activelow = <&act_led>,"gpios:8"; + act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/bcm2710.dtsi -@@ -0,0 +1,155 @@ -+#include "bcm283x.dtsi" +@@ -0,0 +1,29 @@ ++#include "bcm2837.dtsi" +#include "bcm270x.dtsi" +#include "bcm2708-rpi.dtsi" + +/ { + compatible = "brcm,bcm2837", "brcm,bcm2836"; -+ model = "BCM2837"; + + soc { -+ ranges = <0x7e000000 0x3f000000 0x01000000>, -+ <0x40000000 0x40000000 0x00040000>; -+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>; -+ -+ local_intc: local_intc { -+ compatible = "brcm,bcm2836-l1-intc"; -+ reg = <0x40000000 0x100>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&local_intc>; -+ }; + + arm-pmu { +#ifdef RPI364 @@ -1790,158 +2106,100 @@ Signed-off-by: Khem Raj + compatible = "arm,cortex-a7-pmu"; +#endif + interrupt-parent = <&local_intc>; -+ interrupts = <9>; ++ interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; + }; + -+ timer { -+#ifdef RPI364 -+ compatible = "arm,armv8-timer", "arm,armv7-timer"; -+#else -+ compatible = "arm,armv7-timer"; -+#endif -+ interrupt-parent = <&local_intc>; -+ interrupts = <0>, // PHYS_SECURE_PPI -+ <1>, // PHYS_NONSECURE_PPI -+ <3>, // VIRT_PPI -+ <2>; // HYP_PPI -+ always-on; -+ }; -+ -+ syscon@40000000 { -+ compatible = "brcm,bcm2836-arm-local", "syscon"; -+ reg = <0x40000000 0x100>; -+ }; -+ }; -+ -+#ifdef RPI364 -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ v8_cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ reg = <0x0>; -+ clock-frequency = <1200000000>; -+ }; -+ -+ v8_cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ reg = <0x1>; -+ clock-frequency = <1200000000>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e0>; -+ }; -+ -+ v8_cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ reg = <0x2>; -+ clock-frequency = <1200000000>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e8>; -+ }; -+ -+ v8_cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53", "arm,armv8"; -+ reg = <0x3>; -+ clock-frequency = <1200000000>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000f0>; -+ }; ++ /delete-node/ timer@7e003000; + }; + + __overrides__ { -+ arm_freq = <&v8_cpu0>, "clock-frequency:0", -+ <&v8_cpu1>, "clock-frequency:0", -+ <&v8_cpu2>, "clock-frequency:0", -+ <&v8_cpu3>, "clock-frequency:0"; ++ arm_freq = <&cpu0>, "clock-frequency:0", ++ <&cpu1>, "clock-frequency:0", ++ <&cpu2>, "clock-frequency:0", ++ <&cpu3>, "clock-frequency:0"; + }; ++}; +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -32,7 +32,7 @@ + + mailbox@7e00b840 { + compatible = "brcm,bcm2835-vchiq"; +- reg = <0x7e00b840 0xf>; ++ reg = <0x7e00b840 0x3c>; + interrupts = <0 2>; + }; + }; +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -21,7 +21,24 @@ + ethernet: ethernet@1 { + compatible = "usb424,7800"; + reg = <1>; ++ microchip,eee-enabled; ++ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ ++ /* ++ * led0 = 1:link1000/activity ++ * led1 = 6:link10/100/activity ++ */ ++ microchip,led-modes = <1 6>; + }; + }; + }; + }; + -+#else -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ v7_cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a7"; -+ reg = <0x000>; -+ clock-frequency = <800000000>; -+ }; -+ -+ v7_cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a7"; -+ reg = <0x001>; -+ clock-frequency = <800000000>; -+ }; -+ -+ v7_cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a7"; -+ reg = <0x002>; -+ clock-frequency = <800000000>; -+ }; -+ -+ v7_cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a7"; -+ reg = <0x003>; -+ clock-frequency = <800000000>; -+ }; -+ }; + ++/ { + __overrides__ { -+ arm_freq = <&v7_cpu0>, "clock-frequency:0", -+ <&v7_cpu1>, "clock-frequency:0", -+ <&v7_cpu2>, "clock-frequency:0", -+ <&v7_cpu3>, "clock-frequency:0"; ++ eee = <ðernet>,"microchip,eee-enabled?"; ++ tx_lpi_timer = <ðernet>,"microchip,tx-lpi-timer:0"; ++ eth_led0 = <ðernet>,"microchip,led-modes:0"; ++ eth_led1 = <ðernet>,"microchip,led-modes:4"; + }; -+#endif +}; -+ -+&intc { -+ compatible = "brcm,bcm2836-armctrl-ic"; -+ reg = <0x7e00b200 0x200>; -+ interrupt-parent = <&local_intc>; -+ interrupts = <8>; -+}; -+ -+#ifdef RPI364 -+&usb { -+ compatible = "brcm,bcm2835-usb"; -+ reg = <0x7e980000 0x10000>; -+ interrupts = <1 9>; -+}; -+#endif --- /dev/null +++ b/arch/arm/boot/dts/overlays/Makefile -@@ -0,0 +1,105 @@ +@@ -0,0 +1,145 @@ +# Overlays for the Raspberry Pi platform + +dtbo-$(CONFIG_ARCH_BCM2835) += \ + adau1977-adc.dtbo \ ++ adau7002-simple.dtbo \ + ads1015.dtbo \ ++ ads1115.dtbo \ + ads7846.dtbo \ + akkordion-iqdacplus.dtbo \ ++ allo-boss-dac-pcm512x-audio.dtbo \ ++ allo-digione.dtbo \ ++ allo-katana-dac-audio.dtbo \ + allo-piano-dac-pcm512x-audio.dtbo \ ++ allo-piano-dac-plus-pcm512x-audio.dtbo \ ++ applepi-dac.dtbo \ + at86rf233.dtbo \ ++ audioinjector-addons.dtbo \ + audioinjector-wm8731-audio.dtbo \ + audremap.dtbo \ ++ balena-fin.dtbo \ + bmp085_i2c-sensor.dtbo \ + dht11.dtbo \ + dionaudio-loco.dtbo \ ++ dionaudio-loco-v2.dtbo \ + dpi18.dtbo \ + dpi24.dtbo \ + dwc-otg.dtbo \ + dwc2.dtbo \ + enc28j60.dtbo \ + enc28j60-spi2.dtbo \ ++ exc3000.dtbo \ ++ fe-pi-audio.dtbo \ ++ goodix.dtbo \ ++ googlevoicehat-soundcard.dtbo \ + gpio-ir.dtbo \ ++ gpio-ir-tx.dtbo \ ++ gpio-key.dtbo \ ++ gpio-no-irq.dtbo \ + gpio-poweroff.dtbo \ ++ gpio-shutdown.dtbo \ + hifiberry-amp.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dacplus.dtbo \ @@ -1954,6 +2212,7 @@ Signed-off-by: Khem Raj + i2c-mux.dtbo \ + i2c-pwm-pca9685a.dtbo \ + i2c-rtc.dtbo \ ++ i2c-rtc-gpio.dtbo \ + i2c-sensor.dtbo \ + i2c0-bcm2708.dtbo \ + i2c1-bcm2708.dtbo \ @@ -1961,19 +2220,30 @@ Signed-off-by: Khem Raj + iqaudio-dac.dtbo \ + iqaudio-dacplus.dtbo \ + iqaudio-digi-wm8804-audio.dtbo \ ++ jedec-spi-nor.dtbo \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ + lirc-rpi.dtbo \ ++ ltc294x.dtbo \ ++ mbed-dac.dtbo \ + mcp23017.dtbo \ + mcp23s17.dtbo \ + mcp2515-can0.dtbo \ + mcp2515-can1.dtbo \ ++ mcp3008.dtbo \ ++ mcp3202.dtbo \ ++ media-center.dtbo \ + midi-uart0.dtbo \ ++ midi-uart1.dtbo \ + mmc.dtbo \ ++ mpu6050.dtbo \ + mz61581.dtbo \ ++ papirus.dtbo \ + pi3-act-led.dtbo \ + pi3-disable-bt.dtbo \ ++ pi3-disable-wifi.dtbo \ + pi3-miniuart-bt.dtbo \ ++ pibell.dtbo \ + piscreen.dtbo \ + piscreen2r.dtbo \ + pisound.dtbo \ @@ -1984,16 +2254,20 @@ Signed-off-by: Khem Raj + pps-gpio.dtbo \ + pwm.dtbo \ + pwm-2chan.dtbo \ ++ pwm-ir-tx.dtbo \ + qca7000.dtbo \ -+ raspidac3.dtbo \ ++ rotary-encoder.dtbo \ + rpi-backlight.dtbo \ ++ rpi-cirrus-wm5102.dtbo \ + rpi-dac.dtbo \ + rpi-display.dtbo \ + rpi-ft5406.dtbo \ + rpi-proto.dtbo \ + rpi-sense.dtbo \ ++ rpi-tv.dtbo \ + rra-digidac1-wm8741-audio.dtbo \ + sc16is750-i2c.dtbo \ ++ sc16is752-i2c.dtbo \ + sc16is752-spi1.dtbo \ + sdhost.dtbo \ + sdio.dtbo \ @@ -2004,6 +2278,7 @@ Signed-off-by: Khem Raj + smi-nand.dtbo \ + spi-gpio35-39.dtbo \ + spi-rtc.dtbo \ ++ spi0-cs.dtbo \ + spi0-hw-cs.dtbo \ + spi1-1cs.dtbo \ + spi1-2cs.dtbo \ @@ -2011,8 +2286,13 @@ Signed-off-by: Khem Raj + spi2-1cs.dtbo \ + spi2-2cs.dtbo \ + spi2-3cs.dtbo \ ++ superaudioboard.dtbo \ ++ sx150x.dtbo \ + tinylcd35.dtbo \ ++ uart0.dtbo \ + uart1.dtbo \ ++ upstream.dtbo \ ++ upstream-aux-interrupt.dtbo \ + vc4-fkms-v3d.dtbo \ + vc4-kms-v3d.dtbo \ + vga666.dtbo \ @@ -2027,7 +2307,7 @@ Signed-off-by: Khem Raj +clean-files := *.dtbo --- /dev/null +++ b/arch/arm/boot/dts/overlays/README -@@ -0,0 +1,1368 @@ +@@ -0,0 +1,1952 @@ +Introduction +============ + @@ -2063,6 +2343,9 @@ Signed-off-by: Khem Raj +Configuring additional, optional hardware is done using Device Tree overlays +(see below). + ++GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and ++not the physical pin numbers. ++ +raspi-config +============ + @@ -2116,6 +2399,20 @@ Signed-off-by: Khem Raj + audio Set to "on" to enable the onboard ALSA audio + interface (default "off") + ++ eee Enable Energy Efficient Ethernet support for ++ compatible devices (default "on"). See also ++ "tx_lpi_timer". ++ ++ eth_led0 Set mode of LED0 (usually orange) (default ++ "1"). The legal values are: ++ 0=link/activity 1=link1000/activity ++ 2=link100/activity 3=link10/activity ++ 4=link100/1000/activity 5=link10/1000/activity ++ 6=link10/100/activity 14=off 15=on ++ ++ eth_led1 Set mode of LED1 (usually green) (default ++ "6"). See eth_led0 for legal values. ++ + i2c_arm Set to "on" to enable the ARM's i2c interface + (default "off") + @@ -2152,6 +2449,13 @@ Signed-off-by: Khem Raj + + sd_debug Enable debug output from SD driver (default off) + ++ sdio_overclock Clock (in MHz) to use when the MMC framework ++ requests 50MHz for the SDIO/WiFi interface. ++ ++ tx_lpi_timer Set the delay in microseconds between going idle ++ and entering the low power state (default 600). ++ Requires EEE to be enabled - see "eee". ++ + uart0 Set to "off" to disable uart0 (default "on") + + uart1 Set to "on" or "off" to enable or disable uart1 @@ -2198,6 +2502,12 @@ Signed-off-by: Khem Raj +Params: + + ++Name: adau7002-simple ++Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter. ++Load: dtoverlay=adau7002-simple,= ++Params: card-name Override the default, "adau7002", card name. ++ ++ +Name: ads1015 +Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C +Load: dtoverlay=ads1015,= @@ -2220,6 +2530,28 @@ Signed-off-by: Khem Raj + http://www.ti.com/lit/ds/symlink/ads1015.pdf + + ++Name: ads1115 ++Info: Texas Instruments ADS1115 ADC ++Load: dtoverlay=ads1115,[=] ++Params: addr I2C bus address of device. Set based on how the ++ addr pin is wired. (default=0x48 assumes addr ++ is pulled to GND) ++ cha_enable Enable virtual channel a. ++ cha_cfg Set the configuration for virtual channel a. ++ (default=4 configures this channel for the ++ voltage at A0 with respect to GND) ++ cha_datarate Set the datarate (samples/sec) for this channel. ++ (default=7 sets 860 sps) ++ cha_gain Set the gain of the Programmable Gain ++ Amplifier for this channel. (Default 1 sets the ++ full scale of the channel to 4.096 Volts) ++ ++ Channel parameters can be set for each enabled channel. ++ A maximum of 4 channels can be enabled (letters a thru d). ++ For more information refer to the device datasheet at: ++ http://www.ti.com/lit/ds/symlink/ads1115.pdf ++ ++ +Name: ads7846 +Info: ADS7846 Touch controller +Load: dtoverlay=ads7846,= @@ -2265,6 +2597,42 @@ Signed-off-by: Khem Raj + that does not result in clipping/distortion!) + + ++Name: allo-boss-dac-pcm512x-audio ++Info: Configures the Allo Boss DAC audio cards. ++Load: dtoverlay=allo-boss-dac-pcm512x-audio, ++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec ++ Digital volume control. Enable with ++ "dtoverlay=allo-boss-dac-pcm512x-audio, ++ 24db_digital_gain" ++ (The default behaviour is that the Digital ++ volume control is limited to a maximum of ++ 0dB. ie. it can attenuate but not provide ++ gain. For most users, this will be desired ++ as it will prevent clipping. By appending ++ the 24db_digital_gain parameter, the Digital ++ volume control will allow up to 24dB of ++ gain. If this parameter is enabled, it is the ++ responsibility of the user to ensure that ++ the Digital volume control is set to a value ++ that does not result in clipping/distortion!) ++ slave Force Boss DAC into slave mode, using Pi a ++ master for bit clock and frame clock. Enable ++ with "dtoverlay=allo-boss-dac-pcm512x-audio, ++ slave" ++ ++ ++Name: allo-digione ++Info: Configures the Allo Digione audio card ++Load: dtoverlay=allo-digione ++Params: ++ ++ ++Name: allo-katana-dac-audio ++Info: Configures the Allo Katana DAC audio card ++Load: dtoverlay=allo-katana-dac-audio ++Params: ++ ++ +Name: allo-piano-dac-pcm512x-audio +Info: Configures the Allo Piano DAC (2.0/2.1) audio cards. + (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo. @@ -2285,6 +2653,33 @@ Signed-off-by: Khem Raj + that does not result in clipping/distortion!) + + ++Name: allo-piano-dac-plus-pcm512x-audio ++Info: Configures the Allo Piano DAC (2.1) audio cards. ++Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio, ++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec ++ Digital volume control. ++ (The default behaviour is that the Digital ++ volume control is limited to a maximum of ++ 0dB. ie. it can attenuate but not provide ++ gain. For most users, this will be desired ++ as it will prevent clipping. By appending ++ the 24db_digital_gain parameter, the Digital ++ volume control will allow up to 24dB of ++ gain. If this parameter is enabled, it is the ++ responsibility of the user to ensure that ++ the Digital volume control is set to a value ++ that does not result in clipping/distortion!) ++ glb_mclk This option is only with Kali board. If enabled, ++ MCLK for Kali is used and PLL is disabled for ++ better voice quality. (default Off) ++ ++ ++Name: applepi-dac ++Info: Configures the Orchard Audio ApplePi-DAC audio card ++Load: dtoverlay=applepi-dac ++Params: ++ ++ +Name: at86rf233 +Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver, + connected to spi0.0 @@ -2297,6 +2692,13 @@ Signed-off-by: Khem Raj + arrays (0=+0pF, 15=+4.5pF, default 15) + + ++Name: audioinjector-addons ++Info: Configures the audioinjector.net audio add on soundcards ++Load: dtoverlay=audioinjector-addons,= ++Params: non-stop-clocks Keeps the clocks running even when the stream ++ is paused or stopped (default off) ++ ++ +Name: audioinjector-wm8731-audio +Info: Configures the audioinjector.net audio add on soundcard +Load: dtoverlay=audioinjector-wm8731-audio @@ -2312,6 +2714,13 @@ Signed-off-by: Khem Raj + (default off) + + ++Name: balena-fin ++Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the ++ Balena Fin board. ++Load: dtoverlay=balena-fin ++Params: ++ ++ +Name: bmp085_i2c-sensor +Info: This overlay is now deprecated - see i2c-sensor +Load: dtoverlay=bmp085_i2c-sensor @@ -2332,6 +2741,25 @@ Signed-off-by: Khem Raj +Params: + + ++Name: dionaudio-loco-v2 ++Info: Configures the Dion Audio LOCO-V2 DAC-AMP ++Load: dtoverlay=dionaudio-loco-v2,= ++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec ++ Digital volume control. Enable with ++ "dtoverlay=hifiberry-dacplus,24db_digital_gain" ++ (The default behaviour is that the Digital ++ volume control is limited to a maximum of ++ 0dB. ie. it can attenuate but not provide ++ gain. For most users, this will be desired ++ as it will prevent clipping. By appending ++ the 24dB_digital_gain parameter, the Digital ++ volume control will allow up to 24dB of ++ gain. If this parameter is enabled, it is the ++ responsibility of the user to ensure that ++ the Digital volume control is set to a value ++ that does not result in clipping/distortion!) ++ ++ +Name: dpi18 +Info: Overlay for a generic 18-bit DPI display + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output @@ -2365,9 +2793,6 @@ Signed-off-by: Khem Raj + g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget + mode + -+ g-tx-fifo-size Size of periodic tx fifo per endpoint -+ (except ep0) in gadget mode -+ + +[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ] + @@ -2388,6 +2813,38 @@ Signed-off-by: Khem Raj + speed SPI bus speed (default 12000000) + + ++Name: exc3000 ++Info: Enables I2C connected EETI EXC3000 multiple touch controller using ++ GPIO 4 (pin 7 on GPIO header) for interrupt. ++Load: dtoverlay=exc3000,= ++Params: interrupt GPIO used for interrupt (default 4) ++ sizex Touchscreen size x (default 4096) ++ sizey Touchscreen size y (default 4096) ++ invx Touchscreen inverted x axis ++ invy Touchscreen inverted y axis ++ swapxy Touchscreen swapped x y axis ++ ++ ++Name: fe-pi-audio ++Info: Configures the Fe-Pi Audio Sound Card ++Load: dtoverlay=fe-pi-audio ++Params: ++ ++ ++Name: goodix ++Info: Enables I2C connected Goodix gt9271 multiple touch controller using ++ GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset. ++Load: dtoverlay=goodix,= ++Params: interrupt GPIO used for interrupt (default 4) ++ reset GPIO used for reset (default 17) ++ ++ ++Name: googlevoicehat-soundcard ++Info: Configures the Google voiceHAT soundcard ++Load: dtoverlay=googlevoicehat-soundcard ++Params: ++ ++ +Name: gpio-ir +Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- + based gpio_ir_recv driver maps received keys directly to a @@ -2404,8 +2861,48 @@ Signed-off-by: Khem Raj + ir-keytable), defaults to "rc-rc6-mce" + + ++Name: gpio-ir-tx ++Info: Use GPIO pin as bit-banged infrared transmitter output. ++ This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require ++ a PWM so it can be used together with onboard analog audio. ++Load: dtoverlay=gpio-ir-tx,= ++Params: gpio_pin Output GPIO (default 18) ++ ++ invert "1" = invert the output (make it active-low). ++ Default is "0" (active-high). ++ ++ ++Name: gpio-key ++Info: This is a generic overlay for activating GPIO keypresses using ++ the gpio-keys library and this dtoverlay. Multiple keys can be ++ set up using multiple calls to the overlay for configuring ++ additional buttons or joysticks. You can see available keycodes ++ at https://github.com/torvalds/linux/blob/v4.12/include/uapi/ ++ linux/input-event-codes.h#L64 ++Load: dtoverlay=gpio-key,= ++Params: gpio GPIO pin to trigger on (default 3) ++ active_low When this is 1 (active low), a falling ++ edge generates a key down event and a ++ rising edge generates a key up event. ++ When this is 0 (active high), this is ++ reversed. The default is 1 (active low) ++ gpio_pull Desired pull-up/down state (off, down, up) ++ Default is "up". Note that the default pin ++ (GPIO3) has an external pullup ++ label Set a label for the key ++ keycode Set the key code for the button ++ ++ ++Name: gpio-no-irq ++Info: Use this overlay to disable all GPIO interrupts, which can be useful ++ for user-space GPIO edge detection systems. ++Load: dtoverlay=gpio-no-irq ++Params: ++ ++ +Name: gpio-poweroff -+Info: Drives a GPIO high or low on poweroff (including halt) ++Info: Drives a GPIO high or low on poweroff (including halt). Enabling this ++ overlay will prevent the ability to boot by driving GPIO3 low. +Load: dtoverlay=gpio-poweroff,= +Params: gpiopin GPIO for signalling (default 26) + @@ -2415,6 +2912,41 @@ Signed-off-by: Khem Raj + custom dt-blob.bin to prevent a power-down + during the boot process, and that a reboot + will also cause the pin to go low. ++ input Set if the gpio pin should be configured as ++ an input. ++ export Set to export the configured pin to sysfs ++ ++ ++Name: gpio-shutdown ++Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin ++ is configured as an input key that generates KEY_POWER events. ++ This event is handled by systemd-logind by initiating a ++ shutdown. Systemd versions older than 225 need an udev rule ++ enable listening to the input device: ++ ++ ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \ ++ SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \ ++ ATTRS{keys}=="116", TAG+="power-switch" ++ ++ This overlay only handles shutdown. After shutdown, the system ++ can be powered up again by driving GPIO3 low. The default ++ configuration uses GPIO3 with a pullup, so if you connect a ++ button between GPIO3 and GND (pin 5 and 6 on the 40-pin header), ++ you get a shutdown and power-up button. ++Load: dtoverlay=gpio-shutdown,= ++Params: gpio_pin GPIO pin to trigger on (default 3) ++ ++ active_low When this is 1 (active low), a falling ++ edge generates a key down event and a ++ rising edge generates a key up event. ++ When this is 0 (active high), this is ++ reversed. The default is 1 (active low). ++ ++ gpio_pull Desired pull-up/down state (off, down, up) ++ Default is "up". ++ ++ Note that the default pin (GPIO3) has an ++ external pullup. + + +Name: hifiberry-amp @@ -2516,6 +3048,13 @@ Signed-off-by: Khem Raj + i2c_gpio_delay_us Clock delay in microseconds + (default "2" = ~100kHz) + ++ bus Set to a unique, non-zero value if wanting ++ multiple i2c-gpio busses. If set, will be used ++ as the preferred bus number (/dev/i2c-). If ++ not set, the default value is 0, but the bus ++ number will be dynamically assigned - probably ++ 3. ++ + +Name: i2c-mux +Info: Adds support for a number of I2C bus multiplexers on i2c_arm @@ -2551,6 +3090,8 @@ Signed-off-by: Khem Raj + + ds3231 Select the DS3231 device + ++ m41t62 Select the M41T62 device ++ + mcp7940x Select the MCP7940x device + + mcp7941x Select the MCP7941x device @@ -2571,18 +3112,98 @@ Signed-off-by: Khem Raj + source + + ++Name: i2c-rtc-gpio ++Info: Adds support for a number of I2C Real Time Clock devices ++ using the software i2c controller ++Load: dtoverlay=i2c-rtc-gpio,= ++Params: abx80x Select one of the ABx80x family: ++ AB0801, AB0803, AB0804, AB0805, ++ AB1801, AB1803, AB1804, AB1805 ++ ++ ds1307 Select the DS1307 device ++ ++ ds1339 Select the DS1339 device ++ ++ ds3231 Select the DS3231 device ++ ++ mcp7940x Select the MCP7940x device ++ ++ mcp7941x Select the MCP7941x device ++ ++ pcf2127 Select the PCF2127 device ++ ++ pcf8523 Select the PCF8523 device ++ ++ pcf8563 Select the PCF8563 device ++ ++ trickle-diode-type Diode type for trickle charge - "standard" or ++ "schottky" (ABx80x only) ++ ++ trickle-resistor-ohms Resistor value for trickle charge (DS1339, ++ ABx80x) ++ ++ wakeup-source Specify that the RTC can be used as a wakeup ++ source ++ ++ i2c_gpio_sda GPIO used for I2C data (default "23") ++ ++ i2c_gpio_scl GPIO used for I2C clock (default "24") ++ ++ i2c_gpio_delay_us Clock delay in microseconds ++ (default "2" = ~100kHz) ++ ++ +Name: i2c-sensor +Info: Adds support for a number of I2C barometric pressure and temperature + sensors on i2c_arm +Load: dtoverlay=i2c-sensor,= -+Params: bmp085 Select the Bosch sensortronic BMP085 ++Params: addr Set the address for the BME280, BMP280, DS1621, ++ HDC100X, LM75, SHT3x or TMP102 + -+ bmp280 Select the Bosch sensortronic BMP280 ++ bme280 Select the Bosch Sensortronic BME280 ++ Valid addresses 0x76-0x77, default 0x76 ++ ++ bmp085 Select the Bosch Sensortronic BMP085 ++ ++ bmp180 Select the Bosch Sensortronic BMP180 ++ ++ bmp280 Select the Bosch Sensortronic BMP280 ++ Valid addresses 0x76-0x77, default 0x76 ++ ++ ds1621 Select the Dallas Semiconductors DS1621 temp ++ sensor. Valid addresses 0x48-0x4f, default 0x48 ++ ++ hdc100x Select the Texas Instruments HDC100x temp sensor ++ Valid addresses 0x40-0x43, default 0x40 ++ ++ htu21 Select the HTU21 temperature and humidity sensor ++ ++ lm75 Select the Maxim LM75 temperature sensor ++ Valid addresses 0x48-0x4f, default 0x4f ++ ++ lm75addr Deprecated - use addr parameter instead ++ ++ sht3x Select the Sensiron SHT3x temperature and ++ humidity sensor. Valid addresses 0x44-0x45, ++ default 0x44 ++ ++ si7020 Select the Silicon Labs Si7013/20/21 humidity/ ++ temperature sensor ++ ++ tmp102 Select the Texas Instruments TMP102 temp sensor ++ Valid addresses 0x48-0x4b, default 0x48 ++ ++ tsl4531 Select the AMS TSL4531 digital ambient light ++ sensor ++ ++ veml6070 Select the Vishay VEML6070 ultraviolet light ++ sensor + + +Name: i2c0-bcm2708 -+Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations -+ are usable on all platforms. ++Info: Change i2c0 pin usage. Not all pin combinations are usable on all ++ platforms - platforms other then Compute Modules can only use this ++ to disable transaction combining. +Load: dtoverlay=i2c0-bcm2708,= +Params: sda0_pin GPIO pin for SDA0 (deprecated - use pins_*) + scl0_pin GPIO pin for SCL0 (deprecated - use pins_*) @@ -2590,15 +3211,22 @@ Signed-off-by: Khem Raj + pins_28_29 Use pins 28 and 29 + pins_44_45 Use pins 44 and 45 + pins_46_47 Use pins 46 and 47 ++ combine Allow transactions to be combined (default ++ "yes") + + +Name: i2c1-bcm2708 ++Info: Change i2c1 pin usage. Not all pin combinations are usable on all ++ platforms - platforms other then Compute Modules can only use this ++ to disable transaction combining. +Info: Enable the i2c_bcm2708 driver for the i2c1 bus +Load: dtoverlay=i2c1-bcm2708,= +Params: sda1_pin GPIO pin for SDA1 (2 or 44 - default 2) + scl1_pin GPIO pin for SCL1 (3 or 45 - default 3) + pin_func Alternative pin function (4 (alt0), 6 (alt2) - + default 4) ++ combine Allow transactions to be combined (default ++ "yes") + + +Name: i2s-gpio28-31 @@ -2658,6 +3286,15 @@ Signed-off-by: Khem Raj + dai stream name. + + ++Name: jedec-spi-nor ++Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The ++ "jedec,spi-nor" kernel driver was formerly known as "m25p80".) ++Load: dtoverlay=jedec-spi-nor,= ++Params: flash-spi- Enables flash device on SPI, CS#. ++ flash-fastr-spi- Enables flash device with fast read capability ++ on SPI, CS#. ++ ++ +Name: justboom-dac +Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio + cards @@ -2710,6 +3347,37 @@ Signed-off-by: Khem Raj + (default "off") + + ++Name: ltc294x ++Info: Adds support for the ltc294x family of battery gauges ++Load: dtoverlay=ltc294x,= ++Params: ltc2941 Select the ltc2941 device ++ ++ ltc2942 Select the ltc2942 device ++ ++ ltc2943 Select the ltc2943 device ++ ++ ltc2944 Select the ltc2944 device ++ ++ resistor-sense The sense resistor value in milli-ohms. ++ Can be a 32-bit negative value when the battery ++ has been connected to the wrong end of the ++ resistor. ++ ++ prescaler-exponent Range and accuracy of the gauge. The value is ++ programmed into the chip only if it differs ++ from the current setting. ++ For LTC2941 only: ++ - Default value is 128 ++ - the exponent is in the range 0-7 (default 7) ++ See the datasheet for more information. ++ ++ ++Name: mbed-dac ++Info: Configures the mbed AudioCODEC (TLV320AIC23B) ++Load: dtoverlay=mbed-dac ++Params: ++ ++ +Name: mcp23017 +Info: Configures the MCP23017 I2C GPIO expander +Load: dtoverlay=mcp23017,= @@ -2763,6 +3431,49 @@ Signed-off-by: Khem Raj + interrupt GPIO for interrupt signal + + ++Name: mcp3008 ++Info: Configures MCP3008 A/D converters ++ For devices on spi1 or spi2, the interfaces should be enabled ++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. ++Load: dtoverlay=mcp3008,[=] ++Params: spi--present boolean, configure device at spi, cs ++ spi--speed integer, set the spi bus speed for this device ++ ++ ++Name: mcp3202 ++Info: Configures MCP3202 A/D converters ++ For devices on spi1 or spi2, the interfaces should be enabled ++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. ++Load: dtoverlay=mcp3202,[=] ++Params: spi--present boolean, configure device at spi, cs ++ spi--speed integer, set the spi bus speed for this device ++ ++ ++Name: media-center ++Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply ++Load: dtoverlay=media-center,= ++Params: speed Display SPI bus speed ++ rotate Display rotation {0,90,180,270} ++ fps Delay between frame updates ++ xohms Touchpanel sensitivity (X-plate resistance) ++ swapxy Swap x and y axis ++ backlight Change backlight GPIO pin {e.g. 12, 18} ++ gpio_out_pin GPIO for output (default "17") ++ gpio_in_pin GPIO for input (default "18") ++ gpio_in_pull Pull up/down/off on the input pin ++ (default "down") ++ sense Override the IR receive auto-detection logic: ++ "0" = force active-high ++ "1" = force active-low ++ "-1" = use auto-detection ++ (default "-1") ++ softcarrier Turn the software carrier "on" or "off" ++ (default "on") ++ invert "on" = invert the output pin (default "off") ++ debug "on" = enable additional debug messages ++ (default "off") ++ ++ +Name: midi-uart0 +Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets + 31.25kbaud, the frequency required for MIDI @@ -2770,6 +3481,13 @@ Signed-off-by: Khem Raj +Params: + + ++Name: midi-uart1 ++Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets ++ 31.25kbaud, the frequency required for MIDI ++Load: dtoverlay=midi-uart1 ++Params: ++ ++ +Name: mmc +Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock +Load: dtoverlay=mmc,= @@ -2777,6 +3495,12 @@ Signed-off-by: Khem Raj + requests 50MHz + + ++Name: mpu6050 ++Info: Overlay for i2c connected mpu6050 imu ++Load: dtoverlay=mpu6050,= ++Params: interrupt GPIO pin for interrupt (default 4) ++ ++ +Name: mz61581 +Info: MZ61581 display by Tontec +Load: dtoverlay=mz61581,= @@ -2793,6 +3517,17 @@ Signed-off-by: Khem Raj + xohms Touchpanel sensitivity (X-plate resistance) + + ++Name: papirus ++Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT) ++Load: dtoverlay=papirus,= ++Params: panel Display panel (required): ++ 1.44": e1144cs021 ++ 2.0": e2200cs021 ++ 2.7": e2271cs021 ++ ++ speed Display SPI bus speed ++ ++ +[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ] + + @@ -2827,6 +3562,12 @@ Signed-off-by: Khem Raj +Params: + + ++Name: pi3-disable-wifi ++Info: Disable Pi3 onboard WiFi ++Load: dtoverlay=pi3-disable-wifi ++Params: ++ ++ +Name: pi3-miniuart-bt +Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore + UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum @@ -2841,6 +3582,13 @@ Signed-off-by: Khem Raj +Params: + + ++Name: pibell ++Info: Configures the pibell audio card. ++Load: dtoverlay=pibell,= ++Params: alsaname Set the name as it appears in ALSA (default ++ "PiBell") ++ ++ +Name: piscreen +Info: PiScreen display by OzzMaker.com +Load: dtoverlay=piscreen,= @@ -2938,7 +3686,10 @@ Signed-off-by: Khem Raj +Load: dtoverlay=pps-gpio,= +Params: gpiopin Input GPIO (default "18") + assert_falling_edge When present, assert is indicated by a falling -+ edge, rather than by a rising edge ++ edge, rather than by a rising edge (default ++ off) ++ capture_clear Generate clear events on the trailing edge ++ (default off) + + +Name: pwm @@ -2981,6 +3732,19 @@ Signed-off-by: Khem Raj + clock PWM clock frequency (informational) + + ++Name: pwm-ir-tx ++Info: Use GPIO pin as pwm-assisted infrared transmitter output. ++ This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use ++ of PWM0 to reduce the CPU load during transmission compared to ++ gpio-ir-tx which uses bit-banging. ++ Legal pin,function combinations are: ++ 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1) ++Load: dtoverlay=pwm-ir-tx,= ++Params: gpio_pin Output GPIO (default 18) ++ ++ func Pin function (default 2 = Alt5) ++ ++ +Name: qca7000 +Info: I2SE's Evaluation Board for PLC Stamp micro +Load: dtoverlay=qca7000,= @@ -2989,10 +3753,36 @@ Signed-off-by: Khem Raj + speed SPI bus speed (default 12 MHz) + + -+Name: raspidac3 -+Info: Configures the RaspiDAV Rev.3x audio card -+Load: dtoverlay=raspidac3 -+Params: ++Name: rotary-encoder ++Info: Overlay for GPIO connected rotary encoder. ++Load: dtoverlay=rotary-encoder,= ++Params: pin_a GPIO connected to rotary encoder channel A ++ (default 4). ++ pin_b GPIO connected to rotary encoder channel B ++ (default 17). ++ relative_axis register a relative axis rather than an ++ absolute one. Relative axis will only ++ generate +1/-1 events on the input device, ++ hence no steps need to be passed. ++ linux_axis the input subsystem axis to map to this ++ rotary encoder. Defaults to 0 (ABS_X / REL_X) ++ rollover Automatic rollover when the rotary value ++ becomes greater than the specified steps or ++ smaller than 0. For absolute axis only. ++ steps-per-period Number of steps (stable states) per period. ++ The values have the following meaning: ++ 1: Full-period mode (default) ++ 2: Half-period mode ++ 4: Quarter-period mode ++ steps Number of steps in a full turnaround of the ++ encoder. Only relevant for absolute axis. ++ Defaults to 24 which is a typical value for ++ such devices. ++ wakeup Boolean, rotary encoder can wake up the ++ system. ++ encoding String, the method used to encode steps. ++ Supported are "gray" (the default and more ++ common) and "binary". + + +Name: rpi-backlight @@ -3001,6 +3791,12 @@ Signed-off-by: Khem Raj +Params: + + ++Name: rpi-cirrus-wm5102 ++Info: Configures the Cirrus Logic Audio Card ++Load: dtoverlay=rpi-cirrus-wm5102 ++Params: ++ ++ +Name: rpi-dac +Info: Configures the RPi DAC audio card +Load: dtoverlay=rpi-dac @@ -3016,12 +3812,17 @@ Signed-off-by: Khem Raj + debug Debug output level {0-7} + xohms Touchpanel sensitivity (X-plate resistance) + swapxy Swap x and y axis ++ backlight Change backlight GPIO pin {e.g. 12, 18} + + +Name: rpi-ft5406 +Info: Official Raspberry Pi display touchscreen -+Load: dtoverlay=rpi-ft5406 -+Params: ++Load: dtoverlay=rpi-ft5406,= ++Params: touchscreen-size-x Touchscreen X resolution (default 800) ++ touchscreen-size-y Touchscreen Y resolution (default 600); ++ touchscreen-inverted-x Invert touchscreen X coordinates (default 0); ++ touchscreen-inverted-y Invert touchscreen Y coordinates (default 0); ++ touchscreen-swapped-x-y Swap X and Y cordinates (default 0); + + +Name: rpi-proto @@ -3036,6 +3837,12 @@ Signed-off-by: Khem Raj +Params: + + ++Name: rpi-tv ++Info: Raspberry Pi TV HAT ++Load: dtoverlay=rpi-tv ++Params: ++ ++ +Name: rra-digidac1-wm8741-audio +Info: Configures the Red Rocks Audio DigiDAC1 soundcard +Load: dtoverlay=rra-digidac1-wm8741-audio @@ -3044,14 +3851,23 @@ Signed-off-by: Khem Raj + +Name: sc16is750-i2c +Info: Overlay for the NXP SC16IS750 UART with I2C Interface -+ Enables the chip on I2C1 at 0x48. To select another address, -+ please refer to table 10 in reference manual. -+ ++ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To ++ select another address, please refer to table 10 in reference manual. +Load: dtoverlay=sc16is750-i2c,= +Params: int_pin GPIO used for IRQ (default 24) + addr Address (default 0x48) + + ++Name: sc16is752-i2c ++Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface ++ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To ++ select another address, please refer to table 10 in reference manual. ++Load: dtoverlay=sc16is752-i2c,= ++Params: int_pin GPIO used for IRQ (default 24) ++ addr Address (default 0x48) ++ xtal On-board crystal frequency (default 14745600) ++ ++ +Name: sc16is752-spi1 +Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface + Enables the chip on SPI1. @@ -3084,19 +3900,9 @@ Signed-off-by: Khem Raj +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock, + and enables SDIO via GPIOs 22-27. +Load: dtoverlay=sdio,= -+Params: overclock_50 SD Clock (in MHz) to use when the MMC framework -+ requests 50MHz -+ -+ sdio_overclock SDIO Clock (in MHz) to use when the MMC ++Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC + framework requests 50MHz + -+ force_pio Disable DMA support (default off) -+ -+ pio_limit Number of blocks above which to use DMA -+ (default 1) -+ -+ debug Enable debug output (default off) -+ + poll_once Disable SDIO-device polling every second + (default on: polling once at boot-time) + @@ -3107,19 +3913,9 @@ Signed-off-by: Khem Raj +Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock, + and enables 1-bit SDIO via GPIOs 22-25. +Load: dtoverlay=sdio-1bit,= -+Params: overclock_50 SD Clock (in MHz) to use when the MMC framework -+ requests 50MHz -+ -+ sdio_overclock SDIO Clock (in MHz) to use when the MMC ++Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC + framework requests 50MHz + -+ force_pio Disable DMA support (default off) -+ -+ pio_limit Number of blocks above which to use DMA -+ (default 1) -+ -+ debug Enable debug output (default off) -+ + poll_once Disable SDIO-device polling every second + (default on: polling once at boot-time) + @@ -3139,6 +3935,16 @@ Signed-off-by: Khem Raj + + debug Enable debug output (default off) + ++ poll_once Looks for a card once after booting. Useful ++ for network booting scenarios to avoid the ++ overhead of continuous polling. N.B. Using ++ this option restricts the system to using a ++ single card per boot (or none at all). ++ (default off) ++ ++ enable Set to off to completely disable the interface ++ (default on) ++ + +Name: smi +Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25! @@ -3159,7 +3965,7 @@ Signed-off-by: Khem Raj + + +Name: spi-gpio35-39 -+Info: move SPI function block to GPIO 35 to 39 ++Info: Move SPI function block to GPIO 35 to 39 +Load: dtoverlay=spi-gpio35-39 +Params: + @@ -3170,6 +3976,13 @@ Signed-off-by: Khem Raj +Params: pcf2123 Select the PCF2123 device + + ++Name: spi0-cs ++Info: Allows the (software) CS pins for SPI0 to be changed ++Load: dtoverlay=spi0-cs,= ++Params: cs0_pin GPIO pin for CS0 (default 8) ++ cs1_pin GPIO pin for CS1 (default 7) ++ ++ +Name: spi0-hw-cs +Info: Re-enables hardware CS/CE (chip selects) for SPI0 +Load: dtoverlay=spi0-hw-cs @@ -3275,6 +4088,31 @@ Signed-off-by: Khem Raj + is 'okay' or enabled). + + ++Name: superaudioboard ++Info: Configures the SuperAudioBoard sound card ++Load: dtoverlay=superaudioboard,= ++Params: gpiopin GPIO pin for codec reset ++ ++ ++Name: sx150x ++Info: Configures the Semtech SX150X I2C GPIO expanders. ++Load: dtoverlay=sx150x,= ++Params: sx150-- Enables SX150X device on I2C# with slave ++ address . may be 1-9. may be 0 or 1. ++ Permissible values of (which is denoted in ++ hex) depend on the device variant. For SX1501, ++ SX1502, SX1504 and SX1505, may be 20 or 21. ++ For SX1503 and SX1506, may be 20. For ++ SX1507 and SX1509, may be 3E, 3F, 70 or 71. ++ For SX1508, may be 20, 21, 22 or 23. ++ ++ sx150---int-gpio ++ Integer, enables interrupts on SX150X device on ++ I2C# with slave address , specifies ++ the GPIO pin to which NINT output of SX150X is ++ connected. ++ ++ +Name: tinylcd35 +Info: 3.5" Color TFT Display by www.tinylcd.com + Options: Touch, RTC, keypad @@ -3306,14 +4144,40 @@ Signed-off-by: Khem Raj + dtoverlay=tinylcd35,touch,touchgpio=3 + + ++Name: uart0 ++Info: Change the pin usage of uart0 ++Load: dtoverlay=uart0,= ++Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14) ++ ++ rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15) ++ ++ pin_func Alternative pin function - 4(Alt0) for 14&15, ++ 7(Alt3) for 32&33, 6(Alt2) for 36&37 ++ ++ +Name: uart1 -+Info: Enable uart1 in place of uart0 ++Info: Change the pin usage of uart1 +Load: dtoverlay=uart1,= +Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14) + + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15) + + ++Name: upstream ++Info: Allow usage of downstream .dtb with upstream kernel. Comprises ++ vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays. ++Load: dtoverlay=upstream ++Params: ++ ++ ++Name: upstream-aux-interrupt ++Info: Allow usage of downstream .dtb with upstream kernel by binding AUX ++ devices directly to the shared AUX interrupt line. One of the parts ++ of the 'upstream' overlay ++Load: dtoverlay=upstream-aux-interrupt ++Params: ++ ++ +Name: vc4-fkms-v3d +Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx + display stack. @@ -3398,7 +4262,7 @@ Signed-off-by: Khem Raj +http://www.raspberrypi.org/documentation/configuration/device-tree.md --- /dev/null +++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts -@@ -0,0 +1,53 @@ +@@ -0,0 +1,40 @@ +// Definitions for ADAU1977 ADC +/dts-v1/; +/plugin/; @@ -3407,19 +4271,6 @@ Signed-off-by: Khem Raj + compatible = "brcm,bcm2708"; + + fragment@0 { -+ target = <&soc>; -+ -+ __overlay__ { -+ codec_supply: fixedregulator@0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "AVDD"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ }; -+ }; -+ -+ fragment@1 { + target = <&i2c>; + + __overlay__ { @@ -3431,19 +4282,19 @@ Signed-off-by: Khem Raj + compatible = "adi,adau1977"; + reg = <0x11>; + reset-gpios = <&gpio 5 0>; -+ AVDD-supply = <&codec_supply>; ++ AVDD-supply = <&vdd_3v3_reg>; + }; + }; + }; + -+ fragment@2 { ++ fragment@1 { + target = <&i2s>; + __overlay__ { + status = "okay"; + }; + }; + -+ fragment@3 { ++ fragment@2 { + target = <&sound>; + __overlay__ { + compatible = "adi,adau1977-adc"; @@ -3453,6 +4304,61 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts +@@ -0,0 +1,52 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ adau7002_codec: adau7002-codec { ++ #sound-dai-cells = <0>; ++ compatible = "adi,adau7002"; ++/* IOVDD-supply = <&supply>;*/ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ sound_overlay: __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "adau7002"; ++ simple-audio-card,bitclock-slave = <&dailink0_slave>; ++ simple-audio-card,frame-slave = <&dailink0_slave>; ++ simple-audio-card,widgets = ++ "Microphone", "Microphone Jack"; ++ simple-audio-card,routing = ++ "PDM_DAT", "Microphone Jack"; ++ status = "okay"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ dailink0_slave: simple-audio-card,codec { ++ sound-dai = <&adau7002_codec>; ++ }; ++ }; ++ }; ++ ++ ++ __overrides__ { ++ card-name = <&sound_overlay>,"simple-audio-card,name"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts @@ -0,0 +1,98 @@ +/* @@ -3554,6 +4460,112 @@ Signed-off-by: Khem Raj + +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts +@@ -0,0 +1,103 @@ ++/* ++ * TI ADS1115 multi-channel ADC overlay ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_arm>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ads1115: ads1115 { ++ compatible = "ti,ads1115"; ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x48>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "i2c_arm/ads1115"; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ channel_a: channel_a { ++ reg = <4>; ++ ti,gain = <1>; ++ ti,datarate = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "i2c_arm/ads1115"; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ channel_b: channel_b { ++ reg = <5>; ++ ti,gain = <1>; ++ ti,datarate = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "i2c_arm/ads1115"; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ channel_c: channel_c { ++ reg = <6>; ++ ti,gain = <1>; ++ ti,datarate = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "i2c_arm/ads1115"; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ channel_d: channel_d { ++ reg = <7>; ++ ti,gain = <1>; ++ ti,datarate = <7>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ addr = <&ads1115>,"reg:0"; ++ cha_enable = <0>,"=1"; ++ cha_cfg = <&channel_a>,"reg:0"; ++ cha_gain = <&channel_a>,"ti,gain:0"; ++ cha_datarate = <&channel_a>,"ti,datarate:0"; ++ chb_enable = <0>,"=2"; ++ chb_cfg = <&channel_b>,"reg:0"; ++ chb_gain = <&channel_b>,"ti,gain:0"; ++ chb_datarate = <&channel_b>,"ti,datarate:0"; ++ chc_enable = <0>,"=3"; ++ chc_cfg = <&channel_c>,"reg:0"; ++ chc_gain = <&channel_c>,"ti,gain:0"; ++ chc_datarate = <&channel_c>,"ti,datarate:0"; ++ chd_enable = <0>,"=4"; ++ chd_cfg = <&channel_d>,"reg:0"; ++ chd_gain = <&channel_d>,"ti,gain:0"; ++ chd_datarate = <&channel_d>,"ti,datarate:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts @@ -0,0 +1,89 @@ +/* @@ -3647,7 +4659,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts -@@ -0,0 +1,46 @@ +@@ -0,0 +1,49 @@ +// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero +/dts-v1/; +/plugin/; @@ -3673,6 +4685,9 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "ti,pcm5122"; + reg = <0x4c>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -3695,6 +4710,175 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts +@@ -0,0 +1,59 @@ ++/* ++ * Definitions for Allo Boss DAC board ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/clocks"; ++ __overlay__ { ++ boss_osc: boss_osc { ++ compatible = "allo,dac-clk"; ++ #clock-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcm5122@4d { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ clocks = <&boss_osc>; ++ reg = <0x4d>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ boss_dac: __overlay__ { ++ compatible = "allo,boss-dac"; ++ i2s-controller = <&i2s>; ++ mute-gpios = <&gpio 6 1>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?"; ++ slave = <&boss_dac>,"allo,slave?"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts +@@ -0,0 +1,44 @@ ++// Definitions for Allo DigiOne ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ wm8804@3b { ++ #sound-dai-cells = <0>; ++ compatible = "wlf,wm8804"; ++ reg = <0x3b>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ status = "okay"; ++ wlf,reset-gpio = <&gpio 17 0>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "allo,allo-digione"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ clock44-gpio = <&gpio 5 0>; ++ clock48-gpio = <&gpio 6 0>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts +@@ -0,0 +1,57 @@ ++/* ++ * Definitions for Allo Katana DAC boards ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ cpu_port: port { ++ cpu_endpoint: endpoint { ++ remote-endpoint = <&codec_endpoint>; ++ bitclock-master = <&codec_endpoint>; ++ frame-master = <&codec_endpoint>; ++ dai-format = "i2s"; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ allo-katana-codec@30 { ++ #sound-dai-cells = <0>; ++ compatible = "allo,allo-katana-codec"; ++ reg = <0x30>; ++ port { ++ codec_endpoint: endpoint { ++ remote-endpoint = <&cpu_endpoint>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ katana_dac: __overlay__ { ++ compatible = "audio-graph-card"; ++ label = "Allo Katana"; ++ dais = <&cpu_port>; ++ status = "okay"; ++ }; ++ }; ++}; ++ +--- /dev/null +++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts @@ -0,0 +1,54 @@ +/* @@ -3752,6 +4936,124 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts +@@ -0,0 +1,55 @@ ++// Definitions for Piano DAC ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ allo_pcm5122_4c: pcm5122@4c { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ reg = <0x4c>; ++ status = "okay"; ++ }; ++ allo_pcm5122_4d: pcm5122@4d { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ reg = <0x4d>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ piano_dac: __overlay__ { ++ compatible = "allo,piano-dac-plus"; ++ audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>; ++ i2s-controller = <&i2s>; ++ mute1-gpios = <&gpio 6 1>; ++ mute2-gpios = <&gpio 25 1>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ 24db_digital_gain = ++ <&piano_dac>,"allo,24db_digital_gain?"; ++ glb_mclk = ++ <&piano_dac>,"allo,glb_mclk?"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts +@@ -0,0 +1,57 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ApplePi-DAC"; ++ ++ status = "okay"; ++ ++ playback_link: simple-audio-card,dai-link@1 { ++ format = "i2s"; ++ ++ p_cpu_dai: cpu { ++ sound-dai = <&i2s>; ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++ }; ++ ++ p_codec_dai: codec { ++ sound-dai = <&codec_out>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ codec_out: pcm1794a-codec { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm1794a"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2s>; ++ __overlay__ { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++/* ++ Written by: Leonid Ayzenshtat ++ Company: Orchard Audio (www.orchardaudio.com) ++ ++ compile with: ++ dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts ++*/ +--- /dev/null +++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts @@ -0,0 +1,57 @@ +/dts-v1/; @@ -3812,6 +5114,68 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts +@@ -0,0 +1,59 @@ ++// Definitions for audioinjector.net audio add on soundcard ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ cs42448: cs42448@48 { ++ #sound-dai-cells = <0>; ++ compatible = "cirrus,cs42448"; ++ reg = <0x48>; ++ clocks = <&cs42448_mclk>; ++ clock-names = "mclk"; ++ VA-supply = <&vdd_5v0_reg>; ++ VD-supply = <&vdd_3v3_reg>; ++ VLS-supply = <&vdd_3v3_reg>; ++ VLC-supply = <&vdd_3v3_reg>; ++ status = "okay"; ++ }; ++ ++ cs42448_mclk: codec-mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <49152000>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ snd: __overlay__ { ++ compatible = "ai,audioinjector-octo-soundcard"; ++ mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>, ++ <&gpio 24 0>; ++ reset-gpios = <&gpio 5 0>; ++ i2s-controller = <&i2s>; ++ codec = <&cs42448>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ non-stop-clocks = <&snd>, "non-stop-clocks?"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts @@ -0,0 +1,39 @@ +// Definitions for audioinjector.net audio add on soundcard @@ -3876,6 +5240,88 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts +@@ -0,0 +1,79 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&mmc>; ++ sdio_wifi: __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ bus-width = <4>; ++ brcm,overclock-50 = <35>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = <7>; /* ALT3 = SD1 */ ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ power_ctrl_pins: power_ctrl_pins { ++ brcm,pins = <40>; ++ brcm,function = <1>; // out ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ // We should investigate how to switch to mmc-pwrseq-sd8787 ++ // Currently that module requires two GPIOs to function since it ++ // targets a slightly different chip ++ power_ctrl: power_ctrl { ++ compatible = "gpio-poweroff"; ++ gpios = <&gpio 40 1>; ++ force; ++ }; ++ ++ i2c_soft: i2c@0 { ++ compatible = "i2c-gpio"; ++ gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>; ++ i2c-gpio,delay-us = <2>; /* ~100 kHz */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_soft>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ gpio_expander: gpio_expander@20 { ++ compatible = "nxp,pca9554"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ reg = <0x20>; ++ status = "okay"; ++ }; ++ ++ // rtc clock ++ ds1307: ds1307@68 { ++ compatible = "maxim,ds1307"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts @@ -0,0 +1,23 @@ +// Definitions for BMP085/BMP180 digital barometric pressure and temperature sensors from Bosch Sensortec @@ -3986,6 +5432,58 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts +@@ -0,0 +1,49 @@ ++/* ++ * Definitions for Dion Audio LOCO-V2 DAC-AMP ++ * eg. dtoverlay=dionaudio-loco-v2 ++ * ++ * PCM5242 DAC (in software mode) and TPA3255 AMP. ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&sound>; ++ frag0: __overlay__ { ++ compatible = "dionaudio,dionaudio-loco-v2"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcm5122@4c { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ reg = <0x4d>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts @@ -0,0 +1,31 @@ +/dts-v1/; @@ -4078,7 +5576,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts -@@ -0,0 +1,29 @@ +@@ -0,0 +1,28 @@ +/dts-v1/; +/plugin/; + @@ -4096,7 +5594,7 @@ Signed-off-by: Khem Raj + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; + g-rx-fifo-size = <256>; -+ g-tx-fifo-size = <256 128 128 64 64 64 32>; ++ g-tx-fifo-size = <512 512 512 512 512 256 256>; + status = "okay"; + }; + }; @@ -4105,7 +5603,6 @@ Signed-off-by: Khem Raj + dr_mode = <&dwc2_usb>, "dr_mode"; + g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0"; + g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0"; -+ g-tx-fifo-size = <&dwc2_usb>,"g-tx-fifo-size:0"; + }; +}; --- /dev/null @@ -4215,8 +5712,233 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts +@@ -0,0 +1,48 @@ ++// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&gpio>; ++ __overlay__ { ++ exc3000_pins: exc3000_pins { ++ brcm,pins = <4>; // interrupt ++ brcm,function = <0>; // in ++ brcm,pull = <2>; // pull-up ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ exc3000: exc3000@2a { ++ compatible = "eeti,exc3000"; ++ reg = <0x2a>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&exc3000_pins>; ++ interrupt-parent = <&gpio>; ++ interrupts = <4 8>; // active low level-sensitive ++ touchscreen-size-x = <4096>; ++ touchscreen-size-y = <4096>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ interrupt = <&exc3000_pins>,"brcm,pins:0", ++ <&exc3000>,"interrupts:0"; ++ sizex = <&exc3000>,"touchscreen-size-x:0"; ++ sizey = <&exc3000>,"touchscreen-size-y:0"; ++ invx = <&exc3000>,"touchscreen-inverted-x?"; ++ invy = <&exc3000>,"touchscreen-inverted-y?"; ++ swapxy = <&exc3000>,"touchscreen-swapped-x-y?"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts +@@ -0,0 +1,70 @@ ++// Definitions for Fe-Pi Audio ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&clocks>; ++ __overlay__ { ++ sgtl5000_mclk: sgtl5000_mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12288000>; ++ clock-output-names = "sgtl5000-mclk"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&soc>; ++ __overlay__ { ++ reg_1v8: reg_1v8@0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ sgtl5000@0a { ++ #sound-dai-cells = <0>; ++ compatible = "fepi,sgtl5000"; ++ reg = <0x0a>; ++ clocks = <&sgtl5000_mclk>; ++ micbias-resistor-k-ohms = <2>; ++ micbias-voltage-m-volts = <3000>; ++ VDDA-supply = <&vdd_3v3_reg>; ++ VDDIO-supply = <&vdd_3v3_reg>; ++ VDDD-supply = <®_1v8>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "fe-pi,fe-pi-audio"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts +@@ -0,0 +1,46 @@ ++// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&gpio>; ++ __overlay__ { ++ goodix_pins: goodix_pins { ++ brcm,pins = <4 17>; // interrupt and reset ++ brcm,function = <0 0>; // in ++ brcm,pull = <2 2>; // pull-up ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ gt9271: gt9271@14 { ++ compatible = "goodix,gt9271"; ++ reg = <0x14>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&goodix_pins>; ++ interrupt-parent = <&gpio>; ++ interrupts = <4 2>; // high-to-low edge triggered ++ irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header ++ reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ interrupt = <&goodix_pins>,"brcm,pins:0", ++ <>9271>,"interrupts:0", ++ <>9271>,"irq-gpios:4"; ++ reset = <&goodix_pins>,"brcm,pins:4", ++ <>9271>,"reset-gpios:4"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts +@@ -0,0 +1,49 @@ ++// Definitions for Google voiceHAT v1 soundcard overlay ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ googlevoicehat_pins: googlevoicehat_pins { ++ brcm,pins = <16>; ++ brcm,function = <1>; /* out */ ++ brcm,pull = <0>; /* up */ ++ }; ++ }; ++ }; ++ ++ ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ voicehat-codec { ++ #sound-dai-cells = <0>; ++ compatible = "google,voicehat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&googlevoicehat_pins>; ++ sdmode-gpios= <&gpio 16 0>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "googlevoicehat,googlevoicehat-soundcard"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts -@@ -0,0 +1,44 @@ +@@ -0,0 +1,48 @@ +// Definitions for ir-gpio module +/dts-v1/; +/plugin/; @@ -4227,8 +5949,10 @@ Signed-off-by: Khem Raj + fragment@0 { + target-path = "/"; + __overlay__ { -+ gpio_ir: ir-receiver { ++ gpio_ir: ir-receiver@12 { + compatible = "gpio-ir-receiver"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpio_ir_pins>; + + // pin number, high or low + gpios = <&gpio 18 1>; @@ -4244,7 +5968,7 @@ Signed-off-by: Khem Raj + fragment@1 { + target = <&gpio>; + __overlay__ { -+ gpio_ir_pins: gpio_ir_pins { ++ gpio_ir_pins: gpio_ir_pins@12 { + brcm,pins = <18>; // pin 18 + brcm,function = <0>; // in + brcm,pull = <1>; // down @@ -4254,16 +5978,125 @@ Signed-off-by: Khem Raj + + __overrides__ { + // parameters -+ gpio_pin = <&gpio_ir>,"gpios:4", -+ <&gpio_ir_pins>,"brcm,pins:0"; // pin number ++ gpio_pin = <&gpio_ir>,"gpios:4", // pin number ++ <&gpio_ir>,"reg:0", ++ <&gpio_ir_pins>,"brcm,pins:0", ++ <&gpio_ir_pins>,"reg:0"; + gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state + + rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts +@@ -0,0 +1,36 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&gpio>; ++ __overlay__ { ++ gpio_ir_tx_pins: gpio_ir_tx_pins@12 { ++ brcm,pins = <18>; ++ brcm,function = <1>; // out ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ gpio_ir_tx: gpio-ir-transmitter@12 { ++ compatible = "gpio-ir-tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpio_ir_tx_pins>; ++ gpios = <&gpio 18 0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number ++ <&gpio_ir_tx>, "reg:0", ++ <&gpio_ir_tx_pins>, "brcm,pins:0", ++ <&gpio_ir_tx_pins>, "reg:0"; ++ invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts +@@ -0,0 +1,48 @@ ++// Definitions for gpio-key module ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ // Configure the gpio pin controller ++ target = <&gpio>; ++ __overlay__ { ++ pin_state: button_pins@0 { ++ brcm,pins = <3>; // gpio number ++ brcm,function = <0>; // 0 = input, 1 = output ++ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up ++ }; ++ }; ++ }; ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ button: button@0 { ++ compatible = "gpio-keys"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pin_state>; ++ status = "okay"; ++ ++ key: key { ++ linux,code = <116>; ++ gpios = <&gpio 3 1>; ++ label = "KEY_POWER"; ++ }; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ gpio = <&key>,"gpios:4", ++ <&button>,"reg:0", ++ <&pin_state>,"brcm,pins:0", ++ <&pin_state>,"reg:0"; ++ label = <&key>,"label"; ++ keycode = <&key>,"linux,code:0"; ++ gpio_pull = <&pin_state>,"brcm,pull:0"; ++ active_low = <&key>,"gpios:8"; ++ }; ++ ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts +@@ -0,0 +1,14 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ // Configure the gpio pin controller ++ target = <&gpio>; ++ __overlay__ { ++ interrupts; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts -@@ -0,0 +1,34 @@ +@@ -0,0 +1,36 @@ +// Definitions for gpio-poweroff module +/dts-v1/; +/plugin/; @@ -4296,9 +6129,94 @@ Signed-off-by: Khem Raj + gpiopin = <&power_ctrl>,"gpios:4", + <&power_ctrl_pins>,"brcm,pins:0"; + active_low = <&power_ctrl>,"gpios:8"; ++ input = <&power_ctrl>,"input?"; ++ export = <&power_ctrl>,"export?"; + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts +@@ -0,0 +1,80 @@ ++// Definitions for gpio-poweroff module ++/dts-v1/; ++/plugin/; ++ ++// This overlay sets up an input device that generates KEY_POWER events ++// when a given GPIO pin changes. It defaults to using GPIO3, which can ++// also be used to wake up (start) the Rpi again after shutdown. Since ++// wakeup is active-low, this defaults to active-low with a pullup ++// enabled, but all of this can be changed using overlay parameters (but ++// note that GPIO3 has an external pullup on at least some boards). ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ // Configure the gpio pin controller ++ target = <&gpio>; ++ __overlay__ { ++ // Define a pinctrl state, that sets up the gpio ++ // as an input with a pullup enabled. This does ++ // not take effect by itself, only when referenced ++ // by a "pinctrl client", as is done below. See: ++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt ++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt ++ pin_state: shutdown_button_pins { ++ brcm,pins = <3>; // gpio number ++ brcm,function = <0>; // 0 = input, 1 = output ++ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up ++ }; ++ }; ++ }; ++ fragment@1 { ++ // Add a new device to the /soc devicetree node ++ target-path = "/soc"; ++ __overlay__ { ++ shutdown_button { ++ // Let the gpio-keys driver handle this device. See: ++ // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt ++ compatible = "gpio-keys"; ++ ++ // Declare a single pinctrl state (referencing the one declared above) and name it ++ // default, so it is activated automatically. ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pin_state>; ++ ++ // Enable this device ++ status = "okay"; ++ ++ // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER ++ // (keycode 116, see ++ // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190) ++ button: shutdown { ++ label = "shutdown"; ++ linux,code = <116>; // KEY_POWER ++ gpios = <&gpio 3 1>; ++ }; ++ }; ++ }; ++ }; ++ ++ // This defines parameters that can be specified when loading ++ // the overlay. Each foo = line specifies one parameter, named ++ // foo. The rest of the specification gives properties where the ++ // parameter value is inserted into (changing the values above ++ // or adding new ones). ++ __overrides__ { ++ // Allow overriding the GPIO number. ++ gpio_pin = <&button>,"gpios:4", ++ <&pin_state>,"brcm,pins:0"; ++ ++ // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup ++ // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least ++ // on some boards). ++ gpio_pull = <&pin_state>,"brcm,pull:0"; ++ ++ // Allow setting the active_low flag. 0 = active high, 1 = active low ++ active_low = <&button>,"gpios:8"; ++ }; ++ ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts @@ -0,0 +1,39 @@ +// Definitions for HiFiBerry Amp/Amp+ @@ -4379,7 +6297,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -@@ -0,0 +1,56 @@ +@@ -0,0 +1,59 @@ +// Definitions for HiFiBerry DAC+ +/dts-v1/; +/plugin/; @@ -4416,6 +6334,9 @@ Signed-off-by: Khem Raj + compatible = "ti,pcm5122"; + reg = <0x4d>; + clocks = <&dacpro_osc>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -4438,7 +6359,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts -@@ -0,0 +1,39 @@ +@@ -0,0 +1,41 @@ +// Definitions for HiFiBerry Digi +/dts-v1/; +/plugin/; @@ -4464,6 +6385,8 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "wlf,wm8804"; + reg = <0x3b>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -4480,7 +6403,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts -@@ -0,0 +1,41 @@ +@@ -0,0 +1,43 @@ +// Definitions for HiFiBerry Digi Pro +/dts-v1/; +/plugin/; @@ -4506,6 +6429,8 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "wlf,wm8804"; + reg = <0x3b>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -4613,9 +6538,9 @@ Signed-off-by: Khem Raj + debug = <&hy28a>,"debug:0"; + xohms = <&hy28a_ts>,"ti,x-plate-ohms;0"; + resetgpio = <&hy28a>,"reset-gpios:4", -+ <&hy28a_pins>, "brcm,pins:1"; ++ <&hy28a_pins>, "brcm,pins:4"; + ledgpio = <&hy28a>,"led-gpios:4", -+ <&hy28a_pins>, "brcm,pins:2"; ++ <&hy28a_pins>, "brcm,pins:8"; + }; +}; --- /dev/null @@ -4764,9 +6689,9 @@ Signed-off-by: Khem Raj + debug = <&hy28b>,"debug:0"; + xohms = <&hy28b_ts>,"ti,x-plate-ohms;0"; + resetgpio = <&hy28b>,"reset-gpios:4", -+ <&hy28b_pins>, "brcm,pins:1"; ++ <&hy28b_pins>, "brcm,pins:4"; + ledgpio = <&hy28b>,"led-gpios:4", -+ <&hy28b_pins>, "brcm,pins:2"; ++ <&hy28b_pins>, "brcm,pins:8"; + }; +}; --- /dev/null @@ -4828,9 +6753,9 @@ Signed-off-by: Khem Raj + i2c_gpio_sda = <&i2c_gpio>,"gpios:4"; + i2c_gpio_scl = <&i2c_gpio>,"gpios:16"; + i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0"; ++ bus = <&i2c_gpio>, "reg:0"; + }; +}; -+ --- /dev/null +++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts @@ -0,0 +1,139 @@ @@ -5003,9 +6928,10 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null -+++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts -@@ -0,0 +1,83 @@ ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts +@@ -0,0 +1,183 @@ +// Definitions for several I2C based Real Time Clocks ++// Available through i2c-gpio +/dts-v1/; +/plugin/; + @@ -5013,8 +6939,23 @@ Signed-off-by: Khem Raj + compatible = "brcm,bcm2708"; + + fragment@0 { -+ target = <&i2c_arm>; ++ target-path = "/"; + __overlay__ { ++ i2c_gpio: i2c-gpio-rtc@0 { ++ compatible = "i2c-gpio"; ++ gpios = <&gpio 23 0 /* sda */ ++ &gpio 24 0 /* scl */ ++ >; ++ i2c-gpio,delay-us = <2>; /* ~100 kHz */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c_gpio>; ++ __dormant__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; @@ -5024,110 +6965,567 @@ Signed-off-by: Khem Raj + reg = <0x69>; + abracon,tc-diode = "standard"; + abracon,tc-resistor = <0>; -+ status = "disable"; ++ status = "okay"; + }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ + ds1307: ds1307@68 { + compatible = "maxim,ds1307"; + reg = <0x68>; -+ status = "disable"; ++ status = "okay"; + }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ + ds1339: ds1339@68 { + compatible = "dallas,ds1339"; + trickle-resistor-ohms = <0>; + reg = <0x68>; -+ status = "disable"; -+ }; -+ mcp7940x: mcp7940x@6f { -+ compatible = "microchip,mcp7940x"; -+ reg = <0x6f>; -+ status = "disable"; -+ }; -+ mcp7941x: mcp7941x@6f { -+ compatible = "microchip,mcp7941x"; -+ reg = <0x6f>; -+ status = "disable"; -+ }; -+ ds3231: ds3231@68 { -+ compatible = "maxim,ds3231"; -+ reg = <0x68>; -+ status = "disable"; -+ }; -+ pcf2127: pcf2127@51 { -+ compatible = "nxp,pcf2127"; -+ reg = <0x51>; -+ status = "disable"; -+ }; -+ pcf8523: pcf8523@68 { -+ compatible = "nxp,pcf8523"; -+ reg = <0x68>; -+ status = "disable"; -+ }; -+ pcf8563: pcf8563@51 { -+ compatible = "nxp,pcf8563"; -+ reg = <0x51>; -+ status = "disable"; ++ status = "okay"; + }; + }; + }; ++ ++ fragment@4 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ds3231: ds3231@68 { ++ compatible = "maxim,ds3231"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@5 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ mcp7940x: mcp7940x@6f { ++ compatible = "microchip,mcp7940x"; ++ reg = <0x6f>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@6 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ mcp7941x: mcp7941x@6f { ++ compatible = "microchip,mcp7941x"; ++ reg = <0x6f>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@7 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf2127: pcf2127@51 { ++ compatible = "nxp,pcf2127"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf8523: pcf8523@68 { ++ compatible = "nxp,pcf8523"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&i2c_gpio>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf8563: pcf8563@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ + __overrides__ { -+ abx80x = <&abx80x>,"status"; -+ ds1307 = <&ds1307>,"status"; -+ ds1339 = <&ds1339>,"status"; -+ ds3231 = <&ds3231>,"status"; -+ mcp7940x = <&mcp7940x>,"status"; -+ mcp7941x = <&mcp7941x>,"status"; -+ pcf2127 = <&pcf2127>,"status"; -+ pcf8523 = <&pcf8523>,"status"; -+ pcf8563 = <&pcf8563>,"status"; ++ abx80x = <0>,"+1"; ++ ds1307 = <0>,"+2"; ++ ds1339 = <0>,"+3"; ++ ds3231 = <0>,"+4"; ++ mcp7940x = <0>,"+5"; ++ mcp7941x = <0>,"+6"; ++ pcf2127 = <0>,"+7"; ++ pcf8523 = <0>,"+8"; ++ pcf8563 = <0>,"+9"; + trickle-diode-type = <&abx80x>,"abracon,tc-diode"; + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", + <&abx80x>,"abracon,tc-resistor"; + wakeup-source = <&ds1339>,"wakeup-source?", + <&ds3231>,"wakeup-source?", + <&mcp7940x>,"wakeup-source?", -+ <&mcp7941x>,"wakeup-source?"; ++ <&mcp7941x>,"wakeup-source?"; ++ i2c_gpio_sda = <&i2c_gpio>,"gpios:4"; ++ i2c_gpio_scl = <&i2c_gpio>,"gpios:16"; ++ i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0"; + }; +}; --- /dev/null -+++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts -@@ -0,0 +1,34 @@ -+// Definitions for a few digital barometric pressure and temperature sensors ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -0,0 +1,181 @@ ++// Definitions for several I2C based Real Time Clocks +/dts-v1/; +/plugin/; + +/ { -+ compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2708"; + -+ fragment@0 { -+ target = <&i2c_arm>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; ++ fragment@0 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; + -+ bmp085: bmp085@77 { -+ compatible = "bosch,bmp085"; -+ reg = <0x77>; -+ default-oversampling = <3>; -+ status = "disable"; -+ }; ++ abx80x: abx80x@69 { ++ compatible = "abracon,abx80x"; ++ reg = <0x69>; ++ abracon,tc-diode = "standard"; ++ abracon,tc-resistor = <0>; ++ status = "okay"; ++ }; ++ }; ++ }; + -+ bmp280: bmp280@76 { -+ compatible = "bosch,bmp280"; -+ reg = <0x76>; -+ status = "disable"; -+ }; -+ }; -+ }; ++ fragment@1 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ds1307: ds1307@68 { ++ compatible = "maxim,ds1307"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ds1339: ds1339@68 { ++ compatible = "dallas,ds1339"; ++ trickle-resistor-ohms = <0>; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ds3231: ds3231@68 { ++ compatible = "maxim,ds3231"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ mcp7940x: mcp7940x@6f { ++ compatible = "microchip,mcp7940x"; ++ reg = <0x6f>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@5 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ mcp7941x: mcp7941x@6f { ++ compatible = "microchip,mcp7941x"; ++ reg = <0x6f>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@6 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf2127: pcf2127@51 { ++ compatible = "nxp,pcf2127"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@7 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf8523: pcf8523@68 { ++ compatible = "nxp,pcf8523"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf8563: pcf8563@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ m41t62: m41t62@68 { ++ compatible = "st,m41t62"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; + + __overrides__ { -+ bmp085 = <&bmp085>,"status"; -+ bmp280 = <&bmp280>,"status"; ++ abx80x = <0>,"+0"; ++ ds1307 = <0>,"+1"; ++ ds1339 = <0>,"+2"; ++ ds3231 = <0>,"+3"; ++ mcp7940x = <0>,"+4"; ++ mcp7941x = <0>,"+5"; ++ pcf2127 = <0>,"+6"; ++ pcf8523 = <0>,"+7"; ++ pcf8563 = <0>,"+8"; ++ m41t62 = <0>,"+9"; ++ trickle-diode-type = <&abx80x>,"abracon,tc-diode"; ++ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", ++ <&abx80x>,"abracon,tc-resistor"; ++ wakeup-source = <&ds1339>,"wakeup-source?", ++ <&ds3231>,"wakeup-source?", ++ <&mcp7940x>,"wakeup-source?", ++ <&mcp7941x>,"wakeup-source?", ++ <&m41t62>,"wakeup-source?"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts +@@ -0,0 +1,223 @@ ++// Definitions for I2C based sensors using the Industrial IO or HWMON interface. ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ bme280: bme280@76 { ++ compatible = "bosch,bme280"; ++ reg = <0x76>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ bmp085: bmp085@77 { ++ compatible = "bosch,bmp085"; ++ reg = <0x77>; ++ default-oversampling = <3>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ bmp180: bmp180@77 { ++ compatible = "bosch,bmp180"; ++ reg = <0x77>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ bmp280: bmp280@76 { ++ compatible = "bosch,bmp280"; ++ reg = <0x76>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ htu21: htu21@40 { ++ compatible = "htu21"; ++ reg = <0x40>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@5 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ lm75: lm75@4f { ++ compatible = "lm75"; ++ reg = <0x4f>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@6 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ si7020: si7020@40 { ++ compatible = "si7020"; ++ reg = <0x40>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@7 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ tmp102: tmp102@48 { ++ compatible = "ti,tmp102"; ++ reg = <0x48>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ hdc100x: hdc100x@40 { ++ compatible = "hdc100x"; ++ reg = <0x40>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ tsl4531: tsl4531@29 { ++ compatible = "tsl4531"; ++ reg = <0x29>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@10 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ veml6070: veml6070@38 { ++ compatible = "veml6070"; ++ reg = <0x38>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@11 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ sht3x: sht3x@44 { ++ compatible = "sht3x"; ++ reg = <0x44>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@12 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ds1621: ds1621@48 { ++ compatible = "ds1621"; ++ reg = <0x48>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0", ++ <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0", ++ <&ds1621>,"reg:0"; ++ bme280 = <0>,"+0"; ++ bmp085 = <0>,"+1"; ++ bmp180 = <0>,"+2"; ++ bmp280 = <0>,"+3"; ++ htu21 = <0>,"+4"; ++ lm75 = <0>,"+5"; ++ lm75addr = <&lm75>,"reg:0"; ++ si7020 = <0>,"+6"; ++ tmp102 = <0>,"+7"; ++ hdc100x = <0>,"+8"; ++ tsl4531 = <0>,"+9"; ++ veml6070 = <0>,"+10"; ++ sht3x = <0>,"+11"; ++ ds1621 = <0>,"+12"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts -@@ -0,0 +1,61 @@ +@@ -0,0 +1,69 @@ +/* + * Device tree overlay for i2c_bcm2708, i2c0 bus + * @@ -5180,6 +7578,13 @@ Signed-off-by: Khem Raj + }; + }; + ++ fragment@5 { ++ target = <&i2c0>; ++ __dormant__ { ++ compatible = "brcm,bcm2708-i2c"; ++ }; ++ }; ++ + __overrides__ { + sda0_pin = <&frag1>,"brcm,pins:0"; + scl0_pin = <&frag1>,"brcm,pins:4"; @@ -5187,11 +7592,12 @@ Signed-off-by: Khem Raj + pins_28_29 = <0>,"-1+2-3-4"; + pins_44_45 = <0>,"-1-2+3-4"; + pins_46_47 = <0>,"-1-2-3+4"; ++ combine = <0>, "!5"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts -@@ -0,0 +1,37 @@ +@@ -0,0 +1,43 @@ +/* + * Device tree overlay for i2c_bcm2708, i2c1 bus + * @@ -5214,19 +7620,25 @@ Signed-off-by: Khem Raj + }; + + fragment@1 { -+ target = <&gpio>; -+ __overlay__ { -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; /* alt0 */ -+ }; ++ target = <&i2c1_pins>; ++ pins: __overlay__ { ++ brcm,pins = <2 3>; ++ brcm,function = <4>; /* alt 0 */ ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __dormant__ { ++ compatible = "brcm,bcm2708-i2c"; + }; + }; + + __overrides__ { -+ sda1_pin = <&i2c1_pins>,"brcm,pins:0"; -+ scl1_pin = <&i2c1_pins>,"brcm,pins:4"; -+ pin_func = <&i2c1_pins>,"brcm,function:0"; ++ sda1_pin = <&pins>,"brcm,pins:0"; ++ scl1_pin = <&pins>,"brcm,pins:4"; ++ pin_func = <&pins>,"brcm,function:0"; ++ combine = <0>, "!2"; + }; +}; --- /dev/null @@ -5252,7 +7664,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts -@@ -0,0 +1,43 @@ +@@ -0,0 +1,46 @@ +// Definitions for IQaudIO DAC +/dts-v1/; +/plugin/; @@ -5278,6 +7690,9 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "ti,pcm5122"; + reg = <0x4c>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -5298,7 +7713,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts -@@ -0,0 +1,46 @@ +@@ -0,0 +1,49 @@ +// Definitions for IQaudIO DAC+ +/dts-v1/; +/plugin/; @@ -5324,6 +7739,9 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "ti,pcm5122"; + reg = <0x4c>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -5374,8 +7792,8 @@ Signed-off-by: Khem Raj + compatible = "wlf,wm8804"; + reg = <0x3b>; + status = "okay"; -+ // DVDD-supply = <®_3v3>; -+ // PVDD-supply = <®_3v3>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ PVDD-supply = <&vdd_3v3_reg>; + }; + }; + }; @@ -5396,8 +7814,320 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts +@@ -0,0 +1,309 @@ ++// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80) ++ ++// dtparams: ++// flash-spi- - Enables flash device on SPI, CS#. ++// flash-fastr-spi- - Enables flash device with fast read capability on SPI, CS#. ++// ++// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. ++// ++// Example: A single flash device with fast read capability on SPI0, CS#0: ++// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0 ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ // disable spi-dev on spi0.0 ++ fragment@0 { ++ target = <&spidev0>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi0.1 ++ fragment@1 { ++ target = <&spidev1>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi1.0 ++ fragment@2 { ++ target-path = "spi1/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi1.1 ++ fragment@3 { ++ target-path = "spi1/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi1.2 ++ fragment@4 { ++ target-path = "spi1/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi2.0 ++ fragment@5 { ++ target-path = "spi2/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi2.1 ++ fragment@6 { ++ target-path = "spi2/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // disable spi-dev on spi2.2 ++ fragment@7 { ++ target-path = "spi2/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ // enable flash on spi0.0 ++ fragment@8 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_00: spi_nor@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi0.1 ++ fragment@9 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_01: spi_nor@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi1.0 ++ fragment@10 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_10: spi_nor@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi1.1 ++ fragment@11 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_11: spi_nor@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi1.2 ++ fragment@12 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_12: spi_nor@2 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <2>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi2.0 ++ fragment@13 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_20: spi_nor@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi2.1 ++ fragment@14 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_21: spi_nor@1 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // enable flash on spi2.2 ++ fragment@15 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi_nor_22: spi_nor@2 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <2>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ // Enable fast read for device on spi0.0. ++ // Use default active low interrupt signalling. ++ fragment@16 { ++ target = <&spi_nor_00>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi0.1. ++ // Use default active low interrupt signalling. ++ fragment@17 { ++ target = <&spi_nor_01>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi1.0. ++ // Use default active low interrupt signalling. ++ fragment@18 { ++ target = <&spi_nor_10>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi1.1. ++ // Use default active low interrupt signalling. ++ fragment@19 { ++ target = <&spi_nor_11>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi1.2. ++ // Use default active low interrupt signalling. ++ fragment@20 { ++ target = <&spi_nor_12>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi2.0. ++ // Use default active low interrupt signalling. ++ fragment@21 { ++ target = <&spi_nor_20>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi2.1. ++ // Use default active low interrupt signalling. ++ fragment@22 { ++ target = <&spi_nor_21>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ // Enable fast read for device on spi2.2. ++ // Use default active low interrupt signalling. ++ fragment@23 { ++ target = <&spi_nor_22>; ++ __dormant__ { ++ m25p,fast-read; ++ }; ++ }; ++ ++ __overrides__ { ++ flash-spi0-0 = <0>,"+0+8"; ++ flash-spi0-1 = <0>,"+1+9"; ++ flash-spi1-0 = <0>,"+2+10"; ++ flash-spi1-1 = <0>,"+3+11"; ++ flash-spi1-2 = <0>,"+4+12"; ++ flash-spi2-0 = <0>,"+5+13"; ++ flash-spi2-1 = <0>,"+6+14"; ++ flash-spi2-2 = <0>,"+7+15"; ++ flash-fastr-spi0-0 = <0>,"+0+8+16"; ++ flash-fastr-spi0-1 = <0>,"+1+9+17"; ++ flash-fastr-spi1-0 = <0>,"+2+10+18"; ++ flash-fastr-spi1-1 = <0>,"+3+11+19"; ++ flash-fastr-spi1-2 = <0>,"+4+12+20"; ++ flash-fastr-spi2-0 = <0>,"+5+13+21"; ++ flash-fastr-spi2-1 = <0>,"+6+14+22"; ++ flash-fastr-spi2-2 = <0>,"+7+15+23"; ++ }; ++}; ++ +--- /dev/null +++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts -@@ -0,0 +1,43 @@ +@@ -0,0 +1,46 @@ +// Definitions for JustBoom DAC +/dts-v1/; +/plugin/; @@ -5423,6 +8153,9 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "ti,pcm5122"; + reg = <0x4d>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -5443,7 +8176,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts -@@ -0,0 +1,39 @@ +@@ -0,0 +1,41 @@ +// Definitions for JustBoom Digi +/dts-v1/; +/plugin/; @@ -5469,6 +8202,8 @@ Signed-off-by: Khem Raj + #sound-dai-cells = <0>; + compatible = "wlf,wm8804"; + reg = <0x3b>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + }; @@ -5544,6 +8279,162 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts +@@ -0,0 +1,86 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ltc2941: ltc2941@64 { ++ compatible = "lltc,ltc2941"; ++ reg = <0x64>; ++ lltc,resistor-sense = <50>; ++ lltc,prescaler-exponent = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ltc2942: ltc2942@64 { ++ compatible = "lltc,ltc2942"; ++ reg = <0x64>; ++ lltc,resistor-sense = <50>; ++ lltc,prescaler-exponent = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ltc2943: ltc2943@64 { ++ compatible = "lltc,ltc2943"; ++ reg = <0x64>; ++ lltc,resistor-sense = <50>; ++ lltc,prescaler-exponent = <7>; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ltc2944: ltc2944@64 { ++ compatible = "lltc,ltc2944"; ++ reg = <0x64>; ++ lltc,resistor-sense = <50>; ++ lltc,prescaler-exponent = <7>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ ltc2941 = <0>,"+0"; ++ ltc2942 = <0>,"+1"; ++ ltc2943 = <0>,"+2"; ++ ltc2944 = <0>,"+3"; ++ resistor-sense = <<c2941>, "lltc,resistor-sense:0", ++ <<c2942>, "lltc,resistor-sense:0", ++ <<c2943>, "lltc,resistor-sense:0", ++ <<c2944>, "lltc,resistor-sense:0"; ++ prescaler-exponent = <<c2941>, "lltc,prescaler-exponent:0", ++ <<c2942>, "lltc,prescaler-exponent:0", ++ <<c2943>, "lltc,prescaler-exponent:0", ++ <<c2944>, "lltc,prescaler-exponent:0"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts +@@ -0,0 +1,64 @@ ++// Definitions for mbed DAC ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ tlv320aic23: codec@1a { ++ #sound-dai-cells = <0>; ++ reg = <0x1a>; ++ compatible = "ti,tlv320aic23"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "simple-audio-card"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ ++ simple-audio-card,name = "mbed-DAC"; ++ ++ simple-audio-card,widgets = ++ "Microphone", "Mic Jack", ++ "Line", "Line In", ++ "Headphone", "Headphone Jack"; ++ ++ simple-audio-card,routing = ++ "Headphone Jack", "LHPOUT", ++ "Headphone Jack", "RHPOUT", ++ "LLINEIN", "Line In", ++ "RLINEIN", "Line In", ++ "MICIN", "Mic Jack"; ++ ++ simple-audio-card,format = "i2s"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ ++ sound_master: simple-audio-card,codec { ++ sound-dai = <&tlv320aic23>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts @@ -0,0 +1,54 @@ +// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor @@ -6400,7 +9291,7 @@ Signed-off-by: Khem Raj + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <10000000>; + interrupt-parent = <&gpio>; -+ interrupts = <25 0x2>; ++ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */ + clocks = <&can0_osc>; + }; + }; @@ -6476,7 +9367,7 @@ Signed-off-by: Khem Raj + pinctrl-0 = <&can1_pins>; + spi-max-frequency = <10000000>; + interrupt-parent = <&gpio>; -+ interrupts = <25 0x2>; ++ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */ + clocks = <&can1_osc>; + }; + }; @@ -6488,6 +9379,559 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts +@@ -0,0 +1,205 @@ ++/* ++ * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spidev0>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev1>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "spi1/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "spi1/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "spi1/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@5 { ++ target-path = "spi2/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@6 { ++ target-path = "spi2/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@7 { ++ target-path = "spi2/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_00: mcp3008@0 { ++ compatible = "mcp3008"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_01: mcp3008@1 { ++ compatible = "mcp3008"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@10 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_10: mcp3008@0 { ++ compatible = "mcp3008"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@11 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_11: mcp3008@1 { ++ compatible = "mcp3008"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@12 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_12: mcp3008@2 { ++ compatible = "mcp3008"; ++ reg = <2>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@13 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_20: mcp3008@0 { ++ compatible = "mcp3008"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@14 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_21: mcp3008@1 { ++ compatible = "mcp3008"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@15 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3008_22: mcp3008@2 { ++ compatible = "mcp3008"; ++ reg = <2>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ spi0-0-present = <0>, "+0+8"; ++ spi0-1-present = <0>, "+1+9"; ++ spi1-0-present = <0>, "+2+10"; ++ spi1-1-present = <0>, "+3+11"; ++ spi1-2-present = <0>, "+4+12"; ++ spi2-0-present = <0>, "+5+13"; ++ spi2-1-present = <0>, "+6+14"; ++ spi2-2-present = <0>, "+7+15"; ++ spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0"; ++ spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0"; ++ spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0"; ++ spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0"; ++ spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0"; ++ spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0"; ++ spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0"; ++ spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts +@@ -0,0 +1,205 @@ ++/* ++ * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spidev0>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev1>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "spi1/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "spi1/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "spi1/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@5 { ++ target-path = "spi2/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@6 { ++ target-path = "spi2/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@7 { ++ target-path = "spi2/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_00: mcp3202@0 { ++ compatible = "mcp3202"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_01: mcp3202@1 { ++ compatible = "mcp3202"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@10 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_10: mcp3202@0 { ++ compatible = "mcp3202"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@11 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_11: mcp3202@1 { ++ compatible = "mcp3202"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@12 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_12: mcp3202@2 { ++ compatible = "mcp3202"; ++ reg = <2>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@13 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_20: mcp3202@0 { ++ compatible = "mcp3202"; ++ reg = <0>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@14 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_21: mcp3202@1 { ++ compatible = "mcp3202"; ++ reg = <1>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ fragment@15 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mcp3202_22: mcp3202@2 { ++ compatible = "mcp3202"; ++ reg = <2>; ++ spi-max-frequency = <1600000>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ spi0-0-present = <0>, "+0+8"; ++ spi0-1-present = <0>, "+1+9"; ++ spi1-0-present = <0>, "+2+10"; ++ spi1-1-present = <0>, "+3+11"; ++ spi1-2-present = <0>, "+4+12"; ++ spi2-0-present = <0>, "+5+13"; ++ spi2-1-present = <0>, "+6+14"; ++ spi2-2-present = <0>, "+7+15"; ++ spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0"; ++ spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0"; ++ spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0"; ++ spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0"; ++ spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0"; ++ spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0"; ++ spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0"; ++ spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts +@@ -0,0 +1,134 @@ ++/* ++ * Device Tree overlay for Media Center HAT by Pi Supply ++ * ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ ++ spidev@0{ ++ status = "disabled"; ++ }; ++ ++ spidev@1{ ++ status = "disabled"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ rpi_display_pins: rpi_display_pins { ++ brcm,pins = <12 23 24 25>; ++ brcm,function = <1 1 1 0>; /* out out out in */ ++ brcm,pull = <0 0 0 2>; /* - - - up */ ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rpidisplay: rpi-display@0{ ++ compatible = "ilitek,ili9341"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rpi_display_pins>; ++ ++ spi-max-frequency = <32000000>; ++ rotate = <90>; ++ bgr; ++ fps = <30>; ++ buswidth = <8>; ++ reset-gpios = <&gpio 23 0>; ++ dc-gpios = <&gpio 24 0>; ++ led-gpios = <&gpio 12 1>; ++ debug = <0>; ++ }; ++ ++ rpidisplay_ts: rpi-display-ts@1 { ++ compatible = "ti,ads7846"; ++ reg = <1>; ++ ++ spi-max-frequency = <2000000>; ++ interrupts = <25 2>; /* high-to-low edge triggered */ ++ interrupt-parent = <&gpio>; ++ pendown-gpio = <&gpio 25 0>; ++ ti,x-plate-ohms = /bits/ 16 <60>; ++ ti,pressure-max = /bits/ 16 <255>; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "/"; ++ __overlay__ { ++ lirc_rpi: lirc_rpi { ++ compatible = "rpi,lirc-rpi"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&lirc_pins>; ++ status = "okay"; ++ ++ // Override autodetection of IR receiver circuit ++ // (0 = active high, 1 = active low, -1 = no override ) ++ rpi,sense = <0xffffffff>; ++ ++ // Software carrier ++ // (0 = off, 1 = on) ++ rpi,softcarrier = <1>; ++ ++ // Invert output ++ // (0 = off, 1 = on) ++ rpi,invert = <0>; ++ ++ // Enable debugging messages ++ // (0 = off, 1 = on) ++ rpi,debug = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&gpio>; ++ __overlay__ { ++ lirc_pins: lirc_pins { ++ brcm,pins = <6 5>; ++ brcm,function = <1 0>; // out in ++ brcm,pull = <0 1>; // off down ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ speed = <&rpidisplay>,"spi-max-frequency:0"; ++ rotate = <&rpidisplay>,"rotate:0"; ++ fps = <&rpidisplay>,"fps:0"; ++ debug = <&rpidisplay>,"debug:0", ++ <&lirc_rpi>,"rpi,debug:0"; ++ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0"; ++ swapxy = <&rpidisplay_ts>,"ti,swap-xy?"; ++ backlight = <&rpidisplay>,"led-gpios:4", ++ <&rpi_display_pins>,"brcm,pins:0"; ++ ++ gpio_out_pin = <&lirc_pins>,"brcm,pins:0"; ++ gpio_in_pin = <&lirc_pins>,"brcm,pins:4"; ++ gpio_in_pull = <&lirc_pins>,"brcm,pull:4"; ++ ++ sense = <&lirc_rpi>,"rpi,sense:0"; ++ softcarrier = <&lirc_rpi>,"rpi,softcarrier:0"; ++ invert = <&lirc_rpi>,"rpi,invert:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts @@ -0,0 +1,36 @@ +/dts-v1/; @@ -6527,8 +9971,54 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts +@@ -0,0 +1,43 @@ ++/dts-v1/; ++/plugin/; ++ ++#include ++ ++/* ++ * Fake a higher clock rate to get a larger divisor, and thereby a lower ++ * baudrate. The real clock is 48MHz, which we scale so that requesting ++ * 38.4kHz results in an actual 31.25kHz. ++ * ++ * 48000000*38400/31250 = 58982400 ++ */ ++ ++/{ ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target-path = "/clocks"; ++ __overlay__ { ++ midi_clk: clock@5 { ++ compatible = "fixed-factor-clock"; ++ #clock-cells = <0>; ++ clocks = <&aux BCM2835_AUX_CLOCK_UART>; ++ clock-mult = <38400>; ++ clock-div = <31250>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart1>; ++ __overlay__ { ++ clocks = <&midi_clk>; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&aux>; ++ __overlay__ { ++ clock-output-names = "aux_uart", "aux_spi1", "aux_spi2"; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts -@@ -0,0 +1,38 @@ +@@ -0,0 +1,39 @@ +/dts-v1/; +/plugin/; + @@ -6552,6 +10042,7 @@ Signed-off-by: Khem Raj + mmc_pins: mmc_pins { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = <7>; /* alt3 */ ++ brcm,pull = <0 2 2 2 2 2>; + }; + }; + }; @@ -6568,6 +10059,37 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts +@@ -0,0 +1,28 @@ ++// Definitions for MPU6050 ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ clock-frequency = <400000>; ++ ++ mpu6050: mpu6050@68 { ++ compatible = "invensense,mpu6050"; ++ reg = <0x68>; ++ interrupt-parent = <&gpio>; ++ interrupts = <4 1>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ interrupt = <&mpu6050>,"interrupts:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts @@ -0,0 +1,117 @@ +/* @@ -6688,6 +10210,98 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts +@@ -0,0 +1,89 @@ ++/* PaPiRus ePaper Screen by Pi Supply */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_arm>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ display_temp: lm75@48 { ++ compatible = "lm75b"; ++ reg = <0x48>; ++ status = "okay"; ++ #thermal-sensor-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ thermal-zones { ++ display { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&display_temp>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ ++ spidev@0{ ++ status = "disabled"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&gpio>; ++ __overlay__ { ++ repaper_pins: repaper_pins { ++ brcm,pins = <14 15 23 24 25>; ++ brcm,function = <1 1 1 1 0>; /* out out out out in */ ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ repaper: repaper@0{ ++ compatible = "not_set"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&repaper_pins>; ++ ++ spi-max-frequency = <8000000>; ++ ++ panel-on-gpios = <&gpio 23 0>; ++ border-gpios = <&gpio 14 0>; ++ discharge-gpios = <&gpio 15 0>; ++ reset-gpios = <&gpio 24 0>; ++ busy-gpios = <&gpio 25 0>; ++ ++ repaper-thermal-zone = "display"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ panel = <&repaper>, "compatible"; ++ speed = <&repaper>, "spi-max-frequency:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts @@ -0,0 +1,27 @@ +/dts-v1/; @@ -6767,8 +10381,24 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts +@@ -0,0 +1,13 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&mmc>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts -@@ -0,0 +1,64 @@ +@@ -0,0 +1,74 @@ +/dts-v1/; +/plugin/; + @@ -6802,7 +10432,7 @@ Signed-off-by: Khem Raj + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins &bt_pins>; ++ pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>; + status = "okay"; + }; + }; @@ -6826,6 +10456,16 @@ Signed-off-by: Khem Raj + }; + + fragment@4 { ++ target = <&gpio>; ++ __overlay__ { ++ fake_bt_cts: fake_bt_cts { ++ brcm,pins = <31>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ }; ++ ++ fragment@5 { + target-path = "/aliases"; + __overlay__ { + serial0 = "/soc/serial@7e201000"; @@ -6834,6 +10474,90 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts +@@ -0,0 +1,81 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ codec_out: spdif-transmitter { ++ #address-cells = <0>; ++ #size-cells = <0>; ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dit"; ++ status = "okay"; ++ }; ++ ++ codec_in: card-codec { ++ #sound-dai-cells = <0>; ++ compatible = "invensense,ics43432"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ snd: __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "PiBell"; ++ ++ status="okay"; ++ ++ capture_link: simple-audio-card,dai-link@0 { ++ format = "i2s"; ++ ++ r_cpu_dai: cpu { ++ sound-dai = <&i2s>; ++ ++/* example TDM slot configuration ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++*/ ++ }; ++ ++ r_codec_dai: codec { ++ sound-dai = <&codec_in>; ++ }; ++ }; ++ ++ playback_link: simple-audio-card,dai-link@1 { ++ format = "i2s"; ++ ++ p_cpu_dai: cpu { ++ sound-dai = <&i2s>; ++ ++/* example TDM slot configuration ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++*/ ++ }; ++ ++ p_codec_dai: codec { ++ sound-dai = <&codec_out>; ++ }; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ alsaname = <&snd>, "simple-audio-card,name"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts @@ -0,0 +1,102 @@ +/* @@ -7049,10 +10773,10 @@ Signed-off-by: Khem Raj + --- /dev/null +++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts -@@ -0,0 +1,114 @@ +@@ -0,0 +1,120 @@ +/* -+ * pisound Linux kernel module. -+ * Copyright (C) 2016 Vilniaus Blokas UAB, http://blokas.io/pisound ++ * Pisound Linux kernel module. ++ * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License @@ -7078,6 +10802,54 @@ Signed-off-by: Khem Raj + compatible = "brcm,bcm2708"; + + fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&spi0>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pisound_spi: pisound_spi@0{ ++ compatible = "blokaslabs,pisound-spi"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>; ++ spi-max-frequency = <1000000>; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "/"; ++ __overlay__ { ++ pcm5102a-codec { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5102a"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@5 { + target = <&sound>; + __overlay__ { + compatible = "blokaslabs,pisound"; @@ -7101,7 +10873,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@1 { ++ fragment@6 { + target = <&gpio>; + __overlay__ { + pinctrl-names = "default"; @@ -7115,54 +10887,12 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@2 { ++ fragment@7 { + target = <&i2s>; + __overlay__ { + status = "okay"; + }; + }; -+ -+ fragment@3 { -+ target-path = "/"; -+ __overlay__ { -+ pcm5102a-codec { -+ #sound-dai-cells = <0>; -+ compatible = "ti,pcm5102a"; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&spi0>; -+ __overlay__ { -+ status = "okay"; -+ -+ spidev@0{ -+ status = "disabled"; -+ }; -+ -+ spidev@1{ -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@5 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ pisound_spi: pisound_spi@0{ -+ compatible = "blokaslabs,pisound-spi"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts @@ -7580,7 +11310,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts -@@ -0,0 +1,35 @@ +@@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + @@ -7589,7 +11319,7 @@ Signed-off-by: Khem Raj + fragment@0 { + target-path = "/"; + __overlay__ { -+ pps: pps { ++ pps: pps@12 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; @@ -7602,7 +11332,7 @@ Signed-off-by: Khem Raj + fragment@1 { + target = <&gpio>; + __overlay__ { -+ pps_pins: pps_pins { ++ pps_pins: pps_pins@12 { + brcm,pins = <18>; + brcm,function = <0>; // in + brcm,pull = <0>; // off @@ -7612,8 +11342,11 @@ Signed-off-by: Khem Raj + + __overrides__ { + gpiopin = <&pps>,"gpios:4", -+ <&pps_pins>,"brcm,pins:0"; ++ <&pps>,"reg:0", ++ <&pps_pins>,"brcm,pins:0", ++ <&pps_pins>,"reg:0"; + assert_falling_edge = <&pps>,"assert-falling-edge?"; ++ capture_clear = <&pps>,"capture-clear?"; + }; +}; --- /dev/null @@ -7667,6 +11400,49 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts +@@ -0,0 +1,40 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&gpio>; ++ __overlay__ { ++ pwm0_pins: pwm0_pins { ++ brcm,pins = <18>; ++ brcm,function = <2>; /* Alt5 */ ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&pwm>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm0_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ pwm-ir-transmitter { ++ compatible = "pwm-ir-tx"; ++ pwms = <&pwm 0 100>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ gpio_pin = <&pwm0_pins>, "brcm,pins:0"; ++ func = <&pwm0_pins>,"brcm,function:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts @@ -0,0 +1,43 @@ +/dts-v1/; @@ -7768,9 +11544,9 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null -+++ b/arch/arm/boot/dts/overlays/raspidac3-overlay.dts -@@ -0,0 +1,45 @@ -+// Definitions for RaspiDACv3 ++++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts +@@ -0,0 +1,59 @@ ++// Device tree overlay for GPIO connected rotary encoder. +/dts-v1/; +/plugin/; + @@ -7778,41 +11554,55 @@ Signed-off-by: Khem Raj + compatible = "brcm,bcm2708"; + + fragment@0 { -+ target = <&i2s>; ++ target = <&gpio>; + __overlay__ { -+ status = "okay"; ++ rotary_pins: rotary_pins@4 { ++ brcm,pins = <4 17>; /* gpio 4 17 */ ++ brcm,function = <0 0>; /* input */ ++ brcm,pull = <2 2>; /* pull-up */ ++ }; ++ + }; + }; + + fragment@1 { -+ target = <&i2c1>; ++ target-path = "/"; + __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pcm5122@4c { -+ #sound-dai-cells = <0>; -+ compatible = "ti,pcm5122"; -+ reg = <0x4c>; -+ status = "okay"; -+ }; -+ -+ tpa6130a2: tpa6130a2@60 { -+ compatible = "ti,tpa6130a2"; -+ reg = <0x60>; ++ rotary: rotary@4 { ++ compatible = "rotary-encoder"; + status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rotary_pins>; ++ gpios = <&gpio 4 0>, <&gpio 17 0>; ++ linux,axis = <0>; /* REL_X */ ++ rotary-encoder,encoding = "gray"; ++ rotary-encoder,steps = <24>; /* 24 default */ ++ rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */ + }; + }; -+ }; + -+ fragment@2 { -+ target = <&sound>; -+ __overlay__ { -+ compatible = "jg,raspidacv3"; -+ i2s-controller = <&i2s>; -+ status = "okay"; -+ }; ++ }; ++ ++ __overrides__ { ++ pin_a = <&rotary>,"gpios:4", ++ <&rotary_pins>,"brcm,pins:0", ++ /* modify reg values to allow multiple instantiation */ ++ <&rotary>,"reg:0", ++ <&rotary_pins>,"reg:0"; ++ pin_b = <&rotary>,"gpios:16", ++ <&rotary_pins>,"brcm,pins:4"; ++ relative_axis = <&rotary>,"rotary-encoder,relative-axis?"; ++ linux_axis = <&rotary>,"linux,axis:0"; ++ rollover = <&rotary>,"rotary-encoder,rollover?"; ++ steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0"; ++ steps = <&rotary>,"rotary-encoder,steps:0"; ++ wakeup = <&rotary>,"wakeup-source?"; ++ encoding = <&rotary>,"rotary-encoder,encoding"; ++ /* legacy parameters*/ ++ rotary0_pin_a = <&rotary>,"gpios:4", ++ <&rotary_pins>,"brcm,pins:0"; ++ rotary0_pin_b = <&rotary>,"gpios:16", ++ <&rotary_pins>,"brcm,pins:4"; + }; +}; --- /dev/null @@ -7840,6 +11630,155 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts +@@ -0,0 +1,146 @@ ++// Definitions for the Cirrus Logic Audio Card ++/dts-v1/; ++/plugin/; ++#include ++#include ++#include ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ wlf_pins: wlf_pins { ++ brcm,pins = <17 22 27 8>; ++ brcm,function = < ++ BCM2835_FSEL_GPIO_OUT ++ BCM2835_FSEL_GPIO_OUT ++ BCM2835_FSEL_GPIO_IN ++ BCM2835_FSEL_GPIO_OUT ++ >; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "RPi-Cirrus 1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&spi0>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ spidev@0{ ++ status = "disabled"; ++ }; ++ ++ spidev@1{ ++ status = "disabled"; ++ }; ++ ++ wm5102@1{ ++ compatible = "wlf,wm5102"; ++ reg = <1>; ++ ++ spi-max-frequency = <500000>; ++ ++ interrupt-parent = <&gpio>; ++ interrupts = <27 8>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ LDOVDD-supply = <&rpi_cirrus_reg_1v8>; ++ AVDD-supply = <&rpi_cirrus_reg_1v8>; ++ DBVDD1-supply = <&rpi_cirrus_reg_1v8>; ++ DBVDD2-supply = <&vdd_3v3_reg>; ++ DBVDD3-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&rpi_cirrus_reg_1v8>; ++ SPKVDDL-supply = <&vdd_5v0_reg>; ++ SPKVDDR-supply = <&vdd_5v0_reg>; ++ DCVDD-supply = <&arizona_ldo1>; ++ ++ wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>; ++ wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>; ++ wlf,gpio-defaults = < ++ ARIZONA_GP_DEFAULT ++ ARIZONA_GP_DEFAULT ++ ARIZONA_GP_DEFAULT ++ ARIZONA_GP_DEFAULT ++ ARIZONA_GP_DEFAULT ++ >; ++ wlf,micd-configs = <0 1 0>; ++ wlf,dmic-ref = < ++ ARIZONA_DMIC_MICVDD ++ ARIZONA_DMIC_MICBIAS2 ++ ARIZONA_DMIC_MICVDD ++ ARIZONA_DMIC_MICVDD ++ >; ++ wlf,inmode = < ++ ARIZONA_INMODE_DIFF ++ ARIZONA_INMODE_DMIC ++ ARIZONA_INMODE_SE ++ ARIZONA_INMODE_DIFF ++ >; ++ status = "okay"; ++ ++ arizona_ldo1: ldo1 { ++ regulator-name = "LDO1"; ++ // default constraints as in ++ // arizona-ldo1.c ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1800000>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&i2c1>; ++ __overlay__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ wm8804@3b { ++ compatible = "wlf,wm8804"; ++ reg = <0x3b>; ++ status = "okay"; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ }; ++ ++ fragment@5 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "wlf,rpi-cirrus"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts @@ -0,0 +1,34 @@ +// Definitions for RPi DAC @@ -7878,7 +11817,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts -@@ -0,0 +1,89 @@ +@@ -0,0 +1,91 @@ +/* + * Device Tree overlay for rpi-display by Watterott + * @@ -7960,17 +11899,19 @@ Signed-off-by: Khem Raj + }; + }; + __overrides__ { -+ speed = <&rpidisplay>,"spi-max-frequency:0"; -+ rotate = <&rpidisplay>,"rotate:0"; -+ fps = <&rpidisplay>,"fps:0"; -+ debug = <&rpidisplay>,"debug:0"; -+ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0"; -+ swapxy = <&rpidisplay_ts>,"ti,swap-xy?"; ++ speed = <&rpidisplay>,"spi-max-frequency:0"; ++ rotate = <&rpidisplay>,"rotate:0"; ++ fps = <&rpidisplay>,"fps:0"; ++ debug = <&rpidisplay>,"debug:0"; ++ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0"; ++ swapxy = <&rpidisplay_ts>,"ti,swap-xy?"; ++ backlight = <&rpidisplay>,"led-gpios:4", ++ <&rpi_display_pins>,"brcm,pins:0"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts -@@ -0,0 +1,17 @@ +@@ -0,0 +1,30 @@ +/dts-v1/; +/plugin/; + @@ -7984,9 +11925,22 @@ Signed-off-by: Khem Raj + compatible = "rpi,rpi-ft5406"; + firmware = <&firmware>; + status = "okay"; ++ touchscreen-size-x = <800>; ++ touchscreen-size-y = <480>; ++ touchscreen-inverted-x = <0>; ++ touchscreen-inverted-y = <0>; ++ touchscreen-swapped-x-y = <0>; + }; + }; + }; ++ ++ __overrides__ { ++ touchscreen-size-x = <&rpi_ft5406>,"touchscreen-size-x:0"; ++ touchscreen-size-y = <&rpi_ft5406>,"touchscreen-size-y:0"; ++ touchscreen-inverted-x = <&rpi_ft5406>,"touchscreen-inverted-x:0"; ++ touchscreen-inverted-y = <&rpi_ft5406>,"touchscreen-inverted-y:0"; ++ touchscreen-swapped-x-y = <&rpi_ft5406>,"touchscreen-swapped-x-y:0"; ++ }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts @@ -8081,8 +12035,42 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts +@@ -0,0 +1,31 @@ ++// rpi-tv HAT ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ spidev@0 { ++ status = "disabled"; ++ }; ++ ++ cxd2880@0 { ++ compatible = "sony,cxd2880"; ++ reg = <0>; /* CE0 */ ++ spi-max-frequency = <50000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts -@@ -0,0 +1,81 @@ +@@ -0,0 +1,49 @@ +// Definitions for RRA DigiDAC1 Audio card +/dts-v1/; +/plugin/; @@ -8091,45 +12079,13 @@ Signed-off-by: Khem Raj + compatible = "brcm,bcm2708"; + + fragment@0 { -+ target-path = "/"; -+ __overlay__ { -+ aliases { -+ ldo0 = &ldo0; -+ ldo1 = &ldo1; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/soc"; -+ __overlay__ { -+ -+ ldo1: ldo1 { -+ compatible = "regulator-fixed"; -+ regulator-name = "DC_5V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ ldo0: ldo0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "DC_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ fragment@2 { + target = <&i2s>; + __overlay__ { + status = "okay"; + }; + }; + -+ fragment@3 { ++ fragment@1 { + target = <&i2c1>; + __overlay__ { + #address-cells = <1>; @@ -8141,21 +12097,21 @@ Signed-off-by: Khem Raj + compatible = "wlf,wm8804"; + reg = <0x3b>; + status = "okay"; -+ PVDD-supply = <&ldo0>; -+ DVDD-supply = <&ldo0>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; + }; + + wm8742: wm8741@1a { + compatible = "wlf,wm8741"; + reg = <0x1a>; + status = "okay"; -+ AVDD-supply = <&ldo1>; -+ DVDD-supply = <&ldo0>; ++ AVDD-supply = <&vdd_5v0_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; + }; + }; + }; + -+ fragment@4 { ++ fragment@2 { + target = <&sound>; + __overlay__ { + compatible = "rra,digidac1-soundcard"; @@ -8205,6 +12161,49 @@ Signed-off-by: Khem Raj + +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts +@@ -0,0 +1,40 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&i2c1>; ++ ++ frag1: __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ sc16is752: sc16is752@48 { ++ compatible = "nxp,sc16is752"; ++ reg = <0x48>; // i2c address ++ clocks = <&sc16is752_clk>; ++ interrupt-parent = <&gpio>; ++ interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */ ++ gpio-controller; ++ #gpio-cells = <0>; ++ i2c-max-frequency = <400000>; ++ status = "okay"; ++ ++ sc16is752_clk: sc16is752_clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <14745600>; ++ }; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ int_pin = <&sc16is752>,"interrupts:0"; ++ addr = <&sc16is752>,"reg:0"; ++ xtal = <&sc16is752>,"clock-frequency:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts @@ -0,0 +1,61 @@ +/dts-v1/; @@ -8270,7 +12269,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts -@@ -0,0 +1,32 @@ +@@ -0,0 +1,31 @@ +/dts-v1/; +/plugin/; + @@ -8284,7 +12283,6 @@ Signed-off-by: Khem Raj + frag0: __overlay__ { + brcm,overclock-50 = <0>; + brcm,pio-limit = <1>; -+ brcm,debug-flags = <0>; + status = "okay"; + }; + }; @@ -8305,85 +12303,139 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts -@@ -0,0 +1,36 @@ -+/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */ +@@ -0,0 +1,63 @@ ++/dts-v1/; ++/plugin/; + -+/include/ "sdhost-overlay.dts" ++/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */ + +/{ + compatible = "brcm,bcm2708"; + -+ fragment@3 { ++ fragment@0 { + target = <&mmc>; -+ sdio_mmc: __overlay__ { -+ compatible = "brcm,bcm2835-mmc"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ non-removable; -+ bus-width = <1>; -+ brcm,overclock-50 = <0>; -+ status = "okay"; ++ __overlay__ { ++ status = "disabled"; + }; + }; + -+ fragment@4 { ++ fragment@1 { ++ target = <&soc>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ sdio_1bit: sdio@7e300000 { ++ compatible = "brcm,bcm2835-mmc", ++ "brcm,bcm2835-sdhci"; ++ reg = <0x7e300000 0x100>; ++ interrupts = <2 30>; ++ clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>; ++ dmas = <&dma 11>; ++ dma-names = "rx-tx"; ++ brcm,overclock-50 = <0>; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_1bit_pins>; ++ non-removable; ++ bus-width = <1>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { + target = <&gpio>; + __overlay__ { -+ sdio_pins: sdio_pins { ++ sdio_1bit_pins: sdio_1bit_pins { + brcm,pins = <22 23 24 25>; -+ brcm,function = <7 7 7 7>; /* ALT3 = SD1 */ ++ brcm,function = <7>; /* ALT3 = SD1 */ + brcm,pull = <0 2 2 2>; + }; + }; + }; + ++ fragment@3 { ++ target-path = "/aliases"; ++ __overlay__ { ++ mmc1 = "/soc/sdio@7e300000"; ++ }; ++ }; ++ ++ + __overrides__ { -+ poll_once = <&sdio_mmc>,"non-removable?"; -+ sdio_overclock = <&sdio_mmc>,"brcm,overclock-50:0"; ++ poll_once = <&sdio_1bit>,"non-removable?"; ++ sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts -@@ -0,0 +1,36 @@ -+/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */ +@@ -0,0 +1,63 @@ ++/dts-v1/; ++/plugin/; + -+/include/ "sdhost-overlay.dts" ++/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */ + +/{ + compatible = "brcm,bcm2708"; + -+ fragment@3 { ++ fragment@0 { + target = <&mmc>; -+ sdio_mmc: __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ non-removable; -+ bus-width = <4>; -+ brcm,overclock-50 = <0>; -+ status = "okay"; ++ __overlay__ { ++ status = "disabled"; + }; + }; + -+ fragment@4 { ++ fragment@1 { ++ target = <&soc>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ sdio_ovl: sdio@7e300000 { ++ compatible = "brcm,bcm2835-mmc", ++ "brcm,bcm2835-sdhci"; ++ reg = <0x7e300000 0x100>; ++ interrupts = <2 30>; ++ clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>; ++ dmas = <&dma 11>; ++ dma-names = "rx-tx"; ++ brcm,overclock-50 = <0>; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_ovl_pins>; ++ non-removable; ++ bus-width = <1>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { + target = <&gpio>; + __overlay__ { -+ sdio_pins: sdio_pins { ++ sdio_ovl_pins: sdio_ovl_pins { + brcm,pins = <22 23 24 25 26 27>; -+ brcm,function = <7 7 7 7 7 7>; /* ALT3 = SD1 */ ++ brcm,function = <7>; /* ALT3 = SD1 */ + brcm,pull = <0 2 2 2 2 2>; + }; + }; + }; + ++ fragment@3 { ++ target-path = "/aliases"; ++ __overlay__ { ++ mmc1 = "/soc/sdio@7e300000"; ++ }; ++ }; ++ + __overrides__ { -+ poll_once = <&sdio_mmc>,"non-removable?"; -+ bus_width = <&sdio_mmc>,"bus-width:0"; -+ sdio_overclock = <&sdio_mmc>,"brcm,overclock-50:0"; ++ poll_once = <&sdio_ovl>,"non-removable?"; ++ bus_width = <&sdio_ovl>,"bus-width:0"; ++ sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts -@@ -0,0 +1,23 @@ +@@ -0,0 +1,25 @@ +/dts-v1/; +/plugin/; + @@ -8405,6 +12457,8 @@ Signed-off-by: Khem Raj + force_pio = <&frag0>,"brcm,force-pio?"; + pio_limit = <&frag0>,"brcm,pio-limit:0"; + debug = <&frag0>,"brcm,debug?"; ++ enable = <&frag0>,"status"; ++ poll_once = <&frag0>,"non-removable?"; + }; +}; --- /dev/null @@ -8611,6 +12665,38 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts +@@ -0,0 +1,29 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <8 7>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi0>; ++ frag1: __overlay__ { ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts @@ -0,0 +1,26 @@ +/* @@ -8680,7 +12766,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -8740,7 +12826,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -8749,7 +12835,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -8812,7 +12898,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -8821,7 +12907,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -8830,7 +12916,7 @@ Signed-off-by: Khem Raj + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -8896,7 +12982,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -8956,7 +13042,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -8965,7 +13051,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -9028,7 +13114,7 @@ Signed-off-by: Khem Raj + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -9037,7 +13123,7 @@ Signed-off-by: Khem Raj + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + @@ -9046,7 +13132,7 @@ Signed-off-by: Khem Raj + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; -+ spi-max-frequency = <500000>; ++ spi-max-frequency = <125000000>; + status = "okay"; + }; + }; @@ -9072,6 +13158,1791 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts +@@ -0,0 +1,73 @@ ++// Definitions for SuperAudioBoard ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "simple-audio-card"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ ++ simple-audio-card,name = "SuperAudioBoard"; ++ ++ simple-audio-card,widgets = ++ "Line", "Line In", ++ "Line", "Line Out"; ++ ++ simple-audio-card,routing = ++ "Line Out","AOUTA+", ++ "Line Out","AOUTA-", ++ "Line Out","AOUTB+", ++ "Line Out","AOUTB-", ++ "AINA","Line In", ++ "AINB","Line In"; ++ ++ simple-audio-card,format = "i2s"; ++ ++ simple-audio-card,bitclock-master = <&sound_master>; ++ simple-audio-card,frame-master = <&sound_master>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++ }; ++ ++ sound_master: simple-audio-card,codec { ++ sound-dai = <&cs4271>; ++ system-clock-frequency = <24576000>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ cs4271: cs4271@10 { ++ #sound-dai-cells = <0>; ++ compatible = "cirrus,cs4271"; ++ reg = <0x10>; ++ status = "okay"; ++ reset-gpio = <&gpio 26 0>; /* Pin 26, active high */ ++ }; ++ }; ++ }; ++ __overrides__ { ++ gpiopin = <&cs4271>,"reset-gpio:4"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts +@@ -0,0 +1,1706 @@ ++// Definitions for SX150x I2C GPIO Expanders from Semtech ++ ++// dtparams: ++// sx150-- - Enables SX150X device on I2C# with slave address . may be 1-9. ++// may be 0 or 1. Permissible values of (which is denoted in hex) ++// depend on the device variant. ++// For SX1501, SX1502, SX1504 and SX1505, may be 20 or 21. ++// For SX1503 and SX1506, may be 20. ++// For SX1507 and SX1509, may be 3E, 3F, 70 or 71. ++// For SX1508, may be 20, 21, 22 or 23. ++// sx150---int-gpio - Integer, enables interrupts on SX150X device on I2C# with slave address , ++// specifies the GPIO pin to which NINT output of SX150X is connected. ++// ++// ++// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25: ++// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25 ++// ++// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used): ++// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70 ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ // Enable I2C#0 interface ++ fragment@0 { ++ target = <&i2c0>; ++ __dormant__ { ++ status = "okay"; ++ }; ++ }; ++ ++ // Enable I2C#1 interface ++ fragment@1 { ++ target = <&i2c1>; ++ __dormant__ { ++ status = "okay"; ++ }; ++ }; ++ ++ // Enable a SX1501 on I2C#0 at slave addr 0x20 ++ fragment@2 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1501_0_20: sx150x@20 { ++ compatible = "semtech,sx1501q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1501 on I2C#1 at slave addr 0x20 ++ fragment@3 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1501_1_20: sx150x@20 { ++ compatible = "semtech,sx1501q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1501 on I2C#0 at slave addr 0x21 ++ fragment@4 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1501_0_21: sx150x@21 { ++ compatible = "semtech,sx1501q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1501 on I2C#1 at slave addr 0x21 ++ fragment@5 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1501_1_21: sx150x@21 { ++ compatible = "semtech,sx1501q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1502 on I2C#0 at slave addr 0x20 ++ fragment@6 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1502_0_20: sx150x@20 { ++ compatible = "semtech,sx1502q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1502 on I2C#1 at slave addr 0x20 ++ fragment@7 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1502_1_20: sx150x@20 { ++ compatible = "semtech,sx1502q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1502 on I2C#0 at slave addr 0x21 ++ fragment@8 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1502_0_21: sx150x@21 { ++ compatible = "semtech,sx1502q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1502 on I2C#1 at slave addr 0x21 ++ fragment@9 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1502_1_21: sx150x@21 { ++ compatible = "semtech,sx1502q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1503 on I2C#0 at slave addr 0x20 ++ fragment@10 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1503_0_20: sx150x@20 { ++ compatible = "semtech,sx1503q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1503 on I2C#1 at slave addr 0x20 ++ fragment@11 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1503_1_20: sx150x@20 { ++ compatible = "semtech,sx1503q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1504 on I2C#0 at slave addr 0x20 ++ fragment@12 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1504_0_20: sx150x@20 { ++ compatible = "semtech,sx1504q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1504 on I2C#1 at slave addr 0x20 ++ fragment@13 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1504_1_20: sx150x@20 { ++ compatible = "semtech,sx1504q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1504 on I2C#0 at slave addr 0x21 ++ fragment@14 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1504_0_21: sx150x@21 { ++ compatible = "semtech,sx1504q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1504 on I2C#1 at slave addr 0x21 ++ fragment@15 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1504_1_21: sx150x@21 { ++ compatible = "semtech,sx1504q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1505 on I2C#0 at slave addr 0x20 ++ fragment@16 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1505_0_20: sx150x@20 { ++ compatible = "semtech,sx1505q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1505 on I2C#1 at slave addr 0x20 ++ fragment@17 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1505_1_20: sx150x@20 { ++ compatible = "semtech,sx1505q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1505 on I2C#0 at slave addr 0x21 ++ fragment@18 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1505_0_21: sx150x@21 { ++ compatible = "semtech,sx1505q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1505 on I2C#1 at slave addr 0x21 ++ fragment@19 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1505_1_21: sx150x@21 { ++ compatible = "semtech,sx1505q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1506 on I2C#0 at slave addr 0x20 ++ fragment@20 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1506_0_20: sx150x@20 { ++ compatible = "semtech,sx1506q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1506 on I2C#1 at slave addr 0x20 ++ fragment@21 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1506_1_20: sx150x@20 { ++ compatible = "semtech,sx1506q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#0 at slave addr 0x3E ++ fragment@22 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_0_3E: sx150x@3E { ++ compatible = "semtech,sx1507q"; ++ reg = <0x3E>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#1 at slave addr 0x3E ++ fragment@23 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_1_3E: sx150x@3E { ++ compatible = "semtech,sx1507q"; ++ reg = <0x3E>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#0 at slave addr 0x3F ++ fragment@24 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_0_3F: sx150x@3F { ++ compatible = "semtech,sx1507q"; ++ reg = <0x3F>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#1 at slave addr 0x3F ++ fragment@25 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_1_3F: sx150x@3F { ++ compatible = "semtech,sx1507q"; ++ reg = <0x3F>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#0 at slave addr 0x70 ++ fragment@26 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_0_70: sx150x@70 { ++ compatible = "semtech,sx1507q"; ++ reg = <0x70>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#1 at slave addr 0x70 ++ fragment@27 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_1_70: sx150x@70 { ++ compatible = "semtech,sx1507q"; ++ reg = <0x70>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#0 at slave addr 0x71 ++ fragment@28 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_0_71: sx150x@71 { ++ compatible = "semtech,sx1507q"; ++ reg = <0x71>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1507 on I2C#1 at slave addr 0x71 ++ fragment@29 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1507_1_71: sx150x@71 { ++ compatible = "semtech,sx1507q"; ++ reg = <0x71>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#0 at slave addr 0x20 ++ fragment@30 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_0_20: sx150x@20 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#1 at slave addr 0x20 ++ fragment@31 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_1_20: sx150x@20 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#0 at slave addr 0x21 ++ fragment@32 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_0_21: sx150x@21 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#1 at slave addr 0x21 ++ fragment@33 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_1_21: sx150x@21 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x21>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#0 at slave addr 0x22 ++ fragment@34 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_0_22: sx150x@22 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x22>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#1 at slave addr 0x22 ++ fragment@35 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_1_22: sx150x@22 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x22>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#0 at slave addr 0x23 ++ fragment@36 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_0_23: sx150x@23 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1508 on I2C#1 at slave addr 0x23 ++ fragment@37 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1508_1_23: sx150x@23 { ++ compatible = "semtech,sx1508q"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#0 at slave addr 0x3E ++ fragment@38 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_0_3E: sx150x@3E { ++ compatible = "semtech,sx1509q"; ++ reg = <0x3E>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#1 at slave addr 0x3E ++ fragment@39 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_1_3E: sx150x@3E { ++ compatible = "semtech,sx1509q"; ++ reg = <0x3E>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#0 at slave addr 0x3F ++ fragment@40 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_0_3F: sx150x@3F { ++ compatible = "semtech,sx1509q"; ++ reg = <0x3F>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#1 at slave addr 0x3F ++ fragment@41 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_1_3F: sx150x@3F { ++ compatible = "semtech,sx1509q"; ++ reg = <0x3F>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#0 at slave addr 0x70 ++ fragment@42 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_0_70: sx150x@70 { ++ compatible = "semtech,sx1509q"; ++ reg = <0x70>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#1 at slave addr 0x70 ++ fragment@43 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_1_70: sx150x@70 { ++ compatible = "semtech,sx1509q"; ++ reg = <0x70>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#0 at slave addr 0x71 ++ fragment@44 { ++ target = <&i2c0>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_0_71: sx150x@71 { ++ compatible = "semtech,sx1509q"; ++ reg = <0x71>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable a SX1509 on I2C#1 at slave addr 0x71 ++ fragment@45 { ++ target = <&i2c1>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sx1509_1_71: sx150x@71 { ++ compatible = "semtech,sx1509q"; ++ reg = <0x71>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ #interrupt-cells = <2>; ++ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter ++ 2nd word is 2 for falling-edge triggered */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20 ++ fragment@46 { ++ target = <&sx1501_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20 ++ fragment@47 { ++ target = <&sx1501_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21 ++ fragment@48 { ++ target = <&sx1501_0_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21 ++ fragment@49 { ++ target = <&sx1501_1_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20 ++ fragment@50 { ++ target = <&sx1502_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20 ++ fragment@51 { ++ target = <&sx1502_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21 ++ fragment@52 { ++ target = <&sx1502_0_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21 ++ fragment@53 { ++ target = <&sx1502_1_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20 ++ fragment@54 { ++ target = <&sx1503_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20 ++ fragment@55 { ++ target = <&sx1503_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20 ++ fragment@56 { ++ target = <&sx1504_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20 ++ fragment@57 { ++ target = <&sx1504_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21 ++ fragment@58 { ++ target = <&sx1504_0_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21 ++ fragment@59 { ++ target = <&sx1504_1_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20 ++ fragment@60 { ++ target = <&sx1505_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20 ++ fragment@61 { ++ target = <&sx1505_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21 ++ fragment@62 { ++ target = <&sx1505_0_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21 ++ fragment@63 { ++ target = <&sx1505_1_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20 ++ fragment@64 { ++ target = <&sx1506_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20 ++ fragment@65 { ++ target = <&sx1506_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E ++ fragment@66 { ++ target = <&sx1507_0_3E>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_3E_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E ++ fragment@67 { ++ target = <&sx1507_1_3E>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_3E_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F ++ fragment@68 { ++ target = <&sx1507_0_3F>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_3F_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F ++ fragment@69 { ++ target = <&sx1507_1_3F>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_3F_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70 ++ fragment@70 { ++ target = <&sx1507_0_70>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_70_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70 ++ fragment@71 { ++ target = <&sx1507_1_70>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_70_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71 ++ fragment@72 { ++ target = <&sx1507_0_71>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_71_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71 ++ fragment@73 { ++ target = <&sx1507_1_71>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_71_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20 ++ fragment@74 { ++ target = <&sx1508_0_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20 ++ fragment@75 { ++ target = <&sx1508_1_20>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_20_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21 ++ fragment@76 { ++ target = <&sx1508_0_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21 ++ fragment@77 { ++ target = <&sx1508_1_21>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_21_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22 ++ fragment@78 { ++ target = <&sx1508_0_22>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_22_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22 ++ fragment@79 { ++ target = <&sx1508_1_22>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_22_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23 ++ fragment@80 { ++ target = <&sx1508_0_23>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_23_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23 ++ fragment@81 { ++ target = <&sx1508_1_23>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_23_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E ++ fragment@82 { ++ target = <&sx1509_0_3E>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_3E_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E ++ fragment@83 { ++ target = <&sx1509_1_3E>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_3E_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F ++ fragment@84 { ++ target = <&sx1509_0_3F>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_3F_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F ++ fragment@85 { ++ target = <&sx1509_1_3F>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_3F_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70 ++ fragment@86 { ++ target = <&sx1509_0_70>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_70_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70 ++ fragment@87 { ++ target = <&sx1509_1_70>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_70_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71 ++ fragment@88 { ++ target = <&sx1509_0_71>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_0_71_pins>; ++ }; ++ }; ++ ++ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71 ++ fragment@89 { ++ target = <&sx1509_1_71>; ++ __dormant__ { ++ interrupt-parent = <&gpio>; ++ interrupt-controller; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sx150x_1_71_pins>; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20 ++ // Configure as a input with no pull-up/down ++ fragment@90 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_20_pins: sx150x_0_20_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20 ++ // Configure as a input with no pull-up/down ++ fragment@91 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_20_pins: sx150x_1_20_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21 ++ // Configure as a input with no pull-up/down ++ fragment@92 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_21_pins: sx150x_0_21_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21 ++ // Configure as a input with no pull-up/down ++ fragment@93 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_21_pins: sx150x_1_21_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22 ++ // Configure as a input with no pull-up/down ++ fragment@94 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_22_pins: sx150x_0_22_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22 ++ // Configure as a input with no pull-up/down ++ fragment@95 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_22_pins: sx150x_1_22_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23 ++ // Configure as a input with no pull-up/down ++ fragment@96 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_23_pins: sx150x_0_23_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23 ++ // Configure as a input with no pull-up/down ++ fragment@97 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_23_pins: sx150x_1_23_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E ++ // Configure as a input with no pull-up/down ++ fragment@98 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_3E_pins: sx150x_0_3E_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E ++ // Configure as a input with no pull-up/down ++ fragment@99 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_3E_pins: sx150x_1_3E_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F ++ // Configure as a input with no pull-up/down ++ fragment@100 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_3F_pins: sx150x_0_3F_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F ++ // Configure as a input with no pull-up/down ++ fragment@101 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_3F_pins: sx150x_1_3F_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70 ++ // Configure as a input with no pull-up/down ++ fragment@102 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_70_pins: sx150x_0_70_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70 ++ // Configure as a input with no pull-up/down ++ fragment@103 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_70_pins: sx150x_1_70_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71 ++ // Configure as a input with no pull-up/down ++ fragment@104 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_0_71_pins: sx150x_0_71_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71 ++ // Configure as a input with no pull-up/down ++ fragment@105 { ++ target = <&gpio>; ++ __dormant__ { ++ sx150x_1_71_pins: sx150x_1_71_pins { ++ brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */ ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ sx1501-0-20 = <0>,"+0+2"; ++ sx1501-1-20 = <0>,"+1+3"; ++ sx1501-0-21 = <0>,"+0+4"; ++ sx1501-1-21 = <0>,"+1+5"; ++ sx1502-0-20 = <0>,"+0+6"; ++ sx1502-1-20 = <0>,"+1+7"; ++ sx1502-0-21 = <0>,"+0+8"; ++ sx1502-1-21 = <0>,"+1+9"; ++ sx1503-0-20 = <0>,"+0+10"; ++ sx1503-1-20 = <0>,"+1+11"; ++ sx1504-0-20 = <0>,"+0+12"; ++ sx1504-1-20 = <0>,"+1+13"; ++ sx1504-0-21 = <0>,"+0+14"; ++ sx1504-1-21 = <0>,"+1+15"; ++ sx1505-0-20 = <0>,"+0+16"; ++ sx1505-1-20 = <0>,"+1+17"; ++ sx1505-0-21 = <0>,"+0+18"; ++ sx1505-1-21 = <0>,"+1+19"; ++ sx1506-0-20 = <0>,"+0+20"; ++ sx1506-1-20 = <0>,"+1+21"; ++ sx1507-0-3E = <0>,"+0+22"; ++ sx1507-1-3E = <0>,"+1+23"; ++ sx1507-0-3F = <0>,"+0+24"; ++ sx1507-1-3F = <0>,"+1+25"; ++ sx1507-0-70 = <0>,"+0+26"; ++ sx1507-1-70 = <0>,"+1+27"; ++ sx1507-0-71 = <0>,"+0+28"; ++ sx1507-1-71 = <0>,"+1+29"; ++ sx1508-0-20 = <0>,"+0+30"; ++ sx1508-1-20 = <0>,"+1+31"; ++ sx1508-0-21 = <0>,"+0+32"; ++ sx1508-1-21 = <0>,"+1+33"; ++ sx1508-0-22 = <0>,"+0+34"; ++ sx1508-1-22 = <0>,"+1+35"; ++ sx1508-0-23 = <0>,"+0+36"; ++ sx1508-1-23 = <0>,"+1+37"; ++ sx1509-0-3E = <0>,"+0+38"; ++ sx1509-1-3E = <0>,"+1+39"; ++ sx1509-0-3F = <0>,"+0+40"; ++ sx1509-1-3F = <0>,"+1+41"; ++ sx1509-0-70 = <0>,"+0+42"; ++ sx1509-1-70 = <0>,"+1+43"; ++ sx1509-0-71 = <0>,"+0+44"; ++ sx1509-1-71 = <0>,"+1+45"; ++ sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0"; ++ sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0"; ++ sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0"; ++ sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0"; ++ sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0"; ++ sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0"; ++ sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0"; ++ sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0"; ++ sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0"; ++ sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0"; ++ sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0"; ++ sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0"; ++ sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0"; ++ sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0"; ++ sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0"; ++ sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0"; ++ sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0"; ++ sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0"; ++ sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0"; ++ sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0"; ++ sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0"; ++ sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0"; ++ sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0"; ++ sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0"; ++ sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0"; ++ sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0"; ++ sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0"; ++ sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0"; ++ sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0"; ++ sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0"; ++ sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0"; ++ sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0"; ++ sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0"; ++ sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0"; ++ sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0"; ++ sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0"; ++ sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0"; ++ sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0"; ++ sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0"; ++ sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0"; ++ sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0"; ++ sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0"; ++ sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0"; ++ sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0"; ++ }; ++}; ++ +--- /dev/null +++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts @@ -0,0 +1,224 @@ +/* @@ -9299,6 +15170,41 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts +@@ -0,0 +1,32 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&uart0>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ uart0_pins: uart0_pins { ++ brcm,pins = <14 15>; ++ brcm,function = <4>; /* alt0 */ ++ brcm,pull = <0 2>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ txd0_pin = <&uart0_pins>,"brcm,pins:0"; ++ rxd0_pin = <&uart0_pins>,"brcm,pins:4"; ++ pin_func = <&uart0_pins>,"brcm,function:0"; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts @@ -0,0 +1,38 @@ +/dts-v1/; @@ -9340,6 +15246,199 @@ Signed-off-by: Khem Raj + }; +}; --- /dev/null ++++ b/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts +@@ -0,0 +1,33 @@ ++// Overlay for missing AUX interrupt controller ++// Instead we bind all AUX devices to the generic AUX interrupt line ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&uart1>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi1>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spi2>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++}; ++ +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -0,0 +1,154 @@ ++// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts, ++ ++/dts-v1/; ++/plugin/; ++ ++#include ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ fragment@0 { ++ target-path = "/chosen"; ++ __dormant__ { ++ bootargs = "cma=256M"; ++ }; ++ }; ++ fragment@1 { ++ target-path = "/chosen"; ++ __dormant__ { ++ bootargs = "cma=192M"; ++ }; ++ }; ++ fragment@2 { ++ target-path = "/chosen"; ++ __dormant__ { ++ bootargs = "cma=128M"; ++ }; ++ }; ++ fragment@3 { ++ target-path = "/chosen"; ++ __overlay__ { ++ bootargs = "cma=96M"; ++ }; ++ }; ++ fragment@4 { ++ target-path = "/chosen"; ++ __dormant__ { ++ bootargs = "cma=64M"; ++ }; ++ }; ++ fragment@5 { ++ target = <&i2c2>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ fragment@6 { ++ target = <&fb>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ fragment@7 { ++ target = <&pixelvalve0>; ++ __overlay__ { ++ interrupts = <2 13>; ++ status = "okay"; ++ }; ++ }; ++ fragment@8 { ++ target = <&pixelvalve1>; ++ __overlay__ { ++ interrupts = <2 14>; ++ status = "okay"; ++ }; ++ }; ++ fragment@9 { ++ target = <&pixelvalve2>; ++ __overlay__ { ++ interrupts = <2 10>; ++ status = "okay"; ++ }; ++ }; ++ fragment@10 { ++ target = <&hvs>; ++ __overlay__ { ++ interrupts = <2 1>; ++ status = "okay"; ++ }; ++ }; ++ fragment@11 { ++ target = <&hdmi>; ++ __overlay__ { ++ interrupts = <2 8>, <2 9>; ++ status = "okay"; ++ }; ++ }; ++ fragment@12 { ++ target = <&v3d>; ++ __overlay__ { ++ interrupts = <1 10>; ++ status = "okay"; ++ }; ++ }; ++ fragment@13 { ++ target = <&vc4>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ fragment@14 { ++ target-path = "/soc/dma"; ++ __overlay__ { ++ brcm,dma-channel-mask = <0x7f35>; ++ }; ++ }; ++ fragment@15 { ++ target = <&clocks>; ++ __overlay__ { ++ claim-clocks = ; ++ }; ++ }; ++ fragment@16 { ++ target = <&vec>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ fragment@17 { ++ target = <&usb>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ dwc2_usb: __overlay__ { ++ compatible = "brcm,bcm2835-usb"; ++ reg = <0x7e980000 0x10000>; ++ interrupts = <1 9>; ++ dr_mode = "otg"; ++ g-np-tx-fifo-size = <32>; ++ g-rx-fifo-size = <256>; ++ g-tx-fifo-size = <512 512 512 512 512 256 256>; ++ status = "okay"; ++ }; ++ }; ++ fragment@18 { ++ target = <&uart1>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++ fragment@19 { ++ target = <&spi1>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++ fragment@20 { ++ target = <&spi2>; ++ __overlay__ { ++ interrupt-parent = <&intc>; ++ interrupts = <0x1 0x1d>; ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts @@ -0,0 +1,89 @@ +/* @@ -9355,35 +15454,35 @@ Signed-off-by: Khem Raj + fragment@0 { + target-path = "/chosen"; + __overlay__ { -+ bootargs = "cma=256M@256M"; ++ bootargs = "cma=256M"; + }; + }; + + fragment@1 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=192M@256M"; ++ bootargs = "cma=192M"; + }; + }; + + fragment@2 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=128M@128M"; ++ bootargs = "cma=128M"; + }; + }; + + fragment@3 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=96M@128M"; ++ bootargs = "cma=96M"; + }; + }; + + fragment@4 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=64M@64M"; ++ bootargs = "cma=64M"; + }; + }; + @@ -9410,7 +15509,7 @@ Signed-off-by: Khem Raj + }; + + fragment@8 { -+ target = <&gpu>; ++ target = <&vc4>; + __overlay__ { + status = "okay"; + }; @@ -9433,7 +15532,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -@@ -0,0 +1,136 @@ +@@ -0,0 +1,151 @@ +/* + * vc4-kms-v3d-overlay.dts + */ @@ -9441,41 +15540,43 @@ Signed-off-by: Khem Raj +/dts-v1/; +/plugin/; + ++#include ++ +/ { + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; + + fragment@0 { + target-path = "/chosen"; + __overlay__ { -+ bootargs = "cma=256M@256M"; ++ bootargs = "cma=256M"; + }; + }; + + fragment@1 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=192M@256M"; ++ bootargs = "cma=192M"; + }; + }; + + fragment@2 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=128M@128M"; ++ bootargs = "cma=128M"; + }; + }; + + fragment@3 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=96M@128M"; ++ bootargs = "cma=96M"; + }; + }; + + fragment@4 { + target-path = "/chosen"; + __dormant__ { -+ bootargs = "cma=64M@64M"; ++ bootargs = "cma=64M"; + }; + }; + @@ -9487,20 +15588,13 @@ Signed-off-by: Khem Raj + }; + + fragment@6 { -+ target = <&cprman>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@7 { + target = <&fb>; + __overlay__ { + status = "disabled"; + }; + }; + -+ fragment@8 { ++ fragment@7 { + target = <&pixelvalve0>; + __overlay__ { + interrupts = <2 13>; /* pwa0 */ @@ -9508,7 +15602,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@9 { ++ fragment@8 { + target = <&pixelvalve1>; + __overlay__ { + interrupts = <2 14>; /* pwa1 */ @@ -9516,7 +15610,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@10 { ++ fragment@9 { + target = <&pixelvalve2>; + __overlay__ { + interrupts = <2 10>; /* pixelvalve */ @@ -9524,7 +15618,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@11 { ++ fragment@10 { + target = <&hvs>; + __overlay__ { + interrupts = <2 1>; @@ -9532,7 +15626,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@12 { ++ fragment@11 { + target = <&hdmi>; + __overlay__ { + interrupts = <2 8>, <2 9>; @@ -9540,7 +15634,7 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@13 { ++ fragment@12 { + target = <&v3d>; + __overlay__ { + interrupts = <1 10>; @@ -9548,20 +15642,40 @@ Signed-off-by: Khem Raj + }; + }; + -+ fragment@14 { -+ target = <&gpu>; ++ fragment@13 { ++ target = <&vc4>; + __overlay__ { + status = "okay"; + }; + }; + -+ fragment@15 { ++ fragment@14 { + target-path = "/soc/dma"; + __overlay__ { + brcm,dma-channel-mask = <0x7f35>; + }; + }; + ++ ++ fragment@15 { ++ target = <&clocks>; ++ __overlay__ { ++ claim-clocks = < ++ BCM2835_PLLD_DSI0 ++ BCM2835_PLLD_DSI1 ++ BCM2835_PLLH_AUX ++ BCM2835_PLLH_PIX ++ >; ++ }; ++ }; ++ ++ fragment@16 { ++ target = <&vec>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ + __overrides__ { + cma-256 = <0>,"+0-1-2-3-4"; + cma-192 = <0>,"-0+1-2-3-4"; @@ -9605,7 +15719,7 @@ Signed-off-by: Khem Raj +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts -@@ -0,0 +1,39 @@ +@@ -0,0 +1,41 @@ +// Definitions for w1-gpio module (without external pullup) +/dts-v1/; +/plugin/; @@ -9631,7 +15745,7 @@ Signed-off-by: Khem Raj + fragment@1 { + target = <&gpio>; + __overlay__ { -+ w1_pins: w1_pins { ++ w1_pins: w1_pins@0 { + brcm,pins = <4>; + brcm,function = <0>; // in (initially) + brcm,pull = <0>; // off @@ -9641,13 +15755,15 @@ Signed-off-by: Khem Raj + + __overrides__ { + gpiopin = <&w1>,"gpios:4", -+ <&w1_pins>,"brcm,pins:0"; ++ <&w1>,"reg:0", ++ <&w1_pins>,"brcm,pins:0", ++ <&w1_pins>,"reg:0"; + pullup = <&w1>,"rpi,parasitic-power:0"; + }; +}; --- /dev/null +++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts -@@ -0,0 +1,41 @@ +@@ -0,0 +1,43 @@ +// Definitions for w1-gpio module (with external pullup) +/dts-v1/; +/plugin/; @@ -9673,7 +15789,7 @@ Signed-off-by: Khem Raj + fragment@1 { + target = <&gpio>; + __overlay__ { -+ w1_pins: w1_pins { ++ w1_pins: w1_pins@0 { + brcm,pins = <4 5>; + brcm,function = <0 1>; // in out + brcm,pull = <0 0>; // off off @@ -9683,7 +15799,9 @@ Signed-off-by: Khem Raj + + __overrides__ { + gpiopin = <&w1>,"gpios:4", -+ <&w1_pins>,"brcm,pins:0"; ++ <&w1>,"reg:0", ++ <&w1_pins>,"brcm,pins:0", ++ <&w1_pins>,"reg:0"; + extpullup = <&w1>,"gpios:16", + <&w1_pins>,"brcm,pins:4"; + pullup = <&w1>,"rpi,parasitic-power:0"; @@ -9738,21 +15856,15 @@ Signed-off-by: Khem Raj +}; --- a/scripts/Makefile.dtbinst +++ b/scripts/Makefile.dtbinst -@@ -27,6 +27,7 @@ ifeq ("$(dtbinst-root)", "$(obj)") - endif +@@ -20,6 +20,7 @@ include scripts/Kbuild.include + include $(src)/Makefile - dtbinst-files := $(dtb-y) -+dtboinst-files := $(dtbo-y) - dtbinst-dirs := $(dts-dirs) + dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-))) ++dtboinst-files := $(sort $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-))) + dtbinst-dirs := $(subdir-y) $(subdir-m) # Helper targets for Installing DTBs into the boot directory -@@ -35,15 +36,18 @@ quiet_cmd_dtb_install = INSTALL $< - - install-dir = $(patsubst $(dtbinst-root)%,$(INSTALL_DTBS_PATH)%,$(obj)) - --$(dtbinst-files) $(dtbinst-dirs): | __dtbs_install_prep -+$(dtbinst-files) $(dtboinst-files) $(dtbinst-dirs): | __dtbs_install_prep - +@@ -31,10 +32,13 @@ install-dir = $(patsubst $(dtbinst_root) $(dtbinst-files): %.dtb: $(obj)/%.dtb $(call cmd,dtb_install,$(install-dir)) @@ -9770,8 +15882,16 @@ Signed-off-by: Khem Raj .PHONY: $(PHONY) --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib -@@ -312,6 +312,17 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ - $(obj)/%.dtb: $(src)/%.dts FORCE +@@ -248,6 +248,7 @@ DTC ?= $(objtree)/scripts/dtc/dtc + ifeq ($(findstring 1,$(KBUILD_ENABLE_EXTRA_GCC_CHECKS)),) + DTC_FLAGS += -Wno-unit_address_vs_reg \ + -Wno-unit_address_format \ ++ -Wno-gpios_property \ + -Wno-avoid_unnecessary_addr_size \ + -Wno-alias_paths \ + -Wno-graph_child_address \ +@@ -292,6 +293,18 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ + $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE $(call if_changed_dep,dtc) +quiet_cmd_dtco = DTCO $@ @@ -9779,6 +15899,7 @@ Signed-off-by: Khem Raj + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \ + -i $(dir $<) $(DTC_FLAGS) \ ++ -Wno-interrupts_property \ + -d $(depfile).dtc.tmp $(dtc-tmp) ; \ + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) + diff --git a/target/linux/brcm2708/patches-4.9/950-0055-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch b/target/linux/brcm2708/patches-4.19/950-0058-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch similarity index 83% rename from target/linux/brcm2708/patches-4.9/950-0055-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch rename to target/linux/brcm2708/patches-4.19/950-0058-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch index a5e7dee6f..7d4389488 100644 --- a/target/linux/brcm2708/patches-4.9/950-0055-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch +++ b/target/linux/brcm2708/patches-4.19/950-0058-BCM270x_DT-Add-pwr_led-and-the-required-input-trigge.patch @@ -1,7 +1,8 @@ -From 766357a4f8476461035dcfe2c6b43f532366f533 Mon Sep 17 00:00:00 2001 +From 28644cb31e076ccc6645c692a7ff43414230f361 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Fri, 6 Feb 2015 13:50:57 +0000 -Subject: [PATCH] BCM270x_DT: Add pwr_led, and the required "input" trigger +Subject: [PATCH 058/703] BCM270x_DT: Add pwr_led, and the required "input" + trigger The "input" trigger makes the associated GPIO an input. This is to support the Raspberry Pi PWR LED, which is driven by external hardware in normal use. @@ -21,10 +22,10 @@ recently. See: https://github.com/raspberrypi/linux/issues/1064 --- - drivers/leds/leds-gpio.c | 18 +++++++++++- - drivers/leds/trigger/Kconfig | 7 +++++ + drivers/leds/leds-gpio.c | 17 ++++++++- + drivers/leds/trigger/Kconfig | 7 ++++ drivers/leds/trigger/Makefile | 1 + - drivers/leds/trigger/ledtrig-input.c | 54 ++++++++++++++++++++++++++++++++++++ + drivers/leds/trigger/ledtrig-input.c | 55 ++++++++++++++++++++++++++++ include/linux/leds.h | 3 ++ 5 files changed, 82 insertions(+), 1 deletion(-) create mode 100644 drivers/leds/trigger/ledtrig-input.c @@ -62,18 +63,17 @@ See: https://github.com/raspberrypi/linux/issues/1064 static int gpio_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off) { -@@ -122,6 +136,8 @@ static int create_gpio_led(const struct +@@ -122,6 +136,7 @@ static int create_gpio_led(const struct led_dat->platform_gpio_blink_set = blink_set; led_dat->cdev.blink_set = gpio_blink_set; } -+ led_dat->cdev.brightness_set = gpio_led_set; + led_dat->cdev.brightness_get = gpio_led_get; if (template->default_state == LEDS_GPIO_DEFSTATE_KEEP) { state = gpiod_get_value_cansleep(led_dat->gpiod); if (state < 0) --- a/drivers/leds/trigger/Kconfig +++ b/drivers/leds/trigger/Kconfig -@@ -116,6 +116,13 @@ config LEDS_TRIGGER_CAMERA +@@ -113,6 +113,13 @@ config LEDS_TRIGGER_CAMERA This enables direct flash/torch on/off by the driver, kernel space. If unsure, say Y. @@ -86,10 +86,10 @@ See: https://github.com/raspberrypi/linux/issues/1064 + config LEDS_TRIGGER_PANIC bool "LED Panic Trigger" - depends on LEDS_TRIGGERS + help --- a/drivers/leds/trigger/Makefile +++ b/drivers/leds/trigger/Makefile -@@ -9,5 +9,6 @@ obj-$(CONFIG_LEDS_TRIGGER_CPU) += ledtr +@@ -11,5 +11,6 @@ obj-$(CONFIG_LEDS_TRIGGER_ACTIVITY) += l obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o obj-$(CONFIG_LEDS_TRIGGER_TRANSIENT) += ledtrig-transient.o obj-$(CONFIG_LEDS_TRIGGER_CAMERA) += ledtrig-camera.o @@ -98,7 +98,7 @@ See: https://github.com/raspberrypi/linux/issues/1064 obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o --- /dev/null +++ b/drivers/leds/trigger/ledtrig-input.c -@@ -0,0 +1,54 @@ +@@ -0,0 +1,55 @@ +/* + * Set LED GPIO to Input "Trigger" + * @@ -119,10 +119,11 @@ See: https://github.com/raspberrypi/linux/issues/1064 +#include +#include "../leds.h" + -+static void input_trig_activate(struct led_classdev *led_cdev) ++static int input_trig_activate(struct led_classdev *led_cdev) +{ + led_cdev->flags |= SET_GPIO_INPUT; + led_set_brightness(led_cdev, 0); ++ return 0; +} + +static void input_trig_deactivate(struct led_classdev *led_cdev) @@ -155,13 +156,13 @@ See: https://github.com/raspberrypi/linux/issues/1064 +MODULE_LICENSE("GPL"); --- a/include/linux/leds.h +++ b/include/linux/leds.h -@@ -52,6 +52,9 @@ struct led_classdev { - #define LED_DEV_CAP_FLASH (1 << 24) - #define LED_HW_PLUGGABLE (1 << 25) - #define LED_PANIC_INDICATOR (1 << 26) +@@ -50,6 +50,9 @@ struct led_classdev { + #define LED_PANIC_INDICATOR BIT(20) + #define LED_BRIGHT_HW_CHANGED BIT(21) + #define LED_RETAIN_AT_SHUTDOWN BIT(22) + /* Additions for Raspberry Pi PWR LED */ -+#define SET_GPIO_INPUT (1 << 30) -+#define SET_GPIO_OUTPUT (1 << 31) ++#define SET_GPIO_INPUT BIT(30) ++#define SET_GPIO_OUTPUT BIT(31) - /* Set LED brightness level - * Must not sleep. Use brightness_set_blocking for drivers + /* set_brightness_work / blink_timer flags, atomic, private. */ + unsigned long work_flags; diff --git a/target/linux/brcm2708/patches-4.9/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch b/target/linux/brcm2708/patches-4.19/950-0059-fbdev-add-FBIOCOPYAREA-ioctl.patch similarity index 73% rename from target/linux/brcm2708/patches-4.9/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch rename to target/linux/brcm2708/patches-4.19/950-0059-fbdev-add-FBIOCOPYAREA-ioctl.patch index 34346903d..c9e5a92d0 100644 --- a/target/linux/brcm2708/patches-4.9/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch +++ b/target/linux/brcm2708/patches-4.19/950-0059-fbdev-add-FBIOCOPYAREA-ioctl.patch @@ -1,7 +1,7 @@ -From 65422160b21224e6d26641a4c1fa3082c0281488 Mon Sep 17 00:00:00 2001 +From cdec439b6dd76c5e1ccbe49636882067971abd0d Mon Sep 17 00:00:00 2001 From: Siarhei Siamashka Date: Mon, 17 Jun 2013 13:32:11 +0300 -Subject: [PATCH] fbdev: add FBIOCOPYAREA ioctl +Subject: [PATCH 059/703] fbdev: add FBIOCOPYAREA ioctl Based on the patch authored by Ali Gholami Rudi at https://lkml.org/lkml/2009/7/13/153 @@ -13,10 +13,10 @@ Signed-off-by: Siarhei Siamashka bcm2708_fb: Add ioctl for reading gpu memory through dma --- - drivers/video/fbdev/bcm2708_fb.c | 109 +++++++++++++++++++++++++++++++++++++++ - drivers/video/fbdev/core/fbmem.c | 36 +++++++++++++ - include/uapi/linux/fb.h | 12 +++++ - 3 files changed, 157 insertions(+) + drivers/video/fbdev/bcm2708_fb.c | 119 ++++++++++++++++++++++++++++++- + drivers/video/fbdev/core/fbmem.c | 36 ++++++++++ + include/uapi/linux/fb.h | 12 ++++ + 3 files changed, 166 insertions(+), 1 deletion(-) --- a/drivers/video/fbdev/bcm2708_fb.c +++ b/drivers/video/fbdev/bcm2708_fb.c @@ -24,18 +24,28 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma #include #include #include -+#include ++#include #include #include +#include #include //#define BCM2708_FB_DEBUG -@@ -426,6 +428,110 @@ static int bcm2708_fb_pan_display(struct +@@ -95,6 +97,7 @@ struct bcm2708_fb { + wait_queue_head_t dma_waitq; + struct bcm2708_fb_stats stats; + unsigned long fb_bus_address; ++ struct { u32 base, length; } gpu; + }; + + #define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) +@@ -439,7 +442,118 @@ static int bcm2708_fb_pan_display(struct return result; } -+static void dma_memcpy(struct bcm2708_fb *fb, dma_addr_t dst, dma_addr_t src, int size) +-static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) ++static void dma_memcpy(struct bcm2708_fb *fb, dma_addr_t dst, dma_addr_t src, ++ int size) +{ + int burst_size = (fb->dma_chan == 0) ? 8 : 2; + struct bcm2708_dma_cb *cb = fb->cb_base; @@ -56,6 +66,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + bcm_dma_wait_idle(fb->dma_chan_base); + } else { + void __iomem *dma_chan = fb->dma_chan_base; ++ + cb->info |= BCM2708_DMA_INT_EN; + bcm_dma_start(fb->dma_chan_base, fb->cb_handle); + while (bcm_dma_is_busy(dma_chan)) { @@ -68,8 +79,10 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + fb->stats.dma_copies++; +} + -+#define INTALIAS_NORMAL(x) ((x)&~0xc0000000) // address with no aliases -+#define INTALIAS_L1L2_NONALLOCATING(x) (((x)&~0xc0000000)|0x80000000) // cache coherent but non-allocating in L1 and L2 ++/* address with no aliases */ ++#define INTALIAS_NORMAL(x) ((x)&~0xc0000000) ++/* cache coherent but non-allocating in L1 and L2 */ ++#define INTALIAS_L1L2_NONALLOCATING(x) (((x)&~0xc0000000)|0x80000000) + +static long vc_mem_copy(struct bcm2708_fb *fb, unsigned long arg) +{ @@ -79,11 +92,9 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + dma_addr_t bus_addr; + long rc = 0; + size_t offset; -+ struct { u32 base, length; } gpu = {}; + + /* restrict this to root user */ -+ if (!uid_eq(current_euid(), GLOBAL_ROOT_UID)) -+ { ++ if (!uid_eq(current_euid(), GLOBAL_ROOT_UID)) { + rc = -EFAULT; + goto out; + } @@ -98,16 +109,17 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + goto out; + } + -+ rc = rpi_firmware_property(fb->fw, -+ RPI_FIRMWARE_GET_VC_MEMORY, -+ &gpu, sizeof(gpu)); -+ if (rc != 0 || gpu.base == 0 || gpu.length == 0) { -+ pr_err("[%s]: Unable to determine gpu memory %ld,%x,%x)\n", __func__, rc, gpu.base, gpu.length); ++ if (fb->gpu.base == 0 || fb->gpu.length == 0) { ++ pr_err("[%s]: Unable to determine gpu memory (%x,%x)\n", ++ __func__, fb->gpu.base, fb->gpu.length); + return -EFAULT; + } + -+ if (INTALIAS_NORMAL(ioparam.src) < gpu.base || INTALIAS_NORMAL(ioparam.src) >= gpu.base + gpu.length) { -+ pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__, INTALIAS_NORMAL(ioparam.src), gpu.base, gpu.base + gpu.length); ++ if (INTALIAS_NORMAL(ioparam.src) < fb->gpu.base || ++ INTALIAS_NORMAL(ioparam.src) >= fb->gpu.base + fb->gpu.length) { ++ pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__, ++ INTALIAS_NORMAL(ioparam.src), fb->gpu.base, ++ fb->gpu.base + fb->gpu.length); + return -EFAULT; + } + @@ -125,7 +137,9 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + size_t s = min(size, remaining); + unsigned char *p = (unsigned char *)ioparam.src + offset; + unsigned char *q = (unsigned char *)ioparam.dst + offset; -+ dma_memcpy(fb, bus_addr, INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size); ++ ++ dma_memcpy(fb, bus_addr, ++ INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size); + if (copy_to_user(q, buf, s) != 0) { + pr_err("[%s]: failed to copy-to-user\n", + __func__); @@ -135,14 +149,17 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma + } +out: + if (buf) -+ dma_free_coherent(fb->fb.device, PAGE_ALIGN(size), buf, bus_addr); ++ dma_free_coherent(fb->fb.device, PAGE_ALIGN(size), buf, ++ bus_addr); + return rc; +} + - static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) ++static int bcm2708_ioctl(struct fb_info *info, unsigned int cmd, ++ unsigned long arg) { struct bcm2708_fb *fb = to_bcm2708(info); -@@ -438,6 +544,9 @@ static int bcm2708_ioctl(struct fb_info + u32 dummy = 0; +@@ -451,6 +565,9 @@ static int bcm2708_ioctl(struct fb_info RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC, &dummy, sizeof(dummy)); break; @@ -154,7 +171,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma return -ENOTTY; --- a/drivers/video/fbdev/core/fbmem.c +++ b/drivers/video/fbdev/core/fbmem.c -@@ -1084,6 +1084,31 @@ fb_blank(struct fb_info *info, int blank +@@ -1081,6 +1081,31 @@ fb_blank(struct fb_info *info, int blank } EXPORT_SYMBOL(fb_blank); @@ -186,7 +203,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) { -@@ -1094,6 +1119,7 @@ static long do_fb_ioctl(struct fb_info * +@@ -1091,6 +1116,7 @@ static long do_fb_ioctl(struct fb_info * struct fb_cmap cmap_from; struct fb_cmap_user cmap; struct fb_event event; @@ -194,7 +211,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma void __user *argp = (void __user *)arg; long ret = 0; -@@ -1211,6 +1237,15 @@ static long do_fb_ioctl(struct fb_info * +@@ -1208,6 +1234,15 @@ static long do_fb_ioctl(struct fb_info * unlock_fb_info(info); console_unlock(); break; @@ -210,17 +227,17 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma default: if (!lock_fb_info(info)) return -ENODEV; -@@ -1365,6 +1400,7 @@ static long fb_compat_ioctl(struct file +@@ -1353,6 +1388,7 @@ static long fb_compat_ioctl(struct file case FBIOPAN_DISPLAY: case FBIOGET_CON2FBMAP: case FBIOPUT_CON2FBMAP: + case FBIOCOPYAREA: arg = (unsigned long) compat_ptr(arg); + /* fall through */ case FBIOBLANK: - ret = do_fb_ioctl(info, cmd, arg); --- a/include/uapi/linux/fb.h +++ b/include/uapi/linux/fb.h -@@ -34,6 +34,12 @@ +@@ -35,6 +35,12 @@ #define FBIOPUT_MODEINFO 0x4617 #define FBIOGET_DISPINFO 0x4618 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) @@ -233,7 +250,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma #define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */ #define FB_TYPE_PLANES 1 /* Non interleaved planes */ -@@ -346,6 +352,12 @@ struct fb_copyarea { +@@ -347,6 +353,12 @@ struct fb_copyarea { __u32 sy; }; diff --git a/target/linux/brcm2708/patches-4.9/950-0059-Added-Device-IDs-for-August-DVB-T-205.patch b/target/linux/brcm2708/patches-4.19/950-0060-Added-Device-IDs-for-August-DVB-T-205.patch similarity index 81% rename from target/linux/brcm2708/patches-4.9/950-0059-Added-Device-IDs-for-August-DVB-T-205.patch rename to target/linux/brcm2708/patches-4.19/950-0060-Added-Device-IDs-for-August-DVB-T-205.patch index a9906f3e3..bec94e102 100644 --- a/target/linux/brcm2708/patches-4.9/950-0059-Added-Device-IDs-for-August-DVB-T-205.patch +++ b/target/linux/brcm2708/patches-4.19/950-0060-Added-Device-IDs-for-August-DVB-T-205.patch @@ -1,7 +1,7 @@ -From 0d3a6a7484390def36773cb4fee0e16d6b8c45d1 Mon Sep 17 00:00:00 2001 +From 4052b5ba9b502747a6326b43e7f1437be36843b7 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Wed, 3 Jul 2013 00:54:08 +0100 -Subject: [PATCH] Added Device IDs for August DVB-T 205 +Subject: [PATCH 060/703] Added Device IDs for August DVB-T 205 --- drivers/media/usb/dvb-usb-v2/rtl28xxu.c | 4 ++++ @@ -9,7 +9,7 @@ Subject: [PATCH] Added Device IDs for August DVB-T 205 --- a/drivers/media/usb/dvb-usb-v2/rtl28xxu.c +++ b/drivers/media/usb/dvb-usb-v2/rtl28xxu.c -@@ -1916,6 +1916,10 @@ static const struct usb_device_id rtl28x +@@ -1917,6 +1917,10 @@ static const struct usb_device_id rtl28x &rtl28xxu_props, "Compro VideoMate U650F", NULL) }, { DVB_USB_DEVICE(USB_VID_KWORLD_2, 0xd394, &rtl28xxu_props, "MaxMedia HU394-T", NULL) }, diff --git a/target/linux/brcm2708/patches-4.9/950-0062-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch b/target/linux/brcm2708/patches-4.19/950-0061-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch similarity index 89% rename from target/linux/brcm2708/patches-4.9/950-0062-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch rename to target/linux/brcm2708/patches-4.19/950-0061-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch index 43ed3faa9..fa3feb6d8 100644 --- a/target/linux/brcm2708/patches-4.9/950-0062-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch +++ b/target/linux/brcm2708/patches-4.19/950-0061-rpi-ft5406-Add-touchscreen-driver-for-pi-LCD-display.patch @@ -1,7 +1,7 @@ -From 18c740925ca44b8a2f55ac201acf935f9fa97515 Mon Sep 17 00:00:00 2001 +From adc948965c7c2c52df7c93acffe5bd1d71dce462 Mon Sep 17 00:00:00 2001 From: Gordon Hollingworth Date: Tue, 12 May 2015 14:47:56 +0100 -Subject: [PATCH] rpi-ft5406: Add touchscreen driver for pi LCD display +Subject: [PATCH 061/703] rpi-ft5406: Add touchscreen driver for pi LCD display Fix driver detection failure Check that the buffer response is non-zero meaning the touchscreen was detected @@ -11,16 +11,15 @@ RPI-FT5406: Enable aarch64 support through explicit iomem interface Signed-off-by: Gerhard de Clercq --- - drivers/input/touchscreen/Kconfig | 7 + - drivers/input/touchscreen/Makefile | 1 + - drivers/input/touchscreen/rpi-ft5406.c | 292 +++++++++++++++++++++++++++++ - include/soc/bcm2835/raspberrypi-firmware.h | 1 + - 4 files changed, 301 insertions(+) + drivers/input/touchscreen/Kconfig | 7 + + drivers/input/touchscreen/Makefile | 1 + + drivers/input/touchscreen/rpi-ft5406.c | 292 +++++++++++++++++++++++++ + 3 files changed, 300 insertions(+) create mode 100644 drivers/input/touchscreen/rpi-ft5406.c --- a/drivers/input/touchscreen/Kconfig +++ b/drivers/input/touchscreen/Kconfig -@@ -638,6 +638,13 @@ config TOUCHSCREEN_EDT_FT5X06 +@@ -696,6 +696,13 @@ config TOUCHSCREEN_EDT_FT5X06 To compile this driver as a module, choose M here: the module will be called edt-ft5x06. @@ -36,7 +35,7 @@ Signed-off-by: Gerhard de Clercq depends on (SH_MIGOR || COMPILE_TEST) && I2C --- a/drivers/input/touchscreen/Makefile +++ b/drivers/input/touchscreen/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_TOUCHSCREEN_DA9034) += da90 +@@ -33,6 +33,7 @@ obj-$(CONFIG_TOUCHSCREEN_DA9034) += da90 obj-$(CONFIG_TOUCHSCREEN_DA9052) += da9052_tsi.o obj-$(CONFIG_TOUCHSCREEN_DYNAPRO) += dynapro.o obj-$(CONFIG_TOUCHSCREEN_EDT_FT5X06) += edt-ft5x06.o @@ -339,13 +338,3 @@ Signed-off-by: Gerhard de Clercq +MODULE_AUTHOR("Gordon Hollingworth"); +MODULE_DESCRIPTION("Touchscreen driver for memory based FT5406"); +MODULE_LICENSE("GPL"); ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -115,6 +115,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, - RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, - RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, - RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, - RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, - diff --git a/target/linux/brcm2708/patches-4.9/950-0063-Improve-__copy_to_user-and-__copy_from_user-performa.patch b/target/linux/brcm2708/patches-4.19/950-0062-Improve-__copy_to_user-and-__copy_from_user-performa.patch similarity index 96% rename from target/linux/brcm2708/patches-4.9/950-0063-Improve-__copy_to_user-and-__copy_from_user-performa.patch rename to target/linux/brcm2708/patches-4.19/950-0062-Improve-__copy_to_user-and-__copy_from_user-performa.patch index c1e5858bc..d022074b5 100644 --- a/target/linux/brcm2708/patches-4.9/950-0063-Improve-__copy_to_user-and-__copy_from_user-performa.patch +++ b/target/linux/brcm2708/patches-4.19/950-0062-Improve-__copy_to_user-and-__copy_from_user-performa.patch @@ -1,7 +1,8 @@ -From ebd731dd71ec9728a5a87ec1cd695be15828c32c Mon Sep 17 00:00:00 2001 +From e182f20d9faf1853dde2ab827a228011fa1dbc80 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 28 Nov 2016 16:50:04 +0000 -Subject: [PATCH] Improve __copy_to_user and __copy_from_user performance +Subject: [PATCH 062/703] Improve __copy_to_user and __copy_from_user + performance Provide a __copy_from_user that uses memcpy. On BCM2708, use optimised memcpy/memmove/memcmp/memset implementations. @@ -21,18 +22,18 @@ Signed-off-by: Phil Elwell --- arch/arm/include/asm/string.h | 5 + arch/arm/include/asm/uaccess.h | 3 + - arch/arm/lib/Makefile | 15 +- - arch/arm/lib/arm-mem.h | 159 ++++++++++++ + arch/arm/lib/Makefile | 14 +- + arch/arm/lib/arm-mem.h | 159 +++++++++ arch/arm/lib/copy_from_user.S | 4 +- arch/arm/lib/exports_rpi.c | 37 +++ - arch/arm/lib/memcmp_rpi.S | 285 +++++++++++++++++++++ - arch/arm/lib/memcpy_rpi.S | 61 +++++ - arch/arm/lib/memcpymove.h | 506 +++++++++++++++++++++++++++++++++++++ - arch/arm/lib/memmove_rpi.S | 61 +++++ - arch/arm/lib/memset_rpi.S | 123 +++++++++ - arch/arm/lib/uaccess_with_memcpy.c | 120 ++++++++- + arch/arm/lib/memcmp_rpi.S | 285 ++++++++++++++++ + arch/arm/lib/memcpy_rpi.S | 61 ++++ + arch/arm/lib/memcpymove.h | 506 +++++++++++++++++++++++++++++ + arch/arm/lib/memmove_rpi.S | 61 ++++ + arch/arm/lib/memset_rpi.S | 128 ++++++++ + arch/arm/lib/uaccess_with_memcpy.c | 120 ++++++- arch/arm/mach-bcm/Kconfig | 7 + - 13 files changed, 1380 insertions(+), 6 deletions(-) + 13 files changed, 1385 insertions(+), 5 deletions(-) create mode 100644 arch/arm/lib/arm-mem.h create mode 100644 arch/arm/lib/exports_rpi.c create mode 100644 arch/arm/lib/memcmp_rpi.S @@ -43,21 +44,19 @@ Signed-off-by: Phil Elwell --- a/arch/arm/include/asm/string.h +++ b/arch/arm/include/asm/string.h -@@ -24,6 +24,11 @@ extern void * memchr(const void *, int, - #define __HAVE_ARCH_MEMSET - extern void * memset(void *, int, __kernel_size_t); +@@ -39,4 +39,9 @@ static inline void *memset64(uint64_t *p + return __memset64(p, v, n * 8, v >> 32); + } +#ifdef CONFIG_BCM2835_FAST_MEMCPY +#define __HAVE_ARCH_MEMCMP +extern int memcmp(const void *, const void *, size_t); +#endif + - extern void __memzero(void *ptr, __kernel_size_t n); - - #define memset(p,v,n) \ + #endif --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h -@@ -489,6 +489,9 @@ do { \ +@@ -496,6 +496,9 @@ do { \ extern unsigned long __must_check arm_copy_from_user(void *to, const void __user *from, unsigned long n); @@ -65,23 +64,22 @@ Signed-off-by: Phil Elwell +__copy_from_user_std(void *to, const void __user *from, unsigned long n); + static inline unsigned long __must_check - __arch_copy_from_user(void *to, const void __user *from, unsigned long n) + raw_copy_from_user(void *to, const void __user *from, unsigned long n) { --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile -@@ -6,9 +6,8 @@ +@@ -7,8 +7,8 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ csumpartialcopy.o csumpartialcopyuser.o clearbit.o \ - delay.o delay-loop.o findbit.o memchr.o memcpy.o \ -- memmove.o memset.o memzero.o setbit.o \ -- strchr.o strrchr.o \ -+ delay.o delay-loop.o findbit.o memchr.o memzero.o \ -+ setbit.o strchr.o strrchr.o \ +- memmove.o memset.o setbit.o \ ++ delay.o delay-loop.o findbit.o memchr.o \ ++ setbit.o \ + strchr.o strrchr.o \ testchangebit.o testclearbit.o testsetbit.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ - ucmpdi2.o lib1funcs.o div64.o \ -@@ -18,6 +17,16 @@ lib-y := backtrace.o changebit.o csumip +@@ -19,6 +19,16 @@ lib-y := backtrace.o changebit.o csumip mmu-y := clear_user.o copy_page.o getuser.o putuser.o \ copy_from_user.o copy_to_user.o @@ -272,11 +270,10 @@ Signed-off-by: Phil Elwell #ifdef CONFIG_CPU_SPECTRE get_thread_info r3 ldr r3, [r3, #TI_ADDR_LIMIT] -@@ -102,7 +103,7 @@ ENTRY(arm_copy_from_user) - +@@ -99,6 +100,7 @@ ENTRY(arm_copy_from_user) #include "copy_template.S" --ENDPROC(arm_copy_from_user) + ENDPROC(arm_copy_from_user) +ENDPROC(__copy_from_user_std) .pushsection .fixup,"ax" @@ -1248,7 +1245,7 @@ Signed-off-by: Phil Elwell +ENDPROC(memmove) --- /dev/null +++ b/arch/arm/lib/memset_rpi.S -@@ -0,0 +1,123 @@ +@@ -0,0 +1,128 @@ +/* +Copyright (c) 2013, Raspberry Pi Foundation +Copyright (c) 2013, RISC OS Open Ltd @@ -1303,6 +1300,9 @@ Signed-off-by: Phil Elwell + */ +ENTRY(mmioset) +ENTRY(memset) ++ENTRY(__memset32) ++ENTRY(__memset64) ++ + S .req a1 + DAT0 .req a2 + N .req a3 @@ -1310,9 +1310,9 @@ Signed-off-by: Phil Elwell + DAT2 .req ip + DAT3 .req lr + -+ orr DAT0, DAT0, lsl #8 ++ orr DAT0, DAT0, DAT0, lsl #8 + push {S, lr} -+ orr DAT0, DAT0, lsl #16 ++ orr DAT0, DAT0, DAT0, lsl #16 + mov DAT1, DAT0 + + /* See if we're guaranteed to have at least one 16-byte aligned 16-byte write */ @@ -1370,6 +1370,8 @@ Signed-off-by: Phil Elwell + .unreq DAT1 + .unreq DAT2 + .unreq DAT3 ++ENDPROC(__memset64) ++ENDPROC(__memset32) +ENDPROC(memset) +ENDPROC(mmioset) --- a/arch/arm/lib/uaccess_with_memcpy.c @@ -1502,7 +1504,7 @@ Signed-off-by: Phil Elwell unsigned long ua_flags = uaccess_save_and_enable(); n = __copy_to_user_std(to, from, n); uaccess_restore(ua_flags); -@@ -156,6 +252,26 @@ arm_copy_to_user(void __user *to, const +@@ -157,6 +253,26 @@ arm_copy_to_user(void __user *to, const } return n; } @@ -1531,7 +1533,7 @@ Signed-off-by: Phil Elwell __clear_user_memset(void __user *addr, unsigned long n) --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig -@@ -174,6 +174,13 @@ config ARCH_BCM_53573 +@@ -187,6 +187,13 @@ config ARCH_BCM_53573 The base chip is BCM53573 and there are some packaging modifications like BCM47189 and BCM47452. diff --git a/target/linux/brcm2708/patches-4.9/950-0064-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch b/target/linux/brcm2708/patches-4.19/950-0063-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0064-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch rename to target/linux/brcm2708/patches-4.19/950-0063-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch index 5d73a2824..affb4c3fc 100644 --- a/target/linux/brcm2708/patches-4.9/950-0064-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch +++ b/target/linux/brcm2708/patches-4.19/950-0063-gpio-poweroff-Allow-it-to-work-on-Raspberry-Pi.patch @@ -1,7 +1,7 @@ -From 7e8bb86739df17e38a0ebe6e17b7a9056ab421e9 Mon Sep 17 00:00:00 2001 +From 985bdee303c68ce16a6ad0b0e317c86b9669ab1a Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 25 Jun 2015 12:16:11 +0100 -Subject: [PATCH] gpio-poweroff: Allow it to work on Raspberry Pi +Subject: [PATCH 063/703] gpio-poweroff: Allow it to work on Raspberry Pi The Raspberry Pi firmware manages the power-down and reboot process. To do this it installs a pm_power_off handler, causing @@ -20,7 +20,7 @@ of the trigger signal may be preferable. --- a/drivers/power/reset/gpio-poweroff.c +++ b/drivers/power/reset/gpio-poweroff.c -@@ -49,9 +49,11 @@ static int gpio_poweroff_probe(struct pl +@@ -51,9 +51,11 @@ static int gpio_poweroff_probe(struct pl { bool input = false; enum gpiod_flags flags; diff --git a/target/linux/brcm2708/patches-4.9/950-0065-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch b/target/linux/brcm2708/patches-4.19/950-0064-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch similarity index 95% rename from target/linux/brcm2708/patches-4.9/950-0065-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0064-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch index b5ae3f954..cfe30fc10 100644 --- a/target/linux/brcm2708/patches-4.9/950-0065-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0064-mfd-Add-Raspberry-Pi-Sense-HAT-core-driver.patch @@ -1,22 +1,22 @@ -From 157f59328885549a0f2c1fe35e9ec3aff0f0b52e Mon Sep 17 00:00:00 2001 +From cc60f52641f8debefb1c37b59379ccdc84e1938f Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 14 Jul 2015 14:32:47 +0100 -Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver +Subject: [PATCH 064/703] mfd: Add Raspberry Pi Sense HAT core driver --- drivers/input/joystick/Kconfig | 8 + drivers/input/joystick/Makefile | 1 + - drivers/input/joystick/rpisense-js.c | 153 ++++++++++++++++ + drivers/input/joystick/rpisense-js.c | 153 ++++++++++++ drivers/mfd/Kconfig | 8 + - drivers/mfd/Makefile | 1 + - drivers/mfd/rpisense-core.c | 157 +++++++++++++++++ - drivers/video/fbdev/Kconfig | 13 ++ + drivers/mfd/Makefile | 2 +- + drivers/mfd/rpisense-core.c | 157 ++++++++++++ + drivers/video/fbdev/Kconfig | 13 + drivers/video/fbdev/Makefile | 1 + - drivers/video/fbdev/rpisense-fb.c | 293 +++++++++++++++++++++++++++++++ - include/linux/mfd/rpisense/core.h | 47 +++++ - include/linux/mfd/rpisense/framebuffer.h | 32 ++++ - include/linux/mfd/rpisense/joystick.h | 35 ++++ - 12 files changed, 749 insertions(+) + drivers/video/fbdev/rpisense-fb.c | 293 +++++++++++++++++++++++ + include/linux/mfd/rpisense/core.h | 47 ++++ + include/linux/mfd/rpisense/framebuffer.h | 32 +++ + include/linux/mfd/rpisense/joystick.h | 35 +++ + 12 files changed, 749 insertions(+), 1 deletion(-) create mode 100644 drivers/input/joystick/rpisense-js.c create mode 100644 drivers/mfd/rpisense-core.c create mode 100644 drivers/video/fbdev/rpisense-fb.c @@ -26,9 +26,9 @@ Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver --- a/drivers/input/joystick/Kconfig +++ b/drivers/input/joystick/Kconfig -@@ -330,4 +330,12 @@ config JOYSTICK_MAPLE - To compile this as a module choose M here: the module will be called - maplecontrol. +@@ -361,4 +361,12 @@ config JOYSTICK_PXRC + To compile this driver as a module, choose M here: the + module will be called pxrc. +config JOYSTICK_RPISENSE + tristate "Raspberry Pi Sense HAT joystick" @@ -41,7 +41,7 @@ Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver endif --- a/drivers/input/joystick/Makefile +++ b/drivers/input/joystick/Makefile -@@ -32,4 +32,5 @@ obj-$(CONFIG_JOYSTICK_WARRIOR) += warri +@@ -35,4 +35,5 @@ obj-$(CONFIG_JOYSTICK_WARRIOR) += warri obj-$(CONFIG_JOYSTICK_XPAD) += xpad.o obj-$(CONFIG_JOYSTICK_ZHENHUA) += zhenhua.o obj-$(CONFIG_JOYSTICK_WALKERA0701) += walkera0701.o @@ -222,10 +222,11 @@ Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver select MFD_CORE --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile -@@ -211,3 +211,4 @@ obj-$(CONFIG_INTEL_SOC_PMIC) += intel-so - obj-$(CONFIG_MFD_MT6397) += mt6397-core.o - - obj-$(CONFIG_MFD_ALTERA_A10SR) += altera-a10sr.o +@@ -240,4 +240,4 @@ obj-$(CONFIG_MFD_MXS_LRADC) += mxs-l + obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o + obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o + obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o +- +obj-$(CONFIG_MFD_RPISENSE_CORE) += rpisense-core.o --- /dev/null +++ b/drivers/mfd/rpisense-core.c @@ -389,7 +390,7 @@ Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver + --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig -@@ -2504,3 +2504,16 @@ config FB_SM712 +@@ -2355,3 +2355,16 @@ config FB_SM712 This driver is also available as a module. The module will be called sm712fb. If you want to compile it as a module, say M here and read . @@ -408,7 +409,7 @@ Subject: [PATCH] mfd: Add Raspberry Pi Sense HAT core driver + This is the framebuffer driver for the Raspberry Pi Sense HAT --- a/drivers/video/fbdev/Makefile +++ b/drivers/video/fbdev/Makefile -@@ -147,6 +147,7 @@ obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o +@@ -138,6 +138,7 @@ obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o obj-$(CONFIG_FB_MXS) += mxsfb.o obj-$(CONFIG_FB_SSD1307) += ssd1307fb.o obj-$(CONFIG_FB_SIMPLE) += simplefb.o diff --git a/target/linux/brcm2708/patches-4.19/950-0065-ASoC-pcm512x-implement-set_tdm_slot-interface.patch b/target/linux/brcm2708/patches-4.19/950-0065-ASoC-pcm512x-implement-set_tdm_slot-interface.patch new file mode 100644 index 000000000..1d0b76a3b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0065-ASoC-pcm512x-implement-set_tdm_slot-interface.patch @@ -0,0 +1,80 @@ +From 099cc7ff40bca5c9203100aaca2ab69bc7b669ac Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Thu, 22 Feb 2018 11:55:06 +0100 +Subject: [PATCH 065/703] ASoC: pcm512x: implement set_tdm_slot interface + +PCM512x can accept data padded with additional BCLK cycles +but the driver currently lacks an interface to configure this. + +This leads to the problem that S24_LE format in master mode +can result in non-integer clock divisors and pcm512x running +at a rather off rate. + +For example 48kHz with 48fs BCLK and SCLK at 24.576MHz uses +a divisor of 10 (rounded down from 10.6666) and results in a +51.2kHz LRCLK. With 64fs BCLK a divisor of 8 is used and +LRCLK runs at exactly 48kHz. + +Fix this by providing a minimal set_tdm_slot implementation +so machine drivers can optionally configure custom BCLK ratios. + +Signed-off-by: Matthias Reichl +--- + sound/soc/codecs/pcm512x.c | 28 +++++++++++++++++++++++++++- + 1 file changed, 27 insertions(+), 1 deletion(-) + +--- a/sound/soc/codecs/pcm512x.c ++++ b/sound/soc/codecs/pcm512x.c +@@ -53,6 +53,7 @@ struct pcm512x_priv { + unsigned long overclock_pll; + unsigned long overclock_dac; + unsigned long overclock_dsp; ++ int lrclk_div; + }; + + /* +@@ -851,7 +852,10 @@ static int pcm512x_set_dividers(struct s + int fssp; + int gpio; + +- lrclk_div = snd_soc_params_to_frame_size(params); ++ if (pcm512x->lrclk_div) ++ lrclk_div = pcm512x->lrclk_div; ++ else ++ lrclk_div = snd_soc_params_to_frame_size(params); + if (lrclk_div == 0) { + dev_err(dev, "No LRCLK?\n"); + return -EINVAL; +@@ -1319,10 +1323,32 @@ static int pcm512x_set_fmt(struct snd_so + return 0; + } + ++static int pcm512x_set_tdm_slot(struct snd_soc_dai *dai, ++ unsigned int tx_mask, unsigned int rx_mask, ++ int slots, int width) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ ++ switch (slots) { ++ case 0: ++ pcm512x->lrclk_div = 0; ++ return 0; ++ case 2: ++ if (tx_mask != 0x03 || rx_mask != 0x03) ++ return -EINVAL; ++ pcm512x->lrclk_div = slots * width; ++ return 0; ++ default: ++ return -EINVAL; ++ } ++} ++ + static const struct snd_soc_dai_ops pcm512x_dai_ops = { + .startup = pcm512x_dai_startup, + .hw_params = pcm512x_hw_params, + .set_fmt = pcm512x_set_fmt, ++ .set_tdm_slot = pcm512x_set_tdm_slot, + }; + + static struct snd_soc_dai_driver pcm512x_dai = { diff --git a/target/linux/brcm2708/patches-4.19/950-0066-ASoC-Add-support-for-Rpi-DAC.patch b/target/linux/brcm2708/patches-4.19/950-0066-ASoC-Add-support-for-Rpi-DAC.patch new file mode 100644 index 000000000..d4225de82 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0066-ASoC-Add-support-for-Rpi-DAC.patch @@ -0,0 +1,123 @@ +From 2112d06f09c1ecd601de065351bc60b08fc53bca Mon Sep 17 00:00:00 2001 +From: Florian Meier +Date: Mon, 25 Jan 2016 15:48:59 +0000 +Subject: [PATCH 066/703] ASoC: Add support for Rpi-DAC + +--- + sound/soc/codecs/Kconfig | 5 +++ + sound/soc/codecs/Makefile | 2 ++ + sound/soc/codecs/pcm1794a.c | 69 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 76 insertions(+) + create mode 100644 sound/soc/codecs/pcm1794a.c + +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -118,6 +118,7 @@ config SND_SOC_ALL_CODECS + select SND_SOC_PCM179X_SPI if SPI_MASTER + select SND_SOC_PCM186X_I2C if I2C + select SND_SOC_PCM186X_SPI if SPI_MASTER ++ select SND_SOC_PCM1794A if I2C + select SND_SOC_PCM3008 + select SND_SOC_PCM3168A_I2C if I2C + select SND_SOC_PCM3168A_SPI if SPI_MASTER +@@ -834,6 +835,10 @@ config SND_SOC_RT5616 + tristate "Realtek RT5616 CODEC" + depends on I2C + ++config SND_SOC_PCM1794A ++ tristate ++ depends on I2C ++ + config SND_SOC_RT5631 + tristate "Realtek ALC5631/RT5631 CODEC" + depends on I2C +--- a/sound/soc/codecs/Makefile ++++ b/sound/soc/codecs/Makefile +@@ -118,6 +118,7 @@ snd-soc-pcm179x-spi-objs := pcm179x-spi. + snd-soc-pcm186x-objs := pcm186x.o + snd-soc-pcm186x-i2c-objs := pcm186x-i2c.o + snd-soc-pcm186x-spi-objs := pcm186x-spi.o ++snd-soc-pcm1794a-objs := pcm1794a.o + snd-soc-pcm3008-objs := pcm3008.o + snd-soc-pcm3168a-objs := pcm3168a.o + snd-soc-pcm3168a-i2c-objs := pcm3168a-i2c.o +@@ -386,6 +387,7 @@ obj-$(CONFIG_SND_SOC_PCM5102A) += snd-so + obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o + obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o + obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o ++obj-$(CONFIG_SND_SOC_PCM1794A) += snd-soc-pcm1794a.o + obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o + obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o + obj-$(CONFIG_SND_SOC_RT1305) += snd-soc-rt1305.o +--- /dev/null ++++ b/sound/soc/codecs/pcm1794a.c +@@ -0,0 +1,69 @@ ++/* ++ * Driver for the PCM1794A codec ++ * ++ * Author: Florian Meier ++ * Copyright 2013 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++ ++#include ++#include ++#include ++ ++#include ++ ++static struct snd_soc_dai_driver pcm1794a_dai = { ++ .name = "pcm1794a-hifi", ++ .playback = { ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_8000_192000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE ++ }, ++}; ++ ++static struct snd_soc_component_driver soc_component_dev_pcm1794a; ++ ++static int pcm1794a_probe(struct platform_device *pdev) ++{ ++ return snd_soc_register_component(&pdev->dev, &soc_component_dev_pcm1794a, ++ &pcm1794a_dai, 1); ++} ++ ++static int pcm1794a_remove(struct platform_device *pdev) ++{ ++ snd_soc_unregister_component(&pdev->dev); ++ return 0; ++} ++ ++static const struct of_device_id pcm1794a_of_match[] = { ++ { .compatible = "ti,pcm1794a", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, pcm1794a_of_match); ++ ++static struct platform_driver pcm1794a_component_driver = { ++ .probe = pcm1794a_probe, ++ .remove = pcm1794a_remove, ++ .driver = { ++ .name = "pcm1794a-codec", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(pcm1794a_of_match), ++ }, ++}; ++ ++module_platform_driver(pcm1794a_component_driver); ++ ++MODULE_DESCRIPTION("ASoC PCM1794A codec driver"); ++MODULE_AUTHOR("Florian Meier "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0070-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch b/target/linux/brcm2708/patches-4.19/950-0067-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch similarity index 79% rename from target/linux/brcm2708/patches-4.9/950-0070-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch rename to target/linux/brcm2708/patches-4.19/950-0067-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch index 08bf856c9..2b4a1302a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0070-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch +++ b/target/linux/brcm2708/patches-4.19/950-0067-Add-IQaudIO-Sound-Card-support-for-Raspberry-Pi.patch @@ -1,7 +1,7 @@ -From fcfe9087b79176b5d8afd0ecc4c66013866ef239 Mon Sep 17 00:00:00 2001 +From c8aa8a71618c103d09ae7fa05d5f65c111581194 Mon Sep 17 00:00:00 2001 From: Gordon Garrity Date: Sat, 8 Mar 2014 16:56:57 +0000 -Subject: [PATCH] Add IQaudIO Sound Card support for Raspberry Pi +Subject: [PATCH 067/703] Add IQaudIO Sound Card support for Raspberry Pi Set a limit of 0dB on Digital Volume Control @@ -54,41 +54,21 @@ Revision 6, don't attempt to "one-shot" unmute amp, unless card is successfully registered. Signed-off-by: DigitalDreamtime + +ASoC: iqaudio-dac: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Signed-off-by: Matthias Reichl --- - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/iqaudio-dac.c | 234 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 243 insertions(+) + sound/soc/bcm/iqaudio-dac.c | 221 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 221 insertions(+) create mode 100644 sound/soc/bcm/iqaudio-dac.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -37,3 +37,10 @@ config SND_BCM2708_SOC_RPI_DAC - select SND_SOC_PCM1794A - help - Say Y or M if you want to add support for RPi-DAC. -+ -+config SND_BCM2708_SOC_IQAUDIO_DAC -+ tristate "Support for IQaudIO-DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM512x_I2C -+ help -+ Say Y or M if you want to add support for IQaudIO-DAC. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -12,7 +12,9 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- - snd-soc-hifiberry-dac-objs := hifiberry_dac.o - snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-rpi-dac-objs := rpi-dac.o -+snd-soc-iqaudio-dac-objs := iqaudio-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o --- /dev/null +++ b/sound/soc/bcm/iqaudio-dac.c -@@ -0,0 +1,234 @@ +@@ -0,0 +1,221 @@ +/* + * ASoC Driver for IQaudIO DAC + * @@ -134,18 +114,6 @@ Signed-off-by: DigitalDreamtime + return 0; +} + -+static int snd_rpi_iqaudio_dac_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ +static void snd_rpi_iqaudio_gpio_mute(struct snd_soc_card *card) +{ + if (mute_gpio) { @@ -167,7 +135,11 @@ Signed-off-by: DigitalDreamtime +static int snd_rpi_iqaudio_set_bias_level(struct snd_soc_card *card, + struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) +{ -+ struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai; ++ struct snd_soc_pcm_runtime *rtd; ++ struct snd_soc_dai *codec_dai; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ codec_dai = rtd->codec_dai; + + if (dapm->dev != codec_dai->dev) + return 0; @@ -196,11 +168,6 @@ Signed-off-by: DigitalDreamtime + return 0; +} + -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_iqaudio_dac_ops = { -+ .hw_params = snd_rpi_iqaudio_dac_hw_params, -+}; -+ +static struct snd_soc_dai_link snd_rpi_iqaudio_dac_dai[] = { +{ + .cpu_dai_name = "bcm2708-i2s.0", @@ -209,7 +176,6 @@ Signed-off-by: DigitalDreamtime + .codec_name = "pcm512x.1-004c", + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_iqaudio_dac_ops, + .init = snd_rpi_iqaudio_dac_init, +}, +}; @@ -284,8 +250,9 @@ Signed-off-by: DigitalDreamtime + + ret = snd_soc_register_card(&snd_rpi_iqaudio_dac); + if (ret) { -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); + return ret; + } + diff --git a/target/linux/brcm2708/patches-4.9/950-0072-Added-support-for-HiFiBerry-DAC.patch b/target/linux/brcm2708/patches-4.19/950-0068-Added-support-for-HiFiBerry-DAC.patch similarity index 72% rename from target/linux/brcm2708/patches-4.9/950-0072-Added-support-for-HiFiBerry-DAC.patch rename to target/linux/brcm2708/patches-4.19/950-0068-Added-support-for-HiFiBerry-DAC.patch index 21d30af47..4e37f19c6 100644 --- a/target/linux/brcm2708/patches-4.9/950-0072-Added-support-for-HiFiBerry-DAC.patch +++ b/target/linux/brcm2708/patches-4.19/950-0068-Added-support-for-HiFiBerry-DAC.patch @@ -1,7 +1,7 @@ -From 9c6b8bd0db7564a2124290e3bc30215906371fa9 Mon Sep 17 00:00:00 2001 +From c383086fd519fcf61f3c5a35e937685f6f34832e Mon Sep 17 00:00:00 2001 From: Daniel Matuschek Date: Mon, 4 Aug 2014 10:06:56 +0200 -Subject: [PATCH] Added support for HiFiBerry DAC+ +Subject: [PATCH 068/703] Added support for HiFiBerry DAC+ The driver is based on the HiFiBerry DAC driver. However HiFiBerry DAC+ uses a different codec chip (PCM5122), therefore a new driver is necessary. @@ -26,26 +26,54 @@ Add 'slave' param to use HiFiBerry DAC+ Pro in slave mode, with Pi as master for bit and frame clock. Signed-off-by: DigitalDreamtime + +Fixed a bug when using 352.8kHz sample rate + +Signed-off-by: Daniel Matuschek + +ASoC: pcm512x: revert downstream changes + +This partially reverts commit 185ea05465aac8bf02a0d2b2f4289d42c72870b7 +which was added by https://github.com/raspberrypi/linux/pull/1152 + +The downstream pcm512x changes caused a regression, it broke normal +use of the 24bit format with the codec, eg when using simple-audio-card. + +The actual bug with 24bit playback is the incorrect usage +of physical_width in various drivers in the downstream tree +which causes 24bit data to be transmitted with 32 clock +cycles. So it's not the pcm512x that needs fixing, it's the +soundcard drivers. + +Signed-off-by: Matthias Reichl + +ASoC: hifiberry_dacplus: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Signed-off-by: Matthias Reichl + +ASoC: hifiberry_dacplus: transmit S24_LE with 64 BCLK cycles + +Signed-off-by: Matthias Reichl --- drivers/clk/Makefile | 1 + - drivers/clk/clk-hifiberry-dacpro.c | 160 +++++++++++++++++ - sound/soc/bcm/Kconfig | 7 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/hifiberry_dacplus.c | 359 +++++++++++++++++++++++++++++++++++++ - sound/soc/codecs/pcm512x.c | 3 +- - 6 files changed, 531 insertions(+), 1 deletion(-) + drivers/clk/clk-hifiberry-dacpro.c | 160 +++++++++++++ + sound/soc/bcm/hifiberry_dacplus.c | 352 +++++++++++++++++++++++++++++ + 3 files changed, 513 insertions(+) create mode 100644 drivers/clk/clk-hifiberry-dacpro.c create mode 100644 sound/soc/bcm/hifiberry_dacplus.c --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_ARCH_CLPS711X) += clk-clps - obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o - obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o +@@ -30,6 +30,7 @@ obj-$(CONFIG_COMMON_CLK_GEMINI) += clk- + obj-$(CONFIG_COMMON_CLK_ASPEED) += clk-aspeed.o obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o + obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o +obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += clk-hifiberry-dacpro.o obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o - obj-$(CONFIG_ARCH_MB86S7X) += clk-mb86s7x.o + obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o --- /dev/null +++ b/drivers/clk/clk-hifiberry-dacpro.c @@ -210,41 +238,9 @@ Signed-off-by: DigitalDreamtime +MODULE_DESCRIPTION("HiFiBerry DAC Pro clock driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:clk-hifiberry-dacpro"); ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -24,6 +24,13 @@ config SND_BCM2708_SOC_HIFIBERRY_DAC - help - Say Y or M if you want to add support for HifiBerry DAC. - -+config SND_BCM2708_SOC_HIFIBERRY_DACPLUS -+ tristate "Support for HifiBerry DAC+" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM512x -+ help -+ Say Y or M if you want to add support for HifiBerry DAC+. -+ - config SND_BCM2708_SOC_HIFIBERRY_DIGI - tristate "Support for HifiBerry Digi" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -10,11 +10,13 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- - - # BCM2708 Machine Support - snd-soc-hifiberry-dac-objs := hifiberry_dac.o -+snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o - snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o --- /dev/null +++ b/sound/soc/bcm/hifiberry_dacplus.c -@@ -0,0 +1,359 @@ +@@ -0,0 +1,352 @@ +/* + * ASoC Driver for HiFiBerry DAC+ / DAC Pro + * @@ -298,58 +294,58 @@ Signed-off-by: DigitalDreamtime +static bool snd_rpi_hifiberry_is_dacpro; +static bool digital_gain_0db_limit = true; + -+static void snd_rpi_hifiberry_dacplus_select_clk(struct snd_soc_codec *codec, ++static void snd_rpi_hifiberry_dacplus_select_clk(struct snd_soc_component *component, + int clk_id) +{ + switch (clk_id) { + case HIFIBERRY_DACPRO_NOCLOCK: -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x24, 0x00); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x00); + break; + case HIFIBERRY_DACPRO_CLK44EN: -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x24, 0x20); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x20); + break; + case HIFIBERRY_DACPRO_CLK48EN: -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x24, 0x04); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x04); + break; + } +} + -+static void snd_rpi_hifiberry_dacplus_clk_gpio(struct snd_soc_codec *codec) ++static void snd_rpi_hifiberry_dacplus_clk_gpio(struct snd_soc_component *component) +{ -+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x24, 0x24); -+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_3, 0x0f, 0x02); -+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_6, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x24, 0x24); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_3, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_6, 0x0f, 0x02); +} + -+static bool snd_rpi_hifiberry_dacplus_is_sclk(struct snd_soc_codec *codec) ++static bool snd_rpi_hifiberry_dacplus_is_sclk(struct snd_soc_component *component) +{ -+ int sck; ++ unsigned int sck; + -+ sck = snd_soc_read(codec, PCM512x_RATE_DET_4); ++ snd_soc_component_read(component, PCM512x_RATE_DET_4, &sck); + return (!(sck & 0x40)); +} + +static bool snd_rpi_hifiberry_dacplus_is_sclk_sleep( -+ struct snd_soc_codec *codec) ++ struct snd_soc_component *component) +{ + msleep(2); -+ return snd_rpi_hifiberry_dacplus_is_sclk(codec); ++ return snd_rpi_hifiberry_dacplus_is_sclk(component); +} + -+static bool snd_rpi_hifiberry_dacplus_is_pro_card(struct snd_soc_codec *codec) ++static bool snd_rpi_hifiberry_dacplus_is_pro_card(struct snd_soc_component *component) +{ + bool isClk44EN, isClk48En, isNoClk; + -+ snd_rpi_hifiberry_dacplus_clk_gpio(codec); ++ snd_rpi_hifiberry_dacplus_clk_gpio(component); + -+ snd_rpi_hifiberry_dacplus_select_clk(codec, HIFIBERRY_DACPRO_CLK44EN); -+ isClk44EN = snd_rpi_hifiberry_dacplus_is_sclk_sleep(codec); ++ snd_rpi_hifiberry_dacplus_select_clk(component, HIFIBERRY_DACPRO_CLK44EN); ++ isClk44EN = snd_rpi_hifiberry_dacplus_is_sclk_sleep(component); + -+ snd_rpi_hifiberry_dacplus_select_clk(codec, HIFIBERRY_DACPRO_NOCLOCK); -+ isNoClk = snd_rpi_hifiberry_dacplus_is_sclk_sleep(codec); ++ snd_rpi_hifiberry_dacplus_select_clk(component, HIFIBERRY_DACPRO_NOCLOCK); ++ isNoClk = snd_rpi_hifiberry_dacplus_is_sclk_sleep(component); + -+ snd_rpi_hifiberry_dacplus_select_clk(codec, HIFIBERRY_DACPRO_CLK48EN); -+ isClk48En = snd_rpi_hifiberry_dacplus_is_sclk_sleep(codec); ++ snd_rpi_hifiberry_dacplus_select_clk(component, HIFIBERRY_DACPRO_CLK48EN); ++ isClk48En = snd_rpi_hifiberry_dacplus_is_sclk_sleep(component); + + return (isClk44EN && isClk48En && !isNoClk); +} @@ -364,6 +360,7 @@ Signed-off-by: DigitalDreamtime + case 44100: + case 88200: + case 176400: ++ case 352800: + type = HIFIBERRY_DACPRO_CLK44EN; + break; + default: @@ -373,10 +370,10 @@ Signed-off-by: DigitalDreamtime + return type; +} + -+static void snd_rpi_hifiberry_dacplus_set_sclk(struct snd_soc_codec *codec, ++static void snd_rpi_hifiberry_dacplus_set_sclk(struct snd_soc_component *component, + int sample_rate) +{ -+ struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec); ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); + + if (!IS_ERR(pcm512x->sclk)) { + int ctype; @@ -384,20 +381,20 @@ Signed-off-by: DigitalDreamtime + ctype = snd_rpi_hifiberry_dacplus_clk_for_rate(sample_rate); + clk_set_rate(pcm512x->sclk, (ctype == HIFIBERRY_DACPRO_CLK44EN) + ? CLK_44EN_RATE : CLK_48EN_RATE); -+ snd_rpi_hifiberry_dacplus_select_clk(codec, ctype); ++ snd_rpi_hifiberry_dacplus_select_clk(component, ctype); + } +} + +static int snd_rpi_hifiberry_dacplus_init(struct snd_soc_pcm_runtime *rtd) +{ -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + struct pcm512x_priv *priv; + + if (slave) + snd_rpi_hifiberry_is_dacpro = false; + else + snd_rpi_hifiberry_is_dacpro = -+ snd_rpi_hifiberry_dacplus_is_pro_card(codec); ++ snd_rpi_hifiberry_dacplus_is_pro_card(component); + + if (snd_rpi_hifiberry_is_dacpro) { + struct snd_soc_dai_link *dai = rtd->dai_link; @@ -407,17 +404,17 @@ Signed-off-by: DigitalDreamtime + dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF + | SND_SOC_DAIFMT_CBM_CFM; + -+ snd_soc_update_bits(codec, PCM512x_BCLK_LRCLK_CFG, 0x31, 0x11); -+ snd_soc_update_bits(codec, PCM512x_MASTER_MODE, 0x03, 0x03); -+ snd_soc_update_bits(codec, PCM512x_MASTER_CLKDIV_2, 0x7f, 63); ++ snd_soc_component_update_bits(component, PCM512x_BCLK_LRCLK_CFG, 0x31, 0x11); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_MODE, 0x03, 0x03); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_CLKDIV_2, 0x7f, 63); + } else { -+ priv = snd_soc_codec_get_drvdata(codec); ++ priv = snd_soc_component_get_drvdata(component); + priv->sclk = ERR_PTR(-ENOENT); + } + -+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08); -+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + + if (digital_gain_0db_limit) + { @@ -436,8 +433,8 @@ Signed-off-by: DigitalDreamtime + struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec); ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); + struct snd_ratnum *rats_no_pll; + unsigned int num = 0, den = 0; + int err; @@ -462,35 +459,32 @@ Signed-off-by: DigitalDreamtime + return 0; +} + -+static int snd_rpi_hifiberry_dacplus_set_bclk_ratio_pro( -+ struct snd_soc_dai *cpu_dai, struct snd_pcm_hw_params *params) -+{ -+ int bratio = snd_pcm_format_physical_width(params_format(params)) -+ * params_channels(params); -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, bratio); -+} -+ +static int snd_rpi_hifiberry_dacplus_hw_params( + struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) +{ -+ int ret; ++ int ret = 0; + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ int channels = params_channels(params); ++ int width = 32; + + if (snd_rpi_hifiberry_is_dacpro) { -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + -+ snd_rpi_hifiberry_dacplus_set_sclk(codec, ++ width = snd_pcm_format_physical_width(params_format(params)); ++ ++ snd_rpi_hifiberry_dacplus_set_sclk(component, + params_rate(params)); + -+ ret = snd_rpi_hifiberry_dacplus_set_bclk_ratio_pro(cpu_dai, -+ params); -+ if (!ret) -+ ret = snd_rpi_hifiberry_dacplus_update_rate_den( -+ substream, params); -+ } else { -+ ret = snd_soc_dai_set_bclk_ratio(cpu_dai, 64); ++ ret = snd_rpi_hifiberry_dacplus_update_rate_den( ++ substream, params); + } ++ ++ ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x03, 0x03, ++ channels, width); ++ if (ret) ++ return ret; ++ ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0x03, 0x03, ++ channels, width); + return ret; +} + @@ -498,9 +492,9 @@ Signed-off-by: DigitalDreamtime + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + return 0; +} + @@ -508,9 +502,9 @@ Signed-off-by: DigitalDreamtime + struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); +} + +/* machine stream operations */ @@ -570,19 +564,15 @@ Signed-off-by: DigitalDreamtime + "hifiberry-dacplus,slave"); + } + -+ ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus); -+ if (ret) ++ ret = devm_snd_soc_register_card(&pdev->dev, ++ &snd_rpi_hifiberry_dacplus); ++ if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "snd_soc_register_card() failed: %d\n", ret); + + return ret; +} + -+static int snd_rpi_hifiberry_dacplus_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_hifiberry_dacplus); -+} -+ +static const struct of_device_id snd_rpi_hifiberry_dacplus_of_match[] = { + { .compatible = "hifiberry,hifiberry-dacplus", }, + {}, @@ -596,7 +586,6 @@ Signed-off-by: DigitalDreamtime + .of_match_table = snd_rpi_hifiberry_dacplus_of_match, + }, + .probe = snd_rpi_hifiberry_dacplus_probe, -+ .remove = snd_rpi_hifiberry_dacplus_remove, +}; + +module_platform_driver(snd_rpi_hifiberry_dacplus_driver); @@ -604,15 +593,3 @@ Signed-off-by: DigitalDreamtime +MODULE_AUTHOR("Daniel Matuschek "); +MODULE_DESCRIPTION("ASoC Driver for HiFiBerry DAC+"); +MODULE_LICENSE("GPL v2"); ---- a/sound/soc/codecs/pcm512x.c -+++ b/sound/soc/codecs/pcm512x.c -@@ -854,7 +854,8 @@ static int pcm512x_set_dividers(struct s - int fssp; - int gpio; - -- lrclk_div = snd_soc_params_to_frame_size(params); -+ lrclk_div = snd_pcm_format_physical_width(params_format(params)) -+ * params_channels(params); - if (lrclk_div == 0) { - dev_err(dev, "No LRCLK?\n"); - return -EINVAL; diff --git a/target/linux/brcm2708/patches-4.9/950-0073-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch b/target/linux/brcm2708/patches-4.19/950-0069-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch similarity index 71% rename from target/linux/brcm2708/patches-4.9/950-0073-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch rename to target/linux/brcm2708/patches-4.19/950-0069-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch index 9826be572..17e80bb67 100644 --- a/target/linux/brcm2708/patches-4.9/950-0073-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch +++ b/target/linux/brcm2708/patches-4.19/950-0069-Added-driver-for-HiFiBerry-Amp-amplifier-add-on-boar.patch @@ -1,7 +1,7 @@ -From 0f11b0757d5950ee7a8ba00e49ebefd2c649a6ba Mon Sep 17 00:00:00 2001 +From 32df84e8c6f0f747c1182774fadbf4e9ef1794e2 Mon Sep 17 00:00:00 2001 From: Daniel Matuschek Date: Mon, 4 Aug 2014 11:09:58 +0200 -Subject: [PATCH] Added driver for HiFiBerry Amp amplifier add-on board +Subject: [PATCH 069/703] Added driver for HiFiBerry Amp amplifier add-on board The driver contains a low-level hardware driver for the TAS5713 and the drivers for the Raspberry Pi I2S subsystem. @@ -16,191 +16,18 @@ reported correctly by a non-zero return code. HiFiBerry Amp: fix device-tree problems Some code to load the driver based on device-tree-overlays was missing. This is added by this patch. - -hifiberry-amp: Adjust for ALSA object refactoring - -See: https://github.com/raspberrypi/linux/issues/1775 --- - sound/soc/bcm/Kconfig | 7 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/hifiberry_amp.c | 129 +++++++++++++++ - sound/soc/codecs/Kconfig | 4 + - sound/soc/codecs/Makefile | 2 + - sound/soc/codecs/tas5713.c | 371 ++++++++++++++++++++++++++++++++++++++++++ - sound/soc/codecs/tas5713.h | 210 ++++++++++++++++++++++++ - 7 files changed, 725 insertions(+) - create mode 100644 sound/soc/bcm/hifiberry_amp.c + sound/soc/codecs/Kconfig | 4 + + sound/soc/codecs/Makefile | 2 + + sound/soc/codecs/tas5713.c | 366 +++++++++++++++++++++++++++++++++++++ + sound/soc/codecs/tas5713.h | 210 +++++++++++++++++++++ + 4 files changed, 582 insertions(+) create mode 100644 sound/soc/codecs/tas5713.c create mode 100644 sound/soc/codecs/tas5713.h ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -38,6 +38,13 @@ config SND_BCM2708_SOC_HIFIBERRY_DIGI - help - Say Y or M if you want to add support for HifiBerry Digi S/PDIF output board. - -+config SND_BCM2708_SOC_HIFIBERRY_AMP -+ tristate "Support for the HifiBerry Amp" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_TAS5713 -+ help -+ Say Y or M if you want to add support for the HifiBerry Amp amplifier board. -+ - config SND_BCM2708_SOC_RPI_DAC - tristate "Support for RPi-DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -9,12 +9,14 @@ snd-soc-cygnus-objs := cygnus-pcm.o cygn - obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc-cygnus.o - - # BCM2708 Machine Support -+snd-soc-hifiberry-amp-objs := hifiberry_amp.o - snd-soc-hifiberry-dac-objs := hifiberry_dac.o - snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o - snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o - -+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o ---- /dev/null -+++ b/sound/soc/bcm/hifiberry_amp.c -@@ -0,0 +1,129 @@ -+/* -+ * ASoC Driver for HifiBerry AMP -+ * -+ * Author: Sebastian Eickhoff -+ * Copyright 2014 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static int snd_rpi_hifiberry_amp_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ // ToDo: init of the dsp-registers. -+ return 0; -+} -+ -+static int snd_rpi_hifiberry_amp_hw_params( struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params ) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64); -+} -+ -+static struct snd_soc_ops snd_rpi_hifiberry_amp_ops = { -+ .hw_params = snd_rpi_hifiberry_amp_hw_params, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_hifiberry_amp_dai[] = { -+ { -+ .name = "HifiBerry AMP", -+ .stream_name = "HifiBerry AMP HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "tas5713-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "tas5713.1-001b", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | -+ SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_hifiberry_amp_ops, -+ .init = snd_rpi_hifiberry_amp_init, -+ }, -+}; -+ -+ -+static struct snd_soc_card snd_rpi_hifiberry_amp = { -+ .name = "snd_rpi_hifiberry_amp", -+ .driver_name = "HifiberryAmp", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_hifiberry_amp_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_amp_dai), -+}; -+ -+static const struct of_device_id snd_rpi_hifiberry_amp_of_match[] = { -+ { .compatible = "hifiberry,hifiberry-amp", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_amp_of_match); -+ -+ -+static int snd_rpi_hifiberry_amp_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_hifiberry_amp.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_hifiberry_amp_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_hifiberry_amp); -+ -+ if (ret != 0) { -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ } -+ -+ return ret; -+} -+ -+ -+static int snd_rpi_hifiberry_amp_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_hifiberry_amp); -+} -+ -+ -+static struct platform_driver snd_rpi_hifiberry_amp_driver = { -+ .driver = { -+ .name = "snd-hifiberry-amp", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_hifiberry_amp_of_match, -+ }, -+ .probe = snd_rpi_hifiberry_amp_probe, -+ .remove = snd_rpi_hifiberry_amp_remove, -+}; -+ -+ -+module_platform_driver(snd_rpi_hifiberry_amp_driver); -+ -+ -+MODULE_AUTHOR("Sebastian Eickhoff "); -+MODULE_DESCRIPTION("ASoC driver for HiFiBerry-AMP"); -+MODULE_LICENSE("GPL v2"); --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig -@@ -139,6 +139,7 @@ config SND_SOC_ALL_CODECS +@@ -167,6 +167,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_TFA9879 if I2C select SND_SOC_TLV320AIC23_I2C if I2C select SND_SOC_TLV320AIC23_SPI if SPI_MASTER @@ -208,7 +35,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 select SND_SOC_TLV320AIC26 if SPI_MASTER select SND_SOC_TLV320AIC31XX if I2C select SND_SOC_TLV320AIC32X4_I2C if I2C -@@ -821,6 +822,9 @@ config SND_SOC_TFA9879 +@@ -997,6 +998,9 @@ config SND_SOC_TFA9879 tristate "NXP Semiconductors TFA9879 amplifier" depends on I2C @@ -220,17 +47,17 @@ See: https://github.com/raspberrypi/linux/issues/1775 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile -@@ -144,6 +144,7 @@ snd-soc-tas5086-objs := tas5086.o - snd-soc-tas571x-objs := tas571x.o - snd-soc-tas5720-objs := tas5720.o +@@ -176,6 +176,7 @@ snd-soc-tas5720-objs := tas5720.o + snd-soc-tas6424-objs := tas6424.o + snd-soc-tda7419-objs := tda7419.o snd-soc-tfa9879-objs := tfa9879.o +snd-soc-tas5713-objs := tas5713.o snd-soc-tlv320aic23-objs := tlv320aic23.o snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o -@@ -366,6 +367,7 @@ obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc - obj-$(CONFIG_SND_SOC_TAS571X) += snd-soc-tas571x.o - obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc-tas5720.o +@@ -436,6 +437,7 @@ obj-$(CONFIG_SND_SOC_TAS5720) += snd-soc + obj-$(CONFIG_SND_SOC_TAS6424) += snd-soc-tas6424.o + obj-$(CONFIG_SND_SOC_TDA7419) += snd-soc-tda7419.o obj-$(CONFIG_SND_SOC_TFA9879) += snd-soc-tfa9879.o +obj-$(CONFIG_SND_SOC_TAS5713) += snd-soc-tas5713.o obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o @@ -238,7 +65,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 obj-$(CONFIG_SND_SOC_TLV320AIC23_SPI) += snd-soc-tlv320aic23-spi.o --- /dev/null +++ b/sound/soc/codecs/tas5713.c -@@ -0,0 +1,371 @@ +@@ -0,0 +1,366 @@ +/* + * ASoC Driver for TAS5713 + * @@ -286,7 +113,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 +struct tas5713_priv { + struct regmap *regmap; + int mclk_div; -+ struct snd_soc_codec *codec; ++ struct snd_soc_component *component; +}; + +static struct tas5713_priv *priv_data; @@ -327,9 +154,8 @@ See: https://github.com/raspberrypi/linux/issues/1775 +{ + u16 blen = 0x00; + -+ struct snd_soc_codec *codec; -+ codec = dai->codec; -+ priv_data->codec = dai->codec; ++ struct snd_soc_component *component = dai->component; ++ priv_data->component = component; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: @@ -351,7 +177,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 + } + + // set word length -+ snd_soc_update_bits(codec, TAS5713_SERIAL_DATA_INTERFACE, 0x7, blen); ++ snd_soc_component_update_bits(component, TAS5713_SERIAL_DATA_INTERFACE, 0x7, blen); + + return 0; +} @@ -362,8 +188,8 @@ See: https://github.com/raspberrypi/linux/issues/1775 + unsigned int val = 0; + + struct tas5713_priv *tas5713; -+ struct snd_soc_codec *codec = dai->codec; -+ tas5713 = snd_soc_codec_get_drvdata(codec); ++ struct snd_soc_component *component = dai->component; ++ tas5713 = snd_soc_component_get_drvdata(component); + + if (mute) { + val = TAS5713_SOFT_MUTE_ALL; @@ -402,54 +228,52 @@ See: https://github.com/raspberrypi/linux/issues/1775 + * + */ + -+static int tas5713_remove(struct snd_soc_codec *codec) ++static void tas5713_remove(struct snd_soc_component *component) +{ + struct tas5713_priv *tas5713; + -+ tas5713 = snd_soc_codec_get_drvdata(codec); -+ -+ return 0; ++ tas5713 = snd_soc_component_get_drvdata(component); +} + + -+static int tas5713_probe(struct snd_soc_codec *codec) ++static int tas5713_probe(struct snd_soc_component *component) +{ + struct tas5713_priv *tas5713; + int i, ret; + -+ i2c = container_of(codec->dev, struct i2c_client, dev); ++ i2c = container_of(component->dev, struct i2c_client, dev); + -+ tas5713 = snd_soc_codec_get_drvdata(codec); ++ tas5713 = snd_soc_component_get_drvdata(component); + + // Reset error -+ ret = snd_soc_write(codec, TAS5713_ERROR_STATUS, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_ERROR_STATUS, 0x00); + if (ret < 0) return ret; + + // Trim oscillator -+ ret = snd_soc_write(codec, TAS5713_OSC_TRIM, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_OSC_TRIM, 0x00); + if (ret < 0) return ret; + msleep(1000); + + // Reset error -+ ret = snd_soc_write(codec, TAS5713_ERROR_STATUS, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_ERROR_STATUS, 0x00); + if (ret < 0) return ret; + + // Clock mode: 44/48kHz, MCLK=64xfs -+ ret = snd_soc_write(codec, TAS5713_CLOCK_CTRL, 0x60); ++ ret = snd_soc_component_write(component, TAS5713_CLOCK_CTRL, 0x60); + if (ret < 0) return ret; + + // I2S 24bit -+ ret = snd_soc_write(codec, TAS5713_SERIAL_DATA_INTERFACE, 0x05); ++ ret = snd_soc_component_write(component, TAS5713_SERIAL_DATA_INTERFACE, 0x05); + if (ret < 0) return ret; + + // Unmute -+ ret = snd_soc_write(codec, TAS5713_SYSTEM_CTRL2, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_SYSTEM_CTRL2, 0x00); + if (ret < 0) return ret; -+ ret = snd_soc_write(codec, TAS5713_SOFT_MUTE, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_SOFT_MUTE, 0x00); + if (ret < 0) return ret; + + // Set volume to 0db -+ ret = snd_soc_write(codec, TAS5713_VOL_MASTER, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_VOL_MASTER, 0x00); + if (ret < 0) return ret; + + // Now start programming the default initialization sequence @@ -463,20 +287,18 @@ See: https://github.com/raspberrypi/linux/issues/1775 + } + + // Unmute -+ ret = snd_soc_write(codec, TAS5713_SYSTEM_CTRL2, 0x00); ++ ret = snd_soc_component_write(component, TAS5713_SYSTEM_CTRL2, 0x00); + if (ret < 0) return ret; + + return 0; +} + + -+static struct snd_soc_codec_driver soc_codec_dev_tas5713 = { ++static struct snd_soc_component_driver soc_codec_dev_tas5713 = { + .probe = tas5713_probe, + .remove = tas5713_remove, -+ .component_driver = { -+ .controls = tas5713_snd_controls, -+ .num_controls = ARRAY_SIZE(tas5713_snd_controls), -+ }, ++ .controls = tas5713_snd_controls, ++ .num_controls = ARRAY_SIZE(tas5713_snd_controls), +}; + + @@ -547,7 +369,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 + + i2c_set_clientdata(i2c, priv_data); + -+ ret = snd_soc_register_codec(&i2c->dev, ++ ret = snd_soc_register_component(&i2c->dev, + &soc_codec_dev_tas5713, &tas5713_dai, 1); + + return ret; @@ -556,7 +378,7 @@ See: https://github.com/raspberrypi/linux/issues/1775 + +static int tas5713_i2c_remove(struct i2c_client *i2c) +{ -+ snd_soc_unregister_codec(&i2c->dev); ++ snd_soc_unregister_component(&i2c->dev); + i2c_set_clientdata(i2c, NULL); + + kfree(priv_data); diff --git a/target/linux/brcm2708/patches-4.9/950-0075-Add-driver-for-rpi-proto.patch b/target/linux/brcm2708/patches-4.19/950-0070-Add-driver-for-rpi-proto.patch similarity index 68% rename from target/linux/brcm2708/patches-4.9/950-0075-Add-driver-for-rpi-proto.patch rename to target/linux/brcm2708/patches-4.19/950-0070-Add-driver-for-rpi-proto.patch index b8db1d560..098d5f4e6 100644 --- a/target/linux/brcm2708/patches-4.9/950-0075-Add-driver-for-rpi-proto.patch +++ b/target/linux/brcm2708/patches-4.19/950-0070-Add-driver-for-rpi-proto.patch @@ -1,7 +1,7 @@ -From b351d2ffe294c9d5e8cde9caa3a94017ecec81d9 Mon Sep 17 00:00:00 2001 +From 0a8842f908f015bd889e3c0cee5115db1c451990 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Wed, 25 Mar 2015 09:26:17 +0100 -Subject: [PATCH] Add driver for rpi-proto +Subject: [PATCH 070/703] Add driver for rpi-proto Forward port of 3.10.x driver from https://github.com/koalo We are using a custom board and would like to use rpi 3.18.x @@ -14,47 +14,13 @@ Playback tested with devicetree enabled. Signed-off-by: Waldemar Brodkorb --- - sound/soc/bcm/Kconfig | 7 +++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/rpi-proto.c | 154 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 163 insertions(+) + sound/soc/bcm/rpi-proto.c | 145 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 145 insertions(+) create mode 100644 sound/soc/bcm/rpi-proto.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -52,6 +52,13 @@ config SND_BCM2708_SOC_RPI_DAC - help - Say Y or M if you want to add support for RPi-DAC. - -+config SND_BCM2708_SOC_RPI_PROTO -+ tristate "Support for Rpi-PROTO" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8731 -+ help -+ Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731). -+ - config SND_BCM2708_SOC_IQAUDIO_DAC - tristate "Support for IQaudIO-DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -14,6 +14,7 @@ snd-soc-hifiberry-dac-objs := hifiberry_ - snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o - snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-rpi-dac-objs := rpi-dac.o -+snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -21,4 +22,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o --- /dev/null +++ b/sound/soc/bcm/rpi-proto.c -@@ -0,0 +1,154 @@ +@@ -0,0 +1,145 @@ +/* + * ASoC driver for PROTO AudioCODEC (with a WM8731) + * connected to a Raspberry Pi @@ -99,7 +65,6 @@ Signed-off-by: Waldemar Brodkorb + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int sysclk = 12288000; /* This is fixed on this board */ @@ -107,7 +72,7 @@ Signed-off-by: Waldemar Brodkorb + /* Set proto bclk */ + int ret = snd_soc_dai_set_bclk_ratio(cpu_dai,32*2); + if (ret < 0){ -+ dev_err(codec->dev, ++ dev_err(rtd->card->dev, + "Failed to set BCLK ratio %d\n", ret); + return ret; + } @@ -116,7 +81,7 @@ Signed-off-by: Waldemar Brodkorb + ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK_XTAL, + sysclk, SND_SOC_CLOCK_IN); + if (ret < 0) { -+ dev_err(codec->dev, ++ dev_err(rtd->card->dev, + "Failed to set WM8731 SYSCLK: %d\n", ret); + return ret; + } @@ -173,21 +138,14 @@ Signed-off-by: Waldemar Brodkorb + } + } + -+ ret = snd_soc_register_card(&snd_rpi_proto); -+ if (ret) { ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_proto); ++ if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "snd_soc_register_card() failed: %d\n", ret); -+ } + + return ret; +} + -+ -+static int snd_rpi_proto_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_proto); -+} -+ +static const struct of_device_id snd_rpi_proto_of_match[] = { + { .compatible = "rpi,rpi-proto", }, + {}, @@ -201,7 +159,6 @@ Signed-off-by: Waldemar Brodkorb + .of_match_table = snd_rpi_proto_of_match, + }, + .probe = snd_rpi_proto_probe, -+ .remove = snd_rpi_proto_remove, +}; + +module_platform_driver(snd_rpi_proto_driver); diff --git a/target/linux/brcm2708/patches-4.19/950-0071-Add-Support-for-JustBoom-Audio-boards.patch b/target/linux/brcm2708/patches-4.19/950-0071-Add-Support-for-JustBoom-Audio-boards.patch new file mode 100644 index 000000000..731cee62e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0071-Add-Support-for-JustBoom-Audio-boards.patch @@ -0,0 +1,173 @@ +From 71cd216db9c7c05f05c8dd7c7afdfb24f718be74 Mon Sep 17 00:00:00 2001 +From: Aaron Shaw +Date: Thu, 7 Apr 2016 21:26:21 +0100 +Subject: [PATCH 071/703] Add Support for JustBoom Audio boards + +justboom-dac: Adjust for ALSA API change + +As of 4.4, snd_soc_limit_volume now takes a struct snd_soc_card * +rather than a struct snd_soc_codec *. + +Signed-off-by: Phil Elwell + +ASoC: justboom-dac: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Also remove hw_params as it's no longer needed. + +Signed-off-by: Matthias Reichl +--- + sound/soc/bcm/justboom-dac.c | 145 +++++++++++++++++++++++++++++++++++ + 1 file changed, 145 insertions(+) + create mode 100644 sound/soc/bcm/justboom-dac.c + +--- /dev/null ++++ b/sound/soc/bcm/justboom-dac.c +@@ -0,0 +1,145 @@ ++/* ++ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card ++ * ++ * Author: Milan Neskovic ++ * Copyright 2016 ++ * based on code by Daniel Matuschek ++ * based on code by Florian Meier ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/pcm512x.h" ++ ++static bool digital_gain_0db_limit = true; ++ ++static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08,0x08); ++ ++ if (digital_gain_0db_limit) ++ { ++ int ret; ++ struct snd_soc_card *card = rtd->card; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); ++ } ++ ++ return 0; ++} ++ ++static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) { ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08,0x08); ++ return 0; ++} ++ ++static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) { ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08,0x00); ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_rpi_justboom_dac_ops = { ++ .startup = snd_rpi_justboom_dac_startup, ++ .shutdown = snd_rpi_justboom_dac_shutdown, ++}; ++ ++static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = { ++{ ++ .name = "JustBoom DAC", ++ .stream_name = "JustBoom DAC HiFi", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "pcm512x-hifi", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "pcm512x.1-004d", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .ops = &snd_rpi_justboom_dac_ops, ++ .init = snd_rpi_justboom_dac_init, ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_justboom_dac = { ++ .name = "snd_rpi_justboom_dac", ++ .driver_name = "JustBoomDac", ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_justboom_dac_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai), ++}; ++ ++static int snd_rpi_justboom_dac_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_rpi_justboom_dac.dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ ++ if (i2s_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ digital_gain_0db_limit = !of_property_read_bool( ++ pdev->dev.of_node, "justboom,24db_digital_gain"); ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_justboom_dac); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static const struct of_device_id snd_rpi_justboom_dac_of_match[] = { ++ { .compatible = "justboom,justboom-dac", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match); ++ ++static struct platform_driver snd_rpi_justboom_dac_driver = { ++ .driver = { ++ .name = "snd-rpi-justboom-dac", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_justboom_dac_of_match, ++ }, ++ .probe = snd_rpi_justboom_dac_probe, ++}; ++ ++module_platform_driver(snd_rpi_justboom_dac_driver); ++ ++MODULE_AUTHOR("Milan Neskovic "); ++MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0079-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch b/target/linux/brcm2708/patches-4.19/950-0072-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch similarity index 77% rename from target/linux/brcm2708/patches-4.9/950-0079-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch rename to target/linux/brcm2708/patches-4.19/950-0072-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch index 71d4fef69..369e18318 100644 --- a/target/linux/brcm2708/patches-4.9/950-0079-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch +++ b/target/linux/brcm2708/patches-4.19/950-0072-New-AudioInjector.net-Pi-soundcard-with-low-jitter-a.patch @@ -1,8 +1,8 @@ -From 235989cb582a29be0bea6a7e306f7b839789053c Mon Sep 17 00:00:00 2001 +From 075e259919f36828473a97a231cdafcec073b63b Mon Sep 17 00:00:00 2001 From: Matt Flax Date: Mon, 16 May 2016 21:36:31 +1000 -Subject: [PATCH] New AudioInjector.net Pi soundcard with low jitter audio in - and out. +Subject: [PATCH 072/703] New AudioInjector.net Pi soundcard with low jitter + audio in and out. Contains the sound/soc/bcm ALSA machine driver and necessary alterations to the Kconfig and Makefile. Adds the dts overlay and updates the Makefile and README. @@ -13,44 +13,13 @@ Added support for headphones, microphone and bclk_ratio settings. This patch adds headphone and microphone capability to the Audio Injector sound card. The patch also sets the bit clock ratio for use in the bcm2835-i2s driver. The bcm2835-i2s can't handle an 8 kHz sample rate when the bit clock is at 12 MHz because its register is only 10 bits wide which can't represent the ch2 offset of 1508. For that reason, the rate constraint is added. --- - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 3 + - sound/soc/bcm/audioinjector-pi-soundcard.c | 193 +++++++++++++++++++++++++++++ - 3 files changed, 203 insertions(+) + sound/soc/bcm/audioinjector-pi-soundcard.c | 185 +++++++++++++++++++++ + 1 file changed, 185 insertions(+) create mode 100644 sound/soc/bcm/audioinjector-pi-soundcard.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -94,3 +94,10 @@ config SND_BCM2708_SOC_ADAU1977_ADC - select SND_SOC_ADAU1977_I2C - help - Say Y or M if you want to add support for ADAU1977 ADC. -+ -+config SND_AUDIOINJECTOR_PI_SOUNDCARD -+ tristate "Support for audioinjector.net Pi add on soundcard" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8731 -+ help -+ Say Y or M if you want to add support for audioinjector.net Pi Hat ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -20,6 +20,7 @@ snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o - snd-soc-raspidac3-objs := raspidac3.o -+snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -32,3 +33,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o -+obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o -+ --- /dev/null +++ b/sound/soc/bcm/audioinjector-pi-soundcard.c -@@ -0,0 +1,193 @@ +@@ -0,0 +1,185 @@ +/* + * ASoC Driver for AudioInjector Pi add on soundcard + * @@ -209,19 +178,12 @@ This patch adds headphone and microphone capability to the Audio Injector sound + } + } + -+ if ((ret = snd_soc_register_card(card))) { ++ if ((ret = devm_snd_soc_register_card(&pdev->dev, card))) { + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); + } + return ret; +} + -+static int audioinjector_pi_soundcard_remove(struct platform_device *pdev) -+{ -+ struct snd_soc_card *card = platform_get_drvdata(pdev); -+ return snd_soc_unregister_card(card); -+ -+} -+ +static const struct of_device_id audioinjector_pi_soundcard_of_match[] = { + { .compatible = "ai,audioinjector-pi-soundcard", }, + {}, @@ -230,12 +192,11 @@ This patch adds headphone and microphone capability to the Audio Injector sound + +static struct platform_driver audioinjector_pi_soundcard_driver = { + .driver = { -+ .name = "audioinjector-audio", ++ .name = "audioinjector-stereo", + .owner = THIS_MODULE, + .of_match_table = audioinjector_pi_soundcard_of_match, + }, + .probe = audioinjector_pi_soundcard_probe, -+ .remove = audioinjector_pi_soundcard_remove, +}; + +module_platform_driver(audioinjector_pi_soundcard_driver); diff --git a/target/linux/brcm2708/patches-4.9/950-0081-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch b/target/linux/brcm2708/patches-4.19/950-0073-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch similarity index 75% rename from target/linux/brcm2708/patches-4.9/950-0081-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch rename to target/linux/brcm2708/patches-4.19/950-0073-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch index 45a5a379b..0a43d5e1e 100644 --- a/target/linux/brcm2708/patches-4.9/950-0081-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch +++ b/target/linux/brcm2708/patches-4.19/950-0073-New-driver-for-RRA-DigiDAC1-soundcard-using-WM8741-W.patch @@ -1,48 +1,17 @@ -From e5d85d533e7ea8fd5c68d4601ff2b8034bc4aaa9 Mon Sep 17 00:00:00 2001 +From 3f5b5702b2245c639439607ab4e64d654edaa864 Mon Sep 17 00:00:00 2001 From: escalator2015 Date: Tue, 24 May 2016 16:20:09 +0100 -Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 +Subject: [PATCH 073/703] New driver for RRA DigiDAC1 soundcard using WM8741 + + WM8804 --- - sound/soc/bcm/Kconfig | 8 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/digidac1-soundcard.c | 422 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 432 insertions(+) + sound/soc/bcm/digidac1-soundcard.c | 416 +++++++++++++++++++++++++++++ + 1 file changed, 416 insertions(+) create mode 100644 sound/soc/bcm/digidac1-soundcard.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -108,3 +108,11 @@ config SND_AUDIOINJECTOR_PI_SOUNDCARD - select SND_SOC_WM8731 - help - Say Y or M if you want to add support for audioinjector.net Pi Hat -+ -+config SND_DIGIDAC1_SOUNDCARD -+ tristate "Support for Red Rocks Audio DigiDAC1" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8804 -+ select SND_SOC_WM8741 -+ help -+ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -22,6 +22,7 @@ snd-soc-iqaudio-dac-objs := iqaudio-dac. - snd-soc-iqaudio-digi-objs := iqaudio_digi.o - snd-soc-raspidac3-objs := raspidac3.o - snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o -+snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -36,4 +37,5 @@ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI) += snd-soc-iqaudio-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o - obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o -+obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o - --- /dev/null +++ b/sound/soc/bcm/digidac1-soundcard.c -@@ -0,0 +1,422 @@ +@@ -0,0 +1,416 @@ +/* + * ASoC Driver for RRA DigiDAC1 + * Copyright 2016 @@ -147,24 +116,24 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 +SOC_ENUM("DAC Soft Mute", w8741_enum[4]), +}; + -+static int w8741_add_controls(struct snd_soc_codec *codec) ++static int w8741_add_controls(struct snd_soc_component *component) +{ -+ struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec); ++ struct wm8741_priv *wm8741 = snd_soc_component_get_drvdata(component); + + switch (wm8741->pdata.diff_mode) { + case WM8741_DIFF_MODE_STEREO: + case WM8741_DIFF_MODE_STEREO_REVERSED: -+ snd_soc_add_codec_controls(codec, ++ snd_soc_add_component_controls(component, + w8741_snd_controls_stereo, + ARRAY_SIZE(w8741_snd_controls_stereo)); + break; + case WM8741_DIFF_MODE_MONO_LEFT: -+ snd_soc_add_codec_controls(codec, ++ snd_soc_add_component_controls(component, + w8741_snd_controls_mono_left, + ARRAY_SIZE(w8741_snd_controls_mono_left)); + break; + case WM8741_DIFF_MODE_MONO_RIGHT: -+ snd_soc_add_codec_controls(codec, ++ snd_soc_add_component_controls(component, + w8741_snd_controls_mono_right, + ARRAY_SIZE(w8741_snd_controls_mono_right)); + break; @@ -177,10 +146,10 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + +static int digidac1_soundcard_init(struct snd_soc_pcm_runtime *rtd) +{ -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + struct snd_soc_card *card = rtd->card; + struct snd_soc_pcm_runtime *wm8741_rtd; -+ struct snd_soc_codec *wm8741_codec; ++ struct snd_soc_component *wm8741_component; + struct snd_card *sound_card = card->snd_card; + struct snd_kcontrol *kctl; + int ret; @@ -190,14 +159,14 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + dev_warn(card->dev, "digidac1_soundcard_init: couldn't get wm8741 rtd\n"); + return -EFAULT; + } -+ wm8741_codec = wm8741_rtd->codec; -+ ret = w8741_add_controls(wm8741_codec); ++ wm8741_component = wm8741_rtd->codec_dai->component; ++ ret = w8741_add_controls(wm8741_component); + if (ret < 0) + dev_warn(card->dev, "Failed to add new wm8741 controls: %d\n", + ret); + + /* enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); + + kctl = snd_soc_card_get_kcontrol(card, + "Playback Volume"); @@ -218,27 +187,27 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 +{ + /* turn on wm8804 digital output */ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + struct snd_soc_card *card = rtd->card; + struct snd_soc_pcm_runtime *wm8741_rtd; -+ struct snd_soc_codec *wm8741_codec; ++ struct snd_soc_component *wm8741_component; + -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00); ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x3c, 0x00); + wm8741_rtd = snd_soc_get_pcm_runtime(card, card->dai_link[1].name); + if (!wm8741_rtd) { + dev_warn(card->dev, "digidac1_soundcard_startup: couldn't get WM8741 rtd\n"); + return -EFAULT; + } -+ wm8741_codec = wm8741_rtd->codec; ++ wm8741_component = wm8741_rtd->codec_dai->component; + + /* latch wm8741 level */ -+ snd_soc_update_bits(wm8741_codec, WM8741_DACLLSB_ATTENUATION, ++ snd_soc_component_update_bits(wm8741_component, WM8741_DACLLSB_ATTENUATION, + WM8741_UPDATELL, WM8741_UPDATELL); -+ snd_soc_update_bits(wm8741_codec, WM8741_DACLMSB_ATTENUATION, ++ snd_soc_component_update_bits(wm8741_component, WM8741_DACLMSB_ATTENUATION, + WM8741_UPDATELM, WM8741_UPDATELM); -+ snd_soc_update_bits(wm8741_codec, WM8741_DACRLSB_ATTENUATION, ++ snd_soc_component_update_bits(wm8741_component, WM8741_DACRLSB_ATTENUATION, + WM8741_UPDATERL, WM8741_UPDATERL); -+ snd_soc_update_bits(wm8741_codec, WM8741_DACRMSB_ATTENUATION, ++ snd_soc_component_update_bits(wm8741_component, WM8741_DACRMSB_ATTENUATION, + WM8741_UPDATERM, WM8741_UPDATERM); + + return 0; @@ -248,9 +217,9 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 +{ + /* turn off wm8804 digital output */ + struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c); ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x3c, 0x3c); +} + +static int digidac1_soundcard_hw_params(struct snd_pcm_substream *substream, @@ -258,11 +227,11 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + struct snd_soc_card *card = rtd->card; + struct snd_soc_pcm_runtime *wm8741_rtd; -+ struct snd_soc_codec *wm8741_codec; ++ struct snd_soc_component *wm8741_component; + + int sysclk = 27000000; + long mclk_freq = 0; @@ -275,7 +244,7 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + dev_warn(card->dev, "digidac1_soundcard_hw_params: couldn't get WM8741 rtd\n"); + return -EFAULT; + } -+ wm8741_codec = wm8741_rtd->codec; ++ wm8741_component = wm8741_rtd->codec_dai->component; + samplerate = params_rate(params); + + if (samplerate <= 96000) { @@ -309,7 +278,7 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + sampling_freq = 0x0e; + break; + default: -+ dev_err(codec->dev, ++ dev_err(card->dev, + "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", + samplerate); + } @@ -320,50 +289,50 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, + sysclk, SND_SOC_CLOCK_OUT); + if (ret < 0) { -+ dev_err(codec->dev, ++ dev_err(card->dev, + "Failed to set WM8804 SYSCLK: %d\n", ret); + return ret; + } + /* Enable wm8804 TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); + + /* wm8804 Power on */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0); ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x9, 0); + + /* wm8804 set sampling frequency status bits */ -+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq); ++ snd_soc_component_update_bits(component, WM8804_SPDTX4, 0x0f, sampling_freq); + + /* Now update wm8741 registers for the correct oversampling */ + if (samplerate <= 48000) -+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1, ++ snd_soc_component_update_bits(wm8741_component, WM8741_MODE_CONTROL_1, + WM8741_OSR_MASK, 0x00); + else if (samplerate <= 96000) -+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1, ++ snd_soc_component_update_bits(wm8741_component, WM8741_MODE_CONTROL_1, + WM8741_OSR_MASK, 0x20); + else -+ snd_soc_update_bits(wm8741_codec, WM8741_MODE_CONTROL_1, ++ snd_soc_component_update_bits(wm8741_component, WM8741_MODE_CONTROL_1, + WM8741_OSR_MASK, 0x40); + + /* wm8741 bit size */ + switch (params_width(params)) { + case 16: -+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL, ++ snd_soc_component_update_bits(wm8741_component, WM8741_FORMAT_CONTROL, + WM8741_IWL_MASK, 0x00); + break; + case 20: -+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL, ++ snd_soc_component_update_bits(wm8741_component, WM8741_FORMAT_CONTROL, + WM8741_IWL_MASK, 0x01); + break; + case 24: -+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL, ++ snd_soc_component_update_bits(wm8741_component, WM8741_FORMAT_CONTROL, + WM8741_IWL_MASK, 0x02); + break; + case 32: -+ snd_soc_update_bits(wm8741_codec, WM8741_FORMAT_CONTROL, ++ snd_soc_component_update_bits(wm8741_component, WM8741_FORMAT_CONTROL, + WM8741_IWL_MASK, 0x03); + break; + default: -+ dev_dbg(codec->dev, "wm8741_hw_params: Unsupported bit size param = %d", ++ dev_dbg(card->dev, "wm8741_hw_params: Unsupported bit size param = %d", + params_width(params)); + return -EINVAL; + } @@ -431,19 +400,14 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + } + } + -+ ret = snd_soc_register_card(&digidac1_soundcard); -+ if (ret) ++ ret = devm_snd_soc_register_card(&pdev->dev, &digidac1_soundcard); ++ if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", -+ ret); ++ ret); + + return ret; +} + -+static int digidac1_soundcard_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&digidac1_soundcard); -+} -+ +static const struct of_device_id digidac1_soundcard_of_match[] = { + { .compatible = "rra,digidac1-soundcard", }, + {}, @@ -457,7 +421,6 @@ Subject: [PATCH] New driver for RRA DigiDAC1 soundcard using WM8741 + WM8804 + .of_match_table = digidac1_soundcard_of_match, + }, + .probe = digidac1_soundcard_probe, -+ .remove = digidac1_soundcard_remove, +}; + +module_platform_driver(digidac1_soundcard_driver); diff --git a/target/linux/brcm2708/patches-4.9/950-0082-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch b/target/linux/brcm2708/patches-4.19/950-0074-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch similarity index 65% rename from target/linux/brcm2708/patches-4.9/950-0082-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch rename to target/linux/brcm2708/patches-4.19/950-0074-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch index b06cd35b7..586e04d7f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0082-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch +++ b/target/linux/brcm2708/patches-4.19/950-0074-Add-support-for-Dion-Audio-LOCO-DAC-AMP-HAT.patch @@ -1,50 +1,19 @@ -From 999d3e615247d1921d245f7084194efbc697bb66 Mon Sep 17 00:00:00 2001 +From 63f29d95488d5bbebc704f904e3f4d12ba90fe42 Mon Sep 17 00:00:00 2001 From: DigitalDreamtime Date: Sat, 2 Jul 2016 16:26:19 +0100 -Subject: [PATCH] Add support for Dion Audio LOCO DAC-AMP HAT +Subject: [PATCH 074/703] Add support for Dion Audio LOCO DAC-AMP HAT Using dedicated machine driver and pcm5102a codec driver. Signed-off-by: DigitalDreamtime --- - sound/soc/bcm/Kconfig | 7 +++ - sound/soc/bcm/Makefile | 3 +- - sound/soc/bcm/dionaudio_loco.c | 121 +++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 130 insertions(+), 1 deletion(-) + sound/soc/bcm/dionaudio_loco.c | 115 +++++++++++++++++++++++++++++++++ + 1 file changed, 115 insertions(+) create mode 100644 sound/soc/bcm/dionaudio_loco.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -116,3 +116,10 @@ config SND_DIGIDAC1_SOUNDCARD - select SND_SOC_WM8741 - help - Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board. -+ -+config SND_BCM2708_SOC_DIONAUDIO_LOCO -+ tristate "Support for Dion Audio LOCO DAC-AMP" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM5102a -+ help -+ Say Y or M if you want to add support for Dion Audio LOCO. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -23,6 +23,7 @@ snd-soc-iqaudio-digi-objs := iqaudio_dig - snd-soc-raspidac3-objs := raspidac3.o - snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o - snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o -+snd-soc-dionaudio-loco-objs := dionaudio_loco.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -38,4 +39,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIG - obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o - obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o - obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o -- -+obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o --- /dev/null +++ b/sound/soc/bcm/dionaudio_loco.c -@@ -0,0 +1,121 @@ +@@ -0,0 +1,115 @@ +/* + * ASoC Driver for Dion Audio LOCO DAC-AMP + * @@ -132,19 +101,14 @@ Signed-off-by: DigitalDreamtime + } + } + -+ ret = snd_soc_register_card(&snd_rpi_dionaudio_loco); -+ if (ret) ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_dionaudio_loco); ++ if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", + ret); + + return ret; +} + -+static int snd_rpi_dionaudio_loco_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_dionaudio_loco); -+} -+ +static const struct of_device_id snd_rpi_dionaudio_loco_of_match[] = { + { .compatible = "dionaudio,loco-pcm5242-tpa3118", }, + { /* sentinel */ }, @@ -158,7 +122,6 @@ Signed-off-by: DigitalDreamtime + .of_match_table = snd_rpi_dionaudio_loco_of_match, + }, + .probe = snd_rpi_dionaudio_loco_probe, -+ .remove = snd_rpi_dionaudio_loco_remove, +}; + +module_platform_driver(snd_rpi_dionaudio_loco_driver); diff --git a/target/linux/brcm2708/patches-4.9/950-0083-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch b/target/linux/brcm2708/patches-4.19/950-0075-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch similarity index 62% rename from target/linux/brcm2708/patches-4.9/950-0083-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch rename to target/linux/brcm2708/patches-4.19/950-0075-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch index 64e785d2a..3f9b69faf 100644 --- a/target/linux/brcm2708/patches-4.9/950-0083-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch +++ b/target/linux/brcm2708/patches-4.19/950-0075-Allo-Piano-DAC-boards-Initial-2-channel-stereo-suppo.patch @@ -1,8 +1,8 @@ -From 779409817cf1af2c38055af64c11e026cb0bb4e9 Mon Sep 17 00:00:00 2001 +From befd64b81a740cba0ad23a6732dd56b2e67dda84 Mon Sep 17 00:00:00 2001 From: Clive Messer Date: Mon, 19 Sep 2016 14:01:04 +0100 -Subject: [PATCH] Allo Piano DAC boards: Initial 2 channel (stereo) support - (#1645) +Subject: [PATCH 075/703] Allo Piano DAC boards: Initial 2 channel (stereo) + support (#1645) Add initial 2 channel (stereo) support for Allo Piano DAC (2.0/2.1) boards, using allo-piano-dac-pcm512x-audio overlay and allo-piano-dac ALSA ASoC @@ -18,44 +18,23 @@ NB. The initial support is 2 channel (stereo) ONLY! Signed-off-by: Baswaraj K Signed-off-by: Clive Messer Tested-by: Clive Messer + +ASoC: allo-piano-dac: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Also remove hw_params and ops as they are no longer needed. + +Signed-off-by: Matthias Reichl --- - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/allo-piano-dac.c | 144 +++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 153 insertions(+) + sound/soc/bcm/allo-piano-dac.c | 120 +++++++++++++++++++++++++++++++++ + 1 file changed, 120 insertions(+) create mode 100644 sound/soc/bcm/allo-piano-dac.c ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -123,3 +123,10 @@ config SND_BCM2708_SOC_DIONAUDIO_LOCO - select SND_SOC_PCM5102a - help - Say Y or M if you want to add support for Dion Audio LOCO. -+ -+config SND_BCM2708_SOC_ALLO_PIANO_DAC -+ tristate "Support for Allo Piano DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM512x_I2C -+ help -+ Say Y or M if you want to add support for Allo Piano DAC. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -24,6 +24,7 @@ snd-soc-raspidac3-objs := raspidac3.o - snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o - snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o - snd-soc-dionaudio-loco-objs := dionaudio_loco.o -+snd-soc-allo-piano-dac-objs := allo-piano-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -40,3 +41,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) - obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o - obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o - obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o -+obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o --- /dev/null +++ b/sound/soc/bcm/allo-piano-dac.c -@@ -0,0 +1,144 @@ +@@ -0,0 +1,120 @@ +/* + * ALSA ASoC Machine Driver for Allo Piano DAC + * @@ -100,23 +79,6 @@ Tested-by: Clive Messer + return 0; +} + -+static int snd_allo_piano_dac_hw_params( -+ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_allo_piano_dac_ops = { -+ .hw_params = snd_allo_piano_dac_hw_params, -+}; -+ +static struct snd_soc_dai_link snd_allo_piano_dac_dai[] = { +{ + .name = "Piano DAC", @@ -128,7 +90,6 @@ Tested-by: Clive Messer + .dai_fmt = SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_allo_piano_dac_ops, + .init = snd_allo_piano_dac_init, +}, +}; @@ -166,19 +127,14 @@ Tested-by: Clive Messer + pdev->dev.of_node, "allo,24db_digital_gain"); + } + -+ ret = snd_soc_register_card(&snd_allo_piano_dac); -+ if (ret) ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_allo_piano_dac); ++ if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, + "snd_soc_register_card() failed: %d\n", ret); + + return ret; +} + -+static int snd_allo_piano_dac_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_allo_piano_dac); -+} -+ +static const struct of_device_id snd_allo_piano_dac_of_match[] = { + { .compatible = "allo,piano-dac", }, + { /* sentinel */ }, @@ -192,7 +148,6 @@ Tested-by: Clive Messer + .of_match_table = snd_allo_piano_dac_of_match, + }, + .probe = snd_allo_piano_dac_probe, -+ .remove = snd_allo_piano_dac_remove, +}; + +module_platform_driver(snd_allo_piano_dac_driver); diff --git a/target/linux/brcm2708/patches-4.19/950-0076-Add-support-for-Allo-Piano-DAC-2.1-plus-add-on-board.patch b/target/linux/brcm2708/patches-4.19/950-0076-Add-support-for-Allo-Piano-DAC-2.1-plus-add-on-board.patch new file mode 100644 index 000000000..acc636068 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0076-Add-support-for-Allo-Piano-DAC-2.1-plus-add-on-board.patch @@ -0,0 +1,1057 @@ +From 9a43360b6f8d6073b0bd67077229fe1d63076733 Mon Sep 17 00:00:00 2001 +From: Raashid Muhammed +Date: Mon, 27 Mar 2017 12:35:00 +0530 +Subject: [PATCH 076/703] Add support for Allo Piano DAC 2.1 plus add-on board + for Raspberry Pi. + +The Piano DAC 2.1 has support for 4 channels with subwoofer. + +Signed-off-by: Baswaraj K +Reviewed-by: Vijay Kumar B. +Reviewed-by: Raashid Muhammed + +Add clock changes and mute gpios (#1938) + +Also improve code style and adhere to ALSA coding conventions. + +Signed-off-by: Baswaraj K +Reviewed-by: Vijay Kumar B. +Reviewed-by: Raashid Muhammed + +PianoPlus: Dual Mono & Dual Stereo features added (#2069) + +allo-piano-dac-plus: Master volume added + fixes + +Master volume added, which controls both DACs volumes. + +See: https://github.com/raspberrypi/linux/pull/2149 + +Also fix initial max volume, default mode value, and unmute. + +Signed-off-by: allocom + +ASoC: allo-piano-dac-plus: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Signed-off-by: Matthias Reichl +--- + sound/soc/bcm/allo-piano-dac-plus.c | 1011 +++++++++++++++++++++++++++ + 1 file changed, 1011 insertions(+) + create mode 100644 sound/soc/bcm/allo-piano-dac-plus.c + +--- /dev/null ++++ b/sound/soc/bcm/allo-piano-dac-plus.c +@@ -0,0 +1,1011 @@ ++/* ++ * ALSA ASoC Machine Driver for Allo Piano DAC Plus Subwoofer ++ * ++ * Author: Baswaraj K ++ * Copyright 2016 ++ * based on code by Daniel Matuschek ++ * based on code by Florian Meier ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../codecs/pcm512x.h" ++ ++#define P_DAC_LEFT_MUTE 0x10 ++#define P_DAC_RIGHT_MUTE 0x01 ++#define P_DAC_MUTE 0x11 ++#define P_DAC_UNMUTE 0x00 ++#define P_MUTE 1 ++#define P_UNMUTE 0 ++ ++struct dsp_code { ++ char i2c_addr; ++ char offset; ++ char val; ++}; ++ ++struct glb_pool { ++ struct mutex lock; ++ unsigned int dual_mode; ++ unsigned int set_lowpass; ++ unsigned int set_mode; ++ unsigned int set_rate; ++ unsigned int dsp_page_number; ++}; ++ ++static bool digital_gain_0db_limit = true; ++bool glb_mclk; ++ ++static struct gpio_desc *mute_gpio[2]; ++ ++static const char * const allo_piano_mode_texts[] = { ++ "None", ++ "2.0", ++ "2.1", ++ "2.2", ++}; ++ ++static const SOC_ENUM_SINGLE_DECL(allo_piano_mode_enum, ++ 0, 0, allo_piano_mode_texts); ++ ++static const char * const allo_piano_dual_mode_texts[] = { ++ "None", ++ "Dual-Mono", ++ "Dual-Stereo", ++}; ++ ++static const SOC_ENUM_SINGLE_DECL(allo_piano_dual_mode_enum, ++ 0, 0, allo_piano_dual_mode_texts); ++ ++static const char * const allo_piano_dsp_low_pass_texts[] = { ++ "60", ++ "70", ++ "80", ++ "90", ++ "100", ++ "110", ++ "120", ++ "130", ++ "140", ++ "150", ++ "160", ++ "170", ++ "180", ++ "190", ++ "200", ++}; ++ ++static const SOC_ENUM_SINGLE_DECL(allo_piano_enum, ++ 0, 0, allo_piano_dsp_low_pass_texts); ++ ++static int __snd_allo_piano_dsp_program(struct snd_soc_pcm_runtime *rtd, ++ unsigned int mode, unsigned int rate, unsigned int lowpass) ++{ ++ const struct firmware *fw; ++ struct snd_soc_card *card = rtd->card; ++ struct glb_pool *glb_ptr = card->drvdata; ++ char firmware_name[60]; ++ int ret = 0, dac = 0; ++ ++ if (rate <= 46000) ++ rate = 44100; ++ else if (rate <= 68000) ++ rate = 48000; ++ else if (rate <= 92000) ++ rate = 88200; ++ else if (rate <= 136000) ++ rate = 96000; ++ else if (rate <= 184000) ++ rate = 176400; ++ else ++ rate = 192000; ++ ++ if (lowpass > 14) ++ glb_ptr->set_lowpass = lowpass = 0; ++ ++ if (mode > 3) ++ glb_ptr->set_mode = mode = 0; ++ ++ if (mode > 0) ++ glb_ptr->dual_mode = 0; ++ ++ /* same configuration loaded */ ++ if ((rate == glb_ptr->set_rate) && (lowpass == glb_ptr->set_lowpass) ++ && (mode == glb_ptr->set_mode)) ++ return 0; ++ ++ switch (mode) { ++ case 0: /* None */ ++ return 1; ++ ++ case 1: /* 2.0 */ ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_MUTE, P_DAC_UNMUTE); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_MUTE, P_DAC_MUTE); ++ glb_ptr->set_rate = rate; ++ glb_ptr->set_mode = mode; ++ glb_ptr->set_lowpass = lowpass; ++ return 1; ++ ++ default: ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_MUTE, P_DAC_UNMUTE); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_MUTE, P_DAC_UNMUTE); ++ } ++ ++ for (dac = 0; dac < rtd->num_codecs; dac++) { ++ struct dsp_code *dsp_code_read; ++ int i = 1; ++ ++ if (dac == 0) { /* high */ ++ snprintf(firmware_name, sizeof(firmware_name), ++ "allo/piano/2.2/allo-piano-dsp-%d-%d-%d.bin", ++ rate, ((lowpass * 10) + 60), dac); ++ } else { /* low */ ++ snprintf(firmware_name, sizeof(firmware_name), ++ "allo/piano/2.%d/allo-piano-dsp-%d-%d-%d.bin", ++ (mode - 1), rate, ((lowpass * 10) + 60), dac); ++ } ++ ++ dev_info(rtd->card->dev, "Dsp Firmware File Name: %s\n", ++ firmware_name); ++ ++ ret = request_firmware(&fw, firmware_name, rtd->card->dev); ++ if (ret < 0) { ++ dev_err(rtd->card->dev, ++ "Error: Allo Piano Firmware %s missing. %d\n", ++ firmware_name, ret); ++ goto err; ++ } ++ ++ while (i < (fw->size - 1)) { ++ dsp_code_read = (struct dsp_code *)&fw->data[i]; ++ ++ if (dsp_code_read->offset == 0) { ++ glb_ptr->dsp_page_number = dsp_code_read->val; ++ ret = snd_soc_component_write(rtd->codec_dais[dac]->component, ++ PCM512x_PAGE_BASE(0), ++ dsp_code_read->val); ++ ++ } else if (dsp_code_read->offset != 0) { ++ ret = snd_soc_component_write(rtd->codec_dais[dac]->component, ++ (PCM512x_PAGE_BASE( ++ glb_ptr->dsp_page_number) + ++ dsp_code_read->offset), ++ dsp_code_read->val); ++ } ++ if (ret < 0) { ++ dev_err(rtd->card->dev, ++ "Failed to write Register: %d\n", ret); ++ release_firmware(fw); ++ goto err; ++ } ++ i = i + 3; ++ } ++ release_firmware(fw); ++ } ++ glb_ptr->set_rate = rate; ++ glb_ptr->set_mode = mode; ++ glb_ptr->set_lowpass = lowpass; ++ return 1; ++ ++err: ++ return ret; ++} ++ ++static int snd_allo_piano_dsp_program(struct snd_soc_pcm_runtime *rtd, ++ unsigned int mode, unsigned int rate, unsigned int lowpass) ++{ ++ struct snd_soc_card *card = rtd->card; ++ struct glb_pool *glb_ptr = card->drvdata; ++ int ret = 0; ++ ++ mutex_lock(&glb_ptr->lock); ++ ++ ret = __snd_allo_piano_dsp_program(rtd, mode, rate, lowpass); ++ ++ mutex_unlock(&glb_ptr->lock); ++ ++ return ret; ++} ++ ++static int snd_allo_piano_dual_mode_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ ++ ucontrol->value.integer.value[0] = glb_ptr->dual_mode; ++ ++ return 0; ++} ++ ++static int snd_allo_piano_dual_mode_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ struct snd_card *snd_card_ptr = card->snd_card; ++ struct snd_kcontrol *kctl; ++ struct soc_mixer_control *mc; ++ unsigned int left_val = 0, right_val = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ++ if (ucontrol->value.integer.value[0] > 0) { ++ glb_ptr->dual_mode = ucontrol->value.integer.value[0]; ++ glb_ptr->set_mode = 0; ++ } else { ++ if (glb_ptr->set_mode <= 0) { ++ glb_ptr->dual_mode = 1; ++ glb_ptr->set_mode = 0; ++ } else { ++ glb_ptr->dual_mode = 0; ++ return 0; ++ } ++ } ++ ++ if (glb_ptr->dual_mode == 1) { // Dual Mono ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_MUTE, P_DAC_RIGHT_MUTE); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_MUTE, P_DAC_LEFT_MUTE); ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_3, 0xff); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, 0xff); ++ ++ list_for_each_entry(kctl, &snd_card_ptr->controls, list) { ++ if (!strncmp(kctl->id.name, "Digital Playback Volume", ++ sizeof(kctl->id.name))) { ++ mc = (struct soc_mixer_control *) ++ kctl->private_value; ++ mc->rreg = mc->reg; ++ break; ++ } ++ } ++ } else { ++ snd_soc_component_read(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_2, &left_val); ++ snd_soc_component_read(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, &right_val); ++ ++ list_for_each_entry(kctl, &snd_card_ptr->controls, list) { ++ if (!strncmp(kctl->id.name, "Digital Playback Volume", ++ sizeof(kctl->id.name))) { ++ mc = (struct soc_mixer_control *) ++ kctl->private_value; ++ mc->rreg = PCM512x_DIGITAL_VOLUME_3; ++ break; ++ } ++ } ++ ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_3, left_val); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, right_val); ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_MUTE, P_DAC_UNMUTE); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_MUTE, P_DAC_UNMUTE); ++ } ++ ++ return 0; ++} ++ ++static int snd_allo_piano_mode_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ ++ ucontrol->value.integer.value[0] = glb_ptr->set_mode; ++ return 0; ++} ++ ++static int snd_allo_piano_mode_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_pcm_runtime *rtd; ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_card *snd_card_ptr = card->snd_card; ++ struct snd_kcontrol *kctl; ++ struct soc_mixer_control *mc; ++ unsigned int left_val = 0, right_val = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ++ if ((glb_ptr->dual_mode == 1) && ++ (ucontrol->value.integer.value[0] > 0)) { ++ snd_soc_component_read(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_2, &left_val); ++ snd_soc_component_read(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, &right_val); ++ ++ list_for_each_entry(kctl, &snd_card_ptr->controls, list) { ++ if (!strncmp(kctl->id.name, "Digital Playback Volume", ++ sizeof(kctl->id.name))) { ++ mc = (struct soc_mixer_control *) ++ kctl->private_value; ++ mc->rreg = PCM512x_DIGITAL_VOLUME_3; ++ break; ++ } ++ } ++ snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_3, left_val); ++ snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, right_val); ++ } ++ ++ return(snd_allo_piano_dsp_program(rtd, ++ ucontrol->value.integer.value[0], ++ glb_ptr->set_rate, glb_ptr->set_lowpass)); ++} ++ ++static int snd_allo_piano_lowpass_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ ++ ucontrol->value.integer.value[0] = glb_ptr->set_lowpass; ++ return 0; ++} ++ ++static int snd_allo_piano_lowpass_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_pcm_runtime *rtd; ++ struct glb_pool *glb_ptr = card->drvdata; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ return(snd_allo_piano_dsp_program(rtd, ++ glb_ptr->set_mode, glb_ptr->set_rate, ++ ucontrol->value.integer.value[0])); ++} ++ ++static int pcm512x_get_reg_sub(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ unsigned int left_val = 0; ++ unsigned int right_val = 0; ++ int ret; ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ret = snd_soc_component_read(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, &right_val); ++ if (ret < 0) ++ return ret; ++ ++ if (glb_ptr->dual_mode != 1) { ++ ret = snd_soc_component_read(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, &left_val); ++ if ( ret < 0) ++ return ret; ++ ++ } else { ++ left_val = right_val; ++ } ++ ++ ucontrol->value.integer.value[0] = ++ (~(left_val >> mc->shift)) & mc->max; ++ ucontrol->value.integer.value[1] = ++ (~(right_val >> mc->shift)) & mc->max; ++ ++ return 0; ++} ++ ++static int pcm512x_set_reg_sub(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ unsigned int left_val = (ucontrol->value.integer.value[0] & mc->max); ++ unsigned int right_val = (ucontrol->value.integer.value[1] & mc->max); ++ int ret = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ if (glb_ptr->dual_mode != 1) { ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, (~left_val)); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (digital_gain_0db_limit) { ++ ret = snd_soc_limit_volume(card, "Subwoofer Playback Volume", ++ 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ++ ret); ++ } ++ ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, (~right_val)); ++ if (ret < 0) ++ return ret; ++ ++ return 1; ++} ++ ++static int pcm512x_get_reg_sub_switch(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_pcm_runtime *rtd; ++ int val = 0; ++ int ret; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ret = snd_soc_component_read(rtd->codec_dais[1]->component, PCM512x_MUTE, &val); ++ if (ret < 0) ++ return ret; ++ ++ ucontrol->value.integer.value[0] = ++ (val & P_DAC_LEFT_MUTE) ? P_UNMUTE : P_MUTE; ++ ucontrol->value.integer.value[1] = ++ (val & P_DAC_RIGHT_MUTE) ? P_UNMUTE : P_MUTE; ++ ++ return val; ++} ++ ++static int pcm512x_set_reg_sub_switch(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_pcm_runtime *rtd; ++ struct glb_pool *glb_ptr = card->drvdata; ++ unsigned int left_val = (ucontrol->value.integer.value[0]); ++ unsigned int right_val = (ucontrol->value.integer.value[1]); ++ int ret = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ if (glb_ptr->set_mode != 1) { ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, PCM512x_MUTE, ++ ~((left_val & 0x01)<<4 | (right_val & 0x01))); ++ if (ret < 0) ++ return ret; ++ } ++ return 1; ++ ++} ++ ++static int pcm512x_get_reg_master(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ unsigned int left_val = 0, right_val = 0; ++ int ret; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ++ ret = snd_soc_component_read(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_2, &left_val); ++ if ( ret < 0) ++ return ret; ++ ++ if (glb_ptr->dual_mode == 1) { ++ ret = snd_soc_component_read(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, &right_val); ++ if (ret < 0) ++ return ret; ++ } else { ++ ret = snd_soc_component_read(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_3, &right_val); ++ if (ret < 0) ++ return ret; ++ } ++ ++ ucontrol->value.integer.value[0] = ++ (~(left_val >> mc->shift)) & mc->max; ++ ucontrol->value.integer.value[1] = ++ (~(right_val >> mc->shift)) & mc->max; ++ ++ return 0; ++} ++ ++static int pcm512x_set_reg_master(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct soc_mixer_control *mc = ++ (struct soc_mixer_control *)kcontrol->private_value; ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ unsigned int left_val = (ucontrol->value.integer.value[0] & mc->max); ++ unsigned int right_val = (ucontrol->value.integer.value[1] & mc->max); ++ int ret = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ++ if (digital_gain_0db_limit) { ++ ret = snd_soc_limit_volume(card, "Master Playback Volume", ++ 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ++ ret); ++ } ++ ++ if (glb_ptr->dual_mode != 1) { ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_2, (~left_val)); ++ if (ret < 0) ++ return ret; ++ ++ ret = snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_3, (~right_val)); ++ if (ret < 0) ++ return ret; ++ ++ } ++ ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, ++ PCM512x_DIGITAL_VOLUME_3, (~right_val)); ++ if (ret < 0) ++ return ret; ++ ++ ret = snd_soc_component_write(rtd->codec_dais[0]->component, ++ PCM512x_DIGITAL_VOLUME_2, (~left_val)); ++ if (ret < 0) ++ return ret; ++ return 1; ++} ++ ++static int pcm512x_get_reg_master_switch(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct glb_pool *glb_ptr = card->drvdata; ++ struct snd_soc_pcm_runtime *rtd; ++ int val = 0; ++ int ret; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ ++ ret = snd_soc_component_read(rtd->codec_dais[0]->component, PCM512x_MUTE, &val); ++ if (ret < 0) ++ return ret; ++ ++ ucontrol->value.integer.value[0] = ++ (val & P_DAC_LEFT_MUTE) ? P_UNMUTE : P_MUTE; ++ ++ if (glb_ptr->dual_mode == 1) { ++ ret = snd_soc_component_read(rtd->codec_dais[1]->component, PCM512x_MUTE, &val); ++ if (ret < 0) ++ return ret; ++ } ++ ucontrol->value.integer.value[1] = ++ (val & P_DAC_RIGHT_MUTE) ? P_UNMUTE : P_MUTE; ++ ++ return val; ++} ++ ++static int pcm512x_set_reg_master_switch(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct snd_soc_pcm_runtime *rtd; ++ struct glb_pool *glb_ptr = card->drvdata; ++ unsigned int left_val = (ucontrol->value.integer.value[0]); ++ unsigned int right_val = (ucontrol->value.integer.value[1]); ++ int ret = 0; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ if (glb_ptr->dual_mode == 1) { ++ ret = snd_soc_component_write(rtd->codec_dais[0]->component, PCM512x_MUTE, ++ ~((left_val & 0x01)<<4)); ++ if (ret < 0) ++ return ret; ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, PCM512x_MUTE, ++ ~((right_val & 0x01))); ++ if (ret < 0) ++ return ret; ++ ++ } else if (glb_ptr->set_mode == 1) { ++ ret = snd_soc_component_write(rtd->codec_dais[0]->component, PCM512x_MUTE, ++ ~((left_val & 0x01)<<4 | (right_val & 0x01))); ++ if (ret < 0) ++ return ret; ++ ++ } else { ++ ret = snd_soc_component_write(rtd->codec_dais[0]->component, PCM512x_MUTE, ++ ~((left_val & 0x01)<<4 | (right_val & 0x01))); ++ if (ret < 0) ++ return ret; ++ ++ ret = snd_soc_component_write(rtd->codec_dais[1]->component, PCM512x_MUTE, ++ ~((left_val & 0x01)<<4 | (right_val & 0x01))); ++ if (ret < 0) ++ return ret; ++ } ++ return 1; ++} ++ ++static const DECLARE_TLV_DB_SCALE(digital_tlv_sub, -10350, 50, 1); ++static const DECLARE_TLV_DB_SCALE(digital_tlv_master, -10350, 50, 1); ++ ++static const struct snd_kcontrol_new allo_piano_controls[] = { ++ SOC_ENUM_EXT("Subwoofer mode Route", ++ allo_piano_mode_enum, ++ snd_allo_piano_mode_get, ++ snd_allo_piano_mode_put), ++ ++ SOC_ENUM_EXT("Dual Mode Route", ++ allo_piano_dual_mode_enum, ++ snd_allo_piano_dual_mode_get, ++ snd_allo_piano_dual_mode_put), ++ ++ SOC_ENUM_EXT("Lowpass Route", allo_piano_enum, ++ snd_allo_piano_lowpass_get, ++ snd_allo_piano_lowpass_put), ++ ++ SOC_DOUBLE_R_EXT_TLV("Subwoofer Playback Volume", ++ PCM512x_DIGITAL_VOLUME_2, ++ PCM512x_DIGITAL_VOLUME_3, 0, 255, 1, ++ pcm512x_get_reg_sub, ++ pcm512x_set_reg_sub, ++ digital_tlv_sub), ++ ++ SOC_DOUBLE_EXT("Subwoofer Playback Switch", ++ PCM512x_MUTE, ++ PCM512x_RQML_SHIFT, ++ PCM512x_RQMR_SHIFT, 1, 1, ++ pcm512x_get_reg_sub_switch, ++ pcm512x_set_reg_sub_switch), ++ ++ SOC_DOUBLE_R_EXT_TLV("Master Playback Volume", ++ PCM512x_DIGITAL_VOLUME_2, ++ PCM512x_DIGITAL_VOLUME_3, 0, 255, 1, ++ pcm512x_get_reg_master, ++ pcm512x_set_reg_master, ++ digital_tlv_master), ++ ++ SOC_DOUBLE_EXT("Master Playback Switch", ++ PCM512x_MUTE, ++ PCM512x_RQML_SHIFT, ++ PCM512x_RQMR_SHIFT, 1, 1, ++ pcm512x_get_reg_master_switch, ++ pcm512x_set_reg_master_switch), ++}; ++ ++static int snd_allo_piano_dac_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_card *card = rtd->card; ++ struct glb_pool *glb_ptr; ++ ++ glb_ptr = kmalloc(sizeof(struct glb_pool), GFP_KERNEL); ++ if (!glb_ptr) ++ return -ENOMEM; ++ ++ memset(glb_ptr, 0x00, sizeof(glb_ptr)); ++ card->drvdata = glb_ptr; ++ glb_ptr->dual_mode = 2; ++ glb_ptr->set_mode = 0; ++ ++ mutex_init(&glb_ptr->lock); ++ ++ if (digital_gain_0db_limit) { ++ int ret; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", ++ 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ++ ret); ++ } ++ return 0; ++} ++ ++static void snd_allo_piano_gpio_mute(struct snd_soc_card *card) ++{ ++ if (mute_gpio[0]) ++ gpiod_set_value_cansleep(mute_gpio[0], P_MUTE); ++ ++ if (mute_gpio[1]) ++ gpiod_set_value_cansleep(mute_gpio[1], P_MUTE); ++} ++ ++static void snd_allo_piano_gpio_unmute(struct snd_soc_card *card) ++{ ++ if (mute_gpio[0]) ++ gpiod_set_value_cansleep(mute_gpio[0], P_UNMUTE); ++ ++ if (mute_gpio[1]) ++ gpiod_set_value_cansleep(mute_gpio[1], P_UNMUTE); ++} ++ ++static int snd_allo_piano_set_bias_level(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) ++{ ++ struct snd_soc_pcm_runtime *rtd; ++ struct snd_soc_dai *codec_dai; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ codec_dai = rtd->codec_dai; ++ ++ if (dapm->dev != codec_dai->dev) ++ return 0; ++ ++ switch (level) { ++ case SND_SOC_BIAS_PREPARE: ++ if (dapm->bias_level != SND_SOC_BIAS_STANDBY) ++ break; ++ /* UNMUTE DAC */ ++ snd_allo_piano_gpio_unmute(card); ++ break; ++ ++ case SND_SOC_BIAS_STANDBY: ++ if (dapm->bias_level != SND_SOC_BIAS_PREPARE) ++ break; ++ /* MUTE DAC */ ++ snd_allo_piano_gpio_mute(card); ++ break; ++ ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static int snd_allo_piano_dac_startup( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_card *card = rtd->card; ++ ++ snd_allo_piano_gpio_mute(card); ++ ++ return 0; ++} ++ ++static int snd_allo_piano_dac_hw_params( ++ struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ unsigned int rate = params_rate(params); ++ struct snd_soc_card *card = rtd->card; ++ struct glb_pool *glb_ptr = card->drvdata; ++ int ret = 0, val = 0, dac; ++ ++ for (dac = 0; (glb_mclk && dac < 2); dac++) { ++ /* Configure the PLL clock reference for both the Codecs */ ++ ret = snd_soc_component_read(rtd->codec_dais[dac]->component, ++ PCM512x_RATE_DET_4, &val); ++ if (ret < 0) { ++ dev_err(rtd->codec_dais[dac]->component->dev, ++ "Failed to read register PCM512x_RATE_DET_4\n"); ++ return ret; ++ } ++ ++ if (val & 0x40) { ++ snd_soc_component_write(rtd->codec_dais[dac]->component, ++ PCM512x_PLL_REF, ++ PCM512x_SREF_BCK); ++ ++ dev_info(rtd->codec_dais[dac]->component->dev, ++ "Setting BCLK as input clock & Enable PLL\n"); ++ } else { ++ snd_soc_component_write(rtd->codec_dais[dac]->component, ++ PCM512x_PLL_EN, ++ 0x00); ++ ++ snd_soc_component_write(rtd->codec_dais[dac]->component, ++ PCM512x_PLL_REF, ++ PCM512x_SREF_SCK); ++ ++ dev_info(rtd->codec_dais[dac]->component->dev, ++ "Setting SCLK as input clock & disabled PLL\n"); ++ } ++ } ++ ++ ret = snd_allo_piano_dsp_program(rtd, glb_ptr->set_mode, rate, ++ glb_ptr->set_lowpass); ++ if (ret < 0) ++ return ret; ++ ++ return ret; ++} ++ ++static int snd_allo_piano_dac_prepare( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_card *card = rtd->card; ++ ++ snd_allo_piano_gpio_unmute(card); ++ ++ return 0; ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_allo_piano_dac_ops = { ++ .startup = snd_allo_piano_dac_startup, ++ .hw_params = snd_allo_piano_dac_hw_params, ++ .prepare = snd_allo_piano_dac_prepare, ++}; ++ ++static struct snd_soc_dai_link_component allo_piano_2_1_codecs[] = { ++ { ++ .dai_name = "pcm512x-hifi", ++ }, ++ { ++ .dai_name = "pcm512x-hifi", ++ }, ++}; ++ ++static struct snd_soc_dai_link snd_allo_piano_dac_dai[] = { ++ { ++ .name = "PianoDACPlus", ++ .stream_name = "PianoDACPlus", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .platform_name = "bcm2708-i2s.0", ++ .codecs = allo_piano_2_1_codecs, ++ .num_codecs = 2, ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .ops = &snd_allo_piano_dac_ops, ++ .init = snd_allo_piano_dac_init, ++ }, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_allo_piano_dac = { ++ .name = "PianoDACPlus", ++ .owner = THIS_MODULE, ++ .dai_link = snd_allo_piano_dac_dai, ++ .num_links = ARRAY_SIZE(snd_allo_piano_dac_dai), ++ .controls = allo_piano_controls, ++ .num_controls = ARRAY_SIZE(allo_piano_controls), ++}; ++ ++static int snd_allo_piano_dac_probe(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = &snd_allo_piano_dac; ++ int ret = 0, i = 0; ++ ++ card->dev = &pdev->dev; ++ platform_set_drvdata(pdev, &snd_allo_piano_dac); ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai; ++ ++ dai = &snd_allo_piano_dac_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (i2s_node) { ++ for (i = 0; i < card->num_links; i++) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } ++ } ++ digital_gain_0db_limit = ++ !of_property_read_bool(pdev->dev.of_node, ++ "allo,24db_digital_gain"); ++ ++ glb_mclk = of_property_read_bool(pdev->dev.of_node, ++ "allo,glb_mclk"); ++ ++ allo_piano_2_1_codecs[0].of_node = ++ of_parse_phandle(pdev->dev.of_node, "audio-codec", 0); ++ if (!allo_piano_2_1_codecs[0].of_node) { ++ dev_err(&pdev->dev, ++ "Property 'audio-codec' missing or invalid\n"); ++ return -EINVAL; ++ } ++ ++ allo_piano_2_1_codecs[1].of_node = ++ of_parse_phandle(pdev->dev.of_node, "audio-codec", 1); ++ if (!allo_piano_2_1_codecs[1].of_node) { ++ dev_err(&pdev->dev, ++ "Property 'audio-codec' missing or invalid\n"); ++ return -EINVAL; ++ } ++ ++ mute_gpio[0] = devm_gpiod_get_optional(&pdev->dev, "mute1", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(mute_gpio[0])) { ++ ret = PTR_ERR(mute_gpio[0]); ++ dev_err(&pdev->dev, ++ "failed to get mute1 gpio6: %d\n", ret); ++ return ret; ++ } ++ ++ mute_gpio[1] = devm_gpiod_get_optional(&pdev->dev, "mute2", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(mute_gpio[1])) { ++ ret = PTR_ERR(mute_gpio[1]); ++ dev_err(&pdev->dev, ++ "failed to get mute2 gpio25: %d\n", ret); ++ return ret; ++ } ++ ++ if (mute_gpio[0] && mute_gpio[1]) ++ snd_allo_piano_dac.set_bias_level = ++ snd_allo_piano_set_bias_level; ++ ++ ret = snd_soc_register_card(&snd_allo_piano_dac); ++ if (ret < 0) { ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ return ret; ++ } ++ ++ if ((mute_gpio[0]) && (mute_gpio[1])) ++ snd_allo_piano_gpio_mute(&snd_allo_piano_dac); ++ ++ return 0; ++ } ++ ++ return -EINVAL; ++} ++ ++static int snd_allo_piano_dac_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = platform_get_drvdata(pdev); ++ ++ kfree(&card->drvdata); ++ snd_allo_piano_gpio_mute(&snd_allo_piano_dac); ++ return snd_soc_unregister_card(&snd_allo_piano_dac); ++} ++ ++static const struct of_device_id snd_allo_piano_dac_of_match[] = { ++ { .compatible = "allo,piano-dac-plus", }, ++ { /* sentinel */ }, ++}; ++ ++MODULE_DEVICE_TABLE(of, snd_allo_piano_dac_of_match); ++ ++static struct platform_driver snd_allo_piano_dac_driver = { ++ .driver = { ++ .name = "snd-allo-piano-dac-plus", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_allo_piano_dac_of_match, ++ }, ++ .probe = snd_allo_piano_dac_probe, ++ .remove = snd_allo_piano_dac_remove, ++}; ++ ++module_platform_driver(snd_allo_piano_dac_driver); ++ ++MODULE_AUTHOR("Baswaraj K "); ++MODULE_DESCRIPTION("ALSA ASoC Machine Driver for Allo Piano DAC Plus"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0077-Add-support-for-Allo-Boss-DAC-add-on-board-for-Raspb.patch b/target/linux/brcm2708/patches-4.19/950-0077-Add-support-for-Allo-Boss-DAC-add-on-board-for-Raspb.patch new file mode 100644 index 000000000..4dd0fbef2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0077-Add-support-for-Allo-Boss-DAC-add-on-board-for-Raspb.patch @@ -0,0 +1,667 @@ +From f9b56b66913621c3ecba0a5379381fd1e33e1914 Mon Sep 17 00:00:00 2001 +From: BabuSubashChandar +Date: Tue, 28 Mar 2017 20:04:42 +0530 +Subject: [PATCH 077/703] Add support for Allo Boss DAC add-on board for + Raspberry Pi. (#1924) + +Signed-off-by: Baswaraj K +Reviewed-by: Deepak +Reviewed-by: BabuSubashChandar + +Add support for new clock rate and mute gpios. + +Signed-off-by: Baswaraj K +Reviewed-by: Deepak +Reviewed-by: BabuSubashChandar + +ASoC: allo-boss-dac: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Signed-off-by: Matthias Reichl + +ASoC: allo-boss-dac: transmit S24_LE with 64 BCLK cycles + +Signed-off-by: Matthias Reichl +--- + drivers/clk/Makefile | 1 + + drivers/clk/clk-allo-dac.c | 161 ++++++++++++ + sound/soc/bcm/allo-boss-dac.c | 456 ++++++++++++++++++++++++++++++++++ + 3 files changed, 618 insertions(+) + create mode 100644 drivers/clk/clk-allo-dac.c + create mode 100644 sound/soc/bcm/allo-boss-dac.c + +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -18,6 +18,7 @@ endif + + # hardware specific clock types + # please keep this section sorted lexicographically by file path name ++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC) += clk-allo-dac.o + obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o + obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o + obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o +--- /dev/null ++++ b/drivers/clk/clk-allo-dac.c +@@ -0,0 +1,161 @@ ++/* ++ * Clock Driver for Allo DAC ++ * ++ * Author: Baswaraj K ++ * Copyright 2016 ++ * based on code by Stuart MacLean ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Clock rate of CLK44EN attached to GPIO6 pin */ ++#define CLK_44EN_RATE 45158400UL ++/* Clock rate of CLK48EN attached to GPIO3 pin */ ++#define CLK_48EN_RATE 49152000UL ++ ++/** ++ * struct allo_dac_clk - Common struct to the Allo DAC ++ * @hw: clk_hw for the common clk framework ++ * @mode: 0 => CLK44EN, 1 => CLK48EN ++ */ ++struct clk_allo_hw { ++ struct clk_hw hw; ++ uint8_t mode; ++}; ++ ++#define to_allo_clk(_hw) container_of(_hw, struct clk_allo_hw, hw) ++ ++static const struct of_device_id clk_allo_dac_dt_ids[] = { ++ { .compatible = "allo,dac-clk",}, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, clk_allo_dac_dt_ids); ++ ++static unsigned long clk_allo_dac_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ return (to_allo_clk(hw)->mode == 0) ? CLK_44EN_RATE : ++ CLK_48EN_RATE; ++} ++ ++static long clk_allo_dac_round_rate(struct clk_hw *hw, ++ unsigned long rate, unsigned long *parent_rate) ++{ ++ long actual_rate; ++ ++ if (rate <= CLK_44EN_RATE) { ++ actual_rate = (long)CLK_44EN_RATE; ++ } else if (rate >= CLK_48EN_RATE) { ++ actual_rate = (long)CLK_48EN_RATE; ++ } else { ++ long diff44Rate = (long)(rate - CLK_44EN_RATE); ++ long diff48Rate = (long)(CLK_48EN_RATE - rate); ++ ++ if (diff44Rate < diff48Rate) ++ actual_rate = (long)CLK_44EN_RATE; ++ else ++ actual_rate = (long)CLK_48EN_RATE; ++ } ++ return actual_rate; ++} ++ ++ ++static int clk_allo_dac_set_rate(struct clk_hw *hw, ++ unsigned long rate, unsigned long parent_rate) ++{ ++ unsigned long actual_rate; ++ struct clk_allo_hw *clk = to_allo_clk(hw); ++ ++ actual_rate = (unsigned long)clk_allo_dac_round_rate(hw, rate, ++ &parent_rate); ++ clk->mode = (actual_rate == CLK_44EN_RATE) ? 0 : 1; ++ return 0; ++} ++ ++ ++const struct clk_ops clk_allo_dac_rate_ops = { ++ .recalc_rate = clk_allo_dac_recalc_rate, ++ .round_rate = clk_allo_dac_round_rate, ++ .set_rate = clk_allo_dac_set_rate, ++}; ++ ++static int clk_allo_dac_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct clk_allo_hw *proclk; ++ struct clk *clk; ++ struct device *dev; ++ struct clk_init_data init; ++ ++ dev = &pdev->dev; ++ ++ proclk = kzalloc(sizeof(struct clk_allo_hw), GFP_KERNEL); ++ if (!proclk) ++ return -ENOMEM; ++ ++ init.name = "clk-allo-dac"; ++ init.ops = &clk_allo_dac_rate_ops; ++ init.flags = CLK_IS_BASIC; ++ init.parent_names = NULL; ++ init.num_parents = 0; ++ ++ proclk->mode = 0; ++ proclk->hw.init = &init; ++ ++ clk = devm_clk_register(dev, &proclk->hw); ++ if (!IS_ERR(clk)) { ++ ret = of_clk_add_provider(dev->of_node, of_clk_src_simple_get, ++ clk); ++ } else { ++ dev_err(dev, "Fail to register clock driver\n"); ++ kfree(proclk); ++ ret = PTR_ERR(clk); ++ } ++ return ret; ++} ++ ++static int clk_allo_dac_remove(struct platform_device *pdev) ++{ ++ of_clk_del_provider(pdev->dev.of_node); ++ return 0; ++} ++ ++static struct platform_driver clk_allo_dac_driver = { ++ .probe = clk_allo_dac_probe, ++ .remove = clk_allo_dac_remove, ++ .driver = { ++ .name = "clk-allo-dac", ++ .of_match_table = clk_allo_dac_dt_ids, ++ }, ++}; ++ ++static int __init clk_allo_dac_init(void) ++{ ++ return platform_driver_register(&clk_allo_dac_driver); ++} ++core_initcall(clk_allo_dac_init); ++ ++static void __exit clk_allo_dac_exit(void) ++{ ++ platform_driver_unregister(&clk_allo_dac_driver); ++} ++module_exit(clk_allo_dac_exit); ++ ++MODULE_DESCRIPTION("Allo DAC clock driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:clk-allo-dac"); +--- /dev/null ++++ b/sound/soc/bcm/allo-boss-dac.c +@@ -0,0 +1,456 @@ ++/* ++ * ALSA ASoC Machine Driver for Allo Boss DAC ++ * ++ * Author: Baswaraj K ++ * Copyright 2017 ++ * based on code by Daniel Matuschek, ++ * Stuart MacLean ++ * based on code by Florian Meier ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include "../codecs/pcm512x.h" ++ ++#define ALLO_BOSS_NOCLOCK 0 ++#define ALLO_BOSS_CLK44EN 1 ++#define ALLO_BOSS_CLK48EN 2 ++ ++struct pcm512x_priv { ++ struct regmap *regmap; ++ struct clk *sclk; ++}; ++ ++static struct gpio_desc *mute_gpio; ++ ++/* Clock rate of CLK44EN attached to GPIO6 pin */ ++#define CLK_44EN_RATE 45158400UL ++/* Clock rate of CLK48EN attached to GPIO3 pin */ ++#define CLK_48EN_RATE 49152000UL ++ ++static bool slave; ++static bool snd_soc_allo_boss_master; ++static bool digital_gain_0db_limit = true; ++ ++static void snd_allo_boss_select_clk(struct snd_soc_component *component, ++ int clk_id) ++{ ++ switch (clk_id) { ++ case ALLO_BOSS_NOCLOCK: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x00); ++ break; ++ case ALLO_BOSS_CLK44EN: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x20); ++ break; ++ case ALLO_BOSS_CLK48EN: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x04); ++ break; ++ } ++} ++ ++static void snd_allo_boss_clk_gpio(struct snd_soc_component *component) ++{ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x24, 0x24); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_3, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_6, 0x0f, 0x02); ++} ++ ++static bool snd_allo_boss_is_sclk(struct snd_soc_component *component) ++{ ++ unsigned int sck; ++ ++ snd_soc_component_read(component, PCM512x_RATE_DET_4, &sck); ++ return (!(sck & 0x40)); ++} ++ ++static bool snd_allo_boss_is_sclk_sleep( ++ struct snd_soc_component *component) ++{ ++ msleep(2); ++ return snd_allo_boss_is_sclk(component); ++} ++ ++static bool snd_allo_boss_is_master_card(struct snd_soc_component *component) ++{ ++ bool isClk44EN, isClk48En, isNoClk; ++ ++ snd_allo_boss_clk_gpio(component); ++ ++ snd_allo_boss_select_clk(component, ALLO_BOSS_CLK44EN); ++ isClk44EN = snd_allo_boss_is_sclk_sleep(component); ++ ++ snd_allo_boss_select_clk(component, ALLO_BOSS_NOCLOCK); ++ isNoClk = snd_allo_boss_is_sclk_sleep(component); ++ ++ snd_allo_boss_select_clk(component, ALLO_BOSS_CLK48EN); ++ isClk48En = snd_allo_boss_is_sclk_sleep(component); ++ ++ return (isClk44EN && isClk48En && !isNoClk); ++} ++ ++static int snd_allo_boss_clk_for_rate(int sample_rate) ++{ ++ int type; ++ ++ switch (sample_rate) { ++ case 11025: ++ case 22050: ++ case 44100: ++ case 88200: ++ case 176400: ++ case 352800: ++ type = ALLO_BOSS_CLK44EN; ++ break; ++ default: ++ type = ALLO_BOSS_CLK48EN; ++ break; ++ } ++ return type; ++} ++ ++static void snd_allo_boss_set_sclk(struct snd_soc_component *component, ++ int sample_rate) ++{ ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ ++ if (!IS_ERR(pcm512x->sclk)) { ++ int ctype; ++ ++ ctype = snd_allo_boss_clk_for_rate(sample_rate); ++ clk_set_rate(pcm512x->sclk, (ctype == ALLO_BOSS_CLK44EN) ++ ? CLK_44EN_RATE : CLK_48EN_RATE); ++ snd_allo_boss_select_clk(component, ctype); ++ } ++} ++ ++static int snd_allo_boss_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct pcm512x_priv *priv = snd_soc_component_get_drvdata(component); ++ ++ if (slave) ++ snd_soc_allo_boss_master = false; ++ else ++ snd_soc_allo_boss_master = ++ snd_allo_boss_is_master_card(component); ++ ++ if (snd_soc_allo_boss_master) { ++ struct snd_soc_dai_link *dai = rtd->dai_link; ++ ++ dai->name = "BossDAC"; ++ dai->stream_name = "Boss DAC HiFi [Master]"; ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBM_CFM; ++ ++ snd_soc_component_update_bits(component, PCM512x_BCLK_LRCLK_CFG, 0x31, 0x11); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_MODE, 0x03, 0x03); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_CLKDIV_2, 0x7f, 63); ++ /* ++ * Default sclk to CLK_48EN_RATE, otherwise codec ++ * pcm512x_dai_startup_master method could call ++ * snd_pcm_hw_constraint_ratnums using CLK_44EN/64 ++ * which will mask 384k sample rate. ++ */ ++ if (!IS_ERR(priv->sclk)) ++ clk_set_rate(priv->sclk, CLK_48EN_RATE); ++ } else { ++ priv->sclk = ERR_PTR(-ENOENT); ++ } ++ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ ++ if (digital_gain_0db_limit) { ++ int ret; ++ struct snd_soc_card *card = rtd->card; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", ++ 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ++ ret); ++ } ++ ++ return 0; ++} ++ ++static int snd_allo_boss_update_rate_den( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ struct snd_ratnum *rats_no_pll; ++ unsigned int num = 0, den = 0; ++ int err; ++ ++ rats_no_pll = devm_kzalloc(rtd->dev, sizeof(*rats_no_pll), GFP_KERNEL); ++ if (!rats_no_pll) ++ return -ENOMEM; ++ ++ rats_no_pll->num = clk_get_rate(pcm512x->sclk) / 64; ++ rats_no_pll->den_min = 1; ++ rats_no_pll->den_max = 128; ++ rats_no_pll->den_step = 1; ++ ++ err = snd_interval_ratnum(hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_RATE), 1, rats_no_pll, &num, &den); ++ if (err >= 0 && den) { ++ params->rate_num = num; ++ params->rate_den = den; ++ } ++ ++ devm_kfree(rtd->dev, rats_no_pll); ++ return 0; ++} ++ ++static void snd_allo_boss_gpio_mute(struct snd_soc_card *card) ++{ ++ if (mute_gpio) ++ gpiod_set_value_cansleep(mute_gpio, 1); ++} ++ ++static void snd_allo_boss_gpio_unmute(struct snd_soc_card *card) ++{ ++ if (mute_gpio) ++ gpiod_set_value_cansleep(mute_gpio, 0); ++} ++ ++static int snd_allo_boss_set_bias_level(struct snd_soc_card *card, ++ struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) ++{ ++ struct snd_soc_pcm_runtime *rtd; ++ struct snd_soc_dai *codec_dai; ++ ++ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ codec_dai = rtd->codec_dai; ++ ++ if (dapm->dev != codec_dai->dev) ++ return 0; ++ ++ switch (level) { ++ case SND_SOC_BIAS_PREPARE: ++ if (dapm->bias_level != SND_SOC_BIAS_STANDBY) ++ break; ++ /* UNMUTE DAC */ ++ snd_allo_boss_gpio_unmute(card); ++ break; ++ ++ case SND_SOC_BIAS_STANDBY: ++ if (dapm->bias_level != SND_SOC_BIAS_PREPARE) ++ break; ++ /* MUTE DAC */ ++ snd_allo_boss_gpio_mute(card); ++ break; ++ ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static int snd_allo_boss_hw_params( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ int ret = 0; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ int channels = params_channels(params); ++ int width = snd_pcm_format_physical_width(params_format(params)); ++ ++ if (snd_soc_allo_boss_master) { ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_allo_boss_set_sclk(component, ++ params_rate(params)); ++ ++ ret = snd_allo_boss_update_rate_den( ++ substream, params); ++ if (ret) ++ return ret; ++ } ++ ++ ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x03, 0x03, ++ channels, width); ++ if (ret) ++ return ret; ++ ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0x03, 0x03, ++ channels, width); ++ return ret; ++} ++ ++static int snd_allo_boss_startup( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct snd_soc_card *card = rtd->card; ++ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ snd_allo_boss_gpio_mute(card); ++ ++ if (snd_soc_allo_boss_master) { ++ struct pcm512x_priv *priv = snd_soc_component_get_drvdata(component); ++ /* ++ * Default sclk to CLK_48EN_RATE, otherwise codec ++ * pcm512x_dai_startup_master method could call ++ * snd_pcm_hw_constraint_ratnums using CLK_44EN/64 ++ * which will mask 384k sample rate. ++ */ ++ if (!IS_ERR(priv->sclk)) ++ clk_set_rate(priv->sclk, CLK_48EN_RATE); ++ } ++ ++ return 0; ++} ++ ++static void snd_allo_boss_shutdown( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++} ++ ++static int snd_allo_boss_prepare( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_card *card = rtd->card; ++ ++ snd_allo_boss_gpio_unmute(card); ++ return 0; ++} ++/* machine stream operations */ ++static struct snd_soc_ops snd_allo_boss_ops = { ++ .hw_params = snd_allo_boss_hw_params, ++ .startup = snd_allo_boss_startup, ++ .shutdown = snd_allo_boss_shutdown, ++ .prepare = snd_allo_boss_prepare, ++}; ++ ++static struct snd_soc_dai_link snd_allo_boss_dai[] = { ++{ ++ .name = "Boss DAC", ++ .stream_name = "Boss DAC HiFi", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "pcm512x-hifi", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "pcm512x.1-004d", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .ops = &snd_allo_boss_ops, ++ .init = snd_allo_boss_init, ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_allo_boss = { ++ .name = "BossDAC", ++ .owner = THIS_MODULE, ++ .dai_link = snd_allo_boss_dai, ++ .num_links = ARRAY_SIZE(snd_allo_boss_dai), ++}; ++ ++static int snd_allo_boss_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_allo_boss.dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai; ++ ++ dai = &snd_allo_boss_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ ++ if (i2s_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ digital_gain_0db_limit = !of_property_read_bool( ++ pdev->dev.of_node, "allo,24db_digital_gain"); ++ slave = of_property_read_bool(pdev->dev.of_node, ++ "allo,slave"); ++ ++ mute_gpio = devm_gpiod_get_optional(&pdev->dev, "mute", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(mute_gpio)) { ++ ret = PTR_ERR(mute_gpio); ++ dev_err(&pdev->dev, ++ "failed to get mute gpio: %d\n", ret); ++ return ret; ++ } ++ ++ if (mute_gpio) ++ snd_allo_boss.set_bias_level = ++ snd_allo_boss_set_bias_level; ++ ++ ret = snd_soc_register_card(&snd_allo_boss); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ return ret; ++ } ++ ++ if (mute_gpio) ++ snd_allo_boss_gpio_mute(&snd_allo_boss); ++ ++ return 0; ++ } ++ ++ return -EINVAL; ++} ++ ++static int snd_allo_boss_remove(struct platform_device *pdev) ++{ ++ snd_allo_boss_gpio_mute(&snd_allo_boss); ++ return snd_soc_unregister_card(&snd_allo_boss); ++} ++ ++static const struct of_device_id snd_allo_boss_of_match[] = { ++ { .compatible = "allo,boss-dac", }, ++ { /* sentinel */ }, ++}; ++MODULE_DEVICE_TABLE(of, snd_allo_boss_of_match); ++ ++static struct platform_driver snd_allo_boss_driver = { ++ .driver = { ++ .name = "snd-allo-boss-dac", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_allo_boss_of_match, ++ }, ++ .probe = snd_allo_boss_probe, ++ .remove = snd_allo_boss_remove, ++}; ++ ++module_platform_driver(snd_allo_boss_driver); ++ ++MODULE_AUTHOR("Baswaraj K "); ++MODULE_DESCRIPTION("ALSA ASoC Machine Driver for Allo Boss DAC"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0084-Support-for-Blokas-Labs-pisound-board.patch b/target/linux/brcm2708/patches-4.19/950-0078-Support-for-Blokas-Labs-pisound-board.patch similarity index 69% rename from target/linux/brcm2708/patches-4.9/950-0084-Support-for-Blokas-Labs-pisound-board.patch rename to target/linux/brcm2708/patches-4.19/950-0078-Support-for-Blokas-Labs-pisound-board.patch index 103332661..011c0d64e 100644 --- a/target/linux/brcm2708/patches-4.9/950-0084-Support-for-Blokas-Labs-pisound-board.patch +++ b/target/linux/brcm2708/patches-4.19/950-0078-Support-for-Blokas-Labs-pisound-board.patch @@ -1,185 +1,71 @@ -From 7d8efd6f3198fd3dafe5a74003616a2aea5dc6c5 Mon Sep 17 00:00:00 2001 +From 1b7248a956f0322a9b39d13cdddf83a7c0524ae9 Mon Sep 17 00:00:00 2001 From: gtrainavicius Date: Sun, 23 Oct 2016 12:06:53 +0300 -Subject: [PATCH] Support for Blokas Labs pisound board +Subject: [PATCH 078/703] Support for Blokas Labs pisound board Pisound dynamic overlay (#1760) Restructuring pisound-overlay.dts, so it can be loaded and unloaded dynamically using dtoverlay. Print a logline when the kernel module is removed. + +pisound improvements: + +* Added a writable sysfs object to enable scripts / user space software +to blink MIDI activity LEDs for variable duration. +* Improved hw_param constraints setting. +* Added compatibility with S16_LE sample format. +* Exposed some simple placeholder volume controls, so the card appears +in volumealsa widget. + +Add missing SND_PISOUND selects dependency to SND_RAWMIDI + +Without it the Pisound module fails to compile. +See https://github.com/raspberrypi/linux/issues/2366 + +Updates for Pisound module code: + + * Merged 'Fix a warning in DEBUG builds' (1c8b82b). + * Updating some strings and copyright information. + * Fix for handling high load of MIDI input and output. + * Use dual rate oversampling ratio for 96kHz instead of single + rate one. + +Signed-off-by: Giedrius Trainavicius + +Fixing memset call in pisound.c + +Signed-off-by: Giedrius Trainavicius + +Fix for Pisound's MIDI Input getting blocked for a while in rare cases. + +There was a possible race condition which could lead to Input's FIFO queue +to be underflown, causing high amount of processing in the worker thread for +some period of time. + +Signed-off-by: Giedrius Trainavicius --- - .../devicetree/bindings/vendor-prefixes.txt | 1 + - arch/arm/boot/dts/overlays/pisound-overlay.dts | 94 +- - sound/soc/bcm/Kconfig | 6 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/pisound.c | 989 +++++++++++++++++++++ - 5 files changed, 1048 insertions(+), 44 deletions(-) + .../devicetree/bindings/vendor-prefixes.txt | 1 + + sound/soc/bcm/pisound.c | 1204 +++++++++++++++++ + 2 files changed, 1205 insertions(+) create mode 100644 sound/soc/bcm/pisound.c --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt -@@ -41,6 +41,7 @@ avago Avago Technologies - avia avia semiconductor - avic Shanghai AVIC Optoelectronics Co., Ltd. - axis Axis Communications AB +@@ -56,6 +56,7 @@ axis Axis Communications AB + bananapi BIPAI KEJI LIMITED + bhf Beckhoff Automation GmbH & Co. KG + bitmain Bitmain Technologies +blokaslabs Vilniaus Blokas UAB boe BOE Technology Group Co., Ltd. bosch Bosch Sensortec GmbH boundary Boundary Devices Inc. ---- a/arch/arm/boot/dts/overlays/pisound-overlay.dts -+++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts -@@ -26,6 +26,54 @@ - compatible = "brcm,bcm2708"; - - fragment@0 { -+ target = <&spi0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev0>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spidev1>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ pisound_spi: pisound_spi@0{ -+ compatible = "blokaslabs,pisound-spi"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target-path = "/"; -+ __overlay__ { -+ pcm5102a-codec { -+ #sound-dai-cells = <0>; -+ compatible = "ti,pcm5102a"; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@5 { - target = <&sound>; - __overlay__ { - compatible = "blokaslabs,pisound"; -@@ -49,7 +97,7 @@ - }; - }; - -- fragment@1 { -+ fragment@6 { - target = <&gpio>; - __overlay__ { - pinctrl-names = "default"; -@@ -63,52 +111,10 @@ - }; - }; - -- fragment@2 { -+ fragment@7 { - target = <&i2s>; - __overlay__ { - status = "okay"; - }; - }; -- -- fragment@3 { -- target-path = "/"; -- __overlay__ { -- pcm5102a-codec { -- #sound-dai-cells = <0>; -- compatible = "ti,pcm5102a"; -- status = "okay"; -- }; -- }; -- }; -- -- fragment@4 { -- target = <&spi0>; -- __overlay__ { -- status = "okay"; -- -- spidev@0{ -- status = "disabled"; -- }; -- -- spidev@1{ -- status = "okay"; -- }; -- }; -- }; -- -- fragment@5 { -- target = <&spi0>; -- __overlay__ { -- #address-cells = <1>; -- #size-cells = <0>; -- -- pisound_spi: pisound_spi@0{ -- compatible = "blokaslabs,pisound-spi"; -- reg = <0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>; -- spi-max-frequency = <1000000>; -- }; -- }; -- }; - }; ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -130,3 +130,9 @@ config SND_BCM2708_SOC_ALLO_PIANO_DAC - select SND_SOC_PCM512x_I2C - help - Say Y or M if you want to add support for Allo Piano DAC. -+ -+config SND_PISOUND -+ tristate "Support for Blokas Labs pisound" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ help -+ Say Y or M if you want to add support for Blokas Labs pisound. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -25,6 +25,7 @@ snd-soc-audioinjector-pi-soundcard-objs - snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o - snd-soc-dionaudio-loco-objs := dionaudio_loco.o - snd-soc-allo-piano-dac-objs := allo-piano-dac.o -+snd-soc-pisound-objs := pisound.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -42,3 +43,4 @@ obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDC - obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o - obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o - obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o -+obj-$(CONFIG_SND_PISOUND) += snd-soc-pisound.o --- /dev/null +++ b/sound/soc/bcm/pisound.c -@@ -0,0 +1,989 @@ +@@ -0,0 +1,1204 @@ +/* -+ * pisound Linux kernel module. -+ * Copyright (C) 2016 Vilniaus Blokas UAB, http://blokas.io/pisound ++ * Pisound Linux kernel module. ++ * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License @@ -207,6 +93,7 @@ Print a logline when the kernel module is removed. +#include +#include +#include ++#include + +#include +#include @@ -215,11 +102,13 @@ Print a logline when the kernel module is removed. +#include +#include +#include ++#include + +static int pisnd_spi_init(struct device *dev); +static void pisnd_spi_uninit(void); + -+static void pisnd_spi_send(uint8_t val); ++static void pisnd_spi_flush(void); ++static void pisnd_spi_start(void); +static uint8_t pisnd_spi_recv(uint8_t *buffer, uint8_t length); + +typedef void (*pisnd_spi_recv_cb)(void *data); @@ -232,9 +121,15 @@ Print a logline when the kernel module is removed. +static int pisnd_midi_init(struct snd_card *card); +static void pisnd_midi_uninit(void); + ++enum task_e { ++ TASK_PROCESS = 0, ++}; ++ ++static void pisnd_schedule_process(enum task_e task); ++ +#define PISOUND_LOG_PREFIX "pisound: " + -+#ifdef DEBUG ++#ifdef PISOUND_DEBUG +# define printd(...) pr_alert(PISOUND_LOG_PREFIX __VA_ARGS__) +#else +# define printd(...) do {} while (0) @@ -243,13 +138,18 @@ Print a logline when the kernel module is removed. +#define printe(...) pr_err(PISOUND_LOG_PREFIX __VA_ARGS__) +#define printi(...) pr_info(PISOUND_LOG_PREFIX __VA_ARGS__) + ++static struct snd_rawmidi *g_rmidi; ++static struct snd_rawmidi_substream *g_midi_output_substream; ++ +static int pisnd_output_open(struct snd_rawmidi_substream *substream) +{ ++ g_midi_output_substream = substream; + return 0; +} + +static int pisnd_output_close(struct snd_rawmidi_substream *substream) +{ ++ g_midi_output_substream = NULL; + return 0; +} + @@ -258,26 +158,20 @@ Print a logline when the kernel module is removed. + int up + ) +{ -+ uint8_t data; ++ if (substream != g_midi_output_substream) { ++ printe("MIDI output trigger called for an unexpected stream!"); ++ return; ++ } + + if (!up) + return; + -+ while (snd_rawmidi_transmit_peek(substream, &data, 1)) { -+ pisnd_spi_send(data); -+ snd_rawmidi_transmit_ack(substream, 1); -+ } ++ pisnd_spi_start(); +} + +static void pisnd_output_drain(struct snd_rawmidi_substream *substream) +{ -+ uint8_t data; -+ -+ while (snd_rawmidi_transmit_peek(substream, &data, 1)) { -+ pisnd_spi_send(data); -+ -+ snd_rawmidi_transmit_ack(substream, 1); -+ } ++ pisnd_spi_flush(); +} + +static int pisnd_input_open(struct snd_rawmidi_substream *substream) @@ -298,7 +192,7 @@ Print a logline when the kernel module is removed. + while ((n = pisnd_spi_recv(data, sizeof(data)))) { + int res = snd_rawmidi_receive(substream, data, n); + (void)res; -+ printd("midi recv 0x%02x, res = %d\n", data, res); ++ printd("midi recv %u bytes, res = %d\n", n, res); + } +} + @@ -306,14 +200,12 @@ Print a logline when the kernel module is removed. +{ + if (up) { + pisnd_spi_set_callback(pisnd_midi_recv_callback, substream); -+ pisnd_midi_recv_callback(substream); ++ pisnd_schedule_process(TASK_PROCESS); + } else { + pisnd_spi_set_callback(NULL, NULL); + } +} + -+static struct snd_rawmidi *g_rmidi; -+ +static struct snd_rawmidi_ops pisnd_output_ops = { + .open = pisnd_output_open, + .close = pisnd_output_close, @@ -346,7 +238,11 @@ Print a logline when the kernel module is removed. + +static int pisnd_midi_init(struct snd_card *card) +{ -+ int err = snd_rawmidi_new(card, "pisound MIDI", 0, 1, 1, &g_rmidi); ++ int err; ++ ++ g_midi_output_substream = NULL; ++ ++ err = snd_rawmidi_new(card, "pisound MIDI", 0, 1, 1, &g_rmidi); + + if (err < 0) { + printe("snd_rawmidi_new failed: %d\n", err); @@ -387,12 +283,15 @@ Print a logline when the kernel module is removed. +static void *g_recvData; +static pisnd_spi_recv_cb g_recvCallback; + -+#define FIFO_SIZE 512 ++#define FIFO_SIZE 4096 + +static char g_serial_num[11]; +static char g_id[25]; +static char g_version[5]; + ++static uint8_t g_ledFlashDuration; ++static bool g_ledFlashDurationChanged; ++ +DEFINE_KFIFO(spi_fifo_in, uint8_t, FIFO_SIZE); +DEFINE_KFIFO(spi_fifo_out, uint8_t, FIFO_SIZE); + @@ -406,6 +305,7 @@ Print a logline when the kernel module is removed. + +static void pisnd_work_handler(struct work_struct *work); + ++static void spi_transfer(const uint8_t *txbuf, uint8_t *rxbuf, int len); +static uint16_t spi_transfer16(uint16_t val); + +static int pisnd_init_workqueues(void) @@ -429,10 +329,6 @@ Print a logline when the kernel module is removed. + return gpiod_get_value(data_available); +} + -+enum task_e { -+ TASK_PROCESS = 0, -+}; -+ +static void pisnd_schedule_process(enum task_e task) +{ + if (pisnd_spi_device != NULL && @@ -460,9 +356,6 @@ Print a logline when the kernel module is removed. + +static uint16_t spi_transfer16(uint16_t val) +{ -+ int err; -+ struct spi_transfer transfer; -+ struct spi_message msg; + uint8_t txbuf[2]; + uint8_t rxbuf[2]; + @@ -471,19 +364,38 @@ Print a logline when the kernel module is removed. + return 0; + } + -+ spi_message_init(&msg); -+ -+ memset(&transfer, 0, sizeof(transfer)); -+ memset(&rxbuf, 0, sizeof(rxbuf)); -+ + txbuf[0] = val >> 8; + txbuf[1] = val & 0xff; + -+ transfer.tx_buf = &txbuf; -+ transfer.rx_buf = &rxbuf; -+ transfer.len = sizeof(txbuf); -+ transfer.speed_hz = 125000; -+ transfer.delay_usecs = 100; ++ spi_transfer(txbuf, rxbuf, sizeof(txbuf)); ++ ++ printd("received: %02x%02x\n", rxbuf[0], rxbuf[1]); ++ ++ return (rxbuf[0] << 8) | rxbuf[1]; ++} ++ ++static void spi_transfer(const uint8_t *txbuf, uint8_t *rxbuf, int len) ++{ ++ int err; ++ struct spi_transfer transfer; ++ struct spi_message msg; ++ ++ memset(rxbuf, 0, len); ++ ++ if (!pisnd_spi_device) { ++ printe("pisnd_spi_device null, returning\n"); ++ return; ++ } ++ ++ spi_message_init(&msg); ++ ++ memset(&transfer, 0, sizeof(transfer)); ++ ++ transfer.tx_buf = txbuf; ++ transfer.rx_buf = rxbuf; ++ transfer.len = len; ++ transfer.speed_hz = 100000; ++ transfer.delay_usecs = 10; + spi_message_add_tail(&transfer, &msg); + + spin_lock_irqsave(&spilock, spilockflags); @@ -492,13 +404,10 @@ Print a logline when the kernel module is removed. + + if (err < 0) { + printe("spi_sync error %d\n", err); -+ return 0; ++ return; + } + -+ printd("received: %02x%02x\n", rxbuf[0], rxbuf[1]); + printd("hasMore %d\n", pisnd_spi_has_more()); -+ -+ return (rxbuf[0] << 8) | rxbuf[1]; +} + +static int spi_read_bytes(char *dst, size_t length, uint8_t *bytesRead) @@ -510,7 +419,7 @@ Print a logline when the kernel module is removed. + memset(dst, 0, length); + *bytesRead = 0; + -+ rx = spi_transfer16(0); ++ rx = spi_transfer16(0); + if (!(rx >> 8)) + return -EINVAL; + @@ -563,32 +472,93 @@ Print a logline when the kernel module is removed. + +static void pisnd_work_handler(struct work_struct *work) +{ -+ uint16_t rx; -+ uint16_t tx; ++ enum { TRANSFER_SIZE = 4 }; ++ enum { PISOUND_OUTPUT_BUFFER_SIZE = 128 }; ++ enum { MIDI_BYTES_PER_SECOND = 3125 }; ++ int out_buffer_used = 0; ++ unsigned long now; + uint8_t val; ++ uint8_t txbuf[TRANSFER_SIZE]; ++ uint8_t rxbuf[TRANSFER_SIZE]; ++ uint8_t midibuf[TRANSFER_SIZE]; ++ int i, n; ++ bool had_data; ++ ++ unsigned long last_transfer_at = jiffies; + + if (work == &pisnd_work_process) { + if (pisnd_spi_device == NULL) + return; + + do { -+ val = 0; -+ tx = 0; ++ if (g_midi_output_substream && ++ kfifo_avail(&spi_fifo_out) >= sizeof(midibuf)) { + -+ if (kfifo_get(&spi_fifo_out, &val)) -+ tx = 0x0f00 | val; ++ n = snd_rawmidi_transmit_peek( ++ g_midi_output_substream, ++ midibuf, sizeof(midibuf) ++ ); + -+ rx = spi_transfer16(tx); -+ -+ if (rx & 0xff00) { -+ kfifo_put(&spi_fifo_in, rx & 0xff); -+ if (kfifo_len(&spi_fifo_in) > 16 -+ && g_recvCallback) -+ g_recvCallback(g_recvData); ++ if (n > 0) { ++ for (i = 0; i < n; ++i) ++ kfifo_put( ++ &spi_fifo_out, ++ midibuf[i] ++ ); ++ snd_rawmidi_transmit_ack( ++ g_midi_output_substream, ++ i ++ ); ++ } + } -+ } while (rx != 0 ++ ++ had_data = false; ++ memset(txbuf, 0, sizeof(txbuf)); ++ for (i = 0; i < sizeof(txbuf) && ++ out_buffer_used < PISOUND_OUTPUT_BUFFER_SIZE; ++ i += 2) { ++ ++ val = 0; ++ ++ if (g_ledFlashDurationChanged) { ++ txbuf[i+0] = 0xf0; ++ txbuf[i+1] = g_ledFlashDuration; ++ g_ledFlashDuration = 0; ++ g_ledFlashDurationChanged = false; ++ } else if (kfifo_get(&spi_fifo_out, &val)) { ++ txbuf[i+0] = 0x0f; ++ txbuf[i+1] = val; ++ ++out_buffer_used; ++ } ++ } ++ ++ spi_transfer(txbuf, rxbuf, sizeof(txbuf)); ++ /* Estimate the Pisound's MIDI output buffer usage, so ++ * that we don't overflow it. Space in the buffer should ++ * be becoming available at the UART MIDI byte transfer ++ * rate. ++ */ ++ now = jiffies; ++ out_buffer_used -= ++ (MIDI_BYTES_PER_SECOND / HZ) / ++ (now - last_transfer_at); ++ if (out_buffer_used < 0) ++ out_buffer_used = 0; ++ last_transfer_at = now; ++ ++ for (i = 0; i < sizeof(rxbuf); i += 2) { ++ if (rxbuf[i]) { ++ kfifo_put(&spi_fifo_in, rxbuf[i+1]); ++ if (kfifo_len(&spi_fifo_in) > 16 && ++ g_recvCallback) ++ g_recvCallback(g_recvData); ++ had_data = true; ++ } ++ } ++ } while (had_data + || !kfifo_is_empty(&spi_fifo_out) + || pisnd_spi_has_more() ++ || g_ledFlashDurationChanged + ); + + if (!kfifo_is_empty(&spi_fifo_in) && g_recvCallback) @@ -661,7 +631,7 @@ Print a logline when the kernel module is removed. + if (!(tmp >> 8)) + return -EINVAL; + -+ count = tmp & 0xff; ++ count = tmp & 0xff; + + for (i = 0; i < count; ++i) { + memset(buffer, 0, sizeof(buffer)); @@ -748,7 +718,7 @@ Print a logline when the kernel module is removed. + } + + /* Flash the LEDs. */ -+ spi_transfer16(0xf000); ++ spi_transfer16(0xf008); + + ret = pisnd_spi_gpio_irq_init(dev); + if (ret < 0) { @@ -789,10 +759,25 @@ Print a logline when the kernel module is removed. + pisnd_spi_gpio_uninit(); +} + -+static void pisnd_spi_send(uint8_t val) ++static void pisnd_spi_flash_leds(uint8_t duration) +{ -+ kfifo_put(&spi_fifo_out, val); -+ printd("schedule from spi_send\n"); ++ g_ledFlashDuration = duration; ++ g_ledFlashDurationChanged = true; ++ printd("schedule from spi_flash_leds\n"); ++ pisnd_schedule_process(TASK_PROCESS); ++} ++ ++static void pisnd_spi_flush(void) ++{ ++ while (!kfifo_is_empty(&spi_fifo_out)) { ++ pisnd_spi_start(); ++ flush_workqueue(pisnd_workqueue); ++ } ++} ++ ++static void pisnd_spi_start(void) ++{ ++ printd("schedule from spi_start\n"); + pisnd_schedule_process(TASK_PROCESS); +} + @@ -837,6 +822,83 @@ Print a logline when the kernel module is removed. + {}, +}; + ++enum { ++ SWITCH = 0, ++ VOLUME = 1, ++}; ++ ++static int pisnd_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ if (kcontrol->private_value == SWITCH) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 1; ++ return 0; ++ } else if (kcontrol->private_value == VOLUME) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 100; ++ return 0; ++ } ++ return -EINVAL; ++} ++ ++static int pisnd_ctl_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ if (kcontrol->private_value == SWITCH) { ++ ucontrol->value.integer.value[0] = 1; ++ return 0; ++ } else if (kcontrol->private_value == VOLUME) { ++ ucontrol->value.integer.value[0] = 100; ++ return 0; ++ } ++ ++ return -EINVAL; ++} ++ ++static struct snd_kcontrol_new pisnd_ctl[] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PCM Playback Switch", ++ .index = 0, ++ .private_value = SWITCH, ++ .access = SNDRV_CTL_ELEM_ACCESS_READ, ++ .info = pisnd_ctl_info, ++ .get = pisnd_ctl_get, ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PCM Playback Volume", ++ .index = 0, ++ .private_value = VOLUME, ++ .access = SNDRV_CTL_ELEM_ACCESS_READ, ++ .info = pisnd_ctl_info, ++ .get = pisnd_ctl_get, ++ }, ++}; ++ ++static int pisnd_ctl_init(struct snd_card *card) ++{ ++ int err, i; ++ ++ for (i = 0; i < ARRAY_SIZE(pisnd_ctl); ++i) { ++ err = snd_ctl_add(card, snd_ctl_new1(&pisnd_ctl[i], NULL)); ++ if (err < 0) ++ return err; ++ } ++ ++ return 0; ++} ++ ++static int pisnd_ctl_uninit(void) ++{ ++ return 0; ++} ++ +static struct gpio_desc *osr0, *osr1, *osr2; +static struct gpio_desc *reset; +static struct gpio_desc *button; @@ -846,6 +908,14 @@ Print a logline when the kernel module is removed. + struct snd_pcm_hw_params *params + ) +{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ ++ /* Pisound runs on fixed 32 clock counts per channel, ++ * as generated by the master ADC. ++ */ ++ snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2); ++ + printd("rate = %d\n", params_rate(params)); + printd("ch = %d\n", params_channels(params)); + printd("bits = %u\n", @@ -862,8 +932,8 @@ Print a logline when the kernel module is removed. + break; + case 96000: + gpiod_set_value(osr0, true); -+ gpiod_set_value(osr1, true); -+ gpiod_set_value(osr2, false); ++ gpiod_set_value(osr1, false); ++ gpiod_set_value(osr2, true); + break; + case 192000: + gpiod_set_value(osr0, true); @@ -890,16 +960,6 @@ Print a logline when the kernel module is removed. + .mask = 0, +}; + -+static unsigned int sample_bits[] = { -+ 24, 32 -+}; -+ -+static struct snd_pcm_hw_constraint_list constraints_sample_bits = { -+ .count = ARRAY_SIZE(sample_bits), -+ .list = sample_bits, -+ .mask = 0, -+}; -+ +static int pisnd_startup(struct snd_pcm_substream *substream) +{ + int err = snd_pcm_hw_constraint_list( @@ -912,11 +972,21 @@ Print a logline when the kernel module is removed. + if (err < 0) + return err; + -+ err = snd_pcm_hw_constraint_list( ++ err = snd_pcm_hw_constraint_single( + substream->runtime, -+ 0, -+ SNDRV_PCM_HW_PARAM_SAMPLE_BITS, -+ &constraints_sample_bits ++ SNDRV_PCM_HW_PARAM_CHANNELS, ++ 2 ++ ); ++ ++ if (err < 0) ++ return err; ++ ++ err = snd_pcm_hw_constraint_mask64( ++ substream->runtime, ++ SNDRV_PCM_HW_PARAM_FORMAT, ++ SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S24_LE | ++ SNDRV_PCM_FMTBIT_S32_LE + ); + + if (err < 0) @@ -950,14 +1020,23 @@ Print a logline when the kernel module is removed. +{ + int err = pisnd_midi_init(card->snd_card); + -+ if (err < 0) ++ if (err < 0) { + printe("pisnd_midi_init failed: %d\n", err); ++ return err; ++ } + -+ return err; ++ err = pisnd_ctl_init(card->snd_card); ++ if (err < 0) { ++ printe("pisnd_ctl_init failed: %d\n", err); ++ return err; ++ } ++ ++ return 0; +} + +static int pisnd_card_remove(struct snd_soc_card *card) +{ ++ pisnd_ctl_uninit(); + pisnd_midi_uninit(); + return 0; +} @@ -1049,17 +1128,38 @@ Print a logline when the kernel module is removed. + return sprintf(buf, "%s\n", pisnd_spi_get_version()); +} + ++static ssize_t pisnd_led_store( ++ struct kobject *kobj, ++ struct kobj_attribute *attr, ++ const char *buf, ++ size_t length ++ ) ++{ ++ uint32_t timeout; ++ int err; ++ ++ err = kstrtou32(buf, 10, &timeout); ++ ++ if (err == 0 && timeout <= 255) ++ pisnd_spi_flash_leds(timeout); ++ ++ return length; ++} ++ +static struct kobj_attribute pisnd_serial_attribute = -+ __ATTR(serial, 0644, pisnd_serial_show, NULL); ++ __ATTR(serial, 0444, pisnd_serial_show, NULL); +static struct kobj_attribute pisnd_id_attribute = -+ __ATTR(id, 0644, pisnd_id_show, NULL); ++ __ATTR(id, 0444, pisnd_id_show, NULL); +static struct kobj_attribute pisnd_version_attribute = -+ __ATTR(version, 0644, pisnd_version_show, NULL); ++ __ATTR(version, 0444, pisnd_version_show, NULL); ++static struct kobj_attribute pisnd_led_attribute = ++ __ATTR(led, 0644, NULL, pisnd_led_store); + +static struct attribute *attrs[] = { + &pisnd_serial_attribute.attr, + &pisnd_id_attribute.attr, + &pisnd_version_attribute.attr, ++ &pisnd_led_attribute.attr, + NULL +}; + @@ -1076,7 +1176,7 @@ Print a logline when the kernel module is removed. + return ret; + } + -+ printi("Detected pisound card:\n"); ++ printi("Detected Pisound card:\n"); + printi("\tSerial: %s\n", pisnd_spi_get_serial()); + printi("\tVersion: %s\n", pisnd_spi_get_version()); + printi("\tId: %s\n", pisnd_spi_get_id()); @@ -1122,7 +1222,8 @@ Print a logline when the kernel module is removed. + ret = snd_soc_register_card(&pisnd_card); + + if (ret < 0) { -+ printe("snd_soc_register_card() failed: %d\n", ret); ++ if (ret != -EPROBE_DEFER) ++ printe("snd_soc_register_card() failed: %d\n", ret); + pisnd_uninit_gpio(); + kobject_put(pisnd_kobj); + pisnd_spi_uninit(); @@ -1164,5 +1265,5 @@ Print a logline when the kernel module is removed. +module_platform_driver(pisnd_driver); + +MODULE_AUTHOR("Giedrius Trainavicius "); -+MODULE_DESCRIPTION("ASoC Driver for pisound, http://blokas.io/pisound"); ++MODULE_DESCRIPTION("ASoC Driver for Pisound, https://blokas.io/pisound"); +MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0144-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch b/target/linux/brcm2708/patches-4.19/950-0079-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch similarity index 76% rename from target/linux/brcm2708/patches-4.9/950-0144-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch rename to target/linux/brcm2708/patches-4.19/950-0079-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch index 863d10754..3acbca823 100644 --- a/target/linux/brcm2708/patches-4.9/950-0144-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch +++ b/target/linux/brcm2708/patches-4.19/950-0079-ASoC-Add-driver-for-Cirrus-Logic-Audio-Card.patch @@ -1,7 +1,7 @@ -From 01c84e09a331a3b4c29c1cd5ce364c91577c7cea Mon Sep 17 00:00:00 2001 +From 9dea6c4e76e3bace9cbc62fd452de72ce0362034 Mon Sep 17 00:00:00 2001 From: Matthias Reichl Date: Sun, 22 Jan 2017 12:49:37 +0100 -Subject: [PATCH] ASoC: Add driver for Cirrus Logic Audio Card +Subject: [PATCH 079/703] ASoC: Add driver for Cirrus Logic Audio Card Note: due to problems with deferred probing of regulators the following softdep should be added to a modprobe.d file @@ -10,229 +10,13 @@ softdep arizona-spi pre: arizona-ldo1 Signed-off-by: Matthias Reichl --- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 + - .../dts/overlays/rpi-cirrus-wm5102-overlay.dts | 146 +++ - sound/soc/bcm/Kconfig | 9 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/rpi-cirrus.c | 1003 ++++++++++++++++++++ - 6 files changed, 1167 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts + sound/soc/bcm/rpi-cirrus.c | 1029 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 1029 insertions(+) create mode 100644 sound/soc/bcm/rpi-cirrus.c ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -68,6 +68,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - qca7000.dtbo \ - raspidac3.dtbo \ - rpi-backlight.dtbo \ -+ rpi-cirrus-wm5102.dtbo \ - rpi-dac.dtbo \ - rpi-display.dtbo \ - rpi-ft5406.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -995,6 +995,12 @@ Load: dtoverlay=rpi-backlight - Params: - - -+Name: rpi-cirrus-wm5102 -+Info: Configures the Cirrus Logic Audio Card -+Load: dtoverlay=rpi-cirrus-wm5102 -+Params: -+ -+ - Name: rpi-dac - Info: Configures the RPi DAC audio card - Load: dtoverlay=rpi-dac ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts -@@ -0,0 +1,146 @@ -+// Definitions for the Cirrus Logic Audio Card -+/dts-v1/; -+/plugin/; -+#include -+#include -+#include -+ -+/ { -+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; -+ -+ fragment@0 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&gpio>; -+ __overlay__ { -+ wlf_pins: wlf_pins { -+ brcm,pins = <17 22 27 8>; -+ brcm,function = < -+ BCM2835_FSEL_GPIO_OUT -+ BCM2835_FSEL_GPIO_OUT -+ BCM2835_FSEL_GPIO_IN -+ BCM2835_FSEL_GPIO_OUT -+ >; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target-path = "/"; -+ __overlay__ { -+ rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "RPi-Cirrus 1v8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ spidev@0{ -+ status = "disabled"; -+ }; -+ -+ spidev@1{ -+ status = "disabled"; -+ }; -+ -+ wm5102@1{ -+ compatible = "wlf,wm5102"; -+ reg = <1>; -+ -+ spi-max-frequency = <500000>; -+ -+ interrupt-parent = <&gpio>; -+ interrupts = <27 8>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ LDOVDD-supply = <&rpi_cirrus_reg_1v8>; -+ AVDD-supply = <&rpi_cirrus_reg_1v8>; -+ DBVDD1-supply = <&rpi_cirrus_reg_1v8>; -+ DBVDD2-supply = <&vdd_3v3_reg>; -+ DBVDD3-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&rpi_cirrus_reg_1v8>; -+ SPKVDDL-supply = <&vdd_5v0_reg>; -+ SPKVDDR-supply = <&vdd_5v0_reg>; -+ DCVDD-supply = <&arizona_ldo1>; -+ -+ wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>; -+ wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>; -+ wlf,gpio-defaults = < -+ ARIZONA_GP_DEFAULT -+ ARIZONA_GP_DEFAULT -+ ARIZONA_GP_DEFAULT -+ ARIZONA_GP_DEFAULT -+ ARIZONA_GP_DEFAULT -+ >; -+ wlf,micd-configs = <0 1 0>; -+ wlf,dmic-ref = < -+ ARIZONA_DMIC_MICVDD -+ ARIZONA_DMIC_MICBIAS2 -+ ARIZONA_DMIC_MICVDD -+ ARIZONA_DMIC_MICVDD -+ >; -+ wlf,inmode = < -+ ARIZONA_INMODE_DIFF -+ ARIZONA_INMODE_DMIC -+ ARIZONA_INMODE_SE -+ ARIZONA_INMODE_DIFF -+ >; -+ status = "okay"; -+ -+ arizona_ldo1: ldo1 { -+ regulator-name = "LDO1"; -+ // default constraints as in -+ // arizona-ldo1.c -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&i2c1>; -+ __overlay__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ wm8804@3b { -+ compatible = "wlf,wm8804"; -+ reg = <0x3b>; -+ status = "okay"; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ }; -+ -+ fragment@5 { -+ target = <&sound>; -+ __overlay__ { -+ compatible = "wlf,rpi-cirrus"; -+ i2s-controller = <&i2s>; -+ status = "okay"; -+ }; -+ }; -+}; ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -45,6 +45,15 @@ config SND_BCM2708_SOC_HIFIBERRY_AMP - help - Say Y or M if you want to add support for the HifiBerry Amp amplifier board. - -+config SND_BCM2708_SOC_RPI_CIRRUS -+ tristate "Support for Cirrus Logic Audio Card" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM5102 -+ select SND_SOC_WM8804 -+ help -+ Say Y or M if you want to add support for the Wolfson and -+ Cirrus Logic audio cards. -+ - config SND_BCM2708_SOC_RPI_DAC - tristate "Support for RPi-DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -16,6 +16,7 @@ snd-soc-hifiberry-dacplus-objs := hifibe - snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-justboom-dac-objs := justboom-dac.o - snd-soc-justboom-digi-objs := justboom-digi.o -+snd-soc-rpi-cirrus-objs := rpi-cirrus.o - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o -@@ -34,6 +35,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o -+obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o --- /dev/null +++ b/sound/soc/bcm/rpi-cirrus.c -@@ -0,0 +1,1003 @@ +@@ -0,0 +1,1029 @@ +/* + * ASoC machine driver for Cirrus Logic Audio Card + * (with WM5102 and WM8804 codecs) @@ -422,7 +206,8 @@ Signed-off-by: Matthias Reichl + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); -+ struct snd_soc_codec *wm8804_codec = get_wm8804_runtime(card)->codec; ++ struct snd_soc_component *wm8804_component = ++ get_wm8804_runtime(card)->codec_dai->component; + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); + unsigned char *stat = priv->iec958_status; + unsigned char *ctrl_stat = ucontrol->value.iec958.status; @@ -434,7 +219,7 @@ Signed-off-by: Matthias Reichl + if ((ctrl_stat[i] & mask) != (stat[i] & mask)) { + changed = 1; + stat[i] = ctrl_stat[i] & mask; -+ snd_soc_update_bits(wm8804_codec, ++ snd_soc_component_update_bits(wm8804_component, + WM8804_SPDTX1 + i, mask, stat[i]); + } + } @@ -457,14 +242,18 @@ Signed-off-by: Matthias Reichl + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); -+ struct snd_soc_codec *wm8804_codec = get_wm8804_runtime(card)->codec; -+ unsigned int mask; -+ int i; ++ struct snd_soc_component *wm8804_component = ++ get_wm8804_runtime(card)->codec_dai->component; ++ unsigned int val, mask; ++ int i, ret; + + for (i = 0; i < 4; i++) { ++ ret = snd_soc_component_read(wm8804_component, ++ WM8804_RXCHAN1 + i, &val); ++ if (ret) ++ return ret; + mask = (i == 3) ? 0x3f : 0xff; -+ ucontrol->value.iec958.status[i] = -+ snd_soc_read(wm8804_codec, WM8804_RXCHAN1 + i) & mask; ++ ucontrol->value.iec958.status[i] = val & mask; + } + + return 0; @@ -487,13 +276,21 @@ Signed-off-by: Matthias Reichl + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); -+ struct snd_soc_codec *wm8804_codec = get_wm8804_runtime(card)->codec; ++ struct snd_soc_component *wm8804_component = ++ get_wm8804_runtime(card)->codec_dai->component; + + unsigned int bit = kcontrol->private_value & 0xff; + unsigned int reg = (kcontrol->private_value >> 8) & 0xff; + unsigned int invert = (kcontrol->private_value >> 16) & 0xff; ++ int ret; ++ unsigned int val; ++ bool flag; + -+ bool flag = snd_soc_read(wm8804_codec, reg) & (1 << bit); ++ ret = snd_soc_component_read(wm8804_component, reg, &val); ++ if (ret) ++ return ret; ++ ++ flag = val & (1 << bit); + + ucontrol->value.integer.value[0] = invert ? !flag : flag; + @@ -527,10 +324,16 @@ Signed-off-by: Matthias Reichl + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); -+ struct snd_soc_codec *wm8804_codec = get_wm8804_runtime(card)->codec; ++ struct snd_soc_component *wm8804_component = ++ get_wm8804_runtime(card)->codec_dai->component; ++ unsigned int val; ++ int ret; + -+ ucontrol->value.enumerated.item[0] = -+ (snd_soc_read(wm8804_codec, WM8804_SPDSTAT) >> 4) & 0x03; ++ ret = snd_soc_component_read(wm8804_component, WM8804_SPDSTAT, &val); ++ if (ret) ++ return ret; ++ ++ ucontrol->value.enumerated.item[0] = (val >> 4) & 0x03; + return 0; +} + @@ -651,13 +454,13 @@ Signed-off-by: Matthias Reichl +}; + +static int rpi_cirrus_clear_flls(struct snd_soc_card *card, -+ struct snd_soc_codec *wm5102_codec) { ++ struct snd_soc_component *wm5102_component) { + + int ret1, ret2; + -+ ret1 = snd_soc_codec_set_pll(wm5102_codec, ++ ret1 = snd_soc_component_set_pll(wm5102_component, + WM5102_FLL1, ARIZONA_FLL_SRC_NONE, 0, 0); -+ ret2 = snd_soc_codec_set_pll(wm5102_codec, ++ ret2 = snd_soc_component_set_pll(wm5102_component, + WM5102_FLL1_REFCLK, ARIZONA_FLL_SRC_NONE, 0, 0); + + if (ret1) { @@ -674,9 +477,9 @@ Signed-off-by: Matthias Reichl +} + +static int rpi_cirrus_set_fll(struct snd_soc_card *card, -+ struct snd_soc_codec *wm5102_codec, unsigned int clk_freq) ++ struct snd_soc_component *wm5102_component, unsigned int clk_freq) +{ -+ int ret = snd_soc_codec_set_pll(wm5102_codec, ++ int ret = snd_soc_component_set_pll(wm5102_component, + WM5102_FLL1, + ARIZONA_CLK_SRC_MCLK1, + WM8804_CLKOUT_HZ, @@ -690,10 +493,10 @@ Signed-off-by: Matthias Reichl +} + +static int rpi_cirrus_set_fll_refclk(struct snd_soc_card *card, -+ struct snd_soc_codec *wm5102_codec, ++ struct snd_soc_component *wm5102_component, + unsigned int clk_freq, unsigned int aif2_freq) +{ -+ int ret = snd_soc_codec_set_pll(wm5102_codec, ++ int ret = snd_soc_component_set_pll(wm5102_component, + WM5102_FLL1_REFCLK, + ARIZONA_CLK_SRC_MCLK1, + WM8804_CLKOUT_HZ, @@ -705,7 +508,7 @@ Signed-off-by: Matthias Reichl + return ret; + } + -+ ret = snd_soc_codec_set_pll(wm5102_codec, ++ ret = snd_soc_component_set_pll(wm5102_component, + WM5102_FLL1, + ARIZONA_CLK_SRC_AIF2BCLK, + aif2_freq, clk_freq); @@ -723,7 +526,8 @@ Signed-off-by: Matthias Reichl +{ + struct snd_soc_card *card = w->dapm->card; + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); -+ struct snd_soc_codec *wm5102_codec = get_wm5102_runtime(card)->codec; ++ struct snd_soc_component *wm5102_component = ++ get_wm5102_runtime(card)->codec_dai->component; + + unsigned int clk_freq, aif2_freq; + int ret = 0; @@ -741,13 +545,13 @@ Signed-off-by: Matthias Reichl + "spdif_rx: changing FLL1 to use Ref Clock clk: %d spdif: %d\n", + clk_freq, aif2_freq); + -+ ret = rpi_cirrus_clear_flls(card, wm5102_codec); ++ ret = rpi_cirrus_clear_flls(card, wm5102_component); + if (ret) { + dev_err(card->dev, "spdif_rx: failed to clear FLLs\n"); + goto out; + } + -+ ret = rpi_cirrus_set_fll_refclk(card, wm5102_codec, ++ ret = rpi_cirrus_set_fll_refclk(card, wm5102_component, + clk_freq, aif2_freq); + + if (ret) { @@ -780,7 +584,8 @@ Signed-off-by: Matthias Reichl +{ + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); + struct snd_soc_pcm_runtime *wm5102_runtime = get_wm5102_runtime(card); -+ struct snd_soc_codec *wm5102_codec = wm5102_runtime->codec; ++ struct snd_soc_component *wm5102_component = ++ wm5102_runtime->codec_dai->component; + + int ret = 0; + unsigned int clk_freq; @@ -802,7 +607,8 @@ Signed-off-by: Matthias Reichl + "set_bias: changing FLL1 from %d to %d\n", + priv->fll1_freq, clk_freq); + -+ ret = rpi_cirrus_set_fll(card, wm5102_codec, clk_freq); ++ ret = rpi_cirrus_set_fll(card, ++ wm5102_component, clk_freq); + if (ret) + dev_err(card->dev, + "set_bias: Failed to set FLL1\n"); @@ -824,7 +630,8 @@ Signed-off-by: Matthias Reichl +{ + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); + struct snd_soc_pcm_runtime *wm5102_runtime = get_wm5102_runtime(card); -+ struct snd_soc_codec *wm5102_codec = wm5102_runtime->codec; ++ struct snd_soc_component *wm5102_component = ++ wm5102_runtime->codec_dai->component; + + if (dapm->dev != wm5102_runtime->codec_dai->dev) + return 0; @@ -837,7 +644,7 @@ Signed-off-by: Matthias Reichl + "set_bias_post: changing FLL1 from %d to off\n", + priv->fll1_freq); + -+ if (rpi_cirrus_clear_flls(card, wm5102_codec)) ++ if (rpi_cirrus_clear_flls(card, wm5102_component)) + dev_err(card->dev, + "set_bias_post: failed to clear FLLs\n"); + else @@ -919,7 +726,7 @@ Signed-off-by: Matthias Reichl + struct snd_soc_card *card = rtd->card; + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); + struct snd_soc_dai *bcm_i2s_dai = rtd->cpu_dai; -+ struct snd_soc_codec *wm5102_codec = rtd->codec; ++ struct snd_soc_component *wm5102_component = rtd->codec_dai->component; + struct snd_soc_dai *wm8804_dai = get_wm8804_runtime(card)->codec_dai; + + int ret; @@ -952,7 +759,7 @@ Signed-off-by: Matthias Reichl + goto out; + } + -+ ret = snd_soc_codec_set_sysclk(wm5102_codec, ++ ret = snd_soc_component_set_sysclk(wm5102_component, + ARIZONA_CLK_SYSCLK, + ARIZONA_CLK_SRC_FLL1, + clk_freq, @@ -967,12 +774,12 @@ Signed-off-by: Matthias Reichl + "hw_params: changing FLL1 from %d to %d\n", + priv->fll1_freq, clk_freq); + -+ if (rpi_cirrus_clear_flls(card, wm5102_codec)) { ++ if (rpi_cirrus_clear_flls(card, wm5102_component)) { + dev_err(card->dev, "hw_params: failed to clear FLLs\n"); + goto out; + } + -+ if (rpi_cirrus_set_fll(card, wm5102_codec, clk_freq)) { ++ if (rpi_cirrus_set_fll(card, wm5102_component, clk_freq)) { + dev_err(card->dev, "hw_params: failed to set FLL\n"); + goto out; + } @@ -997,7 +804,7 @@ Signed-off-by: Matthias Reichl + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_card *card = rtd->card; + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); -+ struct snd_soc_codec *wm5102_codec = rtd->codec; ++ struct snd_soc_component *wm5102_component = rtd->codec_dai->component; + int ret; + unsigned int old_params_set = priv->params_set; + @@ -1008,7 +815,7 @@ Signed-off-by: Matthias Reichl + dev_dbg(card->dev, + "hw_free: Setting SYSCLK to Zero\n"); + -+ ret = snd_soc_codec_set_sysclk(wm5102_codec, ++ ret = snd_soc_component_set_sysclk(wm5102_component, + ARIZONA_CLK_SYSCLK, + ARIZONA_CLK_SRC_FLL1, + 0, @@ -1023,18 +830,18 @@ Signed-off-by: Matthias Reichl + +static int rpi_cirrus_init_wm5102(struct snd_soc_pcm_runtime *rtd) +{ -+ struct snd_soc_codec *codec = rtd->codec; ++ struct snd_soc_component *component = rtd->codec_dai->component; + int ret; + + /* no 32kHz input, derive it from sysclk if needed */ -+ snd_soc_update_bits(codec, ++ snd_soc_component_update_bits(component, + ARIZONA_CLOCK_32K_1, ARIZONA_CLK_32K_SRC_MASK, 2); + -+ if (rpi_cirrus_clear_flls(rtd->card, codec)) ++ if (rpi_cirrus_clear_flls(rtd->card, component)) + dev_warn(rtd->card->dev, + "init_wm5102: failed to clear FLLs\n"); + -+ ret = snd_soc_codec_set_sysclk(codec, ++ ret = snd_soc_component_set_sysclk(component, + ARIZONA_CLK_SYSCLK, ARIZONA_CLK_SRC_FLL1, + 0, SND_SOC_CLOCK_IN); + if (ret) { @@ -1048,17 +855,20 @@ Signed-off-by: Matthias Reichl + +static int rpi_cirrus_init_wm8804(struct snd_soc_pcm_runtime *rtd) +{ -+ struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_component *component = codec_dai->component; + struct snd_soc_card *card = rtd->card; + struct rpi_cirrus_priv *priv = snd_soc_card_get_drvdata(card); -+ unsigned int mask; ++ unsigned int val, mask; + int i, ret; + + for (i = 0; i < 4; i++) { ++ ret = snd_soc_component_read(component, ++ WM8804_SPDTX1 + i, &val); ++ if (ret) ++ return ret; + mask = (i == 3) ? 0x3f : 0xff; -+ priv->iec958_status[i] = -+ snd_soc_read(codec, WM8804_SPDTX1 + i) & mask; ++ priv->iec958_status[i] = val & mask; + } + + /* Setup for 256fs */ diff --git a/target/linux/brcm2708/patches-4.19/950-0080-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch b/target/linux/brcm2708/patches-4.19/950-0080-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch new file mode 100644 index 000000000..fe3e52d2c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0080-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch @@ -0,0 +1,138 @@ +From 3e2070202a0607fe572f565ed4c18aa964fc18e5 Mon Sep 17 00:00:00 2001 +From: Miquel +Date: Fri, 24 Feb 2017 20:51:06 +0100 +Subject: [PATCH 080/703] sound: Support for Dion Audio LOCO-V2 DAC-AMP HAT + +Signed-off-by: Miquel Blauw + +ASoC: dionaudio_loco-v2: fix S24_LE format + +Remove set_bclk_ratio call so 24-bit data is transmitted in +24 bclk cycles. + +Also remove hw_params and ops as they are no longer needed. + +Signed-off-by: Matthias Reichl +--- + sound/soc/bcm/dionaudio_loco-v2.c | 115 ++++++++++++++++++++++++++++++ + 1 file changed, 115 insertions(+) + create mode 100644 sound/soc/bcm/dionaudio_loco-v2.c + +--- /dev/null ++++ b/sound/soc/bcm/dionaudio_loco-v2.c +@@ -0,0 +1,115 @@ ++/* ++ * ASoC Driver for Dion Audio LOCO-V2 DAC-AMP ++ * ++ * Author: Miquel Blauw ++ * Copyright 2017 ++ * ++ * Based on the software of the RPi-DAC writen by Florian Meier ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static bool digital_gain_0db_limit = true; ++ ++static int snd_rpi_dionaudio_loco_v2_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ if (digital_gain_0db_limit) { ++ int ret; ++ struct snd_soc_card *card = rtd->card; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); ++ } ++ ++ return 0; ++} ++ ++static struct snd_soc_dai_link snd_rpi_dionaudio_loco_v2_dai[] = { ++{ ++ .name = "DionAudio LOCO-V2", ++ .stream_name = "DionAudio LOCO-V2 DAC-AMP", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "pcm512x-hifi", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "pcm512x.1-004d", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .init = snd_rpi_dionaudio_loco_v2_init, ++},}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_dionaudio_loco_v2 = { ++ .name = "Dion Audio LOCO-V2", ++ .dai_link = snd_rpi_dionaudio_loco_v2_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_dionaudio_loco_v2_dai), ++}; ++ ++static int snd_rpi_dionaudio_loco_v2_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_rpi_dionaudio_loco_v2.dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai = ++ &snd_rpi_dionaudio_loco_v2_dai[0]; ++ ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (i2s_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ digital_gain_0db_limit = !of_property_read_bool( ++ pdev->dev.of_node, "dionaudio,24db_digital_gain"); ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_dionaudio_loco_v2); ++ if (ret) ++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ++ ret); ++ ++ return ret; ++} ++ ++static const struct of_device_id dionaudio_of_match[] = { ++ { .compatible = "dionaudio,dionaudio-loco-v2", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, dionaudio_of_match); ++ ++static struct platform_driver snd_rpi_dionaudio_loco_v2_driver = { ++ .driver = { ++ .name = "snd-rpi-dionaudio-loco-v2", ++ .owner = THIS_MODULE, ++ .of_match_table = dionaudio_of_match, ++ }, ++ .probe = snd_rpi_dionaudio_loco_v2_probe, ++}; ++ ++module_platform_driver(snd_rpi_dionaudio_loco_v2_driver); ++ ++MODULE_AUTHOR("Miquel Blauw "); ++MODULE_DESCRIPTION("ASoC Driver for DionAudio LOCO-V2"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0081-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch b/target/linux/brcm2708/patches-4.19/950-0081-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch new file mode 100644 index 000000000..cafc88f32 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0081-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch @@ -0,0 +1,170 @@ +From 0719be99171119689b89d117141b65e849a49239 Mon Sep 17 00:00:00 2001 +From: Fe-Pi +Date: Wed, 1 Mar 2017 04:42:43 -0700 +Subject: [PATCH 081/703] Add support for Fe-Pi audio sound card. (#1867) + +Fe-Pi Audio Sound Card is based on NXP SGTL5000 codec. +Mechanical specification of the board is the same the Raspberry Pi Zero. +3.5mm jacks for Headphone/Mic, Line In, and Line Out. + +Signed-off-by: Henry Kupis +--- + sound/soc/bcm/fe-pi-audio.c | 152 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 152 insertions(+) + create mode 100644 sound/soc/bcm/fe-pi-audio.c + +--- /dev/null ++++ b/sound/soc/bcm/fe-pi-audio.c +@@ -0,0 +1,152 @@ ++/* ++ * ASoC Driver for Fe-Pi Audio Sound Card ++ * ++ * Author: Henry Kupis ++ * Copyright 2016 ++ * based on code by Florian Meier ++ * based on code by Shawn Guo ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/sgtl5000.h" ++ ++static int snd_fe_pi_audio_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_card *card = rtd->card; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_soc_dapm_force_enable_pin(&card->dapm, "LO"); ++ snd_soc_dapm_force_enable_pin(&card->dapm, "ADC"); ++ snd_soc_dapm_force_enable_pin(&card->dapm, "DAC"); ++ snd_soc_dapm_force_enable_pin(&card->dapm, "HP"); ++ snd_soc_component_update_bits(component, SGTL5000_CHIP_ANA_POWER, ++ SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP); ++ ++ return 0; ++} ++ ++static int snd_fe_pi_audio_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct device *dev = rtd->card->dev; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ int ret; ++ ++ /* Set SGTL5000's SYSCLK */ ++ ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, 12288000, SND_SOC_CLOCK_IN); ++ if (ret) { ++ dev_err(dev, "could not set codec driver clock params\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++ ++static struct snd_soc_ops snd_fe_pi_audio_ops = { ++ .hw_params = snd_fe_pi_audio_hw_params, ++}; ++ ++static struct snd_soc_dai_link snd_fe_pi_audio_dai[] = { ++ { ++ .name = "FE-PI", ++ .stream_name = "Fe-Pi HiFi", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "sgtl5000", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "sgtl5000.1-000a", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ .ops = &snd_fe_pi_audio_ops, ++ .init = snd_fe_pi_audio_init, ++ }, ++}; ++ ++static const struct snd_soc_dapm_route fe_pi_audio_dapm_routes[] = { ++ {"ADC", NULL, "Mic Bias"}, ++}; ++ ++ ++static struct snd_soc_card fe_pi_audio = { ++ .name = "Fe-Pi Audio", ++ .owner = THIS_MODULE, ++ .dai_link = snd_fe_pi_audio_dai, ++ .num_links = ARRAY_SIZE(snd_fe_pi_audio_dai), ++ ++ .dapm_routes = fe_pi_audio_dapm_routes, ++ .num_dapm_routes = ARRAY_SIZE(fe_pi_audio_dapm_routes), ++}; ++ ++static int snd_fe_pi_audio_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct snd_soc_card *card = &fe_pi_audio; ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai = &snd_fe_pi_audio_dai[0]; ++ ++ fe_pi_audio.dev = &pdev->dev; ++ ++ i2s_node = of_parse_phandle(np, "i2s-controller", 0); ++ if (!i2s_node) { ++ dev_err(&pdev->dev, "i2s_node phandle missing or invalid\n"); ++ return -EINVAL; ++ } ++ ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ ++ of_node_put(i2s_node); ++ ++ card->dev = &pdev->dev; ++ platform_set_drvdata(pdev, card); ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, card); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static const struct of_device_id snd_fe_pi_audio_of_match[] = { ++ { .compatible = "fe-pi,fe-pi-audio", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_fe_pi_audio_of_match); ++ ++static struct platform_driver snd_fe_pi_audio_driver = { ++ .driver = { ++ .name = "snd-fe-pi-audio", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_fe_pi_audio_of_match, ++ }, ++ .probe = snd_fe_pi_audio_probe, ++}; ++ ++module_platform_driver(snd_fe_pi_audio_driver); ++ ++MODULE_AUTHOR("Henry Kupis "); ++MODULE_DESCRIPTION("ASoC Driver for Fe-Pi Audio"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0082-Add-support-for-the-AudioInjector.net-Octo-sound-car.patch b/target/linux/brcm2708/patches-4.19/950-0082-Add-support-for-the-AudioInjector.net-Octo-sound-car.patch new file mode 100644 index 000000000..856d4c282 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0082-Add-support-for-the-AudioInjector.net-Octo-sound-car.patch @@ -0,0 +1,374 @@ +From e95def09872db37a8e577da0882a113f68476af4 Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Wed, 8 Mar 2017 20:04:13 +1100 +Subject: [PATCH 082/703] Add support for the AudioInjector.net Octo sound card + +AudioInjector Octo: sample rates, regulators, reset + +This patch adds new sample rates to the Audioinjector Octo sound card. The +new supported rates are (in kHz) : +96, 48, 32, 24, 16, 8, 88.2, 44.1, 29.4, 22.05, 14.7 + +Reference the bcm270x DT regulators in the overlay. + +This patch adds a reset GPIO for the AudioInjector.net octo sound card. + +Audioinjector octo : Make the playback and capture symmetric + +This patch ensures that the sample rate and channel count of the audioinjector +octo sound card are symmetric. + +audioinjector-octo: Add continuous clock feature + +By user request, add a switch to prevent the clocks being stopped when +the stream is paused, stopped or shutdown. Provide access to the switch +by adding a 'non-stop-clocks' parameter to the audioinjector-addons +overlay. + +See: https://github.com/raspberrypi/linux/issues/2409 + +Signed-off-by: Phil Elwell +--- + sound/soc/bcm/audioinjector-octo-soundcard.c | 336 +++++++++++++++++++ + 1 file changed, 336 insertions(+) + create mode 100644 sound/soc/bcm/audioinjector-octo-soundcard.c + +--- /dev/null ++++ b/sound/soc/bcm/audioinjector-octo-soundcard.c +@@ -0,0 +1,336 @@ ++/* ++ * ASoC Driver for AudioInjector Pi octo channel soundcard (hat) ++ * ++ * Created on: 27-October-2016 ++ * Author: flatmax@flatmax.org ++ * based on audioinjector-pi-soundcard.c ++ * ++ * Copyright (C) 2016 Flatmax Pty. Ltd. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++static struct gpio_descs *mult_gpios; ++static struct gpio_desc *codec_rst_gpio; ++static unsigned int audioinjector_octo_rate; ++static bool non_stop_clocks; ++ ++static const unsigned int audioinjector_octo_rates[] = { ++ 96000, 48000, 32000, 24000, 16000, 8000, 88200, 44100, 29400, 22050, 14700, ++}; ++ ++static struct snd_pcm_hw_constraint_list audioinjector_octo_constraints = { ++ .list = audioinjector_octo_rates, ++ .count = ARRAY_SIZE(audioinjector_octo_rates), ++}; ++ ++static int audioinjector_octo_dai_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ return snd_soc_dai_set_bclk_ratio(rtd->cpu_dai, 64); ++} ++ ++static int audioinjector_octo_startup(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ rtd->cpu_dai->driver->playback.channels_min = 8; ++ rtd->cpu_dai->driver->playback.channels_max = 8; ++ rtd->cpu_dai->driver->capture.channels_min = 8; ++ rtd->cpu_dai->driver->capture.channels_max = 8; ++ rtd->codec_dai->driver->capture.channels_max = 8; ++ ++ snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &audioinjector_octo_constraints); ++ ++ return 0; ++} ++ ++static void audioinjector_octo_shutdown(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ rtd->cpu_dai->driver->playback.channels_min = 2; ++ rtd->cpu_dai->driver->playback.channels_max = 2; ++ rtd->cpu_dai->driver->capture.channels_min = 2; ++ rtd->cpu_dai->driver->capture.channels_max = 2; ++ rtd->codec_dai->driver->capture.channels_max = 6; ++} ++ ++static int audioinjector_octo_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ ++ // set codec DAI configuration ++ int ret = snd_soc_dai_set_fmt(rtd->codec_dai, ++ SND_SOC_DAIFMT_CBS_CFS|SND_SOC_DAIFMT_DSP_A| ++ SND_SOC_DAIFMT_NB_NF); ++ if (ret < 0) ++ return ret; ++ ++ // set cpu DAI configuration ++ ret = snd_soc_dai_set_fmt(rtd->cpu_dai, ++ SND_SOC_DAIFMT_CBM_CFM|SND_SOC_DAIFMT_I2S| ++ SND_SOC_DAIFMT_NB_NF); ++ if (ret < 0) ++ return ret; ++ ++ audioinjector_octo_rate = params_rate(params); ++ ++ // Set the correct sysclock for the codec ++ switch (audioinjector_octo_rate) { ++ case 96000: ++ case 48000: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 49152000, ++ 0); ++ break; ++ case 24000: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 49152000/2, ++ 0); ++ break; ++ case 32000: ++ case 16000: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 49152000/3, ++ 0); ++ break; ++ case 8000: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 49152000/6, ++ 0); ++ break; ++ case 88200: ++ case 44100: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 45185400, ++ 0); ++ break; ++ case 22050: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 45185400/2, ++ 0); ++ break; ++ case 29400: ++ case 14700: ++ return snd_soc_dai_set_sysclk(rtd->codec_dai, 0, 45185400/3, ++ 0); ++ break; ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int audioinjector_octo_trigger(struct snd_pcm_substream *substream, ++ int cmd){ ++ int mult[4]; ++ ++ memset(mult, 0, sizeof(mult)); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ if (!non_stop_clocks) ++ break; ++ /* Drop through... */ ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ switch (audioinjector_octo_rate) { ++ case 96000: ++ mult[3] = 1; ++ case 88200: ++ mult[1] = 1; ++ mult[2] = 1; ++ break; ++ case 48000: ++ mult[3] = 1; ++ case 44100: ++ mult[2] = 1; ++ break; ++ case 32000: ++ mult[3] = 1; ++ case 29400: ++ mult[0] = 1; ++ mult[1] = 1; ++ break; ++ case 24000: ++ mult[3] = 1; ++ case 22050: ++ mult[1] = 1; ++ break; ++ case 16000: ++ mult[3] = 1; ++ case 14700: ++ mult[0] = 1; ++ break; ++ case 8000: ++ mult[3] = 1; ++ break; ++ default: ++ return -EINVAL; ++ } ++ break; ++ default: ++ return -EINVAL; ++ } ++ gpiod_set_array_value_cansleep(mult_gpios->ndescs, mult_gpios->desc, ++ mult); ++ ++ return 0; ++} ++ ++static struct snd_soc_ops audioinjector_octo_ops = { ++ .startup = audioinjector_octo_startup, ++ .shutdown = audioinjector_octo_shutdown, ++ .hw_params = audioinjector_octo_hw_params, ++ .trigger = audioinjector_octo_trigger, ++}; ++ ++static struct snd_soc_dai_link audioinjector_octo_dai[] = { ++ { ++ .name = "AudioInjector Octo", ++ .stream_name = "AudioInject-HIFI", ++ .codec_dai_name = "cs42448", ++ .ops = &audioinjector_octo_ops, ++ .init = audioinjector_octo_dai_init, ++ .symmetric_rates = 1, ++ .symmetric_channels = 1, ++ }, ++}; ++ ++static const struct snd_soc_dapm_widget audioinjector_octo_widgets[] = { ++ SND_SOC_DAPM_OUTPUT("OUTPUTS0"), ++ SND_SOC_DAPM_OUTPUT("OUTPUTS1"), ++ SND_SOC_DAPM_OUTPUT("OUTPUTS2"), ++ SND_SOC_DAPM_OUTPUT("OUTPUTS3"), ++ SND_SOC_DAPM_INPUT("INPUTS0"), ++ SND_SOC_DAPM_INPUT("INPUTS1"), ++ SND_SOC_DAPM_INPUT("INPUTS2"), ++}; ++ ++static const struct snd_soc_dapm_route audioinjector_octo_route[] = { ++ /* Balanced outputs */ ++ {"OUTPUTS0", NULL, "AOUT1L"}, ++ {"OUTPUTS0", NULL, "AOUT1R"}, ++ {"OUTPUTS1", NULL, "AOUT2L"}, ++ {"OUTPUTS1", NULL, "AOUT2R"}, ++ {"OUTPUTS2", NULL, "AOUT3L"}, ++ {"OUTPUTS2", NULL, "AOUT3R"}, ++ {"OUTPUTS3", NULL, "AOUT4L"}, ++ {"OUTPUTS3", NULL, "AOUT4R"}, ++ ++ /* Balanced inputs */ ++ {"AIN1L", NULL, "INPUTS0"}, ++ {"AIN1R", NULL, "INPUTS0"}, ++ {"AIN2L", NULL, "INPUTS1"}, ++ {"AIN2R", NULL, "INPUTS1"}, ++ {"AIN3L", NULL, "INPUTS2"}, ++ {"AIN3R", NULL, "INPUTS2"}, ++}; ++ ++static struct snd_soc_card snd_soc_audioinjector_octo = { ++ .name = "audioinjector-octo-soundcard", ++ .dai_link = audioinjector_octo_dai, ++ .num_links = ARRAY_SIZE(audioinjector_octo_dai), ++ ++ .dapm_widgets = audioinjector_octo_widgets, ++ .num_dapm_widgets = ARRAY_SIZE(audioinjector_octo_widgets), ++ .dapm_routes = audioinjector_octo_route, ++ .num_dapm_routes = ARRAY_SIZE(audioinjector_octo_route), ++}; ++ ++static int audioinjector_octo_probe(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = &snd_soc_audioinjector_octo; ++ int ret; ++ ++ card->dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct snd_soc_dai_link *dai = &audioinjector_octo_dai[0]; ++ struct device_node *i2s_node = ++ of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ struct device_node *codec_node = ++ of_parse_phandle(pdev->dev.of_node, ++ "codec", 0); ++ ++ mult_gpios = devm_gpiod_get_array_optional(&pdev->dev, "mult", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(mult_gpios)) ++ return PTR_ERR(mult_gpios); ++ ++ codec_rst_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(codec_rst_gpio)) ++ return PTR_ERR(codec_rst_gpio); ++ ++ non_stop_clocks = of_property_read_bool(pdev->dev.of_node, "non-stop-clocks"); ++ ++ if (codec_rst_gpio) ++ gpiod_set_value(codec_rst_gpio, 1); ++ msleep(500); ++ if (codec_rst_gpio) ++ gpiod_set_value(codec_rst_gpio, 0); ++ msleep(500); ++ if (codec_rst_gpio) ++ gpiod_set_value(codec_rst_gpio, 1); ++ msleep(500); ++ ++ if (i2s_node && codec_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ dai->codec_name = NULL; ++ dai->codec_of_node = codec_node; ++ } else ++ if (!dai->cpu_of_node) { ++ dev_err(&pdev->dev, ++ "i2s-controller missing or invalid in DT\n"); ++ return -EINVAL; ++ } else { ++ dev_err(&pdev->dev, ++ "Property 'codec' missing or invalid\n"); ++ return -EINVAL; ++ } ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, card); ++ if (ret != 0) ++ dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); ++ return ret; ++} ++ ++static const struct of_device_id audioinjector_octo_of_match[] = { ++ { .compatible = "ai,audioinjector-octo-soundcard", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, audioinjector_octo_of_match); ++ ++static struct platform_driver audioinjector_octo_driver = { ++ .driver = { ++ .name = "audioinjector-octo", ++ .owner = THIS_MODULE, ++ .of_match_table = audioinjector_octo_of_match, ++ }, ++ .probe = audioinjector_octo_probe, ++}; ++ ++module_platform_driver(audioinjector_octo_driver); ++MODULE_AUTHOR("Matt Flax "); ++MODULE_DESCRIPTION("AudioInjector.net octo Soundcard"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:audioinjector-octo-soundcard"); diff --git a/target/linux/brcm2708/patches-4.19/950-0083-Driver-support-for-Google-voiceHAT-soundcard.patch b/target/linux/brcm2708/patches-4.19/950-0083-Driver-support-for-Google-voiceHAT-soundcard.patch new file mode 100644 index 000000000..e52f02b7c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0083-Driver-support-for-Google-voiceHAT-soundcard.patch @@ -0,0 +1,254 @@ +From 7a03cd841be6b35ae99b7a4a1b415786df98da88 Mon Sep 17 00:00:00 2001 +From: Peter Malkin +Date: Mon, 27 Mar 2017 16:38:21 -0700 +Subject: [PATCH 083/703] Driver support for Google voiceHAT soundcard. + +ASoC: googlevoicehat-codec: Use correct device when grabbing GPIO + +The fixup for the VoiceHAT in 4.18 incorrectly tried to find the +sdmode GPIO pin under the card device, not the codec device. +This failed, and therefore caused the device probe to fail. + +Signed-off-by: Dave Stevenson + +ASoC: googlevoicehat-codec: Reformat for kernel coding standards + +Fix all whitespace, indentation, and bracing errors. + +Signed-off-by: Dave Stevenson + +ASoC: googlevoicehat-codec: Make driver function structure const + +Make voicehat_component_driver a const structure. + +Signed-off-by: Dave Stevenson + +ASoC: googlevoicehat-codec: Only convert from ms to jiffies once + +Minor optimisation and allows to become checkpatch clean. +A msec value is read out of DT or from a define, and convert once to +jiffies, rather than every time that it is used. + +Signed-off-by: Dave Stevenson +--- + sound/soc/bcm/googlevoicehat-codec.c | 214 +++++++++++++++++++++++++++ + 1 file changed, 214 insertions(+) + create mode 100644 sound/soc/bcm/googlevoicehat-codec.c + +--- /dev/null ++++ b/sound/soc/bcm/googlevoicehat-codec.c +@@ -0,0 +1,214 @@ ++/* ++ * Driver for the Google voiceHAT audio codec for Raspberry Pi. ++ * ++ * Author: Peter Malkin ++ * Copyright 2016 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define ICS43432_RATE_MIN_HZ 7190 /* from data sheet */ ++#define ICS43432_RATE_MAX_HZ 52800 /* from data sheet */ ++/* Delay in enabling SDMODE after clock settles to remove pop */ ++#define SDMODE_DELAY_MS 5 ++ ++struct voicehat_priv { ++ struct delayed_work enable_sdmode_work; ++ struct gpio_desc *sdmode_gpio; ++ unsigned long sdmode_delay_jiffies; ++}; ++ ++static void voicehat_enable_sdmode_work(struct work_struct *work) ++{ ++ struct voicehat_priv *voicehat = container_of(work, ++ struct voicehat_priv, ++ enable_sdmode_work.work); ++ gpiod_set_value(voicehat->sdmode_gpio, 1); ++} ++ ++static int voicehat_component_probe(struct snd_soc_component *component) ++{ ++ struct voicehat_priv *voicehat = ++ snd_soc_component_get_drvdata(component); ++ ++ voicehat->sdmode_gpio = devm_gpiod_get(component->dev, "sdmode", ++ GPIOD_OUT_LOW); ++ if (IS_ERR(voicehat->sdmode_gpio)) { ++ dev_err(component->dev, "Unable to allocate GPIO pin\n"); ++ return PTR_ERR(voicehat->sdmode_gpio); ++ } ++ ++ INIT_DELAYED_WORK(&voicehat->enable_sdmode_work, ++ voicehat_enable_sdmode_work); ++ return 0; ++} ++ ++static void voicehat_component_remove(struct snd_soc_component *component) ++{ ++ struct voicehat_priv *voicehat = ++ snd_soc_component_get_drvdata(component); ++ ++ cancel_delayed_work_sync(&voicehat->enable_sdmode_work); ++} ++ ++static const struct snd_soc_dapm_widget voicehat_dapm_widgets[] = { ++ SND_SOC_DAPM_OUTPUT("Speaker"), ++}; ++ ++static const struct snd_soc_dapm_route voicehat_dapm_routes[] = { ++ {"Speaker", NULL, "HiFi Playback"}, ++}; ++ ++static const struct snd_soc_component_driver voicehat_component_driver = { ++ .probe = voicehat_component_probe, ++ .remove = voicehat_component_remove, ++ .dapm_widgets = voicehat_dapm_widgets, ++ .num_dapm_widgets = ARRAY_SIZE(voicehat_dapm_widgets), ++ .dapm_routes = voicehat_dapm_routes, ++ .num_dapm_routes = ARRAY_SIZE(voicehat_dapm_routes), ++}; ++ ++static int voicehat_daiops_trigger(struct snd_pcm_substream *substream, int cmd, ++ struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct voicehat_priv *voicehat = ++ snd_soc_component_get_drvdata(component); ++ ++ if (voicehat->sdmode_delay_jiffies == 0) ++ return 0; ++ ++ dev_dbg(dai->dev, "CMD %d", cmd); ++ dev_dbg(dai->dev, "Playback Active %d", dai->playback_active); ++ dev_dbg(dai->dev, "Capture Active %d", dai->capture_active); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ case SNDRV_PCM_TRIGGER_RESUME: ++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: ++ if (dai->playback_active) { ++ dev_info(dai->dev, "Enabling audio amp...\n"); ++ queue_delayed_work( ++ system_power_efficient_wq, ++ &voicehat->enable_sdmode_work, ++ voicehat->sdmode_delay_jiffies); ++ } ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ case SNDRV_PCM_TRIGGER_SUSPEND: ++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: ++ if (dai->playback_active) { ++ cancel_delayed_work(&voicehat->enable_sdmode_work); ++ dev_info(dai->dev, "Disabling audio amp...\n"); ++ gpiod_set_value(voicehat->sdmode_gpio, 0); ++ } ++ break; ++ } ++ return 0; ++} ++ ++static const struct snd_soc_dai_ops voicehat_dai_ops = { ++ .trigger = voicehat_daiops_trigger, ++}; ++ ++static struct snd_soc_dai_driver voicehat_dai = { ++ .name = "voicehat-hifi", ++ .capture = { ++ .stream_name = "HiFi Capture", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S32_LE ++ }, ++ .playback = { ++ .stream_name = "HiFi Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_48000, ++ .formats = SNDRV_PCM_FMTBIT_S32_LE ++ }, ++ .ops = &voicehat_dai_ops, ++ .symmetric_rates = 1 ++}; ++ ++#ifdef CONFIG_OF ++static const struct of_device_id voicehat_ids[] = { ++ { .compatible = "google,voicehat", }, {} ++ }; ++ MODULE_DEVICE_TABLE(of, voicehat_ids); ++#endif ++ ++static int voicehat_platform_probe(struct platform_device *pdev) ++{ ++ struct voicehat_priv *voicehat; ++ unsigned int sdmode_delay; ++ int ret; ++ ++ voicehat = devm_kzalloc(&pdev->dev, sizeof(*voicehat), GFP_KERNEL); ++ if (!voicehat) ++ return -ENOMEM; ++ ++ ret = device_property_read_u32(&pdev->dev, "voicehat_sdmode_delay", ++ &sdmode_delay); ++ ++ if (ret) { ++ sdmode_delay = SDMODE_DELAY_MS; ++ dev_info(&pdev->dev, ++ "property 'voicehat_sdmode_delay' not found default 5 mS"); ++ } else { ++ dev_info(&pdev->dev, "property 'voicehat_sdmode_delay' found delay= %d mS", ++ sdmode_delay); ++ } ++ voicehat->sdmode_delay_jiffies = msecs_to_jiffies(sdmode_delay); ++ ++ dev_set_drvdata(&pdev->dev, voicehat); ++ ++ return snd_soc_register_component(&pdev->dev, ++ &voicehat_component_driver, ++ &voicehat_dai, ++ 1); ++} ++ ++static int voicehat_platform_remove(struct platform_device *pdev) ++{ ++ snd_soc_unregister_component(&pdev->dev); ++ return 0; ++} ++ ++static struct platform_driver voicehat_driver = { ++ .driver = { ++ .name = "voicehat-codec", ++ .of_match_table = of_match_ptr(voicehat_ids), ++ }, ++ .probe = voicehat_platform_probe, ++ .remove = voicehat_platform_remove, ++}; ++ ++module_platform_driver(voicehat_driver); ++ ++MODULE_DESCRIPTION("Google voiceHAT Codec driver"); ++MODULE_AUTHOR("Peter Malkin "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0084-Driver-and-overlay-for-Allo-Katana-DAC.patch b/target/linux/brcm2708/patches-4.19/950-0084-Driver-and-overlay-for-Allo-Katana-DAC.patch new file mode 100644 index 000000000..e5960dff5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0084-Driver-and-overlay-for-Allo-Katana-DAC.patch @@ -0,0 +1,376 @@ +From b64cde33b275ddda0e024a218cd31456a54cdd09 Mon Sep 17 00:00:00 2001 +From: allocom +Date: Thu, 19 Apr 2018 12:12:26 +0530 +Subject: [PATCH 084/703] Driver and overlay for Allo Katana DAC + +Allo Katana DAC: Updated default values + +Signed-off-by: Jaikumar +--- + sound/soc/bcm/allo-katana-codec.c | 360 ++++++++++++++++++++++++++++++ + 1 file changed, 360 insertions(+) + create mode 100644 sound/soc/bcm/allo-katana-codec.c + +--- /dev/null ++++ b/sound/soc/bcm/allo-katana-codec.c +@@ -0,0 +1,360 @@ ++/* ++ * Driver for the ALLO KATANA CODEC ++ * ++ * Author: Jaikumar ++ * Copyright 2018 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#define KATANA_CODEC_CHIP_ID 0x30 ++#define KATANA_CODEC_VIRT_BASE 0x100 ++#define KATANA_CODEC_PAGE 0 ++ ++#define KATANA_CODEC_CHIP_ID_REG (KATANA_CODEC_VIRT_BASE + 0) ++#define KATANA_CODEC_RESET (KATANA_CODEC_VIRT_BASE + 1) ++#define KATANA_CODEC_VOLUME_1 (KATANA_CODEC_VIRT_BASE + 2) ++#define KATANA_CODEC_VOLUME_2 (KATANA_CODEC_VIRT_BASE + 3) ++#define KATANA_CODEC_MUTE (KATANA_CODEC_VIRT_BASE + 4) ++#define KATANA_CODEC_DSP_PROGRAM (KATANA_CODEC_VIRT_BASE + 5) ++#define KATANA_CODEC_DEEMPHASIS (KATANA_CODEC_VIRT_BASE + 6) ++#define KATANA_CODEC_DOP (KATANA_CODEC_VIRT_BASE + 7) ++#define KATANA_CODEC_FORMAT (KATANA_CODEC_VIRT_BASE + 8) ++#define KATANA_CODEC_COMMAND (KATANA_CODEC_VIRT_BASE + 9) ++#define KATANA_CODEC_MAX_REGISTER (KATANA_CODEC_VIRT_BASE + 9) ++ ++#define KATANA_CODEC_FMT 0xff ++#define KATANA_CODEC_CHAN_MONO 0x00 ++#define KATANA_CODEC_CHAN_STEREO 0x80 ++#define KATANA_CODEC_ALEN_16 0x10 ++#define KATANA_CODEC_ALEN_24 0x20 ++#define KATANA_CODEC_ALEN_32 0x30 ++#define KATANA_CODEC_RATE_11025 0x01 ++#define KATANA_CODEC_RATE_22050 0x02 ++#define KATANA_CODEC_RATE_32000 0x03 ++#define KATANA_CODEC_RATE_44100 0x04 ++#define KATANA_CODEC_RATE_48000 0x05 ++#define KATANA_CODEC_RATE_88200 0x06 ++#define KATANA_CODEC_RATE_96000 0x07 ++#define KATANA_CODEC_RATE_176400 0x08 ++#define KATANA_CODEC_RATE_192000 0x09 ++#define KATANA_CODEC_RATE_352800 0x0a ++#define KATANA_CODEC_RATE_384000 0x0b ++ ++ ++struct katana_codec_priv { ++ struct regmap *regmap; ++ int fmt; ++}; ++ ++static const struct reg_default katana_codec_reg_defaults[] = { ++ { KATANA_CODEC_RESET, 0x00 }, ++ { KATANA_CODEC_VOLUME_1, 0xF0 }, ++ { KATANA_CODEC_VOLUME_2, 0xF0 }, ++ { KATANA_CODEC_MUTE, 0x00 }, ++ { KATANA_CODEC_DSP_PROGRAM, 0x04 }, ++ { KATANA_CODEC_DEEMPHASIS, 0x00 }, ++ { KATANA_CODEC_DOP, 0x00 }, ++ { KATANA_CODEC_FORMAT, 0xb4 }, ++}; ++ ++static const char * const katana_codec_dsp_program_texts[] = { ++ "Linear Phase Fast Roll-off Filter", ++ "Linear Phase Slow Roll-off Filter", ++ "Minimum Phase Fast Roll-off Filter", ++ "Minimum Phase Slow Roll-off Filter", ++ "Apodizing Fast Roll-off Filter", ++ "Corrected Minimum Phase Fast Roll-off Filter", ++ "Brick Wall Filter", ++}; ++ ++static const unsigned int katana_codec_dsp_program_values[] = { ++ 0, ++ 1, ++ 2, ++ 3, ++ 4, ++ 6, ++ 7, ++}; ++ ++static SOC_VALUE_ENUM_SINGLE_DECL(katana_codec_dsp_program, ++ KATANA_CODEC_DSP_PROGRAM, 0, 0x07, ++ katana_codec_dsp_program_texts, ++ katana_codec_dsp_program_values); ++ ++static const char * const katana_codec_deemphasis_texts[] = { ++ "Bypass", ++ "32kHz", ++ "44.1kHz", ++ "48kHz", ++}; ++ ++static const unsigned int katana_codec_deemphasis_values[] = { ++ 0, ++ 1, ++ 2, ++ 3, ++}; ++ ++static SOC_VALUE_ENUM_SINGLE_DECL(katana_codec_deemphasis, ++ KATANA_CODEC_DEEMPHASIS, 0, 0x03, ++ katana_codec_deemphasis_texts, ++ katana_codec_deemphasis_values); ++ ++static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(master_tlv, -12700, 0); ++ ++static const struct snd_kcontrol_new katana_codec_controls[] = { ++ SOC_DOUBLE_R_TLV("Master Playback Volume", KATANA_CODEC_VOLUME_1, ++ KATANA_CODEC_VOLUME_2, 0, 255, 1, master_tlv), ++ SOC_DOUBLE("Master Playback Switch", KATANA_CODEC_MUTE, 0, 0, 1, 1), ++ SOC_ENUM("DSP Program Route", katana_codec_dsp_program), ++ SOC_ENUM("Deemphasis Route", katana_codec_deemphasis), ++ SOC_SINGLE("DoP Playback Switch", KATANA_CODEC_DOP, 0, 1, 1) ++}; ++ ++static bool katana_codec_readable_register(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case KATANA_CODEC_CHIP_ID_REG: ++ return true; ++ default: ++ return reg < 0xff; ++ } ++} ++ ++static int katana_codec_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct katana_codec_priv *katana_codec = snd_soc_component_get_drvdata(component); ++ int fmt = 0; ++ int ret; ++ ++ dev_dbg(component->card->dev, "hw_params %u Hz, %u channels\n", ++ params_rate(params), ++ params_channels(params)); ++ ++ switch (katana_codec->fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBM_CFM: // master ++ if (params_channels(params) == 2) ++ fmt = KATANA_CODEC_CHAN_STEREO; ++ else ++ fmt = KATANA_CODEC_CHAN_MONO; ++ ++ switch (params_width(params)) { ++ case 16: ++ fmt |= KATANA_CODEC_ALEN_16; ++ break; ++ case 24: ++ fmt |= KATANA_CODEC_ALEN_24; ++ break; ++ case 32: ++ fmt |= KATANA_CODEC_ALEN_32; ++ break; ++ default: ++ dev_err(component->card->dev, "Bad frame size: %d\n", ++ params_width(params)); ++ return -EINVAL; ++ } ++ ++ switch (params_rate(params)) { ++ case 44100: ++ fmt |= KATANA_CODEC_RATE_44100; ++ break; ++ case 48000: ++ fmt |= KATANA_CODEC_RATE_48000; ++ break; ++ case 88200: ++ fmt |= KATANA_CODEC_RATE_88200; ++ break; ++ case 96000: ++ fmt |= KATANA_CODEC_RATE_96000; ++ break; ++ case 176400: ++ fmt |= KATANA_CODEC_RATE_176400; ++ break; ++ case 192000: ++ fmt |= KATANA_CODEC_RATE_192000; ++ break; ++ case 352800: ++ fmt |= KATANA_CODEC_RATE_352800; ++ break; ++ case 384000: ++ fmt |= KATANA_CODEC_RATE_384000; ++ break; ++ default: ++ dev_err(component->card->dev, "Bad sample rate: %d\n", ++ params_rate(params)); ++ return -EINVAL; ++ } ++ ++ ret = regmap_write(katana_codec->regmap, KATANA_CODEC_FORMAT, fmt); ++ if (ret != 0) { ++ dev_err(component->card->dev, "Failed to set format: %d\n", ret); ++ return ret; ++ } ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int katana_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct katana_codec_priv *katana_codec = snd_soc_component_get_drvdata(component); ++ ++ katana_codec->fmt = fmt; ++ ++ return 0; ++} ++ ++static const struct snd_soc_dai_ops katana_codec_dai_ops = { ++ .hw_params = katana_codec_hw_params, ++ .set_fmt = katana_codec_set_fmt, ++}; ++ ++static struct snd_soc_dai_driver katana_codec_dai = { ++ .name = "allo-katana-codec", ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .rate_min = 44100, ++ .rate_max = 384000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE | ++ SNDRV_PCM_FMTBIT_S32_LE ++ }, ++ .ops = &katana_codec_dai_ops, ++}; ++ ++static struct snd_soc_component_driver katana_codec_component_driver = { ++ .idle_bias_on = true, ++ ++ .controls = katana_codec_controls, ++ .num_controls = ARRAY_SIZE(katana_codec_controls), ++}; ++ ++static const struct regmap_range_cfg katana_codec_range = { ++ .name = "Pages", .range_min = KATANA_CODEC_VIRT_BASE, ++ .range_max = KATANA_CODEC_MAX_REGISTER, ++ .selector_reg = KATANA_CODEC_PAGE, ++ .selector_mask = 0xff, ++ .window_start = 0, .window_len = 0x100, ++}; ++ ++const struct regmap_config katana_codec_regmap = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ ++ .ranges = &katana_codec_range, ++ .num_ranges = 1, ++ ++ .max_register = KATANA_CODEC_MAX_REGISTER, ++ .readable_reg = katana_codec_readable_register, ++ .reg_defaults = katana_codec_reg_defaults, ++ .num_reg_defaults = ARRAY_SIZE(katana_codec_reg_defaults), ++ .cache_type = REGCACHE_RBTREE, ++}; ++ ++static int allo_katana_component_probe(struct i2c_client *i2c, ++ const struct i2c_device_id *id) ++{ ++ struct regmap *regmap; ++ struct regmap_config config = katana_codec_regmap; ++ struct device *dev = &i2c->dev; ++ struct katana_codec_priv *katana_codec; ++ unsigned int chip_id = 0; ++ int ret; ++ ++ regmap = devm_regmap_init_i2c(i2c, &config); ++ if (IS_ERR(regmap)) ++ return PTR_ERR(regmap); ++ ++ katana_codec = devm_kzalloc(dev, sizeof(struct katana_codec_priv), ++ GFP_KERNEL); ++ if (!katana_codec) ++ return -ENOMEM; ++ ++ dev_set_drvdata(dev, katana_codec); ++ katana_codec->regmap = regmap; ++ ++ ret = regmap_read(regmap, KATANA_CODEC_CHIP_ID_REG, &chip_id); ++ if ((ret != 0) || (chip_id != KATANA_CODEC_CHIP_ID)) { ++ dev_err(dev, "Failed to read Chip or wrong Chip id: %d\n", ret); ++ return ret; ++ } ++ regmap_update_bits(regmap, KATANA_CODEC_RESET, 0x01, 0x01); ++ msleep(10); ++ ++ ret = snd_soc_register_component(dev, &katana_codec_component_driver, ++ &katana_codec_dai, 1); ++ if (ret != 0) { ++ dev_err(dev, "failed to register codec: %d\n", ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int allo_katana_component_remove(struct i2c_client *i2c) ++{ ++ snd_soc_unregister_component(&i2c->dev); ++ return 0; ++} ++ ++static const struct i2c_device_id allo_katana_component_id[] = { ++ { "allo-katana-codec", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, allo_katana_component_id); ++ ++static const struct of_device_id allo_katana_codec_of_match[] = { ++ { .compatible = "allo,allo-katana-codec", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, allo_katana_codec_of_match); ++ ++static struct i2c_driver allo_katana_component_driver = { ++ .probe = allo_katana_component_probe, ++ .remove = allo_katana_component_remove, ++ .id_table = allo_katana_component_id, ++ .driver = { ++ .name = "allo-katana-codec", ++ .of_match_table = allo_katana_codec_of_match, ++ }, ++}; ++ ++module_i2c_driver(allo_katana_component_driver); ++ ++MODULE_DESCRIPTION("ASoC Allo Katana Codec Driver"); ++MODULE_AUTHOR("Jaikumar "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0085-ASoC-wm8804-MCLK-configuration-options-32-bit.patch b/target/linux/brcm2708/patches-4.19/950-0085-ASoC-wm8804-MCLK-configuration-options-32-bit.patch new file mode 100644 index 000000000..6d42b24df --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0085-ASoC-wm8804-MCLK-configuration-options-32-bit.patch @@ -0,0 +1,32 @@ +From 567ae821d7e3e4bcca95ac69847f23e9b4929570 Mon Sep 17 00:00:00 2001 +From: Daniel Matuschek +Date: Wed, 15 Jan 2014 21:41:23 +0100 +Subject: [PATCH 085/703] ASoC: wm8804: MCLK configuration options, 32-bit + +WM8804 can run with PLL frequencies of 256xfs and 128xfs for most sample +rates. At 192kHz only 128xfs is supported. The existing driver selects +128xfs automatically for some lower samples rates. By using an +additional mclk_div divider, it is now possible to control the +behaviour. This allows using 256xfs PLL frequency on all sample rates up +to 96kHz. It should allow lower jitter and better signal quality. The +behavior has to be controlled by the sound card driver, because some +sample frequency share the same setting. e.g. 192kHz and 96kHz use +24.576MHz master clock. The only difference is the MCLK divider. + +This also added support for 32bit data. + +Signed-off-by: Daniel Matuschek +--- + sound/soc/codecs/wm8804.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/soc/codecs/wm8804.c ++++ b/sound/soc/codecs/wm8804.c +@@ -550,6 +550,7 @@ static const struct snd_soc_component_dr + .use_pmdown_time = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, ++ .idle_bias_on = true, + }; + + const struct regmap_config wm8804_regmap_config = { diff --git a/target/linux/brcm2708/patches-4.19/950-0086-ASoC-Add-generic-RPI-driver-for-simple-soundcards.patch b/target/linux/brcm2708/patches-4.19/950-0086-ASoC-Add-generic-RPI-driver-for-simple-soundcards.patch new file mode 100644 index 000000000..ca5cd3d8b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0086-ASoC-Add-generic-RPI-driver-for-simple-soundcards.patch @@ -0,0 +1,300 @@ +From fb0eaa75f3a486dd0a5cb126c198db047a768a5d Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Wed, 27 Jun 2018 15:59:12 +0100 +Subject: [PATCH 086/703] ASoC: Add generic RPI driver for simple soundcards. + +The RPI simple sound card driver provides a generic ALSA SOC card driver +supporting a variety of Pi HAT soundcards. The intention is to avoid +the duplication of code for cards that can't be fully supported by +the soc simple/graph cards but are otherwise almost identical. + +This initial commit adds support for the ADAU1977 ADC, Google VoiceHat, +HifiBerry AMP, HifiBerry DAC and RPI DAC. + +Signed-off-by: Tim Gover + +ASoC: Use correct card name in rpi-simple driver + +Use the specific card name from drvdata instead of the snd_rpi_simple + +rpi-simple-soundcard: Use nicer driver name "RPi-simple" + +Rename the driver from "RPI simple soundcard" to "RPi-simple" so that +the driver name won't be mangled allowing to be used unaltered as the +card conf filename. +--- + sound/soc/bcm/rpi-simple-soundcard.c | 268 +++++++++++++++++++++++++++ + 1 file changed, 268 insertions(+) + create mode 100644 sound/soc/bcm/rpi-simple-soundcard.c + +--- /dev/null ++++ b/sound/soc/bcm/rpi-simple-soundcard.c +@@ -0,0 +1,268 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * rpi-simple-soundcard.c -- ALSA SoC Raspberry Pi soundcard. ++ * ++ * Copyright (C) 2018 Raspberry Pi. ++ * ++ * Authors: Tim Gover ++ * ++ * Based on code: ++ * hifiberry_amp.c, hifiberry_dac.c, rpi-dac.c ++ * by Florian Meier ++ * ++ * googlevoicehat-soundcard.c ++ * by Peter Malkin ++ * ++ * adau1977-adc.c ++ * by Andrey Grodzovsky ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++/* Parameters for generic RPI functions */ ++struct snd_rpi_simple_drvdata { ++ struct snd_soc_dai_link *dai; ++ const char* card_name; ++ unsigned int fixed_bclk_ratio; ++}; ++ ++static int snd_rpi_simple_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_rpi_simple_drvdata *drvdata = ++ snd_soc_card_get_drvdata(rtd->card); ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ ++ if (drvdata->fixed_bclk_ratio > 0) ++ return snd_soc_dai_set_bclk_ratio(cpu_dai, ++ drvdata->fixed_bclk_ratio); ++ ++ return 0; ++} ++ ++static int snd_rpi_simple_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ struct snd_rpi_simple_drvdata *drvdata; ++ unsigned int sample_bits; ++ ++ drvdata = snd_soc_card_get_drvdata(rtd->card); ++ ++ if (drvdata->fixed_bclk_ratio > 0) ++ return 0; // BCLK is configured in .init ++ ++ /* The simple drivers just set the bclk_ratio to sample_bits * 2 so ++ * hard-code this for now. More complex drivers could just replace ++ * the hw_params routine. ++ */ ++ sample_bits = snd_pcm_format_physical_width(params_format(params)); ++ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); ++} ++ ++static struct snd_soc_ops snd_rpi_simple_ops = { ++ .hw_params = snd_rpi_simple_hw_params, ++}; ++ ++enum adau1977_clk_id { ++ ADAU1977_SYSCLK, ++}; ++ ++enum adau1977_sysclk_src { ++ ADAU1977_SYSCLK_SRC_MCLK, ++ ADAU1977_SYSCLK_SRC_LRCLK, ++}; ++ ++static int adau1977_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ int ret; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 0); ++ if (ret < 0) ++ return ret; ++ ++ return snd_soc_component_set_sysclk(codec_dai->component, ++ ADAU1977_SYSCLK, ADAU1977_SYSCLK_SRC_MCLK, ++ 11289600, SND_SOC_CLOCK_IN); ++} ++ ++static struct snd_soc_dai_link snd_rpi_adau1977_dai[] = { ++ { ++ .name = "adau1977", ++ .stream_name = "ADAU1977", ++ .codec_dai_name = "adau1977-hifi", ++ .codec_name = "adau1977.1-0011", ++ .init = adau1977_init, ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ }, ++}; ++ ++static struct snd_rpi_simple_drvdata drvdata_adau1977 = { ++ .card_name = "snd_rpi_adau1977_adc", ++ .dai = snd_rpi_adau1977_dai, ++}; ++ ++static struct snd_soc_dai_link snd_googlevoicehat_soundcard_dai[] = { ++{ ++ .name = "Google voiceHAT SoundCard", ++ .stream_name = "Google voiceHAT SoundCard HiFi", ++ .codec_dai_name = "voicehat-hifi", ++ .codec_name = "voicehat-codec", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++}, ++}; ++ ++static struct snd_rpi_simple_drvdata drvdata_googlevoicehat = { ++ .card_name = "snd_rpi_googlevoicehat_soundcard", ++ .dai = snd_googlevoicehat_soundcard_dai, ++}; ++ ++static struct snd_soc_dai_link snd_hifiberry_amp_dai[] = { ++ { ++ .name = "HifiBerry AMP", ++ .stream_name = "HifiBerry AMP HiFi", ++ .codec_dai_name = "tas5713-hifi", ++ .codec_name = "tas5713.1-001b", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ }, ++}; ++ ++static struct snd_rpi_simple_drvdata drvdata_hifiberry_amp = { ++ .card_name = "snd_rpi_hifiberry_amp", ++ .dai = snd_hifiberry_amp_dai, ++ .fixed_bclk_ratio = 64, ++}; ++ ++static struct snd_soc_dai_link snd_hifiberry_dac_dai[] = { ++ { ++ .name = "HifiBerry DAC", ++ .stream_name = "HifiBerry DAC HiFi", ++ .codec_dai_name = "pcm5102a-hifi", ++ .codec_name = "pcm5102a-codec", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ }, ++}; ++ ++static struct snd_rpi_simple_drvdata drvdata_hifiberry_dac = { ++ .card_name = "snd_rpi_hifiberry_dac", ++ .dai = snd_hifiberry_dac_dai, ++}; ++ ++static struct snd_soc_dai_link snd_rpi_dac_dai[] = { ++{ ++ .name = "RPi-DAC", ++ .stream_name = "RPi-DAC HiFi", ++ .codec_dai_name = "pcm1794a-hifi", ++ .codec_name = "pcm1794a-codec", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++}, ++}; ++ ++static struct snd_rpi_simple_drvdata drvdata_rpi_dac = { ++ .card_name = "snd_rpi_rpi_dac", ++ .dai = snd_rpi_dac_dai, ++ .fixed_bclk_ratio = 64, ++}; ++ ++static const struct of_device_id snd_rpi_simple_of_match[] = { ++ { .compatible = "adi,adau1977-adc", ++ .data = (void *) &drvdata_adau1977 }, ++ { .compatible = "googlevoicehat,googlevoicehat-soundcard", ++ .data = (void *) &drvdata_googlevoicehat }, ++ { .compatible = "hifiberry,hifiberry-amp", ++ .data = (void *) &drvdata_hifiberry_amp }, ++ { .compatible = "hifiberry,hifiberry-dac", ++ .data = (void *) &drvdata_hifiberry_dac }, ++ { .compatible = "rpi,rpi-dac", &drvdata_rpi_dac}, ++ {}, ++}; ++ ++static struct snd_soc_card snd_rpi_simple = { ++ .driver_name = "RPi-simple", ++ .owner = THIS_MODULE, ++ .dai_link = NULL, ++ .num_links = 1, /* Only a single DAI supported at the moment */ ++}; ++ ++static int snd_rpi_simple_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ const struct of_device_id *of_id; ++ ++ snd_rpi_simple.dev = &pdev->dev; ++ of_id = of_match_node(snd_rpi_simple_of_match, pdev->dev.of_node); ++ ++ if (pdev->dev.of_node && of_id->data) { ++ struct device_node *i2s_node; ++ struct snd_rpi_simple_drvdata *drvdata = ++ (struct snd_rpi_simple_drvdata *) of_id->data; ++ struct snd_soc_dai_link *dai = drvdata->dai; ++ ++ snd_soc_card_set_drvdata(&snd_rpi_simple, drvdata); ++ ++ /* More complex drivers might override individual functions */ ++ if (!dai->init) ++ dai->init = snd_rpi_simple_init; ++ if (!dai->ops) ++ dai->ops = &snd_rpi_simple_ops; ++ ++ snd_rpi_simple.name = drvdata->card_name; ++ ++ snd_rpi_simple.dai_link = dai; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (!i2s_node) { ++ pr_err("Failed to find i2s-controller DT node\n"); ++ return -ENODEV; ++ } ++ ++ dai->cpu_of_node = i2s_node; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_simple); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "Failed to register card %d\n", ret); ++ ++ return ret; ++} ++ ++static struct platform_driver snd_rpi_simple_driver = { ++ .driver = { ++ .name = "snd-rpi-simple", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_simple_of_match, ++ }, ++ .probe = snd_rpi_simple_probe, ++}; ++MODULE_DEVICE_TABLE(of, snd_rpi_simple_of_match); ++ ++module_platform_driver(snd_rpi_simple_driver); ++ ++MODULE_AUTHOR("Tim Gover "); ++MODULE_DESCRIPTION("ASoC Raspberry Pi simple soundcard driver "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0087-ASoC-Add-Kconfig-and-Makefile-for-sound-soc-bcm.patch b/target/linux/brcm2708/patches-4.19/950-0087-ASoC-Add-Kconfig-and-Makefile-for-sound-soc-bcm.patch new file mode 100644 index 000000000..3a2c35c86 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0087-ASoC-Add-Kconfig-and-Makefile-for-sound-soc-bcm.patch @@ -0,0 +1,264 @@ +From c95f1fca6bf35548cddf4909a505a6427f6f41ef Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 3 Sep 2018 17:00:36 +0100 +Subject: [PATCH 087/703] ASoC: Add Kconfig and Makefile for sound/soc/bcm + +Signed-off-by: popcornmix +--- + sound/soc/bcm/Kconfig | 199 +++++++++++++++++++++++++++++++++++++++++ + sound/soc/bcm/Makefile | 42 +++++++++ + 2 files changed, 241 insertions(+) + +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -16,3 +16,202 @@ config SND_SOC_CYGNUS + Cygnus chips (bcm958300, bcm958305, bcm911360) + + If you don't know what to do here, say N. ++ ++config SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD ++ tristate "Support for Google voiceHAT soundcard" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_VOICEHAT ++ select SND_RPI_SIMPLE_SOUNDCARD ++ help ++ Say Y or M if you want to add support for voiceHAT soundcard. ++ ++config SND_BCM2708_SOC_HIFIBERRY_DAC ++ tristate "Support for HifiBerry DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM5102A ++ select SND_RPI_SIMPLE_SOUNDCARD ++ help ++ Say Y or M if you want to add support for HifiBerry DAC. ++ ++config SND_BCM2708_SOC_HIFIBERRY_DACPLUS ++ tristate "Support for HifiBerry DAC+" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x ++ help ++ Say Y or M if you want to add support for HifiBerry DAC+. ++ ++config SND_BCM2708_SOC_HIFIBERRY_DIGI ++ tristate "Support for HifiBerry Digi" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ help ++ Say Y or M if you want to add support for HifiBerry Digi S/PDIF output board. ++ ++config SND_BCM2708_SOC_HIFIBERRY_AMP ++ tristate "Support for the HifiBerry Amp" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_TAS5713 ++ select SND_RPI_SIMPLE_SOUNDCARD ++ help ++ Say Y or M if you want to add support for the HifiBerry Amp amplifier board. ++ ++config SND_BCM2708_SOC_RPI_CIRRUS ++ tristate "Support for Cirrus Logic Audio Card" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM5102 ++ select SND_SOC_WM8804 ++ help ++ Say Y or M if you want to add support for the Wolfson and ++ Cirrus Logic audio cards. ++ ++config SND_BCM2708_SOC_RPI_DAC ++ tristate "Support for RPi-DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM1794A ++ select SND_RPI_SIMPLE_SOUNDCARD ++ help ++ Say Y or M if you want to add support for RPi-DAC. ++ ++config SND_BCM2708_SOC_RPI_PROTO ++ tristate "Support for Rpi-PROTO" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8731 ++ help ++ Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731). ++ ++config SND_BCM2708_SOC_JUSTBOOM_DAC ++ tristate "Support for JustBoom DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x ++ help ++ Say Y or M if you want to add support for JustBoom DAC. ++ ++config SND_BCM2708_SOC_JUSTBOOM_DIGI ++ tristate "Support for JustBoom Digi" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ select SND_RPI_WM8804_SOUNDCARD ++ help ++ Say Y or M if you want to add support for JustBoom Digi. ++ ++config SND_BCM2708_SOC_IQAUDIO_DAC ++ tristate "Support for IQaudIO-DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x_I2C ++ help ++ Say Y or M if you want to add support for IQaudIO-DAC. ++ ++config SND_BCM2708_SOC_IQAUDIO_DIGI ++ tristate "Support for IQAudIO Digi" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ select SND_RPI_WM8804_SOUNDCARD ++ help ++ Say Y or M if you want to add support for IQAudIO Digital IO board. ++ ++config SND_BCM2708_SOC_ADAU1977_ADC ++ tristate "Support for ADAU1977 ADC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_ADAU1977_I2C ++ select SND_RPI_SIMPLE_SOUNDCARD ++ help ++ Say Y or M if you want to add support for ADAU1977 ADC. ++ ++config SND_AUDIOINJECTOR_PI_SOUNDCARD ++ tristate "Support for audioinjector.net Pi add on soundcard" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8731 ++ help ++ Say Y or M if you want to add support for audioinjector.net Pi Hat ++ ++config SND_AUDIOINJECTOR_OCTO_SOUNDCARD ++ tristate "Support for audioinjector.net Octo channel (Hat) soundcard" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_CS42XX8_I2C ++ help ++ Say Y or M if you want to add support for audioinjector.net octo add on ++ ++config SND_DIGIDAC1_SOUNDCARD ++ tristate "Support for Red Rocks Audio DigiDAC1" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ select SND_SOC_WM8741 ++ help ++ Say Y or M if you want to add support for Red Rocks Audio DigiDAC1 board. ++ ++config SND_BCM2708_SOC_DIONAUDIO_LOCO ++ tristate "Support for Dion Audio LOCO DAC-AMP" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM5102a ++ help ++ Say Y or M if you want to add support for Dion Audio LOCO. ++ ++config SND_BCM2708_SOC_DIONAUDIO_LOCO_V2 ++ tristate "Support for Dion Audio LOCO-V2 DAC-AMP" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM5122 ++ help ++ Say Y or M if you want to add support for Dion Audio LOCO-V2. ++ ++config SND_BCM2708_SOC_ALLO_PIANO_DAC ++ tristate "Support for Allo Piano DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x_I2C ++ help ++ Say Y or M if you want to add support for Allo Piano DAC. ++ ++config SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS ++ tristate "Support for Allo Piano DAC Plus" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x_I2C ++ help ++ Say Y or M if you want to add support for Allo Piano DAC Plus. ++ ++config SND_BCM2708_SOC_ALLO_BOSS_DAC ++ tristate "Support for Allo Boss DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x_I2C ++ help ++ Say Y or M if you want to add support for Allo Boss DAC. ++ ++config SND_BCM2708_SOC_ALLO_DIGIONE ++ tristate "Support for Allo DigiOne" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ select SND_RPI_WM8804_SOUNDCARD ++ help ++ Say Y or M if you want to add support for Allo DigiOne. ++ ++config SND_BCM2708_SOC_ALLO_KATANA_DAC ++ tristate "Support for Allo Katana DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ depends on I2C ++ select REGMAP_I2C ++ select SND_AUDIO_GRAPH_CARD ++ help ++ Say Y or M if you want to add support for Allo Katana DAC. ++ ++config SND_BCM2708_SOC_FE_PI_AUDIO ++ tristate "Support for Fe-Pi-Audio" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_SGTL5000 ++ help ++ Say Y or M if you want to add support for Fe-Pi-Audio. ++ ++config SND_PISOUND ++ tristate "Support for Blokas Labs pisound" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_RAWMIDI ++ help ++ Say Y or M if you want to add support for Blokas Labs pisound. ++ ++config SND_RPI_SIMPLE_SOUNDCARD ++ tristate "Support for Raspberry Pi simple soundcards" ++ help ++ Say Y or M if you want to add support Raspbery Pi simple soundcards ++ ++config SND_RPI_WM8804_SOUNDCARD ++ tristate "Support for Raspberry Pi generic WM8804 soundcards" ++ help ++ Say Y or M if you want to add support for the Raspberry Pi ++ generic driver for WM8804 based soundcards. +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -8,3 +8,45 @@ snd-soc-cygnus-objs := cygnus-pcm.o cygn + + obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc-cygnus.o + ++# Google voiceHAT custom codec support ++snd-soc-googlevoicehat-codec-objs := googlevoicehat-codec.o ++ ++# BCM2708 Machine Support ++snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o ++snd-soc-justboom-dac-objs := justboom-dac.o ++snd-soc-rpi-cirrus-objs := rpi-cirrus.o ++snd-soc-rpi-proto-objs := rpi-proto.o ++snd-soc-iqaudio-dac-objs := iqaudio-dac.o ++snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o ++snd-soc-audioinjector-octo-soundcard-objs := audioinjector-octo-soundcard.o ++snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o ++snd-soc-dionaudio-loco-objs := dionaudio_loco.o ++snd-soc-dionaudio-loco-v2-objs := dionaudio_loco-v2.o ++snd-soc-allo-boss-dac-objs := allo-boss-dac.o ++snd-soc-allo-piano-dac-objs := allo-piano-dac.o ++snd-soc-allo-piano-dac-plus-objs := allo-piano-dac-plus.o ++snd-soc-allo-katana-codec-objs := allo-katana-codec.o ++snd-soc-pisound-objs := pisound.o ++snd-soc-fe-pi-audio-objs := fe-pi-audio.o ++snd-soc-rpi-simple-soundcard-objs := rpi-simple-soundcard.o ++snd-soc-rpi-wm8804-soundcard-objs := rpi-wm8804-soundcard.o ++ ++obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o ++obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o ++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o ++obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o ++obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o ++obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o ++obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o ++obj-$(CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD) += snd-soc-audioinjector-octo-soundcard.o ++obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o ++obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o ++obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2) += snd-soc-dionaudio-loco-v2.o ++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC) += snd-soc-allo-boss-dac.o ++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o ++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS) += snd-soc-allo-piano-dac-plus.o ++obj-$(CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC) += snd-soc-allo-katana-codec.o ++obj-$(CONFIG_SND_PISOUND) += snd-soc-pisound.o ++obj-$(CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO) += snd-soc-fe-pi-audio.o ++obj-$(CONFIG_SND_RPI_SIMPLE_SOUNDCARD) += snd-soc-rpi-simple-soundcard.o ++obj-$(CONFIG_SND_RPI_WM8804_SOUNDCARD) += snd-soc-rpi-wm8804-soundcard.o diff --git a/target/linux/brcm2708/patches-4.19/950-0088-ASoC-Create-a-generic-Pi-Hat-WM8804-driver.patch b/target/linux/brcm2708/patches-4.19/950-0088-ASoC-Create-a-generic-Pi-Hat-WM8804-driver.patch new file mode 100644 index 000000000..d6d1aec81 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0088-ASoC-Create-a-generic-Pi-Hat-WM8804-driver.patch @@ -0,0 +1,459 @@ +From 1fb18379184ab1c039cc7b366901f3816f2ab768 Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Sat, 21 Jul 2018 20:07:46 +0100 +Subject: [PATCH 088/703] ASoC: Create a generic Pi Hat WM8804 driver + +Reduce the amount of duplicated code by creating a generic driver for +Pi Hat digi cards using the WM8804 codec. + +This replaces the +Allo DigiOne, Hifiberry Digi/Pro, JustBoom Digi and IQAudIO Digi +dedicate soundcard drivers with a generic driver. + +There are no significant changes to the runtime behavior of the drivers +and end users should not have to change any configuration settings +after upgrading. + +Minor changes +* Check the return value of snd_soc_component_update_bits +* Added some pr_debug tracing +* Various checkpatch tidyups +* Updated allodigi-one to use use 128FS at > 96 Khz. This appears to + be an omission in the original driver code so followed the Hifiberry + DAC driver approach. +--- + sound/soc/bcm/rpi-wm8804-soundcard.c | 428 +++++++++++++++++++++++++++ + 1 file changed, 428 insertions(+) + create mode 100644 sound/soc/bcm/rpi-wm8804-soundcard.c + +--- /dev/null ++++ b/sound/soc/bcm/rpi-wm8804-soundcard.c +@@ -0,0 +1,428 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * rpi--wm8804.c -- ALSA SoC Raspberry Pi soundcard. ++ * ++ * Copyright (C) 2018 Raspberry Pi. ++ * ++ * Authors: Tim Gover ++ * ++ * Generic driver for Pi Hat WM8804 digi sounds cards ++ * ++ * Based upon code from: ++ * justboom-digi.c ++ * by Milan Neskovic ++ * ++ * iqaudio_digi.c ++ * by Daniel Matuschek ++ * ++ * allo-digione.c ++ * by Baswaraj ++ * ++ * hifiberry-digi.c ++ * Daniel Matuschek ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../codecs/wm8804.h" ++ ++struct wm8804_clk_cfg { ++ unsigned int sysclk_freq; ++ unsigned int mclk_freq; ++ unsigned int mclk_div; ++}; ++ ++/* Parameters for generic functions */ ++struct snd_rpi_wm8804_drvdata { ++ /* Required - pointer to the DAI structure */ ++ struct snd_soc_dai_link *dai; ++ /* Required - snd_soc_card name */ ++ const char *card_name; ++ /* Optional- Overrides the module paramter */ ++ unsigned short auto_shutdown_output; ++ /* Optional DT node names if card info is defined in DT */ ++ const char *card_name_dt; ++ const char *dai_name_dt; ++ const char *dai_stream_name_dt; ++ /* Optional probe extension - called prior to register_card */ ++ int (*probe)(struct platform_device *pdev); ++}; ++ ++static short int auto_shutdown_output; ++module_param(auto_shutdown_output, short, 0660); ++MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped"); ++ ++static struct gpio_desc *snd_clk44gpio; ++static struct gpio_desc *snd_clk48gpio; ++ ++#define CLK_44EN_RATE 22579200UL ++#define CLK_48EN_RATE 24576000UL ++ ++static int snd_rpi_wm8804_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ int rc; ++ ++ pr_debug("%s\n", __func__); ++ ++ rc = snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); ++ return rc < 0 ? rc : 0; ++} ++ ++static int snd_rpi_wm8804_digi_startup(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ int rc; ++ ++ pr_debug("%s\n", __func__); ++ ++ rc = snd_soc_component_update_bits(component, WM8804_PWRDN, 0x3c, 0x00); ++ return rc < 0 ? rc : 0; ++} ++ ++static void snd_rpi_wm8804_digi_shutdown(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ pr_debug("%s %d\n", __func__, auto_shutdown_output); ++ ++ if (auto_shutdown_output) ++ snd_soc_component_update_bits(component, WM8804_PWRDN, ++ 0x3c, 0x3c); ++} ++ ++static unsigned int snd_rpi_wm8804_enable_clock(unsigned int samplerate) ++{ ++ switch (samplerate) { ++ case 11025: ++ case 22050: ++ case 44100: ++ case 88200: ++ case 176400: ++ gpiod_set_value_cansleep(snd_clk44gpio, 1); ++ gpiod_set_value_cansleep(snd_clk48gpio, 0); ++ return CLK_44EN_RATE; ++ default: ++ gpiod_set_value_cansleep(snd_clk48gpio, 1); ++ gpiod_set_value_cansleep(snd_clk44gpio, 0); ++ return CLK_48EN_RATE; ++ } ++} ++ ++static void snd_rpi_wm8804_clk_cfg(unsigned int samplerate, ++ struct wm8804_clk_cfg *clk_cfg) ++{ ++ clk_cfg->mclk_freq = 0; ++ clk_cfg->mclk_div = 1; ++ clk_cfg->sysclk_freq = 27000000; ++ ++ if (samplerate <= 96000) { ++ clk_cfg->mclk_freq = samplerate * 256; ++ clk_cfg->mclk_div = WM8804_MCLKDIV_256FS; ++ } else { ++ clk_cfg->mclk_freq = samplerate * 128; ++ clk_cfg->mclk_div = WM8804_MCLKDIV_128FS; ++ } ++ ++ if (!(IS_ERR(snd_clk44gpio) || IS_ERR(snd_clk48gpio))) ++ clk_cfg->sysclk_freq = snd_rpi_wm8804_enable_clock(samplerate); ++} ++ ++static int snd_rpi_wm8804_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ int sampling_freq = 1; ++ int ret; ++ struct wm8804_clk_cfg clk_cfg; ++ int samplerate = params_rate(params); ++ ++ snd_rpi_wm8804_clk_cfg(samplerate, &clk_cfg); ++ ++ pr_debug("%s samplerate: %d mclk_freq: %u mclk_div: %u sysclk: %u\n", ++ __func__, samplerate, clk_cfg.mclk_freq, ++ clk_cfg.mclk_div, clk_cfg.sysclk_freq); ++ ++ switch (samplerate) { ++ case 32000: ++ sampling_freq = 0x03; ++ break; ++ case 44100: ++ sampling_freq = 0x00; ++ break; ++ case 48000: ++ sampling_freq = 0x02; ++ break; ++ case 88200: ++ sampling_freq = 0x08; ++ break; ++ case 96000: ++ sampling_freq = 0x0a; ++ break; ++ case 176400: ++ sampling_freq = 0x0c; ++ break; ++ case 192000: ++ sampling_freq = 0x0e; ++ break; ++ default: ++ dev_err(rtd->card->dev, ++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", ++ samplerate); ++ } ++ ++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, clk_cfg.mclk_div); ++ snd_soc_dai_set_pll(codec_dai, 0, 0, ++ clk_cfg.sysclk_freq, clk_cfg.mclk_freq); ++ ++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, ++ clk_cfg.sysclk_freq, SND_SOC_CLOCK_OUT); ++ if (ret < 0) { ++ dev_err(rtd->card->dev, ++ "Failed to set WM8804 SYSCLK: %d\n", ret); ++ return ret; ++ } ++ ++ /* Enable TX output */ ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); ++ ++ /* Power on */ ++ snd_soc_component_update_bits(component, WM8804_PWRDN, 0x9, 0); ++ ++ /* set sampling frequency status bits */ ++ snd_soc_component_update_bits(component, WM8804_SPDTX4, 0x0f, ++ sampling_freq); ++ ++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64); ++} ++ ++static struct snd_soc_ops snd_rpi_wm8804_ops = { ++ .hw_params = snd_rpi_wm8804_hw_params, ++ .startup = snd_rpi_wm8804_digi_startup, ++ .shutdown = snd_rpi_wm8804_digi_shutdown, ++}; ++ ++static struct snd_soc_dai_link snd_justboom_digi_dai[] = { ++{ ++ .name = "JustBoom Digi", ++ .stream_name = "JustBoom Digi HiFi", ++}, ++}; ++ ++static struct snd_rpi_wm8804_drvdata drvdata_justboom_digi = { ++ .card_name = "snd_rpi_justboom_digi", ++ .dai = snd_justboom_digi_dai, ++ .auto_shutdown_output = 1, ++}; ++ ++static struct snd_soc_dai_link snd_iqaudio_digi_dai[] = { ++{ ++ .name = "IQAudIO Digi", ++ .stream_name = "IQAudIO Digi HiFi", ++}, ++}; ++ ++static struct snd_rpi_wm8804_drvdata drvdata_iqaudio_digi = { ++ .card_name = "IQAudIODigi", ++ .dai = snd_iqaudio_digi_dai, ++ .card_name_dt = "wm8804-digi,card-name", ++ .dai_name_dt = "wm8804-digi,dai-name", ++ .dai_stream_name_dt = "wm8804-digi,dai-stream-name", ++}; ++ ++static int snd_allo_digione_probe(struct platform_device *pdev) ++{ ++ pr_debug("%s\n", __func__); ++ ++ if (IS_ERR(snd_clk44gpio) || IS_ERR(snd_clk48gpio)) { ++ dev_err(&pdev->dev, "devm_gpiod_get() failed\n"); ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static struct snd_soc_dai_link snd_allo_digione_dai[] = { ++{ ++ .name = "Allo DigiOne", ++ .stream_name = "Allo DigiOne HiFi", ++}, ++}; ++ ++static struct snd_rpi_wm8804_drvdata drvdata_allo_digione = { ++ .card_name = "snd_allo_digione", ++ .dai = snd_allo_digione_dai, ++ .probe = snd_allo_digione_probe, ++}; ++ ++static struct snd_soc_dai_link snd_hifiberry_digi_dai[] = { ++{ ++ .name = "HifiBerry Digi", ++ .stream_name = "HifiBerry Digi HiFi", ++}, ++}; ++ ++static int snd_hifiberry_digi_probe(struct platform_device *pdev) ++{ ++ pr_debug("%s\n", __func__); ++ ++ if (IS_ERR(snd_clk44gpio) || IS_ERR(snd_clk48gpio)) ++ return 0; ++ ++ snd_hifiberry_digi_dai->name = "HiFiBerry Digi+ Pro"; ++ snd_hifiberry_digi_dai->stream_name = "HiFiBerry Digi+ Pro HiFi"; ++ return 0; ++} ++ ++static struct snd_rpi_wm8804_drvdata drvdata_hifiberry_digi = { ++ .card_name = "snd_rpi_hifiberry_digi", ++ .dai = snd_hifiberry_digi_dai, ++ .probe = snd_hifiberry_digi_probe, ++}; ++ ++static const struct of_device_id snd_rpi_wm8804_of_match[] = { ++ { .compatible = "justboom,justboom-digi", ++ .data = (void *) &drvdata_justboom_digi }, ++ { .compatible = "iqaudio,wm8804-digi", ++ .data = (void *) &drvdata_iqaudio_digi }, ++ { .compatible = "allo,allo-digione", ++ .data = (void *) &drvdata_allo_digione }, ++ { .compatible = "hifiberry,hifiberry-digi", ++ .data = (void *) &drvdata_hifiberry_digi }, ++ {}, ++}; ++ ++static struct snd_soc_card snd_rpi_wm8804 = { ++ .driver_name = "RPi-WM8804", ++ .owner = THIS_MODULE, ++ .dai_link = NULL, ++ .num_links = 1, ++}; ++ ++static int snd_rpi_wm8804_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ const struct of_device_id *of_id; ++ ++ snd_rpi_wm8804.dev = &pdev->dev; ++ of_id = of_match_node(snd_rpi_wm8804_of_match, pdev->dev.of_node); ++ ++ if (pdev->dev.of_node && of_id->data) { ++ struct device_node *i2s_node; ++ struct snd_rpi_wm8804_drvdata *drvdata = ++ (struct snd_rpi_wm8804_drvdata *) of_id->data; ++ struct snd_soc_dai_link *dai = drvdata->dai; ++ ++ snd_soc_card_set_drvdata(&snd_rpi_wm8804, drvdata); ++ ++ if (!dai->init) ++ dai->init = snd_rpi_wm8804_init; ++ if (!dai->ops) ++ dai->ops = &snd_rpi_wm8804_ops; ++ if (!dai->codec_dai_name) ++ dai->codec_dai_name = "wm8804-spdif"; ++ if (!dai->codec_name) ++ dai->codec_name = "wm8804.1-003b"; ++ if (!dai->dai_fmt) ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM; ++ ++ if (drvdata->auto_shutdown_output) ++ auto_shutdown_output = 1; ++ ++ snd_rpi_wm8804.dai_link = dai; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (!i2s_node) { ++ pr_err("Failed to find i2s-controller DT node\n"); ++ return -ENODEV; ++ } ++ ++ snd_rpi_wm8804.name = drvdata->card_name; ++ ++ /* If requested by in drvdata get card & DAI names from DT */ ++ if (drvdata->card_name_dt) ++ of_property_read_string(i2s_node, ++ drvdata->card_name_dt, ++ &snd_rpi_wm8804.name); ++ ++ if (drvdata->dai_name_dt) ++ of_property_read_string(i2s_node, ++ drvdata->dai_name_dt, ++ &dai->name); ++ ++ if (drvdata->dai_stream_name_dt) ++ of_property_read_string(i2s_node, ++ drvdata->dai_stream_name_dt, ++ &dai->stream_name); ++ ++ dai->cpu_of_node = i2s_node; ++ dai->platform_of_node = i2s_node; ++ ++ /* ++ * clk44gpio and clk48gpio are not required by all cards so ++ * don't check the error status. ++ */ ++ snd_clk44gpio = ++ devm_gpiod_get(&pdev->dev, "clock44", GPIOD_OUT_LOW); ++ ++ snd_clk48gpio = ++ devm_gpiod_get(&pdev->dev, "clock48", GPIOD_OUT_LOW); ++ ++ if (drvdata->probe) { ++ ret = drvdata->probe(pdev); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "Custom probe failed %d\n", ++ ret); ++ return ret; ++ } ++ } ++ ++ pr_debug("%s card: %s dai: %s stream: %s\n", __func__, ++ snd_rpi_wm8804.name, ++ dai->name, dai->stream_name); ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, &snd_rpi_wm8804); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "Failed to register card %d\n", ret); ++ ++ return ret; ++} ++ ++static struct platform_driver snd_rpi_wm8804_driver = { ++ .driver = { ++ .name = "snd-rpi-wm8804", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_wm8804_of_match, ++ }, ++ .probe = snd_rpi_wm8804_probe, ++}; ++MODULE_DEVICE_TABLE(of, snd_rpi_wm8804_of_match); ++ ++module_platform_driver(snd_rpi_wm8804_driver); ++ ++MODULE_AUTHOR("Tim Gover "); ++MODULE_DESCRIPTION("ASoC Raspberry Pi Hat generic digi driver for WM8804 based cards"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0085-rpi_display-add-backlight-driver-and-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0089-rpi_display-add-backlight-driver-and-overlay.patch similarity index 88% rename from target/linux/brcm2708/patches-4.9/950-0085-rpi_display-add-backlight-driver-and-overlay.patch rename to target/linux/brcm2708/patches-4.19/950-0089-rpi_display-add-backlight-driver-and-overlay.patch index 67c0e3f5c..6be6b585a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0085-rpi_display-add-backlight-driver-and-overlay.patch +++ b/target/linux/brcm2708/patches-4.19/950-0089-rpi_display-add-backlight-driver-and-overlay.patch @@ -1,28 +1,36 @@ -From ae5ae9278768c3d096910705bfa9af85da20a8cf Mon Sep 17 00:00:00 2001 +From 7a0c9202a0bd363d49ba0b4a31d843f3a2cac66d Mon Sep 17 00:00:00 2001 From: P33M Date: Wed, 21 Oct 2015 14:55:21 +0100 -Subject: [PATCH] rpi_display: add backlight driver and overlay +Subject: [PATCH 089/703] rpi_display: add backlight driver and overlay Add a mailbox-driven backlight controller for the Raspberry Pi DSI touchscreen display. Requires updated GPU firmware to recognise the mailbox request. Signed-off-by: Gordon Hollingworth + +Add Raspberry Pi firmware driver to the dependencies of backlight driver + +Otherwise the backlight driver fails to build if the firmware +loading driver is not in the kernel + +Signed-off-by: Alex Riesen --- - drivers/video/backlight/Kconfig | 6 ++ + drivers/video/backlight/Kconfig | 7 ++ drivers/video/backlight/Makefile | 1 + - drivers/video/backlight/rpi_backlight.c | 119 ++++++++++++++++++++++++++++++++ - 3 files changed, 126 insertions(+) + drivers/video/backlight/rpi_backlight.c | 119 ++++++++++++++++++++++++ + 3 files changed, 127 insertions(+) create mode 100644 drivers/video/backlight/rpi_backlight.c --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig -@@ -265,6 +265,12 @@ config BACKLIGHT_PWM +@@ -272,6 +272,13 @@ config BACKLIGHT_PWM If you have a LCD backlight adjustable by PWM, say Y to enable this driver. +config BACKLIGHT_RPI + tristate "Raspberry Pi display firmware driven backlight" ++ depends on RASPBERRYPI_FIRMWARE + help + If you have the Raspberry Pi DSI touchscreen display, say Y to + enable the mailbox-controlled backlight driver. @@ -32,7 +40,7 @@ Signed-off-by: Gordon Hollingworth depends on PMIC_DA903X --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile -@@ -50,6 +50,7 @@ obj-$(CONFIG_BACKLIGHT_PANDORA) += pand +@@ -52,6 +52,7 @@ obj-$(CONFIG_BACKLIGHT_PANDORA) += pand obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o obj-$(CONFIG_BACKLIGHT_PM8941_WLED) += pm8941-wled.o obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o diff --git a/target/linux/brcm2708/patches-4.9/950-0086-bcm2835-virtgpio-Virtual-GPIO-driver.patch b/target/linux/brcm2708/patches-4.19/950-0090-bcm2835-virtgpio-Virtual-GPIO-driver.patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0086-bcm2835-virtgpio-Virtual-GPIO-driver.patch rename to target/linux/brcm2708/patches-4.19/950-0090-bcm2835-virtgpio-Virtual-GPIO-driver.patch index 425224e5a..8aee6c784 100644 --- a/target/linux/brcm2708/patches-4.9/950-0086-bcm2835-virtgpio-Virtual-GPIO-driver.patch +++ b/target/linux/brcm2708/patches-4.19/950-0090-bcm2835-virtgpio-Virtual-GPIO-driver.patch @@ -1,21 +1,20 @@ -From 1b6bee75a64ca43404e6bc8ff2fdbe8b1d0a0423 Mon Sep 17 00:00:00 2001 +From ae7c0b0955e96a7231ad4b6d909124fa7f7713e8 Mon Sep 17 00:00:00 2001 From: popcornmix Date: Tue, 23 Feb 2016 19:56:04 +0000 -Subject: [PATCH] bcm2835-virtgpio: Virtual GPIO driver +Subject: [PATCH 090/703] bcm2835-virtgpio: Virtual GPIO driver Add a virtual GPIO driver that uses the firmware mailbox interface to request that the VPU toggles LEDs. --- - drivers/gpio/Kconfig | 6 + - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-bcm-virt.c | 214 +++++++++++++++++++++++++++++ - include/soc/bcm2835/raspberrypi-firmware.h | 1 + - 4 files changed, 222 insertions(+) + drivers/gpio/Kconfig | 6 + + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-bcm-virt.c | 214 +++++++++++++++++++++++++++++++++++ + 3 files changed, 221 insertions(+) create mode 100644 drivers/gpio/gpio-bcm-virt.c --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -134,6 +134,12 @@ config GPIO_BCM_KONA +@@ -151,6 +151,12 @@ config GPIO_BCM_KONA help Turn on GPIO support for Broadcom "Kona" chips. @@ -30,10 +29,10 @@ request that the VPU toggles LEDs. default y if (ARCH_BRCMSTB || BMIPS_GENERIC) --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile -@@ -31,6 +31,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o - obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o - obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o +@@ -35,6 +35,7 @@ obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o + obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o +obj-$(CONFIG_GPIO_BCM_VIRT) += gpio-bcm-virt.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o @@ -255,13 +254,3 @@ request that the VPU toggles LEDs. +MODULE_AUTHOR("Dom Cobley "); +MODULE_DESCRIPTION("brcmvirt GPIO driver"); +MODULE_ALIAS("platform:brcmvirt-gpio"); ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -116,6 +116,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, - RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, - RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, - RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, - RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, - diff --git a/target/linux/brcm2708/patches-4.19/950-0091-net-Add-non-mainline-source-for-rtl8192cu-wlan.patch b/target/linux/brcm2708/patches-4.19/950-0091-net-Add-non-mainline-source-for-rtl8192cu-wlan.patch new file mode 100644 index 000000000..25703d628 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0091-net-Add-non-mainline-source-for-rtl8192cu-wlan.patch @@ -0,0 +1,172633 @@ +From 004fa06eecc1162dcb717bdce943a08c25c0922c Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 3 Sep 2012 17:10:23 +0100 +Subject: [PATCH 091/703] net: Add non-mainline source for rtl8192cu wlan + +We are now syncing with version from: +https://github.com/pvaret/rtl8192cu-fixes +--- + drivers/net/wireless/realtek/Kconfig | 1 + + drivers/net/wireless/realtek/Makefile | 1 + + .../net/wireless/realtek/rtl8192cu/Kconfig | 9 + + .../net/wireless/realtek/rtl8192cu/Makefile | 616 + + drivers/net/wireless/realtek/rtl8192cu/clean | 5 + + .../realtek/rtl8192cu/core/efuse/rtw_efuse.c | 1147 ++ + .../wireless/realtek/rtl8192cu/core/rtw_ap.c | 2943 ++++ + .../realtek/rtl8192cu/core/rtw_br_ext.c | 1700 ++ + .../wireless/realtek/rtl8192cu/core/rtw_cmd.c | 3035 ++++ + .../realtek/rtl8192cu/core/rtw_debug.c | 1337 ++ + .../realtek/rtl8192cu/core/rtw_eeprom.c | 423 + + .../realtek/rtl8192cu/core/rtw_ieee80211.c | 1916 +++ + .../wireless/realtek/rtl8192cu/core/rtw_io.c | 464 + + .../realtek/rtl8192cu/core/rtw_ioctl_query.c | 196 + + .../realtek/rtl8192cu/core/rtw_ioctl_rtl.c | 1031 ++ + .../realtek/rtl8192cu/core/rtw_ioctl_set.c | 1494 ++ + .../wireless/realtek/rtl8192cu/core/rtw_iol.c | 263 + + .../realtek/rtl8192cu/core/rtw_mlme.c | 3967 +++++ + .../realtek/rtl8192cu/core/rtw_mlme_ext.c | 13600 ++++++++++++++++ + .../wireless/realtek/rtl8192cu/core/rtw_mp.c | 1324 ++ + .../realtek/rtl8192cu/core/rtw_mp_ioctl.c | 2954 ++++ + .../wireless/realtek/rtl8192cu/core/rtw_p2p.c | 5370 ++++++ + .../realtek/rtl8192cu/core/rtw_pwrctrl.c | 1551 ++ + .../realtek/rtl8192cu/core/rtw_recv.c | 4306 +++++ + .../wireless/realtek/rtl8192cu/core/rtw_rf.c | 95 + + .../realtek/rtl8192cu/core/rtw_security.c | 3115 ++++ + .../realtek/rtl8192cu/core/rtw_sreset.c | 352 + + .../realtek/rtl8192cu/core/rtw_sta_mgt.c | 848 + + .../realtek/rtl8192cu/core/rtw_tdls.c | 2941 ++++ + .../realtek/rtl8192cu/core/rtw_wlan_util.c | 2305 +++ + .../realtek/rtl8192cu/core/rtw_xmit.c | 4156 +++++ + .../realtek/rtl8192cu/hal/HalPwrSeqCmd.c | 177 + + .../net/wireless/realtek/rtl8192cu/hal/dm.c | 314 + + .../net/wireless/realtek/rtl8192cu/hal/dm.h | 30 + + .../wireless/realtek/rtl8192cu/hal/hal_com.c | 371 + + .../wireless/realtek/rtl8192cu/hal/hal_intf.c | 546 + + .../rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c | 1159 ++ + .../rtl8192cu/hal/rtl8192c/rtl8192c_dm.c | 5058 ++++++ + .../hal/rtl8192c/rtl8192c_hal_init.c | 3628 +++++ + .../rtl8192cu/hal/rtl8192c/rtl8192c_mp.c | 1207 ++ + .../rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c | 4841 ++++++ + .../rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c | 1031 ++ + .../rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c | 876 + + .../rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c | 94 + + .../rtl8192cu/hal/rtl8192c/rtl8192c_xmit.c | 63 + + .../hal/rtl8192c/usb/Hal8192CUHWImg.c | 8758 ++++++++++ + .../hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c | 2564 +++ + .../hal/rtl8192c/usb/rtl8192cu_led.c | 2680 +++ + .../hal/rtl8192c/usb/rtl8192cu_recv.c | 229 + + .../hal/rtl8192c/usb/rtl8192cu_xmit.c | 1150 ++ + .../rtl8192cu/hal/rtl8192c/usb/usb_halinit.c | 6261 +++++++ + .../rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c | 1207 ++ + .../hal/rtl8192c/usb/usb_ops_linux.c | 1536 ++ + .../rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c | 1265 ++ + .../wireless/realtek/rtl8192cu/ifcfg-wlan0 | 4 + + .../rtl8192cu/include/Hal8192CEHWImg.h | 85 + + .../rtl8192cu/include/Hal8192CPhyCfg.h | 428 + + .../rtl8192cu/include/Hal8192CPhyReg.h | 1123 ++ + .../rtl8192cu/include/Hal8192CUHWImg.h | 105 + + .../rtl8192cu/include/Hal8192CUHWImg_wowlan.h | 34 + + .../rtl8192cu/include/Hal8192DEHWImg.h | 66 + + .../rtl8192cu/include/Hal8192DPhyCfg.h | 528 + + .../rtl8192cu/include/Hal8192DPhyReg.h | 1171 ++ + .../rtl8192cu/include/Hal8192DUHWImg.h | 66 + + .../rtl8192cu/include/Hal8192DUHWImg_wowlan.h | 30 + + .../realtek/rtl8192cu/include/HalPwrSeqCmd.h | 137 + + .../realtek/rtl8192cu/include/autoconf.h | 336 + + .../realtek/rtl8192cu/include/basic_types.h | 321 + + .../rtl8192cu/include/byteorder/big_endian.h | 87 + + .../rtl8192cu/include/byteorder/generic.h | 212 + + .../include/byteorder/little_endian.h | 89 + + .../rtl8192cu/include/byteorder/swab.h | 140 + + .../rtl8192cu/include/byteorder/swabb.h | 156 + + .../realtek/rtl8192cu/include/circ_buf.h | 27 + + .../realtek/rtl8192cu/include/cmd_osdep.h | 36 + + .../realtek/rtl8192cu/include/drv_conf.h | 78 + + .../realtek/rtl8192cu/include/drv_types.h | 662 + + .../realtek/rtl8192cu/include/drv_types_ce.h | 92 + + .../rtl8192cu/include/drv_types_linux.h | 25 + + .../rtl8192cu/include/drv_types_sdio.h | 70 + + .../realtek/rtl8192cu/include/drv_types_xp.h | 95 + + .../realtek/rtl8192cu/include/ethernet.h | 41 + + .../realtek/rtl8192cu/include/h2clbk.h | 35 + + .../realtek/rtl8192cu/include/hal_com.h | 146 + + .../realtek/rtl8192cu/include/hal_intf.h | 432 + + .../realtek/rtl8192cu/include/ieee80211.h | 1580 ++ + .../realtek/rtl8192cu/include/ieee80211_ext.h | 477 + + .../realtek/rtl8192cu/include/if_ether.h | 112 + + .../rtl8192cu/include/ioctl_cfg80211.h | 184 + + .../wireless/realtek/rtl8192cu/include/ip.h | 141 + + .../rtl8192cu/include/linux/wireless.h | 90 + + .../realtek/rtl8192cu/include/mlme_osdep.h | 40 + + .../realtek/rtl8192cu/include/mp_custom_oid.h | 353 + + .../realtek/rtl8192cu/include/nic_spec.h | 47 + + .../rtl8192cu/include/osdep_ce_service.h | 171 + + .../realtek/rtl8192cu/include/osdep_intf.h | 155 + + .../realtek/rtl8192cu/include/osdep_service.h | 1821 +++ + .../realtek/rtl8192cu/include/pci_hal.h | 168 + + .../realtek/rtl8192cu/include/pci_ops.h | 60 + + .../realtek/rtl8192cu/include/pci_osintf.h | 33 + + .../realtek/rtl8192cu/include/recv_osdep.h | 58 + + .../realtek/rtl8192cu/include/rtl8192c_cmd.h | 153 + + .../realtek/rtl8192cu/include/rtl8192c_dm.h | 516 + + .../rtl8192cu/include/rtl8192c_event.h | 28 + + .../realtek/rtl8192cu/include/rtl8192c_hal.h | 937 ++ + .../realtek/rtl8192cu/include/rtl8192c_led.h | 42 + + .../realtek/rtl8192cu/include/rtl8192c_recv.h | 184 + + .../realtek/rtl8192cu/include/rtl8192c_rf.h | 92 + + .../realtek/rtl8192cu/include/rtl8192c_spec.h | 1865 +++ + .../rtl8192cu/include/rtl8192c_sreset.h | 32 + + .../realtek/rtl8192cu/include/rtl8192c_xmit.h | 129 + + .../realtek/rtl8192cu/include/rtl8192d_cmd.h | 142 + + .../realtek/rtl8192cu/include/rtl8192d_dm.h | 420 + + .../realtek/rtl8192cu/include/rtl8192d_hal.h | 1126 ++ + .../realtek/rtl8192cu/include/rtl8192d_led.h | 43 + + .../realtek/rtl8192cu/include/rtl8192d_recv.h | 187 + + .../realtek/rtl8192cu/include/rtl8192d_rf.h | 97 + + .../realtek/rtl8192cu/include/rtl8192d_spec.h | 1841 +++ + .../realtek/rtl8192cu/include/rtl8192d_xmit.h | 145 + + .../realtek/rtl8192cu/include/rtw_android.h | 90 + + .../realtek/rtl8192cu/include/rtw_ap.h | 64 + + .../realtek/rtl8192cu/include/rtw_br_ext.h | 76 + + .../realtek/rtl8192cu/include/rtw_byteorder.h | 40 + + .../realtek/rtl8192cu/include/rtw_cmd.h | 1167 ++ + .../realtek/rtl8192cu/include/rtw_debug.h | 538 + + .../realtek/rtl8192cu/include/rtw_eeprom.h | 152 + + .../realtek/rtl8192cu/include/rtw_efuse.h | 124 + + .../realtek/rtl8192cu/include/rtw_event.h | 154 + + .../realtek/rtl8192cu/include/rtw_ht.h | 50 + + .../realtek/rtl8192cu/include/rtw_io.h | 504 + + .../realtek/rtl8192cu/include/rtw_ioctl.h | 269 + + .../rtl8192cu/include/rtw_ioctl_query.h | 36 + + .../realtek/rtl8192cu/include/rtw_ioctl_rtl.h | 83 + + .../realtek/rtl8192cu/include/rtw_ioctl_set.h | 79 + + .../realtek/rtl8192cu/include/rtw_iol.h | 89 + + .../realtek/rtl8192cu/include/rtw_led.h | 217 + + .../realtek/rtl8192cu/include/rtw_mlme.h | 850 + + .../realtek/rtl8192cu/include/rtw_mlme_ext.h | 963 ++ + .../realtek/rtl8192cu/include/rtw_mp.h | 712 + + .../realtek/rtl8192cu/include/rtw_mp_ioctl.h | 596 + + .../rtl8192cu/include/rtw_mp_phy_regdef.h | 1097 ++ + .../realtek/rtl8192cu/include/rtw_p2p.h | 161 + + .../realtek/rtl8192cu/include/rtw_pwrctrl.h | 362 + + .../realtek/rtl8192cu/include/rtw_qos.h | 40 + + .../realtek/rtl8192cu/include/rtw_recv.h | 731 + + .../realtek/rtl8192cu/include/rtw_rf.h | 152 + + .../realtek/rtl8192cu/include/rtw_security.h | 447 + + .../realtek/rtl8192cu/include/rtw_sreset.h | 74 + + .../realtek/rtl8192cu/include/rtw_tdls.h | 143 + + .../realtek/rtl8192cu/include/rtw_version.h | 1 + + .../realtek/rtl8192cu/include/rtw_xmit.h | 754 + + .../realtek/rtl8192cu/include/sta_info.h | 432 + + .../realtek/rtl8192cu/include/usb_hal.h | 37 + + .../realtek/rtl8192cu/include/usb_ops.h | 110 + + .../realtek/rtl8192cu/include/usb_ops_linux.h | 63 + + .../realtek/rtl8192cu/include/usb_osintf.h | 38 + + .../rtl8192cu/include/usb_vendor_req.h | 59 + + .../wireless/realtek/rtl8192cu/include/wifi.h | 1248 ++ + .../realtek/rtl8192cu/include/wlan_bssdef.h | 703 + + .../realtek/rtl8192cu/include/xmit_osdep.h | 95 + + .../rtl8192cu/os_dep/linux/ioctl_cfg80211.c | 5589 +++++++ + .../rtl8192cu/os_dep/linux/ioctl_linux.c | 11909 ++++++++++++++ + .../rtl8192cu/os_dep/linux/mlme_linux.c | 653 + + .../realtek/rtl8192cu/os_dep/linux/os_intfs.c | 2768 ++++ + .../realtek/rtl8192cu/os_dep/linux/pci_intf.c | 1997 +++ + .../rtl8192cu/os_dep/linux/pci_ops_linux.c | 24 + + .../rtl8192cu/os_dep/linux/recv_linux.c | 461 + + .../rtl8192cu/os_dep/linux/rtw_android.c | 839 + + .../realtek/rtl8192cu/os_dep/linux/usb_intf.c | 1662 ++ + .../rtl8192cu/os_dep/linux/usb_ops_linux.c | 649 + + .../rtl8192cu/os_dep/linux/xmit_linux.c | 421 + + .../realtek/rtl8192cu/os_dep/osdep_service.c | 2300 +++ + drivers/net/wireless/realtek/rtl8192cu/runwpa | 20 + + .../net/wireless/realtek/rtl8192cu/wlan0dhcp | 15 + + 174 files changed, 171743 insertions(+) + create mode 100644 drivers/net/wireless/realtek/rtl8192cu/Kconfig + create mode 100644 drivers/net/wireless/realtek/rtl8192cu/Makefile + create mode 100644 drivers/net/wireless/realtek/rtl8192cu/clean + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/efuse/rtw_efuse.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_ap.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_br_ext.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_cmd.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_debug.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_eeprom.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_ieee80211.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_io.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_query.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_rtl.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_set.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_iol.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme_ext.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_mp.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_mp_ioctl.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_p2p.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_pwrctrl.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_recv.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_rf.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_security.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_sreset.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_sta_mgt.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_tdls.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_wlan_util.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/core/rtw_xmit.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/HalPwrSeqCmd.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/dm.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/dm.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/hal_com.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/hal_intf.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_xmit.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/ifcfg-wlan0 + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CEHWImg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyCfg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyReg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg_wowlan.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DEHWImg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyCfg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyReg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg_wowlan.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/HalPwrSeqCmd.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/autoconf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/basic_types.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/byteorder/big_endian.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/byteorder/generic.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/byteorder/little_endian.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/byteorder/swab.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/byteorder/swabb.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/circ_buf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/cmd_osdep.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_conf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_types.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_types_ce.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_types_linux.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_types_sdio.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/drv_types_xp.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/ethernet.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/h2clbk.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/hal_com.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/hal_intf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/ieee80211.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/ieee80211_ext.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/if_ether.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/ioctl_cfg80211.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/ip.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/linux/wireless.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/mlme_osdep.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/mp_custom_oid.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/nic_spec.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/osdep_ce_service.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/osdep_intf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/osdep_service.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/pci_hal.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/pci_ops.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/pci_osintf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/recv_osdep.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_cmd.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_dm.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_event.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_hal.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_led.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_recv.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_rf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_spec.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_sreset.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_xmit.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_cmd.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_dm.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_hal.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_led.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_recv.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_rf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_spec.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_xmit.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_android.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ap.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_br_ext.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_byteorder.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_cmd.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_debug.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_eeprom.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_efuse.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_event.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ht.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_io.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_query.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_rtl.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_set.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_iol.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_led.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_mlme.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_mlme_ext.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp_ioctl.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp_phy_regdef.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_p2p.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_pwrctrl.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_qos.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_recv.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_rf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_security.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_sreset.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_tdls.h + create mode 100644 drivers/net/wireless/realtek/rtl8192cu/include/rtw_version.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/rtw_xmit.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/sta_info.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/usb_hal.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/usb_ops.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/usb_ops_linux.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/usb_osintf.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/usb_vendor_req.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/wifi.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/wlan_bssdef.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/include/xmit_osdep.h + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/ioctl_cfg80211.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/ioctl_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/mlme_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/os_intfs.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/pci_intf.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/pci_ops_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/recv_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/rtw_android.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/usb_intf.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/usb_ops_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/xmit_linux.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/os_dep/osdep_service.c + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/runwpa + create mode 100755 drivers/net/wireless/realtek/rtl8192cu/wlan0dhcp + +--- a/drivers/net/wireless/realtek/Kconfig ++++ b/drivers/net/wireless/realtek/Kconfig +@@ -13,6 +13,7 @@ if WLAN_VENDOR_REALTEK + + source "drivers/net/wireless/realtek/rtl818x/Kconfig" + source "drivers/net/wireless/realtek/rtlwifi/Kconfig" ++source "drivers/net/wireless/realtek/rtl8192cu/Kconfig" + source "drivers/net/wireless/realtek/rtl8xxxu/Kconfig" + + endif # WLAN_VENDOR_REALTEK +--- a/drivers/net/wireless/realtek/Makefile ++++ b/drivers/net/wireless/realtek/Makefile +@@ -5,5 +5,6 @@ + obj-$(CONFIG_RTL8180) += rtl818x/ + obj-$(CONFIG_RTL8187) += rtl818x/ + obj-$(CONFIG_RTLWIFI) += rtlwifi/ ++obj-$(CONFIG_RTL8192CU) += rtl8192cu/ + obj-$(CONFIG_RTL8XXXU) += rtl8xxxu/ + +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/Kconfig +@@ -0,0 +1,9 @@ ++config RTL8192CU ++ tristate "Realtek 8192C USB WiFi" ++ depends on MAC80211 && USB ++ select CFG80211_WEXT ++ select WIRELESS_EXT ++ select WEXT_PRIV ++ ---help--- ++ This option adds the Realtek RTL8192CU USB device such as Edimax EW-7811Un. ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/Makefile +@@ -0,0 +1,616 @@ ++EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) ++EXTRA_CFLAGS += -O1 ++#EXTRA_CFLAGS += -O3 ++#EXTRA_CFLAGS += -Wall ++#EXTRA_CFLAGS += -Wextra ++#EXTRA_CFLAGS += -Werror ++#EXTRA_CFLAGS += -pedantic ++#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes ++ ++EXTRA_CFLAGS += -Wno-unused-variable ++EXTRA_CFLAGS += -Wno-unused-value ++EXTRA_CFLAGS += -Wno-unused-label ++EXTRA_CFLAGS += -Wno-unused-parameter ++EXTRA_CFLAGS += -Wno-unused-function ++EXTRA_CFLAGS += -Wno-unused ++ ++EXTRA_CFLAGS += -Wno-uninitialized ++ ++EXTRA_CFLAGS += -I$(src)/include ++ ++CONFIG_AUTOCFG_CP = n ++ ++CONFIG_RTL8192C = y ++CONFIG_RTL8192D = n ++CONFIG_RTL8723A = n ++ ++CONFIG_USB_HCI = y ++CONFIG_PCI_HCI = n ++CONFIG_SDIO_HCI = n ++ ++CONFIG_MP_INCLUDED = n ++CONFIG_POWER_SAVING = y ++CONFIG_USB_AUTOSUSPEND = n ++CONFIG_HW_PWRP_DETECTION = n ++CONFIG_WIFI_TEST = n ++CONFIG_BT_COEXISTENCE = n ++CONFIG_RTL8192CU_REDEFINE_1X1 = n ++CONFIG_INTEL_WIDI = n ++CONFIG_WAKE_ON_WLAN = n ++ ++CONFIG_PLATFORM_I386_PC = y ++CONFIG_PLATFORM_TI_AM3517 = n ++CONFIG_PLATFORM_ANDROID_X86 = n ++CONFIG_PLATFORM_JB_X86 = n ++CONFIG_PLATFORM_ARM_S3C2K4 = n ++CONFIG_PLATFORM_ARM_PXA2XX = n ++CONFIG_PLATFORM_ARM_S3C6K4 = n ++CONFIG_PLATFORM_MIPS_RMI = n ++CONFIG_PLATFORM_RTD2880B = n ++CONFIG_PLATFORM_MIPS_AR9132 = n ++CONFIG_PLATFORM_RTK_DMP = n ++CONFIG_PLATFORM_MIPS_PLM = n ++CONFIG_PLATFORM_MSTAR389 = n ++CONFIG_PLATFORM_MT53XX = n ++CONFIG_PLATFORM_ARM_MX51_241H = n ++CONFIG_PLATFORM_FS_MX61 = n ++CONFIG_PLATFORM_ACTIONS_ATJ227X = n ++CONFIG_PLATFORM_TEGRA3_CARDHU = n ++CONFIG_PLATFORM_TEGRA4_DALMORE = n ++CONFIG_PLATFORM_ARM_TCC8900 = n ++CONFIG_PLATFORM_ARM_TCC8920 = n ++CONFIG_PLATFORM_ARM_TCC8920_JB42 = n ++CONFIG_PLATFORM_ARM_RK2818 = n ++CONFIG_PLATFORM_ARM_TI_PANDA = n ++CONFIG_PLATFORM_MIPS_JZ4760 = n ++CONFIG_PLATFORM_DMP_PHILIPS = n ++CONFIG_PLATFORM_TI_DM365 = n ++CONFIG_PLATFORM_MN10300 = n ++CONFIG_PLATFORM_MSTAR_TITANIA12 = n ++CONFIG_PLATFORM_MSTAR_A3 = n ++CONFIG_PLATFORM_ARM_SUNxI = n ++CONFIG_PLATFORM_ARM_SUN6I = n ++ ++CONFIG_DRVEXT_MODULE = n ++ ++export TopDIR ?= $(shell pwd) ++ ++ ++ifeq ($(CONFIG_RTL8192C), y) ++ ++RTL871X = rtl8192c ++ ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8192cu ++FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o ++ifneq ($(CONFIG_WAKE_ON_WLAN), n) ++FW_FILES += hal/$(RTL871X)/usb/Hal8192CUHWImg_wowlan.o ++endif ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8192ce ++FW_FILES := hal/$(RTL871X)/pci/Hal8192CEHWImg.o ++endif ++ ++CHIP_FILES := \ ++ hal/$(RTL871X)/$(RTL871X)_sreset.o \ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o ++CHIP_FILES += $(FW_FILES) ++endif ++ ++ifeq ($(CONFIG_RTL8192D), y) ++ ++RTL871X = rtl8192d ++ ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8192du ++FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o ++ifneq ($(CONFIG_WAKE_ON_WLAN), n) ++FW_FILES += hal/$(RTL871X)/usb/Hal8192DUHWImg_wowlan.o ++endif ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8192de ++FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o ++endif ++ ++CHIP_FILES := \ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o ++CHIP_FILES += $(FW_FILES) ++endif ++ ++ifeq ($(CONFIG_RTL8723A), y) ++ ++RTL871X = rtl8723a ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8723as ++FW_FILES := hal/$(RTL871X)/sdio/Hal8723SHWImg.o ++endif ++ ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8723au ++FW_FILES := hal/$(RTL871X)/usb/Hal8723UHWImg.o ++endif ++ ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8723ae ++FW_FILES := hal/$(RTL871X)/pci/Hal8723EHWImg.o ++endif ++ ++PWRSEQ_FILES := hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8723PwrSeq.o ++ ++CHIP_FILES += $(FW_FILES) $(PWRSEQ_FILES) ++ ++endif ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++HCI_NAME = sdio ++endif ++ ++ifeq ($(CONFIG_USB_HCI), y) ++HCI_NAME = usb ++endif ++ ++ifeq ($(CONFIG_PCI_HCI), y) ++HCI_NAME = pci ++endif ++ ++ ++_OS_INTFS_FILES := os_dep/osdep_service.o \ ++ os_dep/linux/os_intfs.o \ ++ os_dep/linux/$(HCI_NAME)_intf.o \ ++ os_dep/linux/$(HCI_NAME)_ops_linux.o \ ++ os_dep/linux/ioctl_linux.o \ ++ os_dep/linux/xmit_linux.o \ ++ os_dep/linux/mlme_linux.o \ ++ os_dep/linux/recv_linux.o \ ++ os_dep/linux/ioctl_cfg80211.o \ ++ os_dep/linux/rtw_android.o ++ ++ ++_HAL_INTFS_FILES := hal/hal_intf.o \ ++ hal/hal_com.o \ ++ hal/dm.o \ ++ hal/$(RTL871X)/$(RTL871X)_hal_init.o \ ++ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ ++ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ ++ hal/$(RTL871X)/$(RTL871X)_dm.o \ ++ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ ++ hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o ++endif ++ ++ifeq ($(CONFIG_MP_INCLUDED), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o ++endif ++ ++_HAL_INTFS_FILES += $(CHIP_FILES) ++ ++ ++ifeq ($(CONFIG_AUTOCFG_CP), y) ++$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) ++endif ++ ++ ++ifeq ($(CONFIG_USB_HCI), y) ++ifeq ($(CONFIG_USB_AUTOSUSPEND), y) ++EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND ++endif ++endif ++ ++ifeq ($(CONFIG_POWER_SAVING), y) ++EXTRA_CFLAGS += -DCONFIG_POWER_SAVING ++endif ++ ++ifeq ($(CONFIG_HW_PWRP_DETECTION), y) ++EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION ++endif ++ ++ifeq ($(CONFIG_WIFI_TEST), y) ++EXTRA_CFLAGS += -DCONFIG_WIFI_TEST ++endif ++ ++ifeq ($(CONFIG_BT_COEXISTENCE), y) ++EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE ++endif ++ ++ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y) ++EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R ++endif ++ ++ifeq ($(CONFIG_WAKE_ON_WLAN), y) ++EXTRA_CFLAGS += -DCONFIG_WAKE_ON_WLAN ++endif ++ ++ifeq ($(CONFIG_INTEL_WIDI), y) ++EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI ++endif ++ ++ifeq ($(CONFIG_PLATFORM_I386_PC), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH ?= $(SUBARCH) ++CROSS_COMPILE ?= ++KVER := $(shell uname -r) ++KSRC := /lib/modules/$(KVER)/build ++MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ ++INSTALL_PREFIX := ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TI_AM3517), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE ++CROSS_COMPILE := arm-eabi- ++KSRC := $(shell pwd)/../../../Android/kernel ++ARCH := arm ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_TITANIA12 ++ARCH:=mips ++CROSS_COMPILE:= /usr/src/Mstar_kernel/mips-4.3/bin/mips-linux-gnu- ++KVER:= 2.6.28.9 ++KSRC:= /usr/src/Mstar_kernel/2.6.28.9/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR_A3), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_A3 ++ARCH:=arm ++CROSS_COMPILE:= arm-none-linux-gnueabi- ++KVER:= 2.6.35.11 ++KSRC:= /home/gary/PERFORCE/THEALE/RedLion/2.6.35.11/ ++MODULE_NAME = wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH := $(SUBARCH) ++CROSS_COMPILE := /media/DATA-2/android-x86/ics-x86_20120130/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/bin/i686-unknown-linux-gnu- ++KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x86/obj/kernel ++MODULE_NAME :=wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_JB_X86), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH := $(SUBARCH) ++CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android- ++KSRC := /home/android_sdk/android-x86_JB/out/target/product/x86/obj/kernel/ ++MODULE_NAME :=wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 2.6.34.1 ++KSRC ?= /usr/src/linux-2.6.34.1 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-linux- ++KVER := 2.6.24.7_$(ARCH) ++KSRC := /usr/src/kernels/linux-$(KVER) ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 2.6.34.1 ++KSRC ?= /usr/src/linux-2.6.34.1 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_RTD2880B), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B ++ARCH:= ++CROSS_COMPILE:= ++KVER:= ++KSRC:= ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH:=mips ++CROSS_COMPILE:=mipsisa32r2-uclibc- ++KVER:= ++KSRC:= /root/work/kernel_realtek ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ++ARCH:=mips ++CROSS_COMPILE:=mipsisa32r2-uclibc- ++KVER:= ++KSRC:= /root/work/kernel_realtek ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR389), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389 ++ARCH:=mips ++CROSS_COMPILE:= mips-linux-gnu- ++KVER:= 2.6.28.10 ++KSRC:= /home/mstar/mstar_linux/2.6.28.9/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ++ARCH := mips ++CROSS_COMPILE := mips-openwrt-linux- ++KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ++ARCH := mips ++#CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux- ++CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux- ++KSRC ?=/usr/local/Jupiter/linux-2.6.12 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_RTK_DMP), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ++ARCH:=mips ++CROSS_COMPILE:=mipsel-linux- ++KVER:= ++KSRC ?= /usr/src/DMP_Kernel/jupiter/linux-2.6.12 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MT53XX), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX ++ARCH:= arm ++CROSS_COMPILE:= arm11_mtk_le- ++KVER:= 2.6.27 ++KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM ++ARCH := arm ++CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- ++KVER := 2.6.31 ++KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source ++endif ++ ++ifeq ($(CONFIG_PLATFORM_FS_MX61), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env ++endif ++ ++ ++ ++ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X ++ARCH := mips ++CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu- ++KVER := 2.6.27 ++KSRC := /home/cnsd4/project/actions/linux-2.6.27.28 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TI_DM365), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365 ++ARCH := arm ++CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- ++KVER := 2.6.18 ++KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TEGRA4_DALMORE), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/SDK_2304_20110613/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/SDK_2304_20110613/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8920_JB42), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH := arm ++CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi- ++KSRC := /usr/src/release_fae_version/kernel25_A7_281x ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TI_PANDA), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH := arm ++#CROSS_COMPILE := /media/DATA-1/aosp/ics-aosp_20111227/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++#KSRC := /media/DATA-1/aosp/android-omap-panda-3.0_20120104 ++CROSS_COMPILE := /media/DATA-1/android-4.0/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /media/DATA-1/android-4.0/panda_kernel/omap ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH ?= mips ++CROSS_COMPILE ?= /mnt/sdb5/Ingenic/Umido/mips-4.3/bin/mips-linux-gnu- ++KSRC ?= /mnt/sdb5/Ingenic/Umido/kernel ++endif ++ ++#Add setting for MN10300 ++ifeq ($(CONFIG_PLATFORM_MN10300), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MN10300 ++ARCH := mn10300 ++CROSS_COMPILE := mn10300-linux- ++KVER := 2.6.32.2 ++KSRC := /home/winuser/work/Plat_sLD2T_V3010/usr/src/linux-2.6.32.2 ++INSTALL_PREFIX := ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_SUNxI), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ARM_SUNxI ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 3.0.8 ++#KSRC:= ../lichee/linux-3.0/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN6I ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX ++EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 3.3.0 ++#KSRC:= ../lichee/linux-3.3/ ++endif ++ ++ifneq ($(USER_MODULE_NAME),) ++MODULE_NAME := $(USER_MODULE_NAME) ++endif ++ ++ifeq ($(CONFIG_MP_INCLUDED), y) ++MODULE_NAME := $(MODULE_NAME)_mp ++EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED ++endif ++ ++ ++ifneq ($(KERNELRELEASE),) ++ ++ ++rtk_core := core/rtw_cmd.o \ ++ core/rtw_security.o \ ++ core/rtw_debug.o \ ++ core/rtw_io.o \ ++ core/rtw_ioctl_query.o \ ++ core/rtw_ioctl_set.o \ ++ core/rtw_ieee80211.o \ ++ core/rtw_mlme.o \ ++ core/rtw_mlme_ext.o \ ++ core/rtw_wlan_util.o \ ++ core/rtw_pwrctrl.o \ ++ core/rtw_rf.o \ ++ core/rtw_recv.o \ ++ core/rtw_sta_mgt.o \ ++ core/rtw_ap.o \ ++ core/rtw_xmit.o \ ++ core/rtw_p2p.o \ ++ core/rtw_tdls.o \ ++ core/rtw_br_ext.o \ ++ core/rtw_iol.o \ ++ core/rtw_sreset.o ++ ++$(MODULE_NAME)-y += $(rtk_core) ++ ++$(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o ++ ++$(MODULE_NAME)-y += core/efuse/rtw_efuse.o ++ ++$(MODULE_NAME)-y += $(_HAL_INTFS_FILES) ++ ++$(MODULE_NAME)-y += $(_OS_INTFS_FILES) ++ ++$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \ ++ core/rtw_mp_ioctl.o ++ ++obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o ++ ++else ++ ++export CONFIG_RTL8192CU = m ++ ++all: modules ++ ++modules: ++ $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules ++ ++strip: ++ $(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded ++ ++install: ++ install -p -m 644 $(MODULE_NAME).ko $(MODDESTDIR) ++ /sbin/depmod -a ${KVER} ++ ++uninstall: ++ rm -f $(MODDESTDIR)/$(MODULE_NAME).ko ++ /sbin/depmod -a ${KVER} ++ ++ ++config_r: ++ @echo "make config" ++ /bin/bash script/Configure script/config.in ++ ++.PHONY: modules clean ++ ++clean: ++ rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ ++ rm .tmp_versions -fr ; rm Module.symvers -fr ++ rm -fr Module.markers ; rm -fr modules.order ++ cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/clean +@@ -0,0 +1,5 @@ ++#!/bin/bash ++rmmod 8192cu ++rmmod 8192ce ++rmmod 8192du ++rmmod 8192de +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/efuse/rtw_efuse.c +@@ -0,0 +1,1147 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_EFUSE_C_ ++ ++#include ++#include ++#include ++ ++#include ++ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++u8 fakeEfuseBank=0; ++u32 fakeEfuseUsedBytes=0; ++u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]={0}; ++u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]={0}; ++u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]={0}; ++ ++u32 BTEfuseUsedBytes=0; ++u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++ ++u32 fakeBTEfuseUsedBytes=0; ++u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++/*------------------------Define local variable------------------------------*/ ++ ++//------------------------------------------------------------------------------ ++#define REG_EFUSE_CTRL 0x0030 ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++//------------------------------------------------------------------------------ ++ ++BOOLEAN ++Efuse_Read1ByteFromFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u8 *Value ); ++BOOLEAN ++Efuse_Read1ByteFromFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u8 *Value ) ++{ ++ if(Offset >= EFUSE_MAX_HW_SIZE) ++ { ++ return _FALSE; ++ } ++ //DbgPrint("Read fake content, offset = %d\n", Offset); ++ if(fakeEfuseBank == 0) ++ *Value = fakeEfuseContent[Offset]; ++ else ++ *Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset]; ++ return _TRUE; ++} ++ ++BOOLEAN ++Efuse_Write1ByteToFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value ); ++BOOLEAN ++Efuse_Write1ByteToFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value ) ++{ ++ if(Offset >= EFUSE_MAX_HW_SIZE) ++ { ++ return _FALSE; ++ } ++ if(fakeEfuseBank == 0) ++ fakeEfuseContent[Offset] = Value; ++ else ++ { ++ fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value; ++ } ++ return _TRUE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: Efuse_PowerSwitch ++ * ++ * Overview: When we want to enable write operation, we should change to ++ * pwr on state. When we stop write, we should switch to 500k mode ++ * and disable LDO 2.5V. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/17/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++Efuse_PowerSwitch( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ pAdapter->HalFunc.EfusePowerSwitch(pAdapter, bWrite, PwrState); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_GetCurrentSize ++ * ++ * Overview: Get current efuse size!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/16/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++u16 ++Efuse_GetCurrentSize( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ ++ return ret; ++} ++ ++/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ ++u8 ++Efuse_CalculateWordCnts(IN u8 word_en) ++{ ++ u8 word_cnts = 0; ++ if(!(word_en & BIT(0))) word_cnts++; // 0 : write enable ++ if(!(word_en & BIT(1))) word_cnts++; ++ if(!(word_en & BIT(2))) word_cnts++; ++ if(!(word_en & BIT(3))) word_cnts++; ++ return word_cnts; ++} ++ ++// ++// Description: ++// Execute E-Fuse read byte operation. ++// Refered from SD1 Richard. ++// ++// Assumption: ++// 1. Boot from E-Fuse and successfully auto-load. ++// 2. PASSIVE_LEVEL (USB interface) ++// ++// Created by Roger, 2008.10.21. ++// ++VOID ++ReadEFuseByte( ++ PADAPTER Adapter, ++ u16 _offset, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest) ++{ ++ u32 value32; ++ u8 readbyte; ++ u16 retry; ++ //u32 start=rtw_get_current_time(); ++ ++ if(bPseudoTest) ++ { ++ Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf); ++ return; ++ } ++ ++ //Write Address ++ rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff)); ++ readbyte = rtw_read8(Adapter, EFUSE_CTRL+2); ++ rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); ++ ++ //Write bit 32 0 ++ readbyte = rtw_read8(Adapter, EFUSE_CTRL+3); ++ rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f)); ++ ++ //Check bit 32 read-ready ++ retry = 0; ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ //while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) ++ while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000)) ++ { ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ retry++; ++ } ++ ++ // 20100205 Joseph: Add delay suggested by SD1 Victor. ++ // This fix the problem that Efuse read error in high temperature condition. ++ // Designer says that there shall be some delay after ready bit is set, or the ++ // result will always stay on last data we read. ++ rtw_udelay_os(50); ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ ++ *pbuf = (u8)(value32 & 0xff); ++ //DBG_871X("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); ++ ++} ++ ++ ++// ++// Description: ++// 1. Execute E-Fuse read byte operation according as map offset and ++// save to E-Fuse table. ++// 2. Refered from SD1 Richard. ++// ++// Assumption: ++// 1. Boot from E-Fuse and successfully auto-load. ++// 2. PASSIVE_LEVEL (USB interface) ++// ++// Created by Roger, 2008.10.21. ++// ++// 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. ++// 2. Add efuse utilization collect. ++// 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 ++// write addr must be after sec5. ++// ++ ++VOID ++efuse_ReadEFuse( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ); ++VOID ++efuse_ReadEFuse( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); ++} ++ ++VOID ++EFUSE_GetEfuseDefinition( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u8 type, ++ OUT void *pOut, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_Read1Byte ++ * ++ * Overview: Copy from WMAC fot EFUSE read 1 byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/23/2008 MHC Copy from WMAC. ++ * ++ *---------------------------------------------------------------------------*/ ++u8 ++EFUSE_Read1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address) ++{ ++ u8 data; ++ u8 Bytetemp = {0x00}; ++ u8 temp = {0x00}; ++ u32 k=0; ++ u16 contentLen=0; ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); ++ ++ if (Address < contentLen) //E-fuse 512Byte ++ { ++ //Write E-fuse Register address bit0~7 ++ temp = Address & 0xFF; ++ rtw_write8(Adapter, EFUSE_CTRL+1, temp); ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); ++ //Write E-fuse Register address bit8~9 ++ temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); ++ rtw_write8(Adapter, EFUSE_CTRL+2, temp); ++ ++ //Write 0x30[31]=0 ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ temp = Bytetemp & 0x7F; ++ rtw_write8(Adapter, EFUSE_CTRL+3, temp); ++ ++ //Wait Write-ready (0x30[31]=1) ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ while(!(Bytetemp & 0x80)) ++ { ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ k++; ++ if(k==1000) ++ { ++ k=0; ++ break; ++ } ++ } ++ data=rtw_read8(Adapter, EFUSE_CTRL); ++ return data; ++ } ++ else ++ return 0xFF; ++ ++}/* EFUSE_Read1Byte */ ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_Write1Byte ++ * ++ * Overview: Copy from WMAC fot EFUSE write 1 byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/23/2008 MHC Copy from WMAC. ++ * ++ *---------------------------------------------------------------------------*/ ++ ++void ++EFUSE_Write1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address, ++ IN u8 Value); ++void ++EFUSE_Write1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address, ++ IN u8 Value) ++{ ++ u8 Bytetemp = {0x00}; ++ u8 temp = {0x00}; ++ u32 k=0; ++ u16 contentLen=0; ++ ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr=%x Data =%x\n", Address, Value)); ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); ++ ++ if( Address < contentLen) //E-fuse 512Byte ++ { ++ rtw_write8(Adapter, EFUSE_CTRL, Value); ++ ++ //Write E-fuse Register address bit0~7 ++ temp = Address & 0xFF; ++ rtw_write8(Adapter, EFUSE_CTRL+1, temp); ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); ++ ++ //Write E-fuse Register address bit8~9 ++ temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); ++ rtw_write8(Adapter, EFUSE_CTRL+2, temp); ++ ++ //Write 0x30[31]=1 ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ temp = Bytetemp | 0x80; ++ rtw_write8(Adapter, EFUSE_CTRL+3, temp); ++ ++ //Wait Write-ready (0x30[31]=0) ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ while(Bytetemp & 0x80) ++ { ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ k++; ++ if(k==100) ++ { ++ k=0; ++ break; ++ } ++ } ++ } ++}/* EFUSE_Write1Byte */ ++ ++/* 11/16/2008 MH Read one byte from real Efuse. */ ++u8 ++efuse_OneByteRead( ++ IN PADAPTER pAdapter, ++ IN u16 addr, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 tmpidx = 0; ++ u8 bResult; ++ ++ if(bPseudoTest) ++ { ++ bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data); ++ return bResult; ++ } ++ // -----------------e-fuse reg ctrl --------------------------------- ++ //address ++ rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); ++ rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) | ++ (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )); ++ ++ rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);//read cmd ++ ++ while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3))&&(tmpidx<100)) ++ { ++ tmpidx++; ++ } ++ if(tmpidx<100) ++ { ++ *data=rtw_read8(pAdapter, EFUSE_CTRL); ++ bResult = _TRUE; ++ } ++ else ++ { ++ *data = 0xff; ++ bResult = _FALSE; ++ } ++ return bResult; ++} ++ ++/* 11/16/2008 MH Write one byte to reald Efuse. */ ++u8 ++efuse_OneByteWrite( ++ IN PADAPTER pAdapter, ++ IN u16 addr, ++ IN u8 data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 tmpidx = 0; ++ u8 bResult; ++ ++ if(bPseudoTest) ++ { ++ bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data); ++ return bResult; ++ } ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr = %x Data=%x\n", addr, data)); ++ ++ //return 0; ++ ++ // -----------------e-fuse reg ctrl --------------------------------- ++ //address ++ rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); ++ rtw_write8(pAdapter, EFUSE_CTRL+2, ++ (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )|(u8)((addr>>8)&0x03) ); ++ rtw_write8(pAdapter, EFUSE_CTRL, data);//data ++ ++ rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);//write cmd ++ ++ while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100) ){ ++ tmpidx++; ++ } ++ ++ if(tmpidx<100) ++ { ++ bResult = _TRUE; ++ } ++ else ++ { ++ bResult = _FALSE; ++ } ++ ++ return bResult; ++} ++ ++int ++Efuse_PgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest); ++ ++ return ret; ++} ++ ++int ++Efuse_PgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_WordEnableDataRead ++ * ++ * Overview: Read allowed word in current efuse section data. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/16/2008 MHC Create Version 0. ++ * 11/21/2008 MHC Fix Write bug when we only enable late word. ++ * ++ *---------------------------------------------------------------------------*/ ++void ++efuse_WordEnableDataRead(IN u8 word_en, ++ IN u8 *sourdata, ++ IN u8 *targetdata) ++{ ++ if (!(word_en&BIT(0))) ++ { ++ targetdata[0] = sourdata[0]; ++ targetdata[1] = sourdata[1]; ++ } ++ if (!(word_en&BIT(1))) ++ { ++ targetdata[2] = sourdata[2]; ++ targetdata[3] = sourdata[3]; ++ } ++ if (!(word_en&BIT(2))) ++ { ++ targetdata[4] = sourdata[4]; ++ targetdata[5] = sourdata[5]; ++ } ++ if (!(word_en&BIT(3))) ++ { ++ targetdata[6] = sourdata[6]; ++ targetdata[7] = sourdata[7]; ++ } ++} ++ ++ ++u8 ++Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, ++ IN u16 efuse_addr, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ret=0; ++ ++ ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value) ++{ ++ return efuse_OneByteRead(padapter,address, value, _FALSE); ++} ++ ++static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value) ++{ ++ return efuse_OneByteWrite(padapter,address, *value, _FALSE); ++} ++ ++/* ++ * read/wirte raw efuse data ++ */ ++u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data) ++{ ++ int i = 0; ++ u16 real_content_len = 0, max_available_size = 0; ++ u8 res = _FAIL ; ++ u8 (*rw8)(PADAPTER, u16, u8*); ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE); ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if (start_addr > real_content_len) ++ return _FAIL; ++ ++ if (_TRUE == bWrite) { ++ if ((start_addr + cnts) > max_available_size) ++ return _FAIL; ++ rw8 = &efuse_write8; ++ } else ++ rw8 = &efuse_read8; ++ ++ Efuse_PowerSwitch(padapter, bWrite, _TRUE); ++ ++ // e-fuse one byte read / write ++ for (i = 0; i < cnts; i++) { ++ if (start_addr >= real_content_len) { ++ res = _FAIL; ++ break; ++ } ++ ++ res = rw8(padapter, start_addr++, data++); ++ if (_FAIL == res) break; ++ } ++ ++ Efuse_PowerSwitch(padapter, bWrite, _FALSE); ++ ++ return res; ++} ++//------------------------------------------------------------------------------ ++u16 efuse_GetMaxSize(PADAPTER padapter) ++{ ++ u16 max_size; ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); ++ return max_size; ++} ++//------------------------------------------------------------------------------ ++u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size) ++{ ++ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); ++ *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE); ++ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); ++ ++ return _SUCCESS; ++} ++//------------------------------------------------------------------------------ ++u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) ++{ ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ if ((addr + cnts) > mapLen) ++ return _FAIL; ++ ++ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); ++ ++ efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE); ++ ++ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); ++ ++ return _SUCCESS; ++} ++//------------------------------------------------------------------------------ ++u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) ++{ ++ u8 offset, word_en; ++ u8 *map; ++ u8 newdata[PGPKT_DATA_SIZE]; ++ s32 i, j, idx; ++ u8 ret = _SUCCESS; ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ if ((addr + cnts) > mapLen) ++ return _FAIL; ++ ++ map = rtw_zmalloc(mapLen); ++ if(map == NULL){ ++ return _FAIL; ++ } ++ ++ ret = rtw_efuse_map_read(padapter, 0, mapLen, map); ++ if (ret == _FAIL) goto exit; ++ ++ Efuse_PowerSwitch(padapter, _TRUE, _TRUE); ++ ++ offset = (addr >> 3); ++ word_en = 0xF; ++ _rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE); ++ i = addr & 0x7; // index of one package ++ j = 0; // index of new package ++ idx = 0; // data index ++ ++ if (i & 0x1) { ++ // odd start ++ if (data[idx] != map[addr+idx]) { ++ word_en &= ~BIT(i >> 1); ++ newdata[i-1] = map[addr+idx-1]; ++ newdata[i] = data[idx]; ++ } ++ i++; ++ idx++; ++ } ++ do { ++ for (; i < PGPKT_DATA_SIZE; i += 2) ++ { ++ if (cnts == idx) break; ++ if ((cnts - idx) == 1) { ++ if (data[idx] != map[addr+idx]) { ++ word_en &= ~BIT(i >> 1); ++ newdata[i] = data[idx]; ++ newdata[i+1] = map[addr+idx+1]; ++ } ++ idx++; ++ break; ++ } else { ++ if ((data[idx] != map[addr+idx]) || ++ (data[idx+1] != map[addr+idx+1])) ++ { ++ word_en &= ~BIT(i >> 1); ++ newdata[i] = data[idx]; ++ newdata[i+1] = data[idx + 1]; ++ } ++ idx += 2; ++ } ++ if (idx == cnts) break; ++ } ++ ++ if (word_en != 0xF) { ++ ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE); ++ DBG_871X("offset=%x \n",offset); ++ DBG_871X("word_en=%x \n",word_en); ++ ++ for(i=0;iefuse_eeprom_data[Offset]; ++ ++} // EFUSE_ShadowRead1Byte ++ ++//---------------Read Two Bytes ++static VOID ++efuse_ShadowRead2Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u16 *Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ *Value = pEEPROM->efuse_eeprom_data[Offset]; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; ++ ++} // EFUSE_ShadowRead2Byte ++ ++//---------------Read Four Bytes ++static VOID ++efuse_ShadowRead4Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u32 *Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ *Value = pEEPROM->efuse_eeprom_data[Offset]; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24; ++ ++} // efuse_ShadowRead4Byte ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_ShadowWrite1Byte ++ * efuse_ShadowWrite2Byte ++ * efuse_ShadowWrite4Byte ++ * ++ * Overview: Write efuse modify map by one/two/four byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++#ifdef PLATFORM ++static VOID ++efuse_ShadowWrite1Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value); ++#endif //PLATFORM ++static VOID ++efuse_ShadowWrite1Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = Value; ++ ++} // efuse_ShadowWrite1Byte ++ ++//---------------Write Two Bytes ++static VOID ++efuse_ShadowWrite2Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u16 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = Value&0x00FF; ++ pEEPROM->efuse_eeprom_data[Offset+1] = Value>>8; ++ ++} // efuse_ShadowWrite1Byte ++ ++//---------------Write Four Bytes ++static VOID ++efuse_ShadowWrite4Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u32 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF); ++ pEEPROM->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF); ++ pEEPROM->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF); ++ pEEPROM->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF); ++ ++} // efuse_ShadowWrite1Byte ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowMapUpdate ++ * ++ * Overview: Transfer current EFUSE content to shadow init and modify map. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/13/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++void EFUSE_ShadowMapUpdate( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); ++ ++ if (pEEPROM->bautoload_fail_flag == _TRUE) ++ { ++ _rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen); ++ } ++ else ++ { ++ #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM)) { ++ #endif ++ ++ Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, bPseudoTest); ++ ++ #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM); ++ } ++ #endif ++ } ++ ++ //PlatformMoveMemory((PVOID)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], ++ //(PVOID)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); ++}// EFUSE_ShadowMapUpdate ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowRead ++ * ++ * Overview: Read from efuse init map !!!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++void ++EFUSE_ShadowRead( ++ IN PADAPTER pAdapter, ++ IN u8 Type, ++ IN u16 Offset, ++ IN OUT u32 *Value ) ++{ ++ if (Type == 1) ++ efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value); ++ else if (Type == 2) ++ efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value); ++ else if (Type == 4) ++ efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value); ++ ++} // EFUSE_ShadowRead ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowWrite ++ * ++ * Overview: Write efuse modify map for later update operation to use!!!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++EFUSE_ShadowWrite( ++ IN PADAPTER pAdapter, ++ IN u8 Type, ++ IN u16 Offset, ++ IN OUT u32 Value); ++VOID ++EFUSE_ShadowWrite( ++ IN PADAPTER pAdapter, ++ IN u8 Type, ++ IN u16 Offset, ++ IN OUT u32 Value) ++{ ++#if (MP_DRIVER == 0) ++ return; ++#endif ++ ++ if (Type == 1) ++ efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value); ++ else if (Type == 2) ++ efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value); ++ else if (Type == 4) ++ efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value); ++ ++} // EFUSE_ShadowWrite ++ ++VOID ++Efuse_InitSomeVar( ++ IN PADAPTER pAdapter ++ ); ++VOID ++Efuse_InitSomeVar( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u8 i; ++ ++ _rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE); ++ _rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN); ++ _rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN); ++ ++ for(i=0; i ++ ++ int isAdaptorInfoFileValid(void) ++{ ++ return _TRUE; ++} ++ ++int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++{ ++ int ret =_SUCCESS; ++ ++ if(path && eeprom_priv) { ++ ret = rtw_store_to_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); ++ if(ret == EEPROM_MAX_SIZE) ++ ret = _SUCCESS; ++ else ++ ret = _FAIL; ++ } else { ++ DBG_871X("%s NULL pointer\n",__FUNCTION__); ++ ret = _FAIL; ++ } ++ return ret; ++} ++ ++int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++{ ++ int ret = _SUCCESS; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && eeprom_priv) { ++ ++ ret = rtw_retrive_from_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); ++ ++ if(ret == EEPROM_MAX_SIZE) ++ ret = _SUCCESS; ++ else ++ ret = _FAIL; ++ ++ #if 0 ++ if(isAdaptorInfoFileValid()) { ++ return 0; ++ } else { ++ return _FAIL; ++ } ++ #endif ++ ++ } else { ++ DBG_871X("%s NULL pointer\n",__FUNCTION__); ++ ret = _FAIL; ++ } ++ return ret; ++} ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++#endif //PLATFORM_LINUX ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_ap.c +@@ -0,0 +1,2943 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_AP_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WMM_OUI[]; ++extern unsigned char WPS_OUI[]; ++extern unsigned char P2P_OUI[]; ++extern unsigned char WFD_OUI[]; ++ ++void init_mlme_ap_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ ++ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); ++ ++ //for ACL ++ _rtw_init_queue(&pacl_list->acl_node_q); ++ ++ //pmlmeext->bstart_bss = _FALSE; ++ ++ start_ap_mode(padapter); ++} ++ ++void free_mlme_ap_info(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //stop_ap_mode(padapter); ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ ++ rtw_sta_flush(padapter); ++ ++ pmlmeinfo->state = _HW_STATE_NOLINK_; ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ //free bc/mc sta_info ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++} ++ ++static void update_BCNTIM(_adapter *padapter) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ unsigned char *pie = pnetwork_mlmeext->IEs; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //update TIM IE ++ //if(pstapriv->tim_bitmap) ++ if(_TRUE) ++ { ++ u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u16 tim_bitmap_le; ++ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; ++ ++ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && tim_ielen>0) ++ { ++ tim_ielen += 2; ++ ++ premainder_ie = p+tim_ielen; ++ ++ tim_ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; ++ ++ //append TIM IE from dst_ie offset ++ dst_ie = p; ++ } ++ else ++ { ++ tim_ielen = 0; ++ ++ //calucate head_len ++ offset = _FIXED_IE_LENGTH_; ++ ++ /* get ssid_ie len */ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ offset += tmp_len+2; ++ ++ // get supported rates len ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ offset += tmp_len+2; ++ } ++ ++ //DS Parameter Set IE, len=3 ++ offset += 3; ++ ++ premainder_ie = pie + offset; ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; ++ ++ //append TIM IE from offset ++ dst_ie = pie + offset; ++ ++ } ++ ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=_TIM_IE_; ++ ++ if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fc)) ++ tim_ielen = 5; ++ else ++ tim_ielen = 4; ++ ++ *dst_ie++= tim_ielen; ++ ++ *dst_ie++=0;//DTIM count ++ *dst_ie++=1;//DTIM peroid ++ ++ if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames ++ *dst_ie++ = BIT(0);//bitmap ctrl ++ else ++ *dst_ie++ = 0; ++ ++ if(tim_ielen==4) ++ { ++ *dst_ie++ = *(u8*)&tim_bitmap_le; ++ } ++ else if(tim_ielen==5) ++ { ++ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); ++ dst_ie+=2; ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork_mlmeext->IELength = offset + remainder_ielen; ++ ++ } ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ set_tx_beacon_cmd(padapter); ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++ ++} ++ ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 bmatch = _FALSE; ++ u8 *pie = pnetwork->IEs; ++ u8 *p=NULL, *dst_ie=NULL, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u32 i, offset, ielen, ie_offset, remainder_ielen = 0; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ if (pIE->ElementID > index) ++ { ++ break; ++ } ++ else if(pIE->ElementID == index) // already exist the same IE ++ { ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ bmatch = _TRUE; ++ break; ++ } ++ ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ i += (pIE->Length + 2); ++ } ++ ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ if(bmatch) ++ dst_ie = p; ++ else ++ dst_ie = (p+ielen); ++ } ++ ++ if(dst_ie == NULL) ++ return; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=index; ++ *dst_ie++=len; ++ ++ _rtw_memcpy(dst_ie, data, len); ++ dst_ie+=len; ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) ++{ ++ u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ uint offset, ielen, ie_offset, remainder_ielen = 0; ++ u8 *pie = pnetwork->IEs; ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ dst_ie = p; ++ } ++ else { ++ return; ++ } ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++ ++u8 chk_sta_is_alive(struct sta_info *psta); ++u8 chk_sta_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" ++ , MAC_ARG(psta->hwaddr) ++ , psta->rssi_stat.UndecoratedSmoothedPWDB ++ //, STA_RX_PKTS_ARG(psta) ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->expire_to ++ , psta->state&WIFI_SLEEP_STATE?"PS, ":"" ++ , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" ++ , psta->sleepq_len ++ ); ++ #endif ++ ++ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) ++ { ++ #if 0 ++ if(psta->state&WIFI_SLEEP_STATE) ++ ret = _TRUE; ++ #endif ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void expire_timeout_chk(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ phead = &pstapriv->auth_list; ++ plist = get_next(phead); ++ ++ //check auth_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); ++ plist = get_next(plist); ++ ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ if (psta->expire_to == 0) ++ { ++ rtw_list_delete(&psta->auth_list); ++ pstapriv->auth_list_cnt--; ++ ++ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ if (chk_sta_is_alive(psta) || !psta->expire_to) { ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ #ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++ #endif // CONFIG_TX_MCAST2UNI ++ } else { ++ psta->expire_to--; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { ++ // check sta by delba(addba) for 11n STA ++ // ToDo: use CCX report to check for all STAs ++ //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); ++ ++ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { ++ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 0; ++ psta->expire_to = 0; ++ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { ++ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 1; ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ } ++ } ++#endif // CONFIG_TX_MCAST2UNI ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++ if (psta->expire_to <= 0) ++ { ++ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ continue; ++ } ++ ++ if (psta->state & WIFI_SLEEP_STATE) { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { ++ //to check if alive by another methods if staion is at ps mode. ++ psta->expire_to = pstapriv->expire_to; ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); ++ ++ //to update bcn with tim_bitmap for this station ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ ++ if(!pmlmeext->active_keep_alive_check) ++ continue; ++ } ++ } ++ ++ if (pmlmeext->active_keep_alive_check) { ++ int stainfo_offset; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ ++ continue; ++ } ++ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ else ++ { ++ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ ++ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) ++ && padapter->xmitpriv.free_xmitframe_cnt < (NR_XMITFRAME/pstapriv->asoc_list_cnt/2) ++ ){ ++ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ ++ , MAC_ARG(psta->hwaddr) ++ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); ++ wakeup_sta_to_xmit(padapter, psta); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++if (chk_alive_num) { ++ ++ u8 backup_oper_channel=0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ /* switch to correct channel of current network before issue keep-alive frames */ ++ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { ++ backup_oper_channel = rtw_get_oper_ch(padapter); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ } ++ ++ /* issue null data to check sta alive*/ ++ for (i = 0; i < chk_alive_num; i++) { ++ ++ int ret = _FAIL; ++ ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ if(!(psta->state &_FW_LINKED)) ++ continue; ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); ++ else ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); ++ ++ psta->keep_alive_trycnt++; ++ if (ret == _SUCCESS) ++ { ++ DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ continue; ++ } ++ else if (psta->keep_alive_trycnt <= 3) ++ { ++ DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ psta->expire_to = 1; ++ continue; ++ } ++ ++ psta->keep_alive_trycnt = 0; ++ ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++ if (backup_oper_channel>0) /* back to the original operation channel */ ++ SelectChannel(padapter, backup_oper_channel); ++} ++#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ associated_clients_update(padapter, updated); ++} ++ ++ ++static void add_RATid(_adapter *padapter, struct sta_info *psta) ++{ ++ int i; ++ u8 rf_type; ++ u32 init_rate=0; ++ unsigned char sta_band = 0, raid, shortGIrate = _FALSE; ++ unsigned char limit; ++ unsigned int tx_ra_bitmap=0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ ++ if(psta) ++ psta_ht = &psta->htpriv; ++ else ++ return; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset); i++) ++ { ++ if (psta->bssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ //n mode ra_bitmap ++ if(psta_ht->ht_option) ++ { ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_2T2R) ++ limit=16;// 2R ++ else ++ limit=8;// 1R ++ ++ for (i=0; iht_cap.supp_mcs_set[i/8] & BIT(i%8)) ++ tx_ra_bitmap |= BIT(i+12); ++ } ++ ++ //max short GI rate ++ shortGIrate = psta_ht->sgi; ++ } ++ ++ ++#if 0//gtest ++ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) ++ { ++ //is this a 2r STA? ++ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) ++ { ++ priv->pshare->has_2r_sta |= BIT(pstat->aid); ++ if(rtw_read16(padapter, 0x102501f6) != 0xffff) ++ { ++ rtw_write16(padapter, 0x102501f6, 0xffff); ++ reset_1r_sta_RA(priv, 0xffff); ++ Switch_1SS_Antenna(priv, 3); ++ } ++ } ++ else// bg or 1R STA? ++ { ++ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) ++ { ++ if(rtw_read16(padapter, 0x102501f6) != 0x7777) ++ { // MCS7 SGI ++ rtw_write16(padapter, 0x102501f6,0x7777); ++ reset_1r_sta_RA(priv, 0x7777); ++ Switch_1SS_Antenna(priv, 2); ++ } ++ } ++ } ++ ++ } ++ ++ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) ++ { ++ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) ++ pstat->rssi_level = 1; ++ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ++ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && ++ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && ++ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) ++ pstat->rssi_level = 2; ++ else ++ pstat->rssi_level = 3; ++ } ++ ++ // rate adaptive by rssi ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) ++ { ++ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x100f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x100ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x100ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x100ff001; ++ ++ break; ++ } ++ } ++ else ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x1f0f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x1f0ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x000ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x000ff001; ++ ++ break; ++ } ++ ++ // Don't need to mask high rates due to new rate adaptive parameters ++ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta ++ // pstat->tx_ra_bitmap &= 0x81ffffff; ++ ++ // NIC driver will report not supporting MCS15 and MCS14 in asoc req ++ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) ++ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 ++ } ++ } ++ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x00000f00; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x00000ff0; ++ break; ++ case 3: ++ pstat->tx_ra_bitmap &= 0x00000ff5; ++ break; ++ } ++ } ++ else ++ { ++ pstat->tx_ra_bitmap &= 0x0000000d; ++ } ++ ++ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) ++ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) ++ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate ++ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || ++ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) ++ { ++ pstat->tx_ra_bitmap &= ~BIT(28); ++ } ++#endif ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ // 5G band ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ raid = networktype_to_raid(sta_band); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ if (psta->aid < NUM_STA) ++ { ++ u8 arg = 0; ++ ++ arg = psta->mac_id&0x1f; ++ ++ arg |= BIT(7);//support entry 2~31 ++ ++ if (shortGIrate==_TRUE) ++ arg |= BIT(5); ++ ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%x, arg=0x%x\n", ++ __FUNCTION__ , psta->mac_id, raid ,tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg); ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ } ++ else ++ { ++ DBG_871X("station aid %d exceed the max number\n", psta->aid); ++ } ++ ++} ++ ++static void update_bmc_sta(_adapter *padapter) ++{ ++ _irqL irqL; ++ u32 init_rate=0; ++ unsigned char network_type, raid; ++ int i, supportRateNum = 0; ++ unsigned int tx_ra_bitmap=0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); ++ ++ if(psta) ++ { ++ psta->aid = 0;//default set to 0 ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid + 1; ++ ++ psta->qos_option = 0; ++ psta->htpriv.ht_option = _FALSE; ++ ++ psta->ieee8021x_blocked = 0; ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. ++ ++ ++ ++ //prepare for add_RATid ++ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); ++ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, 1); ++ ++ _rtw_memcpy(psta->bssrateset, &pcur_network->SupportedRates, supportRateNum); ++ psta->bssratelen = supportRateNum; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ //force to A mode. 5G doesn't support CCK rates ++ network_type = WIRELESS_11A; ++ tx_ra_bitmap = 0x150; // 6, 12, 24 Mbps ++ } else { ++ //force to b mode ++ network_type = WIRELESS_11B; ++ tx_ra_bitmap = 0xf; ++ } ++ ++ //tx_ra_bitmap = update_basic_rate(pcur_network->SupportedRates, supportRateNum); ++ ++ raid = networktype_to_raid(network_type); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ //DBG_871X("Add id %d val %08x to ratr for bmc sta\n", psta->aid, tx_ra_bitmap); ++ ++ //if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg = 0; ++ ++ arg = psta->mac_id&0x1f; ++ ++ arg |= BIT(7); ++ ++ //if (shortGIrate==_TRUE) ++ // arg |= BIT(5); ++ ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("update_bmc_sta, mask=0x%x, arg=0x%x\n", tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg); ++ ++ } ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state = _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_871X("add_RATid_bmc_sta error!\n"); ++ } ++ ++} ++ ++//notes: ++//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode ++//MAC_ID = AID+1 for sta in ap/adhoc mode ++//MAC_ID = 1 for bc/mc for sta/ap/adhoc ++//MAC_ID = 0 for bssid for sta/ap/adhoc ++//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++ ++ //set intf_tag to if1 ++ //psta->intf_tag = 0; ++ ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid+1; ++ ++ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->ieee8021x_blocked = _TRUE; ++ else ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ //update sta's cap ++ ++ //ERP ++ VCS_update(padapter, psta); ++ ++ //HT related cap ++ if(phtpriv_sta->ht_option) ++ { ++ //check if sta supports rx ampdu ++ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ //check if sta support s Short GI ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ++ { ++ phtpriv_sta->sgi = _TRUE; ++ } ++ ++ // bwmode ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ //phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_40; ++ phtpriv_sta->bwmode = pmlmeext->cur_bwmode; ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ ++ } ++ ++ psta->qos_option = _TRUE; ++ ++ } ++ else ++ { ++ phtpriv_sta->ampdu_enable = _FALSE; ++ ++ phtpriv_sta->sgi = _FALSE; ++ phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ //Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ phtpriv_sta->agg_enable_bitmap = 0x0;//reset ++ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //todo: init other variables ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ ++ //add ratid ++ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ ++} ++ ++static void update_hw_ht_param(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++} ++ ++static void start_bss_network(_adapter *padapter, u8 *pbuf) ++{ ++ u8 *p; ++ u8 val8, cur_channel, cur_bwmode, cur_ch_offset; ++ u16 bcn_interval; ++ u32 acparm; ++ int ie_len; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ struct HT_info_element *pht_info=NULL; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ u8 cbw40_enable=0; ++ u8 change_band = _FALSE; ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; ++ cur_channel = pnetwork->Configuration.DSConfig; ++ cur_bwmode = HT_CHANNEL_WIDTH_20;; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ ++ //check if there is wps ie, ++ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, ++ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. ++ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) ++ { ++ pmlmeext->bstart_bss = _TRUE; ++ } ++ ++ //todo: update wmm, ht cap ++ //pmlmeinfo->WMM_enable; ++ //pmlmeinfo->HT_enable; ++ if(pmlmepriv->qospriv.qos_option) ++ pmlmeinfo->WMM_enable = _TRUE; ++ ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ pmlmeinfo->WMM_enable = _TRUE; ++ pmlmeinfo->HT_enable = _TRUE; ++ //pmlmeinfo->HT_info_enable = _TRUE; ++ //pmlmeinfo->HT_caps_enable = _TRUE; ++ ++ update_hw_ht_param(padapter); ++ } ++ ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //WEP Key will be set before this function, do not clear CAM. ++ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) ++ flush_all_cam_entry(padapter); //clear CAM ++ } ++ ++ //set MSR to AP_Mode ++ Set_MSR(padapter, _HW_STATE_AP_); ++ ++ //Set BSSID REG ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); ++ ++ //Set EDCA param reg ++#ifdef CONFIG_CONCURRENT_MODE ++ acparm = 0x005ea42b; ++#else ++ acparm = 0x002F3217; // VO ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ //acparm = 0x00105320; // BE ++ acparm = 0x005ea42b; ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ //Set Security ++ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //Beacon Control related register ++ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ u32 initialgain; ++ ++ initialgain = 0x1e; ++ ++ ++ //disable dynamic functions, such as high power, DIG ++ //Save_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type > PRIMARY_ADAPTER) ++ { ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ ++ //turn on dynamic functions on PRIMARY_ADAPTER, dynamic functions only runs at PRIMARY_ADAPTER ++ Switch_DM_Func(pbuddy_adapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ } ++ } ++ else ++#endif ++ { ++ //turn on dynamic functions ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ } ++ ++ } ++ ++ //set channel, bwmode ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ ++ if( pmlmeext->cur_channel > 14 ) ++ { ++ if( pregpriv->cbw40_enable & BIT(1) ) ++ cbw40_enable = 1; ++ } ++ else ++ if( pregpriv->cbw40_enable & BIT(0) ) ++ cbw40_enable = 1; ++ ++ if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode ++ //pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pht_info->infos[0] & 0x3) ++ { ++ case 1: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ } ++ ++ } ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_set_ap_channel_bandwidth(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++#else ++ //TODO: need to judge the phy parameters on concurrent mode for single phy ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++#ifdef CONFIG_CONCURRENT_MODE ++ if(!check_buddy_fwstate(padapter, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ else if(check_buddy_fwstate(padapter, _FW_LINKED)==_TRUE)//only second adapter can enter AP Mode ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ //To sync cur_channel/cur_bwmode/cur_ch_offset with primary adapter ++ DBG_871X("primary iface is at linked state, sync cur_channel/cur_bwmode/cur_ch_offset\n"); ++ DBG_871X("primary adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ DBG_871X("second adapter, CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ if((cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || ++ (cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) ++ change_band = _TRUE; ++ ++ cur_channel = pbuddy_mlmeext->cur_channel; ++ if(cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ if(pht_info) ++ pht_info->infos[0] &= ~(BIT(0)|BIT(1)); ++ ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ ++ //to update cur_ch_offset value in beacon ++ if(pht_info) ++ { ++ switch(cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pht_info->infos[0] |= 0x1; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pht_info->infos[0] |= 0x3; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ } ++ ++ } ++ else if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) ++ { ++ cur_bwmode = HT_CHANNEL_WIDTH_20; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if(cur_channel>0 && cur_channel<5) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x1; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ } ++ ++ if(cur_channel>7 && cur_channel<(14+1)) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x3; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ } ++ ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ ++ } ++ ++ // to update channel value in beacon ++ pnetwork->Configuration.DSConfig = cur_channel; ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if(p && ie_len>0) ++ *(p + 2) = cur_channel; ++ ++ if(pht_info) ++ pht_info->primary_channel = cur_channel; ++ ++ //set buddy adapter channel, bandwidth, offeset to current adapter ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++ ++ //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE ++ if(change_band == _TRUE) ++ change_band_update_ie(padapter, pnetwork); ++ } ++#else ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ // ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++#endif //CONFIG_DUALMAC_CONCURRENT ++ pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type; ++ ++ //update cur_wireless_mode ++ update_wireless_mode(padapter); ++ ++ //update RRSR after set channel and bandwidth ++ UpdateBrateTbl(padapter, pnetwork->SupportedRates); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ //udpate capability after cur_wireless_mode updated ++ update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork)); ++ ++ //let pnetwork_mlmeext == pnetwork_mlme. ++ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); ++ ++#ifdef CONFIG_P2P ++ _rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength); ++ pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength; ++#endif //CONFIG_P2P ++ ++ if(_TRUE == pmlmeext->bstart_bss) ++ { ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN //other case will tx beacon when bcn interrupt coming in. ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ //issue beacon frame ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++ } ++ ++ ++ //update bc/mc sta_info ++ update_bmc_sta(padapter); ++ ++ //pmlmeext->bstart_bss = _TRUE; ++ ++} ++ ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) ++{ ++ int ret=_SUCCESS; ++ u8 *p; ++ u8 *pHT_caps_ie=NULL; ++ u8 *pHT_info_ie=NULL; ++ struct sta_info *psta = NULL; ++ u16 cap, ht_cap=_FALSE; ++ uint ie_len = 0; ++ int group_cipher, pairwise_cipher; ++ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; ++ int supportRateNum = 0; ++ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ie = pbss_network->IEs; ++ ++ ++ /* SSID */ ++ /* Supported rates */ ++ /* DS Params */ ++ /* WLAN_EID_COUNTRY */ ++ /* ERP Information element */ ++ /* Extended supported rates */ ++ /* WPA/WPA2 */ ++ /* Wi-Fi Wireless Multimedia Extensions */ ++ /* ht_capab, ht_oper */ ++ /* WPS IE */ ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return _FAIL; ++ ++ ++ if(len>MAX_IE_SZ) ++ return _FAIL; ++ ++ pbss_network->IELength = len; ++ ++ _rtw_memset(ie, 0, MAX_IE_SZ); ++ ++ _rtw_memcpy(ie, pbuf, pbss_network->IELength); ++ ++ ++ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) ++ return _FAIL; ++ ++ pbss_network->Rssi = 0; ++ ++ _rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ //beacon interval ++ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability ++ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); ++ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); ++ ++ //capability ++ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(ie); ++ ++ //SSID ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); ++ pbss_network->Ssid.SsidLength = ie_len; ++ } ++ ++ //chnnel ++ channel = 0; ++ pbss_network->Configuration.Length = 0; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ channel = *(p + 2); ++ ++ pbss_network->Configuration.DSConfig = channel; ++ ++ ++ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); ++ // get supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ } ++ ++ //get ext_supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ ++ } ++ ++ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); ++ ++ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); ++ ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); ++ } ++ ++ //update privacy/security ++ if (cap & BIT(4)) ++ pbss_network->Privacy = 1; ++ else ++ pbss_network->Privacy = 0; ++ ++ psecuritypriv->wpa_psk = 0; ++ ++ //wpa2 ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ psecuritypriv->wpa_psk |= BIT(1); ++ ++ psecuritypriv->wpa2_group_cipher = group_cipher; ++ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ } ++ ++ //wpa ++ ie_len = 0; ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ ++ psecuritypriv->wpa_psk |= BIT(0); ++ ++ psecuritypriv->wpa_group_cipher = group_cipher; ++ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; ++ ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ break; ++ ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ ++ } ++ ++ //wmm ++ ie_len = 0; ++ pmlmepriv->qospriv.qos_option = 0; ++ if(pregistrypriv->wmm_enable) ++ { ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) ++ { ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ *(p+8) |= BIT(7);//QoS Info, support U-APSD ++ ++ /* disable all ACM bits since the WMM admission control is not supported */ ++ *(p + 10) &= ~BIT(4); /* BE */ ++ *(p + 14) &= ~BIT(4); /* BK */ ++ *(p + 18) &= ~BIT(4); /* VI */ ++ *(p + 22) &= ~BIT(4); /* VO */ ++ ++ break; ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ } ++ ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ u8 rf_type; ++ ++ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ pHT_caps_ie=p; ++ ++ ++ ht_cap = _TRUE; ++ network_type |= WIRELESS_11_24N; ++ ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || ++ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ } ++ else ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ } ++ ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & 0x03); //set Max Rx AMPDU size to 64K ++ ++ if(rf_type == RF_1T1R) ++ { ++ pht_cap->supp_mcs_set[0] = 0xff; ++ pht_cap->supp_mcs_set[1] = 0x0; ++ } ++ ++ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); ++ ++ } ++ ++ //parsing HT_INFO_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ pHT_info_ie=p; ++ } ++ ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ pbss_network->NetworkTypeInUse = Ndis802_11DS; ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ case WIRELESS_11A: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; ++ break; ++ default : ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ } ++ ++ pmlmepriv->cur_network.network_type = network_type; ++ ++ ++ pmlmepriv->htpriv.ht_option = _FALSE; ++#ifdef CONFIG_80211N_HT ++ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) ++ { ++ //todo: ++ //ht_cap = _FALSE; ++ } ++ ++ //ht_cap ++ if(pregistrypriv->ht_enable && ht_cap==_TRUE) ++ { ++ pmlmepriv->htpriv.ht_option = _TRUE; ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ if(pregistrypriv->ampdu_enable==1) ++ { ++ pmlmepriv->htpriv.ampdu_enable = _TRUE; ++ } ++ ++ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); ++ ++ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); ++ } ++#endif ++ ++ ++ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); ++ ++ //issue beacon to start bss network ++ start_bss_network(padapter, (u8*)pbss_network); ++ ++ ++ //alloc sta_info for ap itself ++ psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if(!psta) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (psta == NULL) ++ { ++ return _FAIL; ++ } ++ } ++ psta->state |= WIFI_AP_STATE; //Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 ++ rtw_indicate_connect( padapter); ++ ++ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon ++ ++ //update bc/mc sta_info ++ //update_bmc_sta(padapter); ++ ++ return ret; ++ ++} ++ ++void rtw_set_macaddr_acl(_adapter *padapter, int mode) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ DBG_871X("%s, mode=%d\n", __func__, mode); ++ ++ pacl_list->mode = mode; ++} ++ ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 added = _FALSE; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ if((NUM_ACL-1) < pacl_list->num) ++ return (-1); ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ added = _TRUE; ++ DBG_871X("%s, sta has been added\n", __func__); ++ break; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ ++ if(added == _TRUE) ++ return ret; ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ for(i=0; i< NUM_ACL; i++) ++ { ++ paclnode = &pacl_list->aclnode[i]; ++ ++ if(paclnode->valid == _FALSE) ++ { ++ _rtw_init_listhead(&paclnode->list); ++ ++ _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); ++ ++ paclnode->valid = _TRUE; ++ ++ rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); ++ ++ pacl_list->num++; ++ ++ break; ++ } ++ } ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ return ret; ++} ++ ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++static void update_bcn_fixed_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_erpinfo_ie(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); ++ ++ if(!pmlmeinfo->ERP_enable) ++ return; ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(p && len>0) ++ { ++ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); ++ ++ if(pmlmepriv->num_sta_no_short_preamble > 0) ++ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); ++ ++ ERP_IE_handler(padapter, pIE); ++ } ++ ++} ++ ++static void update_bcn_htcap_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_htinfo_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_rsn_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wpa_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wmm_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wps_ie(_adapter *padapter) ++{ ++ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; ++ uint wps_ielen=0, wps_offset, remainder_ielen; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *ie = pnetwork->IEs; ++ u32 ielen = pnetwork->IELength; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ if(pwps_ie==NULL || wps_ielen==0) ++ return; ++ ++ wps_offset = (uint)(pwps_ie-ie); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = ielen - wps_offset - wps_ielen; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ ++ pwps_ie_src = pmlmepriv->wps_beacon_ie; ++ if(pwps_ie_src == NULL) ++ return; ++ ++ ++ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); ++ pwps_ie += (wps_ielen+2); ++ ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ //update IELength ++ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; ++ } ++ ++ if(pbackup_remainder_ie) ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ ++} ++ ++static void update_bcn_p2p_ie(_adapter *padapter) ++{ ++ ++} ++ ++static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) ++ { ++ update_bcn_wpa_ie(padapter); ++ } ++ else if(_rtw_memcmp(WMM_OUI, oui, 4)) ++ { ++ update_bcn_wmm_ie(padapter); ++ } ++ else if(_rtw_memcmp(WPS_OUI, oui, 4)) ++ { ++ update_bcn_wps_ie(padapter); ++ } ++ else if(_rtw_memcmp(P2P_OUI, oui, 4)) ++ { ++ update_bcn_p2p_ie(padapter); ++ } ++ else ++ { ++ DBG_871X("unknown OUI type!\n"); ++ } ++ ++ ++} ++ ++void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv; ++ struct mlme_ext_priv *pmlmeext; ++ //struct mlme_ext_info *pmlmeinfo; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(!padapter) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ pmlmeext = &(padapter->mlmeextpriv); ++ //pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(_FALSE == pmlmeext->bstart_bss) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ switch(ie_id) ++ { ++ case 0xFF: ++ ++ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability ++ ++ break; ++ ++ case _TIM_IE_: ++ ++ update_BCNTIM(padapter); ++ ++ break; ++ ++ case _ERPINFO_IE_: ++ ++ update_bcn_erpinfo_ie(padapter); ++ ++ break; ++ ++ case _HT_CAPABILITY_IE_: ++ ++ update_bcn_htcap_ie(padapter); ++ ++ break; ++ ++ case _RSN_IE_2_: ++ ++ update_bcn_rsn_ie(padapter); ++ ++ break; ++ ++ case _HT_ADD_INFO_IE_: ++ ++ update_bcn_htinfo_ie(padapter); ++ ++ break; ++ ++ case _VENDOR_SPECIFIC_IE_: ++ ++ update_bcn_vendor_spec_ie(padapter, oui); ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++ pmlmepriv->update_bcn = _TRUE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ if(tx) ++ { ++ //send_beacon(padapter);//send_beacon must execute on TSR level ++ set_tx_beacon_cmd(padapter); ++ } ++#else ++ { ++ //PCI will issue beacon when BCN interrupt occurs. ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++} ++ ++#ifdef CONFIG_80211N_HT ++ ++/* ++op_mode ++Set to 0 (HT pure) under the followign conditions ++ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or ++ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS ++Set to 1 (HT non-member protection) if there may be non-HT STAs ++ in both the primary and the secondary channel ++Set to 2 if only HT STAs are associated in BSS, ++ however and at least one 20 MHz HT STA is associated ++Set to 3 (HT mixed mode) when one or more non-HT STAs are associated ++ (currently non-GF HT station is considered as non-HT STA also) ++*/ ++static int rtw_ht_operation_update(_adapter *padapter) ++{ ++ u16 cur_op_mode, new_op_mode; ++ int op_mode_changes = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ ++ if(pmlmepriv->htpriv.ht_option == _TRUE) ++ return 0; ++ ++ //if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) ++ // return 0; ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) ++ && pmlmepriv->num_sta_ht_no_gf) { ++ pmlmepriv->ht_op_mode |= ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && ++ pmlmepriv->num_sta_ht_no_gf == 0) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } ++ ++ /* Note: currently we switch to the MIXED op mode if HT non-greenfield ++ * station is associated. Probably it's a theoretical case, since ++ * it looks like all known HT STAs support greenfield. ++ */ ++ new_op_mode = 0; ++ if (pmlmepriv->num_sta_no_ht || ++ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)) ++ new_op_mode = OP_MODE_MIXED; ++ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ++ && pmlmepriv->num_sta_ht_20mhz) ++ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; ++ else if (pmlmepriv->olbc_ht) ++ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; ++ else ++ new_op_mode = OP_MODE_PURE; ++ ++ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ if (cur_op_mode != new_op_mode) { ++ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ pmlmepriv->ht_op_mode |= new_op_mode; ++ op_mode_changes++; ++ } ++ ++ DBG_871X("%s new operation mode=0x%X changes=%d\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); ++ ++ return op_mode_changes; ++ ++} ++ ++#endif /* CONFIG_80211N_HT */ ++ ++void associated_clients_update(_adapter *padapter, u8 updated) ++{ ++ //update associcated stations cap. ++ if(updated == _TRUE) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ VCS_update(padapter, psta); ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && ++ !psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 1; ++ pmlmepriv->num_sta_no_short_preamble++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ ++ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) ++ { ++ if(!psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 1; ++ ++ pmlmepriv->num_sta_no_short_preamble++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ ++#if 0 ++ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { ++ psta->nonerp_set = 1; ++ pmlmepriv->num_sta_non_erp++; ++ if (pmlmepriv->num_sta_non_erp == 1) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(psta->flags & WLAN_STA_NONERP) ++ { ++ if(!psta->nonerp_set) ++ { ++ psta->nonerp_set = 1; ++ ++ pmlmepriv->num_sta_non_erp++; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ else ++ { ++ if(psta->nonerp_set) ++ { ++ psta->nonerp_set = 0; ++ ++ pmlmepriv->num_sta_non_erp--; ++ ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && ++ !psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 1; ++ pmlmepriv->num_sta_no_short_slot_time++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) ++ { ++ if(!psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 1; ++ ++ pmlmepriv->num_sta_no_short_slot_time++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->flags & WLAN_STA_HT) ++ { ++ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); ++ ++ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " ++ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { ++ if (!psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 1; ++ pmlmepriv->num_sta_ht_no_gf++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - no " ++ "greenfield, num of non-gf stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_no_gf); ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { ++ if (!psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 1; ++ pmlmepriv->num_sta_ht_20mhz++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " ++ "num of 20MHz HT STAs %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_20mhz); ++ } ++ ++ } ++ else ++ { ++ if (!psta->no_ht_set) { ++ psta->no_ht_set = 1; ++ pmlmepriv->num_sta_no_ht++; ++ } ++ if(pmlmepriv->htpriv.ht_option == _TRUE) { ++ DBG_871X("%s STA " MAC_FMT ++ " - no HT, num of non-HT stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_no_ht); ++ } ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ associated_clients_update(padapter, beacon_updated); ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++} ++ ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 0; ++ pmlmepriv->num_sta_no_short_preamble--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_preamble == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->nonerp_set) { ++ psta->nonerp_set = 0; ++ pmlmepriv->num_sta_non_erp--; ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 0; ++ pmlmepriv->num_sta_no_short_slot_time--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_slot_time == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 0; ++ pmlmepriv->num_sta_ht_no_gf--; ++ } ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if (psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 0; ++ pmlmepriv->num_sta_ht_20mhz--; ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ //associated_clients_update(padapter, beacon_updated); //move it to avoid deadlock ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++ return beacon_updated; ++ ++} ++ ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason) ++{ ++ _irqL irqL; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (active == _TRUE) ++ { ++#ifdef CONFIG_80211N_HT ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ ++#endif //CONFIG_80211N_HT ++ ++ issue_deauth(padapter, psta->hwaddr, reason); ++ } ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //report_del_sta_event(padapter, psta->hwaddr, reason); ++ ++ //clear cam entry / key ++ //clear_cam_entry(padapter, (psta->mac_id + 3)); ++ rtw_clearstakey_cmd(padapter, (u8*)psta, (u8)(psta->mac_id + 3), _TRUE); ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state &= ~_FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if (1) { ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } else ++ #endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_disassoc_event(padapter, psta); ++ } ++ ++ report_del_sta_event(padapter, psta->hwaddr, reason); ++ ++ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ return beacon_updated; ++ ++} ++ ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ /* for each sta in asoc_queue */ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); ++ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); ++ ++ return ret; ++} ++ ++int rtw_sta_flush(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ /* Remove sta from asoc_list */ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ /* Keep sta for ap_free_sta() beyond this asoc_list loop */ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ ++ /* For each sta in chk_alive_list, call ap_free_sta */ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ ++ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ associated_clients_update(padapter, _TRUE); ++ ++ return ret; ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void sta_info_update(_adapter *padapter, struct sta_info *psta) ++{ ++ int flags = psta->flags; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //update wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //update 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++} ++ ++/* called >= TSR LEVEL for USB or SDIO Interface*/ ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) ++{ ++ if(psta->state & _FW_LINKED) ++ { ++ //add ratid ++ add_RATid(padapter, psta); ++ } ++} ++ ++/* restore hw setting from sw data structures */ ++void rtw_ap_restore_network(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11APMode); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ start_bss_network(padapter, (u8*)&mlmepriv->cur_network.network); ++ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ /* restore group key, WEP keys is restored in ips_leave() */ ++ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0); ++ } ++ ++ /* per sta pairwise key and settings */ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_) && ++ (padapter->securitypriv.dot11PrivacyAlgrthm != _AES_)) { ++ return; ++ } ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ++ if (psta == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); ++ } else if (psta->state &_FW_LINKED) { ++ Update_RA_Entry(padapter, psta->mac_id); ++ //pairwise key ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ } ++ ++} ++ ++void start_ap_mode(_adapter *padapter) ++{ ++ int i; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ //init_mlme_ap_info(padapter); ++ pmlmeext->bstart_bss = _FALSE; ++ ++ pmlmepriv->num_sta_non_erp = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble = 0; ++ ++ pmlmepriv->num_sta_ht_no_gf = 0; ++ ++ pmlmepriv->num_sta_no_ht = 0; ++ ++ pmlmepriv->num_sta_ht_20mhz = 0; ++ ++ pmlmepriv->olbc = _FALSE; ++ ++ pmlmepriv->olbc_ht = _FALSE; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->ht_op_mode = 0; ++#endif ++ ++ for(i=0; ista_aid[i] = NULL; ++ ++ pmlmepriv->wps_beacon_ie = NULL; ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ ++ pmlmepriv->p2p_beacon_ie = NULL; ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ ++ ++ //for ACL ++ _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); ++ pacl_list->num = 0; ++ pacl_list->mode = 0; ++ for(i = 0; i < NUM_ACL; i++) ++ { ++ _rtw_init_listhead(&pacl_list->aclnode[i].list); ++ pacl_list->aclnode[i].valid = _FALSE; ++ } ++ ++} ++ ++void stop_ap_mode(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++ //reset and init security priv , this can refine with rtw_reset_securitypriv ++ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ //for ACL ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); ++ ++ rtw_sta_flush(padapter); ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++} ++ ++#endif //CONFIG_NATIVEAP_MLME ++#endif //CONFIG_AP_MODE ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_br_ext.c +@@ -0,0 +1,1700 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_BR_EXT_C_ ++ ++#ifdef __KERNEL__ ++#include ++#include ++#include ++#include ++#include ++#include ++#endif ++ ++#if 1 // rtw_wifi_driver ++#include ++#include ++#include "rtw_br_ext.h" ++#else // rtw_wifi_driver ++#include "./8192cd_cfg.h" ++ ++#ifndef __KERNEL__ ++#include "./sys-support.h" ++#endif ++ ++#include "./8192cd.h" ++#include "./8192cd_headers.h" ++#include "./8192cd_br_ext.h" ++#include "./8192cd_debug.h" ++#endif // rtw_wifi_driver ++ ++#ifdef CL_IPV6_PASS ++#ifdef __KERNEL__ ++#include ++#include ++#include ++#include ++#include ++#endif ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ ++//#define BR_EXT_DEBUG ++ ++#define NAT25_IPV4 01 ++#define NAT25_IPV6 02 ++#define NAT25_IPX 03 ++#define NAT25_APPLE 04 ++#define NAT25_PPPOE 05 ++ ++#define RTL_RELAY_TAG_LEN (ETH_ALEN) ++#define TAG_HDR_LEN 4 ++ ++#define MAGIC_CODE 0x8186 ++#define MAGIC_CODE_LEN 2 ++#define WAIT_TIME_PPPOE 5 // waiting time for pppoe server in sec ++ ++/*----------------------------------------------------------------- ++ How database records network address: ++ 0 1 2 3 4 5 6 7 8 9 10 ++ |----|----|----|----|----|----|----|----|----|----|----| ++ IPv4 |type| | IP addr | ++ IPX |type| Net addr | Node addr | ++ IPX |type| Net addr |Sckt addr| ++ Apple |type| Network |node| ++ PPPoE |type| SID | AC MAC | ++-----------------------------------------------------------------*/ ++ ++ ++//Find a tag in pppoe frame and return the pointer ++static __inline__ unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type) ++{ ++ unsigned char *cur_ptr, *start_ptr; ++ unsigned short tagLen, tagType; ++ ++ start_ptr = cur_ptr = (unsigned char *)ph->tag; ++ while((cur_ptr - start_ptr) < ntohs(ph->length)) { ++ // prevent un-alignment access ++ tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]); ++ tagLen = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]); ++ if(tagType == type) ++ return cur_ptr; ++ cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen; ++ } ++ return 0; ++} ++ ++ ++static __inline__ int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag) ++{ ++ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); ++ int data_len; ++ ++ data_len = tag->tag_len + TAG_HDR_LEN; ++ if (skb_tailroom(skb) < data_len) { ++ _DEBUG_ERR("skb_tailroom() failed in add SID tag!\n"); ++ return -1; ++ } ++ ++ skb_put(skb, data_len); ++ // have a room for new tag ++ memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length)); ++ ph->length = htons(ntohs(ph->length) + data_len); ++ memcpy((unsigned char *)ph->tag, tag, data_len); ++ return data_len; ++} ++ ++static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len) ++{ ++ int tail_len; ++ unsigned long end, tail; ++ ++ if ((src+len) > skb_tail_pointer(skb) || skb->len < len) ++ return -1; ++ ++ tail = (unsigned long)skb_tail_pointer(skb); ++ end = (unsigned long)src+len; ++ if (tail < end) ++ return -1; ++ ++ tail_len = (int)(tail-end); ++ if (tail_len > 0) ++ memmove(src, src+len, tail_len); ++ ++ skb_trim(skb, skb->len-len); ++ return 0; ++} ++ ++static __inline__ unsigned long __nat25_timeout(_adapter *priv) ++{ ++ unsigned long timeout; ++ ++ timeout = jiffies - NAT25_AGEING_TIME*HZ; ++ ++ return timeout; ++} ++ ++ ++static __inline__ int __nat25_has_expired(_adapter *priv, ++ struct nat25_network_db_entry *fdb) ++{ ++ if(time_before_eq(fdb->ageing_timer, __nat25_timeout(priv))) ++ return 1; ++ ++ return 0; ++} ++ ++ ++static __inline__ void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr, ++ unsigned int *ipAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPV4; ++ memcpy(networkAddr+7, (unsigned char *)ipAddr, 4); ++} ++ ++ ++static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, ++ unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPX; ++ memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); ++ memcpy(networkAddr+5, ipxNodeAddr, 6); ++} ++ ++ ++static __inline__ void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr, ++ unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPX; ++ memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); ++ memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2); ++} ++ ++ ++static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, ++ unsigned short *network, unsigned char *node) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_APPLE; ++ memcpy(networkAddr+1, (unsigned char *)network, 2); ++ networkAddr[3] = *node; ++} ++ ++ ++static __inline__ void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr, ++ unsigned char *ac_mac, unsigned short *sid) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_PPPOE; ++ memcpy(networkAddr+1, (unsigned char *)sid, 2); ++ memcpy(networkAddr+3, (unsigned char *)ac_mac, 6); ++} ++ ++ ++#ifdef CL_IPV6_PASS ++static void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr, ++ unsigned int *ipAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPV6; ++ memcpy(networkAddr+1, (unsigned char *)ipAddr, 16); ++} ++ ++ ++static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b) ++{ ++ while (len > 0) { ++ if (*data == tag && *(data+1) == len8b && len >= len8b*8) ++ return data+2; ++ ++ len -= (*(data+1))*8; ++ data += (*(data+1))*8; ++ } ++ return NULL; ++} ++ ++ ++static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac) ++{ ++ struct icmp6hdr *icmphdr = (struct icmp6hdr *)data; ++ unsigned char *mac; ++ ++ if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) { ++ if (len >= 8) { ++ mac = scan_tlv(&data[8], len-8, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) { ++ if (len >= 16) { ++ mac = scan_tlv(&data[16], len-16, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) { ++ if (len >= 24) { ++ mac = scan_tlv(&data[24], len-24, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) { ++ if (len >= 24) { ++ mac = scan_tlv(&data[24], len-24, 2, 1); ++ if (mac) { ++ _DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_REDIRECT) { ++ if (len >= 40) { ++ mac = scan_tlv(&data[40], len-40, 2, 1); ++ if (mac) { ++ _DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ return 0; ++} ++ ++ ++static void convert_ipv6_mac_to_mc(struct sk_buff *skb) ++{ ++ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); ++ unsigned char *dst_mac = skb->data; ++ ++ //dst_mac[0] = 0xff; ++ //dst_mac[1] = 0xff; ++ /*modified by qinjunjie,ipv6 multicast address ix 0x33-33-xx-xx-xx-xx*/ ++ dst_mac[0] = 0x33; ++ dst_mac[1] = 0x33; ++ memcpy(&dst_mac[2], &iph->daddr.s6_addr32[3], 4); ++ #if defined(__LINUX_2_6__) ++ /*modified by qinjunjie,warning:should not remove next line*/ ++ skb->pkt_type = PACKET_MULTICAST; ++ #endif ++} ++#endif /* CL_IPV6_PASS */ ++ ++ ++static __inline__ int __nat25_network_hash(unsigned char *networkAddr) ++{ ++ if(networkAddr[0] == NAT25_IPV4) ++ { ++ unsigned long x; ++ ++ x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_IPX) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ ++ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_APPLE) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_PPPOE) ++ { ++ unsigned long x; ++ ++ x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++#ifdef CL_IPV6_PASS ++ else if(networkAddr[0] == NAT25_IPV6) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ ++ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^ ++ networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^ ++ networkAddr[16]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++#endif ++ else ++ { ++ unsigned long x = 0; ++ int i; ++ ++ for (i=0; ibr_ext_lock, &irqL); ++ ++ ent->next_hash = priv->nethash[hash]; ++ if(ent->next_hash != NULL) ++ ent->next_hash->pprev_hash = &ent->next_hash; ++ priv->nethash[hash] = ent; ++ ent->pprev_hash = &priv->nethash[hash]; ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static __inline__ void __network_hash_unlink(struct nat25_network_db_entry *ent) ++{ ++ // Caller must _enter_critical_bh already! ++ //_irqL irqL; ++ //_enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ *(ent->pprev_hash) = ent->next_hash; ++ if(ent->next_hash != NULL) ++ ent->next_hash->pprev_hash = ent->pprev_hash; ++ ent->next_hash = NULL; ++ ent->pprev_hash = NULL; ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static int __nat25_db_network_lookup_and_replace(_adapter *priv, ++ struct sk_buff *skb, unsigned char *networkAddr) ++{ ++ struct nat25_network_db_entry *db; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ db = priv->nethash[__nat25_network_hash(networkAddr)]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) ++ { ++ if(!__nat25_has_expired(priv, db)) ++ { ++ // replace the destination mac address ++ memcpy(skb->data, db->macAddr, ETH_ALEN); ++ atomic_inc(&db->use_count); ++ ++#ifdef CL_IPV6_PASS ++ DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10], ++ db->networkAddr[11], ++ db->networkAddr[12], ++ db->networkAddr[13], ++ db->networkAddr[14], ++ db->networkAddr[15], ++ db->networkAddr[16]); ++#else ++ DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10]); ++#endif ++ } ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return 1; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return 0; ++} ++ ++ ++static void __nat25_db_network_insert(_adapter *priv, ++ unsigned char *macAddr, unsigned char *networkAddr) ++{ ++ struct nat25_network_db_entry *db; ++ int hash; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ hash = __nat25_network_hash(networkAddr); ++ db = priv->nethash[hash]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) ++ { ++ memcpy(db->macAddr, macAddr, ETH_ALEN); ++ db->ageing_timer = jiffies; ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db)); ++ if(db == NULL) { ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return; ++ } ++ ++ memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN); ++ memcpy(db->macAddr, macAddr, ETH_ALEN); ++ atomic_set(&db->use_count, 1); ++ db->ageing_timer = jiffies; ++ ++ __network_hash_link(priv, db, hash); ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static void __nat25_db_print(_adapter *priv) ++{ ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++#ifdef BR_EXT_DEBUG ++ static int counter = 0; ++ int i, j; ++ struct nat25_network_db_entry *db; ++ ++ counter++; ++ if((counter % 16) != 0) ++ return; ++ ++ for(i=0, j=0; inethash[i]; ++ ++ while (db != NULL) ++ { ++#ifdef CL_IPV6_PASS ++ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ j, ++ i, ++ atomic_read(&db->use_count), ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10], ++ db->networkAddr[11], ++ db->networkAddr[12], ++ db->networkAddr[13], ++ db->networkAddr[14], ++ db->networkAddr[15], ++ db->networkAddr[16]); ++#else ++ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ j, ++ i, ++ atomic_read(&db->use_count), ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10]); ++#endif ++ j++; ++ ++ db = db->next_hash; ++ } ++ } ++#endif ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++ ++ ++/* ++ * NAT2.5 interface ++ */ ++ ++void nat25_db_cleanup(_adapter *priv) ++{ ++ int i; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ for(i=0; inethash[i]; ++ while (f != NULL) { ++ struct nat25_network_db_entry *g; ++ ++ g = f->next_hash; ++ if(priv->scdb_entry == f) ++ { ++ memset(priv->scdb_mac, 0, ETH_ALEN); ++ memset(priv->scdb_ip, 0, 4); ++ priv->scdb_entry = NULL; ++ } ++ __network_hash_unlink(f); ++ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ ++ f = g; ++ } ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++void nat25_db_expire(_adapter *priv) ++{ ++ int i; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ //if(!priv->ethBrExtInfo.nat25_disable) ++ { ++ for (i=0; inethash[i]; ++ ++ while (f != NULL) ++ { ++ struct nat25_network_db_entry *g; ++ g = f->next_hash; ++ ++ if(__nat25_has_expired(priv, f)) ++ { ++ if(atomic_dec_and_test(&f->use_count)) ++ { ++#ifdef BR_EXT_DEBUG ++#ifdef CL_IPV6_PASS ++ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ i, ++ f->macAddr[0], ++ f->macAddr[1], ++ f->macAddr[2], ++ f->macAddr[3], ++ f->macAddr[4], ++ f->macAddr[5], ++ f->networkAddr[0], ++ f->networkAddr[1], ++ f->networkAddr[2], ++ f->networkAddr[3], ++ f->networkAddr[4], ++ f->networkAddr[5], ++ f->networkAddr[6], ++ f->networkAddr[7], ++ f->networkAddr[8], ++ f->networkAddr[9], ++ f->networkAddr[10], ++ f->networkAddr[11], ++ f->networkAddr[12], ++ f->networkAddr[13], ++ f->networkAddr[14], ++ f->networkAddr[15], ++ f->networkAddr[16]); ++#else ++ ++ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ i, ++ f->macAddr[0], ++ f->macAddr[1], ++ f->macAddr[2], ++ f->macAddr[3], ++ f->macAddr[4], ++ f->macAddr[5], ++ f->networkAddr[0], ++ f->networkAddr[1], ++ f->networkAddr[2], ++ f->networkAddr[3], ++ f->networkAddr[4], ++ f->networkAddr[5], ++ f->networkAddr[6], ++ f->networkAddr[7], ++ f->networkAddr[8], ++ f->networkAddr[9], ++ f->networkAddr[10]); ++#endif ++#endif ++ if(priv->scdb_entry == f) ++ { ++ memset(priv->scdb_mac, 0, ETH_ALEN); ++ memset(priv->scdb_ip, 0, 4); ++ priv->scdb_entry = NULL; ++ } ++ __network_hash_unlink(f); ++ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ } ++ } ++ ++ f = g; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++#ifdef SUPPORT_TX_MCAST2UNI ++static int checkIPMcAndReplace(_adapter *priv, struct sk_buff *skb, unsigned int *dst_ip) ++{ ++ struct stat_info *pstat; ++ struct list_head *phead, *plist; ++ int i; ++ ++ phead = &priv->asoc_list; ++ plist = phead->next; ++ ++ while (plist != phead) { ++ pstat = list_entry(plist, struct stat_info, asoc_list); ++ plist = plist->next; ++ ++ if (pstat->ipmc_num == 0) ++ continue; ++ ++ for (i=0; iipmc[i].used && !memcmp(&pstat->ipmc[i].mcmac[3], ((unsigned char *)dst_ip)+1, 3)) { ++ memcpy(skb->data, pstat->ipmc[i].mcmac, ETH_ALEN); ++ return 1; ++ } ++ } ++ } ++ return 0; ++} ++#endif ++ ++int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method) ++{ ++ unsigned short protocol; ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++ ++ if(skb == NULL) ++ return -1; ++ ++ if((method <= NAT25_MIN) || (method >= NAT25_MAX)) ++ return -1; ++ ++ protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); ++ ++ /*---------------------------------------------------*/ ++ /* Handle IP frame */ ++ /*---------------------------------------------------*/ ++ if(protocol == __constant_htons(ETH_P_IP)) ++ { ++ struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); ++ ++ if(((unsigned char*)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) ++ { ++ DEBUG_WARN("NAT25: malformed IP packet !\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ //some muticast with source IP is all zero, maybe other case is illegal ++ //in class A, B, C, host address is all zero or all one is illegal ++ if (iph->saddr == 0) ++ return 0; ++ DEBUG_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); ++ __nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr); ++ //record source IP address and , source mac address into db ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); ++#ifdef SUPPORT_TX_MCAST2UNI ++ if (priv->pshare->rf_ft_var.mc2u_disable || ++ ((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ++ == (WIFI_STATION_STATE|WIFI_ASOC_STATE)) && ++ !checkIPMcAndReplace(priv, skb, &iph->daddr)) || ++ (OPMODE & WIFI_ADHOC_STATE))) ++#endif ++ { ++ __nat25_generate_ipv4_network_addr(networkAddr, &iph->daddr); ++ ++ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { ++ if (*((unsigned char *)&iph->daddr + 3) == 0xff) { ++ // L2 is unicast but L3 is broadcast, make L2 bacome broadcast ++ DEBUG_INFO("NAT25: Set DA as boardcast\n"); ++ memset(skb->data, 0xff, ETH_ALEN); ++ } ++ else { ++ // forward unknow IP packet to upper TCP/IP ++ DEBUG_INFO("NAT25: Replace DA with BR's MAC\n"); ++ if ( (*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0 ) { ++ void netdev_br_init(struct net_device *netdev); ++ printk("Re-init netdev_br_init() due to br_mac==0!\n"); ++ netdev_br_init(priv->pnetdev); ++ } ++ memcpy(skb->data, priv->br_mac, ETH_ALEN); ++ } ++ } ++ } ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle ARP frame */ ++ /*---------------------------------------------------*/ ++ else if(protocol == __constant_htons(ETH_P_ARP)) ++ { ++ struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN); ++ unsigned char *arp_ptr = (unsigned char *)(arp + 1); ++ unsigned int *sender, *target; ++ ++ if(arp->ar_pro != __constant_htons(ETH_P_IP)) ++ { ++ DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", htons(arp->ar_pro)); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return 0; // skb_copy for all ARP frame ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0], ++ arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]); ++ ++ // change to ARP sender mac address to wlan STA address ++ memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN); ++ ++ arp_ptr += arp->ar_hln; ++ sender = (unsigned int *)arp_ptr; ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, sender); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup ARP\n"); ++ ++ arp_ptr += arp->ar_hln; ++ sender = (unsigned int *)arp_ptr; ++ arp_ptr += (arp->ar_hln + arp->ar_pln); ++ target = (unsigned int *)arp_ptr; ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, target); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // change to ARP target mac address to Lookup result ++ arp_ptr = (unsigned char *)(arp + 1); ++ arp_ptr += (arp->ar_hln + arp->ar_pln); ++ memcpy(arp_ptr, skb->data, ETH_ALEN); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle IPX and Apple Talk frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(ETH_P_IPX)) || ++ (protocol <= __constant_htons(ETH_FRAME_LEN))) ++ { ++ unsigned char ipx_header[2] = {0xFF, 0xFF}; ++ struct ipxhdr *ipx = NULL; ++ struct elapaarp *ea = NULL; ++ struct ddpehdr *ddp = NULL; ++ unsigned char *framePtr = skb->data + ETH_HLEN; ++ ++ if(protocol == __constant_htons(ETH_P_IPX)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet II)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else if(protocol <= __constant_htons(ETH_FRAME_LEN)) ++ { ++ if(!memcmp(ipx_header, framePtr, 2)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else ++ { ++ unsigned char ipx_8022_type = 0xE0; ++ unsigned char snap_8022_type = 0xAA; ++ ++ if(*framePtr == snap_8022_type) ++ { ++ unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; // IPX SNAP ID ++ unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; // Apple Talk AARP SNAP ID ++ unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; // Apple Talk DDP SNAP ID ++ ++ framePtr += 3; // eliminate the 802.2 header ++ ++ if(!memcmp(ipx_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else if(!memcmp(aarp_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ ea = (struct elapaarp *)framePtr; ++ } ++ else if(!memcmp(ddp_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ ddp = (struct ddpehdr *)framePtr; ++ } ++ else ++ { ++ DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0], ++ framePtr[1], framePtr[2], framePtr[3], framePtr[4]); ++ return -1; ++ } ++ } ++ else if(*framePtr == ipx_8022_type) ++ { ++ framePtr += 3; // eliminate the 802.2 header ++ ++ if(!memcmp(ipx_header, framePtr, 2)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else ++ return -1; ++ } ++ else ++ return -1; ++ } ++ } ++ else ++ return -1; ++ ++ /* IPX */ ++ if(ipx != NULL) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Check IPX skb_copy\n"); ++ return 0; ++ } ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n", ++ ipx->ipx_dest.net, ++ ipx->ipx_dest.node[0], ++ ipx->ipx_dest.node[1], ++ ipx->ipx_dest.node[2], ++ ipx->ipx_dest.node[3], ++ ipx->ipx_dest.node[4], ++ ipx->ipx_dest.node[5], ++ ipx->ipx_dest.sock, ++ ipx->ipx_source.net, ++ ipx->ipx_source.node[0], ++ ipx->ipx_source.node[1], ++ ipx->ipx_source.node[2], ++ ipx->ipx_source.node[3], ++ ipx->ipx_source.node[4], ++ ipx->ipx_source.node[5], ++ ipx->ipx_source.sock); ++ ++ if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n"); ++ ++ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock); ++ ++ // change IPX source node addr to wlan STA address ++ memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN); ++ } ++ else ++ { ++ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node); ++ } ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n"); ++ ++ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // replace IPX destination node addr with Lookup destination MAC addr ++ memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN); ++ } ++ else ++ { ++ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ } ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /* AARP */ ++ else if(ea != NULL) ++ { ++ /* Sanity check fields. */ ++ if(ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) ++ { ++ DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return 0; ++ ++ case NAT25_INSERT: ++ { ++ // change to AARP source mac address to wlan STA address ++ memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN); ++ ++ DEBUG_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n", ++ ea->pa_src_net, ++ ea->pa_src_node, ++ ea->pa_dst_net, ++ ea->pa_dst_node); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n", ++ ea->pa_src_net, ++ ea->pa_src_node, ++ ea->pa_dst_net, ++ ea->pa_dst_node); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // change to AARP destination mac address to Lookup result ++ memcpy(ea->hw_dst, skb->data, ETH_ALEN); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /* DDP */ ++ else if(ddp != NULL) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n", ++ ddp->deh_snet, ++ ddp->deh_snode, ++ ddp->deh_dnet, ++ ddp->deh_dnode); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n", ++ ddp->deh_snet, ++ ddp->deh_snode, ++ ddp->deh_dnet, ++ ddp->deh_dnode); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ return -1; ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle PPPoE frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(ETH_P_PPP_DISC)) || ++ (protocol == __constant_htons(ETH_P_PPP_SES))) ++ { ++ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); ++ unsigned short *pMagic; ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if (ph->sid == 0) ++ return 0; ++ return 1; ++ ++ case NAT25_INSERT: ++ if(ph->sid == 0) // Discovery phase according to tag ++ { ++ if(ph->code == PADI_CODE || ph->code == PADR_CODE) ++ { ++ if (priv->ethBrExtInfo.addPPPoETag) { ++ struct pppoe_tag *tag, *pOldTag; ++ unsigned char tag_buf[40]; ++ int old_tag_len=0; ++ ++ tag = (struct pppoe_tag *)tag_buf; ++ pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID)); ++ if (pOldTag) { // if SID existed, copy old value and delete it ++ old_tag_len = ntohs(pOldTag->tag_len); ++ if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) { ++ DEBUG_ERR("SID tag length too long!\n"); ++ return -1; ++ } ++ ++ memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN, ++ pOldTag->tag_data, old_tag_len); ++ ++ if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) { ++ DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n"); ++ return -1; ++ } ++ ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len); ++ } ++ ++ tag->tag_type = PTT_RELAY_SID; ++ tag->tag_len = htons(MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN+old_tag_len); ++ ++ // insert the magic_code+client mac in relay tag ++ pMagic = (unsigned short *)tag->tag_data; ++ *pMagic = htons(MAGIC_CODE); ++ memcpy(tag->tag_data+MAGIC_CODE_LEN, skb->data+ETH_ALEN, ETH_ALEN); ++ ++ //Add relay tag ++ if(__nat25_add_pppoe_tag(skb, tag) < 0) ++ return -1; ++ ++ DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n", ++ (ph->code == PADI_CODE ? "PADI" : "PADR")); ++ } ++ else { // not add relay tag ++ if (priv->pppoe_connection_in_progress && ++ memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) { ++ DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n"); ++ return -2; ++ } ++ ++ if (priv->pppoe_connection_in_progress == 0) ++ memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN); ++ ++ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; ++ } ++ } ++ else ++ return -1; ++ } ++ else // session phase ++ { ++ DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name); ++ ++ __nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid)); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ ++ if (!priv->ethBrExtInfo.addPPPoETag && ++ priv->pppoe_connection_in_progress && ++ !memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) ++ priv->pppoe_connection_in_progress = 0; ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ if(ph->code == PADO_CODE || ph->code == PADS_CODE) ++ { ++ if (priv->ethBrExtInfo.addPPPoETag) { ++ struct pppoe_tag *tag; ++ unsigned char *ptr; ++ unsigned short tagType, tagLen; ++ int offset=0; ++ ++ if((ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID))) == 0) { ++ DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n"); ++ return -1; ++ } ++ ++ tag = (struct pppoe_tag *)ptr; ++ tagType = (unsigned short)((ptr[0] << 8) + ptr[1]); ++ tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]); ++ ++ if((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) { ++ DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen); ++ return -1; ++ } ++ ++ pMagic = (unsigned short *)tag->tag_data; ++ if (ntohs(*pMagic) != MAGIC_CODE) { ++ DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n", ++ (ph->code == PADO_CODE ? "PADO" : "PADS")); ++ return -1; ++ } ++ ++ memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN); ++ ++ if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN) ++ offset = TAG_HDR_LEN; ++ ++ if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) { ++ DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n"); ++ return -1; ++ } ++ ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset)); ++ if (offset > 0) ++ tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN); ++ ++ DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n", ++ (ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name); ++ } ++ else { // not add relay tag ++ if (!priv->pppoe_connection_in_progress) { ++ DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n"); ++ return -1; ++ } ++ memcpy(skb->data, priv->pppoe_addr, ETH_ALEN); ++ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; ++ } ++ } ++ else { ++ if(ph->sid != 0) ++ { ++ DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name); ++ __nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid)); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ else ++ return -1; ++ ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle EAP frame */ ++ /*---------------------------------------------------*/ ++ else if(protocol == __constant_htons(0x888e)) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ return 0; ++ ++ case NAT25_LOOKUP: ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle C-Media proprietary frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(0xe2ae)) || ++ (protocol == __constant_htons(0xe2af))) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ return 0; ++ ++ case NAT25_LOOKUP: ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle IPV6 frame */ ++ /*---------------------------------------------------*/ ++#ifdef CL_IPV6_PASS ++ else if(protocol == __constant_htons(ETH_P_IPV6)) ++ { ++ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); ++ ++ if (sizeof(*iph) >= (skb->len - ETH_HLEN)) ++ { ++ DEBUG_WARN("NAT25: malformed IPv6 packet !\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if (skb->data[0] & 1) ++ return 0; ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," ++ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", ++ iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], ++ iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], ++ iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], ++ iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); ++ ++ if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) { ++ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr); ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ __nat25_db_print(priv); ++ ++ if (iph->nexthdr == IPPROTO_ICMPV6 && ++ skb->len > (ETH_HLEN + sizeof(*iph) + 4)) { ++ if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph), ++ skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) { ++ struct icmp6hdr *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph)); ++ hdr->icmp6_cksum = 0; ++ hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr, ++ iph->payload_len, ++ IPPROTO_ICMPV6, ++ csum_partial((__u8 *)hdr, iph->payload_len, 0)); ++ } ++ } ++ } ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ DEBUG_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," ++ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", ++ iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], ++ iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], ++ iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], ++ iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); ++ ++ ++ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr); ++ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { ++#ifdef SUPPORT_RX_UNI2MCAST ++ if (iph->daddr.s6_addr[0] == 0xff) ++ convert_ipv6_mac_to_mc(skb); ++#endif ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++#endif // CL_IPV6_PASS ++ ++ return -1; ++} ++ ++ ++int nat25_handle_frame(_adapter *priv, struct sk_buff *skb) ++{ ++#ifdef BR_EXT_DEBUG ++ if((!priv->ethBrExtInfo.nat25_disable) && (!(skb->data[0] & 1))) ++ { ++ panic_printk("NAT25: Input Frame: DA=%02x%02x%02x%02x%02x%02x SA=%02x%02x%02x%02x%02x%02x\n", ++ skb->data[0], ++ skb->data[1], ++ skb->data[2], ++ skb->data[3], ++ skb->data[4], ++ skb->data[5], ++ skb->data[6], ++ skb->data[7], ++ skb->data[8], ++ skb->data[9], ++ skb->data[10], ++ skb->data[11]); ++ } ++#endif ++ ++ if(!(skb->data[0] & 1)) ++ { ++ int is_vlan_tag=0, i, retval=0; ++ unsigned short vlan_hdr=0; ++ ++ if (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ ++ if (!priv->ethBrExtInfo.nat25_disable) ++ { ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ /* ++ * This function look up the destination network address from ++ * the NAT2.5 database. Return value = -1 means that the ++ * corresponding network protocol is NOT support. ++ */ ++ if (!priv->ethBrExtInfo.nat25sc_disable && ++ (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && ++ !memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) { ++ memcpy(skb->data, priv->scdb_mac, ETH_ALEN); ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ } ++ else { ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); ++ } ++ } ++ else { ++ if (((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && ++ !memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) || ++ ((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_ARP)) && ++ !memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) { ++ // for traffic to upper TCP/IP ++ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); ++ } ++ } ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr; ++ } ++ ++ if(retval == -1) { ++ //DEBUG_ERR("NAT25: Lookup fail!\n"); ++ return -1; ++ } ++ } ++ ++ return 0; ++} ++ ++#if 0 ++void mac_clone(_adapter *priv, unsigned char *addr) ++{ ++ struct sockaddr sa; ++ ++ memcpy(sa.sa_data, addr, ETH_ALEN); ++ DEBUG_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n", ++ addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); ++ rtl8192cd_set_hwaddr(priv->dev, &sa); ++} ++ ++ ++int mac_clone_handle_frame(_adapter *priv, struct sk_buff *skb) ++{ ++ if(priv->ethBrExtInfo.macclone_enable && !priv->macclone_completed) ++ { ++ if(!(skb->data[ETH_ALEN] & 1)) //// check any other particular MAC add ++ { ++ if(memcmp(skb->data+ETH_ALEN, GET_MY_HWADDR(priv), ETH_ALEN) && ++ ((priv->dev->br_port) && ++ memcmp(skb->data+ETH_ALEN, priv->br_mac, ETH_ALEN))) ++ { ++ mac_clone(priv, skb->data+ETH_ALEN); ++ priv->macclone_completed = 1; ++ } ++ } ++ } ++ ++ return 0; ++} ++#endif // 0 ++ ++#define SERVER_PORT 67 ++#define CLIENT_PORT 68 ++#define DHCP_MAGIC 0x63825363 ++#define BROADCAST_FLAG 0x8000 ++ ++struct dhcpMessage { ++ u_int8_t op; ++ u_int8_t htype; ++ u_int8_t hlen; ++ u_int8_t hops; ++ u_int32_t xid; ++ u_int16_t secs; ++ u_int16_t flags; ++ u_int32_t ciaddr; ++ u_int32_t yiaddr; ++ u_int32_t siaddr; ++ u_int32_t giaddr; ++ u_int8_t chaddr[16]; ++ u_int8_t sname[64]; ++ u_int8_t file[128]; ++ u_int32_t cookie; ++ u_int8_t options[308]; /* 312 - cookie */ ++}; ++ ++void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb) ++{ ++ if(skb == NULL) ++ return; ++ ++ if(!priv->ethBrExtInfo.dhcp_bcst_disable) ++ { ++ unsigned short protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); ++ ++ if(protocol == __constant_htons(ETH_P_IP)) // IP ++ { ++ struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); ++ ++ if(iph->protocol == IPPROTO_UDP) // UDP ++ { ++ struct udphdr *udph = (struct udphdr *)((SIZE_PTR)iph + (iph->ihl << 2)); ++ ++ if((udph->source == __constant_htons(CLIENT_PORT)) ++ && (udph->dest == __constant_htons(SERVER_PORT))) // DHCP request ++ { ++ struct dhcpMessage *dhcph = ++ (struct dhcpMessage *)((SIZE_PTR)udph + sizeof(struct udphdr)); ++ ++ if(dhcph->cookie == __constant_htonl(DHCP_MAGIC)) // match magic word ++ { ++ if(!(dhcph->flags & htons(BROADCAST_FLAG))) // if not broadcast ++ { ++ register int sum = 0; ++ ++ DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n"); ++ // or BROADCAST flag ++ dhcph->flags |= htons(BROADCAST_FLAG); ++ // recalculate checksum ++ sum = ~(udph->check) & 0xffff; ++ sum += dhcph->flags; ++ while(sum >> 16) ++ sum = (sum & 0xffff) + (sum >> 16); ++ udph->check = ~sum; ++ } ++ } ++ } ++ } ++ } ++ } ++} ++ ++ ++void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, ++ unsigned char *ipAddr) ++{ ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++ struct nat25_network_db_entry *db; ++ int hash; ++ //_irqL irqL; ++ //_enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr); ++ hash = __nat25_network_hash(networkAddr); ++ db = priv->nethash[hash]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return (void *)db; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return NULL; ++} ++ ++#endif // CONFIG_BR_EXT +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_cmd.c +@@ -0,0 +1,3035 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_CMD_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_BR_EXT ++#include ++#endif //CONFIG_BR_EXT ++/* ++Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. ++No irqsave is necessary. ++*/ ++ ++sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0); ++ //_rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0); ++ _rtw_init_sema(&(pcmdpriv->terminate_cmdthread_sema), 0); ++ ++ ++ _rtw_init_queue(&(pcmdpriv->cmd_queue)); ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ++ pcmdpriv->cmd_seq = 1; ++ ++ pcmdpriv->cmd_allocated_buf = rtw_zmalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ); ++ ++ if (pcmdpriv->cmd_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1)); ++ ++ pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4); ++ ++ if (pcmdpriv->rsp_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); ++ ++ pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++#ifdef CONFIG_C2H_WK ++static void c2h_wk_callback(_workitem *work); ++#endif ++sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) ++{ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++#ifdef CONFIG_H2CLBK ++ _rtw_init_sema(&(pevtpriv->lbkevt_done), 0); ++ pevtpriv->lbkevt_limit = 0; ++ pevtpriv->lbkevt_num = 0; ++ pevtpriv->cmdevt_parm = NULL; ++#endif ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ATOMIC_SET(&pevtpriv->event_seq, 0); ++ pevtpriv->evt_done_cnt = 0; ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ ++ _rtw_init_sema(&(pevtpriv->evt_notify), 0); ++ _rtw_init_sema(&(pevtpriv->terminate_evtthread_sema), 0); ++ ++ pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4); ++ if (pevtpriv->evt_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); ++ ++ ++#ifdef CONFIG_SDIO_HCI ++ pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ +4); ++ ++ if (pevtpriv->allocated_c2h_mem == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ ++ - ( (u32)(pevtpriv->allocated_c2h_mem) & 3); ++#ifdef PLATFORM_OS_XP ++ pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); ++ ++ if(pevtpriv->pc2h_mdl == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl); ++#endif ++#endif //end of CONFIG_SDIO_HCI ++ ++ _rtw_init_queue(&(pevtpriv->evt_queue)); ++ ++exit: ++ ++#endif //end of CONFIG_EVENT_THREAD_MODE ++ ++#ifdef CONFIG_C2H_WK ++ _init_workitem(&pevtpriv->c2h_wk, c2h_wk_callback, NULL); ++ pevtpriv->c2h_wk_alive = _FALSE; ++ pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN+1); ++#endif ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void _rtw_free_evt_priv (struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("+_rtw_free_evt_priv \n")); ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _rtw_free_sema(&(pevtpriv->evt_notify)); ++ _rtw_free_sema(&(pevtpriv->terminate_evtthread_sema)); ++ ++ ++ if (pevtpriv->evt_allocated_buf) ++ rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4); ++#endif ++ ++#ifdef CONFIG_C2H_WK ++ _cancel_workitem_sync(&pevtpriv->c2h_wk); ++ while(pevtpriv->c2h_wk_alive) ++ rtw_msleep_os(10); ++ ++ while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) { ++ void *c2h; ++ if ((c2h = rtw_cbuf_pop(pevtpriv->c2h_queue)) != NULL ++ && c2h != (void *)pevtpriv) { ++ rtw_mfree(c2h, 16); ++ } ++ } ++ rtw_cbuf_free(pevtpriv->c2h_queue); ++#endif ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("-_rtw_free_evt_priv \n")); ++ ++_func_exit_; ++ ++} ++ ++void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ ++ if(pcmdpriv){ ++ _rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock)); ++ _rtw_free_sema(&(pcmdpriv->cmd_queue_sema)); ++ //_rtw_free_sema(&(pcmdpriv->cmd_done_sema)); ++ _rtw_free_sema(&(pcmdpriv->terminate_cmdthread_sema)); ++ ++ if (pcmdpriv->cmd_allocated_buf) ++ rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ); ++ ++ if (pcmdpriv->rsp_allocated_buf) ++ rtw_mfree(pcmdpriv->rsp_allocated_buf, MAX_RSPSZ + 4); ++ } ++_func_exit_; ++} ++ ++/* ++Calling Context: ++ ++rtw_enqueue_cmd can only be called between kernel thread, ++since only spin_lock is used. ++ ++ISR/Call-Back functions can't call this sub-function. ++ ++*/ ++ ++sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj) ++{ ++ _irqL irqL; ++ ++_func_enter_; ++ ++ if (obj == NULL) ++ goto exit; ++ ++ //_enter_critical_bh(&queue->lock, &irqL); ++ _enter_critical(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&obj->list, &queue->queue); ++ ++ //_exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical(&queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct cmd_obj *_rtw_dequeue_cmd(_queue *queue) ++{ ++ _irqL irqL; ++ struct cmd_obj *obj; ++ ++_func_enter_; ++ ++ //_enter_critical_bh(&(queue->lock), &irqL); ++ _enter_critical(&queue->lock, &irqL); ++ if (rtw_is_list_empty(&(queue->queue))) ++ obj = NULL; ++ else ++ { ++ obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list); ++ rtw_list_delete(&obj->list); ++ } ++ ++ //_exit_critical_bh(&(queue->lock), &irqL); ++ _exit_critical(&queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return obj; ++} ++ ++u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) ++{ ++ u32 res; ++_func_enter_; ++ res = _rtw_init_cmd_priv (pcmdpriv); ++_func_exit_; ++ return res; ++} ++ ++u32 rtw_init_evt_priv (struct evt_priv *pevtpriv) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_init_evt_priv(pevtpriv); ++_func_exit_; ++ return res; ++} ++ ++void rtw_free_evt_priv (struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_evt_priv\n")); ++ _rtw_free_evt_priv(pevtpriv); ++_func_exit_; ++} ++ ++void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_cmd_priv\n")); ++ _rtw_free_cmd_priv(pcmdpriv); ++_func_exit_; ++} ++ ++int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj); ++int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) ++{ ++ u8 bAllow = _FALSE; //set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE ++ ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ //To decide allow or not ++ if( (pcmdpriv->padapter->pwrctrlpriv.bHWPwrPindetect) ++ &&(!pcmdpriv->padapter->registrypriv.usbss_enable) ++ ) ++ { ++ if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ) ++ { ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; ++ if(pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID) ++ { ++ //DBG_871X("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); ++ bAllow = _TRUE; ++ } ++ } ++ } ++ #endif ++ ++ if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan)) ++ bAllow = _TRUE; ++ ++ if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) ++ || pcmdpriv->cmdthd_running== _FALSE //com_thread not running ++ ) ++ { ++ //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, ++ // cmd_obj->cmdcode, ++ // pcmdpriv->padapter->hw_init_completed, ++ // pcmdpriv->cmdthd_running ++ //); ++ ++ return _FAIL; ++ } ++ return _SUCCESS; ++} ++ ++ ++ ++u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) ++{ ++ int res = _FAIL; ++ PADAPTER padapter = pcmdpriv->padapter; ++ ++_func_enter_; ++ ++ if (cmd_obj == NULL) { ++ goto exit; ++ } ++ ++ cmd_obj->padapter = padapter; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ //change pcmdpriv to primary's pcmdpriv ++ if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) ++ pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); ++#endif ++ ++ if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) { ++ rtw_free_cmd_obj(cmd_obj); ++ goto exit; ++ } ++ ++ res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); ++ ++ if(res == _SUCCESS) ++ _rtw_up_sema(&pcmdpriv->cmd_queue_sema); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv) ++{ ++ struct cmd_obj *cmd_obj; ++ ++_func_enter_; ++ ++ cmd_obj = _rtw_dequeue_cmd(&pcmdpriv->cmd_queue); ++ ++_func_exit_; ++ return cmd_obj; ++} ++ ++void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ pcmdpriv->cmd_done_cnt++; ++ //_rtw_up_sema(&(pcmdpriv->cmd_done_sema)); ++_func_exit_; ++} ++ ++void rtw_free_cmd_obj(struct cmd_obj *pcmd) ++{ ++_func_enter_; ++ ++ if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_)) ++ { ++ //free parmbuf in cmd_obj ++ rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz); ++ } ++ ++ if(pcmd->rsp!=NULL) ++ { ++ if(pcmd->rspsz!= 0) ++ { ++ //free rsp in cmd_obj ++ rtw_mfree((unsigned char*)pcmd->rsp, pcmd->rspsz); ++ } ++ } ++ ++ //free cmd_obj ++ rtw_mfree((unsigned char*)pcmd, sizeof(struct cmd_obj)); ++ ++_func_exit_; ++} ++ ++void rtw_stop_cmd_thread(_adapter *adapter) ++{ ++ if(adapter->cmdThread && adapter->cmdpriv.cmdthd_running == _TRUE ++ && adapter->cmdpriv.stop_req == 0) ++ { ++ adapter->cmdpriv.stop_req = 1; ++ _rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema); ++ _rtw_down_sema(&adapter->cmdpriv.terminate_cmdthread_sema); ++ } ++} ++ ++thread_return rtw_cmd_thread(thread_context context) ++{ ++ u8 ret; ++ struct cmd_obj *pcmd; ++ u8 *pcmdbuf, *prspbuf; ++ u8 (*cmd_hdl)(_adapter *padapter, u8* pbuf); ++ void (*pcmd_callback)(_adapter *dev, struct cmd_obj *pcmd); ++ _adapter *padapter = (_adapter *)context; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ ++_func_enter_; ++ ++ thread_enter("RTW_CMD_THREAD"); ++ ++ pcmdbuf = pcmdpriv->cmd_buf; ++ prspbuf = pcmdpriv->rsp_buf; ++ ++ pcmdpriv->stop_req = 0; ++ pcmdpriv->cmdthd_running=_TRUE; ++ _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n")); ++ ++ while(1) ++ { ++ if ((_rtw_down_sema(&(pcmdpriv->cmd_queue_sema))) == _FAIL) { ++ LOG_LEVEL(_drv_err_, FUNC_ADPT_FMT" _rtw_down_sema(&pcmdpriv->cmd_queue_sema) return _FAIL, break\n", FUNC_ADPT_ARG(padapter)); ++ break; ++ } ++ ++ if (pcmdpriv->stop_req) { ++ LOG_LEVEL(_drv_err_, FUNC_ADPT_FMT" stop_req:%u, break\n", FUNC_ADPT_ARG(padapter), pcmdpriv->stop_req); ++ break; ++ } ++ ++#ifdef CONFIG_LPS_LCLK ++ if (rtw_register_cmd_alive(padapter) != _SUCCESS) ++ { ++ continue; ++ } ++#endif ++ ++_next: ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved == _TRUE)) ++ { ++ LOG_LEVEL(_drv_err_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", ++ __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); ++ break; ++ } ++ ++ if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) { ++#ifdef CONFIG_LPS_LCLK ++ rtw_unregister_cmd_alive(padapter); ++#endif ++ continue; ++ } ++ ++ if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) ++ { ++ pcmd->res = H2C_DROPPED; ++ goto post_process; ++ } ++ ++ if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) { ++ rtw_free_cmd_obj(pcmd); ++ continue; ++ } ++ ++ pcmdpriv->cmd_issued_cnt++; ++ ++ pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4 ++ ++ _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); ++ ++ if(pcmd->cmdcode <= (sizeof(wlancmds) /sizeof(struct cmd_hdl))) ++ { ++ cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns; ++ ++ if (cmd_hdl) ++ { ++ ret = cmd_hdl(pcmd->padapter, pcmdbuf); ++ pcmd->res = ret; ++ } ++ ++ pcmdpriv->cmd_seq++; ++ } ++ else ++ { ++ pcmd->res = H2C_PARAMETERS_ERROR; ++ } ++ ++ cmd_hdl = NULL; ++ ++post_process: ++ ++ //call callback function for post-processed ++ if(pcmd->cmdcode <= (sizeof(rtw_cmd_callback) /sizeof(struct _cmd_callback))) ++ { ++ pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback; ++ if(pcmd_callback == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("mlme_cmd_hdl(): pcmd_callback=0x%p, cmdcode=0x%x\n", pcmd_callback, pcmd->cmdcode)); ++ rtw_free_cmd_obj(pcmd); ++ } ++ else ++ { ++ //todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL) ++ pcmd_callback(pcmd->padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback ++ } ++ } ++ ++ flush_signals_thread(); ++ ++ goto _next; ++ ++ } ++ pcmdpriv->cmdthd_running=_FALSE; ++ ++ ++ // free all cmd_obj resources ++ do{ ++ pcmd = rtw_dequeue_cmd(pcmdpriv); ++ if(pcmd==NULL) ++ break; ++ ++ //DBG_871X("%s: leaving... drop cmdcode:%u\n", __FUNCTION__, pcmd->cmdcode); ++ ++ rtw_free_cmd_obj(pcmd); ++ }while(1); ++ ++ _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); ++ ++_func_exit_; ++ ++ thread_exit(); ++ ++} ++ ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj) ++{ ++ _irqL irqL; ++ int res; ++ _queue *queue = &pevtpriv->evt_queue; ++ ++_func_enter_; ++ ++ res = _SUCCESS; ++ ++ if (obj == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&obj->list, &queue->queue); ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ //rtw_evt_notify_isr(pevtpriv); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++struct evt_obj *rtw_dequeue_evt(_queue *queue) ++{ ++ _irqL irqL; ++ struct evt_obj *pevtobj; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (rtw_is_list_empty(&(queue->queue))) ++ pevtobj = NULL; ++ else ++ { ++ pevtobj = LIST_CONTAINOR(get_next(&(queue->queue)), struct evt_obj, list); ++ rtw_list_delete(&pevtobj->list); ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pevtobj; ++} ++ ++void rtw_free_evt_obj(struct evt_obj *pevtobj) ++{ ++_func_enter_; ++ ++ if(pevtobj->parmbuf) ++ rtw_mfree((unsigned char*)pevtobj->parmbuf, pevtobj->evtsz); ++ ++ rtw_mfree((unsigned char*)pevtobj, sizeof(struct evt_obj)); ++ ++_func_exit_; ++} ++ ++void rtw_evt_notify_isr(struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ pevtpriv->evt_done_cnt++; ++ _rtw_up_sema(&(pevtpriv->evt_notify)); ++_func_exit_; ++} ++#endif ++ ++ ++/* ++u8 rtw_setstandby_cmd(unsigned char *adapter) ++*/ ++u8 rtw_setstandby_cmd(_adapter *padapter, uint action) ++{ ++ struct cmd_obj* ph2c; ++ struct usb_suspend_parm* psetusbsuspend; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ ++ u8 ret = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ psetusbsuspend = (struct usb_suspend_parm*)rtw_zmalloc(sizeof(struct usb_suspend_parm)); ++ if (psetusbsuspend == NULL) { ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ psetusbsuspend->action = action; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetusbsuspend, GEN_CMD_CODE(_SetUsbSuspend)); ++ ++ ret = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++/* ++rtw_sitesurvey_cmd(~) ++ ### NOTE:#### (!!!!) ++ MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock ++*/ ++u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, ++ struct rtw_ieee80211_channel *ch, int ch_num) ++{ ++ u8 res = _FAIL; ++ struct cmd_obj *ph2c; ++ struct sitesurvey_parm *psurveyPara; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++#ifdef CONFIG_LPS ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE){ ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); ++ } ++#endif ++ ++#ifdef CONFIG_P2P_PS ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); ++ } ++#endif // CONFIG_P2P_PS ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) ++ return _FAIL; ++ ++ psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm)); ++ if (psurveyPara == NULL) { ++ rtw_mfree((unsigned char*) ph2c, sizeof(struct cmd_obj)); ++ return _FAIL; ++ } ++ ++ rtw_free_network_queue(padapter, _FALSE); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("\nflush network queue\n\n")); ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); ++ ++ /* psurveyPara->bsslimit = 48; */ ++ psurveyPara->scan_mode = pmlmepriv->scan_mode; ++ ++ /* prepare ssid list */ ++ if (ssid) { ++ int i; ++ for (i=0; issid[i], &ssid[i], sizeof(NDIS_802_11_SSID)); ++ psurveyPara->ssid_num++; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s, %d)\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); ++ } ++ } ++ } ++ ++ /* prepare channel list */ ++ if (ch) { ++ int i; ++ for (i=0; ich[i], &ch[i], sizeof(struct rtw_ieee80211_channel)); ++ psurveyPara->ch_num++; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ch[i].hw_value); ++ } ++ } ++ } ++ ++ set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ if(res == _SUCCESS) { ++ ++ pmlmepriv->scan_start_time = rtw_get_current_time(); ++ ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if (padapter->pbuddy_adapter == NULL ) ++ goto full_scan_timeout; ++ if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) ++ _set_timer(&pmlmepriv->scan_to_timer, ++ SURVEY_TO * ( padapter->mlmeextpriv.max_chan_nums + ( padapter->mlmeextpriv.max_chan_nums / RTW_SCAN_NUM_OF_CH ) * RTW_STAY_AP_CH_MILLISECOND ) + 1000 ); ++ else ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++full_scan_timeout: ++ _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); ++ ++ rtw_led_control(padapter, LED_CTL_SITE_SURVEY); ++ ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ } else { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ } ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset) ++{ ++ struct cmd_obj* ph2c; ++ struct setdatarate_parm* pbsetdataratepara; ++ struct cmd_priv* pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pbsetdataratepara = (struct setdatarate_parm*)rtw_zmalloc(sizeof(struct setdatarate_parm)); ++ if (pbsetdataratepara == NULL) { ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pbsetdataratepara, GEN_CMD_CODE(_SetDataRate)); ++#ifdef MP_FIRMWARE_OFFLOAD ++ pbsetdataratepara->curr_rateidx = *(u32*)rateset; ++// _rtw_memcpy(pbsetdataratepara, rateset, sizeof(u32)); ++#else ++ pbsetdataratepara->mac_id = 5; ++ _rtw_memcpy(pbsetdataratepara->datarates, rateset, NumRates); ++#endif ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset) ++{ ++ struct cmd_obj* ph2c; ++ struct setbasicrate_parm* pssetbasicratepara; ++ struct cmd_priv* pcmdpriv=&padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ pssetbasicratepara = (struct setbasicrate_parm*)rtw_zmalloc(sizeof(struct setbasicrate_parm)); ++ ++ if (pssetbasicratepara == NULL) { ++ rtw_mfree((u8*) ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pssetbasicratepara, _SetBasicRate_CMD_); ++ ++ _rtw_memcpy(pssetbasicratepara->basicrates, rateset, NumRates); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++ ++/* ++unsigned char rtw_setphy_cmd(unsigned char *adapter) ++ ++1. be called only after rtw_update_registrypriv_dev_network( ~) or mp testing program ++2. for AdHoc/Ap mode or mp mode? ++ ++*/ ++u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch) ++{ ++ struct cmd_obj* ph2c; ++ struct setphy_parm* psetphypara; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++// struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++// struct registry_priv* pregistry_priv = &padapter->registrypriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetphypara = (struct setphy_parm*)rtw_zmalloc(sizeof(struct setphy_parm)); ++ ++ if(psetphypara==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("CH=%d, modem=%d", ch, modem)); ++ ++ psetphypara->modem = modem; ++ psetphypara->rfchannel = ch; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_setbbreg_cmd(_adapter*padapter, u8 offset, u8 val) ++{ ++ struct cmd_obj* ph2c; ++ struct writeBB_parm* pwritebbparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pwritebbparm = (struct writeBB_parm*)rtw_zmalloc(sizeof(struct writeBB_parm)); ++ ++ if(pwritebbparm==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwritebbparm, GEN_CMD_CODE(_SetBBReg)); ++ ++ pwritebbparm->offset = offset; ++ pwritebbparm->value = val; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_getbbreg_cmd(_adapter *padapter, u8 offset, u8 *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct readBB_parm* prdbbparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ prdbbparm = (struct readBB_parm*)rtw_zmalloc(sizeof(struct readBB_parm)); ++ ++ if(prdbbparm ==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ return _FAIL; ++ } ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetBBReg); ++ ph2c->parmbuf = (unsigned char *)prdbbparm; ++ ph2c->cmdsz = sizeof(struct readBB_parm); ++ ph2c->rsp = pval; ++ ph2c->rspsz = sizeof(struct readBB_rsp); ++ ++ prdbbparm ->offset = offset; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_setrfreg_cmd(_adapter *padapter, u8 offset, u32 val) ++{ ++ struct cmd_obj* ph2c; ++ struct writeRF_parm* pwriterfparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pwriterfparm = (struct writeRF_parm*)rtw_zmalloc(sizeof(struct writeRF_parm)); ++ ++ if(pwriterfparm==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwriterfparm, GEN_CMD_CODE(_SetRFReg)); ++ ++ pwriterfparm->offset = offset; ++ pwriterfparm->value = val; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_getrfreg_cmd(_adapter *padapter, u8 offset, u8 *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct readRF_parm* prdrfparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ prdrfparm = (struct readRF_parm*)rtw_zmalloc(sizeof(struct readRF_parm)); ++ if(prdrfparm ==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetRFReg); ++ ph2c->parmbuf = (unsigned char *)prdrfparm; ++ ph2c->cmdsz = sizeof(struct readRF_parm); ++ ph2c->rsp = pval; ++ ph2c->rspsz = sizeof(struct readRF_rsp); ++ ++ prdrfparm ->offset = offset; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_getbbrfreg_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _func_enter_; ++ ++ //rtw_free_cmd_obj(pcmd); ++ rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); ++ rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted= _TRUE; ++#endif ++_func_exit_; ++} ++ ++void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _func_enter_; ++ ++ rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); ++ rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted= _TRUE; ++#endif ++ ++_func_exit_; ++} ++ ++u8 rtw_createbss_cmd(_adapter *padapter) ++{ ++ struct cmd_obj* pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ rtw_led_control(padapter, LED_CTL_START_TO_LINK); ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0){ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for Any SSid:%s\n",pmlmepriv->assoc_ssid.Ssid)); ++ } else { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = _CreateBss_CMD_; ++ pcmd->parmbuf = (unsigned char *)pdev_network; ++ pcmd->cmdsz = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX*)pdev_network); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ pdev_network->Length = pcmd->cmdsz; ++ ++#ifdef CONFIG_RTL8712 ++ //notes: translate IELength & Length after assign the Length to cmdsz; ++ pdev_network->Length = cpu_to_le32(pcmd->cmdsz); ++ pdev_network->IELength = cpu_to_le32(pdev_network->IELength); ++ pdev_network->Ssid.SsidLength = cpu_to_le32(pdev_network->Ssid.SsidLength); ++#endif ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz) ++{ ++ struct cmd_obj* pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); ++ pcmd->parmbuf = pbss; ++ pcmd->cmdsz = sz; ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork) ++{ ++ u8 *auth, res = _SUCCESS; ++ uint t_len = 0; ++ WLAN_BSSID_EX *psecnetwork; ++ struct cmd_obj *pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++_func_enter_; ++ ++ rtw_led_control(padapter, LED_CTL_START_TO_LINK); ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0){ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n")); ++ } else { ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid=[%s]\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd: memory allocate for cmd_obj fail!!!\n")); ++ goto exit; ++ } ++ /* // for IEs is pointer ++ t_len = sizeof (ULONG) + sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + ++ sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + ++ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + ++ sizeof (NDIS_802_11_CONFIGURATION) + ++ sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) + ++ sizeof (NDIS_802_11_RATES_EX)+ sizeof(WLAN_PHY_INFO)+ sizeof (ULONG) + MAX_IE_SZ; ++ */ ++ //for IEs is fix buf size ++ t_len = sizeof(WLAN_BSSID_EX); ++ ++ ++ //for hidden ap to set fw_state here ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) != _TRUE) ++ { ++ switch(ndis_network_mode) ++ { ++ case Ndis802_11IBSS: ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ break; ++ ++ case Ndis802_11Infrastructure: ++ set_fwstate(pmlmepriv, WIFI_STATION_STATE); ++ break; ++ ++ case Ndis802_11APMode: ++ case Ndis802_11AutoUnknown: ++ case Ndis802_11InfrastructureMax: ++ break; ++ ++ } ++ } ++ ++ psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss; ++ if(psecnetwork==NULL) ++ { ++ if(pcmd !=NULL) ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ ++ res=_FAIL; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd :psecnetwork==NULL!!!\n")); ++ ++ goto exit; ++ } ++ ++ _rtw_memset(psecnetwork, 0, t_len); ++ ++ _rtw_memcpy(psecnetwork, &pnetwork->network, get_WLAN_BSSID_EX_sz(&pnetwork->network)); ++ ++ auth=&psecuritypriv->authenticator_ie[0]; ++ psecuritypriv->authenticator_ie[0]=(unsigned char)psecnetwork->IELength; ++ ++ if((psecnetwork->IELength-12) < (256-1)) { ++ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], psecnetwork->IELength-12); ++ } else { ++ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], (256-1)); ++ } ++ ++ psecnetwork->IELength = 0; ++ // Added by Albert 2009/02/18 ++ // If the the driver wants to use the bssid to create the connection. ++ // If not, we have to copy the connecting AP's MAC address to it so that ++ // the driver just has the bssid information for PMKIDList searching. ++ ++ if ( pmlmepriv->assoc_by_bssid == _FALSE ) ++ { ++ _rtw_memcpy( &pmlmepriv->assoc_bssid[ 0 ], &pnetwork->network.MacAddress[ 0 ], ETH_ALEN ); ++ } ++ ++ psecnetwork->IELength = rtw_restruct_sec_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength); ++ ++ ++ pqospriv->qos_option = 0; ++ ++ if(pregistrypriv->wmm_enable) ++ { ++ u32 tmp_len; ++ ++ tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, psecnetwork->IELength); ++ ++ if (psecnetwork->IELength != tmp_len) ++ { ++ psecnetwork->IELength = tmp_len; ++ pqospriv->qos_option = 1; //There is WMM IE in this corresp. beacon ++ } ++ else ++ { ++ pqospriv->qos_option = 0;//There is no WMM IE in this corresp. beacon ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ phtpriv->ht_option = _FALSE; ++ if(pregistrypriv->ht_enable) ++ { ++ // Added by Albert 2010/06/23 ++ // For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. ++ // Especially for Realtek 8192u SoftAP. ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_ ) && ++ ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_ ) && ++ ( padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_ )) ++ { ++ //rtw_restructure_ht_ie ++ rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], ++ pnetwork->network.IELength, &psecnetwork->IELength, (u8)psecnetwork->Configuration.DSConfig ); ++ } ++ } ++ ++#endif ++ ++ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength); ++ ++ #if 0 ++ psecuritypriv->supplicant_ie[0]=(u8)psecnetwork->IELength; ++ ++ if(psecnetwork->IELength < (256-1)) ++ { ++ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], psecnetwork->IELength); ++ } ++ else ++ { ++ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], (256-1)); ++ } ++ #endif ++ ++ pcmd->cmdsz = get_WLAN_BSSID_EX_sz(psecnetwork);//get cmdsz before endian conversion ++ ++#ifdef CONFIG_RTL8712 ++ //wlan_network endian conversion ++ psecnetwork->Length = cpu_to_le32(psecnetwork->Length); ++ psecnetwork->Ssid.SsidLength= cpu_to_le32(psecnetwork->Ssid.SsidLength); ++ psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy); ++ psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi); ++ psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse); ++ psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow); ++ psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod); ++ psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig); ++ psecnetwork->Configuration.FHConfig.DwellTime=cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime); ++ psecnetwork->Configuration.FHConfig.HopPattern=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern); ++ psecnetwork->Configuration.FHConfig.HopSet=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet); ++ psecnetwork->Configuration.FHConfig.Length=cpu_to_le32(psecnetwork->Configuration.FHConfig.Length); ++ psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length); ++ psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode); ++ psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength); ++#endif ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = _JoinBss_CMD_;//GEN_CMD_CODE(_JoinBss) ++ pcmd->parmbuf = (unsigned char *)psecnetwork; ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_disassoc_cmd(_adapter*padapter, u32 deauth_timeout_ms, bool enqueue) /* for sta_mode */ ++{ ++ struct cmd_obj *cmdobj = NULL; ++ struct disconnect_parm *param = NULL; ++ struct cmd_priv *cmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_disassoc_cmd\n")); ++ ++ /* prepare cmd parameter */ ++ param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param)); ++ if (param == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ param->deauth_timeout_ms = deauth_timeout_ms; ++ ++ if (enqueue) { ++ /* need enqueue, prepare cmd_obj and enqueue */ ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); ++ if (cmdobj == NULL) { ++ res = _FAIL; ++ rtw_mfree((u8 *)param, sizeof(*param)); ++ goto exit; ++ } ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, param, _DisConnect_CMD_); ++ res = rtw_enqueue_cmd(cmdpriv, cmdobj); ++ } else { ++ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ ++ if (H2C_SUCCESS != disconnect_hdl(padapter, (u8 *)param)) ++ res = _FAIL; ++ rtw_mfree((u8 *)param, sizeof(*param)); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype) ++{ ++ struct cmd_obj* ph2c; ++ struct setopmode_parm* psetop; ++ ++ struct cmd_priv *pcmdpriv= &padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FALSE; ++ goto exit; ++ } ++ psetop = (struct setopmode_parm*)rtw_zmalloc(sizeof(struct setopmode_parm)); ++ ++ if(psetop==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FALSE; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetop, _SetOpMode_CMD_); ++ psetop->mode = (u8)networktype; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct set_stakey_rsp *psetstakey_rsp = NULL; ++ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct sta_info* sta = (struct sta_info* )psta; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); ++ if(psetstakey_rsp == NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ph2c->rsp = (u8 *) psetstakey_rsp; ++ ph2c->rspsz = sizeof(struct set_stakey_rsp); ++ ++ _rtw_memcpy(psetstakey_para->addr, sta->hwaddr,ETH_ALEN); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)){ ++#ifdef CONFIG_TDLS ++ if(sta->tdls_sta_state&TDLS_LINKED_STATE) ++ psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; ++ else ++#endif //CONFIG_TDLS ++ psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm; ++ }else{ ++ GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); ++ } ++ ++ if (unicast_key == _TRUE) { ++#ifdef CONFIG_TDLS ++ if(sta->tdls_sta_state&TDLS_LINKED_STATE) ++ _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16); ++ else ++#endif //CONFIG_TDLS ++ _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); ++ } else { ++ _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); ++ } ++ ++ //jeff: set this becasue at least sw key is ready ++ padapter->securitypriv.busetkipkey=_TRUE; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct set_stakey_rsp *psetstakey_rsp = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct sta_info* sta = (struct sta_info* )psta; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ if(!enqueue) ++ { ++ clear_cam_entry(padapter, entry); ++ } ++ else ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); ++ if(psetstakey_rsp == NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ph2c->rsp = (u8 *) psetstakey_rsp; ++ ph2c->rspsz = sizeof(struct set_stakey_rsp); ++ ++ _rtw_memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN); ++ ++ psetstakey_para->algorithm = _NO_PRIVACY_; ++ ++ psetstakey_para->id = entry; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table) ++{ ++ struct cmd_obj* ph2c; ++ struct setratable_parm * psetrttblparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetrttblparm = (struct setratable_parm*)rtw_zmalloc(sizeof(struct setratable_parm)); ++ ++ if(psetrttblparm==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); ++ ++ _rtw_memcpy(psetrttblparm,prate_table,sizeof(struct setratable_parm)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct getratable_parm * pgetrttblparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pgetrttblparm = (struct getratable_parm*)rtw_zmalloc(sizeof(struct getratable_parm)); ++ ++ if(pgetrttblparm==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++// init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetRaTable); ++ ph2c->parmbuf = (unsigned char *)pgetrttblparm; ++ ph2c->cmdsz = sizeof(struct getratable_parm); ++ ph2c->rsp = (u8*)pval; ++ ph2c->rspsz = sizeof(struct getratable_rsp); ++ ++ pgetrttblparm ->rsvd = 0x0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr) ++{ ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct cmd_obj* ph2c; ++ struct set_assocsta_parm *psetassocsta_para; ++ struct set_stakey_rsp *psetassocsta_rsp = NULL; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetassocsta_para = (struct set_assocsta_parm*)rtw_zmalloc(sizeof(struct set_assocsta_parm)); ++ if(psetassocsta_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetassocsta_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_assocsta_rsp)); ++ if(psetassocsta_rsp==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetassocsta_para, sizeof(struct set_assocsta_parm)); ++ return _FAIL; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_); ++ ph2c->rsp = (u8 *) psetassocsta_rsp; ++ ph2c->rspsz = sizeof(struct set_assocsta_rsp); ++ ++ _rtw_memcpy(psetassocsta_para->addr, mac_addr,ETH_ALEN); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ } ++ ++u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr) ++{ ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct cmd_obj* ph2c; ++ struct addBaReq_parm *paddbareq_parm; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ paddbareq_parm = (struct addBaReq_parm*)rtw_zmalloc(sizeof(struct addBaReq_parm)); ++ if(paddbareq_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ paddbareq_parm->tid = tid; ++ _rtw_memcpy(paddbareq_parm->addr, addr, ETH_ALEN); ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq)); ++ ++ //DBG_871X("rtw_addbareq_cmd, tid=%d\n", tid); ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++//add for CONFIG_IEEE80211W, none 11w can use it ++u8 rtw_reset_securitypriv_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = RESET_SECURITYPRIV; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++u8 rtw_free_assoc_resources_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++ ++u8 rtw_dynamic_chk_wk_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ goto exit; ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) ++ pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); ++#endif ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue) ++{ ++ struct cmd_obj *pcmdobj; ++ struct set_ch_parm *set_ch_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ DBG_871X(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset); ++ ++ /* check input parameter */ ++ ++ /* prepare cmd parameter */ ++ set_ch_parm = (struct set_ch_parm *)rtw_zmalloc(sizeof(*set_ch_parm)); ++ if (set_ch_parm == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ set_ch_parm->ch = ch; ++ set_ch_parm->bw = bw; ++ set_ch_parm->ch_offset = ch_offset; ++ ++ if (enqueue) { ++ /* need enqueue, prepare cmd_obj and enqueue */ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, set_ch_parm, GEN_CMD_CODE(_SetChannel)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ } else { ++ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ ++ if( H2C_SUCCESS !=set_ch_hdl(padapter, (u8 *)set_ch_parm) ) ++ res = _FAIL; ++ ++ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); ++ } ++ ++ /* do something based on res... */ ++ ++exit: ++ ++ DBG_871X(FUNC_NDEV_FMT" res:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), res); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue) ++{ ++ struct cmd_obj* pcmdobj; ++ struct SetChannelPlan_param *setChannelPlan_param; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_chplan_cmd\n")); ++ ++ //check input parameter ++ if(!rtw_is_channel_plan_valid(chplan)) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ //prepare cmd parameter ++ setChannelPlan_param = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(struct SetChannelPlan_param)); ++ if(setChannelPlan_param == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ setChannelPlan_param->channel_plan=chplan; ++ ++ if(enqueue) ++ { ++ //need enqueue, prepare cmd_obj and enqueue ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ } ++ else ++ { ++ //no need to enqueue, do the cmd hdl directly and free cmd parameter ++ if( H2C_SUCCESS !=set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) ++ res = _FAIL; ++ ++ rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); ++ } ++ ++ //do something based on res... ++ if(res == _SUCCESS) ++ padapter->mlmepriv.ChannelPlan = chplan; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed) ++{ ++ struct cmd_obj* pcmdobj; ++ struct LedBlink_param *ledBlink_param; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_led_blink_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ ledBlink_param = (struct LedBlink_param *)rtw_zmalloc(sizeof(struct LedBlink_param)); ++ if(ledBlink_param == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ ledBlink_param->pLed=pLed; ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, GEN_CMD_CODE(_LedBlink)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no) ++{ ++ struct cmd_obj* pcmdobj; ++ struct SetChannelSwitch_param*setChannelSwitch_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_csa_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); ++ if(setChannelSwitch_param == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ setChannelSwitch_param->new_ch_no=new_ch_no; ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) ++{ ++ struct cmd_obj* pcmdobj; ++ struct TDLSoption_param *TDLSoption; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++#ifdef CONFIG_TDLS ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_tdls_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ TDLSoption= (struct TDLSoption_param *)rtw_zmalloc(sizeof(struct TDLSoption_param)); ++ if(TDLSoption == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_spinlock(&(padapter->tdlsinfo.cmd_lock)); ++ _rtw_memcpy(TDLSoption->addr, addr, 6); ++ TDLSoption->option = option; ++ _rtw_spinunlock(&(padapter->tdlsinfo.cmd_lock)); ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++#endif //CONFIG_TDLS ++ ++exit: ++ ++ ++_func_exit_; ++ ++ return res; ++} ++ ++static void traffic_status_watchdog(_adapter *padapter) ++{ ++#ifdef CONFIG_LPS ++ u8 bEnterPS; ++#endif ++ u16 BusyThreshold = 100; ++ u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; ++ u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); ++#endif //CONFIG_TDLS ++ ++ RT_LINK_DETECT_T * link_detect = &pmlmepriv->LinkDetectInfo; ++ ++ // ++ // Determine if our traffic is busy now ++ // ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) ++ { ++ ++ // if we raise bBusyTraffic in last watchdog, using lower threshold. ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ BusyThreshold = 75; ++ if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold || ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold ) ++ { ++ bBusyTraffic = _TRUE; ++ ++ if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold) ++ bRxBusyTraffic = _TRUE; ++ ++ if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold) ++ bTxBusyTraffic = _TRUE; ++ } ++ ++ // Higher Tx/Rx data. ++ if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 4000 || ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000 ) ++ { ++ bHigherBusyTraffic = _TRUE; ++ ++ // Extremely high Rx data. ++ if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 5000) ++ bHigherBusyRxTraffic = _TRUE; ++ ++ // Extremely high Tx data. ++ if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 5000) ++ bHigherBusyTxTraffic = _TRUE; ++ } ++ ++#ifdef CONFIG_TRAFFIC_PROTECT ++#define TX_ACTIVE_TH 2 ++#define RX_ACTIVE_TH 1 ++#define TRAFFIC_PROTECT_PERIOD_MS 4500 ++ ++ if (link_detect->NumTxOkInPeriod > TX_ACTIVE_TH ++ || link_detect->NumRxUnicastOkInPeriod > RX_ACTIVE_TH) { ++ ++ LOG_LEVEL(_drv_info_, FUNC_ADPT_FMT" acqiure wake_lock for %u ms(tx:%d,rx_unicast:%d)\n", ++ FUNC_ADPT_ARG(padapter), ++ TRAFFIC_PROTECT_PERIOD_MS, ++ link_detect->NumTxOkInPeriod, ++ link_detect->NumRxUnicastOkInPeriod); ++ ++ rtw_lock_suspend_timeout(TRAFFIC_PROTECT_PERIOD_MS); ++ } ++#endif ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_AUTOSETUP ++ if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //TDLS_WATCHDOG_PERIOD * 2sec, periodically sending ++ issue_tdls_dis_req( padapter, NULL ); ++ ptdlsinfo->watchdog_count++; ++#endif //CONFIG_TDLS_AUTOSETUP ++#endif //CONFIG_TDLS ++ ++#ifdef CONFIG_LPS ++ // check traffic for powersaving. ++ if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || ++ (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) ++ { ++ //DBG_871X("Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++ bEnterPS= _FALSE; ++ } ++ else ++ { ++ bEnterPS= _TRUE; ++ } ++ ++ // LeisurePS only work in infra mode. ++ if(bEnterPS) ++ { ++ LPS_Enter(padapter); ++ } ++ else ++ { ++ LPS_Leave(padapter); ++ } ++#endif ++ } ++ else ++ { ++#ifdef CONFIG_LPS ++ LPS_Leave(padapter); ++#endif ++ } ++ ++ pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = bBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bTxBusyTraffic = bTxBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyTxTraffic = bHigherBusyTxTraffic; ++ ++} ++ ++void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz); ++void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) ++{ ++ struct mlme_priv *pmlmepriv; ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ if((void*)padapter != (void*)pbuf && padapter->pbuddy_adapter == NULL) ++ return; ++ ++ padapter = (_adapter *)pbuf; ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ expire_timeout_chk(padapter); ++ } ++#endif ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ rtw_hal_sreset_xmit_status_check(padapter); ++ #endif ++ ++ //if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE) ++ { ++ linked_status_chk(padapter); ++ traffic_status_watchdog(padapter); ++ } ++ ++ rtw_hal_dm_watchdog(padapter); ++ ++ //check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ ++} ++ ++#ifdef CONFIG_LPS ++ ++void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type); ++void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 mstatus; ++ ++_func_enter_; ++ ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ { ++ return; ++ } ++ ++ switch(lps_ctrl_type) ++ { ++ case LPS_CTRL_SCAN: ++ //DBG_871X("LPS_CTRL_SCAN \n"); ++ LeaveAllPowerSaveMode(padapter); ++ break; ++ case LPS_CTRL_JOINBSS: ++ //DBG_871X("LPS_CTRL_JOINBSS \n"); ++ LPS_Leave(padapter); ++ break; ++ case LPS_CTRL_CONNECT: ++ //DBG_871X("LPS_CTRL_CONNECT \n"); ++ mstatus = 1; ++ // Reset LPS Setting ++ padapter->pwrctrlpriv.LpsIdleCount = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ break; ++ case LPS_CTRL_DISCONNECT: ++ //DBG_871X("LPS_CTRL_DISCONNECT \n"); ++ mstatus = 0; ++ LPS_Leave(padapter); ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ break; ++ case LPS_CTRL_SPECIAL_PACKET: ++ //DBG_871X("LPS_CTRL_SPECIAL_PACKET \n"); ++ pwrpriv->DelayLPSLastTimeStamp = rtw_get_current_time(); ++ LPS_Leave(padapter); ++ break; ++ ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ //struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ //if(!pwrctrlpriv->bLeisurePs) ++ // return res; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type != IFACE_PORT0) ++ return res; ++#endif ++ ++ if(enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = LPS_CTRL_WK_CID; ++ pdrvextra_cmd_parm->type_size = lps_ctrl_type; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ lps_ctrl_wk_hdl(padapter, lps_ctrl_type); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ ++void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); ++} ++ ++u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 bSupportAntDiv = _FALSE; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); ++ if(_FALSE == bSupportAntDiv ) return res; ++ ++ if(_TRUE == enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = ANT_SELECT_WK_CID; ++ pdrvextra_cmd_parm->type_size = antenna; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else{ ++ antenna_select_wk_hdl(padapter,antenna ); ++ } ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif ++ ++void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz); ++void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) ++{ ++ rtw_ps_processor(padapter); ++} ++ ++//add for CONFIG_IEEE80211W, none 11w can use it ++void reset_securitypriv_hdl(_adapter *padapter) ++{ ++ rtw_reset_securitypriv(padapter); ++} ++ ++void free_assoc_resources_hdl(_adapter *padapter) ++{ ++ rtw_free_assoc_resources(padapter, 1); ++} ++ ++#ifdef CONFIG_P2P ++u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ return res; ++ } ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = P2P_PROTO_WK_CID; ++ pdrvextra_cmd_parm->type_size = intCmdType; // As the command tppe. ++ pdrvextra_cmd_parm->pbuf = NULL; // Must be NULL here ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif //CONFIG_P2P ++ ++u8 rtw_ps_cmd(_adapter*padapter) ++{ ++ struct cmd_obj *ppscmd; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res = _SUCCESS; ++_func_enter_; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type != PRIMARY_ADAPTER) ++ goto exit; ++#endif ++ ++ ppscmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ppscmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ppscmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ppscmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++#ifdef CONFIG_AP_MODE ++ ++static void rtw_chk_hi_queue_hdl(_adapter *padapter) ++{ ++ int cnt=0; ++ struct sta_info *psta_bmc; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return; ++ ++ ++ if(psta_bmc->sleepq_len==0) ++ { ++ while((rtw_read32(padapter, 0x414)&0x00ffff00)!=0) ++ { ++ rtw_msleep_os(100); ++ ++ cnt++; ++ ++ if(cnt>10) ++ break; ++ } ++ ++ if(cnt<=10) ++ { ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ } ++ ++} ++ ++u8 rtw_chk_hi_queue_cmd(_adapter*padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++#endif ++ ++u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (pdrvextra_cmd_parm == NULL) { ++ rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = C2H_WK_CID; ++ pdrvextra_cmd_parm->type_size = c2h_evt?16:0; ++ pdrvextra_cmd_parm->pbuf = c2h_evt; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++} ++ ++s32 c2h_evt_hdl(_adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter) ++{ ++ s32 ret = _FAIL; ++ u8 buf[16]; ++ ++ if (!c2h_evt) { ++ /* No c2h event in cmd_obj, read c2h event before handling*/ ++ if (c2h_evt_read(adapter, buf) == _SUCCESS) { ++ c2h_evt = (struct c2h_evt_hdr *)buf; ++ ++ if (filter && filter(c2h_evt->id) == _FALSE) ++ goto exit; ++ ++ ret = rtw_hal_c2h_handler(adapter, c2h_evt); ++ } ++ } else { ++ ++ if (filter && filter(c2h_evt->id) == _FALSE) ++ goto exit; ++ ++ ret = rtw_hal_c2h_handler(adapter, c2h_evt); ++ } ++exit: ++ return ret; ++} ++ ++#ifdef CONFIG_C2H_WK ++static void c2h_wk_callback(_workitem *work) ++{ ++ struct evt_priv *evtpriv = container_of(work, struct evt_priv, c2h_wk); ++ _adapter *adapter = container_of(evtpriv, _adapter, evtpriv); ++ struct c2h_evt_hdr *c2h_evt; ++ c2h_id_filter ccx_id_filter = rtw_hal_c2h_id_filter_ccx(adapter); ++ ++ evtpriv->c2h_wk_alive = _TRUE; ++ ++ while (!rtw_cbuf_empty(evtpriv->c2h_queue)) { ++ if ((c2h_evt = (struct c2h_evt_hdr *)rtw_cbuf_pop(evtpriv->c2h_queue)) != NULL) { ++ /* This C2H event is read, clear it */ ++ c2h_evt_clear(adapter); ++ } else if ((c2h_evt = (struct c2h_evt_hdr *)rtw_malloc(16)) != NULL) { ++ /* This C2H event is not read, read & clear now */ ++ if (c2h_evt_read(adapter, (u8*)c2h_evt) != _SUCCESS) ++ continue; ++ } ++ ++ /* Special pointer to trigger c2h_evt_clear only */ ++ if ((void *)c2h_evt == (void *)evtpriv) ++ continue; ++ ++ if (!c2h_evt_exist(c2h_evt)) { ++ rtw_mfree((u8*)c2h_evt, 16); ++ continue; ++ } ++ ++ if (ccx_id_filter(c2h_evt->id) == _TRUE) { ++ /* Handle CCX report here */ ++ rtw_hal_c2h_handler(adapter, c2h_evt); ++ rtw_mfree((u8*)c2h_evt, 16); ++ } else { ++ /* Enqueue into cmd_thread for others */ ++ rtw_c2h_wk_cmd(adapter, (u8 *)c2h_evt); ++ } ++ } ++ ++ evtpriv->c2h_wk_alive = _FALSE; ++} ++#endif ++ ++u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct drvextra_cmd_parm *pdrvextra_cmd; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ pdrvextra_cmd = (struct drvextra_cmd_parm*)pbuf; ++ ++ switch(pdrvextra_cmd->ec_id) ++ { ++ case DYNAMIC_CHK_WK_CID: ++ dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ break; ++ case POWER_SAVING_CTRL_WK_CID: ++ power_saving_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ break; ++#ifdef CONFIG_LPS ++ case LPS_CTRL_WK_CID: ++ lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type_size); ++ break; ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case ANT_SELECT_WK_CID: ++ antenna_select_wk_hdl(padapter, pdrvextra_cmd->type_size); ++ break; ++#endif ++#ifdef CONFIG_P2P_PS ++ case P2P_PS_WK_CID: ++ p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type_size); ++ break; ++#endif // CONFIG_P2P_PS ++ case P2P_PROTO_WK_CID: ++ // Commented by Albert 2011/07/01 ++ // I used the type_size as the type command ++ p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type_size ); ++ break; ++#ifdef CONFIG_AP_MODE ++ case CHECK_HIQ_WK_CID: ++ rtw_chk_hi_queue_hdl(padapter); ++ break; ++#endif //CONFIG_AP_MODE ++#ifdef CONFIG_INTEL_WIDI ++ case INTEl_WIDI_WK_CID: ++ intel_widi_wk_hdl(padapter, pdrvextra_cmd->type_size, pdrvextra_cmd->pbuf); ++ break; ++#endif //CONFIG_INTEL_WIDI ++ //add for CONFIG_IEEE80211W, none 11w can use it ++ case RESET_SECURITYPRIV: ++ reset_securitypriv_hdl(padapter); ++ break; ++ case FREE_ASSOC_RESOURCES: ++ free_assoc_resources_hdl(padapter); ++ break; ++ case C2H_WK_CID: ++ c2h_evt_hdl(padapter, (struct c2h_evt_hdr *)pdrvextra_cmd->pbuf, NULL); ++ break; ++ ++ default: ++ break; ++ } ++ ++ ++ if(pdrvextra_cmd->pbuf && pdrvextra_cmd->type_size>0) ++ { ++ rtw_mfree(pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ } ++ ++ ++ return H2C_SUCCESS; ++ ++} ++ ++void rtw_survey_cmd_callback(_adapter* padapter , struct cmd_obj *pcmd) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if(pcmd->res == H2C_DROPPED) ++ { ++ //TODO: cancel timer and do timeout handler directly... ++ //need to make timeout handlerOS independent ++ _set_timer(&pmlmepriv->scan_to_timer, 1); ++ } ++ else if (pcmd->res != H2C_SUCCESS) { ++ _set_timer(&pmlmepriv->scan_to_timer, 1); ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n.")); ++ } ++ ++ // free cmd ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++void rtw_disassoc_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if (pcmd->res != H2C_SUCCESS) ++ { ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ***Error: disconnect_cmd_callback Fail ***\n.")); ++ ++ goto exit; ++ } ++#ifdef CONFIG_BR_EXT ++ else //clear bridge database ++ nat25_db_cleanup(padapter); ++#endif //CONFIG_BR_EXT ++ ++ // free cmd ++ rtw_free_cmd_obj(pcmd); ++ ++exit: ++ ++_func_exit_; ++} ++ ++ ++void rtw_joinbss_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if(pcmd->res == H2C_DROPPED) ++ { ++ //TODO: cancel timer and do timeout handler directly... ++ //need to make timeout handlerOS independent ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ } ++ else if(pcmd->res != H2C_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("********Error:rtw_select_and_join_from_scanned_queue Wait Sema Fail ************\n")); ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ } ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++ ++void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ u8 timer_cancelled; ++ struct sta_info *psta = NULL; ++ struct wlan_network *pwlan = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)pcmd->parmbuf; ++ struct wlan_network *tgt_network = &(pmlmepriv->cur_network); ++ ++_func_enter_; ++ ++ if((pcmd->res != H2C_SUCCESS)) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n.")); ++ _set_timer(&pmlmepriv->assoc_timer, 1 ); ++ } ++ ++ _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); ++ ++#ifdef CONFIG_FW_MLMLE ++ //endian_convert ++ pnetwork->Length = le32_to_cpu(pnetwork->Length); ++ pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); ++ pnetwork->Privacy =le32_to_cpu(pnetwork->Privacy); ++ pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); ++ pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); ++ pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); ++ //pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); ++ pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); ++ pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); ++ pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); ++ pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); ++ pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); ++ pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); ++ pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); ++ pnetwork->IELength = le32_to_cpu(pnetwork->IELength); ++#endif ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) ) ++ { ++ psta = rtw_get_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ if(!psta) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ if (psta == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); ++ goto createbss_cmd_fail ; ++ } ++ } ++ ++ rtw_indicate_connect( padapter); ++ } ++ else ++ { ++ _irqL irqL; ++ ++ pwlan = _rtw_alloc_network(pmlmepriv); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ if ( pwlan == NULL) ++ { ++ pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue); ++ if( pwlan == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n Error: can't get pwlan in rtw_joinbss_event_callback \n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto createbss_cmd_fail; ++ } ++ pwlan->last_scanned = rtw_get_current_time(); ++ } ++ else ++ { ++ rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); ++ } ++ ++ pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); ++ _rtw_memcpy(&(pwlan->network), pnetwork, pnetwork->Length); ++ //pwlan->fixed = _TRUE; ++ ++ //rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); ++ ++ // copy pdev_network information to pmlmepriv->cur_network ++ _rtw_memcpy(&tgt_network->network, pnetwork, (get_WLAN_BSSID_EX_sz(pnetwork))); ++ ++ // reset DSConfig ++ //tgt_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pnetwork->Configuration.DSConfig); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++#if 0 ++ if((pmlmepriv->fw_state) & WIFI_AP_STATE) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ ++ if (psta == NULL) { // for AP Mode & Adhoc Master Mode ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); ++ goto createbss_cmd_fail ; ++ } ++ ++ rtw_indicate_connect( padapter); ++ } ++ else { ++ ++ //rtw_indicate_disconnect(dev); ++ } ++#endif ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback) ++ ++ } ++ ++createbss_cmd_fail: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++ ++} ++ ++ ++ ++void rtw_setstaKey_cmdrsp_callback(_adapter* padapter , struct cmd_obj *pcmd) ++{ ++ ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct set_stakey_rsp* psetstakey_rsp = (struct set_stakey_rsp*) (pcmd->rsp); ++ struct sta_info* psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr); ++ ++_func_enter_; ++ ++ if(psta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: rtw_setstaKey_cmdrsp_callback => can't get sta_info \n\n")); ++ goto exit; ++ } ++ ++ //psta->aid = psta->mac_id = psetstakey_rsp->keyid; //CAM_ID(CAM_ENTRY) ++ ++exit: ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++ ++} ++void rtw_setassocsta_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct set_assocsta_parm* passocsta_parm = (struct set_assocsta_parm*)(pcmd->parmbuf); ++ struct set_assocsta_rsp* passocsta_rsp = (struct set_assocsta_rsp*) (pcmd->rsp); ++ struct sta_info* psta = rtw_get_stainfo(pstapriv, passocsta_parm->addr); ++ ++_func_enter_; ++ ++ if(psta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: setassocsta_cmdrsp_callbac => can't get sta_info \n\n")); ++ goto exit; ++ } ++ ++ psta->aid = psta->mac_id = passocsta_rsp->cam_id; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)) ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++ ++void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); ++void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++_func_enter_; ++ ++ rtw_free_cmd_obj(pcmd); ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted=_TRUE; ++#endif ++ ++_func_exit_; ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_debug.c +@@ -0,0 +1,1337 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_DEBUG_C_ ++ ++ ++#include ++#include <../hal/dm.h> ++ ++//#ifdef CONFIG_DEBUG_RTL871X ++ ++ u32 GlobalDebugLevel = _drv_err_; ++ ++ u64 GlobalDebugComponents = \ ++ _module_rtl871x_xmit_c_ | ++ _module_xmit_osdep_c_ | ++ _module_rtl871x_recv_c_ | ++ _module_recv_osdep_c_ | ++ _module_rtl871x_mlme_c_ | ++ _module_mlme_osdep_c_ | ++ _module_rtl871x_sta_mgt_c_ | ++ _module_rtl871x_cmd_c_ | ++ _module_cmd_osdep_c_ | ++ _module_rtl871x_io_c_ | ++ _module_io_osdep_c_ | ++ _module_os_intfs_c_| ++ _module_rtl871x_security_c_| ++ _module_rtl871x_eeprom_c_| ++ _module_hal_init_c_| ++ _module_hci_hal_init_c_| ++ _module_rtl871x_ioctl_c_| ++ _module_rtl871x_ioctl_set_c_| ++ _module_rtl871x_ioctl_query_c_| ++ _module_rtl871x_pwrctrl_c_| ++ _module_hci_intfs_c_| ++ _module_hci_ops_c_| ++ _module_hci_ops_os_c_| ++ _module_rtl871x_ioctl_os_c| ++ _module_rtl8712_cmd_c_| ++ _module_hal_xmit_c_| ++ _module_rtl8712_recv_c_ | ++ _module_mp_ | ++ _module_efuse_; ++ ++//#endif ++ ++#ifdef CONFIG_PROC_DEBUG ++#include ++ ++int proc_get_drv_version(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_log_level(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, ++ "log_level:%d\n", ++ GlobalDebugLevel ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_log_level(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 is_signal_dbg; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &is_signal_dbg); ++ ++ if( is_signal_dbg >= 0 && is_signal_dbg < 10 ) ++ { ++ GlobalDebugLevel= is_signal_dbg; ++ printk("%d\n", GlobalDebugLevel); ++ } ++ } ++ ++ return count; ++ ++} ++ ++#ifdef DBG_MEM_ALLOC ++int proc_get_mstat(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ int len = 0; ++ ++ len += _rtw_mstat_dump(page+len, count-len); ++ *eof = 1; ++ ++ return len; ++} ++#endif /* DBG_MEM_ALLOC */ ++ ++int proc_get_write_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ *eof = 1; ++ return 0; ++} ++ ++int proc_set_write_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 addr, val, len; ++ ++ if (count < 3) ++ { ++ DBG_871X("argument size is less than 3\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); ++ ++ if (num != 3) { ++ DBG_871X("invalid write_reg parameter!\n"); ++ return count; ++ } ++ ++ switch(len) ++ { ++ case 1: ++ rtw_write8(padapter, addr, (u8)val); ++ break; ++ case 2: ++ rtw_write16(padapter, addr, (u16)val); ++ break; ++ case 4: ++ rtw_write32(padapter, addr, val); ++ break; ++ default: ++ DBG_871X("error write length=%d", len); ++ break; ++ } ++ ++ } ++ ++ return count; ++ ++} ++ ++static u32 proc_get_read_addr=0xeeeeeeee; ++static u32 proc_get_read_len=0x4; ++ ++int proc_get_read_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ int len = 0; ++ ++ if(proc_get_read_addr==0xeeeeeeee) ++ { ++ *eof = 1; ++ return len; ++ } ++ ++ switch(proc_get_read_len) ++ { ++ case 1: ++ len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr)); ++ break; ++ case 2: ++ len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr)); ++ break; ++ case 4: ++ len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr)); ++ break; ++ default: ++ len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len); ++ break; ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_set_read_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ char tmp[16]; ++ u32 addr, len; ++ ++ if (count < 2) ++ { ++ DBG_871X("argument size is less than 2\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %x", &addr, &len); ++ ++ if (num != 2) { ++ DBG_871X("invalid read_reg parameter!\n"); ++ return count; ++ } ++ ++ proc_get_read_addr = addr; ++ ++ proc_get_read_len = len; ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_fwstate(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv)); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_sec_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", ++ psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_mlmext_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_qos_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_ht_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rf_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n" ++ "oper_ch=%d, oper_bw=%d, oper_ch_offet=%d\n", ++ pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ++ rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); ++ *eof = 1; ++ ++ return len; ++} ++ ++int proc_get_ap_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct sta_info *psta; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ int len = 0; ++ ++ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(psta) ++ { ++ int i; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++ len += snprintf(page + len, count - len, "SSID=%s\n", cur_network->network.Ssid.Ssid); ++ len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ len += snprintf(page + len, count - len, "cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ ++ for(i=0;i<16;i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ if(preorder_ctrl->enable) ++ { ++ len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ else ++ { ++ len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_adapter_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n", ++ padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_trx_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ int i; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ struct hw_xmit *phwxmit; ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d" ++ ", free_ext_xmitbuf_cnt=%d, free_xframe_ext_cnt=%d" ++ ", free_recvframe_cnt=%d\n", ++ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, ++ pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt, ++ precvpriv->free_recvframe_cnt); ++#ifdef CONFIG_USB_HCI ++ len += snprintf(page + len, count - len, "rx_urb_pending_cnt=%d\n", precvpriv->rx_pending_cnt); ++#endif ++ ++ len += snprintf(page + len, count - len, "recvbuf_skb_alloc_fail_cnt=%d\n", precvpriv->recvbuf_skb_alloc_fail_cnt); ++ len += snprintf(page + len, count - len, "recvbuf_null_cnt=%d\n", precvpriv->recvbuf_null_cnt); ++ len += snprintf(page + len, count - len, "read_port_complete_EINPROGRESS_cnt=%d\n", precvpriv->read_port_complete_EINPROGRESS_cnt); ++ len += snprintf(page + len, count - len, "read_port_complete_other_urb_err_cnt=%d\n", precvpriv->read_port_complete_other_urb_err_cnt); ++ len += snprintf(page + len, count - len, "hw_init_completed=%d\n", padapter->hw_init_completed); ++#ifdef CONFIG_USB_HCI ++ len += snprintf(page + len, count - len, "continual_urb_error=%d\n", atomic_read(&pdvobj->continual_urb_error)); ++#endif ++ ++ for(i = 0; i < 4; i++) ++ { ++ phwxmit = pxmitpriv->hwxmits + i; ++ len += snprintf(page + len, count - len, "%d, hwq.accnt=%d\n", i, phwxmit->accnt); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++ ++ ++int proc_get_mac_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_mac_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ memset(page, 0, count); ++ for(i=0x300;i<0x600;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_mac_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ ++ for(i=0x600;i<0x800;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_bb_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0x800;i<0xB00;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_bb_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0xB00;i<0xE00;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_bb_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0xE00;i<0x1000;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rf_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 1; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0;i<0xC0;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 1; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0xC0;i<0x100;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 2; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0;i<0xC0;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump4(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 2; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0xC0;i<0x100;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++ ++ ++int proc_get_rx_signal(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, ++ "rssi:%d\n" ++ "rxpwdb:%d\n" ++ "signal_strength:%u\n" ++ "signal_qual:%u\n" ++ "noise:%u\n", ++ padapter->recvpriv.rssi, ++ padapter->recvpriv.rxpwdb, ++ padapter->recvpriv.signal_strength, ++ padapter->recvpriv.signal_qual, ++ padapter->recvpriv.noise ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_rx_signal(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 is_signal_dbg, signal_strength; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); ++ ++ is_signal_dbg = is_signal_dbg==0?0:1; ++ ++ if(is_signal_dbg && num!=2) ++ return count; ++ ++ signal_strength = signal_strength>100?100:signal_strength; ++ signal_strength = signal_strength<0?0:signal_strength; ++ ++ padapter->recvpriv.is_signal_dbg = is_signal_dbg; ++ padapter->recvpriv.signal_strength_dbg=signal_strength; ++ ++ if(is_signal_dbg) ++ DBG_871X("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength); ++ else ++ DBG_871X("set %s\n", "HW_SIGNAL_STRENGTH"); ++ ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_ht_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->ht_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_ht_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 2 ) ++ { ++ pregpriv->ht_enable= mode; ++ printk("ht_enable=%d\n", pregpriv->ht_enable); ++ } ++ } ++ ++ return count; ++ ++} ++ ++ ++int proc_get_cbw40_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->cbw40_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_cbw40_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 2 ) ++ { ++ pregpriv->cbw40_enable= mode; ++ printk("cbw40_enable=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_ampdu_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->ampdu_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_ampdu_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 3 ) ++ { ++ pregpriv->ampdu_enable= mode; ++ printk("ampdu_enable=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ ++ ++int proc_get_two_path_rssi(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ int len = 0; ++ ++ if(padapter) ++ len += snprintf(page + len, count - len, ++ "%d %d\n", ++ padapter->recvpriv.RxRssi[0], ++ padapter->recvpriv.RxRssi[1] ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rx_stbc(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->rx_stbc ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_rx_stbc(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && (mode == 0 || mode == 1|| mode == 2|| mode == 3)) ++ { ++ pregpriv->rx_stbc= mode; ++ printk("rx_stbc=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_vid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 VID=0; ++ int len = 0; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_VID, (u8 *)&VID); ++ len += snprintf(page + len, count - len, ++ "%04x\n", ++ VID ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_pid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 PID=0; ++ int len = 0; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_PID, (u8 *)&PID); ++ len += snprintf(page + len, count - len, ++ "%04x\n", ++ PID ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rssi_disp(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ *eof = 1; ++ return 0; ++} ++ ++int proc_set_rssi_disp(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 enable=0; ++ ++ if (count < 1) ++ { ++ DBG_8192C("argument size is less than 1\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x", &enable); ++ ++ if (num != 1) { ++ DBG_8192C("invalid set_rssi_disp parameter!\n"); ++ return count; ++ } ++ ++ if(enable) ++ { ++ DBG_8192C("Turn On Rx RSSI Display Function\n"); ++ padapter->bRxRSSIDisplay = enable ; ++ } ++ else ++ { ++ DBG_8192C("Turn Off Rx RSSI Display Function\n"); ++ padapter->bRxRSSIDisplay = 0 ; ++ } ++ ++ } ++ ++ return count; ++ ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++int proc_get_all_sta_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ _irqL irqL; ++ struct sta_info *psta; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ int i, j; ++ _list *plist, *phead; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ int len = 0; ++ ++ ++ len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ //if(extra_arg == psta->aid) ++ { ++ len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len); ++ len += snprintf(page + len, count - len, "capability=0x%x\n", psta->capability); ++ len += snprintf(page + len, count - len, "flags=0x%x\n", psta->flags); ++ len += snprintf(page + len, count - len, "wpa_psk=0x%x\n", psta->wpa_psk); ++ len += snprintf(page + len, count - len, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); ++ len += snprintf(page + len, count - len, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); ++ len += snprintf(page + len, count - len, "qos_info=0x%x\n", psta->qos_info); ++ len += snprintf(page + len, count - len, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); ++ ++ for(j=0;j<16;j++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[j]; ++ if(preorder_ctrl->enable) ++ { ++ len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#include ++extern atomic_t _malloc_cnt;; ++extern atomic_t _malloc_size;; ++ ++int proc_get_malloc_cnt(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt)); ++ len += snprintf(page + len, count - len, "_malloc_size=%d\n", atomic_read(&_malloc_size)); ++ ++ *eof = 1; ++ return len; ++} ++#endif /* DBG_MEMORY_LEAK */ ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++int proc_get_best_channel(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int len = 0; ++ u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ if ( pmlmeext->channel_set[i].ChannelNum == 1) ++ index_24G = i; ++ if ( pmlmeext->channel_set[i].ChannelNum == 36) ++ index_5G = i; ++ } ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ // 2.4G ++ if ( pmlmeext->channel_set[i].ChannelNum == 6 ) { ++ if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) { ++ index_24G = i; ++ best_channel_24G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ // 5G ++ if ( pmlmeext->channel_set[i].ChannelNum >= 36 ++ && pmlmeext->channel_set[i].ChannelNum < 140 ) { ++ // Find primary channel ++ if ( (( pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ if ( pmlmeext->channel_set[i].ChannelNum >= 149 ++ && pmlmeext->channel_set[i].ChannelNum < 165) { ++ // find primary channel ++ if ( (( pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++#if 1 // debug ++ len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n", ++ pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count); ++#endif ++ } ++ ++ len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G); ++ len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_set_best_channel(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ char tmp[32]; ++ ++ if(count < 1) ++ return -EFAULT; ++ ++ if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) ++ { ++ int i; ++ for(i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) ++ { ++ pmlmeext->channel_set[i].rx_count = 0; ++ } ++ ++ DBG_871X("set %s\n", "Clean Best Channel Count"); ++ } ++ ++ return count; ++} ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++#include ++int proc_get_sreset(char *page, char **start, off_t offset, int count, int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_sreset(struct file *file, const char *buffer, unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ s32 trigger_point; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d", &trigger_point); ++ ++ if (trigger_point == SRESET_TGP_NULL) ++ rtw_hal_sreset_reset(padapter); ++ else ++ sreset_set_trigger_point(padapter, trigger_point); ++ } ++ ++ return count; ++ ++} ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++int proc_get_dm_adaptivity(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ ++ len += dm_adaptivity_get_parm_str(padapter, page, count); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_dm_adaptivity(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 TH_L2H_ini; ++ s8 TH_EDCCA_HL_diff; ++ u32 IGI_Base; ++ int ForceEDCCA; ++ u8 AdapEn_RSSI; ++ u8 IGI_LowerBound; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %hhd %x %d %hhu %hhu", ++ &TH_L2H_ini, &TH_EDCCA_HL_diff, &IGI_Base, &ForceEDCCA, &AdapEn_RSSI, &IGI_LowerBound); ++ ++ if (num != 6) ++ return count; ++ ++ dm_adaptivity_set_parm(padapter, (s8)TH_L2H_ini, TH_EDCCA_HL_diff, (s8)IGI_Base, (bool)ForceEDCCA, AdapEn_RSSI, IGI_LowerBound); ++ } ++ ++ return count; ++} ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_eeprom.c +@@ -0,0 +1,423 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_EEPROM_C_ ++ ++#include ++#include ++#include ++ ++void up_clk(_adapter* padapter, u16 *x) ++{ ++_func_enter_; ++ *x = *x | _EESK; ++ rtw_write8(padapter, EE_9346CR, (u8)*x); ++ rtw_udelay_os(CLOCK_RATE); ++ ++_func_exit_; ++ ++} ++ ++void down_clk(_adapter * padapter, u16 *x ) ++{ ++_func_enter_; ++ *x = *x & ~_EESK; ++ rtw_write8(padapter, EE_9346CR, (u8)*x); ++ rtw_udelay_os(CLOCK_RATE); ++_func_exit_; ++} ++ ++void shift_out_bits(_adapter * padapter, u16 data, u16 count) ++{ ++ u16 x,mask; ++_func_enter_; ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ mask = 0x01 << (count - 1); ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDO | _EEDI); ++ ++ do ++ { ++ x &= ~_EEDI; ++ if(data & mask) ++ x |= _EEDI; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++ rtw_udelay_os(CLOCK_RATE); ++ up_clk(padapter, &x); ++ down_clk(padapter, &x); ++ mask = mask >> 1; ++ } while(mask); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x &= ~_EEDI; ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++out: ++_func_exit_; ++} ++ ++u16 shift_in_bits (_adapter * padapter) ++{ ++ u16 x,d=0,i; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~( _EEDO | _EEDI); ++ d = 0; ++ ++ for(i=0; i<16; i++) ++ { ++ d = d << 1; ++ up_clk(padapter, &x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDI); ++ if(x & _EEDO) ++ d |= 1; ++ ++ down_clk(padapter, &x); ++ } ++out: ++_func_exit_; ++ ++ return d; ++} ++ ++void standby(_adapter * padapter ) ++{ ++ u8 x; ++_func_enter_; ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EECS | _EESK); ++ rtw_write8(padapter, EE_9346CR,x); ++ ++ rtw_udelay_os(CLOCK_RATE); ++ x |= _EECS; ++ rtw_write8(padapter, EE_9346CR, x); ++ rtw_udelay_os(CLOCK_RATE); ++_func_exit_; ++} ++ ++u16 wait_eeprom_cmd_done(_adapter* padapter) ++{ ++ u8 x; ++ u16 i,res=_FALSE; ++_func_enter_; ++ standby(padapter ); ++ for (i=0; i<200; i++) ++ { ++ x = rtw_read8(padapter, EE_9346CR); ++ if (x & _EEDO){ ++ res=_TRUE; ++ goto exit; ++ } ++ rtw_udelay_os(CLOCK_RATE); ++ } ++exit: ++_func_exit_; ++ return res; ++} ++ ++void eeprom_clean(_adapter * padapter) ++{ ++ u16 x; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x &= ~(_EECS | _EEDI); ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ up_clk(padapter, &x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ down_clk(padapter, &x); ++out: ++_func_exit_; ++} ++ ++void eeprom_write16(_adapter * padapter, u16 reg, u16 data) ++{ ++ u8 x; ++#ifdef CONFIG_RTL8712 ++ u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; ++ tmp8_ori=rtw_read8(padapter, 0x102502f1); ++ tmp8_new=tmp8_ori & 0xf7; ++ if(tmp8_ori != tmp8_new){ ++ rtw_write8(padapter, 0x102502f1, tmp8_new); ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); ++ } ++ tmp8_clk_ori=rtw_read8(padapter,0x10250003); ++ tmp8_clk_new=tmp8_clk_ori|0x20; ++ if(tmp8_clk_new!=tmp8_clk_ori){ ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); ++ rtw_write8(padapter, 0x10250003, tmp8_clk_new); ++ } ++#endif ++_func_enter_; ++ ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, x); ++ ++ shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5); ++ ++ if(padapter->EepromAddressSize==8) //CF+ and SDIO ++ shift_out_bits(padapter, 0, 6); ++ else //USB ++ shift_out_bits(padapter, 0, 4); ++ ++ standby( padapter); ++ ++// Commented out by rcnjko, 2004.0 ++// // Erase this particular word. Write the erase opcode and register ++// // number in that order. The opcode is 3bits in length; reg is 6 bits long. ++// shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3); ++// shift_out_bits(Adapter, reg, Adapter->EepromAddressSize); ++// ++// if (wait_eeprom_cmd_done(Adapter ) == FALSE) ++// { ++// return; ++// } ++ ++ ++ standby(padapter ); ++ ++ // write the new word to the EEPROM ++ ++ // send the write opcode the EEPORM ++ shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3); ++ ++ // select which word in the EEPROM that we are writing to. ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ // write the data to the selected EEPROM word. ++ shift_out_bits(padapter, data, 16); ++ ++ if (wait_eeprom_cmd_done(padapter ) == _FALSE) ++ { ++ ++ goto exit; ++ } ++ ++ standby(padapter ); ++ ++ shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5); ++ shift_out_bits(padapter, reg, 4); ++ ++ eeprom_clean(padapter ); ++exit: ++#ifdef CONFIG_RTL8712 ++ if(tmp8_clk_new!=tmp8_clk_ori) ++ rtw_write8(padapter, 0x10250003, tmp8_clk_ori); ++ if(tmp8_new!=tmp8_ori) ++ rtw_write8(padapter, 0x102502f1, tmp8_ori); ++ ++#endif ++_func_exit_; ++ return; ++} ++ ++u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom ++{ ++ ++ u16 x; ++ u16 data=0; ++#ifdef CONFIG_RTL8712 ++ u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; ++ tmp8_ori= rtw_read8(padapter, 0x102502f1); ++ tmp8_new = tmp8_ori & 0xf7; ++ if(tmp8_ori != tmp8_new){ ++ rtw_write8(padapter, 0x102502f1, tmp8_new); ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); ++ } ++ tmp8_clk_ori=rtw_read8(padapter,0x10250003); ++ tmp8_clk_new=tmp8_clk_ori|0x20; ++ if(tmp8_clk_new!=tmp8_clk_ori){ ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); ++ rtw_write8(padapter, 0x10250003, tmp8_clk_new); ++ } ++#endif ++_func_enter_; ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ // select EEPROM, reset bits, set _EECS ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, (unsigned char)x); ++ ++ // write the read opcode and register number in that order ++ // The opcode is 3bits in length, reg is 6 bits long ++ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ // Now read the data (16 bits) in from the selected EEPROM word ++ data = shift_in_bits(padapter); ++ ++ eeprom_clean(padapter); ++out: ++#ifdef CONFIG_RTL8712 ++ if(tmp8_clk_new!=tmp8_clk_ori) ++ rtw_write8(padapter, 0x10250003, tmp8_clk_ori); ++ if(tmp8_new!=tmp8_ori) ++ rtw_write8(padapter, 0x102502f1, tmp8_ori); ++ ++#endif ++_func_exit_; ++ return data; ++ ++ ++} ++ ++ ++ ++ ++//From even offset ++void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz) ++{ ++ ++ u16 x, data16; ++ u32 i; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ // select EEPROM, reset bits, set _EECS ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, (unsigned char)x); ++ ++ // write the read opcode and register number in that order ++ // The opcode is 3bits in length, reg is 6 bits long ++ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ ++ for(i=0; i>8; ++ } ++ ++ eeprom_clean(padapter); ++out: ++_func_exit_; ++ ++ ++ ++} ++ ++ ++//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) ++u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf) ++{ ++ u8 quotient, remainder, addr_2align_odd; ++ u16 reg, stmp , i=0, idx = 0; ++_func_enter_; ++ reg = (u16)(addr_off >> 1); ++ addr_2align_odd = (u8)(addr_off & 0x1); ++ ++ if(addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,... ++ { ++ stmp = eeprom_read16(padapter, reg); ++ rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short ++ reg++; sz--; ++ } ++ ++ quotient = sz >> 1; ++ remainder = sz & 0x1; ++ ++ for( i=0 ; i < quotient; i++) ++ { ++ stmp = eeprom_read16(padapter, reg+i); ++ rbuf[idx++] = (u8) (stmp&0xff); ++ rbuf[idx++] = (u8) ((stmp>>8)&0xff); ++ } ++ ++ reg = reg+i; ++ if(remainder){ //end of read at lower part of short : 0,2,4,6,... ++ stmp = eeprom_read16(padapter, reg); ++ rbuf[idx] = (u8)(stmp & 0xff); ++ } ++_func_exit_; ++ return _TRUE; ++} ++ ++ ++ ++VOID read_eeprom_content(_adapter * padapter) ++{ ++ ++_func_enter_; ++ ++ ++_func_exit_; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_ieee80211.c +@@ -0,0 +1,1916 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IEEE80211_C ++ ++#include ++#include ++#include ++#include ++#include ++ ++u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; ++u16 RTW_WPA_VERSION = 1; ++u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 }; ++u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 }; ++u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 }; ++u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 }; ++u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 }; ++u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; ++u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; ++ ++u16 RSN_VERSION_BSD = 1; ++u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 }; ++u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 }; ++u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; ++u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; ++u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; ++u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; ++u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; ++u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; ++//----------------------------------------------------------- ++// for adhoc-master to generate ie and provide supported-rate to fw ++//----------------------------------------------------------- ++ ++static u8 WIFI_CCKRATES[] = ++{(IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK)}; ++ ++static u8 WIFI_OFDMRATES[] = ++{(IEEE80211_OFDM_RATE_6MB), ++ (IEEE80211_OFDM_RATE_9MB), ++ (IEEE80211_OFDM_RATE_12MB), ++ (IEEE80211_OFDM_RATE_18MB), ++ (IEEE80211_OFDM_RATE_24MB), ++ IEEE80211_OFDM_RATE_36MB, ++ IEEE80211_OFDM_RATE_48MB, ++ IEEE80211_OFDM_RATE_54MB}; ++ ++ ++int rtw_get_bit_value_from_ieee_value(u8 val) ++{ ++ unsigned char dot11_rate_table[]={2,4,11,22,12,18,24,36,48,72,96,108,0}; // last element must be zero!! ++ ++ int i=0; ++ while(dot11_rate_table[i] != 0) { ++ if (dot11_rate_table[i] == val) ++ return BIT(i); ++ i++; ++ } ++ return 0; ++} ++ ++uint rtw_is_cckrates_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ i++; ++ } ++ ++ return _FALSE; ++} ++ ++uint rtw_is_cckratesonly_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ ++ return _FALSE; ++ ++ i++; ++ } ++ ++ return _TRUE; ++ ++} ++ ++int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) ++{ ++ if (channel > 14) ++ { ++ if ((rtw_is_cckrates_included(rate)) == _TRUE) ++ return WIRELESS_INVALID; ++ else ++ return WIRELESS_11A; ++ } ++ else // could be pure B, pure G, or B/G ++ { ++ if ((rtw_is_cckratesonly_included(rate)) == _TRUE) ++ return WIRELESS_11B; ++ else if((rtw_is_cckrates_included(rate)) == _TRUE) ++ return WIRELESS_11BG; ++ else ++ return WIRELESS_11G; ++ } ++ ++} ++ ++u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, ++ unsigned int *frlen) ++{ ++ _rtw_memcpy((void *)pbuf, (void *)source, len); ++ *frlen = *frlen + len; ++ return (pbuf + len); ++} ++ ++// rtw_set_ie will update frame length ++u8 *rtw_set_ie ++( ++ u8 *pbuf, ++ sint index, ++ uint len, ++ u8 *source, ++ uint *frlen //frame length ++) ++{ ++_func_enter_; ++ *pbuf = (u8)index; ++ ++ *(pbuf + 1) = (u8)len; ++ ++ if (len > 0) ++ _rtw_memcpy((void *)(pbuf + 2), (void *)source, len); ++ ++ *frlen = *frlen + (len + 2); ++ ++ return (pbuf + len + 2); ++_func_exit_; ++} ++ ++inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, ++ u8 new_ch, u8 ch_switch_cnt) ++{ ++ u8 ie_data[3]; ++ ++ ie_data[0] = ch_switch_mode; ++ ie_data[1] = new_ch; ++ ie_data[2] = ch_switch_cnt; ++ return rtw_set_ie(buf, WLAN_EID_CHANNEL_SWITCH, 3, ie_data, buf_len); ++} ++ ++inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset) ++{ ++ if (ch_offset == SCN) ++ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ else if(ch_offset == SCA) ++ return HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(ch_offset == SCB) ++ return HAL_PRIME_CHNL_OFFSET_LOWER; ++ ++ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++} ++ ++inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset) ++{ ++ if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ++ return SCN; ++ else if(ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ return SCB; ++ else if(ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) ++ return SCA; ++ ++ return SCN; ++} ++ ++inline u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset) ++{ ++ return rtw_set_ie(buf, WLAN_EID_SECONDARY_CHANNEL_OFFSET, 1, &secondary_ch_offset, buf_len); ++} ++ ++inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, ++ u8 flags, u16 reason, u16 precedence) ++{ ++ u8 ie_data[6]; ++ ++ ie_data[0] = ttl; ++ ie_data[1] = flags; ++ RTW_PUT_LE16((u8*)&ie_data[2], reason); ++ RTW_PUT_LE16((u8*)&ie_data[4], precedence); ++ ++ return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len); ++} ++ ++/*---------------------------------------------------------------------------- ++index: the information element id index, limit is the limit for search ++-----------------------------------------------------------------------------*/ ++u8 *rtw_get_ie(u8 *pbuf, sint index, sint *len, sint limit) ++{ ++ sint tmp,i; ++ u8 *p; ++_func_enter_; ++ if (limit < 1){ ++ _func_exit_; ++ return NULL; ++ } ++ ++ p = pbuf; ++ i = 0; ++ *len = 0; ++ while(1) ++ { ++ if (*p == index) ++ { ++ *len = *(p + 1); ++ return (p); ++ } ++ else ++ { ++ tmp = *(p + 1); ++ p += (tmp + 2); ++ i += (tmp + 2); ++ } ++ if (i >= limit) ++ break; ++ } ++_func_exit_; ++ return NULL; ++} ++ ++/** ++ * rtw_get_ie_ex - Search specific IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @eid: Element ID to match ++ * @oui: OUI to match ++ * @oui_len: OUI length ++ * @ie: If not NULL and the specific IE is found, the IE will be copied to the buf starting from the specific IE ++ * @ielen: If not NULL and the specific IE is found, will set to the length of the entire IE ++ * ++ * Returns: The address of the specific IE found, or NULL ++ */ ++u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen) ++{ ++ uint cnt; ++ u8 *target_ie = NULL; ++ ++ ++ if(ielen) ++ *ielen = 0; ++ ++ if(!in_ie || in_len<=0) ++ return target_ie; ++ ++ cnt = 0; ++ ++ while(cnt 12) ++ break; ++ ++ i++; ++ } ++_func_exit_; ++ return i; ++} ++ ++int rtw_generate_ie(struct registry_priv *pregistrypriv) ++{ ++ u8 wireless_mode; ++ int sz = 0, rateLen; ++ WLAN_BSSID_EX* pdev_network = &pregistrypriv->dev_network; ++ u8* ie = pdev_network->IEs; ++ ++_func_enter_; ++ ++ //timestamp will be inserted by hardware ++ sz += 8; ++ ie += sz; ++ ++ //beacon interval : 2bytes ++ *(u16*)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod);//BCN_INTERVAL; ++ sz += 2; ++ ie += 2; ++ ++ //capability info ++ *(u16*)ie = 0; ++ ++ *(u16*)ie |= cpu_to_le16(cap_IBSS); ++ ++ if(pregistrypriv->preamble == PREAMBLE_SHORT) ++ *(u16*)ie |= cpu_to_le16(cap_ShortPremble); ++ ++ if (pdev_network->Privacy) ++ *(u16*)ie |= cpu_to_le16(cap_Privacy); ++ ++ sz += 2; ++ ie += 2; ++ ++ //SSID ++ ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); ++ ++ //supported rates ++ if(pregistrypriv->wireless_mode == WIRELESS_11ABGN) ++ { ++ if(pdev_network->Configuration.DSConfig > 14) ++ wireless_mode = WIRELESS_11A_5N; ++ else ++ wireless_mode = WIRELESS_11BG_24N; ++ } ++ else ++ { ++ wireless_mode = pregistrypriv->wireless_mode; ++ } ++ ++ rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ; ++ ++ rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); ++ ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz); ++ //ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); ++ } ++ else ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz); ++ } ++ ++ //DS parameter set ++ ie = rtw_set_ie(ie, _DSSET_IE_, 1, (u8 *)&(pdev_network->Configuration.DSConfig), &sz); ++ ++ ++ //IBSS Parameter Set ++ ++ ie = rtw_set_ie(ie, _IBSS_PARA_IE_, 2, (u8 *)&(pdev_network->Configuration.ATIMWindow), &sz); ++ ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); ++ } ++ ++ ++ //HT Cap. ++ if(((pregistrypriv->wireless_mode&WIRELESS_11_5N)||(pregistrypriv->wireless_mode&WIRELESS_11_24N)) ++ && (pregistrypriv->ht_enable==_TRUE)) ++ { ++ //todo: ++ } ++ ++ //pdev_network->IELength = sz; //update IELength ++ ++_func_exit_; ++ ++ //return _SUCCESS; ++ ++ return sz; ++ ++} ++ ++unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) ++{ ++ int len; ++ u16 val16; ++ unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01}; ++ u8 *pbuf = pie; ++ ++ while(1) ++ { ++ pbuf = rtw_get_ie(pbuf, _WPA_IE_ID_, &len, limit); ++ ++ if (pbuf) { ++ ++ //check if oui matches... ++ if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof (wpa_oui_type)) == _FALSE) { ++ ++ goto check_next_ie; ++ } ++ ++ //check version... ++ _rtw_memcpy((u8 *)&val16, (pbuf + 6), sizeof(val16)); ++ ++ val16 = le16_to_cpu(val16); ++ if (val16 != 0x0001) ++ goto check_next_ie; ++ ++ *wpa_ie_len = *(pbuf + 1); ++ ++ return pbuf; ++ } ++ else { ++ ++ *wpa_ie_len = 0; ++ return NULL; ++ } ++ ++check_next_ie: ++ ++ limit -= (2 + len); ++ ++ if (limit <= 0) ++ break; ++ ++ pbuf += (2 + len); ++ } ++ ++ *wpa_ie_len = 0; ++ ++ return NULL; ++} ++ ++unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit) ++{ ++ ++ return rtw_get_ie(pie, _WPA2_IE_ID_,rsn_ie_len, limit); ++ ++} ++ ++int rtw_get_wpa_cipher_suite(u8 *s) ++{ ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_NONE; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP40; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_TKIP; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_CCMP; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP104; ++ ++ return 0; ++} ++ ++int rtw_get_wpa2_cipher_suite(u8 *s) ++{ ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_NONE; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP40; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_TKIP; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_CCMP; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP104; ++ ++ return 0; ++} ++ ++ ++int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher) ++{ ++ int i, ret=_SUCCESS; ++ int left, count; ++ u8 *pos; ++ ++ if (wpa_ie_len <= 0) { ++ /* No WPA IE - fail silently */ ++ return _FAIL; ++ } ++ ++ ++ if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie+1) != (u8)(wpa_ie_len - 2)) || ++ (_rtw_memcmp(wpa_ie+2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN) != _TRUE) ) ++ { ++ return _FAIL; ++ } ++ ++ pos = wpa_ie; ++ ++ pos += 8; ++ left = wpa_ie_len - 8; ++ ++ ++ //group_cipher ++ if (left >= WPA_SELECTOR_LEN) { ++ ++ *group_cipher = rtw_get_wpa_cipher_suite(pos); ++ ++ pos += WPA_SELECTOR_LEN; ++ left -= WPA_SELECTOR_LEN; ++ ++ } ++ else if (left > 0) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); ++ ++ return _FAIL; ++ } ++ ++ ++ //pairwise_cipher ++ if (left >= 2) ++ { ++ //count = le16_to_cpu(*(u16*)pos); ++ count = RTW_GET_LE16(pos); ++ pos += 2; ++ left -= 2; ++ ++ if (count == 0 || left < count * WPA_SELECTOR_LEN) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " ++ "count %u left %u", __FUNCTION__, count, left)); ++ return _FAIL; ++ } ++ ++ for (i = 0; i < count; i++) ++ { ++ *pairwise_cipher |= rtw_get_wpa_cipher_suite(pos); ++ ++ pos += WPA_SELECTOR_LEN; ++ left -= WPA_SELECTOR_LEN; ++ } ++ ++ } ++ else if (left == 1) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); ++ return _FAIL; ++ } ++ ++ ++ return ret; ++ ++} ++ ++int rtw_parse_wpa2_ie(u8* rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher) ++{ ++ int i, ret=_SUCCESS; ++ int left, count; ++ u8 *pos; ++ ++ if (rsn_ie_len <= 0) { ++ /* No RSN IE - fail silently */ ++ return _FAIL; ++ } ++ ++ ++ if ((*rsn_ie!= _WPA2_IE_ID_) || (*(rsn_ie+1) != (u8)(rsn_ie_len - 2))) ++ { ++ return _FAIL; ++ } ++ ++ pos = rsn_ie; ++ pos += 4; ++ left = rsn_ie_len - 4; ++ ++ //group_cipher ++ if (left >= RSN_SELECTOR_LEN) { ++ ++ *group_cipher = rtw_get_wpa2_cipher_suite(pos); ++ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ ++ } else if (left > 0) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); ++ return _FAIL; ++ } ++ ++ //pairwise_cipher ++ if (left >= 2) ++ { ++ //count = le16_to_cpu(*(u16*)pos); ++ count = RTW_GET_LE16(pos); ++ pos += 2; ++ left -= 2; ++ ++ if (count == 0 || left < count * RSN_SELECTOR_LEN) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " ++ "count %u left %u", __FUNCTION__, count, left)); ++ return _FAIL; ++ } ++ ++ for (i = 0; i < count; i++) ++ { ++ *pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos); ++ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ } ++ ++ } ++ else if (left == 1) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); ++ ++ return _FAIL; ++ } ++ ++ ++ return ret; ++ ++} ++ ++int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len) ++{ ++ u8 authmode, sec_idx, i; ++ u8 wpa_oui[4]={0x0,0x50,0xf2,0x01}; ++ uint cnt; ++ ++_func_enter_; ++ ++ //Search required WPA or WPA2 IE and copy to sec_ie[ ] ++ ++ cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_); ++ ++ sec_idx=0; ++ ++ while(cnt found WPS_IE.....\n"); ++ *wps_ielen = ie_ptr[1]+2; ++ match=_TRUE; ++ } ++ return match; ++} ++ ++/** ++ * rtw_get_wps_ie - Search WPS IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the buf starting from wps_ie ++ * @wps_ielen: If not NULL and WPS IE is found, will set to the length of the entire WPS IE ++ * ++ * Returns: The address of the WPS IE found, or NULL ++ */ ++u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) ++{ ++ uint cnt; ++ u8 *wpsie_ptr=NULL; ++ u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ if(wps_ielen) ++ *wps_ielen = 0; ++ ++ if(!in_ie || in_len<=0) ++ return wpsie_ptr; ++ ++ cnt = 0; ++ ++ while(cntwpa_ie = pos; ++ elems->wpa_ie_len = elen; ++ break; ++ case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */ ++ if (elen < 5) { ++ DBG_871X("short WME " ++ "information element ignored " ++ "(len=%lu)\n", ++ (unsigned long) elen); ++ return -1; ++ } ++ switch (pos[4]) { ++ case WME_OUI_SUBTYPE_INFORMATION_ELEMENT: ++ case WME_OUI_SUBTYPE_PARAMETER_ELEMENT: ++ elems->wme = pos; ++ elems->wme_len = elen; ++ break; ++ case WME_OUI_SUBTYPE_TSPEC_ELEMENT: ++ elems->wme_tspec = pos; ++ elems->wme_tspec_len = elen; ++ break; ++ default: ++ DBG_871X("unknown WME " ++ "information element ignored " ++ "(subtype=%d len=%lu)\n", ++ pos[4], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ case 4: ++ /* Wi-Fi Protected Setup (WPS) IE */ ++ elems->wps_ie = pos; ++ elems->wps_ie_len = elen; ++ break; ++ default: ++ DBG_871X("Unknown Microsoft " ++ "information element ignored " ++ "(type=%d len=%lu)\n", ++ pos[3], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ ++ case OUI_BROADCOM: ++ switch (pos[3]) { ++ case VENDOR_HT_CAPAB_OUI_TYPE: ++ elems->vendor_ht_cap = pos; ++ elems->vendor_ht_cap_len = elen; ++ break; ++ default: ++ DBG_871X("Unknown Broadcom " ++ "information element ignored " ++ "(type=%d len=%lu)\n", ++ pos[3], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ ++ default: ++ DBG_871X("unknown vendor specific information " ++ "element ignored (vendor OUI %02x:%02x:%02x " ++ "len=%lu)\n", ++ pos[0], pos[1], pos[2], (unsigned long) elen); ++ return -1; ++ } ++ ++ return 0; ++ ++} ++ ++/** ++ * ieee802_11_parse_elems - Parse information elements in management frames ++ * @start: Pointer to the start of IEs ++ * @len: Length of IE buffer in octets ++ * @elems: Data structure for parsed elements ++ * @show_errors: Whether to show parsing errors in debug log ++ * Returns: Parsing result ++ */ ++ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, ++ struct rtw_ieee802_11_elems *elems, ++ int show_errors) ++{ ++ uint left = len; ++ u8 *pos = start; ++ int unknown = 0; ++ ++ _rtw_memset(elems, 0, sizeof(*elems)); ++ ++ while (left >= 2) { ++ u8 id, elen; ++ ++ id = *pos++; ++ elen = *pos++; ++ left -= 2; ++ ++ if (elen > left) { ++ if (show_errors) { ++ DBG_871X("IEEE 802.11 element " ++ "parse failed (id=%d elen=%d " ++ "left=%lu)\n", ++ id, elen, (unsigned long) left); ++ } ++ return ParseFailed; ++ } ++ ++ switch (id) { ++ case WLAN_EID_SSID: ++ elems->ssid = pos; ++ elems->ssid_len = elen; ++ break; ++ case WLAN_EID_SUPP_RATES: ++ elems->supp_rates = pos; ++ elems->supp_rates_len = elen; ++ break; ++ case WLAN_EID_FH_PARAMS: ++ elems->fh_params = pos; ++ elems->fh_params_len = elen; ++ break; ++ case WLAN_EID_DS_PARAMS: ++ elems->ds_params = pos; ++ elems->ds_params_len = elen; ++ break; ++ case WLAN_EID_CF_PARAMS: ++ elems->cf_params = pos; ++ elems->cf_params_len = elen; ++ break; ++ case WLAN_EID_TIM: ++ elems->tim = pos; ++ elems->tim_len = elen; ++ break; ++ case WLAN_EID_IBSS_PARAMS: ++ elems->ibss_params = pos; ++ elems->ibss_params_len = elen; ++ break; ++ case WLAN_EID_CHALLENGE: ++ elems->challenge = pos; ++ elems->challenge_len = elen; ++ break; ++ case WLAN_EID_ERP_INFO: ++ elems->erp_info = pos; ++ elems->erp_info_len = elen; ++ break; ++ case WLAN_EID_EXT_SUPP_RATES: ++ elems->ext_supp_rates = pos; ++ elems->ext_supp_rates_len = elen; ++ break; ++ case WLAN_EID_VENDOR_SPECIFIC: ++ if (rtw_ieee802_11_parse_vendor_specific(pos, elen, ++ elems, ++ show_errors)) ++ unknown++; ++ break; ++ case WLAN_EID_RSN: ++ elems->rsn_ie = pos; ++ elems->rsn_ie_len = elen; ++ break; ++ case WLAN_EID_PWR_CAPABILITY: ++ elems->power_cap = pos; ++ elems->power_cap_len = elen; ++ break; ++ case WLAN_EID_SUPPORTED_CHANNELS: ++ elems->supp_channels = pos; ++ elems->supp_channels_len = elen; ++ break; ++ case WLAN_EID_MOBILITY_DOMAIN: ++ elems->mdie = pos; ++ elems->mdie_len = elen; ++ break; ++ case WLAN_EID_FAST_BSS_TRANSITION: ++ elems->ftie = pos; ++ elems->ftie_len = elen; ++ break; ++ case WLAN_EID_TIMEOUT_INTERVAL: ++ elems->timeout_int = pos; ++ elems->timeout_int_len = elen; ++ break; ++ case WLAN_EID_HT_CAP: ++ elems->ht_capabilities = pos; ++ elems->ht_capabilities_len = elen; ++ break; ++ case WLAN_EID_HT_OPERATION: ++ elems->ht_operation = pos; ++ elems->ht_operation_len = elen; ++ break; ++ default: ++ unknown++; ++ if (!show_errors) ++ break; ++ DBG_871X("IEEE 802.11 element parse " ++ "ignored unknown element (id=%d elen=%d)\n", ++ id, elen); ++ break; ++ } ++ ++ left -= elen; ++ pos += elen; ++ } ++ ++ if (left) ++ return ParseFailed; ++ ++ return unknown ? ParseUnknown : ParseOK; ++ ++} ++ ++static u8 key_char2num(u8 ch); ++static u8 key_char2num(u8 ch) ++{ ++ if((ch>='0')&&(ch<='9')) ++ return ch - '0'; ++ else if ((ch>='a')&&(ch<='f')) ++ return ch - 'a' + 10; ++ else if ((ch>='A')&&(ch<='F')) ++ return ch - 'A' + 10; ++ else ++ return 0xff; ++} ++ ++u8 str_2char2num(u8 hch, u8 lch); ++u8 str_2char2num(u8 hch, u8 lch) ++{ ++ return ((key_char2num(hch) * 10 ) + key_char2num(lch)); ++} ++ ++u8 key_2char2num(u8 hch, u8 lch); ++u8 key_2char2num(u8 hch, u8 lch) ++{ ++ return ((key_char2num(hch) << 4) | key_char2num(lch)); ++} ++ ++u8 convert_ip_addr(u8 hch, u8 mch, u8 lch) ++{ ++ return ((key_char2num(hch) * 100) + (key_char2num(mch) * 10 ) + key_char2num(lch)); ++} ++ ++extern char* rtw_initmac; ++void rtw_macaddr_cfg(u8 *mac_addr) ++{ ++ u8 mac[ETH_ALEN]; ++ if(mac_addr == NULL) return; ++ ++ if ( rtw_initmac ) ++ { // Users specify the mac address ++ int jj,kk; ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); ++ } ++ _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ } ++ else ++ { // Use the mac address stored in the Efuse ++ _rtw_memcpy(mac, mac_addr, ETH_ALEN); ++ } ++ ++ if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && ++ (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ++ ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && ++ (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) ++ { ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ mac[3] = 0x87; ++ mac[4] = 0x00; ++ mac[5] = 0x00; ++ // use default mac addresss ++ _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ DBG_871X("MAC Address from efuse error, assign default one !!!\n"); ++ } ++ ++ DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); ++} ++ ++void dump_ies(u8 *buf, u32 buf_len) { ++ u8* pos = (u8*)buf; ++ u8 id, len; ++ ++ while(pos-buf<=buf_len){ ++ id = *pos; ++ len = *(pos+1); ++ ++ DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ #ifdef CONFIG_P2P ++ dump_p2p_ie(pos, len); ++ #endif ++ dump_wps_ie(pos, len); ++ ++ pos+=(2+len); ++ } ++} ++ ++void dump_wps_ie(u8 *ie, u32 ie_len) { ++ u8* pos = (u8*)ie; ++ u16 id; ++ u16 len; ++ ++ u8 *wps_ie; ++ uint wps_ielen; ++ ++ wps_ie = rtw_get_wps_ie(ie, ie_len, NULL, &wps_ielen); ++ if(wps_ie != ie || wps_ielen == 0) ++ return; ++ ++ pos+=6; ++ while(pos-ie < ie_len){ ++ id = RTW_GET_BE16(pos); ++ len = RTW_GET_BE16(pos + 2); ++ ++ DBG_871X("%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len); ++ ++ pos+=(4+len); ++ } ++} ++ ++#ifdef CONFIG_P2P ++/** ++ * rtw_get_p2p_merged_len - Get merged ie length from muitiple p2p ies. ++ * @in_ie: Pointer of the first p2p ie ++ * @in_len: Total len of muiltiple p2p ies ++ * Returns: Length of merged p2p ie length ++ */ ++u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; ++ int i=0; ++ int j=0, len=0; ++ ++ while( i < in_len) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie+ i); ++ ++ if( pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) ++ { ++ len += pIE->Length-4; // 4 is P2P OUI length, don't count it in this loop ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return len + 4; // Append P2P OUI length at last. ++} ++ ++/** ++ * rtw_p2p_merge_ies - Merge muitiple p2p ies into one ++ * @in_ie: Pointer of the first p2p ie ++ * @in_len: Total len of muiltiple p2p ies ++ * @merge_ie: Pointer of merged ie ++ * Returns: Length of merged p2p ie ++ */ ++int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 len = 0; ++ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; ++ u8 ELOUI[6] = { 0xDD, 0x00, 0x50, 0x6f, 0x9a, 0x09 }; //EID;Len;OUI, Len would copy at the end of function ++ int i=0; ++ ++ if( merge_ie != NULL) ++ { ++ //Set first P2P OUI ++ _rtw_memcpy(merge_ie, ELOUI, 6); ++ merge_ie += 6; ++ ++ while( i < in_len) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie+ i); ++ ++ // Take out the rest of P2P OUIs ++ if( pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) ++ { ++ _rtw_memcpy( merge_ie, pIE->data +4, pIE->Length -4); ++ len += pIE->Length-4; ++ merge_ie += pIE->Length-4; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return len + 4; // 4 is for P2P OUI ++ ++ } ++ ++ return 0; ++} ++ ++void dump_p2p_ie(u8 *ie, u32 ie_len) { ++ u8* pos = (u8*)ie; ++ u8 id; ++ u16 len; ++ ++ u8 *p2p_ie; ++ uint p2p_ielen; ++ ++ p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen); ++ if(p2p_ie != ie || p2p_ielen == 0) ++ return; ++ ++ pos+=6; ++ while(pos-ie < ie_len){ ++ id = *pos; ++ len = RTW_GET_LE16(pos+1); ++ ++ DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ ++ pos+=(3+len); ++ } ++} ++ ++/** ++ * rtw_get_p2p_ie - Search P2P IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @p2p_ie: If not NULL and P2P IE is found, P2P IE will be copied to the buf starting from p2p_ie ++ * @p2p_ielen: If not NULL and P2P IE is found, will set to the length of the entire P2P IE ++ * ++ * Returns: The address of the P2P IE found, or NULL ++ */ ++u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen) ++{ ++ uint cnt = 0; ++ u8 *p2p_ie_ptr; ++ u8 eid, p2p_oui[4]={0x50,0x6F,0x9A,0x09}; ++ ++ if ( p2p_ielen != NULL ) ++ *p2p_ielen = 0; ++ ++ while(cnt MAX_IE_SZ)) { ++#ifdef PLATFORM_LINUX ++ dump_stack(); ++#endif ++ return NULL; ++ } ++ if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], p2p_oui, 4) == _TRUE ) ) ++ { ++ p2p_ie_ptr = in_ie + cnt; ++ ++ if ( p2p_ie != NULL ) ++ { ++ _rtw_memcpy( p2p_ie, &in_ie[ cnt ], in_ie[ cnt + 1 ] + 2 ); ++ } ++ ++ if ( p2p_ielen != NULL ) ++ { ++ *p2p_ielen = in_ie[ cnt + 1 ] + 2; ++ } ++ ++ return p2p_ie_ptr; ++ ++ break; ++ } ++ else ++ { ++ cnt += in_ie[ cnt + 1 ] +2; //goto next ++ } ++ ++ } ++ ++ return NULL; ++ ++} ++ ++/** ++ * rtw_get_p2p_attr - Search a specific P2P attribute from a given P2P IE ++ * @p2p_ie: Address of P2P IE to search ++ * @p2p_ielen: Length limit from p2p_ie ++ * @target_attr_id: The attribute ID of P2P attribute to search ++ * @buf_attr: If not NULL and the P2P attribute is found, P2P attribute will be copied to the buf starting from buf_attr ++ * @len_attr: If not NULL and the P2P attribute is found, will set to the length of the entire P2P attribute ++ * ++ * Returns: the address of the specific WPS attribute found, or NULL ++ */ ++u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr) ++{ ++ u8 *attr_ptr = NULL; ++ u8 *target_attr_ptr = NULL; ++ u8 p2p_oui[4]={0x50,0x6F,0x9A,0x09}; ++ ++ if(len_attr) ++ *len_attr = 0; ++ ++ if ( !p2p_ie || ( p2p_ie[0] != _VENDOR_SPECIFIC_IE_ ) || ++ ( _rtw_memcmp( p2p_ie + 2, p2p_oui , 4 ) != _TRUE ) ) ++ { ++ return attr_ptr; ++ } ++ ++ // 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) ++ attr_ptr = p2p_ie + 6; //goto first attr ++ ++ while(attr_ptr - p2p_ie < p2p_ielen) ++ { ++ // 3 = 1(Attribute ID) + 2(Length) ++ u8 attr_id = *attr_ptr; ++ u16 attr_data_len = RTW_GET_LE16(attr_ptr + 1); ++ u16 attr_len = attr_data_len + 3; ++ ++ //DBG_871X("%s attr_ptr:%p, id:%u, length:%u\n", __FUNCTION__, attr_ptr, attr_id, attr_data_len); ++ if( attr_id == target_attr_id ) ++ { ++ target_attr_ptr = attr_ptr; ++ ++ if(buf_attr) ++ _rtw_memcpy(buf_attr, attr_ptr, attr_len); ++ ++ if(len_attr) ++ *len_attr = attr_len; ++ ++ break; ++ } ++ else ++ { ++ attr_ptr += attr_len; //goto next ++ } ++ ++ } ++ ++ return target_attr_ptr; ++} ++ ++/** ++ * rtw_get_p2p_attr_content - Search a specific P2P attribute content from a given P2P IE ++ * @p2p_ie: Address of P2P IE to search ++ * @p2p_ielen: Length limit from p2p_ie ++ * @target_attr_id: The attribute ID of P2P attribute to search ++ * @buf_content: If not NULL and the P2P attribute is found, P2P attribute content will be copied to the buf starting from buf_content ++ * @len_content: If not NULL and the P2P attribute is found, will set to the length of the P2P attribute content ++ * ++ * Returns: the address of the specific P2P attribute content found, or NULL ++ */ ++u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content) ++{ ++ u8 *attr_ptr; ++ u32 attr_len; ++ ++ if(len_content) ++ *len_content = 0; ++ ++ attr_ptr = rtw_get_p2p_attr(p2p_ie, p2p_ielen, target_attr_id, NULL, &attr_len); ++ ++ if(attr_ptr && attr_len) ++ { ++ if(buf_content) ++ _rtw_memcpy(buf_content, attr_ptr+3, attr_len-3); ++ ++ if(len_content) ++ *len_content = attr_len-3; ++ ++ return attr_ptr+3; ++ } ++ ++ return NULL; ++} ++ ++u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr) ++{ ++ u32 a_len; ++ ++ *pbuf = attr_id; ++ ++ //*(u16*)(pbuf + 1) = cpu_to_le16(attr_len); ++ RTW_PUT_LE16(pbuf + 1, attr_len); ++ ++ if(pdata_attr) ++ _rtw_memcpy(pbuf + 3, pdata_attr, attr_len); ++ ++ a_len = attr_len + 3; ++ ++ return a_len; ++} ++ ++static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id) ++{ ++ u8 *target_attr; ++ u32 target_attr_len; ++ uint ielen = ielen_ori; ++ int index=0; ++ ++ while(1) { ++ target_attr=rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len); ++ if(target_attr && target_attr_len) ++ { ++ u8 *next_attr = target_attr+target_attr_len; ++ uint remain_len = ielen-(next_attr-ie); ++ //dump_ies(ie, ielen); ++ #if 0 ++ DBG_871X("[%d] ie:%p, ielen:%u\n" ++ "target_attr:%p, target_attr_len:%u\n" ++ "next_attr:%p, remain_len:%u\n" ++ , index++ ++ , ie, ielen ++ , target_attr, target_attr_len ++ , next_attr, remain_len ++ ); ++ #endif ++ ++ _rtw_memset(target_attr, 0, target_attr_len); ++ _rtw_memcpy(target_attr, next_attr, remain_len); ++ _rtw_memset(target_attr+remain_len, 0, target_attr_len); ++ *(ie+1) -= target_attr_len; ++ ielen-=target_attr_len; ++ } ++ else ++ { ++ //if(index>0) ++ // dump_ies(ie, ielen); ++ break; ++ } ++ } ++ ++ return ielen; ++} ++ ++void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) ++{ ++ u8 *p2p_ie; ++ uint p2p_ielen, p2p_ielen_ori; ++ int cnt; ++ ++ if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) ) ++ { ++ #if 0 ++ if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) { ++ DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id); ++ dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); ++ } ++ #endif ++ ++ p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id); ++ if(p2p_ielen != p2p_ielen_ori) { ++ ++ u8 *next_ie_ori = p2p_ie+p2p_ielen_ori; ++ u8 *next_ie = p2p_ie+p2p_ielen; ++ uint remain_len = bss_ex->IELength-(next_ie_ori-bss_ex->IEs); ++ ++ _rtw_memcpy(next_ie, next_ie_ori, remain_len); ++ _rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen); ++ bss_ex->IELength -= p2p_ielen_ori-p2p_ielen; ++ ++ #if 0 ++ DBG_871X("remove P2P_ATTR:%u!\n", attr_id); ++ dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); ++ #endif ++ } ++ } ++} ++ ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_WFD ++int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) ++{ ++ int match; ++ uint cnt = 0; ++ u8 eid, wfd_oui[4]={0x50,0x6F,0x9A,0x0A}; ++ ++ ++ match=_FALSE; ++ ++ if ( in_len < 0 ) ++ { ++ return match; ++ } ++ ++ while(cnt 1 byte for attribute ID field, 2 bytes for length field ++ if(attr_content) ++ _rtw_memcpy( attr_content, &wfd_ie[ cnt + 3 ], attrlen ); ++ ++ if(attr_contentlen) ++ *attr_contentlen = attrlen; ++ ++ cnt += attrlen + 3; ++ ++ match = _TRUE; ++ break; ++ } ++ else ++ { ++ cnt += attrlen + 3; //goto next ++ } ++ ++ } ++ ++ return match; ++ ++} ++#endif // CONFIG_WFD ++ ++//Baron adds to avoid FreeBSD warning ++int ieee80211_is_empty_essid(const char *essid, int essid_len) ++{ ++ /* Single white space is for Linksys APs */ ++ if (essid_len == 1 && essid[0] == ' ') ++ return 1; ++ ++ /* Otherwise, if the entire essid is 0, we assume it is hidden */ ++ while (essid_len) { ++ essid_len--; ++ if (essid[essid_len] != '\0') ++ return 0; ++ } ++ ++ return 1; ++} ++ ++int ieee80211_get_hdrlen(u16 fc) ++{ ++ int hdrlen = 24; ++ ++ switch (WLAN_FC_GET_TYPE(fc)) { ++ case RTW_IEEE80211_FTYPE_DATA: ++ if (fc & RTW_IEEE80211_STYPE_QOS_DATA) ++ hdrlen += 2; ++ if ((fc & RTW_IEEE80211_FCTL_FROMDS) && (fc & RTW_IEEE80211_FCTL_TODS)) ++ hdrlen += 6; /* Addr4 */ ++ break; ++ case RTW_IEEE80211_FTYPE_CTL: ++ switch (WLAN_FC_GET_STYPE(fc)) { ++ case RTW_IEEE80211_STYPE_CTS: ++ case RTW_IEEE80211_STYPE_ACK: ++ hdrlen = 10; ++ break; ++ default: ++ hdrlen = 16; ++ break; ++ } ++ break; ++ } ++ ++ return hdrlen; ++} ++ ++//show MCS rate, unit: 100Kbps ++u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char * MCS_rate) ++{ ++ u16 max_rate = 0; ++ ++ if(rf_type == RF_1T1R) ++ { ++ if(MCS_rate[0] & BIT(7)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1500:1350):((short_GI_20)?722:650); ++ else if(MCS_rate[0] & BIT(6)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1350:1215):((short_GI_20)?650:585); ++ else if(MCS_rate[0] & BIT(5)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):((short_GI_20)?578:520); ++ else if(MCS_rate[0] & BIT(4)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):((short_GI_20)?433:390); ++ else if(MCS_rate[0] & BIT(3)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):((short_GI_20)?289:260); ++ else if(MCS_rate[0] & BIT(2)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?450:405):((short_GI_20)?217:195); ++ else if(MCS_rate[0] & BIT(1)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):((short_GI_20)?144:130); ++ else if(MCS_rate[0] & BIT(0)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?150:135):((short_GI_20)?72:65); ++ } ++ else ++ { ++ if(MCS_rate[1]) ++ { ++ if(MCS_rate[1] & BIT(7)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?3000:2700):((short_GI_20)?1444:1300); ++ else if(MCS_rate[1] & BIT(6)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?2700:2430):((short_GI_20)?1300:1170); ++ else if(MCS_rate[1] & BIT(5)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?2400:2160):((short_GI_20)?1156:1040); ++ else if(MCS_rate[1] & BIT(4)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1800:1620):((short_GI_20)?867:780); ++ else if(MCS_rate[1] & BIT(3)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):((short_GI_20)?578:520); ++ else if(MCS_rate[1] & BIT(2)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):((short_GI_20)?433:390); ++ else if(MCS_rate[1] & BIT(1)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):((short_GI_20)?289:260); ++ else if(MCS_rate[1] & BIT(0)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):((short_GI_20)?144:130); ++ } ++ else ++ { ++ if(MCS_rate[0] & BIT(7)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1500:1350):((short_GI_20)?722:650); ++ else if(MCS_rate[0] & BIT(6)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1350:1215):((short_GI_20)?650:585); ++ else if(MCS_rate[0] & BIT(5)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?1200:1080):((short_GI_20)?578:520); ++ else if(MCS_rate[0] & BIT(4)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?900:810):((short_GI_20)?433:390); ++ else if(MCS_rate[0] & BIT(3)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?600:540):((short_GI_20)?289:260); ++ else if(MCS_rate[0] & BIT(2)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?450:405):((short_GI_20)?217:195); ++ else if(MCS_rate[0] & BIT(1)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?300:270):((short_GI_20)?144:130); ++ else if(MCS_rate[0] & BIT(0)) ++ max_rate = (bw_40MHz) ? ((short_GI_40)?150:135):((short_GI_20)?72:65); ++ } ++ } ++ return max_rate; ++} ++ ++int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8* category, u8 *action) ++{ ++ const u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u16 fc; ++ u8 c; ++ u8 a = ACT_PUBLIC_MAX; ++ ++ fc = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)frame)->frame_ctl); ++ ++ if ((fc & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) ++ != (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ++ ) ++ { ++ return _FALSE; ++ } ++ ++ c = frame_body[0]; ++ ++ switch(c) { ++ case RTW_WLAN_CATEGORY_P2P: /* vendor-specific */ ++ break; ++ default: ++ a = frame_body[1]; ++ } ++ ++ if (category) ++ *category = c; ++ if (action) ++ *action = a; ++ ++ return _TRUE; ++} ++ ++static const char *_action_public_str[] = { ++ "ACT_PUB_BSSCOEXIST", ++ "ACT_PUB_DSE_ENABLE", ++ "ACT_PUB_DSE_DEENABLE", ++ "ACT_PUB_DSE_REG_LOCATION", ++ "ACT_PUB_EXT_CHL_SWITCH", ++ "ACT_PUB_DSE_MSR_REQ", ++ "ACT_PUB_DSE_MSR_RPRT", ++ "ACT_PUB_MP", ++ "ACT_PUB_DSE_PWR_CONSTRAINT", ++ "ACT_PUB_VENDOR", ++ "ACT_PUB_GAS_INITIAL_REQ", ++ "ACT_PUB_GAS_INITIAL_RSP", ++ "ACT_PUB_GAS_COMEBACK_REQ", ++ "ACT_PUB_GAS_COMEBACK_RSP", ++ "ACT_PUB_TDLS_DISCOVERY_RSP", ++ "ACT_PUB_LOCATION_TRACK", ++ "ACT_PUB_RSVD", ++}; ++ ++const char *action_public_str(u8 action) ++{ ++ action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action; ++ return _action_public_str[action]; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_io.c +@@ -0,0 +1,464 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/* ++ ++The purpose of rtw_io.c ++ ++a. provides the API ++ ++b. provides the protocol engine ++ ++c. provides the software interface between caller and the hardware interface ++ ++ ++Compiler Flag Option: ++ ++1. CONFIG_SDIO_HCI: ++ a. USE_SYNC_IRP: Only sync operations are provided. ++ b. USE_ASYNC_IRP:Both sync/async operations are provided. ++ ++2. CONFIG_USB_HCI: ++ a. USE_ASYNC_IRP: Both sync/async operations are provided. ++ ++3. CONFIG_CFIO_HCI: ++ b. USE_SYNC_IRP: Only sync operations are provided. ++ ++ ++Only sync read/rtw_write_mem operations are provided. ++ ++jackson@realtek.com.tw ++ ++*/ ++ ++#define _RTW_IO_C_ ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++ ++u8 _rtw_read8(_adapter *adapter, u32 addr) ++{ ++ u8 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read8 = pintfhdl->io_ops._read8; ++ ++ r_val = _read8(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++} ++ ++u16 _rtw_read16(_adapter *adapter, u32 addr) ++{ ++ u16 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read16 = pintfhdl->io_ops._read16; ++ ++ r_val = _read16(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++} ++ ++u32 _rtw_read32(_adapter *adapter, u32 addr) ++{ ++ u32 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read32 = pintfhdl->io_ops._read32; ++ ++ r_val = _read32(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++ ++} ++ ++int _rtw_write8(_adapter *adapter, u32 addr, u8 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int ret; ++ _func_enter_; ++ _write8 = pintfhdl->io_ops._write8; ++ ++ ret = _write8(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write16(_adapter *adapter, u32 addr, u16 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int ret; ++ _func_enter_; ++ _write16 = pintfhdl->io_ops._write16; ++ ++ ret = _write16(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write32(_adapter *adapter, u32 addr, u32 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int ret; ++ _func_enter_; ++ _write32 = pintfhdl->io_ops._write32; ++ ++ ret = _write32(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++ ++int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf)); ++ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata); ++ int ret; ++ _func_enter_; ++ _writeN = pintfhdl->io_ops._writeN; ++ ++ ret = _writeN(pintfhdl, addr,length,pdata); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int ret; ++ _func_enter_; ++ _write8_async = pintfhdl->io_ops._write8_async; ++ ++ ret = _write8_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int ret; ++ _func_enter_; ++ _write16_async = pintfhdl->io_ops._write16_async; ++ ++ ret = _write16_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int ret; ++ _func_enter_; ++ _write32_async = pintfhdl->io_ops._write32_async; ++ ++ ret = _write32_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) ++ { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return; ++ } ++ ++ _read_mem = pintfhdl->io_ops._read_mem; ++ ++ _read_mem(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ _write_mem = pintfhdl->io_ops._write_mem; ++ ++ _write_mem(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) ++ { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return; ++ } ++ ++ _read_port = pintfhdl->io_ops._read_port; ++ ++ _read_port(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_read_port_cancel(_adapter *adapter) ++{ ++ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _read_port_cancel = pintfhdl->io_ops._read_port_cancel; ++ ++ if(_read_port_cancel) ++ _read_port_cancel(pintfhdl); ++ ++} ++ ++u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u32 ret = _SUCCESS; ++ ++ _func_enter_; ++ ++ _write_port = pintfhdl->io_ops._write_port; ++ ++ ret = _write_port(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms) ++{ ++ int ret = _SUCCESS; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem; ++ struct submit_ctx sctx; ++ ++ rtw_sctx_init(&sctx, timeout_ms); ++ pxmitbuf->sctx = &sctx; ++ ++ ret = _rtw_write_port(adapter, addr, cnt, pmem); ++ ++ if (ret == _SUCCESS) ++ ret = rtw_sctx_wait(&sctx); ++ ++ return ret; ++} ++ ++void _rtw_write_port_cancel(_adapter *adapter) ++{ ++ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _write_port_cancel = pintfhdl->io_ops._write_port_cancel; ++ ++ if(_write_port_cancel) ++ _write_port_cancel(pintfhdl); ++ ++} ++ ++int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops)) ++{ ++ struct io_priv *piopriv = &padapter->iopriv; ++ struct intf_hdl *pintf = &piopriv->intf; ++ ++ if (set_intf_ops == NULL) ++ return _FAIL; ++ ++ piopriv->padapter = padapter; ++ pintf->padapter = padapter; ++ pintf->pintf_dev = adapter_to_dvobj(padapter); ++ ++ set_intf_ops(&pintf->io_ops); ++ ++ return _SUCCESS; ++} ++ ++#ifdef DBG_IO ++ ++u16 read_sniff_ranges[][2] = { ++ //{0x550, 0x551}, ++}; ++ ++u16 write_sniff_ranges[][2] = { ++ //{0x550, 0x551}, ++ //{0x4c, 0x4c}, ++}; ++ ++int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2; ++int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2; ++ ++bool match_read_sniff_ranges(u16 addr, u16 len) ++{ ++ int i; ++ for (i = 0; i read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1]) ++ return _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++bool match_write_sniff_ranges(u16 addr, u16 len) ++{ ++ int i; ++ for (i = 0; i write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1]) ++ return _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line) ++{ ++ u8 val = _rtw_read8(adapter, addr); ++ ++ if (match_read_sniff_ranges(addr, 1)) ++ DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val); ++ ++ return val; ++} ++ ++u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line) ++{ ++ u16 val = _rtw_read16(adapter, addr); ++ ++ if (match_read_sniff_ranges(addr, 2)) ++ DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val); ++ ++ return val; ++} ++ ++u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line) ++{ ++ u32 val = _rtw_read32(adapter, addr); ++ ++ if (match_read_sniff_ranges(addr, 4)) ++ DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val); ++ ++ return val; ++} ++ ++int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 1)) ++ DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val); ++ ++ return _rtw_write8(adapter, addr, val); ++} ++int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 2)) ++ DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val); ++ ++ return _rtw_write16(adapter, addr, val); ++} ++int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 4)) ++ DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val); ++ ++ return _rtw_write32(adapter, addr, val); ++} ++int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, length)) ++ DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length); ++ ++ return _rtw_writeN(adapter, addr, length, data); ++} ++#endif ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_query.c +@@ -0,0 +1,196 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_IOCTL_QUERY_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_WINDOWS ++// ++// Added for WPA2-PSK, by Annie, 2005-09-20. ++// ++u8 ++query_802_11_capability( ++ _adapter* Adapter, ++ u8* pucBuf, ++ u32 * pulOutLen ++) ++{ ++ static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = ++ { ++ {Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, ++ {Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled}, ++ {Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, ++ {Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled}, ++ {Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled} ++ }; ++ static ULONG ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); ++ NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf; ++ u8* pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported; ++ ++ ++ pCap->Length = sizeof(NDIS_802_11_CAPABILITY); ++ if(ulNumOfPairSupported > 1 ) ++ pCap->Length += (ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); ++ ++ pCap->Version = 2; ++ pCap->NoOfPMKIDs = NUM_PMKID_CACHE; ++ pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported; ++ ++ if( sizeof (szAuthEnc) <= 240 ) // 240 = 256 - 4*4 // SecurityInfo.szCapability: only 256 bytes in size. ++ { ++ _rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc, sizeof (szAuthEnc) ); ++ *pulOutLen = pCap->Length; ++ return _TRUE; ++ } ++ else ++ { ++ *pulOutLen = 0; ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n")); ++ return _FALSE; ++ } ++} ++ ++u8 query_802_11_association_information( _adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo) ++{ ++ struct wlan_network *tgt_network; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss); ++ u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ unsigned char i,*auth_ie,*supp_ie; ++ ++ //NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); ++ _rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); ++ //pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ ++ //------------------------------------------------------ ++ // Association Request related information ++ //------------------------------------------------------ ++ // Req_1. AvailableRequestFixedIEs ++ if(psecnetwork!=NULL){ ++ ++ pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS; ++ pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10]; ++ _rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress, ++ & psecnetwork->MacAddress, 6); ++ ++ pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ ++ if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE) ++ { ++ ++ if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2) ++ pDest[0] =48; //RSN Information Element ++ else ++ pDest[0] =221; //WPA(SSN) Information Element ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0])); ++ supp_ie=&psecuritypriv->supplicant_ie[0]; ++ for(i=0;inetwork.IELength=%d\n\n", i,(int)psecnetwork->IELength)); ++ while((iRequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4); ++ ++ } ++ ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n")); ++ ++ } ++ ++ ++ //------------------------------------------------------ ++ // Association Response related information ++ //------------------------------------------------------ ++ ++ if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE) ++ { ++ tgt_network =&(pmlmepriv->cur_network); ++ if(tgt_network!=NULL){ ++ pAssocInfo->AvailableResponseFixedIEs = ++ NDIS_802_11_AI_RESFI_CAPABILITIES ++ |NDIS_802_11_AI_RESFI_ASSOCIATIONID ++ ; ++ ++ pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10]; ++ pAssocInfo->ResponseFixedIEs.StatusCode = 0; ++ pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid; ++ ++ pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength; ++ auth_ie=&psecuritypriv->authenticator_ie[0]; ++ ++ for(i=0;i0){ ++ _rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i); ++ pAssocInfo->ResponseIELength =i; ++ } ++ ++ ++ pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; ++ ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n")); ++ } ++ } ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n")); ++_func_exit_; ++ ++ return _TRUE; ++} ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_rtl.c +@@ -0,0 +1,1031 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_IOCTL_RTL_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_MP_INCLUDED ++#include ++#include ++#endif ++ ++struct oid_obj_priv oid_rtl_seg_01_01[] = ++{ ++ {1, &oid_null_function}, //0x80 ++ {1, &oid_null_function}, //0x81 ++ {1, &oid_null_function}, //0x82 ++ {1, &oid_null_function}, //0x83//OID_RT_SET_SNIFFER_MODE ++ {1, &oid_rt_get_signal_quality_hdl}, //0x84 ++ {1, &oid_rt_get_small_packet_crc_hdl}, //0x85 ++ {1, &oid_rt_get_middle_packet_crc_hdl}, //0x86 ++ {1, &oid_rt_get_large_packet_crc_hdl}, //0x87 ++ {1, &oid_rt_get_tx_retry_hdl}, //0x88 ++ {1, &oid_rt_get_rx_retry_hdl}, //0x89 ++ {1, &oid_rt_pro_set_fw_dig_state_hdl}, //0x8A ++ {1, &oid_rt_pro_set_fw_ra_state_hdl} , //0x8B ++ {1, &oid_null_function}, //0x8C ++ {1, &oid_null_function}, //0x8D ++ {1, &oid_null_function}, //0x8E ++ {1, &oid_null_function}, //0x8F ++ {1, &oid_rt_get_rx_total_packet_hdl}, //0x90 ++ {1, &oid_rt_get_tx_beacon_ok_hdl}, //0x91 ++ {1, &oid_rt_get_tx_beacon_err_hdl}, //0x92 ++ {1, &oid_rt_get_rx_icv_err_hdl}, //0x93 ++ {1, &oid_rt_set_encryption_algorithm_hdl}, //0x94 ++ {1, &oid_null_function}, //0x95 ++ {1, &oid_rt_get_preamble_mode_hdl}, //0x96 ++ {1, &oid_null_function}, //0x97 ++ {1, &oid_rt_get_ap_ip_hdl}, //0x98 ++ {1, &oid_rt_get_channelplan_hdl}, //0x99 ++ {1, &oid_rt_set_preamble_mode_hdl}, //0x9A ++ {1, &oid_rt_set_bcn_intvl_hdl}, //0x9B ++ {1, &oid_null_function}, //0x9C ++ {1, &oid_rt_dedicate_probe_hdl}, //0x9D ++ {1, &oid_null_function}, //0x9E ++ {1, &oid_null_function}, //0x9F ++ {1, &oid_null_function}, //0xA0 ++ {1, &oid_null_function}, //0xA1 ++ {1, &oid_null_function}, //0xA2 ++ {1, &oid_null_function}, //0xA3 ++ {1, &oid_null_function}, //0xA4 ++ {1, &oid_null_function}, //0xA5 ++ {1, &oid_null_function}, //0xA6 ++ {1, &oid_rt_get_total_tx_bytes_hdl}, //0xA7 ++ {1, &oid_rt_get_total_rx_bytes_hdl}, //0xA8 ++ {1, &oid_rt_current_tx_power_level_hdl}, //0xA9 ++ {1, &oid_rt_get_enc_key_mismatch_count_hdl}, //0xAA ++ {1, &oid_rt_get_enc_key_match_count_hdl}, //0xAB ++ {1, &oid_rt_get_channel_hdl}, //0xAC ++ {1, &oid_rt_set_channelplan_hdl}, //0xAD ++ {1, &oid_rt_get_hardware_radio_off_hdl}, //0xAE ++ {1, &oid_null_function}, //0xAF ++ {1, &oid_null_function}, //0xB0 ++ {1, &oid_null_function}, //0xB1 ++ {1, &oid_null_function}, //0xB2 ++ {1, &oid_null_function}, //0xB3 ++ {1, &oid_rt_get_key_mismatch_hdl}, //0xB4 ++ {1, &oid_null_function}, //0xB5 ++ {1, &oid_null_function}, //0xB6 ++ {1, &oid_null_function}, //0xB7 ++ {1, &oid_null_function}, //0xB8 ++ {1, &oid_null_function}, //0xB9 ++ {1, &oid_null_function}, //0xBA ++ {1, &oid_rt_supported_wireless_mode_hdl}, //0xBB ++ {1, &oid_rt_get_channel_list_hdl}, //0xBC ++ {1, &oid_rt_get_scan_in_progress_hdl}, //0xBD ++ {1, &oid_null_function}, //0xBE ++ {1, &oid_null_function}, //0xBF ++ {1, &oid_null_function}, //0xC0 ++ {1, &oid_rt_forced_data_rate_hdl}, //0xC1 ++ {1, &oid_rt_wireless_mode_for_scan_list_hdl}, //0xC2 ++ {1, &oid_rt_get_bss_wireless_mode_hdl}, //0xC3 ++ {1, &oid_rt_scan_with_magic_packet_hdl}, //0xC4 ++ {1, &oid_null_function}, //0xC5 ++ {1, &oid_null_function}, //0xC6 ++ {1, &oid_null_function}, //0xC7 ++ {1, &oid_null_function}, //0xC8 ++ {1, &oid_null_function}, //0xC9 ++ {1, &oid_null_function}, //0xCA ++ {1, &oid_null_function}, //0xCB ++ {1, &oid_null_function}, //0xCC ++ {1, &oid_null_function}, //0xCD ++ {1, &oid_null_function}, //0xCE ++ {1, &oid_null_function}, //0xCF ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_01_03[] = ++{ ++ {1, &oid_rt_ap_get_associated_station_list_hdl}, //0x00 ++ {1, &oid_null_function}, //0x01 ++ {1, &oid_rt_ap_switch_into_ap_mode_hdl}, //0x02 ++ {1, &oid_null_function}, //0x03 ++ {1, &oid_rt_ap_supported_hdl}, //0x04 ++ {1, &oid_rt_ap_set_passphrase_hdl}, //0x05 ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_01_11[] = ++{ ++ {1, &oid_null_function}, //0xC0 OID_RT_PRO_RX_FILTER ++ {1, &oid_null_function}, //0xC1 OID_CE_USB_WRITE_REGISTRY ++ {1, &oid_null_function}, //0xC2 OID_CE_USB_READ_REGISTRY ++ {1, &oid_null_function}, //0xC3 OID_RT_PRO_SET_INITIAL_GAIN ++ {1, &oid_null_function}, //0xC4 OID_RT_PRO_SET_BB_RF_STANDBY_MODE ++ {1, &oid_null_function}, //0xC5 OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE ++ {1, &oid_null_function}, //0xC6 OID_RT_PRO_SET_TX_CHARGE_PUMP ++ {1, &oid_null_function}, //0xC7 OID_RT_PRO_SET_RX_CHARGE_PUMP ++ {1, &oid_rt_pro_rf_write_registry_hdl}, //0xC8 ++ {1, &oid_rt_pro_rf_read_registry_hdl}, //0xC9 ++ {1, &oid_null_function} //0xCA OID_RT_PRO_QUERY_RF_TYPE ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_03_00[] = ++{ ++ {1, &oid_null_function}, //0x00 ++ {1, &oid_rt_get_connect_state_hdl}, //0x01 ++ {1, &oid_null_function}, //0x02 ++ {1, &oid_null_function}, //0x03 ++ {1, &oid_rt_set_default_key_id_hdl}, //0x04 ++ ++ ++}; ++ ++ ++//************** oid_rtl_seg_01_01 section start ************** ++ ++NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ ++ _func_enter_; ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) ++ { ++ //DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); ++ if(!rtw_setfwdig_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ ++ _func_enter_; ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ ++ if(poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) ++ { ++ //DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); ++ if(!rtw_setfwra_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ //DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl \n")); ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++#if 0 ++ if(pMgntInfo->mAssoc || pMgntInfo->mIbss) ++ { ++ ulInfo = pAdapter->RxStats.SignalQuality; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ ulInfo = 0xffffffff; // It stands for -1 in 4-byte integer. ++ } ++ break; ++#endif ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++ ++NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(u32)) ++ { ++ //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); ++ *(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG preamblemode = 0 ; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ if(padapter->registrypriv.preamble == PREAMBLE_LONG) ++ preamblemode = 0; ++ else if (padapter->registrypriv.preamble == PREAMBLE_AUTO) ++ preamblemode = 1; ++ else if (padapter->registrypriv.preamble == PREAMBLE_SHORT) ++ preamblemode = 2; ++ ++ ++ *(ULONG *)poid_par_priv->information_buf = preamblemode ; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct eeprom_priv* peeprompriv = &padapter->eeprompriv; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ *(u16 *)poid_par_priv->information_buf = peeprompriv->channel_plan ; ++ ++ return status; ++} ++NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct eeprom_priv* peeprompriv = &padapter->eeprompriv; ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ peeprompriv->channel_plan = *(u16 *)poid_par_priv->information_buf ; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG preamblemode = 0; ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ preamblemode = *(ULONG *)poid_par_priv->information_buf ; ++ if( preamblemode == 0) ++ padapter->registrypriv.preamble = PREAMBLE_LONG; ++ else if (preamblemode==1 ) ++ padapter->registrypriv.preamble = PREAMBLE_AUTO; ++ else if ( preamblemode==2 ) ++ padapter->registrypriv.preamble = PREAMBLE_SHORT; ++ ++ *(ULONG *)poid_par_priv->information_buf = preamblemode ; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ *(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); ++ *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ NDIS_802_11_CONFIGURATION *pnic_Config; ++ ++ ULONG channelnum; ++ ++ _func_enter_; ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ pnic_Config = &pmlmepriv->cur_network.network.Configuration; ++ else ++ pnic_Config = &padapter->registrypriv.dev_network.Configuration; ++ ++ channelnum = pnic_Config->DSConfig; ++ *(ULONG *)poid_par_priv->information_buf = channelnum; ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ _func_exit_; ++ ++ ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG ulInfo = 0 ; ++ //DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl \n")); ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG)){ ++ ulInfo |= 0x0100; //WIRELESS_MODE_B ++ ulInfo |= 0x0200; //WIRELESS_MODE_G ++ ulInfo |= 0x0400; //WIRELESS_MODE_A ++ ++ *(ULONG *) poid_par_priv->information_buf = ulInfo; ++ //DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else{ ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++ ++NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++//************** oid_rtl_seg_01_01 section end ************** ++ ++//************** oid_rtl_seg_01_03 section start ************** ++NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++//************** oid_rtl_seg_01_03 section end ************** ++ ++//**************** oid_rtl_seg_01_11 section start **************** ++NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ _func_enter_; ++ //DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl \n")); ++ if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) ++ { ++ //RegOffsetValue - The offset of RF register to write. ++ //RegDataWidth - The data width of RF register to write. ++ //RegDataValue - The value to write. ++ //RegOffsetValue = *((unsigned long*)InformationBuffer); ++ //RegDataWidth = *((unsigned long*)InformationBuffer+1); ++ //RegDataValue = *((unsigned long*)InformationBuffer+2); ++ if(!rtw_setrfreg_cmd(Adapter, ++ *(unsigned char*)poid_par_priv->information_buf, ++ (unsigned long)(*((unsigned long*)poid_par_priv->information_buf+2)))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ _func_enter_; ++ ++ //DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl \n")); ++ if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) ++ { ++ if(Adapter->mppriv.act_in_progress == _TRUE) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ else ++ { ++ //init workparam ++ Adapter->mppriv.act_in_progress = _TRUE; ++ Adapter->mppriv.workparam.bcompleted= _FALSE; ++ Adapter->mppriv.workparam.act_type = MPT_READ_RF; ++ Adapter->mppriv.workparam.io_offset = *(unsigned long*)poid_par_priv->information_buf; ++ Adapter->mppriv.workparam.io_value = 0xcccccccc; ++ ++ //RegOffsetValue - The offset of RF register to read. ++ //RegDataWidth - The data width of RF register to read. ++ //RegDataValue - The value to read. ++ //RegOffsetValue = *((unsigned long*)InformationBuffer); ++ //RegDataWidth = *((unsigned long*)InformationBuffer+1); ++ //RegDataValue = *((unsigned long*)InformationBuffer+2); ++ if(!rtw_getrfreg_cmd(Adapter, ++ *(unsigned char*)poid_par_priv->information_buf, ++ (unsigned char*)&Adapter->mppriv.workparam.io_value)) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ } ++ ++ ++ } ++ else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++ ++//**************** oid_rtl_seg_01_11 section end**************** ++ ++ ++//************** oid_rtl_seg_03_00 section start ************** ++enum _CONNECT_STATE_{ ++ CHECKINGSTATUS, ++ ASSOCIATED, ++ ADHOCMODE, ++ NOTASSOCIATED ++}; ++ ++NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ULONG ulInfo; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ // nStatus==0 CheckingStatus ++ // nStatus==1 Associated ++ // nStatus==2 AdHocMode ++ // nStatus==3 NotAssociated ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) ++ ulInfo = CHECKINGSTATUS; ++ else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ ulInfo = ASSOCIATED; ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)== _TRUE) ++ ulInfo = ADHOCMODE; ++ else ++ ulInfo = NOTASSOCIATED ; ++ ++ *(ULONG *)poid_par_priv->information_buf = ulInfo; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++#if 0 ++ // Rearrange the order to let the UI still shows connection when scan is in progress ++ RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("===> Query OID_RT_GET_CONNECT_STATE.\n")); ++ if(pMgntInfo->mAssoc) ++ ulInfo = 1; ++ else if(pMgntInfo->mIbss) ++ ulInfo = 2; ++ else if(pMgntInfo->bScanInProgress) ++ ulInfo = 0; ++ else ++ ulInfo = 3; ++ ulInfoLen = sizeof(ULONG); ++ RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("<=== Query OID_RT_GET_CONNECT_STATE: %d\n", ulInfo)); ++#endif ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//************** oid_rtl_seg_03_00 section end ************** +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_ioctl_set.c +@@ -0,0 +1,1494 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_IOCTL_SET_C_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#include ++#endif ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++ ++#define IS_MAC_ADDRESS_BROADCAST(addr) \ ++( \ ++ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ ++ (addr[2] == 0xff) && (addr[3] == 0xff) && \ ++ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ++) ++ ++u8 rtw_validate_bssid(const u8 *bssid) ++{ ++ u8 ret = _TRUE; ++ ++ if (is_zero_mac_addr(bssid) ++ || is_broadcast_mac_addr(bssid) ++ || is_multicast_mac_addr(bssid) ++ ) { ++ ret = _FALSE; ++ } ++ ++ return ret; ++} ++ ++u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid) ++{ ++ u8 i; ++ u8 ret=_TRUE; ++ ++_func_enter_; ++ ++ if (ssid->SsidLength > 32) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid length >32\n")); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++#ifdef CONFIG_VALIDATE_SSID ++ for(i = 0; i < ssid->SsidLength; i++) ++ { ++ //wifi, printable ascii code must be supported ++ if(!( (ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e) )){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid has nonprintabl ascii\n")); ++ ret= _FALSE; ++ break; ++ } ++ } ++#endif /* CONFIG_VALIDATE_SSID */ ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_do_join(_adapter * padapter); ++u8 rtw_do_join(_adapter * padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8* pibss = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("\n rtw_do_join: phead = %p; plist = %p \n\n\n", phead, plist)); ++ ++ pmlmepriv->cur_network.join_res = -2; ++ ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ pmlmepriv->pscanned = plist; ++ ++ pmlmepriv->to_join = _TRUE; ++ ++ if(_rtw_queue_empty(queue)== _TRUE) ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ //when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty ++ //we try to issue sitesurvey firstly ++ ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic ==_FALSE ++ || rtw_to_roaming(padapter) > 0 ++ ) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_do_join(): site survey if scanned_queue is empty\n.")); ++ // submit site_survey_cmd ++ if(_SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)) ) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_do_join(): site survey return error\n.")); ++ } ++ } ++ ++ goto exit; ++ } ++ else ++ { ++ int select_ret; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ if((select_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))==_SUCCESS) ++ { ++ pmlmepriv->to_join = _FALSE; ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ } ++ else if(ret == 2)//there is no need to wait for join ++ { ++ ret = _SUCCESS; ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(padapter); ++ } ++ else ++ { ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) ++ { ++ // submit createbss_cmd to change to a ADHOC_MASTER ++ ++ //pmlmepriv->lock has been acquired by caller... ++ WLAN_BSSID_EX *pdev_network = &(padapter->registrypriv.dev_network); ++ ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ ++ pibss = padapter->registrypriv.dev_network.MacAddress; ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(padapter); ++ ++ rtw_generate_random_ibss(pibss); ++ ++ if(rtw_createbss_cmd(padapter)!=_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>do_goin: rtw_createbss_cmd status FAIL*** \n ")); ++ ret = _FALSE; ++ goto exit; ++ } ++ ++ pmlmepriv->to_join = _FALSE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("***Error=> rtw_select_and_join_from_scanned_queue FAIL under STA_Mode*** \n ")); ++ ++ } ++ else ++ { ++ // can't associate ; reset under-linking ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++#if 0 ++ if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) ++ { ++ if(_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) ++ { ++ // for funk to do roaming ++ // funk will reconnect, but funk will not sitesurvey before reconnect ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("for funk to do roaming")); ++ if(pmlmepriv->sitesurveyctrl.traffic_busy==_FALSE) ++ rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0); ++ } ++ ++ } ++#endif ++ ++ //when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue ++ //we try to issue sitesurvey firstly ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE ++ || rtw_to_roaming(padapter) > 0 ++ ) ++ { ++ //DBG_871X("rtw_do_join() when no desired bss in scanning queue \n"); ++ if( _SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1, NULL, 0)) ){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("do_join(): site survey return error\n.")); ++ } ++ } ++ ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++#ifdef PLATFORM_WINDOWS ++u8 rtw_pnp_set_power_wakeup(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_wakeup!!!\n")); ++ ++ res = rtw_setstandby_cmd(padapter, 0); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_wakeup!!!\n")); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_pnp_set_power_sleep(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_sleep!!!\n")); ++ //DbgPrint("+rtw_pnp_set_power_sleep\n"); ++ ++ res = rtw_setstandby_cmd(padapter, 1); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_sleep!!!\n")); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults) ++{ ++_func_enter_; ++ ++ switch( reloadDefaults) ++ { ++ case Ndis802_11ReloadWEPKeys: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("SetInfo OID_802_11_RELOAD_DEFAULTS : Ndis802_11ReloadWEPKeys\n")); ++ break; ++ } ++ ++ // SecClearAllKeys(Adapter); ++ // 8711 CAM was not for En/Decrypt only ++ // so, we can't clear all keys. ++ // should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM ++ ++ //TO DO... ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++u8 set_802_11_test(_adapter* padapter, NDIS_802_11_TEST *test) ++{ ++ u8 ret=_TRUE; ++ ++_func_enter_; ++ ++ switch(test->Type) ++ { ++ case 1: ++ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8); ++ NdisMIndicateStatusComplete(padapter->hndis_adapter); ++ break; ++ ++ case 2: ++ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI)); ++ NdisMIndicateStatusComplete(padapter->hndis_adapter); ++ break; ++ ++ default: ++ ret=_FALSE; ++ break; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_pmkid(_adapter* padapter, NDIS_802_11_PMKID *pmkid) ++{ ++ u8 ret=_SUCCESS; ++ ++ return ret; ++} ++ ++#endif ++ ++u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid) ++{ ++ _irqL irqL; ++ u8 status=_SUCCESS; ++ u32 cur_time = 0; ++ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_, ++ ("+rtw_set_802_11_bssid: bssid="MAC_FMT"\n", MAC_ARG(bssid) )); ++ ++ if ((bssid[0]==0x00 && bssid[1]==0x00 && bssid[2]==0x00 && bssid[3]==0x00 && bssid[4]==0x00 &&bssid[5]==0x00) || ++ (bssid[0]==0xFF && bssid[1]==0xFF && bssid[2]==0xFF && bssid[3]==0xFF && bssid[4]==0xFF &&bssid[5]==0xFF)) ++ { ++ status = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ DBG_871X("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ goto handle_tkip_countermeasure; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ goto release_mlme_lock; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); ++ ++ if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE) ++ { ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE) ++ goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. ++ } else { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set BSSID not the same bssid\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_bssid="MAC_FMT"\n", MAC_ARG(bssid) )); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("cur_bssid="MAC_FMT"\n", MAC_ARG(pmlmepriv->cur_network.network.MacAddress) )); ++ ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ } ++ ++handle_tkip_countermeasure: ++ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ ++ _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); ++ pmlmepriv->assoc_by_bssid=_TRUE; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ pmlmepriv->to_join = _TRUE; ++ } ++ else { ++ status = rtw_do_join(padapter); ++ } ++ ++release_mlme_lock: ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("rtw_set_802_11_bssid: status=%d\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++u8 rtw_set_802_11_ssid(_adapter* padapter, NDIS_802_11_SSID *ssid) ++{ ++ _irqL irqL; ++ u8 status = _SUCCESS; ++ u32 cur_time = 0; ++ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *pnetwork = &pmlmepriv->cur_network; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_, ++ ("+rtw_set_802_11_ssid: ssid=[%s] fw_state=0x%08x\n", ++ ssid->Ssid, get_fwstate(pmlmepriv))); ++ ++ if(padapter->hw_init_completed==_FALSE){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ DBG_871X("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ goto handle_tkip_countermeasure; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ goto release_mlme_lock; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ++ ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); ++ ++ if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) && ++ (_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE)) ++ { ++ if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("Set SSID is the same ssid, fw_state=0x%08x\n", ++ get_fwstate(pmlmepriv))); ++ ++ if(rtw_is_same_ibss(padapter, pnetwork) == _FALSE) ++ { ++ //if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ else ++ { ++ goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. ++ } ++ } ++#ifdef CONFIG_LPS ++ else { ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1); ++ } ++#endif ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set SSID not the same ssid\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_ssid=[%s] len=0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("assoc_ssid=[%s] len=0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength)); ++ ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ } ++ ++handle_tkip_countermeasure: ++ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ ++ if (rtw_validate_ssid(ssid) == _FALSE) { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ ++ _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); ++ pmlmepriv->assoc_by_bssid=_FALSE; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ pmlmepriv->to_join = _TRUE; ++ } ++ else { ++ status = rtw_do_join(padapter); ++ } ++ ++release_mlme_lock: ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("-rtw_set_802_11_ssid: status=%d\n", status)); ++ ++_func_exit_; ++ ++ return status; ++ ++} ++ ++u8 rtw_set_802_11_connect(_adapter *padapter, const u8 *bssid, NDIS_802_11_SSID *ssid) ++{ ++ _irqL irqL; ++ u8 status = _SUCCESS; ++ u32 cur_time = 0; ++ bool bssid_valid = _TRUE; ++ bool ssid_valid = _TRUE; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if (!ssid || rtw_validate_ssid(ssid) == _FALSE) ++ ssid_valid = _FALSE; ++ ++ if (!bssid || rtw_validate_bssid(bssid) == _FALSE) ++ bssid_valid = _FALSE; ++ ++ if (ssid_valid == _FALSE && bssid_valid == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" ssid:%p, ssid_valid:%d, bssid:%p, bssid_valid:%d\n", ++ FUNC_ADPT_ARG(padapter), ssid, ssid_valid, bssid, bssid_valid); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ if(padapter->hw_init_completed==_FALSE){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ LOG_LEVEL(_drv_info_, FUNC_ADPT_FMT" fw_state=0x%08x\n", ++ FUNC_ADPT_ARG(padapter), get_fwstate(pmlmepriv)); ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ goto handle_tkip_countermeasure; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ goto release_mlme_lock; ++ } ++ ++handle_tkip_countermeasure: ++ if (rtw_handle_tkip_countermeasure(padapter, __func__) == _FAIL) { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ ++ if (ssid && ssid_valid) ++ _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); ++ ++ if (bssid && bssid_valid) { ++ _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); ++ pmlmepriv->assoc_by_bssid = _TRUE; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ pmlmepriv->to_join = _TRUE; ++ } ++ else { ++ status = rtw_do_join(padapter); ++ } ++ ++release_mlme_lock: ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return status; ++} ++ ++/* ++rtw_set_802_11_infrastructure_mode(~) ++ ### NOTE:#### (!!!!) ++ MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock and scanned_queue->lock in sequence ++*/ ++u8 rtw_set_802_11_infrastructure_mode(_adapter* padapter, ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networktype) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &pmlmepriv->cur_network; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE* pold_state = &(cur_network->network.InfrastructureMode); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_notice_, ++ ("+rtw_set_802_11_infrastructure_mode: old=%d new=%d fw_state=0x%08x\n", ++ *pold_state, networktype, get_fwstate(pmlmepriv))); ++ ++ if(*pold_state != networktype) ++ { ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,(" change mode!")); ++ //DBG_871X("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); ++ ++ if(*pold_state==Ndis802_11APMode) ++ { ++ //change to other mode from Ndis802_11APMode ++ cur_network->join_res = -1; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ stop_ap_mode(padapter); ++#endif ++ } ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ||(*pold_state==Ndis802_11IBSS)) ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)== _TRUE) ) ++ rtw_free_assoc_resources(padapter, 0); ++ ++ if((*pold_state == Ndis802_11Infrastructure) ||(*pold_state == Ndis802_11IBSS)) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ rtw_indicate_disconnect(padapter); //will clr Linked_state; before this function, we must have chked whether issue dis-assoc_cmd or not ++ } ++ } ++ ++ *pold_state = networktype; ++ ++ _clr_fwstate_(pmlmepriv, ~WIFI_NULL_STATE); ++ ++ switch(networktype) ++ { ++ case Ndis802_11IBSS: ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ break; ++ ++ case Ndis802_11Infrastructure: ++ set_fwstate(pmlmepriv, WIFI_STATION_STATE); ++ break; ++ ++ case Ndis802_11APMode: ++ set_fwstate(pmlmepriv, WIFI_AP_STATE); ++#ifdef CONFIG_NATIVEAP_MLME ++ start_ap_mode(padapter); ++ //rtw_indicate_connect(padapter); ++#endif ++ ++ break; ++ ++ case Ndis802_11AutoUnknown: ++ case Ndis802_11InfrastructureMax: ++ break; ++ } ++ ++ //SecClearAllKeys(adapter); ++ ++ //RT_TRACE(COMP_OID_SET, DBG_LOUD, ("set_infrastructure: fw_state:%x after changing mode\n", ++ // get_fwstate(pmlmepriv) )); ++ ++ } ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++ ++u8 rtw_set_802_11_disassociate(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct mlme_priv * pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_disassociate: rtw_indicate_disconnect\n")); ++ ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ rtw_indicate_disconnect(padapter); ++ //modify for CONFIG_IEEE80211W, none 11w can use it ++ rtw_free_assoc_resources_cmd(padapter); ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter, NDIS_802_11_SSID *pssid, int ssid_max_num) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ u8 res=_TRUE; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("+rtw_set_802_11_bssid_list_scan(), fw_state=%x\n", get_fwstate(pmlmepriv))); ++ ++ if (padapter == NULL) { ++ res=_FALSE; ++ goto exit; ++ } ++ if (padapter->hw_init_completed==_FALSE){ ++ res = _FALSE; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n===rtw_set_802_11_bssid_list_scan:hw_init_completed==_FALSE===\n")); ++ goto exit; ++ } ++ ++ if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || ++ (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++ // Scan or linking is in progress, do nothing. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_bssid_list_scan fail since fw_state = %x\n", get_fwstate(pmlmepriv))); ++ res = _TRUE; ++ ++ if(check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n")); ++ } else { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###pmlmepriv->sitesurveyctrl.traffic_busy==_TRUE\n\n")); ++ } ++ } else { ++ if (rtw_is_scan_deny(padapter)) { ++ DBG_871X(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter)); ++ indicate_wx_scan_complete_event(padapter); ++ return _SUCCESS; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ res = rtw_sitesurvey_cmd(padapter, pssid, ssid_max_num, NULL, 0); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ } ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_802_11_authentication_mode(_adapter* padapter, NDIS_802_11_AUTHENTICATION_MODE authmode) ++{ ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ int res; ++ u8 ret; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_802_11_auth.mode(): mode=%x\n", authmode)); ++ ++ psecuritypriv->ndisauthtype=authmode; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_authentication_mode:psecuritypriv->ndisauthtype=%d", psecuritypriv->ndisauthtype)); ++ ++ if(psecuritypriv->ndisauthtype>3) ++ psecuritypriv->dot11AuthAlgrthm=dot11AuthAlgrthm_8021X; ++ ++ res=rtw_set_auth(padapter,psecuritypriv); ++ ++ if(res==_SUCCESS) ++ ret=_TRUE; ++ else ++ ret=_FALSE; ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_add_wep(_adapter* padapter, NDIS_802_11_WEP *wep){ ++ ++ u8 bdefaultkey; ++ u8 btransmitkey; ++ sint keyid,res; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ bdefaultkey=(wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE; //for ??? ++ btransmitkey= (wep->KeyIndex & 0x80000000) > 0 ? _TRUE : _FALSE; //for ??? ++ keyid=wep->KeyIndex & 0x3fffffff; ++ ++ if(keyid>4) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MgntActrtw_set_802_11_add_wep:keyid>4=>fail\n")); ++ ret=_FALSE; ++ goto exit; ++ } ++ ++ switch(wep->KeyLength) ++ { ++ case 5: ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=5\n")); ++ break; ++ case 13: ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=13\n")); ++ break; ++ default: ++ psecuritypriv->dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength!=5 or 13\n")); ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:befor memcpy, wep->KeyLength=0x%x wep->KeyIndex=0x%x keyid =%x\n",wep->KeyLength,wep->KeyIndex,keyid)); ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]),&(wep->KeyMaterial),wep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[keyid]=wep->KeyLength; ++ ++ psecuritypriv->dot11PrivacyKeyIndex=keyid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:security key material : %x %x %x %x %x %x %x %x %x %x %x %x %x \n", ++ psecuritypriv->dot11DefKey[keyid].skey[0],psecuritypriv->dot11DefKey[keyid].skey[1],psecuritypriv->dot11DefKey[keyid].skey[2], ++ psecuritypriv->dot11DefKey[keyid].skey[3],psecuritypriv->dot11DefKey[keyid].skey[4],psecuritypriv->dot11DefKey[keyid].skey[5], ++ psecuritypriv->dot11DefKey[keyid].skey[6],psecuritypriv->dot11DefKey[keyid].skey[7],psecuritypriv->dot11DefKey[keyid].skey[8], ++ psecuritypriv->dot11DefKey[keyid].skey[9],psecuritypriv->dot11DefKey[keyid].skey[10],psecuritypriv->dot11DefKey[keyid].skey[11], ++ psecuritypriv->dot11DefKey[keyid].skey[12])); ++ ++ res=rtw_set_key(padapter,psecuritypriv, keyid, 1); ++ ++ if(res==_FAIL) ++ ret= _FALSE; ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++u8 rtw_set_802_11_remove_wep(_adapter* padapter, u32 keyindex){ ++ ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (keyindex >= 0x80000000 || padapter == NULL){ ++ ++ ret=_FALSE; ++ goto exit; ++ ++ } ++ else ++ { ++ int res; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ if( keyindex < 4 ){ ++ ++ _rtw_memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16); ++ ++ res=rtw_set_key(padapter,psecuritypriv,keyindex, 0); ++ ++ psecuritypriv->dot11DefKeylen[keyindex]=0; ++ ++ if(res==_FAIL) ++ ret=_FAIL; ++ ++ } ++ else ++ { ++ ret=_FAIL; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++u8 rtw_set_802_11_add_key(_adapter* padapter, NDIS_802_11_KEY *key){ ++ ++ uint encryptionalgo; ++ u8 * pbssid; ++ struct sta_info *stainfo; ++ u8 bgroup = _FALSE; ++ u8 bgrouptkey = _FALSE;//can be remove later ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)){ ++ ++ // It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, ++ // it must fail the request and return NDIS_STATUS_INVALID_DATA. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: ((key->KeyIndex & 0x80000000) == 0)[=%d] ",(int)(key->KeyIndex & 0x80000000) == 0)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key:((key->KeyIndex & 0x40000000) > 0)[=%d]" , (int)(key->KeyIndex & 0x40000000) > 0)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: key->KeyIndex=%d \n" ,(int)key->KeyIndex)); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if(key->KeyIndex & 0x40000000) ++ { ++ // Pairwise key ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Pairwise key +++++\n")); ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv, pbssid); ++ ++ if((stainfo!=NULL)&&(padapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:( stainfo!=NULL)&&(Adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)\n")); ++ encryptionalgo=stainfo->dot118021XPrivacy; ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: stainfo==NULL)||(Adapter->securitypriv.dot11AuthAlgrthm!=dot11AuthAlgrthm_8021X)\n")); ++ encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (encryptionalgo ==%d)!\n",encryptionalgo )); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11PrivacyAlgrthm ==%d)!\n",padapter->securitypriv.dot11PrivacyAlgrthm)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11AuthAlgrthm ==%d)!\n",padapter->securitypriv.dot11AuthAlgrthm)); ++ ++ if((stainfo!=NULL)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (stainfo->dot118021XPrivacy ==%d)!\n", stainfo->dot118021XPrivacy)); ++ } ++ ++ if(key->KeyIndex & 0x000000FF){ ++ // The key index is specified in the lower 8 bits by values of zero to 255. ++ // The key index should be set to zero for a Pairwise key, and the driver should fail with ++ // NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" key->KeyIndex & 0x000000FF.\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // check BSSID ++ if (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _TRUE){ ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MacAddr_isBcst(key->BSSID)\n")); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++ // Check key length for TKIP. ++ //if(encryptionAlgorithm == RT_ENC_TKIP_ENCRYPTION && key->KeyLength != 32) ++ if((encryptionalgo== _TKIP_)&& (key->KeyLength != 32)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("TKIP KeyLength:0x%x != 32\n", key->KeyLength)); ++ ret=_FAIL; ++ goto exit; ++ ++ } ++ ++ // Check key length for AES. ++ if((encryptionalgo== _AES_)&& (key->KeyLength != 16)) { ++ // For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case. ++ if(key->KeyLength == 32) { ++ key->KeyLength = 16; ++ } else { ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ ++ // Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. ++ if( (encryptionalgo== _WEP40_|| encryptionalgo== _WEP104_) && (key->KeyLength != 5 || key->KeyLength != 13)) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength)); ++ ret=_FAIL; ++ goto exit; ++ } ++ ++ bgroup = _FALSE; ++ ++ // Check the pairwise key. Added by Annie, 2005-07-06. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Pairwise Key set]\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ ++ } ++ else ++ { ++ // Group key - KeyIndex(BIT30==0) ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Group key +++++\n")); ++ ++ ++ // when add wep key through add key and didn't assigned encryption type before ++ if((padapter->securitypriv.ndisauthtype<=3)&&(padapter->securitypriv.dot118021XGrpPrivacy==0)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("keylen=%d( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )padapter->securitypriv.dot118021XGrpPrivacy(%x)\n", key->KeyLength,padapter->securitypriv.dot11PrivacyAlgrthm,padapter->securitypriv.dot118021XGrpPrivacy)); ++ ++ switch(key->KeyLength) ++ { ++ case 5: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ case 13: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ default: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u \n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ } ++ ++ encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" Adapter->securitypriv.dot11PrivacyAlgrthm=%x\n", padapter->securitypriv.dot11PrivacyAlgrthm)); ++ ++ } ++ else ++ { ++ encryptionalgo=padapter->securitypriv.dot118021XGrpPrivacy; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )encryptionalgo(%x)=padapter->securitypriv.dot118021XGrpPrivacy(%x)keylen=%d\n", padapter->securitypriv.dot11PrivacyAlgrthm,encryptionalgo,padapter->securitypriv.dot118021XGrpPrivacy,key->KeyLength)); ++ ++ } ++ ++ if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE) && (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _FALSE)) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" IBSS but BSSID is not Broadcast Address.\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // Check key length for TKIP ++ if((encryptionalgo== _TKIP_) && (key->KeyLength != 32)) { ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" TKIP GTK KeyLength:%u != 32\n", key->KeyLength)); ++ ret= _FAIL; ++ goto exit; ++ ++ } else if(encryptionalgo== _AES_ && (key->KeyLength != 16 && key->KeyLength != 32) ) { ++ ++ // Check key length for AES ++ // For NDTEST, we allow keylen=32 in this case. 2005.01.27, by rcnjko. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<=== SetInfo, OID_802_11_ADD_KEY: AES GTK KeyLength:%u != 16 or 32\n", key->KeyLength)); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03. ++ if((encryptionalgo== _AES_) && (key->KeyLength == 32) ) { ++ key->KeyLength = 16; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("AES key length changed: %u\n", key->KeyLength) ); ++ } ++ ++ if(key->KeyIndex & 0x8000000) {//error ??? 0x8000_0000 ++ bgrouptkey = _TRUE; ++ } ++ ++ if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE)&&(check_fwstate(&padapter->mlmepriv, _FW_LINKED)==_TRUE)) ++ { ++ bgrouptkey = _TRUE; ++ } ++ ++ bgroup = _TRUE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n") ); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Group Key set]\n") ); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")) ; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)) ; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ ++ } ++ ++ // If WEP encryption algorithm, just call rtw_set_802_11_add_wep(). ++ if((padapter->securitypriv.dot11AuthAlgrthm !=dot11AuthAlgrthm_8021X)&&(encryptionalgo== _WEP40_ || encryptionalgo== _WEP104_)) ++ { ++ u8 ret; ++ u32 keyindex; ++ u32 len = FIELD_OFFSET(NDIS_802_11_KEY, KeyMaterial) + key->KeyLength; ++ NDIS_802_11_WEP *wep = &padapter->securitypriv.ndiswep; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ WEP key +++++\n")); ++ ++ wep->Length = len; ++ keyindex = key->KeyIndex&0x7fffffff; ++ wep->KeyIndex = keyindex ; ++ wep->KeyLength = key->KeyLength; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:Before memcpy \n")); ++ ++ _rtw_memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength); ++ _rtw_memcpy(&(padapter->securitypriv.dot11DefKey[keyindex].skey[0]), key->KeyMaterial, key->KeyLength); ++ ++ padapter->securitypriv.dot11DefKeylen[keyindex]=key->KeyLength; ++ padapter->securitypriv.dot11PrivacyKeyIndex=keyindex; ++ ++ ret = rtw_set_802_11_add_wep(padapter, wep); ++ ++ goto exit; ++ ++ } ++ ++ if(key->KeyIndex & 0x20000000){ ++ // SetRSC ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ SetRSC+++++\n")); ++ if(bgroup == _TRUE) ++ { ++ NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; ++ _rtw_memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8); ++ } ++ else ++ { ++ NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; ++ _rtw_memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8); ++ } ++ ++ } ++ ++ // Indicate this key idx is used for TX ++ // Save the key in KeyMaterial ++ if(bgroup == _TRUE) // Group transmit key ++ { ++ int res; ++ ++ if(bgrouptkey == _TRUE) ++ { ++ padapter->securitypriv.dot118021XGrpKeyid=(u8)key->KeyIndex; ++ } ++ ++ if((key->KeyIndex&0x3) == 0){ ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ _rtw_memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ _rtw_memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ ++ if((key->KeyIndex & 0x10000000)) ++ { ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); ++ ++ } ++ else ++ { ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); ++ ++ } ++ ++ //set group key by index ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength); ++ ++ key->KeyIndex=key->KeyIndex & 0x03; ++ ++ padapter->securitypriv.binstallGrpkey=_TRUE; ++ ++ padapter->securitypriv.bcheck_grpkey=_FALSE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("reset group key")); ++ ++ res=rtw_set_key(padapter,&padapter->securitypriv, key->KeyIndex, 1); ++ ++ if(res==_FAIL) ++ ret= _FAIL; ++ ++ goto exit; ++ ++ } ++ else // Pairwise Key ++ { ++ u8 res; ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); ++ ++ if(stainfo!=NULL) ++ { ++ _rtw_memset( &stainfo->dot118021x_UncstKey, 0, 16);// clear keybuffer ++ ++ _rtw_memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16); ++ ++ if(encryptionalgo== _TKIP_) ++ { ++ padapter->securitypriv.busetkipkey=_FALSE; ++ ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n ==========_set_timer\n")); ++ ++ // if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] ++ if((key->KeyIndex & 0x10000000)){ ++ _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8); ++ _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8); ++ ++ } else { ++ _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8); ++ _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8); ++ ++ } ++ ++ } ++ else if(encryptionalgo == _AES_) ++ { ++ ++ } ++ ++ ++ //Set key to CAM through H2C command ++ if(bgrouptkey)//never go to here ++ { ++ res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _FALSE); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n")); ++ } ++ else{ ++ res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _TRUE); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); ++ } ++ ++ if(res ==_FALSE) ++ ret= _FAIL; ++ ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_remove_key(_adapter* padapter, NDIS_802_11_REMOVE_KEY *key){ ++ ++ uint encryptionalgo; ++ u8 * pbssid; ++ struct sta_info *stainfo; ++ u8 bgroup = (key->KeyIndex & 0x4000000) > 0 ? _FALSE: _TRUE; ++ u8 keyIndex = (u8)key->KeyIndex & 0x03; ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if ((key->KeyIndex & 0xbffffffc) > 0) { ++ ret=_FAIL; ++ goto exit; ++ } ++ ++ if (bgroup == _TRUE) { ++ encryptionalgo= padapter->securitypriv.dot118021XGrpPrivacy; ++ // clear group key by index ++ //NdisZeroMemory(Adapter->MgntInfo.SecurityInfo.KeyBuf[keyIndex], MAX_WEP_KEY_LEN); ++ //Adapter->MgntInfo.SecurityInfo.KeyLen[keyIndex] = 0; ++ ++ _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16); ++ ++ //! \todo Send a H2C Command to Firmware for removing this Key in CAM Entry. ++ ++ } else { ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); ++ if(stainfo !=NULL){ ++ encryptionalgo=stainfo->dot118021XPrivacy; ++ ++ // clear key by BSSID ++ _rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16); ++ ++ //! \todo Send a H2C Command to Firmware for disable this Key in CAM Entry. ++ ++ } ++ else{ ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return _TRUE; ++ ++} ++ ++/* ++* rtw_get_cur_max_rate - ++* @adapter: pointer to _adapter structure ++* ++* Return 0 or 100Kbps ++*/ ++u16 rtw_get_cur_max_rate(_adapter *adapter) ++{ ++ int i = 0; ++ u8 *p; ++ u16 rate = 0, max_rate = 0; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++#ifdef CONFIG_80211N_HT ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ u8 rf_type = 0; ++ u8 bw_40MHz=0, short_GI_20=0, short_GI_40=0; ++ u16 mcs_rate=0; ++ u32 ht_ielen = 0; ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (adapter->registrypriv.mp_mode == 1) ++ { ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ return 0; ++ } ++#endif ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) ++ && (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE)) ++ return 0; ++ ++#ifdef CONFIG_80211N_HT ++ if (pmlmeext->cur_wireless_mode & (WIRELESS_11_24N|WIRELESS_11_5N)) { ++ p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12); ++ if(p && ht_ielen>0) ++ { ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); ++ ++ //bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; ++ //cur_bwmod is updated by beacon, pmlmeinfo is updated by association response ++ bw_40MHz = (pmlmeext->cur_bwmode && (HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH & pmlmeinfo->HT_info.infos[0])) ? 1:0; ++ ++ //short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; ++ short_GI_20 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_20) ? 1:0; ++ short_GI_40 = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info&IEEE80211_HT_CAP_SGI_40) ? 1:0; ++ ++ rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ max_rate = rtw_mcs_rate( ++ rf_type, ++ bw_40MHz & (pregistrypriv->cbw40_enable), ++ short_GI_20, ++ short_GI_40, ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate ++ ); ++ } ++ } ++ else ++#endif //CONFIG_80211N_HT ++ { ++ while( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF)) ++ { ++ rate = pcur_bss->SupportedRates[i]&0x7F; ++ if(rate>max_rate) ++ max_rate = rate; ++ i++; ++ } ++ ++ max_rate = max_rate*10/2; ++ } ++ ++ return max_rate; ++} ++ ++/* ++* rtw_set_scan_mode - ++* @adapter: pointer to _adapter structure ++* @scan_mode: ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode) ++{ ++ if(scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE) ++ return _FAIL; ++ ++ adapter->mlmepriv.scan_mode = scan_mode; ++ ++ return _SUCCESS; ++} ++ ++/* ++* rtw_set_channel_plan - ++* @adapter: pointer to _adapter structure ++* @channel_plan: ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) ++{ ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ //handle by cmd_thread to sync with scan operation ++ return rtw_set_chplan_cmd(adapter, channel_plan, 1); ++} ++ ++/* ++* rtw_set_country - ++* @adapter: pointer to _adapter structure ++* @country_code: string of country code ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_country(_adapter *adapter, const char *country_code) ++{ ++ int channel_plan = RT_CHANNEL_DOMAIN_WORLD_WIDE_5G; ++ ++ DBG_871X("%s country_code:%s\n", __func__, country_code); ++ ++ //TODO: should have a table to match country code and RT_CHANNEL_DOMAIN ++ //TODO: should consider 2-character and 3-character country code ++ if(0 == strcmp(country_code, "US")) ++ channel_plan = RT_CHANNEL_DOMAIN_FCC; ++ else if(0 == strcmp(country_code, "EU")) ++ channel_plan = RT_CHANNEL_DOMAIN_ETSI; ++ else if(0 == strcmp(country_code, "JP")) ++ channel_plan = RT_CHANNEL_DOMAIN_MKK; ++ else if(0 == strcmp(country_code, "CN")) ++ channel_plan = RT_CHANNEL_DOMAIN_CHINA; ++ else ++ DBG_871X("%s unknown country_code:%s\n", __FUNCTION__, country_code); ++ ++ return rtw_set_channel_plan(adapter, channel_plan); ++} ++ ++/* ++* rtw_set_band - ++* @adapter: pointer to _adapter structure ++* @band: band to set ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_band(_adapter *adapter, enum _BAND band) ++{ ++ if (rtw_band_valid(band)) { ++ DBG_871X(FUNC_ADPT_FMT" band:%d\n", FUNC_ADPT_ARG(adapter), band); ++ adapter->setband = band; ++ return _SUCCESS; ++ } ++ ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" band:%d fail\n", FUNC_ADPT_ARG(adapter), band); ++ return _FAIL; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_iol.c +@@ -0,0 +1,263 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++ ++#ifdef CONFIG_IOL ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) ++{ ++ struct xmit_frame *xmit_frame; ++ struct xmit_buf *xmitbuf; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); ++ ++#if 1 ++ if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); ++ rtw_free_xmitframe(pxmitpriv, xmit_frame); ++ xmit_frame=NULL; ++ goto exit; ++ } ++ ++ xmit_frame->frame_tag = MGNT_FRAMETAG; ++ xmit_frame->pxmitbuf = xmitbuf; ++ xmit_frame->buf_addr = xmitbuf->pbuf; ++ xmitbuf->priv_data = xmit_frame; ++ ++ pattrib = &xmit_frame->attrib; ++ update_mgntframe_attrib(adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = 0; ++ ++#else ++ if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__); ++ } ++ else { ++ pattrib = &xmit_frame->attrib; ++ update_mgntframe_attrib(adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = 0; ++ } ++#endif ++ ++exit: ++ return xmit_frame; ++} ++ ++ ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) ++{ ++ struct pkt_attrib *pattrib = &xmit_frame->attrib; ++ u16 buf_offset; ++ u32 ori_len; ++ ++//Todo: bulkout without this offset ++#ifdef CONFIG_USB_HCI ++ buf_offset = TXDESC_OFFSET; ++#else ++ buf_offset = 0; ++#endif ++ ++ ori_len = buf_offset+pattrib->pktlen; ++ ++ //check if the io_buf can accommodate new cmds ++ if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { ++ DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ ++ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); ++ pattrib->pktlen += cmd_len; ++ pattrib->last_txcmdsz += cmd_len; ++ ++ //DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); ++ ++ return _SUCCESS; ++} ++ ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; ++ u8* pos = (u8 *)&cmd; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 1)) ++ DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); ++} ++ ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 2)) ++ DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); ++} ++ ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) ++{ ++ if (match_write_sniff_ranges(addr, 4)) ++ DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); ++} ++#endif ++ ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)us); ++ ++ //DBG_871X("%s %u\n", __FUNCTION__, us); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)ms); ++ ++ //DBG_871X("%s %u\n", __FUNCTION__, ms); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) ++{ ++ struct pkt_attrib *pattrib = &xmit_frame->attrib; ++ u16 buf_offset; ++ u32 ori_len; ++ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; ++ ++//Todo: bulkout without this offset ++#ifdef CONFIG_USB_HCI ++ buf_offset = TXDESC_OFFSET; ++#else ++ buf_offset = 0; ++#endif ++ ++ ori_len = buf_offset+pattrib->pktlen; ++ ++ //check if the io_buf can accommodate new cmds ++ if(ori_len + 8 > MAX_XMITBUF_SZ) { ++ DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__ ++ , ori_len + 8, MAX_XMITBUF_SZ); ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8); ++ pattrib->pktlen += 8; ++ pattrib->last_txcmdsz += 8; ++ ++ //DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen); ++ ++ return _SUCCESS; ++} ++ ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) ++{ ++ return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms); ++} ++ ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) ++{ ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL) ++ return _FAIL; ++ ++ if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL) ++ return _FAIL; ++ ++ return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); ++} ++ ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) ++{ ++ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; ++ return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms); ++} ++ ++bool rtw_IOL_applied(ADAPTER *adapter) ++{ ++ if(adapter->registrypriv.force_iol) ++ return _TRUE; ++ ++#ifdef CONFIG_USB_HCI ++ if(!adapter_to_dvobj(adapter)->ishighspeed) ++ return _TRUE; ++#endif ++ ++ return _FALSE; ++} ++ ++#endif //CONFIG_IOL ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme.c +@@ -0,0 +1,3967 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MLME_C_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++extern u8 rtw_do_join(_adapter * padapter); ++ ++#ifdef CONFIG_DISABLE_MCS13TO15 ++extern unsigned char MCS_rate_2R_MCS13TO15_OFF[16]; ++extern unsigned char MCS_rate_2R[16]; ++#else //CONFIG_DISABLE_MCS13TO15 ++extern unsigned char MCS_rate_2R[16]; ++#endif //CONFIG_DISABLE_MCS13TO15 ++extern unsigned char MCS_rate_1R[16]; ++ ++sint _rtw_init_mlme_priv (_adapter* padapter) ++{ ++ sint i; ++ u8 *pbuf; ++ struct wlan_network *pnetwork; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ sint res = _SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((u8 *)pmlmepriv, 0, sizeof(struct mlme_priv)); ++ ++ pmlmepriv->nic_hdl = (u8 *)padapter; ++ ++ pmlmepriv->pscanned = NULL; ++ pmlmepriv->fw_state = 0; ++ pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; ++ pmlmepriv->scan_mode=SCAN_ACTIVE;// 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) ++ ++ _rtw_spinlock_init(&(pmlmepriv->lock)); ++ _rtw_init_queue(&(pmlmepriv->free_bss_pool)); ++ _rtw_init_queue(&(pmlmepriv->scanned_queue)); ++ ++ set_scanned_network_val(pmlmepriv, 0); ++ ++ _rtw_memset(&pmlmepriv->assoc_ssid,0,sizeof(NDIS_802_11_SSID)); ++ ++ pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network))); ++ ++ if (pbuf == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ pmlmepriv->free_bss_buf = pbuf; ++ ++ pnetwork = (struct wlan_network *)pbuf; ++ ++ for(i = 0; i < MAX_BSS_CNT; i++) ++ { ++ _rtw_init_listhead(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue)); ++ ++ pnetwork++; ++ } ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ++ rtw_clear_scan_deny(padapter); ++ ++ rtw_init_mlme_timer(padapter); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv); ++void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv) ++{ ++ _rtw_spinlock_free(&pmlmepriv->lock); ++ _rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock)); ++ _rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock)); ++} ++ ++static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen) ++{ ++ if(*ppie) ++ { ++ rtw_mfree(*ppie, *plen); ++ *plen = 0; ++ *ppie=NULL; ++ } ++} ++ ++void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) ++{ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); ++ rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_beacon_ie, &pmlmepriv->wps_beacon_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_req_ie, &pmlmepriv->wps_probe_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_resp_ie, &pmlmepriv->wps_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_assoc_resp_ie, &pmlmepriv->wps_assoc_resp_ie_len); ++ ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_beacon_ie, &pmlmepriv->p2p_beacon_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_req_ie, &pmlmepriv->p2p_probe_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_resp_ie, &pmlmepriv->p2p_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len); ++#endif ++ ++#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_go_probe_resp_ie, &pmlmepriv->wfd_go_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); ++#endif ++ ++} ++ ++void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) ++{ ++_func_enter_; ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++ if(pmlmepriv){ ++ rtw_mfree_mlme_priv_lock (pmlmepriv); ++ ++ if (pmlmepriv->free_bss_buf) { ++ rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network)); ++ } ++ } ++_func_exit_; ++} ++ ++sint _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) ++{ ++ _irqL irqL; ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&pnetwork->list, &queue->queue); ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct wlan_network *_rtw_dequeue_network(_queue *queue) ++{ ++ _irqL irqL; ++ ++ struct wlan_network *pnetwork; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(queue) == _TRUE) ++ ++ pnetwork = NULL; ++ ++ else ++ { ++ pnetwork = LIST_CONTAINOR(get_next(&queue->queue), struct wlan_network, list); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pnetwork; ++} ++ ++struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) ++{ ++ _irqL irqL; ++ struct wlan_network *pnetwork; ++ _queue *free_queue = &pmlmepriv->free_bss_pool; ++ _list* plist = NULL; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(free_queue) == _TRUE) { ++ pnetwork=NULL; ++ goto exit; ++ } ++ plist = get_next(&(free_queue->queue)); ++ ++ pnetwork = LIST_CONTAINOR(plist , struct wlan_network, list); ++ ++ rtw_list_delete(&pnetwork->list); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("_rtw_alloc_network: ptr=%p\n", plist)); ++ pnetwork->network_type = 0; ++ pnetwork->fixed = _FALSE; ++ pnetwork->last_scanned = rtw_get_current_time(); ++ pnetwork->aid=0; ++ pnetwork->join_res=0; ++ ++ pmlmepriv->num_of_scanned ++; ++ ++exit: ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pnetwork; ++} ++ ++void _rtw_free_network(struct mlme_priv *pmlmepriv ,struct wlan_network *pnetwork, u8 isfreeall) ++{ ++ u32 curr_time, delta_time; ++ u32 lifetime = SCANQUEUE_LIFETIME; ++ _irqL irqL; ++ _queue *free_queue = &(pmlmepriv->free_bss_pool); ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ if (pnetwork->fixed == _TRUE) ++ goto exit; ++ ++ curr_time = rtw_get_current_time(); ++ ++ if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) ++ lifetime = 1; ++ ++ if(!isfreeall) ++ { ++#ifdef PLATFORM_WINDOWS ++ ++ delta_time = (curr_time -pnetwork->last_scanned)/10; ++ ++ if(delta_time < lifetime*1000000)// unit:usec ++ { ++ goto exit; ++ } ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++ ++ delta_time = (curr_time -pnetwork->last_scanned)/HZ; ++ ++ if(delta_time < lifetime)// unit:sec ++ { ++ goto exit; ++ } ++ ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ //i think needs to check again ++ delta_time = (curr_time -pnetwork->last_scanned)/hz; ++ ++ if(delta_time < lifetime)// unit:sec ++ { ++ goto exit; ++ } ++ ++#endif ++ } ++ ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list),&(free_queue->queue)); ++ ++ pmlmepriv->num_of_scanned --; ++ ++ ++ //DBG_871X("_rtw_free_network:SSID=%s\n", pnetwork->network.Ssid.Ssid); ++ ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork) ++{ ++ ++ _queue *free_queue = &(pmlmepriv->free_bss_pool); ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ if (pnetwork->fixed == _TRUE) ++ goto exit; ++ ++ //_enter_critical(&free_queue->lock, &irqL); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list), get_list_head(free_queue)); ++ ++ pmlmepriv->num_of_scanned --; ++ ++ //_exit_critical(&free_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++ return the wlan_network with the matching addr ++ ++ Shall be calle under atomic context... to avoid possible racing condition... ++*/ ++struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr) ++{ ++ ++ //_irqL irqL; ++ _list *phead, *plist; ++ struct wlan_network *pnetwork = NULL; ++ u8 zero_addr[ETH_ALEN] = {0,0,0,0,0,0}; ++ ++_func_enter_; ++ ++ if(_rtw_memcmp(zero_addr, addr, ETH_ALEN)){ ++ pnetwork=NULL; ++ goto exit; ++ } ++ ++ //_enter_critical_bh(&scanned_queue->lock, &irqL); ++ ++ phead = get_list_head(scanned_queue); ++ plist = get_next(phead); ++ ++ while (plist != phead) ++ { ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network ,list); ++ ++ if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE) ++ break; ++ ++ plist = get_next(plist); ++ } ++ ++ if(plist == phead) ++ pnetwork = NULL; ++ ++ //_exit_critical_bh(&scanned_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return pnetwork; ++ ++} ++ ++ ++void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct wlan_network *pnetwork; ++ struct mlme_priv* pmlmepriv = &padapter->mlmepriv; ++ _queue *scanned_queue = &pmlmepriv->scanned_queue; ++ ++_func_enter_; ++ ++ ++ _enter_critical_bh(&scanned_queue->lock, &irqL); ++ ++ phead = get_list_head(scanned_queue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ plist = get_next(plist); ++ ++ _rtw_free_network(pmlmepriv,pnetwork, isfreeall); ++ ++ } ++ ++ _exit_critical_bh(&scanned_queue->lock, &irqL); ++ ++_func_exit_; ++ ++} ++ ++ ++ ++ ++sint rtw_if_up(_adapter *padapter) { ++ ++ sint res; ++_func_enter_; ++ ++ if( padapter->bDriverStopped || padapter->bSurpriseRemoved || ++ (check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _FALSE)){ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ res=_FALSE; ++ } ++ else ++ res= _TRUE; ++ ++_func_exit_; ++ return res; ++} ++ ++ ++void rtw_generate_random_ibss(u8* pibss) ++{ ++ u32 curtime = rtw_get_current_time(); ++ ++_func_enter_; ++ pibss[0] = 0x02; //in ad-hoc mode bit1 must set to 1 ++ pibss[1] = 0x11; ++ pibss[2] = 0x87; ++ pibss[3] = (u8)(curtime & 0xff) ;//p[0]; ++ pibss[4] = (u8)((curtime>>8) & 0xff) ;//p[1]; ++ pibss[5] = (u8)((curtime>>16) & 0xff) ;//p[2]; ++_func_exit_; ++ return; ++} ++ ++u8 *rtw_get_capability_from_ie(u8 *ie) ++{ ++ return (ie + 8 + 2); ++} ++ ++ ++u16 rtw_get_capability(WLAN_BSSID_EX *bss) ++{ ++ u16 val; ++_func_enter_; ++ ++ _rtw_memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->IEs), 2); ++ ++_func_exit_; ++ return le16_to_cpu(val); ++} ++ ++u8 *rtw_get_timestampe_from_ie(u8 *ie) ++{ ++ return (ie + 0); ++} ++ ++u8 *rtw_get_beacon_interval_from_ie(u8 *ie) ++{ ++ return (ie + 8); ++} ++ ++ ++int rtw_init_mlme_priv (_adapter *padapter)//(struct mlme_priv *pmlmepriv) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_init_mlme_priv(padapter);// (pmlmepriv); ++_func_exit_; ++ return res; ++} ++ ++void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_mlme_priv\n")); ++ _rtw_free_mlme_priv (pmlmepriv); ++_func_exit_; ++} ++ ++int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); ++int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_enqueue_network(queue, pnetwork); ++_func_exit_; ++ return res; ++} ++ ++ ++#ifndef PLATFORM_FREEBSD //Baron ++static struct wlan_network *rtw_dequeue_network(_queue *queue) ++{ ++ struct wlan_network *pnetwork; ++_func_enter_; ++ pnetwork = _rtw_dequeue_network(queue); ++_func_exit_; ++ return pnetwork; ++} ++#endif //PLATFORM_FREEBSD ++ ++struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv ); ++struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) ++{ ++ struct wlan_network *pnetwork; ++_func_enter_; ++ pnetwork = _rtw_alloc_network(pmlmepriv); ++_func_exit_; ++ return pnetwork; ++} ++ ++void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall); ++void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall)//(struct wlan_network *pnetwork, _queue *free_queue) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); ++ _rtw_free_network(pmlmepriv, pnetwork, is_freeall); ++_func_exit_; ++} ++ ++void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork ); ++void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork ) ++{ ++_func_enter_; ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); ++ _rtw_free_network_nolock(pmlmepriv, pnetwork); ++_func_exit_; ++} ++ ++ ++void rtw_free_network_queue(_adapter* dev, u8 isfreeall) ++{ ++_func_enter_; ++ _rtw_free_network_queue(dev, isfreeall); ++_func_exit_; ++} ++ ++/* ++ return the wlan_network with the matching addr ++ ++ Shall be calle under atomic context... to avoid possible racing condition... ++*/ ++struct wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr) ++{ ++ struct wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr); ++ ++ return pnetwork; ++} ++ ++int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork) ++{ ++ int ret=_TRUE; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ ++ if ( (psecuritypriv->dot11PrivacyAlgrthm != _NO_PRIVACY_ ) && ++ ( pnetwork->network.Privacy == 0 ) ) ++ { ++ ret=_FALSE; ++ } ++ else if((psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_ ) && ++ ( pnetwork->network.Privacy == 1 ) ) ++ { ++ ret=_FALSE; ++ } ++ else ++ { ++ ret=_TRUE; ++ } ++ ++ return ret; ++ ++} ++ ++inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b); ++inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b) ++{ ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(%s,%d)(%s,%d)\n", ++ // a->Ssid.Ssid,a->Ssid.SsidLength,b->Ssid.Ssid,b->Ssid.SsidLength)); ++ return (a->Ssid.SsidLength == b->Ssid.SsidLength) ++ && _rtw_memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength)==_TRUE; ++} ++ ++int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst) ++{ ++ u16 s_cap, d_cap; ++ ++_func_enter_; ++ ++#ifdef PLATFORM_OS_XP ++ if ( ((uint)dst) <= 0x7fffffff || ++ ((uint)src) <= 0x7fffffff || ++ ((uint)&s_cap) <= 0x7fffffff || ++ ((uint)&d_cap) <= 0x7fffffff) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n@@@@ error address of dst\n")); ++ ++ KeBugCheckEx(0x87110000, (ULONG_PTR)dst, (ULONG_PTR)src,(ULONG_PTR)&s_cap, (ULONG_PTR)&d_cap); ++ ++ return _FALSE; ++ } ++#endif ++ ++ ++ _rtw_memcpy((u8 *)&s_cap, rtw_get_capability_from_ie(src->IEs), 2); ++ _rtw_memcpy((u8 *)&d_cap, rtw_get_capability_from_ie(dst->IEs), 2); ++ ++ ++ s_cap = le16_to_cpu(s_cap); ++ d_cap = le16_to_cpu(d_cap); ++ ++_func_exit_; ++ ++ return ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && ++ // (src->Configuration.DSConfig == dst->Configuration.DSConfig) && ++ ( (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) && ++ ( (_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) && ++ ((s_cap & WLAN_CAPABILITY_IBSS) == ++ (d_cap & WLAN_CAPABILITY_IBSS)) && ++ ((s_cap & WLAN_CAPABILITY_BSS) == ++ (d_cap & WLAN_CAPABILITY_BSS))); ++ ++} ++ ++struct wlan_network * rtw_get_oldest_wlan_network(_queue *scanned_queue) ++{ ++ _list *plist, *phead; ++ ++ ++ struct wlan_network *pwlan = NULL; ++ struct wlan_network *oldest = NULL; ++_func_enter_; ++ phead = get_list_head(scanned_queue); ++ ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pwlan= LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if(pwlan->fixed!=_TRUE) ++ { ++ if (oldest == NULL ||time_after(oldest->last_scanned, pwlan->last_scanned)) ++ oldest = pwlan; ++ } ++ ++ plist = get_next(plist); ++ } ++_func_exit_; ++ return oldest; ++ ++} ++ ++static void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src, ++ _adapter * padapter, bool update_ie) ++{ ++ u8 ss_ori = dst->PhyInfo.SignalStrength; ++ u8 sq_ori = dst->PhyInfo.SignalQuality; ++ long rssi_ori = dst->Rssi; ++ ++ u8 ss_smp = src->PhyInfo.SignalStrength; ++ u8 sq_smp = src->PhyInfo.SignalQuality; ++ long rssi_smp = src->Rssi; ++ ++ u8 ss_final; ++ u8 sq_final; ++ long rssi_final; ++ ++_func_enter_; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_hal_antdiv_rssi_compared(padapter, dst, src); //this will update src.Rssi, need consider again ++#endif ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 ++ if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X(FUNC_ADPT_FMT" %s("MAC_FMT", ch%u) ss_ori:%3u, sq_ori:%3u, rssi_ori:%3ld, ss_smp:%3u, sq_smp:%3u, rssi_smp:%3ld\n" ++ , FUNC_ADPT_ARG(padapter) ++ , src->Ssid.Ssid, MAC_ARG(src->MacAddress), src->Configuration.DSConfig ++ ,ss_ori, sq_ori, rssi_ori ++ ,ss_smp, sq_smp, rssi_smp ++ ); ++ } ++ #endif ++ ++ /* The rule below is 1/5 for sample value, 4/5 for history value */ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) { ++ /* Take the recvpriv's value for the connected AP*/ ++ ss_final = padapter->recvpriv.signal_strength; ++ sq_final = padapter->recvpriv.signal_qual; ++ /* the rssi value here is undecorated, and will be used for antenna diversity */ ++ if(sq_smp != 101) /* from the right channel */ ++ rssi_final = (src->Rssi+dst->Rssi*4)/5; ++ else ++ rssi_final = rssi_ori; ++ } ++ else { ++ if(sq_smp != 101) { /* from the right channel */ ++ ss_final = ((u32)(src->PhyInfo.SignalStrength)+(u32)(dst->PhyInfo.SignalStrength)*4)/5; ++ sq_final = ((u32)(src->PhyInfo.SignalQuality)+(u32)(dst->PhyInfo.SignalQuality)*4)/5; ++ rssi_final = (src->Rssi+dst->Rssi*4)/5; ++ } else { ++ /* bss info not receving from the right channel, use the original RX signal infos */ ++ ss_final = dst->PhyInfo.SignalStrength; ++ sq_final = dst->PhyInfo.SignalQuality; ++ rssi_final = dst->Rssi; ++ } ++ ++ } ++ ++ if (update_ie) ++ _rtw_memcpy((u8 *)dst, (u8 *)src, get_WLAN_BSSID_EX_sz(src)); ++ ++ dst->PhyInfo.SignalStrength = ss_final; ++ dst->PhyInfo.SignalQuality = sq_final; ++ dst->Rssi = rssi_final; ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) && 1 ++ if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X(FUNC_ADPT_FMT" %s("MAC_FMT"), SignalStrength:%u, SignalQuality:%u, RawRSSI:%ld\n" ++ , FUNC_ADPT_ARG(padapter) ++ , dst->Ssid.Ssid, MAC_ARG(dst->MacAddress), dst->PhyInfo.SignalStrength, dst->PhyInfo.SignalQuality, dst->Rssi); ++ } ++ #endif ++ ++#if 0 // old codes, may be useful one day... ++// DBG_871X("update_network: rssi=0x%lx dst->Rssi=%d ,dst->Rssi=0x%lx , src->Rssi=0x%lx",(dst->Rssi+src->Rssi)/2,dst->Rssi,dst->Rssi,src->Rssi); ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) ++ { ++ ++ //DBG_871X("b:ssid=%s update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Ssid.Ssid,src->Rssi,padapter->recvpriv.signal); ++ if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; ++ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; ++ padapter->recvpriv.signal_qual_data.total_val -= last_evm; ++ } ++ padapter->recvpriv.signal_qual_data.total_val += query_rx_pwr_percentage(src->Rssi); ++ ++ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = query_rx_pwr_percentage(src->Rssi); ++ if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ padapter->recvpriv.signal_qual_data.index = 0; ++ ++ //DBG_871X("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, src->Rssi); ++ ++ // <1> Showed on UI for user,in percentage. ++ tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; ++ padapter->recvpriv.signal=(u8)tmpVal;//Link quality ++ ++ src->Rssi= translate_percentage_to_dbm(padapter->recvpriv.signal) ; ++ } ++ else{ ++// DBG_871X("ELSE:ssid=%s update_network: src->rssi=0x%d dst->rssi=%d\n",src->Ssid.Ssid,src->Rssi,dst->Rssi); ++ src->Rssi=(src->Rssi +dst->Rssi)/2;//dBM ++ } ++ ++// DBG_871X("a:update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Rssi,padapter->recvpriv.signal); ++ ++#endif ++ ++_func_exit_; ++} ++ ++static void update_current_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++_func_enter_; ++ ++#ifdef PLATFORM_OS_XP ++ if ((unsigned long)(&(pmlmepriv->cur_network.network)) < 0x7ffffff) ++ { ++ KeBugCheckEx(0x87111c1c, (ULONG_PTR)(&(pmlmepriv->cur_network.network)), 0, 0,0); ++ } ++#endif ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (is_same_network(&(pmlmepriv->cur_network.network), pnetwork))) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"Same Network\n"); ++ ++ //if(pmlmepriv->cur_network.network.IELength<= pnetwork->IELength) ++ { ++ update_network(&(pmlmepriv->cur_network.network), pnetwork,adapter, _TRUE); ++ rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), ++ pmlmepriv->cur_network.network.IELength); ++ } ++ } ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++ ++Caller must hold pmlmepriv->lock first. ++ ++ ++*/ ++void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ ULONG bssid_ex_sz; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *oldest = NULL; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if ((unsigned long)(pnetwork) < 0x7ffffff) ++ { ++#ifdef PLATFORM_OS_XP ++ KeBugCheckEx(0x87111c1c, (ULONG_PTR)pnetwork, 0, 0,0); ++#endif ++ } ++ ++ if (is_same_network(&(pnetwork->network), target)) ++ break; ++ ++ if ((oldest == ((struct wlan_network *)0)) || ++ time_after(oldest->last_scanned, pnetwork->last_scanned)) ++ oldest = pnetwork; ++ ++ plist = get_next(plist); ++ ++ } ++ ++ ++ /* If we didn't find a match, then get a new network slot to initialize ++ * with this beacon's information */ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) { ++ ++ if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) { ++ /* If there are no more slots, expire the oldest */ ++ //list_del_init(&oldest->list); ++ pnetwork = oldest; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;//optimum_antenna=>For antenna diversity ++ rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++#endif ++ _rtw_memcpy(&(pnetwork->network), target, get_WLAN_BSSID_EX_sz(target)); ++ //pnetwork->last_scanned = rtw_get_current_time(); ++ // variable initialize ++ pnetwork->fixed = _FALSE; ++ pnetwork->last_scanned = rtw_get_current_time(); ++ ++ pnetwork->network_type = 0; ++ pnetwork->aid=0; ++ pnetwork->join_res=0; ++ ++ /* bss info not receving from the right channel */ ++ if (pnetwork->network.PhyInfo.SignalQuality == 101) ++ pnetwork->network.PhyInfo.SignalQuality = 0; ++ } ++ else { ++ /* Otherwise just pull from the free list */ ++ ++ pnetwork = rtw_alloc_network(pmlmepriv); // will update scan_time ++ ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n\nsomething wrong here\n\n\n")); ++ goto exit; ++ } ++ ++ bssid_ex_sz = get_WLAN_BSSID_EX_sz(target); ++ target->Length = bssid_ex_sz; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna; ++ rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++#endif ++ _rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz ); ++ ++ pnetwork->last_scanned = rtw_get_current_time(); ++ ++ /* bss info not receving from the right channel */ ++ if (pnetwork->network.PhyInfo.SignalQuality == 101) ++ pnetwork->network.PhyInfo.SignalQuality = 0; ++ ++ rtw_list_insert_tail(&(pnetwork->list),&(queue->queue)); ++ ++ } ++ } ++ else { ++ /* we have an entry and we are going to update it. But this entry may ++ * be already expired. In this case we do the same as we found a new ++ * net and call the new_net handler ++ */ ++ bool update_ie = _TRUE; ++ ++ pnetwork->last_scanned = rtw_get_current_time(); ++ ++ //target.Reserved[0]==1, means that scaned network is a bcn frame. ++ if((pnetwork->network.IELength>target->IELength) && (target->Reserved[0]==1)) ++ update_ie = _FALSE; ++ ++ update_network(&(pnetwork->network), target,adapter, update_ie); ++ } ++ ++exit: ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++} ++ ++void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork); ++void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(((_adapter *)adapter)->mlmepriv); ++ //_queue *queue = &(pmlmepriv->scanned_queue); ++ ++_func_enter_; ++ ++ //_enter_critical_bh(&queue->lock, &irqL); ++ ++ #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) ++ rtw_WLAN_BSSID_EX_remove_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); ++ #endif ++ ++ update_current_network(adapter, pnetwork); ++ ++ rtw_update_scanned_network(adapter, pnetwork); ++ ++ //_exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++} ++ ++//select the desired network based on the capability of the (i)bss. ++// check items: (1) security ++// (2) network_type ++// (3) WMM ++// (4) HT ++// (5) others ++int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork); ++int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork) ++{ ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u32 desired_encmode; ++ u32 privacy; ++ ++ //u8 wps_ie[512]; ++ uint wps_ielen; ++ ++ int bselected = _TRUE; ++ ++ desired_encmode = psecuritypriv->ndisencryptstatus; ++ privacy = pnetwork->network.Privacy; ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ if(rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen)!=NULL) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++ } ++ if (adapter->registrypriv.wifi_spec == 1) //for correct flow of 8021X to do.... ++ { ++ u8 *p=NULL; ++ uint ie_len=0; ++ ++ if ((desired_encmode == Ndis802_11EncryptionDisabled) && (privacy != 0)) ++ bselected = _FALSE; ++ ++ if ( psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { ++ p = rtw_get_ie(pnetwork->network.IEs + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pnetwork->network.IELength - _BEACON_IE_OFFSET_)); ++ if (p && ie_len>0) { ++ bselected = _TRUE; ++ } else { ++ bselected = _FALSE; ++ } ++ } ++ } ++ ++ ++ if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) { ++ DBG_871X("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy); ++ bselected = _FALSE; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) ++ bselected = _FALSE; ++ } ++ ++ ++ return bselected; ++} ++ ++/* TODO: Perry : For Power Management */ ++void rtw_atimdone_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("receive atimdone_evet\n")); ++_func_exit_; ++ return; ++} ++ ++ ++void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ u32 len; ++ WLAN_BSSID_EX *pnetwork; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++_func_enter_; ++ ++ pnetwork = (WLAN_BSSID_EX *)pbuf; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_survey_event_callback, ssid=%s\n", pnetwork->Ssid.Ssid)); ++ ++#ifdef CONFIG_RTL8712 ++ //endian_convert ++ pnetwork->Length = le32_to_cpu(pnetwork->Length); ++ pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); ++ pnetwork->Privacy =le32_to_cpu( pnetwork->Privacy); ++ pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); ++ pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); ++ pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); ++ pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); ++ pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); ++ pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); ++ pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); ++ pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); ++ pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); ++ pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); ++ pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); ++ pnetwork->IELength = le32_to_cpu(pnetwork->IELength); ++#endif ++ ++ len = get_WLAN_BSSID_EX_sz(pnetwork); ++ if(len > (sizeof(WLAN_BSSID_EX))) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n ****rtw_survey_event_callback: return a wrong bss ***\n")); ++ return; ++ } ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ // update IBSS_network 's timestamp ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"rtw_survey_event_callback : WIFI_ADHOC_MASTER_STATE \n\n"); ++ if(_rtw_memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN)) ++ { ++ struct wlan_network* ibss_wlan = NULL; ++ _irqL irqL; ++ ++ _rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->MacAddress); ++ if(ibss_wlan) ++ { ++ _rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto exit; ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ } ++ } ++ ++ // lock pmlmepriv->lock when you accessing network_q ++ if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _FALSE) ++ { ++ if( pnetwork->Ssid.Ssid[0] == 0 ) ++ { ++ pnetwork->Ssid.SsidLength = 0; ++ } ++ rtw_add_network(adapter, pnetwork); ++ } ++ ++exit: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++_func_exit_; ++ ++ return; ++} ++ ++ ++ ++void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ u8 timer_cancelled = _FALSE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++#ifdef CONFIG_MLME_EXT ++ ++ mlmeext_surveydone_event_callback(adapter); ++ ++#endif ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); ++ ++ if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY)) ++ { ++ //u8 timer_cancelled; ++ ++ timer_cancelled = _TRUE; ++ //_cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ } ++ else { ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv))); ++ } ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if(timer_cancelled) ++ _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&adapter->recvpriv); ++ #endif ++ ++ if(pmlmepriv->to_join == _TRUE) ++ { ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) ) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)==_FALSE) ++ { ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS) ++ { ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT ); ++ } ++ else ++ { ++ WLAN_BSSID_EX *pdev_network = &(adapter->registrypriv.dev_network); ++ u8 *pibss = adapter->registrypriv.dev_network.MacAddress; ++ ++ //pmlmepriv->fw_state ^= _FW_UNDER_SURVEY;//because don't set assoc_timer ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("switching to adhoc master\n")); ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(adapter); ++ rtw_generate_random_ibss(pibss); ++ ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ ++ if(rtw_createbss_cmd(adapter)!=_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error=>rtw_createbss_cmd status FAIL\n")); ++ } ++ ++ pmlmepriv->to_join = _FALSE; ++ } ++ } ++ } ++ else ++ { ++ int s_ret; ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ pmlmepriv->to_join = _FALSE; ++ if(_SUCCESS == (s_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))) ++ { ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ } ++ else if(s_ret == 2)//there is no need to wait for join ++ { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ DBG_871X("try_to_join, but select scanning queue fail, to_roaming:%d\n", rtw_to_roaming(adapter)); ++ #ifdef CONFIG_LAYER2_ROAMING ++ if (rtw_to_roaming(adapter) != 0) { ++ if( --pmlmepriv->to_roaming == 0 ++ || _SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1, NULL, 0) ++ ) { ++ rtw_set_roaming(adapter, 0); ++#ifdef CONFIG_INTEL_WIDI ++ if(adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) ++ { ++ _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); ++ intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL); ++ DBG_871X("change to widi listen\n"); ++ } ++#endif // CONFIG_INTEL_WIDI ++ rtw_free_assoc_resources(adapter, 1); ++ rtw_indicate_disconnect(adapter); ++ } else { ++ pmlmepriv->to_join = _TRUE; ++ } ++ } ++ #endif ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ } ++ } ++ } ++ ++ indicate_wx_scan_complete_event(adapter); ++ //DBG_871X("scan complete in %dms\n",rtw_get_passing_time_ms(pmlmepriv->scan_start_time)); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++#ifdef CONFIG_P2P_PS ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ p2p_ps_wk_cmd(adapter, P2P_PS_SCAN_DONE, 0); ++ } ++#endif // CONFIG_P2P_PS ++ ++ rtw_os_xmit_schedule(adapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ rtw_os_xmit_schedule(adapter->pbuddy_adapter); ++#endif ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_resume_xmit(adapter); ++#endif ++ ++#ifdef CONFIG_DRVEXT_MODULE_WSC ++ drvext_surveydone_callback(&adapter->drvextpriv); ++#endif ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#ifdef CONFIG_INTEL_WIDI ++ if (adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_NONE) ++#endif ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ if(pmlmeext->sitesurvey_res.bss_cnt == 0){ ++ rtw_hal_sreset_reset(adapter); ++ } ++ } ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_surveydone_event_callback(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++_func_exit_; ++ ++} ++ ++void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++} ++ ++void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++} ++ ++static void free_scanqueue(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL, irqL0; ++ _queue *free_queue = &pmlmepriv->free_bss_pool; ++ _queue *scan_queue = &pmlmepriv->scanned_queue; ++ _list *plist, *phead, *ptemp; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n")); ++ _enter_critical_bh(&scan_queue->lock, &irqL0); ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ phead = get_list_head(scan_queue); ++ plist = get_next(phead); ++ ++ while (plist != phead) ++ { ++ ptemp = get_next(plist); ++ rtw_list_delete(plist); ++ rtw_list_insert_tail(plist, &free_queue->queue); ++ plist =ptemp; ++ pmlmepriv->num_of_scanned --; ++ } ++ ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ _exit_critical_bh(&scan_queue->lock, &irqL0); ++ ++_func_exit_; ++} ++ ++/* ++*rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue) ++{ ++ _irqL irqL; ++ struct wlan_network* pwlan = NULL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#endif //CONFIG_TDLS ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_free_assoc_resources\n")); ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n", ++ MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid)); ++ ++ if(check_fwstate( pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE)) ++ { ++ struct sta_info* psta; ++ ++ psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->setup_state != TDLS_STATE_NONE) ++ { ++ rtw_tdls_cmd(adapter, myid(&(adapter->eeprompriv)), TDLS_RS_RCR); ++ rtw_reset_tdls_info(adapter); ++ rtw_free_all_stainfo(adapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ } ++ else ++#endif //CONFIG_TDLS ++ { ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ } ++ ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ } ++ ++ if(check_fwstate( pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) ++ { ++ struct sta_info* psta; ++ ++ rtw_free_all_stainfo(adapter); ++ ++ psta = rtw_get_bcmc_stainfo(adapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(adapter); ++ } ++ ++ if(lock_scanned_queue) ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if(pwlan) ++ { ++ pwlan->fixed = _FALSE; ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) ++ { ++ u32 p2p_ielen=0; ++ u8 *p2p_ie; ++ //u16 capability; ++ u8 *pcap = NULL; ++ u32 capability_len=0; ++ ++ //DBG_871X("free disconnecting network\n"); ++ //rtw_free_network_nolock(pmlmepriv, pwlan); ++ ++ if((p2p_ie=rtw_get_p2p_ie(pwlan->network.IEs+_FIXED_IE_LENGTH_, pwlan->network.IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen))) ++ { ++ pcap = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, NULL, &capability_len); ++ if(pcap && capability_len==2) ++ { ++ u16 cap = *(u16*)pcap ; ++ *(u16*)pcap = cap&0x00ff;//clear group capability when free this network ++ } ++ } ++ ++ rtw_set_scan_deny(adapter, 2000); ++ //rtw_clear_scan_deny(adapter); ++ } ++#endif //CONFIG_P2P ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_assoc_resources : pwlan== NULL \n\n")); ++ } ++ ++ ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1)) ++ /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) ++ { ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ ++ if(lock_scanned_queue) ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ adapter->securitypriv.key_mask = 0; ++ ++_func_exit_; ++ ++} ++ ++/* ++*rtw_indicate_connect: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_connect\n")); ++ ++ pmlmepriv->to_join = _FALSE; ++ ++ if(!check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_LINK, 0); ++#endif ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ ++ rtw_led_control(padapter, LED_CTL_LINK); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ if(padapter->drvextpriv.enable_wpa) ++ { ++ indicate_l2_connect(padapter); ++ } ++ else ++#endif ++ { ++ rtw_os_indicate_connect(padapter); ++ } ++ ++ } ++ ++ rtw_set_roaming(padapter, 0); ++ ++#ifdef CONFIG_INTEL_WIDI ++ if(padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) ++ { ++ _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); ++ intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_WK, NULL); ++ DBG_871X("change to widi listen\n"); ++ } ++#endif // CONFIG_INTEL_WIDI ++ ++ rtw_set_scan_deny(padapter, 3000); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("-rtw_indicate_connect: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++*rtw_indicate_disconnect: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_indicate_disconnect( _adapter *padapter ) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_disconnect\n")); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS); ++ ++ if(rtw_to_roaming(padapter) > 0) ++ _clr_fwstate_(pmlmepriv, _FW_LINKED); ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED) ++ || (rtw_to_roaming(padapter) <= 0) ++ ) ++ { ++ rtw_os_indicate_disconnect(padapter); ++ ++ //set ips_deny_time to avoid enter IPS before LPS leave ++ padapter->pwrctrlpriv.ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(3000); ++ ++ _clr_fwstate_(pmlmepriv, _FW_LINKED); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ rtw_clear_scan_deny(padapter); ++ ++ } ++ ++#ifdef CONFIG_P2P_PS ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++#endif // CONFIG_P2P_PS ++ ++#ifdef CONFIG_LPS ++#ifdef CONFIG_WOWLAN ++ if(padapter->pwrctrlpriv.wowlan_mode==_FALSE) ++#endif //CONFIG_WOWLAN ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 1); ++ ++#endif ++ ++_func_exit_; ++} ++ ++inline void rtw_indicate_scan_done( _adapter *padapter, bool aborted) ++{ ++ rtw_os_indicate_scan_done(padapter, aborted); ++} ++ ++void rtw_scan_abort(_adapter *adapter) ++{ ++ u32 cnt=0; ++ u32 start; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ ++ start = rtw_get_current_time(); ++ pmlmeext->scan_abort = _TRUE; ++ while (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) ++ && rtw_get_passing_time_ms(start) <= 200) { ++ ++ if (adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ break; ++ ++ DBG_871X(FUNC_NDEV_FMT"fw_state=_FW_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev)); ++ rtw_msleep_os(20); ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { ++ if (!adapter->bDriverStopped && !adapter->bSurpriseRemoved) ++ DBG_871X(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev)); ++ #ifdef CONFIG_PLATFORM_MSTAR ++ //_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ set_survey_timer(pmlmeext, 0); ++ _set_timer(&pmlmepriv->scan_to_timer, 50); ++ #endif ++ rtw_indicate_scan_done(adapter, _TRUE); ++ } ++ pmlmeext->scan_abort = _FALSE; ++} ++ ++static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ int i; ++ struct sta_info *bmc_sta, *psta=NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress); ++ if(psta==NULL) { ++ psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress); ++ } ++ ++ if(psta) //update ptarget_sta ++ { ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psta->aid = pnetwork->join_res; ++#ifdef CONFIG_CONCURRENT_MODE ++ ++ if(PRIMARY_ADAPTER == padapter->adapter_type) ++ psta->mac_id=0; ++ else ++ psta->mac_id=2; ++#else ++ psta->mac_id=0; ++#endif ++ ++ psta->raid = networktype_to_raid(pmlmeext->cur_wireless_mode); ++ ++ //security related ++ if(padapter->securitypriv.dot11AuthAlgrthm== dot11AuthAlgrthm_8021X) ++ { ++ padapter->securitypriv.binstallGrpkey=_FALSE; ++ padapter->securitypriv.busetkipkey=_FALSE; ++ padapter->securitypriv.bgrpkey_handshake=_FALSE; ++ ++ psta->ieee8021x_blocked=_TRUE; ++ psta->dot118021XPrivacy=padapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ _rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof (union Keytype)); ++ ++ _rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof (union Keytype)); ++ _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof (union Keytype)); ++ ++ _rtw_memset((u8 *)&psta->dot11txpn, 0, sizeof (union pn48)); ++#ifdef CONFIG_IEEE80211W ++ _rtw_memset((u8 *)&psta->dot11wtxpn, 0, sizeof (union pn48)); ++#endif //CONFIG_IEEE80211W ++ _rtw_memset((u8 *)&psta->dot11rxpn, 0, sizeof (union pn48)); ++ } ++ ++ // Commented by Albert 2012/07/21 ++ // When doing the WPS, the wps_ie_len won't equal to 0 ++ // And the Wi-Fi driver shouldn't allow the data packet to be tramsmitted. ++ if ( padapter->securitypriv.wps_ie_len != 0 ) ++ { ++ psta->ieee8021x_blocked=_TRUE; ++ padapter->securitypriv.wps_ie_len = 0; ++ } ++ ++ ++ //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info ++ //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff ++ //todo: check if AP can send A-MPDU packets ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ ++ ++ bmc_sta = rtw_get_bcmc_stainfo(padapter); ++ if(bmc_sta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++ ++ ++ //misc. ++ update_sta_info(padapter, psta); ++ ++ } ++ ++ return psta; ++ ++} ++ ++//pnetwork : returns from rtw_joinbss_event_callback ++//ptarget_wlan: found from scanned_queue ++static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\nfw_state:%x, BSSID:"MAC_FMT"\n" ++ ,get_fwstate(pmlmepriv), MAC_ARG(pnetwork->network.MacAddress))); ++ ++ ++ // why not use ptarget_wlan?? ++ _rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length); ++ ++ cur_network->aid = pnetwork->join_res; ++ ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ padapter->recvpriv.signal_strength = ptarget_wlan->network.PhyInfo.SignalStrength; ++ padapter->recvpriv.signal_qual = ptarget_wlan->network.PhyInfo.SignalQuality; ++ //the ptarget_wlan->network.Rssi is raw data, we use ptarget_wlan->network.PhyInfo.SignalStrength instead (has scaled) ++ padapter->recvpriv.rssi = translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 ++ DBG_871X(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" ++ "\n" ++ , FUNC_ADPT_ARG(padapter) ++ , padapter->recvpriv.signal_strength ++ , padapter->recvpriv.rssi ++ , padapter->recvpriv.signal_qual ++ ); ++ #endif ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ ++ //update fw_state //will clr _FW_UNDER_LINKING here indirectly ++ switch(pnetwork->network.InfrastructureMode) ++ { ++ case Ndis802_11Infrastructure: ++ ++ if(pmlmepriv->fw_state&WIFI_UNDER_WPS) ++ pmlmepriv->fw_state = WIFI_STATION_STATE|WIFI_UNDER_WPS; ++ else ++ pmlmepriv->fw_state = WIFI_STATION_STATE; ++ ++ break; ++ case Ndis802_11IBSS: ++ pmlmepriv->fw_state = WIFI_ADHOC_STATE; ++ break; ++ default: ++ pmlmepriv->fw_state = WIFI_NULL_STATE; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Invalid network_mode\n")); ++ break; ++ } ++ ++ rtw_update_protection(padapter, (cur_network->network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), ++ (cur_network->network.IELength)); ++ ++#ifdef CONFIG_80211N_HT ++ rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength, (u8) cur_network->network.Configuration.DSConfig); ++#endif ++ ++ ++} ++ ++//Notes: the fucntion could be > passive_level (the same context as Rx tasklet) ++//pnetwork : returns from rtw_joinbss_event_callback ++//ptarget_wlan: found from scanned_queue ++//if join_res > 0, for (fw_state==WIFI_STATION_STATE), we check if "ptarget_sta" & "ptarget_wlan" exist. ++//if join_res > 0, for (fw_state==WIFI_ADHOC_STATE), we only check if "ptarget_wlan" exist. ++//if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL). ++// ++//#define REJOIN ++void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL,irqL2; ++ static u8 retry=0; ++ u8 timer_cancelled; ++ struct sta_info *ptarget_sta= NULL, *pcur_sta = NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; ++ unsigned int the_same_macaddr = _FALSE; ++ ++_func_enter_; ++ ++#ifdef CONFIG_RTL8712 ++ //endian_convert ++ pnetwork->join_res = le32_to_cpu(pnetwork->join_res); ++ pnetwork->network_type = le32_to_cpu(pnetwork->network_type); ++ pnetwork->network.Length = le32_to_cpu(pnetwork->network.Length); ++ pnetwork->network.Ssid.SsidLength = le32_to_cpu(pnetwork->network.Ssid.SsidLength); ++ pnetwork->network.Privacy =le32_to_cpu( pnetwork->network.Privacy); ++ pnetwork->network.Rssi = le32_to_cpu(pnetwork->network.Rssi); ++ pnetwork->network.NetworkTypeInUse =le32_to_cpu(pnetwork->network.NetworkTypeInUse) ; ++ pnetwork->network.Configuration.ATIMWindow = le32_to_cpu(pnetwork->network.Configuration.ATIMWindow); ++ pnetwork->network.Configuration.BeaconPeriod = le32_to_cpu(pnetwork->network.Configuration.BeaconPeriod); ++ pnetwork->network.Configuration.DSConfig = le32_to_cpu(pnetwork->network.Configuration.DSConfig); ++ pnetwork->network.Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->network.Configuration.FHConfig.DwellTime); ++ pnetwork->network.Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopPattern); ++ pnetwork->network.Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopSet); ++ pnetwork->network.Configuration.FHConfig.Length=le32_to_cpu(pnetwork->network.Configuration.FHConfig.Length); ++ pnetwork->network.Configuration.Length = le32_to_cpu(pnetwork->network.Configuration.Length); ++ pnetwork->network.InfrastructureMode = le32_to_cpu(pnetwork->network.InfrastructureMode); ++ pnetwork->network.IELength = le32_to_cpu(pnetwork->network.IELength ); ++#endif ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("joinbss event call back received with res=%d\n", pnetwork->join_res)); ++ ++ rtw_get_encrypt_decrypt_from_registrypriv(adapter); ++ ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ joinbss event call back for Any SSid\n")); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); ++ ++ pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network); ++ if(pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n ***joinbss_evt_callback return a wrong bss ***\n\n")); ++ goto ignore_joinbss_callback; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n rtw_joinbss_event_callback !! _enter_critical \n")); ++ ++ if(pnetwork->join_res > 0) ++ { ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ retry = 0; ++ if (check_fwstate(pmlmepriv,_FW_UNDER_LINKING) ) ++ { ++ //s1. find ptarget_wlan ++ if(check_fwstate(pmlmepriv, _FW_LINKED) ) ++ { ++ if(the_same_macaddr == _TRUE) ++ { ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ } ++ else ++ { ++ pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ if(pcur_wlan) pcur_wlan->fixed = _FALSE; ++ ++ pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(pcur_sta){ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ rtw_free_stainfo(adapter, pcur_sta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ } ++ ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ } ++ } ++ ++ } ++ else ++ { ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ } ++ } ++ ++ //s2. update cur_network ++ if(ptarget_wlan) ++ { ++ rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't find ptarget_wlan when joinbss_event callback\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ ++ ++ //s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); ++ if(ptarget_sta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't update stainfo when joinbss_event callback\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ } ++ ++ //s4. indicate connect ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ //adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); ++ } ++ ++ ++ //s5. Cancle assoc_timer ++ _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("Cancle assoc_timer\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_joinbss_event_callback err: fw_state:%x", get_fwstate(pmlmepriv))); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ } ++ else if(pnetwork->join_res == -4) ++ { ++ rtw_reset_securitypriv(adapter); ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ ++ //rtw_free_assoc_resources(adapter, 1); ++ ++ if((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv))); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ } ++ ++ } ++ else //if join_res < 0 (join fails), then try again ++ { ++ ++ #ifdef REJOIN ++ res = _FAIL; ++ if(retry < 2) { ++ res = rtw_select_and_join_from_scanned_queue(pmlmepriv); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_select_and_join_from_scanned_queue again! res:%d\n",res)); ++ } ++ ++ if(res == _SUCCESS) ++ { ++ //extend time of assoc_timer ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ retry++; ++ } ++ else if(res == 2)//there is no need to wait for join ++ { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Set Assoc_Timer = 1; can't find match ssid in scanned_q \n")); ++ #endif ++ ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ //rtw_free_assoc_resources(adapter, 1); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ #ifdef REJOIN ++ retry = 0; ++ } ++ #endif ++ } ++ ++ignore_joinbss_callback: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ _func_exit_; ++} ++ ++void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; ++ ++_func_enter_; ++ ++ mlmeext_joinbss_event_callback(adapter, pnetwork->join_res); ++ ++ rtw_os_xmit_schedule(adapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ rtw_os_xmit_schedule(adapter->pbuddy_adapter); ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_resume_xmit(adapter); ++#endif ++ ++_func_exit_; ++} ++ ++void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ struct sta_info *psta; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct stassoc_event *pstassoc = (struct stassoc_event*)pbuf; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wlan_network *ptarget_wlan = NULL; ++ ++_func_enter_; ++ ++ if(rtw_access_ctrl(adapter, pstassoc->macaddr) == _FALSE) ++ return; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if(psta) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef COMPAT_KERNEL_RELEASE ++ ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ u8 *passoc_req = NULL; ++ u32 assoc_req_len; ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ if(psta->passoc_req && psta->assoc_req_len>0) ++ { ++ passoc_req = rtw_zmalloc(psta->assoc_req_len); ++ if(passoc_req) ++ { ++ assoc_req_len = psta->assoc_req_len; ++ _rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len); ++ ++ rtw_mfree(psta->passoc_req , psta->assoc_req_len); ++ psta->passoc_req = NULL; ++ psta->assoc_req_len = 0; ++ } ++ } ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ if(passoc_req && assoc_req_len>0) ++ { ++ rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len); ++ ++ rtw_mfree(passoc_req, assoc_req_len); ++ } ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ //bss_cap_update_on_sta_join(adapter, psta); ++ //sta_info_update(adapter, psta); ++ ap_sta_info_defer_update(adapter, psta); ++ } ++ ++ goto exit; ++ } ++#endif ++ ++ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if( psta != NULL) ++ { ++ //the sta have been in sta_info_queue => do nothing ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue \n")); ++ ++ goto exit; //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) ++ } ++ ++ psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if (psta == NULL) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't alloc sta_info when rtw_stassoc_event_callback\n")); ++ goto exit; ++ } ++ ++ //to do : init sta_info variable ++ psta->qos_option = 0; ++ psta->mac_id = (uint)pstassoc->cam_id; ++ //psta->aid = (uint)pstassoc->cam_id; ++ ++ if(adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) ++ { ++ if(adapter->stapriv.asoc_sta_count== 2) ++ { ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // a sta + bc/mc_stainfo (not Ibss_stainfo) ++ rtw_indicate_connect(adapter); ++ } ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ mlmeext_sta_add_event_callback(adapter, psta); ++ ++#ifdef CONFIG_RTL8711 ++ //submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta ++ rtw_setstakey_cmd(adapter, (unsigned char*)psta, _FALSE); ++#endif ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL,irqL2; ++ struct sta_info *psta; ++ struct wlan_network* pwlan = NULL; ++ WLAN_BSSID_EX *pdev_network=NULL; ++ u8* pibss = NULL; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct stadel_event *pstadel = (struct stadel_event*)pbuf; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct wlan_network *tgt_network = &(pmlmepriv->cur_network); ++ ++_func_enter_; ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef COMPAT_KERNEL_RELEASE ++ ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(adapter, pstadel->macaddr, *(u16*)pstadel->rsvd); ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ return; ++ } ++ ++ ++ mlmeext_sta_del_event_callback(adapter); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL2); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ #ifdef CONFIG_LAYER2_ROAMING ++ if (rtw_to_roaming(adapter) > 0) ++ pmlmepriv->to_roaming--; /* this stadel_event is caused by roaming, decrease to_roaming */ ++ else if (rtw_to_roaming(adapter) == 0) ++ rtw_set_roaming(adapter, adapter->registrypriv.max_roaming_times); ++#ifdef CONFIG_INTEL_WIDI ++ if(adapter->mlmepriv.widi_state != INTEL_WIDI_STATE_CONNECTED) ++#endif // CONFIG_INTEL_WIDI ++ if(*((unsigned short *)(pstadel->rsvd)) != WLAN_REASON_EXPIRATION_CHK) ++ rtw_set_roaming(adapter, 0); /* don't roam */ ++ #endif ++ ++ rtw_free_uc_swdec_pending_queue(adapter); ++ ++ rtw_free_assoc_resources(adapter, 1); ++ rtw_indicate_disconnect(adapter); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // remove the network entry in scanned_queue ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if (pwlan) { ++ pwlan->fixed = _FALSE; ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ _rtw_roaming(adapter, tgt_network); ++ ++#ifdef CONFIG_INTEL_WIDI ++ if (!rtw_to_roaming(adapter)) ++ process_intel_widi_disconnect(adapter, 1); ++#endif // CONFIG_INTEL_WIDI ++ } ++ ++ if ( check_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE) || ++ check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) ++ { ++ psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ if(adapter->stapriv.asoc_sta_count== 1) //a sta + bc/mc_stainfo (not Ibss_stainfo) ++ { ++ //rtw_indicate_disconnect(adapter);//removed@20091105 ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ //free old ibss network ++ //pwlan = rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if(pwlan) ++ { ++ pwlan->fixed = _FALSE; ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ //re-create ibss ++ pdev_network = &(adapter->registrypriv.dev_network); ++ pibss = adapter->registrypriv.dev_network.MacAddress; ++ ++ _rtw_memcpy(pdev_network, &tgt_network->network, get_WLAN_BSSID_EX_sz(&tgt_network->network)); ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(adapter); ++ ++ rtw_generate_random_ibss(pibss); ++ ++ if(check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) ++ { ++ set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ ++ if(rtw_createbss_cmd(adapter)!=_SUCCESS) ++ { ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>stadel_event_callback: rtw_createbss_cmd status FAIL*** \n ")); ++ ++ } ++ ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL2); ++ ++_func_exit_; ++ ++} ++ ++ ++void rtw_cpwm_event_callback(PADAPTER padapter, u8 *pbuf) ++{ ++#ifdef CONFIG_LPS_LCLK ++ struct reportpwrstate_parm *preportpwrstate; ++#endif ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_cpwm_event_callback !!!\n")); ++#ifdef CONFIG_LPS_LCLK ++ preportpwrstate = (struct reportpwrstate_parm*)pbuf; ++ preportpwrstate->state |= (u8)(padapter->pwrctrlpriv.cpwm_tog + 0x80); ++ cpwm_int_hdl(padapter, preportpwrstate); ++#endif ++ ++_func_exit_; ++ ++} ++ ++/* ++* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss ++* @adapter: pointer to _adapter structure ++*/ ++void _rtw_join_timeout_handler (_adapter *adapter) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++#ifdef CONFIG_LAYER2_ROAMING ++ int do_join_r; ++#endif //CONFIG_LAYER2_ROAMING ++ ++#if 0 ++ if (adapter->bDriverStopped == _TRUE){ ++ _rtw_up_sema(&pmlmepriv->assoc_terminate); ++ return; ++ } ++#endif ++ ++_func_enter_; ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_lock(NULL); ++ if (callout_pending(&adapter->mlmepriv.assoc_timer.callout)) { ++ /* callout was reset */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ if (!callout_active(&adapter->mlmepriv.assoc_timer.callout)) { ++ /* callout was stopped */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ callout_deactivate(&adapter->mlmepriv.assoc_timer.callout); ++ ++ ++#endif ++ ++ DBG_871X("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ ++ if(adapter->bDriverStopped ||adapter->bSurpriseRemoved) ++ return; ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if (rtw_to_roaming(adapter) > 0) { /* join timeout caused by roaming */ ++ while(1) { ++ pmlmepriv->to_roaming--; ++ if (rtw_to_roaming(adapter) != 0) { /* try another */ ++ DBG_871X("%s try another roaming\n", __FUNCTION__); ++ if( _SUCCESS!=(do_join_r=rtw_do_join(adapter)) ) { ++ DBG_871X("%s roaming do_join return %d\n", __FUNCTION__ ,do_join_r); ++ continue; ++ } ++ break; ++ } else { ++#ifdef CONFIG_INTEL_WIDI ++ if(adapter->mlmepriv.widi_state == INTEL_WIDI_STATE_ROAMING) ++ { ++ _rtw_memset(pmlmepriv->sa_ext, 0x00, L2SDTA_SERVICE_VE_LEN); ++ intel_widi_wk_cmd(adapter, INTEL_WIDI_LISTEN_WK, NULL); ++ DBG_871X("change to widi listen\n"); ++ } ++#endif // CONFIG_INTEL_WIDI ++ DBG_871X("%s We've try roaming but fail\n", __FUNCTION__); ++ rtw_indicate_disconnect(adapter); ++ break; ++ } ++ } ++ ++ } else ++ #endif ++ { ++ rtw_indicate_disconnect(adapter); ++ free_scanqueue(pmlmepriv);//??? ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ //indicate disconnect for the case that join_timeout and check_fwstate != FW_LINKED ++ rtw_cfg80211_indicate_disconnect(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++#ifdef CONFIG_DRVEXT_MODULE_WSC ++ drvext_assoc_fail_indicate(&adapter->drvextpriv); ++#endif ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_unlock(NULL); ++#endif ++ ++_func_exit_; ++ ++} ++ ++/* ++* rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey ++* @adapter: pointer to _adapter structure ++*/ ++void rtw_scan_timeout_handler (_adapter *adapter) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ DBG_871X(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv)); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ rtw_indicate_scan_done(adapter, _TRUE); ++ ++} ++ ++static void rtw_auto_scan_handler(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ //auto site survey per 60sec ++ if(pmlmepriv->scan_interval >0) ++ { ++ pmlmepriv->scan_interval--; ++ if(pmlmepriv->scan_interval==0) ++ { ++/* ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_871X("exit %s when _FW_UNDER_SURVEY|_FW_UNDER_LINKING -> \n", __FUNCTION__); ++ return; ++ } ++ ++ if(pmlmepriv->sitesurveyctrl.traffic_busy == _TRUE) ++ { ++ DBG_871X("%s exit cause traffic_busy(%x)\n",__FUNCTION__, pmlmepriv->sitesurveyctrl.traffic_busy); ++ return; ++ } ++*/ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (rtw_buddy_adapter_up(padapter)) ++ { ++ if ((check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || ++ (padapter->pbuddy_adapter->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++ DBG_871X("%s, but buddy_intf is under scanning or linking or BusyTraffic\n", __FUNCTION__); ++ return; ++ } ++ } ++#endif ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); ++ ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ ++ } ++ ++ } ++ ++} ++ ++void rtw_dynamic_check_timer_handlder(_adapter *adapter) ++{ ++#ifdef CONFIG_AP_MODE ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++#endif //CONFIG_AP_MODE ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = adapter->pbuddy_adapter; ++#endif ++ ++ if(!adapter) ++ return; ++ ++ if(adapter->hw_init_completed == _FALSE) ++ return; ++ ++ if ((adapter->bDriverStopped == _TRUE)||(adapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter) ++ { ++ if(adapter->net_closed == _TRUE && pbuddy_adapter->net_closed == _TRUE) ++ { ++ return; ++ } ++ } ++ else ++#endif //CONFIG_CONCURRENT_MODE ++ if(adapter->net_closed == _TRUE) ++ { ++ return; ++ } ++ ++ rtw_dynamic_chk_wk_cmd(adapter); ++ ++ if(pregistrypriv->wifi_spec==1) ++ { ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++#endif ++ { ++ //auto site survey ++ rtw_auto_scan_handler(adapter); ++ } ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ expire_timeout_chk(adapter); ++ } ++#endif ++#endif //!CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if( adapter->pnetdev->br_port ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if( rcu_dereference(adapter->pnetdev->rx_handler_data) ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ // expire NAT2.5 entry ++ void nat25_db_expire(_adapter *priv); ++ nat25_db_expire(adapter); ++ ++ if (adapter->pppoe_connection_in_progress > 0) { ++ adapter->pppoe_connection_in_progress--; ++ } ++ ++ // due to rtw_dynamic_check_timer_handlder() is called every 2 seconds ++ if (adapter->pppoe_connection_in_progress > 0) { ++ adapter->pppoe_connection_in_progress--; ++ } ++ } ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++#endif // CONFIG_BR_EXT ++ ++} ++ ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++inline bool rtw_is_scan_deny(_adapter *adapter) ++{ ++ struct mlme_priv *mlmepriv = &adapter->mlmepriv; ++ return (ATOMIC_READ(&mlmepriv->set_scan_deny) != 0) ? _TRUE : _FALSE; ++} ++ ++inline void rtw_clear_scan_deny(_adapter *adapter) ++{ ++ struct mlme_priv *mlmepriv = &adapter->mlmepriv; ++ ATOMIC_SET(&mlmepriv->set_scan_deny, 0); ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++} ++ ++void rtw_set_scan_deny_timer_hdl(_adapter *adapter) ++{ ++ rtw_clear_scan_deny(adapter); ++} ++ ++void rtw_set_scan_deny(_adapter *adapter, u32 ms) ++{ ++ struct mlme_priv *mlmepriv = &adapter->mlmepriv; ++#ifdef CONFIG_CONCURRENT_MODE ++ struct mlme_priv *b_mlmepriv; ++#endif ++ ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter)); ++ ATOMIC_SET(&mlmepriv->set_scan_deny, 1); ++ _set_timer(&mlmepriv->set_scan_deny_timer, ms); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (!adapter->pbuddy_adapter) ++ return; ++ ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(adapter->pbuddy_adapter)); ++ b_mlmepriv = &adapter->pbuddy_adapter->mlmepriv; ++ ATOMIC_SET(&b_mlmepriv->set_scan_deny, 1); ++ _set_timer(&b_mlmepriv->set_scan_deny_timer, ms); ++#endif ++ ++} ++#endif ++ ++#if defined(IEEE80211_SCAN_RESULT_EXPIRE) ++#define RTW_SCAN_RESULT_EXPIRE IEEE80211_SCAN_RESULT_EXPIRE/HZ*1000 -1000 //3000 -1000 ++#else ++#define RTW_SCAN_RESULT_EXPIRE 2000 ++#endif ++ ++#ifndef PLATFORM_FREEBSD ++/* ++* Select a new join candidate from the original @param candidate and @param competitor ++* @return _TRUE: candidate is updated ++* @return _FALSE: candidate is not updated ++*/ ++static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv ++ , struct wlan_network **candidate, struct wlan_network *competitor) ++{ ++ int updated = _FALSE; ++ _adapter *adapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++ ++ //check bssid, if needed ++ if(pmlmepriv->assoc_by_bssid==_TRUE) { ++ if(_rtw_memcmp(competitor->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN) ==_FALSE) ++ goto exit; ++ } ++ ++ //check ssid, if needed ++ if(pmlmepriv->assoc_ssid.Ssid && pmlmepriv->assoc_ssid.SsidLength) { ++ if( competitor->network.Ssid.SsidLength != pmlmepriv->assoc_ssid.SsidLength ++ || _rtw_memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength) == _FALSE ++ ) ++ goto exit; ++ } ++ ++ if(rtw_is_desired_network(adapter, competitor) == _FALSE) ++ goto exit; ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ if(rtw_to_roaming(adapter) > 0) { ++ if( rtw_get_passing_time_ms((u32)competitor->last_scanned) >= RTW_SCAN_RESULT_EXPIRE ++ || is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) == _FALSE ++ ) ++ goto exit; ++ } ++#endif ++ ++ if(*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ ++#if 0 ++ if(pmlmepriv->assoc_by_bssid==_TRUE) { // associate with bssid ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && _rtw_memcmp(competitor->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } else if (pmlmepriv->assoc_ssid.SsidLength == 0 ) { // associate with ssid, but ssidlength is 0 ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } else ++#ifdef CONFIG_LAYER2_ROAMING ++ if(rtw_to_roaming(adapter)) { // roaming ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) ++ //&&(!is_same_network(&competitor->network, &pmlmepriv->cur_network.network)) ++ && rtw_get_passing_time_ms((u32)competitor->last_scanned) < RTW_SCAN_RESULT_EXPIRE ++ && rtw_is_desired_network(adapter, competitor) ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ ++ } else ++#endif ++ { // associate with ssid ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && (competitor->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength) ++ &&((_rtw_memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE) ++ && rtw_is_desired_network(adapter, competitor) ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } ++#endif ++ ++ if(updated){ ++ DBG_871X("[by_bssid:%u][assoc_ssid:%s]" ++ #ifdef CONFIG_LAYER2_ROAMING ++ "[to_roaming:%u] " ++ #endif ++ "new candidate: %s("MAC_FMT", ch%u) rssi:%d\n", ++ pmlmepriv->assoc_by_bssid, ++ pmlmepriv->assoc_ssid.Ssid, ++ #ifdef CONFIG_LAYER2_ROAMING ++ rtw_to_roaming(adapter), ++ #endif ++ (*candidate)->network.Ssid.Ssid, ++ MAC_ARG((*candidate)->network.MacAddress), ++ (*candidate)->network.Configuration.DSConfig, ++ (int)(*candidate)->network.Rssi ++ ); ++ } ++ ++exit: ++ return updated; ++} ++ ++/* ++Calling context: ++The caller of the sub-routine will be in critical section... ++ ++The caller must hold the following spinlock ++ ++pmlmepriv->lock ++ ++ ++*/ ++ ++int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv ) ++{ ++ _irqL irqL; ++ int ret; ++ _list *phead; ++ _adapter *adapter; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *candidate = NULL; ++ u8 bSupportAntDiv = _FALSE; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ adapter = (_adapter *)pmlmepriv->nic_hdl; ++ ++ pmlmepriv->pscanned = get_next( phead ); ++ ++ while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s return _FAIL:(pnetwork==NULL)\n", __FUNCTION__)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ #if 0 ++ DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid); ++ #endif ++ ++ rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork); ++ ++ } ++ ++ if(candidate == NULL) { ++ DBG_871X("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); ++ ret = _FAIL; ++ goto exit; ++ } else { ++ DBG_871X("%s: candidate: %s("MAC_FMT", ch:%u)\n", __FUNCTION__, ++ candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress), ++ candidate->network.Configuration.DSConfig); ++ } ++ ++ ++ // check for situation of _FW_LINKED ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ DBG_871X("%s: _FW_LINKED while ask_for_joinbss!!!\n", __FUNCTION__); ++ ++ #if 0 // for WPA/WPA2 authentication, wpa_supplicant will expect authentication from AP, it is needed to reconnect AP... ++ if(is_same_network(&pmlmepriv->cur_network.network, &candidate->network)) ++ { ++ DBG_871X("%s: _FW_LINKED and is same network, it needn't join again\n", __FUNCTION__); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ ++ ret = 2; ++ goto exit; ++ } ++ else ++ #endif ++ { ++ rtw_disassoc_cmd(adapter, 0, _TRUE); ++ rtw_indicate_disconnect(adapter); ++ rtw_free_assoc_resources(adapter, 0); ++ } ++ } ++ ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_hal_get_def_var(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); ++ if(_TRUE == bSupportAntDiv) ++ { ++ u8 CurrentAntenna; ++ rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); ++ DBG_871X("#### Opt_Ant_(%s) , cur_Ant(%s)\n", ++ (2==candidate->network.PhyInfo.Optimum_antenna)?"A":"B", ++ (2==CurrentAntenna)?"A":"B" ++ ); ++ } ++ #endif ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ret = rtw_joinbss_cmd(adapter, candidate); ++ ++exit: ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++_func_exit_; ++ ++ return ret; ++} ++#else ++int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv ) ++{ ++ _irqL irqL; ++ _list *phead; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ u8 CurrentAntenna; ++#endif ++ unsigned char *dst_ssid, *src_ssid; ++ _adapter *adapter; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *pnetwork_max_rssi = NULL; ++ #ifdef CONFIG_LAYER2_ROAMING ++ struct wlan_network * roaming_candidate=NULL; ++ u32 cur_time=rtw_get_current_time(); ++ #endif ++ ++_func_enter_; ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ adapter = (_adapter *)pmlmepriv->nic_hdl; ++ ++ pmlmepriv->pscanned = get_next( phead ); ++ ++ while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(2)rtw_select_and_join_from_scanned_queue return _FAIL:(pnetwork==NULL)\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return _FAIL; ++ } ++ ++ dst_ssid = pnetwork->network.Ssid.Ssid; ++ src_ssid = pmlmepriv->assoc_ssid.Ssid; ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ #if 0 ++ DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid); ++ #endif ++ ++ if(pmlmepriv->assoc_by_bssid==_TRUE) ++ { ++ if(_rtw_memcmp(pnetwork->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE) ++ { ++ //remove the condition @ 20081125 ++ //if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)|| ++ // pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode) ++ // goto ask_for_joinbss; ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) ++ { ++ //DBG_871X("select_and_join(1): _FW_LINKED and is same network, it needn't join again\n"); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return 2; ++ } ++ else ++ { ++ rtw_disassoc_cmd(adapter, 0, _TRUE); ++ rtw_indicate_disconnect(adapter); ++ rtw_free_assoc_resources(adapter, 0); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ ++ } ++ } ++ else ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ ++ } ++ ++ } else if (pmlmepriv->assoc_ssid.SsidLength == 0) { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss;//anyway, join first selected(dequeued) pnetwork if ssid_len=0 ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ } else if (rtw_to_roaming(adapter) > 0) { ++ ++ if( (roaming_candidate == NULL ||roaming_candidate->network.Rssinetwork.Rssi ) ++ && is_same_ess(&pnetwork->network, &pmlmepriv->cur_network.network) ++ //&&(!is_same_network(&pnetwork->network, &pmlmepriv->cur_network.network)) ++ && rtw_get_time_interval_ms((u32)pnetwork->last_scanned,cur_time) < 5000 ++ ) { ++ roaming_candidate = pnetwork; ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_, ++ DBG_871X ++ ("roaming_candidate???: %s("MAC_FMT")\n", ++ roaming_candidate->network.Ssid.Ssid, MAC_ARG(roaming_candidate->network.MacAddress) ) ++ //) ++ ; ++ } ++ continue; ++ #endif ++ ++ } else if ( (pnetwork->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength) ++ &&((_rtw_memcmp(dst_ssid, src_ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE) ++ ) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("dst_ssid=%s, src_ssid=%s \n", dst_ssid, src_ssid)); ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); ++ DBG_871X("#### dst_ssid=(%s) Opt_Ant_(%s) , cur_Ant(%s)\n", dst_ssid, ++ (2==pnetwork->network.PhyInfo.Optimum_antenna)?"A":"B", ++ (2==CurrentAntenna)?"A":"B"); ++#endif ++ //remove the condition @ 20081125 ++ //if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)|| ++ // pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode) ++ //{ ++ // _rtw_memcpy(pmlmepriv->assoc_bssid, pnetwork->network.MacAddress, ETH_ALEN); ++ // goto ask_for_joinbss; ++ //} ++ ++ if(pmlmepriv->assoc_by_rssi==_TRUE)//if the ssid is the same, select the bss which has the max rssi ++ { ++ if( NULL==pnetwork_max_rssi|| pnetwork->network.Rssi > pnetwork_max_rssi->network.Rssi) ++ pnetwork_max_rssi = pnetwork; ++ } ++ else if(rtw_is_desired_network(adapter, pnetwork) == _TRUE) ++ { ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++#if 0 ++ if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) ++ { ++ DBG_871X("select_and_join(2): _FW_LINKED and is same network, it needn't join again\n"); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ ++ return 2; ++ } ++ else ++#endif ++ { ++ rtw_disassoc_cmd(adapter, 0, _TRUE); ++ //rtw_indicate_disconnect(adapter);// ++ rtw_free_assoc_resources(adapter, 0); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ } ++ else ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ ++ } ++ ++ ++ } ++ ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(rtw_to_roaming(adapter) > 0 && roaming_candidate ){ ++ pnetwork=roaming_candidate; ++ DBG_871X("select_and_join_from_scanned_queue: roaming_candidate: %s("MAC_FMT")\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress)); ++ goto ask_for_joinbss; ++ } ++ #endif ++ ++ if((pmlmepriv->assoc_by_rssi==_TRUE) && (pnetwork_max_rssi!=NULL)) ++ { ++ pnetwork = pnetwork_max_rssi; ++ DBG_871X("select_and_join_from_scanned_queue: pnetwork_max_rssi: %s("MAC_FMT")\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress)); ++ goto ask_for_joinbss; ++ } ++ ++ DBG_871X("(1)rtw_select_and_join_from_scanned_queue return _FAIL\n"); ++ ++_func_exit_; ++ ++ return _FAIL; ++ ++ask_for_joinbss: ++ ++_func_exit_; ++ ++ return rtw_joinbss_cmd(adapter, pnetwork); ++ ++} ++#endif //PLATFORM_FREEBSD ++ ++ ++sint rtw_set_auth(_adapter * adapter,struct security_priv *psecuritypriv) ++{ ++ struct cmd_obj* pcmd; ++ struct setauth_parm *psetauthparm; ++ struct cmd_priv *pcmdpriv=&(adapter->cmdpriv); ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; //try again ++ goto exit; ++ } ++ ++ psetauthparm=(struct setauth_parm*)rtw_zmalloc(sizeof(struct setauth_parm)); ++ if(psetauthparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetauthparm, 0, sizeof(struct setauth_parm)); ++ psetauthparm->mode=(unsigned char)psecuritypriv->dot11AuthAlgrthm; ++ ++ pcmd->cmdcode = _SetAuth_CMD_; ++ pcmd->parmbuf = (unsigned char *)psetauthparm; ++ pcmd->cmdsz = (sizeof(struct setauth_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("after enqueue set_auth_cmd, auth_mode=%x\n", psecuritypriv->dot11AuthAlgrthm)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++ ++sint rtw_set_key(_adapter * adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx) ++{ ++ u8 keylen; ++ struct cmd_obj *pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; //try again ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ if(psecuritypriv->dot11AuthAlgrthm ==dot11AuthAlgrthm_8021X){ ++ psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d \n", psetkeyparm->algorithm)); ++ } ++ else{ ++ psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d \n", psetkeyparm->algorithm)); ++ ++ } ++ psetkeyparm->keyid = (u8)keyid;//0~3 ++ psetkeyparm->set_tx = set_tx; ++ if (is_wep_enc(psetkeyparm->algorithm)) ++ psecuritypriv->key_mask |= BIT(psetkeyparm->keyid); ++ ++ DBG_871X("==> rtw_set_key algorithm(%x),keyid(%x),key_mask(%x)\n",psetkeyparm->algorithm,psetkeyparm->keyid, psecuritypriv->key_mask); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d \n",psetkeyparm->algorithm, keyid)); ++ ++ switch(psetkeyparm->algorithm){ ++ ++ case _WEP40_: ++ keylen=5; ++ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); ++ break; ++ case _WEP104_: ++ keylen=13; ++ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); ++ break; ++ case _TKIP_: ++ keylen=16; ++ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); ++ psetkeyparm->grpkey=1; ++ break; ++ case _AES_: ++ keylen=16; ++ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); ++ psetkeyparm->grpkey=1; ++ break; ++ default: ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key:psecuritypriv->dot11PrivacyAlgrthm = %x (must be 1 or 2 or 4 or 5)\n",psecuritypriv->dot11PrivacyAlgrthm)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ //_rtw_init_sema(&(pcmd->cmd_sem), 0); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++ ++//adjust IEs for rtw_joinbss_cmd in WMM ++int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len) ++{ ++ unsigned int ielength=0; ++ unsigned int i, j; ++ ++ i = 12; //after the fixed IE ++ while(i=0 :if there is pre-auth key, and return the entry id ++// ++// ++ ++static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid) ++{ ++ struct security_priv *psecuritypriv=&Adapter->securitypriv; ++ int i=0; ++ ++ do ++ { ++ if( ( psecuritypriv->PMKIDList[i].bUsed ) && ++ ( _rtw_memcmp( psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN ) == _TRUE ) ) ++ { ++ break; ++ } ++ else ++ { ++ i++; ++ //continue; ++ } ++ ++ }while(isecuritypriv; ++ ++ if(ie[13]<=20){ ++ // The RSN IE didn't include the PMK ID, append the PMK information ++ ie[ie_len]=1; ++ ie_len++; ++ ie[ie_len]=0; //PMKID count = 0x0100 ++ ie_len++; ++ _rtw_memcpy( &ie[ie_len], &psecuritypriv->PMKIDList[iEntry].PMKID, 16); ++ ++ ie_len+=16; ++ ie[13]+=18;//PMKID length = 2+16 ++ ++ } ++ return (ie_len); ++ ++} ++sint rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie, u8 *out_ie, uint in_len) ++{ ++ u8 authmode, securitytype, match; ++ u8 sec_ie[255], uncst_oui[4], bkup_ie[255]; ++ u8 wpa_oui[4]={0x0, 0x50, 0xf2, 0x01}; ++ uint ielength, cnt, remove_cnt; ++ int iEntry; ++ ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct security_priv *psecuritypriv=&adapter->securitypriv; ++ uint ndisauthmode=psecuritypriv->ndisauthtype; ++ uint ndissecuritytype = psecuritypriv->ndisencryptstatus; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ++ ("+rtw_restruct_sec_ie: ndisauthmode=%d ndissecuritytype=%d\n", ++ ndisauthmode, ndissecuritytype)); ++ ++ //copy fixed ie only ++ _rtw_memcpy(out_ie, in_ie,12); ++ ielength=12; ++ if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK)) ++ authmode=_WPA_IE_ID_; ++ if((ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK)) ++ authmode=_WPA2_IE_ID_; ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ _rtw_memcpy(out_ie+ielength, psecuritypriv->wps_ie, psecuritypriv->wps_ie_len); ++ ++ ielength += psecuritypriv->wps_ie_len; ++ } ++ else if((authmode==_WPA_IE_ID_)||(authmode==_WPA2_IE_ID_)) ++ { ++ //copy RSN or SSN ++ _rtw_memcpy(&out_ie[ielength], &psecuritypriv->supplicant_ie[0], psecuritypriv->supplicant_ie[1]+2); ++ /* debug for CONFIG_IEEE80211W ++ { ++ int jj; ++ printk("supplicant_ie_length=%d &&&&&&&&&&&&&&&&&&&\n", psecuritypriv->supplicant_ie[1]+2); ++ for(jj=0; jj < psecuritypriv->supplicant_ie[1]+2; jj++) ++ printk(" %02x ", psecuritypriv->supplicant_ie[jj]); ++ printk("\n"); ++ }*/ ++ ielength+=psecuritypriv->supplicant_ie[1]+2; ++ rtw_report_sec_ie(adapter, authmode, psecuritypriv->supplicant_ie); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ drvext_report_sec_ie(&adapter->drvextpriv, authmode, sec_ie); ++#endif ++ } ++ ++ iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); ++ if(iEntry<0) ++ { ++ return ielength; ++ } ++ else ++ { ++ if(authmode == _WPA2_IE_ID_) ++ { ++ ielength=rtw_append_pmkid(adapter, iEntry, out_ie, ielength); ++ } ++ } ++ ++_func_exit_; ++ ++ return ielength; ++} ++ ++void rtw_init_registrypriv_dev_network( _adapter* adapter) ++{ ++ struct registry_priv* pregistrypriv = &adapter->registrypriv; ++ struct eeprom_priv* peepriv = &adapter->eeprompriv; ++ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; ++ u8 *myhwaddr = myid(peepriv); ++ ++_func_enter_; ++ ++ _rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID)); ++ ++ pdev_network->Configuration.Length=sizeof(NDIS_802_11_CONFIGURATION); ++ pdev_network->Configuration.BeaconPeriod = 100; ++ pdev_network->Configuration.FHConfig.Length = 0; ++ pdev_network->Configuration.FHConfig.HopPattern = 0; ++ pdev_network->Configuration.FHConfig.HopSet = 0; ++ pdev_network->Configuration.FHConfig.DwellTime = 0; ++ ++ ++_func_exit_; ++ ++} ++ ++void rtw_update_registrypriv_dev_network(_adapter* adapter) ++{ ++ int sz=0; ++ struct registry_priv* pregistrypriv = &adapter->registrypriv; ++ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; ++ struct security_priv* psecuritypriv = &adapter->securitypriv; ++ struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; ++ //struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ ++_func_enter_; ++ ++#if 0 ++ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; ++ pxmitpriv->vcs = pregistrypriv->vcs_type; ++ pxmitpriv->vcs_type = pregistrypriv->vcs_type; ++ //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; ++ pxmitpriv->frag_len = pregistrypriv->frag_thresh; ++ ++ adapter->qospriv.qos_option = pregistrypriv->wmm_enable; ++#endif ++ ++ pdev_network->Privacy = (psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0) ; // adhoc no 802.1x ++ ++ pdev_network->Rssi = 0; ++ ++ switch(pregistrypriv->wireless_mode) ++ { ++ case WIRELESS_11B: ++ pdev_network->NetworkTypeInUse = (Ndis802_11DS); ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11_24N: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); ++ break; ++ case WIRELESS_11A: ++ case WIRELESS_11A_5N: ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); ++ break; ++ case WIRELESS_11ABGN: ++ if(pregistrypriv->channel > 14) ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); ++ else ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); ++ break; ++ default : ++ // TODO ++ break; ++ } ++ ++ pdev_network->Configuration.DSConfig = (pregistrypriv->channel); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("pregistrypriv->channel=%d, pdev_network->Configuration.DSConfig=0x%x\n", pregistrypriv->channel, pdev_network->Configuration.DSConfig)); ++ ++ if(cur_network->network.InfrastructureMode == Ndis802_11IBSS) ++ pdev_network->Configuration.ATIMWindow = (0); ++ ++ pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode); ++ ++ // 1. Supported rates ++ // 2. IE ++ ++ //rtw_set_supported_rate(pdev_network->SupportedRates, pregistrypriv->wireless_mode) ; // will be called in rtw_generate_ie ++ sz = rtw_generate_ie(pregistrypriv); ++ ++ pdev_network->IELength = sz; ++ ++ pdev_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pdev_network); ++ ++ //notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd(); ++ //pdev_network->IELength = cpu_to_le32(sz); ++ ++_func_exit_; ++ ++} ++ ++void rtw_get_encrypt_decrypt_from_registrypriv(_adapter* adapter) ++{ ++_func_enter_; ++ ++ ++_func_exit_; ++ ++} ++ ++//the fucntion is at passive_level ++void rtw_joinbss_reset(_adapter *padapter) ++{ ++ u8 threshold; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++#endif ++ ++ //todo: if you want to do something io/reg/hw setting before join_bss, please add code here ++ ++ ++ ++ ++#ifdef CONFIG_80211N_HT ++ ++ pmlmepriv->num_FortyMHzIntolerant = 0; ++ ++ pmlmepriv->num_sta_no_ht = 0; ++ ++ phtpriv->ampdu_enable = _FALSE;//reset to disabled ++ ++#ifdef CONFIG_USB_HCI ++ // TH=1 => means that invalidate usb rx aggregation ++ // TH=0 => means that validate usb rx aggregation, use init value. ++ if(phtpriv->ht_option) ++ { ++ if(padapter->registrypriv.wifi_spec==1) ++ threshold = 1; ++ else ++ threshold = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++ else ++ { ++ threshold = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++#endif ++ ++#endif ++ ++} ++ ++ ++#ifdef CONFIG_80211N_HT ++ ++//the fucntion is >= passive_level ++unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel) ++{ ++ u32 ielen, out_len; ++ unsigned char *p, *pframe; ++ struct rtw_ieee80211_ht_cap ht_capie; ++ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ u8 cbw40_enable = 0; ++ ++ phtpriv->ht_option = _FALSE; ++ ++ p = rtw_get_ie(in_ie+12, _HT_CAPABILITY_IE_, &ielen, in_len-12); ++ ++ if(p && ielen>0) ++ { ++ if(pqospriv->qos_option == 0) ++ { ++ out_len = *pout_len; ++ pframe = rtw_set_ie(out_ie+out_len, _VENDOR_SPECIFIC_IE_, ++ _WMM_IE_Length_, WMM_IE, pout_len); ++ ++ pqospriv->qos_option = 1; ++ } ++ ++ out_len = *pout_len; ++ ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_TX_STBC | ++ IEEE80211_HT_CAP_DSSSCCK40; ++ //if insert module set only support 20MHZ, don't add the 40MHZ and SGI_40 ++ if( channel > 14 ) ++ { ++ if( pregpriv->cbw40_enable & BIT(1) ) ++ cbw40_enable = 1; ++ } ++ else ++ if( pregpriv->cbw40_enable & BIT(0) ) ++ cbw40_enable = 1; ++ ++ if ( cbw40_enable != 0 ) ++ ht_capie.cap_info |= IEEE80211_HT_CAP_SUP_WIDTH | IEEE80211_HT_CAP_SGI_40; ++ ++ ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ //if(max_recvbuf_sz-rx_packet_offset>(8191-256)) { ++ // DBG_871X("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__); ++ // ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ //} ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ) ++ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ else ++ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ ++ ++ pframe = rtw_set_ie(out_ie+out_len, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, pout_len); ++ ++ ++ //_rtw_memcpy(out_ie+out_len, p, ielen+2);//gtest ++ //*pout_len = *pout_len + (ielen+2); ++ ++ ++ phtpriv->ht_option = _TRUE; ++ ++ p = rtw_get_ie(in_ie+12, _HT_ADD_INFO_IE_, &ielen, in_len-12); ++ if(p && (ielen==sizeof(struct ieee80211_ht_addt_info))) ++ { ++ out_len = *pout_len; ++ pframe = rtw_set_ie(out_ie+out_len, _HT_ADD_INFO_IE_, ielen, p+2 , pout_len); ++ } ++ ++ } ++ ++ return (phtpriv->ht_option); ++ ++} ++ ++//the fucntion is > passive_level (in critical_section) ++void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) ++{ ++ u8 *p, max_ampdu_sz; ++ int len; ++ //struct sta_info *bmc_sta, *psta; ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ struct ieee80211_ht_addt_info *pht_addtinfo; ++ //struct recv_reorder_ctrl *preorder_ctrl; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ //struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ //struct wlan_network *pcur_network = &(pmlmepriv->cur_network);; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 cbw40_enable=0; ++ ++ if(!phtpriv->ht_option) ++ return; ++ ++ if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable)) ++ return; ++ ++ DBG_871X("+rtw_update_ht_cap()\n"); ++ ++ //maybe needs check if ap supports rx ampdu. ++ if((phtpriv->ampdu_enable==_FALSE) &&(pregistrypriv->ampdu_enable==1)) ++ { ++ //In the wifi cert. test, the test Lab should turn off the AP's RX AMPDU. client doen't need to close the TX AMPDU ++ /*if(pregistrypriv->wifi_spec==1) ++ { ++ phtpriv->ampdu_enable = _FALSE; ++ } ++ else*/ ++ { ++ phtpriv->ampdu_enable = _TRUE; ++ } ++ } ++ else if(pregistrypriv->ampdu_enable==2) ++ { ++ phtpriv->ampdu_enable = _TRUE; ++ } ++ ++ ++ //check Max Rx A-MPDU Size ++ len = 0; ++ p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_CAPABILITY_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); ++ if(p && len>0) ++ { ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR); ++ max_ampdu_sz = 1 << (max_ampdu_sz+3); // max_ampdu_sz (kbytes); ++ ++ //DBG_871X("rtw_update_ht_cap(): max_ampdu_sz=%d\n", max_ampdu_sz); ++ phtpriv->rx_ampdu_maxlen = max_ampdu_sz; ++ ++ } ++ ++ ++ len=0; ++ p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_ADD_INFO_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); ++ if(p && len>0) ++ { ++ pht_addtinfo = (struct ieee80211_ht_addt_info *)(p+2); ++ //todo: ++ } ++ ++ if( channel > 14 ) ++ { ++ if( pregistrypriv->cbw40_enable & BIT(1) ) ++ cbw40_enable = 1; ++ } ++ else ++ if( pregistrypriv->cbw40_enable & BIT(0) ) ++ cbw40_enable = 1; ++ ++ ++ //update cur_bwmode & cur_ch_offset ++ if ((cbw40_enable) && ++ (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && ++ (pmlmeinfo->HT_info.infos[0] & BIT(2))) ++ { ++ int i; ++ u8 rf_type; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ if((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ else ++ { ++ #ifdef CONFIG_DISABLE_MCS13TO15 ++ if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R_MCS13TO15_OFF[i]; ++ } ++ else ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; ++ #else ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; ++ #endif //CONFIG_DISABLE_MCS13TO15 ++ } ++ #ifdef RTL8192C_RECONFIG_TO_1T1R ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ #endif ++ ++ if(pregistrypriv->special_rf_path) ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ ++ } ++ //switch to the 40M Hz mode accoring to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) ++ { ++ case HT_EXTCHNL_OFFSET_UPPER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case HT_EXTCHNL_OFFSET_LOWER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ } ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++ ++ ++#if 0 //move to rtw_update_sta_info_client() ++ //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info ++ //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff ++ //todo: check if AP can send A-MPDU packets ++ bmc_sta = rtw_get_bcmc_stainfo(padapter); ++ if(bmc_sta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++ ++ psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); ++ if(psta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++#endif ++ ++} ++ ++void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ u8 issued; ++ int priority; ++ struct sta_info *psta=NULL; ++ struct ht_priv *phtpriv; ++ struct pkt_attrib *pattrib =&pxmitframe->attrib; ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ ++ if(bmcst || (padapter->mlmepriv.LinkDetectInfo.bTxBusyTraffic == _FALSE)) ++ return; ++ ++ priority = pattrib->priority; ++ ++ if (pattrib->psta) ++ psta = pattrib->psta; ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return; ++ } ++ ++ ++ phtpriv = &psta->htpriv; ++ ++ if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) ++ { ++ issued = (phtpriv->agg_enable_bitmap>>priority)&0x1; ++ issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1; ++ ++ if(0==issued) ++ { ++ DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority); ++ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); ++ rtw_addbareq_cmd(padapter,(u8) priority, pattrib->ra); ++ } ++ } ++ ++} ++ ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++inline void rtw_set_roaming(_adapter *adapter, u8 to_roaming) ++{ ++ if (to_roaming == 0) ++ adapter->mlmepriv.to_join = _FALSE; ++ adapter->mlmepriv.to_roaming = to_roaming; ++} ++ ++inline u8 rtw_to_roaming(_adapter *adapter) ++{ ++ return adapter->mlmepriv.to_roaming; ++} ++ ++void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _rtw_roaming(padapter, tgt_network); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ int do_join_r; ++ ++ struct wlan_network *pnetwork; ++ ++ if(tgt_network != NULL) ++ pnetwork = tgt_network; ++ else ++ pnetwork = &pmlmepriv->cur_network; ++ ++ if(0 < rtw_to_roaming(padapter)) { ++ DBG_871X("roaming from %s("MAC_FMT"), length:%d\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress), ++ pnetwork->network.Ssid.SsidLength); ++ _rtw_memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid, sizeof(NDIS_802_11_SSID)); ++ ++ pmlmepriv->assoc_by_bssid = _FALSE; ++ ++ while(1) { ++ if( _SUCCESS==(do_join_r=rtw_do_join(padapter)) ) { ++ break; ++ } else { ++ DBG_871X("roaming do_join return %d\n", do_join_r); ++ pmlmepriv->to_roaming--; ++ ++ if(0< rtw_to_roaming(padapter)) { ++ continue; ++ } else { ++ DBG_871X("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__,__LINE__); ++ rtw_indicate_disconnect(padapter); ++ break; ++ } ++ } ++ } ++ } ++ ++} ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++sint rtw_buddy_adapter_up(_adapter *padapter) ++{ ++ sint res = _FALSE; ++ ++ if(padapter == NULL) ++ return res; ++ ++ ++ if(padapter->pbuddy_adapter == NULL) ++ { ++ res = _FALSE; ++ } ++ else if( (padapter->pbuddy_adapter->bDriverStopped) || (padapter->pbuddy_adapter->bSurpriseRemoved) || ++ (padapter->pbuddy_adapter->bup == _FALSE) || (padapter->pbuddy_adapter->hw_init_completed == _FALSE)) ++ { ++ res = _FALSE; ++ } ++ else ++ { ++ res = _TRUE; ++ } ++ ++ return res; ++ ++} ++ ++sint check_buddy_fwstate(_adapter *padapter, sint state) ++{ ++ if(padapter == NULL) ++ return _FALSE; ++ ++ if(padapter->pbuddy_adapter == NULL) ++ return _FALSE; ++ ++ if ((state == WIFI_FW_NULL_STATE) && ++ (padapter->pbuddy_adapter->mlmepriv.fw_state == WIFI_FW_NULL_STATE)) ++ return _TRUE; ++ ++ if (padapter->pbuddy_adapter->mlmepriv.fw_state & state) ++ return _TRUE; ++ ++ return _FALSE; ++} ++#endif //CONFIG_CONCURRENT_MODE ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_mlme_ext.c +@@ -0,0 +1,13600 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MLME_EXT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct mlme_handler mlme_sta_tbl[]={ ++ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, ++ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, ++ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, ++ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, ++ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, ++ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, ++ ++ /*---------------------------------------------------------- ++ below 2 are reserved ++ -----------------------------------------------------------*/ ++ {0, "DoReserved", &DoReserved}, ++ {0, "DoReserved", &DoReserved}, ++ {WIFI_BEACON, "OnBeacon", &OnBeacon}, ++ {WIFI_ATIM, "OnATIM", &OnAtim}, ++ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, ++ {WIFI_AUTH, "OnAuth", &OnAuthClient}, ++ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, ++ {WIFI_ACTION, "OnAction", &OnAction}, ++}; ++ ++#ifdef _CONFIG_NATIVEAP_MLME_ ++struct mlme_handler mlme_ap_tbl[]={ ++ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, ++ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, ++ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, ++ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, ++ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, ++ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, ++ ++ /*---------------------------------------------------------- ++ below 2 are reserved ++ -----------------------------------------------------------*/ ++ {0, "DoReserved", &DoReserved}, ++ {0, "DoReserved", &DoReserved}, ++ {WIFI_BEACON, "OnBeacon", &OnBeacon}, ++ {WIFI_ATIM, "OnATIM", &OnAtim}, ++ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, ++ {WIFI_AUTH, "OnAuth", &OnAuth}, ++ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, ++ {WIFI_ACTION, "OnAction", &OnAction}, ++}; ++#endif ++ ++struct action_handler OnAction_tbl[]={ ++ {RTW_WLAN_CATEGORY_SPECTRUM_MGMT, "ACTION_SPECTRUM_MGMT", on_action_spct}, ++ {RTW_WLAN_CATEGORY_QOS, "ACTION_QOS", &OnAction_qos}, ++ {RTW_WLAN_CATEGORY_DLS, "ACTION_DLS", &OnAction_dls}, ++ {RTW_WLAN_CATEGORY_BACK, "ACTION_BACK", &OnAction_back}, ++ {RTW_WLAN_CATEGORY_PUBLIC, "ACTION_PUBLIC", on_action_public}, ++ {RTW_WLAN_CATEGORY_RADIO_MEASUREMENT, "ACTION_RADIO_MEASUREMENT", &DoReserved}, ++ {RTW_WLAN_CATEGORY_FT, "ACTION_FT", &DoReserved}, ++ {RTW_WLAN_CATEGORY_HT, "ACTION_HT", &OnAction_ht}, ++#ifdef CONFIG_IEEE80211W ++ {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &OnAction_sa_query}, ++#else ++ {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &DoReserved}, ++#endif //CONFIG_IEEE80211W ++ //add for CONFIG_IEEE80211W ++ {RTW_WLAN_CATEGORY_UNPROTECTED_WNM, "ACTION_UNPROTECTED_WNM", &DoReserved}, ++ {RTW_WLAN_CATEGORY_SELF_PROTECTED, "ACTION_SELF_PROTECTED", &DoReserved}, ++ {RTW_WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm}, ++ {RTW_WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p}, ++}; ++ ++ ++u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; ++ ++/************************************************** ++OUI definitions for the vendor specific IE ++***************************************************/ ++unsigned char RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; ++unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; ++unsigned char WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; ++unsigned char P2P_OUI[] = {0x50,0x6F,0x9A,0x09}; ++unsigned char WFD_OUI[] = {0x50,0x6F,0x9A,0x0A}; ++ ++unsigned char WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; ++unsigned char WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ ++unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; ++unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; ++ ++extern unsigned char REALTEK_96B_IE[]; ++ ++/******************************************************** ++MCS rate definitions ++*********************************************************/ ++#ifdef CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_2R_MCS13TO15_OFF[16] = {0xff, 0x1f, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++unsigned char MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++#else //CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++#endif //CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++ ++/******************************************************** ++ChannelPlan definitions ++*********************************************************/ ++/*static RT_CHANNEL_PLAN DefaultChannelPlan[RT_CHANNEL_DOMAIN_MAX] = { ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},32}, // 0x00, RT_CHANNEL_DOMAIN_FCC ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},31}, // 0x01, RT_CHANNEL_DOMAIN_IC ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x02, RT_CHANNEL_DOMAIN_ETSI ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x03, RT_CHANNEL_DOMAIN_SPAIN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x04, RT_CHANNEL_DOMAIN_FRANCE ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x05, RT_CHANNEL_DOMAIN_MKK ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x06, RT_CHANNEL_DOMAIN_MKK1 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, // 0x07, RT_CHANNEL_DOMAIN_ISRAEL ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // 0x08, RT_CHANNEL_DOMAIN_TELEC ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 ++ {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},26}, // 0x0B, RT_CHANNEL_DOMAIN_TAIWAN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,149,153,157,161,165},18}, // 0x0C, RT_CHANNEL_DOMAIN_CHINA ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, // 0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},31}, // 0x0E, RT_CHANNEL_DOMAIN_KOREA ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, // 0x0F, RT_CHANNEL_DOMAIN_TURKEY ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x10, RT_CHANNEL_DOMAIN_JAPAN ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,149,153,157,161,165},20}, // 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48},17}, // 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G ++ {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,149,153,157,161,165},19}, // 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS ++};*/ ++ ++static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 ++ {{1,2,3,4,5,6,7,8,9,10,11},11}, // 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 ++ {{10,11,12,13},4}, // 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 ++ {{},0}, // 0x05, RT_CHANNEL_DOMAIN_2G_NULL ++}; ++ ++static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = { ++ {{},0}, // 0x00, RT_CHANNEL_DOMAIN_5G_NULL ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165},22}, // 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 ++ {{36,40,44,48,149,153,157,161,165},9}, // 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 ++ {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 ++ {{36,40,44,48,52,56,60,64,149,153,157,161},12}, // 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 ++ {{149,153,157,161,165},5}, // 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 ++ {{36,40,44,48,52,56,60,64},8}, // 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},20}, // 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},20}, // 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 ++ {{36,40,44,48,52,56,60,64},8}, // 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 ++ {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 ++ {{56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},15}, // 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 ++ {{56,60,64,149,153,157,161,165},8}, // 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 ++ ++ //===== Driver self defined for old channel plan Compatible ,Remember to modify if have new channel plan definition ===== ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x11, RT_CHANNEL_DOMAIN_5G_FCC ++ {{36,40,44,48},4}, // 0x12, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS ++ {{36,40,44,48,149,153,157,161},8}, // 0x13, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS ++}; ++ ++static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { ++ //===== 0x00 ~ 0x1F , Old Define ===== ++ {0x02,0x11}, //0x00, RT_CHANNEL_DOMAIN_FCC ++ {0x02,0x0A}, //0x01, RT_CHANNEL_DOMAIN_IC ++ {0x01,0x01}, //0x02, RT_CHANNEL_DOMAIN_ETSI ++ {0x01,0x00}, //0x03, RT_CHANNEL_DOMAIN_SPAIN ++ {0x01,0x00}, //0x04, RT_CHANNEL_DOMAIN_FRANCE ++ {0x03,0x00}, //0x05, RT_CHANNEL_DOMAIN_MKK ++ {0x03,0x00}, //0x06, RT_CHANNEL_DOMAIN_MKK1 ++ {0x01,0x09}, //0x07, RT_CHANNEL_DOMAIN_ISRAEL ++ {0x03,0x09}, //0x08, RT_CHANNEL_DOMAIN_TELEC ++ {0x03,0x00}, //0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN ++ {0x00,0x00}, //0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 ++ {0x02,0x0F}, //0x0B, RT_CHANNEL_DOMAIN_TAIWAN ++ {0x01,0x08}, //0x0C, RT_CHANNEL_DOMAIN_CHINA ++ {0x02,0x06}, //0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO ++ {0x02,0x0B}, //0x0E, RT_CHANNEL_DOMAIN_KOREA ++ {0x02,0x09}, //0x0F, RT_CHANNEL_DOMAIN_TURKEY ++ {0x01,0x01}, //0x10, RT_CHANNEL_DOMAIN_JAPAN ++ {0x02,0x05}, //0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS ++ {0x01,0x12}, //0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS ++ {0x00,0x04}, //0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G ++ {0x02,0x10}, //0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS ++ {0x00,0x12}, //0x15, RT_CHANNEL_DOMAIN_ETSI_NO_DFS ++ {0x00,0x13}, //0x16, RT_CHANNEL_DOMAIN_KOREA_NO_DFS ++ {0x03,0x12}, //0x17, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS ++ {0x05,0x08}, //0x18, RT_CHANNEL_DOMAIN_PAKISTAN_NO_DFS ++ {0x02,0x08}, //0x19, RT_CHANNEL_DOMAIN_TAIWAN2_NO_DFS ++ {0x00,0x00}, //0x1A, ++ {0x00,0x00}, //0x1B, ++ {0x00,0x00}, //0x1C, ++ {0x00,0x00}, //0x1D, ++ {0x00,0x00}, //0x1E, ++ {0x05,0x04}, //0x1F, RT_CHANNEL_DOMAIN_WORLD_WIDE_ONLY_5G ++ //===== 0x20 ~ 0x7F ,New Define ===== ++ {0x00,0x00}, //0x20, RT_CHANNEL_DOMAIN_WORLD_NULL ++ {0x01,0x00}, //0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL ++ {0x02,0x00}, //0x22, RT_CHANNEL_DOMAIN_FCC1_NULL ++ {0x03,0x00}, //0x23, RT_CHANNEL_DOMAIN_MKK1_NULL ++ {0x04,0x00}, //0x24, RT_CHANNEL_DOMAIN_ETSI2_NULL ++ {0x02,0x04}, //0x25, RT_CHANNEL_DOMAIN_FCC1_FCC1 ++ {0x00,0x01}, //0x26, RT_CHANNEL_DOMAIN_WORLD_ETSI1 ++ {0x03,0x0C}, //0x27, RT_CHANNEL_DOMAIN_MKK1_MKK1 ++ {0x00,0x0B}, //0x28, RT_CHANNEL_DOMAIN_WORLD_KCC1 ++ {0x00,0x05}, //0x29, RT_CHANNEL_DOMAIN_WORLD_FCC2 ++ {0x00,0x00}, //0x2A, ++ {0x00,0x00}, //0x2B, ++ {0x00,0x00}, //0x2C, ++ {0x00,0x00}, //0x2D, ++ {0x00,0x00}, //0x2E, ++ {0x00,0x00}, //0x2F, ++ {0x00,0x06}, //0x30, RT_CHANNEL_DOMAIN_WORLD_FCC3 ++ {0x00,0x07}, //0x31, RT_CHANNEL_DOMAIN_WORLD_FCC4 ++ {0x00,0x08}, //0x32, RT_CHANNEL_DOMAIN_WORLD_FCC5 ++ {0x00,0x09}, //0x33, RT_CHANNEL_DOMAIN_WORLD_FCC6 ++ {0x02,0x0A}, //0x34, RT_CHANNEL_DOMAIN_FCC1_FCC7 ++ {0x00,0x02}, //0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI2 ++ {0x00,0x03}, //0x36, RT_CHANNEL_DOMAIN_WORLD_ETSI3 ++ {0x03,0x0D}, //0x37, RT_CHANNEL_DOMAIN_MKK1_MKK2 ++ {0x03,0x0E}, //0x38, RT_CHANNEL_DOMAIN_MKK1_MKK3 ++ {0x02,0x0F}, //0x39, RT_CHANNEL_DOMAIN_FCC1_NCC1 ++ {0x00,0x00}, //0x3A, ++ {0x00,0x00}, //0x3B, ++ {0x00,0x00}, //0x3C, ++ {0x00,0x00}, //0x3D, ++ {0x00,0x00}, //0x3E, ++ {0x00,0x00}, //0x3F, ++ {0x02,0x10}, //0x40, RT_CHANNEL_DOMAIN_FCC1_NCC2 ++}; ++ ++static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x03,0x02}; //use the conbination for max channel numbers ++ ++/* ++ * Search the @param ch in given @param ch_set ++ * @ch_set: the given channel set ++ * @ch: the given channel number ++ * ++ * return the index of channel_num in channel_set, -1 if not found ++ */ ++int rtw_ch_set_search_ch(RT_CHANNEL_INFO *ch_set, const u32 ch) ++{ ++ int i; ++ for(i=0;ch_set[i].ChannelNum!=0;i++){ ++ if(ch == ch_set[i].ChannelNum) ++ break; ++ } ++ ++ if(i >= ch_set[i].ChannelNum) ++ return -1; ++ return i; ++} ++ ++/* ++ * Check the @param ch is fit with setband setting of @param adapter ++ * @adapter: the given adapter ++ * @ch: the given channel number ++ * ++ * return _TRUE when check valid, _FALSE not valid ++ */ ++bool rtw_mlme_band_check(_adapter *adapter, const u32 ch) ++{ ++ if (adapter->setband == GHZ24_50 /* 2.4G and 5G */ ++ || (adapter->setband == GHZ_24 && ch < 35) /* 2.4G only */ ++ || (adapter->setband == GHZ_50 && ch > 35) /* 5G only */ ++ ) { ++ return _TRUE; ++ } ++ return _FALSE; ++} ++ ++/**************************************************************************** ++ ++Following are the initialization functions for WiFi MLME ++ ++*****************************************************************************/ ++ ++int init_hw_mlme_ext(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ //set_opmode_cmd(padapter, infra_client_with_mlme);//removed ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ return _SUCCESS; ++} ++ ++static void init_mlme_ext_priv_value(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //unsigned char default_channel_set[MAX_CHANNEL_NUM] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0, 0}; ++ unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; ++ unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,}; ++ ++ ATOMIC_SET(&pmlmeext->event_seq, 0); ++ pmlmeext->mgnt_seq = 0;//reset to zero when disconnect at client mode ++#ifdef CONFIG_IEEE80211W ++ pmlmeext->sa_query_seq = 0; ++ pmlmeext->mgnt_80211w_IPN=0; ++ pmlmeext->mgnt_80211w_IPN_rx=0; ++#endif //CONFIG_IEEE80211W ++ pmlmeext->cur_channel = padapter->registrypriv.channel; ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ pmlmeext->retry = 0; ++ ++ pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; ++ ++ //_rtw_memcpy(pmlmeext->channel_set, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Channel, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Len); ++ //_rtw_memcpy(pmlmeext->channel_set, default_channel_set, MAX_CHANNEL_NUM); ++ _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); ++ _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); ++ ++ if(pmlmeext->cur_channel > 14) ++ pmlmeext->tx_rate = IEEE80211_OFDM_RATE_6MB; ++ else ++ pmlmeext->tx_rate = IEEE80211_CCK_RATE_1MB; ++ ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->scan_abort = _FALSE; ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ pmlmeinfo->reauth_count = 0; ++ pmlmeinfo->reassoc_count = 0; ++ pmlmeinfo->link_count = 0; ++ pmlmeinfo->auth_seq = 0; ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; ++ pmlmeinfo->key_index = 0; ++ pmlmeinfo->iv = 0; ++ ++ pmlmeinfo->enc_algo = _NO_PRIVACY_; ++ pmlmeinfo->authModeToggle = 0; ++ ++ _rtw_memset(pmlmeinfo->chg_txt, 0, 128); ++ ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ pmlmeinfo->preamble_mode = PREAMBLE_AUTO; ++ ++ pmlmeinfo->dialogToken = 0; ++ ++ pmlmeext->action_public_rxseq = 0xffff; ++ pmlmeext->action_public_dialog_token = 0xff; ++} ++ ++static int has_channel(RT_CHANNEL_INFO *channel_set, ++ u8 chanset_size, ++ u8 chan) { ++ int i; ++ ++ for (i = 0; i < chanset_size; i++) { ++ if (channel_set[i].ChannelNum == chan) { ++ return 1; ++ } ++ } ++ ++ return 0; ++} ++ ++static void init_channel_list(_adapter *padapter, RT_CHANNEL_INFO *channel_set, ++ u8 chanset_size, ++ struct p2p_channels *channel_list) { ++ ++ struct p2p_oper_class_map op_class[] = { ++ { IEEE80211G, 81, 1, 13, 1, BW20 }, ++ { IEEE80211G, 82, 14, 14, 1, BW20 }, ++#if 0 /* Do not enable HT40 on 2 GHz */ ++ { IEEE80211G, 83, 1, 9, 1, BW40PLUS }, ++ { IEEE80211G, 84, 5, 13, 1, BW40MINUS }, ++#endif ++ { IEEE80211A, 115, 36, 48, 4, BW20 }, ++ { IEEE80211A, 116, 36, 44, 8, BW40PLUS }, ++ { IEEE80211A, 117, 40, 48, 8, BW40MINUS }, ++ { IEEE80211A, 124, 149, 161, 4, BW20 }, ++ { IEEE80211A, 125, 149, 169, 4, BW20 }, ++ { IEEE80211A, 126, 149, 157, 8, BW40PLUS }, ++ { IEEE80211A, 127, 153, 161, 8, BW40MINUS }, ++ { -1, 0, 0, 0, 0, BW20 } ++ }; ++ ++ int cla, op; ++ ++ cla = 0; ++ ++ for (op = 0; op_class[op].op_class; op++) { ++ u8 ch; ++ struct p2p_oper_class_map *o = &op_class[op]; ++ struct p2p_reg_class *reg = NULL; ++ ++ for (ch = o->min_chan; ch <= o->max_chan; ch += o->inc) { ++ if (!has_channel(channel_set, chanset_size, ch)) { ++ continue; ++ } ++ ++ if ((0 == padapter->registrypriv.ht_enable) && (8 == o->inc)) ++ continue; ++ ++ if ((0 == (padapter->registrypriv.cbw40_enable & BIT(1))) && ++ ((BW40MINUS == o->bw) || (BW40PLUS == o->bw))) ++ continue; ++ ++ if (reg == NULL) { ++ reg = &channel_list->reg_class[cla]; ++ cla++; ++ reg->reg_class = o->op_class; ++ reg->channels = 0; ++ } ++ reg->channel[reg->channels] = ch; ++ reg->channels++; ++ } ++ } ++ channel_list->reg_classes = cla; ++ ++} ++ ++static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) ++{ ++ u8 index,chanset_size = 0; ++ u8 b5GBand = _FALSE, b2_4GBand = _FALSE; ++ u8 Index2G = 0, Index5G=0; ++ ++ _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); ++ ++ if(ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) ++ { ++ DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan); ++ return chanset_size; ++ } ++ ++ if(padapter->registrypriv.wireless_mode & WIRELESS_11G) ++ { ++ b2_4GBand = _TRUE; ++ if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) ++ Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; ++ else ++ Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; ++ } ++ ++ if(padapter->registrypriv.wireless_mode & WIRELESS_11A) ++ { ++ b5GBand = _TRUE; ++ if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) ++ Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G; ++ else ++ Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G; ++ } ++ ++ if(b2_4GBand) ++ { ++ for(index=0;index= 1 && channel_set[chanset_size].ChannelNum <= 11) ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ else if((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ else if(RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan || ++ RT_CHANNEL_DOMAIN_2G_WORLD == Index2G)// channel 12~13, passive scan ++ { ++ if(channel_set[chanset_size].ChannelNum <= 11) ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ else ++ { ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ } ++ ++ chanset_size++; ++ } ++ } ++ ++ if(b5GBand) ++ { ++ for(index=0;index= 149 ) ++ { ++ if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ } ++ else ++ { ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ chanset_size++; ++#else /* CONFIG_DFS */ ++ if ( RTW_ChannelPlan5G[Index5G].Channel[index] <= 48 ++ || RTW_ChannelPlan5G[Index5G].Channel[index] >= 149 ) { ++ channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index]; ++ if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan)//passive scan for all 5G channels ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ DBG_871X("%s(): channel_set[%d].ChannelNum = %d\n", __FUNCTION__, chanset_size, channel_set[chanset_size].ChannelNum); ++ chanset_size++; ++ } ++#endif /* CONFIG_DFS */ ++ } ++ } ++ ++ return chanset_size; ++} ++ ++int init_mlme_ext_priv(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct registry_priv* pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((u8 *)pmlmeext, 0, sizeof(struct mlme_ext_priv)); ++ ++ pmlmeext->padapter = padapter; ++ ++ //fill_fwpriv(padapter, &(pmlmeext->fwpriv)); ++ ++ init_mlme_ext_priv_value(padapter); ++ pmlmeinfo->bAcceptAddbaReq = pregistrypriv->bAcceptAddbaReq; ++ ++ init_mlme_ext_timer(padapter); ++ ++#ifdef CONFIG_AP_MODE ++ init_mlme_ap_info(padapter); ++#endif ++ ++ pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan,pmlmeext->channel_set); ++ init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); ++ ++ pmlmeext->chan_scan_time = SURVEY_TO; ++ pmlmeext->mlmeext_init = _TRUE; ++ ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ pmlmeext->active_keep_alive_check = _TRUE; ++#endif ++ ++ return res; ++ ++} ++ ++void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext) ++{ ++ _adapter *padapter = pmlmeext->padapter; ++ ++ if (!padapter) ++ return; ++ ++ if (padapter->bDriverStopped == _TRUE) ++ { ++ _cancel_timer_ex(&pmlmeext->survey_timer); ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ //_cancel_timer_ex(&pmlmeext->ADDBA_timer); ++ } ++} ++ ++static u8 cmp_pkt_chnl_diff(_adapter *padapter,u8* pframe,uint packet_len) ++{ // if the channel is same, return 0. else return channel differential ++ uint len; ++ u8 channel; ++ u8 *p; ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_, _DSSET_IE_, &len, packet_len - _BEACON_IE_OFFSET_); ++ if (p) ++ { ++ channel = *(p + 2); ++ if(padapter->mlmeextpriv.cur_channel >= channel) ++ { ++ return (padapter->mlmeextpriv.cur_channel - channel); ++ } ++ else ++ { ++ return (channel-padapter->mlmeextpriv.cur_channel); ++ } ++ } ++ else ++ { ++ return 0; ++ } ++} ++ ++static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) ++{ ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ ++ if(ptable->func) ++ { ++ //receive the frames that ra(a1) is my address or ra(a1) is bc address. ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) ++ { ++ return; ++ } ++ ++ ptable->func(padapter, precv_frame); ++ } ++ ++} ++ ++void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int index; ++ struct mlme_handler *ptable; ++#ifdef CONFIG_AP_MODE ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif //CONFIG_AP_MODE ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(pframe)); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ++ ("+mgt_dispatcher: type(0x%x) subtype(0x%x)\n", ++ GetFrameType(pframe), GetFrameSubType(pframe))); ++ ++#if 0 ++ { ++ u8 *pbuf; ++ pbuf = GetAddr1Ptr(pframe); ++ DBG_871X("A1-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ pbuf = GetAddr2Ptr(pframe); ++ DBG_871X("A2-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ pbuf = GetAddr3Ptr(pframe); ++ DBG_871X("A3-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ } ++#endif ++ ++ if (GetFrameType(pframe) != WIFI_MGT_TYPE) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("mgt_dispatcher: type(0x%x) error!\n", GetFrameType(pframe))); ++ return; ++ } ++ ++ //receive the frames that ra(a1) is my address or ra(a1) is bc address. ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) ++ { ++ return; ++ } ++ ++ ptable = mlme_sta_tbl; ++ ++ index = GetFrameSubType(pframe) >> 4; ++ ++#ifdef CONFIG_TDLS ++ if((index << 4)==WIFI_ACTION){ ++ //category==RTW_WLAN_CATEGORY_PUBLIC, action==TDLS_DISCOVERY_RESPONSE ++ if(*(pframe + IEEE80211_MGMT_HDR_LEN ) == RTW_WLAN_CATEGORY_PUBLIC ++ && *(pframe + IEEE80211_MGMT_HDR_LEN + 1) == TDLS_DISCOVERY_RESPONSE ) ++ { ++ DBG_871X("recv tdls discovery response frame\n"); ++ On_TDLS_Dis_Rsp(padapter, precv_frame); ++ } ++ } ++#endif //CONFIG_TDLS ++ ++ if (index > 13) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Currently we do not support reserved sub-fr-type=%d\n", index)); ++ return; ++ } ++ ptable += index; ++ ++#if 1 ++ if (psta != NULL) ++ { ++ if (GetRetry(pframe)) ++ { ++ if (precv_frame->u.hdr.attrib.seq_num == psta->RxMgmtFrameSeqNum) ++ { ++ /* drop the duplicate management frame */ ++ DBG_871X("Drop duplicate management frame with seq_num = %d.\n", precv_frame->u.hdr.attrib.seq_num); ++ return; ++ } ++ } ++ psta->RxMgmtFrameSeqNum = precv_frame->u.hdr.attrib.seq_num; ++ } ++#else ++ ++ if(GetRetry(pframe)) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n")); ++ //return; ++ } ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ switch (GetFrameSubType(pframe)) ++ { ++ case WIFI_AUTH: ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ ptable->func = &OnAuth; ++ else ++ ptable->func = &OnAuthClient; ++ //pass through ++ case WIFI_ASSOCREQ: ++ case WIFI_REASSOCREQ: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++#ifdef CONFIG_HOSTAPD_MLME ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++#endif ++ break; ++ case WIFI_PROBEREQ: ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_HOSTAPD_MLME ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++#else ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++#endif ++ } ++ else ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ case WIFI_BEACON: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ case WIFI_ACTION: ++ //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ default: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++ break; ++ } ++#else ++ ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ ++#endif ++ ++} ++ ++#ifdef CONFIG_P2P ++u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da) ++{ ++ bool response = _TRUE; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ if (wdev_to_priv(padapter->rtw_wdev)->p2p_enabled == _FALSE ++ || padapter->mlmepriv.wps_probe_resp_ie == NULL ++ || padapter->mlmepriv.p2p_probe_resp_ie == NULL ++ ) ++ { ++ DBG_871X("DON'T issue_probersp_p2p: p2p_enabled:%d, wps_probe_resp_ie:%p, p2p_probe_resp_ie:%p\n", ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled, ++ padapter->mlmepriv.wps_probe_resp_ie, ++ padapter->mlmepriv.p2p_probe_resp_ie); ++ response = _FALSE; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) ++ { ++ // do nothing if the device name is empty ++ if ( !padapter->wdinfo.device_name_len ) ++ { ++ response = _FALSE; ++ } ++ } ++ ++ if (response == _TRUE) ++ issue_probersp_p2p( padapter, da); ++ ++ return _SUCCESS; ++} ++#endif //CONFIG_P2P ++ ++ ++/**************************************************************************** ++ ++Following are the callback functions for each subtype of the management frames ++ ++*****************************************************************************/ ++ ++unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int ielen; ++ unsigned char *p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ u8 is_valid_p2p_probereq = _FALSE; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ u8 wifi_test_chk_rate = 1; ++ ++ if ( !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) && ++ !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) ++ ) ++ { ++ // Commented by Albert 2011/03/17 ++ // mcs_rate = 0 -> CCK 1M rate ++ // mcs_rate = 1 -> CCK 2M rate ++ // mcs_rate = 2 -> CCK 5.5M rate ++ // mcs_rate = 3 -> CCK 11M rate ++ // In the P2P mode, the driver should not support the CCK rate ++ ++ // Commented by Kurt 2012/10/16 ++ // IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client ++#ifdef CONFIG_WIFI_TEST ++ if ( pattrib->mcs_rate <= 3 ) ++ { ++ wifi_test_chk_rate = 0; ++ } ++#endif //CONFIG_WIFI_TEST ++ ++ if( wifi_test_chk_rate == 1 ) ++ { ++ if((is_valid_p2p_probereq = process_probe_req_p2p_ie(pwdinfo, pframe, len)) == _TRUE) ++ { ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) ++ { ++ p2p_listen_state_process( padapter, get_sa(pframe)); ++ ++ return _SUCCESS; ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ goto _continue; ++ } ++ } ++ } ++ } ++ ++_continue: ++#endif //CONFIG_P2P ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ return _SUCCESS; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE && ++ check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)==_FALSE) ++ { ++ return _SUCCESS; ++ } ++ ++ ++ //DBG_871X("+OnProbeReq\n"); ++ ++#ifdef CONFIG_AUTO_AP_MODE ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && ++ pmlmepriv->cur_network.join_res == _TRUE) ++ { ++ _irqL irqL; ++ struct sta_info *psta; ++ u8 *mac_addr, *peer_addr; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 RC_OUI[4]={0x00,0xE0,0x4C,0x0A}; ++ //EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, (int *)&ielen, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ if(!p || ielen !=14) ++ goto _non_rc_device; ++ ++ if(!_rtw_memcmp(p+2, RC_OUI, sizeof(RC_OUI))) ++ goto _non_rc_device; ++ ++ if(!_rtw_memcmp(p+6, get_sa(pframe), ETH_ALEN)) ++ { ++ DBG_871X("%s, do rc pairing ("MAC_FMT"), but mac addr mismatch!("MAC_FMT")\n", __FUNCTION__, ++ MAC_ARG(get_sa(pframe)), MAC_ARG(p+6)); ++ ++ goto _non_rc_device; ++ } ++ ++ DBG_871X("%s, got the pairing device("MAC_FMT")\n", __FUNCTION__, MAC_ARG(get_sa(pframe))); ++ ++ //new a station ++ psta = rtw_get_stainfo(pstapriv, get_sa(pframe)); ++ if (psta == NULL) ++ { ++ // allocate a new one ++ DBG_871X("going to alloc stainfo for rc="MAC_FMT"\n", MAC_ARG(get_sa(pframe))); ++ psta = rtw_alloc_stainfo(pstapriv, get_sa(pframe)); ++ if (psta == NULL) ++ { ++ //TODO: ++ DBG_871X(" Exceed the upper limit of supported clients...\n"); ++ return _SUCCESS; ++ } ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list)) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ rtw_list_insert_tail(&psta->asoc_list, &pstapriv->asoc_list); ++ pstapriv->asoc_list_cnt++; ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ //generate pairing ID ++ mac_addr = myid(&(padapter->eeprompriv)); ++ peer_addr = psta->hwaddr; ++ psta->pid = (u16)(((mac_addr[4]<<8) + mac_addr[5]) + ((peer_addr[4]<<8) + peer_addr[5])); ++ ++ //update peer stainfo ++ psta->isrc = _TRUE; ++ //psta->aid = 0; ++ //psta->mac_id = 2; ++ ++ /* get a unique AID */ ++ if (psta->aid > 0) { ++ DBG_871X("old AID %d\n", psta->aid); ++ } else { ++ for (psta->aid = 1; psta->aid <= NUM_STA; psta->aid++) ++ if (pstapriv->sta_aid[psta->aid - 1] == NULL) ++ break; ++ ++ if (psta->aid > pstapriv->max_num_sta) { ++ psta->aid = 0; ++ DBG_871X("no room for more AIDs\n"); ++ return _SUCCESS; ++ } else { ++ pstapriv->sta_aid[psta->aid - 1] = psta; ++ DBG_871X("allocate new AID = (%d)\n", psta->aid); ++ } ++ } ++ ++ psta->qos_option = 1; ++ psta->htpriv.ht_option = _TRUE; ++ psta->ieee8021x_blocked = _FALSE; ++ psta->htpriv.ampdu_enable = _FALSE; ++ psta->htpriv.sgi = _FALSE; ++ psta->htpriv.bwmode = HT_CHANNEL_WIDTH_20; ++ psta->htpriv.ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ //rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _TRUE); ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ report_add_sta_event(padapter, psta->hwaddr, psta->aid); ++ ++ } ++ ++ issue_probersp(padapter, get_sa(pframe), _FALSE); ++ ++ return _SUCCESS; ++ ++ } ++ ++_non_rc_device: ++ ++ return _SUCCESS; ++#endif //CONFIG_AUTO_AP_MODE ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ //don't process probe req ++ return _SUCCESS; ++ } ++#endif ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ielen, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ ++ //check (wildcard) SSID ++ if (p != NULL) ++ { ++ if(is_valid_p2p_probereq == _TRUE) ++ { ++ goto _issue_probersp; ++ } ++ ++ if ( (ielen != 0 && _FALSE ==_rtw_memcmp((void *)(p+2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength)) ++ || (ielen == 0 && pmlmeinfo->hidden_ssid_mode) ++ ) ++ { ++ return _SUCCESS; ++ } ++ ++_issue_probersp: ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && ++ pmlmepriv->cur_network.join_res == _TRUE) ++ { ++ //DBG_871X("+issue_probersp during ap mode\n"); ++ issue_probersp(padapter, get_sa(pframe), is_valid_p2p_probereq); ++ } ++ ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *psta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif ++ ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) ++ { ++ if( _rtw_memcmp( pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) ++ { ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) ++ { ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ issue_p2p_provision_request( padapter, ++ pwdinfo->tx_prov_disc_info.ssid.Ssid, ++ pwdinfo->tx_prov_disc_info.ssid.SsidLength, ++ pwdinfo->tx_prov_disc_info.peerDevAddr ); ++ } ++ else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ issue_p2p_provision_request( padapter, ++ NULL, ++ 0, ++ pwdinfo->tx_prov_disc_info.peerDevAddr ); ++ } ++ } ++ } ++ return _SUCCESS; ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ if ( _TRUE == pwdinfo->nego_req_info.benable ) ++ { ++ DBG_871X( "[%s] P2P State is GONEGO ING!\n", __FUNCTION__ ); ++ if( _rtw_memcmp( pwdinfo->nego_req_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) ++ { ++ pwdinfo->nego_req_info.benable = _FALSE; ++ issue_p2p_GO_request( padapter, pwdinfo->nego_req_info.peerDevAddr); ++ } ++ } ++ } ++ else if( rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) ) ++ { ++ if ( _TRUE == pwdinfo->invitereq_info.benable ) ++ { ++ DBG_871X( "[%s] P2P_STATE_TX_INVITE_REQ!\n", __FUNCTION__ ); ++ if( _rtw_memcmp( pwdinfo->invitereq_info.peer_macaddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) ++ { ++ pwdinfo->invitereq_info.benable = _FALSE; ++ issue_p2p_invitation_request( padapter, pwdinfo->invitereq_info.peer_macaddr ); ++ } ++ } ++ } ++#endif ++ ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ report_survey_event(padapter, precv_frame); ++#ifdef CONFIG_CONCURRENT_MODE ++ report_survey_event(padapter->pbuddy_adapter, precv_frame); ++#endif ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_report_survey_event(padapter, precv_frame); ++#endif ++ return _SUCCESS; ++ } ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) ++ { ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ psta->sta_stats.rx_mgnt_pkts++; ++ } ++ } ++ } ++ #endif ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int cam_idx; ++ struct sta_info *psta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ u8 *p = NULL; ++ u32 ielen = 0; ++ ++#ifdef CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR ++ p = rtw_get_ie(pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ielen, precv_frame->u.hdr.len -sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_); ++ if ((p != NULL) && (ielen > 0)) ++ { ++ if ((*(p + 1 + ielen) == 0x2D) && (*(p + 2 + ielen) != 0x2D)) ++ { ++ /* Invalid value 0x2D is detected in Extended Supported Rates (ESR) IE. Try to fix the IE length to avoid failed Beacon parsing. */ ++ DBG_871X("[WIFIDBG] Error in ESR IE is detected in Beacon of BSSID:"MAC_FMT". Fix the length of ESR IE to avoid failed Beacon parsing.\n", MAC_ARG(GetAddr3Ptr(pframe))); ++ *(p + 1) = ielen - 1; ++ } ++ } ++#endif ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ report_survey_event(padapter, precv_frame); ++#ifdef CONFIG_CONCURRENT_MODE ++ report_survey_event(padapter->pbuddy_adapter, precv_frame); ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_report_survey_event(padapter, precv_frame); ++#endif ++ ++ return _SUCCESS; ++ } ++ ++ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) ++ { ++ if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) ++ { ++ //check the vendor of the assoc AP ++ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe+sizeof(struct rtw_ieee80211_hdr_3addr), len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++#ifdef CONFIG_P2P_PS ++ // do P2P PS Before link ? , ToDo ++ //process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); ++#endif // CONFIG_P2P_PS ++ ++ //update TSF Value ++ update_TSF(pmlmeext, pframe, len); ++ ++ //start auth ++ start_clnt_auth(padapter); ++ ++ return _SUCCESS; ++ } ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ #ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL ++ //Merge from 8712 FW code ++ if (cmp_pkt_chnl_diff(padapter,pframe,len) != 0) ++ { // join wrong channel, deauth and reconnect ++ issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ ++ report_del_sta_event(padapter,(&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL); ++ pmlmeinfo->state &= (~WIFI_FW_ASSOC_SUCCESS); ++ return _SUCCESS; ++ } ++ #endif //CONFIG_PATCH_JOIN_WRONG_CHANNEL ++ ++ //update WMM, ERP in the beacon ++ //todo: the timer is used instead of the number of the beacon received ++ if ((sta_rx_pkts(psta) & 0xf) == 0) ++ { ++ //DBG_871X("update_bcn_info\n"); ++ update_beacon_info(padapter, pframe, len, psta); ++ } ++ ++#ifdef CONFIG_DFS ++ process_csa_ie(padapter, pframe, len); //channel switch announcement ++#endif //CONFIG_DFS ++ ++#ifdef CONFIG_P2P_PS ++ //if(psta->ieee8021x_blocked == _FALSE) // do not allow P2P PS during EAPOL handshake ? ++ process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); ++#endif //CONFIG_P2P_PS ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ psta->sta_stats.rx_mgnt_pkts++; ++ #endif ++ } ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ //update WMM, ERP in the beacon ++ //todo: the timer is used instead of the number of the beacon received ++ if ((sta_rx_pkts(psta) & 0xf) == 0) ++ { ++ //DBG_871X("update_bcn_info\n"); ++ update_beacon_info(padapter, pframe, len, psta); ++ } ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ psta->sta_stats.rx_mgnt_pkts++; ++ #endif ++ } ++ else ++ { ++ //allocate a new CAM entry for IBSS station ++ if ((cam_idx = allocate_fw_sta_entry(padapter)) == NUM_STA) ++ { ++ goto _END_ONBEACON_; ++ } ++ ++ //get supported rate ++ if (update_sta_support_rate(padapter, (pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_), (len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_), cam_idx) == _FAIL) ++ { ++ pmlmeinfo->FW_sta_info[cam_idx].status = 0; ++ goto _END_ONBEACON_; ++ } ++ ++ //update TSF Value ++ update_TSF(pmlmeext, pframe, len); ++ ++ //report sta add event ++ report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx); ++ } ++ } ++ } ++ ++_END_ONBEACON_: ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ unsigned int auth_mode, seq, ie_len; ++ unsigned char *sa, *p; ++ u16 algorithm; ++ int status; ++ static struct sta_info stat; ++ struct sta_info *pstat=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ //don't process auth request; ++ return _SUCCESS; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return _FAIL; ++ ++ DBG_871X("+OnAuth\n"); ++ ++ sa = GetAddr2Ptr(pframe); ++ ++ auth_mode = psecuritypriv->dot11AuthAlgrthm; ++ seq = cpu_to_le16(*(u16*)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + 2)); ++ algorithm = cpu_to_le16(*(u16*)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN)); ++ ++ if (GetPrivacy(pframe)) ++ { ++#if 0 //TODO: SW rtw_wep_decrypt ++ if (SWCRYPTO) ++ { ++ status = rtw_wep_decrypt(priv, pframe, pfrinfo->pktlen, ++ priv->pmib->dot1180211AuthEntry.dot11PrivacyAlgrthm); ++ if (status == FALSE) ++ { ++ SAVE_INT_AND_CLI(flags); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"wep-decrypt a Auth frame error!\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ } ++ ++ seq = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4 + 2)); ++ algorithm = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4)); ++#endif ++ } ++ ++ ++ DBG_871X("auth alg=%x, seq=%X\n", algorithm, seq); ++ ++ if (auth_mode == 2 && ++ psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ && ++ psecuritypriv->dot11PrivacyAlgrthm != _WEP104_) ++ auth_mode = 0; ++ ++ if ((algorithm > 0 && auth_mode == 0) || // rx a shared-key auth but shared not enabled ++ (algorithm == 0 && auth_mode == 1) ) // rx a open-system auth but shared-key is enabled ++ { ++ DBG_871X("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n", ++ algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]); ++ ++ status = _STATS_NO_SUPP_ALG_; ++ ++ goto auth_fail; ++ } ++ ++#if 0 //ACL control ++ phead = &priv->wlan_acl_list; ++ plist = phead->next; ++ //check sa ++ if (acl_mode == 1) // 1: positive check, only those on acl_list can be connected. ++ res = FAIL; ++ else ++ res = SUCCESS; ++ ++ while(plist != phead) ++ { ++ paclnode = list_entry(plist, struct rtw_wlan_acl_node, list); ++ plist = plist->next; ++ if (!memcmp((void *)sa, paclnode->addr, 6)) { ++ if (paclnode->mode & 2) { // deny ++ res = FAIL; ++ break; ++ } ++ else { ++ res = SUCCESS; ++ break; ++ } ++ } ++ } ++ ++ if (res != SUCCESS) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"auth abort because ACL!\n"); ++ return FAIL; ++ } ++#else ++ if(rtw_access_ctrl(padapter, sa) == _FALSE) ++ { ++ status = _STATS_UNABLE_HANDLE_STA_; ++ goto auth_fail; ++ } ++#endif ++ ++ pstat = rtw_get_stainfo(pstapriv, sa); ++ if (pstat == NULL) ++ { ++ // allocate a new one ++ DBG_871X("going to alloc stainfo for sa="MAC_FMT"\n", MAC_ARG(sa)); ++ pstat = rtw_alloc_stainfo(pstapriv, sa); ++ if (pstat == NULL) ++ { ++ DBG_871X(" Exceed the upper limit of supported clients...\n"); ++ status = _STATS_UNABLE_HANDLE_STA_; ++ goto auth_fail; ++ } ++ ++ pstat->state = WIFI_FW_AUTH_NULL; ++ pstat->auth_seq = 0; ++ ++ //pstat->flags = 0; ++ //pstat->capability = 0; ++ } ++ else ++ { ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&pstat->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&pstat->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ if (pstat->expire_to > 0) ++ { ++ //TODO: STA re_auth within expire_to ++ } ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ if (seq==1) { ++ //TODO: STA re_auth and auth timeout ++ } ++ } ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->auth_list)) ++ { ++ rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); ++ pstapriv->auth_list_cnt++; ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ if (pstat->auth_seq == 0) ++ pstat->expire_to = pstapriv->auth_to; ++ ++ if ((pstat->auth_seq + 1) != seq) ++ { ++ DBG_871X("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ ++ if (algorithm==0 && (auth_mode == 0 || auth_mode == 2)) ++ { ++ if (seq == 1) ++ { ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ pstat->expire_to = pstapriv->assoc_to; ++ pstat->authalg = algorithm; ++ } ++ else ++ { ++ DBG_871X("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ } ++ else // shared system or auto authentication ++ { ++ if (seq == 1) ++ { ++ //prepare for the challenging txt... ++ ++ //get_random_bytes((void *)pstat->chg_txt, 128);//TODO: ++ ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_STATE; ++ pstat->authalg = algorithm; ++ pstat->auth_seq = 2; ++ } ++ else if (seq == 3) ++ { ++ //checking for challenging txt... ++ DBG_871X("checking for challenging txt...\n"); ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_ , _CHLGETXT_IE_, (int *)&ie_len, ++ len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4); ++ ++ if((p==NULL) || (ie_len<=0)) ++ { ++ DBG_871X("auth rejected because challenge failure!(1)\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ ++ if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128)) ++ { ++ pstat->state &= (~WIFI_FW_AUTH_STATE); ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ // challenging txt is correct... ++ pstat->expire_to = pstapriv->assoc_to; ++ } ++ else ++ { ++ DBG_871X("auth rejected because challenge failure!\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ } ++ else ++ { ++ DBG_871X("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ } ++ ++ ++ // Now, we are going to issue_auth... ++ pstat->auth_seq = seq + 1; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); ++#endif ++ ++ if (pstat->state & WIFI_FW_AUTH_SUCCESS) ++ pstat->auth_seq = 0; ++ ++ ++ return _SUCCESS; ++ ++auth_fail: ++ ++ if(pstat) ++ rtw_free_stainfo(padapter , pstat); ++ ++ pstat = &stat; ++ _rtw_memset((char *)pstat, '\0', sizeof(stat)); ++ pstat->auth_seq = 2; ++ _rtw_memcpy(pstat->hwaddr, sa, 6); ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_auth(padapter, pstat, (unsigned short)status); ++#endif ++ ++#endif ++ return _FAIL; ++ ++} ++ ++unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int seq, len, status, algthm, offset; ++ unsigned char *p; ++ unsigned int go2asoc = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++ ++ if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE)) ++ return _SUCCESS; ++ ++ offset = (GetPrivacy(pframe))? 4: 0; ++ ++ algthm = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); ++ seq = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); ++ status = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 4)); ++ ++ if (status != 0) ++ { ++ DBG_871X("clnt auth fail, status: %d\n", status); ++ if(status == 13)//&& pmlmeinfo->auth_algo == dot11AuthAlgrthm_Auto) ++ { ++ if(pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; ++ else ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; ++ //pmlmeinfo->reauth_count = 0; ++ } ++ ++ set_link_timer(pmlmeext, 1); ++ goto authclnt_fail; ++ } ++ ++ if (seq == 2) ++ { ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ { ++ // legendary shared system ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _AUTH_IE_OFFSET_, _CHLGETXT_IE_, (int *)&len, ++ pkt_len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_); ++ ++ if (p == NULL) ++ { ++ //DBG_871X("marc: no challenge text?\n"); ++ goto authclnt_fail; ++ } ++ ++ _rtw_memcpy((void *)(pmlmeinfo->chg_txt), (void *)(p + 2), len); ++ pmlmeinfo->auth_seq = 3; ++ issue_auth(padapter, NULL, 0); ++ set_link_timer(pmlmeext, REAUTH_TO); ++ ++ return _SUCCESS; ++ } ++ else ++ { ++ // open system ++ go2asoc = 1; ++ } ++ } ++ else if (seq == 4) ++ { ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ { ++ go2asoc = 1; ++ } ++ else ++ { ++ goto authclnt_fail; ++ } ++ } ++ else ++ { ++ // this is also illegal ++ //DBG_871X("marc: clnt auth failed due to illegal seq=%x\n", seq); ++ goto authclnt_fail; ++ } ++ ++ if (go2asoc) ++ { ++ start_clnt_assoc(padapter); ++ return _SUCCESS; ++ } ++ ++authclnt_fail: ++ ++ //pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE); ++ ++ return _FAIL; ++ ++} ++ ++unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ u16 capab_info, listen_interval; ++ struct rtw_ieee802_11_elems elems; ++ struct sta_info *pstat; ++ unsigned char reassoc, *p, *pos, *wpa_ie; ++ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; ++ int i, ie_len, wpa_ie_len, left; ++ unsigned char supportRate[16]; ++ int supportRateNum; ++ unsigned short status = _STATS_SUCCESSFUL_; ++ unsigned short frame_type, ie_offset=0; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 p2p_status_code = P2P_STATUS_SUCCESS; ++ u8 *p2pie; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#endif // CONFIG_WFD ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(padapter, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ //don't process assoc request; ++ return _SUCCESS; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return _FAIL; ++ ++ frame_type = GetFrameSubType(pframe); ++ if (frame_type == WIFI_ASSOCREQ) ++ { ++ reassoc = 0; ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ } ++ else // WIFI_REASSOCREQ ++ { ++ reassoc = 1; ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ } ++ ++ ++ if (pkt_len < IEEE80211_3ADDR_LEN + ie_offset) { ++ DBG_871X("handle_assoc(reassoc=%d) - too short payload (len=%lu)" ++ "\n", reassoc, (unsigned long)pkt_len); ++ return _FAIL; ++ } ++ ++ pstat = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (pstat == (struct sta_info *)NULL) ++ { ++ status = _RSON_CLS2_; ++ goto asoc_class2_error; ++ } ++ ++ capab_info = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN); ++ //capab_info = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ //listen_interval = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN+2)); ++ listen_interval = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN+2); ++ ++ left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset); ++ pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset); ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ // check if this stat has been successfully authenticated/assocated ++ if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) ++ { ++ if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) ++ { ++ status = _RSON_CLS2_; ++ goto asoc_class2_error; ++ } ++ else ++ { ++ pstat->state &= (~WIFI_FW_ASSOC_SUCCESS); ++ pstat->state |= WIFI_FW_ASSOC_STATE; ++ } ++ } ++ else ++ { ++ pstat->state &= (~WIFI_FW_AUTH_SUCCESS); ++ pstat->state |= WIFI_FW_ASSOC_STATE; ++ } ++ ++ ++#if 0// todo:tkip_countermeasures ++ if (hapd->tkip_countermeasures) { ++ resp = WLAN_REASON_MICHAEL_MIC_FAILURE; ++ goto fail; ++ } ++#endif ++ ++ pstat->capability = capab_info; ++ ++#if 0//todo: ++ //check listen_interval ++ if (listen_interval > hapd->conf->max_listen_interval) { ++ hostapd_logger(hapd, mgmt->sa, HOSTAPD_MODULE_IEEE80211, ++ HOSTAPD_LEVEL_DEBUG, ++ "Too large Listen Interval (%d)", ++ listen_interval); ++ resp = WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE; ++ goto fail; ++ } ++ ++ pstat->listen_interval = listen_interval; ++#endif ++ ++ //now parse all ieee802_11 ie to point to elems ++ if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed || ++ !elems.ssid) { ++ DBG_871X("STA " MAC_FMT " sent invalid association request\n", ++ MAC_ARG(pstat->hwaddr)); ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ ++ ++ // now we should check all the fields... ++ // checking SSID ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len, ++ pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p == NULL) ++ { ++ status = _STATS_FAILURE_; ++ } ++ ++ if (ie_len == 0) // broadcast ssid, however it is not allowed in assocreq ++ status = _STATS_FAILURE_; ++ else ++ { ++ // check if ssid match ++ if (!_rtw_memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) ++ status = _STATS_FAILURE_; ++ ++ if (ie_len != cur->Ssid.SsidLength) ++ status = _STATS_FAILURE_; ++ } ++ ++ if(_STATS_SUCCESSFUL_ != status) ++ goto OnAssocReqFail; ++ ++ // check if the supported rate is ok ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SUPPORTEDRATES_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p == NULL) { ++ DBG_871X("Rx a sta assoc-req which supported rate is empty!\n"); ++ // use our own rate set as statoin used ++ //_rtw_memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN); ++ //supportRateNum = AP_BSSRATE_LEN; ++ ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ else { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _EXT_SUPPORTEDRATES_IE_ , &ie_len, ++ pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p != NULL) { ++ ++ if(supportRateNum<=sizeof(supportRate)) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ } ++ } ++ } ++ ++ //todo: mask supportRate between AP & STA -> move to update raid ++ //get_matched_rate(pmlmeext, supportRate, &supportRateNum, 0); ++ ++ //update station supportRate ++ pstat->bssratelen = supportRateNum; ++ _rtw_memcpy(pstat->bssrateset, supportRate, supportRateNum); ++ ++ ++ //check RSN/WPA/WPS ++ pstat->dot8021xalg = 0; ++ pstat->wpa_psk = 0; ++ pstat->wpa_group_cipher = 0; ++ pstat->wpa2_group_cipher = 0; ++ pstat->wpa_pairwise_cipher = 0; ++ pstat->wpa2_pairwise_cipher = 0; ++ _rtw_memset(pstat->wpa_ie, 0, sizeof(pstat->wpa_ie)); ++ if((psecuritypriv->wpa_psk & BIT(1)) && elems.rsn_ie) { ++ ++ int group_cipher=0, pairwise_cipher=0; ++ ++ wpa_ie = elems.rsn_ie; ++ wpa_ie_len = elems.rsn_ie_len; ++ ++ if(rtw_parse_wpa2_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ pstat->dot8021xalg = 1;//psk, todo:802.1x ++ pstat->wpa_psk |= BIT(1); ++ ++ pstat->wpa2_group_cipher = group_cipher&psecuritypriv->wpa2_group_cipher; ++ pstat->wpa2_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa2_pairwise_cipher; ++ ++ if(!pstat->wpa2_group_cipher) ++ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; ++ ++ if(!pstat->wpa2_pairwise_cipher) ++ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; ++ } ++ else ++ { ++ status = WLAN_STATUS_INVALID_IE; ++ } ++ ++ } else if ((psecuritypriv->wpa_psk & BIT(0)) && elems.wpa_ie) { ++ ++ int group_cipher=0, pairwise_cipher=0; ++ ++ wpa_ie = elems.wpa_ie; ++ wpa_ie_len = elems.wpa_ie_len; ++ ++ if(rtw_parse_wpa_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ pstat->dot8021xalg = 1;//psk, todo:802.1x ++ pstat->wpa_psk |= BIT(0); ++ ++ pstat->wpa_group_cipher = group_cipher&psecuritypriv->wpa_group_cipher; ++ pstat->wpa_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa_pairwise_cipher; ++ ++ if(!pstat->wpa_group_cipher) ++ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; ++ ++ if(!pstat->wpa_pairwise_cipher) ++ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; ++ ++ } ++ else ++ { ++ status = WLAN_STATUS_INVALID_IE; ++ } ++ ++ } else { ++ wpa_ie = NULL; ++ wpa_ie_len = 0; ++ } ++ ++ if(_STATS_SUCCESSFUL_ != status) ++ goto OnAssocReqFail; ++ ++ pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS); ++ //if (hapd->conf->wps_state && wpa_ie == NULL) { //todo: to check ap if supporting WPS ++ if(wpa_ie == NULL) { ++ if (elems.wps_ie) { ++ DBG_871X("STA included WPS IE in " ++ "(Re)Association Request - assume WPS is " ++ "used\n"); ++ pstat->flags |= WLAN_STA_WPS; ++ //wpabuf_free(sta->wps_ie); ++ //sta->wps_ie = wpabuf_alloc_copy(elems.wps_ie + 4, ++ // elems.wps_ie_len - 4); ++ } else { ++ DBG_871X("STA did not include WPA/RSN IE " ++ "in (Re)Association Request - possible WPS " ++ "use\n"); ++ pstat->flags |= WLAN_STA_MAYBE_WPS; ++ } ++ ++ ++ // AP support WPA/RSN, and sta is going to do WPS, but AP is not ready ++ // that the selected registrar of AP is _FLASE ++ if((psecuritypriv->wpa_psk >0) ++ && (pstat->flags & (WLAN_STA_WPS|WLAN_STA_MAYBE_WPS))) ++ { ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u8 selected_registrar = 0; ++ ++ rtw_get_wps_attr_content(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len, WPS_ATTR_SELECTED_REGISTRAR , &selected_registrar, NULL); ++ ++ if(!selected_registrar) ++ { ++ DBG_871X("selected_registrar is _FALSE , or AP is not ready to do WPS\n"); ++ ++ status = _STATS_UNABLE_HANDLE_STA_; ++ ++ goto OnAssocReqFail; ++ } ++ } ++ } ++ ++ } ++ else ++ { ++ int copy_len; ++ ++ if(psecuritypriv->wpa_psk == 0) ++ { ++ DBG_871X("STA " MAC_FMT ": WPA/RSN IE in association " ++ "request, but AP don't support WPA/RSN\n", MAC_ARG(pstat->hwaddr)); ++ ++ status = WLAN_STATUS_INVALID_IE; ++ ++ goto OnAssocReqFail; ++ ++ } ++ ++ if (elems.wps_ie) { ++ DBG_871X("STA included WPS IE in " ++ "(Re)Association Request - WPS is " ++ "used\n"); ++ pstat->flags |= WLAN_STA_WPS; ++ copy_len=0; ++ } ++ else ++ { ++ copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)):(wpa_ie_len+2); ++ } ++ ++ ++ if(copy_len>0) ++ _rtw_memcpy(pstat->wpa_ie, wpa_ie-2, copy_len); ++ ++ } ++ ++ ++ // check if there is WMM IE & support WWM-PS ++ pstat->flags &= ~WLAN_STA_WME; ++ pstat->qos_option = 0; ++ pstat->qos_info = 0; ++ pstat->has_legacy_ac = _TRUE; ++ pstat->uapsd_vo = 0; ++ pstat->uapsd_vi = 0; ++ pstat->uapsd_be = 0; ++ pstat->uapsd_bk = 0; ++ if (pmlmepriv->qospriv.qos_option) ++ { ++ p = pframe + WLAN_HDR_A3_LEN + ie_offset; ie_len = 0; ++ for (;;) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p != NULL) { ++ if (_rtw_memcmp(p+2, WMM_IE, 6)) { ++ ++ pstat->flags |= WLAN_STA_WME; ++ ++ pstat->qos_option = 1; ++ pstat->qos_info = *(p+8); ++ ++ pstat->max_sp_len = (pstat->qos_info>>5)&0x3; ++ ++ if((pstat->qos_info&0xf) !=0xf) ++ pstat->has_legacy_ac = _TRUE; ++ else ++ pstat->has_legacy_ac = _FALSE; ++ ++ if(pstat->qos_info&0xf) ++ { ++ if(pstat->qos_info&BIT(0)) ++ pstat->uapsd_vo = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_vo = 0; ++ ++ if(pstat->qos_info&BIT(1)) ++ pstat->uapsd_vi = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_vi = 0; ++ ++ if(pstat->qos_info&BIT(2)) ++ pstat->uapsd_bk = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_bk = 0; ++ ++ if(pstat->qos_info&BIT(3)) ++ pstat->uapsd_be = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_be = 0; ++ ++ } ++ ++ break; ++ } ++ } ++ else { ++ break; ++ } ++ p = p + ie_len + 2; ++ } ++ } ++ ++ ++#ifdef CONFIG_80211N_HT ++ /* save HT capabilities in the sta object */ ++ _rtw_memset(&pstat->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ if (elems.ht_capabilities && elems.ht_capabilities_len >= sizeof(struct rtw_ieee80211_ht_cap)) ++ { ++ pstat->flags |= WLAN_STA_HT; ++ ++ pstat->flags |= WLAN_STA_WME; ++ ++ _rtw_memcpy(&pstat->htpriv.ht_cap, elems.ht_capabilities, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ } else ++ pstat->flags &= ~WLAN_STA_HT; ++ ++ ++ if((pmlmepriv->htpriv.ht_option == _FALSE) && (pstat->flags&WLAN_STA_HT)) ++ { ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ ++ ++ if ((pstat->flags & WLAN_STA_HT) && ++ ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) ++ { ++ DBG_871X("HT: " MAC_FMT " tried to " ++ "use TKIP with HT association\n", MAC_ARG(pstat->hwaddr)); ++ ++ //status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; ++ //goto OnAssocReqFail; ++ } ++#endif /* CONFIG_80211N_HT */ ++ ++ // ++ //if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G)//? ++ pstat->flags |= WLAN_STA_NONERP; ++ for (i = 0; i < pstat->bssratelen; i++) { ++ if ((pstat->bssrateset[i] & 0x7f) > 22) { ++ pstat->flags &= ~WLAN_STA_NONERP; ++ break; ++ } ++ } ++ ++ if (pstat->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) ++ pstat->flags |= WLAN_STA_SHORT_PREAMBLE; ++ else ++ pstat->flags &= ~WLAN_STA_SHORT_PREAMBLE; ++ ++ ++ ++ if (status != _STATS_SUCCESSFUL_) ++ goto OnAssocReqFail; ++ ++#ifdef CONFIG_P2P ++ pstat->is_p2p_device = _FALSE; ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if( (p2pie=rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , NULL, &p2pielen))) ++ { ++ pstat->is_p2p_device = _TRUE; ++ if((p2p_status_code=(u8)process_assoc_req_p2p_ie(pwdinfo, pframe, pkt_len, pstat))>0) ++ { ++ pstat->p2p_status_code = p2p_status_code; ++ status = _STATS_CAP_FAIL_; ++ goto OnAssocReqFail; ++ } ++ } ++#ifdef CONFIG_WFD ++ if(rtw_get_wfd_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , wfd_ie, &wfd_ielen )) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ } ++#endif ++ } ++ pstat->p2p_status_code = p2p_status_code; ++#endif //CONFIG_P2P ++ ++ //TODO: identify_proprietary_vendor_ie(); ++ // Realtek proprietary IE ++ // identify if this is Broadcom sta ++ // identify if this is ralink sta ++ // Customer proprietary IE ++ ++ ++ ++ /* get a unique AID */ ++ if (pstat->aid > 0) { ++ DBG_871X(" old AID %d\n", pstat->aid); ++ } else { ++ for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++) ++ if (pstapriv->sta_aid[pstat->aid - 1] == NULL) ++ break; ++ ++ //if (pstat->aid > NUM_STA) { ++ if (pstat->aid > pstapriv->max_num_sta) { ++ ++ pstat->aid = 0; ++ ++ DBG_871X(" no room for more AIDs\n"); ++ ++ status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; ++ ++ goto OnAssocReqFail; ++ ++ ++ } else { ++ pstapriv->sta_aid[pstat->aid - 1] = pstat; ++ DBG_871X("allocate new AID = (%d)\n", pstat->aid); ++ } ++ } ++ ++ ++ pstat->state &= (~WIFI_FW_ASSOC_STATE); ++ pstat->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (!rtw_is_list_empty(&pstat->auth_list)) ++ { ++ rtw_list_delete(&pstat->auth_list); ++ pstapriv->auth_list_cnt--; ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->asoc_list)) ++ { ++ pstat->expire_to = pstapriv->expire_to; ++ rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); ++ pstapriv->asoc_list_cnt++; ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ // now the station is qualified to join our BSS... ++ if(pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_==status)) ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ //.1 bss_cap_update & sta_info_update ++ bss_cap_update_on_sta_join(padapter, pstat); ++ sta_info_update(padapter, pstat); ++ ++ //issue assoc rsp before notify station join event. ++ if (frame_type == WIFI_ASSOCREQ) ++ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); ++ else ++ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); ++ ++ //.2 - report to upper layer ++ DBG_871X("indicate_sta_join_event to upper layer - hostapd\n"); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_indicate_sta_assoc(padapter, pframe, pkt_len); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_assoc(padapter, pframe, pkt_len); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ _enter_critical_bh(&pstat->lock, &irqL); ++ if(pstat->passoc_req) ++ { ++ rtw_mfree(pstat->passoc_req, pstat->assoc_req_len); ++ pstat->passoc_req = NULL; ++ pstat->assoc_req_len = 0; ++ } ++ ++ pstat->passoc_req = rtw_zmalloc(pkt_len); ++ if(pstat->passoc_req) ++ { ++ _rtw_memcpy(pstat->passoc_req, pframe, pkt_len); ++ pstat->assoc_req_len = pkt_len; ++ } ++ _exit_critical_bh(&pstat->lock, &irqL); ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++#else ++ rtw_indicate_sta_assoc_event(padapter, pstat); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ //.3-(1) report sta add event ++ report_add_sta_event(padapter, pstat->hwaddr, pstat->aid); ++ ++/* ++ //issue assoc rsp before notify station join event. ++ if (frame_type == WIFI_ASSOCREQ) ++ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); ++ else ++ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); ++*/ ++ ++#endif ++ } ++ ++ return _SUCCESS; ++ ++asoc_class2_error: ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_deauth(padapter, (void *)GetAddr2Ptr(pframe), status); ++#endif ++ ++ return _FAIL; ++ ++OnAssocReqFail: ++ ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ pstat->aid = 0; ++ if (frame_type == WIFI_ASSOCREQ) ++ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); ++ else ++ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); ++#endif ++ ++ ++#endif /* CONFIG_AP_MODE */ ++ ++ return _FAIL; ++ ++} ++ ++unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ uint i; ++ int res; ++ unsigned short status; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++ ++ if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE))) ++ return _SUCCESS; ++ ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ return _SUCCESS; ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //status ++ if ((status = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 2))) > 0) ++ { ++ DBG_871X("assoc reject, status code: %d\n", status); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ res = -4; ++ goto report_assoc_result; ++ } ++ ++ //get capabilities ++ pmlmeinfo->capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ //set slot time ++ pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10))? 9: 20; ++ ++ //AID ++ res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4))&0x3fff); ++ ++ //following are moved to join event callback function ++ //to handle HT, WMM, rate adaptive, update MAC reg ++ //for not to handle the synchronous IO in the tasklet ++ for (i = (6 + WLAN_HDR_A3_LEN); i < pkt_len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM ++ { ++ WMM_param_handler(padapter, pIE); ++ } ++#if defined(CONFIG_P2P) && defined(CONFIG_WFD) ++ else if ( _rtw_memcmp(pIE->data, WFD_OUI, 4)) //WFD ++ { ++ DBG_871X( "[%s] Found WFD IE\n", __FUNCTION__ ); ++ WFD_info_handler( padapter, pIE ); ++ } ++#endif ++ break; ++ ++ case _HT_CAPABILITY_IE_: //HT caps ++ HT_caps_handler(padapter, pIE); ++ break; ++ ++ case _HT_EXTRA_INFO_IE_: //HT info ++ HT_info_handler(padapter, pIE); ++ break; ++ ++ case _ERPINFO_IE_: ++ ERP_IE_handler(padapter, pIE); ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE); ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ //Update Basic Rate Table for spec, 2010-12-28 , by thomas ++ UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (!rtw_cfg80211_check_bss(padapter)) { ++ DBG_871X("rtw_cfg80211_check_bss() : BSS not found !!\n"); ++ res = -2; ++ goto report_assoc_result; ++ } ++#endif ++ ++report_assoc_result: ++ if (res > 0) { ++ rtw_buf_update(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len, pframe, pkt_len); ++ } else { ++ rtw_buf_free(&pmlmepriv->assoc_rsp, &pmlmepriv->assoc_rsp_len); ++ } ++ ++ report_join_res(padapter, res); ++ return _SUCCESS; ++} ++ ++unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned short reason; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ //check A3 ++ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++#ifdef CONFIG_P2P ++ if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ++ { ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); ++ _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); ++ } ++#endif //CONFIG_P2P ++ ++ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); ++ ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ //rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr2Ptr(pframe))); ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if(psta) ++ { ++ u8 updated = _FALSE; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, reason); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated); ++ } ++ ++ ++ return _SUCCESS; ++ } ++ else ++#endif ++ { ++ int ignore_received_deauth = 0; ++ ++ // Commented by Albert 20130604 ++ // Before sending the auth frame to start the STA/GC mode connection with AP/GO, ++ // we will send the deauth first. ++ // However, the Win8.1 with BRCM Wi-Fi will send the deauth with reason code 6 to us after receieving our deauth. ++ // Added the following code to avoid this case. ++ if ( ( pmlmeinfo->state & WIFI_FW_AUTH_STATE ) || ++ ( pmlmeinfo->state & WIFI_FW_ASSOC_STATE ) ) ++ { ++ if ( reason == WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA ) ++ { ++ ignore_received_deauth = 1; ++ } else if (WLAN_REASON_PREV_AUTH_NOT_VALID == reason) { ++ // TODO: 802.11r ++ ignore_received_deauth = 1; ++ } ++ } ++ ++ DBG_871X("%s, STA:" MAC_FMT ", ignore = %d\n", __FUNCTION__, MAC_ARG(GetAddr3Ptr(pframe)), ignore_received_deauth); ++ if ( 0 == ignore_received_deauth ) ++ { ++ receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason); ++ } ++ } ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned short reason; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ //check A3 ++ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++#ifdef CONFIG_P2P ++ if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ++ { ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); ++ _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); ++ } ++#endif //CONFIG_P2P ++ ++ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); ++ ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ //rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr2Ptr(pframe))); ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if(psta) ++ { ++ u8 updated = _FALSE; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, reason); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated); ++ } ++ ++ return _SUCCESS; ++ } ++ else ++#endif ++ { ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr3Ptr(pframe))); ++ ++ receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); ++ } ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++unsigned int on_action_spct_ch_switch(_adapter *padapter, struct sta_info *psta, u8 *ies, uint ies_len) ++{ ++ unsigned int ret = _FAIL; ++ struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(mlmeext->mlmext_info); ++ ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { ++ ret = _SUCCESS; ++ goto exit; ++ } ++ ++ if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { ++ ++ int ch_switch_mode = -1, ch = -1, ch_switch_cnt = -1; ++ int ch_offset = -1; ++ u8 bwmode; ++ struct ieee80211_info_element *ie; ++ ++ DBG_871X(FUNC_NDEV_FMT" from "MAC_FMT"\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(psta->hwaddr)); ++ ++ for_each_ie(ie, ies, ies_len) { ++ if (ie->id == WLAN_EID_CHANNEL_SWITCH) { ++ ch_switch_mode = ie->data[0]; ++ ch = ie->data[1]; ++ ch_switch_cnt = ie->data[2]; ++ DBG_871X("ch_switch_mode:%d, ch:%d, ch_switch_cnt:%d\n", ++ ch_switch_mode, ch, ch_switch_cnt); ++ } ++ else if (ie->id == WLAN_EID_SECONDARY_CHANNEL_OFFSET) { ++ ch_offset = secondary_ch_offset_to_hal_ch_offset(ie->data[0]); ++ DBG_871X("ch_offset:%d\n", ch_offset); ++ } ++ } ++ ++ if (ch == -1) ++ return _SUCCESS; ++ ++ if (ch_offset == -1) ++ bwmode = mlmeext->cur_bwmode; ++ else ++ bwmode = (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ? ++ HT_CHANNEL_WIDTH_20 : HT_CHANNEL_WIDTH_40; ++ ++ ch_offset = (ch_offset == -1) ? mlmeext->cur_ch_offset : ch_offset; ++ ++ /* todo: ++ * 1. the decision of channel switching ++ * 2. things after channel switching ++ */ ++ ++ ret = rtw_set_ch_cmd(padapter, ch, bwmode, ch_offset, _TRUE); ++ } ++ ++exit: ++ return ret; ++} ++ ++unsigned int on_action_spct(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int ret = _FAIL; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint frame_len = precv_frame->u.hdr.len; ++ u8 *frame_body = (u8 *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ u8 category; ++ u8 action; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ ++ if (!psta) ++ goto exit; ++ ++ category = frame_body[0]; ++ if(category != RTW_WLAN_CATEGORY_SPECTRUM_MGMT) ++ goto exit; ++ ++ action = frame_body[1]; ++ switch (action) { ++ case RTW_WLAN_ACTION_SPCT_MSR_REQ: ++ case RTW_WLAN_ACTION_SPCT_MSR_RPRT: ++ case RTW_WLAN_ACTION_SPCT_TPC_REQ: ++ case RTW_WLAN_ACTION_SPCT_TPC_RPRT: ++ break; ++ case RTW_WLAN_ACTION_SPCT_CHL_SWITCH: ++ #ifdef CONFIG_SPCT_CH_SWITCH ++ ret = on_action_spct_ch_switch(padapter, psta, &frame_body[2], ++ frame_len-(frame_body-pframe)-2); ++ #endif ++ break; ++ default: ++ break; ++ } ++ ++exit: ++ return ret; ++} ++ ++unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *addr; ++ struct sta_info *psta=NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ unsigned char *frame_body; ++ unsigned char category, action; ++ unsigned short tid, status, reason_code = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ return _SUCCESS; ++ ++/* ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++*/ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ return _SUCCESS; ++ ++ addr = GetAddr2Ptr(pframe); ++ psta = rtw_get_stainfo(pstapriv, addr); ++ ++ if(psta==NULL) ++ return _SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if (category == RTW_WLAN_CATEGORY_BACK)// representing Block Ack ++ { ++#ifdef CONFIG_TDLS ++ if((psta->tdls_sta_state & TDLS_LINKED_STATE) && ++ (psta->htpriv.ht_option==_TRUE) && ++ (psta->htpriv.ampdu_enable==_TRUE) ) ++ { ++ //do nothing; just don't want to return _SUCCESS; ++ } ++ else ++#endif //CONFIG_TDLS ++ if (!pmlmeinfo->HT_enable) ++ { ++ return _SUCCESS; ++ } ++ ++ action = frame_body[1]; ++ DBG_871X("%s, action=%d\n", __FUNCTION__, action); ++ switch (action) ++ { ++ case RTW_WLAN_ACTION_ADDBA_REQ: //ADDBA request ++ ++ _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); ++ //process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); ++ process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr); ++ ++ if(pmlmeinfo->bAcceptAddbaReq == _TRUE) ++ { ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 0); ++ } ++ else ++ { ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 37);//reject ADDBA Req ++ } ++ ++ break; ++ ++ case RTW_WLAN_ACTION_ADDBA_RESP: //ADDBA response ++ ++ //status = frame_body[3] | (frame_body[4] << 8); //endian issue ++ status = RTW_GET_LE16(&frame_body[3]); ++ tid = ((frame_body[5] >> 2) & 0x7); ++ ++ if (status == 0) ++ { //successful ++ DBG_871X("agg_enable for TID=%d\n", tid); ++ psta->htpriv.agg_enable_bitmap |= 1 << tid; ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ } ++ else ++ { ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ } ++ ++ //DBG_871X("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap); ++ break; ++ ++ case RTW_WLAN_ACTION_DELBA: //DELBA ++ if ((frame_body[3] & BIT(3)) == 0) ++ { ++ psta->htpriv.agg_enable_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); ++ psta->htpriv.candidate_tid_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); ++ ++ //reason_code = frame_body[4] | (frame_body[5] << 8); ++ reason_code = RTW_GET_LE16(&frame_body[4]); ++ } ++ else if((frame_body[3] & BIT(3)) == BIT(3)) ++ { ++ tid = (frame_body[3] >> 4) & 0x0F; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ } ++ ++ DBG_871X("%s(): DELBA: %x(%x)\n", __FUNCTION__,pmlmeinfo->agg_enable_bitmap, reason_code); ++ //todo: how to notify the host while receiving DELETE BA ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_P2P ++ ++static int get_reg_classes_full_count(struct p2p_channels channel_list) { ++ int cnt = 0; ++ int i; ++ ++ for (i = 0; i < channel_list.reg_classes; i++) { ++ cnt += channel_list.reg_class[i].channels; ++ } ++ ++ return cnt; ++} ++ ++static void get_channel_cnt_24g_5gl_5gh( struct mlme_ext_priv *pmlmeext, u8* p24g_cnt, u8* p5gl_cnt, u8* p5gh_cnt ) ++{ ++ int i = 0; ++ ++ *p24g_cnt = 0; ++ *p5gl_cnt = 0; ++ *p5gh_cnt = 0; ++ ++ for( i = 0; i < pmlmeext->max_chan_nums; i++ ) ++ { ++ if ( pmlmeext->channel_set[ i ].ChannelNum <= 14 ) ++ { ++ (*p24g_cnt)++; ++ } ++ else if ( ( pmlmeext->channel_set[ i ].ChannelNum > 14 ) && ( pmlmeext->channel_set[ i ].ChannelNum <= 48 ) ) ++ { ++ // Just include the channel 36, 40, 44, 48 channels for 5G low ++ (*p5gl_cnt)++; ++ } ++ else if ( ( pmlmeext->channel_set[ i ].ChannelNum >= 149 ) && ( pmlmeext->channel_set[ i ].ChannelNum <= 161 ) ) ++ { ++ // Just include the channel 149, 153, 157, 161 channels for 5G high ++ (*p5gh_cnt)++; ++ } ++ } ++} ++ ++void issue_p2p_GO_request(_adapter *padapter, u8* raddr) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_REQ; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 wpsielen = 0, p2pielen = 0, i; ++ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; ++ u16 len_channellist_attr = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pwdinfo->negotiation_dialog_token = 1; // Initialize the dialog value ++ pframe = rtw_set_fixed_ie(pframe, 1, &pwdinfo->negotiation_dialog_token, &(pattrib->pktlen)); ++ ++ ++ ++ // WPS Section ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Device Password ID ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); ++ } ++ else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); ++ } ++ else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); ++ } ++ ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110306 ++ // According to the P2P Specification, the group negoitation request frame should contain 9 P2P attributes ++ // 1. P2P Capability ++ // 2. Group Owner Intent ++ // 3. Configuration Timeout ++ // 4. Listen Channel ++ // 5. Extended Listen Timing ++ // 6. Intended P2P Interface Address ++ // 7. Channel List ++ // 8. P2P Device Info ++ // 9. Operating Channel ++ ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; ++ } ++ ++ ++ // Group Owner Intent ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Todo the tie breaker bit. ++ p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ ++ // Listen Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listening channel number ++ ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ ++ // Intended P2P Interface Address ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ // Country String(3) ++ // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) ++ // + number of channels in all classes ++ len_channellist_attr = 3 ++ + (1 + 1) * (u16)(pmlmeext->channel_list.reg_classes) ++ + get_reg_classes_full_count(pmlmeext->channel_list); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ } ++#else ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ ++#endif ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ // Operating Class ++ if ( pbuddy_mlmeext->cur_channel > 14 ) ++ { ++ if ( pbuddy_mlmeext->cur_channel >= 149 ) ++ { ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ ++ // Number of Channels ++ // Just support 1 channel and this channel is AP's channel ++ p2pie[ p2pielen++ ] = 1; ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; ++ } ++ else ++ { ++ int i,j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#else // CONFIG_CONCURRENT_MODE ++ { ++ int i,j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ if ( pwdinfo->operating_channel <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++ ++void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint len, u8 result) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_RESP; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0, i; ++ uint wpsielen = 0; ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh; ++ u16 len_channellist_attr = 0; ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_871X( "[%s] In, result = %d\n", __FUNCTION__, result ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pwdinfo->negotiation_dialog_token = frame_body[7]; // The Dialog Token of provisioning discovery request frame. ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); ++ ++ // Commented by Albert 20110328 ++ // Try to get the device password ID from the WPS IE of group negotiation request frame ++ // WiFi Direct test plan 5.1.15 ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ _rtw_memset( wpsie, 0x00, 255 ); ++ wpsielen = 0; ++ ++ // WPS Section ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Device Password ID ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); ++ } ++ else ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); ++ } ++ wpsielen += 2; ++ ++ // Commented by Kurt 20120113 ++ // If some device wants to do p2p handshake without sending prov_disc_req ++ // We have to get peer_req_cm from here. ++ if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) ++ { ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ } ++ else ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ } ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20100908 ++ // According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes ++ // 1. Status ++ // 2. P2P Capability ++ // 3. Group Owner Intent ++ // 4. Configuration Timeout ++ // 5. Operating Channel ++ // 6. Intended P2P Interface Address ++ // 7. Channel List ++ // 8. Device Info ++ // 9. Group ID ( Only GO ) ++ ++ ++ // ToDo: ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = result; ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ // Commented by Albert 2011/03/08 ++ // According to the P2P specification ++ // if the sending device will be client, the P2P Capability should be reserved of group negotation response frame ++ p2pie[ p2pielen++ ] = 0; ++ } ++ else ++ { ++ // Be group owner or meet the error case ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ } ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; ++ } ++ ++ // Group Owner Intent ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ if ( pwdinfo->peer_intent & 0x01 ) ++ { ++ // Peer's tie breaker bit is 1, our tie breaker bit should be 0 ++ p2pie[ p2pielen++ ] = ( pwdinfo->intent << 1 ); ++ } ++ else ++ { ++ // Peer's tie breaker bit is 0, our tie breaker bit should be 1 ++ p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); ++ } ++ ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ if ( pwdinfo->operating_channel <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ // Intended P2P Interface Address ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Country String(3) ++ // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) ++ // + number of channels in all classes ++ len_channellist_attr = 3 ++ + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes ++ + get_reg_classes_full_count(pmlmeext->channel_list); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ } ++#else ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ ++ #endif ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ // Operating Class ++ if ( pbuddy_mlmeext->cur_channel > 14 ) ++ { ++ if ( pbuddy_mlmeext->cur_channel >= 149 ) ++ { ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ ++ // Number of Channels ++ // Just support 1 channel and this channel is AP's channel ++ p2pie[ p2pielen++ ] = 1; ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; ++ } ++ else ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#else // CONFIG_CONCURRENT_MODE ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Group ID Attribute ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // p2P Device Address ++ _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ p2pielen += pwdinfo->nego_ssidlen; ++ ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_CONF; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 wpsielen = 0, p2pielen = 0; ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); ++ ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110306 ++ // According to the P2P Specification, the group negoitation request frame should contain 5 P2P attributes ++ // 1. Status ++ // 2. P2P Capability ++ // 3. Operating Channel ++ // 4. Channel List ++ // 5. Group ID ( if this WiFi is GO ) ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = result; ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN | P2P_GRPCAP_PERSISTENT_GROUP; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_CROSS_CONN; ++ } ++ ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ if ( pwdinfo->peer_operating_ch <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->peer_operating_ch >= 36 ) && ( pwdinfo->peer_operating_ch <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ ++ p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch; ++ } ++ else ++ { ++ if ( pwdinfo->operating_channel <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // Use the listen channel as the operating channel ++ } ++ ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ *(u16*) ( p2pie + p2pielen ) = 6; ++ p2pielen += 2; ++ ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Value: ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ if ( pwdinfo->peer_operating_ch <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->peer_operating_ch >= 36 ) && ( pwdinfo->peer_operating_ch <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ p2pie[ p2pielen++ ] = 1; ++ p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch; ++ } ++ else ++ { ++ if ( pwdinfo->operating_channel <= 14 ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ else if ( ( pwdinfo->operating_channel >= 36 ) && ( pwdinfo->operating_channel <= 48 ) ) ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ else ++ { ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = 1; ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // Use the listen channel as the operating channel ++ } ++ ++ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Group ID Attribute ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // p2P Device Address ++ _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ p2pielen += pwdinfo->nego_ssidlen; ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_INVIT_REQ; ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0, i; ++ u8 dialogToken = 3; ++ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; ++ u16 len_channellist_attr = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101011 ++ // According to the P2P Specification, the P2P Invitation request frame should contain 7 P2P attributes ++ // 1. Configuration Timeout ++ // 2. Invitation Flags ++ // 3. Operating Channel ( Only GO ) ++ // 4. P2P Group BSSID ( Should be included if I am the GO ) ++ // 5. Channel List ++ // 6. P2P Group ID ++ // 7. P2P Device Info ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ // Invitation Flags ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INVITATION_FLAGS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = P2P_INVITATION_FLAGS_PERSISTENT; ++ ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ if ( pwdinfo->invitereq_info.operating_ch <= 14 ) ++ p2pie[ p2pielen++ ] = 0x51; ++ else if ( ( pwdinfo->invitereq_info.operating_ch >= 36 ) && ( pwdinfo->invitereq_info.operating_ch <= 48 ) ) ++ p2pie[ p2pielen++ ] = 0x73; ++ else ++ p2pie[ p2pielen++ ] = 0x7c; ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->invitereq_info.operating_ch; // operating channel number ++ ++ if ( _rtw_memcmp( myid( &padapter->eeprompriv ), pwdinfo->invitereq_info.go_bssid, ETH_ALEN ) ) ++ { ++ // P2P Group BSSID ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_BSSID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address for GO ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ } ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ ++ // Length: ++ // Country String(3) ++ // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) ++ // + number of channels in all classes ++ len_channellist_attr = 3 ++ + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes ++ + get_reg_classes_full_count(pmlmeext->channel_list); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ } ++#else ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ ++ #endif ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ // Operating Class ++ if ( pbuddy_mlmeext->cur_channel > 14 ) ++ { ++ if ( pbuddy_mlmeext->cur_channel >= 149 ) ++ { ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ ++ // Number of Channels ++ // Just support 1 channel and this channel is AP's channel ++ p2pie[ p2pielen++ ] = 1; ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; ++ } ++ else ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#else // CONFIG_CONCURRENT_MODE ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ ++ // P2P Group ID ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 6 + pwdinfo->invitereq_info.ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address for GO ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_bssid, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.go_ssid, pwdinfo->invitereq_info.ssidlen ); ++ p2pielen += pwdinfo->invitereq_info.ssidlen; ++ ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_invitation_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken, u8 status_code) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_INVIT_RESP; ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0, i; ++ u8 channel_cnt_24g = 0, channel_cnt_5gl = 0, channel_cnt_5gh = 0; ++ u16 len_channellist_attr = 0; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101005 ++ // According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes ++ // 1. Status ++ // 2. Configuration Timeout ++ // 3. Operating Channel ( Only GO ) ++ // 4. P2P Group BSSID ( Only GO ) ++ // 5. Channel List ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ // When status code is P2P_STATUS_FAIL_INFO_UNAVAILABLE. ++ // Sent the event receiving the P2P Invitation Req frame to DMP UI. ++ // DMP had to compare the MAC address to find out the profile. ++ // So, the WiFi driver will send the P2P_STATUS_FAIL_INFO_UNAVAILABLE to NB. ++ // If the UI found the corresponding profile, the WiFi driver sends the P2P Invitation Req ++ // to NB to rebuild the persistent group. ++ p2pie[ p2pielen++ ] = status_code; ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ if( status_code == P2P_STATUS_SUCCESS ) ++ { ++ if( rtw_p2p_chk_role( pwdinfo, P2P_ROLE_GO ) ) ++ { ++ // The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO ++ // In this case, the P2P Invitation response frame should carry the two more P2P attributes. ++ // First one is operating channel attribute. ++ // Second one is P2P Group BSSID attribute. ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ ++ // P2P Group BSSID ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_BSSID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address for GO ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ } ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ // Country String(3) ++ // + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) ++ // + number of channels in all classes ++ len_channellist_attr = 3 ++ + (1 + 1) * (u16)pmlmeext->channel_list.reg_classes ++ + get_reg_classes_full_count(pmlmeext->channel_list); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + 1 ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ } ++#else ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( len_channellist_attr ); ++ ++#endif ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ // Operating Class ++ if ( pbuddy_mlmeext->cur_channel > 14 ) ++ { ++ if ( pbuddy_mlmeext->cur_channel >= 149 ) ++ { ++ p2pie[ p2pielen++ ] = 0x7c; ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x73; ++ } ++ } ++ else ++ { ++ p2pie[ p2pielen++ ] = 0x51; ++ } ++ ++ // Number of Channels ++ // Just support 1 channel and this channel is AP's channel ++ p2pie[ p2pielen++ ] = 1; ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = pbuddy_mlmeext->cur_channel; ++ } ++ else ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#else // CONFIG_CONCURRENT_MODE ++ { ++ int i, j; ++ for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) { ++ // Operating Class ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class; ++ ++ // Number of Channels ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels; ++ ++ // Channel List ++ for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++) { ++ p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i]; ++ } ++ } ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_invitation_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_provision_request(_adapter *padapter, u8* pssid, u8 ussidlen, u8* pdev_raddr ) ++{ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u8 wpsie[ 100 ] = { 0x00 }; ++ u8 wpsielen = 0; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pdev_raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pdev_raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, pssid, ussidlen, pdev_raddr ); ++ ++ pframe += p2pielen; ++ pattrib->pktlen += p2pielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++ ++u8 is_matched_in_profilelist( u8* peermacaddr, struct profile_info* profileinfo ) ++{ ++ u8 i, match_result = 0; ++ ++ DBG_871X( "[%s] peermac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ peermacaddr[0], peermacaddr[1],peermacaddr[2],peermacaddr[3],peermacaddr[4],peermacaddr[5]); ++ ++ for( i = 0; i < P2P_MAX_PERSISTENT_GROUP_NUM; i++, profileinfo++ ) ++ { ++ DBG_871X( "[%s] profileinfo_mac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ profileinfo->peermac[0], profileinfo->peermac[1],profileinfo->peermac[2],profileinfo->peermac[3],profileinfo->peermac[4],profileinfo->peermac[5]); ++ if ( _rtw_memcmp( peermacaddr, profileinfo->peermac, ETH_ALEN ) ) ++ { ++ match_result = 1; ++ DBG_871X( "[%s] Match!\n", __FUNCTION__ ); ++ break; ++ } ++ } ++ ++ return (match_result ); ++} ++ ++void issue_probersp_p2p(_adapter *padapter, unsigned char *da) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u16 beacon_interval = 100; ++ u16 capInfo = 0; ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 wpsie[255] = { 0x00 }; ++ u32 wpsielen = 0, p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#ifdef CONFIG_INTEL_WIDI ++ u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; ++#endif //CONFIG_INTEL_WIDI ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ // Use the device address for BSSID field. ++ _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ // ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec) ++ capInfo |= cap_ShortPremble; ++ capInfo |= cap_ShortSlot; ++ ++ _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ // Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pattrib->pktlen); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if( pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL ) ++ { ++ //WPS IE ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); ++ pattrib->pktlen += pmlmepriv->wps_probe_resp_ie_len; ++ pframe += pmlmepriv->wps_probe_resp_ie_len; ++ ++ //P2P IE ++ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); ++ pattrib->pktlen += pmlmepriv->p2p_probe_resp_ie_len; ++ pframe += pmlmepriv->p2p_probe_resp_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ ++ // Todo: WPS IE ++ // Noted by Albert 20100907 ++ // According to the WPS specification, all the WPS attribute is presented by Big Endian. ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++#ifdef CONFIG_INTEL_WIDI ++ // Commented by Kurt ++ // Appended WiDi info. only if we did issued_probereq_widi(), and then we saved ven. ext. in pmlmepriv->sa_ext. ++ if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE ++ || pmlmepriv->num_p2p_sdt != 0 ) ++ { ++ //Sec dev type ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SEC_DEV_TYPE_LIST ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); ++ wpsielen += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_DISPLAYS ); ++ wpsielen += 2; ++ ++ // OUI ++ *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( INTEL_DEV_TYPE_OUI ); ++ wpsielen += 4; ++ ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_WIDI_CONSUMER_SINK ); ++ wpsielen += 2; ++ ++ if( _rtw_memcmp(pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN) == _FALSE ) ++ { ++ // Vendor Extension ++ _rtw_memcpy( wpsie + wpsielen, pmlmepriv->sa_ext, L2SDTA_SERVICE_VE_LEN ); ++ wpsielen += L2SDTA_SERVICE_VE_LEN; ++ } ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++ // WiFi Simple Config State ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SIMPLE_CONF_STATE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; // Not Configured. ++ ++ // Response Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_RESP_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X; ++ ++ // UUID-E ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 ); ++ wpsielen += 2; ++ ++ // Value: ++ if (pwdinfo->external_uuid == 0) { ++ _rtw_memset( wpsie + wpsielen, 0x0, 16 ); ++ _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ } else { ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); ++ } ++ wpsielen += 0x10; ++ ++ // Manufacturer ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MANUFACTURER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0007 ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "Realtek", 7 ); ++ wpsielen += 7; ++ ++ // Model Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0006 ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "8192CU", 6 ); ++ wpsielen += 6; ++ ++ // Model Number ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NUMBER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[ wpsielen++ ] = 0x31; // character 1 ++ ++ // Serial Number ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SERIAL_NUMBER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( ETH_ALEN ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "123456" , ETH_ALEN ); ++ wpsielen += ETH_ALEN; ++ ++ // Primary Device Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); ++ wpsielen += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ wpsielen += 2; ++ ++ // OUI ++ *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ wpsielen += 2; ++ ++ // Device Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ wpsielen += pwdinfo->device_name_len; ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ wpsielen += 2; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe); ++ pframe += p2pielen; ++ pattrib->pktlen += p2pielen; ++ } ++ ++#ifdef CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (pmlmepriv->wfd_probe_resp_ie != NULL && pmlmepriv->wfd_probe_resp_ie_len>0) ++ { ++ //WFD IE ++ _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, pmlmepriv->wfd_probe_resp_ie_len); ++ pattrib->pktlen += pmlmepriv->wfd_probe_resp_ie_len; ++ pframe += pmlmepriv->wfd_probe_resp_ie_len; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++int _issue_probereq_p2p(_adapter *padapter, u8 *da, int wait_ack) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ unsigned char bssrate[NumRates]; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 wpsie[255] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u16 wpsielen = 0, p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if (da) { ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); ++ } else { ++ if ( ( pwdinfo->p2p_info.scan_op_ch_only ) || ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ) ++ { ++ // This two flags will be set when this is only the P2P client mode. ++ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->p2p_peer_interface_addr, ETH_ALEN); ++ } ++ else ++ { ++ // broadcast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); ++ } ++ } ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_PROBEREQ); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.ssid.Ssid, &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SSID_IE_, P2P_WILDCARD_SSID_LEN, pwdinfo->p2p_wildcard_ssid, &(pattrib->pktlen)); ++ } ++ // Use the OFDM rate in the P2P probe request frame. ( 6(B), 9(B), 12(B), 24(B), 36, 48, 54 ) ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if( pmlmepriv->wps_probe_req_ie != NULL && pmlmepriv->p2p_probe_req_ie != NULL ) ++ { ++ //WPS IE ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; ++ pframe += pmlmepriv->wps_probe_req_ie_len; ++ ++ //P2P IE ++ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_req_ie, pmlmepriv->p2p_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->p2p_probe_req_ie_len; ++ pframe += pmlmepriv->p2p_probe_req_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ ++ // WPS IE ++ // Noted by Albert 20110221 ++ // According to the WPS specification, all the WPS attribute is presented by Big Endian. ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ if( pmlmepriv->wps_probe_req_ie == NULL ) ++ { ++ // UUID-E ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 ); ++ wpsielen += 2; ++ ++ // Value: ++ if (pwdinfo->external_uuid == 0) { ++ _rtw_memset( wpsie + wpsielen, 0x0, 16 ); ++ _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ } else { ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->uuid, 0x10 ); ++ } ++ wpsielen += 0x10; ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ wpsielen += 2; ++ } ++ ++ // Device Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ wpsielen += pwdinfo->device_name_len; ++ ++ // Primary Device Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); ++ wpsielen += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ wpsielen += 2; ++ ++ // OUI ++ *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ wpsielen += 2; ++ ++ // Device Password ID ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); // Registrar-specified ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110221 ++ // According to the P2P Specification, the probe request frame should contain 5 P2P attributes ++ // 1. P2P Capability ++ // 2. P2P Device ID if this probe request wants to find the specific P2P device ++ // 3. Listen Channel ++ // 4. Extended Listen Timing ++ // 5. Operating Channel if this WiFi is working as the group owner now ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; ++ else ++ p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; ++ ++ // Listen Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listen channel ++ ++ ++ // Extended Listen Timing ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Operating Channel (if this WiFi is working as the group owner now) ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'X'; ++ p2pie[ p2pielen++ ] = 'X'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++ if( pmlmepriv->wps_probe_req_ie != NULL ) ++ { ++ //WPS IE ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; ++ pframe += pmlmepriv->wps_probe_req_ie_len; ++ } ++ } ++ ++#ifdef CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) ++#endif ++ { ++ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (pmlmepriv->wfd_probe_req_ie != NULL && pmlmepriv->wfd_probe_req_ie_len>0) ++ { ++ //WFD IE ++ _rtw_memcpy(pframe, pmlmepriv->wfd_probe_req_ie, pmlmepriv->wfd_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->wfd_probe_req_ie_len; ++ pframe += pmlmepriv->wfd_probe_req_ie_len; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++} ++ ++inline void issue_probereq_p2p(_adapter *adapter, u8 *da) ++{ ++ _issue_probereq_p2p(adapter, da, _FALSE); ++} ++ ++int issue_probereq_p2p_ex(_adapter *adapter, u8 *da, int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ ++ do ++ { ++ ret = _issue_probereq_p2p(adapter, da, wait_ms>0?_TRUE:_FALSE); ++ ++ i++; ++ ++ if (adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ break; ++ ++ if(i < try_cnt && wait_ms > 0 && ret==_FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ }while((iu.hdr.adapter; ++ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); ++ u8 *frame = recv_frame->u.hdr.rx_data; ++ u16 seq_ctrl = ( (recv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | ++ (recv_frame->u.hdr.attrib.frag_num & 0xf); ++ ++ if (GetRetry(frame)) { ++ if (token >= 0) { ++ if ((seq_ctrl == mlmeext->action_public_rxseq) ++ && (token == mlmeext->action_public_dialog_token)) ++ { ++ DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x, token:%d\n", ++ FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq, token); ++ return _FAIL; ++ } ++ } else { ++ if (seq_ctrl == mlmeext->action_public_rxseq) { ++ DBG_871X(FUNC_ADPT_FMT" seq_ctrl=0x%x, rxseq=0x%x\n", ++ FUNC_ADPT_ARG(adapter), seq_ctrl, mlmeext->action_public_rxseq); ++ return _FAIL; ++ } ++ } ++ } ++ ++ mlmeext->action_public_rxseq = seq_ctrl; ++ ++ if (token >= 0) ++ mlmeext->action_public_dialog_token = token; ++ ++ return _SUCCESS; ++} ++ ++unsigned int on_action_public_p2p(union recv_frame *precv_frame) ++{ ++ _adapter *padapter = precv_frame->u.hdr.adapter; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ u8 *frame_body; ++ u8 dialogToken=0; ++#ifdef CONFIG_P2P ++ u8 *p2p_ie; ++ u32 p2p_ielen, wps_ielen; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 result = P2P_STATUS_SUCCESS; ++ u8 empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; ++ u8 *merged_p2pie = NULL; ++ u32 merged_p2p_ielen = 0; ++#endif //CONFIG_P2P ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ dialogToken = frame_body[7]; ++ ++ if (rtw_action_public_decache(precv_frame, dialogToken) == _FAIL) ++ return _FAIL; ++ ++#ifdef CONFIG_P2P ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211) ++ { ++ rtw_cfg80211_rx_p2p_action_public(padapter, pframe, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ // Do nothing if the driver doesn't enable the P2P function. ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ return _SUCCESS; ++ ++ len -= sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ switch( frame_body[ 6 ] )//OUI Subtype ++ { ++ case P2P_GO_NEGO_REQ: ++ { ++ DBG_871X( "[%s] Got GO Nego Req Frame\n", __FUNCTION__); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ } ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) ++ { ++ // Commented by Albert 20110526 ++ // In this case, this means the previous nego fail doesn't be reset yet. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ // Restore the previous p2p state ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ DBG_871X( "[%s] Restore the previous p2p state to %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ // Commented by Kurt 20110902 ++ //Add if statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ ++ // Commented by Kurt 20120113 ++ // Get peer_dev_addr here if peer doesn't issue prov_disc frame. ++ if( _rtw_memcmp(pwdinfo->rx_prov_disc_info.peerDevAddr, empty_addr, ETH_ALEN) ) ++ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); ++ ++ result = process_p2p_group_negotation_req( pwdinfo, frame_body, len ); ++ issue_p2p_GO_response( padapter, GetAddr2Ptr(pframe), frame_body, len, result ); ++#ifdef CONFIG_INTEL_WIDI ++ if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) ++ { ++ padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; ++ _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); ++ intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL); ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++ // Commented by Albert 20110718 ++ // No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer. ++#ifdef CONFIG_CONCURRENT_MODE ++ // Commented by Albert 20120107 ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); ++#else // CONFIG_CONCURRENT_MODE ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); ++#endif // CONFIG_CONCURRENT_MODE ++ break; ++ } ++ case P2P_GO_NEGO_RESP: ++ { ++ DBG_871X( "[%s] Got GO Nego Resp Frame\n", __FUNCTION__); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ // Commented by Albert 20110425 ++ // The restore timer is enabled when issuing the nego request frame of rtw_p2p_connect function. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ pwdinfo->nego_req_info.benable = _FALSE; ++ result = process_p2p_group_negotation_resp( pwdinfo, frame_body, len); ++ issue_p2p_GO_confirm( pwdinfo->padapter, GetAddr2Ptr(pframe), result); ++ if ( P2P_STATUS_SUCCESS == result ) ++ { ++ if ( rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT ) ++ { ++ pwdinfo->p2p_info.operation_ch[ 0 ] = pwdinfo->peer_operating_ch; ++ #ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.operation_ch[ 1 ] = 1; //Check whether GO is operating in channel 1; ++ pwdinfo->p2p_info.operation_ch[ 2 ] = 6; //Check whether GO is operating in channel 6; ++ pwdinfo->p2p_info.operation_ch[ 3 ] = 11; //Check whether GO is operating in channel 11; ++ #endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.scan_op_ch_only = 1; ++ _set_timer( &pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH ); ++ } ++ } ++ ++ // Reset the dialog token for group negotiation frames. ++ pwdinfo->negotiation_dialog_token = 1; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] Skipped GO Nego Resp Frame (p2p_state != P2P_STATE_GONEGO_ING)\n", __FUNCTION__); ++ } ++ ++ break; ++ } ++ case P2P_GO_NEGO_CONF: ++ { ++ DBG_871X( "[%s] Got GO Nego Confirm Frame\n", __FUNCTION__); ++ result = process_p2p_group_negotation_confirm( pwdinfo, frame_body, len); ++ if ( P2P_STATUS_SUCCESS == result ) ++ { ++ if ( rtw_p2p_role(pwdinfo) == P2P_ROLE_CLIENT ) ++ { ++ pwdinfo->p2p_info.operation_ch[ 0 ] = pwdinfo->peer_operating_ch; ++ #ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.operation_ch[ 1 ] = 1; //Check whether GO is operating in channel 1; ++ pwdinfo->p2p_info.operation_ch[ 2 ] = 6; //Check whether GO is operating in channel 6; ++ pwdinfo->p2p_info.operation_ch[ 3 ] = 11; //Check whether GO is operating in channel 11; ++ #endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.scan_op_ch_only = 1; ++ _set_timer( &pwdinfo->reset_ch_sitesurvey2, P2P_RESET_SCAN_CH ); ++ } ++ } ++ break; ++ } ++ case P2P_INVIT_REQ: ++ { ++ // Added by Albert 2010/10/05 ++ // Received the P2P Invite Request frame. ++ ++ DBG_871X( "[%s] Got invite request frame!\n", __FUNCTION__ ); ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ // Parse the necessary information from the P2P Invitation Request frame. ++ // For example: The MAC address of sending this P2P Invitation Request frame. ++ u32 attr_contentlen = 0; ++ u8 status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ struct group_id_info group_id; ++ u8 invitation_flag = 0; ++ ++ merged_p2p_ielen = rtw_get_p2p_merged_ies_len(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_); ++ ++ merged_p2pie = rtw_malloc(merged_p2p_ielen); ++ if (merged_p2pie == NULL) ++ { ++ DBG_871X( "[%s] Malloc p2p ie fail\n", __FUNCTION__); ++ goto exit; ++ } ++ _rtw_memset(merged_p2pie, 0x00, merged_p2p_ielen); ++ ++ merged_p2p_ielen = rtw_p2p_merge_ies(frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, merged_p2pie); ++ ++ rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_INVITATION_FLAGS, &invitation_flag, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ ++ rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_BSSID, pwdinfo->p2p_peer_interface_addr, &attr_contentlen); ++ // Commented by Albert 20120510 ++ // Copy to the pwdinfo->p2p_peer_interface_addr. ++ // So that the WFD UI ( or Sigma ) can get the peer interface address by using the following command. ++ // #> iwpriv wlan0 p2p_get peer_ifa ++ // After having the peer interface address, the sigma can find the correct conf file for wpa_supplicant. ++ ++ if ( attr_contentlen ) ++ { ++ DBG_871X( "[%s] GO's BSSID = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ pwdinfo->p2p_peer_interface_addr[0], pwdinfo->p2p_peer_interface_addr[1], ++ pwdinfo->p2p_peer_interface_addr[2], pwdinfo->p2p_peer_interface_addr[3], ++ pwdinfo->p2p_peer_interface_addr[4], pwdinfo->p2p_peer_interface_addr[5] ); ++ } ++ ++ if ( invitation_flag & P2P_INVITATION_FLAGS_PERSISTENT ) ++ { ++ // Re-invoke the persistent group. ++ ++ _rtw_memset( &group_id, 0x00, sizeof( struct group_id_info ) ); ++ rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) ++ { ++ // The p2p device sending this p2p invitation request wants this Wi-Fi device to be the persistent GO. ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_GO ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_GO ); ++ status_code = P2P_STATUS_SUCCESS; ++ } ++ else ++ { ++ // The p2p device sending this p2p invitation request wants to be the persistent GO. ++ if ( is_matched_in_profilelist( pwdinfo->p2p_peer_interface_addr, &pwdinfo->profileinfo[ 0 ] ) ) ++ { ++ u8 operatingch_info[5] = { 0x00 }; ++ ++ if ( rtw_get_p2p_attr_content(merged_p2pie, merged_p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) ++ { ++ if( rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, (u32)operatingch_info[4] ) >= 0 ) ++ { ++ // The operating channel is acceptable for this device. ++ pwdinfo->rx_invitereq_info.operation_ch[0]= operatingch_info[4]; ++ #ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.operation_ch[1]= 1; //Check whether GO is operating in channel 1; ++ pwdinfo->rx_invitereq_info.operation_ch[2]= 6; //Check whether GO is operating in channel 6; ++ pwdinfo->rx_invitereq_info.operation_ch[3]= 11; //Check whether GO is operating in channel 11; ++ #endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.scan_op_ch_only = 1; ++ _set_timer( &pwdinfo->reset_ch_sitesurvey, P2P_RESET_SCAN_CH ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); ++ status_code = P2P_STATUS_SUCCESS; ++ } ++ else ++ { ++ // The operating channel isn't supported by this device. ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_DEVICE ); ++ status_code = P2P_STATUS_FAIL_NO_COMMON_CH; ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); ++ } ++ } ++ else ++ { ++ // Commented by Albert 20121130 ++ // Intel will use the different P2P IE to store the operating channel information ++ // Workaround for Intel WiDi 3.5 ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_MATCH ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); ++ status_code = P2P_STATUS_SUCCESS; ++ } ++ } ++ else ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); ++ #ifdef CONFIG_INTEL_WIDI ++ _rtw_memcpy( pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); ++ #endif //CONFIG_INTEL_WIDI ++ ++ status_code = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; ++ } ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__ ); ++ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ } ++ else ++ { ++ // Received the invitation to join a P2P group. ++ ++ _rtw_memset( &group_id, 0x00, sizeof( struct group_id_info ) ); ++ rtw_get_p2p_attr_content( merged_p2pie, merged_p2p_ielen, P2P_ATTR_GROUP_ID, ( u8* ) &group_id, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ if ( _rtw_memcmp( group_id.go_device_addr, myid( &padapter->eeprompriv ), ETH_ALEN ) ) ++ { ++ // In this case, the GO can't be myself. ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_DISMATCH ); ++ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ else ++ { ++ // The p2p device sending this p2p invitation request wants to join an existing P2P group ++ // Commented by Albert 2012/06/28 ++ // In this case, this Wi-Fi device should use the iwpriv command to get the peer device address. ++ // The peer device address should be the destination address for the provisioning discovery request. ++ // Then, this Wi-Fi device should use the iwpriv command to get the peer interface address. ++ // The peer interface address should be the address for WPS mac address ++ _rtw_memcpy( pwdinfo->p2p_peer_device_addr, group_id.go_device_addr , ETH_ALEN ); ++ rtw_p2p_set_role( pwdinfo, P2P_ROLE_CLIENT ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ_JOIN ); ++ status_code = P2P_STATUS_SUCCESS; ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] P2P Group ID Attribute NOT FOUND!\n", __FUNCTION__ ); ++ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] P2P Invitation Flags Attribute NOT FOUND!\n", __FUNCTION__ ); ++ status_code = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ ++ DBG_871X( "[%s] status_code = %d\n", __FUNCTION__, status_code ); ++ ++ pwdinfo->inviteresp_info.token = frame_body[ 7 ]; ++ issue_p2p_invitation_response( padapter, GetAddr2Ptr(pframe), pwdinfo->inviteresp_info.token, status_code ); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); ++ } ++#ifdef CONFIG_INTEL_WIDI ++ if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) ++ { ++ padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; ++ _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); ++ intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL); ++ } ++#endif //CONFIG_INTEL_WIDI ++ break; ++ } ++ case P2P_INVIT_RESP: ++ { ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ ++ DBG_871X( "[%s] Got invite response frame!\n", __FUNCTION__ ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ pwdinfo->invitereq_info.benable = _FALSE; ++ ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ if ( _rtw_memcmp( pwdinfo->invitereq_info.go_bssid, myid( &padapter->eeprompriv ), ETH_ALEN )) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO ); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_OK ); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); ++ } ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); ++ } ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ); ++ } ++ ++ if ( rtw_p2p_chk_state( pwdinfo, P2P_STATE_RX_INVITE_RESP_FAIL ) ) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); ++ } ++ break; ++ } ++ case P2P_DEVDISC_REQ: ++ ++ process_p2p_devdisc_req(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_DEVDISC_RESP: ++ ++ process_p2p_devdisc_resp(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_PROVISION_DISC_REQ: ++ DBG_871X( "[%s] Got Provisioning Discovery Request Frame\n", __FUNCTION__ ); ++ process_p2p_provdisc_req(pwdinfo, pframe, len); ++ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); ++ ++ //20110902 Kurt ++ //Add the following statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++#ifdef CONFIG_INTEL_WIDI ++ if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) ++ { ++ padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; ++ _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); ++ intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL); ++ } ++#endif //CONFIG_INTEL_WIDI ++ break; ++ ++ case P2P_PROVISION_DISC_RESP: ++ // Commented by Albert 20110707 ++ // Should we check the pwdinfo->tx_prov_disc_info.bsent flag here?? ++ DBG_871X( "[%s] Got Provisioning Discovery Response Frame\n", __FUNCTION__ ); ++ // Commented by Albert 20110426 ++ // The restore timer is enabled when issuing the provisioing request frame in rtw_p2p_prov_disc function. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP); ++ process_p2p_provdisc_resp(pwdinfo, pframe); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++ break; ++ ++ } ++ } ++#endif //CONFIG_P2P ++ ++exit: ++ ++ if(merged_p2pie) ++ { ++ rtw_mfree(merged_p2pie, merged_p2p_ielen); ++ } ++ ++ return _SUCCESS; ++} ++ ++unsigned int on_action_public_vendor(union recv_frame *precv_frame) ++{ ++ unsigned int ret = _FAIL; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint frame_len = precv_frame->u.hdr.len; ++ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ if (_rtw_memcmp(frame_body + 2, P2P_OUI, 4) == _TRUE) { ++ ret = on_action_public_p2p(precv_frame); ++ } ++ ++ return ret; ++} ++ ++unsigned int on_action_public_default(union recv_frame *precv_frame, u8 action) ++{ ++ unsigned int ret = _FAIL; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint frame_len = precv_frame->u.hdr.len; ++ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 token; ++ _adapter *adapter = precv_frame->u.hdr.adapter; ++ int cnt = 0; ++ char msg[64]; ++ ++ token = frame_body[2]; ++ ++ if (rtw_action_public_decache(precv_frame, token) == _FAIL) ++ goto exit; ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ cnt += sprintf((msg+cnt), "%s(token:%u)", action_public_str(action), token); ++ rtw_cfg80211_rx_action(adapter, pframe, frame_len, msg); ++ #endif ++ ++ ret = _SUCCESS; ++ ++exit: ++ return ret; ++} ++ ++unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int ret = _FAIL; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint frame_len = precv_frame->u.hdr.len; ++ u8 *frame_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 category, action; ++ ++ /* check RA matches or not */ ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN)) ++ goto exit; ++ ++ category = frame_body[0]; ++ if(category != RTW_WLAN_CATEGORY_PUBLIC) ++ goto exit; ++ ++ action = frame_body[1]; ++ switch (action) { ++ case ACT_PUBLIC_VENDOR: ++ ret = on_action_public_vendor(precv_frame); ++ break; ++ default: ++ ret = on_action_public_default(precv_frame, action); ++ break; ++ } ++ ++exit: ++ return ret; ++} ++ ++unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_IEEE80211W ++unsigned int OnAction_sa_query(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned short tid; ++ //Baron ++ ++ DBG_871X("OnAction_sa_query\n"); ++ ++ switch (pframe[WLAN_HDR_A3_LEN+1]) ++ { ++ case 0: //SA Query req ++ _rtw_memcpy(&tid, &pframe[WLAN_HDR_A3_LEN+2], sizeof(unsigned short)); ++ DBG_871X("OnAction_sa_query request,action=%d, tid=%04x\n", pframe[WLAN_HDR_A3_LEN+1], tid); ++ issue_action_SA_Query(padapter, GetAddr2Ptr(pframe), 1, tid); ++ break; ++ ++ case 1: //SA Query rsp ++ _cancel_timer_ex(&pmlmeext->sa_query_timer); ++ DBG_871X("OnAction_sa_query response,action=%d, tid=%04x, cancel timer\n", pframe[WLAN_HDR_A3_LEN+1], pframe[WLAN_HDR_A3_LEN+2]); ++ break; ++ default: ++ break; ++ } ++ if(0) ++ { ++ int pp; ++ printk("pattrib->pktlen = %d =>", pattrib->pkt_len); ++ for(pp=0;pp< pattrib->pkt_len; pp++) ++ printk(" %02x ", pframe[pp]); ++ printk("\n"); ++ } ++ ++ return _SUCCESS; ++} ++#endif //CONFIG_IEEE80211W ++ ++unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_P2P ++ u8 *frame_body; ++ u8 category, OUI_Subtype, dialogToken=0; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ return _SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if(category != RTW_WLAN_CATEGORY_P2P) ++ return _SUCCESS; ++ ++ if ( cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ) != P2POUI ) ++ return _SUCCESS; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ rtw_cfg80211_rx_action_p2p(padapter, pframe, len); ++ return _SUCCESS; ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len -= sizeof(struct rtw_ieee80211_hdr_3addr); ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++ switch(OUI_Subtype) ++ { ++ case P2P_NOTICE_OF_ABSENCE: ++ ++ break; ++ ++ case P2P_PRESENCE_REQUEST: ++ ++ process_p2p_presence_req(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_PRESENCE_RESPONSE: ++ ++ break; ++ ++ case P2P_GO_DISC_REQUEST: ++ ++ break; ++ ++ default: ++ break; ++ ++ } ++ } ++#endif //CONFIG_P2P ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int i; ++ unsigned char category; ++ struct action_handler *ptable; ++ unsigned char *frame_body; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ ++ for(i = 0; i < sizeof(OnAction_tbl)/sizeof(struct action_handler); i++) ++ { ++ ptable = &OnAction_tbl[i]; ++ ++ if(category == ptable->num) ++ ptable->func(padapter, precv_frame); ++ ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ ++ //DBG_871X("rcvd mgt frame(%x, %x)\n", (GetFrameSubType(pframe) >> 4), *(unsigned int *)GetAddr1Ptr(pframe)); ++ return _SUCCESS; ++} ++ ++struct xmit_frame *_alloc_mgtxmitframe(struct xmit_priv *pxmitpriv, bool once) ++{ ++ struct xmit_frame *pmgntframe; ++ struct xmit_buf *pxmitbuf; ++ ++ if (once) ++ pmgntframe = rtw_alloc_xmitframe_once(pxmitpriv); ++ else ++ pmgntframe = rtw_alloc_xmitframe_ext(pxmitpriv); ++ ++ if (pmgntframe == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" alloc xmitframe fail, once:%d\n", FUNC_ADPT_ARG(pxmitpriv->adapter), once); ++ goto exit; ++ } ++ ++ if ((pxmitbuf = rtw_alloc_xmitbuf_ext(pxmitpriv)) == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" alloc xmitbuf fail\n", FUNC_ADPT_ARG(pxmitpriv->adapter)); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ pmgntframe = NULL; ++ goto exit; ++ } ++ ++ pmgntframe->frame_tag = MGNT_FRAMETAG; ++ pmgntframe->pxmitbuf = pxmitbuf; ++ pmgntframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pmgntframe; ++ ++exit: ++ return pmgntframe; ++ ++} ++ ++inline struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv) ++{ ++ return _alloc_mgtxmitframe(pxmitpriv, _FALSE); ++} ++ ++inline struct xmit_frame *alloc_mgtxmitframe_once(struct xmit_priv *pxmitpriv) ++{ ++ return _alloc_mgtxmitframe(pxmitpriv, _TRUE); ++} ++ ++ ++/**************************************************************************** ++ ++Following are some TX fuctions for WiFi MLME ++ ++*****************************************************************************/ ++ ++void update_mgnt_tx_rate(_adapter *padapter, u8 rate) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ pmlmeext->tx_rate = rate; ++ ++ //DBG_871X("%s(): rate = %x\n",__FUNCTION__, rate); ++} ++ ++void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ _rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); ++ ++ pattrib->hdrlen = 24; ++ pattrib->nr_frags = 1; ++ pattrib->priority = 7; ++ pattrib->mac_id = 0; ++ pattrib->qsel = 0x12; ++ ++ pattrib->pktlen = 0; ++ ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ pattrib->raid = 6;//b mode ++ else ++ pattrib->raid = 5;//a/g mode ++ ++ pattrib->encrypt = _NO_PRIVACY_; ++ pattrib->bswenc = _FALSE; ++ ++ pattrib->qos_en = _FALSE; ++ pattrib->ht_en = _FALSE; ++ pattrib->bwmode = HT_CHANNEL_WIDTH_20; ++ pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pattrib->sgi = _FALSE; ++ ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ ++ pattrib->retry_ctrl = _TRUE; ++ ++} ++ ++void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ if(padapter->bSurpriseRemoved == _TRUE || ++ padapter->bDriverStopped == _TRUE) ++ { ++ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); ++ return; ++ } ++ ++ rtw_hal_mgnt_xmit(padapter, pmgntframe); ++} ++ ++s32 dump_mgntframe_and_wait(_adapter *padapter, struct xmit_frame *pmgntframe, int timeout_ms) ++{ ++ s32 ret = _FAIL; ++ _irqL irqL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_buf *pxmitbuf = pmgntframe->pxmitbuf; ++ struct submit_ctx sctx; ++ ++ if(padapter->bSurpriseRemoved == _TRUE || ++ padapter->bDriverStopped == _TRUE) ++ { ++ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); ++ return ret; ++ } ++ ++ rtw_sctx_init(&sctx, timeout_ms); ++ pxmitbuf->sctx = &sctx; ++ ++ ret = rtw_hal_mgnt_xmit(padapter, pmgntframe); ++ ++ if (ret == _SUCCESS) ++ ret = rtw_sctx_wait(&sctx); ++ ++ _enter_critical(&pxmitpriv->lock_sctx, &irqL); ++ pxmitbuf->sctx = NULL; ++ _exit_critical(&pxmitpriv->lock_sctx, &irqL); ++ ++ return ret; ++} ++ ++s32 dump_mgntframe_and_wait_ack(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++#ifdef CONFIG_XMIT_ACK ++ s32 ret = _FAIL; ++ u32 timeout_ms = 500;// 500ms ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter && !padapter->isprimary) ++ pxmitpriv = &(padapter->pbuddy_adapter->xmitpriv); ++ #endif ++ ++ if(padapter->bSurpriseRemoved == _TRUE || ++ padapter->bDriverStopped == _TRUE) ++ { ++ rtw_free_xmitbuf(&padapter->xmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(&padapter->xmitpriv, pmgntframe); ++ return -1; ++ } ++ ++ _enter_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); ++ pxmitpriv->ack_tx = _TRUE; ++ ++ pmgntframe->ack_report = 1; ++ if (rtw_hal_mgnt_xmit(padapter, pmgntframe) == _SUCCESS) { ++ ret = rtw_ack_tx_wait(pxmitpriv, timeout_ms); ++ } ++ ++ pxmitpriv->ack_tx = _FALSE; ++ _exit_critical_mutex(&pxmitpriv->ack_tx_mutex, NULL); ++ ++ return ret; ++#else //!CONFIG_XMIT_ACK ++ dump_mgntframe(padapter, pmgntframe); ++ rtw_msleep_os(50); ++ return _SUCCESS; ++#endif //!CONFIG_XMIT_ACK ++} ++ ++int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) ++{ ++ u8 *ssid_ie; ++ sint ssid_len_ori; ++ int len_diff = 0; ++ ++ ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len); ++ ++ //DBG_871X("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori); ++ ++ if(ssid_ie && ssid_len_ori>0) ++ { ++ switch(hidden_ssid_mode) ++ { ++ case 1: ++ { ++ u8 *next_ie = ssid_ie + 2 + ssid_len_ori; ++ u32 remain_len = 0; ++ ++ remain_len = ies_len -(next_ie-ies); ++ ++ ssid_ie[1] = 0; ++ _rtw_memcpy(ssid_ie+2, next_ie, remain_len); ++ len_diff -= ssid_len_ori; ++ ++ break; ++ } ++ case 2: ++ _rtw_memset(&ssid_ie[2], 0, ssid_len_ori); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ return len_diff; ++} ++ ++void issue_beacon(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned int rate_len; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); ++ return; ++ } ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->qsel = 0x10; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //DBG_871X("ie len=%d\n", cur_network->IELength); ++#ifdef CONFIG_P2P ++ // for P2P : Primary Device Type & Device Name ++ u32 wpsielen=0, insert_len=0; ++ u8 *wpsie=NULL; ++ wpsie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen>0) ++ { ++ uint wps_offset, remainder_ielen; ++ u8 *premainder_ie, *pframe_wscie; ++ ++ wps_offset = (uint)(wpsie - cur_network->IEs); ++ ++ premainder_ie = wpsie + wpsielen; ++ ++ remainder_ielen = cur_network->IELength - wps_offset - wpsielen; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len>0) ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); ++ pframe += wps_offset; ++ pattrib->pktlen += wps_offset; ++ ++ _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); ++ pframe += pmlmepriv->wps_beacon_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_beacon_ie_len; ++ ++ //copy remainder_ie to pframe ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ } ++ else ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pattrib->pktlen += cur_network->IELength; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ pframe_wscie = pframe + wps_offset; ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset+wpsielen); ++ pframe += (wps_offset + wpsielen); ++ pattrib->pktlen += (wps_offset + wpsielen); ++ ++ //now pframe is end of wsc ie, insert Primary Device Type & Device Name ++ // Primary Device Type ++ // Type: ++ *(u16*) ( pframe + insert_len) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ insert_len += 2; ++ ++ // Length: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( 0x0008 ); ++ insert_len += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ insert_len += 2; ++ ++ // OUI ++ *(u32*) ( pframe + insert_len ) = cpu_to_be32( WPSOUI ); ++ insert_len += 4; ++ ++ // Sub Category ID ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ insert_len += 2; ++ ++ ++ // Device Name ++ // Type: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ insert_len += 2; ++ ++ // Length: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( pwdinfo->device_name_len ); ++ insert_len += 2; ++ ++ // Value: ++ _rtw_memcpy( pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len ); ++ insert_len += pwdinfo->device_name_len; ++ ++ ++ //update wsc ie length ++ *(pframe_wscie+1) = (wpsielen -2) + insert_len; ++ ++ //pframe move to end ++ pframe+=insert_len; ++ pattrib->pktlen += insert_len; ++ ++ //copy remainder_ie to pframe ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ } ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ int len_diff; ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ len_diff = update_hidden_ssid( ++ pframe+_BEACON_IE_OFFSET_ ++ , cur_network->IELength-_BEACON_IE_OFFSET_ ++ , pmlmeinfo->hidden_ssid_mode ++ ); ++ pframe += (cur_network->IELength+len_diff); ++ pattrib->pktlen += (cur_network->IELength+len_diff); ++ } ++ ++ { ++ u8 *wps_ie; ++ uint wps_ielen; ++ u8 sr = 0; ++ wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr+TXDESC_OFFSET+sizeof (struct rtw_ieee80211_hdr_3addr)+_BEACON_IE_OFFSET_, ++ pattrib->pktlen-sizeof (struct rtw_ieee80211_hdr_3addr)-_BEACON_IE_OFFSET_, NULL, &wps_ielen); ++ if (wps_ie && wps_ielen>0) { ++ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ } ++ if (sr != 0) ++ set_fwstate(pmlmepriv, WIFI_UNDER_WPS); ++ else ++ _clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS); ++ } ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ u32 len; ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ len = pmlmepriv->p2p_beacon_ie_len; ++ if(pmlmepriv->p2p_beacon_ie && len>0) ++ _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_beacon_p2p_ie(pwdinfo, pframe); ++ } ++ ++ pframe += len; ++ pattrib->pktlen += len; ++#ifdef CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(_TRUE == pwdinfo->wfd_info->wfd_enable) ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_beacon_wfd_ie( pwdinfo, pframe ); ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else ++ { ++ len = 0; ++ if(pmlmepriv->wfd_beacon_ie && pmlmepriv->wfd_beacon_ie_len>0) ++ { ++ len = pmlmepriv->wfd_beacon_ie_len; ++ _rtw_memcpy(pframe, pmlmepriv->wfd_beacon_ie, len); ++ } ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ pframe += len; ++ pattrib->pktlen += len; ++#endif //CONFIG_WFD ++ } ++#endif //CONFIG_P2P ++ ++ goto _issue_bcn; ++ ++ } ++ ++ //below for ad-hoc mode ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); ++ ++ //if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u8 erpinfo=0; ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); ++ ++ //ERP IE ++ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); ++ } ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++_issue_bcn: ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ pmlmepriv->update_bcn = _FALSE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ ++ if ((pattrib->pktlen + TXDESC_SIZE) > 512) ++ { ++ DBG_871X("beacon frame too large\n"); ++ return; ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //DBG_871X("issue bcn_sz=%d\n", pattrib->last_txcmdsz); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac, *bssid; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ u8 *pwps_ie; ++ uint wps_ielen; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ unsigned int rate_len; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ ++ if(cur_network->IELength>MAX_IE_SZ) ++ return; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ pwps_ie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ //inerset & update wps_probe_resp_ie ++ if((pmlmepriv->wps_probe_resp_ie!=NULL) && pwps_ie && (wps_ielen>0)) ++ { ++ uint wps_offset, remainder_ielen; ++ u8 *premainder_ie; ++ ++ wps_offset = (uint)(pwps_ie - cur_network->IEs); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = cur_network->IELength - wps_offset - wps_ielen; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); ++ pframe += wps_offset; ++ pattrib->pktlen += wps_offset; ++ ++ wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];//to get ie data len ++ if((wps_offset+wps_ielen+2)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen+2); ++ pframe += wps_ielen+2; ++ pattrib->pktlen += wps_ielen+2; ++ } ++ ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ } ++ } ++ else ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pattrib->pktlen += cur_network->IELength; ++ } ++ ++ /* retrieve SSID IE from cur_network->Ssid */ ++ { ++ u8 *ssid_ie; ++ sint ssid_ielen; ++ sint ssid_ielen_diff; ++ u8 buf[MAX_IE_SZ]; ++ u8 *ies = pmgntframe->buf_addr+TXDESC_OFFSET+sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ssid_ie = rtw_get_ie(ies+_FIXED_IE_LENGTH_, _SSID_IE_, &ssid_ielen, ++ (pframe-ies)-_FIXED_IE_LENGTH_); ++ ++ ssid_ielen_diff = cur_network->Ssid.SsidLength - ssid_ielen; ++ ++ if (ssid_ie && cur_network->Ssid.SsidLength) { ++ uint remainder_ielen; ++ u8 *remainder_ie; ++ remainder_ie = ssid_ie+2; ++ remainder_ielen = (pframe-remainder_ie); ++ ++ LOG_LEVEL(_drv_warning_, FUNC_ADPT_FMT" remainder_ielen > MAX_IE_SZ\n", FUNC_ADPT_ARG(padapter)); ++ if (remainder_ielen > MAX_IE_SZ) { ++ remainder_ielen = MAX_IE_SZ; ++ } ++ ++ _rtw_memcpy(buf, remainder_ie, remainder_ielen); ++ _rtw_memcpy(remainder_ie+ssid_ielen_diff, buf, remainder_ielen); ++ *(ssid_ie+1) = cur_network->Ssid.SsidLength; ++ _rtw_memcpy(ssid_ie+2, cur_network->Ssid.Ssid, cur_network->Ssid.SsidLength); ++ ++ pframe += ssid_ielen_diff; ++ pattrib->pktlen += ssid_ielen_diff; ++ } ++ } ++ } ++ else ++#endif ++ { ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //below for ad-hoc mode ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); ++ ++ // DS parameter set ++ pframe =rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u8 erpinfo=0; ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); ++ ++ //ERP IE ++ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); ++ } ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++ } ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) /*&& is_valid_p2p_probereq*/) ++ { ++ u32 len; ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ //if pwdinfo->role == P2P_ROLE_DEVICE will call issue_probersp_p2p() ++ len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ if(pmlmepriv->p2p_go_probe_resp_ie && len>0) ++ _rtw_memcpy(pframe, pmlmepriv->p2p_go_probe_resp_ie, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_probe_resp_p2p_ie(pwdinfo, pframe); ++ } ++ ++ pframe += len; ++ pattrib->pktlen += len; ++ ++#ifdef CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(_TRUE == pwdinfo->wfd_info->wfd_enable) ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_probe_resp_wfd_ie(pwdinfo, pframe, 0); ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else ++ { ++ len = 0; ++ if(pmlmepriv->wfd_probe_resp_ie && pmlmepriv->wfd_probe_resp_ie_len>0) ++ { ++ len = pmlmepriv->wfd_probe_resp_ie_len; ++ _rtw_memcpy(pframe, pmlmepriv->wfd_probe_resp_ie, len); ++ } ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ pframe += len; ++ pattrib->pktlen += len; ++#endif //CONFIG_WFD ++ ++ } ++#endif //CONFIG_P2P ++ ++ ++#ifdef CONFIG_AUTO_AP_MODE ++{ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("(%s)\n", __FUNCTION__); ++ ++ //check rc station ++ psta = rtw_get_stainfo(pstapriv, da); ++ if (psta && psta->isrc && psta->pid>0) ++ { ++ u8 RC_OUI[4]={0x00,0xE0,0x4C,0x0A}; ++ u8 RC_INFO[14] = {0}; ++ //EID[1] + EID_LEN[1] + RC_OUI[4] + MAC[6] + PairingID[2] + ChannelNum[2] ++ u16 cu_ch = (u16)cur_network->Configuration.DSConfig; ++ ++ DBG_871X("%s, reply rc(pid=0x%x) device "MAC_FMT" in ch=%d\n", __FUNCTION__, ++ psta->pid, MAC_ARG(psta->hwaddr), cu_ch); ++ ++ //append vendor specific ie ++ _rtw_memcpy(RC_INFO, RC_OUI, sizeof(RC_OUI)); ++ _rtw_memcpy(&RC_INFO[4], mac, ETH_ALEN); ++ _rtw_memcpy(&RC_INFO[10], (u8*)&psta->pid, 2); ++ _rtw_memcpy(&RC_INFO[12], (u8*)&cu_ch, 2); ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, sizeof(RC_INFO), RC_INFO, &pattrib->pktlen); ++ } ++} ++#endif //CONFIG_AUTO_AP_MODE ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++int _issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, int wait_ack) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ unsigned char bssrate[NumRates]; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_notice_,("+issue_probereq\n")); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if (da) ++ { ++ // unicast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, da, ETH_ALEN); ++ } ++ else ++ { ++ // broadcast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_PROBEREQ); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if(pssid) ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen)); ++ else ++ pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen)); ++ ++ get_rate_set(padapter, bssrate, &bssrate_len); ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++#if 0 ++ //add wps_ie for wps2.0 ++ if(pmlmepriv->probereq_wpsie_len>0 && pmlmepriv->probereq_wpsie_lenprobereq_wpsie, pmlmepriv->probereq_wpsie_len); ++ pframe += pmlmepriv->probereq_wpsie_len; ++ pattrib->pktlen += pmlmepriv->probereq_wpsie_len; ++ //pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero ++ } ++#else ++ //add wps_ie for wps2.0 ++ if(pmlmepriv->wps_probe_req_ie_len>0 && pmlmepriv->wps_probe_req_ie) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); ++ pframe += pmlmepriv->wps_probe_req_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; ++ //pmlmepriv->wps_probe_req_ie_len = 0 ;//reset to zero ++ } ++#endif ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_notice_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); ++ ++ if (wait_ack) { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } else { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++} ++ ++inline void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da) ++{ ++ _issue_probereq(padapter, pssid, da, _FALSE); ++} ++ ++int issue_probereq_ex(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 *da, ++ int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ ++ do ++ { ++ ret = _issue_probereq(padapter, pssid, da, wait_ms>0?_TRUE:_FALSE); ++ ++ i++; ++ ++ if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ break; ++ ++ if(i < try_cnt && wait_ms > 0 && ret==_FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ }while((ixmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_AUTH); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ if(psta)// for AP mode ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ ++ _rtw_memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ ++ // setting auth algo number ++ val16 = (u16)psta->authalg; ++ ++ if(status != _STATS_SUCCESSFUL_) ++ val16 = 0; ++ ++ if (val16) { ++ val16 = cpu_to_le16(val16); ++ use_shared_key = 1; ++ } ++ ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting auth seq number ++ val16 =(u16)psta->auth_seq; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting status code... ++ val16 = status; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // added challenging text... ++ if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); ++ } ++#endif ++ } ++ else ++ { ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); ++ ++ // setting auth algo number ++ val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)? 1: 0;// 0:OPEN System, 1:Shared key ++ if (val16) { ++ val16 = cpu_to_le16(val16); ++ use_shared_key = 1; ++ } ++ //DBG_871X("%s auth_algo= %s auth_seq=%d\n",__FUNCTION__,(pmlmeinfo->auth_algo==0)?"OPEN":"SHARED",pmlmeinfo->auth_seq); ++ ++ //setting IV for auth seq #3 ++ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ //DBG_871X("==> iv(%d),key_index(%d)\n",pmlmeinfo->iv,pmlmeinfo->key_index); ++ val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30)); ++ val32 = cpu_to_le32(val32); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&val32, &(pattrib->pktlen)); ++ ++ pattrib->iv_len = 4; ++ } ++ ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting auth seq number ++ val16 = pmlmeinfo->auth_seq; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ ++ // setting status code... ++ val16 = status; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // then checking to see if sending challenging text... ++ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen)); ++ ++ SetPrivacy(fctrl); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->encrypt = _WEP40_; ++ ++ pattrib->icv_len = 4; ++ ++ pattrib->pktlen += pattrib->icv_len; ++ ++ } ++ ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ rtw_wep_encrypt(padapter, (u8 *)pmgntframe); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++ ++void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type) ++{ ++#ifdef CONFIG_AP_MODE ++ struct xmit_frame *pmgntframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct pkt_attrib *pattrib; ++ unsigned char *pbuf, *pframe; ++ unsigned short val; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ u8 *ie = pnetwork->IEs; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr, ETH_ALEN); ++ _rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP)) ++ SetFrameSubType(pwlanhdr, pkt_type); ++ else ++ return; ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen += pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ //capability ++ val = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ ++ pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); ++ ++ status = cpu_to_le16(status); ++ pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&status, &(pattrib->pktlen)); ++ ++ val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15)); ++ pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen)); ++ ++ if (pstat->bssratelen <= 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) ++ { ++ uint ie_len=0; ++ ++ //FILL HT CAP INFO IE ++ //p = hostapd_eid_ht_capabilities_info(hapd, p); ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(pbuf && ie_len>0) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ } ++ ++ //FILL HT ADD INFO IE ++ //p = hostapd_eid_ht_operation(hapd, p); ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(pbuf && ie_len>0) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ } ++ ++ } ++#endif ++ ++ //FILL WMM IE ++ if ((pstat->flags & WLAN_STA_WME) && (pmlmepriv->qospriv.qos_option)) ++ { ++ uint ie_len=0; ++ unsigned char WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ ++ for (pbuf = ie + _BEACON_IE_OFFSET_; ;pbuf+= (ie_len + 2)) ++ { ++ pbuf = rtw_get_ie(pbuf, _VENDOR_SPECIFIC_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if(pbuf && _rtw_memcmp(pbuf+2, WMM_PARA_IE, 6)) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ ++ break; ++ } ++ ++ if ((pbuf == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ ++ } ++ ++ ++ if (pmlmeinfo->assoc_AP_vendor == realtekAP) ++ { ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); ++ } ++ ++ //add WPS IE ie for wps 2.0 ++ if(pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len>0) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); ++ ++ pframe += pmlmepriv->wps_assoc_resp_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len; ++ } ++ ++#ifdef CONFIG_P2P ++ if( padapter->wdinfo.driver_interface == DRIVER_WEXT ) ++ { ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) ++ { ++ u32 len; ++ ++ len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code); ++ ++ pframe += len; ++ pattrib->pktlen += len; ++ } ++ } ++#ifdef CONFIG_WFD ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ++#ifdef CONFIG_IOCTL_CFG80211 ++ && (_TRUE == pwdinfo->wfd_info->wfd_enable) ++#endif //CONFIG_IOCTL_CFG80211 ++ ) ++ { ++ wfdielen = build_assoc_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++#endif ++} ++ ++void issue_assocreq(_adapter *padapter) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe, *p; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned short val16; ++ unsigned int i, j, ie_len, index=0; ++ unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates]; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0, sta_bssrate_len = 0; ++ u8 cbw40_enable = 0; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u16 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_DFS ++ u16 cap; ++ u8 pow_cap_ele[2] = { 0x00 }; ++ u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++#endif //CONFIG_DFS ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ goto exit; ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ASSOCREQ); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //caps ++ ++#ifdef CONFIG_DFS ++ _rtw_memcpy(&cap, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ if(pmlmeext->cur_channel > 14) ++ cap |= BIT(8); //Spectrum Mgmt. Enabled ++ _rtw_memcpy(pframe, &cap, 2); ++#else ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++#endif //CONFIG_DFS ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //listen interval ++ //todo: listen interval for power saving ++ val16 = cpu_to_le16(3); ++ _rtw_memcpy(pframe ,(unsigned char *)&val16, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen)); ++ ++ //supported rate & extended supported rate ++ ++#if 1 // Check if the AP's supported rates are also supported by STA. ++ get_rate_set(padapter, sta_bssrate, &sta_bssrate_len); ++ //DBG_871X("sta_bssrate_len=%d\n", sta_bssrate_len); ++ ++ if(pmlmeext->cur_channel == 14)// for JAPAN, channel 14 can only uses B Mode(CCK) ++ { ++ sta_bssrate_len = 4; ++ } ++ ++ ++ //for (i = 0; i < sta_bssrate_len; i++) { ++ // DBG_871X("sta_bssrate[%d]=%02X\n", i, sta_bssrate[i]); ++ //} ++ ++ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { ++ if (pmlmeinfo->network.SupportedRates[i] == 0) break; ++ DBG_871X("network.SupportedRates[%d]=%02X\n", i, pmlmeinfo->network.SupportedRates[i]); ++ } ++ ++ ++ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { ++ if (pmlmeinfo->network.SupportedRates[i] == 0) break; ++ ++ ++ // Check if the AP's supported rates are also supported by STA. ++ for (j=0; j < sta_bssrate_len; j++) { ++ // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP ++ if ( (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK) ++ == (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)) { ++ //DBG_871X("match i = %d, j=%d\n", i, j); ++ break; ++ } else { ++ //DBG_871X("not match: %02X != %02X\n", (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK), (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)); ++ } ++ } ++ ++ if (j == sta_bssrate_len) { ++ // the rate is not supported by STA ++ DBG_871X("%s(): the rate[%d]=%02X is not supported by STA!\n",__FUNCTION__, i, pmlmeinfo->network.SupportedRates[i]); ++ } else { ++ // the rate is supported by STA ++ bssrate[index++] = pmlmeinfo->network.SupportedRates[i]; ++ } ++ } ++ ++ bssrate_len = index; ++ DBG_871X("bssrate_len = %d\n", bssrate_len); ++ ++#else // Check if the AP's supported rates are also supported by STA. ++#if 0 ++ get_rate_set(padapter, bssrate, &bssrate_len); ++#else ++ for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { ++ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0) break; ++ ++ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0x2C) // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP ++ break; ++ ++ bssrate[bssrate_len] = pmlmeinfo->network.SupportedRates[bssrate_len]; ++ } ++#endif ++#endif // Check if the AP's supported rates are also supported by STA. ++ ++ if (bssrate_len == 0) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; //don't connect to AP if no joint supported rate ++ } ++ ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_DFS ++ if(pmlmeext->cur_channel > 14) ++ { ++ pow_cap_ele[0] = 13; // Minimum transmit power capability ++ pow_cap_ele[1] = 21; // Maximum transmit power capability ++ pframe = rtw_set_ie(pframe, _POW_CAP_IE_, 2, pow_cap_ele, &(pattrib->pktlen)); ++ ++ //supported channels ++ do{ ++ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum <= 14 ) ++ { ++ sup_ch[0] = 1; //First channel number ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; //Number of channel ++ } ++ else ++ { ++ sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; ++ sup_ch[idx_5g++] = 1; ++ } ++ sup_ch_idx++; ++ } ++ while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); ++ pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, idx_5g, sup_ch, &(pattrib->pktlen)); ++ } ++#endif //CONFIG_DFS ++ ++ //RSN ++ p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _RSN_IE_2_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if (p != NULL) ++ { ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, ie_len, (p + 2), &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ //HT caps ++ if(padapter->mlmepriv.htpriv.ht_option==_TRUE) ++ { ++ p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_CAPABILITY_IE_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if ((p != NULL) && (!(is_ap_in_tkip(padapter)))) ++ { ++ _rtw_memcpy(&(pmlmeinfo->HT_caps), (p + 2), sizeof(struct HT_caps_element)); ++ ++ //to disable 40M Hz support while gd_bw_40MHz_en = 0 ++ if( pmlmeext->cur_channel > 14) ++ { ++ if(pregpriv->cbw40_enable & BIT(1) ) ++ cbw40_enable=1; ++ } ++ else ++ if(pregpriv->cbw40_enable & BIT(0) ) ++ cbw40_enable=1; ++ ++ if (cbw40_enable == 0) ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info &= (~(BIT(6) | BIT(1))); ++ } ++ else ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= BIT(1); ++ } ++ ++ //todo: disable SM power save mode ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= 0x000c; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ //switch (pregpriv->rf_config) ++ switch(rf_type) ++ { ++ case RF_1T1R: ++ ++ if(pregpriv->rx_stbc) ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream ++ ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ++ ++ if(pregpriv->special_rf_path) ++ { ++ if(pregpriv->rx_stbc) ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); ++ break; ++ } ++ ++ if((pregpriv->rx_stbc == 0x3) ||//enable for 2.4/5 GHz ++ ((pmlmeext->cur_wireless_mode & WIRELESS_11_24N) && (pregpriv->rx_stbc == 0x1)) || //enable for 2.4GHz ++ ((pmlmeext->cur_wireless_mode & WIRELESS_11_5N) && (pregpriv->rx_stbc == 0x2)) || //enable for 5GHz ++ (pregpriv->wifi_spec==1)) ++ { ++ DBG_871X("declare supporting RX STBC\n"); ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0200);//RX STBC two spatial stream ++ } ++ #ifdef CONFIG_DISABLE_MCS13TO15 ++ if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40 && (pregpriv->wifi_spec!=1)) ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R_MCS13TO15_OFF, 16); ++ else ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R, 16); ++ #else //CONFIG_DISABLE_MCS13TO15 ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_2R, 16); ++ #endif //CONFIG_DISABLE_MCS13TO15 ++ break; ++ } ++#ifdef RTL8192C_RECONFIG_TO_1T1R ++ { ++ if(pregpriv->rx_stbc) ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream ++ ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); ++ } ++#endif ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = cpu_to_le16(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info); ++ pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len , (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen)); ++ ++ } ++ } ++#endif ++ ++ //vendor specific IE, such as WPA, WMM, WPS ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) || ++ (_rtw_memcmp(pIE->data, WMM_OUI, 4)) || ++ (_rtw_memcmp(pIE->data, WPS_OUI, 4))) ++ { ++ if(!padapter->registrypriv.wifi_spec) ++ { ++ //Commented by Kurt 20110629 ++ //In some older APs, WPS handshake ++ //would be fail if we append vender extensions informations to AP ++ if(_rtw_memcmp(pIE->data, WPS_OUI, 4)){ ++ pIE->Length=14; ++ } ++ } ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &(pattrib->pktlen)); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor == realtekAP) ++ { ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_P2P ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(pmlmepriv->p2p_assoc_req_ie && pmlmepriv->p2p_assoc_req_ie_len>0) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_req_ie, pmlmepriv->p2p_assoc_req_ie_len); ++ pframe += pmlmepriv->p2p_assoc_req_ie_len; ++ pattrib->pktlen += pmlmepriv->p2p_assoc_req_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ // Should add the P2P IE in the association request frame. ++ // P2P OUI ++ ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101109 ++ // According to the P2P Specification, the association request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Extended Listen Timing ++ // 3. Device Info ++ // Commented by Albert 20110516 ++ // 4. P2P Interface ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; ++ else ++ p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; ++ ++ // Extended Listen Timing ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ if ( ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) || ++ ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); ++ } ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ // P2P Interface ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTERFACE; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x000D ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Device Address ++ p2pielen += ETH_ALEN; ++ ++ p2pie[ p2pielen++ ] = 1; // P2P Interface Address Count ++ ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Interface Address List ++ p2pielen += ETH_ALEN; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ //wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); ++ //pframe += wfdielen; ++ //pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ } ++ } ++ ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ( _TRUE == pwdinfo->wfd_info->wfd_enable ) ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if (pmlmepriv->wfd_assoc_req_ie != NULL && pmlmepriv->wfd_assoc_req_ie_len>0) ++ { ++ //WFD IE ++ _rtw_memcpy(pframe, pmlmepriv->wfd_assoc_req_ie, pmlmepriv->wfd_assoc_req_ie_len); ++ pattrib->pktlen += pmlmepriv->wfd_assoc_req_ie_len; ++ pframe += pmlmepriv->wfd_assoc_req_ie_len; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ret = _SUCCESS; ++ ++exit: ++ if (ret == _SUCCESS) ++ rtw_buf_update(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len, (u8 *)pwlanhdr, pattrib->pktlen); ++ else ++ rtw_buf_free(&pmlmepriv->assoc_req, &pmlmepriv->assoc_req_len); ++ ++ return; ++} ++ ++//when wait_ack is ture, this function shoule be called at process context ++static int _issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int wait_ack) ++{ ++ int ret = _FAIL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv; ++ struct mlme_ext_priv *pmlmeext; ++ struct mlme_ext_info *pmlmeinfo; ++ ++ //DBG_871X("%s:%d\n", __FUNCTION__, power_mode); ++ ++ if(!padapter) ++ goto exit; ++ ++ pxmitpriv = &(padapter->xmitpriv); ++ pmlmeext = &(padapter->mlmeextpriv); ++ pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ SetFrDs(fctrl); ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ SetToDs(fctrl); ++ } ++ ++ if (power_mode) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if(wait_ack) ++ { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } ++ else ++ { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++} ++ ++ ++//when wait_ms >0 , this function shoule be called at process context ++//da == NULL for station mode ++int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ /* da == NULL, assum it's null data for sta to ap*/ ++ if (da == NULL) ++ da = get_my_bssid(&(pmlmeinfo->network)); ++ ++ do ++ { ++ ret = _issue_nulldata(padapter, da, power_mode, wait_ms>0?_TRUE:_FALSE); ++ ++ i++; ++ ++ if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ break; ++ ++ if(i < try_cnt && wait_ms > 0 && ret==_FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ }while((ixmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ pattrib->hdrlen +=2; ++ pattrib->qos_en = _TRUE; ++ pattrib->eosp = 1; ++ pattrib->ack_policy = 0; ++ pattrib->mdata = 0; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ SetFrDs(fctrl); ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ SetToDs(fctrl); ++ } ++ ++ if(pattrib->mdata) ++ SetMData(fctrl); ++ ++ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); ++ ++ SetPriority(qc, tid); ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if(wait_ack) ++ { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } ++ else ++ { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++} ++ ++//when wait_ms >0 , this function shoule be called at process context ++//da == NULL for station mode ++int issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid, int try_cnt, int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ /* da == NULL, assum it's null data for sta to ap*/ ++ if (da == NULL) ++ da = get_my_bssid(&(pmlmeinfo->network)); ++ ++ do ++ { ++ ret = _issue_qos_nulldata(padapter, da, tid, wait_ms>0?_TRUE:_FALSE); ++ ++ i++; ++ ++ if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ break; ++ ++ if(i < try_cnt && wait_ms > 0 && ret==_FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ }while((ixmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int ret = _FAIL; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ //DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); ++ ++#ifdef CONFIG_P2P ++ if ( !( rtw_p2p_chk_state( pwdinfo, P2P_STATE_NONE ) ) && ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ) ++ { ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey ); ++ _set_timer( &pwdinfo->reset_ch_sitesurvey, 10 ); ++ } ++#endif //CONFIG_P2P ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_DEAUTH); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&reason, &(pattrib->pktlen)); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ ++ if(wait_ack) ++ { ++ ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe); ++ } ++ else ++ { ++ dump_mgntframe(padapter, pmgntframe); ++ ret = _SUCCESS; ++ } ++ ++exit: ++ return ret; ++} ++ ++int issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); ++ return _issue_deauth(padapter, da, reason, _FALSE); ++} ++ ++int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_cnt, ++ int wait_ms) ++{ ++ int ret; ++ int i = 0; ++ u32 start = rtw_get_current_time(); ++ ++ do ++ { ++ ret = _issue_deauth(padapter, da, reason, wait_ms>0?_TRUE:_FALSE); ++ ++ i++; ++ ++ if (padapter->bDriverStopped || padapter->bSurpriseRemoved) ++ break; ++ ++ if(i < try_cnt && wait_ms > 0 && ret==_FAIL) ++ rtw_msleep_os(wait_ms); ++ ++ }while((ixmitpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ DBG_871X(FUNC_NDEV_FMT" ra="MAC_FMT", ch:%u, offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), MAC_ARG(ra), new_ch, ch_offset); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ return; ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, ra, ETH_ALEN); /* RA */ ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */ ++ _rtw_memcpy(pwlanhdr->addr3, ra, ETH_ALEN); /* DA = RA */ ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ /* category, action */ ++ { ++ u8 category, action; ++ category = RTW_WLAN_CATEGORY_SPECTRUM_MGMT; ++ action = RTW_WLAN_ACTION_SPCT_CHL_SWITCH; ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ } ++ ++ pframe = rtw_set_ie_ch_switch(pframe, &(pattrib->pktlen), 0, new_ch, 0); ++ pframe = rtw_set_ie_secondary_ch_offset(pframe, &(pattrib->pktlen), ++ hal_ch_offset_to_secondary_ch_offset(ch_offset)); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++#ifdef CONFIG_IEEE80211W ++void issue_action_SA_Query(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short tid) ++{ ++ u8 category = RTW_WLAN_CATEGORY_SA_QUERY; ++ u16 reason_code; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ u8 *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s: alloc_mgtxmitframe fail\n", __FUNCTION__); ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if(raddr) ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ else ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen); ++ pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen); ++ ++ switch (action) ++ { ++ case 0: //SA Query req ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&pmlmeext->sa_query_seq, &pattrib->pktlen); ++ pmlmeext->sa_query_seq++; ++ //send sa query request to AP, AP should reply sa query response in 1 second ++ set_sa_query_timer(pmlmeext, 1000); ++ break; ++ ++ case 1: //SA Query rsp ++ tid = cpu_to_le16(tid); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)&tid, &pattrib->pktlen); ++ break; ++ default: ++ break; ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++} ++#endif //CONFIG_IEEE80211W ++ ++void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status) ++{ ++ u8 category = RTW_WLAN_CATEGORY_BACK; ++ u16 start_seq; ++ u16 BA_para_set; ++ u16 reason_code; ++ u16 BA_timeout_value; ++ u16 BA_starting_seqctrl; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ u8 *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ ++ DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ //_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ ++ status = cpu_to_le16(status); ++ ++ ++ if (category == 3) ++ { ++ switch (action) ++ { ++ case 0: //ADDBA req ++ do { ++ pmlmeinfo->dialogToken++; ++ } while (pmlmeinfo->dialogToken == 0); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); ++ ++ BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size ++ //sys_mib.BA_para_set = 0x0802; //immediate ack & 32 buffer size ++ BA_para_set = cpu_to_le16(BA_para_set); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ ++ //BA_timeout_value = 0xffff;//max: 65535 TUs(~ 65 ms) ++ BA_timeout_value = 5000;//~ 5ms ++ BA_timeout_value = cpu_to_le16(BA_timeout_value); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_timeout_value)), &(pattrib->pktlen)); ++ ++ //if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ if ((psta = rtw_get_stainfo(pstapriv, raddr)) != NULL) ++ { ++ start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1; ++ ++ DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, status & 0x07); ++ ++ psta->BA_starting_seqctrl[status & 0x07] = start_seq; ++ ++ BA_starting_seqctrl = start_seq << 4; ++ } ++ ++ BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); ++ break; ++ ++ case 1: //ADDBA rsp ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); ++ ++ //BA_para_set = cpu_to_le16((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size ++ BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size ++ ++ if(pregpriv->ampdu_amsdu==0)//disabled ++ BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0)); ++ else if(pregpriv->ampdu_amsdu==1)//enabled ++ BA_para_set = cpu_to_le16(BA_para_set | BIT(0)); ++ else //auto ++ BA_para_set = cpu_to_le16(BA_para_set); ++ ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); ++ break; ++ case 2://DELBA ++ BA_para_set = (status & 0x1F) << 3; ++ BA_para_set = cpu_to_le16(BA_para_set); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ ++ reason_code = 37;//Requested from peer STA as it does not want to use the mechanism ++ reason_code = cpu_to_le16(reason_code); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen)); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++} ++ ++static void issue_action_BSSCoexistPacket(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ unsigned char category, action; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct wlan_network *pnetwork = NULL; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 InfoContent[16] = {0}; ++ u8 ICS[8][15]; ++ ++ if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0)) ++ return; ++ ++ if(_TRUE == pmlmeinfo->bwmode_updated) ++ return; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ category = RTW_WLAN_CATEGORY_PUBLIC; ++ action = ACT_PUBLIC_BSSCOEXIST; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ ++ ++ // ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ { ++ u8 iedata=0; ++ ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ } ++ ++ ++ // ++ _rtw_memset(ICS, 0, sizeof(ICS)); ++ if(pmlmepriv->num_sta_no_ht>0) ++ { ++ int i; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ int len; ++ u8 *p; ++ WLAN_BSSID_EX *pbss_network; ++ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ plist = get_next(plist); ++ ++ pbss_network = (WLAN_BSSID_EX *)&pnetwork->network; ++ ++ p = rtw_get_ie(pbss_network->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->IELength - _FIXED_IE_LENGTH_); ++ if((p==NULL) || (len==0))//non-HT ++ { ++ if((pbss_network->Configuration.DSConfig<=0) || (pbss_network->Configuration.DSConfig>14)) ++ continue; ++ ++ ICS[0][pbss_network->Configuration.DSConfig]=1; ++ ++ if(ICS[0][0] == 0) ++ ICS[0][0] = 1; ++ } ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ ++ for(i= 0;i<8;i++) ++ { ++ if(ICS[i][0] == 1) ++ { ++ int j, k = 0; ++ ++ InfoContent[k] = i; ++ //SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent,i); ++ k++; ++ ++ for(j=1;j<=14;j++) ++ { ++ if(ICS[i][j]==1) ++ { ++ if(k<16) ++ { ++ InfoContent[k] = j; //channel number ++ //SET_BSS_INTOLERANT_ELE_CHANNEL(InfoContent+k, j); ++ k++; ++ } ++ } ++ } ++ ++ pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen)); ++ ++ } ++ ++ } ++ ++ ++ } ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta = NULL; ++ //struct recv_reorder_ctrl *preorder_ctrl; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u16 tid; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ return _SUCCESS; ++ ++ psta = rtw_get_stainfo(pstapriv, addr); ++ if(psta==NULL) ++ return _SUCCESS; ++ ++ //DBG_871X("%s:%s\n", __FUNCTION__, (initiator==0)?"RX_DIR":"TX_DIR"); ++ ++ if(initiator==0) // recipient ++ { ++ for(tid = 0;tidrecvreorder_ctrl[tid].enable == _TRUE) ++ { ++ DBG_871X("rx agg disable tid(%d)\n",tid); ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F)); ++ psta->recvreorder_ctrl[tid].enable = _FALSE; ++ psta->recvreorder_ctrl[tid].indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ psta->recvreorder_ctrl[tid].indicate_seq); ++ #endif ++ } ++ } ++ } ++ else if(initiator == 1)// originator ++ { ++ //DBG_871X("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); ++ for(tid = 0;tidhtpriv.agg_enable_bitmap & BIT(tid)) ++ { ++ DBG_871X("tx agg disable tid(%d)\n",tid); ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F) ); ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ ++ } ++ } ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int send_beacon(_adapter *padapter) ++{ ++ u8 bxmitok = _FALSE; ++ int issue=0; ++ int poll = 0; ++//#ifdef CONFIG_CONCURRENT_MODE ++ //struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ //struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //_adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ //struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++//#endif ++ ++#ifdef CONFIG_PCI_HCI ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ issue_beacon(padapter); ++ ++ return _SUCCESS; ++ ++#endif ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ u32 start = rtw_get_current_time(); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); ++ do{ ++ issue_beacon(padapter); ++ issue++; ++ do { ++ rtw_yield_os(); ++ rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); ++ poll++; ++ }while((poll%10)!=0 && _FALSE == bxmitok && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ ++ }while(_FALSE == bxmitok && issue<100 && !padapter->bSurpriseRemoved && !padapter->bDriverStopped); ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped) ++ { ++ return _FAIL; ++ } ++ if(_FALSE == bxmitok) ++ { ++ DBG_871X("%s fail! %u ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); ++ return _FAIL; ++ } ++ else ++ { ++ u32 passing_time = rtw_get_passing_time_ms(start); ++ ++ if(passing_time > 100 || issue > 3) ++ DBG_871X("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); ++ //else ++ // DBG_871X("%s success, issue:%d, poll:%d, %u ms\n", __FUNCTION__, issue, poll, rtw_get_passing_time_ms(start)); ++ ++ return _SUCCESS; ++ } ++ ++#endif ++ ++} ++ ++/**************************************************************************** ++ ++Following are some utitity fuctions for WiFi MLME ++ ++*****************************************************************************/ ++ ++BOOLEAN IsLegal5GChannel( ++ IN PADAPTER Adapter, ++ IN u8 channel) ++{ ++ ++ int i=0; ++ u8 Channel_5G[45] = {36,38,40,42,44,46,48,50,52,54,56,58, ++ 60,62,64,100,102,104,106,108,110,112,114,116,118,120,122, ++ 124,126,128,130,132,134,136,138,140,149,151,153,155,157,159, ++ 161,163,165}; ++ for(i=0;imlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 initialgain = 0; ++ u8 restore_initial_gain = 1; ++ ++#ifdef CONFIG_P2P ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ u8 stay_buddy_ch = 0; ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++#endif //CONFIG_CONCURRENT_MODE ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ static unsigned char prev_survey_channel = 0; ++ static unsigned int p2p_scan_count = 0; ++ ++ ++ if ( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) ++ { ++ if ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) ++ { ++ survey_channel = pwdinfo->rx_invitereq_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; ++ } ++ else ++ { ++ survey_channel = pwdinfo->p2p_info.operation_ch[pmlmeext->sitesurvey_res.channel_idx]; ++ } ++ ScanType = SCAN_ACTIVE; ++ } ++ else if(rtw_p2p_findphase_ex_is_social(pwdinfo)) ++ { ++ // Commented by Albert 2011/06/03 ++ // The driver is in the find phase, it should go through the social channel. ++ int ch_set_idx; ++ survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; ++ ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, survey_channel); ++ if (ch_set_idx >= 0) ++ ScanType = pmlmeext->channel_set[ch_set_idx].ScanType; ++ else ++ ScanType = SCAN_ACTIVE; ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ struct rtw_ieee80211_channel *ch; ++ if (pmlmeext->sitesurvey_res.channel_idx < pmlmeext->sitesurvey_res.ch_num) { ++ ch = &pmlmeext->sitesurvey_res.ch[pmlmeext->sitesurvey_res.channel_idx]; ++ survey_channel = ch->hw_value; ++ ScanType = (ch->flags & RTW_IEEE80211_CHAN_PASSIVE_SCAN) ? SCAN_PASSIVE : SCAN_ACTIVE; ++ } ++ } ++ ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ch:%u(cnt:%u,idx:%d) at %dms, %c%c%c\n" ++ , FUNC_ADPT_ARG(padapter) ++ , survey_channel ++ , pwdinfo->find_phase_state_exchange_cnt, pmlmeext->sitesurvey_res.channel_idx ++ , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) ++ , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' ++ , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' ++ ); ++ ++ if(survey_channel != 0) ++ { ++ //PAUSE 4-AC Queue when site_survey ++ //rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++ //val8 |= 0x0f; ++ //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++#ifdef CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) ++ { ++ if( pmlmeinfo->scan_cnt == RTW_SCAN_NUM_OF_CH ) ++ { ++ pmlmeinfo->scan_cnt = 0; ++ survey_channel = pbuddy_mlmeext->cur_channel; ++ stay_buddy_ch = 1; ++ } ++ else ++ { ++ if( pmlmeinfo->scan_cnt == 0 ) ++ stay_buddy_ch = 2; ++ pmlmeinfo->scan_cnt++; ++ } ++ } ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++#endif //CONFIG_CONCURRENT_MODE ++ if(pmlmeext->sitesurvey_res.channel_idx == 0) ++ { ++ set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ { ++ SelectChannel(padapter, survey_channel); ++ } ++ ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if( stay_buddy_ch == 1 ) ++ { ++ val8 = 0; //survey done ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(padapter, _FW_LINKED)) ++ { ++ update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); ++ } ++ } ++ else if( stay_buddy_ch == 2 ) ++ { ++ val8 = 1; //under site survey ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ } ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ ++ if(ScanType == SCAN_ACTIVE) //obey the channel plan setting... ++ { ++ #ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || ++ rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ++ ) ++ { ++ issue_probereq_p2p(padapter, NULL); ++ issue_probereq_p2p(padapter, NULL); ++ issue_probereq_p2p(padapter, NULL); ++ } ++ else ++ #endif //CONFIG_P2P ++ { ++ int i; ++ for(i=0;isitesurvey_res.ssid[i].SsidLength) { ++ //todo: to issue two probe req??? ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); ++ //rtw_msleep_os(SURVEY_TO>>1); ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]), NULL); ++ } else { ++ break; ++ } ++ } ++ ++ if(pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { ++ //todo: to issue two probe req??? ++ issue_probereq(padapter, NULL, NULL); ++ //rtw_msleep_os(SURVEY_TO>>1); ++ issue_probereq(padapter, NULL, NULL); ++ } ++ } ++ } ++ ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if( stay_buddy_ch == 1 ) ++ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ); ++ else ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); ++ ++ } ++ else ++ { ++ ++ // channel number is 0 or this channel is not valid. ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 cur_channel; ++ u8 cur_bwmode; ++ u8 cur_ch_offset; ++ ++ if (rtw_get_ch_setting_union(padapter, &cur_channel, &cur_bwmode, &cur_ch_offset) != 0) ++ { ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to linked union - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), cur_channel, cur_bwmode, cur_ch_offset); ++ } ++ #ifdef CONFIG_IOCTL_CFG80211 ++ else if(padapter->pbuddy_adapter ++ && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211 ++ && wdev_to_priv(pbuddy_adapter->rtw_wdev)->p2p_enabled ++ && rtw_p2p_chk_state(&pbuddy_adapter->wdinfo, P2P_STATE_LISTEN) ++ ) ++ { ++ cur_channel = pbuddy_adapter->wdinfo.listen_channel; ++ cur_bwmode = pbuddy_mlmeext->cur_bwmode; ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ } ++ #endif ++ else ++ { ++ cur_channel = pmlmeext->cur_channel; ++ cur_bwmode = pmlmeext->cur_bwmode; ++ cur_ch_offset = pmlmeext->cur_ch_offset; ++ } ++#endif ++ ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) ++ { ++ if( ( pwdinfo->rx_invitereq_info.scan_op_ch_only ) || ( pwdinfo->p2p_info.scan_op_ch_only ) ) ++ { ++ // Set the find_phase_state_exchange_cnt to P2P_FINDPHASE_EX_CNT. ++ // This will let the following flow to run the scanning end. ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); ++ } ++ #ifdef CONFIG_DBG_P2P ++ DBG_871X( "[%s] find phase exchange cnt = %d\n", __FUNCTION__, pwdinfo->find_phase_state_exchange_cnt ); ++ #endif ++ } ++ ++ if(rtw_p2p_findphase_ex_is_needed(pwdinfo)) ++ { ++ // Set the P2P State to the listen state of find phase and set the current channel to the listen channel ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ ++ //turn on dynamic functions ++ Restore_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ _set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) ); ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ pmlmeinfo->scan_cnt = 0; ++#endif //CONFIG_DMP_STA_NODE_SCAN_UNDER_AP_MODE ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ // 20100721:Interrupt scan operation here. ++ // For SW antenna diversity before link, it needs to switch to another antenna and scan again. ++ // It compares the scan result and select beter one to do connection. ++ if(rtw_hal_antdiv_before_linked(padapter)) ++ { ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->sitesurvey_res.channel_idx = -1; ++ pmlmeext->chan_scan_time = SURVEY_TO /2; ++ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); ++ return; ++ } ++#endif ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) ++ { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if( pwdinfo->driver_interface == DRIVER_WEXT ) ++ { ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _set_timer( &pwdinfo->ap_p2p_switch_timer, 500 ); ++ } ++ } ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ #else ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++#endif //CONFIG_P2P ++ ++ pmlmeext->sitesurvey_res.state = SCAN_COMPLETE; ++ ++ //switch back to the original channel ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++#else ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_set_channel_bwmode_survey_done(padapter); ++#else ++ if( pwdinfo->driver_interface == DRIVER_WEXT ) ++ { ++ if( rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) ) ++ { ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ else if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++#endif //CONFIG_DUALMAC_CONCURRENT ++#endif //CONFIG_CONCURRENT_MODE ++ } ++ ++ //flush 4-AC Queue after site_survey ++ //val8 = 0; ++ //rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++ ++ val8 = 0; //survey done ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ //config MSR ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if((wdev_to_priv(padapter->rtw_wdev))->p2p_enabled == _TRUE) ++ { ++ restore_initial_gain = 0; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ if(restore_initial_gain == 1) ++ { ++ initialgain = 0xff; //restore RX GAIN ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ } ++ ++ //turn on dynamic functions ++ Restore_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ if (is_client_associated_to_ap(padapter) == _TRUE) ++ { ++ issue_nulldata(padapter, NULL, 0, 3, 500); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) ++ { ++ DBG_871X("adapter is surveydone(buddy_adapter is linked), issue nulldata(pwrbit=0)\n"); ++ ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); ++ } ++#endif ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) ++ { ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 0, 3, 500); ++ } ++#endif ++ ++ report_surveydone_event(padapter); ++ ++ pmlmeext->chan_scan_time = SURVEY_TO; ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); ++ ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(padapter, _FW_LINKED)) ++ { ++ ++ DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ DBG_871X("restart pbuddy_adapter's beacon\n"); ++ ++ update_beacon(padapter->pbuddy_adapter, 0, NULL, _TRUE); ++ } ++#endif ++ ++ } ++ ++ return; ++ ++} ++ ++//collect bss info from Beacon and Probe response frames. ++u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) ++{ ++ int i; ++ u32 len; ++ u8 *p; ++ u16 val16, subtype; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ u32 packet_len = precv_frame->u.hdr.len; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ if (len > MAX_IE_SZ) ++ { ++ //DBG_871X("IE too long for survey event\n"); ++ return _FAIL; ++ } ++ ++ _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); ++ ++ subtype = GetFrameSubType(pframe); ++ ++ if(subtype==WIFI_BEACON) ++ bssid->Reserved[0] = 1; ++ else ++ bssid->Reserved[0] = 0; ++ ++ bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; ++ ++ //below is to copy the information element ++ bssid->IELength = len; ++ _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); ++ ++ //get the signal strength ++ bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.signal_qual;//in percentage ++ bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.signal_strength;//in percentage ++ bssid->Rssi = precv_frame->u.hdr.attrib.RecvSignalPower; // in dBM.raw data ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //rtw_hal_get_hwreg(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna)); ++ rtw_hal_get_def_var(padapter, HAL_DEF_CURRENT_ANTENNA, &bssid->PhyInfo.Optimum_antenna); ++#endif ++ ++ // checking SSID ++ if ((p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_)) == NULL) ++ { ++ DBG_871X("marc: cannot find SSID for survey event\n"); ++ return _FAIL; ++ } ++ ++ if (*(p + 1)) ++ { ++ if (len > NDIS_802_11_LENGTH_SSID) ++ { ++ DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); ++ return _FAIL; ++ } ++ _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); ++ bssid->Ssid.SsidLength = *(p + 1); ++ } ++ else ++ { ++ bssid->Ssid.SsidLength = 0; ++ } ++ ++ _rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); ++ ++ //checking rate info... ++ i = 0; ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL) ++ { ++ if (len > NDIS_802_11_LENGTH_RATES_EX) ++ { ++ DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); ++ return _FAIL; ++ } ++ _rtw_memcpy(bssid->SupportedRates, (p + 2), len); ++ i = len; ++ } ++ ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL) ++ { ++ if (len > (NDIS_802_11_LENGTH_RATES_EX-i)) ++ { ++ DBG_871X("%s()-%d: IE too long (%d) for survey event\n", __FUNCTION__, __LINE__, len); ++ return _FAIL; ++ } ++ _rtw_memcpy(bssid->SupportedRates + i, (p + 2), len); ++ } ++ ++ //todo: ++#if 0 ++ if (judge_network_type(bssid->SupportedRates, (len + i)) == WIRELESS_11B) ++ { ++ bssid->NetworkTypeInUse = Ndis802_11DS; ++ } ++ else ++#endif ++ { ++ bssid->NetworkTypeInUse = Ndis802_11OFDM24; ++ } ++ ++ if (bssid->IELength < 12) ++ return _FAIL; ++ ++ // Checking for DSConfig ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ ++ bssid->Configuration.DSConfig = 0; ++ bssid->Configuration.Length = 0; ++ ++ if (p) ++ { ++ bssid->Configuration.DSConfig = *(p + 2); ++ } ++ else ++ {// In 5G, some ap do not have DSSET IE ++ // checking HT info for channel ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if(p) ++ { ++ struct HT_info_element *HT_info = (struct HT_info_element *)(p + 2); ++ bssid->Configuration.DSConfig = HT_info->primary_channel; ++ } ++ else ++ { // use current channel ++ bssid->Configuration.DSConfig = rtw_get_oper_ch(padapter); ++ } ++ } ++ ++ _rtw_memcpy(&bssid->Configuration.BeaconPeriod, rtw_get_beacon_interval_from_ie(bssid->IEs), 2); ++ bssid->Configuration.BeaconPeriod = le32_to_cpu(bssid->Configuration.BeaconPeriod); ++ ++ val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); ++ ++ if (val16 & BIT(0)) ++ { ++ bssid->InfrastructureMode = Ndis802_11Infrastructure; ++ _rtw_memcpy(bssid->MacAddress, GetAddr2Ptr(pframe), ETH_ALEN); ++ } ++ else ++ { ++ bssid->InfrastructureMode = Ndis802_11IBSS; ++ _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); ++ } ++ ++ if (val16 & BIT(4)) ++ bssid->Privacy = 1; ++ else ++ bssid->Privacy = 0; ++ ++ bssid->Configuration.ATIMWindow = 0; ++ ++ //20/40 BSS Coexistence check ++ if((pregistrypriv->wifi_spec==1) && (_FALSE == pmlmeinfo->bwmode_updated)) ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if(p && len>0) ++ { ++ struct HT_caps_element *pHT_caps; ++ pHT_caps = (struct HT_caps_element *)(p + 2); ++ ++ if(pHT_caps->u.HT_cap_element.HT_caps_info&BIT(14)) ++ { ++ pmlmepriv->num_FortyMHzIntolerant++; ++ } ++ } ++ else ++ { ++ pmlmepriv->num_sta_no_ht++; ++ } ++ ++ } ++ ++#ifdef CONFIG_INTEL_WIDI ++ //process_intel_widi_query_or_tigger(padapter, bssid); ++ if(process_intel_widi_query_or_tigger(padapter, bssid)) ++ { ++ return _FAIL; ++ } ++#endif // CONFIG_INTEL_WIDI ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) & 1 ++ if(strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n" ++ , bssid->Ssid.Ssid, MAC_ARG(bssid->MacAddress), bssid->Configuration.DSConfig ++ , rtw_get_oper_ch(padapter) ++ , bssid->PhyInfo.SignalStrength, bssid->PhyInfo.SignalQuality, bssid->Rssi ++ ); ++ } ++ #endif ++ ++ // mark bss info receving from nearby channel as SignalQuality 101 ++ if(bssid->Configuration.DSConfig != rtw_get_oper_ch(padapter)) ++ { ++ bssid->PhyInfo.SignalQuality= 101; ++ } ++ ++ return _SUCCESS; ++} ++ ++void start_create_ibss(_adapter* padapter) ++{ ++ unsigned short caps; ++ u8 val8; ++ u8 join_type; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; ++ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); ++ ++ //update wireless mode ++ update_wireless_mode(padapter); ++ ++ //udpate capability ++ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); ++ update_capinfo(padapter, caps); ++ if(caps&cap_IBSS)//adhoc master ++ { ++ //set_opmode_cmd(padapter, adhoc);//removed ++ ++ val8 = 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //switch channel ++ //SelectChannel(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ ++ beacon_timing_control(padapter); ++ ++ //set msr to WIFI_FW_ADHOC_STATE ++ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ //issue beacon ++ if(send_beacon(padapter)==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing beacon frame fail....\n")); ++ ++ report_join_res(padapter, -1); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ } ++ else ++ { ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); ++ join_type = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ report_join_res(padapter, 1); ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ } ++ } ++ else ++ { ++ DBG_871X("start_create_ibss, invalid cap:%x\n", caps); ++ return; ++ } ++ ++} ++ ++void start_clnt_join(_adapter* padapter) ++{ ++ unsigned short caps; ++ u8 val8; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ ++ //update wireless mode ++ update_wireless_mode(padapter); ++ ++ //udpate capability ++ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); ++ update_capinfo(padapter, caps); ++ if (caps&cap_ESS) ++ { ++ Set_MSR(padapter, WIFI_FW_STATION_STATE); ++ ++ val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ #ifdef CONFIG_DEAUTH_BEFORE_CONNECT ++ // Because of AP's not receiving deauth before ++ // AP may: 1)not response auth or 2)deauth us after link is complete ++ // issue deauth before issuing auth to deal with the situation ++ ++ // Commented by Albert 2012/07/21 ++ // For the Win8 P2P connection, it will be hard to have a successful connection if this Wi-Fi doesn't connect to it. ++ { ++ #ifdef CONFIG_P2P ++ _queue *queue = &(padapter->mlmepriv.scanned_queue); ++ _list *head = get_list_head(queue); ++ _list *pos = get_next(head); ++ struct wlan_network *scanned = NULL; ++ u8 ie_offset = 0; ++ _irqL irqL; ++ bool has_p2p_ie = _FALSE; ++ ++ _enter_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); ++ ++ for (pos = get_next(head);!rtw_end_of_queue_search(head, pos); pos = get_next(pos)) { ++ ++ scanned = LIST_CONTAINOR(pos, struct wlan_network, list); ++ if(scanned==NULL) ++ rtw_warn_on(1); ++ ++ if (_rtw_memcmp(&(scanned->network.Ssid), &(pnetwork->Ssid), sizeof(NDIS_802_11_SSID)) == _TRUE ++ && _rtw_memcmp(scanned->network.MacAddress, pnetwork->MacAddress, sizeof(NDIS_802_11_MAC_ADDRESS)) == _TRUE ++ ) { ++ ie_offset = (scanned->network.Reserved[0] == 2? 0:12); ++ if (rtw_get_p2p_ie(scanned->network.IEs+ie_offset, scanned->network.IELength-ie_offset, NULL, NULL)) ++ has_p2p_ie = _TRUE; ++ break; ++ } ++ } ++ ++ _exit_critical_bh(&(padapter->mlmepriv.scanned_queue.lock), &irqL); ++ ++ if (scanned == NULL || rtw_end_of_queue_search(head, pos) || has_p2p_ie == _FALSE) ++ #endif /* CONFIG_P2P */ ++ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 5, 100); ++ } ++ #endif /* CONFIG_DEAUTH_BEFORE_CONNECT */ ++ ++ //here wait for receiving the beacon to start auth ++ //and enable a timer ++ set_link_timer(pmlmeext, decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval)); ++ ++ pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; ++ } ++ else if (caps&cap_IBSS) //adhoc client ++ { ++ Set_MSR(padapter, WIFI_FW_ADHOC_STATE); ++ ++ val8 = 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //switch channel ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ beacon_timing_control(padapter); ++ ++ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; ++ ++ report_join_res(padapter, 1); ++ } ++ else ++ { ++ //DBG_871X("marc: invalid cap:%x\n", caps); ++ return; ++ } ++ ++} ++ ++void start_clnt_auth(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ pmlmeinfo->state &= (~WIFI_FW_AUTH_NULL); ++ pmlmeinfo->state |= WIFI_FW_AUTH_STATE; ++ ++ pmlmeinfo->auth_seq = 1; ++ pmlmeinfo->reauth_count = 0; ++ pmlmeinfo->reassoc_count = 0; ++ pmlmeinfo->link_count = 0; ++ pmlmeext->retry = 0; ++ ++ ++ issue_auth(padapter, NULL, 0); ++ ++ set_link_timer(pmlmeext, REAUTH_TO); ++ ++} ++ ++ ++void start_clnt_assoc(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ pmlmeinfo->state &= (~(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE)); ++ pmlmeinfo->state |= (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE); ++ ++ issue_assocreq(padapter); ++ ++ set_link_timer(pmlmeext, REASSOC_TO); ++} ++ ++unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //check A3 ++ if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_del_sta_event(padapter, MacAddr, reason); ++ ++ } ++ else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -2); ++ } ++ } ++ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_80211D ++static void process_80211d(PADAPTER padapter, WLAN_BSSID_EX *bssid) ++{ ++ struct registry_priv *pregistrypriv; ++ struct mlme_ext_priv *pmlmeext; ++ RT_CHANNEL_INFO *chplan_new; ++ u8 channel; ++ u8 i; ++ ++ ++ pregistrypriv = &padapter->registrypriv; ++ pmlmeext = &padapter->mlmeextpriv; ++ ++ // Adjust channel plan by AP Country IE ++ if (pregistrypriv->enable80211d && ++ (!pmlmeext->update_channel_plan_by_ap_done)) ++ { ++ u8 *ie, *p; ++ u32 len; ++ RT_CHANNEL_PLAN chplan_ap; ++ RT_CHANNEL_INFO chplan_sta[MAX_CHANNEL_NUM]; ++ u8 country[4]; ++ u8 fcn; // first channel number ++ u8 noc; // number of channel ++ u8 j, k; ++ ++ ie = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _COUNTRY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if (!ie) return; ++ if (len < 6) return; ++ ++ ie += 2; ++ p = ie; ++ ie += len; ++ ++ _rtw_memset(country, 0, 4); ++ _rtw_memcpy(country, p, 3); ++ p += 3; ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ++ ("%s: 802.11d country=%s\n", __FUNCTION__, country)); ++ ++ i = 0; ++ while ((ie - p) >= 3) ++ { ++ fcn = *(p++); ++ noc = *(p++); ++ p++; ++ ++ for (j = 0; j < noc; j++) ++ { ++ if (fcn <= 14) channel = fcn + j; // 2.4 GHz ++ else channel = fcn + j*4; // 5 GHz ++ ++ chplan_ap.Channel[i++] = channel; ++ } ++ } ++ chplan_ap.Len = i; ++ ++#ifdef CONFIG_DEBUG_RTL871X ++#ifdef PLATFORM_LINUX ++ i = 0; ++ printk("%s: AP[%s] channel plan {", __func__, bssid->Ssid.Ssid); ++ while ((i < chplan_ap.Len) && (chplan_ap.Channel[i] != 0)) ++ { ++ printk("%02d,", chplan_ap.Channel[i]); ++ i++; ++ } ++ printk("}\n"); ++#endif ++#endif ++ ++ _rtw_memcpy(chplan_sta, pmlmeext->channel_set, sizeof(chplan_sta)); ++#ifdef CONFIG_DEBUG_RTL871X ++#ifdef PLATFORM_LINUX ++ i = 0; ++ printk("%s: STA channel plan {", __func__); ++ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) ++ { ++ printk("%02d(%c),", chplan_sta[i].ChannelNum, chplan_sta[i].ScanType==SCAN_PASSIVE?'p':'a'); ++ i++; ++ } ++ printk("}\n"); ++#endif ++#endif ++ ++ _rtw_memset(pmlmeext->channel_set, 0, sizeof(pmlmeext->channel_set)); ++ chplan_new = pmlmeext->channel_set; ++ ++ i = j = k = 0; ++ if (pregistrypriv->wireless_mode & WIRELESS_11G) ++ { ++ do { ++ if ((i == MAX_CHANNEL_NUM) || ++ (chplan_sta[i].ChannelNum == 0) || ++ (chplan_sta[i].ChannelNum > 14)) ++ break; ++ ++ if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] > 14)) ++ break; ++ ++ if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ i++; ++ j++; ++ k++; ++ } ++ else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++// chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ chplan_new[k].ScanType = SCAN_PASSIVE; ++ i++; ++ k++; ++ } ++ else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ j++; ++ k++; ++ } ++ } while (1); ++ ++ // change AP not support channel to Passive scan ++ while ((i < MAX_CHANNEL_NUM) && ++ (chplan_sta[i].ChannelNum != 0) && ++ (chplan_sta[i].ChannelNum <= 14)) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++// chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ chplan_new[k].ScanType = SCAN_PASSIVE; ++ i++; ++ k++; ++ } ++ ++ // add channel AP supported ++ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ j++; ++ k++; ++ } ++ } ++ else ++ { ++ // keep original STA 2.4G channel plan ++ while ((i < MAX_CHANNEL_NUM) && ++ (chplan_sta[i].ChannelNum != 0) && ++ (chplan_sta[i].ChannelNum <= 14)) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++ chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ i++; ++ k++; ++ } ++ ++ // skip AP 2.4G channel plan ++ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] <= 14)) ++ { ++ j++; ++ } ++ } ++ ++ if (pregistrypriv->wireless_mode & WIRELESS_11A) ++ { ++ do { ++ if ((i == MAX_CHANNEL_NUM) || ++ (chplan_sta[i].ChannelNum == 0)) ++ break; ++ ++ if ((j == chplan_ap.Len) || (chplan_ap.Channel[j] == 0)) ++ break; ++ ++ if (chplan_sta[i].ChannelNum == chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ i++; ++ j++; ++ k++; ++ } ++ else if (chplan_sta[i].ChannelNum < chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++// chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ chplan_new[k].ScanType = SCAN_PASSIVE; ++ i++; ++ k++; ++ } ++ else if (chplan_sta[i].ChannelNum > chplan_ap.Channel[j]) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ j++; ++ k++; ++ } ++ } while (1); ++ ++ // change AP not support channel to Passive scan ++ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++// chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ chplan_new[k].ScanType = SCAN_PASSIVE; ++ i++; ++ k++; ++ } ++ ++ // add channel AP supported ++ while ((j < chplan_ap.Len) && (chplan_ap.Channel[j] != 0)) ++ { ++ chplan_new[k].ChannelNum = chplan_ap.Channel[j]; ++ chplan_new[k].ScanType = SCAN_ACTIVE; ++ j++; ++ k++; ++ } ++ } ++ else ++ { ++ // keep original STA 5G channel plan ++ while ((i < MAX_CHANNEL_NUM) && (chplan_sta[i].ChannelNum != 0)) ++ { ++ chplan_new[k].ChannelNum = chplan_sta[i].ChannelNum; ++ chplan_new[k].ScanType = chplan_sta[i].ScanType; ++ i++; ++ k++; ++ } ++ } ++ ++ pmlmeext->update_channel_plan_by_ap_done = 1; ++ ++#ifdef CONFIG_DEBUG_RTL871X ++#ifdef PLATFORM_LINUX ++ k = 0; ++ printk("%s: new STA channel plan {", __func__); ++ while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) ++ { ++ printk("%02d(%c),", chplan_new[k].ChannelNum, chplan_new[k].ScanType==SCAN_PASSIVE?'p':'c'); ++ k++; ++ } ++ printk("}\n"); ++#endif ++#endif ++ ++#if 0 ++ // recover the right channel index ++ channel = chplan_sta[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; ++ k = 0; ++ while ((k < MAX_CHANNEL_NUM) && (chplan_new[k].ChannelNum != 0)) ++ { ++ if (chplan_new[k].ChannelNum == channel) { ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ++ ("%s: change mlme_ext sitesurvey channel index from %d to %d\n", ++ __FUNCTION__, pmlmeext->sitesurvey_res.channel_idx, k)); ++ pmlmeext->sitesurvey_res.channel_idx = k; ++ break; ++ } ++ k++; ++ } ++#endif ++ } ++ ++ // If channel is used by AP, set channel scan type to active ++ channel = bssid->Configuration.DSConfig; ++ chplan_new = pmlmeext->channel_set; ++ i = 0; ++ while ((i < MAX_CHANNEL_NUM) && (chplan_new[i].ChannelNum != 0)) ++ { ++ if (chplan_new[i].ChannelNum == channel) ++ { ++ if (chplan_new[i].ScanType == SCAN_PASSIVE) ++ { ++ //5G Bnad 2, 3 (DFS) doesn't change to active scan ++ if(channel >= 52 && channel <= 144) ++ break; ++ ++ chplan_new[i].ScanType = SCAN_ACTIVE; ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ++ ("%s: change channel %d scan type from passive to active\n", ++ __FUNCTION__, channel)); ++ } ++ break; ++ } ++ i++; ++ } ++} ++#endif ++ ++/**************************************************************************** ++ ++Following are the functions to report events ++ ++*****************************************************************************/ ++ ++void report_survey_event(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct survey_event *psurvey_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext; ++ struct cmd_priv *pcmdpriv; ++ //u8 *pframe = precv_frame->u.hdr.rx_data; ++ //uint len = precv_frame->u.hdr.len; ++ ++ if(!padapter) ++ return; ++ ++ pmlmeext = &padapter->mlmeextpriv; ++ pcmdpriv = &padapter->cmdpriv; ++ ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct survey_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_Survey); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ psurvey_evt = (struct survey_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ ++ if (collect_bss_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)pevtcmd, cmdsz); ++ return; ++ } ++ ++#ifdef CONFIG_80211D ++ process_80211d(padapter, &psurvey_evt->bss); ++#endif ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ pmlmeext->sitesurvey_res.bss_cnt++; ++ ++ return; ++ ++} ++ ++void report_surveydone_event(_adapter *padapter) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct surveydone_event *psurveydone_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct surveydone_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_SurveyDone); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ psurveydone_evt = (struct surveydone_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt; ++ ++ DBG_871X("survey done event(%x) band:%d for "ADPT_FMT"\n", psurveydone_evt->bss_cnt, padapter->setband, ADPT_ARG(padapter)); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++ ++} ++ ++void report_join_res(_adapter *padapter, int res) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct joinbss_event *pjoinbss_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct joinbss_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_JoinBss); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ pjoinbss_evt = (struct joinbss_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); ++ pjoinbss_evt->network.join_res = pjoinbss_evt->network.aid = res; ++ ++ DBG_871X("report_join_res(%d)\n", res); ++ ++ ++ rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network); ++ ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++ ++} ++ ++void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct sta_info *psta; ++ int mac_id; ++ struct stadel_event *pdel_sta_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct stadel_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_DelSTA); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ pdel_sta_evt = (struct stadel_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); ++ _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd),(unsigned char *)(&reason),2); ++ ++ ++ psta = rtw_get_stainfo(&padapter->stapriv, MacAddr); ++ if(psta) ++ mac_id = (int)psta->mac_id; ++ else ++ mac_id = (-1); ++ ++ pdel_sta_evt->mac_id = mac_id; ++ ++ DBG_871X("report_del_sta_event: delete STA, mac_id=%d\n", mac_id); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++} ++ ++void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct stassoc_event *padd_sta_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct stassoc_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_AddSTA); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ padd_sta_evt = (struct stassoc_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN); ++ padd_sta_evt->cam_id = cam_idx; ++ ++ DBG_871X("report_add_sta_event: add STA\n"); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++} ++ ++ ++/**************************************************************************** ++ ++Following are the event callback functions ++ ++*****************************************************************************/ ++ ++//for sta/adhoc mode ++void update_sta_info(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //ERP ++ VCS_update(padapter, psta); ++ ++ ++ //HT ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ ++ psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable; ++ ++ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) ++ psta->htpriv.sgi = _TRUE; ++ ++ psta->qos_option = _TRUE; ++ ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ ++ psta->htpriv.ampdu_enable = _FALSE; ++ ++ psta->htpriv.sgi = _FALSE; ++ ++ psta->qos_option = _FALSE; ++ ++ } ++ ++ psta->htpriv.bwmode = pmlmeext->cur_bwmode; ++ psta->htpriv.ch_offset = pmlmeext->cur_ch_offset; ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //QoS ++ if(pmlmepriv->qospriv.qos_option) ++ psta->qos_option = _TRUE; ++ ++ ++ psta->state = _FW_LINKED; ++ ++} ++ ++void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) ++{ ++ struct sta_info *psta, *psta_bmc; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 join_type; ++ ++ if(join_res < 0) ++ { ++ join_type = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); ++ ++ //restore to initial setting. ++ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); ++#if 0 //temply remove ++#ifdef CONFIG_INTEL_WIDI ++#ifdef DBG_CONFIG_ERROR_DETECT ++ DBG_871X("%s(): do silentreset\n",__FUNCTION__); ++ rtw_hal_sreset_reset(padapter); ++#endif ++#endif ++#endif ++ goto exit_mlmeext_joinbss_event_callback; ++ } ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ //for bc/mc ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(psta_bmc) ++ { ++ pmlmeinfo->FW_sta_info[psta_bmc->mac_id].psta = psta_bmc; ++ update_bmc_sta_support_rate(padapter, psta_bmc->mac_id); ++ Update_RA_Entry(padapter, psta_bmc->mac_id); ++ } ++ } ++ ++ ++ //turn on dynamic functions ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ // update IOT-releated issue ++ update_IOT_info(padapter); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates); ++ ++ //BCN interval ++ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pmlmeinfo->bcn_interval)); ++ ++ //udpate capability ++ update_capinfo(padapter, pmlmeinfo->capability); ++ ++ //WMM, Update EDCA param ++ WMMOnAssocRsp(padapter); ++ ++ //HT ++ HTOnAssocRsp(padapter); ++ ++#ifndef CONFIG_CONCURRENT_MODE ++ // Call set_channel_bwmode when the CONFIG_CONCURRENT_MODE doesn't be defined. ++ //Set cur_channel&cur_bwmode&cur_ch_offset ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++#endif ++ ++ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); ++ if (psta) //only for infra. mode ++ { ++ pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; ++ ++ //DBG_871X("set_sta_rate\n"); ++ ++ //set per sta rate after updating HT cap. ++ set_sta_rate(padapter, psta); ++ } ++ ++ join_type = 2; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ // correcting TSF ++ correct_TSF(padapter, pmlmeext); ++ ++ //set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++ ++#ifdef CONFIG_LPS ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0); ++#endif ++ ++exit_mlmeext_joinbss_event_callback: ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_handle_join_done(padapter, join_res); ++#endif ++#ifdef CONFIG_CONCURRENT_MODE ++ concurrent_chk_joinbss_done(padapter, join_res); ++#endif ++ ++ DBG_871X("=>%s\n", __FUNCTION__); ++ ++} ++ ++void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 join_type; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ if(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)//adhoc master or sta_count>1 ++ { ++ //nothing to do ++ } ++ else//adhoc client ++ { ++ //update TSF Value ++ //update_TSF(pmlmeext, pframe, len); ++ ++ // correcting TSF ++ correct_TSF(padapter, pmlmeext); ++ ++ //start beacon ++ if(send_beacon(padapter)==_FAIL) ++ { ++ pmlmeinfo->FW_sta_info[psta->mac_id].status = 0; ++ ++ pmlmeinfo->state ^= WIFI_FW_ADHOC_STATE; ++ ++ return; ++ } ++ ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ } ++ ++ join_type = 2; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ } ++ ++ pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; ++ ++ //rate radaptive ++ Update_RA_Entry(padapter, psta->mac_id); ++ ++ //update adhoc sta_info ++ update_sta_info(padapter, psta); ++ ++} ++ ++void mlmeext_sta_del_event_callback(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) ++ { ++ //set_opmode_cmd(padapter, infra_client_with_mlme); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); ++ ++ //restore to initial setting. ++ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_set_channel_bwmode_disconnect(padapter); ++#else ++#ifdef CONFIG_CONCURRENT_MODE ++ if((check_buddy_fwstate(padapter, _FW_LINKED)) != _TRUE) ++ { ++#endif //CONFIG_CONCURRENT_MODE ++ ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ } ++#endif //CONFIG_CONCURRENT_MODE ++#endif //CONFIG_DUALMAC_CONCURRENT ++ ++ flush_all_cam_entry(padapter); ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ //set MSR to no link state -> infra. mode ++ Set_MSR(padapter, _HW_STATE_STATION_); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ } ++ ++} ++ ++/**************************************************************************** ++ ++Following are the functions for the timer handlers ++ ++*****************************************************************************/ ++void _linked_rx_signal_strehgth_display(_adapter *padapter); ++void _linked_rx_signal_strehgth_display(_adapter *padapter) ++{ ++ int UndecoratedSmoothedPWDB; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ DBG_871X("============ pbuddy_adapter linked status check ===================\n"); ++ DBG_871X("buddy_adapter_type=%d\n", pbuddy_adapter->adapter_type); ++ DBG_871X("pbuddy_adapter pathA Rx SNRdb:%d\n",pbuddy_adapter->recvpriv.RxSNRdB[0]); ++ DBG_871X("pbuddy_adapter pathA Rx PWDB:%d\n",pbuddy_adapter->recvpriv.rxpwdb); ++ DBG_871X("pbuddy_adapter pathA Rx RSSI:%d,pathB Rx RSSI:%d\n" ++ ,pbuddy_adapter->recvpriv.RxRssi[0],pbuddy_adapter->recvpriv.RxRssi[1]); ++ rtw_hal_get_def_var(pbuddy_adapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ DBG_871X("pbuddy_adapter UndecoratedSmoothedPWDB:%d\n",UndecoratedSmoothedPWDB); ++ DBG_871X("Rx RSSI:%d\n",pbuddy_adapter->recvpriv.rssi); ++ DBG_871X("Rx Signal_strength:%d\n",pbuddy_adapter->recvpriv.signal_strength); ++ DBG_871X("Rx Signal_qual:%d \n",pbuddy_adapter->recvpriv.signal_qual); ++ DBG_871X("============ linked status check ===================\n"); ++ DBG_871X("adapter_type=%d\n", padapter->adapter_type); ++#else //CONFIG_CONCURRENT_MODE ++ DBG_871X("============ linked status check ===================\n"); ++#endif //CONFIG_CONCURRENT_MODE ++ DBG_871X("pathA Rx SNRdb:%d, pathB Rx SNRdb:%d\n",padapter->recvpriv.RxSNRdB[0], padapter->recvpriv.RxSNRdB[1]); ++ DBG_871X("pathA Rx PWDB:%d\n",padapter->recvpriv.rxpwdb); ++ DBG_871X("pathA Rx RSSI:%d,pathB Rx RSSI:%d\n",padapter->recvpriv.RxRssi[0],padapter->recvpriv.RxRssi[1]); ++ rtw_hal_get_def_var(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ DBG_871X("UndecoratedSmoothedPWDB:%d\n",UndecoratedSmoothedPWDB); ++ DBG_871X("Rx RSSI:%d\n",padapter->recvpriv.rssi); ++ DBG_871X("Rx Signal_strength:%d\n",padapter->recvpriv.signal_strength); ++ DBG_871X("Rx Signal_qual:%d \n",padapter->recvpriv.signal_qual); ++ if ( check_fwstate( &padapter->mlmepriv, _FW_LINKED )) ++ { ++ DBG_871X("bw mode: %d, channel: %d\n", padapter->mlmeextpriv.cur_bwmode, padapter->mlmeextpriv.cur_channel ); ++ DBG_871X("received bytes = %d\n", (u32) (padapter->recvpriv.rx_bytes - padapter->recvpriv.last_rx_bytes ) ); ++ } ++ DBG_871X("============ linked status check ===================\n"); ++ DBG_871X(" DIG PATH-A(0x%02x), PATH-B(0x%02x)\n",rtw_read8(padapter,0xc50),rtw_read8(padapter,0xc58)); ++ DBG_871X(" OFDM -Alarm DA2(0x%04x),DA4(0x%04x),DA6(0x%04x),DA8(0x%04x)\n", ++ rtw_read16(padapter,0xDA2),rtw_read16(padapter,0xDA4),rtw_read16(padapter,0xDA6),rtw_read16(padapter,0xDA8)); ++ ++ DBG_871X(" CCK -Alarm A5B(0x%02x),A5C(0x%02x)\n",rtw_read8(padapter,0xA5B),rtw_read8(padapter,0xA5C)); ++ DBG_871X(" FalseAlmCnt_all(%d)\n",padapter->recvpriv.FalseAlmCnt_all); ++ ++} ++ ++u8 chk_ap_is_alive(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X(FUNC_ADPT_FMT" rx:"STA_PKTS_FMT", beacon:%llu, probersp_to_self:%llu" ++ /*", probersp_bm:%llu, probersp_uo:%llu, probereq:%llu, BI:%u"*/ ++ ", retry:%u\n" ++ , FUNC_ADPT_ARG(padapter) ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->sta_stats.rx_beacon_pkts - psta->sta_stats.last_rx_beacon_pkts ++ , psta->sta_stats.rx_probersp_pkts - psta->sta_stats.last_rx_probersp_pkts ++ /*, psta->sta_stats.rx_probersp_bm_pkts - psta->sta_stats.last_rx_probersp_bm_pkts ++ , psta->sta_stats.rx_probersp_uo_pkts - psta->sta_stats.last_rx_probersp_uo_pkts ++ , psta->sta_stats.rx_probereq_pkts - psta->sta_stats.last_rx_probereq_pkts ++ , pmlmeinfo->bcn_interval*/ ++ , pmlmeext->retry ++ ); ++ ++ DBG_871X(FUNC_ADPT_FMT" tx_pkts:%llu, link_count:%u\n", FUNC_ADPT_ARG(padapter) ++ , padapter->xmitpriv.tx_pkts ++ , pmlmeinfo->link_count ++ ); ++ #endif ++ ++ if((sta_rx_data_pkts(psta) == sta_last_rx_data_pkts(psta)) ++ && sta_rx_beacon_pkts(psta) == sta_last_rx_beacon_pkts(psta) ++ && sta_rx_probersp_pkts(psta) == sta_last_rx_probersp_pkts(psta) ++ ) ++ { ++ ret = _FALSE; ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void linked_status_chk(_adapter *padapter) ++{ ++ u32 i; ++ struct sta_info *psta; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(padapter->bRxRSSIDisplay) ++ _linked_rx_signal_strehgth_display(padapter); ++ ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ rtw_hal_sreset_linked_status_check(padapter); ++ #endif ++ ++ if (is_client_associated_to_ap(padapter)) ++ { ++ //linked infrastructure client mode ++ ++ int tx_chk = _SUCCESS, rx_chk = _SUCCESS; ++ int rx_chk_limit; ++ ++ #if defined(DBG_ROAMING_TEST) ++ rx_chk_limit = 1; ++ #elif defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) ++ rx_chk_limit = 4; ++ #else ++ rx_chk_limit = 8; ++ #endif ++ ++ // Marked by Kurt 20130715 ++ // For WiDi 3.5 and later on, they don't ask WiDi sink to do roaming, so we could not check rx limit that strictly. ++ // todo: To check why rx_chk would be _FALSE under miracast session. ++ //#ifdef CONFIG_INTEL_WIDI ++ //if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) ++ // rx_chk_limit = 1; ++ //#endif ++ ++ if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ { ++ bool is_p2p_enable = _FALSE; ++ #ifdef CONFIG_P2P ++ is_p2p_enable = !rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE); ++ #endif ++ ++ if (chk_ap_is_alive(padapter, psta) == _FALSE) ++ rx_chk = _FAIL; ++ ++ if (pxmitpriv->last_tx_pkts == pxmitpriv->tx_pkts) ++ tx_chk = _FAIL; ++ ++ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ if (pmlmeext->active_keep_alive_check && (rx_chk == _FAIL || tx_chk == _FAIL)) { ++ u8 backup_oper_channel=0; ++ ++ /* switch to correct channel of current network before issue keep-alive frames */ ++ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { ++ backup_oper_channel = rtw_get_oper_ch(padapter); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ } ++ ++ if (rx_chk != _SUCCESS) ++ issue_probereq_ex(padapter, &pmlmeinfo->network.Ssid, psta->hwaddr, 3, 1); ++ ++ if ((tx_chk != _SUCCESS && pmlmeinfo->link_count++ == 0xf) || rx_chk != _SUCCESS) { ++ tx_chk = issue_nulldata(padapter, psta->hwaddr, 0, 3, 1); ++ /* if tx acked and p2p disabled, set rx_chk _SUCCESS to reset retry count */ ++ if (tx_chk == _SUCCESS && !is_p2p_enable) ++ rx_chk = _SUCCESS; ++ } ++ ++ /* back to the original operation channel */ ++ if(backup_oper_channel>0) ++ SelectChannel(padapter, backup_oper_channel); ++ ++ } ++ else ++ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ { ++ if (rx_chk != _SUCCESS) { ++ if (pmlmeext->retry == 0) { ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("issue_probereq to trigger probersp, retry=%d\n", pmlmeext->retry); ++ #endif ++ issue_probereq(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress); ++ issue_probereq(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress); ++ issue_probereq(padapter, &pmlmeinfo->network.Ssid, pmlmeinfo->network.MacAddress); ++ } ++ } ++ ++ if (tx_chk != _SUCCESS && pmlmeinfo->link_count++ == 0xf) { ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("%s issue_nulldata 0\n", __FUNCTION__); ++ #endif ++ tx_chk = issue_nulldata(padapter, NULL, 0, 1, 0); ++ } ++ } ++ ++ if (rx_chk == _FAIL) { ++ pmlmeext->retry++; ++ if (pmlmeext->retry > rx_chk_limit) { ++ DBG_871X(FUNC_ADPT_FMT" disconnect or roaming\n", ++ FUNC_ADPT_ARG(padapter)); ++ receive_disconnect(padapter, pmlmeinfo->network.MacAddress ++ , WLAN_REASON_EXPIRATION_CHK); ++ return; ++ } ++ } else { ++ pmlmeext->retry = 0; ++ } ++ ++ if (tx_chk == _FAIL) { ++ pmlmeinfo->link_count &= 0xf; ++ } else { ++ pxmitpriv->last_tx_pkts = pxmitpriv->tx_pkts; ++ pmlmeinfo->link_count = 0; ++ } ++ ++ } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) ++ } ++ else if (is_client_associated_to_ibss(padapter)) ++ { ++ //linked IBSS mode ++ //for each assoc list entry to check the rx pkt counter ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ psta = pmlmeinfo->FW_sta_info[i].psta; ++ ++ if(NULL==psta) continue; ++ ++ if (pmlmeinfo->FW_sta_info[i].rx_pkt == sta_rx_pkts(psta)) ++ { ++ ++ if(pmlmeinfo->FW_sta_info[i].retry<3) ++ { ++ pmlmeinfo->FW_sta_info[i].retry++; ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].retry = 0; ++ pmlmeinfo->FW_sta_info[i].status = 0; ++ report_del_sta_event(padapter, psta->hwaddr ++ , 65535// indicate disconnect caused by no rx ++ ); ++ } ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].retry = 0; ++ pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)sta_rx_pkts(psta); ++ } ++ } ++ } ++ ++ //set_link_timer(pmlmeext, DISCONNECT_TO); ++ ++ } ++ ++} ++ ++void survey_timer_hdl(_adapter *padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct sitesurvey_parm *psurveyPara; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ ++ //DBG_871X("marc: survey timer\n"); ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_lock(NULL); ++ if (callout_pending(&padapter->mlmeextpriv.survey_timer.callout)) { ++ /* callout was reset */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ if (!callout_active(&padapter->mlmeextpriv.survey_timer.callout)) { ++ /* callout was stopped */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ callout_deactivate(&padapter->mlmeextpriv.survey_timer.callout); ++ ++ ++#endif ++ ++ //issue rtw_sitesurvey_cmd ++ if (pmlmeext->sitesurvey_res.state > SCAN_START) ++ { ++ if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if( padapter->mlmeextpriv.mlmext_info.scan_cnt != RTW_SCAN_NUM_OF_CH ) ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ pmlmeext->sitesurvey_res.channel_idx++; ++ } ++ ++ if(pmlmeext->scan_abort == _TRUE) ++ { ++ #ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); ++ pmlmeext->sitesurvey_res.channel_idx = 3; ++ DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ ++ , pmlmeext->sitesurvey_res.channel_idx ++ , pwdinfo->find_phase_state_exchange_cnt ++ ); ++ } ++ else ++ #endif ++ { ++ pmlmeext->sitesurvey_res.channel_idx = pmlmeext->sitesurvey_res.ch_num; ++ DBG_871X("%s idx:%d\n", __FUNCTION__ ++ , pmlmeext->sitesurvey_res.channel_idx ++ ); ++ } ++ ++ pmlmeext->scan_abort = _FALSE;//reset ++ } ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ goto exit_survey_timer_hdl; ++ } ++ ++ if ((psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ goto exit_survey_timer_hdl; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); ++ rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ ++ ++exit_survey_timer_hdl: ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_unlock(NULL); ++#endif ++ ++ return; ++} ++ ++void link_timer_hdl(_adapter *padapter) ++{ ++ //static unsigned int rx_pkt = 0; ++ //static u64 tx_cnt = 0; ++ //struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_lock(NULL); ++ if (callout_pending(&padapter->mlmeextpriv.survey_timer.callout)) { ++ /* callout was reset */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ if (!callout_active(&padapter->mlmeextpriv.survey_timer.callout)) { ++ /* callout was stopped */ ++ //mtx_unlock(&sc->sc_mtx); ++ rtw_mtx_unlock(NULL); ++ return; ++ } ++ callout_deactivate(&padapter->mlmeextpriv.survey_timer.callout); ++ ++ ++#endif ++ ++ if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) ++ { ++ DBG_871X("link_timer_hdl:no beacon while connecting\n"); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -3); ++ } ++ else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) ++ { ++ //re-auth timer ++ if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) ++ { ++ //if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) ++ //{ ++ pmlmeinfo->state = 0; ++ report_join_res(padapter, -1); ++ return; ++ //} ++ //else ++ //{ ++ // pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; ++ // pmlmeinfo->reauth_count = 0; ++ //} ++ } ++ ++ DBG_871X("link_timer_hdl: auth timeout and try again\n"); ++ pmlmeinfo->auth_seq = 1; ++ issue_auth(padapter, NULL, 0); ++ set_link_timer(pmlmeext, REAUTH_TO); ++ } ++ else if (pmlmeinfo->state & WIFI_FW_ASSOC_STATE) ++ { ++ //re-assoc timer ++ if (++pmlmeinfo->reassoc_count > REASSOC_LIMIT) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -2); ++ return; ++ } ++ ++ DBG_871X("link_timer_hdl: assoc timeout and try again\n"); ++ issue_assocreq(padapter); ++ set_link_timer(pmlmeext, REASSOC_TO); ++ } ++#if 0 ++ else if (is_client_associated_to_ap(padapter)) ++ { ++ //linked infrastructure client mode ++ if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ { ++ /*to monitor whether the AP is alive or not*/ ++ if (rx_pkt == psta->sta_stats.rx_pkts) ++ { ++ receive_disconnect(padapter, pmlmeinfo->network.MacAddress); ++ return; ++ } ++ else ++ { ++ rx_pkt = psta->sta_stats.rx_pkts; ++ set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++ ++ //update the EDCA paramter according to the Tx/RX mode ++ update_EDCA_param(padapter); ++ ++ /*to send the AP a nulldata if no frame is xmitted in order to keep alive*/ ++ if (pmlmeinfo->link_count++ == 0) ++ { ++ tx_cnt = pxmitpriv->tx_pkts; ++ } ++ else if ((pmlmeinfo->link_count & 0xf) == 0) ++ { ++ if (tx_cnt == pxmitpriv->tx_pkts) ++ { ++ issue_nulldata(padapter, NULL, 0, 0, 0); ++ } ++ ++ tx_cnt = pxmitpriv->tx_pkts; ++ } ++ } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) ++ } ++ else if (is_client_associated_to_ibss(padapter)) ++ { ++ //linked IBSS mode ++ //for each assoc list entry to check the rx pkt counter ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ psta = pmlmeinfo->FW_sta_info[i].psta; ++ ++ if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts) ++ { ++ pmlmeinfo->FW_sta_info[i].status = 0; ++ report_del_sta_event(padapter, psta->hwaddr); ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].rx_pkt = psta->sta_stats.rx_pkts; ++ } ++ } ++ } ++ ++ set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ rtw_mtx_unlock(NULL); ++#endif ++ ++ return; ++} ++ ++void addba_timer_hdl(struct sta_info *psta) ++{ ++ struct ht_priv *phtpriv; ++ ++ if(!psta) ++ return; ++ ++ phtpriv = &psta->htpriv; ++ ++ if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) ++ { ++ if(phtpriv->candidate_tid_bitmap) ++ phtpriv->candidate_tid_bitmap=0x0; ++ ++ } ++} ++ ++#ifdef CONFIG_IEEE80211W ++void sa_query_timer_hdl(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv * pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ //disconnect ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ rtw_disassoc_cmd(padapter, 0, _TRUE); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ DBG_871X("SA query timeout disconnect\n"); ++} ++#endif //CONFIG_IEEE80211W ++ ++u8 NULL_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ return H2C_SUCCESS; ++} ++ ++#ifdef CONFIG_AUTO_AP_MODE ++void rtw_start_auto_ap(_adapter *adapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ rtw_set_802_11_infrastructure_mode(adapter, Ndis802_11APMode); ++ ++ rtw_setopmode_cmd(adapter, Ndis802_11APMode); ++} ++ ++static int rtw_auto_ap_start_beacon(_adapter *adapter) ++{ ++ int ret=0; ++ u8 *pbuf = NULL; ++ uint len; ++ u8 supportRate[16]; ++ int sz = 0, rateLen; ++ u8 * ie; ++ u8 wireless_mode, oper_channel; ++ u8 ssid[3] = {0}; //hidden ssid ++ u32 ssid_len = sizeof(ssid); ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ++ len = 128; ++ pbuf = rtw_zmalloc(len); ++ if(!pbuf) ++ return -ENOMEM; ++ ++ ++ //generate beacon ++ ie = pbuf; ++ ++ //timestamp will be inserted by hardware ++ sz += 8; ++ ie += sz; ++ ++ //beacon interval : 2bytes ++ *(u16*)ie = cpu_to_le16((u16)100);//BCN_INTERVAL=100; ++ sz += 2; ++ ie += 2; ++ ++ //capability info ++ *(u16*)ie = 0; ++ *(u16*)ie |= cpu_to_le16(cap_ESS); ++ *(u16*)ie |= cpu_to_le16(cap_ShortPremble); ++ //*(u16*)ie |= cpu_to_le16(cap_Privacy); ++ sz += 2; ++ ie += 2; ++ ++ //SSID ++ ie = rtw_set_ie(ie, _SSID_IE_, ssid_len, ssid, &sz); ++ ++ //supported rates ++ wireless_mode = WIRELESS_11BG_24N; ++ rtw_set_supported_rate(supportRate, wireless_mode) ; ++ rateLen = rtw_get_rateset_len(supportRate); ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, supportRate, &sz); ++ } ++ else ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, supportRate, &sz); ++ } ++ ++ ++ //DS parameter set ++ if(check_buddy_fwstate(adapter, _FW_LINKED) && ++ check_buddy_fwstate(adapter, WIFI_STATION_STATE)) ++ { ++ PADAPTER pbuddy_adapter = adapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ oper_channel = pbuddy_mlmeext->cur_channel; ++ } ++ else ++ { ++ oper_channel = adapter_to_dvobj(adapter)->oper_channel; ++ } ++ ie = rtw_set_ie(ie, _DSSET_IE_, 1, &oper_channel, &sz); ++ ++ //ext supported rates ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (supportRate + 8), &sz); ++ } ++ ++ DBG_871X("%s, start auto ap beacon sz=%d\n", __FUNCTION__, sz); ++ ++ //lunch ap mode & start to issue beacon ++ if(rtw_check_beacon_data(adapter, pbuf, sz) == _SUCCESS) ++ { ++ ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ ++ rtw_mfree(pbuf, len); ++ ++ return ret; ++ ++} ++#endif//CONFIG_AUTO_AP_MODE ++ ++u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ u8 type; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf; ++ ++ if(psetop->mode == Ndis802_11APMode) ++ { ++ pmlmeinfo->state = WIFI_FW_AP_STATE; ++ type = _HW_STATE_AP_; ++#ifdef CONFIG_NATIVEAP_MLME ++ //start_ap_mode(padapter); ++#endif ++ } ++ else if(psetop->mode == Ndis802_11Infrastructure) ++ { ++ pmlmeinfo->state &= ~(BIT(0)|BIT(1));// clear state ++ pmlmeinfo->state |= WIFI_FW_STATION_STATE;//set to STATION_STATE ++ type = _HW_STATE_STATION_; ++ } ++ else if(psetop->mode == Ndis802_11IBSS) ++ { ++ type = _HW_STATE_ADHOC_; ++ } ++ else ++ { ++ type = _HW_STATE_NOLINK_; ++ } ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); ++ //Set_NETYPE0_MSR(padapter, type); ++ ++#ifdef CONFIG_AUTO_AP_MODE ++ if(psetop->mode == Ndis802_11APMode) ++ rtw_auto_ap_start_beacon(padapter); ++#endif ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 createbss_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; ++ u32 initialgain; ++ ++ ++ if(pparm->network.InfrastructureMode == Ndis802_11APMode) ++ { ++#ifdef CONFIG_AP_MODE ++ ++ if(pmlmeinfo->state == WIFI_FW_AP_STATE) ++ { ++ //todo: ++ return H2C_SUCCESS; ++ } ++#endif ++ } ++ ++ //below is for ad-hoc master ++ if(pparm->network.InfrastructureMode == Ndis802_11IBSS) ++ { ++ rtw_joinbss_reset(padapter); ++ ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmlmeinfo->ERP_enable = 0; ++ pmlmeinfo->WMM_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->agg_enable_bitmap = 0; ++ pmlmeinfo->candidate_tid_bitmap = 0; ++ ++ //disable dynamic functions, such as high power, DIG ++ Save_DM_Func_Flag(padapter); ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under linking, need to write the BB registers ++ initialgain = 0x1E; ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ //cancel link timer ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //clear CAM ++ flush_all_cam_entry(padapter); ++ ++ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; ++ ++ if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength ++ return H2C_PARAMETERS_ERROR; ++ ++ _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); ++ ++ start_create_ibss(padapter); ++ ++ } ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ u8 join_type; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; ++#endif //CONFIG_ANTENNA_DIVERSITY ++ u32 initialgain, i; ++ u8 cbw40_enable=0; ++ //u32 acparm; ++ ++ //check already connecting to AP or not ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ if (pmlmeinfo->state & WIFI_FW_STATION_STATE) ++ { ++ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, 5, 100); ++ } ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ //clear CAM ++ flush_all_cam_entry(padapter); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //set MSR to nolink -> infra. mode ++ //Set_MSR(padapter, _HW_STATE_NOLINK_); ++ Set_MSR(padapter, _HW_STATE_STATION_); ++ ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ } ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_antenna_select_cmd(padapter, pparm->network.PhyInfo.Optimum_antenna, _FALSE); ++#endif ++ ++ rtw_joinbss_reset(padapter); ++ ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmlmeinfo->ERP_enable = 0; ++ pmlmeinfo->WMM_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->agg_enable_bitmap = 0; ++ pmlmeinfo->candidate_tid_bitmap = 0; ++ pmlmeinfo->bwmode_updated = _FALSE; ++ //pmlmeinfo->assoc_AP_vendor = maxAP; ++ ++ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; ++ ++ if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength ++ return H2C_PARAMETERS_ERROR; ++ ++ _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); ++ ++ pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; ++ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); ++ ++ //Check AP vendor to move rtw_joinbss_cmd() ++ //pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength); ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_://Get WMM IE. ++ if ( _rtw_memcmp(pIE->data, WMM_OUI, 4) ) ++ { ++ pmlmeinfo->WMM_enable = 1; ++ } ++ break; ++ ++ case _HT_CAPABILITY_IE_: //Get HT Cap IE. ++ pmlmeinfo->HT_caps_enable = 1; ++ break; ++ ++ case _HT_EXTRA_INFO_IE_: //Get HT Info IE. ++ pmlmeinfo->HT_info_enable = 1; ++ ++ //spec case only for cisco's ap because cisco's ap issue assoc rsp using mcs rate @40MHz or @20MHz ++//#if !defined(CONFIG_CONCURRENT_MODE) && !defined(CONFIG_DUALMAC_CONCURRENT) ++// if(pmlmeinfo->assoc_AP_vendor == ciscoAP) ++//#endif ++ { ++ struct HT_info_element *pht_info = (struct HT_info_element *)(pIE->data); ++ ++ if( pnetwork->Configuration.DSConfig > 14 ) ++ { ++ if( pregpriv->cbw40_enable & BIT(1) ) ++ cbw40_enable = 1; ++ } ++ else ++ if( pregpriv->cbw40_enable & BIT(0) ) ++ cbw40_enable = 1; ++ ++ if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode according to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pht_info->infos[0] & 0x3) ++ { ++ case 1: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ DBG_871X("set ch/bw before connected\n"); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++#if 0 ++ if (padapter->registrypriv.wifi_spec) { ++ // for WiFi test, follow WMM test plan spec ++ acparm = 0x002F431C; // VO ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E541C; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ acparm = 0x0000A525; // BE ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A549; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ // for WiFi test, mixed mode with intel STA under bg mode throughput issue ++ if (padapter->mlmepriv.htpriv.ht_option == _FALSE){ ++ acparm = 0x00004320; ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ } ++ } ++ else { ++ acparm = 0x002F3217; // VO ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ acparm = 0x00105320; // BE ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ } ++#endif ++ ++ /* check channel, bandwidth, offset and switch */ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ if(dc_handle_join_request(padapter) == _FAIL) { ++ DBG_871X("dc_handle_join_request fail !!!\n"); ++ return H2C_SUCCESS; ++ } ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++#else //NON CONFIG_DUALMAC_CONCURRENT ++ if(rtw_chk_start_clnt_join(padapter) == _FAIL) { ++ report_join_res(padapter, (-4)); ++ return H2C_SUCCESS; ++ } ++#endif ++ ++ //disable dynamic functions, such as high power, DIG ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under linking, need to write the BB registers ++ ++ initialgain = 0x1E; ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ join_type = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ //cancel link timer ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ start_clnt_join(padapter); ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct disconnect_parm *param = (struct disconnect_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ u8 val8; ++ ++ if (is_client_associated_to_ap(padapter)) ++ { ++ issue_deauth_ex(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING, param->deauth_timeout_ms/100, 100); ++ } ++ ++ //set_opmode_cmd(padapter, infra_client_with_mlme); ++ ++ //pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); ++ ++ //restore to initial setting. ++ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //Stop BCN ++ val8 = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); ++ } ++ ++ ++ //set MSR to no link state -> infra. mode ++ Set_MSR(padapter, _HW_STATE_STATION_); ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_set_channel_bwmode_disconnect(padapter); ++#else ++#ifdef CONFIG_CONCURRENT_MODE ++ if((check_buddy_fwstate(padapter, _FW_LINKED)) != _TRUE) ++ { ++#endif //CONFIG_CONCURRENT_MODE ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++#ifdef CONFIG_CONCURRENT_MODE ++ } ++#endif //CONFIG_CONCURRENT_MODE ++#endif //CONFIG_DUALMAC_CONCURRENT ++ ++ flush_all_cam_entry(padapter); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ rtw_free_uc_swdec_pending_queue(padapter); ++ ++ return H2C_SUCCESS; ++} ++ ++int rtw_scan_ch_decision(_adapter *padapter, struct rtw_ieee80211_channel *out, ++ u32 out_num, struct rtw_ieee80211_channel *in, u32 in_num) ++{ ++ int i, j; ++ int scan_ch_num = 0; ++ int set_idx; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ /* clear first */ ++ _rtw_memset(out, 0, sizeof(struct rtw_ieee80211_channel)*out_num); ++ ++ /* acquire channels from in */ ++ j = 0; ++ for (i=0;ichannel_set, in[i].hw_value)) >=0 ++ && rtw_mlme_band_check(padapter, in[i].hw_value) == _TRUE ++ ) ++ { ++ if (j >= out_num) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" out_num:%u not enough\n", ++ FUNC_ADPT_ARG(padapter), out_num); ++ break; ++ } ++ ++ _rtw_memcpy(&out[j], &in[i], sizeof(struct rtw_ieee80211_channel)); ++ ++ if(pmlmeext->channel_set[set_idx].ScanType == SCAN_PASSIVE) ++ out[j].flags &= RTW_IEEE80211_CHAN_PASSIVE_SCAN; ++ ++ j++; ++ } ++ if(j>=out_num) ++ break; ++ } ++ ++ /* if out is empty, use channel_set as default */ ++ if(j == 0) { ++ for (i=0;imax_chan_nums;i++) { ++ ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), pmlmeext->channel_set[i].ChannelNum); ++ ++ if (rtw_mlme_band_check(padapter, pmlmeext->channel_set[i].ChannelNum) == _TRUE) { ++ ++ if (j >= out_num) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" out_num:%u not enough\n", ++ FUNC_ADPT_ARG(padapter), out_num); ++ break; ++ } ++ ++ out[j].hw_value = pmlmeext->channel_set[i].ChannelNum; ++ ++ if(pmlmeext->channel_set[i].ScanType == SCAN_PASSIVE) ++ out[j].flags &= RTW_IEEE80211_CHAN_PASSIVE_SCAN; ++ ++ j++; ++ } ++ } ++ } ++ ++ return j; ++} ++ ++u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; ++ u8 bdelayscan = _FALSE; ++ u8 val8; ++ u32 initialgain; ++ u32 i; ++ u8 write_initial_gain = 1; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ //for first time sitesurvey_cmd ++ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ pmlmeext->sitesurvey_res.state = SCAN_START; ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ ++ for(i=0;issid[i].SsidLength) { ++ _rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); ++ pmlmeext->sitesurvey_res.ssid[i].SsidLength= pparm->ssid[i].SsidLength; ++ } else { ++ pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0; ++ } ++ } ++ ++ pmlmeext->sitesurvey_res.ch_num = rtw_scan_ch_decision(padapter ++ , pmlmeext->sitesurvey_res.ch, RTW_CHANNEL_SCAN_AMOUNT ++ , pparm->ch, pparm->ch_num ++ ); ++ ++ pmlmeext->sitesurvey_res.scan_mode = pparm->scan_mode; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ bdelayscan = dc_handle_site_survey(padapter); ++#endif ++ ++ //issue null data if associating to the AP ++ if (is_client_associated_to_ap(padapter) == _TRUE) ++ { ++ pmlmeext->sitesurvey_res.state = SCAN_TXNULL; ++ ++ issue_nulldata(padapter, NULL, 1, 3, 500); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) ++ { ++ DBG_871X("adapter is scanning(buddy_adapter is linked), issue nulldata(pwrbit=1)\n"); ++ ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ } ++#endif ++ bdelayscan = _TRUE; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ else if(is_client_associated_to_ap(padapter->pbuddy_adapter) == _TRUE) ++ { ++ #ifdef CONFIG_TDLS ++ if(padapter->pbuddy_adapter->wdinfo.wfd_tdls_enable == 1) ++ { ++ issue_tunneled_probe_req(padapter->pbuddy_adapter); ++ } ++ #endif //CONFIG_TDLS ++ ++ pmlmeext->sitesurvey_res.state = SCAN_TXNULL; ++ ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ ++ bdelayscan = _TRUE; ++ } ++#endif ++ if(bdelayscan) ++ { ++ //delay 50ms to protect nulldata(1). ++ set_survey_timer(pmlmeext, 50); ++ return H2C_SUCCESS; ++ } ++ } ++ ++ if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL)) ++ { ++#ifdef CONFIG_FIND_BEST_CHANNEL ++#if 0 ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ pmlmeext->channel_set[i].rx_count = 0; ++ } ++#endif ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ //disable dynamic functions, such as high power, DIG ++ Save_DM_Func_Flag(padapter); ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under scaning, need to write the BB registers ++ ++#ifdef CONFIG_P2P ++#ifdef CONFIG_IOCTL_CFG80211 ++ if((wdev_to_priv(padapter->rtw_wdev))->p2p_enabled == _TRUE && pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ write_initial_gain = 0; ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ if ( !rtw_p2p_chk_state( pwdinfo, P2P_STATE_NONE ) ) ++ initialgain = 0x28; ++ else ++#endif //CONFIG_P2P ++ initialgain = 0x17; ++ ++ if(write_initial_gain == 1) ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ //set MSR to no link state ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ val8 = 1; //under site survey ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ pmlmeext->sitesurvey_res.state = SCAN_PROCESS; ++ } ++ ++ site_survey(padapter); ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct setauth_parm *pparm = (struct setauth_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pparm->mode < 4) ++ { ++ pmlmeinfo->auth_algo = pparm->mode; ++ } ++ ++ return H2C_SUCCESS; ++} ++ ++u8 setkey_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ unsigned short ctrl; ++ struct setkey_parm *pparm = (struct setkey_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ ++ //main tx key for wep. ++ if(pparm->set_tx) ++ pmlmeinfo->key_index = pparm->keyid; ++ ++ //write cam ++ ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; ++ ++ write_cam(padapter, pparm->keyid, ctrl, null_sta, pparm->key); ++ ++ //allow multicast packets to driver ++ rtw_hal_set_hwreg(padapter, HW_VAR_ON_RCR_AM, null_addr); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ u16 ctrl=0; ++ u8 cam_id=0;//cam_entry ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++#endif //CONFIG_TDLS ++ ++ //cam_entry: ++ //0~3 for default key ++ ++ //for concurrent mode (ap+sta): ++ //default key is disable, using sw encrypt/decrypt ++ //cam_entry = 4 //for sta mode (macid=0) ++ //cam_entry(macid+3) = 5 ~ N//for ap mode (aid=1~N, macid=2 ~N) ++ ++ //for concurrent mode (sta+sta): ++ //default key is disable, using sw encrypt/decrypt ++ //cam_entry = 4 //mapping to macid=0 ++ //cam_entry = 5 //mapping to macid=2 ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ ++ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); ++ ++ if(psta && psta->mac_id==2) ++ { ++ cam_id = 5; ++ } ++ else ++ { ++ cam_id = 4; ++ } ++/* ++ if(padapter->iface_type > PRIMARY_IFACE) ++ { ++ cam_id = 5; ++ } ++ else ++ { ++ cam_id = 4; ++ } ++*/ ++ } ++#else ++ cam_id = 4; ++#endif ++ ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(pparm->algorithm == _NO_PRIVACY_) // clear cam entry ++ { ++ clear_cam_entry(padapter, pparm->id); ++ return H2C_SUCCESS_RSP; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, pparm->addr); ++ if(psta) ++ { ++ ctrl = (BIT(15) | ((pparm->algorithm) << 2)); ++ ++ DBG_871X("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm); ++ ++ if((psta->mac_id<1) || (psta->mac_id>(NUM_STA-4))) ++ { ++ DBG_871X("r871x_set_stakey_hdl():set_stakey failed, mac_id(aid)=%d\n", psta->mac_id); ++ return H2C_REJECTED; ++ } ++ ++ cam_id = (psta->mac_id + 3);//0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++ DBG_871X("Write CAM, mac_addr=%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0], ++ pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4], ++ pparm->addr[5], cam_id); ++ ++ write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); ++ ++ return H2C_SUCCESS_RSP; ++ ++ } ++ else ++ { ++ DBG_871X("r871x_set_stakey_hdl(): sta has been free\n"); ++ return H2C_REJECTED; ++ } ++ ++ } ++ ++ //below for sta mode ++ ++ if(pparm->algorithm == _NO_PRIVACY_) // clear cam entry ++ { ++ clear_cam_entry(padapter, pparm->id); ++ return H2C_SUCCESS; ++ } ++ ++ ctrl = BIT(15) | ((pparm->algorithm) << 2); ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->clear_cam!=0){ ++ clear_cam_entry(padapter, ptdlsinfo->clear_cam); ++ ptdlsinfo->clear_cam=0; ++ ++ return H2C_SUCCESS; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, pparm->addr);//Get TDLS Peer STA ++ if( psta->tdls_sta_state&TDLS_LINKED_STATE ){ ++ write_cam(padapter, psta->mac_id, ctrl, pparm->addr, pparm->key); ++ } ++ else ++#endif //CONFIG_TDLS ++ write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); ++ ++ pmlmeinfo->enc_algo = pparm->algorithm; ++ ++ return H2C_SUCCESS; ++} ++ ++u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); ++ ++ if(!psta) ++ return H2C_SUCCESS; ++ ++ ++ if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || ++ ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pmlmeinfo->ADDBA_retry_count = 0; ++ //pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); ++ //psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); ++ issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); ++ //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ } ++#ifdef CONFIG_TDLS ++ else if((psta->tdls_sta_state & TDLS_LINKED_STATE)&& ++ (psta->htpriv.ht_option==_TRUE) && ++ (psta->htpriv.ampdu_enable==_TRUE) ) ++ { ++ issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); ++ //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ } ++#endif //CONFIG ++ else ++ { ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); ++ } ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_tx_beacon_cmd(_adapter* padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct Tx_Beacon_param *ptxBeacon_parm; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 res = _SUCCESS; ++ int len_diff = 0; ++ ++_func_enter_; ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ res= _FAIL; ++ goto exit; ++ } ++ ++ if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); ++ ++ len_diff = update_hidden_ssid( ++ ptxBeacon_parm->network.IEs+_BEACON_IE_OFFSET_ ++ , ptxBeacon_parm->network.IELength-_BEACON_IE_OFFSET_ ++ , pmlmeinfo->hidden_ssid_mode ++ ); ++ ptxBeacon_parm->network.IELength += len_diff; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++ ++u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ u8 evt_code, evt_seq; ++ u16 evt_sz; ++ uint *peventbuf; ++ void (*event_callback)(_adapter *dev, u8 *pbuf); ++ struct evt_priv *pevt_priv = &(padapter->evtpriv); ++ ++ peventbuf = (uint*)pbuf; ++ evt_sz = (u16)(*peventbuf&0xffff); ++ evt_seq = (u8)((*peventbuf>>24)&0x7f); ++ evt_code = (u8)((*peventbuf>>16)&0xff); ++ ++ ++ #ifdef CHECK_EVENT_SEQ ++ // checking event sequence... ++ if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) ) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f))); ++ ++ pevt_priv->event_seq = (evt_seq+1)&0x7f; ++ ++ goto _abort_event_; ++ } ++ #endif ++ ++ // checking if event code is valid ++ if (evt_code >= MAX_C2HEVT) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code)); ++ goto _abort_event_; ++ } ++ ++ // checking if event size match the event parm size ++ if ((wlanevents[evt_code].parmsize != 0) && ++ (wlanevents[evt_code].parmsize != evt_sz)) ++ { ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", ++ evt_code, wlanevents[evt_code].parmsize, evt_sz)); ++ goto _abort_event_; ++ ++ } ++ ++ ATOMIC_INC(&pevt_priv->event_seq); ++ ++ peventbuf += 2; ++ ++ if(peventbuf) ++ { ++ event_callback = wlanevents[evt_code].event_callback; ++ event_callback(padapter, (u8*)peventbuf); ++ ++ pevt_priv->evt_done_cnt++; ++ } ++ ++ ++_abort_event_: ++ ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ return H2C_SUCCESS; ++} ++ ++u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ return H2C_PARAMETERS_ERROR; ++ } ++#ifdef CONFIG_AP_MODE ++ else //tx bc/mc frames after update TIM ++ { ++ _irqL irqL; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return H2C_SUCCESS; ++ ++ if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0)) ++ { ++#ifndef CONFIG_PCI_HCI ++ rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows ++#endif ++ //_enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ if(psta_bmc->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered=1; ++ ++ pxmitframe->attrib.qsel = 0x11;//HIQ ++ ++#if 0 ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++#endif ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ //pstapriv->tim_bitmap &= ~BIT(0); ++ ++ } ++ ++ //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ } ++ ++ } ++#endif ++ ++ return H2C_SUCCESS; ++ ++} ++ ++void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork) ++{ ++ u8 network_type,rate_len, total_rate_len,remainder_rate_len; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 erpinfo=0x4; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(pmlmeext->cur_channel >= 36) ++ { ++ network_type = WIRELESS_11A; ++ total_rate_len = IEEE80211_NUM_OFDM_RATESLEN; ++ DBG_871X("%s(): change to 5G Band\n",__FUNCTION__); ++ rtw_remove_bcn_ie(padapter, pnetwork, _ERPINFO_IE_); ++ } ++ else ++ { ++ network_type = WIRELESS_11BG; ++ total_rate_len = IEEE80211_CCK_RATE_LEN+IEEE80211_NUM_OFDM_RATESLEN; ++ DBG_871X("%s(): change to 2.4G Band\n",__FUNCTION__); ++ rtw_add_bcn_ie(padapter, pnetwork, _ERPINFO_IE_, &erpinfo, 1); ++ } ++ ++ rtw_set_supported_rate(pnetwork->SupportedRates, network_type); ++ ++ UpdateBrateTbl(padapter, pnetwork->SupportedRates); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ if(total_rate_len > 8) ++ { ++ rate_len = 8; ++ remainder_rate_len = total_rate_len - 8; ++ } ++ else ++ { ++ rate_len = total_rate_len; ++ remainder_rate_len = 0; ++ } ++ ++ rtw_add_bcn_ie(padapter, pnetwork, _SUPPORTEDRATES_IE_, pnetwork->SupportedRates, rate_len); ++ ++ if(remainder_rate_len) ++ { ++ rtw_add_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_, (pnetwork->SupportedRates+8), remainder_rate_len); ++ } ++ else ++ { ++ rtw_remove_bcn_ie(padapter, pnetwork, _EXT_SUPPORTEDRATES_IE_); ++ } ++} ++ ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++void dc_SelectChannel(_adapter *padapter, unsigned char channel) ++{ ++ PADAPTER ptarget_adapter; ++ ++ if( (padapter->pbuddy_adapter != NULL) && ++ (padapter->DualMacConcurrent == _TRUE) && ++ (padapter->adapter_type == SECONDARY_ADAPTER)) ++ { ++ // only mac0 could control BB&RF ++ ptarget_adapter = padapter->pbuddy_adapter; ++ } ++ else ++ { ++ ptarget_adapter = padapter; ++ } ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); ++ ++ rtw_hal_set_chan(ptarget_adapter, channel); ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setch_mutex), NULL); ++} ++ ++void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) ++{ ++ PADAPTER ptarget_adapter; ++ ++ if( (padapter->pbuddy_adapter != NULL) && ++ (padapter->DualMacConcurrent == _TRUE) && ++ (padapter->adapter_type == SECONDARY_ADAPTER)) ++ { ++ // only mac0 could control BB&RF ++ ptarget_adapter = padapter->pbuddy_adapter; ++ } ++ else ++ { ++ ptarget_adapter = padapter; ++ } ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); ++ ++ rtw_hal_set_bwmode(ptarget_adapter, (HT_CHANNEL_WIDTH)bwmode, channel_offset); ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(ptarget_adapter)->setbw_mutex), NULL); ++} ++ ++void dc_set_channel_bwmode_disconnect(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ if((check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) != _TRUE) ++ { ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ } ++ else ++ { ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++} ++ ++u8 dc_handle_join_request(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ u8 ret = _SUCCESS; ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ ++ if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel || ++ pmlmeext->cur_bwmode != pbuddy_mlmeext->cur_bwmode || ++ pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) ++ { ++ if((check_fwstate(pbuddy_mlmepriv, WIFI_AP_STATE)) == _TRUE) ++ { ++ //issue deauth to all stas if if2 is at ap mode ++ rtw_sta_flush(pbuddy_adapter); ++ ++ //rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_CHECK_TXBUF, 0); ++ } ++ else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE) ++ { ++ if(pmlmeext->cur_channel == pbuddy_mlmeext->cur_channel) ++ { ++ // HT_CHANNEL_WIDTH_40 or HT_CHANNEL_WIDTH_20 but channel offset is different ++ if((pmlmeext->cur_bwmode == pbuddy_mlmeext->cur_bwmode) && ++ (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset) ) ++ { ++ report_join_res(padapter, -4); ++ ret = _FAIL; ++ } ++ } ++ else ++ { ++ report_join_res(padapter, -4); ++ ret = _FAIL; ++ } ++ } ++ } ++ else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) ++ { ++ issue_nulldata(pbuddy_adapter, NULL, 1, 0, 0); ++ } ++ } ++ ++ return ret; ++} ++ ++void dc_handle_join_done(_adapter *padapter, u8 join_res) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++ struct mlme_ext_info *pbuddy_mlmeinfo = NULL; ++ WLAN_BSSID_EX *pbuddy_network_mlmeext = NULL; ++ u8 change_band = _FALSE; ++ ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); ++ pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); ++ ++ if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) ++ { ++ //restart and update beacon ++ DBG_871X("after join, current adapter, CH=%d, BW=%d, offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ ++ if(join_res >= 0) ++ { ++ u8 *p; ++ int ie_len; ++ struct HT_info_element *pht_info=NULL; ++ ++ if((pbuddy_mlmeext->cur_channel <= 14 && pmlmeext->cur_channel >= 36) || ++ (pbuddy_mlmeext->cur_channel >= 36 && pmlmeext->cur_channel <= 14)) ++ { ++ change_band = _TRUE; ++ } ++ ++ //sync channel/bwmode/ch_offset with another adapter ++ pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; ++ ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ pht_info->infos[0] &= ~(BIT(0)|BIT(1)); //no secondary channel is present ++ } ++ ++ if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; ++ ++ //to update cur_ch_offset value in beacon ++ if( pht_info ) ++ { ++ switch(pmlmeext->cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pht_info->infos[0] |= 0x1; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pht_info->infos[0] |= 0x3; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ } ++ } ++ else if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) ++ { ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if(pmlmeext->cur_channel>0 && pmlmeext->cur_channel<5) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x1; ++ ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ } ++ ++ if(pmlmeext->cur_channel>7 && pmlmeext->cur_channel<(14+1)) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x3; ++ ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ } ++ ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ } ++ } ++ ++ // to update channel value in beacon ++ pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if(p && ie_len>0) ++ *(p + 2) = pmlmeext->cur_channel; ++ ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ pht_info->primary_channel = pmlmeext->cur_channel; ++ } ++ ++ // update mlmepriv's cur_network ++ _rtw_memcpy(&pbuddy_mlmepriv->cur_network.network, pbuddy_network_mlmeext, pbuddy_network_mlmeext->Length); ++ } ++ else ++ { ++ // switch back to original channel/bwmode/ch_offset; ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ } ++ ++ DBG_871X("after join, another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ ++ if(change_band == _TRUE) ++ change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); ++ ++ DBG_871X("update pbuddy_adapter's beacon\n"); ++ ++ update_beacon(pbuddy_adapter, 0, NULL, _TRUE); ++ } ++ else if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) ++ { ++ if((pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) && ++ (pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20)) ++ { ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ } ++ ++ issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); ++ } ++ } ++} ++ ++sint dc_check_fwstate(_adapter *padapter, sint fw_state) ++{ ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ ++ if(padapter->pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ ++ return check_fwstate(pbuddy_mlmepriv, fw_state); ++ } ++ ++ return _FALSE; ++} ++ ++u8 dc_handle_site_survey(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ ++ // only mac0 can do scan request, help issue nulldata(1) for mac1 ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) ++ { ++ pmlmeext->sitesurvey_res.state = SCAN_TXNULL; ++ ++ issue_nulldata(pbuddy_adapter, NULL, 1, 2, 0); ++ ++ return _TRUE; ++ } ++ } ++ ++ return _FALSE; ++} ++ ++void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ if(padapter->pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ report_survey_event(padapter->pbuddy_adapter, precv_frame); ++ } ++} ++ ++void dc_set_channel_bwmode_survey_done(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++ struct mlme_ext_info *pbuddy_mlmeinfo = NULL; ++ u8 cur_channel; ++ u8 cur_bwmode; ++ u8 cur_ch_offset; ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); ++ ++ if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED) && ++ (pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40)) ++ { ++ cur_channel = pmlmeext->cur_channel; ++ cur_bwmode = pmlmeext->cur_bwmode; ++ cur_ch_offset = pmlmeext->cur_ch_offset; ++ } ++ else ++ { ++ cur_channel = pbuddy_mlmeext->cur_channel; ++ cur_bwmode = pbuddy_mlmeext->cur_bwmode; ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ } ++ } ++ else ++ { ++ cur_channel = pmlmeext->cur_channel; ++ cur_bwmode = pmlmeext->cur_bwmode; ++ cur_ch_offset = pmlmeext->cur_ch_offset; ++ } ++ ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ ++ if (is_client_associated_to_ap(pbuddy_adapter) == _TRUE) ++ { ++ //issue null data ++ issue_nulldata(pbuddy_adapter, NULL, 0, 0, 0); ++ } ++ ++ if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) ++ { ++ ++ DBG_871X("survey done, current CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ DBG_871X("restart pbuddy_adapter's beacon\n"); ++ ++ update_beacon(pbuddy_adapter, 0, NULL, _TRUE); ++ } ++ } ++ else ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++} ++ ++void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode) ++{ ++ u8 *p; ++ u8 val8, cur_channel, cur_bwmode, cur_ch_offset, change_band; ++ int ie_len; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct HT_info_element *pht_info=NULL; ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++ ++ DBG_871X("dualmac_concurrent_ap_set_channel_bwmode ==>\n"); ++ ++ cur_channel = channel; ++ cur_bwmode = bwmode; ++ cur_ch_offset = channel_offset; ++ change_band = _FALSE; ++ ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ } ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ if(!check_fwstate(pbuddy_mlmepriv, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED)==_TRUE) ++ { ++ //To sync cur_channel/cur_bwmode/cur_ch_offset with another adapter ++ DBG_871X("Another iface is at linked state, sync cur_channel/cur_bwmode/cur_ch_offset\n"); ++ DBG_871X("Another adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ DBG_871X("Current adapter, CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ cur_channel = pbuddy_mlmeext->cur_channel; ++ if(cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ if(pht_info) ++ pht_info->infos[0] &= ~(BIT(0)|BIT(1)); ++ ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ ++ //to update cur_ch_offset value in beacon ++ if(pht_info) ++ { ++ switch(cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pht_info->infos[0] |= 0x1; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pht_info->infos[0] |= 0x3; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ } ++ } ++ else if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) ++ { ++ cur_bwmode = HT_CHANNEL_WIDTH_20; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if(cur_channel>0 && cur_channel<5) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x1; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ } ++ ++ if(cur_channel>7 && cur_channel<(14+1)) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x3; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ } ++ ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ } ++ ++ // to update channel value in beacon ++ pnetwork->Configuration.DSConfig = cur_channel; ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if(p && ie_len>0) ++ *(p + 2) = cur_channel; ++ ++ if(pht_info) ++ pht_info->primary_channel = cur_channel; ++ } ++ } ++ else ++ { ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ ++ DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ if((channel <= 14 && cur_channel >= 36) || ++ (channel >= 36 && cur_channel <= 14)) ++ { ++ change_band = _TRUE; ++ } ++ ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++ ++ if(change_band == _TRUE) ++ change_band_update_ie(padapter, pnetwork); ++ ++ DBG_871X("dualmac_concurrent_ap_set_channel_bwmode <==\n"); ++} ++ ++void dc_resume_xmit(_adapter *padapter) ++{ ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ DBG_871X("dc_resume_xmit, resume pbuddy_adapter Tx\n"); ++ rtw_os_xmit_schedule(pbuddy_adapter); ++ } ++} ++ ++u8 dc_check_xmit(_adapter *padapter) ++{ ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ ++ if(pbuddy_adapter != NULL && ++ padapter->DualMacConcurrent == _TRUE) ++ { ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_871X("dc_check_xmit pbuddy_adapter is under survey or under linking\n"); ++ return _FALSE; ++ } ++ } ++ ++ return _TRUE; ++} ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state) ++{ ++ PADAPTER pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext; ++ struct mlme_ext_info *pbuddy_mlmeinfo; ++ ++ if(padapter == NULL) ++ return _FALSE; ++ ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ ++ if(pbuddy_adapter == NULL) ++ return _FALSE; ++ ++ ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); ++ ++ if((pbuddy_mlmeinfo->state&0x03) == state) ++ return _TRUE; ++ ++ return _FALSE; ++ ++} ++ ++void concurrent_chk_joinbss_done(_adapter *padapter, int join_res) ++{ ++ struct mlme_ext_priv *pmlmeext; ++ struct mlme_ext_info *pmlmeinfo; ++ PADAPTER pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext; ++ struct mlme_ext_info *pbuddy_mlmeinfo; ++ WLAN_BSSID_EX *pbuddy_network_mlmeext; ++ ++ pmlmeext = &padapter->mlmeextpriv; ++ pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if(!rtw_buddy_adapter_up(padapter)) ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ return; ++ } ++ ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_mlmeinfo = &(pbuddy_mlmeext->mlmext_info); ++ pbuddy_network_mlmeext = &(pbuddy_mlmeinfo->network); ++ ++ if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) && ++ check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) ++ { ++ //restart and update beacon ++ ++ DBG_871X("after join,primary adapter, CH=%d, BW=%d, offset=%d\n" ++ , pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ ++ ++ if(join_res >= 0) ++ { ++ u8 *p; ++ int ie_len; ++ u8 change_band = _FALSE; ++ struct HT_info_element *pht_info=NULL; ++ ++ if((pmlmeext->cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || ++ (pmlmeext->cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) ++ change_band = _TRUE; ++ ++ //sync channel/bwmode/ch_offset with primary adapter ++ pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ pht_info->infos[0] &= ~(BIT(0)|BIT(1)); //no secondary channel is present ++ } ++ ++ if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ pbuddy_mlmeext->cur_ch_offset = pmlmeext->cur_ch_offset; ++ ++ //to update cur_ch_offset value in beacon ++ if( pht_info ) ++ { ++ switch(pmlmeext->cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pht_info->infos[0] |= 0x1; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pht_info->infos[0] |= 0x3; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ ++ } ++ ++ } ++ else if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) ++ { ++ if(pmlmeext->cur_channel>=1 && pmlmeext->cur_channel<=4) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; ++ ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ } ++ else if(pmlmeext->cur_channel>=5 && pmlmeext->cur_channel<=14) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; ++ ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ } ++ else ++ { ++ switch(pmlmeext->cur_channel) ++ { ++ case 36: ++ case 44: ++ case 52: ++ case 60: ++ case 100: ++ case 108: ++ case 116: ++ case 124: ++ case 132: ++ case 149: ++ case 157: ++ { ++ if(pht_info) ++ pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE; ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ } ++ case 40: ++ case 48: ++ case 56: ++ case 64: ++ case 104: ++ case 112: ++ case 120: ++ case 128: ++ case 136: ++ case 153: ++ case 161: ++ { ++ if(pht_info) ++ pht_info->infos[0] |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; ++ ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ } ++ default: ++ if(pht_info) ++ pht_info->infos[0] &= ~HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW; ++ pbuddy_mlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pbuddy_mlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ ++ } ++ ++ } ++ ++ } ++ ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ } ++ else ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ ++ ++ // to update channel value in beacon ++ pbuddy_network_mlmeext->Configuration.DSConfig = pmlmeext->cur_channel; ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if(p && ie_len>0) ++ *(p + 2) = pmlmeext->cur_channel; ++ ++ p = rtw_get_ie((pbuddy_network_mlmeext->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pbuddy_network_mlmeext->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ pht_info->primary_channel = pmlmeext->cur_channel; ++ } ++ ++ //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE ++ if(change_band == _TRUE) ++ change_band_update_ie(pbuddy_adapter, pbuddy_network_mlmeext); ++ } ++ else ++ { ++ // switch back to original channel/bwmode/ch_offset; ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ } ++ ++ DBG_871X("after join, second adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ ++ DBG_871X("update pbuddy_adapter's beacon\n"); ++ ++ update_beacon(pbuddy_adapter, 0, NULL, _TRUE); ++ ++ } ++ else if(((pbuddy_mlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && ++ check_fwstate(pbuddy_mlmepriv, _FW_LINKED)) ++ { ++ if(join_res >= 0) ++ { ++ pbuddy_mlmeext->cur_channel = pmlmeext->cur_channel; ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ else if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ else ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ { ++ // switch back to original channel/bwmode/ch_offset; ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ } ++ } ++ else ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ ++} ++#endif //CONFIG_CONCURRENT_MODE ++ ++int rtw_chk_start_clnt_join(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ unsigned char cur_ch = pmlmeext->cur_channel; ++ unsigned char cur_bw = pmlmeext->cur_bwmode; ++ unsigned char cur_ch_offset = pmlmeext->cur_ch_offset; ++ bool chbw_allow = _TRUE; ++ bool connect_allow = _TRUE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext; ++ struct mlme_ext_info *pbuddy_pmlmeinfo; ++ struct mlme_priv *pbuddy_mlmepriv; ++ ++ if (!rtw_buddy_adapter_up(padapter)) { ++ goto start_join_set_ch_bw; ++ } ++ ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ pbuddy_pmlmeinfo = &(pbuddy_mlmeext->mlmext_info); ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ ++ if((pbuddy_pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)//for AP MODE ++ { ++ DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" ++ ", "ADPT_FMT" AP mode(ch=%d, bw=%d, ch_offset=%d)\n", ++ ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ++ ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ ++ if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) ++ { ++ chbw_allow = _FALSE; ++ } ++ else if((pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) && ++ (pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) && ++ (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) ++ { ++ chbw_allow = _FALSE; ++ } ++ else if((pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) && ++ (pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40)) ++ { ++ cur_ch = pmlmeext->cur_channel; ++ cur_bw = pbuddy_mlmeext->cur_bwmode; ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ } ++ ++ DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); ++ if (chbw_allow == _FALSE) { ++ #ifdef CONFIG_SPCT_CH_SWITCH ++ if (1) { ++ rtw_ap_inform_ch_switch(pbuddy_adapter, pmlmeext->cur_channel , pmlmeext->cur_ch_offset); ++ } else ++ #endif ++ { ++ //issue deauth to all stas if if2 is at ap mode ++ rtw_sta_flush(pbuddy_adapter); ++ } ++ rtw_hal_set_hwreg(padapter, HW_VAR_CHECK_TXBUF, 0); ++ } ++ } ++ else if(check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE && ++ check_fwstate(pbuddy_mlmepriv, WIFI_STATION_STATE) == _TRUE) //for Client Mode/p2p client ++ { ++ DBG_871X("start_clnt_join: "ADPT_FMT"(ch=%d, bw=%d, ch_offset=%d)" ++ ", "ADPT_FMT" STA mode(ch=%d, bw=%d, ch_offset=%d)\n", ++ ADPT_ARG(padapter), pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ++ ADPT_ARG(pbuddy_adapter), pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ ++ if(pmlmeext->cur_channel != pbuddy_mlmeext->cur_channel) ++ { ++ chbw_allow = _FALSE; ++ } ++ else if((pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) && ++ (pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40)) ++ { ++ cur_bw = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ } ++ else if((pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) && ++ (pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) && ++ (pmlmeext->cur_ch_offset != pbuddy_mlmeext->cur_ch_offset)) ++ { ++ chbw_allow = _FALSE; ++ } ++ ++ connect_allow = chbw_allow; ++ ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) ++ /* wlan0-sta mode has higher priority than p2p0-p2p client */ ++ if (!rtw_p2p_chk_state(&(pbuddy_adapter->wdinfo), P2P_STATE_NONE) ++ && pbuddy_adapter->wdinfo.driver_interface == DRIVER_CFG80211) ++ { ++ connect_allow = _TRUE; ++ } ++ #endif /* CONFIG_P2P && CONFIG_IOCTL_CFG80211 */ ++ ++ DBG_871X("start_clnt_join: connect_allow:%d, chbw_allow:%d\n", connect_allow, chbw_allow); ++ if (connect_allow == _TRUE && chbw_allow == _FALSE) { ++ /* disconnect buddy's connection */ ++ rtw_disassoc_cmd(pbuddy_adapter, 500, _FALSE); ++ rtw_indicate_disconnect(pbuddy_adapter); ++ rtw_free_assoc_resources(pbuddy_adapter, 1); ++ } ++ } ++ ++start_join_set_ch_bw: ++#endif /* CONFIG_CONCURRENT_MODE */ ++ ++ if (connect_allow == _TRUE) { ++ DBG_871X("start_join_set_ch_bw: ch=%d, bwmode=%d, ch_offset=%d\n", cur_ch, cur_bw, cur_ch_offset); ++ set_channel_bwmode(padapter, cur_ch, cur_ch_offset, cur_bw); ++ } ++ ++ return connect_allow == _TRUE ? _SUCCESS : _FAIL; ++} ++ ++/* Find union about ch, bw, ch_offset of all linked interfaces */ ++int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset) ++{ ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ _adapter *iface; ++ struct mlme_ext_priv *mlmeext; ++ int i; ++ u8 ch_ret = 0; ++ u8 bw_ret = HT_CHANNEL_WIDTH_20; ++ u8 offset_ret = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ int num = 0; ++ ++ if (ch) *ch = 0; ++ if (bw) *bw = HT_CHANNEL_WIDTH_20; ++ if (offset) *offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ for (i = 0; iiface_nums; i++) { ++ iface = dvobj->padapters[i]; ++ mlmeext = &iface->mlmeextpriv; ++ ++ if (!check_fwstate(&iface->mlmepriv, _FW_LINKED)) ++ continue; ++ ++ if (num == 0) { ++ ch_ret = mlmeext->cur_channel; ++ bw_ret = mlmeext->cur_bwmode; ++ offset_ret = mlmeext->cur_ch_offset; ++ num++; ++ continue; ++ } ++ ++ if (ch_ret != mlmeext->cur_channel) { ++ num = 0; ++ break; ++ } ++ ++ if (bw_ret < mlmeext->cur_bwmode) { ++ bw_ret = mlmeext->cur_bwmode; ++ offset_ret = mlmeext->cur_ch_offset; ++ } else if (bw_ret == mlmeext->cur_bwmode && offset_ret != mlmeext->cur_ch_offset) { ++ num = 0; ++ break; ++ } ++ ++ num++; ++ } ++ ++ if (num) { ++ if (ch) *ch = ch_ret; ++ if (bw) *bw = bw_ret; ++ if (offset) *offset = offset_ret; ++ } ++ ++ return num; ++} ++ ++u8 set_ch_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ struct set_ch_parm *set_ch_parm; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ set_ch_parm = (struct set_ch_parm *)pbuf; ++ ++ DBG_871X(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), ++ set_ch_parm->ch, set_ch_parm->bw, set_ch_parm->ch_offset); ++ ++ pmlmeext->cur_channel = set_ch_parm->ch; ++ pmlmeext->cur_ch_offset = set_ch_parm->ch_offset; ++ pmlmeext->cur_bwmode = set_ch_parm->bw; ++ ++ set_channel_bwmode(padapter, set_ch_parm->ch, set_ch_parm->ch_offset, set_ch_parm->bw); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct SetChannelPlan_param *setChannelPlan_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ setChannelPlan_param = (struct SetChannelPlan_param *)pbuf; ++ ++ pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); ++ init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct LedBlink_param *ledBlink_param; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ ledBlink_param = (struct LedBlink_param *)pbuf; ++ ++ #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ BlinkHandler(ledBlink_param->pLed); ++ #endif ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++#ifdef CONFIG_DFS ++ struct SetChannelSwitch_param *setChannelSwitch_param; ++ struct SetChannelPlan_param *setChannelPlan_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 new_ch_no; ++ u8 gval8 = 0x00, sval8 = 0xff; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf; ++ new_ch_no = setChannelSwitch_param->new_ch_no; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &sval8); ++ ++ DBG_871X("DFS detected! Swiching channel to %d!\n", new_ch_no); ++ SelectChannel(padapter, new_ch_no); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TXPAUSE, &gval8); ++ ++ rtw_free_network_queue(padapter, _TRUE); ++ rtw_indicate_disconnect(padapter); ++ ++ if ( ((new_ch_no >= 52) && (new_ch_no <= 64)) ||((new_ch_no >= 100) && (new_ch_no <= 140)) ) { ++ DBG_871X("Switched to DFS band (ch %02x) again!!\n", new_ch_no); ++ } ++ ++ return H2C_SUCCESS; ++#else ++ return H2C_REJECTED; ++#endif //CONFIG_DFS ++ ++} ++ ++// TDLS_WRCR : write RCR DATA BIT ++// TDLS_SD_PTI : issue peer traffic indication ++// TDLS_CS_OFF : go back to the channel linked with AP, terminating channel switch procedure ++// TDLS_INIT_CH_SEN : init channel sensing, receive all data and mgnt frame ++// TDLS_DONE_CH_SEN: channel sensing and report candidate channel ++// TDLS_OFF_CH : first time set channel to off channel ++// TDLS_BASE_CH : go back tp the channel linked with AP when set base channel as target channel ++// TDLS_P_OFF_CH : periodically go to off channel ++// TDLS_P_BASE_CH : periodically go back to base channel ++// TDLS_RS_RCR : restore RCR ++// TDLS_CKALV_PH1 : check alive timer phase1 ++// TDLS_CKALV_PH2 : check alive timer phase2 ++// TDLS_FREE_STA : free tdls sta ++u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++#ifdef CONFIG_TDLS ++ _irqL irqL; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct TDLSoption_param *TDLSoption; ++ struct sta_info *ptdls_sta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 survey_channel, i, min, option; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ TDLSoption = (struct TDLSoption_param *)pbuf; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), TDLSoption->addr ); ++ option = TDLSoption->option; ++ ++ if( ptdls_sta == NULL ) ++ { ++ if( option != TDLS_RS_RCR ) ++ return H2C_REJECTED; ++ } ++ ++ //_enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ DBG_871X("[%s] option:%d\n", __FUNCTION__, option); ++ ++ switch(option){ ++ case TDLS_WRCR: ++ //As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 ++ //such we can receive all kinds of data frames. ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_WRCR, 0); ++ DBG_871X("TDLS with "MAC_FMT"\n", MAC_ARG(ptdls_sta->hwaddr)); ++ ++ pmlmeinfo->FW_sta_info[ptdls_sta->mac_id].psta = ptdls_sta; ++ //set TDLS sta rate. ++ set_sta_rate(padapter, ptdls_sta); ++ break; ++ case TDLS_SD_PTI: ++ issue_tdls_peer_traffic_indication(padapter, ptdls_sta); ++ break; ++ case TDLS_CS_OFF: ++ _cancel_timer_ex(&ptdls_sta->base_ch_timer); ++ _cancel_timer_ex(&ptdls_sta->off_ch_timer); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE | ++ TDLS_AT_OFF_CH_STATE); ++ DBG_871X("go back to base channel\n "); ++ issue_nulldata(padapter, NULL, 0, 0, 0); ++ break; ++ case TDLS_INIT_CH_SEN: ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_INIT_CH_SEN, 0); ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ ptdls_sta->option = TDLS_DONE_CH_SEN; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); ++ break; ++ case TDLS_DONE_CH_SEN: ++ survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; ++ if(survey_channel){ ++ SelectChannel(padapter, survey_channel); ++ ptdlsinfo->cur_channel = survey_channel; ++ pmlmeext->sitesurvey_res.channel_idx++; ++ _set_timer(&ptdls_sta->option_timer, SURVEY_TO); ++ }else{ ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_DONE_CH_SEN, 0); ++ ++ if(ptdlsinfo->ch_sensing==1){ ++ ptdlsinfo->ch_sensing=0; ++ ptdlsinfo->cur_channel=1; ++ min=ptdlsinfo->collect_pkt_num[0]; ++ for(i=1; i ptdlsinfo->collect_pkt_num[i]){ ++ ptdlsinfo->cur_channel=i+1; ++ min=ptdlsinfo->collect_pkt_num[i]; ++ } ++ ptdlsinfo->collect_pkt_num[i]=0; ++ } ++ ptdlsinfo->collect_pkt_num[0]=0; ++ ptdlsinfo->candidate_ch=ptdlsinfo->cur_channel; ++ DBG_871X("TDLS channel sensing done, candidate channel: %02x\n", ptdlsinfo->candidate_ch); ++ ptdlsinfo->cur_channel=0; ++ ++ } ++ ++ if(ptdls_sta->tdls_sta_state & TDLS_PEER_SLEEP_STATE){ ++ ptdls_sta->tdls_sta_state |= TDLS_APSD_CHSW_STATE; ++ }else{ ++ //send null data with pwrbit==1 before send ch_switching_req to peer STA. ++ issue_nulldata(padapter, NULL, 1, 0, 0); ++ ++ ptdls_sta->tdls_sta_state |= TDLS_CH_SW_INITIATOR_STATE; ++ ++ issue_tdls_ch_switch_req(padapter, ptdls_sta->hwaddr); ++ DBG_871X("issue tdls ch switch req\n"); ++ } ++ } ++ break; ++ case TDLS_OFF_CH: ++ issue_nulldata(padapter, NULL, 1, 0, 0); ++ SelectChannel(padapter, ptdls_sta->off_ch); ++ ++ DBG_871X("change channel to tar ch:%02x\n", ptdls_sta->off_ch); ++ ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; ++ ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE); ++ _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); ++ break; ++ case TDLS_BASE_CH: ++ _cancel_timer_ex(&ptdls_sta->base_ch_timer); ++ _cancel_timer_ex(&ptdls_sta->off_ch_timer); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE | ++ TDLS_AT_OFF_CH_STATE); ++ DBG_871X("go back to base channel\n "); ++ issue_nulldata(padapter, NULL, 0, 0, 0); ++ _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); ++ break; ++ case TDLS_P_OFF_CH: ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ issue_nulldata(padapter, NULL, 0, 0, 0); ++ DBG_871X("change channel to base ch:%02x\n", pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE| TDLS_AT_OFF_CH_STATE); ++ _set_timer(&ptdls_sta->off_ch_timer, TDLS_STAY_TIME); ++ break; ++ case TDLS_P_BASE_CH: ++ issue_nulldata(ptdls_sta->padapter, NULL, 1, 0, 0); ++ SelectChannel(padapter, ptdls_sta->off_ch); ++ DBG_871X("change channel to off ch:%02x\n", ptdls_sta->off_ch); ++ ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; ++ if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0); ++ } ++ _set_timer(&ptdls_sta->base_ch_timer, TDLS_STAY_TIME); ++ break; ++ case TDLS_RS_RCR: ++ rtw_hal_set_hwreg(padapter, HW_VAR_TDLS_RS_RCR, 0); ++ DBG_871X("wirte REG_RCR, set bit6 on\n"); ++ break; ++ case TDLS_CKALV_PH1: ++ _set_timer(&ptdls_sta->alive_timer2, TDLS_ALIVE_TIMER_PH2); ++ break; ++ case TDLS_CKALV_PH2: ++ _set_timer(&ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++ break; ++ case TDLS_FREE_STA: ++ free_tdls_sta(padapter, ptdls_sta); ++ break; ++ ++ } ++ ++ //_exit_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ++ return H2C_SUCCESS; ++#else ++ return H2C_REJECTED; ++#endif //CONFIG_TDLS ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_mp.c +@@ -0,0 +1,1324 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MP_C_ ++ ++#include ++ ++#ifdef PLATFORM_FREEBSD ++#include /* for RFHIGHPID */ ++#endif ++ ++#ifdef CONFIG_RTL8712 ++#include ++#endif ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++#ifdef CONFIG_RTL8723A ++#include ++#endif ++ ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++u32 read_macreg(_adapter *padapter, u32 addr, u32 sz) ++{ ++ u32 val = 0; ++ ++ switch(sz) ++ { ++ case 1: ++ val = rtw_read8(padapter, addr); ++ break; ++ case 2: ++ val = rtw_read16(padapter, addr); ++ break; ++ case 4: ++ val = rtw_read32(padapter, addr); ++ break; ++ default: ++ val = 0xffffffff; ++ break; ++ } ++ ++ return val; ++ ++} ++ ++void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz) ++{ ++ switch(sz) ++ { ++ case 1: ++ rtw_write8(padapter, addr, (u8)val); ++ break; ++ case 2: ++ rtw_write16(padapter, addr, (u16)val); ++ break; ++ case 4: ++ rtw_write32(padapter, addr, val); ++ break; ++ default: ++ break; ++ } ++ ++} ++ ++u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask) ++{ ++ return rtw_hal_read_bbreg(padapter, addr, bitmask); ++} ++ ++void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val) ++{ ++ rtw_hal_write_bbreg(padapter, addr, bitmask, val); ++} ++ ++u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask) ++{ ++ return rtw_hal_read_rfreg(padapter, (RF_RADIO_PATH_E)rfpath, addr, bitmask); ++} ++ ++void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val) ++{ ++ rtw_hal_write_rfreg(padapter, (RF_RADIO_PATH_E)rfpath, addr, bitmask, val); ++} ++ ++u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr) ++{ ++ return _read_rfreg(padapter, (RF_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask); ++} ++ ++void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val) ++{ ++ _write_rfreg(padapter, (RF_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask, val); ++} ++ ++static void _init_mp_priv_(struct mp_priv *pmp_priv) ++{ ++ WLAN_BSSID_EX *pnetwork; ++ ++ _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv)); ++ ++ pmp_priv->mode = MP_OFF; ++ ++ pmp_priv->channel = 1; ++ pmp_priv->bandwidth = HT_CHANNEL_WIDTH_20; ++ pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmp_priv->rateidx = MPT_RATE_1M; ++ pmp_priv->txpoweridx = 0x2A; ++ ++ pmp_priv->antenna_tx = ANTENNA_A; ++ pmp_priv->antenna_rx = ANTENNA_AB; ++ ++ pmp_priv->check_mp_pkt = 0; ++ ++ pmp_priv->tx_pktcount = 0; ++ ++ pmp_priv->rx_pktcount = 0; ++ pmp_priv->rx_crcerrpktcount = 0; ++ ++ pmp_priv->network_macaddr[0] = 0x00; ++ pmp_priv->network_macaddr[1] = 0xE0; ++ pmp_priv->network_macaddr[2] = 0x4C; ++ pmp_priv->network_macaddr[3] = 0x87; ++ pmp_priv->network_macaddr[4] = 0x66; ++ pmp_priv->network_macaddr[5] = 0x55; ++ ++ pnetwork = &pmp_priv->mp_network.network; ++ _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); ++ ++ pnetwork->Ssid.SsidLength = 8; ++ _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength); ++} ++ ++#ifdef PLATFORM_WINDOWS ++/* ++void mp_wi_callback( ++ IN NDIS_WORK_ITEM* pwk_item, ++ IN PVOID cntx ++ ) ++{ ++ _adapter* padapter =(_adapter *)cntx; ++ struct mp_priv *pmppriv=&padapter->mppriv; ++ struct mp_wi_cntx *pmp_wi_cntx=&pmppriv->wi_cntx; ++ ++ // Execute specified action. ++ if(pmp_wi_cntx->curractfunc != NULL) ++ { ++ LARGE_INTEGER cur_time; ++ ULONGLONG start_time, end_time; ++ NdisGetCurrentSystemTime(&cur_time); // driver version ++ start_time = cur_time.QuadPart/10; // The return value is in microsecond ++ ++ pmp_wi_cntx->curractfunc(padapter); ++ ++ NdisGetCurrentSystemTime(&cur_time); // driver version ++ end_time = cur_time.QuadPart/10; // The return value is in microsecond ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("WorkItemActType: %d, time spent: %I64d us\n", ++ pmp_wi_cntx->param.act_type, (end_time-start_time))); ++ } ++ ++ NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock)); ++ pmp_wi_cntx->bmp_wi_progress= _FALSE; ++ NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock)); ++ ++ if (pmp_wi_cntx->bmpdrv_unload) ++ { ++ NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt)); ++ } ++ ++} ++*/ ++ ++static int init_mp_priv_by_os(struct mp_priv *pmp_priv) ++{ ++ struct mp_wi_cntx *pmp_wi_cntx; ++ ++ if (pmp_priv == NULL) return _FAIL; ++ ++ pmp_priv->rx_testcnt = 0; ++ pmp_priv->rx_testcnt1 = 0; ++ pmp_priv->rx_testcnt2 = 0; ++ ++ pmp_priv->tx_testcnt = 0; ++ pmp_priv->tx_testcnt1 = 0; ++ ++ pmp_wi_cntx = &pmp_priv->wi_cntx ++ pmp_wi_cntx->bmpdrv_unload = _FALSE; ++ pmp_wi_cntx->bmp_wi_progress = _FALSE; ++ pmp_wi_cntx->curractfunc = NULL; ++ ++ return _SUCCESS; ++} ++#endif ++ ++#ifdef PLATFORM_LINUX ++static int init_mp_priv_by_os(struct mp_priv *pmp_priv) ++{ ++ int i, res; ++ struct mp_xmit_frame *pmp_xmitframe; ++ ++ if (pmp_priv == NULL) return _FAIL; ++ ++ _rtw_init_queue(&pmp_priv->free_mp_xmitqueue); ++ ++ pmp_priv->pallocated_mp_xmitframe_buf = NULL; ++ pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4); ++ if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) { ++ res = _FAIL; ++ goto _exit_init_mp_priv; ++ } ++ ++ pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((uint) (pmp_priv->pallocated_mp_xmitframe_buf) & 3); ++ ++ pmp_xmitframe = (struct mp_xmit_frame*)pmp_priv->pmp_xmtframe_buf; ++ ++ for (i = 0; i < NR_MP_XMITFRAME; i++) ++ { ++ _rtw_init_listhead(&pmp_xmitframe->list); ++ rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue); ++ ++ pmp_xmitframe->pkt = NULL; ++ pmp_xmitframe->frame_tag = MP_FRAMETAG; ++ pmp_xmitframe->padapter = pmp_priv->papdater; ++ ++ pmp_xmitframe++; ++ } ++ ++ pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME; ++ ++ res = _SUCCESS; ++ ++_exit_init_mp_priv: ++ ++ return res; ++} ++#endif ++ ++static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) ++{ ++ struct pkt_attrib *pattrib; ++ struct tx_desc *desc; ++ ++ // init xmitframe attribute ++ pattrib = &pmptx->attrib; ++ _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); ++ desc = &pmptx->desc; ++ _rtw_memset(desc, 0, TXDESC_SIZE); ++ ++ pattrib->ether_type = 0x8712; ++ //_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++// _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); ++// pattrib->pctrl = 0; ++// pattrib->dhcp_pkt = 0; ++// pattrib->pktlen = 0; ++ pattrib->ack_policy = 0; ++// pattrib->pkt_hdrlen = ETH_HLEN; ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA; ++ pattrib->priority = 0; ++ pattrib->qsel = pattrib->priority; ++// do_queue_select(padapter, pattrib); ++ pattrib->nr_frags = 1; ++ pattrib->encrypt = 0; ++ pattrib->bswenc = _FALSE; ++ pattrib->qos_en = _FALSE; ++} ++ ++s32 init_mp_priv(PADAPTER padapter) ++{ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ ++ _init_mp_priv_(pmppriv); ++ pmppriv->papdater = padapter; ++ ++ pmppriv->tx.stop = 1; ++ mp_init_xmit_attrib(&pmppriv->tx, padapter); ++ ++ switch (padapter->registrypriv.rf_config) { ++ case RF_1T1R: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_A; ++ break; ++ case RF_1T2R: ++ default: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T4R: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_ABCD; ++ break; ++ } ++ ++ return _SUCCESS; ++} ++ ++void free_mp_priv(struct mp_priv *pmp_priv) ++{ ++ if (pmp_priv->pallocated_mp_xmitframe_buf) { ++ rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0); ++ pmp_priv->pallocated_mp_xmitframe_buf = NULL; ++ } ++ pmp_priv->pmp_xmtframe_buf = NULL; ++} ++ ++#ifdef CONFIG_RTL8192C ++#define PHY_IQCalibrate(a,b) rtl8192c_PHY_IQCalibrate(a,b) ++#define PHY_LCCalibrate(a) rtl8192c_PHY_LCCalibrate(a) ++#define dm_CheckTXPowerTracking(a) rtl8192c_dm_CheckTXPowerTracking(a) ++#define PHY_SetRFPathSwitch(a,b) rtl8192c_PHY_SetRFPathSwitch(a,b) ++#endif ++ ++#ifdef CONFIG_RTL8192D ++#define PHY_IQCalibrate(a) rtl8192d_PHY_IQCalibrate(a) ++#define PHY_LCCalibrate(a) rtl8192d_PHY_LCCalibrate(a) ++#define dm_CheckTXPowerTracking(a) rtl8192d_dm_CheckTXPowerTracking(a) ++#define PHY_SetRFPathSwitch(a,b) rtl8192d_PHY_SetRFPathSwitch(a,b) ++#endif ++ ++s32 ++MPT_InitializeAdapter( ++ IN PADAPTER pAdapter, ++ IN u8 Channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ s32 rtStatus = _SUCCESS; ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ u32 ledsetting; ++ ++ //------------------------------------------------------------------------- ++ // HW Initialization for 8190 MPT. ++ //------------------------------------------------------------------------- ++ //------------------------------------------------------------------------- ++ // SW Initialization for 8190 MP. ++ //------------------------------------------------------------------------- ++ pMptCtx->bMptDrvUnload = _FALSE; ++ pMptCtx->bMassProdTest = _FALSE; ++ pMptCtx->bMptIndexEven = _TRUE; //default gain index is -6.0db ++ ++ /* Init mpt event. */ ++#if 0 // for Windows ++ NdisInitializeEvent( &(pMptCtx->MptWorkItemEvent) ); ++ NdisAllocateSpinLock( &(pMptCtx->MptWorkItemSpinLock) ); ++ ++ PlatformInitializeWorkItem( ++ Adapter, ++ &(pMptCtx->MptWorkItem), ++ (RT_WORKITEM_CALL_BACK)MPT_WorkItemCallback, ++ (PVOID)Adapter, ++ "MptWorkItem"); ++#endif ++ pMptCtx->bMptWorkItemInProgress = _FALSE; ++ pMptCtx->CurrMptAct = NULL; ++ //------------------------------------------------------------------------- ++ ++#if 1 ++ // Don't accept any packets ++ rtw_write32(pAdapter, REG_RCR, 0); ++#else ++ // Accept CRC error and destination address ++ pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP); ++ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); ++#endif ++ ++#if 0 ++ // If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP. ++ if (pHalData->AutoloadFailFlag == TRUE) ++ { ++ pHalData->RF_Type = RF_2T2R; ++ } ++#endif ++ ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); ++ rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); ++ ++#ifdef CONFIG_RTL8192C ++ PHY_IQCalibrate(pAdapter, _FALSE); ++ dm_CheckTXPowerTracking(pAdapter); //trigger thermal meter ++ PHY_LCCalibrate(pAdapter); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++ PHY_IQCalibrate(pAdapter); ++ dm_CheckTXPowerTracking(pAdapter); //trigger thermal meter ++ PHY_LCCalibrate(pAdapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //Wifi default use Main ++#else ++ ++#ifdef CONFIG_RTL8192C ++#if 1 ++ if (pHalData->BoardType == BOARD_MINICARD) ++ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main ++#else ++ if(pAdapter->HalFunc.GetInterfaceSelectionHandler(pAdapter) == INTF_SEL2_MINICARD ) ++ PHY_SetRFPathSwitch(Adapter, pAdapter->MgntInfo.bDefaultAntenna); //default use Main ++#endif ++ ++#endif ++ ++#endif ++ ++ pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); ++ pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: MPT_DeInitAdapter() ++ * ++ * Overview: Extra DeInitialization for Mass Production Test. ++ * ++ * Input: PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/08/2007 MHC Create Version 0. ++ * 05/18/2007 MHC Add normal driver MPHalt code. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++MPT_DeInitAdapter( ++ IN PADAPTER pAdapter ++ ) ++{ ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->bMptDrvUnload = _TRUE; ++#if 0 // for Windows ++ PlatformFreeWorkItem( &(pMptCtx->MptWorkItem) ); ++ ++ while(pMptCtx->bMptWorkItemInProgress) ++ { ++ if(NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50)) ++ { ++ break; ++ } ++ } ++ NdisFreeSpinLock( &(pMptCtx->MptWorkItemSpinLock) ); ++#endif ++} ++ ++static u8 mpt_ProStartTest(PADAPTER padapter) ++{ ++ PMPT_CONTEXT pMptCtx = &padapter->mppriv.MptCtx; ++ ++ pMptCtx->bMassProdTest = _TRUE; ++ pMptCtx->bStartContTx = _FALSE; ++ pMptCtx->bCckContTx = _FALSE; ++ pMptCtx->bOfdmContTx = _FALSE; ++ pMptCtx->bSingleCarrier = _FALSE; ++ pMptCtx->bCarrierSuppression = _FALSE; ++ pMptCtx->bSingleTone = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++/* ++ * General use ++ */ ++s32 SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ ++ Hal_SetPowerTracking( padapter, enable ); ++ return 0; ++} ++ ++void GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ Hal_GetPowerTracking( padapter, enable ); ++} ++ ++static void disable_dm(PADAPTER padapter) ++{ ++#ifndef CONFIG_RTL8723A ++ u8 v8; ++#endif ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ //3 1. disable firmware dynamic mechanism ++ // disable Power Training, Rate Adaptive ++#ifdef CONFIG_RTL8723A ++ SetBcnCtrlReg(padapter, 0, EN_BCN_FUNCTION); ++#else ++ v8 = rtw_read8(padapter, REG_BCN_CTRL); ++ v8 &= ~EN_BCN_FUNCTION; ++ rtw_write8(padapter, REG_BCN_CTRL, v8); ++#endif ++ ++ //3 2. disable driver dynamic mechanism ++ // disable Dynamic Initial Gain ++ // disable High Power ++ // disable Power Tracking ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ // enable APK, LCK and IQK but disable power tracking ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); ++} ++ ++//This function initializes the DUT to the MP test mode ++s32 mp_start_test(PADAPTER padapter) ++{ ++ WLAN_BSSID_EX bssid; ++ struct sta_info *psta; ++ u32 length; ++ u8 val8; ++ ++ _irqL irqL; ++ s32 res = _SUCCESS; ++ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ ++ ++ //3 disable dynamic mechanism ++ disable_dm(padapter); ++ ++ //3 0. update mp_priv ++#if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8192D) ++ if (padapter->registrypriv.rf_config == RF_819X_MAX_TYPE) { ++// HAL_DATA_TYPE *phal = GET_HAL_DATA(padapter); ++// switch (phal->rf_type) { ++ switch (GET_RF_TYPE(padapter)) { ++ case RF_1T1R: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_A; ++ break; ++ case RF_1T2R: ++ default: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T4R: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_ABCD; ++ break; ++ } ++ } ++#endif ++ mpt_ProStartTest(padapter); ++ ++ //3 1. initialize a new WLAN_BSSID_EX ++// _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); ++ _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN); ++ bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc"); ++ _rtw_memcpy(bssid.Ssid.Ssid, (u8*)"mp_pseudo_adhoc", bssid.Ssid.SsidLength); ++ bssid.InfrastructureMode = Ndis802_11IBSS; ++ bssid.NetworkTypeInUse = Ndis802_11DS; ++ bssid.IELength = 0; ++ ++ length = get_WLAN_BSSID_EX_sz(&bssid); ++ if (length % 4) ++ bssid.Length = ((length >> 2) + 1) << 2; //round up to multiple of 4 bytes. ++ else ++ bssid.Length = length; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ goto end_of_mp_start_test; ++ ++ //init mp_start_test status ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ rtw_disassoc_cmd(padapter, 500, _TRUE); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ pmppriv->prev_fw_state = get_fwstate(pmlmepriv); ++ pmlmepriv->fw_state = WIFI_MP_STATE; ++#if 0 ++ if (pmppriv->mode == _LOOPBOOK_MODE_) { ++ set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc ++ RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n")); ++ } else { ++ RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n")); ++ } ++#endif ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ //3 2. create a new psta for mp driver ++ //clear psta in the cur_network, if any ++ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); ++ if (psta) rtw_free_stainfo(padapter, psta); ++ ++ psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress); ++ if (psta == NULL) { ++ RT_TRACE(_module_mp_, _drv_err_, ("mp_start_test: Can't alloc sta_info!\n")); ++ pmlmepriv->fw_state = pmppriv->prev_fw_state; ++ res = _FAIL; ++ goto end_of_mp_start_test; ++ } ++ ++ //3 3. join psudo AdHoc ++ tgt_network->join_res = 1; ++ tgt_network->aid = psta->aid = 1; ++ _rtw_memcpy(&tgt_network->network, &bssid, length); ++ ++ rtw_indicate_connect(padapter); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++end_of_mp_start_test: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (res == _SUCCESS) ++ { ++ // set MSR to WIFI_FW_ADHOC_STATE ++#if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8192D) ++ val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102 ++ val8 |= WIFI_FW_ADHOC_STATE; ++ rtw_write8(padapter, MSR, val8); // Link in ad hoc network ++#endif ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++ rtw_write8(padapter, MSR, 1); // Link in ad hoc network ++ rtw_write8(padapter, RCR, 0); // RCR : disable all pkt, 0x10250048 ++ rtw_write8(padapter, RCR+2, 0x57); // RCR disable Check BSSID, 0x1025004a ++ ++ // disable RX filter map , mgt frames will put in RX FIFO 0 ++ rtw_write16(padapter, RXFLTMAP0, 0x0); // 0x10250116 ++ ++ val8 = rtw_read8(padapter, EE_9346CR); // 0x1025000A ++ if (!(val8 & _9356SEL))//boot from EFUSE ++ efuse_change_max_size(padapter); ++#endif ++ } ++ ++ return res; ++} ++//------------------------------------------------------------------------------ ++//This function change the DUT from the MP test mode into normal mode ++void mp_stop_test(PADAPTER padapter) ++{ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ struct sta_info *psta; ++ ++ _irqL irqL; ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE) ++ goto end_of_mp_stop_test; ++ ++ //3 1. disconnect psudo AdHoc ++ rtw_indicate_disconnect(padapter); ++ ++ //3 2. clear psta used in mp test mode. ++// rtw_free_assoc_resources(padapter, 1); ++ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); ++ if (psta) rtw_free_stainfo(padapter, psta); ++ ++ //3 3. return to normal state (default:station mode) ++ pmlmepriv->fw_state = pmppriv->prev_fw_state; // WIFI_STATION_STATE; ++ ++ //flush the cur_network ++ _rtw_memset(tgt_network, 0, sizeof(struct wlan_network)); ++ ++ _clr_fwstate_(pmlmepriv, WIFI_MP_STATE); ++ ++end_of_mp_stop_test: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++#if 0 ++//#ifdef CONFIG_USB_HCI ++static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) ++{ ++ u8 eRFPath; ++ u32 rfReg0x26; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ if (RateIdx < MPT_RATE_6M) { // CCK rate,for 88cu ++ rfReg0x26 = 0xf400; ++ } ++ else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {// OFDM rate,for 88cu ++ if ((4 == Channel) || (8 == Channel) || (12 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) {// MCS 20M ,for 88cu // MCS40M rate,for 88cu ++ ++ if (HT_CHANNEL_WIDTH_20 == BandWidthID) { ++ if ((4 == Channel) || (8 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ else{ ++ if ((4 == Channel) || (8 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ } ++ ++// RT_TRACE(COMP_CMD, DBG_LOUD, ("\n mpt_AdjustRFRegByRateByChan92CU():Chan:%d Rate=%d rfReg0x26:0x%08x\n",Channel, RateIdx,rfReg0x26)); ++ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { ++ write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26); ++ } ++} ++#endif ++/*----------------------------------------------------------------------------- ++ * Function: mpt_SwitchRfSetting ++ * ++ * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. ++ * ++ * Input: IN PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. ++ * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++static void mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ Hal_mpt_SwitchRfSetting(pAdapter); ++ } ++ ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ Hal_MPT_CCKTxPowerAdjust(Adapter,bInCH14); ++} ++ ++static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) ++{ ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter,beven); ++ } ++ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++ ++/* ++ * SetChannel ++ * Description ++ * Use H2C command to change channel, ++ * not only modify rf register, but also other setting need to be done. ++ */ ++void SetChannel(PADAPTER pAdapter) ++{ ++ Hal_SetChannel(pAdapter); ++ ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void SetBandwidth(PADAPTER pAdapter) ++{ ++ Hal_SetBandwidth(pAdapter); ++ ++} ++ ++static void SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ Hal_SetCCKTxPower(pAdapter,TxPower); ++} ++ ++static void SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ Hal_SetOFDMTxPower(pAdapter,TxPower); ++ } ++ ++ ++void SetAntenna(PADAPTER pAdapter) ++ { ++ Hal_SetAntenna(pAdapter); ++} ++ ++void SetAntennaPathPower(PADAPTER pAdapter) ++{ ++ Hal_SetAntennaPathPower(pAdapter); ++} ++ ++void SetTxPower(PADAPTER pAdapter) ++{ ++ Hal_SetTxPower(pAdapter); ++ } ++ ++void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) ++{ ++ u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; ++ ++ TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); ++ TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); ++ TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); ++ ++ tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); ++ write_bbreg(pAdapter, rFPGA0_TxGainStage, ++ (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); ++} ++ ++void SetDataRate(PADAPTER pAdapter) ++{ ++ Hal_SetDataRate(pAdapter); ++} ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++/*------------------------------Define structure----------------------------*/ ++typedef struct _R_ANTENNA_SELECT_OFDM { ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK { ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++#endif ++ ++s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ return Hal_SetThermalMeter( pAdapter, target_ther); ++} ++ ++static void TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ Hal_TriggerRFThermalMeter(pAdapter); ++} ++ ++static u8 ReadRFThermalMeter(PADAPTER pAdapter) ++{ ++ return Hal_ReadRFThermalMeter(pAdapter); ++} ++ ++void GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++ Hal_GetThermalMeter(pAdapter,value); ++} ++ ++void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetSingleCarrierTx(pAdapter,bStart); ++} ++ ++void SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetSingleToneTx(pAdapter,bStart); ++} ++ ++void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetCarrierSuppressionTx(pAdapter, bStart); ++} ++ ++void SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++ { ++ Hal_SetCCKContinuousTx(pAdapter,bStart); ++ } ++ ++void SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++ { ++ Hal_SetOFDMContinuousTx( pAdapter, bStart); ++}/* mpt_StartOfdmContTx */ ++ ++void SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetContinuousTx(pAdapter,bStart); ++} ++ ++//------------------------------------------------------------------------------ ++static void dump_mpframe(PADAPTER padapter, struct xmit_frame *pmpframe) ++{ ++ rtw_hal_mgnt_xmit(padapter, pmpframe); ++} ++ ++static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv) ++{ ++ struct xmit_frame *pmpframe; ++ struct xmit_buf *pxmitbuf; ++ ++ if ((pmpframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL) ++ { ++ return NULL; ++ } ++ ++ if ((pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) ++ { ++ rtw_free_xmitframe(pxmitpriv, pmpframe); ++ return NULL; ++ } ++ ++ pmpframe->frame_tag = MP_FRAMETAG; ++ ++ pmpframe->pxmitbuf = pxmitbuf; ++ ++ pmpframe->buf_addr = pxmitbuf->pbuf; ++ ++ pxmitbuf->priv_data = pmpframe; ++ ++ return pmpframe; ++ ++} ++ ++static thread_return mp_xmit_packet_thread(thread_context context) ++{ ++ struct xmit_frame *pxmitframe; ++ struct mp_tx *pmptx; ++ struct mp_priv *pmp_priv; ++ struct xmit_priv *pxmitpriv; ++ PADAPTER padapter; ++ ++ pmp_priv = (struct mp_priv *)context; ++ pmptx = &pmp_priv->tx; ++ padapter = pmp_priv->papdater; ++ pxmitpriv = &(padapter->xmitpriv); ++ ++ thread_enter("RTW_MP_THREAD"); ++ ++ DBG_871X("%s:pkTx Start\n", __func__); ++ while (1) { ++ pxmitframe = alloc_mp_xmitframe(pxmitpriv); ++ if (pxmitframe == NULL) { ++ if (pmptx->stop || ++ padapter->bSurpriseRemoved || ++ padapter->bDriverStopped) { ++ goto exit; ++ } ++ else { ++ rtw_msleep_os(1); ++ continue; ++ } ++ } ++ ++ _rtw_memcpy((u8 *)(pxmitframe->buf_addr+TXDESC_OFFSET), pmptx->buf, pmptx->write_size); ++ _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib)); ++ ++ dump_mpframe(padapter, pxmitframe); ++ ++ pmptx->sended++; ++ pmp_priv->tx_pktcount++; ++ ++ if (pmptx->stop || ++ padapter->bSurpriseRemoved || ++ padapter->bDriverStopped) ++ goto exit; ++ if ((pmptx->count != 0) && ++ (pmptx->count == pmptx->sended)) ++ goto exit; ++ ++ flush_signals_thread(); ++ } ++ ++exit: ++ //DBG_871X("%s:pkTx Exit\n", __func__); ++ rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size); ++ pmptx->pallocated_buf = NULL; ++ pmptx->stop = 1; ++ ++ thread_exit(); ++} ++ ++void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc) ++{ ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ _rtw_memcpy(ptxdesc, &(pmp_priv->tx.desc), TXDESC_SIZE); ++} ++ ++void SetPacketTx(PADAPTER padapter) ++{ ++ u8 *ptr, *pkt_start, *pkt_end; ++ u32 pkt_size; ++ struct tx_desc *desc; ++ struct rtw_ieee80211_hdr *hdr; ++ u8 payload; ++ s32 bmcast; ++ struct pkt_attrib *pattrib; ++ struct mp_priv *pmp_priv; ++ ++ ++ pmp_priv = &padapter->mppriv; ++ if (pmp_priv->tx.stop) return; ++ pmp_priv->tx.sended = 0; ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx_pktcount = 0; ++ ++ //3 1. update_attrib() ++ pattrib = &pmp_priv->tx.attrib; ++ _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ bmcast = IS_MCAST(pattrib->ra); ++ if (bmcast) { ++ pattrib->mac_id = 1; ++ pattrib->psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ pattrib->mac_id = 0; ++ pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); ++ } ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; ++ ++ //3 2. allocate xmit buffer ++ pkt_size = pattrib->last_txcmdsz; ++ ++ if (pmp_priv->tx.pallocated_buf) ++ rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size); ++ pmp_priv->tx.write_size = pkt_size; ++ pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ; ++ pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size); ++ if (pmp_priv->tx.pallocated_buf == NULL) { ++ DBG_871X("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size); ++ return; ++ } ++ pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ); ++ ptr = pmp_priv->tx.buf; ++ ++ desc = &(pmp_priv->tx.desc); ++ _rtw_memset(desc, 0, TXDESC_SIZE); ++ pkt_start = ptr; ++ pkt_end = pkt_start + pkt_size; ++ ++ //3 3. init TX descriptor ++ // offset 0 ++ //desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size ++ //desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ //desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc ++ //if (bmcast) desc->txdw0 |= cpu_to_le32(BMC); // broadcast packet ++ ++ // offset 4 ++ desc->txdw1 |= cpu_to_le32(BK); // don't aggregate(AMPDU) ++ desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1F); //CAM_ID(MAC_ID) ++ desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID ++ desc->txdw1 |= cpu_to_le32((pattrib->raid << Rate_ID_SHT) & 0x000F0000); // Rate Adaptive ID ++ ++ // offset 8 ++ // offset 12 ++ //desc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0xffff0000); ++ ++ // offset 16 ++ //desc->txdw4 |= cpu_to_le32(QoS); ++ desc->txdw4 |= cpu_to_le32(HW_SEQ_EN); ++ desc->txdw4 |= cpu_to_le32(USERATE); ++ desc->txdw4 |= cpu_to_le32(DISDATAFB); ++ ++ if( pmp_priv->preamble ){ ++ if (pmp_priv->rateidx <= MPT_RATE_54M) ++ desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble ++ } ++ if (pmp_priv->bandwidth == HT_CHANNEL_WIDTH_40) ++ desc->txdw4 |= cpu_to_le32(DATA_BW); ++ ++ // offset 20 ++ desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); ++ ++ if( pmp_priv->preamble ){ ++ if (pmp_priv->rateidx > MPT_RATE_54M) ++ desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval ++ } ++ desc->txdw5 |= cpu_to_le32(0x0001FF00); // DATA/RTS Rate Fallback Limit ++ ++ //3 4. make wlan header, make_wlanhdr() ++ hdr = (struct rtw_ieee80211_hdr *)pkt_start; ++ SetFrameSubType(&hdr->frame_ctl, pattrib->subtype); ++ _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA ++ _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA ++ _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID ++ ++ //3 5. make payload ++ ptr = pkt_start + pattrib->hdrlen; ++ ++ switch (pmp_priv->tx.payload) { ++ case 0: ++ payload = 0x00; ++ break; ++ case 1: ++ payload = 0x5a; ++ break; ++ case 2: ++ payload = 0xa5; ++ break; ++ case 3: ++ payload = 0xff; ++ break; ++ default: ++ payload = 0x00; ++ break; ++ } ++ ++ _rtw_memset(ptr, payload, pkt_end - ptr); ++ ++ //3 6. start thread ++#ifdef PLATFORM_LINUX ++ pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD"); ++ if (IS_ERR(pmp_priv->tx.PktTxThread)) ++ DBG_871X("Create PktTx Thread Fail !!!!!\n"); ++#endif ++#ifdef PLATFORM_FREEBSD ++{ ++ struct proc *p; ++ struct thread *td; ++ pmp_priv->tx.PktTxThread = kproc_kthread_add(mp_xmit_packet_thread, pmp_priv, ++ &p, &td, RFHIGHPID, 0, "MPXmitThread", "MPXmitThread"); ++ ++ if (pmp_priv->tx.PktTxThread < 0) ++ DBG_871X("Create PktTx Thread Fail !!!!!\n"); ++} ++#endif ++} ++ ++void SetPacketRx(PADAPTER pAdapter, u8 bStartRx) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if(bStartRx) ++ { ++ pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; ++ ++ pHalData->ReceiveConfig |= ACRC32; ++ ++ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); ++ ++ // Accept all data frames ++ rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF); ++ } ++ else ++ { ++ rtw_write32(pAdapter, REG_RCR, 0); ++ } ++} ++ ++void ResetPhyRxPktCount(PADAPTER pAdapter) ++{ ++ u32 i, phyrx_set = 0; ++ ++ for (i = 0; i <= 0xF; i++) { ++ phyrx_set = 0; ++ phyrx_set |= _RXERR_RPT_SEL(i); //select ++ phyrx_set |= RXERR_RPT_RST; // set counter to zero ++ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); ++ } ++} ++ ++static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit) ++{ ++ //selection ++ u32 phyrx_set = 0, count = 0; ++ ++ phyrx_set = _RXERR_RPT_SEL(selbit & 0xF); ++ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); ++ ++ //Read packet count ++ count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK; ++ ++ return count; ++} ++ ++u32 GetPhyRxPktReceived(PADAPTER pAdapter) ++{ ++ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; ++ ++ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK); ++ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK); ++ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK); ++ ++ return OFDM_cnt + CCK_cnt + HT_cnt; ++} ++ ++u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter) ++{ ++ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; ++ ++ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL); ++ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL); ++ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL); ++ ++ return OFDM_cnt + CCK_cnt + HT_cnt; ++} ++ ++//reg 0x808[9:0]: FFT data x ++//reg 0x808[22]: 0 --> 1 to get 1 FFT data y ++//reg 0x8B4[15:0]: FFT data y report ++static u32 GetPSDData(PADAPTER pAdapter, u32 point) ++{ ++ int psd_val; ++ ++ ++ psd_val = rtw_read32(pAdapter, 0x808); ++ psd_val &= 0xFFBFFC00; ++ psd_val |= point; ++ ++ rtw_write32(pAdapter, 0x808, psd_val); ++ rtw_mdelay_os(1); ++ psd_val |= 0x00400000; ++ ++ rtw_write32(pAdapter, 0x808, psd_val); ++ rtw_mdelay_os(1); ++ psd_val = rtw_read32(pAdapter, 0x8B4); ++ ++ psd_val &= 0x0000FFFF; ++ ++ return psd_val; ++} ++ ++/* ++ * pts start_point_min stop_point_max ++ * 128 64 64 + 128 = 192 ++ * 256 128 128 + 256 = 384 ++ * 512 256 256 + 512 = 768 ++ * 1024 512 512 + 1024 = 1536 ++ * ++ */ ++u32 mp_query_psd(PADAPTER pAdapter, u8 *data) ++{ ++ u32 i, psd_pts=0, psd_start=0, psd_stop=0; ++ u32 psd_data=0; ++ ++#ifdef PLATFORM_LINUX ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! interface not opened!\n")); ++ return 0; ++ } ++#endif ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! not in MP mode!\n")); ++ return 0; ++ } ++ ++ if (strlen(data) == 0) { //default value ++ psd_pts = 128; ++ psd_start = 64; ++ psd_stop = 128; ++ } else { ++ sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); ++ } ++ ++ _rtw_memset(data, '\0', sizeof(data)); ++ ++ i = psd_start; ++ while (i < psd_stop) ++ { ++ if (i >= psd_pts) { ++ psd_data = GetPSDData(pAdapter, i-psd_pts); ++ } else { ++ psd_data = GetPSDData(pAdapter, i); ++ } ++ sprintf(data, "%s%x ", data, psd_data); ++ i++; ++ } ++ ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(100); ++ #else ++ rtw_mdelay_os(100); ++ #endif ++ ++ return strlen(data)+1; ++} ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_mp_ioctl.c +@@ -0,0 +1,2954 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MP_IOCTL_C_ ++ ++#include ++#include ++#include ++#include ++ ++//#include ++#include ++ ++ ++//**************** oid_rtl_seg_81_85 section start **************** ++NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ Adapter->registrypriv.wireless_mode = *(u8*)poid_par_priv->information_buf; ++ } else if (poid_par_priv->type_of_oid == QUERY_OID) { ++ *(u8*)poid_par_priv->information_buf = Adapter->registrypriv.wireless_mode; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_info_, ("-query Wireless Mode=%d\n", Adapter->registrypriv.wireless_mode)); ++ } else { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_87_80 section start **************** ++NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ struct bb_reg_param *pbbreg; ++ u16 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_bb_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); ++ ++ offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff ++ if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; ++ ++ value = pbbreg->value; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_write_bb_reg_hdl: offset=0x%03X value=0x%08X\n", ++ offset, value)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ write_bbreg(Adapter, offset, 0xFFFFFFFF, value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ struct bb_reg_param *pbbreg; ++ u16 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_bb_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); ++ ++ offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff ++ if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ value = read_bbreg(Adapter, offset, 0xFFFFFFFF); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ pbbreg->value = value; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_read_bb_reg_hdl: offset=0x%03X value:0x%08X\n", ++ offset, value)); ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ struct rf_reg_param *pbbreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_rf_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); ++ ++ if (pbbreg->path >= MAX_RF_PATH_NUMS) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->offset > 0xFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->value > 0xFFFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ path = (u8)pbbreg->path; ++ offset = (u8)pbbreg->offset; ++ value = pbbreg->value; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_write_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", ++ path, offset, value)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ write_rfreg(Adapter, path, offset, value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ struct rf_reg_param *pbbreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_rf_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); ++ ++ if (pbbreg->path >= MAX_RF_PATH_NUMS) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->offset > 0xFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ path = (u8)pbbreg->path; ++ offset = (u8)pbbreg->offset; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ value = read_rfreg(Adapter, path, offset); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ pbbreg->value = value; ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_read_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", ++ path, offset, value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_87_00 section end**************** ++//------------------------------------------------------------------------------ ++ ++//**************** oid_rtl_seg_81_80_00 section start **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 ratevalue;//4 ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_set_data_rate_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ ratevalue = *((u32*)poid_par_priv->information_buf);//4 ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_data_rate_hdl: data rate idx=%d\n", ratevalue)); ++ if (ratevalue >= MPT_RATE_LAST) ++ return NDIS_STATUS_INVALID_DATA; ++ ++ Adapter->mppriv.rateidx = ratevalue; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetDataRate(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 mode; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_start_test_hdl\n")); ++ ++ if (Adapter->registrypriv.mp_mode == 0) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ //IQCalibrateBcut(Adapter); ++ ++ mode = *((u32*)poid_par_priv->information_buf); ++ Adapter->mppriv.mode = mode;// 1 for loopback ++ ++ if (mp_start_test(Adapter) == _FAIL) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ goto exit; ++ } ++ ++exit: ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_start_test_hdl: mp_mode=%d\n", Adapter->mppriv.mode)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_STOP_TEST\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ mp_stop_test(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-Set OID_RT_PRO_STOP_TEST\n")); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 Channel; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_channel_direct_call_hdl\n")); ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) { ++ *((u32*)poid_par_priv->information_buf) = Adapter->mppriv.channel; ++ return NDIS_STATUS_SUCCESS; ++ } ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Channel = *((u32*)poid_par_priv->information_buf); ++ RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_channel_direct_call_hdl: Channel=%d\n", Channel)); ++ if (Channel > 14) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ Adapter->mppriv.channel = Channel; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetChannel(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u16 bandwidth; ++ u16 channel_offset; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_set_bandwidth_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ bandwidth = *((u32*)poid_par_priv->information_buf);//4 ++ channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if (bandwidth != HT_CHANNEL_WIDTH_40) ++ bandwidth = HT_CHANNEL_WIDTH_20; ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.prime_channel_offset = (u8)channel_offset; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetBandwidth(padapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_set_bandwidth_hdl: bandwidth=%d channel_offset=%d\n", ++ bandwidth, channel_offset)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 antenna; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_antenna_bb_hdl\n")); ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) ++ { ++ antenna = *(u32*)poid_par_priv->information_buf; ++ ++ Adapter->mppriv.antenna_tx = (u16)((antenna & 0xFFFF0000) >> 16); ++ Adapter->mppriv.antenna_rx = (u16)(antenna & 0x0000FFFF); ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_antenna_bb_hdl: tx_ant=0x%04x rx_ant=0x%04x\n", ++ Adapter->mppriv.antenna_tx, Adapter->mppriv.antenna_rx)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetAntenna(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ } else { ++ antenna = (Adapter->mppriv.antenna_tx << 16)|Adapter->mppriv.antenna_rx; ++ *(u32*)poid_par_priv->information_buf = antenna; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 tx_pwr_idx; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_set_tx_power_control_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ tx_pwr_idx = *((u32*)poid_par_priv->information_buf); ++ if (tx_pwr_idx > MAX_TX_PWR_INDEX_N_MODE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Adapter->mppriv.txpoweridx = (u8)tx_pwr_idx; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_tx_power_control_hdl: idx=0x%2x\n", ++ Adapter->mppriv.txpoweridx)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetTxPower(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++//**************** oid_rtl_seg_81_80_20 section start **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid !=QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_received_hdl.\n")); ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_alert_, ("recv_ok:%d \n",Adapter->mppriv.rx_pktcount)); ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_crc32_error_hdl.\n")); ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_alert_, ("recv_err:%d \n",Adapter->mppriv.rx_crcerrpktcount)); ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++ ++NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_reset_tx_packet_sent_hdl.\n")); ++ Adapter->mppriv.tx_pktcount = 0; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ Adapter->mppriv.rx_pktcount = 0; ++ Adapter->mppriv.rx_crcerrpktcount = 0; ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ResetPhyRxPktCount(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_received_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(ULONG)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(ULONG*)poid_par_priv->information_buf)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_crc32_error_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ ++ if (poid_par_priv->information_buf_len != sizeof(ULONG)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_phy_rx_packet_crc32_error_hdl: recv_err=%d\n", *(ULONG*)poid_par_priv->information_buf)); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_80_20 section end **************** ++NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_continuous_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetContinuousTx(Adapter,(u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_871X("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_carrier_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetSingleCarrierTx(Adapter, (u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_871X("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_carrier_suppression_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetCarrierSuppressionTx(Adapter, (u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_871X("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_tone_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetSingleToneTx(Adapter,(u8)bStartTest); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ return 0; ++} ++ ++NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ rtw_hal_set_hwreg(Adapter, HW_VAR_TRIGGER_GPIO_0, 0); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_80_00 section end **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ PNDIS_802_11_SSID pssid; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = (u32)sizeof(NDIS_802_11_SSID); ++ *poid_par_priv->bytes_rw = 0; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pssid = (PNDIS_802_11_SSID)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (mp_start_joinbss(Adapter, pssid) == _FAIL) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = sizeof(NDIS_802_11_SSID); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pRW_Reg RegRWStruct; ++ u32 offset, width; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_pro_read_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; ++ offset = RegRWStruct->offset; ++ width = RegRWStruct->width; ++ ++ if (offset > 0xFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ switch (width) { ++ case 1: ++ RegRWStruct->value = rtw_read8(Adapter, offset); ++ break; ++ case 2: ++ RegRWStruct->value = rtw_read16(Adapter, offset); ++ break; ++ default: ++ width = 4; ++ RegRWStruct->value = rtw_read32(Adapter, offset); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_read_register_hdl: offset:0x%04X value:0x%X\n", ++ offset, RegRWStruct->value)); ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = width; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pRW_Reg RegRWStruct; ++ u32 offset, width, value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_pro_write_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; ++ offset = RegRWStruct->offset; ++ width = RegRWStruct->width; ++ value = RegRWStruct->value; ++ ++ if (offset > 0xFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ if (value > 0xFF) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ rtw_write8(padapter, offset, (u8)value); ++ break; ++ case 2: ++ if (value > 0xFFFF) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ rtw_write16(padapter, offset, (u16)value); ++ break; ++ case 4: ++ rtw_write32(padapter, offset, value); ++ break; ++ default: ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_write_register_hdl: offset=0x%08X width=%d value=0x%X\n", ++ offset, width, value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pBurst_RW_Reg pBstRwReg; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_read_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ rtw_read_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_read_register_hdl\n")); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pBurst_RW_Reg pBstRwReg; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_write_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ rtw_write_mem(padapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_write_register_hdl\n")); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ ++ TX_CMD_Desc *TxCmd_Info; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+Set OID_RT_PRO_WRITE_TXCMD\n")); ++ ++ TxCmd_Info=(TX_CMD_Desc*)poid_par_priv->information_buf; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:Addr=%.8X\n", TxCmd_Info->offset)); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:1.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[0])); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:2.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[1])); ++ RT_TRACE(_module_mp_, _drv_info_, (("WRITE_TXCMD:3.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[2])); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:4.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[3])); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ rtw_write32(Adapter, TxCmd_Info->offset + 0, (unsigned int)TxCmd_Info->TxCMD.value[0]); ++ rtw_write32(Adapter, TxCmd_Info->offset + 4, (unsigned int)TxCmd_Info->TxCMD.value[1]); ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-Set OID_RT_PRO_WRITE_TXCMD: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pEEPROM_RWParam pEEPROM; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+Query OID_RT_PRO_READ16_EEPROM\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ pEEPROM->value = eeprom_read16(padapter, (u16)(pEEPROM->offset >> 1)); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-Query OID_RT_PRO_READ16_EEPROM: offset=0x%x value=0x%x\n", ++ pEEPROM->offset, pEEPROM->value)); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ pEEPROM_RWParam pEEPROM; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_WRITE16_EEPROM\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ eeprom_write16(padapter, (u16)(pEEPROM->offset >> 1), pEEPROM->value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct mp_wiparam *pwi_param; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct mp_wiparam)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (Adapter->mppriv.workparam.bcompleted == _FALSE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pwi_param = (struct mp_wiparam *)poid_par_priv->information_buf; ++ ++ _rtw_memcpy(pwi_param, &Adapter->mppriv.workparam, sizeof(struct mp_wiparam)); ++ Adapter->mppriv.act_in_progress = _FALSE; ++// RT_TRACE(_module_mp_, _drv_info_, ("rf:%x\n", pwiparam->IoValue)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro8711_pkt_loss_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(uint)*2) { ++ RT_TRACE(_module_mp_, _drv_err_, ("-oid_rt_pro8711_pkt_loss_hdl: buf_len=%d\n", (int)poid_par_priv->information_buf_len)); ++ return NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ if (*(uint*)poid_par_priv->information_buf == 1)//init==1 ++ Adapter->mppriv.rx_pktloss = 0; ++ ++ *((uint*)poid_par_priv->information_buf+1) = Adapter->mppriv.rx_pktloss; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#endif ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Query OID_RT_RD_ATTRIB_MEM\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++#ifdef CONFIG_SDIO_HCI ++ _irqlevel_changed_(&oldirql, LOWER); ++{ ++ u32 *plmem = (u32*)poid_par_priv->information_buf+2; ++ _attrib_read = pintfhdl->io_ops._attrib_read; ++ _attrib_read(pintfhdl, *((u32*)poid_par_priv->information_buf), ++ *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++} ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#endif ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++#ifdef CONFIG_SDIO_HCI ++ _irqlevel_changed_(&oldirql, LOWER); ++{ ++ u32 *plmem = (u32*)poid_par_priv->information_buf + 2; ++ _attrib_write = pintfhdl->io_ops._attrib_write; ++ _attrib_write(pintfhdl, *(u32*)poid_par_priv->information_buf, ++ *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); ++} ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_RF_INTFS\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setrfintfs_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf) == _FAIL) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _rtw_memcpy(poid_par_priv->information_buf, (unsigned char*)&Adapter->mppriv.rxstat, sizeof(struct recv_stat)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ PCFG_DBG_MSG_STRUCT pdbg_msg; ++ ++_func_enter_; ++ ++// RT_TRACE(0xffffffffff,_drv_alert_,("===> oid_rt_pro_cfg_debug_message_hdl.\n")); ++ ++#if 0//#ifdef CONFIG_DEBUG_RTL871X ++ ++ pdbg_msg = (PCFG_DBG_MSG_STRUCT)(poid_par_priv->information_buf); ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===>Set level :0x%08x, H32:0x%08x L32:0x%08x\n", ++ pdbg_msg->DebugLevel, pdbg_msg->DebugComponent_H32, pdbg_msg->DebugComponent_L32)); ++ ++ GlobalDebugLevel = pdbg_msg->DebugLevel; ++ GlobalDebugComponents = (pdbg_msg->DebugComponent_H32 << 32) | pdbg_msg->DebugComponent_L32; ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===> Set level :0x%08x, component:0x%016x\n", ++ GlobalDebugLevel, (u32)GlobalDebugComponents)); ++ } else { ++ pdbg_msg->DebugLevel = GlobalDebugLevel; ++ pdbg_msg->DebugComponent_H32 = (u32)(GlobalDebugComponents >> 32); ++ pdbg_msg->DebugComponent_L32 = (u32)GlobalDebugComponents; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===>Query level:0x%08x H32:0x%08x L32:0x%08x\n", ++ (u32)pdbg_msg->DebugLevel, (u32)pdbg_msg->DebugComponent_H32, (u32)pdbg_msg->DebugComponent_L32)); ++ } ++ ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_DATA_RATE_EX\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setdatarate_cmd(Adapter, poid_par_priv->information_buf) !=_SUCCESS) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ u8 thermal = 0; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_get_thermal_meter_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ GetThermalMeter(Adapter, &thermal); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *(u32*)poid_par_priv->information_buf = (u32)thermal; ++ *poid_par_priv->bytes_rw = sizeof(u32); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_tssi_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (Adapter->mppriv.act_in_progress == _TRUE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ //init workparam ++ Adapter->mppriv.act_in_progress = _TRUE; ++ Adapter->mppriv.workparam.bcompleted = _FALSE; ++ Adapter->mppriv.workparam.act_type = MPT_READ_TSSI; ++ Adapter->mppriv.workparam.io_offset = 0; ++ Adapter->mppriv.workparam.io_value = 0xFFFFFFFF; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (!rtw_gettssi_cmd(Adapter,0, (u8*)&Adapter->mppriv.workparam.io_value)) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ ++_func_enter_; ++ ++// if (poid_par_priv->type_of_oid != SET_OID) ++// return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ u8 enable; ++ ++ enable = *(u8*)poid_par_priv->information_buf; ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_set_power_tracking_hdl: enable=%d\n", enable)); ++ ++ SetPowerTracking(Adapter, enable); ++ } else { ++ GetPowerTracking(Adapter, (u8*)poid_par_priv->information_buf); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u32 ratevalue; ++ u8 datarates[NumRates]; ++ int i; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+OID_RT_PRO_SET_BASIC_RATE\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ ratevalue = *((u32*)poid_par_priv->information_buf); ++ ++ for (i = 0; i < NumRates; i++) { ++ if (ratevalue == mpdatarate[i]) ++ datarates[i] = mpdatarate[i]; ++ else ++ datarates[i] = 0xff; ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_info_, ("basicrate_inx=%d\n", datarates[i])); ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setbasicrate_cmd(padapter, datarates) != _SUCCESS) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-OID_RT_PRO_SET_BASIC_RATE: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < 8) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ *poid_par_priv->bytes_rw = 8; ++ _rtw_memcpy(poid_par_priv->information_buf, &(Adapter->pwrctrlpriv.pwr_mode), 8); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_qry_pwrstate_hdl: pwr_mode=%d smart_ps=%d\n", ++ Adapter->pwrctrlpriv.pwr_mode, Adapter->pwrctrlpriv.smart_ps)); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ uint pwr_mode, smart_ps; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_SET_PWRSTATE\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_rw = 0; ++ *poid_par_priv->bytes_needed = 8; ++ ++ if (poid_par_priv->information_buf_len < 8) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pwr_mode = *(uint *)(poid_par_priv->information_buf); ++ smart_ps = *(uint *)((int)poid_par_priv->information_buf + 4); ++ ++ *poid_par_priv->bytes_rw = 8; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct setratable_parm *prate_table; ++ u8 res; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = sizeof(struct setratable_parm); ++ if (poid_par_priv->information_buf_len < sizeof(struct setratable_parm)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ prate_table = (struct setratable_parm*)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ res = rtw_setrttbl_cmd(Adapter, prate_table); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ if (res == _FAIL) ++ status = NDIS_STATUS_FAILURE; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ #if 0 ++ struct mp_wi_cntx *pmp_wi_cntx=&(Adapter->mppriv.wi_cntx); ++ u8 res=_SUCCESS; ++ DEBUG_INFO(("===> Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); ++ ++ if(pmp_wi_cntx->bmp_wi_progress ==_TRUE){ ++ DEBUG_ERR(("\n mp workitem is progressing, not allow to set another workitem right now!!!\n")); ++ Status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ else{ ++ pmp_wi_cntx->bmp_wi_progress=_TRUE; ++ pmp_wi_cntx->param.bcompleted=_FALSE; ++ pmp_wi_cntx->param.act_type=MPT_GET_RATE_TABLE; ++ pmp_wi_cntx->param.io_offset=0x0; ++ pmp_wi_cntx->param.bytes_cnt=sizeof(struct getratable_rsp); ++ pmp_wi_cntx->param.io_value=0xffffffff; ++ ++ res=rtw_getrttbl_cmd(Adapter,(struct getratable_rsp *)pmp_wi_cntx->param.data); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ if(res != _SUCCESS) ++ { ++ Status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ } ++ DEBUG_INFO(("\n <=== Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); ++ #endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++//**************** oid_rtl_seg_87_12_00 section start **************** ++NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct security_priv *psecuritypriv = &Adapter->securitypriv; ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ ENCRY_CTRL_STATE encry_mode; ++ ++ ++ *poid_par_priv->bytes_needed = sizeof(u8); ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) ++ { ++ encry_mode = *((u8*)poid_par_priv->information_buf); ++ switch (encry_mode) ++ { ++ case HW_CONTROL: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_FALSE; ++ Adapter->registrypriv.software_encrypt=_FALSE; ++ #else ++ psecuritypriv->sw_decrypt = _FALSE; ++ psecuritypriv->sw_encrypt = _FALSE; ++ #endif ++ break; ++ case SW_CONTROL: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_TRUE; ++ Adapter->registrypriv.software_encrypt=_TRUE; ++ #else ++ psecuritypriv->sw_decrypt = _TRUE; ++ psecuritypriv->sw_encrypt = _TRUE; ++ #endif ++ break; ++ case HW_ENCRY_SW_DECRY: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_TRUE; ++ Adapter->registrypriv.software_encrypt=_FALSE; ++ #else ++ psecuritypriv->sw_decrypt = _TRUE; ++ psecuritypriv->sw_encrypt = _FALSE; ++ #endif ++ break; ++ case SW_ENCRY_HW_DECRY: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_FALSE; ++ Adapter->registrypriv.software_encrypt=_TRUE; ++ #else ++ psecuritypriv->sw_decrypt = _FALSE; ++ psecuritypriv->sw_encrypt = _TRUE; ++ #endif ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_notice_, ++ ("-oid_rt_pro_encryption_ctrl_hdl: SET encry_mode=0x%x sw_encrypt=0x%x sw_decrypt=0x%x\n", ++ encry_mode, psecuritypriv->sw_encrypt, psecuritypriv->sw_decrypt)); ++ } ++ else { ++ #if 0 ++ if (Adapter->registrypriv.software_encrypt == _FALSE) { ++ if (Adapter->registrypriv.software_decrypt == _FALSE) ++ encry_mode = HW_CONTROL; ++ else ++ encry_mode = HW_ENCRY_SW_DECRY; ++ } ++ else { ++ if (Adapter->registrypriv.software_decrypt == _FALSE) ++ encry_mode = SW_ENCRY_HW_DECRY; ++ else ++ encry_mode = SW_CONTROL; ++ } ++ #else ++ ++ if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _FALSE)) ++ encry_mode = HW_CONTROL; ++ else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _TRUE)) ++ encry_mode = HW_ENCRY_SW_DECRY; ++ else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _FALSE)) ++ encry_mode = SW_ENCRY_HW_DECRY; ++ else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _TRUE)) ++ encry_mode = SW_CONTROL; ++ ++ #endif ++ ++ *(u8*)poid_par_priv->information_buf = encry_mode; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_encryption_ctrl_hdl: QUERY encry_mode=0x%x\n", ++ encry_mode)); ++ } ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct sta_info *psta = NULL; ++ UCHAR *macaddr; ++ ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = ETH_ALEN; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ macaddr = (UCHAR *) poid_par_priv->information_buf ; ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ++ ("OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); ++ ++ if (psta == NULL) { // the sta have been in sta_info_queue => do nothing ++ psta = rtw_alloc_stainfo(&Adapter->stapriv, macaddr); ++ ++ if (psta == NULL) { ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("Can't alloc sta_info when OID_RT_PRO_ADD_STA_INFO\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } else { //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_err_, ++ ("Error: OID_RT_PRO_ADD_STA_INFO: sta has been in sta_hash_queue \n")); ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct sta_info *psta = NULL; ++ UCHAR *macaddr; ++ ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = ETH_ALEN; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ macaddr = (UCHAR *) poid_par_priv->information_buf ; ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ++ ("+OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); ++ ++ psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); ++ if (psta != NULL) { ++ _enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); ++ rtw_free_stainfo(Adapter, psta); ++ _exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); ++ } ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++#if 0 ++#include ++static u32 mp_query_drv_var(_adapter *padapter, u8 offset, u32 var) ++{ ++#ifdef CONFIG_SDIO_HCI ++ ++ if (offset == 1) { ++ u16 tmp_blk_num; ++ tmp_blk_num = rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM); ++ RT_TRACE(_module_mp_, _drv_err_, ("Query Information, mp_query_drv_var SDIO_RX0_RDYBLK_NUM=0x%x adapter_to_dvobj(padapter)->rxblknum=0x%x\n", tmp_blk_num, adapter_to_dvobj(padapter)->rxblknum)); ++ if (adapter_to_dvobj(padapter)->rxblknum != tmp_blk_num) { ++ RT_TRACE(_module_mp_,_drv_err_, ("Query Information, mp_query_drv_var call recv rx\n")); ++ // sd_recv_rxfifo(padapter); ++ } ++ } ++ ++#if 0 ++ if(offset <=100){ //For setting data rate and query data rate ++ if(offset==100){ //For query data rate ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): query rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); ++ var=padapter->registrypriv.tx_rate; ++ ++ } ++ else if(offset<0x1d){ //For setting data rate ++ padapter->registrypriv.tx_rate=offset; ++ var=padapter->registrypriv.tx_rate; ++ padapter->registrypriv.use_rate=_TRUE; ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): set rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); ++ } ++ else{ //not use the data rate ++ padapter->registrypriv.use_rate=_FALSE; ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) out of rate range\n",offset)); ++ } ++ } ++ else if (offset<=110){ //for setting debug level ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d) for set debug level\n",offset)); ++ if(offset==110){ //For query data rate ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): query dbg level=0x%.2x \n",offset,padapter->registrypriv.dbg_level)); ++ padapter->registrypriv.dbg_level=GlobalDebugLevel; ++ var=padapter->registrypriv.dbg_level; ++ } ++ else if(offset<110 && offset>100){ ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): set dbg level=0x%.2x \n",offset,offset-100)); ++ padapter->registrypriv.dbg_level=GlobalDebugLevel=offset-100; ++ var=padapter->registrypriv.dbg_level; ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_alert_, (" mp_query_drv_var(_drv_alert_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_crit_, (" mp_query_drv_var(_drv_crit_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_err_, (" mp_query_drv_var(_drv_err_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_warning_, (" mp_query_drv_var(_drv_warning_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_notice_, (" mp_query_drv_var(_drv_notice_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_info_, (" mp_query_drv_var(_drv_info_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_debug_, (" mp_query_drv_var(_drv_debug_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ ++ } ++ } ++ else if(offset >110 &&offset <116){ ++ if(115==offset){ ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): query TRX access type: [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); ++ } ++ else { ++ switch(offset){ ++ case 111: ++ adapter_to_dvobj(padapter)->tx_block_mode=1; ++ adapter_to_dvobj(padapter)->rx_block_mode=1; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); ++ break; ++ case 112: ++ adapter_to_dvobj(padapter)->tx_block_mode=1; ++ adapter_to_dvobj(padapter)->rx_block_mode=0; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); ++ break; ++ case 113: ++ adapter_to_dvobj(padapter)->tx_block_mode=0; ++ adapter_to_dvobj(padapter)->rx_block_mode=1; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); ++ break; ++ case 114: ++ adapter_to_dvobj(padapter)->tx_block_mode=0; ++ adapter_to_dvobj(padapter)->rx_block_mode=0; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset, adapter_to_dvobj(padapter)->tx_block_mode, adapter_to_dvobj(padapter)->rx_block_mode)); ++ break; ++ default : ++ break; ++ ++ } ++ ++ } ++ ++ } ++ else if(offset>=127){ ++ u64 prnt_dbg_comp; ++ u8 chg_idx; ++ u64 tmp_dbg_comp; ++ chg_idx=offset-0x80; ++ tmp_dbg_comp=BIT(chg_idx); ++ prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; ++ RT_TRACE(_module_mp_, _drv_emerg_, (" 1: mp_query_drv_var: offset(%d;0x%x):for dbg conpoment prnt_dbg_comp=0x%.16x GlobalDebugComponents=0x%.16x padapter->registrypriv.dbg_component=0x%.16x\n",offset,offset,prnt_dbg_comp,GlobalDebugComponents,padapter->registrypriv.dbg_component)); ++ if(offset==127){ ++ // prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; ++ var=(u32)(padapter->registrypriv.dbg_component); ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) \n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ ++ } ++ else{ ++ RT_TRACE(0xffffffff, _drv_emerg_, ("3: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_,("3-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx));// ("3-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment=0x%x chg_idx=%d or0x%x BIT(chg_idx[%d]=0x%x)\n",offset,offset,prnt_dbg_comp,chg_idx,chg_idx,(chg_idx),tmp_dbg_comp) ++ prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("3-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ ++ if(GlobalDebugComponents&tmp_dbg_comp){ ++ //this bit is already set, now clear it ++ GlobalDebugComponents=GlobalDebugComponents&(~tmp_dbg_comp); ++ } ++ else{ ++ //this bit is not set, now set it. ++ GlobalDebugComponents =GlobalDebugComponents|tmp_dbg_comp; ++ } ++ RT_TRACE(0xffffffff, _drv_emerg_, ("4: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("4-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_emerg_, ("0: mp_query_drv_var(_module_rtl871x_xmit_c_:0): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,prnt_dbg_comp)); ++ RT_TRACE(_module_xmit_osdep_c_, _drv_emerg_, ("1: mp_query_drv_var(_module_xmit_osdep_c_:1): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_emerg_, ("2: mp_query_drv_var(_module_rtl871x_recv_c_:2): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_recv_osdep_c_, _drv_emerg_, ("3: mp_query_drv_var(_module_recv_osdep_c_:3): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_emerg_, ("4: mp_query_drv_var(_module_rtl871x_mlme_c_:4): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_mlme_osdep_c_, _drv_emerg_, (" 5:mp_query_drv_var(_module_mlme_osdep_c_:5): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_emerg_, ("6: mp_query_drv_var(_module_rtl871x_sta_mgt_c_:6): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_emerg_, ("7: mp_query_drv_var(_module_rtl871x_cmd_c_:7): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_cmd_osdep_c_, _drv_emerg_, ("8: mp_query_drv_var(_module_cmd_osdep_c_:8): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_io_c_, _drv_emerg_, ("9: mp_query_drv_var(_module_rtl871x_io_c_:9): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_io_osdep_c_, _drv_emerg_, ("10: mp_query_drv_var(_module_io_osdep_c_:10): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_os_intfs_c_, _drv_emerg_, ("11: mp_query_drv_var(_module_os_intfs_c_:11): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_security_c_, _drv_emerg_, ("12: mp_query_drv_var(_module_rtl871x_security_c_:12): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_emerg_, ("13: mp_query_drv_var(_module_rtl871x_eeprom_c_:13): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hal_init_c_, _drv_emerg_, ("14: mp_query_drv_var(_module_hal_init_c_:14): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_, ("15: mp_query_drv_var(_module_hci_hal_init_c_:15): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_emerg_, ("16: mp_query_drv_var(_module_rtl871x_ioctl_c_:16): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_emerg_, ("17: mp_query_drv_var(_module_rtl871x_ioctl_set_c_:17): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_emerg_, ("18: mp_query_drv_var(_module_rtl871x_ioctl_query_c_:18): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_emerg_, ("19: mp_query_drv_var(_module_rtl871x_pwrctrl_c_:19): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("20: mp_query_drv_var(_module_hci_intfs_c_:20): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("21: mp_query_drv_var(_module_hci_ops_c_:21): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_osdep_service_c_, _drv_emerg_, ("22: mp_query_drv_var(_module_osdep_service_c_:22): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_mp_, _drv_emerg_, ("23: mp_query_drv_var(_module_mp_:23): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ("24: mp_query_drv_var(_module_hci_ops_os_c_:24): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ var=(u32)(GlobalDebugComponents); ++ //GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, (" ==mp_query_drv_var(_module_mp_): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ ++ } ++ } ++ else{ ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) >110\n",offset)); ++ } ++#endif ++#endif ++ ++ return var; ++} ++#endif ++ ++NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ DR_VARIABLE_STRUCT *pdrv_var; ++ ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = sizeof(DR_VARIABLE_STRUCT); ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Query Information, OID_RT_PRO_QUERY_DR_VARIABLE\n")); ++ ++ pdrv_var = (struct _DR_VARIABLE_STRUCT_ *)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ pdrv_var->variable = mp_query_drv_var(Adapter, pdrv_var->offset, pdrv_var->variable); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_query_dr_variable_hdl: offset=0x%x valule=0x%x\n", ++ pdrv_var->offset, pdrv_var->variable)); ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_rx_packet_type_hdl...................\n")); ++ ++ if (poid_par_priv->information_buf_len < sizeof (UCHAR)) { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ *poid_par_priv->bytes_needed = sizeof(UCHAR); ++ return status; ++ } ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ Adapter->mppriv.rx_with_status = *(UCHAR *) poid_par_priv->information_buf; ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n",\ ++ Adapter->mppriv.rx_with_status)); ++ ++ //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); ++ //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ ++ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); ++ ++ } ++ else { ++ *(UCHAR *) poid_par_priv->information_buf = Adapter->mppriv.rx_with_status; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n", \ ++ Adapter->mppriv.rx_with_status)); ++ ++ //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); ++ //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ ++ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); ++ } ++#endif ++ ++ return NDIS_STATUS_SUCCESS; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ PEFUSE_ACCESS_STRUCT pefuse; ++ u8 *data; ++ u16 addr = 0, cnts = 0, max_available_size = 0; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(EFUSE_ACCESS_STRUCT)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; ++ addr = pefuse->start_addr; ++ cnts = pefuse->cnts; ++ data = pefuse->data; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_read_efuse_hd: buf_len=%ld addr=%d cnts=%d\n", ++ poid_par_priv->information_buf_len, addr, cnts)); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: parameter error!\n")); ++ return NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (rtw_efuse_access(Adapter, _FALSE, addr, cnts, data) == _FAIL) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: rtw_efuse_access FAIL!\n")); ++ status = NDIS_STATUS_FAILURE; ++ } else ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ PEFUSE_ACCESS_STRUCT pefuse; ++ u8 *data; ++ u16 addr = 0, cnts = 0, max_available_size = 0; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; ++ addr = pefuse->start_addr; ++ cnts = pefuse->cnts; ++ data = pefuse->data; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_write_efuse_hdl: buf_len=%ld addr=0x%04x cnts=%d\n", ++ poid_par_priv->information_buf_len, addr, cnts)); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_write_efuse_hdl: parameter error")); ++ return NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (rtw_efuse_access(Adapter, _TRUE, addr, cnts, data) == _FAIL) ++ status = NDIS_STATUS_FAILURE; ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ PPGPKT_STRUCT ppgpkt; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++// RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_rw_efuse_pgpkt_hdl\n")); ++ ++ *poid_par_priv->bytes_rw = 0; ++ ++ if (poid_par_priv->information_buf_len < sizeof(PGPKT_STRUCT)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ ppgpkt = (PPGPKT_STRUCT)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ { ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_rw_efuse_pgpkt_hdl: Read offset=0x%x\n",\ ++ ppgpkt->offset)); ++ ++ Efuse_PowerSwitch(Adapter, _FALSE, _TRUE); ++ if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, _FALSE) == _TRUE) ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ else ++ status = NDIS_STATUS_FAILURE; ++ Efuse_PowerSwitch(Adapter, _FALSE, _FALSE); ++ } else { ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_rw_efuse_pgpkt_hdl: Write offset=0x%x word_en=0x%x\n",\ ++ ppgpkt->offset, ppgpkt->word_en)); ++ ++ Efuse_PowerSwitch(Adapter, _TRUE, _TRUE); ++ if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, _FALSE) == _TRUE) ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ else ++ status = NDIS_STATUS_FAILURE; ++ Efuse_PowerSwitch(Adapter, _TRUE, _FALSE); ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_rw_efuse_pgpkt_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u16 size; ++ u8 ret; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf = size; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } else ++ status = NDIS_STATUS_FAILURE; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ *(u32*)poid_par_priv->information_buf = efuse_GetMaxSize(Adapter); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_get_efuse_max_size_hdl: size=%d status=0x%08X\n", ++ *(int*)poid_par_priv->information_buf, status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_efuse_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ status = oid_rt_pro_read_efuse_hdl(poid_par_priv); ++ else ++ status = oid_rt_pro_write_efuse_hdl(poid_par_priv); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_efuse_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u8 *data; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ u16 mapLen=0; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_efuse_map_hdl\n")); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ *poid_par_priv->bytes_rw = 0; ++ ++ if (poid_par_priv->information_buf_len < mapLen) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ data = (u8*)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_efuse_map_hdl: READ\n")); ++ ++ if (rtw_efuse_map_read(Adapter, 0, mapLen, data) == _SUCCESS) ++ *poid_par_priv->bytes_rw = mapLen; ++ else { ++ RT_TRACE(_module_mp_, _drv_err_, ++ ("oid_rt_pro_efuse_map_hdl: READ fail\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } else { ++ // SET_OID ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_efuse_map_hdl: WRITE\n")); ++ ++ if (rtw_efuse_map_write(Adapter, 0, mapLen, data) == _SUCCESS) ++ *poid_par_priv->bytes_rw = mapLen; ++ else { ++ RT_TRACE(_module_mp_, _drv_err_, ++ ("oid_rt_pro_efuse_map_hdl: WRITE fail\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_efuse_map_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ ++ u32 crystal_cap = 0; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf);//4 ++ if (crystal_cap > 0xf) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Adapter->mppriv.curr_crystalcap = crystal_cap; ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ SetCrystalCap(Adapter); ++ _irqlevel_changed_(&oldirql,RAISE); ++ ++_func_exit_; ++ ++#endif ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u8 rx_pkt_type; ++// u32 rcr_val32; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++// PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_set_rx_packet_type_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ rx_pkt_type = *((u8*)poid_par_priv->information_buf);//4 ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("rx_pkt_type: %x\n",rx_pkt_type )); ++#if 0 ++ _irqlevel_changed_(&oldirql, LOWER); ++#if 0 ++ rcr_val8 = rtw_read8(Adapter, 0x10250048);//RCR ++ rcr_val8 &= ~(RCR_AB|RCR_AM|RCR_APM|RCR_AAP); ++ ++ if(rx_pkt_type == RX_PKT_BROADCAST){ ++ rcr_val8 |= (RCR_AB | RCR_ACRC32 ); ++ } ++ else if(rx_pkt_type == RX_PKT_DEST_ADDR){ ++ rcr_val8 |= (RCR_AAP| RCR_AM |RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_PHY_MATCH){ ++ rcr_val8 |= (RCR_APM|RCR_ACRC32); ++ } ++ else{ ++ rcr_val8 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ } ++ rtw_write8(padapter, 0x10250048,rcr_val8); ++#else ++ rcr_val32 = rtw_read32(padapter, RCR);//RCR = 0x10250048 ++ rcr_val32 &= ~(RCR_CBSSID|RCR_AB|RCR_AM|RCR_APM|RCR_AAP); ++#if 0 ++ if(rx_pkt_type == RX_PKT_BROADCAST){ ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_DEST_ADDR){ ++ //rcr_val32 |= (RCR_CBSSID|RCR_AAP|RCR_AM|RCR_ACRC32); ++ rcr_val32 |= (RCR_CBSSID|RCR_APM|RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_PHY_MATCH){ ++ rcr_val32 |= (RCR_APM|RCR_ACRC32); ++ //rcr_val32 |= (RCR_AAP|RCR_ACRC32); ++ } ++ else{ ++ rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ } ++#else ++ switch (rx_pkt_type) ++ { ++ case RX_PKT_BROADCAST : ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ break; ++ case RX_PKT_DEST_ADDR : ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ break; ++ case RX_PKT_PHY_MATCH: ++ rcr_val32 |= (RCR_APM|RCR_ACRC32); ++ break; ++ default: ++ rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ break; ++ } ++ ++ if (rx_pkt_type == RX_PKT_DEST_ADDR) { ++ padapter->mppriv.check_mp_pkt = 1; ++ } else { ++ padapter->mppriv.check_mp_pkt = 0; ++ } ++#endif ++ rtw_write32(padapter, RCR, rcr_val32); ++ ++#endif ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ u32 txagc; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ txagc = *(u32*)poid_par_priv->information_buf; ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_set_tx_agc_offset_hdl: 0x%08x\n", txagc)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetTxAGCOffset(Adapter, txagc); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ struct mp_priv *pmppriv = &Adapter->mppriv; ++ u32 type; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf; ++ ++ if (_LOOPBOOK_MODE_ == type) { ++ pmppriv->mode = type; ++ set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc ++ RT_TRACE(_module_mp_, _drv_info_, ("test mode change to loopback mode:0x%08x.\n", get_fwstate(pmlmepriv))); ++ } else if (_2MAC_MODE_ == type){ ++ pmppriv->mode = type; ++ _clr_fwstate_(pmlmepriv, WIFI_MP_LPBK_STATE); ++ RT_TRACE(_module_mp_, _drv_info_, ("test mode change to 2mac mode:0x%08x.\n", get_fwstate(pmlmepriv))); ++ } else ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PMP_XMIT_PARM pparm; ++ PADAPTER padapter; ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+%s\n", __func__)); ++ ++ pparm = (PMP_XMIT_PARM)poid_par_priv->information_buf; ++ padapter = (PADAPTER)poid_par_priv->adapter_context; ++ pmp_priv = &padapter->mppriv; ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) { ++ pparm->enable = !pmp_priv->tx.stop; ++ pparm->count = pmp_priv->tx.sended; ++ } else { ++ if (pparm->enable == 0) { ++ pmp_priv->tx.stop = 1; ++ } else if (pmp_priv->tx.stop == 1) { ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = pparm->count; ++ pmp_priv->tx.payload = pparm->payload_type; ++ pattrib = &pmp_priv->tx.attrib; ++ pattrib->pktlen = pparm->length; ++ _rtw_memcpy(pattrib->dst, pparm->da, ETH_ALEN); ++ SetPacketTx(padapter); ++ } else ++ return NDIS_STATUS_FAILURE; ++ } ++ ++ return NDIS_STATUS_SUCCESS; ++} ++ ++#if 0 ++unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ unsigned char *pframe, *pmp_pkt; ++ struct ethhdr *pethhdr; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ int llc_sz, payload_len; ++ struct mp_xmit_frame *pxframe= NULL; ++ struct mp_xmit_packet *pmp_xmitpkt = (struct mp_xmit_packet*)param; ++ u8 addr3[] = {0x02, 0xE0, 0x4C, 0x87, 0x66, 0x55}; ++ ++// DBG_871X("+mp_ioctl_xmit_packet_hdl\n"); ++ ++ pxframe = alloc_mp_xmitframe(&padapter->mppriv); ++ if (pxframe == NULL) ++ { ++ DEBUG_ERR(("Can't alloc pmpframe %d:%s\n", __LINE__, __FILE__)); ++ return -1; ++ } ++ ++ //mp_xmit_pkt ++ payload_len = pmp_xmitpkt->len - 14; ++ pmp_pkt = (unsigned char*)pmp_xmitpkt->mem; ++ pethhdr = (struct ethhdr *)pmp_pkt; ++ ++ //DBG_871X("payload_len=%d, pkt_mem=0x%x\n", pmp_xmitpkt->len, (void*)pmp_xmitpkt->mem); ++ ++ //DBG_871X("pxframe=0x%x\n", (void*)pxframe); ++ //DBG_871X("pxframe->mem=0x%x\n", (void*)pxframe->mem); ++ ++ //update attribute ++ pattrib = &pxframe->attrib; ++ memset((u8 *)(pattrib), 0, sizeof (struct pkt_attrib)); ++ pattrib->pktlen = pmp_xmitpkt->len; ++ pattrib->ether_type = ntohs(pethhdr->h_proto); ++ pattrib->hdrlen = 24; ++ pattrib->nr_frags = 1; ++ pattrib->priority = 0; ++#ifndef CONFIG_MP_LINUX ++ if(IS_MCAST(pethhdr->h_dest)) ++ pattrib->mac_id = 4; ++ else ++ pattrib->mac_id = 5; ++#else ++ pattrib->mac_id = 5; ++#endif ++ ++ // ++ memset(pxframe->mem, 0 , WLANHDR_OFFSET); ++ pframe = (u8 *)(pxframe->mem) + WLANHDR_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ SetFrameSubType(pframe, WIFI_DATA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, pethhdr->h_dest, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pethhdr->h_source, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr3, addr3, ETH_ALEN); ++ ++ pwlanhdr->seq_ctl = 0; ++ pframe += pattrib->hdrlen; ++ ++ llc_sz= rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ ++ _rtw_memcpy(pframe, (void*)(pmp_pkt+14), payload_len); ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + llc_sz + payload_len; ++ ++ DEBUG_INFO(("issuing mp_xmit_frame, tx_len=%d, ether_type=0x%x\n", pattrib->last_txcmdsz, pattrib->ether_type)); ++ xmit_mp_frame(padapter, pxframe); ++ ++ return _SUCCESS; ++} ++#endif ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#ifdef PLATFORM_OS_XP ++ _irqL oldirql; ++#endif ++ u8 bpwrup; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_SDIO_HCI ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++#endif ++#endif ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("\n ===> Setoid_rt_set_power_down_hdl.\n")); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ bpwrup = *(u8 *)poid_par_priv->information_buf; ++ //CALL the power_down function ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_SDIO_HCI ++ dev_power_down(padapter,bpwrup); ++#endif ++#endif ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ //DEBUG_ERR(("\n <=== Query OID_RT_PRO_READ_REGISTER. ++ // Add:0x%08x Width:%d Value:0x%08x\n",RegRWStruct->offset,RegRWStruct->width,RegRWStruct->value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++//#ifdef PLATFORM_OS_XP ++// _irqL oldirql; ++//#endif ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if (poid_par_priv->information_buf_len < sizeof(u32)) { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("\n ===> oid_rt_get_power_mode_hdl.\n")); ++ ++// _irqlevel_changed_(&oldirql, LOWER); ++ *(int*)poid_par_priv->information_buf = Adapter->registrypriv.low_power ? POWER_LOW : POWER_NORMAL; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++// _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_p2p.c +@@ -0,0 +1,5370 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_P2P_C_ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_P2P ++ ++int rtw_p2p_is_channel_list_ok( u8 desired_ch, u8* ch_list, u8 ch_cnt ) ++{ ++ int found = 0, i = 0; ++ ++ for( i = 0; i < ch_cnt; i++ ) ++ { ++ if ( ch_list[ i ] == desired_ch ) ++ { ++ found = 1; ++ break; ++ } ++ } ++ return( found ); ++} ++ ++int is_any_client_associated(_adapter *padapter) ++{ ++ return padapter->stapriv.asoc_list_cnt ? _TRUE : _FALSE; ++} ++ ++static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u32 len=0; ++ u16 attr_len = 0; ++ u8 tmplen, *pdata_attr, *pstart, *pcur; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = pwdinfo->padapter; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); ++ ++ pstart = pdata_attr; ++ pcur = pdata_attr; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //look up sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ ++ if(psta->is_p2p_device) ++ { ++ tmplen = 0; ++ ++ pcur++; ++ ++ //P2P device address ++ _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); ++ pcur += ETH_ALEN; ++ ++ //P2P interface address ++ _rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN); ++ pcur += ETH_ALEN; ++ ++ *pcur = psta->dev_cap; ++ pcur++; ++ ++ //*(u16*)(pcur) = cpu_to_be16(psta->config_methods); ++ RTW_PUT_BE16(pcur, psta->config_methods); ++ pcur += 2; ++ ++ _rtw_memcpy(pcur, psta->primary_dev_type, 8); ++ pcur += 8; ++ ++ *pcur = psta->num_of_secdev_type; ++ pcur++; ++ ++ _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8); ++ pcur += psta->num_of_secdev_type*8; ++ ++ if(psta->dev_name_len>0) ++ { ++ //*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); ++ pcur += 2; ++ ++ //*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); ++ RTW_PUT_BE16(pcur, psta->dev_name_len); ++ pcur += 2; ++ ++ _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); ++ pcur += psta->dev_name_len; ++ } ++ ++ ++ tmplen = (u8)(pcur-pstart); ++ ++ *pstart = (tmplen-1); ++ ++ attr_len += tmplen; ++ ++ //pstart += tmplen; ++ pstart = pcur; ++ ++ } ++ ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ if(attr_len>0) ++ { ++ len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); ++ } ++ ++ rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); ++ ++ return len; ++ ++} ++ ++static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_DISC_REQUEST; ++ u8 dialogToken=0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ //there is no IE in this P2P action frame ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_DEVDISC_RESP; ++ u8 p2pie[8] = { 0x00 }; ++ u32 p2pielen = 0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P public action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //Build P2P IE ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // P2P_ATTR_STATUS ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method) ++{ ++ _adapter *padapter = pwdinfo->padapter; ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = frame_body[7]; // The Dialog Token of provisioning discovery request frame. ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_RESP; ++ u8 wpsie[ 100 ] = { 0x00 }; ++ u8 wpsielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ wpsielen = 0; ++ // WPS OUI ++ //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(wpsie, WPSOUI); ++ wpsielen += 4; ++ ++#if 0 ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++#endif ++ ++ // Config Method ++ // Type: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); ++ wpsielen += 2; ++ ++ // Length: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ RTW_PUT_BE16(wpsie + wpsielen, 0x0002); ++ wpsielen += 2; ++ ++ // Value: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); ++ RTW_PUT_BE16(wpsie + wpsielen, config_method); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PRESENCE_RESPONSE; ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u8 noa_attr_content[32] = { 0x00 }; ++ u32 p2pielen = 0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //Add P2P IE header ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ //Add Status attribute in P2P IE ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); ++ ++ //Add NoA attribute in P2P IE ++ noa_attr_content[0] = 0x1;//index ++ noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters ++ ++ //todo: Notice of Absence Descriptor(s) ++ ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); ++ ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u16 capability=0; ++ u32 len=0, p2pielen = 0; ++ ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ ++ // According to the P2P Specification, the beacon frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. P2P Device ID ++ // 3. Notice of Absence ( NOA ) ++ ++ // P2P Capability ATTR ++ // Type: ++ // Length: ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ // Group Capability Bitmap, 1 byte ++ capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; ++ capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ capability |= (P2P_GRPCAP_GROUP_FORMATION<<8); ++ ++ capability = cpu_to_le16(capability); ++ ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability); ++ ++ ++ // P2P Device ID ATTR ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); ++ ++ ++ // Notice of Absence ATTR ++ // Type: ++ // Length: ++ // Value: ++ ++ //go_add_noa_attr(pwdinfo); ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++#ifdef CONFIG_WFD ++u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the beacon frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ ++ if ( P2P_ROLE_GO == pwdinfo->role ) ++ { ++ if ( is_any_client_associated( pwdinfo->padapter ) ) ++ { ++ // WFD primary sink + WiFi Direct mode + WSD (WFD Service Discovery) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD ); ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD (WFD Service Discovery) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ } ++ ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ } ++ ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ ++ if ( 1 == pwdinfo->wfd_tdls_enable ) ++ { ++ // WFD primary sink + available for WFD session + WiFi TDLS mode + WSC ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | ++ WFD_DEVINFO_SESSION_AVAIL | ++ WFD_DEVINFO_WSD | ++ WFD_DEVINFO_PC_TDLS ); ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSC ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | ++ WFD_DEVINFO_SESSION_AVAIL | ++ WFD_DEVINFO_WSD ); ++ } ++ ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe response frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ // 4. WFD Session Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ ++ if ( _TRUE == pwdinfo->session_available ) ++ { ++ if ( P2P_ROLE_GO == pwdinfo->role ) ++ { ++ if ( is_any_client_associated( pwdinfo->padapter ) ) ++ { ++ if ( pwdinfo->wfd_tdls_enable ) ++ { ++ // TDLS mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ else ++ { ++ // WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ } ++ else ++ { ++ if ( pwdinfo->wfd_tdls_enable ) ++ { ++ // available for WFD session + TDLS mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ else ++ { ++ // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ } ++ } ++ else ++ { ++ if ( pwdinfo->wfd_tdls_enable ) ++ { ++ // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ else ++ { ++ ++ // available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ } ++ } ++ else ++ { ++ if ( pwdinfo->wfd_tdls_enable ) ++ { ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD |WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ else ++ { ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_HDCP_SUPPORT); ++ } ++ ++ } ++ ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ if ( P2P_ROLE_GO == pwdinfo->role ) ++ { ++ // WFD Session Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); ++ wfdielen += 2; ++ ++ // Todo: to add the list of WFD device info descriptor in WFD group. ++ ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_TDLS ++ if ( ( tunneled == 0 ) && ( padapter->pbuddy_adapter->wdinfo.wfd_tdls_enable == 1 ) ) ++ { ++ // Alternative MAC Address ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ALTER_MAC; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, ETH_ALEN ); ++ wfdielen += 2; ++ ++ // Value: ++ // Alternative MAC Address ++ _rtw_memcpy( wfdie + wfdielen, &padapter->pbuddy_adapter->eeprompriv.mac_addr[ 0 ], ETH_ALEN ); ++ // This mac address is used to make the WFD session when TDLS is enable. ++ ++ wfdielen += ETH_ALEN; ++ } ++#endif // CONFIG_TDLS ++#endif // CONFIG_CONCURRENT_MODE ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = NULL; ++ struct mlme_priv *pmlmepriv = NULL; ++ struct wifi_display_info *pwfd_info = NULL; ++ ++ // WFD OUI ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ return 0; ++ } ++ ++ padapter = pwdinfo->padapter; ++ pmlmepriv = &padapter->mlmepriv; ++ pwfd_info = padapter->wdinfo.wfd_info; ++ ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode + WSD ( WFD Service Discovery ) + WFD Session Available ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_WSD | WFD_DEVINFO_SESSION_AVAIL); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ if ( P2P_ROLE_GO == pwdinfo->role ) ++ { ++ // WFD Session Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); ++ wfdielen += 2; ++ ++ // Todo: to add the list of WFD device info descriptor in WFD group. ++ ++ } ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ if ( P2P_ROLE_GO == pwdinfo->role ) ++ { ++ // WFD Session Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); ++ wfdielen += 2; ++ ++ // Todo: to add the list of WFD device info descriptor in WFD group. ++ ++ } ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL | WFD_DEVINFO_WSD ); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0007); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ // MAC Addr. ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++#endif //CONFIG_WFD ++ ++u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++#ifdef CONFIG_INTEL_WIDI ++ struct mlme_priv *pmlmepriv = &(pwdinfo->padapter->mlmepriv); ++ u8 zero_array_check[L2SDTA_SERVICE_VE_LEN] = { 0x00 }; ++ u8 widi_version = 0, i = 0; ++ ++ if( _rtw_memcmp( pmlmepriv->sa_ext, zero_array_check, L2SDTA_SERVICE_VE_LEN ) == _FALSE ) ++ { ++ widi_version = 35; ++ } ++ else if( pmlmepriv->num_p2p_sdt != 0 ) ++ { ++ widi_version = 40; ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20100907 ++ // According to the P2P Specification, the probe response frame should contain 5 P2P attributes ++ // 1. P2P Capability ++ // 2. Extended Listen Timing ++ // 3. Notice of Absence ( NOA ) ( Only GO needs this ) ++ // 4. Device Info ++ // 5. Group Info ( Only GO need this ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION; ++ ++ p2pielen++; ++ } ++ else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) ) ++ { ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; ++ else ++ p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; ++ ++ } ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0004); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); ++ p2pielen += 2; ++ ++ // Availability Interval ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); ++ p2pielen += 2; ++ ++ ++ // Notice of Absence ATTR ++ // Type: ++ // Length: ++ // Value: ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ //go_add_noa_attr(pwdinfo); ++ } ++ ++ // Device Info ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++#ifdef CONFIG_INTEL_WIDI ++ if( widi_version == 35 ) ++ { ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 + pwdinfo->device_name_len); ++ } ++ else if( widi_version == 40 ) ++ { ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + 8 * pmlmepriv->num_p2p_sdt + pwdinfo->device_name_len); ++ } ++ else ++#endif //CONFIG_INTEL_WIDI ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); ++ p2pielen += 2; ++ ++#ifdef CONFIG_INTEL_WIDI ++ if( widi_version == 40 ) ++ { ++ // Primary Device Type ++ // Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_cid ); ++ p2pielen += 2; ++ ++ // OUI ++ //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_pdt_scid); ++ p2pielen += 2; ++ } ++ else ++#endif //CONFIG_INTEL_WIDI ++ { ++ // Primary Device Type ++ // Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); ++ p2pielen += 2; ++ ++ // OUI ++ //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); ++ p2pielen += 2; ++ } ++ ++ // Number of Secondary Device Types ++#ifdef CONFIG_INTEL_WIDI ++ if( widi_version == 35 ) ++ { ++ p2pie[ p2pielen++ ] = 0x01; ++ ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_DISPLAYS); ++ p2pielen += 2; ++ ++ RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); ++ p2pielen += 4; ++ ++ RTW_PUT_BE16(p2pie + p2pielen, P2P_SCID_WIDI_CONSUMER_SINK); ++ p2pielen += 2; ++ } ++ else if( widi_version == 40 ) ++ { ++ p2pie[ p2pielen++ ] = pmlmepriv->num_p2p_sdt; ++ for( ; i < pmlmepriv->num_p2p_sdt; i++ ) ++ { ++ RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_cid[i]); ++ p2pielen += 2; ++ ++ RTW_PUT_BE32(p2pie + p2pielen, INTEL_DEV_TYPE_OUI); ++ p2pielen += 4; ++ ++ RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]); ++ p2pielen += 2; ++ } ++ } ++ else ++#endif //CONFIG_INTEL_WIDI ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); ++ p2pielen += 2; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ // Group Info ATTR ++ // Type: ++ // Length: ++ // Value: ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); ++ } ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = DMP_P2P_DEVCAP_SUPPORT; ++ ++ // Group Capability Bitmap, 1 byte ++ if ( pwdinfo->persistent_supported ) ++ p2pie[ p2pielen++ ] = P2P_GRPCAP_PERSISTENT_GROUP | DMP_P2P_GRPCAP_SUPPORT; ++ else ++ p2pie[ p2pielen++ ] = DMP_P2P_GRPCAP_SUPPORT; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) ++ { ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); ++ } ++ else ++ { ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); ++ } ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_MULIT_MEDIA ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_MULIT_MEDIA); ++ p2pielen += 2; ++ ++ // OUI ++ //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_MEDIA_SERVER ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_MEDIA_SERVER); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); ++ p2pielen += 2; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ // Added by Albert 2011/05/19 ++ // In this case, the pdev_raddr is the device address of the group owner. ++ ++ // P2P Group ID ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); ++ RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ _rtw_memcpy( p2pie + p2pielen, pssid, ussidlen ); ++ p2pielen += ussidlen; ++ ++ } ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++ ++u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // According to the P2P Specification, the Association response frame should contain 2 P2P attributes ++ // 1. Status ++ // 2. Extended Listen Timing (optional) ++ ++ ++ // Status ATTR ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); ++ ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ // Length: ++ // Value: ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u32 len=0; ++ ++ return len; ++} ++ ++u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *p; ++ u32 ret=_FALSE; ++ u8 *p2pie; ++ u32 p2pielen = 0; ++ int ssid_len=0, rate_cnt = 0; ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ if ( rate_cnt <= 4 ) ++ { ++ int i, g_rate =0; ++ ++ for( i = 0; i < rate_cnt; i++ ) ++ { ++ if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x04 ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x0B ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x16 ) ) ++ { ++ g_rate = 1; ++ } ++ } ++ ++ if ( g_rate == 0 ) ++ { ++ // There is no OFDM rate included in SupportedRates IE of this probe request frame ++ // The driver should response this probe request. ++ return ret; ++ } ++ } ++ else ++ { ++ // rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. ++ // We should proceed the following check for this probe request. ++ } ++ ++ // Added comments by Albert 20100906 ++ // There are several items we should check here. ++ // 1. This probe request frame must contain the P2P IE. (Done) ++ // 2. This probe request frame must contain the wildcard SSID. (Done) ++ // 3. Wildcard BSSID. (Todo) ++ // 4. Destination Address. ( Done in mgt_dispatcher function ) ++ // 5. Requested Device Type in WSC IE. (Todo) ++ // 6. Device ID attribute in P2P IE. (Todo) ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ ssid_len &= 0xff; // Just last 1 byte is valid for ssid len of the probe request ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if((p2pie=rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen))) ++ { ++ if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 )) ++ { ++ //todo: ++ //Check Requested Device Type attributes in WSC IE. ++ //Check Device ID attribute in P2P IE ++ ++ ret = _TRUE; ++ } ++ else if ( (p != NULL) && ( ssid_len == 0 ) ) ++ { ++ ret = _TRUE; ++ } ++ } ++ else ++ { ++ //non -p2p device ++ } ++ ++ } ++ ++ ++ return ret; ++ ++} ++ ++u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) ++{ ++ u8 status_code = P2P_STATUS_SUCCESS; ++ u8 *pbuf, *pattr_content=NULL; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ unsigned short frame_type, ie_offset=0; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ return P2P_STATUS_FAIL_REQUEST_UNABLE; ++ ++ frame_type = GetFrameSubType(pframe); ++ if (frame_type == WIFI_ASSOCREQ) ++ { ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ } ++ else // WIFI_REASSOCREQ ++ { ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ } ++ ++ ies = pframe + WLAN_HDR_A3_LEN + ie_offset; ++ ies_len = len - WLAN_HDR_A3_LEN - ie_offset; ++ ++ p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); ++ ++ if ( !p2p_ie ) ++ { ++ DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); ++ status_code = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ else ++ { ++ DBG_8192C( "[%s] P2P IE Found!!\n", __FUNCTION__ ); ++ } ++ ++ while ( p2p_ie ) ++ { ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ psta->dev_cap = cap_attr&0xff; ++ } ++ ++ //Check Extended Listen Timing ATTR ++ ++ ++ //Check P2P Device Info ATTR ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)) ++ { ++ DBG_8192C( "[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__ ); ++ pattr_content = pbuf = rtw_zmalloc(attr_contentlen); ++ if(pattr_content) ++ { ++ u8 num_of_secdev_type; ++ u16 dev_name_len; ++ ++ ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen); ++ ++ _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);//P2P Device Address ++ ++ pattr_content += ETH_ALEN; ++ ++ _rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods ++ psta->config_methods = be16_to_cpu(psta->config_methods); ++ ++ pattr_content += 2; ++ ++ _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); ++ ++ pattr_content += 8; ++ ++ num_of_secdev_type = *pattr_content; ++ pattr_content += 1; ++ ++ if(num_of_secdev_type==0) ++ { ++ psta->num_of_secdev_type = 0; ++ } ++ else ++ { ++ u32 len; ++ ++ psta->num_of_secdev_type = num_of_secdev_type; ++ ++ len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8); ++ ++ _rtw_memcpy(psta->secdev_types_list, pattr_content, len); ++ ++ pattr_content += (num_of_secdev_type*8); ++ } ++ ++ ++ //dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); ++ psta->dev_name_len=0; ++ if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content)) ++ { ++ dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2)); ++ ++ psta->dev_name_len = (sizeof(psta->dev_name)dev_name):dev_name_len; ++ ++ _rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len); ++ } ++ ++ rtw_mfree(pbuf, attr_contentlen); ++ ++ } ++ ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ return status_code; ++ ++} ++ ++u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *frame_body; ++ u8 status, dialogToken; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = pwdinfo->padapter; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *p2p_ie; ++ u32 p2p_ielen = 0; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ dialogToken = frame_body[7]; ++ status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; ++ ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ u8 groupid[ 38 ] = { 0x00 }; ++ u8 dev_addr[ETH_ALEN] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) ++ { ++ if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && ++ _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) ++ { ++ attr_contentlen=0; ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //look up sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) && ++ _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) ++ { ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ //issue GO Discoverability Request ++ issue_group_disc_req(pwdinfo, psta->hwaddr); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ status = P2P_STATUS_SUCCESS; ++ ++ break; ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ ++ } ++ ++ } ++ ++ ++ //issue Device Discoverability Response ++ issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); ++ ++ ++ return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE; ++ ++} ++ ++u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ return _TRUE; ++} ++ ++u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 *frame_body; ++ u8 *wpsie; ++ uint wps_ielen = 0, attr_contentlen = 0; ++ u16 uconfig_method = 0; ++ ++ ++ frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ if ( (wpsie=rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) ++ { ++ if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) ) ++ { ++ uconfig_method = be16_to_cpu( uconfig_method ); ++ switch( uconfig_method ) ++ { ++ case WPS_CM_DISPLYA: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ break; ++ } ++ case WPS_CM_LABEL: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 ); ++ break; ++ } ++ case WPS_CM_PUSH_BUTTON: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ break; ++ } ++ case WPS_CM_KEYPAD: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ break; ++ } ++ } ++ issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method); ++ } ++ } ++ DBG_871X( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); ++ return _TRUE; ++ ++} ++ ++u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) ++{ ++ ++ return _TRUE; ++} ++ ++u8 rtw_p2p_get_peer_ch_list(struct wifidirect_info *pwdinfo, u8 *ch_content, u8 ch_cnt, u8 *peer_ch_list) ++{ ++ u8 i = 0, j = 0; ++ u8 temp = 0; ++ u8 ch_no = 0; ++ ch_content += 3; ++ ch_cnt -= 3; ++ ++ while( ch_cnt > 0) ++ { ++ ch_content += 1; ++ ch_cnt -= 1; ++ temp = *ch_content; ++ for( i = 0 ; i < temp ; i++, j++ ) ++ { ++ peer_ch_list[j] = *( ch_content + 1 + i ); ++ } ++ ch_content += (temp + 1); ++ ch_cnt -= (temp + 1); ++ ch_no += temp ; ++ } ++ ++ return ch_no; ++} ++ ++u8 rtw_p2p_check_peer_oper_ch(struct mlme_ext_priv *pmlmeext, u8 ch) ++{ ++ u8 i = 0; ++ ++ for( i = 0; i < pmlmeext->max_chan_nums; i++ ) ++ { ++ if ( pmlmeext->channel_set[ i ].ChannelNum == ch ) ++ { ++ return _SUCCESS; ++ } ++ } ++ ++ return _FAIL; ++} ++ ++u8 rtw_p2p_ch_inclusion(struct mlme_ext_priv *pmlmeext, u8 *peer_ch_list, u8 peer_ch_num, u8 *ch_list_inclusioned) ++{ ++ int i = 0, j = 0, temp = 0; ++ u8 ch_no = 0; ++ ++ for( i = 0; i < peer_ch_num; i++ ) ++ { ++ for( j = temp; j < pmlmeext->max_chan_nums; j++ ) ++ { ++ if( *( peer_ch_list + i ) == pmlmeext->channel_set[ j ].ChannelNum ) ++ { ++ ch_list_inclusioned[ ch_no++ ] = *( peer_ch_list + i ); ++ temp = j; ++ break; ++ } ++ } ++ } ++ ++ return ch_no; ++} ++ ++u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ _adapter *padapter = pwdinfo->padapter; ++ u8 result = P2P_STATUS_SUCCESS; ++ u32 p2p_ielen = 0, wps_ielen = 0; ++ u8 * ies; ++ u32 ies_len; ++ u8 *p2p_ie; ++ u8 *wpsie; ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++#endif // CONFIG_TDLS ++#endif // CONFIG_WFD ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = pwdinfo->padapter->pbuddy_adapter; ++ struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif ++ ++ if ( (wpsie=rtw_get_wps_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) ++ { ++ // Commented by Kurt 20120113 ++ // If some device wants to do p2p handshake without sending prov_disc_req ++ // We have to get peer_req_cm from here. ++ if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) ++ { ++ rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ } ++ else ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ } ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ return( result ); ++ } ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) ++ { ++ result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INFOR_NOREADY); ++ return( result ); ++ } ++ ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ if ( !p2p_ie ) ++ { ++ DBG_871X( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ ++ while ( p2p_ie ) ++ { ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ u8 ch_content[100] = { 0x00 }; ++ uint ch_cnt = 0; ++ u8 peer_ch_list[100] = { 0x00 }; ++ u8 peer_ch_num = 0; ++ u8 ch_list_inclusioned[100] = { 0x00 }; ++ u8 ch_num_inclusioned = 0; ++ u16 cap_attr; ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); ++ ++ //Check P2P Capability ATTR ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*)&attr_contentlen) ) ++ { ++ cap_attr = le16_to_cpu(cap_attr); ++ ++#if defined(CONFIG_WFD) && defined(CONFIG_TDLS) ++ if(!(cap_attr & P2P_GRPCAP_INTRABSS) ) ++ ptdlsinfo->ap_prohibited = _TRUE; ++#endif //defined(CONFIG_WFD) && defined(CONFIG_TDLS) ++ } ++ ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) ++ { ++ DBG_871X( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); ++ pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. ++ ++ if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ // Try to match the tie breaker value ++ if ( pwdinfo->intent == P2P_MAX_INTENT ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; ++ } ++ else ++ { ++ if ( attr_content & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ } ++ else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ // Store the group id information. ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ } ++ } ++ ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) ++ { ++ if ( attr_contentlen != ETH_ALEN ) ++ { ++ _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); ++ } ++ } ++ ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) ) ++ { ++ peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, ch_content, ch_cnt, peer_ch_list); ++ ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned); ++ ++ if( ch_num_inclusioned == 0) ++ { ++ DBG_871X( "[%s] No common channel in channel list!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_NO_COMMON_CH; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if ( !rtw_p2p_is_channel_list_ok( pwdinfo->operating_channel, ++ ch_list_inclusioned, ch_num_inclusioned) ) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_NO_COMMON_CH; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ else ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; ++ attr_contentlen = 0; ++ ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) ++ { ++ peer_operating_ch = operatingch_info[4]; ++ } ++ ++ if ( rtw_p2p_is_channel_list_ok( peer_operating_ch, ++ ch_list_inclusioned, ch_num_inclusioned) ) ++ { ++ /** ++ * Change our operating channel as peer's for compatibility. ++ */ ++ pwdinfo->operating_channel = peer_operating_ch; ++ DBG_871X( "[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); ++ } ++ else ++ { ++ // Take first channel of ch_list_inclusioned as operating channel ++ pwdinfo->operating_channel = ch_list_inclusioned[0]; ++ DBG_871X( "[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); ++ } ++ } ++ ++ } ++ } ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++ ++#ifdef CONFIG_WFD ++ // Added by Albert 20110823 ++ // Try to get the TCP port information when receiving the negotiation request. ++ if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ } ++#endif // CONFIG_WFD ++ ++ return( result ); ++} ++ ++u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ _adapter *padapter = pwdinfo->padapter; ++ u8 result = P2P_STATUS_SUCCESS; ++ u32 p2p_ielen, wps_ielen; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++#endif // CONFIG_TDLS ++#endif // CONFIG_WFD ++ ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ // Be able to know which one is the P2P GO and which one is P2P client. ++ ++ if ( rtw_get_wps_ie( ies, ies_len, NULL, &wps_ielen) ) ++ { ++ ++ } ++ else ++ { ++ DBG_871X( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ if ( !p2p_ie ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ } ++ else ++ { ++ ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ u8 operatingch_info[5] = { 0x00 }; ++ uint ch_cnt = 0; ++ u8 ch_content[100] = { 0x00 }; ++ u8 groupid[ 38 ]; ++ u16 cap_attr; ++ u8 peer_ch_list[100] = { 0x00 }; ++ u8 peer_ch_num = 0; ++ u8 ch_list_inclusioned[100] = { 0x00 }; ++ u8 ch_num_inclusioned = 0; ++ ++ while ( p2p_ie ) // Found the P2P IE. ++ { ++ ++ //Check P2P Capability ATTR ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*)&attr_contentlen) ) ++ { ++ cap_attr = le16_to_cpu(cap_attr); ++#if defined(CONFIG_WFD) && defined(CONFIG_TDLS) ++ if(!(cap_attr & P2P_GRPCAP_INTRABSS) ) ++ ptdlsinfo->ap_prohibited = _TRUE; ++#endif //defined(CONFIG_WFD) && defined(CONFIG_TDLS) ++ } ++ ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ // Do nothing. ++ } ++ else ++ { ++ if ( P2P_STATUS_FAIL_INFO_UNAVAILABLE == attr_content ) { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_INFOR_NOREADY); ++ } else { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ result = attr_content; ++ break; ++ } ++ } ++ ++ // Try to get the peer's interface address ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) ++ { ++ if ( attr_contentlen != ETH_ALEN ) ++ { ++ _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); ++ } ++ } ++ ++ // Try to get the peer's intent and tie breaker value. ++ attr_content = 0x00; ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) ++ { ++ DBG_871X( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); ++ pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. ++ ++ if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ // Try to match the tie breaker value ++ if ( pwdinfo->intent == P2P_MAX_INTENT ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ else ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ if ( attr_content & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ } ++ else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ // Store the group id information. ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ ++ } ++ } ++ ++ // Try to get the operation channel information ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) ++ { ++ DBG_871X( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); ++ pwdinfo->peer_operating_ch = operatingch_info[4]; ++ } ++ ++ // Try to get the channel list information ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, pwdinfo->channel_list_attr, &pwdinfo->channel_list_attr_len ) ) ++ { ++ DBG_871X( "[%s] channel list attribute found, len = %d\n", __FUNCTION__, pwdinfo->channel_list_attr_len ); ++ ++ peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list); ++ ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned); ++ ++ if( ch_num_inclusioned == 0) ++ { ++ DBG_871X( "[%s] No common channel in channel list!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_NO_COMMON_CH; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if ( !rtw_p2p_is_channel_list_ok( pwdinfo->operating_channel, ++ ch_list_inclusioned, ch_num_inclusioned) ) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ DBG_871X( "[%s] desired channel NOT Found!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_NO_COMMON_CH; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ else ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ u8 operatingch_info[5] = { 0x00 }, peer_operating_ch = 0; ++ attr_contentlen = 0; ++ ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) ++ { ++ peer_operating_ch = operatingch_info[4]; ++ } ++ ++ if ( rtw_p2p_is_channel_list_ok( peer_operating_ch, ++ ch_list_inclusioned, ch_num_inclusioned) ) ++ { ++ /** ++ * Change our operating channel as peer's for compatibility. ++ */ ++ pwdinfo->operating_channel = peer_operating_ch; ++ DBG_871X( "[%s] Change op ch to %02x as peer's\n", __FUNCTION__, pwdinfo->operating_channel); ++ } ++ else ++ { ++ // Take first channel of ch_list_inclusioned as operating channel ++ pwdinfo->operating_channel = ch_list_inclusioned[0]; ++ DBG_871X( "[%s] Change op ch to %02x\n", __FUNCTION__, pwdinfo->operating_channel); ++ } ++ } ++ ++ } ++ } ++ ++ } ++ else ++ { ++ DBG_871X( "[%s] channel list attribute not found!\n", __FUNCTION__); ++ } ++ ++ // Try to get the group id information if peer is GO ++ attr_contentlen = 0; ++ _rtw_memset( groupid, 0x00, 38 ); ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) ++ { ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++ ++ } ++ ++#ifdef CONFIG_WFD ++ // Added by Albert 20111122 ++ // Try to get the TCP port information when receiving the negotiation response. ++ if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ } ++#endif // CONFIG_WFD ++ ++ return( result ); ++ ++} ++ ++u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ u8 result = P2P_STATUS_SUCCESS; ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ while ( p2p_ie ) // Found the P2P IE. ++ { ++ u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; ++ u8 groupid[ 38 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ pwdinfo->negotiation_dialog_token = 1; ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ result = attr_content; ++ ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ u8 bcancelled = 0; ++ ++ _cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled ); ++ ++ // Commented by Albert 20100911 ++ // Todo: Need to handle the case which both Intents are the same. ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ // Have to compare the Tie Breaker ++ if ( pwdinfo->peer_intent & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(pwdinfo->padapter , _FW_LINKED ) ) ++ { ++ // Switch back to the AP channel soon. ++ _set_timer( &pwdinfo->ap_p2p_switch_timer, 100 ); ++ } ++#endif ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ } ++ ++ // Try to get the group id information ++ attr_contentlen = 0; ++ _rtw_memset( groupid, 0x00, 38 ); ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) ++ { ++ DBG_871X( "[%s] Ssid = %s, ssidlen = %d\n", __FUNCTION__, &groupid[ETH_ALEN], (u32)strlen(&groupid[ETH_ALEN]) ); ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); ++ } ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) ++ { ++ DBG_871X( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); ++ pwdinfo->peer_operating_ch = operatingch_info[4]; ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ return( result ); ++} ++ ++u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *frame_body; ++ u8 dialogToken=0; ++ u8 status = P2P_STATUS_SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ dialogToken = frame_body[6]; ++ ++ //todo: check NoA attribute ++ ++ issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); ++ ++ return _TRUE; ++} ++ ++void find_phase_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid; ++ _irqL irqL; ++ u8 _status = 0; ++ ++_func_enter_; ++ ++ _rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); ++ ssid.SsidLength = P2P_WILDCARD_SSID_LEN; ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _status = rtw_sitesurvey_cmd(padapter, &ssid, 1, NULL, 0); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++_func_exit_; ++} ++ ++void p2p_concurrent_handler( _adapter* padapter ); ++ ++void restore_p2p_state_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP)) ++ { ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); ++ } ++ } ++#endif ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ p2p_concurrent_handler( padapter ); ++#else ++ // In the P2P client mode, the driver should not switch back to its listen channel ++ // because this P2P client should stay at the operating channel of P2P GO. ++ set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++#endif ++ } ++_func_exit_; ++} ++ ++void pre_tx_invitereq_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ u8 val8 = 1; ++_func_enter_; ++ ++ set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++_func_exit_; ++} ++ ++void pre_tx_provdisc_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ u8 val8 = 1; ++_func_enter_; ++ ++ set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++_func_exit_; ++} ++ ++void pre_tx_negoreq_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ u8 val8 = 1; ++_func_enter_; ++ ++ set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_CONCURRENT_MODE ++void p2p_concurrent_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ //_adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ //struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ //struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ //struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ u8 val8; ++_func_enter_; ++ ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ pwdinfo->operating_channel = pbuddy_mlmeext->cur_channel; ++ ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ DBG_871X("%s, switch ch back to buddy's cur_channel=%d\n", __func__, pbuddy_mlmeext->cur_channel); ++ ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); ++ } ++ else if( pwdinfo->driver_interface == DRIVER_WEXT ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ // Now, the driver stays on the AP's channel. ++ // If the pwdinfo->ext_listen_period = 0, that means the P2P listen state is not available on listen channel. ++ if ( pwdinfo->ext_listen_period > 0 ) ++ { ++ DBG_8192C( "[%s] P2P_STATE_IDLE, ext_listen_period = %d\n", __FUNCTION__, pwdinfo->ext_listen_period ); ++ ++ if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel ) ++ { ++ // Will switch to listen channel so that need to send the NULL data with PW bit to AP. ++ issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ val8 = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ // Todo: To check the value of pwdinfo->ext_listen_period is equal to 0 or not. ++ _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period ); ++ } ++ } ++ else if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN) || ++ rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL) || ++ ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _FALSE ) || ++ rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ) ) ++ { ++ // Now, the driver is in the listen state of P2P mode. ++ DBG_8192C( "[%s] P2P_STATE_IDLE, ext_listen_interval = %d\n", __FUNCTION__, pwdinfo->ext_listen_interval ); ++ ++ // Commented by Albert 2012/11/01 ++ // If the AP's channel is the same as the listen channel, we should still be in the listen state ++ // Other P2P device is still able to find this device out even this device is in the AP's channel. ++ // So, configure this device to be able to receive the probe request frame and set it to listen state. ++ if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel ) ++ { ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ val8 = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); ++ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); ++ } ++ ++ // Todo: To check the value of pwdinfo->ext_listen_interval is equal to 0 or not. ++ _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_interval ); ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) ++ { ++ // The driver had finished the P2P handshake successfully. ++ val8 = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500); ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ val8 = 1; ++ set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING) && pwdinfo->nego_req_info.benable == _TRUE) ++ { ++ val8 = 1; ++ set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) && pwdinfo->invitereq_info.benable == _TRUE) ++ { ++ /* ++ val8 = 1; ++ set_channel_bwmode(padapter, , HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p(padapter, NULL); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ */ ++ } ++ } ++ } ++ else ++ { ++ set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++_func_exit_; ++} ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++static void ro_ch_handler(_adapter *padapter) ++{ ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ u8 ch, bw, offset; ++_func_enter_; ++ ++ if (rtw_get_ch_setting_union(padapter, &ch, &bw, &offset) != 0) { ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to linked union - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ } ++ else if (wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && pwdinfo->listen_channel) { ++ ch = pwdinfo->listen_channel; ++ bw = HT_CHANNEL_WIDTH_20; ++ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to listen ch - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ } ++ else { ++ ch = pcfg80211_wdinfo->restore_channel; ++ bw = HT_CHANNEL_WIDTH_20; ++ offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" back to restore ch - ch:%u, bw:%u, offset:%u\n", ++ FUNC_ADPT_ARG(padapter), ch, bw, offset); ++ } ++ ++ set_channel_bwmode(padapter, ch, offset, bw); ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ ++ DBG_871X("cfg80211_remain_on_channel_expired\n"); ++ ++ rtw_cfg80211_remain_on_channel_expired(padapter, ++ pcfg80211_wdinfo->remain_on_ch_cookie, ++ &pcfg80211_wdinfo->remain_on_ch_channel, ++ pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL); ++ ++_func_exit_; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void ro_ch_timer_process (void *FunctionContext) ++#else ++static void ro_ch_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, cfg80211_wdinfo.remain_on_ch_timer); ++#endif ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(adapter->rtw_wdev); ++ ++ //printk("%s \n", __FUNCTION__); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++#endif ++ ++ p2p_protocol_wk_cmd( adapter, P2P_RO_CH_WK); ++} ++ ++static void rtw_change_p2pie_op_ch(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) ++{ ++ u8 *ies, *p2p_ie; ++ u32 ies_len, p2p_ielen; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ while ( p2p_ie ) { ++ u32 attr_contentlen = 0; ++ u8 *pattr = NULL; ++ ++ //Check P2P_ATTR_OPERATING_CH ++ attr_contentlen = 0; ++ pattr = NULL; ++ if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) ++ { ++ *(pattr+4) = ch; ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++} ++ ++static void rtw_change_p2pie_ch_list(_adapter *padapter, const u8 *frame_body, u32 len, u8 ch) ++{ ++ u8 *ies, *p2p_ie; ++ u32 ies_len, p2p_ielen; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ while (p2p_ie) { ++ u32 attr_contentlen = 0; ++ u8 *pattr = NULL; ++ ++ //Check P2P_ATTR_CH_LIST ++ if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) { ++ int i; ++ u32 num_of_ch; ++ u8 *pattr_temp = pattr + 3 ; ++ ++ attr_contentlen -= 3; ++ ++ while (attr_contentlen>0) { ++ num_of_ch = *(pattr_temp+1); ++ ++ for(i=0; ipbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ u8 buddy_ch = pbuddy_mlmeext->cur_channel; ++ ++ ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ while (p2p_ie) { ++ u32 attr_contentlen = 0; ++ u8 *pattr = NULL; ++ ++ //Check P2P_ATTR_CH_LIST ++ if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) { ++ int i; ++ u32 num_of_ch; ++ u8 *pattr_temp = pattr + 3 ; ++ ++ attr_contentlen -= 3; ++ ++ while (attr_contentlen>0) { ++ num_of_ch = *(pattr_temp+1); ++ ++ for(i=0; ipbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ u8 buddy_ch = pbuddy_mlmeext->cur_channel; ++ ++ ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ while (p2p_ie) { ++ u32 attr_contentlen = 0; ++ u8 *pattr = NULL; ++ ++ //Check P2P_ATTR_OPERATING_CH ++ attr_contentlen = 0; ++ pattr = NULL; ++ if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) { ++ if (*(pattr+4) == buddy_ch) { ++ DBG_871X(FUNC_ADPT_FMT" op_ch fit buddy_ch:%u\n", FUNC_ADPT_ARG(padapter), buddy_ch); ++ fit = _TRUE; ++ break; ++ } ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++#endif ++ return fit; ++} ++ ++static void rtw_cfg80211_adjust_p2pie_channel(_adapter *padapter, const u8 *frame_body, u32 len) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 *ies, *p2p_ie; ++ u32 ies_len, p2p_ielen; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ ies = (u8*)(frame_body + _PUBLIC_ACTION_IE_OFFSET_); ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ while ( p2p_ie ) ++ { ++ u32 attr_contentlen = 0; ++ u8 *pattr = NULL; ++ ++ //Check P2P_ATTR_CH_LIST ++ if((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, (uint*)&attr_contentlen))!=NULL) ++ { ++ int i; ++ u32 num_of_ch; ++ u8 *pattr_temp = pattr + 3 ; ++ ++ attr_contentlen -= 3; ++ ++ while(attr_contentlen>0) ++ { ++ num_of_ch = *(pattr_temp+1); ++ ++ for(i=0; icur_channel;//forcing to the same channel ++ ++ pattr_temp += (2+num_of_ch); ++ attr_contentlen -= (2+num_of_ch); ++ } ++ } ++ ++ //Check P2P_ATTR_OPERATING_CH ++ attr_contentlen = 0; ++ pattr = NULL; ++ if((pattr = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, (uint*)&attr_contentlen))!=NULL) ++ { ++ *(pattr+4) = pbuddy_mlmeext->cur_channel;//forcing to the same channel ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++#endif ++} ++ ++#ifdef CONFIG_WFD ++void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32* len) ++{ ++ unsigned char *frame_body; ++ u8 category, action, OUI_Subtype, dialogToken=0; ++ u32 wfdielen = 0; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ ++ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ category = frame_body[0]; ++ ++ if(category == RTW_WLAN_CATEGORY_PUBLIC) ++ { ++ action = frame_body[1]; ++ if (action == ACT_PUBLIC_VENDOR ++ && _rtw_memcmp(frame_body+2, P2P_OUI, 4) == _TRUE ++ ) ++ { ++ OUI_Subtype = frame_body[6]; ++ dialogToken = frame_body[7]; ++ switch( OUI_Subtype )//OUI Subtype ++ { ++ case P2P_GO_NEGO_REQ: ++ { ++ wfdielen = build_nego_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_GO_NEGO_RESP: ++ { ++ wfdielen = build_nego_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_GO_NEGO_CONF: ++ { ++ wfdielen = build_nego_confirm_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_INVIT_REQ: ++ { ++ wfdielen = build_invitation_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_INVIT_RESP: ++ { ++ wfdielen = build_invitation_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_DEVDISC_REQ: ++ break; ++ case P2P_DEVDISC_RESP: ++ ++ break; ++ case P2P_PROVISION_DISC_REQ: ++ { ++ wfdielen = build_provdisc_req_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ case P2P_PROVISION_DISC_RESP: ++ { ++ wfdielen = build_provdisc_resp_wfd_ie( &padapter->wdinfo, buf + ( *len ) ); ++ (*len) += wfdielen; ++ break; ++ } ++ default: ++ ++ break; ++ } ++ ++ } ++ ++ } ++ else if(category == RTW_WLAN_CATEGORY_P2P) ++ { ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); ++#endif ++ ++ switch(OUI_Subtype) ++ { ++ case P2P_NOTICE_OF_ABSENCE: ++ ++ break; ++ case P2P_PRESENCE_REQUEST: ++ ++ break; ++ case P2P_PRESENCE_RESPONSE: ++ ++ break; ++ case P2P_GO_DISC_REQUEST: ++ ++ break; ++ default: ++ ++ break; ++ } ++ ++ } ++ else ++ { ++ DBG_871X("%s, action frame category=%d\n", __func__, category); ++ //is_p2p_frame = (-1); ++ } ++ ++ return; ++} ++#endif ++ ++u8 *dump_p2p_attr_ch_list(u8 *p2p_ie, uint p2p_ielen, u8 *buf, u32 buf_len) ++{ ++ uint attr_contentlen = 0; ++ u8 *pattr = NULL; ++ int w_sz = 0; ++ u8 ch_cnt = 0; ++ u8 ch_list[40]; ++ bool continuous = _FALSE; ++ ++ if ((pattr=rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, NULL, &attr_contentlen))!=NULL) { ++ int i, j; ++ u32 num_of_ch; ++ u8 *pattr_temp = pattr + 3 ; ++ ++ attr_contentlen -= 3; ++ ++ _rtw_memset(ch_list, 0, 40); ++ ++ while (attr_contentlen>0) { ++ num_of_ch = *(pattr_temp+1); ++ ++ for(i=0; i=ch_cnt) ++ ch_list[ch_cnt++] = *(pattr_temp+2+i); ++ ++ } ++ ++ pattr_temp += (2+num_of_ch); ++ attr_contentlen -= (2+num_of_ch); ++ } ++ ++ for (j=0;j>1 == resp >>1) ++ return req&0x01 ? _TRUE : _FALSE; ++ else if (req>>1 > resp>>1) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) ++{ ++ int is_p2p_frame = (-1); ++ unsigned char *frame_body; ++ u8 category, action, OUI_Subtype, dialogToken=0; ++ u8 *p2p_ie = NULL; ++ uint p2p_ielen = 0; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ int status = -1; ++ u8 ch_list_buf[128] = {'\0'}; ++ int op_ch = -1; ++ int listen_ch = -1; ++ u8 intent = 0; ++ ++ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ category = frame_body[0]; ++ //just for check ++ if(category == RTW_WLAN_CATEGORY_PUBLIC) ++ { ++ action = frame_body[1]; ++ if (action == ACT_PUBLIC_VENDOR ++ && _rtw_memcmp(frame_body+2, P2P_OUI, 4) == _TRUE ++ ) ++ { ++ OUI_Subtype = frame_body[6]; ++ dialogToken = frame_body[7]; ++ is_p2p_frame = OUI_Subtype; ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_VENDOR, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ #endif ++ ++ p2p_ie = rtw_get_p2p_ie( ++ (u8 *)buf+sizeof(struct rtw_ieee80211_hdr_3addr)+_PUBLIC_ACTION_IE_OFFSET_, ++ len-sizeof(struct rtw_ieee80211_hdr_3addr)-_PUBLIC_ACTION_IE_OFFSET_, ++ NULL, &p2p_ielen); ++ ++ switch( OUI_Subtype )//OUI Subtype ++ { ++ u8 *cont; ++ uint cont_len; ++ case P2P_GO_NEGO_REQ: ++ { ++ struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; ++ ++ if (tx) { ++ #ifdef CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2 ++ if(pwdev_priv->provdisc_req_issued == _FALSE) { ++ rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); ++ pwdev_priv->provdisc_req_issued = _TRUE; ++ rtw_msleep_os(200); ++ } ++ #endif //CONFIG_DRV_ISSUE_PROV_REQ ++ ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ #endif ++ } ++ ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) ++ op_ch = *(cont+4); ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, NULL, &cont_len))) ++ listen_ch = *(cont+4); ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len))) ++ intent = *cont; ++ ++ if (nego_info->token != dialogToken) ++ rtw_wdev_nego_info_init(nego_info); ++ ++ _rtw_memcpy(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN); ++ nego_info->active = tx ? 1 : 0; ++ nego_info->token = dialogToken; ++ nego_info->req_op_ch = op_ch; ++ nego_info->req_listen_ch = listen_ch; ++ nego_info->req_intent = intent; ++ nego_info->state = 0; ++ ++ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); ++ DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d, intent:%u%s, listen_ch:%d, op_ch:%d, ch_list:%s\n", ++ (tx==_TRUE)?"Tx":"Rx", dialogToken, (intent>>1), intent&0x1 ? "+" : "-", listen_ch, op_ch, ch_list_buf); ++ ++ if (!tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED) ++ && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) ++ { ++ DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); ++ rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); ++ } ++ #endif ++ } ++ ++ break; ++ } ++ case P2P_GO_NEGO_RESP: ++ { ++ struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; ++ ++ if (tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ #endif ++ } ++ ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) ++ op_ch = *(cont+4); ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, NULL, &cont_len))) ++ intent = *cont; ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) ++ status = *cont; ++ ++ if (nego_info->token == dialogToken && nego_info->state == 0 ++ && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ++ ) { ++ nego_info->status = (status==-1) ? 0xff : status; ++ nego_info->rsp_op_ch= op_ch; ++ nego_info->rsp_intent = intent; ++ nego_info->state = 1; ++ if (status != 0) ++ nego_info->token = 0; /* init */ ++ } ++ ++ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); ++ DBG_871X("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d, intent:%u%s, status:%d, op_ch:%d, ch_list:%s\n", ++ (tx==_TRUE)?"Tx":"Rx", dialogToken, (intent>>1), intent&0x1 ? "+" : "-", status, op_ch, ch_list_buf); ++ ++ if (!tx) { ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED) ++ && rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) ++ { ++ DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); ++ rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); ++ } ++ #endif ++ } ++ ++ break; ++ } ++ case P2P_GO_NEGO_CONF: ++ { ++ struct rtw_wdev_nego_info* nego_info = &pwdev_priv->nego_info; ++ bool is_go = _FALSE; ++ ++ if (tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ #endif ++ } ++ ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) ++ op_ch = *(cont+4); ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) ++ status = *cont; ++ ++ if (nego_info->token == dialogToken && nego_info->state == 1 ++ && _rtw_memcmp(nego_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ++ ) { ++ nego_info->status = (status==-1) ? 0xff : status; ++ nego_info->conf_op_ch = (op_ch==-1) ? 0 : op_ch; ++ nego_info->state = 2; ++ ++ if (status == 0) { ++ if (rtw_p2p_nego_intent_compare(nego_info->req_intent, nego_info->rsp_intent) && tx) ++ is_go = _TRUE; ++ } ++ ++ nego_info->token = 0; /* init */ ++ } ++ ++ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); ++ DBG_871X("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n", ++ (tx==_TRUE)?"Tx":"Rx", dialogToken, status, op_ch, ch_list_buf); ++ ++ if (!tx) { ++ } ++ ++ break; ++ } ++ case P2P_INVIT_REQ: ++ { ++ struct rtw_wdev_invit_info* invit_info = &pwdev_priv->invit_info; ++ int flags = -1; ++ ++ if (tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ #endif ++ } ++ ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_INVITATION_FLAGS, NULL, &cont_len))) ++ flags = *cont; ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) ++ op_ch = *(cont+4); ++ ++ if (invit_info->token != dialogToken) ++ rtw_wdev_invit_info_init(invit_info); ++ ++ _rtw_memcpy(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN); ++ invit_info->active = tx ? 1 : 0; ++ invit_info->token = dialogToken; ++ invit_info->flags = (flags==-1) ? 0x0 : flags; ++ invit_info->req_op_ch= op_ch; ++ invit_info->state = 0; ++ ++ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); ++ DBG_871X("RTW_%s:P2P_INVIT_REQ, dialogToken=%d, flags:0x%02x, op_ch:%d, ch_list:%s\n", ++ (tx==_TRUE)?"Tx":"Rx", dialogToken, flags, op_ch, ch_list_buf); ++ ++ if (!tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) { ++ if (op_ch != -1 && rtw_chk_p2pie_op_ch_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" op_ch:%u has no intersect with buddy\n", FUNC_ADPT_ARG(padapter), op_ch); ++ rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); ++ } else if (rtw_chk_p2pie_ch_list_with_buddy(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)) == _FALSE) { ++ DBG_871X(FUNC_ADPT_FMT" ch_list has no intersect with buddy\n", FUNC_ADPT_ARG(padapter)); ++ rtw_change_p2pie_ch_list(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr), 0); ++ } ++ } ++ #endif ++ } ++ ++ break; ++ } ++ case P2P_INVIT_RESP: ++ { ++ struct rtw_wdev_invit_info* invit_info = &pwdev_priv->invit_info; ++ ++ if (tx) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED)) ++ rtw_cfg80211_adjust_p2pie_channel(padapter, frame_body, len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ #endif ++ } ++ ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len))) ++ { ++#ifdef CONFIG_P2P_INVITE_IOT ++ if(tx && *cont==7) ++ { ++ DBG_871X("TX_P2P_INVITE_RESP, status is no common channel, change to unknown group\n"); ++ *cont = 8; //unknow group status ++ } ++#endif //CONFIG_P2P_INVITE_IOT ++ status = *cont; ++ } ++ if ((cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, NULL, &cont_len))) ++ op_ch = *(cont+4); ++ ++ if (invit_info->token == dialogToken && invit_info->state == 0 ++ && _rtw_memcmp(invit_info->peer_mac, tx ? GetAddr1Ptr(buf) : GetAddr2Ptr(buf), ETH_ALEN) == _TRUE ++ ) { ++ invit_info->status = (status==-1) ? 0xff : status; ++ invit_info->rsp_op_ch= op_ch; ++ invit_info->state = 1; ++ invit_info->token = 0; /* init */ ++ } ++ ++ dump_p2p_attr_ch_list(p2p_ie, p2p_ielen, ch_list_buf, 128); ++ DBG_871X("RTW_%s:P2P_INVIT_RESP, dialogToken=%d, status:%d, op_ch:%d, ch_list:%s\n", ++ (tx==_TRUE)?"Tx":"Rx", dialogToken, status, op_ch, ch_list_buf); ++ ++ if (!tx) { ++ } ++ ++ break; ++ } ++ case P2P_DEVDISC_REQ: ++ DBG_871X("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_DEVDISC_RESP: ++ cont = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, NULL, &cont_len); ++ DBG_871X("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d, status:%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken, cont?*cont:-1); ++ break; ++ case P2P_PROVISION_DISC_REQ: ++ { ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 *p2p_ie; ++ uint p2p_ielen = 0; ++ uint contentlen = 0; ++ ++ DBG_871X("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ ++ //if(tx) ++ { ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ ++ if( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen))) ++ { ++ ++ if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) ++ { ++ pwdev_priv->provdisc_req_issued = _FALSE;//case: p2p_client join p2p GO ++ } ++ else ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("provdisc_req_issued is _TRUE\n"); ++ #endif //CONFIG_DEBUG_CFG80211 ++ pwdev_priv->provdisc_req_issued = _TRUE;//case: p2p_devices connection before Nego req. ++ } ++ ++ } ++ } ++ } ++ break; ++ case P2P_PROVISION_DISC_RESP: ++ DBG_871X("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ default: ++ DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", OUI_Subtype, dialogToken); ++ break; ++ } ++ ++ } ++ ++ } ++ else if(category == RTW_WLAN_CATEGORY_P2P) ++ { ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); ++ #endif ++ ++ is_p2p_frame = OUI_Subtype; ++ ++ switch(OUI_Subtype) ++ { ++ case P2P_NOTICE_OF_ABSENCE: ++ DBG_871X("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_PRESENCE_REQUEST: ++ DBG_871X("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_PRESENCE_RESPONSE: ++ DBG_871X("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_GO_DISC_REQUEST: ++ DBG_871X("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ default: ++ DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", OUI_Subtype, dialogToken); ++ break; ++ } ++ ++ } ++ else ++ { ++ DBG_871X("RTW_%s:action frame category=%d\n", (tx==_TRUE)?"TX":"RX", category); ++ } ++ ++ return is_p2p_frame; ++} ++ ++void rtw_init_cfg80211_wifidirect_info( _adapter* padapter) ++{ ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ _rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info) ); ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer( &pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter ); ++#else ++ timer_setup(&pcfg80211_wdinfo->remain_on_ch_timer, ro_ch_timer_process, 0); ++#endif ++} ++#endif //CONFIG_IOCTL_CFG80211 ++ ++void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType) ++{ ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++_func_enter_; ++ ++ switch(intCmdType) ++ { ++ case P2P_FIND_PHASE_WK: ++ { ++ find_phase_handler( padapter ); ++ break; ++ } ++ case P2P_RESTORE_STATE_WK: ++ { ++ restore_p2p_state_handler( padapter ); ++ break; ++ } ++ case P2P_PRE_TX_PROVDISC_PROCESS_WK: ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ p2p_concurrent_handler( padapter ); ++ } ++ else ++ { ++ pre_tx_provdisc_handler( padapter ); ++ } ++#else ++ pre_tx_provdisc_handler( padapter ); ++#endif ++ break; ++ } ++ case P2P_PRE_TX_INVITEREQ_PROCESS_WK: ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ p2p_concurrent_handler( padapter ); ++ } ++ else ++ { ++ pre_tx_invitereq_handler( padapter ); ++ } ++#else ++ pre_tx_invitereq_handler( padapter ); ++#endif ++ break; ++ } ++ case P2P_PRE_TX_NEGOREQ_PROCESS_WK: ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ p2p_concurrent_handler( padapter ); ++ } ++ else ++ { ++ pre_tx_negoreq_handler( padapter ); ++ } ++#else ++ pre_tx_negoreq_handler( padapter ); ++#endif ++ break; ++ } ++#ifdef CONFIG_P2P ++#ifdef CONFIG_CONCURRENT_MODE ++ case P2P_AP_P2P_CH_SWITCH_PROCESS_WK: ++ { ++ p2p_concurrent_handler( padapter ); ++ break; ++ } ++#endif ++#endif ++#ifdef CONFIG_IOCTL_CFG80211 ++ case P2P_RO_CH_WK: ++ { ++ ro_ch_handler( padapter ); ++ break; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ } ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_P2P_PS ++void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) ++{ ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 ++ u32 attr_contentlen = 0; ++ ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; ++ u8 noa_offset, noa_num, noa_index; ++ ++_func_enter_; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ return; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type != IFACE_PORT0) ++ return; ++#endif ++ if(IELength <= _BEACON_IE_OFFSET_) ++ return; ++ ++ ies = IEs + _BEACON_IE_OFFSET_; ++ ies_len = IELength - _BEACON_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); ++ ++ while(p2p_ie) ++ { ++ find_p2p = _TRUE; ++ // Get Notice of Absence IE. ++ if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) ++ { ++ find_p2p_ps = _TRUE; ++ noa_index = noa_attr[0]; ++ ++ if( (pwdinfo->p2p_ps_mode == P2P_PS_NONE) || ++ (noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting. ++ { ++ pwdinfo->noa_index = noa_index; ++ pwdinfo->opp_ps = noa_attr[1] >> 7; ++ pwdinfo->ctwindow = noa_attr[1] & 0x7F; ++ ++ noa_offset = 2; ++ noa_num = 0; ++ // NoA length should be n*(13) + 2 ++ if(attr_contentlen > 2) ++ { ++ while(noa_offset < attr_contentlen) ++ { ++ //_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); ++ pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; ++ noa_offset += 1; ++ ++ _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ noa_num++; ++ } ++ } ++ pwdinfo->noa_num = noa_num; ++ ++ if( pwdinfo->opp_ps == 1 ) ++ { ++ pwdinfo->p2p_ps_mode = P2P_PS_CTWINDOW; ++ // driver should wait LPS for entering CTWindow ++ if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); ++ } ++ } ++ else if( pwdinfo->noa_num > 0 ) ++ { ++ pwdinfo->p2p_ps_mode = P2P_PS_NOA; ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); ++ } ++ else if( pwdinfo->p2p_ps_mode > P2P_PS_NONE) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++ } ++ } ++ ++ break; // find target, just break. ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ if(find_p2p == _TRUE) ++ { ++ if( (pwdinfo->p2p_ps_mode > P2P_PS_NONE) && (find_p2p_ps == _FALSE) ) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++ } ++ } ++ ++_func_exit_; ++} ++ ++void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++_func_enter_; ++ ++ switch(p2p_ps_state) ++ { ++ case P2P_PS_DISABLE: ++ pwdinfo->p2p_ps_state = p2p_ps_state; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); ++ ++ pwdinfo->noa_index = 0; ++ pwdinfo->ctwindow = 0; ++ pwdinfo->opp_ps = 0; ++ pwdinfo->noa_num = 0; ++ pwdinfo->p2p_ps_mode = P2P_PS_NONE; ++ if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) ++ { ++ if(pwrpriv->smart_ps == 0) ++ { ++ pwrpriv->smart_ps = 2; ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); ++ } ++ } ++ break; ++ case P2P_PS_ENABLE: ++ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { ++ pwdinfo->p2p_ps_state = p2p_ps_state; ++ ++ if( pwdinfo->ctwindow > 0 ) ++ { ++ if(pwrpriv->smart_ps != 0) ++ { ++ pwrpriv->smart_ps = 0; ++ DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); ++ } ++ } ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); ++ } ++ break; ++ case P2P_PS_SCAN: ++ case P2P_PS_SCAN_DONE: ++ case P2P_PS_ALLSTASLEEP: ++ if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) { ++ pwdinfo->p2p_ps_state = p2p_ps_state; ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); ++ } ++ break; ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++#ifdef CONFIG_CONCURRENT_MODE ++ || (padapter->iface_type != IFACE_PORT0) ++#endif ++ ) ++ { ++ return res; ++ } ++ ++ if(enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; ++ pdrvextra_cmd_parm->type_size = p2p_ps_state; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ p2p_ps_wk_hdl(padapter, p2p_ps_state); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif // CONFIG_P2P_PS ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void reset_ch_sitesurvey_timer_process (void *FunctionContext) ++#else ++static void reset_ch_sitesurvey_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.reset_ch_sitesurvey); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ // Reset the operation channel information ++ pwdinfo->rx_invitereq_info.operation_ch[0] = 0; ++#ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.operation_ch[1] = 0; ++ pwdinfo->rx_invitereq_info.operation_ch[2] = 0; ++ pwdinfo->rx_invitereq_info.operation_ch[3] = 0; ++#endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void reset_ch_sitesurvey_timer_process2(void *FunctionContext) ++#else ++static void reset_ch_sitesurvey_timer_process2(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.reset_ch_sitesurvey2); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ // Reset the operation channel information ++ pwdinfo->p2p_info.operation_ch[0] = 0; ++#ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.operation_ch[1] = 0; ++ pwdinfo->p2p_info.operation_ch[2] = 0; ++ pwdinfo->p2p_info.operation_ch[3] = 0; ++#endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.scan_op_ch_only = 0; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void restore_p2p_state_timer_process (void *FunctionContext) ++#else ++static void restore_p2p_state_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.restore_p2p_state_timer); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK ); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void pre_tx_scan_timer_process (void *FunctionContext) ++#else ++static void pre_tx_scan_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *) FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.pre_tx_scan_timer); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 _status = 0; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ // Commented by Albert 20110805 ++ // Todo: Use the issuing probe request directly instead of using the rtw_sitesurvey_cmd!! ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) // the provision discovery request frame is trigger to send or not ++ { ++ p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK ); ++ //issue_probereq_p2p(adapter, NULL); ++ //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ } ++ else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ if ( _TRUE == pwdinfo->nego_req_info.benable ) ++ { ++ p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK ); ++ //issue_probereq_p2p(adapter, NULL); ++ //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ } ++ else if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ ) ) ++ { ++ if ( _TRUE == pwdinfo->invitereq_info.benable ) ++ { ++ p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_INVITEREQ_PROCESS_WK ); ++ } ++ } ++ else ++ { ++ DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void find_phase_timer_process (void *FunctionContext) ++#else ++static void find_phase_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.find_phase_timer); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ adapter->wdinfo.find_phase_state_exchange_cnt++; ++ ++ p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK ); ++} ++ ++#ifdef CONFIG_CONCURRENT_MODE ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void ap_p2p_switch_timer_process (void *FunctionContext) ++#else ++void ap_p2p_switch_timer_process(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, wdinfo.ap_p2p_switch_timer); ++#endif ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(adapter->rtw_wdev); ++#endif ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); ++#endif ++ ++ p2p_protocol_wk_cmd( adapter, P2P_AP_P2P_CH_SWITCH_PROCESS_WK ); ++} ++#endif ++ ++void reset_global_wifidirect_info( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo; ++ ++ pwdinfo = &padapter->wdinfo; ++ pwdinfo->persistent_supported = 0; ++ pwdinfo->session_available = _TRUE; ++ pwdinfo->wfd_tdls_enable = 0; ++ pwdinfo->wfd_tdls_weaksec = 0; ++} ++ ++#ifdef CONFIG_WFD ++int rtw_init_wifi_display_info(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct wifi_display_info *pwfd_info = &padapter->wfd_info; ++ ++ // Used in P2P and TDLS ++ pwfd_info->rtsp_ctrlport = 554; ++ pwfd_info->peer_rtsp_ctrlport = 0; // Reset to 0 ++ pwfd_info->wfd_enable = _FALSE; ++ pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; ++ pwfd_info->scan_result_type = SCAN_RESULT_P2P_ONLY; ++ ++ // Used in P2P ++ pwfd_info->peer_session_avail = _TRUE; ++ pwfd_info->wfd_pc = _FALSE; ++ ++ // Used in TDLS ++ _rtw_memset( pwfd_info->ip_address, 0x00, 4 ); ++ _rtw_memset( pwfd_info->peer_ip_address, 0x00, 4 ); ++ return res; ++ ++} ++#endif //CONFIG_WFD ++ ++void rtw_init_wifidirect_timers(_adapter* padapter) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter ); ++ _init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter ); ++ _init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter ); ++ _init_timer( &pwdinfo->reset_ch_sitesurvey, padapter->pnetdev, reset_ch_sitesurvey_timer_process, padapter ); ++ _init_timer( &pwdinfo->reset_ch_sitesurvey2, padapter->pnetdev, reset_ch_sitesurvey_timer_process2, padapter ); ++#ifdef CONFIG_CONCURRENT_MODE ++ _init_timer( &pwdinfo->ap_p2p_switch_timer, padapter->pnetdev, ap_p2p_switch_timer_process, padapter ); ++#endif ++#else ++ timer_setup(&pwdinfo->find_phase_timer, find_phase_timer_process, 0); ++ timer_setup(&pwdinfo->restore_p2p_state_timer, restore_p2p_state_timer_process, 0); ++ timer_setup(&pwdinfo->pre_tx_scan_timer, pre_tx_scan_timer_process, 0); ++ timer_setup(&pwdinfo->reset_ch_sitesurvey, reset_ch_sitesurvey_timer_process, 0); ++ timer_setup(&pwdinfo->reset_ch_sitesurvey2, reset_ch_sitesurvey_timer_process2, 0); ++#ifdef CONFIG_CONCURRENT_MODE ++ timer_setup(&pwdinfo->ap_p2p_switch_timer, ap_p2p_switch_timer_process, 0); ++#endif ++#endif ++} ++ ++void rtw_init_wifidirect_addrs(_adapter* padapter, u8 *dev_addr, u8 *iface_addr) ++{ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ ++ /*init device&interface address */ ++ if (dev_addr) { ++ _rtw_memcpy(pwdinfo->device_addr, dev_addr, ETH_ALEN); ++ } ++ if (iface_addr) { ++ _rtw_memcpy(pwdinfo->interface_addr, iface_addr, ETH_ALEN); ++ } ++#endif ++} ++ ++void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role) ++{ ++ struct wifidirect_info *pwdinfo; ++#ifdef CONFIG_WFD ++ struct wifi_display_info *pwfd_info = &padapter->wfd_info; ++#endif ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct wifidirect_info *pbuddy_wdinfo = NULL; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++ struct mlme_ext_priv *pbuddy_mlmeext = NULL; ++#endif ++ ++ pwdinfo = &padapter->wdinfo; ++ ++ pwdinfo->padapter = padapter; ++ ++ // 1, 6, 11 are the social channel defined in the WiFi Direct specification. ++ pwdinfo->social_chan[0] = 1; ++ pwdinfo->social_chan[1] = 6; ++ pwdinfo->social_chan[2] = 11; ++ pwdinfo->social_chan[3] = 0; // channel 0 for scanning ending in site survey function. ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (pbuddy_adapter) { ++ pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ } ++ ++ if ( ( check_buddy_fwstate(padapter, _FW_LINKED ) == _TRUE ) && ++ ( ( pbuddy_mlmeext->cur_channel == 1) || ( pbuddy_mlmeext->cur_channel == 6 ) || ( pbuddy_mlmeext->cur_channel == 11 ) ) ++ ) ++ { ++ // Use the AP's channel as the listen channel ++ // This will avoid the channel switch between AP's channel and listen channel. ++ pwdinfo->listen_channel = pbuddy_mlmeext->cur_channel; ++ } ++ else ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ // Use the channel 11 as the listen channel ++ pwdinfo->listen_channel = 11; ++ } ++ ++ if (role == P2P_ROLE_DEVICE) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) == _TRUE ) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE); ++ } ++ else ++ #endif ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ } ++ pwdinfo->intent = 1; ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); ++ } ++ else if (role == P2P_ROLE_CLIENT) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 1; ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ } ++ else if (role == P2P_ROLE_GO) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ } ++ ++// Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) ++ pwdinfo->support_rate[0] = 0x8c; // 6(B) ++ pwdinfo->support_rate[1] = 0x92; // 9(B) ++ pwdinfo->support_rate[2] = 0x18; // 12 ++ pwdinfo->support_rate[3] = 0x24; // 18 ++ pwdinfo->support_rate[4] = 0x30; // 24 ++ pwdinfo->support_rate[5] = 0x48; // 36 ++ pwdinfo->support_rate[6] = 0x60; // 48 ++ pwdinfo->support_rate[7] = 0x6c; // 54 ++ ++ _rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 ); ++ ++ _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); ++ pwdinfo->device_name_len = 0; ++ ++ _rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) ); ++ pwdinfo->invitereq_info.token = 3; // Token used for P2P invitation request frame. ++ ++ _rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) ); ++ pwdinfo->inviteresp_info.token = 0; ++ ++ pwdinfo->profileindex = 0; ++ _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); ++ ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ ++ pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1); ++ //DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); ++ ++ _rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) ); ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; ++ ++ _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); ++ ++ pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; ++ pwdinfo->negotiation_dialog_token = 1; ++ ++ _rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN ); ++ pwdinfo->nego_ssidlen = 0; ++ ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++#ifdef CONFIG_WFD ++ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC; ++ pwdinfo->wfd_info = pwfd_info; ++#else ++ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; ++#endif //CONFIG_WFD ++ pwdinfo->channel_list_attr_len = 0; ++ _rtw_memset( pwdinfo->channel_list_attr, 0x00, 100 ); ++ ++ _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 ); ++ _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 ); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++#ifdef CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_IOCTL_CFG80211 ++ pwdinfo->ext_listen_interval = 1000; //The interval to be available with legacy AP during p2p0-find/scan ++ pwdinfo->ext_listen_period = 3000; //The time period to be available for P2P during nego ++#else //!CONFIG_IOCTL_CFG80211 ++ //pwdinfo->ext_listen_interval = 3000; ++ //pwdinfo->ext_listen_period = 400; ++ pwdinfo->ext_listen_interval = 1000; ++ pwdinfo->ext_listen_period = 1000; ++#endif //!CONFIG_IOCTL_CFG80211 ++#endif ++ ++// Commented by Kurt 20130319 ++// For WiDi purpose: Use CFG80211 interface but controled WFD/RDS frame by driver itself. ++#ifdef CONFIG_IOCTL_CFG80211 ++ pwdinfo->driver_interface = DRIVER_CFG80211; ++#else ++ pwdinfo->driver_interface = DRIVER_WEXT; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ pwdinfo->wfd_tdls_enable = 0; ++ _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); ++ _rtw_memset( pwdinfo->p2p_peer_device_addr, 0x00, ETH_ALEN ); ++ ++ pwdinfo->rx_invitereq_info.operation_ch[0] = 0; ++ pwdinfo->rx_invitereq_info.operation_ch[1] = 0; // Used to indicate the scan end in site survey function ++#ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.operation_ch[2] = 0; ++ pwdinfo->rx_invitereq_info.operation_ch[3] = 0; ++ pwdinfo->rx_invitereq_info.operation_ch[4] = 0; ++#endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->rx_invitereq_info.scan_op_ch_only = 0; ++ pwdinfo->p2p_info.operation_ch[0] = 0; ++ pwdinfo->p2p_info.operation_ch[1] = 0; // Used to indicate the scan end in site survey function ++#ifdef P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.operation_ch[2] = 0; ++ pwdinfo->p2p_info.operation_ch[3] = 0; ++ pwdinfo->p2p_info.operation_ch[4] = 0; ++#endif //P2P_OP_CHECK_SOCIAL_CH ++ pwdinfo->p2p_info.scan_op_ch_only = 0; ++} ++ ++#ifdef CONFIG_DBG_P2P ++ ++/** ++ * rtw_p2p_role_txt - Get the p2p role name as a text string ++ * @role: P2P role ++ * Returns: The state name as a printable text string ++ */ ++const char * rtw_p2p_role_txt(enum P2P_ROLE role) ++{ ++ switch (role) { ++ case P2P_ROLE_DISABLE: ++ return "P2P_ROLE_DISABLE"; ++ case P2P_ROLE_DEVICE: ++ return "P2P_ROLE_DEVICE"; ++ case P2P_ROLE_CLIENT: ++ return "P2P_ROLE_CLIENT"; ++ case P2P_ROLE_GO: ++ return "P2P_ROLE_GO"; ++ default: ++ return "UNKNOWN"; ++ } ++} ++ ++/** ++ * rtw_p2p_state_txt - Get the p2p state name as a text string ++ * @state: P2P state ++ * Returns: The state name as a printable text string ++ */ ++const char * rtw_p2p_state_txt(enum P2P_STATE state) ++{ ++ switch (state) { ++ case P2P_STATE_NONE: ++ return "P2P_STATE_NONE"; ++ case P2P_STATE_IDLE: ++ return "P2P_STATE_IDLE"; ++ case P2P_STATE_LISTEN: ++ return "P2P_STATE_LISTEN"; ++ case P2P_STATE_SCAN: ++ return "P2P_STATE_SCAN"; ++ case P2P_STATE_FIND_PHASE_LISTEN: ++ return "P2P_STATE_FIND_PHASE_LISTEN"; ++ case P2P_STATE_FIND_PHASE_SEARCH: ++ return "P2P_STATE_FIND_PHASE_SEARCH"; ++ case P2P_STATE_TX_PROVISION_DIS_REQ: ++ return "P2P_STATE_TX_PROVISION_DIS_REQ"; ++ case P2P_STATE_RX_PROVISION_DIS_RSP: ++ return "P2P_STATE_RX_PROVISION_DIS_RSP"; ++ case P2P_STATE_RX_PROVISION_DIS_REQ: ++ return "P2P_STATE_RX_PROVISION_DIS_REQ"; ++ case P2P_STATE_GONEGO_ING: ++ return "P2P_STATE_GONEGO_ING"; ++ case P2P_STATE_GONEGO_OK: ++ return "P2P_STATE_GONEGO_OK"; ++ case P2P_STATE_GONEGO_FAIL: ++ return "P2P_STATE_GONEGO_FAIL"; ++ case P2P_STATE_RECV_INVITE_REQ_MATCH: ++ return "P2P_STATE_RECV_INVITE_REQ_MATCH"; ++ case P2P_STATE_PROVISIONING_ING: ++ return "P2P_STATE_PROVISIONING_ING"; ++ case P2P_STATE_PROVISIONING_DONE: ++ return "P2P_STATE_PROVISIONING_DONE"; ++ case P2P_STATE_TX_INVITE_REQ: ++ return "P2P_STATE_TX_INVITE_REQ"; ++ case P2P_STATE_RX_INVITE_RESP_OK: ++ return "P2P_STATE_RX_INVITE_RESP_OK"; ++ case P2P_STATE_RECV_INVITE_REQ_DISMATCH: ++ return "P2P_STATE_RECV_INVITE_REQ_DISMATCH"; ++ case P2P_STATE_RECV_INVITE_REQ_GO: ++ return "P2P_STATE_RECV_INVITE_REQ_GO"; ++ case P2P_STATE_RECV_INVITE_REQ_JOIN: ++ return "P2P_STATE_RECV_INVITE_REQ_JOIN"; ++ case P2P_STATE_RX_INVITE_RESP_FAIL: ++ return "P2P_STATE_RX_INVITE_RESP_FAIL"; ++ case P2P_STATE_RX_INFOR_NOREADY: ++ return "P2P_STATE_RX_INFOR_NOREADY"; ++ case P2P_STATE_TX_INFOR_NOREADY: ++ return "P2P_STATE_TX_INFOR_NOREADY"; ++ default: ++ return "UNKNOWN"; ++ } ++} ++ ++void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) ++{ ++ if(!_rtw_p2p_chk_state(wdinfo, state)) { ++ enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); ++ _rtw_p2p_set_state(wdinfo, state); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line ++ , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line ++ , rtw_p2p_state_txt(_rtw_p2p_state(wdinfo)) ++ ); ++ } ++} ++void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) ++{ ++ if(_rtw_p2p_pre_state(wdinfo) != state) { ++ enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); ++ _rtw_p2p_set_pre_state(wdinfo, state); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line ++ , rtw_p2p_state_txt(old_state), rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line ++ , rtw_p2p_state_txt(_rtw_p2p_pre_state(wdinfo)) ++ ); ++ } ++} ++#if 0 ++void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) ++{ ++ if(wdinfo->pre_p2p_state != -1) { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line ++ , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] ++ ); ++ _rtw_p2p_restore_state(wdinfo); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line ++ , p2p_state_str[wdinfo->p2p_state] ++ ); ++ } ++} ++#endif ++void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) ++{ ++ if(wdinfo->role != role) { ++ enum P2P_ROLE old_role = wdinfo->role; ++ _rtw_p2p_set_role(wdinfo, role); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line ++ , rtw_p2p_role_txt(old_role), rtw_p2p_role_txt(wdinfo->role) ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line ++ , rtw_p2p_role_txt(wdinfo->role) ++ ); ++ } ++} ++#endif //CONFIG_DBG_P2P ++ ++ ++int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) ++{ ++ int ret = _SUCCESS; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT|| role == P2P_ROLE_GO) ++ { ++ u8 channel, ch_offset; ++ u16 bwmode; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ // Commented by Albert 2011/12/30 ++ // The driver just supports 1 P2P group operation. ++ // So, this function will do nothing if the buddy adapter had enabled the P2P function. ++ if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) ++ { ++ // The buddy adapter had enabled the P2P function. ++ return ret; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ //leave IPS/Autosuspend ++ if (_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ ++ // Added by Albert 2011/03/22 ++ // In the P2P mode, the driver should not support the b mode. ++ // So, the Tx packet shouldn't use the CCK rate ++ update_tx_basic_rate(padapter, WIRELESS_11AGN); ++ ++ //Enable P2P function ++ init_wifidirect_info(padapter, role); ++ } ++ else if (role == P2P_ROLE_DISABLE) ++ { ++#ifdef CONFIG_INTEL_WIDI ++ if( padapter->mlmepriv.p2p_reject_disable == _TRUE ) ++ return ret; ++#endif //CONFIG_INTEL_WIDI ++ ++ if (_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //Disable P2P function ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey); ++ _cancel_timer_ex( &pwdinfo->reset_ch_sitesurvey2); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ reset_ch_sitesurvey_timer_process( padapter ); ++ reset_ch_sitesurvey_timer_process2( padapter ); ++#else ++ reset_ch_sitesurvey_timer_process(&padapter->wdinfo.reset_ch_sitesurvey); ++ reset_ch_sitesurvey_timer_process(&padapter->wdinfo.reset_ch_sitesurvey2); ++#endif ++ #ifdef CONFIG_CONCURRENT_MODE ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer); ++ #endif ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); ++ _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); ++ } ++ ++ //Restore to initial setting. ++ update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); ++ ++#ifdef CONFIG_INTEL_WIDI ++ rtw_reset_widi_info(padapter); ++#endif //CONFIG_INTEL_WIDI ++ ++ //For WiDi purpose. ++#ifdef CONFIG_IOCTL_CFG80211 ++ pwdinfo->driver_interface = DRIVER_CFG80211; ++#else ++ pwdinfo->driver_interface = DRIVER_WEXT; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ } ++ ++exit: ++ return ret; ++} ++ ++#endif //CONFIG_P2P ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_pwrctrl.c +@@ -0,0 +1,1551 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_PWRCTRL_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_IPS ++void _ips_enter(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ pwrpriv->bips_processing = _TRUE; ++ ++ // syn ips_mode with request ++ pwrpriv->ips_mode = pwrpriv->ips_mode_req; ++ ++ pwrpriv->ips_enter_cnts++; ++ DBG_871X("==>ips_enter cnts:%d\n",pwrpriv->ips_enter_cnts); ++ ++ if(rf_off == pwrpriv->change_rfpwrstate) ++ { ++ if(pwrpriv->ips_mode == IPS_LEVEL_2) ++ pwrpriv->bkeepfwalive = _TRUE; ++ ++ rtw_ips_pwr_down(padapter); ++ pwrpriv->rf_pwrstate = rf_off; ++ } ++ pwrpriv->bips_processing = _FALSE; ++ ++} ++ ++void ips_enter(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ _ips_enter(padapter); ++ _exit_pwrlock(&pwrpriv->lock); ++} ++ ++int _ips_leave(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ int result = _SUCCESS; ++ ++ if((pwrpriv->rf_pwrstate == rf_off) &&(!pwrpriv->bips_processing)) ++ { ++ pwrpriv->bips_processing = _TRUE; ++ pwrpriv->change_rfpwrstate = rf_on; ++ pwrpriv->ips_leave_cnts++; ++ DBG_871X("==>ips_leave cnts:%d\n",pwrpriv->ips_leave_cnts); ++ ++ if ((result = rtw_ips_pwr_up(padapter)) == _SUCCESS) { ++ pwrpriv->rf_pwrstate = rf_on; ++ } ++ ++ DBG_871X("==> ips_leave.....LED(0x%08x)...\n",rtw_read32(padapter,0x4c)); ++ pwrpriv->bips_processing = _FALSE; ++ ++ pwrpriv->bkeepfwalive = _FALSE; ++ } ++ ++ return result; ++} ++ ++int ips_leave(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ int ret; ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ret = _ips_leave(padapter); ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ return ret; ++} ++#endif /* CONFIG_IPS */ ++ ++#ifdef CONFIG_AUTOSUSPEND ++extern void autosuspend_enter(_adapter* padapter); ++extern int autoresume_enter(_adapter* padapter); ++#endif ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++int rtw_hw_suspend(_adapter *padapter ); ++int rtw_hw_resume(_adapter *padapter); ++#endif ++ ++bool rtw_pwr_unassociated_idle(_adapter *adapter) ++{ ++ _adapter *buddy = adapter->pbuddy_adapter; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(adapter->wdinfo); ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &adapter->cfg80211_wdinfo; ++#endif ++#endif ++ ++ bool ret = _FALSE; ++ ++ if (adapter->pwrctrlpriv.ips_deny_time >= rtw_get_current_time()) { ++ //DBG_871X("%s ips_deny_time\n", __func__); ++ goto exit; ++ } ++ ++ if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ++ || check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ++ || check_fwstate(pmlmepriv, WIFI_AP_STATE) ++ || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ || pcfg80211_wdinfo->is_ro_ch ++ #elif defined(CONFIG_P2P) ++ || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++ #endif ++ ) { ++ goto exit; ++ } ++ ++ /* consider buddy, if exist */ ++ if (buddy) { ++ struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv); ++ #ifdef CONFIG_P2P ++ struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo); ++ #ifdef CONFIG_IOCTL_CFG80211 ++ struct cfg80211_wifidirect_info *b_pcfg80211_wdinfo = &buddy->cfg80211_wdinfo; ++ #endif ++ #endif ++ ++ if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ++ || check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ++ || check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ++ || check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ || b_pcfg80211_wdinfo->is_ro_ch ++ #elif defined(CONFIG_P2P) ++ || !rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE) ++ #endif ++ ) { ++ goto exit; ++ } ++ } ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if(adapter->proximity.proxim_on==_TRUE){ ++ return; ++ } ++#endif ++ ++ ret = _TRUE; ++ ++exit: ++ return ret; ++} ++ ++#if defined (PLATFORM_LINUX)||defined (PLATFORM_FREEBSD) ++void rtw_ps_processor(_adapter*padapter) ++{ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++#endif //CONFIG_P2P ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ rt_rf_power_state rfpwrstate; ++#endif //SUPPORT_HW_RFOFF_DETECTED ++ ++ pwrpriv->ps_processing = _TRUE; ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ if(pwrpriv->bips_processing == _TRUE) ++ goto exit; ++ ++ //DBG_871X("==> fw report state(0x%x)\n",rtw_read8(padapter,0x1ca)); ++ if(padapter->pwrctrlpriv.bHWPwrPindetect) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ if(padapter->registrypriv.usbss_enable) ++ { ++ if(pwrpriv->rf_pwrstate == rf_on) ++ { ++ if(padapter->net_closed == _TRUE) ++ pwrpriv->ps_flag = _TRUE; ++ ++ rfpwrstate = RfOnOffDetect(padapter); ++ DBG_871X("@@@@- #1 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); ++ if(rfpwrstate!= pwrpriv->rf_pwrstate) ++ { ++ if(rfpwrstate == rf_off) ++ { ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ pwrpriv->bkeepfwalive = _TRUE; ++ pwrpriv->brfoffbyhw = _TRUE; ++ ++ autosuspend_enter(padapter); ++ } ++ } ++ } ++ } ++ else ++ #endif //CONFIG_AUTOSUSPEND ++ { ++ rfpwrstate = RfOnOffDetect(padapter); ++ DBG_871X("@@@@- #2 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); ++ ++ if(rfpwrstate!= pwrpriv->rf_pwrstate) ++ { ++ if(rfpwrstate == rf_off) ++ { ++ pwrpriv->change_rfpwrstate = rf_off; ++ pwrpriv->brfoffbyhw = _TRUE; ++ padapter->bCardDisableWOHSM = _TRUE; ++ rtw_hw_suspend(padapter ); ++ } ++ else ++ { ++ pwrpriv->change_rfpwrstate = rf_on; ++ rtw_hw_resume(padapter ); ++ } ++ DBG_871X("current rf_pwrstate(%s)\n",(pwrpriv->rf_pwrstate == rf_off)?"rf_off":"rf_on"); ++ } ++ } ++ pwrpriv->pwr_state_check_cnts ++; ++ } ++#endif //SUPPORT_HW_RFOFF_DETECTED ++ ++ if (pwrpriv->ips_mode_req == IPS_NONE ++ #ifdef CONFIG_CONCURRENT_MODE ++ || padapter->pbuddy_adapter->pwrctrlpriv.ips_mode_req == IPS_NONE ++ #endif ++ ) ++ goto exit; ++ ++ if (rtw_pwr_unassociated_idle(padapter) == _FALSE) ++ goto exit; ++ ++ if((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts%4)==0)) ++ { ++ DBG_871X("==>%s .fw_state(%x)\n",__FUNCTION__,get_fwstate(pmlmepriv)); ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ #ifdef CONFIG_AUTOSUSPEND ++ if(padapter->registrypriv.usbss_enable) ++ { ++ if(pwrpriv->bHWPwrPindetect) ++ pwrpriv->bkeepfwalive = _TRUE; ++ ++ if(padapter->net_closed == _TRUE) ++ pwrpriv->ps_flag = _TRUE; ++ ++ padapter->bCardDisableWOHSM = _TRUE; ++ autosuspend_enter(padapter); ++ } ++ else if(pwrpriv->bHWPwrPindetect) ++ { ++ } ++ else ++ #endif //CONFIG_AUTOSUSPEND ++ { ++ #ifdef CONFIG_IPS ++ ips_enter(padapter); ++ #endif ++ } ++ } ++exit: ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ pwrpriv->ps_processing = _FALSE; ++ return; ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void pwr_state_check_handler(RTW_TIMER_HDL_ARGS) ++#else ++void pwr_state_check_handler(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *padapter = (_adapter *)FunctionContext; ++#else ++ _adapter *padapter = from_timer(padapter, t, pwrctrlpriv.pwr_state_check_timer); ++#endif ++ rtw_ps_cmd(padapter); ++} ++#endif ++ ++ ++#ifdef CONFIG_LPS ++/* ++ * ++ * Parameters ++ * padapter ++ * pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4 ++ * ++ */ ++void rtw_set_rpwm(PADAPTER padapter, u8 pslv) ++{ ++ u8 rpwm; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ pslv = PS_STATE(pslv); ++ ++ if (pwrpriv->rpwm == pslv) { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_, ++ ("%s: Already set rpwm[0x%02x]!\n", __FUNCTION__, pslv)); ++ return; ++ } ++ ++ if ((padapter->bDriverStopped == _TRUE) || ++ (padapter->bSurpriseRemoved == _TRUE)) { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ++ ("%s: bDriverStopped(%d) bSurpriseRemoved(%d)\n", ++ __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ return; ++ } ++ ++ rpwm = pslv | pwrpriv->tog; ++#ifdef CONFIG_LPS_LCLK ++ if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2)) ++ rpwm |= PS_ACK; ++#endif ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_set_rpwm: rpwm=0x%02x cpwm=0x%02x\n", rpwm, pwrpriv->cpwm)); ++ ++ pwrpriv->rpwm = pslv; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); ++ ++ pwrpriv->tog += 0x80; ++ ++ if (!(rpwm & PS_ACK)) pwrpriv->cpwm = pslv; ++ ++_func_exit_; ++} ++ ++u8 PS_RDY_CHECK(_adapter * padapter); ++u8 PS_RDY_CHECK(_adapter * padapter) ++{ ++ u32 curr_time, delta_time; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ curr_time = rtw_get_current_time(); ++ ++ delta_time = curr_time -pwrpriv->DelayLPSLastTimeStamp; ++ ++ if(delta_time < LPS_DELAY_TIME) ++ { ++ return _FALSE; ++ } ++ ++ if ((check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) || ++ (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_UNDER_WPS) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ) ++ return _FALSE; ++ ++ if(_TRUE == pwrpriv->bInSuspend ) ++ return _FALSE; ++ ++ if( (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == _FALSE) ) ++ { ++ DBG_871X("Group handshake still in progress !!!\n"); ++ return _FALSE; ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (!rtw_cfg80211_pwr_mgmt(padapter)) ++ return _FALSE; ++#endif ++ ++ return _TRUE; ++} ++ ++void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++#endif //CONFIG_P2P ++#ifdef CONFIG_TDLS ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ _irqL irqL; ++ int i, j; ++ _list *plist, *phead; ++ struct sta_info *ptdls_sta; ++#endif //CONFIG_TDLS ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("%s: PowerMode=%d Smart_PS=%d\n", ++ __FUNCTION__, ps_mode, smart_ps)); ++ ++ if(ps_mode > PM_Card_Disable) { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("ps_mode:%d error\n", ps_mode)); ++ return; ++ } ++ ++ if((pwrpriv->pwr_mode == ps_mode) && ++ (pwrpriv->smart_ps == smart_ps)){ ++ return; ++ } ++ ++ //if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) ++ if(ps_mode == PS_MODE_ACTIVE) ++ { ++#ifdef CONFIG_P2P_PS ++ if(pwdinfo->opp_ps == 0) ++#endif // CONFIG_P2P_PS ++ { ++#ifdef CONFIG_LPS_LCLK ++ _enter_pwrlock(&pwrpriv->lock); ++#endif ++ DBG_871X("rtw_set_ps_mode(): Busy Traffic , Leave 802.11 power save..\n"); ++ ++#ifdef CONFIG_TDLS ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ if( ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE ) ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0); ++ plist = get_next(plist); ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++#endif //CONFIG_TDLS ++ ++ pwrpriv->smart_ps = smart_ps; ++ pwrpriv->pwr_mode = ps_mode; ++ ++ rtw_set_rpwm(padapter, PS_STATE_S4); ++#ifdef CONFIG_LPS_LCLK ++{ ++ u32 n = 0; ++ while (pwrpriv->cpwm != PS_STATE_S4) { ++ n++; ++ if (n == 10000) break; ++ if (padapter->bSurpriseRemoved == _TRUE) break; ++ rtw_msleep_os(1); ++ } ++ if (n == 10000) ++ printk(KERN_ERR "%s: wait CPWM to S4 too long! cpwm=0x%02x\n", __func__, pwrpriv->cpwm); ++} ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); ++ pwrpriv->bFwCurrentInPSMode = _FALSE; ++#ifdef CONFIG_LPS_LCLK ++ _exit_pwrlock(&pwrpriv->lock); ++#endif ++ } ++ } ++ else ++ { ++ if(PS_RDY_CHECK(padapter)) ++ { ++#ifdef CONFIG_LPS_LCLK ++ _enter_pwrlock(&pwrpriv->lock); ++#endif ++ DBG_871X("rtw_set_ps_mode(): Enter 802.11 power save mode...\n"); ++ ++#ifdef CONFIG_TDLS ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ ptdls_sta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ if( ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE ) ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 1); ++ plist = get_next(plist); ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++#endif //CONFIG_TDLS ++ ++ pwrpriv->smart_ps = smart_ps; ++ pwrpriv->pwr_mode = ps_mode; ++ pwrpriv->bFwCurrentInPSMode = _TRUE; ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); ++#ifdef CONFIG_P2P_PS ++ // Set CTWindow after LPS ++ if(pwdinfo->opp_ps == 1) ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0); ++#endif // CONFIG_P2P_PS ++#ifdef CONFIG_LPS_LCLK ++ if (pwrpriv->alives == 0) ++ rtw_set_rpwm(padapter, PS_STATE_S0); ++#else ++ rtw_set_rpwm(padapter, PS_STATE_S2); ++#endif ++#ifdef CONFIG_LPS_LCLK ++ _exit_pwrlock(&pwrpriv->lock); ++#endif ++ } ++ //else ++ //{ ++ // pwrpriv->pwr_mode = PS_MODE_ACTIVE; ++ //} ++ } ++ ++_func_exit_; ++} ++ ++ ++// ++// Description: ++// Enter the leisure power save mode. ++// ++void LPS_Enter(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _adapter *buddy = padapter->pbuddy_adapter; ++ ++_func_enter_; ++ ++// DBG_871X("+LeisurePSEnter\n"); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type != IFACE_PORT0) ++ return; /* Skip power saving for concurrent mode port 1*/ ++ ++ /* consider buddy, if exist */ ++ if (buddy) { ++ struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv); ++ #ifdef CONFIG_P2P ++ struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo); ++ #ifdef CONFIG_IOCTL_CFG80211 ++ struct cfg80211_wifidirect_info *b_pcfg80211_wdinfo = &buddy->cfg80211_wdinfo; ++ #endif ++ #endif ++ ++ if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ++ || check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ++ || check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ++ || check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ++ #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) && defined(CONFIG_P2P_IPS) ++ || b_pcfg80211_wdinfo->is_ro_ch ++ #elif defined(CONFIG_P2P) ++ || !rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE) ++ #endif ++ || rtw_is_scan_deny(buddy) ++ ) { ++ return; ++ } ++ } ++#endif ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if(padapter->proximity.proxim_on==_TRUE){ ++ return; ++ } ++#endif ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) || ++ (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ) ++ return; ++ ++ if(_TRUE == pwrpriv->bInSuspend ) ++ return ; ++ ++ if (pwrpriv->bLeisurePs) ++ { ++ // Idle for a while if we connect to AP a while ago. ++ if(pwrpriv->LpsIdleCount >= 2) // 4 Sec ++ { ++ if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) ++ { ++ rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, 2); ++ } ++ } ++ else ++ pwrpriv->LpsIdleCount++; ++ } ++ ++// DBG_871X("-LeisurePSEnter\n"); ++ ++_func_exit_; ++} ++ ++ ++// ++// Description: ++// Leave the leisure power save mode. ++// ++void LPS_Leave(PADAPTER padapter) ++{ ++#define LPS_LEAVE_TIMEOUT_MS 100 ++ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ u32 start_time; ++ BOOLEAN bAwake = _FALSE; ++ ++_func_enter_; ++ ++// DBG_871X("+LeisurePSLeave\n"); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type != IFACE_PORT0) ++ return; /* Skip power saving for concurrent mode port 1*/ ++#endif ++ ++ if (pwrpriv->bLeisurePs) ++ { ++ if(pwrpriv->pwr_mode != PS_MODE_ACTIVE) ++ { ++ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0); ++ ++ if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) ++ { ++ start_time = rtw_get_current_time(); ++ while(1) ++ { ++ rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bAwake)); ++ ++ if(bAwake || padapter->bSurpriseRemoved) ++ break; ++ ++ if(rtw_get_passing_time_ms(start_time)>LPS_LEAVE_TIMEOUT_MS) ++ { ++ DBG_871X("Wait for FW LPS leave more than %u ms!!!\n", LPS_LEAVE_TIMEOUT_MS); ++ break; ++ } ++ rtw_usleep_os(100); ++ } ++ } ++ } ++ } ++ ++ ++// DBG_871X("-LeisurePSLeave\n"); ++ ++_func_exit_; ++} ++ ++#endif ++ ++// ++// Description: Leave all power save mode: LPS, FwLPS, IPS if needed. ++// Move code to function by tynli. 2010.03.26. ++// ++void LeaveAllPowerSaveMode(IN PADAPTER Adapter) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++_func_enter_; ++ ++ //DBG_871X("%s.....\n",__FUNCTION__); ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { //connect ++#ifdef CONFIG_P2P_PS ++ p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, 0); ++#endif // CONFIG_P2P_PS ++#ifdef CONFIG_LPS ++ //DBG_871X("==> leave LPS.......\n"); ++ LPS_Leave(Adapter); ++#endif ++ } ++ else ++ { ++ if(Adapter->pwrctrlpriv.rf_pwrstate== rf_off) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ if(Adapter->registrypriv.usbss_enable) ++ { ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_disable_autosuspend(adapter_to_dvobj(Adapter)->pusbdev); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ adapter_to_dvobj(Adapter)->pusbdev->autosuspend_disabled = Adapter->bDisableAutosuspend;//autosuspend disabled by the user ++ #endif ++ } ++ else ++ #endif ++ { ++ /* ++ #ifdef CONFIG_IPS ++ if(_FALSE == ips_leave(Adapter)) ++ { ++ DBG_871X("======> ips_leave fail.............\n"); ++ } ++ #endif ++ */ ++ } ++ } ++ } ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_LPS_LCLK ++/* ++ * Caller:ISR handler... ++ * ++ * This will be called when CPWM interrupt is up. ++ * ++ * using to update cpwn of drv; and drv willl make a decision to up or down pwr level ++ */ ++void cpwm_int_hdl( ++ PADAPTER padapter, ++ struct reportpwrstate_parm *preportpwrstate) ++{ ++ struct pwrctrl_priv *pwrpriv; ++ ++ ++_func_enter_; ++ ++ pwrpriv = &padapter->pwrctrlpriv; ++#if 0 ++ if (pwrpriv->cpwm_tog == (preportpwrstate->state & PS_TOGGLE)) { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ++ ("cpwm_int_hdl: tog(old)=0x%02x cpwm(new)=0x%02x toggle bit didn't change!?\n", ++ pwrpriv->cpwm_tog, preportpwrstate->state)); ++ goto exit; ++ } ++#endif ++// _enter_pwrlock(&pwrpriv->lock); ++ ++ pwrpriv->cpwm = PS_STATE(preportpwrstate->state); ++ pwrpriv->cpwm_tog = preportpwrstate->state & PS_TOGGLE; ++ ++ if (pwrpriv->cpwm >= PS_STATE_S2) { ++ if (pwrpriv->alives & CMD_ALIVE) ++ _rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema); ++ ++ if (pwrpriv->alives & XMIT_ALIVE) ++ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); ++ } ++ ++// _exit_pwrlock(&pwrpriv->lock); ++ ++exit: ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("cpwm_int_hdl: cpwm=0x%02x\n", pwrpriv->cpwm)); ++ ++_func_exit_; ++} ++ ++__inline static void register_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) ++{ ++ pwrctrl->alives |= tag; ++} ++ ++__inline static void unregister_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag) ++{ ++ pwrctrl->alives &= ~tag; ++} ++ ++/* ++ * Caller: rtw_xmit_thread ++ * ++ * Check if the fw_pwrstate is okay for xmit. ++ * If not (cpwm is less than S3), then the sub-routine ++ * will raise the cpwm to be greater than or equal to S3. ++ * ++ * Calling Context: Passive ++ * ++ * Return Value: ++ * _SUCCESS rtw_xmit_thread can write fifo/txcmd afterwards. ++ * _FAIL rtw_xmit_thread can not do anything. ++ */ ++s32 rtw_register_tx_alive(PADAPTER padapter) ++{ ++ s32 res; ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ res = _SUCCESS; ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, XMIT_ALIVE); ++ ++ if (pwrctrl->bFwCurrentInPSMode == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ++ ("rtw_register_tx_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ if (pwrctrl->cpwm < PS_STATE_S2) { ++ if (pwrctrl->rpwm < PS_STATE_S2) ++ rtw_set_rpwm(padapter, PS_STATE_S2); ++ res = _FAIL; ++ } ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++/* ++ * Caller: rtw_cmd_thread ++ * ++ * Check if the fw_pwrstate is okay for issuing cmd. ++ * If not (cpwm should be is less than S2), then the sub-routine ++ * will raise the cpwm to be greater than or equal to S2. ++ * ++ * Calling Context: Passive ++ * ++ * Return Value: ++ * _SUCCESS rtw_cmd_thread can issue cmds to firmware afterwards. ++ * _FAIL rtw_cmd_thread can not do anything. ++ */ ++s32 rtw_register_cmd_alive(PADAPTER padapter) ++{ ++ s32 res; ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ res = _SUCCESS; ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, CMD_ALIVE); ++ ++ if (pwrctrl->bFwCurrentInPSMode == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_register_cmd_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ if (pwrctrl->cpwm < PS_STATE_S2) { ++ if (pwrctrl->rpwm < PS_STATE_S2) ++ rtw_set_rpwm(padapter, PS_STATE_S2); ++ res = _FAIL; ++ } ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++/* ++ * Caller: rx_isr ++ * ++ * Calling Context: Dispatch/ISR ++ * ++ * Return Value: ++ * _SUCCESS ++ * _FAIL ++ */ ++s32 rtw_register_rx_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, RECV_ALIVE); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_register_rx_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++/* ++ * Caller: evt_isr or evt_thread ++ * ++ * Calling Context: Dispatch/ISR or Passive ++ * ++ * Return Value: ++ * _SUCCESS ++ * _FAIL ++ */ ++s32 rtw_register_evt_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, EVT_ALIVE); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_register_evt_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++/* ++ * Caller: ISR ++ * ++ * If ISR's txdone, ++ * No more pkts for TX, ++ * Then driver shall call this fun. to power down firmware again. ++ */ ++void rtw_unregister_tx_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, XMIT_ALIVE); ++ ++ if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) && ++ (pwrctrl->bFwCurrentInPSMode == _TRUE)) ++ { ++ if ((pwrctrl->alives == 0) && ++ (pwrctrl->cpwm > PS_STATE_S0)) ++ { ++ rtw_set_rpwm(padapter, PS_STATE_S0); ++ } ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_unregister_tx_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++} ++ ++/* ++ * Caller: ISR ++ * ++ * If all commands have been done, ++ * and no more command to do, ++ * then driver shall call this fun. to power down firmware again. ++ */ ++void rtw_unregister_cmd_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, CMD_ALIVE); ++ ++ if ((pwrctrl->pwr_mode != PS_MODE_ACTIVE) && ++ (pwrctrl->bFwCurrentInPSMode == _TRUE)) ++ { ++ if ((pwrctrl->alives == 0) && ++ (pwrctrl->cpwm > PS_STATE_S0)) ++ { ++ rtw_set_rpwm(padapter, PS_STATE_S0); ++ } ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_unregister_cmd_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++} ++ ++/* ++ * Caller: ISR ++ */ ++void rtw_unregister_rx_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, RECV_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_unregister_rx_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++} ++ ++void rtw_unregister_evt_alive(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrl; ++ ++_func_enter_; ++ ++ pwrctrl = &padapter->pwrctrlpriv; ++ ++ unregister_task_alive(pwrctrl, EVT_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_, ++ ("rtw_unregister_evt_alive: cpwm=0x%02x alives=0x%08x\n", ++ pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++} ++#endif /* CONFIG_LPS_LCLK */ ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++static void resume_workitem_callback(struct work_struct *work); ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++void rtw_init_pwrctrl_priv(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++#ifdef PLATFORM_WINDOWS ++ pwrctrlpriv->pnp_current_pwr_state=NdisDeviceStateD0; ++#endif ++ ++ _init_pwrlock(&pwrctrlpriv->lock); ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ pwrctrlpriv->ips_enter_cnts=0; ++ pwrctrlpriv->ips_leave_cnts=0; ++ ++ pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; ++ pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode; ++ ++ pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL; ++ pwrctrlpriv->pwr_state_check_cnts = 0; ++ pwrctrlpriv->bInternalAutoSuspend = _FALSE; ++ pwrctrlpriv->bInSuspend = _FALSE; ++ pwrctrlpriv->bkeepfwalive = _FALSE; ++ ++#ifdef CONFIG_AUTOSUSPEND ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ pwrctrlpriv->pwr_state_check_interval = (pwrctrlpriv->bHWPwrPindetect) ?1000:2000; ++#endif ++#endif ++ ++ pwrctrlpriv->LpsIdleCount = 0; ++ //pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; ++ pwrctrlpriv->power_mgnt =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; ++ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; ++ ++ pwrctrlpriv->bFwCurrentInPSMode = _FALSE; ++ ++ pwrctrlpriv->cpwm = PS_STATE_S4; ++ ++ pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE; ++ ++ ++ pwrctrlpriv->smart_ps = 0; ++ ++ pwrctrlpriv->tog = 0x80; ++ ++#ifdef PLATFORM_LINUX ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter); ++#else ++ timer_setup(&pwrctrlpriv->pwr_state_check_timer, pwr_state_check_handler, 0); ++#endif ++#endif ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ _init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL); ++ pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue"); ++ #endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++ #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ pwrctrlpriv->early_suspend.suspend = NULL; ++ rtw_register_early_suspend(pwrctrlpriv); ++ #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER ++ ++ ++_func_exit_; ++ ++} ++ ++ ++void rtw_free_pwrctrl_priv(PADAPTER adapter) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ //_rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv)); ++ ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ if (pwrctrlpriv->rtw_workqueue) { ++ flush_workqueue(pwrctrlpriv->rtw_workqueue); ++ destroy_workqueue(pwrctrlpriv->rtw_workqueue); ++ } ++ #endif ++ ++ ++ #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(pwrctrlpriv); ++ #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER ++ ++ _free_pwrlock(&pwrctrlpriv->lock); ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++extern int rtw_resume_process(_adapter *padapter); ++#endif ++static void resume_workitem_callback(struct work_struct *work) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ rtw_resume_process(adapter); ++ #endif ++ ++} ++ ++void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv) ++{ ++ // accquire system's suspend lock preventing from falliing asleep while resume in workqueue ++ rtw_lock_suspend(); ++ ++ #if 1 ++ queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work); ++ #else ++ _set_workitem(&pwrpriv->resume_work); ++ #endif ++} ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++inline bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv) ++{ ++ return (pwrpriv->early_suspend.suspend) ? _TRUE : _FALSE; ++} ++ ++inline bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv) ++{ ++ return (pwrpriv->do_late_resume) ? _TRUE : _FALSE; ++} ++ ++inline void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable) ++{ ++ pwrpriv->do_late_resume = enable; ++} ++#endif ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++extern int rtw_resume_process(_adapter *padapter); ++#endif ++static void rtw_early_suspend(struct early_suspend *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++} ++ ++static void rtw_late_resume(struct early_suspend *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ if(pwrpriv->do_late_resume) { ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++ rtw_resume_process(adapter); ++ #endif ++ } ++} ++ ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++#if defined(CONFIG_CONCURRENT_MODE) ++ if (adapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit ++ pwrpriv->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; ++ pwrpriv->early_suspend.suspend = rtw_early_suspend; ++ pwrpriv->early_suspend.resume = rtw_late_resume; ++ register_early_suspend(&pwrpriv->early_suspend); ++ ++ ++} ++ ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++#if defined(CONFIG_CONCURRENT_MODE) ++ if (adapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++ ++ if (pwrpriv->early_suspend.suspend) ++ unregister_early_suspend(&pwrpriv->early_suspend); ++ ++ pwrpriv->early_suspend.suspend = NULL; ++ pwrpriv->early_suspend.resume = NULL; ++} ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++#ifdef CONFIG_ANDROID_POWER ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++extern int rtw_resume_process(PADAPTER padapter); ++#endif ++static void rtw_early_suspend(android_early_suspend_t *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++} ++ ++static void rtw_late_resume(android_early_suspend_t *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ if(pwrpriv->do_late_resume) { ++ #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++ rtw_resume_process(adapter); ++ #endif ++ } ++} ++ ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++#if defined(CONFIG_CONCURRENT_MODE) ++ if (adapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit ++ pwrpriv->early_suspend.level = ANDROID_EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; ++ pwrpriv->early_suspend.suspend = rtw_early_suspend; ++ pwrpriv->early_suspend.resume = rtw_late_resume; ++ android_register_early_suspend(&pwrpriv->early_suspend); ++} ++ ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++#if defined(CONFIG_CONCURRENT_MODE) ++ if (adapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ rtw_set_do_late_resume(pwrpriv, _FALSE); ++ ++ if (pwrpriv->early_suspend.suspend) ++ android_unregister_early_suspend(&pwrpriv->early_suspend); ++ ++ pwrpriv->early_suspend.suspend = NULL; ++ pwrpriv->early_suspend.resume = NULL; ++} ++#endif //CONFIG_ANDROID_POWER ++ ++u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val) ++{ ++ u8 bResult = _TRUE; ++ ++ rtw_hal_intf_ps_func(padapter,efunc_id,val); ++ ++ return bResult; ++} ++ ++ ++inline void rtw_set_ips_deny(_adapter *padapter, u32 ms) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ms); ++} ++ ++/* ++* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend ++* @adapter: pointer to _adapter structure ++* @ips_deffer_ms: the ms wiil prevent from falling into IPS after wakeup ++* Return _SUCCESS or _FAIL ++*/ ++int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ int ret = _SUCCESS; ++ u32 start = rtw_get_current_time(); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) ++ LeaveAllPowerSaveMode(padapter->pbuddy_adapter); ++ ++ if ((padapter->isprimary == _FALSE) && padapter->pbuddy_adapter){ ++ padapter = padapter->pbuddy_adapter; ++ pwrpriv = &padapter->pwrctrlpriv; ++ pmlmepriv = &padapter->mlmepriv; ++ } ++#endif ++ ++ if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms)) ++ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); ++ ++ if (pwrpriv->ps_processing) { ++ DBG_871X("%s wait ps_processing...\n", __func__); ++ while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000) ++ rtw_msleep_os(10); ++ if (pwrpriv->ps_processing) ++ DBG_871X("%s wait ps_processing timeout\n", __func__); ++ else ++ DBG_871X("%s wait ps_processing done\n", __func__); ++ } ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ if (rtw_hal_sreset_inprogress(padapter)) { ++ DBG_871X("%s wait sreset_inprogress...\n", __func__); ++ while (rtw_hal_sreset_inprogress(padapter) && rtw_get_passing_time_ms(start) <= 4000) ++ rtw_msleep_os(10); ++ if (rtw_hal_sreset_inprogress(padapter)) ++ DBG_871X("%s wait sreset_inprogress timeout\n", __func__); ++ else ++ DBG_871X("%s wait sreset_inprogress done\n", __func__); ++ } ++#endif ++ ++ if (pwrpriv->bInternalAutoSuspend == _FALSE && pwrpriv->bInSuspend) { ++ DBG_871X("%s wait bInSuspend...\n", __func__); ++ while (pwrpriv->bInSuspend ++ && ((rtw_get_passing_time_ms(start) <= 3000 && !rtw_is_do_late_resume(pwrpriv)) ++ || (rtw_get_passing_time_ms(start) <= 500 && rtw_is_do_late_resume(pwrpriv))) ++ ) { ++ rtw_msleep_os(10); ++ } ++ if (pwrpriv->bInSuspend) ++ DBG_871X("%s wait bInSuspend timeout\n", __func__); ++ else ++ DBG_871X("%s wait bInSuspend done\n", __func__); ++ } ++ ++ //System suspend is not allowed to wakeup ++ if((pwrpriv->bInternalAutoSuspend == _FALSE) && (_TRUE == pwrpriv->bInSuspend )){ ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //block??? ++ if((pwrpriv->bInternalAutoSuspend == _TRUE) && (padapter->net_closed == _TRUE)) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //I think this should be check in IPS, LPS, autosuspend functions... ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ ret = _SUCCESS; ++ goto exit; ++ } ++ ++ if(rf_off == pwrpriv->rf_pwrstate ) ++ { ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_AUTOSUSPEND ++ if(pwrpriv->brfoffbyhw==_TRUE) ++ { ++ DBG_8192C("hw still in rf_off state ...........\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ else if(padapter->registrypriv.usbss_enable) ++ { ++ DBG_8192C("%s call autoresume_enter....\n",__FUNCTION__); ++ if(_FAIL == autoresume_enter(padapter)) ++ { ++ DBG_8192C("======> autoresume fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ else ++#endif ++#endif ++ { ++#ifdef CONFIG_IPS ++ DBG_8192C("%s call ips_leave....\n",__FUNCTION__); ++ if(_FAIL == ips_leave(padapter)) ++ { ++ DBG_8192C("======> ips_leave fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++#endif ++ } ++ } ++ ++ //TODO: the following checking need to be merged... ++ if(padapter->bDriverStopped ++ || !padapter->bup ++ || !padapter->hw_init_completed ++ ){ ++ DBG_8192C("%s: bDriverStopped=%d, bup=%d, hw_init_completed=%u\n" ++ , caller ++ , padapter->bDriverStopped ++ , padapter->bup ++ , padapter->hw_init_completed); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++exit: ++ if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms)) ++ pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); ++ return ret; ++ ++} ++ ++int rtw_pm_set_lps(_adapter *padapter, u8 mode) ++{ ++ int ret = 0; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ if ( mode < PS_MODE_NUM ) ++ { ++ if(pwrctrlpriv->power_mgnt !=mode) ++ { ++ if(PS_MODE_ACTIVE == mode) ++ { ++ LeaveAllPowerSaveMode(padapter); ++ } ++ else ++ { ++ pwrctrlpriv->LpsIdleCount = 2; ++ } ++ pwrctrlpriv->power_mgnt = mode; ++ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; ++ } ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++int rtw_pm_set_ips(_adapter *padapter, u8 mode) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ if( mode == IPS_NORMAL || mode == IPS_LEVEL_2 ) { ++ rtw_ips_mode_req(pwrctrlpriv, mode); ++ DBG_871X("%s %s\n", __FUNCTION__, mode == IPS_NORMAL?"IPS_NORMAL":"IPS_LEVEL_2"); ++ return 0; ++ } ++ else if(mode ==IPS_NONE){ ++ rtw_ips_mode_req(pwrctrlpriv, mode); ++ DBG_871X("%s %s\n", __FUNCTION__, "IPS_NONE"); ++ if((padapter->bSurpriseRemoved ==0)&&(_FAIL == rtw_pwr_wakeup(padapter)) ) ++ return -EFAULT; ++ } ++ else { ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_recv.c +@@ -0,0 +1,4306 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_RECV_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS); ++#else ++void rtw_signal_stat_timer_hdl(struct timer_list *t); ++#endif ++ ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ ++void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) ++{ ++ ++ ++_func_enter_; ++ ++ _rtw_memset((u8 *)psta_recvpriv, 0, sizeof (struct sta_recv_priv)); ++ ++ _rtw_spinlock_init(&psta_recvpriv->lock); ++ ++ //for(i=0; iblk_strms[i]); ++ ++ _rtw_init_queue(&psta_recvpriv->defrag_q); ++ ++_func_exit_; ++ ++} ++ ++sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter) ++{ ++ sint i; ++ ++ union recv_frame *precvframe; ++ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)precvpriv, 0, sizeof (struct recv_priv)); ++ ++ _rtw_spinlock_init(&precvpriv->lock); ++ ++ _rtw_init_queue(&precvpriv->free_recv_queue); ++ _rtw_init_queue(&precvpriv->recv_pending_queue); ++ _rtw_init_queue(&precvpriv->uc_swdec_pending_queue); ++ ++ precvpriv->adapter = padapter; ++ ++ precvpriv->free_recvframe_cnt = NR_RECVFRAME; ++ ++ rtw_os_recv_resource_init(precvpriv, padapter); ++ ++ precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ ++ if(precvpriv->pallocated_frame_buf==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ //_rtw_memset(precvpriv->pallocated_frame_buf, 0, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ ++ precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ); ++ //precvpriv->precv_frame_buf = precvpriv->pallocated_frame_buf + RXFRAME_ALIGN_SZ - ++ // ((SIZE_PTR) (precvpriv->pallocated_frame_buf) &(RXFRAME_ALIGN_SZ-1)); ++ ++ precvframe = (union recv_frame*) precvpriv->precv_frame_buf; ++ ++ ++ for(i=0; i < NR_RECVFRAME ; i++) ++ { ++ _rtw_init_listhead(&(precvframe->u.list)); ++ ++ rtw_list_insert_tail(&(precvframe->u.list), &(precvpriv->free_recv_queue.queue)); ++ ++ res = rtw_os_recv_resource_alloc(padapter, precvframe); ++ ++ precvframe->u.hdr.adapter =padapter; ++ precvframe++; ++ ++ } ++ ++#ifdef CONFIG_USB_HCI ++ ++ precvpriv->rx_pending_cnt=1; ++ ++ _rtw_init_sema(&precvpriv->allrxreturnevt, 0); ++ ++#endif ++ ++ res = rtw_hal_init_recv_priv(padapter); ++ ++ precvpriv->recvbuf_skb_alloc_fail_cnt = 0; ++ precvpriv->recvbuf_null_cnt = 0; ++ precvpriv->read_port_complete_EINPROGRESS_cnt = 0; ++ precvpriv->read_port_complete_other_urb_err_cnt = 0; ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ #ifdef PLATFORM_LINUX ++ #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&precvpriv->signal_stat_timer, padapter->pnetdev, RTW_TIMER_HDL_NAME(signal_stat), padapter); ++ #else ++ timer_setup(&precvpriv->signal_stat_timer, RTW_TIMER_HDL_NAME(signal_stat), 0); ++ #endif ++ #elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS) ++ _init_timer(&precvpriv->signal_stat_timer, padapter->hndis_adapter, RTW_TIMER_HDL_NAME(signal_stat), padapter); ++ #endif ++ ++ precvpriv->signal_stat_sampling_interval = 1000; //ms ++ //precvpriv->signal_stat_converging_constant = 5000; //ms ++ ++ rtw_set_signal_stat_timer(precvpriv); ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv); ++void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv) ++{ ++ _rtw_spinlock_free(&precvpriv->lock); ++#ifdef CONFIG_RECV_THREAD_MODE ++ _rtw_free_sema(&precvpriv->recv_sema); ++ _rtw_free_sema(&precvpriv->terminate_recvthread_sema); ++#endif ++ ++ _rtw_spinlock_free(&precvpriv->free_recv_queue.lock); ++ _rtw_spinlock_free(&precvpriv->recv_pending_queue.lock); ++ ++ _rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ _rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++} ++ ++void _rtw_free_recv_priv (struct recv_priv *precvpriv) ++{ ++ _adapter *padapter = precvpriv->adapter; ++ ++_func_enter_; ++ ++ rtw_free_uc_swdec_pending_queue(padapter); ++ ++ rtw_mfree_recv_priv_lock(precvpriv); ++ ++ rtw_os_recv_resource_free(precvpriv); ++ ++ if(precvpriv->pallocated_frame_buf) { ++ rtw_vmfree(precvpriv->pallocated_frame_buf, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ } ++ ++ rtw_hal_free_recv_priv(padapter); ++ ++_func_exit_; ++ ++} ++ ++union recv_frame *_rtw_alloc_recvframe (_queue *pfree_recv_queue) ++{ ++ ++ union recv_frame *precvframe; ++ _list *plist, *phead; ++ _adapter *padapter; ++ struct recv_priv *precvpriv; ++_func_enter_; ++ ++ if(_rtw_queue_empty(pfree_recv_queue) == _TRUE) ++ { ++ precvframe = NULL; ++ } ++ else ++ { ++ phead = get_list_head(pfree_recv_queue); ++ ++ plist = get_next(phead); ++ ++ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ rtw_list_delete(&precvframe->u.hdr.list); ++ padapter=precvframe->u.hdr.adapter; ++ if(padapter !=NULL){ ++ precvpriv=&padapter->recvpriv; ++ if(pfree_recv_queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt--; ++ } ++ } ++ ++_func_exit_; ++ ++ return precvframe; ++ ++} ++ ++union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue) ++{ ++ _irqL irqL; ++ union recv_frame *precvframe; ++ ++ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++ precvframe = _rtw_alloc_recvframe(pfree_recv_queue); ++ ++ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++ return precvframe; ++} ++ ++void rtw_init_recvframe(union recv_frame *precvframe, struct recv_priv *precvpriv) ++{ ++ /* Perry: This can be removed */ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ ++ precvframe->u.hdr.len=0; ++} ++ ++int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue) ++{ ++ _irqL irqL; ++ _adapter *padapter=precvframe->u.hdr.adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++_func_enter_; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type > PRIMARY_ADAPTER) ++ { ++ padapter = padapter->pbuddy_adapter;//get primary_padapter ++ precvpriv = &padapter->recvpriv; ++ pfree_recv_queue = &precvpriv->free_recv_queue; ++ precvframe->u.hdr.adapter = padapter; ++ } ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ rtw_os_read_port(padapter, precvframe->u.hdr.precvbuf); ++#endif ++ ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++ ++ if(precvframe->u.hdr.pkt) ++ { ++#ifdef CONFIG_BSD_RX_USE_MBUF ++ m_freem(precvframe->u.hdr.pkt); ++#else // CONFIG_BSD_RX_USE_MBUF ++ rtw_skb_free(precvframe->u.hdr.pkt);//free skb by driver ++#endif // CONFIG_BSD_RX_USE_MBUF ++ precvframe->u.hdr.pkt = NULL; ++ } ++ ++#endif //defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++ ++ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++ rtw_list_delete(&(precvframe->u.hdr.list)); ++ ++ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(pfree_recv_queue)); ++ ++ if(padapter !=NULL){ ++ if(pfree_recv_queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt++; ++ } ++ ++ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++ ++ ++ ++sint _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) ++{ ++ ++ _adapter *padapter=precvframe->u.hdr.adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++_func_enter_; ++ ++ //_rtw_init_listhead(&(precvframe->u.hdr.list)); ++ rtw_list_delete(&(precvframe->u.hdr.list)); ++ ++ ++ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(queue)); ++ ++ if (padapter != NULL) { ++ if (queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt++; ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) ++{ ++ sint ret; ++ _irqL irqL; ++ ++ //_spinlock(&pfree_recv_queue->lock); ++ _enter_critical_bh(&queue->lock, &irqL); ++ ret = _rtw_enqueue_recvframe(precvframe, queue); ++ //_rtw_spinunlock(&pfree_recv_queue->lock); ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ return ret; ++} ++ ++/* ++sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) ++{ ++ return rtw_free_recvframe(precvframe, queue); ++} ++*/ ++ ++ ++ ++ ++/* ++caller : defrag ; recvframe_chk_defrag in recv_thread (passive) ++pframequeue: defrag_queue : will be accessed in recv_thread (passive) ++ ++using spinlock to protect ++ ++*/ ++ ++void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue) ++{ ++ union recv_frame *precvframe; ++ _list *plist, *phead; ++ ++_func_enter_; ++ _rtw_spinlock(&pframequeue->lock); ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ plist = get_next(plist); ++ ++ //rtw_list_delete(&precvframe->u.hdr.list); // will do this in rtw_free_recvframe() ++ ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ } ++ ++ _rtw_spinunlock(&pframequeue->lock); ++ ++_func_exit_; ++ ++} ++ ++u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter) ++{ ++ u32 cnt = 0; ++ union recv_frame *pending_frame; ++ while((pending_frame=rtw_alloc_recvframe(&adapter->recvpriv.uc_swdec_pending_queue))) { ++ rtw_free_recvframe(pending_frame, &adapter->recvpriv.free_recv_queue); ++ DBG_871X("%s: dequeue uc_swdec_pending_queue\n", __func__); ++ cnt++; ++ } ++ ++ return cnt; ++} ++ ++ ++sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue) ++{ ++ _irqL irqL; ++ ++ _enter_critical(&queue->lock, &irqL); ++ ++ rtw_list_delete(&precvbuf->list); ++ rtw_list_insert_head(&precvbuf->list, get_list_head(queue)); ++ ++ _exit_critical(&queue->lock, &irqL); ++ ++ return _SUCCESS; ++} ++ ++sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue) ++{ ++ _irqL irqL; ++ ++ _enter_critical(&queue->lock, &irqL); ++ ++ rtw_list_delete(&precvbuf->list); ++ ++ rtw_list_insert_tail(&precvbuf->list, get_list_head(queue)); ++ ++ _exit_critical(&queue->lock, &irqL); ++ ++ ++ return _SUCCESS; ++ ++} ++ ++struct recv_buf *rtw_dequeue_recvbuf (_queue *queue) ++{ ++ _irqL irqL; ++ struct recv_buf *precvbuf; ++ _list *plist, *phead; ++ ++ _enter_critical(&queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(queue) == _TRUE) ++ { ++ precvbuf = NULL; ++ } ++ else ++ { ++ phead = get_list_head(queue); ++ ++ plist = get_next(phead); ++ ++ precvbuf = LIST_CONTAINOR(plist, struct recv_buf, list); ++ ++ rtw_list_delete(&precvbuf->list); ++ ++ } ++ ++ _exit_critical(&queue->lock, &irqL); ++ ++ ++ return precvbuf; ++ ++} ++ ++sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe); ++sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe){ ++ ++ sint i,res=_SUCCESS; ++ u32 datalen; ++ u8 miccode[8]; ++ u8 bmic_err=_FALSE,brpt_micerror = _TRUE; ++ u8 *pframe, *payload,*pframemic; ++ u8 *mickey; ++ //u8 *iv,rxdata_key_idx=0; ++ struct sta_info *stainfo; ++ struct rx_pkt_attrib *prxattrib=&precvframe->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&adapter->securitypriv; ++ ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++_func_enter_; ++ ++ stainfo=rtw_get_stainfo(&adapter->stapriv ,&prxattrib->ta[0]); ++ ++ if(prxattrib->encrypt ==_TKIP_) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:prxattrib->encrypt ==_TKIP_\n")); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:da=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2],prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5])); ++ ++ //calculate mic code ++ if(stainfo!= NULL) ++ { ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ //mickey=&psecuritypriv->dot118021XGrprxmickey.skey[0]; ++ //iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen; ++ //rxdata_key_idx =( ((iv[3])>>6)&0x3) ; ++ mickey=&psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0]; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic: bcmc key \n")); ++ //DBG_871X("\n recvframe_chkmic: bcmc key psecuritypriv->dot118021XGrpKeyid(%d),pmlmeinfo->key_index(%d) ,recv key_id(%d)\n", ++ // psecuritypriv->dot118021XGrpKeyid,pmlmeinfo->key_index,rxdata_key_idx); ++ ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n")); ++ DBG_871X("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n"); ++ goto exit; ++ } ++ } ++ else{ ++ mickey=&stainfo->dot11tkiprxmickey.skey[0]; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic: unicast key \n")); ++ } ++ ++ datalen=precvframe->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len-prxattrib->icv_len-8;//icv_len included the mic code ++ pframe=precvframe->u.hdr.rx_data; ++ payload=pframe+prxattrib->hdrlen+prxattrib->iv_len; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n prxattrib->iv_len=%d prxattrib->icv_len=%d\n",prxattrib->iv_len,prxattrib->icv_len)); ++ ++ //rtw_seccalctkipmic(&stainfo->dot11tkiprxmickey.skey[0],pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data ++ ++ rtw_seccalctkipmic(mickey,pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data ++ ++ pframemic=payload+datalen; ++ ++ bmic_err=_FALSE; ++ ++ for(i=0;i<8;i++){ ++ if(miccode[i] != *(pframemic+i)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic:miccode[%d](%02x) != *(pframemic+%d)(%02x) ",i,miccode[i],i,*(pframemic+i))); ++ bmic_err=_TRUE; ++ } ++ } ++ ++ ++ if(bmic_err==_TRUE){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-8)-*(pframemic-1)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ *(pframemic-8),*(pframemic-7),*(pframemic-6),*(pframemic-5),*(pframemic-4),*(pframemic-3),*(pframemic-2),*(pframemic-1))); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-16)-*(pframemic-9)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ *(pframemic-16),*(pframemic-15),*(pframemic-14),*(pframemic-13),*(pframemic-12),*(pframemic-11),*(pframemic-10),*(pframemic-9))); ++ ++ { ++ uint i; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet (len=%d)======\n",precvframe->u.hdr.len)); ++ for(i=0;iu.hdr.len;i=i+8){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x", ++ *(precvframe->u.hdr.rx_data+i),*(precvframe->u.hdr.rx_data+i+1), ++ *(precvframe->u.hdr.rx_data+i+2),*(precvframe->u.hdr.rx_data+i+3), ++ *(precvframe->u.hdr.rx_data+i+4),*(precvframe->u.hdr.rx_data+i+5), ++ *(precvframe->u.hdr.rx_data+i+6),*(precvframe->u.hdr.rx_data+i+7))); ++ } ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet end [len=%d]======\n",precvframe->u.hdr.len)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n hrdlen=%d, \n",prxattrib->hdrlen)); ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ra=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x psecuritypriv->binstallGrpkey=%d ", ++ prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2], ++ prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5],psecuritypriv->binstallGrpkey)); ++ ++ // double check key_index for some timing issue , ++ // cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue ++ if((IS_MCAST(prxattrib->ra)==_TRUE) && (prxattrib->key_index != pmlmeinfo->key_index )) ++ brpt_micerror = _FALSE; ++ ++ if(brpt_micerror == _TRUE) ++ { ++ rtw_handle_tkip_mic_err(adapter,(u8)IS_MCAST(prxattrib->ra)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d \n", brpt_micerror)); ++ DBG_871X(" mic error :brpt_micerror=%d\n", brpt_micerror); ++ } ++ ++ res=_FAIL; ++ ++ } ++ else{ ++ //mic checked ok ++ if((psecuritypriv->bcheck_grpkey ==_FALSE)&&(IS_MCAST(prxattrib->ra)==_TRUE)){ ++ psecuritypriv->bcheck_grpkey =_TRUE; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->bcheck_grpkey =_TRUE")); ++ } ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic: rtw_get_stainfo==NULL!!!\n")); ++ } ++ ++ recvframe_pull_tail(precvframe, 8); ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++//decrypt and set the ivlen,icvlen of the recv_frame ++union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame); ++union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame) ++{ ++ ++ struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ union recv_frame *return_packet=precv_frame; ++ u32 res=_SUCCESS; ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("prxstat->decrypted=%x prxattrib->encrypt = 0x%03x\n",prxattrib->bdecrypted,prxattrib->encrypt)); ++ ++ if(prxattrib->encrypt>0) ++ { ++ u8 *iv = precv_frame->u.hdr.rx_data+prxattrib->hdrlen; ++ prxattrib->key_index = ( ((iv[3])>>6)&0x3) ; ++ ++ if(prxattrib->key_index > WEP_KEYS) ++ { ++ DBG_871X("prxattrib->key_index(%d) > WEP_KEYS \n", prxattrib->key_index); ++ ++ switch(prxattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ prxattrib->key_index = psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case _TKIP_: ++ case _AES_: ++ default: ++ prxattrib->key_index = psecuritypriv->dot118021XGrpKeyid; ++ break; ++ } ++ } ++ } ++ ++ if((prxattrib->encrypt>0) && ((prxattrib->bdecrypted==0) ||(psecuritypriv->sw_decrypt==_TRUE))) ++ { ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(!IS_MCAST(prxattrib->ra))//bc/mc packets use sw decryption for concurrent mode ++#endif ++ psecuritypriv->hw_decrypted=_FALSE; ++ ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ ++ switch(prxattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ rtw_wep_decrypt(padapter, (u8 *)precv_frame); ++ break; ++ case _TKIP_: ++ res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame); ++ break; ++ case _AES_: ++ res = rtw_aes_decrypt(padapter, (u8 * )precv_frame); ++ break; ++ default: ++ break; ++ } ++ } ++ else if(prxattrib->bdecrypted==1 ++ && prxattrib->encrypt >0 ++ && (psecuritypriv->busetkipkey==1 || prxattrib->encrypt !=_TKIP_ ) ++ ) ++ { ++#if 0 ++ if((prxstat->icv==1)&&(prxattrib->encrypt!=_AES_)) ++ { ++ psecuritypriv->hw_decrypted=_FALSE; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->hw_decrypted=_FALSE")); ++ ++ rtw_free_recvframe(precv_frame, &padapter->recvpriv.free_recv_queue); ++ ++ return_packet=NULL; ++ ++ } ++ else ++#endif ++ { ++ psecuritypriv->hw_decrypted=_TRUE; ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ ++ } ++ } ++ else { ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, psecuritypriv->hw_decrypted:%d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ } ++ ++ if(res == _FAIL) ++ { ++ rtw_free_recvframe(return_packet,&padapter->recvpriv.free_recv_queue); ++ return_packet = NULL; ++ ++ } ++ //recvframe_chkmic(adapter, precv_frame); //move to recvframme_defrag function ++ ++_func_exit_; ++ ++ return return_packet; ++ ++} ++//###set the security information in the recv_frame ++union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame); ++union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame) ++{ ++ u8 *psta_addr,*ptr; ++ uint auth_alg; ++ struct recv_frame_hdr *pfhdr; ++ struct sta_info * psta; ++ struct sta_priv *pstapriv ; ++ union recv_frame * prtnframe; ++ u16 ether_type=0; ++ u16 eapol_type = 0x888e;//for Funia BD's WPA issue ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ ++_func_enter_; ++ ++ pstapriv = &adapter->stapriv; ++ ptr = get_recvframe_data(precv_frame); ++ pfhdr = &precv_frame->u.hdr; ++ psta_addr = pfhdr->attrib.ta; ++ psta = rtw_get_stainfo(pstapriv, psta_addr); ++ ++ auth_alg = adapter->securitypriv.dot11AuthAlgrthm; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:adapter->securitypriv.dot11AuthAlgrthm= 0x%d\n",adapter->securitypriv.dot11AuthAlgrthm)); ++ ++ if(auth_alg==2) ++ { ++ if ((psta!=NULL) && (psta->ieee8021x_blocked)) ++ { ++ //blocked ++ //only accept EAPOL frame ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==1\n")); ++ ++ prtnframe=precv_frame; ++ ++ //get ether_type ++ ptr=ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE; ++ _rtw_memcpy(ðer_type,ptr, 2); ++ ether_type= ntohs((unsigned short )ether_type); ++ ++ if (ether_type == eapol_type) { ++ prtnframe=precv_frame; ++ } ++ else { ++ //free this frame ++ rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue); ++ prtnframe=NULL; ++ } ++ } ++ else ++ { ++ //allowed ++ //check decryption status, and decrypt the frame if needed ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==0\n")); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:precv_frame->hdr.attrib.privacy=%x\n",precv_frame->u.hdr.attrib.privacy)); ++ ++ if(pattrib->bdecrypted==0) ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:prxstat->decrypted=%x\n", pattrib->bdecrypted)); ++ ++ prtnframe=precv_frame; ++ //check is the EAPOL frame or not (Rekey) ++ if(ether_type == eapol_type){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type == 0x888e\n")); ++ //check Rekey ++ ++ prtnframe=precv_frame; ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type = 0x%.4x\n",ether_type)); ++ } ++ } ++ } ++ else ++ { ++ prtnframe=precv_frame; ++ } ++ ++_func_exit_; ++ ++ return prtnframe; ++ ++} ++ ++sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache); ++sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache) ++{ ++ sint tid = precv_frame->u.hdr.attrib.priority; ++ ++ u16 seq_ctrl = ( (precv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | ++ (precv_frame->u.hdr.attrib.frag_num & 0xf); ++ ++_func_enter_; ++ ++ if(tid>15) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, (tid>15)! seq_ctrl=0x%x, tid=0x%x\n", seq_ctrl, tid)); ++ ++ return _FAIL; ++ } ++ ++ if(1)//if(bretry) ++ { ++ if(seq_ctrl == prxcache->tid_rxseq[tid]) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, seq_ctrl=0x%x, tid=0x%x, tid_rxseq=0x%x\n", seq_ctrl, tid, prxcache->tid_rxseq[tid])); ++ ++ return _FAIL; ++ } ++ } ++ ++ prxcache->tid_rxseq[tid] = seq_ctrl; ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame); ++void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ unsigned char pwrbit; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL; ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ ++ pwrbit = GetPwrMgt(ptr); ++ ++ if(psta) ++ { ++ if(pwrbit) ++ { ++ if(!(psta->state & WIFI_SLEEP_STATE)) ++ { ++ //psta->state |= WIFI_SLEEP_STATE; ++ //pstapriv->sta_dz_bitmap |= BIT(psta->aid); ++ ++ stop_sta_xmit(padapter, psta); ++ ++ //DBG_871X("to sleep, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); ++ } ++ } ++ else ++ { ++ if(psta->state & WIFI_SLEEP_STATE) ++ { ++ //psta->state ^= WIFI_SLEEP_STATE; ++ //pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); ++ ++ wakeup_sta_to_xmit(padapter, psta); ++ ++ //DBG_871X("to wakeup, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); ++ } ++ } ++ ++ } ++ ++#endif ++} ++ ++void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); ++void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL; ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ ++ if(!psta) return; ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE ) ) ++ { ++#endif //CONFIG_TDLS ++ ++ if(!psta->qos_option) ++ return; ++ ++ if(!(psta->qos_info&0xf)) ++ return; ++ ++#ifdef CONFIG_TDLS ++ } ++#endif //CONFIG_TDLS ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ { ++ u8 wmmps_ac=0; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ if(wmmps_ac) ++ { ++ if(psta->sleepq_ac_len>0) ++ { ++ //process received triggered frame ++ xmit_delivery_enabled_frames(padapter, psta); ++ } ++ else ++ { ++ //issue one qos null frame with More data bit = 0 and the EOSP bit set (=1) ++ issue_qos_nulldata(padapter, psta->hwaddr, (u16)pattrib->priority, 0, 0); ++ } ++ } ++ ++ } ++ ++ ++#endif ++ ++} ++ ++#ifdef CONFIG_TDLS ++sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ sint ret = _SUCCESS; ++ u8 *paction = get_recvframe_data(precv_frame); ++ u8 category_field = 1; ++#ifdef CONFIG_WFD ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a }; ++#endif //CONFIG_WFD ++ struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); ++ ++ //point to action field ++ paction+=pattrib->hdrlen ++ + pattrib->iv_len ++ + SNAP_SIZE ++ + ETH_TYPE_LEN ++ + PAYLOAD_TYPE_LEN ++ + category_field; ++ ++ if(ptdlsinfo->enable == 0) ++ { ++ DBG_871X("recv tdls frame, " ++ "but tdls haven't enabled\n"); ++ ret = _FAIL; ++ return ret; ++ } ++ ++ switch(*paction){ ++ case TDLS_SETUP_REQUEST: ++ DBG_871X("recv tdls setup request frame\n"); ++ ret=On_TDLS_Setup_Req(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ DBG_871X("recv tdls setup response frame\n"); ++ ret=On_TDLS_Setup_Rsp(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ DBG_871X("recv tdls setup confirm frame\n"); ++ ret=On_TDLS_Setup_Cfm(adapter, precv_frame); ++ break; ++ case TDLS_TEARDOWN: ++ DBG_871X("recv tdls teardown, free sta_info\n"); ++ ret=On_TDLS_Teardown(adapter, precv_frame); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ DBG_871X("recv tdls discovery request frame\n"); ++ ret=On_TDLS_Dis_Req(adapter, precv_frame); ++ break; ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ DBG_871X("recv tdls peer traffic response frame\n"); ++ ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ DBG_871X("recv tdls channel switch request frame\n"); ++ ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame); ++ break; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ DBG_871X("recv tdls channel switch response frame\n"); ++ ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame); ++ break; ++#ifdef CONFIG_WFD ++ case 0x50: //First byte of WFA OUI ++ if( _rtw_memcmp(WFA_OUI, (paction), 3) ) ++ { ++ if( *(paction + 3) == 0x04) //Probe request frame ++ { ++ //WFDTDLS: for sigma test, do not setup direct link automatically ++ ptdlsinfo->dev_discovered = 1; ++ DBG_871X("recv tunneled probe request frame\n"); ++ issue_tunneled_probe_rsp(adapter, precv_frame); ++ } ++ if( *(paction + 3) == 0x05) //Probe response frame ++ { ++ //WFDTDLS: for sigma test, do not setup direct link automatically ++ ptdlsinfo->dev_discovered = 1; ++ DBG_871X("recv tunneled probe response frame\n"); ++ } ++ } ++ break; ++#endif //CONFIG_WFD ++ default: ++ DBG_871X("receive TDLS frame but not supported\n"); ++ ret=_FAIL; ++ break; ++ } ++ ++exit: ++ return ret; ++ ++} ++#endif //CONFIG_TDLS ++ ++void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta); ++void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta) ++{ ++ int sz; ++ struct sta_info *psta = NULL; ++ struct stainfo_stats *pstats = NULL; ++ struct rx_pkt_attrib *pattrib = & prframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ sz = get_recvframe_len(prframe); ++ precvpriv->rx_bytes += sz; ++ ++ padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++; ++ ++ if( (!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))){ ++ padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++; ++ } ++ ++ if(sta) ++ psta = sta; ++ else ++ psta = prframe->u.hdr.psta; ++ ++ if(psta) ++ { ++ pstats = &psta->sta_stats; ++ ++ pstats->rx_data_pkts++; ++ pstats->rx_bytes += sz; ++ } ++ ++} ++ ++sint sta2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ++); ++sint sta2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ++) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint ret = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 *mybssid = get_bssid(pmlmepriv); ++ u8 *myhwaddr = myid(&adapter->eeprompriv); ++ u8 * sta_addr = NULL; ++ sint bmcast = IS_MCAST(pattrib->dst); ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta=NULL; ++ u8 *psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ u8 *pframe_body = psnap_type + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; ++#endif //CONFIG_TDLS ++ ++_func_enter_; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if( (!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast) ){ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->src; ++ ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++#ifdef CONFIG_TDLS ++ //direct link data transfer ++ if(ptdlsinfo->setup_state == TDLS_LINKED_STATE){ ++ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ if(ptdls_sta==NULL) ++ { ++ ret=_FAIL; ++ goto exit; ++ } ++ else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE) ++ { ++ //drop QoS-SubType Data, including QoS NULL, excluding QoS-Data ++ if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE) ++ { ++ if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6))) ++ { ++ DBG_871X("drop QoS-Sybtype Data\n"); ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ ret= _FAIL; ++ goto exit; ++ } ++ // da should be for me ++ if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ // check BSSID ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //process UAPSD tdls sta ++ process_pwrbit_data(adapter, precv_frame); ++ ++ // if NULL-frame, check pwrbit ++ if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL) ++ { ++ //NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA ++ if(GetPwrMgt(ptr)) ++ { ++ DBG_871X("TDLS: recv peer null frame with pwr bit 1\n"); ++ ptdls_sta->tdls_sta_state|=TDLS_PEER_SLEEP_STATE; ++ } ++ // it would be triggered when we are off channel and receiving NULL DATA ++ // we can confirm that peer STA is at off channel ++ else if(ptdls_sta->tdls_sta_state&TDLS_CH_SWITCH_ON_STATE) ++ { ++ if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE) ++ { ++ issue_nulldata_to_TDLS_peer_STA(adapter, ptdls_sta, 0); ++ ptdls_sta->tdls_sta_state |= TDLS_PEER_AT_OFF_STATE; ++ On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); ++ } ++ } ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ //receive some of all TDLS management frames, process it at ON_TDLS ++ if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))){ ++ ret= OnTDLS(adapter, precv_frame); ++ goto exit; ++ } ++ ++ } ++ ++ sta_addr = pattrib->src; ++ ++ } ++ else ++#endif //CONFIG_TDLS ++ { ++ // For Station mode, sa and bssid should always be BSSID, and DA is my mac-address ++ if(!_rtw_memcmp(pattrib->bssid, pattrib->src, ETH_ALEN) ) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("bssid != TA under STATION_MODE; drop pkt\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->bssid; ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ if (bmcast) ++ { ++ // For AP mode, if DA == MCAST, then BSSID should be also MCAST ++ if (!IS_MCAST(pattrib->bssid)){ ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ else // not mc-frame ++ { ++ // For AP mode, if DA is non-MCAST, then it must be BSSID, and bssid == BSSID ++ if(!_rtw_memcmp(pattrib->bssid, pattrib->dst, ETH_ALEN)) { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->src; ++ } ++ ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ sta_addr = mybssid; ++ } ++ else ++ { ++ ret = _FAIL; ++ } ++ ++ ++ ++ if(bmcast) ++ *psta = rtw_get_bcmc_stainfo(adapter); ++ else ++ *psta = rtw_get_stainfo(pstapriv, sta_addr); // get ap_info ++ ++#ifdef CONFIG_TDLS ++ if(ptdls_sta != NULL) ++ *psta = ptdls_sta; ++#endif //CONFIG_TDLS ++ ++ ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under sta2sta_data_frame ; drop pkt\n")); ++#ifdef CONFIG_MP_INCLUDED ++ if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ adapter->mppriv.rx_pktloss++; ++#endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++exit: ++_func_exit_; ++ return ret; ++ ++} ++ ++sint ap2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ); ++sint ap2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ sint ret = _SUCCESS; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 *mybssid = get_bssid(pmlmepriv); ++ u8 *myhwaddr = myid(&adapter->eeprompriv); ++ sint bmcast = IS_MCAST(pattrib->dst); ++ ++_func_enter_; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ++ || check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE ) ++ ) ++ { ++ ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s SA=%x:%x:%x:%x:%x:%x, myhwaddr= %x:%x:%x:%x:%x:%x\n", __FUNCTION__, ++ pattrib->src[0], pattrib->src[1], pattrib->src[2], ++ pattrib->src[3], pattrib->src[4], pattrib->src[5], ++ *(myhwaddr), *(myhwaddr+1), *(myhwaddr+2), ++ *(myhwaddr+3), *(myhwaddr+4), *(myhwaddr+5)); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // da should be for me ++ if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_, ++ (" ap2sta_data_frame: compare DA fail; DA="MAC_FMT"\n", MAC_ARG(pattrib->dst))); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s DA="MAC_FMT"\n", __func__, MAC_ARG(pattrib->dst)); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ ++ // check BSSID ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_, ++ (" ap2sta_data_frame: compare BSSID fail ; BSSID="MAC_FMT"\n", MAC_ARG(pattrib->bssid))); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("mybssid="MAC_FMT"\n", MAC_ARG(mybssid))); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s BSSID="MAC_FMT", mybssid="MAC_FMT"\n", ++ __FUNCTION__, MAC_ARG(pattrib->bssid), MAC_ARG(mybssid)); ++ DBG_871X( "this adapter = %d, buddy adapter = %d\n", adapter->adapter_type, adapter->pbuddy_adapter->adapter_type ); ++ #endif ++ ++ if(!bmcast) ++ { ++ DBG_871X("issue_deauth to the nonassociated ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); ++ issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ++ } ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if(bmcast) ++ *psta = rtw_get_bcmc_stainfo(adapter); ++ else ++ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get ap_info ++ ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ap2sta: can't get psta under STATION_MODE ; drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under STATION_MODE ; drop pkt\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { ++ } ++ ++ if (GetFrameSubType(ptr) & BIT(6)) { ++ /* No data, will not indicate to upper layer, temporily count it here */ ++ count_rx_stats(adapter, precv_frame, *psta); ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && ++ (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ) ++ { ++ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ // ++ _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); ++ ++ ++ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ /* Special case */ ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ else ++ { ++ if(_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)&& (!bmcast)) ++ { ++ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info ++ if (*psta == NULL) ++ { ++ DBG_871X("issue_deauth to the ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); ++ ++ issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ++ } ++ } ++ ++ ret = _FAIL; ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s fw_state:0x%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ #endif ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++sint sta2ap_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ); ++sint sta2ap_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ unsigned char *mybssid = get_bssid(pmlmepriv); ++ sint ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ //For AP mode, RA=BSSID, TX=STA(SRC_ADDR), A3=DST_ADDR ++ if(!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ *psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ if (*psta == NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under AP_MODE; drop pkt\n")); ++ DBG_871X("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); ++ ++ issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ++ ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ ++ process_pwrbit_data(adapter, precv_frame); ++ ++ if ((GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE) == WIFI_QOS_DATA_TYPE) { ++ process_wmmps_data(adapter, precv_frame); ++ } ++ ++ if (GetFrameSubType(ptr) & BIT(6)) { ++ /* No data, will not indicate to upper layer, temporily count it here */ ++ count_rx_stats(adapter, precv_frame, *psta); ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ } ++ else { ++ u8 *myhwaddr = myid(&adapter->eeprompriv); ++ if (!_rtw_memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) { ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ DBG_871X("issue_deauth to sta=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->src)); ++ issue_deauth(adapter, pattrib->src, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); ++ ret = RTW_RX_HANDLED; ++ goto exit; ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame); ++sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ //uint len = precv_frame->u.hdr.len; ++ ++ //DBG_871X("+validate_recv_ctrl_frame\n"); ++ ++ if (GetFrameType(pframe) != WIFI_CTRL_TYPE) ++ { ++ return _FAIL; ++ } ++ ++ //receive the frames that ra(a1) is my address ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN)) ++ { ++ return _FAIL; ++ } ++ ++ //only handle ps-poll ++ if(GetFrameSubType(pframe) == WIFI_PSPOLL) ++ { ++ u16 aid; ++ u8 wmmps_ac=0; ++ struct sta_info *psta=NULL; ++ ++ aid = GetAid(pframe); ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ ++ if((psta==NULL) || (psta->aid!=aid)) ++ { ++ return _FAIL; ++ } ++ ++ //for rx pkt statistics ++ psta->sta_stats.rx_ctrl_pkts++; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(0); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(0); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(0); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(0); ++ break; ++ } ++ ++ if(wmmps_ac) ++ return _FAIL; ++ ++ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ { ++ DBG_871X("%s alive check-rx ps-poll\n", __func__); ++ psta->expire_to = pstapriv->expire_to; ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ } ++ ++ if((psta->state&WIFI_SLEEP_STATE) && (pstapriv->sta_dz_bitmap&BIT(psta->aid))) ++ { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ if ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta->sleepq_len--; ++ ++ if(psta->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ //DBG_871X("handling ps-poll, q_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++#if 0 ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++#endif ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ if(psta->sleepq_len==0) ++ { ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("after handling ps-poll, tim=%x\n", pstapriv->tim_bitmap); ++ ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ } ++ else ++ { ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ //DBG_871X("no buffered packets to xmit\n"); ++ if(pstapriv->tim_bitmap&BIT(psta->aid)) ++ { ++ if(psta->sleepq_len==0) ++ { ++ DBG_871X("no buffered packets to xmit\n"); ++ ++ //issue nulldata with More data bit = 0 to indicate we have no buffered packets ++ issue_nulldata(padapter, psta->hwaddr, 0, 0, 0); ++ } ++ else ++ { ++ DBG_871X("error!psta->sleepq_len=%d\n", psta->sleepq_len); ++ psta->sleepq_len=0; ++ } ++ ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++#endif ++ ++ return _FAIL; ++ ++} ++ ++union recv_frame* recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame); ++sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame); ++sint validate_recv_mgnt_frame(PADAPTER padapter, union recv_frame *precv_frame) ++{ ++ //struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("+validate_recv_mgnt_frame\n")); ++ ++#if 0 ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ mgt_dispatcher(padapter, precv_frame); ++#else ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++#endif ++ } ++ else ++ { ++ mgt_dispatcher(padapter, precv_frame); ++ } ++#endif ++ ++ precv_frame = recvframe_chk_defrag(padapter, precv_frame); ++ if (precv_frame == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_,("%s: fragment packet\n",__FUNCTION__)); ++ return _SUCCESS; ++ } ++ ++ { ++ //for rx pkt statistics ++ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, GetAddr2Ptr(precv_frame->u.hdr.rx_data)); ++ if (psta) { ++ psta->sta_stats.rx_mgnt_pkts++; ++ if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_BEACON) ++ psta->sta_stats.rx_beacon_pkts++; ++ else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBEREQ) ++ psta->sta_stats.rx_probereq_pkts++; ++ else if (GetFrameSubType(precv_frame->u.hdr.rx_data) == WIFI_PROBERSP) { ++ if (_rtw_memcmp(padapter->eeprompriv.mac_addr, GetAddr1Ptr(precv_frame->u.hdr.rx_data), ETH_ALEN) == _TRUE) ++ psta->sta_stats.rx_probersp_pkts++; ++ else if (is_broadcast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data)) ++ || is_multicast_mac_addr(GetAddr1Ptr(precv_frame->u.hdr.rx_data))) ++ psta->sta_stats.rx_probersp_bm_pkts++; ++ else ++ psta->sta_stats.rx_probersp_uo_pkts++; ++ } ++ } ++ } ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if(padapter->proximity.proxim_on==_TRUE) ++ { ++ struct rx_pkt_attrib * pattrib=&precv_frame->u.hdr.attrib; ++ struct recv_stat* prxstat=( struct recv_stat * ) precv_frame->u.hdr.rx_head ; ++ u8 * pda,*psa,*pbssid,*ptr; ++ ptr=precv_frame->u.hdr.rx_data; ++ pda = get_da(ptr); ++ psa = get_sa(ptr); ++ pbssid = get_hdr_bssid(ptr); ++ ++ ++ _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, psa, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); ++ ++ switch(pattrib->to_fr_ds) ++ { ++ case 0: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ break; ++ ++ case 1: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ++ break; ++ ++ case 2: ++ _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ break; ++ ++ case 3: ++ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); ++ break; ++ ++ default: ++ break; ++ ++ } ++ pattrib->priority=0; ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; ++ ++ padapter->proximity.proxim_rx(padapter,precv_frame); ++ } ++#endif ++ mgt_dispatcher(padapter, precv_frame); ++ ++ return _SUCCESS; ++ ++} ++ ++sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame); ++sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ u8 bretry; ++ u8 *psa, *pda, *pbssid; ++ struct sta_info *psta = NULL; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ sint ret = _SUCCESS; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#endif //CONFIG_TDLS ++ ++_func_enter_; ++ ++ bretry = GetRetry(ptr); ++ pda = get_da(ptr); ++ psa = get_sa(ptr); ++ pbssid = get_hdr_bssid(ptr); ++ ++ if(pbssid == NULL){ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, psa, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); ++ ++ switch(pattrib->to_fr_ds) ++ { ++ case 0: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ ret = sta2sta_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 1: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ++ ret = ap2sta_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 2: ++ _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ ret = sta2ap_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 3: ++ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ++ ret =_FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); ++ break; ++ ++ default: ++ ret =_FAIL; ++ break; ++ ++ } ++ ++ if(ret ==_FAIL){ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s case:%d, res:%d\n", __FUNCTION__, pattrib->to_fr_ds, ret); ++ #endif ++ goto exit; ++ } else if (ret == RTW_RX_HANDLED) { ++ goto exit; ++ } ++ ++ ++ if(psta==NULL){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" after to_fr_ds_chk; psta==NULL \n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //psta->rssi = prxcmd->rssi; ++ //psta->signal_quality= prxcmd->sq; ++ precv_frame->u.hdr.psta = psta; ++ ++ ++ pattrib->amsdu=0; ++ pattrib->ack_policy = 0; ++ //parsing QC field ++ if(pattrib->qos == 1) ++ { ++ pattrib->priority = GetPriority((ptr + 24)); ++ pattrib->ack_policy = GetAckpolicy((ptr + 24)); ++ pattrib->amsdu = GetAMsdu((ptr + 24)); ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 32 : 26; ++ ++ if(pattrib->priority!=0 && pattrib->priority!=3) ++ { ++ adapter->recvpriv.bIsAnyNonBEPkts = _TRUE; ++ } ++ } ++ else ++ { ++ pattrib->priority=0; ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; ++ } ++ ++ ++ if(pattrib->order)//HT-CTRL 11n ++ { ++ pattrib->hdrlen += 4; ++ } ++ ++ precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; ++ ++ // decache, drop duplicate recv packets ++ if(recv_decache(precv_frame, bretry, &psta->sta_recvpriv.rxcache) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decache : drop pkt\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++#if 0 ++ if(psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ if(psta->dot118021XPrivacy==_AES_) ++ pattrib->encrypt=psta->dot118021XPrivacy; ++ } ++#endif //CONFIG_TDLS ++ ++ if(pattrib->privacy){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("validate_recv_data_frame:pattrib->privacy=%x\n", pattrib->privacy)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n ^^^^^^^^^^^IS_MCAST(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0],IS_MCAST(pattrib->ra))); ++ ++#ifdef CONFIG_TDLS ++ if((psta->tdls_sta_state & TDLS_LINKED_STATE) && (psta->dot118021XPrivacy==_AES_)) ++ { ++ pattrib->encrypt=psta->dot118021XPrivacy; ++ } ++ else ++#endif //CONFIG_TDLS ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n pattrib->encrypt=%d\n",pattrib->encrypt)); ++ ++ SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); ++ } ++ else ++ { ++ pattrib->encrypt = 0; ++ pattrib->iv_len = pattrib->icv_len = 0; ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++#ifdef CONFIG_IEEE80211W ++static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ u8 type; ++ u8 subtype; ++ ++ type = GetFrameType(ptr); ++ subtype = GetFrameSubType(ptr); //bit(7)~bit(2) ++ ++ //only support station mode ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) ++ && adapter->securitypriv.binstallBIPkey == _TRUE) ++ { ++ //unicast management frame decrypt ++ if(pattrib->privacy && !(IS_MCAST(GetAddr1Ptr(ptr))) && ++ (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || subtype == WIFI_ACTION)) ++ { ++ u8 *ppp, *mgmt_DATA; ++ u32 data_len=0; ++ ppp = GetAddr2Ptr(ptr); ++ ++ pattrib->bdecrypted = 0; ++ pattrib->encrypt = _AES_; ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ //set iv and icv length ++ SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); ++ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ++ //actual management data frame body ++ data_len = pattrib->pkt_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len; ++ mgmt_DATA = rtw_zmalloc(data_len); ++ if(mgmt_DATA == NULL) ++ { ++ DBG_871X("%s mgmt allocate fail !!!!!!!!!\n", __FUNCTION__); ++ goto validate_80211w_fail; ++ } ++ /*//dump the packet content before decrypt ++ { ++ int pp; ++ printk("pattrib->pktlen = %d =>", pattrib->pkt_len); ++ for(pp=0;pp< pattrib->pkt_len; pp++) ++ printk(" %02x ", ptr[pp]); ++ printk("\n"); ++ }*/ ++ ++ precv_frame = decryptor(adapter, precv_frame); ++ //save actual management data frame body ++ _rtw_memcpy(mgmt_DATA, ptr+pattrib->hdrlen+pattrib->iv_len, data_len); ++ //overwrite the iv field ++ _rtw_memcpy(ptr+pattrib->hdrlen, mgmt_DATA, data_len); ++ //remove the iv and icv length ++ pattrib->pkt_len = pattrib->pkt_len - pattrib->iv_len - pattrib->icv_len; ++ rtw_mfree(mgmt_DATA, data_len); ++ /*//print packet content after decryption ++ { ++ int pp; ++ printk("after decryption pattrib->pktlen = %d @@=>", pattrib->pkt_len); ++ for(pp=0;pp< pattrib->pkt_len; pp++) ++ printk(" %02x ", ptr[pp]); ++ printk("\n"); ++ }*/ ++ if(!precv_frame) ++ { ++ DBG_871X("%s mgmt descrypt fail !!!!!!!!!\n", __FUNCTION__); ++ goto validate_80211w_fail; ++ } ++ } ++ else if(IS_MCAST(GetAddr1Ptr(ptr)) && ++ (subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC)) ++ { ++ sint BIP_ret = _SUCCESS; ++ //verify BIP MME IE of broadcast/multicast de-auth/disassoc packet ++ BIP_ret = rtw_BIP_verify(adapter, (u8 * )precv_frame); ++ if(BIP_ret == _FAIL) ++ { ++ //DBG_871X("802.11w BIP verify fail\n"); ++ goto validate_80211w_fail; ++ } ++ else if(BIP_ret == RTW_RX_HANDLED) ++ { ++ //DBG_871X("802.11w recv none protected packet\n"); ++ //issue sa query request ++ issue_action_SA_Query(adapter, NULL, 0, 0); ++ goto validate_80211w_fail; ++ } ++ }//802.11w protect ++ else ++ { ++ if(subtype == WIFI_ACTION) ++ { ++ //according 802.11-2012 standard, these five types are not robust types ++ if( ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_PUBLIC && ++ ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_HT && ++ ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_UNPROTECTED_WNM && ++ ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_SELF_PROTECTED && ++ ptr[WLAN_HDR_A3_LEN] != RTW_WLAN_CATEGORY_P2P) ++ { ++ DBG_871X("action frame category=%d should robust\n", ptr[WLAN_HDR_A3_LEN]); ++ goto validate_80211w_fail; ++ } ++ } ++ else if(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC) ++ { ++ DBG_871X("802.11w recv none protected packet\n"); ++ //issue sa query request ++ issue_action_SA_Query(adapter, NULL, 0, 0); ++ goto validate_80211w_fail; ++ } ++ } ++ } ++ return _SUCCESS; ++ ++validate_80211w_fail: ++ return _FAIL; ++ ++} ++#endif //CONFIG_IEEE80211W ++ ++sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame); ++sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ //shall check frame subtype, to / from ds, da, bssid ++ ++ //then call check if rx seq/frag. duplicated. ++ ++ u8 type; ++ u8 subtype; ++ sint retval = _SUCCESS; ++ ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ u8 ver =(unsigned char) (*ptr)&0x3 ; ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++#endif ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#endif //CONFIG_TDLS ++ ++_func_enter_; ++ ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { ++ int ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, rtw_get_oper_ch(adapter)); ++ if (ch_set_idx >= 0) ++ pmlmeext->channel_set[ch_set_idx].rx_count++; ++ } ++#endif ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->ch_sensing==1 && ptdlsinfo->cur_channel !=0){ ++ ptdlsinfo->collect_pkt_num[ptdlsinfo->cur_channel-1]++; ++ } ++#endif //CONFIG_TDLS ++ ++#ifdef RTK_DMP_PLATFORM ++ if ( 0 ) ++ { ++ DBG_871X("++\n"); ++ { ++ int i; ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ ++ } ++ DBG_871X("--\n"); ++ } ++#endif //RTK_DMP_PLATFORM ++ ++ //add version chk ++ if(ver!=0){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! (ver!=0)\n")); ++ retval= _FAIL; ++ goto exit; ++ } ++ ++ type = GetFrameType(ptr); ++ subtype = GetFrameSubType(ptr); //bit(7)~bit(2) ++ ++ pattrib->to_fr_ds = get_tofr_ds(ptr); ++ ++ pattrib->frag_num = GetFragNum(ptr); ++ pattrib->seq_num = GetSequence(ptr); ++ ++ pattrib->pw_save = GetPwrMgt(ptr); ++ pattrib->mfrag = GetMFrag(ptr); ++ pattrib->mdata = GetMData(ptr); ++ pattrib->privacy = GetPrivacy(ptr); ++ pattrib->order = GetOrder(ptr); ++#if 0 //for debug ++ ++if(pHalData->bDumpRxPkt ==1){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++} ++else if(pHalData->bDumpRxPkt ==2){ ++ if(type== WIFI_MGT_TYPE){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++ } ++} ++else if(pHalData->bDumpRxPkt ==3){ ++ if(type== WIFI_DATA_TYPE){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++ } ++} ++ ++#endif ++ switch (type) ++ { ++ case WIFI_MGT_TYPE: //mgnt ++#ifdef CONFIG_IEEE80211W ++ if(validate_80211w_mgmt(adapter, precv_frame) == _FAIL) ++ { ++ retval = _FAIL; ++ break; ++ } ++#endif //CONFIG_IEEE80211W ++ ++ retval = validate_recv_mgnt_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_mgnt_frame fail\n")); ++ } ++ retval = _FAIL; // only data frame return _SUCCESS ++ break; ++ case WIFI_CTRL_TYPE: //ctrl ++ retval = validate_recv_ctrl_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_ctrl_frame fail\n")); ++ } ++ retval = _FAIL; // only data frame return _SUCCESS ++ break; ++ case WIFI_DATA_TYPE: //data ++ rtw_led_control(adapter, LED_CTL_RX); ++ pattrib->qos = (subtype & BIT(7))? 1:0; ++ retval = validate_recv_data_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail\n")); ++ precvpriv->rx_drop++; ++ } ++ break; ++ default: ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! type=0x%x\n", type)); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME validate_recv_data_frame fail! type=0x%x\n", type); ++ #endif ++ retval = _FAIL; ++ break; ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return retval; ++} ++ ++ ++//remove the wlanhdr and add the eth_hdr ++#if 1 ++ ++sint wlanhdr_to_ethhdr ( union recv_frame *precvframe); ++sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) ++{ ++ sint rmv_len; ++ u16 eth_type, len; ++ u8 bsnaphdr; ++ u8 *psnap_type; ++ struct ieee80211_snap_hdr *psnap; ++ ++ sint ret=_SUCCESS; ++ _adapter *adapter =precvframe->u.hdr.adapter; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ u8 *ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field ++ struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; ++ ++_func_enter_; ++ ++ if(pattrib->encrypt){ ++ recvframe_pull_tail(precvframe, pattrib->icv_len); ++ } ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); ++ psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ /* convert hdr + possible LLC headers into Ethernet header */ ++ //eth_type = (psnap_type[0] << 8) | psnap_type[1]; ++ if((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) && ++ (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) && ++ (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )|| ++ //eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || ++ _rtw_memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)){ ++ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ ++ bsnaphdr = _TRUE; ++ } ++ else { ++ /* Leave Ethernet header part of hdr and full payload */ ++ bsnaphdr = _FALSE; ++ } ++ ++ rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); ++ len = precvframe->u.hdr.len - rmv_len; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n", pattrib->hdrlen, pattrib->iv_len)); ++ ++ _rtw_memcpy(ð_type, ptr+rmv_len, 2); ++ eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ++ pattrib->eth_type = eth_type; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)) ++ { ++ ptr += rmv_len ; ++ *ptr = 0x87; ++ *(ptr+1) = 0x12; ++ ++ eth_type = 0x8712; ++ // append rx status for mp test packets ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24); ++ _rtw_memcpy(ptr, get_rxmem(precvframe), 24); ++ ptr+=24; ++ } ++ else { ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0))); ++ } ++ ++ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); ++ ++ if(!bsnaphdr) { ++ len = htons(len); ++ _rtw_memcpy(ptr+12, &len, 2); ++ } ++ ++_func_exit_; ++ return ret; ++ ++} ++ ++#else ++ ++sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) ++{ ++ sint rmv_len; ++ u16 eth_type; ++ u8 bsnaphdr; ++ u8 *psnap_type; ++ struct ieee80211_snap_hdr *psnap; ++ ++ sint ret=_SUCCESS; ++ _adapter *adapter =precvframe->u.hdr.adapter; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ u8* ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field ++ struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; ++ struct _vlan *pvlan = NULL; ++ ++_func_enter_; ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); ++ psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03) ++ { ++ if (_rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) ++ bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; ++ else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && ++ _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) ) ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; ++ else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; ++ else { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ } else ++ bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; ++ ++ rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n", pattrib->hdrlen, pattrib->iv_len)); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ptr += rmv_len ; ++ *ptr = 0x87; ++ *(ptr+1) = 0x12; ++ ++ //back to original pointer ++ ptr -= rmv_len; ++ } ++ ++ ptr += rmv_len ; ++ ++ _rtw_memcpy(ð_type, ptr, 2); ++ eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ++ ptr +=2; ++ ++ if(pattrib->encrypt){ ++ recvframe_pull_tail(precvframe, pattrib->icv_len); ++ } ++ ++ if(eth_type == 0x8100) //vlan ++ { ++ pvlan = (struct _vlan *) ptr; ++ ++ //eth_type = get_vlan_encap_proto(pvlan); ++ //eth_type = pvlan->h_vlan_encapsulated_proto;//? ++ rmv_len += 4; ++ ptr+=4; ++ } ++ ++ if(eth_type==0x0800)//ip ++ { ++ //struct iphdr* piphdr = (struct iphdr*) ptr; ++ //__u8 tos = (unsigned char)(pattrib->priority & 0xff); ++ ++ //piphdr->tos = tos; ++ ++ //if (piphdr->protocol == 0x06) ++ //{ ++ // RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", precvframe->u.hdr.len)); ++ //} ++ } ++ else if(eth_type==0x8712)// append rx status for mp test packets ++ { ++ //ptr -= 16; ++ //_rtw_memcpy(ptr, get_rxmem(precvframe), 16); ++ } ++ else ++ { ++#ifdef PLATFORM_OS_XP ++ NDIS_PACKET_8021Q_INFO VlanPriInfo; ++ UINT32 UserPriority = precvframe->u.hdr.attrib.priority; ++ UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 ); ++ ++ VlanPriInfo.Value = // Get current value. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo); ++ ++ VlanPriInfo.TagHeader.UserPriority = UserPriority; ++ VlanPriInfo.TagHeader.VlanId = VlanID ; ++ ++ VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero. ++ VlanPriInfo.TagHeader.Reserved = 0; // Should be zero. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; ++#endif ++ } ++ ++ if(eth_type==0x8712)// append rx status for mp test packets ++ { ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24); ++ _rtw_memcpy(ptr, get_rxmem(precvframe), 24); ++ ptr+=24; ++ } ++ else ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)); ++ ++ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); ++ ++ eth_type = htons((unsigned short)eth_type) ; ++ _rtw_memcpy(ptr+12, ð_type, 2); ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif ++ ++ ++#ifdef CONFIG_SDIO_HCI ++#ifdef PLATFORM_LINUX ++static void recvframe_expand_pkt( ++ PADAPTER padapter, ++ union recv_frame *prframe) ++{ ++ struct recv_frame_hdr *pfhdr; ++ _pkt *ppkt; ++ u8 shift_sz; ++ u32 alloc_sz; ++ ++ ++ pfhdr = &prframe->u.hdr; ++ ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ if (pfhdr->attrib.qos) ++ shift_sz = 6; ++ else ++ shift_sz = 0; ++ ++ // for first fragment packet, need to allocate ++ // (1536 + RXDESC_SIZE + drvinfo_sz) to reassemble packet ++ // 8 is for skb->data 8 bytes alignment. ++// alloc_sz = _RND(1536 + RXDESC_SIZE + pfhdr->attrib.drvinfosize + shift_sz + 8, 128); ++ alloc_sz = 1664; // round (1536 + 24 + 32 + shift_sz + 8) to 128 bytes alignment ++ ++ //3 1. alloc new skb ++ // prepare extra space for 4 bytes alignment ++ ppkt = rtw_skb_alloc(alloc_sz); ++ ++ if (!ppkt) return; // no way to expand ++ ++ //3 2. Prepare new skb to replace & release old skb ++ // force ppkt->data at 8-byte alignment address ++ skb_reserve(ppkt, 8 - ((SIZE_PTR)ppkt->data & 7)); ++ // force ip_hdr at 8-byte alignment address according to shift_sz ++ skb_reserve(ppkt, shift_sz); ++ ++ // copy data to new pkt ++ _rtw_memcpy(skb_put(ppkt, pfhdr->len), pfhdr->rx_data, pfhdr->len); ++ ++ rtw_skb_free(pfhdr->pkt); ++ ++ // attach new pkt to recvframe ++ pfhdr->pkt = ppkt; ++ pfhdr->rx_head = ppkt->head; ++ pfhdr->rx_data = ppkt->data; ++ pfhdr->rx_tail = skb_tail_pointer(ppkt); ++ pfhdr->rx_end = skb_end_pointer(ppkt); ++} ++#else ++#warning "recvframe_expand_pkt not implement, defrag may crash system" ++#endif ++#endif ++ ++//perform defrag ++union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q); ++union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q) ++{ ++ _list *plist, *phead; ++ u8 *data,wlanhdr_offset; ++ u8 curfragnum; ++ struct recv_frame_hdr *pfhdr,*pnfhdr; ++ union recv_frame* prframe, *pnextrframe; ++ _queue *pfree_recv_queue; ++ ++_func_enter_; ++ ++ curfragnum=0; ++ pfree_recv_queue=&adapter->recvpriv.free_recv_queue; ++ ++ phead = get_list_head(defrag_q); ++ plist = get_next(phead); ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pfhdr=&prframe->u.hdr; ++ rtw_list_delete(&(prframe->u.list)); ++ ++ if(curfragnum!=pfhdr->attrib.frag_num) ++ { ++ //the first fragment number must be 0 ++ //free the whole queue ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ ++ return NULL; ++ } ++ ++#ifdef CONFIG_SDIO_HCI ++ recvframe_expand_pkt(adapter, prframe); ++#endif ++ ++ curfragnum++; ++ ++ plist= get_list_head(defrag_q); ++ ++ plist = get_next(plist); ++ ++ data=get_recvframe_data(prframe); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pnextrframe = LIST_CONTAINOR(plist, union recv_frame , u); ++ pnfhdr=&pnextrframe->u.hdr; ++ ++ ++ //check the fragment sequence (2nd ~n fragment frame) ++ ++ if(curfragnum!=pnfhdr->attrib.frag_num) ++ { ++ //the fragment number must be increasing (after decache) ++ //release the defrag_q & prframe ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ return NULL; ++ } ++ ++ curfragnum++; ++ ++ //copy the 2nd~n fragment frame's payload to the first fragment ++ //get the 2nd~last fragment frame's payload ++ ++ wlanhdr_offset = pnfhdr->attrib.hdrlen + pnfhdr->attrib.iv_len; ++ ++ recvframe_pull(pnextrframe, wlanhdr_offset); ++ ++ //append to first fragment frame's tail (if privacy frame, pull the ICV) ++ recvframe_pull_tail(prframe, pfhdr->attrib.icv_len); ++ ++ //memcpy ++ _rtw_memcpy(pfhdr->rx_tail, pnfhdr->rx_data, pnfhdr->len); ++ ++ recvframe_put(prframe, pnfhdr->len); ++ ++ pfhdr->attrib.icv_len=pnfhdr->attrib.icv_len; ++ plist = get_next(plist); ++ ++ }; ++ ++ //free the defrag_q queue and return the prframe ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Performance defrag!!!!!\n")); ++ ++_func_exit_; ++ ++ return prframe; ++} ++ ++//check if need to defrag, if needed queue the frame to defrag_q ++union recv_frame* recvframe_chk_defrag(PADAPTER padapter, union recv_frame *precv_frame) ++{ ++ u8 ismfrag; ++ u8 fragnum; ++ u8 *psta_addr; ++ struct recv_frame_hdr *pfhdr; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv; ++ _list *phead; ++ union recv_frame *prtnframe = NULL; ++ _queue *pfree_recv_queue, *pdefrag_q; ++ ++_func_enter_; ++ ++ pstapriv = &padapter->stapriv; ++ ++ pfhdr = &precv_frame->u.hdr; ++ ++ pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++ //need to define struct of wlan header frame ctrl ++ ismfrag = pfhdr->attrib.mfrag; ++ fragnum = pfhdr->attrib.frag_num; ++ ++ psta_addr = pfhdr->attrib.ta; ++ psta = rtw_get_stainfo(pstapriv, psta_addr); ++ if (psta == NULL) ++ { ++ u8 type = GetFrameType(pfhdr->rx_data); ++ if (type != WIFI_DATA_TYPE) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ pdefrag_q = &psta->sta_recvpriv.defrag_q; ++ } else ++ pdefrag_q = NULL; ++ } ++ else ++ pdefrag_q = &psta->sta_recvpriv.defrag_q; ++ ++ if ((ismfrag==0) && (fragnum==0)) ++ { ++ prtnframe = precv_frame;//isn't a fragment frame ++ } ++ ++ if (ismfrag==1) ++ { ++ //0~(n-1) fragment frame ++ //enqueue to defraf_g ++ if(pdefrag_q != NULL) ++ { ++ if(fragnum==0) ++ { ++ //the first fragment ++ if(_rtw_queue_empty(pdefrag_q) == _FALSE) ++ { ++ //free current defrag_q ++ rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue); ++ } ++ } ++ ++ ++ //Then enqueue the 0~(n-1) fragment into the defrag_q ++ ++ //_rtw_spinlock(&pdefrag_q->lock); ++ phead = get_list_head(pdefrag_q); ++ rtw_list_insert_tail(&pfhdr->list, phead); ++ //_rtw_spinunlock(&pdefrag_q->lock); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Enqueuq: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); ++ ++ prtnframe=NULL; ++ ++ } ++ else ++ { ++ //can't find this ta's defrag_queue, so free this recv_frame ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ prtnframe=NULL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); ++ } ++ ++ } ++ ++ if((ismfrag==0)&&(fragnum!=0)) ++ { ++ //the last fragment frame ++ //enqueue the last fragment ++ if(pdefrag_q != NULL) ++ { ++ //_rtw_spinlock(&pdefrag_q->lock); ++ phead = get_list_head(pdefrag_q); ++ rtw_list_insert_tail(&pfhdr->list,phead); ++ //_rtw_spinunlock(&pdefrag_q->lock); ++ ++ //call recvframe_defrag to defrag ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("defrag: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); ++ precv_frame = recvframe_defrag(padapter, pdefrag_q); ++ prtnframe=precv_frame; ++ ++ } ++ else ++ { ++ //can't find this ta's defrag_queue, so free this recv_frame ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ prtnframe=NULL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); ++ } ++ ++ } ++ ++ ++ if((prtnframe!=NULL)&&(prtnframe->u.hdr.attrib.privacy)) ++ { ++ //after defrag we must check tkip mic code ++ if(recvframe_chkmic(padapter, prtnframe)==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic(padapter, prtnframe)==_FAIL\n")); ++ rtw_free_recvframe(prtnframe,pfree_recv_queue); ++ prtnframe=NULL; ++ } ++ } ++ ++_func_exit_; ++ ++ return prtnframe; ++ ++} ++ ++#define ENDIAN_FREE 1 ++ ++int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe); ++int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe) ++{ ++#if defined (PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) //for amsdu TP improvement,Creator: Thomas ++ int a_len, padding_len; ++ u16 eth_type, nSubframe_Length; ++ u8 nr_subframes, i; ++ unsigned char *pdata; ++ struct rx_pkt_attrib *pattrib; ++#ifndef PLATFORM_FREEBSD ++ unsigned char *data_ptr; ++ _pkt *sub_skb,*subframes[MAX_SUBFRAME_COUNT]; ++#endif //PLATFORM_FREEBSD ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); ++ int ret = _SUCCESS; ++#ifdef PLATFORM_FREEBSD ++ struct mbuf *sub_m=NULL, *subframes[MAX_SUBFRAME_COUNT]; ++ u8 *ptr,offset; ++#endif //PLATFORM_FREEBSD ++ nr_subframes = 0; ++ ++ pattrib = &prframe->u.hdr.attrib; ++ ++ recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen); ++ ++ if(prframe->u.hdr.attrib.iv_len >0) ++ { ++ recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len); ++ } ++ ++ a_len = prframe->u.hdr.len; ++ ++ pdata = prframe->u.hdr.rx_data; ++ ++ while(a_len > ETH_HLEN) { ++ ++ /* Offset 12 denote 2 mac address */ ++#ifdef ENDIAN_FREE ++ //nSubframe_Length = ntohs(*((u16*)(pdata + 12))); ++ nSubframe_Length = RTW_GET_BE16(pdata + 12); ++#else // ENDIAN_FREE ++ nSubframe_Length = *((u16*)(pdata + 12)); ++ //==m==>change the length order ++ nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8); ++ //ntohs(nSubframe_Length); ++#endif // ENDIAN_FREE ++ ++ if( a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length) ) { ++ DBG_871X("nRemain_Length is %d and nSubframe_Length is : %d\n",a_len,nSubframe_Length); ++ goto exit; ++ } ++ ++#ifndef PLATFORM_FREEBSD ++ /* move the data point to data content */ ++ pdata += ETH_HLEN; ++ a_len -= ETH_HLEN; ++ ++ /* Allocate new skb for releasing to upper layer */ ++#ifdef CONFIG_SKB_COPY ++ sub_skb = rtw_skb_alloc(nSubframe_Length + 12); ++ if(sub_skb) ++ { ++ skb_reserve(sub_skb, 12); ++ data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length); ++ _rtw_memcpy(data_ptr, pdata, nSubframe_Length); ++ } ++ else ++#endif // CONFIG_SKB_COPY ++ { ++ sub_skb = rtw_skb_clone(prframe->u.hdr.pkt); ++ if(sub_skb) ++ { ++ sub_skb->data = pdata; ++ sub_skb->len = nSubframe_Length; ++ skb_set_tail_pointer(sub_skb, nSubframe_Length); ++ } ++ else ++ { ++ DBG_871X("rtw_skb_clone() Fail!!! , nr_subframes = %d\n",nr_subframes); ++ break; ++ } ++ } ++ ++#else // PLATFORM_FREEBSD ++ ++ //PLATFORM_FREEBSD ++ //Allocate a mbuff, ++ //sub_m =m_devget(pdata, nSubframe_Length+12, 12, padapter->pifp,NULL); ++ sub_m =m_devget(pdata, nSubframe_Length+ETH_HLEN, ETHER_ALIGN, padapter->pifp,NULL); ++ ++ pdata += ETH_HLEN; ++ a_len -= ETH_HLEN; ++#endif // PLATFORM_FREEBSD ++ ++#ifndef PLATFORM_FREEBSD ++ //sub_skb->dev = padapter->pnetdev; ++ subframes[nr_subframes++] = sub_skb; ++#else //PLATFORM_FREEBSD ++ //PLATFORM_FREEBSD ++ subframes[nr_subframes++] = sub_m; ++#endif //PLATFORM_FREEBSD ++ ++ if(nr_subframes >= MAX_SUBFRAME_COUNT) { ++ DBG_871X("ParseSubframe(): Too many Subframes! Packets dropped!\n"); ++ break; ++ } ++ ++ pdata += nSubframe_Length; ++ a_len -= nSubframe_Length; ++ if(a_len != 0) { ++ padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4-1)); ++ if(padding_len == 4) { ++ padding_len = 0; ++ } ++ ++ if(a_len < padding_len) { ++ goto exit; ++ } ++ pdata += padding_len; ++ a_len -= padding_len; ++ } ++ } ++ ++ for(i=0; idata[6]); ++ eth_type = RTW_GET_BE16(&sub_skb->data[6]); ++#else // ENDIAN_FREE ++ eth_type = (sub_skb->data[6] << 8) | sub_skb->data[7]; ++#endif // ENDIAN_FREE ++ if (sub_skb->len >= 8 && ++ ((_rtw_memcmp(sub_skb->data, rtw_rfc1042_header, SNAP_SIZE) && ++ eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || ++ _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE) )) { ++ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ ++ skb_pull(sub_skb, SNAP_SIZE); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); ++ } else { ++ u16 len; ++ /* Leave Ethernet header part of hdr and full payload */ ++ len = htons(sub_skb->len); ++ _rtw_memcpy(skb_push(sub_skb, 2), &len, 2); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); ++ } ++ ++ /* Indicat the packets to upper layer */ ++ if (sub_skb) { ++ //memset(sub_skb->cb, 0, sizeof(sub_skb->cb)); ++ ++#ifdef CONFIG_BR_EXT ++ // Insert NAT2.5 RX here! ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ void *br_port = NULL; ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ ++ if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); ++ if (nat25_handle_frame(padapter, sub_skb) == -1) { ++ //priv->ext_stats.rx_data_drops++; ++ //DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); ++ //return FAIL; ++ ++#if 1 ++ // bypass this frame to upper layer!! ++#else ++ rtw_skb_free(sub_skb); ++ continue; ++#endif ++ } ++ } ++#endif // CONFIG_BR_EXT ++ ++ sub_skb->protocol = eth_type_trans(sub_skb, padapter->pnetdev); ++ sub_skb->dev = padapter->pnetdev; ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { ++ sub_skb->ip_summed = CHECKSUM_UNNECESSARY; ++ } else { ++ sub_skb->ip_summed = CHECKSUM_NONE; ++ } ++#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ ++ sub_skb->ip_summed = CHECKSUM_NONE; ++#endif //CONFIG_TCP_CSUM_OFFLOAD_RX ++ ++ rtw_netif_rx(padapter->pnetdev, sub_skb); ++ } ++#else //PLATFORM_FREEBSD ++ ++ //PLATFORM_FREEBSD ++ sub_m = subframes[i]; ++ ptr=mtod(sub_m, u8 *); ++ offset=ETH_HLEN; ++ /* convert hdr + possible LLC headers into Ethernet header */ ++#ifdef ENDIAN_FREE ++ eth_type = ntohs(*(u16*)&ptr[offset+6]); ++#else // ENDIAN_FREE ++ eth_type = ( ptr[offset+6] << 8) | ptr[offset+7]; ++#endif // ENDIAN_FREE ++ if (sub_m->m_pkthdr.len >= ETH_HLEN+8 && ++ ((_rtw_memcmp(ptr+ETH_HLEN, rtw_rfc1042_header, SNAP_SIZE) && ++ eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || ++ _rtw_memcmp(ptr+ETH_HLEN, rtw_bridge_tunnel_header, SNAP_SIZE) )) { ++ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ ++ offset+=SNAP_SIZE; ++ _rtw_memcpy(&ptr[offset-ETH_ALEN], pattrib->src, ETH_ALEN); ++ offset-=ETH_ALEN; ++ _rtw_memcpy(&ptr[offset-ETH_ALEN], pattrib->dst, ETH_ALEN); ++ offset-=ETH_ALEN; ++ } else { ++ u16 len; ++ /* Leave Ethernet header part of hdr and full payload */ ++ len = htons(sub_m->m_pkthdr.len-offset); ++ _rtw_memcpy(&ptr[offset- 2], &len, 2); ++ offset-=2; ++ _rtw_memcpy(&ptr[offset-ETH_ALEN], pattrib->src, ETH_ALEN); ++ offset-=ETH_ALEN; ++ _rtw_memcpy(&ptr[offset-ETH_ALEN], pattrib->dst, ETH_ALEN); ++ offset-=ETH_ALEN; ++ } ++ ++ m_adj(sub_m,offset); ++ ++ /* Indicat the packets to upper layer */ ++ if (sub_m) { ++ ++#if 0 ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { ++ sub_skb->ip_summed = CHECKSUM_UNNECESSARY; ++ } else { ++ sub_skb->ip_summed = CHECKSUM_NONE; ++ } ++#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ ++ sub_skb->ip_summed = CHECKSUM_NONE; ++#endif //CONFIG_TCP_CSUM_OFFLOAD_RX ++#endif //0 ++ ++ if ( ((u32)(mtod(sub_m, caddr_t) + 14) % 4) != 0) ++ printf("%s()-%d: mtod(sub_m) = %p\n", __FUNCTION__, __LINE__, mtod(sub_m, caddr_t)); ++#ifdef CONFIG_RX_INDICATE_QUEUE ++ IF_ENQUEUE(&precvpriv->rx_indicate_queue, sub_m); ++ if (_IF_QLEN(&precvpriv->rx_indicate_queue) <= 1) { ++ taskqueue_enqueue(taskqueue_thread, &precvpriv->rx_indicate_tasklet); ++ } ++#else // CONFIG_RX_INDICATE_QUEUE ++ (*padapter->pifp->if_input)(padapter->pifp, sub_m); ++#endif // CONFIG_RX_INDICATE_QUEUE ++ } ++ ++#endif //PLATFORM_FREEBSD ++ } ++ ++exit: ++ ++ prframe->u.hdr.len=0; ++ rtw_free_recvframe(prframe, pfree_recv_queue);//free this recv_frame ++ ++ return ret; ++#else // || defined (PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) ++#ifdef PLATFORM_WINDOWS ++ _irqL irql; ++#endif //PLATFORM_WINDOWS ++ unsigned char *ptr, *pdata, *pbuf, *psnap_type; ++ union recv_frame *pnrframe, *pnrframe_new; ++ int a_len, mv_len, padding_len; ++ u16 eth_type, type_len; ++ u8 bsnaphdr; ++ struct ieee80211_snap_hdr *psnap; ++ struct _vlan *pvlan; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); ++ int ret = _SUCCESS; ++#ifdef PLATFORM_WINDOWS ++ struct recv_buf *precvbuf = prframe->u.hdr.precvbuf; ++#endif //PLATFORM_WINDOWS ++ a_len = prframe->u.hdr.len - prframe->u.hdr.attrib.hdrlen; ++ ++ recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen); ++ ++ if(prframe->u.hdr.attrib.iv_len >0) ++ { ++ recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len); ++ } ++ ++ pdata = prframe->u.hdr.rx_data; ++ ++ prframe->u.hdr.len=0; ++ ++ pnrframe = prframe; ++ ++ ++ do{ ++ ++ mv_len=0; ++ pnrframe->u.hdr.rx_data = pnrframe->u.hdr.rx_tail = pdata; ++ ptr = pdata; ++ ++ ++ _rtw_memcpy(pnrframe->u.hdr.attrib.dst, ptr, ETH_ALEN); ++ ptr+=ETH_ALEN; ++ _rtw_memcpy(pnrframe->u.hdr.attrib.src, ptr, ETH_ALEN); ++ ptr+=ETH_ALEN; ++ ++ _rtw_memcpy(&type_len, ptr, 2); ++ type_len= ntohs((unsigned short )type_len); ++ ptr +=2; ++ mv_len += ETH_HLEN; ++ ++ recvframe_put(pnrframe, type_len+ETH_HLEN);//update tail; ++ ++ if(pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8) ++ { ++ //panic("pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8\n"); ++ ++ rtw_free_recvframe(pnrframe, pfree_recv_queue); ++ ++ goto exit; ++ } ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr); ++ psnap_type=ptr+SNAP_SIZE; ++ if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03) ++ { ++ if ( _rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) ++ { ++ bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; ++ } ++ else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && ++ _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) ) ++ { ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; ++ } ++ else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) ++ { ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n")); ++ ++ //KeBugCheckEx(0x87123333, 0xe0, 0x4c, 0x87, 0xdd); ++ ++ //panic("0x87123333, 0xe0, 0x4c, 0x87, 0xdd\n"); ++ ++ rtw_free_recvframe(pnrframe, pfree_recv_queue); ++ ++ goto exit; ++ } ++ ++ } ++ else ++ { ++ bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; ++ } ++ ++ ptr += (bsnaphdr?SNAP_SIZE:0); ++ _rtw_memcpy(ð_type, ptr, 2); ++ eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ++ ++ mv_len+= 2+(bsnaphdr?SNAP_SIZE:0); ++ ptr += 2;//now move to iphdr; ++ ++ pvlan = NULL; ++ if(eth_type == 0x8100) //vlan ++ { ++ pvlan = (struct _vlan *)ptr; ++ ptr+=4; ++ mv_len+=4; ++ } ++ ++ if(eth_type==0x0800)//ip ++ { ++ struct iphdr* piphdr = (struct iphdr*)ptr; ++ ++ ++ if (piphdr->protocol == 0x06) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", pnrframe->u.hdr.len)); ++ } ++ } ++#ifdef PLATFORM_OS_XP ++ else ++ { ++ NDIS_PACKET_8021Q_INFO VlanPriInfo; ++ UINT32 UserPriority = pnrframe->u.hdr.attrib.priority; ++ UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 ); ++ ++ VlanPriInfo.Value = // Get current value. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo); ++ ++ VlanPriInfo.TagHeader.UserPriority = UserPriority; ++ VlanPriInfo.TagHeader.VlanId = VlanID; ++ ++ VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero. ++ VlanPriInfo.TagHeader.Reserved = 0; // Should be zero. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; ++ ++ } ++#endif //PLATFORM_OS_XP ++ ++ pbuf = recvframe_pull(pnrframe, (mv_len-sizeof(struct ethhdr))); ++ ++ _rtw_memcpy(pbuf, pnrframe->u.hdr.attrib.dst, ETH_ALEN); ++ _rtw_memcpy(pbuf+ETH_ALEN, pnrframe->u.hdr.attrib.src, ETH_ALEN); ++ ++ eth_type = htons((unsigned short)eth_type) ; ++ _rtw_memcpy(pbuf+12, ð_type, 2); ++ ++ padding_len = (4) - ((type_len + ETH_HLEN)&(4-1)); ++ ++ a_len -= (type_len + ETH_HLEN + padding_len) ; ++ ++ ++#if 0 ++ ++ if(a_len > ETH_HLEN) ++ { ++ pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue); ++ if(pnrframe_new) ++ { ++ _pkt *pskb_copy; ++ unsigned int copy_len = pnrframe->u.hdr.len; ++ ++ _rtw_init_listhead(&pnrframe_new->u.hdr.list); ++ ++ pskb_copy = rtw_skb_alloc(copy_len+64); ++ ++ if(pskb_copy==NULL) ++ { ++ DBG_871X("amsdu_to_msdu:can not all(ocate memory for skb copy\n"); ++ } ++ ++ pnrframe_new->u.hdr.pkt = pskb_copy; ++ ++ _rtw_memcpy(pskb_copy->data, pnrframe->u.hdr.rx_data, copy_len); ++ ++ pnrframe_new->u.hdr.rx_data = pnrframe->u.hdr.rx_data; ++ pnrframe_new->u.hdr.rx_tail = pnrframe->u.hdr.rx_data + copy_len; ++ ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe_new);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe_new, pfree_recv_queue);//free this recv_frame ++ } ++ ++ } ++ else ++ { ++ DBG_871X("amsdu_to_msdu:can not allocate memory for pnrframe_new\n"); ++ } ++ ++ } ++ else ++ { ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame ++ } ++ ++ pnrframe = NULL; ++ ++ } ++ ++#else // 0 ++ ++ //padding_len = (4) - ((type_len + ETH_HLEN)&(4-1)); ++ ++ //a_len -= (type_len + ETH_HLEN + padding_len) ; ++ ++ pnrframe_new = NULL; ++ ++ ++ if(a_len > ETH_HLEN) ++ { ++ pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue); ++ ++ if(pnrframe_new) ++ { ++ ++ ++ //pnrframe_new->u.hdr.precvbuf = precvbuf;//precvbuf is assigned before call rtw_init_recvframe() ++ //rtw_init_recvframe(pnrframe_new, precvpriv); ++ { ++#ifdef PLATFORM_LINUX ++ _pkt *pskb = pnrframe->u.hdr.pkt; ++#endif //PLATFORM_LINUX ++ _rtw_init_listhead(&pnrframe_new->u.hdr.list); ++ ++ pnrframe_new->u.hdr.len=0; ++ ++#ifdef PLATFORM_LINUX ++ if(pskb) ++ { ++ pnrframe_new->u.hdr.pkt = rtw_skb_clone(pskb); ++ } ++#endif //PLATFORM_LINUX ++ ++ } ++ ++ pdata += (type_len + ETH_HLEN + padding_len); ++ pnrframe_new->u.hdr.rx_head = pnrframe_new->u.hdr.rx_data = pnrframe_new->u.hdr.rx_tail = pdata; ++ pnrframe_new->u.hdr.rx_end = pdata + a_len + padding_len;// ++ ++#ifdef PLATFORM_WINDOWS ++ pnrframe_new->u.hdr.precvbuf=precvbuf; ++ _enter_critical_bh(&precvbuf->recvbuf_lock, &irql); ++ precvbuf->ref_cnt++; ++ _exit_critical_bh(&precvbuf->recvbuf_lock, &irql); ++#endif //PLATFORM_WINDOWS ++ ++ } ++ else ++ { ++ //panic("pnrframe_new=%x\n", pnrframe_new); ++ } ++ } ++ ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE) ) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame ++ } ++ ++ ++ pnrframe = NULL; ++ if(pnrframe_new) ++ { ++ pnrframe = pnrframe_new; ++ } ++ ++ ++#endif // end defined (PLATFORM_LINUX) || defined (PLATFORM_FREEBSD) ++ ++ }while(pnrframe); ++ ++exit: ++ ++ return ret; ++#endif ++} ++ ++int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num); ++int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num) ++{ ++ u8 wsize = preorder_ctrl->wsize_b; ++ u16 wend = (preorder_ctrl->indicate_seq + wsize -1) & 0xFFF;//% 4096; ++ ++ // Rx Reorder initialize condition. ++ if (preorder_ctrl->indicate_seq == 0xFFFF) ++ { ++ preorder_ctrl->indicate_seq = seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d init IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ ++ //DbgPrint("check_indicate_seq, 1st->indicate_seq=%d\n", precvpriv->indicate_seq); ++ } ++ ++ //DbgPrint("enter->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ // Drop out the packet which SeqNum is smaller than WinStart ++ if( SN_LESS(seq_num, preorder_ctrl->indicate_seq) ) ++ { ++ //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); ++ //DbgPrint("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("%s IndicateSeq: %d > NewSeq: %d\n", __FUNCTION__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ ++ ++ return _FALSE; ++ } ++ ++ // ++ // Sliding window manipulation. Conditions includes: ++ // 1. Incoming SeqNum is equal to WinStart =>Window shift 1 ++ // 2. Incoming SeqNum is larger than the WinEnd => Window shift N ++ // ++ if( SN_EQUAL(seq_num, preorder_ctrl->indicate_seq) ) ++ { ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d SN_EQUAL IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ } ++ else if(SN_LESS(wend, seq_num)) ++ { ++ //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); ++ //DbgPrint("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ // boundary situation, when seq_num cross 0xFFF ++ if(seq_num >= (wsize - 1)) ++ preorder_ctrl->indicate_seq = seq_num + 1 -wsize; ++ else ++ preorder_ctrl->indicate_seq = 0xFFF - (wsize - (seq_num + 1)) + 1; ++ ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d SN_LESS(wend, seq_num) IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ } ++ ++ //DbgPrint("exit->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ return _TRUE; ++} ++ ++int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe); ++int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe) ++{ ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ _list *phead, *plist; ++ union recv_frame *pnextrframe; ++ struct rx_pkt_attrib *pnextattrib; ++ ++ //DbgPrint("+enqueue_reorder_recvframe()\n"); ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pnextrframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pnextattrib = &pnextrframe->u.hdr.attrib; ++ ++ if(SN_LESS(pnextattrib->seq_num, pattrib->seq_num)) ++ { ++ plist = get_next(plist); ++ } ++ else if( SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num)) ++ { ++ //Duplicate entry is found!! Do not insert current entry. ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); ++ ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ return _FALSE; ++ } ++ else ++ { ++ break; ++ } ++ ++ //DbgPrint("enqueue_reorder_recvframe():while\n"); ++ ++ } ++ ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ rtw_list_insert_tail(&(prframe->u.hdr.list), plist); ++ ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); ++ return _TRUE; ++ ++} ++ ++int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced); ++int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced) ++{ ++ //_irqL irql; ++ //u8 bcancelled; ++ _list *phead, *plist; ++ union recv_frame *prframe; ++ struct rx_pkt_attrib *pattrib; ++ //u8 index = 0; ++ int bPktInBuf = _FALSE; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ //DbgPrint("+recv_indicatepkts_in_order\n"); ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++#if 0 ++ // Check if there is any other indication thread running. ++ if(pTS->RxIndicateState == RXTS_INDICATE_PROCESSING) ++ return; ++#endif ++ ++ // Handling some condition for forced indicate case. ++ if(bforced==_TRUE) ++ { ++ if(rtw_is_list_empty(phead)) ++ { ++ // _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ return _TRUE; ++ } ++ ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pattrib = &prframe->u.hdr.attrib; ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ } ++ ++ // Prepare indication list and indication. ++ // Check if there is any packet need indicate. ++ while(!rtw_is_list_empty(phead)) ++ { ++ ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pattrib = &prframe->u.hdr.attrib; ++ ++ if(!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ++ ("recv_indicatepkts_in_order: indicate=%d seq=%d amsdu=%d\n", ++ preorder_ctrl->indicate_seq, pattrib->seq_num, pattrib->amsdu)); ++ ++#if 0 ++ // This protect buffer from overflow. ++ if(index >= REORDER_WIN_SIZE) ++ { ++ RT_ASSERT(FALSE, ("IndicateRxReorderList(): Buffer overflow!! \n")); ++ bPktInBuf = TRUE; ++ break; ++ } ++#endif ++ ++ plist = get_next(plist); ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ if(SN_EQUAL(preorder_ctrl->indicate_seq, pattrib->seq_num)) ++ { ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ } ++ ++#if 0 ++ index++; ++ if(index==1) ++ { ++ //Cancel previous pending timer. ++ //PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer); ++ if(bforced!=_TRUE) ++ { ++ //DBG_871X("_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);\n"); ++ _cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled); ++ } ++ } ++#endif ++ ++ //Set this as a lock to make sure that only one thread is indicating packet. ++ //pTS->RxIndicateState = RXTS_INDICATE_PROCESSING; ++ ++ // Indicate packets ++ //RT_ASSERT((index<=REORDER_WIN_SIZE), ("RxReorderIndicatePacket(): Rx Reorder buffer full!! \n")); ++ ++ ++ //indicate this recv_frame ++ //DbgPrint("recv_indicatepkts_in_order, indicate_seq=%d, seq_num=%d\n", precvpriv->indicate_seq, pattrib->seq_num); ++ if(!pattrib->amsdu) ++ { ++ //DBG_871X("recv_indicatepkts_in_order, amsdu!=1, indicate_seq=%d, seq_num=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num); ++ ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ ++ rtw_recv_indicatepkt(padapter, prframe);//indicate this recv_frame ++ ++ } ++ } ++ else if(pattrib->amsdu==1) ++ { ++ if(amsdu_to_msdu(padapter, prframe)!=_SUCCESS) ++ { ++ rtw_free_recvframe(prframe, &precvpriv->free_recv_queue); ++ } ++ } ++ else ++ { ++ //error condition; ++ } ++ ++ ++ //Update local variables. ++ bPktInBuf = _FALSE; ++ ++ } ++ else ++ { ++ bPktInBuf = _TRUE; ++ break; ++ } ++ ++ //DbgPrint("recv_indicatepkts_in_order():while\n"); ++ ++ } ++ ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++/* ++ //Release the indication lock and set to new indication step. ++ if(bPktInBuf) ++ { ++ // Set new pending timer. ++ //pTS->RxIndicateState = RXTS_INDICATE_REORDER; ++ //PlatformSetTimer(Adapter, &pTS->RxPktPendingTimer, pHTInfo->RxReorderPendingTime); ++ //DBG_871X("_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME)\n"); ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ } ++ else ++ { ++ //pTS->RxIndicateState = RXTS_INDICATE_IDLE; ++ } ++*/ ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ //return _TRUE; ++ return bPktInBuf; ++ ++} ++ ++int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe); ++int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) ++{ ++ _irqL irql; ++ int retval = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ if(!pattrib->amsdu) ++ { ++ //s1. ++ wlanhdr_to_ethhdr(prframe); ++ ++ //if ((pattrib->qos!=1) /*|| pattrib->priority!=0 || IS_MCAST(pattrib->ra)*/ ++ // || (pattrib->eth_type==0x0806) || (pattrib->ack_policy!=0)) ++ if (pattrib->qos!=1) ++ { ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_indicatepkt_reorder -recv_func recv_indicatepkt\n" )); ++ ++ rtw_recv_indicatepkt(padapter, prframe); ++ return _SUCCESS; ++ ++ } ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s pattrib->qos !=1\n", __FUNCTION__); ++ #endif ++ ++ return _FAIL; ++ ++ } ++ ++ if (preorder_ctrl->enable == _FALSE) ++ { ++ //indicate this recv_frame ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ rtw_recv_indicatepkt(padapter, prframe); ++ ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ return _SUCCESS; ++ } ++ ++#ifndef CONFIG_RECV_REORDERING_CTRL ++ //indicate this recv_frame ++ rtw_recv_indicatepkt(padapter, prframe); ++ return _SUCCESS; ++#endif ++ ++ } ++ else if(pattrib->amsdu==1) //temp filter -> means didn't support A-MSDUs in a A-MPDU ++ { ++ if (preorder_ctrl->enable == _FALSE) ++ { ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ retval = amsdu_to_msdu(padapter, prframe); ++ ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ if(retval != _SUCCESS){ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); ++ #endif ++ } ++ ++ return retval; ++ } ++ } ++ else ++ { ++ ++ } ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ++ ("recv_indicatepkt_reorder: indicate=%d seq=%d\n", ++ preorder_ctrl->indicate_seq, pattrib->seq_num)); ++ ++ //s2. check if winstart_b(indicate_seq) needs to been updated ++ if(!check_indicate_seq(preorder_ctrl, pattrib->seq_num)) ++ { ++ //pHTInfo->RxReorderDropCounter++; ++ //ReturnRFDList(Adapter, pRfd); ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("RxReorderIndicatePacket() ==> Packet Drop!!\n")); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //return _FAIL; ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s check_indicate_seq fail\n", __FUNCTION__); ++ #endif ++#if 0 ++ rtw_recv_indicatepkt(padapter, prframe); ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ goto _success_exit; ++#else ++ goto _err_exit; ++#endif ++ } ++ ++ ++ //s3. Insert all packet into Reorder Queue to maintain its ordering. ++ if(!enqueue_reorder_recvframe(preorder_ctrl, prframe)) ++ { ++ //DbgPrint("recv_indicatepkt_reorder, enqueue_reorder_recvframe fail!\n"); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //return _FAIL; ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s enqueue_reorder_recvframe fail\n", __FUNCTION__); ++ #endif ++ goto _err_exit; ++ } ++ ++ ++ //s4. ++ // Indication process. ++ // After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets ++ // with the SeqNum smaller than latest WinStart and buffer other packets. ++ // ++ // For Rx Reorder condition: ++ // 1. All packets with SeqNum smaller than WinStart => Indicate ++ // 2. All packets with SeqNum larger than or equal to WinStart => Buffer it. ++ // ++ ++ //recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE); ++ if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE)==_TRUE) ++ { ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ } ++ else ++ { ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ++ } ++ ++ ++_success_exit: ++ ++ return _SUCCESS; ++ ++_err_exit: ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ return _FAIL; ++} ++ ++ ++void rtw_reordering_ctrl_timeout_handler(void *pcontext) ++{ ++ _irqL irql; ++ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)pcontext; ++ _adapter *padapter = preorder_ctrl->padapter; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ ++ if(padapter->bDriverStopped ||padapter->bSurpriseRemoved) ++ { ++ return; ++ } ++ ++ //DBG_871X("+rtw_reordering_ctrl_timeout_handler()=>\n"); ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE)==_TRUE) ++ { ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ } ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++} ++ ++int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe); ++int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) ++{ ++ int retval = _SUCCESS; ++ //struct recv_priv *precvpriv = &padapter->recvpriv; ++ //struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TDLS ++ struct sta_info *psta = prframe->u.hdr.psta; ++#endif //CONFIG_TDLS ++ ++#ifdef CONFIG_80211N_HT ++ ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++#ifdef CONFIG_TDLS ++ if( (phtpriv->ht_option==_TRUE) || ++ ((psta->tdls_sta_state & TDLS_LINKED_STATE) && ++ (psta->htpriv.ht_option==_TRUE) && ++ (psta->htpriv.ampdu_enable==_TRUE))) //B/G/N Mode ++#else ++ if(phtpriv->ht_option==_TRUE) //B/G/N Mode ++#endif //CONFIG_TDLS ++ { ++ //prframe->u.hdr.preorder_ctrl = &precvpriv->recvreorder_ctrl[pattrib->priority]; ++ ++ if(recv_indicatepkt_reorder(padapter, prframe)!=_SUCCESS)// including perform A-MPDU Rx Ordering Buffer Control ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recv_indicatepkt_reorder error!\n", __FUNCTION__); ++ #endif ++ ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ retval = _FAIL; ++ return retval; ++ } ++ } ++ } ++ else //B/G mode ++#endif ++ { ++ retval=wlanhdr_to_ethhdr (prframe); ++ if(retval != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr error!\n", __FUNCTION__); ++ #endif ++ return retval; ++ } ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ //indicate this recv_frame ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n" )); ++ rtw_recv_indicatepkt(padapter, prframe); ++ ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n" )); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ retval = _FAIL; ++ return retval; ++ } ++ ++ } ++ ++ return retval; ++ ++} ++ ++static int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) ++{ ++ int ret = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++#ifdef CONFIG_MP_INCLUDED ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif //CONFIG_MP_INCLUDED ++ ++#ifdef CONFIG_MP_INCLUDED ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) ++ { ++ if (pattrib->crc_err == 1) ++ padapter->mppriv.rx_crcerrpktcount++; ++ else ++ padapter->mppriv.rx_pktcount++; ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); ++ ret = _FAIL; ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ goto exit; ++ } ++ } ++#endif ++ ++ //check the frame crtl field and decache ++ ret = validate_recv_frame(padapter, rframe); ++ if (ret != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); ++ rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame ++ goto exit; ++ } ++ ++exit: ++ return ret; ++} ++ ++static int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) ++{ ++ int ret = _SUCCESS; ++ union recv_frame *orig_prframe = prframe; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++#ifdef CONFIG_MP_INCLUDED ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#endif //CONFIG_MP_INCLUDED ++ ++#ifdef CONFIG_TDLS ++ u8 *psnap_type, *pcategory; ++ struct sta_info *ptdls_sta = NULL; ++#endif //CONFIG_TDLS ++ ++ ++ // DATA FRAME ++ rtw_led_control(padapter, LED_CTL_RX); ++ ++ prframe = decryptor(padapter, prframe); ++ if (prframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decryptor: drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s decryptor: drop pkt\n", __FUNCTION__); ++ #endif ++ ret = _FAIL; ++ goto _recv_data_drop; ++ } ++ ++#if 0 ++ if ( padapter->adapter_type == PRIMARY_ADAPTER ) ++ { ++ DBG_871X("+++\n"); ++ { ++ int i; ++ u8 *ptr = get_recvframe_data(prframe); ++ for(i=0; i<140;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ ++ } ++ DBG_871X("---\n"); ++ } ++#endif //RTK_DMP_PLATFORM ++ ++#ifdef CONFIG_TDLS ++ //check TDLS frame ++ psnap_type = get_recvframe_data(orig_prframe); ++ psnap_type+=pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ pcategory = psnap_type + ETH_TYPE_LEN + PAYLOAD_TYPE_LEN; ++ ++ if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, ETH_TYPE_LEN)) && ++ ((*pcategory==RTW_WLAN_CATEGORY_TDLS) || (*pcategory==RTW_WLAN_CATEGORY_P2P))){ ++ ret = OnTDLS(padapter, prframe); //all of functions will return _FAIL ++ goto _exit_recv_func; ++ } ++#endif //CONFIG_TDLS ++ ++ prframe = recvframe_chk_defrag(padapter, prframe); ++ if(prframe==NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chk_defrag: drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recvframe_chk_defrag: drop pkt\n", __FUNCTION__); ++ #endif ++ goto _recv_data_drop; ++ } ++ ++ prframe=portctrl(padapter, prframe); ++ if (prframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("portctrl: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s portctrl: drop pkt\n", __FUNCTION__); ++ #endif ++ ret = _FAIL; ++ goto _recv_data_drop; ++ } ++ ++#ifdef CONFIG_TDLS ++ if(padapter->tdlsinfo.setup_state == TDLS_LINKED_STATE) ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, pattrib->src); ++ count_rx_stats(padapter, prframe, ptdls_sta); ++#else ++ count_rx_stats(padapter, prframe, NULL); ++#endif //CONFIG_TDLS ++ ++#ifdef CONFIG_80211N_HT ++ ++ ret = process_recv_indicatepkts(padapter, prframe); ++ if (ret != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recv_func: process_recv_indicatepkts fail! \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recv_func: process_recv_indicatepkts fail!\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _recv_data_drop; ++ } ++ ++#else // CONFIG_80211N_HT ++ ++ if (!pattrib->amsdu) ++ { ++ ret = wlanhdr_to_ethhdr (prframe); ++ if (ret != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _recv_data_drop; ++ } ++ ++ if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); ++ //indicate this recv_frame ++ ret = rtw_recv_indicatepkt(padapter, prframe); ++ if (ret != _SUCCESS) ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__); ++ #endif ++ goto _recv_data_drop; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, ++ padapter->bDriverStopped, padapter->bSurpriseRemoved); ++ #endif ++ ret = _FAIL; ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue); //free this recv_frame ++ } ++ ++ } ++ else if(pattrib->amsdu==1) ++ { ++ ++ ret = amsdu_to_msdu(padapter, prframe); ++ if(ret != _SUCCESS) ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue); ++ goto _recv_data_drop; ++ } ++ } ++ else ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s what is this condition??\n", __FUNCTION__); ++ #endif ++ goto _recv_data_drop; ++ } ++#endif // CONFIG_80211N_HT ++ ++_exit_recv_func: ++ return ret; ++ ++_recv_data_drop: ++ precvpriv->rx_drop++; ++ return ret; ++} ++ ++ ++static int recv_func(_adapter *padapter, union recv_frame *rframe) ++{ ++ int ret; ++ struct rx_pkt_attrib *prxattrib = &rframe->u.hdr.attrib; ++ struct recv_priv *recvpriv = &padapter->recvpriv; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ ++ /* check if need to handle uc_swdec_pending_queue*/ ++ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && psecuritypriv->busetkipkey) ++ { ++ union recv_frame *pending_frame; ++ _irqL irqL; ++ ++ while((pending_frame=rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue))) { ++ if (recv_func_posthandle(padapter, pending_frame) == _SUCCESS) ++ DBG_871X("%s: dequeue uc_swdec_pending_queue\n", __func__); ++ } ++ } ++ ++ ret = recv_func_prehandle(padapter, rframe); ++ ++ if(ret == _SUCCESS) { ++ ++ /* check if need to enqueue into uc_swdec_pending_queue*/ ++ if (check_fwstate(mlmepriv, WIFI_STATION_STATE) && ++ !IS_MCAST(prxattrib->ra) && prxattrib->encrypt>0 && ++ (prxattrib->bdecrypted == 0 ||psecuritypriv->sw_decrypt == _TRUE) && ++ !is_wep_enc(psecuritypriv->dot11PrivacyAlgrthm) && ++ !psecuritypriv->busetkipkey) { ++ rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue); ++ DBG_871X("%s: no key, enqueue uc_swdec_pending_queue\n", __func__); ++ goto exit; ++ } ++ ++ ret = recv_func_posthandle(padapter, rframe); ++ } ++ ++exit: ++ return ret; ++} ++ ++ ++s32 rtw_recv_entry(union recv_frame *precvframe) ++{ ++ _adapter *padapter; ++ struct recv_priv *precvpriv; ++ s32 ret=_SUCCESS; ++ ++_func_enter_; ++ ++// RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+rtw_recv_entry\n")); ++ ++ padapter = precvframe->u.hdr.adapter; ++ ++ precvpriv = &padapter->recvpriv; ++ ++ ++ if ((ret = recv_func(padapter, precvframe)) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rtw_recv_entry: recv_func return fail!!!\n")); ++ goto _recv_entry_drop; ++ } ++ ++ ++ precvpriv->rx_pkts++; ++ ++_func_exit_; ++ ++ return ret; ++ ++_recv_entry_drop: ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.rx_pktloss = precvpriv->rx_drop; ++#endif ++ ++ //RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("_recv_entry_drop\n")); ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS) ++#else ++void rtw_signal_stat_timer_hdl(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, recvpriv.signal_stat_timer); ++#endif ++ struct recv_priv *recvpriv = &adapter->recvpriv; ++ ++ u32 tmp_s, tmp_q; ++ u8 avg_signal_strength = 0; ++ u8 avg_signal_qual = 0; ++ u32 num_signal_strength = 0; ++ u32 num_signal_qual = 0; ++ u8 _alpha = 3; // this value is based on converging_constant = 5000 and sampling_interval = 1000 ++ ++ if(adapter->recvpriv.is_signal_dbg) { ++ //update the user specific value, signal_strength_dbg, to signal_strength, rssi ++ adapter->recvpriv.signal_strength= adapter->recvpriv.signal_strength_dbg; ++ adapter->recvpriv.rssi=(s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg); ++ } else { ++ ++ if(recvpriv->signal_strength_data.update_req == 0) {// update_req is clear, means we got rx ++ avg_signal_strength = recvpriv->signal_strength_data.avg_val; ++ num_signal_strength = recvpriv->signal_strength_data.total_num; ++ // after avg_vals are accquired, we can re-stat the signal values ++ recvpriv->signal_strength_data.update_req = 1; ++ } ++ ++ if(recvpriv->signal_qual_data.update_req == 0) {// update_req is clear, means we got rx ++ avg_signal_qual = recvpriv->signal_qual_data.avg_val; ++ num_signal_qual = recvpriv->signal_qual_data.total_num; ++ // after avg_vals are accquired, we can re-stat the signal values ++ recvpriv->signal_qual_data.update_req = 1; ++ } ++ ++ if (num_signal_strength == 0) { ++ if (rtw_get_on_cur_ch_time(adapter) == 0 ++ || rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) < 2 * adapter->mlmeextpriv.mlmext_info.bcn_interval ++ ) { ++ goto set_timer; ++ } ++ } ++ ++ if(check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE ++ || check_fwstate(&adapter->mlmepriv, _FW_LINKED) == _FALSE ++ ) { ++ goto set_timer; ++ } ++ ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(adapter, _FW_UNDER_SURVEY) == _TRUE) ++ goto set_timer; ++ #endif ++ ++ //update value of signal_strength, rssi, signal_qual ++ tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength); ++ if(tmp_s %_alpha) ++ tmp_s = tmp_s/_alpha + 1; ++ else ++ tmp_s = tmp_s/_alpha; ++ if(tmp_s>100) ++ tmp_s = 100; ++ ++ tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual); ++ if(tmp_q %_alpha) ++ tmp_q = tmp_q/_alpha + 1; ++ else ++ tmp_q = tmp_q/_alpha; ++ if(tmp_q>100) ++ tmp_q = 100; ++ ++ recvpriv->signal_strength = tmp_s; ++ recvpriv->rssi = (s8)translate_percentage_to_dbm(tmp_s); ++ recvpriv->signal_qual = tmp_q; ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 ++ DBG_871X(FUNC_ADPT_FMT" signal_strength:%3u, rssi:%3d, signal_qual:%3u" ++ ", num_signal_strength:%u, num_signal_qual:%u" ++ ", on_cur_ch_ms:%d" ++ "\n" ++ , FUNC_ADPT_ARG(adapter) ++ , recvpriv->signal_strength ++ , recvpriv->rssi ++ , recvpriv->signal_qual ++ , num_signal_strength, num_signal_qual ++ , rtw_get_on_cur_ch_time(adapter) ? rtw_get_passing_time_ms(rtw_get_on_cur_ch_time(adapter)) : 0 ++ ); ++ #endif ++ } ++ ++set_timer: ++ rtw_set_signal_stat_timer(recvpriv); ++ ++} ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_rf.c +@@ -0,0 +1,95 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_RF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++struct ch_freq { ++ u32 channel; ++ u32 frequency; ++}; ++ ++struct ch_freq ch_freq_map[] = { ++ {1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432}, ++ {6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457}, ++ {11, 2462},{12, 2467},{13, 2472},{14, 2484}, ++ /* UNII */ ++ {36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260}, ++ {56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765}, ++ {157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845}, ++ {171, 5855},{173, 5865}, ++ /* HiperLAN2 */ ++ {100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580}, ++ {120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680}, ++ {140, 5700}, ++ /* Japan MMAC */ ++ {34, 5170},{38, 5190},{42, 5210},{46, 5230}, ++ /* Japan */ ++ {184, 4920},{188, 4940},{192, 4960},{196, 4980}, ++ {208, 5040},/* Japan, means J08 */ ++ {212, 5060},/* Japan, means J12 */ ++ {216, 5080},/* Japan, means J16 */ ++}; ++ ++int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); ++ ++u32 rtw_ch2freq(u32 channel) ++{ ++ u8 i; ++ u32 freq = 0; ++ ++ for (i = 0; i < ch_freq_map_num; i++) ++ { ++ if (channel == ch_freq_map[i].channel) ++ { ++ freq = ch_freq_map[i].frequency; ++ break; ++ } ++ } ++ if (i == ch_freq_map_num) ++ freq = 2412; ++ ++ return freq; ++} ++ ++u32 rtw_freq2ch(u32 freq) ++{ ++ u8 i; ++ u32 ch = 0; ++ ++ for (i = 0; i < ch_freq_map_num; i++) ++ { ++ if (freq == ch_freq_map[i].frequency) ++ { ++ ch = ch_freq_map[i].channel; ++ break; ++ } ++ } ++ if (i == ch_freq_map_num) ++ ch = 1; ++ ++ return ch; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_security.c +@@ -0,0 +1,3115 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_SECURITY_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++//=====WEP related===== ++ ++#define CRC32_POLY 0x04c11db7 ++ ++struct arc4context ++{ ++ u32 x; ++ u32 y; ++ u8 state[256]; ++}; ++ ++ ++static void arcfour_init(struct arc4context *parc4ctx, u8 * key,u32 key_len) ++{ ++ u32 t, u; ++ u32 keyindex; ++ u32 stateindex; ++ u8 * state; ++ u32 counter; ++_func_enter_; ++ state = parc4ctx->state; ++ parc4ctx->x = 0; ++ parc4ctx->y = 0; ++ for (counter = 0; counter < 256; counter++) ++ state[counter] = (u8)counter; ++ keyindex = 0; ++ stateindex = 0; ++ for (counter = 0; counter < 256; counter++) ++ { ++ t = state[counter]; ++ stateindex = (stateindex + key[keyindex] + t) & 0xff; ++ u = state[stateindex]; ++ state[stateindex] = (u8)t; ++ state[counter] = (u8)u; ++ if (++keyindex >= key_len) ++ keyindex = 0; ++ } ++_func_exit_; ++} ++static u32 arcfour_byte( struct arc4context *parc4ctx) ++{ ++ u32 x; ++ u32 y; ++ u32 sx, sy; ++ u8 * state; ++_func_enter_; ++ state = parc4ctx->state; ++ x = (parc4ctx->x + 1) & 0xff; ++ sx = state[x]; ++ y = (sx + parc4ctx->y) & 0xff; ++ sy = state[y]; ++ parc4ctx->x = x; ++ parc4ctx->y = y; ++ state[y] = (u8)sx; ++ state[x] = (u8)sy; ++_func_exit_; ++ return state[(sx + sy) & 0xff]; ++} ++ ++ ++static void arcfour_encrypt( struct arc4context *parc4ctx, ++ u8 * dest, ++ u8 * src, ++ u32 len) ++{ ++ u32 i; ++_func_enter_; ++ for (i = 0; i < len; i++) ++ dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx); ++_func_exit_; ++} ++ ++static sint bcrc32initialized = 0; ++static u32 crc32_table[256]; ++ ++ ++static u8 crc32_reverseBit( u8 data) ++{ ++ return( (u8)((data<<7)&0x80) | ((data<<5)&0x40) | ((data<<3)&0x20) | ((data<<1)&0x10) | ((data>>1)&0x08) | ((data>>3)&0x04) | ((data>>5)&0x02) | ((data>>7)&0x01) ); ++} ++ ++static void crc32_init(void) ++{ ++_func_enter_; ++ if (bcrc32initialized == 1) ++ goto exit; ++ else{ ++ sint i, j; ++ u32 c; ++ u8 *p=(u8 *)&c, *p1; ++ u8 k; ++ ++ c = 0x12340000; ++ ++ for (i = 0; i < 256; ++i) ++ { ++ k = crc32_reverseBit((u8)i); ++ for (c = ((u32)k) << 24, j = 8; j > 0; --j){ ++ c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); ++ } ++ p1 = (u8 *)&crc32_table[i]; ++ ++ p1[0] = crc32_reverseBit(p[3]); ++ p1[1] = crc32_reverseBit(p[2]); ++ p1[2] = crc32_reverseBit(p[1]); ++ p1[3] = crc32_reverseBit(p[0]); ++ } ++ bcrc32initialized= 1; ++ } ++exit: ++_func_exit_; ++} ++ ++static u32 getcrc32(u8 *buf, sint len) ++{ ++ u8 *p; ++ u32 crc; ++_func_enter_; ++ if (bcrc32initialized == 0) crc32_init(); ++ ++ crc = 0xffffffff; /* preload shift register, per CRC-32 spec */ ++ ++ for (p = buf; len > 0; ++p, --len) ++ { ++ crc = crc32_table[ (crc ^ *p) & 0xff] ^ (crc >> 8); ++ } ++_func_exit_; ++ return ~crc; /* transmit complement, per CRC-32 spec */ ++} ++ ++ ++/* ++ Need to consider the fragment situation ++*/ ++void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ // exclude ICV ++ ++ unsigned char crc[4]; ++ struct arc4context mycontext; ++ ++ sint curfragnum,length; ++ u32 keylength; ++ ++ u8 *pframe, *payload,*iv; //,*wepkey ++ u8 wepkey[16]; ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ ++_func_enter_; ++ ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //start to encrypt each fragment ++ if((pattrib->encrypt==_WEP40_)||(pattrib->encrypt==_WEP104_)) ++ { ++ keylength=psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex]; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++) ++ { ++ iv=pframe+pattrib->hdrlen; ++ _rtw_memcpy(&wepkey[0], iv, 3); ++ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); ++ payload=pframe+pattrib->iv_len+pattrib->hdrlen; ++ ++ if((curfragnum+1)==pattrib->nr_frags) ++ { //the last fragment ++ ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length)); ++ ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ } ++ else ++ { ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length)); ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8 *)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ ++ } ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ // exclude ICV ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint length; ++ u32 keylength; ++ u8 *pframe, *payload,*iv,wepkey[16]; ++ u8 keyindex; ++ struct rx_pkt_attrib *prxattrib = &(((union recv_frame*)precvframe)->u.hdr.attrib); ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ ++_func_enter_; ++ ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ //start to decrypt recvframe ++ if((prxattrib->encrypt==_WEP40_)||(prxattrib->encrypt==_WEP104_)) ++ { ++ iv=pframe+prxattrib->hdrlen; ++ //keyindex=(iv[3]&0x3); ++ keyindex = prxattrib->key_index; ++ keylength=psecuritypriv->dot11DefKeylen[keyindex]; ++ _rtw_memcpy(&wepkey[0], iv, 3); ++ //_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); ++ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0],keylength); ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ ++ payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; ++ ++ //decrypt payload include icv ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ ++ //calculate icv and compare the icv ++ *((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4)); ++ ++ if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", ++ crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); ++ } ++ ++ } ++ ++_func_exit_; ++ ++ return; ++ ++} ++ ++//3 =====TKIP related===== ++ ++static u32 secmicgetuint32( u8 * p ) ++// Convert from Byte[] to Us4Byte32 in a portable way ++{ ++ s32 i; ++ u32 res = 0; ++_func_enter_; ++ for( i=0; i<4; i++ ) ++ { ++ res |= ((u32)(*p++)) << (8*i); ++ } ++_func_exit_; ++ return res; ++} ++ ++static void secmicputuint32( u8 * p, u32 val ) ++// Convert from Us4Byte32 to Byte[] in a portable way ++{ ++ long i; ++_func_enter_; ++ for( i=0; i<4; i++ ) ++ { ++ *p++ = (u8) (val & 0xff); ++ val >>= 8; ++ } ++_func_exit_; ++} ++ ++static void secmicclear(struct mic_data *pmicdata) ++{ ++// Reset the state to the empty message. ++_func_enter_; ++ pmicdata->L = pmicdata->K0; ++ pmicdata->R = pmicdata->K1; ++ pmicdata->nBytesInM = 0; ++ pmicdata->M = 0; ++_func_exit_; ++} ++ ++void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ) ++{ ++ // Set the key ++_func_enter_; ++ pmicdata->K0 = secmicgetuint32( key ); ++ pmicdata->K1 = secmicgetuint32( key + 4 ); ++ // and reset the message ++ secmicclear(pmicdata); ++_func_exit_; ++} ++ ++void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ) ++{ ++_func_enter_; ++ // Append the byte to our word-sized buffer ++ pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM); ++ pmicdata->nBytesInM++; ++ // Process the word if it is full. ++ if( pmicdata->nBytesInM >= 4 ) ++ { ++ pmicdata->L ^= pmicdata->M; ++ pmicdata->R ^= ROL32( pmicdata->L, 17 ); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ROL32( pmicdata->L, 3 ); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ROR32( pmicdata->L, 2 ); ++ pmicdata->L += pmicdata->R; ++ // Clear the buffer ++ pmicdata->M = 0; ++ pmicdata->nBytesInM = 0; ++ } ++_func_exit_; ++} ++ ++void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nbytes ) ++{ ++_func_enter_; ++ // This is simple ++ while( nbytes > 0 ) ++ { ++ rtw_secmicappendbyte(pmicdata, *src++ ); ++ nbytes--; ++ } ++_func_exit_; ++} ++ ++void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ) ++{ ++_func_enter_; ++ // Append the minimum padding ++ rtw_secmicappendbyte(pmicdata, 0x5a ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ // and then zeroes until the length is a multiple of 4 ++ while( pmicdata->nBytesInM != 0 ) ++ { ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ } ++ // The appendByte function has already computed the result. ++ secmicputuint32( dst, pmicdata->L ); ++ secmicputuint32( dst+4, pmicdata->R ); ++ // Reset to the empty message. ++ secmicclear(pmicdata); ++_func_exit_; ++} ++ ++ ++void rtw_seccalctkipmic(u8 * key,u8 *header,u8 *data,u32 data_len,u8 *mic_code, u8 pri) ++{ ++ ++ struct mic_data micdata; ++ u8 priority[4]={0x0,0x0,0x0,0x0}; ++_func_enter_; ++ rtw_secmicsetkey(&micdata, key); ++ priority[0]=pri; ++ ++ /* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */ ++ if(header[1]&1){ //ToDS==1 ++ rtw_secmicappend(&micdata, &header[16], 6); //DA ++ if(header[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &header[24], 6); ++ else ++ rtw_secmicappend(&micdata, &header[10], 6); ++ } ++ else{ //ToDS==0 ++ rtw_secmicappend(&micdata, &header[4], 6); //DA ++ if(header[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &header[16], 6); ++ else ++ rtw_secmicappend(&micdata, &header[10], 6); ++ ++ } ++ rtw_secmicappend(&micdata, &priority[0], 4); ++ ++ ++ rtw_secmicappend(&micdata, data, data_len); ++ ++ rtw_secgetmic(&micdata,mic_code); ++_func_exit_; ++} ++ ++ ++ ++ ++/* macros for extraction/creation of unsigned char/unsigned short values */ ++#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15)) ++#define Lo8(v16) ((u8)( (v16) & 0x00FF)) ++#define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF)) ++#define Lo16(v32) ((u16)( (v32) & 0xFFFF)) ++#define Hi16(v32) ((u16)(((v32) >>16) & 0xFFFF)) ++#define Mk16(hi,lo) ((lo) ^ (((u16)(hi)) << 8)) ++ ++/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */ ++#define TK16(N) Mk16(tk[2*(N)+1],tk[2*(N)]) ++ ++/* S-box lookup: 16 bits --> 16 bits */ ++#define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)]) ++ ++/* fixed algorithm "parameters" */ ++#define PHASE1_LOOP_CNT 8 /* this needs to be "big enough" */ ++#define TA_SIZE 6 /* 48-bit transmitter address */ ++#define TK_SIZE 16 /* 128-bit temporal key */ ++#define P1K_SIZE 10 /* 80-bit Phase1 key */ ++#define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */ ++ ++ ++/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */ ++static const unsigned short Sbox1[2][256]= /* Sbox for hash (can be in ROM) */ ++{ { ++ 0xC6A5,0xF884,0xEE99,0xF68D,0xFF0D,0xD6BD,0xDEB1,0x9154, ++ 0x6050,0x0203,0xCEA9,0x567D,0xE719,0xB562,0x4DE6,0xEC9A, ++ 0x8F45,0x1F9D,0x8940,0xFA87,0xEF15,0xB2EB,0x8EC9,0xFB0B, ++ 0x41EC,0xB367,0x5FFD,0x45EA,0x23BF,0x53F7,0xE496,0x9B5B, ++ 0x75C2,0xE11C,0x3DAE,0x4C6A,0x6C5A,0x7E41,0xF502,0x834F, ++ 0x685C,0x51F4,0xD134,0xF908,0xE293,0xAB73,0x6253,0x2A3F, ++ 0x080C,0x9552,0x4665,0x9D5E,0x3028,0x37A1,0x0A0F,0x2FB5, ++ 0x0E09,0x2436,0x1B9B,0xDF3D,0xCD26,0x4E69,0x7FCD,0xEA9F, ++ 0x121B,0x1D9E,0x5874,0x342E,0x362D,0xDCB2,0xB4EE,0x5BFB, ++ 0xA4F6,0x764D,0xB761,0x7DCE,0x527B,0xDD3E,0x5E71,0x1397, ++ 0xA6F5,0xB968,0x0000,0xC12C,0x4060,0xE31F,0x79C8,0xB6ED, ++ 0xD4BE,0x8D46,0x67D9,0x724B,0x94DE,0x98D4,0xB0E8,0x854A, ++ 0xBB6B,0xC52A,0x4FE5,0xED16,0x86C5,0x9AD7,0x6655,0x1194, ++ 0x8ACF,0xE910,0x0406,0xFE81,0xA0F0,0x7844,0x25BA,0x4BE3, ++ 0xA2F3,0x5DFE,0x80C0,0x058A,0x3FAD,0x21BC,0x7048,0xF104, ++ 0x63DF,0x77C1,0xAF75,0x4263,0x2030,0xE51A,0xFD0E,0xBF6D, ++ 0x814C,0x1814,0x2635,0xC32F,0xBEE1,0x35A2,0x88CC,0x2E39, ++ 0x9357,0x55F2,0xFC82,0x7A47,0xC8AC,0xBAE7,0x322B,0xE695, ++ 0xC0A0,0x1998,0x9ED1,0xA37F,0x4466,0x547E,0x3BAB,0x0B83, ++ 0x8CCA,0xC729,0x6BD3,0x283C,0xA779,0xBCE2,0x161D,0xAD76, ++ 0xDB3B,0x6456,0x744E,0x141E,0x92DB,0x0C0A,0x486C,0xB8E4, ++ 0x9F5D,0xBD6E,0x43EF,0xC4A6,0x39A8,0x31A4,0xD337,0xF28B, ++ 0xD532,0x8B43,0x6E59,0xDAB7,0x018C,0xB164,0x9CD2,0x49E0, ++ 0xD8B4,0xACFA,0xF307,0xCF25,0xCAAF,0xF48E,0x47E9,0x1018, ++ 0x6FD5,0xF088,0x4A6F,0x5C72,0x3824,0x57F1,0x73C7,0x9751, ++ 0xCB23,0xA17C,0xE89C,0x3E21,0x96DD,0x61DC,0x0D86,0x0F85, ++ 0xE090,0x7C42,0x71C4,0xCCAA,0x90D8,0x0605,0xF701,0x1C12, ++ 0xC2A3,0x6A5F,0xAEF9,0x69D0,0x1791,0x9958,0x3A27,0x27B9, ++ 0xD938,0xEB13,0x2BB3,0x2233,0xD2BB,0xA970,0x0789,0x33A7, ++ 0x2DB6,0x3C22,0x1592,0xC920,0x8749,0xAAFF,0x5078,0xA57A, ++ 0x038F,0x59F8,0x0980,0x1A17,0x65DA,0xD731,0x84C6,0xD0B8, ++ 0x82C3,0x29B0,0x5A77,0x1E11,0x7BCB,0xA8FC,0x6DD6,0x2C3A, ++ }, ++ ++ ++ { /* second half of table is unsigned char-reversed version of first! */ ++ 0xA5C6,0x84F8,0x99EE,0x8DF6,0x0DFF,0xBDD6,0xB1DE,0x5491, ++ 0x5060,0x0302,0xA9CE,0x7D56,0x19E7,0x62B5,0xE64D,0x9AEC, ++ 0x458F,0x9D1F,0x4089,0x87FA,0x15EF,0xEBB2,0xC98E,0x0BFB, ++ 0xEC41,0x67B3,0xFD5F,0xEA45,0xBF23,0xF753,0x96E4,0x5B9B, ++ 0xC275,0x1CE1,0xAE3D,0x6A4C,0x5A6C,0x417E,0x02F5,0x4F83, ++ 0x5C68,0xF451,0x34D1,0x08F9,0x93E2,0x73AB,0x5362,0x3F2A, ++ 0x0C08,0x5295,0x6546,0x5E9D,0x2830,0xA137,0x0F0A,0xB52F, ++ 0x090E,0x3624,0x9B1B,0x3DDF,0x26CD,0x694E,0xCD7F,0x9FEA, ++ 0x1B12,0x9E1D,0x7458,0x2E34,0x2D36,0xB2DC,0xEEB4,0xFB5B, ++ 0xF6A4,0x4D76,0x61B7,0xCE7D,0x7B52,0x3EDD,0x715E,0x9713, ++ 0xF5A6,0x68B9,0x0000,0x2CC1,0x6040,0x1FE3,0xC879,0xEDB6, ++ 0xBED4,0x468D,0xD967,0x4B72,0xDE94,0xD498,0xE8B0,0x4A85, ++ 0x6BBB,0x2AC5,0xE54F,0x16ED,0xC586,0xD79A,0x5566,0x9411, ++ 0xCF8A,0x10E9,0x0604,0x81FE,0xF0A0,0x4478,0xBA25,0xE34B, ++ 0xF3A2,0xFE5D,0xC080,0x8A05,0xAD3F,0xBC21,0x4870,0x04F1, ++ 0xDF63,0xC177,0x75AF,0x6342,0x3020,0x1AE5,0x0EFD,0x6DBF, ++ 0x4C81,0x1418,0x3526,0x2FC3,0xE1BE,0xA235,0xCC88,0x392E, ++ 0x5793,0xF255,0x82FC,0x477A,0xACC8,0xE7BA,0x2B32,0x95E6, ++ 0xA0C0,0x9819,0xD19E,0x7FA3,0x6644,0x7E54,0xAB3B,0x830B, ++ 0xCA8C,0x29C7,0xD36B,0x3C28,0x79A7,0xE2BC,0x1D16,0x76AD, ++ 0x3BDB,0x5664,0x4E74,0x1E14,0xDB92,0x0A0C,0x6C48,0xE4B8, ++ 0x5D9F,0x6EBD,0xEF43,0xA6C4,0xA839,0xA431,0x37D3,0x8BF2, ++ 0x32D5,0x438B,0x596E,0xB7DA,0x8C01,0x64B1,0xD29C,0xE049, ++ 0xB4D8,0xFAAC,0x07F3,0x25CF,0xAFCA,0x8EF4,0xE947,0x1810, ++ 0xD56F,0x88F0,0x6F4A,0x725C,0x2438,0xF157,0xC773,0x5197, ++ 0x23CB,0x7CA1,0x9CE8,0x213E,0xDD96,0xDC61,0x860D,0x850F, ++ 0x90E0,0x427C,0xC471,0xAACC,0xD890,0x0506,0x01F7,0x121C, ++ 0xA3C2,0x5F6A,0xF9AE,0xD069,0x9117,0x5899,0x273A,0xB927, ++ 0x38D9,0x13EB,0xB32B,0x3322,0xBBD2,0x70A9,0x8907,0xA733, ++ 0xB62D,0x223C,0x9215,0x20C9,0x4987,0xFFAA,0x7850,0x7AA5, ++ 0x8F03,0xF859,0x8009,0x171A,0xDA65,0x31D7,0xC684,0xB8D0, ++ 0xC382,0xB029,0x775A,0x111E,0xCB7B,0xFCA8,0xD66D,0x3A2C, ++ } ++}; ++ ++ /* ++********************************************************************** ++* Routine: Phase 1 -- generate P1K, given TA, TK, IV32 ++* ++* Inputs: ++* tk[] = temporal key [128 bits] ++* ta[] = transmitter's MAC address [ 48 bits] ++* iv32 = upper 32 bits of IV [ 32 bits] ++* Output: ++* p1k[] = Phase 1 key [ 80 bits] ++* ++* Note: ++* This function only needs to be called every 2**16 packets, ++* although in theory it could be called every packet. ++* ++********************************************************************** ++*/ ++static void phase1(u16 *p1k,const u8 *tk,const u8 *ta,u32 iv32) ++{ ++ sint i; ++_func_enter_; ++ /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */ ++ p1k[0] = Lo16(iv32); ++ p1k[1] = Hi16(iv32); ++ p1k[2] = Mk16(ta[1],ta[0]); /* use TA[] as little-endian */ ++ p1k[3] = Mk16(ta[3],ta[2]); ++ p1k[4] = Mk16(ta[5],ta[4]); ++ ++ /* Now compute an unbalanced Feistel cipher with 80-bit block */ ++ /* size on the 80-bit block P1K[], using the 128-bit key TK[] */ ++ for (i=0; i < PHASE1_LOOP_CNT ;i++) ++ { /* Each add operation here is mod 2**16 */ ++ p1k[0] += _S_(p1k[4] ^ TK16((i&1)+0)); ++ p1k[1] += _S_(p1k[0] ^ TK16((i&1)+2)); ++ p1k[2] += _S_(p1k[1] ^ TK16((i&1)+4)); ++ p1k[3] += _S_(p1k[2] ^ TK16((i&1)+6)); ++ p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0)); ++ p1k[4] += (unsigned short)i; /* avoid "slide attacks" */ ++ } ++_func_exit_; ++} ++ ++ ++/* ++********************************************************************** ++* Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16 ++* ++* Inputs: ++* tk[] = Temporal key [128 bits] ++* p1k[] = Phase 1 output key [ 80 bits] ++* iv16 = low 16 bits of IV counter [ 16 bits] ++* Output: ++* rc4key[] = the key used to encrypt the packet [128 bits] ++* ++* Note: ++* The value {TA,IV32,IV16} for Phase1/Phase2 must be unique ++* across all packets using the same key TK value. Then, for a ++* given value of TK[], this TKIP48 construction guarantees that ++* the final RC4KEY value is unique across all packets. ++* ++* Suggested implementation optimization: if PPK[] is "overlaid" ++* appropriately on RC4KEY[], there is no need for the final ++* for loop below that copies the PPK[] result into RC4KEY[]. ++* ++********************************************************************** ++*/ ++static void phase2(u8 *rc4key,const u8 *tk,const u16 *p1k,u16 iv16) ++{ ++ sint i; ++ u16 PPK[6]; /* temporary key for mixing */ ++_func_enter_; ++ /* Note: all adds in the PPK[] equations below are mod 2**16 */ ++ for (i=0;i<5;i++) PPK[i]=p1k[i]; /* first, copy P1K to PPK */ ++ PPK[5] = p1k[4] +iv16; /* next, add in IV16 */ ++ ++ /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */ ++ PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */ ++ PPK[1] += _S_(PPK[0] ^ TK16(1)); ++ PPK[2] += _S_(PPK[1] ^ TK16(2)); ++ PPK[3] += _S_(PPK[2] ^ TK16(3)); ++ PPK[4] += _S_(PPK[3] ^ TK16(4)); ++ PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */ ++ ++ /* Final sweep: bijective, "linear". Rotates kill LSB correlations */ ++ PPK[0] += RotR1(PPK[5] ^ TK16(6)); ++ PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */ ++ PPK[2] += RotR1(PPK[1]); ++ PPK[3] += RotR1(PPK[2]); ++ PPK[4] += RotR1(PPK[3]); ++ PPK[5] += RotR1(PPK[4]); ++ /* Note: At this point, for a given key TK[0..15], the 96-bit output */ ++ /* value PPK[0..5] is guaranteed to be unique, as a function */ ++ /* of the 96-bit "input" value {TA,IV32,IV16}. That is, P1K */ ++ /* is now a keyed permutation of {TA,IV32,IV16}. */ ++ ++ /* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */ ++ rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */ ++ rc4key[1] =(Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */ ++ rc4key[2] = Lo8(iv16); ++ rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1); ++ ++ ++ /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */ ++ for (i=0;i<6;i++) ++ { ++ rc4key[4+2*i] = Lo8(PPK[i]); ++ rc4key[5+2*i] = Hi8(PPK[i]); ++ } ++_func_exit_; ++} ++ ++ ++//The hlen isn't include the IV ++u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ // exclude ICV ++ u16 pnl; ++ u32 pnh; ++ u8 rc4key[16]; ++ u8 ttkey[16]; ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint curfragnum,length; ++ u32 prwskeylen; ++ ++ u8 *pframe, *payload,*iv,*prwskey; ++ union pn48 dot11txpn; ++ struct sta_info *stainfo; ++ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ u32 res=_SUCCESS; ++_func_enter_; ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //4 start to encrypt each fragment ++ if(pattrib->encrypt==_TKIP_){ ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); ++ } ++ ++ if (stainfo!=NULL){ ++ ++ if(!(stainfo->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); ++ return _FAIL; ++ } ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(pattrib->ra)) ++ { ++ prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ } ++ ++ prwskeylen=16; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ iv=pframe+pattrib->hdrlen; ++ payload=pframe+pattrib->iv_len+pattrib->hdrlen; ++ ++ GET_TKIP_PN(iv, dot11txpn); ++ ++ pnl=(u16)(dot11txpn.val); ++ pnh=(u32)(dot11txpn.val>>16); ++ ++ phase1((u16 *)&ttkey[0],prwskey,&pattrib->ta[0],pnh); ++ ++ phase2(&rc4key[0],prwskey,(u16 *)&ttkey[0],pnl); ++ ++ if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ RT_TRACE(_module_rtl871x_security_c_,_drv_info_,("pattrib->iv_len =%x, pattrib->icv_len =%x\n", pattrib->iv_len,pattrib->icv_len)); ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ ++ ++ arcfour_init(&mycontext, rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ ++ arcfour_init(&mycontext,rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8 *)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo==NULL!!!\n")); ++ DBG_871X("%s, psta==NUL\n", __func__); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++ return res; ++ ++} ++ ++ ++//The hlen isn't include the IV ++u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe) ++{ // exclude ICV ++ u16 pnl; ++ u32 pnh; ++ u8 rc4key[16]; ++ u8 ttkey[16]; ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint length; ++ u32 prwskeylen; ++ ++ u8 *pframe, *payload,*iv,*prwskey; ++ union pn48 dot11txpn; ++ struct sta_info *stainfo; ++ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++// struct recv_priv *precvpriv=&padapter->recvpriv; ++ u32 res=_SUCCESS; ++ ++_func_enter_; ++ ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ //4 start to decrypt recvframe ++ if(prxattrib->encrypt==_TKIP_){ ++ ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); ++ if (stainfo!=NULL){ ++ ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ static u32 start = 0; ++ static u32 no_gkey_bc_cnt = 0; ++ static u32 no_gkey_mc_cnt = 0; ++ ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ ++ if (start == 0) ++ start = rtw_get_current_time(); ++ ++ if (is_broadcast_mac_addr(prxattrib->ra)) ++ no_gkey_bc_cnt++; ++ else ++ no_gkey_mc_cnt++; ++ ++ if (rtw_get_passing_time_ms(start) > 1000) { ++ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", ++ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); ++ } ++ start = rtw_get_current_time(); ++ no_gkey_bc_cnt = 0; ++ no_gkey_mc_cnt = 0; ++ } ++ goto exit; ++ } ++ ++ if (no_gkey_bc_cnt || no_gkey_mc_cnt) { ++ DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" gkey installed. no_gkey_bc_cnt:%u, no_gkey_mc_cnt:%u\n", ++ FUNC_ADPT_ARG(padapter), no_gkey_bc_cnt, no_gkey_mc_cnt); ++ } ++ start = 0; ++ no_gkey_bc_cnt = 0; ++ no_gkey_mc_cnt = 0; ++ ++ //DBG_871X("rx bc/mc packets, to perform sw rtw_tkip_decrypt\n"); ++ //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; ++ prwskeylen=16; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo!=NULL!!!\n")); ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ prwskeylen=16; ++ } ++ ++ iv=pframe+prxattrib->hdrlen; ++ payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ ++ GET_TKIP_PN(iv, dot11txpn); ++ ++ pnl=(u16)(dot11txpn.val); ++ pnh=(u32)(dot11txpn.val>>16); ++ ++ phase1((u16 *)&ttkey[0],prwskey,&prxattrib->ta[0],pnh); ++ phase2(&rc4key[0],prwskey,(unsigned short *)&ttkey[0],pnl); ++ ++ //4 decrypt payload include icv ++ ++ arcfour_init(&mycontext, rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ ++ *((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4)); ++ ++ if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", ++ crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); ++ res=_FAIL; ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++exit: ++ return res; ++ ++} ++ ++ ++//3 =====AES related===== ++ ++ ++ ++#define MAX_MSG_SIZE 2048 ++/*****************************/ ++/******** SBOX Table *********/ ++/*****************************/ ++ ++ static u8 sbox_table[256] = ++ { ++ 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, ++ 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, ++ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, ++ 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, ++ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, ++ 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, ++ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, ++ 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, ++ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, ++ 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, ++ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, ++ 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, ++ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, ++ 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, ++ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, ++ 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, ++ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, ++ 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, ++ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, ++ 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, ++ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, ++ 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, ++ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, ++ 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, ++ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, ++ 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, ++ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, ++ 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, ++ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, ++ 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, ++ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, ++ 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 ++ }; ++ ++/*****************************/ ++/**** Function Prototypes ****/ ++/*****************************/ ++ ++static void bitwise_xor(u8 *ina, u8 *inb, u8 *out); ++static void construct_mic_iv( ++ u8 *mic_header1, ++ sint qc_exists, ++ sint a4_exists, ++ u8 *mpdu, ++ uint payload_length, ++ u8 * pn_vector, ++ uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use ++static void construct_mic_header1( ++ u8 *mic_header1, ++ sint header_length, ++ u8 *mpdu, ++ uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use ++static void construct_mic_header2( ++ u8 *mic_header2, ++ u8 *mpdu, ++ sint a4_exists, ++ sint qc_exists); ++static void construct_ctr_preload( ++ u8 *ctr_preload, ++ sint a4_exists, ++ sint qc_exists, ++ u8 *mpdu, ++ u8 *pn_vector, ++ sint c, ++ uint frtype);// add for CONFIG_IEEE80211W, none 11w also can use ++static void xor_128(u8 *a, u8 *b, u8 *out); ++static void xor_32(u8 *a, u8 *b, u8 *out); ++static u8 sbox(u8 a); ++static void next_key(u8 *key, sint round); ++static void byte_sub(u8 *in, u8 *out); ++static void shift_row(u8 *in, u8 *out); ++static void mix_column(u8 *in, u8 *out); ++#ifndef PLATFORM_FREEBSD ++static void add_round_key( u8 *shiftrow_in, ++ u8 *mcol_in, ++ u8 *block_in, ++ sint round, ++ u8 *out); ++#endif //PLATFORM_FREEBSD ++static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext); ++ ++ ++/****************************************/ ++/* aes128k128d() */ ++/* Performs a 128 bit AES encrypt with */ ++/* 128 bit data. */ ++/****************************************/ ++static void xor_128(u8 *a, u8 *b, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0;i<16; i++) ++ { ++ out[i] = a[i] ^ b[i]; ++ } ++_func_exit_; ++} ++ ++ ++static void xor_32(u8 *a, u8 *b, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0;i<4; i++) ++ { ++ out[i] = a[i] ^ b[i]; ++ } ++_func_exit_; ++} ++ ++ ++static u8 sbox(u8 a) ++{ ++ return sbox_table[(sint)a]; ++} ++ ++ ++static void next_key(u8 *key, sint round) ++{ ++ u8 rcon; ++ u8 sbox_key[4]; ++ u8 rcon_table[12] = ++ { ++ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, ++ 0x1b, 0x36, 0x36, 0x36 ++ }; ++_func_enter_; ++ sbox_key[0] = sbox(key[13]); ++ sbox_key[1] = sbox(key[14]); ++ sbox_key[2] = sbox(key[15]); ++ sbox_key[3] = sbox(key[12]); ++ ++ rcon = rcon_table[round]; ++ ++ xor_32(&key[0], sbox_key, &key[0]); ++ key[0] = key[0] ^ rcon; ++ ++ xor_32(&key[4], &key[0], &key[4]); ++ xor_32(&key[8], &key[4], &key[8]); ++ xor_32(&key[12], &key[8], &key[12]); ++_func_exit_; ++} ++ ++ ++static void byte_sub(u8 *in, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0; i< 16; i++) ++ { ++ out[i] = sbox(in[i]); ++ } ++_func_exit_; ++} ++ ++ ++static void shift_row(u8 *in, u8 *out) ++{ ++_func_enter_; ++ out[0] = in[0]; ++ out[1] = in[5]; ++ out[2] = in[10]; ++ out[3] = in[15]; ++ out[4] = in[4]; ++ out[5] = in[9]; ++ out[6] = in[14]; ++ out[7] = in[3]; ++ out[8] = in[8]; ++ out[9] = in[13]; ++ out[10] = in[2]; ++ out[11] = in[7]; ++ out[12] = in[12]; ++ out[13] = in[1]; ++ out[14] = in[6]; ++ out[15] = in[11]; ++_func_exit_; ++} ++ ++ ++static void mix_column(u8 *in, u8 *out) ++{ ++ sint i; ++ u8 add1b[4]; ++ u8 add1bf7[4]; ++ u8 rotl[4]; ++ u8 swap_halfs[4]; ++ u8 andf7[4]; ++ u8 rotr[4]; ++ u8 temp[4]; ++ u8 tempb[4]; ++_func_enter_; ++ for (i=0 ; i<4; i++) ++ { ++ if ((in[i] & 0x80)== 0x80) ++ add1b[i] = 0x1b; ++ else ++ add1b[i] = 0x00; ++ } ++ ++ swap_halfs[0] = in[2]; /* Swap halfs */ ++ swap_halfs[1] = in[3]; ++ swap_halfs[2] = in[0]; ++ swap_halfs[3] = in[1]; ++ ++ rotl[0] = in[3]; /* Rotate left 8 bits */ ++ rotl[1] = in[0]; ++ rotl[2] = in[1]; ++ rotl[3] = in[2]; ++ ++ andf7[0] = in[0] & 0x7f; ++ andf7[1] = in[1] & 0x7f; ++ andf7[2] = in[2] & 0x7f; ++ andf7[3] = in[3] & 0x7f; ++ ++ for (i = 3; i>0; i--) /* logical shift left 1 bit */ ++ { ++ andf7[i] = andf7[i] << 1; ++ if ((andf7[i-1] & 0x80) == 0x80) ++ { ++ andf7[i] = (andf7[i] | 0x01); ++ } ++ } ++ andf7[0] = andf7[0] << 1; ++ andf7[0] = andf7[0] & 0xfe; ++ ++ xor_32(add1b, andf7, add1bf7); ++ ++ xor_32(in, add1bf7, rotr); ++ ++ temp[0] = rotr[0]; /* Rotate right 8 bits */ ++ rotr[0] = rotr[1]; ++ rotr[1] = rotr[2]; ++ rotr[2] = rotr[3]; ++ rotr[3] = temp[0]; ++ ++ xor_32(add1bf7, rotr, temp); ++ xor_32(swap_halfs, rotl,tempb); ++ xor_32(temp, tempb, out); ++_func_exit_; ++} ++ ++ ++static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext) ++{ ++ sint round; ++ sint i; ++ u8 intermediatea[16]; ++ u8 intermediateb[16]; ++ u8 round_key[16]; ++_func_enter_; ++ for(i=0; i<16; i++) round_key[i] = key[i]; ++ ++ for (round = 0; round < 11; round++) ++ { ++ if (round == 0) ++ { ++ xor_128(round_key, data, ciphertext); ++ next_key(round_key, round); ++ } ++ else if (round == 10) ++ { ++ byte_sub(ciphertext, intermediatea); ++ shift_row(intermediatea, intermediateb); ++ xor_128(intermediateb, round_key, ciphertext); ++ } ++ else /* 1 - 9 */ ++ { ++ byte_sub(ciphertext, intermediatea); ++ shift_row(intermediatea, intermediateb); ++ mix_column(&intermediateb[0], &intermediatea[0]); ++ mix_column(&intermediateb[4], &intermediatea[4]); ++ mix_column(&intermediateb[8], &intermediatea[8]); ++ mix_column(&intermediateb[12], &intermediatea[12]); ++ xor_128(intermediatea, round_key, ciphertext); ++ next_key(round_key, round); ++ } ++ } ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_iv() */ ++/* Builds the MIC IV from header fields and PN */ ++/* Baron think the function is construct CCM */ ++/* nonce */ ++/************************************************/ ++static void construct_mic_iv( ++ u8 *mic_iv, ++ sint qc_exists, ++ sint a4_exists, ++ u8 *mpdu, ++ uint payload_length, ++ u8 *pn_vector, ++ uint frtype// add for CONFIG_IEEE80211W, none 11w also can use ++ ) ++{ ++ sint i; ++_func_enter_; ++ mic_iv[0] = 0x59; ++ if (qc_exists && a4_exists) mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */ ++ if (qc_exists && !a4_exists) mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */ ++ if (!qc_exists) mic_iv[1] = 0x00; ++#ifdef CONFIG_IEEE80211W ++ //802.11w management frame should set management bit(4) ++ if(frtype == WIFI_MGT_TYPE) ++ mic_iv[1] |= BIT(4); ++#endif //CONFIG_IEEE80211W ++ for (i = 2; i < 8; i++) ++ mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */ ++ #ifdef CONSISTENT_PN_ORDER ++ for (i = 8; i < 14; i++) ++ mic_iv[i] = pn_vector[i - 8]; /* mic_iv[8:13] = PN[0:5] */ ++ #else ++ for (i = 8; i < 14; i++) ++ mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */ ++ #endif ++ mic_iv[14] = (unsigned char) (payload_length / 256); ++ mic_iv[15] = (unsigned char) (payload_length % 256); ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header1() */ ++/* Builds the first MIC header block from */ ++/* header fields. */ ++/* Build AAD SC,A1,A2 */ ++/************************************************/ ++static void construct_mic_header1( ++ u8 *mic_header1, ++ sint header_length, ++ u8 *mpdu, ++ uint frtype// add for CONFIG_IEEE80211W, none 11w also can use ++ ) ++{ ++_func_enter_; ++ mic_header1[0] = (u8)((header_length - 2) / 256); ++ mic_header1[1] = (u8)((header_length - 2) % 256); ++#ifdef CONFIG_IEEE80211W ++ //802.11w management frame don't AND subtype bits 4,5,6 of frame control field ++ if(frtype == WIFI_MGT_TYPE) ++ mic_header1[2] = mpdu[0]; ++ else ++#endif //CONFIG_IEEE80211W ++ mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */ ++ ++ mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */ ++ mic_header1[4] = mpdu[4]; /* A1 */ ++ mic_header1[5] = mpdu[5]; ++ mic_header1[6] = mpdu[6]; ++ mic_header1[7] = mpdu[7]; ++ mic_header1[8] = mpdu[8]; ++ mic_header1[9] = mpdu[9]; ++ mic_header1[10] = mpdu[10]; /* A2 */ ++ mic_header1[11] = mpdu[11]; ++ mic_header1[12] = mpdu[12]; ++ mic_header1[13] = mpdu[13]; ++ mic_header1[14] = mpdu[14]; ++ mic_header1[15] = mpdu[15]; ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header2() */ ++/* Builds the last MIC header block from */ ++/* header fields. */ ++/************************************************/ ++static void construct_mic_header2( ++ u8 *mic_header2, ++ u8 *mpdu, ++ sint a4_exists, ++ sint qc_exists ++ ) ++{ ++ sint i; ++_func_enter_; ++ for (i = 0; i<16; i++) mic_header2[i]=0x00; ++ ++ mic_header2[0] = mpdu[16]; /* A3 */ ++ mic_header2[1] = mpdu[17]; ++ mic_header2[2] = mpdu[18]; ++ mic_header2[3] = mpdu[19]; ++ mic_header2[4] = mpdu[20]; ++ mic_header2[5] = mpdu[21]; ++ ++ //mic_header2[6] = mpdu[22] & 0xf0; /* SC */ ++ mic_header2[6] = 0x00; ++ mic_header2[7] = 0x00; /* mpdu[23]; */ ++ ++ ++ if (!qc_exists && a4_exists) ++ { ++ for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ ++ ++ } ++ ++ if (qc_exists && !a4_exists) ++ { ++ mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */ ++ mic_header2[9] = mpdu[25] & 0x00; ++ } ++ ++ if (qc_exists && a4_exists) ++ { ++ for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ ++ ++ mic_header2[14] = mpdu[30] & 0x0f; ++ mic_header2[15] = mpdu[31] & 0x00; ++ } ++ ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header2() */ ++/* Builds the last MIC header block from */ ++/* header fields. */ ++/* Baron think the function is construct CCM */ ++/* nonce */ ++/************************************************/ ++static void construct_ctr_preload( ++ u8 *ctr_preload, ++ sint a4_exists, ++ sint qc_exists, ++ u8 *mpdu, ++ u8 *pn_vector, ++ sint c, ++ uint frtype // add for CONFIG_IEEE80211W, none 11w also can use ++ ) ++{ ++ sint i = 0; ++_func_enter_; ++ for (i=0; i<16; i++) ctr_preload[i] = 0x00; ++ i = 0; ++ ++ ctr_preload[0] = 0x01; /* flag */ ++ if (qc_exists && a4_exists) ++ ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */ ++ if (qc_exists && !a4_exists) ++ ctr_preload[1] = mpdu[24] & 0x0f; ++#ifdef CONFIG_IEEE80211W ++ //802.11w management frame should set management bit(4) ++ if(frtype == WIFI_MGT_TYPE) ++ ctr_preload[1] |= BIT(4); ++#endif //CONFIG_IEEE80211W ++ for (i = 2; i < 8; i++) ++ ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */ ++ #ifdef CONSISTENT_PN_ORDER ++ for (i = 8; i < 14; i++) ++ ctr_preload[i] = pn_vector[i - 8]; /* ctr_preload[8:13] = PN[0:5] */ ++ #else ++ for (i = 8; i < 14; i++) ++ ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */ ++ #endif ++ ctr_preload[14] = (unsigned char) (c / 256); /* Ctr */ ++ ctr_preload[15] = (unsigned char) (c % 256); ++_func_exit_; ++} ++ ++ ++/************************************/ ++/* bitwise_xor() */ ++/* A 128 bit, bitwise exclusive or */ ++/************************************/ ++static void bitwise_xor(u8 *ina, u8 *inb, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0; i<16; i++) ++ { ++ out[i] = ina[i] ^ inb[i]; ++ } ++_func_exit_; ++} ++ ++ ++static sint aes_cipher(u8 *key, uint hdrlen, ++ u8 *pframe, uint plen) ++{ ++// /*static*/ unsigned char message[MAX_MSG_SIZE]; ++ uint qc_exists, a4_exists, i, j, payload_remainder, ++ num_blocks, payload_index; ++ ++ u8 pn_vector[6]; ++ u8 mic_iv[16]; ++ u8 mic_header1[16]; ++ u8 mic_header2[16]; ++ u8 ctr_preload[16]; ++ ++ /* Intermediate Buffers */ ++ u8 chain_buffer[16]; ++ u8 aes_out[16]; ++ u8 padded_buffer[16]; ++ u8 mic[8]; ++// uint offset = 0; ++ uint frtype = GetFrameType(pframe); ++ uint frsubtype = GetFrameSubType(pframe); ++ ++_func_enter_; ++ frsubtype=frsubtype>>4; ++ ++ ++ _rtw_memset((void *)mic_iv, 0, 16); ++ _rtw_memset((void *)mic_header1, 0, 16); ++ _rtw_memset((void *)mic_header2, 0, 16); ++ _rtw_memset((void *)ctr_preload, 0, 16); ++ _rtw_memset((void *)chain_buffer, 0, 16); ++ _rtw_memset((void *)aes_out, 0, 16); ++ _rtw_memset((void *)padded_buffer, 0, 16); ++ ++ if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) ++ a4_exists = 0; ++ else ++ a4_exists = 1; ++ ++ if ( ++ ((frtype|frsubtype) == WIFI_DATA_CFACK) || ++ ((frtype|frsubtype) == WIFI_DATA_CFPOLL)|| ++ ((frtype|frsubtype) == WIFI_DATA_CFACKPOLL)) ++ { ++ qc_exists = 1; ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ } ++ // add for CONFIG_IEEE80211W, none 11w also can use ++ else if ((frtype == WIFI_DATA) && ++ ((frsubtype == 0x08) || ++ (frsubtype == 0x09)|| ++ (frsubtype == 0x0a)|| ++ (frsubtype == 0x0b))) ++ { ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ qc_exists = 1; ++ } ++ else ++ qc_exists = 0; ++ ++ pn_vector[0]=pframe[hdrlen]; ++ pn_vector[1]=pframe[hdrlen+1]; ++ pn_vector[2]=pframe[hdrlen+4]; ++ pn_vector[3]=pframe[hdrlen+5]; ++ pn_vector[4]=pframe[hdrlen+6]; ++ pn_vector[5]=pframe[hdrlen+7]; ++ ++ construct_mic_iv( ++ mic_iv, ++ qc_exists, ++ a4_exists, ++ pframe, //message, ++ plen, ++ pn_vector, ++ frtype // add for CONFIG_IEEE80211W, none 11w also can use ++ ); ++ ++ construct_mic_header1( ++ mic_header1, ++ hdrlen, ++ pframe, //message ++ frtype // add for CONFIG_IEEE80211W, none 11w also can use ++ ); ++ construct_mic_header2( ++ mic_header2, ++ pframe, //message, ++ a4_exists, ++ qc_exists ++ ); ++ ++ ++ payload_remainder = plen % 16; ++ num_blocks = plen / 16; ++ ++ /* Find start of payload */ ++ payload_index = (hdrlen + 8); ++ ++ /* Calculate MIC */ ++ aes128k128d(key, mic_iv, aes_out); ++ bitwise_xor(aes_out, mic_header1, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ bitwise_xor(aes_out, mic_header2, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ for (i = 0; i < num_blocks; i++) ++ { ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ ++ payload_index += 16; ++ aes128k128d(key, chain_buffer, aes_out); ++ } ++ ++ /* Add on the final payload block if it needs padding */ ++ if (payload_remainder > 0) ++ { ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index++];//padded_buffer[j] = message[payload_index++]; ++ } ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ } ++ ++ for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; ++ ++ /* Insert MIC into payload */ ++ for (j = 0; j < 8; j++) ++ pframe[payload_index+j] = mic[j]; //message[payload_index+j] = mic[j]; ++ ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, //message, ++ pn_vector, ++ i+1, ++ frtype); // add for CONFIG_IEEE80211W, none 11w also can use ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, //message, ++ pn_vector, ++ num_blocks+1, ++ frtype); // add for CONFIG_IEEE80211W, none 11w also can use ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index+j];//padded_buffer[j] = message[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; jattrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ ++// uint offset = 0; ++ u32 res=_SUCCESS; ++_func_enter_; ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //4 start to encrypt each fragment ++ if((pattrib->encrypt==_AES_)){ ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); ++ } ++ ++ if (stainfo!=NULL){ ++ ++ if(!(stainfo->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); ++ return _FAIL; ++ } ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(pattrib->ra)) ++ { ++ prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ } ++ ++#ifdef CONFIG_TDLS //swencryption ++ { ++ struct sta_info *ptdls_sta; ++ ptdls_sta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->dst[0] ); ++ if((ptdls_sta != NULL) && (ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) ++ { ++ DBG_871X("[%s] for tdls link\n", __FUNCTION__); ++ prwskey=&ptdls_sta->tpk.tk[0]; ++ } ++ } ++#endif //CONFIG_TDLS ++ ++ prwskeylen=16; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ ++ if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ ++ aes_cipher(prwskey,pattrib->hdrlen,pframe, length); ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ ++ aes_cipher(prwskey,pattrib->hdrlen,pframe, length); ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8*)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); ++ DBG_871X("%s, psta==NUL\n", __func__); ++ res=_FAIL; ++ } ++ ++ } ++ ++ ++ ++_func_exit_; ++ return res; ++} ++ ++static sint aes_decipher(u8 *key, uint hdrlen, ++ u8 *pframe, uint plen) ++{ ++ static u8 message[MAX_MSG_SIZE]; ++ uint qc_exists, a4_exists, i, j, payload_remainder, ++ num_blocks, payload_index; ++ sint res = _SUCCESS; ++ u8 pn_vector[6]; ++ u8 mic_iv[16]; ++ u8 mic_header1[16]; ++ u8 mic_header2[16]; ++ u8 ctr_preload[16]; ++ ++ /* Intermediate Buffers */ ++ u8 chain_buffer[16]; ++ u8 aes_out[16]; ++ u8 padded_buffer[16]; ++ u8 mic[8]; ++ ++ ++// uint offset = 0; ++ uint frtype = GetFrameType(pframe); ++ uint frsubtype = GetFrameSubType(pframe); ++_func_enter_; ++ frsubtype=frsubtype>>4; ++ ++ ++ _rtw_memset((void *)mic_iv, 0, 16); ++ _rtw_memset((void *)mic_header1, 0, 16); ++ _rtw_memset((void *)mic_header2, 0, 16); ++ _rtw_memset((void *)ctr_preload, 0, 16); ++ _rtw_memset((void *)chain_buffer, 0, 16); ++ _rtw_memset((void *)aes_out, 0, 16); ++ _rtw_memset((void *)padded_buffer, 0, 16); ++ ++ //start to decrypt the payload ++ ++ num_blocks = (plen-8) / 16; //(plen including LLC, payload_length and mic ) ++ ++ payload_remainder = (plen-8) % 16; ++ ++ pn_vector[0] = pframe[hdrlen]; ++ pn_vector[1] = pframe[hdrlen+1]; ++ pn_vector[2] = pframe[hdrlen+4]; ++ pn_vector[3] = pframe[hdrlen+5]; ++ pn_vector[4] = pframe[hdrlen+6]; ++ pn_vector[5] = pframe[hdrlen+7]; ++ ++ if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) ++ a4_exists = 0; ++ else ++ a4_exists = 1; ++ ++ if ( ++ ((frtype|frsubtype) == WIFI_DATA_CFACK) || ++ ((frtype|frsubtype) == WIFI_DATA_CFPOLL)|| ++ ((frtype|frsubtype) == WIFI_DATA_CFACKPOLL)) ++ { ++ qc_exists = 1; ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ }//only for data packet . add for CONFIG_IEEE80211W, none 11w also can use ++ else if ((frtype == WIFI_DATA) && ++ ((frsubtype == 0x08) || ++ (frsubtype == 0x09)|| ++ (frsubtype == 0x0a)|| ++ (frsubtype == 0x0b))) ++ { ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ qc_exists = 1; ++ } ++ else ++ qc_exists = 0; ++ ++ ++ // now, decrypt pframe with hdrlen offset and plen long ++ ++ payload_index = hdrlen + 8; // 8 is for extiv ++ ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, ++ pn_vector, ++ i+1, ++ frtype // add for CONFIG_IEEE80211W, none 11w also can use ++ ); ++ ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer); ++ ++ for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, ++ pn_vector, ++ num_blocks+1, ++ frtype // add for CONFIG_IEEE80211W, none 11w also can use ++ ); ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; j 0) ++ { ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = message[payload_index++]; ++ } ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ } ++ ++ for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; ++ ++ /* Insert MIC into payload */ ++ for (j = 0; j < 8; j++) ++ message[payload_index+j] = mic[j]; ++ ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ message, ++ pn_vector, ++ i+1, ++ frtype); // add for CONFIG_IEEE80211W, none 11w also can use ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ message, ++ pn_vector, ++ num_blocks+1, ++ frtype); // add for CONFIG_IEEE80211W, none 11w also can use ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = message[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; ju.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++// struct recv_priv *precvpriv=&padapter->recvpriv; ++ u32 res=_SUCCESS; ++_func_enter_; ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ //4 start to encrypt each fragment ++ if((prxattrib->encrypt==_AES_)){ ++ ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); ++ if (stainfo!=NULL){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ //in concurrent we should use sw descrypt in group key, so we remove this message ++ //DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); ++ //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ DBG_8192C("%s:rx bc/mc packets,but didn't install group key!!!!!!!!!!\n",__FUNCTION__); ++ goto exit; ++ } ++ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; ++ ++ if(psecuritypriv->dot118021XGrpKeyid != prxattrib->key_index) ++ { ++ DBG_871X("not match packet_index=%d, install_index=%d \n" ++ , prxattrib->key_index, psecuritypriv->dot118021XGrpKeyid); ++ res=_FAIL; ++ goto exit; ++ } ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ } ++ ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ /*// add for CONFIG_IEEE80211W, debug ++ if(0) ++ printk("@@@@@@@@@@@@@@@@@@ length=%d, prxattrib->hdrlen=%d, prxattrib->pkt_len=%d \n" ++ , length, prxattrib->hdrlen, prxattrib->pkt_len); ++ if(0) ++ { ++ int no; ++ //test print PSK ++ printk("PSK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", prwskey[no]); ++ printk("\n"); ++ } ++ if(0) ++ { ++ int no; ++ //test print PSK ++ printk("frame:\n"); ++ for(no=0;nopkt_len;no++) ++ printk(" %02x ", pframe[no]); ++ printk("\n"); ++ }*/ ++ ++ res= aes_decipher(prwskey,prxattrib->hdrlen,pframe, length); ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++exit: ++ return res; ++} ++ ++#ifdef CONFIG_IEEE80211W ++u32 rtw_BIP_verify(_adapter *padapter, u8 *precvframe) ++{ ++ struct rx_pkt_attrib *pattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; ++ u8 *pframe; ++ u8 *BIP_AAD, *p; ++ u32 res=_FAIL; ++ uint len, ori_len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u8 mic[16]; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ori_len = pattrib->pkt_len-WLAN_HDR_A3_LEN+BIP_AAD_SIZE; ++ BIP_AAD = rtw_zmalloc(ori_len); ++ ++ if(BIP_AAD == NULL) ++ { ++ DBG_871X("BIP AAD allocate fail\n"); ++ return _FAIL; ++ } ++ //PKT start ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ //mapping to wlan header ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //save the frame body + MME ++ _rtw_memcpy(BIP_AAD+BIP_AAD_SIZE, pframe+WLAN_HDR_A3_LEN, pattrib->pkt_len-WLAN_HDR_A3_LEN); ++ //find MME IE pointer ++ p = rtw_get_ie(BIP_AAD+BIP_AAD_SIZE, _MME_IE_, &len, pattrib->pkt_len-WLAN_HDR_A3_LEN); ++ //Baron ++ if(p) ++ { ++ u16 keyid=0; ++ u64 temp_ipn=0; ++ //save packet number ++ _rtw_memcpy(&temp_ipn, p+4, 6); ++ temp_ipn = le64_to_cpu(temp_ipn); ++ //BIP packet number should bigger than previous BIP packet ++ if(temp_ipn <= pmlmeext->mgnt_80211w_IPN_rx) ++ { ++ DBG_871X("replay BIP packet\n"); ++ goto BIP_exit; ++ } ++ //copy key index ++ _rtw_memcpy(&keyid, p+2, 2); ++ keyid = le16_to_cpu(keyid); ++ if(keyid != padapter->securitypriv.dot11wBIPKeyid) ++ { ++ DBG_871X("BIP key index error!\n"); ++ goto BIP_exit; ++ } ++ //clear the MIC field of MME to zero ++ _rtw_memset(p+2+len-8, 0, 8); ++ ++ //conscruct AAD, copy frame control field ++ _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); ++ ClearRetry(BIP_AAD); ++ ClearPwrMgt(BIP_AAD); ++ ClearMData(BIP_AAD); ++ //conscruct AAD, copy address 1 to address 3 ++ _rtw_memcpy(BIP_AAD+2, pwlanhdr->addr1, 18); ++ ++ if(omac1_aes_128(padapter->securitypriv.dot11wBIPKey[padapter->securitypriv.dot11wBIPKeyid].skey ++ , BIP_AAD, ori_len, mic)) ++ goto BIP_exit; ++ ++ /*//management packet content ++ { ++ int pp; ++ DBG_871X("pkt: "); ++ for(pp=0;pp< pattrib->pkt_len; pp++) ++ printk(" %02x ", pframe[pp]); ++ DBG_871X("\n"); ++ //BIP AAD + management frame body + MME(MIC is zero) ++ DBG_871X("AAD+PKT: "); ++ for(pp=0;pp< ori_len; pp++) ++ DBG_871X(" %02x ", BIP_AAD[pp]); ++ DBG_871X("\n"); ++ //show the MIC result ++ DBG_871X("mic: "); ++ for(pp=0;pp<16; pp++) ++ DBG_871X(" %02x ", mic[pp]); ++ DBG_871X("\n"); ++ } ++ */ ++ //MIC field should be last 8 bytes of packet (packet without FCS) ++ if(_rtw_memcmp(mic, pframe+pattrib->pkt_len-8, 8)) ++ { ++ pmlmeext->mgnt_80211w_IPN_rx = temp_ipn; ++ res=_SUCCESS; ++ } ++ else ++ DBG_871X("BIP MIC error!\n"); ++ ++ } ++ else ++ res = RTW_RX_HANDLED; ++BIP_exit: ++ ++ rtw_mfree(BIP_AAD, ori_len); ++ return res; ++} ++#endif //CONFIG_IEEE80211W ++ ++#ifndef PLATFORM_FREEBSD ++/* compress 512-bits */ ++static int sha256_compress(struct sha256_state *md, unsigned char *buf) ++{ ++ u32 S[8], W[64], t0, t1; ++ u32 t; ++ int i; ++ ++ /* copy state into S */ ++ for (i = 0; i < 8; i++) { ++ S[i] = md->state[i]; ++ } ++ ++ /* copy the state into 512-bits into W[0..15] */ ++ for (i = 0; i < 16; i++) ++ W[i] = WPA_GET_BE32(buf + (4 * i)); ++ ++ /* fill W[16..63] */ ++ for (i = 16; i < 64; i++) { ++ W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + ++ W[i - 16]; ++ } ++ ++ /* Compress */ ++#define RND(a,b,c,d,e,f,g,h,i) \ ++ t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \ ++ t1 = Sigma0(a) + Maj(a, b, c); \ ++ d += t0; \ ++ h = t0 + t1; ++ ++ for (i = 0; i < 64; ++i) { ++ RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i); ++ t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4]; ++ S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t; ++ } ++ ++ /* feedback */ ++ for (i = 0; i < 8; i++) { ++ md->state[i] = md->state[i] + S[i]; ++ } ++ return 0; ++} ++ ++/* Initialize the hash state */ ++static void sha256_init(struct sha256_state *md) ++{ ++ md->curlen = 0; ++ md->length = 0; ++ md->state[0] = 0x6A09E667UL; ++ md->state[1] = 0xBB67AE85UL; ++ md->state[2] = 0x3C6EF372UL; ++ md->state[3] = 0xA54FF53AUL; ++ md->state[4] = 0x510E527FUL; ++ md->state[5] = 0x9B05688CUL; ++ md->state[6] = 0x1F83D9ABUL; ++ md->state[7] = 0x5BE0CD19UL; ++} ++ ++/** ++ Process a block of memory though the hash ++ @param md The hash state ++ @param in The data to hash ++ @param inlen The length of the data (octets) ++ @return CRYPT_OK if successful ++*/ ++static int sha256_process(struct sha256_state *md, unsigned char *in, ++ unsigned long inlen) ++{ ++ unsigned long n; ++#define block_size 64 ++ ++ if (md->curlen > sizeof(md->buf)) ++ return -1; ++ ++ while (inlen > 0) { ++ if (md->curlen == 0 && inlen >= block_size) { ++ if (sha256_compress(md, (unsigned char *) in) < 0) ++ return -1; ++ md->length += block_size * 8; ++ in += block_size; ++ inlen -= block_size; ++ } else { ++ n = MIN(inlen, (block_size - md->curlen)); ++ _rtw_memcpy(md->buf + md->curlen, in, n); ++ md->curlen += n; ++ in += n; ++ inlen -= n; ++ if (md->curlen == block_size) { ++ if (sha256_compress(md, md->buf) < 0) ++ return -1; ++ md->length += 8 * block_size; ++ md->curlen = 0; ++ } ++ } ++ } ++ ++ return 0; ++} ++ ++ ++/** ++ Terminate the hash to get the digest ++ @param md The hash state ++ @param out [out] The destination of the hash (32 bytes) ++ @return CRYPT_OK if successful ++*/ ++static int sha256_done(struct sha256_state *md, unsigned char *out) ++{ ++ int i; ++ ++ if (md->curlen >= sizeof(md->buf)) ++ return -1; ++ ++ /* increase the length of the message */ ++ md->length += md->curlen * 8; ++ ++ /* append the '1' bit */ ++ md->buf[md->curlen++] = (unsigned char) 0x80; ++ ++ /* if the length is currently above 56 bytes we append zeros ++ * then compress. Then we can fall back to padding zeros and length ++ * encoding like normal. ++ */ ++ if (md->curlen > 56) { ++ while (md->curlen < 64) { ++ md->buf[md->curlen++] = (unsigned char) 0; ++ } ++ sha256_compress(md, md->buf); ++ md->curlen = 0; ++ } ++ ++ /* pad upto 56 bytes of zeroes */ ++ while (md->curlen < 56) { ++ md->buf[md->curlen++] = (unsigned char) 0; ++ } ++ ++ /* store length */ ++ WPA_PUT_BE64(md->buf + 56, md->length); ++ sha256_compress(md, md->buf); ++ ++ /* copy output */ ++ for (i = 0; i < 8; i++) ++ WPA_PUT_BE32(out + (4 * i), md->state[i]); ++ ++ return 0; ++} ++ ++/** ++ * sha256_vector - SHA256 hash for data vector ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for the hash ++ * Returns: 0 on success, -1 of failure ++ */ ++static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len, ++ u8 *mac) ++{ ++ struct sha256_state ctx; ++ size_t i; ++ ++ sha256_init(&ctx); ++ for (i = 0; i < num_elem; i++) ++ if (sha256_process(&ctx, addr[i], len[i])) ++ return -1; ++ if (sha256_done(&ctx, mac)) ++ return -1; ++ return 0; ++} ++ ++static u8 os_strlen(const char *s) ++{ ++ const char *p = s; ++ while (*p) ++ p++; ++ return p - s; ++} ++ ++static int os_memcmp(void *s1, void *s2, u8 n) ++{ ++ unsigned char *p1 = s1, *p2 = s2; ++ ++ if (n == 0) ++ return 0; ++ ++ while (*p1 == *p2) { ++ p1++; ++ p2++; ++ n--; ++ if (n == 0) ++ return 0; ++ } ++ ++ return *p1 - *p2; ++} ++ ++/** ++ * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104) ++ * @key: Key for HMAC operations ++ * @key_len: Length of the key in bytes ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for the hash (32 bytes) ++ */ ++static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem, ++ u8 *addr[], size_t *len, u8 *mac) ++{ ++ unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ ++ unsigned char tk[32]; ++ u8 *_addr[6]; ++ size_t _len[6], i; ++ ++ if (num_elem > 5) { ++ /* ++ * Fixed limit on the number of fragments to avoid having to ++ * allocate memory (which could fail). ++ */ ++ return; ++ } ++ ++ /* if key is longer than 64 bytes reset it to key = SHA256(key) */ ++ if (key_len > 64) { ++ sha256_vector(1, &key, &key_len, tk); ++ key = tk; ++ key_len = 32; ++ } ++ ++ /* the HMAC_SHA256 transform looks like: ++ * ++ * SHA256(K XOR opad, SHA256(K XOR ipad, text)) ++ * ++ * where K is an n byte key ++ * ipad is the byte 0x36 repeated 64 times ++ * opad is the byte 0x5c repeated 64 times ++ * and text is the data being protected */ ++ ++ /* start out by storing key in ipad */ ++ _rtw_memset(k_pad, 0, sizeof(k_pad)); ++ _rtw_memcpy(k_pad, key, key_len); ++ /* XOR key with ipad values */ ++ for (i = 0; i < 64; i++) ++ k_pad[i] ^= 0x36; ++ ++ /* perform inner SHA256 */ ++ _addr[0] = k_pad; ++ _len[0] = 64; ++ for (i = 0; i < num_elem; i++) { ++ _addr[i + 1] = addr[i]; ++ _len[i + 1] = len[i]; ++ } ++ sha256_vector(1 + num_elem, _addr, _len, mac); ++ ++ _rtw_memset(k_pad, 0, sizeof(k_pad)); ++ _rtw_memcpy(k_pad, key, key_len); ++ /* XOR key with opad values */ ++ for (i = 0; i < 64; i++) ++ k_pad[i] ^= 0x5c; ++ ++ /* perform outer SHA256 */ ++ _addr[0] = k_pad; ++ _len[0] = 64; ++ _addr[1] = mac; ++ _len[1] = 32; ++ sha256_vector(2, _addr, _len, mac); ++} ++#endif //PLATFORM_FREEBSD ++/** ++ * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2) ++ * @key: Key for PRF ++ * @key_len: Length of the key in bytes ++ * @label: A unique label for each purpose of the PRF ++ * @data: Extra data to bind into the key ++ * @data_len: Length of the data ++ * @buf: Buffer for the generated pseudo-random key ++ * @buf_len: Number of bytes of key to generate ++ * ++ * This function is used to derive new, cryptographically separate keys from a ++ * given key. ++ */ ++#ifndef PLATFORM_FREEBSD //Baron ++static void sha256_prf(u8 *key, size_t key_len, char *label, ++ u8 *data, size_t data_len, u8 *buf, size_t buf_len) ++{ ++ u16 counter = 1; ++ size_t pos, plen; ++ u8 hash[SHA256_MAC_LEN]; ++ u8 *addr[4]; ++ size_t len[4]; ++ u8 counter_le[2], length_le[2]; ++ ++ addr[0] = counter_le; ++ len[0] = 2; ++ addr[1] = (u8 *) label; ++ len[1] = os_strlen(label); ++ addr[2] = data; ++ len[2] = data_len; ++ addr[3] = length_le; ++ len[3] = sizeof(length_le); ++ ++ WPA_PUT_LE16(length_le, buf_len * 8); ++ pos = 0; ++ while (pos < buf_len) { ++ plen = buf_len - pos; ++ WPA_PUT_LE16(counter_le, counter); ++ if (plen >= SHA256_MAC_LEN) { ++ hmac_sha256_vector(key, key_len, 4, addr, len, ++ &buf[pos]); ++ pos += SHA256_MAC_LEN; ++ } else { ++ hmac_sha256_vector(key, key_len, 4, addr, len, hash); ++ _rtw_memcpy(&buf[pos], hash, plen); ++ break; ++ } ++ counter++; ++ } ++} ++#endif //PLATFORM_FREEBSD Baron ++ ++/* AES tables*/ ++const u32 Te0[256] = { ++ 0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU, ++ 0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U, ++ 0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU, ++ 0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU, ++ 0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U, ++ 0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU, ++ 0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU, ++ 0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU, ++ 0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU, ++ 0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU, ++ 0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U, ++ 0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU, ++ 0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU, ++ 0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U, ++ 0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU, ++ 0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU, ++ 0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU, ++ 0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU, ++ 0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU, ++ 0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U, ++ 0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU, ++ 0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU, ++ 0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU, ++ 0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU, ++ 0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U, ++ 0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U, ++ 0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U, ++ 0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U, ++ 0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU, ++ 0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U, ++ 0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U, ++ 0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU, ++ 0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU, ++ 0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U, ++ 0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U, ++ 0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U, ++ 0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU, ++ 0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U, ++ 0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU, ++ 0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U, ++ 0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU, ++ 0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U, ++ 0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U, ++ 0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU, ++ 0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U, ++ 0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U, ++ 0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U, ++ 0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U, ++ 0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U, ++ 0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U, ++ 0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U, ++ 0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U, ++ 0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU, ++ 0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U, ++ 0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U, ++ 0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U, ++ 0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U, ++ 0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U, ++ 0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U, ++ 0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU, ++ 0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U, ++ 0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U, ++ 0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U, ++ 0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU, ++}; ++const u32 Td0[256] = { ++ 0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U, ++ 0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U, ++ 0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U, ++ 0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU, ++ 0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U, ++ 0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U, ++ 0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU, ++ 0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U, ++ 0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU, ++ 0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U, ++ 0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U, ++ 0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U, ++ 0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U, ++ 0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU, ++ 0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U, ++ 0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU, ++ 0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U, ++ 0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU, ++ 0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U, ++ 0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U, ++ 0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U, ++ 0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU, ++ 0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U, ++ 0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU, ++ 0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U, ++ 0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU, ++ 0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U, ++ 0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU, ++ 0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU, ++ 0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U, ++ 0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU, ++ 0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U, ++ 0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU, ++ 0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U, ++ 0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U, ++ 0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U, ++ 0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU, ++ 0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U, ++ 0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U, ++ 0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU, ++ 0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U, ++ 0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U, ++ 0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U, ++ 0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U, ++ 0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U, ++ 0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU, ++ 0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U, ++ 0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U, ++ 0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U, ++ 0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U, ++ 0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U, ++ 0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU, ++ 0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU, ++ 0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU, ++ 0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU, ++ 0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U, ++ 0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U, ++ 0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU, ++ 0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU, ++ 0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U, ++ 0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU, ++ 0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U, ++ 0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U, ++ 0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U, ++}; ++const u8 Td4s[256] = { ++ 0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U, ++ 0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU, ++ 0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U, ++ 0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU, ++ 0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU, ++ 0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU, ++ 0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U, ++ 0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U, ++ 0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U, ++ 0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U, ++ 0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU, ++ 0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U, ++ 0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU, ++ 0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U, ++ 0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U, ++ 0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU, ++ 0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU, ++ 0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U, ++ 0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U, ++ 0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU, ++ 0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U, ++ 0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU, ++ 0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U, ++ 0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U, ++ 0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U, ++ 0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU, ++ 0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU, ++ 0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU, ++ 0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U, ++ 0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U, ++ 0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U, ++ 0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU, ++}; ++const u8 rcons[] = { ++ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36 ++ /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ ++}; ++ ++/** ++ * Expand the cipher key into the encryption key schedule. ++ * ++ * @return the number of rounds for the given cipher key size. ++ */ ++#ifndef PLATFORM_FREEBSD //Baron ++static void rijndaelKeySetupEnc(u32 rk[/*44*/], const u8 cipherKey[]) ++{ ++ int i; ++ u32 temp; ++ ++ rk[0] = GETU32(cipherKey ); ++ rk[1] = GETU32(cipherKey + 4); ++ rk[2] = GETU32(cipherKey + 8); ++ rk[3] = GETU32(cipherKey + 12); ++ for (i = 0; i < 10; i++) { ++ temp = rk[3]; ++ rk[4] = rk[0] ^ ++ TE421(temp) ^ TE432(temp) ^ TE443(temp) ^ TE414(temp) ^ ++ RCON(i); ++ rk[5] = rk[1] ^ rk[4]; ++ rk[6] = rk[2] ^ rk[5]; ++ rk[7] = rk[3] ^ rk[6]; ++ rk += 4; ++ } ++} ++ ++static void rijndaelEncrypt(u32 rk[/*44*/], u8 pt[16], u8 ct[16]) ++{ ++ u32 s0, s1, s2, s3, t0, t1, t2, t3; ++ int Nr = 10; ++#ifndef FULL_UNROLL ++ int r; ++#endif /* ?FULL_UNROLL */ ++ ++ /* ++ * map byte array block to cipher state ++ * and add initial round key: ++ */ ++ s0 = GETU32(pt ) ^ rk[0]; ++ s1 = GETU32(pt + 4) ^ rk[1]; ++ s2 = GETU32(pt + 8) ^ rk[2]; ++ s3 = GETU32(pt + 12) ^ rk[3]; ++ ++#define ROUND(i,d,s) \ ++d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \ ++d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \ ++d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \ ++d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3] ++ ++#ifdef FULL_UNROLL ++ ++ ROUND(1,t,s); ++ ROUND(2,s,t); ++ ROUND(3,t,s); ++ ROUND(4,s,t); ++ ROUND(5,t,s); ++ ROUND(6,s,t); ++ ROUND(7,t,s); ++ ROUND(8,s,t); ++ ROUND(9,t,s); ++ ++ rk += Nr << 2; ++ ++#else /* !FULL_UNROLL */ ++ ++ /* Nr - 1 full rounds: */ ++ r = Nr >> 1; ++ for (;;) { ++ ROUND(1,t,s); ++ rk += 8; ++ if (--r == 0) ++ break; ++ ROUND(0,s,t); ++ } ++ ++#endif /* ?FULL_UNROLL */ ++ ++#undef ROUND ++ ++ /* ++ * apply last round and ++ * map cipher state to byte array block: ++ */ ++ s0 = TE41(t0) ^ TE42(t1) ^ TE43(t2) ^ TE44(t3) ^ rk[0]; ++ PUTU32(ct , s0); ++ s1 = TE41(t1) ^ TE42(t2) ^ TE43(t3) ^ TE44(t0) ^ rk[1]; ++ PUTU32(ct + 4, s1); ++ s2 = TE41(t2) ^ TE42(t3) ^ TE43(t0) ^ TE44(t1) ^ rk[2]; ++ PUTU32(ct + 8, s2); ++ s3 = TE41(t3) ^ TE42(t0) ^ TE43(t1) ^ TE44(t2) ^ rk[3]; ++ PUTU32(ct + 12, s3); ++} ++ ++static void * aes_encrypt_init(u8 *key, size_t len) ++{ ++ u32 *rk; ++ if (len != 16) ++ return NULL; ++ rk = (u32*)rtw_malloc(AES_PRIV_SIZE); ++ if (rk == NULL) ++ return NULL; ++ rijndaelKeySetupEnc(rk, key); ++ return rk; ++} ++ ++static void aes_128_encrypt(void *ctx, u8 *plain, u8 *crypt) ++{ ++ rijndaelEncrypt(ctx, plain, crypt); ++} ++ ++ ++static void gf_mulx(u8 *pad) ++{ ++ int i, carry; ++ ++ carry = pad[0] & 0x80; ++ for (i = 0; i < AES_BLOCK_SIZE - 1; i++) ++ pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); ++ pad[AES_BLOCK_SIZE - 1] <<= 1; ++ if (carry) ++ pad[AES_BLOCK_SIZE - 1] ^= 0x87; ++} ++ ++static void aes_encrypt_deinit(void *ctx) ++{ ++ _rtw_memset(ctx, 0, AES_PRIV_SIZE); ++ rtw_mfree(ctx, AES_PRIV_SIZE); ++} ++ ++ ++/** ++ * omac1_aes_128_vector - One-Key CBC MAC (OMAC1) hash with AES-128 ++ * @key: 128-bit key for the hash operation ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) ++ * Returns: 0 on success, -1 on failure ++ * ++ * This is a mode for using block cipher (AES in this case) for authentication. ++ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication ++ * (SP) 800-38B. ++ */ ++static int omac1_aes_128_vector(u8 *key, size_t num_elem, ++ u8 *addr[], size_t *len, u8 *mac) ++{ ++ void *ctx; ++ u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; ++ u8 *pos, *end; ++ size_t i, e, left, total_len; ++ ++ ctx = aes_encrypt_init(key, 16); ++ if (ctx == NULL) ++ return -1; ++ _rtw_memset(cbc, 0, AES_BLOCK_SIZE); ++ ++ total_len = 0; ++ for (e = 0; e < num_elem; e++) ++ total_len += len[e]; ++ left = total_len; ++ ++ e = 0; ++ pos = addr[0]; ++ end = pos + len[0]; ++ ++ while (left >= AES_BLOCK_SIZE) { ++ for (i = 0; i < AES_BLOCK_SIZE; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ if (left > AES_BLOCK_SIZE) ++ aes_128_encrypt(ctx, cbc, cbc); ++ left -= AES_BLOCK_SIZE; ++ } ++ ++ _rtw_memset(pad, 0, AES_BLOCK_SIZE); ++ aes_128_encrypt(ctx, pad, pad); ++ gf_mulx(pad); ++ ++ if (left || total_len == 0) { ++ for (i = 0; i < left; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ cbc[left] ^= 0x80; ++ gf_mulx(pad); ++ } ++ ++ for (i = 0; i < AES_BLOCK_SIZE; i++) ++ pad[i] ^= cbc[i]; ++ aes_128_encrypt(ctx, pad, mac); ++ aes_encrypt_deinit(ctx); ++ return 0; ++} ++ ++ ++/** ++ * omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC) ++ * @key: 128-bit key for the hash operation ++ * @data: Data buffer for which a MAC is determined ++ * @data_len: Length of data buffer in bytes ++ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) ++ * Returns: 0 on success, -1 on failure ++ * ++ * This is a mode for using block cipher (AES in this case) for authentication. ++ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication ++ * (SP) 800-38B. ++ */ //modify for CONFIG_IEEE80211W ++int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac) ++{ ++ return omac1_aes_128_vector(key, 1, &data, &data_len, mac); ++} ++#endif //PLATFORM_FREEBSD Baron ++ ++#ifdef CONFIG_TDLS ++void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 *SNonce = psta->SNonce; ++ u8 *ANonce = psta->ANonce; ++ ++ u8 key_input[SHA256_MAC_LEN]; ++ u8 *nonce[2]; ++ size_t len[2]; ++ u8 data[3 * ETH_ALEN]; ++ ++ /* IEEE Std 802.11z-2010 8.5.9.1: ++ * TPK-Key-Input = SHA-256(min(SNonce, ANonce) || max(SNonce, ANonce)) ++ */ ++ len[0] = 32; ++ len[1] = 32; ++ if (os_memcmp(SNonce, ANonce, 32) < 0) { ++ nonce[0] = SNonce; ++ nonce[1] = ANonce; ++ } else { ++ nonce[0] = ANonce; ++ nonce[1] = SNonce; ++ } ++ ++ sha256_vector(2, nonce, len, key_input); ++ ++ /* ++ * TPK-Key-Data = KDF-N_KEY(TPK-Key-Input, "TDLS PMK", ++ * min(MAC_I, MAC_R) || max(MAC_I, MAC_R) || BSSID || N_KEY) ++ * TODO: is N_KEY really included in KDF Context and if so, in which ++ * presentation format (little endian 16-bit?) is it used? It gets ++ * added by the KDF anyway.. ++ */ ++ ++ if (os_memcmp(myid(&(padapter->eeprompriv)), psta->hwaddr, ETH_ALEN) < 0) { ++ _rtw_memcpy(data, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(data + ETH_ALEN, psta->hwaddr, ETH_ALEN); ++ } else { ++ _rtw_memcpy(data, psta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(data + ETH_ALEN, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ } ++ _rtw_memcpy(data + 2 * ETH_ALEN, get_bssid(pmlmepriv), ETH_ALEN); ++ ++ sha256_prf(key_input, SHA256_MAC_LEN, "TDLS PMK", data, sizeof(data), (u8 *) &psta->tpk, sizeof(psta->tpk)); ++ ++ ++} ++ ++/** ++ * wpa_tdls_ftie_mic - Calculate TDLS FTIE MIC ++ * @kck: TPK-KCK ++ * @lnkid: Pointer to the beginning of Link Identifier IE ++ * @rsnie: Pointer to the beginning of RSN IE used for handshake ++ * @timeoutie: Pointer to the beginning of Timeout IE used for handshake ++ * @ftie: Pointer to the beginning of FT IE ++ * @mic: Pointer for writing MIC ++ * ++ * Calculate MIC for TDLS frame. ++ */ ++int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, ++ u8 *mic) ++{ ++ u8 *buf, *pos; ++ struct wpa_tdls_ftie *_ftie; ++ struct wpa_tdls_lnkid *_lnkid; ++ int ret; ++ int len = 2 * ETH_ALEN + 1 + 2 + lnkid[1] + 2 + rsnie[1] + ++ 2 + timeoutie[1] + 2 + ftie[1]; ++ buf = rtw_zmalloc(len); ++ if (!buf) { ++ DBG_871X("TDLS: No memory for MIC calculation\n"); ++ return -1; ++ } ++ ++ pos = buf; ++ _lnkid = (struct wpa_tdls_lnkid *) lnkid; ++ /* 1) TDLS initiator STA MAC address */ ++ _rtw_memcpy(pos, _lnkid->init_sta, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 2) TDLS responder STA MAC address */ ++ _rtw_memcpy(pos, _lnkid->resp_sta, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 3) Transaction Sequence number */ ++ *pos++ = trans_seq; ++ /* 4) Link Identifier IE */ ++ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); ++ pos += 2 + lnkid[1]; ++ /* 5) RSN IE */ ++ _rtw_memcpy(pos, rsnie, 2 + rsnie[1]); ++ pos += 2 + rsnie[1]; ++ /* 6) Timeout Interval IE */ ++ _rtw_memcpy(pos, timeoutie, 2 + timeoutie[1]); ++ pos += 2 + timeoutie[1]; ++ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ ++ _rtw_memcpy(pos, ftie, 2 + ftie[1]); ++ _ftie = (struct wpa_tdls_ftie *) pos; ++ _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); ++ pos += 2 + ftie[1]; ++ ++ ret = omac1_aes_128(kck, buf, pos - buf, mic); ++ rtw_mfree(buf, len); ++ return ret; ++ ++} ++ ++int tdls_verify_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie) ++{ ++ u8 *buf, *pos; ++ int len; ++ u8 mic[16]; ++ int ret; ++ u8 *rx_ftie, *tmp_ftie; ++ ++ if (lnkid == NULL || rsnie == NULL || ++ timeoutie == NULL || ftie == NULL){ ++ return 0; ++ } ++ ++ len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie+1) + 2 + *(timeoutie+1) + 2 + *(ftie+1); ++ ++ buf = rtw_zmalloc(len); ++ if (buf == NULL) ++ return 0; ++ ++ pos = buf; ++ /* 1) TDLS initiator STA MAC address */ ++ _rtw_memcpy(pos, lnkid + ETH_ALEN + 2, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 2) TDLS responder STA MAC address */ ++ _rtw_memcpy(pos, lnkid + 2 * ETH_ALEN + 2, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 3) Transaction Sequence number */ ++ *pos++ = trans_seq; ++ /* 4) Link Identifier IE */ ++ _rtw_memcpy(pos, lnkid, 2 + 18); ++ pos += 2 + 18; ++ /* 5) RSN IE */ ++ _rtw_memcpy(pos, rsnie, 2 + *(rsnie+1)); ++ pos += 2 + *(rsnie+1); ++ /* 6) Timeout Interval IE */ ++ _rtw_memcpy(pos, timeoutie, 2 + *(timeoutie+1)); ++ pos += 2 + *(timeoutie+1); ++ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ ++ _rtw_memcpy(pos, ftie, 2 + *(ftie+1)); ++ pos += 2; ++ tmp_ftie = (u8 *) (pos+2); ++ _rtw_memset(tmp_ftie, 0, 16); ++ pos += *(ftie+1); ++ ++ ret = omac1_aes_128(kck, buf, pos - buf, mic); ++ rtw_mfree(buf, len); ++ if (ret) ++ return 0; ++ rx_ftie = ftie+4; ++ ++ if (os_memcmp(mic, rx_ftie, 16) == 0) { ++ //Valid MIC ++ return 1; ++ } ++ ++ //Invalid MIC ++ DBG_871X( "[%s] Invalid MIC\n", __FUNCTION__); ++ return 0; ++ ++} ++#endif //CONFIG_TDLS ++ ++#ifdef PLATFORM_WINDOWS ++void rtw_use_tkipkey_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ) ++#endif ++#ifdef PLATFORM_LINUX ++void rtw_use_tkipkey_handler(void *FunctionContext) ++#endif ++#ifdef PLATFORM_FREEBSD ++void rtw_use_tkipkey_handler(void *FunctionContext) ++#endif ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler ^^^\n")); ++ ++/* ++ if(padapter->bDriverStopped ||padapter->bSurpriseRemoved){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %d)(padapter->bSurpriseRemoved %d)^^^\n",padapter->bDriverStopped,padapter->bSurpriseRemoved)); ++ ++ return; ++ } ++ */ ++ ++ padapter->securitypriv.busetkipkey=_TRUE; ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler padapter->securitypriv.busetkipkey=%d^^^\n",padapter->securitypriv.busetkipkey)); ++ ++_func_exit_; ++ ++} ++ ++/* Restore HW wep key setting according to key_mask */ ++void rtw_sec_restore_wep_key(_adapter *adapter) ++{ ++ struct security_priv* securitypriv=&(adapter->securitypriv); ++ sint keyid; ++ ++ if((_WEP40_ == securitypriv->dot11PrivacyAlgrthm) ||(_WEP104_ == securitypriv->dot11PrivacyAlgrthm)) { ++ for(keyid=0;keyid<4;keyid++){ ++ if(securitypriv->key_mask & BIT(keyid)){ ++ if(keyid == securitypriv->dot11PrivacyKeyIndex) ++ rtw_set_key(adapter,securitypriv, keyid, 1); ++ else ++ rtw_set_key(adapter,securitypriv, keyid, 0); ++ } ++ } ++ } ++} ++ ++u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller) ++{ ++ struct security_priv* securitypriv=&(adapter->securitypriv); ++ u8 status = _SUCCESS; ++ ++ if (securitypriv->btkip_countermeasure == _TRUE) { ++ u32 passing_ms = rtw_get_passing_time_ms(securitypriv->btkip_countermeasure_time); ++ if (passing_ms > 60*1000) { ++ LOG_LEVEL(_drv_info_, "%s("ADPT_FMT") countermeasure time:%ds > 60s \n", ++ caller, ADPT_ARG(adapter), passing_ms/1000); ++ securitypriv->btkip_countermeasure = _FALSE; ++ securitypriv->btkip_countermeasure_time = 0; ++ } else { ++ LOG_LEVEL(_drv_warning_, "%s("ADPT_FMT") countermeasure time:%ds < 60s \n", ++ caller, ADPT_ARG(adapter), passing_ms/1000); ++ status = _FAIL; ++ } ++ } ++ ++ return status; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_sreset.c +@@ -0,0 +1,352 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++ ++void sreset_init_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ _rtw_mutex_init(&psrtpriv->silentreset_mutex); ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++void sreset_reset_value(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++#endif ++} ++ ++u8 sreset_get_wifi_status(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u8 status = WIFI_STATUS_SUCCESS; ++ u32 val32 = 0; ++ _irqL irqL; ++ if(psrtpriv->silent_reset_inprogress == _TRUE) ++ { ++ return status; ++ } ++ val32 =rtw_read32(padapter,REG_TXDMA_STATUS); ++ if(val32==0xeaeaeaea){ ++ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; ++ } ++ else if(val32!=0){ ++ DBG_8192C("txdmastatu(%x)\n",val32); ++ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; ++ } ++ ++ if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) ++ { ++ DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); ++ status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); ++ } ++ DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); ++ ++ //status restore ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ return status; ++#else ++ return WIFI_STATUS_SUCCESS; ++#endif ++} ++ ++void sreset_set_wifi_error_status(_adapter *padapter, u32 status) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = status; ++#endif ++} ++ ++void sreset_set_trigger_point(_adapter *padapter, s32 tgp) ++{ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.dbg_trigger_point = tgp; ++#endif ++} ++ ++bool sreset_inprogress(_adapter *padapter) ++{ ++#if defined(DBG_CONFIG_ERROR_RESET) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ return pHalData->srestpriv.silent_reset_inprogress; ++#else ++ return _FALSE; ++#endif ++} ++ ++void sreset_restore_security_station(_adapter *padapter) ++{ ++ u8 EntryId = 0; ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ ++ { ++ u8 val8; ++ ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) { ++ val8 = 0xcc; ++ #ifdef CONFIG_WAPI_SUPPORT ++ } else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) { ++ //Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. ++ val8 = 0x4c; ++ #endif ++ } else { ++ val8 = 0xcf; ++ } ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ } ++ ++ #if 0 ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || ++ ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) ++ { ++ ++ for(EntryId=0; EntryId<4; EntryId++) ++ { ++ if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1); ++ else ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0); ++ } ++ ++ } ++ else ++ #endif ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //pairwise key ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ //group key ++ rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0); ++ } ++ } ++} ++ ++void sreset_restore_network_station(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ #if 0 ++ { ++ //======================================================= ++ // reset related register of Beacon control ++ ++ //set MSR to nolink ++ Set_MSR(padapter, _HW_STATE_NOLINK_); ++ // reject all data frame ++ rtw_write16(padapter, REG_RXFLTMAP2,0x00); ++ //reset TSF ++ rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ // disable update TSF ++ SetBcnCtrlReg(padapter, BIT(4), 0); ++ ++ //======================================================= ++ } ++ #endif ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure); ++ ++ { ++ u8 threshold; ++ #ifdef CONFIG_USB_HCI ++ // TH=1 => means that invalidate usb rx aggregation ++ // TH=0 => means that validate usb rx aggregation, use init value. ++ if(mlmepriv->htpriv.ht_option) { ++ if(padapter->registrypriv.wifi_spec==1) ++ threshold = 1; ++ else ++ threshold = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } else { ++ threshold = 1; ++ rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++ #endif ++ } ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ //disable dynamic functions, such as high power, DIG ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ ++ { ++ u8 join_type = 0; ++ rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ } ++ ++ Set_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ mlmeext_joinbss_event_callback(padapter, 1); ++ //restore Sequence No. ++ rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); ++ ++ sreset_restore_security_station(padapter); ++} ++ ++void sreset_restore_network_status(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ sreset_restore_network_station(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ rtw_ap_restore_network(padapter); ++ } else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE)) { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } else { ++ DBG_871X(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv)); ++ } ++} ++ ++void sreset_stop_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (!rtw_netif_queue_stopped(padapter->pnetdev)) ++ rtw_netif_stop_queue(padapter->pnetdev); ++ ++ rtw_cancel_all_timer(padapter); ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_kill(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_scan_abort(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) ++ _rtw_join_timeout_handler(padapter); ++ ++} ++ ++void sreset_start_adapter(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if (padapter == NULL) ++ return; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED)) { ++ sreset_restore_network_status(padapter); ++ } ++ ++ /* TODO: OS and HCI independent */ ++ #if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI) ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ #endif ++ ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ if (rtw_netif_queue_stopped(padapter->pnetdev)) ++ rtw_netif_wake_queue(padapter->pnetdev); ++ ++} ++ ++void sreset_reset(_adapter *padapter) ++{ ++#ifdef DBG_CONFIG_ERROR_RESET ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ u32 start = rtw_get_current_time(); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ++ psrtpriv->silent_reset_inprogress = _TRUE; ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ sreset_stop_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_stop_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ #ifdef CONFIG_IPS ++ _ips_enter(padapter); ++ _ips_leave(padapter); ++ #endif ++ ++ sreset_start_adapter(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ sreset_start_adapter(padapter->pbuddy_adapter); ++ #endif ++ ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ DBG_871X("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start)); ++#endif ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_sta_mgt.c +@@ -0,0 +1,848 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_STA_MGT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++ ++void _rtw_init_stainfo(struct sta_info *psta); ++void _rtw_init_stainfo(struct sta_info *psta) ++{ ++ ++_func_enter_; ++ ++ _rtw_memset((u8 *)psta, 0, sizeof (struct sta_info)); ++ ++ _rtw_spinlock_init(&psta->lock); ++ _rtw_init_listhead(&psta->list); ++ _rtw_init_listhead(&psta->hash_list); ++ //_rtw_init_listhead(&psta->asoc_list); ++ //_rtw_init_listhead(&psta->sleep_list); ++ //_rtw_init_listhead(&psta->wakeup_list); ++ ++ _rtw_init_queue(&psta->sleep_q); ++ psta->sleepq_len = 0; ++ ++ _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); ++ _rtw_init_sta_recv_priv(&psta->sta_recvpriv); ++ ++#ifdef CONFIG_AP_MODE ++ ++ _rtw_init_listhead(&psta->asoc_list); ++ ++ _rtw_init_listhead(&psta->auth_list); ++ ++ psta->expire_to = 0; ++ ++ psta->flags = 0; ++ ++ psta->capability = 0; ++ ++ psta->bpairwise_key_installed = _FALSE; ++ ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ psta->nonerp_set = 0; ++ psta->no_short_slot_time_set = 0; ++ psta->no_short_preamble_set = 0; ++ psta->no_ht_gf_set = 0; ++ psta->no_ht_set = 0; ++ psta->ht_20mhz_set = 0; ++#endif ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++ psta->keep_alive_trycnt = 0; ++ ++#endif // CONFIG_AP_MODE ++ ++_func_exit_; ++ ++} ++ ++u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) ++{ ++ struct sta_info *psta; ++ s32 i; ++ ++_func_enter_; ++ ++ pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4); ++ ++ if(!pstapriv->pallocated_stainfo_buf) ++ return _FAIL; ++ ++ pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 - ++ ((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3); ++ ++ _rtw_init_queue(&pstapriv->free_sta_queue); ++ ++ _rtw_spinlock_init(&pstapriv->sta_hash_lock); ++ ++ //_rtw_init_queue(&pstapriv->asoc_q); ++ pstapriv->asoc_sta_count = 0; ++ _rtw_init_queue(&pstapriv->sleep_q); ++ _rtw_init_queue(&pstapriv->wakeup_q); ++ ++ psta = (struct sta_info *)(pstapriv->pstainfo_buf); ++ ++ ++ for(i = 0; i < NUM_STA; i++) ++ { ++ _rtw_init_stainfo(psta); ++ ++ _rtw_init_listhead(&(pstapriv->sta_hash[i])); ++ ++ rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue)); ++ ++ psta++; ++ } ++ ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++ pstapriv->sta_dz_bitmap = 0; ++ pstapriv->tim_bitmap = 0; ++ ++ _rtw_init_listhead(&pstapriv->asoc_list); ++ _rtw_init_listhead(&pstapriv->auth_list); ++ _rtw_spinlock_init(&pstapriv->asoc_list_lock); ++ _rtw_spinlock_init(&pstapriv->auth_list_lock); ++ pstapriv->asoc_list_cnt = 0; ++ pstapriv->auth_list_cnt = 0; ++ ++ pstapriv->auth_to = 3; // 3*2 = 6 sec ++ pstapriv->assoc_to = 3; ++ //pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic. ++ //pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic. ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ pstapriv->expire_to = 3; // 3*2 = 6 sec ++#else ++ pstapriv->expire_to = 60;// 60*2 = 120 sec = 2 min, expire after no any traffic. ++#endif ++ pstapriv->max_num_sta = NUM_STA; ++ ++#endif ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta) ++{ ++ int offset = (((u8 *)sta) - stapriv->pstainfo_buf)/sizeof(struct sta_info); ++ ++ if (!stainfo_offset_valid(offset)) ++ DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset); ++ ++ return offset; ++} ++ ++inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset) ++{ ++ if (!stainfo_offset_valid(offset)) ++ DBG_871X("%s invalid offset(%d), out of range!!!", __func__, offset); ++ ++ return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info)); ++} ++ ++void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv); ++void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv) ++{ ++_func_enter_; ++ ++ _rtw_spinlock_free(&psta_xmitpriv->lock); ++ ++ _rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock)); ++_func_exit_; ++} ++ ++static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv) ++{ ++_func_enter_; ++ ++ _rtw_spinlock_free(&psta_recvpriv->lock); ++ ++ _rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock)); ++ ++_func_exit_; ++ ++} ++ ++void rtw_mfree_stainfo(struct sta_info *psta); ++void rtw_mfree_stainfo(struct sta_info *psta) ++{ ++_func_enter_; ++ ++ if(&psta->lock != NULL) ++ _rtw_spinlock_free(&psta->lock); ++ ++ _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); ++ _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); ++ ++_func_exit_; ++} ++ ++ ++// this function is used to free the memory of lock || sema for all stainfos ++void rtw_mfree_all_stainfo(struct sta_priv *pstapriv ); ++void rtw_mfree_all_stainfo(struct sta_priv *pstapriv ) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct sta_info *psta = NULL; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ phead = get_list_head(&pstapriv->free_sta_queue); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info ,list); ++ plist = get_next(plist); ++ ++ rtw_mfree_stainfo(psta); ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++_func_exit_; ++ ++} ++ ++void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv); ++void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv) ++{ ++#ifdef CONFIG_AP_MODE ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++#endif ++ ++ rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock ++ ++ _rtw_spinlock_free(&pstapriv->free_sta_queue.lock); ++ ++ _rtw_spinlock_free(&pstapriv->sta_hash_lock); ++ _rtw_spinlock_free(&pstapriv->wakeup_q.lock); ++ _rtw_spinlock_free(&pstapriv->sleep_q.lock); ++ ++#ifdef CONFIG_AP_MODE ++ _rtw_spinlock_free(&pstapriv->asoc_list_lock); ++ _rtw_spinlock_free(&pstapriv->auth_list_lock); ++ _rtw_spinlock_free(&pacl_list->acl_node_q.lock); ++#endif ++ ++} ++ ++u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta = NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ int index; ++ ++_func_enter_; ++ if(pstapriv){ ++ ++ /* delete all reordering_ctrl_timer */ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ for(index = 0; index < NUM_STA; index++) ++ { ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ int i; ++ psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); ++ plist = get_next(plist); ++ ++ for(i=0; i < 16 ; i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ++ } ++ } ++ } ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ /*===============================*/ ++ ++ rtw_mfree_sta_priv_lock(pstapriv); ++ ++ if(pstapriv->pallocated_stainfo_buf) { ++ rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4); ++ } ++ } ++ ++_func_exit_; ++ return _SUCCESS; ++} ++ ++ ++//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) ++struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) ++{ ++ _irqL irqL, irqL2; ++ uint tmp_aid; ++ s32 index; ++ _list *phash_list; ++ struct sta_info *psta; ++ _queue *pfree_sta_queue; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ int i = 0; ++ u16 wRxSeqInitialValue = 0xffff; ++ ++_func_enter_; ++ ++ pfree_sta_queue = &pstapriv->free_sta_queue; ++ ++ //_enter_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++ if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) ++ { ++ //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ psta = NULL; ++ } ++ else ++ { ++ psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); ++ ++ rtw_list_delete(&(psta->list)); ++ ++ //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ ++ tmp_aid = psta->aid; ++ ++ _rtw_init_stainfo(psta); ++ ++ _rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN); ++ ++ index = wifi_mac_hash(hwaddr); ++ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index)); ++ ++ if(index >= NUM_STA){ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA")); ++ psta= NULL; ++ goto exit; ++ } ++ phash_list = &(pstapriv->sta_hash[index]); ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++ rtw_list_insert_tail(&psta->hash_list, phash_list); ++ ++ pstapriv->asoc_sta_count ++ ; ++ ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++// Commented by Albert 2009/08/13 ++// For the SMC router, the sequence number of first packet of WPS handshake will be 0. ++// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. ++// So, we initialize the tid_rxseq variable as the 0xffff. ++ ++ for( i = 0; i < 16; i++ ) ++ { ++ _rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 ); ++ } ++ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n", ++ pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5])); ++ ++ init_addba_retry_timer(pstapriv->padapter, psta); ++ ++#ifdef CONFIG_TDLS ++ psta->padapter = pstapriv->padapter; ++ init_TPK_timer(pstapriv->padapter, psta); ++ init_ch_switch_timer(pstapriv->padapter, psta); ++ init_base_ch_timer(pstapriv->padapter, psta); ++ init_off_ch_timer(pstapriv->padapter, psta); ++ init_handshake_timer(pstapriv->padapter, psta); ++ init_tdls_alive_timer(pstapriv->padapter, psta); ++#endif //CONFIG_TDLS ++ ++ //for A-MPDU Rx reordering buffer control ++ for(i=0; i < 16 ; i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ ++ preorder_ctrl->padapter = pstapriv->padapter; ++ ++ preorder_ctrl->enable = _FALSE; ++ ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ //preorder_ctrl->wsize_b = (NR_RECVBUFF-2); ++ preorder_ctrl->wsize_b = 64;//64; ++ ++ _rtw_init_queue(&preorder_ctrl->pending_recvframe_queue); ++ ++ rtw_init_recv_timer(preorder_ctrl); ++ } ++ ++ ++ //init for DM ++ psta->rssi_stat.UndecoratedSmoothedPWDB = 0; ++ psta->rssi_stat.UndecoratedSmoothedCCK = (-1); ++ ++ /* init for the sequence number of received management frame */ ++ psta->RxMgmtFrameSeqNum = 0xffff; ++ } ++ ++exit: ++ ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++_func_exit_; ++ ++ return psta; ++ ++ ++} ++ ++ ++// using pstapriv->sta_hash_lock to protect ++u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) ++{ ++ int i; ++ _irqL irqL0; ++ _queue *pfree_sta_queue; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_xmit_priv *pstaxmitpriv; ++ struct xmit_priv *pxmitpriv= &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct hw_xmit *phwxmit; ++ ++ ++_func_enter_; ++ ++ if (psta == NULL) ++ goto exit; ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL0); ++ psta->state &= ~_FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL0); ++ ++ pfree_sta_queue = &pstapriv->free_sta_queue; ++ ++ ++ pstaxmitpriv = &psta->sta_xmitpriv; ++ ++ //rtw_list_delete(&psta->sleep_list); ++ ++ //rtw_list_delete(&psta->wakeup_list); ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); ++ psta->sleepq_len = 0; ++ ++ //vo ++ //_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); ++ phwxmit = pxmitpriv->hwxmits; ++ phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt; ++ pstaxmitpriv->vo_q.qcnt = 0; ++ //_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); ++ ++ //vi ++ //_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); ++ phwxmit = pxmitpriv->hwxmits+1; ++ phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt; ++ pstaxmitpriv->vi_q.qcnt = 0; ++ //_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); ++ ++ //be ++ //_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ phwxmit = pxmitpriv->hwxmits+2; ++ phwxmit->accnt -= pstaxmitpriv->be_q.qcnt; ++ pstaxmitpriv->be_q.qcnt = 0; ++ //_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); ++ ++ //bk ++ //_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); ++ phwxmit = pxmitpriv->hwxmits+3; ++ phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt; ++ pstaxmitpriv->bk_q.qcnt = 0; ++ //_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ rtw_list_delete(&psta->hash_list); ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5])); ++ pstapriv->asoc_sta_count --; ++ ++ ++ // re-init sta_info; 20061114 // will be init in alloc_stainfo ++ //_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); ++ //_rtw_init_sta_recv_priv(&psta->sta_recvpriv); ++ ++ _cancel_timer_ex(&psta->addba_retry_timer); ++ ++#ifdef CONFIG_TDLS ++ _cancel_timer_ex(&psta->TPK_timer); ++ _cancel_timer_ex(&psta->option_timer); ++ _cancel_timer_ex(&psta->base_ch_timer); ++ _cancel_timer_ex(&psta->off_ch_timer); ++ _cancel_timer_ex(&psta->alive_timer1); ++ _cancel_timer_ex(&psta->alive_timer2); ++#endif //CONFIG_TDLS ++ ++ //for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer ++ for(i=0; i < 16 ; i++) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ union recv_frame *prframe; ++ _queue *ppending_recvframe_queue; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ ++ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ++ ++ ++ ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irqL); ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++ while(!rtw_is_list_empty(phead)) ++ { ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ plist = get_next(plist); ++ ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ } ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irqL); ++ ++ } ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++/* ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0); ++ rtw_list_delete(&psta->asoc_list); ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0); ++*/ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL0); ++ if (!rtw_is_list_empty(&psta->auth_list)) { ++ rtw_list_delete(&psta->auth_list); ++ pstapriv->auth_list_cnt--; ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL0); ++ ++ psta->expire_to = 0; ++ ++ psta->sleepq_ac_len = 0; ++ psta->qos_info = 0; ++ ++ psta->max_sp_len = 0; ++ psta->uapsd_bk = 0; ++ psta->uapsd_be = 0; ++ psta->uapsd_vi = 0; ++ psta->uapsd_vo = 0; ++ ++ psta->has_legacy_ac = 0; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++ pstapriv->sta_dz_bitmap &=~BIT(psta->aid); ++ pstapriv->tim_bitmap &=~BIT(psta->aid); ++ ++ //rtw_indicate_sta_disassoc_event(padapter, psta); ++ ++ if ((psta->aid >0)&&(pstapriv->sta_aid[psta->aid - 1] == psta)) ++ { ++ pstapriv->sta_aid[psta->aid - 1] = NULL; ++ psta->aid = 0; ++ } ++ ++#endif // CONFIG_NATIVEAP_MLME ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++#endif // CONFIG_AP_MODE ++ ++ _rtw_spinlock_free(&psta->lock); ++ ++ //_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); ++ rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue)); ++ //_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++// free all stainfo which in sta_hash[all] ++void rtw_free_all_stainfo(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ s32 index; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter); ++ ++_func_enter_; ++ ++ if(pstapriv->asoc_sta_count==1) ++ goto exit; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(index=0; index< NUM_STA; index++) ++ { ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); ++ ++ plist = get_next(plist); ++ ++ if(pbcmc_stainfo!=psta) ++ rtw_free_stainfo(padapter , psta); ++ ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++/* any station allocated can be searched by hash list */ ++struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) ++{ ++ ++ _irqL irqL; ++ ++ _list *plist, *phead; ++ ++ struct sta_info *psta = NULL; ++ ++ u32 index; ++ ++ const u8 *addr; ++ ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++_func_enter_; ++ ++ if(hwaddr==NULL) ++ return NULL; ++ ++ if(IS_MCAST(hwaddr)) ++ { ++ addr = bc_addr; ++ } ++ else ++ { ++ addr = hwaddr; ++ } ++ ++ index = wifi_mac_hash(addr); ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE) ++ { // if found the matched address ++ break; ++ } ++ psta=NULL; ++ plist = get_next(plist); ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++_func_exit_; ++ return psta; ++ ++} ++ ++u32 rtw_init_bcmc_stainfo(_adapter* padapter) ++{ ++ ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ u32 res=_SUCCESS; ++ NDIS_802_11_MAC_ADDRESS bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ //_queue *pstapending = &padapter->xmitpriv.bm_pending; ++ ++_func_enter_; ++ ++ psta = rtw_alloc_stainfo(pstapriv, bcast_addr); ++ ++ if(psta==NULL){ ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail")); ++ goto exit; ++ } ++ ++ // default broadcast & multicast use macid 1 ++ psta->mac_id = 1; ++ ++ ptxservq= &(psta->sta_xmitpriv.be_q); ++ ++/* ++ _enter_critical(&pstapending->lock, &irqL0); ++ ++ if (rtw_is_list_empty(&ptxservq->tx_pending)) ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending)); ++ ++ _exit_critical(&pstapending->lock, &irqL0); ++*/ ++ ++exit: ++_func_exit_; ++ return _SUCCESS; ++ ++} ++ ++ ++struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter) ++{ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++_func_enter_; ++ psta = rtw_get_stainfo(pstapriv, bc_addr); ++_func_exit_; ++ return psta; ++ ++} ++ ++u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr) ++{ ++ u8 res = _TRUE; ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ _list *plist, *phead; ++ struct rtw_wlan_acl_node *paclnode; ++ u8 match = _FALSE; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, mac_addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ match = _TRUE; ++ break; ++ } ++ } ++ } ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ ++ if(pacl_list->mode == 1)//accept unless in deny list ++ { ++ res = (match == _TRUE) ? _FALSE:_TRUE; ++ } ++ else if(pacl_list->mode == 2)//deny unless in accept list ++ { ++ res = (match == _TRUE) ? _TRUE:_FALSE; ++ } ++ else ++ { ++ res = _TRUE; ++ } ++ ++#endif ++ ++ return res; ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_tdls.c +@@ -0,0 +1,2941 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_TDLS_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_TDLS ++extern unsigned char MCS_rate_2R[16]; ++extern unsigned char MCS_rate_1R[16]; ++extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); ++extern s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++void rtw_reset_tdls_info(_adapter* padapter) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ ptdlsinfo->ap_prohibited = _FALSE; ++ ptdlsinfo->setup_state = TDLS_STATE_NONE; ++ ptdlsinfo->sta_cnt = 0; ++ ptdlsinfo->sta_maximum = _FALSE; ++ ptdlsinfo->macid_index= 6; ++ ptdlsinfo->clear_cam= 0; ++ ptdlsinfo->ch_sensing = 0; ++ ptdlsinfo->cur_channel = 0; ++ ptdlsinfo->candidate_ch = 1; //when inplement channel switching, default candidate channel is 1 ++ ptdlsinfo->watchdog_count = 0; ++ ptdlsinfo->dev_discovered = 0; ++ ++#ifdef CONFIG_WFD ++ ptdlsinfo->wfd_info = &padapter->wfd_info; ++#endif //CONFIG_WFD ++} ++ ++int rtw_init_tdls_info(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ ptdlsinfo->enable = 1; ++ rtw_reset_tdls_info(padapter); ++ ++ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); ++ ++ return res; ++ ++} ++ ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) ++{ ++ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); ++ ++ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); ++ ++} ++ ++void issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, struct sta_info *ptdls_sta, unsigned int power_mode) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++// SetToDs(fctrl); ++ if (power_mode) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr1, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(pwlanhdr, pattrib->seqnum); ++ ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ ++ s32 res=_SUCCESS; ++ sint bmcast; ++ ++ bmcast = IS_MCAST(pattrib->ra); ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta == NULL) { ++ res =_FAIL; ++ goto exit; ++ } ++ ++ pattrib->mac_id = psta->mac_id; ++ ++ pattrib->psta = psta; ++ ++ pattrib->ack_policy = 0; ++ // get ether_hdr_len ++ pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag ++ ++ if (pqospriv->qos_option && psta->qos_option) { ++ pattrib->priority = 1; //tdls management frame should be AC_BK ++ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; ++ pattrib->subtype = WIFI_QOS_DATA_TYPE; ++ } else { ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA_TYPE; ++ pattrib->priority = 0; ++ } ++ ++ if (psta->ieee8021x_blocked == _TRUE) ++ { ++ pattrib->encrypt = 0; ++ } ++ else ++ { ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); ++ ++ switch(psecuritypriv->dot11AuthAlgrthm) ++ { ++ case dot11AuthAlgrthm_Open: ++ case dot11AuthAlgrthm_Shared: ++ case dot11AuthAlgrthm_Auto: ++ pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case dot11AuthAlgrthm_8021X: ++ pattrib->key_idx = 0; ++ break; ++ default: ++ pattrib->key_idx = 0; ++ break; ++ } ++ } ++ ++ switch (pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ pattrib->iv_len = 4; ++ pattrib->icv_len = 4; ++ break; ++ case _TKIP_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 4; ++ if(padapter->securitypriv.busetkipkey==_FAIL) ++ { ++ res =_FAIL; ++ goto exit; ++ } ++ break; ++ case _AES_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 8; ++ break; ++ default: ++ pattrib->iv_len = 0; ++ pattrib->icv_len = 0; ++ break; ++ } ++ ++ if (pattrib->encrypt && ++ ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) ++ { ++ pattrib->bswenc = _TRUE; ++ } else { ++ pattrib->bswenc = _FALSE; ++ } ++ ++ //qos_en, ht_en, init rate, ,bw, ch_offset, sgi ++ pattrib->qos_en = psta->qos_option; ++ pattrib->ht_en = psta->htpriv.ht_option; ++ pattrib->raid = psta->raid; ++ pattrib->bwmode = psta->htpriv.bwmode; ++ pattrib->ch_offset = psta->htpriv.ch_offset; ++ pattrib->sgi= psta->htpriv.sgi; ++ pattrib->ampdu_en = _FALSE; ++ ++ //if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ //{ ++ // if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ // pattrib->ampdu_en = _TRUE; ++ //} ++ ++exit: ++ ++ return res; ++} ++ ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ _irqL irqL; ++ ++ //free peer sta_info ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if(ptdlsinfo->sta_cnt != 0) ++ ptdlsinfo->sta_cnt--; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt < (NUM_STA - 2) ) // -2: AP + BC/MC sta ++ { ++ ptdlsinfo->sta_maximum = _FALSE; ++ _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); ++ } ++ //ready to clear cam ++ if(ptdls_sta->mac_id!=0){ ++ ptdlsinfo->clear_cam=ptdls_sta->mac_id; ++ rtw_setstakey_cmd(padapter, (u8 *)ptdls_sta, _TRUE); ++ } ++ ++ if(ptdlsinfo->sta_cnt==0){ ++ rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); ++ ptdlsinfo->setup_state=TDLS_STATE_NONE; ++ } ++ else ++ DBG_871X("Remain tdls sta:%02x\n", ptdlsinfo->sta_cnt); ++ ++ rtw_free_stainfo(padapter, ptdls_sta); ++ ++} ++ ++// cam entry will be the same as mac_id ++void rtw_tdls_set_mac_id(struct tdls_info *ptdlsinfo, struct sta_info *ptdls_sta) ++{ ++ if(ptdls_sta->mac_id==0) ++ { ++ ptdls_sta->mac_id = ptdlsinfo->macid_index; ++ if( (++ptdlsinfo->macid_index) > (NUM_STA -2) ) ++ ptdlsinfo->macid_index= TDLS_INI_MACID_ENTRY; ++ } ++} ++ ++//TDLS encryption(if needed) will always be CCMP ++void rtw_tdls_set_key(_adapter *adapter, struct rx_pkt_attrib *prx_pkt_attrib, struct sta_info *ptdls_sta) ++{ ++ if(prx_pkt_attrib->encrypt) ++ { ++ ptdls_sta->dot118021XPrivacy=_AES_; ++ rtw_setstakey_cmd(adapter, (u8*)ptdls_sta, _TRUE); ++ } ++} ++ ++void rtw_tdls_process_ht_cap(_adapter *adapter, struct sta_info *ptdls_sta, u8 *data, u8 Length) ++{ ++ /* save HT capabilities in the sta object */ ++ _rtw_memset(&ptdls_sta->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ if (data && Length >= sizeof(struct rtw_ieee80211_ht_cap) ) ++ { ++ ptdls_sta->flags |= WLAN_STA_HT; ++ ++ ptdls_sta->flags |= WLAN_STA_WME; ++ ++ _rtw_memcpy(&ptdls_sta->htpriv.ht_cap, data, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ } else ++ ptdls_sta->flags &= ~WLAN_STA_HT; ++ ++ if(ptdls_sta->flags & WLAN_STA_HT) ++ { ++ if(adapter->registrypriv.ht_enable == _TRUE) ++ { ++ ptdls_sta->htpriv.ht_option = _TRUE; ++ } ++ else ++ { ++ ptdls_sta->htpriv.ht_option = _FALSE; ++ ptdls_sta->stat_code = _STATS_FAILURE_; ++ } ++ } ++ ++ //HT related cap ++ if(ptdls_sta->htpriv.ht_option) ++ { ++ //check if sta supports rx ampdu ++ if(adapter->registrypriv.ampdu_enable==1) ++ ptdls_sta->htpriv.ampdu_enable = _TRUE; ++ ++ //check if sta support s Short GI ++ if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ++ { ++ ptdls_sta->htpriv.sgi = _TRUE; ++ } ++ ++ // bwmode would still followed AP's setting ++ if(ptdls_sta->htpriv.ht_cap.cap_info & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ ptdls_sta->htpriv.bwmode = adapter->mlmeextpriv.cur_bwmode; ++ ptdls_sta->htpriv.ch_offset = adapter->mlmeextpriv.cur_ch_offset; ++ } ++ } ++} ++ ++u8 *rtw_tdls_set_ht_cap(_adapter *padapter, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ struct rtw_ieee80211_ht_cap ht_capie; ++ u8 rf_type; ++ ++ //HT capabilities ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40; ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ if(max_recvbuf_sz-rx_packet_offset>(8191-256)) ++ ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ switch(rf_type) ++ { ++ case RF_1T1R: ++ ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); ++ break; ++ } ++ ++ return(rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen))); ++} ++ ++u8 *rtw_tdls_set_sup_ch(struct mlme_ext_priv *pmlmeext, u8 *pframe, struct pkt_attrib *pattrib) ++{ ++ u8 sup_ch[ 30 * 2 ] = { 0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++ do{ ++ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum <= 14 ) ++ { ++ sup_ch[0] = 1; //First channel number ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; //Number of channel ++ } ++ else ++ { ++ sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; ++ sup_ch[idx_5g++] = 1; ++ } ++ ++ sup_ch_idx++; ++ } ++ while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); ++ return(rtw_set_ie(pframe, _SUPPORTED_CH_IE_, idx_5g, sup_ch, &(pattrib->pktlen))); ++} ++ ++#ifdef CONFIG_WFD ++void rtw_tdls_process_wfd_ie(struct tdls_info *ptdlsinfo, u8 *ptr, u8 length) ++{ ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++ u32 wfd_offset = 0; ++ // Try to get the TCP port information when receiving the negotiation response. ++ // ++ ++ wfd_offset = 0; ++ wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); ++ while( wfd_offset ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ int i; ++ ++ DBG_871X( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ ptdlsinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_871X( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, ptdlsinfo->wfd_info->peer_rtsp_ctrlport ); ++ } ++ ++ _rtw_memset( attr_content, 0x00, 10); ++ attr_contentlen = 0; ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_LOCAL_IP_ADDR, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ _rtw_memcpy(ptdlsinfo->wfd_info->peer_ip_address, ( attr_content + 1 ), 4); ++ DBG_871X( "[%s] Peer IP = %02u.%02u.%02u.%02u \n", __FUNCTION__, ++ ptdlsinfo->wfd_info->peer_ip_address[0], ptdlsinfo->wfd_info->peer_ip_address[1], ++ ptdlsinfo->wfd_info->peer_ip_address[2], ptdlsinfo->wfd_info->peer_ip_address[3] ++ ); ++ } ++ wfd_offset = rtw_get_wfd_ie( ptr + wfd_offset, length - wfd_offset, wfd_ie, &wfd_ielen ); ++ } ++} ++ ++void issue_tunneled_probe_req(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TUNNELED_PROBE_REQ) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct rx_pkt_attrib *rx_pkt_pattrib = &precv_frame->u.hdr.attrib; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TUNNELED_PROBE_RSP) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++#endif //CONFIG_WFD ++ ++void issue_tdls_setup_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ static u8 dialogtoken = 0; ++ u32 timeout_interval= TPK_RESEND_COUNT * 1000; //retry timer should set at least 301 sec, using TPK_count counting 301 times. ++ ++ if(ptdlsinfo->ap_prohibited == _TRUE) ++ goto exit; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ //init peer sta_info ++ ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta==NULL) ++ { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta) ++ { ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt == (NUM_STA - 2) ) // -2: AP + BC/MC sta ++ { ++ ptdlsinfo->sta_maximum = _TRUE; ++ } ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ } ++ ++ if(ptdls_sta){ ++ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; ++ //for tdls; ptdls_sta->aid is used to fill dialogtoken ++ ptdls_sta->dialog = dialogtoken; ++ dialogtoken = (dialogtoken+1)%256; ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME ); ++ } ++ ++ pattrib->qsel=pattrib->priority; ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_REQUEST) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_teardown(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta==NULL){ ++ DBG_871X("issue tdls teardown unsuccessful\n"); ++ return; ++ }else{ ++ ptdls_sta->tdls_sta_state=TDLS_STATE_NONE; ++ } ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_TEARDOWN) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ ++ if( ptdls_sta->timer_flag == 1 ) ++ { ++ _enter_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 2; ++ _exit_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); ++ } ++ else ++ rtw_tdls_cmd(padapter, mac_addr, TDLS_FREE_STA ); ++ ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_dis_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ if(mac_addr == NULL) ++ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); ++ else ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_DISCOVERY_REQUEST) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ DBG_871X("issue tdls dis req\n"); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_setup_rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct rx_pkt_attrib *rx_pkt_pattrib = &precv_frame->u.hdr.attrib; ++ _irqL irqL; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_RESPONSE) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++ ++} ++ ++void issue_tdls_setup_cfm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ ++ struct rx_pkt_attrib *rx_pkt_pattrib = & precv_frame->u.hdr.attrib; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_CONFIRM) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++ ++} ++ ++//TDLS Discovery Response frame is a management action frame ++void issue_tdls_dis_rsp(_adapter *padapter, union recv_frame *precv_frame, u8 dialog) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ struct rx_pkt_attrib *rx_pkt_pattrib = &precv_frame->u.hdr.attrib; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ // unicast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr3, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ rtw_build_tdls_dis_rsp_ies(padapter, pmgntframe, pframe, dialog); ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++void issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ static u8 dialogtoken=0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ //for tdls; pattrib->nr_frags is used to fill dialogtoken ++ ptdls_sta->dialog = dialogtoken; ++ dialogtoken = (dialogtoken+1)%256; ++ //PTI frame's priority should be AC_VO ++ pattrib->priority = 7; ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_PEER_TRAFFIC_INDICATION) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ pattrib->qsel=pattrib->priority; ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_REQUEST) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ _irqL irqL; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ pattrib->qsel=pattrib->priority; ++/* ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ return _FALSE; ++ } ++*/ ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_RESPONSE) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta = NULL, *psta = rtw_get_stainfo(&(adapter->stapriv), get_bssid(&(adapter->mlmepriv))); ++ struct recv_priv *precvpriv = &(adapter->recvpriv); ++ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; ++ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); ++ struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); ++ u8 empty_addr[ETH_ALEN] = { 0x00 }; ++ int UndecoratedSmoothedPWDB; ++ ++ ++ //WFDTDLS: for sigma test, not to setup direct link automatically ++ ptdlsinfo->dev_discovered = 1; ++ ++#ifdef CONFIG_TDLS_AUTOSETUP ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(&(adapter->stapriv), psa); ++ ++ if(ptdls_sta != NULL) ++ { ++ ptdls_sta->tdls_sta_state |= TDLS_ALIVE_STATE; ++ ++ //Record the tdls sta with lowest signal strength ++ if( (ptdlsinfo->sta_maximum == _TRUE) && (ptdls_sta->alive_count >= 1) ) ++ { ++ if( _rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN) ) ++ { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; ++ } ++ else ++ { ++ if( ptdlsinfo->ss_record.RxPWDBAll < pattrib->RxPWDBAll ) ++ { ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.RxPWDBAll = pattrib->RxPWDBAll; ++ } ++ } ++ } ++ ++ } ++ else ++ { ++ if( ptdlsinfo->sta_maximum == _TRUE) ++ { ++ if( _rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN ) ) ++ { ++ //All traffics are busy, do not set up another direct link. ++ return _FAIL; ++ } ++ else ++ { ++ if( pattrib->RxPWDBAll > ptdlsinfo->ss_record.RxPWDBAll ) ++ { ++ issue_tdls_teardown(adapter, ptdlsinfo->ss_record.macaddr); ++ } ++ else ++ { ++ return _FAIL; ++ } ++ } ++ } ++ ++ rtw_hal_get_def_var(adapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ ++ if( pattrib->RxPWDBAll + TDLS_SIGNAL_THRESH >= UndecoratedSmoothedPWDB); ++ { ++ DBG_871X("pattrib->RxPWDBAll=%d, pdmpriv->UndecoratedSmoothedPWDB=%d\n", pattrib->RxPWDBAll, UndecoratedSmoothedPWDB); ++ issue_tdls_setup_req(adapter, psa); ++ } ++ } ++#endif //CONFIG_TDLS_AUTOSETUP ++ ++ return _SUCCESS; ++} ++ ++sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ u8 *psa, *pmyid; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *prsnie, *ppairwise_cipher; ++ u8 i, k, pairwise_count; ++ u8 ccmp_have=0, rsnie_have=0; ++ u16 j; ++ u8 SNonce[32]; ++ u32 *timeout_interval; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 5; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ pmyid=myid(&(adapter->eeprompriv)); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ if(ptdlsinfo->ap_prohibited == _TRUE) ++ { ++ goto exit; ++ } ++ ++ if(ptdls_sta==NULL){ ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); ++ }else{ ++ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ ++ //If the direct link is already set up ++ //Process as re-setup after tear down ++ DBG_871X("re-setup a direct link\n"); ++ } ++ //already receiving TDLS setup request ++ else if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ ++ DBG_871X("receive duplicated TDLS setup request frame in handshaking\n"); ++ goto exit; ++ } ++ //When receiving and sending setup_req to the same link at the same time, STA with higher MAC_addr would be initiator ++ //following is to check out MAC_addr ++ else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ ++ DBG_871X("receive setup_req after sending setup_req\n"); ++ for (i=0;i<6;i++){ ++ if(*(pmyid+i)==*(psa+i)){ ++ } ++ else if(*(pmyid+i)>*(psa+i)){ ++ goto exit; ++ }else if(*(pmyid+i)<*(psa+i)){ ++ ptdls_sta->tdls_sta_state=TDLS_INITIATOR_STATE; ++ break; ++ } ++ } ++ } ++ } ++ ++ if(ptdls_sta) ++ { ++ ptdls_sta->dialog = *(ptr+2); //copy dialog token ++ ptdls_sta->stat_code = 0; ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if(supportRateNum<=sizeof(supportRate)) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ rsnie_have=1; ++ if(prx_pkt_attrib->encrypt){ ++ prsnie=(u8*)pIE; ++ //check whether initiator STA has CCMP pairwise_cipher. ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 1); ++ for(k=0;kstat_code=72; ++ } ++ } ++ break; ++ case _EXT_CAP_IE_: ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ break; ++ case _FTIE_: ++ if(prx_pkt_attrib->encrypt) ++ _rtw_memcpy(SNonce, (ptr+j+52), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ if(prx_pkt_attrib->encrypt) ++ timeout_interval = (u32 *)(ptr+j+3); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(adapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ if(_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) ++ { ++ //not in the same BSS ++ ptdls_sta->stat_code=7; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //update station supportRate ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ ++ //check status code ++ //if responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject ++ if(ptdls_sta->stat_code == 0 ) ++ { ++ if(rsnie_have && (prx_pkt_attrib->encrypt==0)){ ++ //security disabled ++ ptdls_sta->stat_code = 5; ++ }else if(rsnie_have==0 && (prx_pkt_attrib->encrypt)){ ++ //request haven't RSNIE ++ ptdls_sta->stat_code = 38; ++ } ++ ++#ifdef CONFIG_WFD ++ //WFD test plan version 0.18.2 test item 5.1.5 ++ //SoUT does not use TDLS if AP uses weak security ++ if ( adapter->wdinfo.wfd_tdls_enable ) ++ { ++ if(rsnie_have && (prx_pkt_attrib->encrypt != _AES_)) ++ { ++ ptdls_sta->stat_code = 5; ++ } ++ } ++#endif //CONFIG_WFD ++ } ++ ++ ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; ++ if(prx_pkt_attrib->encrypt){ ++ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); ++ _rtw_memcpy(&(ptdls_sta->TDLS_PeerKey_Lifetime), timeout_interval, 4); ++ } ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if(!(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)) ++ ptdlsinfo->sta_cnt++; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt == (NUM_STA - 2) ) // -2: AP + BC/MC sta ++ { ++ ptdlsinfo->sta_maximum = _TRUE; ++ } ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); ++#endif // CONFIG_WFD ++ ++ } ++ else ++ { ++ goto exit; ++ } ++ ++ issue_tdls_setup_rsp(adapter, precv_frame); ++ ++ if(ptdls_sta->stat_code==0) ++ { ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ } ++ else //status code!=0 ; setup unsuccess ++ { ++ free_tdls_sta(adapter, ptdls_sta); ++ } ++ ++exit: ++ ++ return _FAIL; ++} ++ ++sint On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 stat_code; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =7; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher; ++ u16 pairwise_count, j, k; ++ u8 verify_ccmp=0; ++ unsigned char supportRate[16]; ++ int supportRateNum = 0; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ if ( NULL == ptdls_sta ) ++ { ++ return _FAIL; ++ } ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0) ++ { ++ DBG_871X( "[%s] status_code = %d, free_tdls_sta\n", __FUNCTION__, stat_code ); ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ stat_code = 0; ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _SUPPORTEDRATES_IE_: ++ _rtw_memcpy(supportRate, pIE->data, pIE->Length); ++ supportRateNum = pIE->Length; ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ if(supportRateNum<=sizeof(supportRate)) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, pIE->data, pIE->Length); ++ supportRateNum += pIE->Length; ++ } ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ //check whether responder STA has CCMP pairwise_cipher. ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); ++ for(k=0;kANonce, (ptr+j+20), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++ case _HT_CAPABILITY_IE_: ++ rtw_tdls_process_ht_cap(adapter, ptdls_sta, pIE->data, pIE->Length); ++ break; ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //update station supportRate ++ ptdls_sta->bssratelen = supportRateNum; ++ _rtw_memcpy(ptdls_sta->bssrateset, supportRate, supportRateNum); ++ ++#ifdef CONFIG_WFD ++ rtw_tdls_process_wfd_ie(ptdlsinfo, ptr + FIXED_IE, parsing_length - FIXED_IE); ++#endif // CONFIG_WFD ++ ++ if(stat_code != 0) ++ { ++ ptdls_sta->stat_code = stat_code; ++ } ++ else ++ { ++ if(prx_pkt_attrib->encrypt) ++ { ++ if(verify_ccmp==1) ++ { ++ wpa_tdls_generate_tpk(adapter, ptdls_sta); ++ ptdls_sta->stat_code=0; ++ if(tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie)==0) //0: Invalid, 1: valid ++ { ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ } ++ else ++ { ++ ptdls_sta->stat_code=72; //invalide contents of RSNIE ++ } ++ ++ }else{ ++ ptdls_sta->stat_code=0; ++ } ++ } ++ ++ DBG_871X("issue_tdls_setup_cfm\n"); ++ issue_tdls_setup_cfm(adapter, precv_frame); ++ ++ if(ptdls_sta->stat_code==0) ++ { ++ ptdlsinfo->setup_state = TDLS_LINKED_STATE; ++ ++ if( ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE ) ++ { ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++#ifdef CONFIG_TDLS_AUTOCHECKALIVE ++ _set_timer( &ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++#endif //CONFIG_TDLS_AUTOSETUP ++ } ++ ++ rtw_tdls_set_mac_id(ptdlsinfo, ptdls_sta); ++ rtw_tdls_set_key(adapter, prx_pkt_attrib, ptdls_sta); ++ ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_WRCR); ++ ++ } ++ else //status code!=0 ; setup unsuccessful ++ { ++ free_tdls_sta(adapter, ptdls_sta); ++ } ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 stat_code; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =5; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher; ++ u16 j, pairwise_count; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0){ ++ DBG_871X( "[%s] stat_code = %d\n, free_tdls_sta", __FUNCTION__, stat_code ); ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ if(prx_pkt_attrib->encrypt){ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ break; ++ case _FTIE_: ++ pftie=(u8*)pIE; ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ break; ++ case _HT_EXTRA_INFO_IE_: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //verify mic in FTIE MIC field ++ if(tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){ //0: Invalid, 1: Valid ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ } ++ ++ ptdlsinfo->setup_state = TDLS_LINKED_STATE; ++ if( ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE ) ++ { ++ ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++#ifdef CONFIG_TDLS_AUTOCHECKALIVE ++ _set_timer( &ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++#endif //CONFIG_TDLS_AUTOCHECKALIVE ++ } ++ ++ rtw_tdls_set_mac_id(ptdlsinfo, ptdls_sta); ++ rtw_tdls_set_key(adapter, prx_pkt_attrib, ptdls_sta); ++ ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_WRCR); ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct sta_info *psta_ap; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 3, *dst, *pdialog = NULL; ++ u16 j; ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; ++ pdialog=ptr+2; ++ ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _LINK_ID_IE_: ++ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); ++ if(psta_ap == NULL) ++ { ++ goto exit; ++ } ++ dst = pIE->data + 12; ++ if( (MacAddr_isBcst(dst) == _FALSE) && (_rtw_memcmp(myid(&(adapter->eeprompriv)), dst, 6) == _FALSE) ) ++ { ++ goto exit; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //check frame contents ++ ++ issue_tdls_dis_rsp(adapter, precv_frame, *(pdialog) ); ++ ++exit: ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ u8 *psa; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ ++ psa = get_sa(ptr); ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ if(ptdls_sta!=NULL){ ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ free_tdls_sta(adapter, ptdls_sta); ++ } ++ ++ return _FAIL; ++ ++} ++ ++u8 TDLS_check_ch_state(uint state){ ++ if( (state & TDLS_CH_SWITCH_ON_STATE) && ++ (state & TDLS_AT_OFF_CH_STATE) && ++ (state & TDLS_PEER_AT_OFF_STATE) ){ ++ ++ if(state & TDLS_PEER_SLEEP_STATE) ++ return 2; //U-APSD + ch. switch ++ else ++ return 1; //ch. switch ++ }else ++ return 0; ++} ++ ++//we process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here ++sint On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ //get peer sta infomation ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ u8 wmmps_ac=0, state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); ++ int i; ++ ++ ptdls_sta->sta_stats.rx_data_pkts++; ++ ++ //receive peer traffic response frame, sleeping STA wakes up ++ //ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_SLEEP_STATE); ++ process_wmmps_data( adapter, precv_frame); ++ ++ // if noticed peer STA wakes up by receiving peer traffic response ++ // and we want to do channel swtiching, then we will transmit channel switch request first ++ if(ptdls_sta->tdls_sta_state & TDLS_APSD_CHSW_STATE){ ++ issue_tdls_ch_switch_req(adapter, pattrib->src); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_APSD_CHSW_STATE); ++ return _FAIL; ++ } ++ ++ //check 4-AC queue bit ++ if(ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) ++ wmmps_ac=1; ++ ++ //if it's a direct link and have buffered frame ++ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ ++ if(wmmps_ac && state) ++ { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ //transmit buffered frames ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptdls_sta->sleepq_len--; ++ if(ptdls_sta->sleepq_len>0){ ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ }else{ ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ //pxmitframe->attrib.triggered = 1; //maybe doesn't need in TDLS ++ if(rtw_hal_xmit(adapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(adapter, pxmitframe); ++ } ++ ++ } ++ ++ if(ptdls_sta->sleepq_len==0) ++ { ++ DBG_871X("no buffered packets for tdls to xmit\n"); ++ //on U-APSD + CH. switch state, when there is no buffered date to xmit, ++ // we should go back to base channel ++ if(state==2){ ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ }else if(ptdls_sta->tdls_sta_state&TDLS_SW_OFF_STATE){ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_SW_OFF_STATE); ++ ptdlsinfo->candidate_ch= pmlmeext->cur_channel; ++ issue_tdls_ch_switch_req(adapter, pattrib->src); ++ DBG_871X("issue tdls ch switch req back to base channel\n"); ++ } ++ ++ } ++ else ++ { ++ DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); ++ ptdls_sta->sleepq_len=0; ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++ ++ return _FAIL; ++} ++ ++sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =3; ++ u16 j; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ ptdls_sta->off_ch = *(ptr+2); ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _COUNTRY_IE_: ++ break; ++ case _CH_SWTICH_ANNOUNCE_: ++ break; ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, pIE->data, 2); ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, pIE->data+2, 2); ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //todo: check status ++ ptdls_sta->stat_code=0; ++ ptdls_sta->tdls_sta_state |= TDLS_CH_SWITCH_ON_STATE; ++ ++ issue_nulldata(adapter, NULL, 1, 0, 0); ++ ++ issue_tdls_ch_switch_rsp(adapter, psa); ++ ++ DBG_871X("issue tdls channel switch response\n"); ++ ++ if((ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE) && ptdls_sta->off_ch==pmlmeext->cur_channel){ ++ DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); ++ ptdls_sta->option=7; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_BASE_CH); ++ }else{ ++ ptdls_sta->option=6; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ } ++ return _FAIL; ++} ++ ++sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =4; ++ u16 stat_code, j, switch_time, switch_timeout; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ //if channel switch is running and receiving Unsolicited TDLS Channel Switch Response, ++ //it will go back to base channel and terminate this channel switch procedure ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE ){ ++ if(pmlmeext->cur_channel==ptdls_sta->off_ch){ ++ DBG_871X("back to base channel %x\n", pmlmeext->cur_channel); ++ ptdls_sta->option=7; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ }else{ ++ DBG_871X("receive unsolicited channel switch response \n"); ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ return _FAIL; ++ } ++ ++ //avoiding duplicated or unconditional ch. switch. rsp ++ if((ptdls_sta->tdls_sta_state & TDLS_CH_SW_INITIATOR_STATE) != TDLS_CH_SW_INITIATOR_STATE) ++ return _FAIL; ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -ETH_TYPE_LEN ++ -PAYLOAD_TYPE_LEN ++ -FIXED_IE; ++ ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0){ ++ return _FAIL; ++ } ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&switch_time, pIE->data, 2); ++ if(switch_time > ptdls_sta->ch_switch_time) ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); ++ ++ _rtw_memcpy(&switch_timeout, pIE->data+2, 2); ++ if(switch_timeout > ptdls_sta->ch_switch_timeout) ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); ++ ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SW_INITIATOR_STATE); ++ ptdls_sta->tdls_sta_state |=TDLS_CH_SWITCH_ON_STATE; ++ ++ //goto set_channel_workitem_callback() ++ ptdls_sta->option=6; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ ++ return _FAIL; ++} ++ ++#ifdef CONFIG_WFD ++void wfd_ie_tdls(_adapter * padapter, u8 *pframe, u32 *pktlen ) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info *pwfd_info = padapter->tdlsinfo.wfd_info; ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 wfdielen = 0; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // available for WFD session + Preferred TDLS + WSD ( WFD Service Discovery ) ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->wfd_device_type | WFD_DEVINFO_SESSION_AVAIL ++ | WFD_DEVINFO_PC_TDLS | WFD_DEVINFO_WSD); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate( pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ // Local IP Address ATTR ++ wfdie[ wfdielen++ ] = WFD_ATTR_LOCAL_IP_ADDR; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0005); ++ wfdielen += 2; ++ ++ // Version: ++ // 0x01: Version1;IPv4 ++ wfdie[ wfdielen++ ] = 0x01; ++ ++ // IPv4 Address ++ _rtw_memcpy( wfdie + wfdielen, pwfd_info->ip_address, 4 ); ++ wfdielen += 4; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, pktlen); ++ ++} ++#endif //CONFIG_WFD ++ ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_TDLS; ++ u8 action = TDLS_SETUP_REQUEST; ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; //Use NDIS_802_11_LENGTH_RATES_EX in order to call func.rtw_set_supported_rate ++ int bssrate_len = 0, i = 0 ; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ u8 *p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 iedata=0; ++ u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ u32 time; ++ ++ //SNonce ++ if(pattrib->encrypt){ ++ for(i=0;i<8;i++){ ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); ++ } ++ } ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //country(optional) ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); ++ ++ // SRC IE ++ pframe = rtw_set_ie( pframe, _SRC_IE_, 16, TDLS_SRC, &(pattrib->pktlen)); ++ ++ //RSNIE ++ if(pattrib->encrypt) ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ ++ //extended capabilities ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ //QoS capability(WMM_IE) ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, TDLS_WMMIE, &(pattrib->pktlen)); ++ ++ ++ if(pattrib->encrypt){ ++ //FTIE ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe, pattrib); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++#ifdef CONFIG_WFD ++ wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); ++#endif //CONFIG_WFD ++ ++} ++ ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_SETUP_RESPONSE; ++ unsigned char bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ unsigned char *p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 iedata=0; ++ u8 timeout_itvl[5]; //setup response timeout interval will copy from request ++ u8 ANonce[32]; //maybe it can put in ontdls_req ++ u8 k; //for random ANonce ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic; ++ u32 time; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ ++ if(ptdls_sta == NULL ) ++ { ++ DBG_871X("[%s] %d\n", __FUNCTION__, __LINE__); ++ return; ++ } ++ ++ if(pattrib->encrypt){ ++ for(k=0;k<8;k++){ ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); ++ } ++ } ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ if(ptdls_sta->stat_code!=0) //invalid setup request ++ { ++ DBG_871X("ptdls_sta->stat_code:%04x \n", ptdls_sta->stat_code); ++ return; ++ } ++ ++ //dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt ) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //country(optional) ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); ++ ++ // SRC IE ++ pframe = rtw_set_ie(pframe, _SRC_IE_ , 16, TDLS_SRC, &(pattrib->pktlen)); ++ ++ //RSNIE ++ if(pattrib->encrypt){ ++ prsnie = pframe; ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ } ++ ++ //extended capabilities ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ //QoS capability(WMM_IE) ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, TDLS_WMMIE, &(pattrib->pktlen)); ++ ++ if(pattrib->encrypt){ ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ ++ //FTIE ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ ptimeout_ie = pframe; ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe, pattrib); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ plinkid_ie = pframe; ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //fill FTIE mic ++ if(pattrib->encrypt) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++#ifdef CONFIG_WFD ++ wfd_ie_tdls( padapter, pframe, &(pattrib->pktlen) ); ++#endif //CONFIG_WFD ++ ++} ++ ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_SETUP_CONFIRM; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ unsigned char *p; ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status code, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ if(ptdls_sta->stat_code!=0) //invalid setup request ++ return; ++ ++ //RSNIE ++ if(pattrib->encrypt){ ++ prsnie = pframe; ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ } ++ ++ //EDCA param set; WMM param ele. ++ if(pattrib->encrypt){ ++ //FTIE ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ ptimeout_ie = pframe; ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ ptdls_sta->TPK_count=0; ++ _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //HT operation; todo ++ //Link identifier ++ plinkid_ie = pframe; ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //fill FTIE mic ++ if(pattrib->encrypt) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++} ++ ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_TEARDOWN; ++ u8 link_id_addr[18] = {0}; ++ ++ struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ //Link identifier ++ if(ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE){ ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ }else if(ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE){ ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ } ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_TDLS; ++ u8 action = TDLS_DISCOVERY_REQUEST; ++ u8 link_id_addr[18] = {0}; ++ static u8 dialogtoken=0; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); ++ dialogtoken = (dialogtoken+1)%256; ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++ u8 category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = TDLS_DISCOVERY_RESPONSE; ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ u8 *p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 iedata=0; ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ u32 timeout_interval= TPK_RESEND_COUNT * 1000; ++ ++ //category, action, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ pframe = rtw_tdls_set_sup_ch(pmlmeext, pframe, pattrib); ++ ++ //RSNIE ++ if(pattrib->encrypt) ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ ++ //extended capability ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ if(pattrib->encrypt){ ++ //FTIE ++ _rtw_memset(pframe, 0, 84); //All fields shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ pframe = rtw_tdls_set_ht_cap(padapter, pframe, pattrib); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_PEER_TRAFFIC_INDICATION; ++ ++ u8 link_id_addr[18] = {0}; ++ u8 AC_queue=0; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //PTI control ++ //PU buffer status ++ if(ptdls_sta->uapsd_bk&BIT(1)) ++ AC_queue=BIT(0); ++ if(ptdls_sta->uapsd_be&BIT(1)) ++ AC_queue=BIT(1); ++ if(ptdls_sta->uapsd_vi&BIT(1)) ++ AC_queue=BIT(2); ++ if(ptdls_sta->uapsd_vo&BIT(1)) ++ AC_queue=BIT(3); ++ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_CHANNEL_SWITCH_REQUEST; ++ u8 link_id_addr[18] = {0}; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ u8 ch_switch_timing[4] = {0}; ++ u16 switch_time= CH_SWITCH_TIME, switch_timeout=CH_SWITCH_TIMEOUT; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, target_ch ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdlsinfo->candidate_ch), &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //ch switch timing ++ _rtw_memcpy(ch_switch_timing, &switch_time, 2); ++ _rtw_memcpy(ch_switch_timing+2, &switch_timeout, 2); ++ pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++ ++ //update ch switch attrib to sta_info ++ ptdls_sta->off_ch=ptdlsinfo->candidate_ch; ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++} ++ ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_CHANNEL_SWITCH_RESPONSE; ++ u8 link_id_addr[18] = {0}; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 ch_switch_timing[4] = {0}; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status_code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //ch switch timing ++ _rtw_memcpy(ch_switch_timing, &ptdls_sta->ch_switch_time, 2); ++ _rtw_memcpy(ch_switch_timing+2, &ptdls_sta->ch_switch_timeout, 2); ++ pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++ ++} ++ ++#ifdef CONFIG_WFD ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_req = 4; ++ u8 wfdielen = 0; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, OUI, frame_body_type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_req), &(pattrib->pktlen)); ++ ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) ++ { ++ wfdielen = build_probe_req_wfd_ie(pbuddy_wdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++ ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct wifidirect_info *pbuddy_wdinfo = &padapter->pbuddy_adapter->wdinfo; ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_P2P; ++ u8 WFA_OUI[3] = { 0x50, 0x6f, 0x9a}; ++ u8 probe_rsp = 5; ++ u8 wfdielen = 0; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, OUI, frame_body_type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 3, WFA_OUI, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(probe_rsp), &(pattrib->pktlen)); ++ ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ else if(!rtw_p2p_chk_state(pbuddy_wdinfo, P2P_STATE_NONE)) ++ { ++ wfdielen = build_probe_resp_wfd_ie(pbuddy_wdinfo, pframe, 1); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++ } ++ ++} ++#endif //CONFIG_WFD ++ ++void _TPK_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ ++ ptdls_sta->TPK_count++; ++ //TPK_timer set 1000 as default ++ //retry timer should set at least 301 sec. ++ if(ptdls_sta->TPK_count==TPK_RESEND_COUNT){ ++ ptdls_sta->TPK_count=0; ++ issue_tdls_setup_req(ptdls_sta->padapter, ptdls_sta->hwaddr); ++ } ++ ++ _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); ++} ++ ++void init_TPK_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ ++ _init_timer(&psta->TPK_timer, padapter->pnetdev, _TPK_timer_hdl, psta); ++} ++ ++// TDLS_DONE_CH_SEN: channel sensing and report candidate channel ++// TDLS_OFF_CH: first time set channel to off channel ++// TDLS_BASE_CH: when go back to the channel linked with AP, send null data to peer STA as an indication ++void _ch_switch_timer_hdl(void *FunctionContext) ++{ ++ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ ++ if( ptdls_sta->option == TDLS_DONE_CH_SEN ){ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); ++ }else if( ptdls_sta->option == TDLS_OFF_CH ){ ++ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0); ++ _set_timer(&ptdls_sta->base_ch_timer, 500); ++ }else if( ptdls_sta->option == TDLS_BASE_CH){ ++ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0); ++ } ++} ++ ++void init_ch_switch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->option_timer, padapter->pnetdev, _ch_switch_timer_hdl, psta); ++} ++ ++void _base_ch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_OFF_CH); ++} ++ ++void init_base_ch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->base_ch_timer, padapter->pnetdev, _base_ch_timer_hdl, psta); ++} ++ ++void _off_ch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_BASE_CH ); ++} ++ ++void init_off_ch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->off_ch_timer, padapter->pnetdev, _off_ch_timer_hdl, psta); ++} ++ ++void _tdls_handshake_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ ++ if(ptdls_sta != NULL) ++ { ++ if( !(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) ++ { ++ DBG_871X("tdls handshake time out\n"); ++ free_tdls_sta(ptdls_sta->padapter, ptdls_sta); ++ } ++ } ++} ++ ++void init_handshake_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); ++} ++ ++//Check tdls peer sta alive. ++void _tdls_alive_timer_phase1_hdl(void *FunctionContext) ++{ ++ _irqL irqL; ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ _enter_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ptdls_sta->timer_flag = 1; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ++ ptdls_sta->tdls_sta_state &= (~TDLS_ALIVE_STATE); ++ ++ DBG_871X("issue_tdls_dis_req to check alive\n"); ++ issue_tdls_dis_req( padapter, ptdls_sta->hwaddr); ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH1); ++ sta_update_last_rx_pkts(ptdls_sta); ++ ++ if ( ptdls_sta->timer_flag == 2 ) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_FREE_STA); ++ else ++ { ++ _enter_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ptdls_sta->timer_flag = 0; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ } ++ ++} ++ ++void _tdls_alive_timer_phase2_hdl(void *FunctionContext) ++{ ++ _irqL irqL; ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ _enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 1; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ++ if( (ptdls_sta->tdls_sta_state & TDLS_ALIVE_STATE) && ++ (sta_last_rx_pkts(ptdls_sta) + 3 <= sta_rx_pkts(ptdls_sta)) ) ++ { ++ DBG_871X("TDLS STA ALIVE, ptdls_sta->sta_stats.last_rx_pkts:%llu, ptdls_sta->sta_stats.rx_pkts:%llu\n", ++ sta_last_rx_pkts(ptdls_sta), sta_rx_pkts(ptdls_sta)); ++ ++ ptdls_sta->alive_count = 0; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH2); ++ } ++ else ++ { ++ if( !(ptdls_sta->tdls_sta_state & TDLS_ALIVE_STATE) ) ++ DBG_871X("TDLS STA TOO FAR\n"); ++ if( !(sta_last_rx_pkts(ptdls_sta) + 3 <= sta_rx_pkts(ptdls_sta))) ++ DBG_871X("TDLS LINK WITH LOW TRAFFIC, ptdls_sta->sta_stats.last_rx_pkts:%llu, ptdls_sta->sta_stats.rx_pkts:%llu\n", ++ sta_last_rx_pkts(ptdls_sta), sta_rx_pkts(ptdls_sta)); ++ ++ ptdls_sta->alive_count++; ++ if( ptdls_sta->alive_count == TDLS_ALIVE_COUNT ) ++ { ++ ptdls_sta->stat_code = _RSON_TDLS_TEAR_TOOFAR_; ++ issue_tdls_teardown(padapter, ptdls_sta->hwaddr); ++ } ++ else ++ { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH2); ++ } ++ } ++ ++ if ( ptdls_sta->timer_flag == 2 ) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_FREE_STA); ++ else ++ { ++ _enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 0; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++} ++ ++} ++ ++void init_tdls_alive_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->alive_timer1, padapter->pnetdev, _tdls_alive_timer_phase1_hdl, psta); ++ _init_timer(&psta->alive_timer2, padapter->pnetdev, _tdls_alive_timer_phase2_hdl, psta); ++} ++ ++int update_sgi_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ struct ht_priv *psta_ht = NULL; ++ psta_ht = &psta->htpriv; ++ ++ if(psta_ht->ht_option) ++ { ++ return psta_ht->sgi; ++ } ++ else ++ return _FALSE; ++} ++ ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta) ++{ ++ int i; ++ u8 rf_type, id; ++ unsigned char sta_band = 0; ++ unsigned char limit; ++ unsigned int tx_ra_bitmap=0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ psta_ht = &psta->htpriv; ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset); i++) ++ { ++ if (psta->bssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ //n mode ra_bitmap ++ if(psta_ht->ht_option) ++ { ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_2T2R) ++ limit=16;// 2R ++ else ++ limit=8;// 1R ++ ++ for (i=0; iht_cap.supp_mcs_set[i/8] & BIT(i%8)) ++ tx_ra_bitmap |= BIT(i+12); ++ } ++ } ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ // 5G band ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ id = networktype_to_raid(sta_band); ++ tx_ra_bitmap |= ((id<<28)&0xf0000000); ++ return tx_ra_bitmap; ++} ++ ++#endif //CONFIG_TDLS ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_wlan_util.c +@@ -0,0 +1,2305 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_WLAN_UTIL_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; ++unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; ++ ++unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; ++unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; ++unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5}; ++ ++unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; ++unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; ++unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; ++unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; ++unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; ++ ++unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; ++ ++extern unsigned char MCS_rate_2R[16]; ++#ifdef CONFIG_DISABLE_MCS13TO15 ++extern unsigned char MCS_rate_2R_MCS13TO15_OFF[16]; ++#endif //CONFIG_DISABLE_MCS13TO15 ++extern unsigned char MCS_rate_1R[16]; ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WPA_TKIP_CIPHER[4]; ++extern unsigned char RSN_TKIP_CIPHER[4]; ++ ++#define R2T_PHY_DELAY (0) ++ ++//#define WAIT_FOR_BCN_TO_MIN (3000) ++#define WAIT_FOR_BCN_TO_MIN (6000) ++#define WAIT_FOR_BCN_TO_MAX (20000) ++ ++static u8 rtw_basic_rate_cck[4] = { ++ IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK ++}; ++ ++static u8 rtw_basic_rate_ofdm[3] = { ++ IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK ++}; ++ ++static u8 rtw_basic_rate_mix[7] = { ++ IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK ++}; ++ ++ ++int cckrates_included(unsigned char *rate, int ratelen) ++{ ++ int i; ++ ++ for(i = 0; i < ratelen; i++) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ } ++ ++ return _FALSE; ++ ++} ++ ++int cckratesonly_included(unsigned char *rate, int ratelen) ++{ ++ int i; ++ ++ for(i = 0; i < ratelen; i++) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ return _FALSE; ++ } ++ ++ return _TRUE; ++} ++ ++unsigned char networktype_to_raid(unsigned char network_type) ++{ ++ unsigned char raid; ++ ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ raid = 6; ++ break; ++ case WIRELESS_11A: ++ case WIRELESS_11G: ++ raid = 5; ++ break; ++ case WIRELESS_11BG: ++ raid = 4; ++ break; ++ case WIRELESS_11_24N: ++ case WIRELESS_11_5N: ++ raid = 3; ++ break; ++ case WIRELESS_11A_5N: ++ case WIRELESS_11G_24N: ++ raid = 1; ++ break; ++ case WIRELESS_11BG_24N: ++ raid = 0; ++ break; ++ default: ++ raid = 4; ++ break; ++ ++ } ++ ++ return raid; ++ ++} ++ ++int judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen) ++{ ++ int network_type = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if(pmlmeext->cur_channel > 14) ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_5N; ++ } ++ ++ network_type |= WIRELESS_11A; ++ } ++ else ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_24N; ++ } ++ ++ if ((cckratesonly_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11B; ++ } ++ else if((cckrates_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11BG; ++ } ++ else ++ { ++ network_type |= WIRELESS_11G; ++ } ++ } ++ ++ return network_type; ++} ++ ++unsigned char ratetbl_val_2wifirate(unsigned char rate); ++unsigned char ratetbl_val_2wifirate(unsigned char rate) ++{ ++ unsigned char val = 0; ++ ++ switch (rate & 0x7f) ++ { ++ case 0: ++ val = IEEE80211_CCK_RATE_1MB; ++ break; ++ ++ case 1: ++ val = IEEE80211_CCK_RATE_2MB; ++ break; ++ ++ case 2: ++ val = IEEE80211_CCK_RATE_5MB; ++ break; ++ ++ case 3: ++ val = IEEE80211_CCK_RATE_11MB; ++ break; ++ ++ case 4: ++ val = IEEE80211_OFDM_RATE_6MB; ++ break; ++ ++ case 5: ++ val = IEEE80211_OFDM_RATE_9MB; ++ break; ++ ++ case 6: ++ val = IEEE80211_OFDM_RATE_12MB; ++ break; ++ ++ case 7: ++ val = IEEE80211_OFDM_RATE_18MB; ++ break; ++ ++ case 8: ++ val = IEEE80211_OFDM_RATE_24MB; ++ break; ++ ++ case 9: ++ val = IEEE80211_OFDM_RATE_36MB; ++ break; ++ ++ case 10: ++ val = IEEE80211_OFDM_RATE_48MB; ++ break; ++ ++ case 11: ++ val = IEEE80211_OFDM_RATE_54MB; ++ break; ++ ++ } ++ ++ return val; ++ ++} ++ ++int is_basicrate(_adapter *padapter, unsigned char rate); ++int is_basicrate(_adapter *padapter, unsigned char rate) ++{ ++ int i; ++ unsigned char val; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ for(i = 0; i < NumRates; i++) ++ { ++ val = pmlmeext->basicrate[i]; ++ ++ if ((val != 0xff) && (val != 0xfe)) ++ { ++ if (rate == ratetbl_val_2wifirate(val)) ++ { ++ return _TRUE; ++ } ++ } ++ } ++ ++ return _FALSE; ++} ++ ++unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset); ++unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset) ++{ ++ int i; ++ unsigned char rate; ++ unsigned int len = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ for (i = 0; i < NumRates; i++) ++ { ++ rate = pmlmeext->datarate[i]; ++ ++ switch (rate) ++ { ++ case 0xff: ++ return len; ++ ++ case 0xfe: ++ continue; ++ ++ default: ++ rate = ratetbl_val_2wifirate(rate); ++ ++ if (is_basicrate(padapter, rate) == _TRUE) ++ { ++ rate |= IEEE80211_BASIC_RATE_MASK; ++ } ++ ++ rateset[len] = rate; ++ len++; ++ break; ++ } ++ } ++ return len; ++} ++ ++ ++void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) ++{ ++ unsigned char supportedrates[NumRates]; ++ ++ _rtw_memset(supportedrates, 0, NumRates); ++ *bssrate_len = ratetbl2rateset(padapter, supportedrates); ++ _rtw_memcpy(pbssrate, supportedrates, *bssrate_len); ++} ++ ++void UpdateBrateTbl( ++ IN PADAPTER Adapter, ++ IN u8 *mBratesOS ++) ++{ ++ u8 i; ++ u8 rate; ++ ++ // 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory. ++ for(i=0;ipbuddy_adapter; ++ if(pbuddy_adapter) ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++#endif ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++ ++} ++ ++void Restore_DM_Func_Flag(_adapter *padapter) ++{ ++ u8 bSaveFlag = _FALSE; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ if(pbuddy_adapter) ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++} ++ ++void Switch_DM_Func(_adapter *padapter, u8 mode, u8 enable) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++#endif ++ ++ if(enable == _TRUE) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter) ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode)); ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode)); ++ } ++ else ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter) ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode)); ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode)); ++ } ++ ++#if 0 ++ u8 val8; ++ ++ val8 = rtw_read8(padapter, FW_DYNAMIC_FUN_SWITCH); ++ ++ if(enable == _TRUE) ++ { ++ rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 | mode)); ++ } ++ else ++ { ++ rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 & mode)); ++ } ++#endif ++ ++} ++ ++static void Set_NETYPE1_MSR(_adapter *padapter, u8 type) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS1, (u8 *)(&type)); ++} ++ ++static void Set_NETYPE0_MSR(_adapter *padapter, u8 type) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type)); ++} ++ ++void Set_MSR(_adapter *padapter, u8 type) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type == IFACE_PORT1) ++ { ++ Set_NETYPE1_MSR(padapter, type); ++ } ++ else ++#endif ++ { ++ Set_NETYPE0_MSR(padapter, type); ++ } ++} ++ ++inline u8 rtw_get_oper_ch(_adapter *adapter) ++{ ++ return adapter_to_dvobj(adapter)->oper_channel; ++} ++ ++inline void rtw_set_oper_ch(_adapter *adapter, u8 ch) ++{ ++ if (adapter_to_dvobj(adapter)->oper_channel != ch) ++ adapter_to_dvobj(adapter)->on_oper_ch_time = rtw_get_current_time(); ++ ++ adapter_to_dvobj(adapter)->oper_channel = ch; ++} ++ ++inline u8 rtw_get_oper_bw(_adapter *adapter) ++{ ++ return adapter_to_dvobj(adapter)->oper_bwmode; ++} ++ ++inline void rtw_set_oper_bw(_adapter *adapter, u8 bw) ++{ ++ adapter_to_dvobj(adapter)->oper_bwmode = bw; ++} ++ ++inline u8 rtw_get_oper_choffset(_adapter *adapter) ++{ ++ return adapter_to_dvobj(adapter)->oper_ch_offset; ++} ++ ++inline void rtw_set_oper_choffset(_adapter *adapter, u8 offset) ++{ ++ adapter_to_dvobj(adapter)->oper_ch_offset = offset; ++} ++ ++inline u32 rtw_get_on_oper_ch_time(_adapter *adapter) ++{ ++ return adapter_to_dvobj(adapter)->on_oper_ch_time; ++} ++ ++inline u32 rtw_get_on_cur_ch_time(_adapter *adapter) ++{ ++ if (adapter->mlmeextpriv.cur_channel == adapter_to_dvobj(adapter)->oper_channel) ++ return adapter_to_dvobj(adapter)->on_oper_ch_time; ++ else ++ return 0; ++} ++ ++void SelectChannel(_adapter *padapter, unsigned char channel) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ //saved channel info ++ rtw_set_oper_ch(padapter, channel); ++ dc_SelectChannel(padapter, channel); ++#else //CONFIG_DUALMAC_CONCURRENT ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++ //saved channel info ++ rtw_set_oper_ch(padapter, channel); ++ ++ rtw_hal_set_chan(padapter, channel); ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++#endif // CONFIG_DUALMAC_CONCURRENT ++} ++ ++void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ //saved bw info ++ rtw_set_oper_bw(padapter, bwmode); ++ rtw_set_oper_choffset(padapter, channel_offset); ++ dc_SetBWMode(padapter, bwmode, channel_offset); ++#else //CONFIG_DUALMAC_CONCURRENT ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); ++ ++ //saved bw info ++ rtw_set_oper_bw(padapter, bwmode); ++ rtw_set_oper_choffset(padapter, channel_offset); ++ ++ rtw_hal_set_bwmode(padapter, (HT_CHANNEL_WIDTH)bwmode, channel_offset); ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setbw_mutex), NULL); ++ ++#endif // CONFIG_DUALMAC_CONCURRENT ++} ++ ++void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) ++{ ++ u8 center_ch; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if ( padapter->bNotifyChannelChange ) ++ { ++ DBG_871X( "[%s] ch = %d, offset = %d, bwmode = %d\n", __FUNCTION__, channel, channel_offset, bwmode ); ++ } ++ ++ if((bwmode == HT_CHANNEL_WIDTH_20)||(channel_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)) ++ { ++ //SelectChannel(padapter, channel); ++ center_ch = channel; ++ } ++ else ++ { ++ //switch to the proper channel ++ if (channel_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ { ++ //SelectChannel(padapter, channel + 2); ++ center_ch = channel + 2; ++ } ++ else ++ { ++ //SelectChannel(padapter, channel - 2); ++ center_ch = channel - 2; ++ } ++ } ++ ++ //set Channel , must be independant for correct co_ch value/ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ //saved channel/bw info ++ rtw_set_oper_ch(padapter, channel); ++ rtw_set_oper_bw(padapter, bwmode); ++ rtw_set_oper_choffset(padapter, channel_offset); ++ dc_SelectChannel(padapter, center_ch);// set center channel ++#else //CONFIG_DUALMAC_CONCURRENT ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++ //saved channel/bw info ++ rtw_set_oper_ch(padapter, channel); ++ rtw_set_oper_bw(padapter, bwmode); ++ rtw_set_oper_choffset(padapter, channel_offset); ++ ++ rtw_hal_set_chan(padapter, center_ch); ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->setch_mutex), NULL); ++ ++#endif // CONFIG_DUALMAC_CONCURRENT ++ ++ ++ //set BandWidth ++ SetBWMode(padapter, bwmode, channel_offset); ++ ++} ++ ++int get_bsstype(unsigned short capability) ++{ ++ if (capability & BIT(0)) ++ { ++ return WIFI_FW_AP_STATE; ++ } ++ else if (capability & BIT(1)) ++ { ++ return WIFI_FW_ADHOC_STATE; ++ } ++ else ++ { ++ return 0; ++ } ++} ++ ++__inline u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork) ++{ ++ return (pnetwork->MacAddress); ++} ++ ++u16 get_beacon_interval(WLAN_BSSID_EX *bss) ++{ ++ unsigned short val; ++ _rtw_memcpy((unsigned char *)&val, rtw_get_beacon_interval_from_ie(bss->IEs), 2); ++ ++ return le16_to_cpu(val); ++ ++} ++ ++int is_client_associated_to_ap(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext; ++ struct mlme_ext_info *pmlmeinfo; ++ ++ if(!padapter) ++ return _FAIL; ++ ++ pmlmeext = &padapter->mlmeextpriv; ++ pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++int is_client_associated_to_ibss(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++int is_IBSS_empty(_adapter *padapter) ++{ ++ unsigned int i; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ return _FAIL; ++ } ++ } ++ ++ return _TRUE; ++ ++} ++ ++unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) ++{ ++ if ((bcn_interval << 2) < WAIT_FOR_BCN_TO_MIN) ++ { ++ return WAIT_FOR_BCN_TO_MIN; ++ } ++ else if ((bcn_interval << 2) > WAIT_FOR_BCN_TO_MAX) ++ { ++ return WAIT_FOR_BCN_TO_MAX; ++ } ++ else ++ { ++ return ((bcn_interval << 2)); ++ } ++} ++ ++void CAM_empty_entry( ++ PADAPTER Adapter, ++ u8 ucIndex ++) ++{ ++ rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); ++} ++ ++void invalidate_cam_all(_adapter *padapter) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); ++} ++#if 0 ++static u32 _ReadCAM(_adapter *padapter ,u32 addr) ++{ ++ u32 count = 0, cmd; ++ cmd = CAM_POLLINIG |addr ; ++ rtw_write32(padapter, RWCAM, cmd); ++ ++ do{ ++ if(0 == (rtw_read32(padapter,REG_CAMCMD) & CAM_POLLINIG)){ ++ break; ++ } ++ }while(count++ < 100); ++ ++ return rtw_read32(padapter,REG_CAMREAD); ++} ++void read_cam(_adapter *padapter ,u8 entry) ++{ ++ u32 j,count = 0, addr, cmd; ++ addr = entry << 3; ++ ++ printk("********* DUMP CAM Entry_#%02d***************\n",entry); ++ for (j = 0; j < 6; j++) ++ { ++ cmd = _ReadCAM(padapter ,addr+j); ++ printk("offset:0x%02x => 0x%08x \n",addr+j,cmd); ++ } ++ printk("*********************************\n"); ++} ++#endif ++ ++void write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) ++{ ++ unsigned int i, val, addr; ++ //unsigned int cmd; ++ int j; ++ u32 cam_val[2]; ++ ++ addr = entry << 3; ++ ++ for (j = 5; j >= 0; j--) ++ { ++ switch (j) ++ { ++ case 0: ++ val = (ctrl | (mac[0] << 16) | (mac[1] << 24) ); ++ break; ++ ++ case 1: ++ val = (mac[2] | ( mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); ++ break; ++ ++ default: ++ i = (j - 2) << 2; ++ val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24)); ++ break; ++ ++ } ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)j; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++ ++ //rtw_write32(padapter, WCAMI, val); ++ ++ //cmd = CAM_POLLINIG | CAM_WRITE | (addr + j); ++ //rtw_write32(padapter, RWCAM, cmd); ++ ++ //DBG_871X("%s=> cam write: %x, %x\n",__FUNCTION__, cmd, val); ++ ++ } ++ ++} ++ ++void clear_cam_entry(_adapter *padapter, u8 entry) ++{ ++#if 0 ++ u32 addr, val=0; ++ u32 cam_val[2]; ++ ++ addr = entry << 3; ++ ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)0; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++ ++ ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)1; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++#else ++ ++ unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ ++ unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00}; ++ ++ write_cam(padapter, entry, 0, null_sta, null_key); ++ ++#endif ++} ++ ++int allocate_fw_sta_entry(_adapter *padapter) ++{ ++ unsigned int mac_id; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++) ++ { ++ if (pmlmeinfo->FW_sta_info[mac_id].status == 0) ++ { ++ pmlmeinfo->FW_sta_info[mac_id].status = 1; ++ pmlmeinfo->FW_sta_info[mac_id].retry = 0; ++ break; ++ } ++ } ++ ++ return mac_id; ++} ++ ++void flush_all_cam_entry(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ //if(check_buddy_mlmeinfo_state(padapter, _HW_STATE_NOLINK_)) ++ if(check_buddy_fwstate(padapter, _FW_LINKED) == _FALSE) ++ { ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); ++ } ++ else ++ { ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ u8 cam_id=0;//cam_entry ++ ++ psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); ++ if(psta) { ++ if(psta->state & WIFI_AP_STATE) ++ {} //clear cam when ap free per sta_info ++ else { ++ if(psta->mac_id==2) ++ cam_id = 5; ++ else ++ cam_id = 4; ++ } ++ //clear_cam_entry(padapter, cam_id); ++ rtw_clearstakey_cmd(padapter, (u8*)psta, cam_id, _FALSE); ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ //clear cam when ap free per sta_info ++ } ++ } ++#else //CONFIG_CONCURRENT_MODE ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); ++ ++#endif //CONFIG_CONCURRENT_MODE ++ ++ _rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info)); ++ ++} ++ ++#if defined(CONFIG_P2P) && defined(CONFIG_WFD) ++int WFD_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo; ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++ ++ ++ pwdinfo = &padapter->wdinfo; ++ if ( rtw_get_wfd_ie( ( u8* ) pIE, pIE->Length, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ printk( "[%s] Found WFD IE\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info->peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ return( _TRUE ); ++ } ++ } ++ else ++ { ++ printk( "[%s] NO WFD IE\n", __FUNCTION__ ); ++ ++ } ++ return( _FAIL ); ++} ++#endif ++ ++int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ //struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pmlmepriv->qospriv.qos_option==0) ++ { ++ pmlmeinfo->WMM_enable = 0; ++ return _FAIL; ++ } ++ ++ pmlmeinfo->WMM_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); ++ return _TRUE; ++ ++ /*if (pregpriv->wifi_spec == 1) ++ { ++ if (pmlmeinfo->WMM_enable == 1) ++ { ++ //todo: compare the parameter set count & decide wheher to update or not ++ return _FAIL; ++ } ++ else ++ { ++ pmlmeinfo->WMM_enable = 1; ++ _rtw_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); ++ return _TRUE; ++ } ++ } ++ else ++ { ++ pmlmeinfo->WMM_enable = 0; ++ return _FAIL; ++ }*/ ++ ++} ++ ++void WMMOnAssocRsp(_adapter *padapter) ++{ ++ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; ++ u8 acm_mask; ++ u16 TXOP; ++ u32 acParm, i; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pmlmeinfo->WMM_enable == 0) ++ { ++ padapter->mlmepriv.acm_mask = 0; ++ return; ++ } ++ ++ acm_mask = 0; ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ for (i = 0; i < 4; i++) ++ { ++ ACI = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 5) & 0x03; ++ ACM = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 4) & 0x01; ++ ++ //AIFS = AIFSN * slot time + SIFS - r2t phy delay ++ AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime; ++ ++ ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f); ++ ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4; ++ TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit); ++ ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ ++ switch (ACI) ++ { ++ case 0x0: ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(1):0); ++ break; ++ ++ case 0x1: ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ //acm_mask |= (ACM? BIT(0):0); ++ break; ++ ++ case 0x2: ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(2):0); ++ break; ++ ++ case 0x3: ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(3):0); ++ break; ++ } ++ ++ DBG_871X("WMM(%x): %x, %x\n", ACI, ACM, acParm); ++ } ++ ++ if(padapter->registrypriv.acm_method == 1) ++ rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); ++ else ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ return; ++} ++ ++static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ unsigned char new_bwmode; ++ unsigned char new_ch_offset; ++ struct HT_info_element *pHT_info; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ u8 cbw40_enable=0; ++ ++ if(!pIE) ++ return; ++ ++ if(phtpriv->ht_option == _FALSE) return; ++ ++ if(pIE->Length > sizeof(struct HT_info_element)) ++ return; ++ ++ pHT_info = (struct HT_info_element *)pIE->data; ++ ++ if (pmlmeext->cur_channel > 14) { ++ if (pregistrypriv->cbw40_enable & BIT(1)) ++ cbw40_enable = 1; ++ } else { ++ if (pregistrypriv->cbw40_enable & BIT(0)) ++ cbw40_enable = 1; ++ } ++ ++ if((pHT_info->infos[0] & BIT(2)) && cbw40_enable ) ++ { ++ new_bwmode = HT_CHANNEL_WIDTH_40; ++ ++ switch (pHT_info->infos[0] & 0x3) ++ { ++ case 1: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ } ++ else ++ { ++ new_bwmode = HT_CHANNEL_WIDTH_20; ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ ++ if((new_bwmode!= pmlmeext->cur_bwmode) || (new_ch_offset!=pmlmeext->cur_ch_offset)) ++ { ++ pmlmeinfo->bwmode_updated = _TRUE; ++ ++ pmlmeext->cur_bwmode = new_bwmode; ++ pmlmeext->cur_ch_offset = new_ch_offset; ++ ++ //update HT info also ++ HT_info_handler(padapter, pIE); ++ } ++ else ++ { ++ pmlmeinfo->bwmode_updated = _FALSE; ++ } ++ ++ ++ if(_TRUE == pmlmeinfo->bwmode_updated) ++ { ++ struct sta_info *psta; ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ ++ //update ap's stainfo ++ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); ++ if(psta) ++ { ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++ ++ if(phtpriv_sta->ht_option) ++ { ++ // bwmode ++ phtpriv_sta->bwmode = pmlmeext->cur_bwmode; ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ } ++ else ++ { ++ phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ } ++ ++ //pmlmeinfo->bwmode_updated = _FALSE;//bwmode_updated done, reset it! ++ ++ } ++ ++} ++ ++void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ unsigned int i; ++ u8 rf_type; ++ u8 max_AMPDU_len, min_MPDU_spacing; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++ if(pIE==NULL) return; ++ ++ if(phtpriv->ht_option == _FALSE) return; ++ ++ pmlmeinfo->HT_caps_enable = 1; ++ ++ for (i = 0; i < (pIE->Length); i++) ++ { ++ if (i != 2) ++ { ++ // Commented by Albert 2010/07/12 ++ // Got the endian issue here. ++ pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]); ++ } ++ else ++ { ++ //modify from fw by Thomas 2010/11/17 ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) ++ { ++ max_AMPDU_len = (pIE->data[i] & 0x3); ++ } ++ else ++ { ++ max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3); ++ } ++ ++ if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c)) ++ { ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c); ++ } ++ else ++ { ++ min_MPDU_spacing = (pIE->data[i] & 0x1c); ++ } ++ ++ pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing; ++ } ++ } ++ ++ // Commented by Albert 2010/07/12 ++ // Have to handle the endian issue after copying. ++ // HT_ext_caps didn't be used yet. ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info = le16_to_cpu( pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info ); ++ pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps = le16_to_cpu( pmlmeinfo->HT_caps.u.HT_cap_element.HT_ext_caps ); ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ if((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ else ++ { ++ #ifdef CONFIG_DISABLE_MCS13TO15 ++ if(pmlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40 && (pregistrypriv->wifi_spec!=1)) ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R_MCS13TO15_OFF[i]; ++ else ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; ++ #else ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; ++ #endif //CONFIG_DISABLE_MCS13TO15 ++ } ++ #ifdef RTL8192C_RECONFIG_TO_1T1R ++ { ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ #endif ++ ++ if(pregistrypriv->special_rf_path) ++ pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ ++ } ++ ++ return; ++} ++ ++void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++ if(pIE==NULL) return; ++ ++ if(phtpriv->ht_option == _FALSE) return; ++ ++ ++ if(pIE->Length > sizeof(struct HT_info_element)) ++ return; ++ ++ pmlmeinfo->HT_info_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length); ++ ++ return; ++} ++ ++void HTOnAssocRsp(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ //struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) ++ { ++ pmlmeinfo->HT_enable = 1; ++ } ++ else ++ { ++ pmlmeinfo->HT_enable = 0; ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ return; ++ } ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++#if 0 //move to rtw_update_ht_cap() ++ if ((pregpriv->cbw40_enable) && ++ (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & BIT(1)) && ++ (pmlmeinfo->HT_info.infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode accoring to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) ++ { ++ case HT_EXTCHNL_OFFSET_UPPER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case HT_EXTCHNL_OFFSET_LOWER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ } ++#endif ++ ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++#if 0 //move to rtw_update_ht_cap() ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++#endif ++ ++} ++ ++void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pIE->Length>1) ++ return; ++ ++ pmlmeinfo->ERP_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length); ++} ++ ++void VCS_update(_adapter *padapter, struct sta_info *psta) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ switch (pregpriv->vrtl_carrier_sense)/* 0:off 1:on 2:auto */ ++ { ++ case 0: //off ++ psta->rtsen = 0; ++ psta->cts2self = 0; ++ break; ++ ++ case 1: //on ++ if (pregpriv->vcs_type == 1) /* 1:RTS/CTS 2:CTS to self */ ++ { ++ psta->rtsen = 1; ++ psta->cts2self = 0; ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 1; ++ } ++ break; ++ ++ case 2: //auto ++ default: ++ if ((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) ++ { ++ if (pregpriv->vcs_type == 1) ++ { ++ psta->rtsen = 1; ++ psta->cts2self = 0; ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 1; ++ } ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 0; ++ } ++ break; ++ } ++} ++ ++#ifdef CONFIG_TDLS ++int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len) ++{ ++ u8 tdls_prohibited_bit = 0x40; //bit(38); TDLS_prohibited ++ ++ if(pkt_len < 5) ++ { ++ return _FALSE; ++ } ++ ++ pframe += 4; ++ if( (*pframe) & tdls_prohibited_bit ) ++ return _TRUE; ++ ++ return _FALSE; ++} ++#endif //CONFIG_TDLS ++ ++void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) ++{ ++ unsigned int i; ++ unsigned int len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 tdls_prohibited[] = { 0x00, 0x00, 0x00, 0x00, 0x10 }; //bit(38): TDLS_prohibited ++#endif //CONFIG_TDLS ++ ++ len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); ++ ++ for (i = 0; i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); ++ ++ switch (pIE->ElementID) ++ { ++#if 0 ++ case _VENDOR_SPECIFIC_IE_: ++ //todo: to update WMM paramter set while receiving beacon ++ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM ++ { ++ (WMM_param_handler(padapter, pIE))? WMMOnAssocRsp(padapter): 0; ++ } ++ break; ++#endif ++ ++ case _HT_EXTRA_INFO_IE_: //HT info ++ //HT_info_handler(padapter, pIE); ++ bwmode_update_check(padapter, pIE); ++ break; ++ ++ case _ERPINFO_IE_: ++ ERP_IE_handler(padapter, pIE); ++ VCS_update(padapter, psta); ++ break; ++ ++#ifdef CONFIG_TDLS ++ case _EXT_CAP_IE_: ++ if( check_ap_tdls_prohibited(pIE->data, pIE->Length) == _TRUE ) ++ ptdlsinfo->ap_prohibited = _TRUE; ++ break; ++#endif //CONFIG_TDLS ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++} ++ ++#ifdef CONFIG_DFS ++void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len) ++{ ++ unsigned int i; ++ unsigned int len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 new_ch_no = 0; ++ ++ len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); ++ ++ for (i = 0; i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _CH_SWTICH_ANNOUNCE_: ++ _rtw_memcpy(&new_ch_no, pIE->data+1, 1); ++ rtw_set_csa_cmd(padapter, new_ch_no); ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++} ++#endif //CONFIG_DFS ++ ++unsigned int is_ap_in_tkip(_adapter *padapter) ++{ ++ u32 i; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) ++ { ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4))) ++ { ++ return _TRUE; ++ } ++ break; ++ ++ case _RSN_IE_2_: ++ if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4)) ++ { ++ return _TRUE; ++ } ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return _FALSE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++ ++} ++ ++int wifirate2_ratetbl_inx(unsigned char rate); ++int wifirate2_ratetbl_inx(unsigned char rate) ++{ ++ int inx = 0; ++ rate = rate & 0x7f; ++ ++ switch (rate) ++ { ++ case 54*2: ++ inx = 11; ++ break; ++ ++ case 48*2: ++ inx = 10; ++ break; ++ ++ case 36*2: ++ inx = 9; ++ break; ++ ++ case 24*2: ++ inx = 8; ++ break; ++ ++ case 18*2: ++ inx = 7; ++ break; ++ ++ case 12*2: ++ inx = 6; ++ break; ++ ++ case 9*2: ++ inx = 5; ++ break; ++ ++ case 6*2: ++ inx = 4; ++ break; ++ ++ case 11*2: ++ inx = 3; ++ break; ++ case 11: ++ inx = 2; ++ break; ++ ++ case 2*2: ++ inx = 1; ++ break; ++ ++ case 1*2: ++ inx = 0; ++ break; ++ ++ } ++ return inx; ++} ++ ++unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz) ++{ ++ unsigned int i, num_of_rate; ++ unsigned int mask = 0; ++ ++ num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; ++ ++ for (i = 0; i < num_of_rate; i++) ++ { ++ if ((*(ptn + i)) & 0x80) ++ { ++ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); ++ } ++ } ++ return mask; ++} ++ ++unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz) ++{ ++ unsigned int i, num_of_rate; ++ unsigned int mask = 0; ++ ++ num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; ++ ++ for (i = 0; i < num_of_rate; i++) ++ { ++ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); ++ } ++ ++ return mask; ++} ++ ++unsigned int update_MSC_rate(struct HT_caps_element *pHT_caps) ++{ ++ unsigned int mask = 0; ++ ++ mask = ((pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20)); ++ ++ return mask; ++} ++ ++int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps) ++{ ++ unsigned char bit_offset; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (!(pmlmeinfo->HT_enable)) ++ return _FAIL; ++ ++ if ((pmlmeinfo->assoc_AP_vendor == ralinkAP)) ++ return _FAIL; ++ ++ bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40)? 6: 5; ++ ++ if (pHT_caps->u.HT_cap_element.HT_caps_info & (0x1 << bit_offset)) ++ { ++ return _SUCCESS; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++unsigned char get_highest_rate_idx(u32 mask) ++{ ++ int i; ++ unsigned char rate_idx=0; ++ ++ for(i=27; i>=0; i--) ++ { ++ if(mask & BIT(i)) ++ { ++ rate_idx = i; ++ break; ++ } ++ } ++ ++ return rate_idx; ++} ++ ++unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps); ++unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps) ++{ ++ int i, mcs_rate; ++ ++ mcs_rate = (pHT_caps->u.HT_cap_element.MCS_rate[0] | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 8)); ++ ++ for (i = 15; i >= 0; i--) ++ { ++ if (mcs_rate & (0x1 << i)) ++ { ++ break; ++ } ++ } ++ ++ return i; ++} ++ ++void Update_RA_Entry(_adapter *padapter, u32 mac_id) ++{ ++ rtw_hal_update_ra_mask(padapter, mac_id); ++} ++ ++void enable_rate_adaptive(_adapter *padapter, u32 mac_id); ++void enable_rate_adaptive(_adapter *padapter, u32 mac_id) ++{ ++ Update_RA_Entry(padapter, mac_id); ++} ++ ++void set_sta_rate(_adapter *padapter, struct sta_info *psta) ++{ ++ //rate adaptive ++ enable_rate_adaptive(padapter, psta->mac_id); ++} ++ ++// Update RRSR and Rate for USERATE ++void update_tx_basic_rate(_adapter *padapter, u8 wirelessmode) ++{ ++ NDIS_802_11_RATES_EX supported_rates; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++ ++ // Added by Albert 2011/03/22 ++ // In the P2P mode, the driver should not support the b mode. ++ // So, the Tx packet shouldn't use the CCK rate ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++#endif //CONFIG_P2P ++#ifdef CONFIG_INTEL_WIDI ++ if (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_NONE) ++ return; ++#endif //CONFIG_INTEL_WIDI ++ ++ _rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX); ++ ++ //clear B mod if current channel is in 5G band, avoid tx cck rate in 5G band. ++ if(pmlmeext->cur_channel > 14) ++ wirelessmode &= ~(WIRELESS_11B); ++ ++ if ((wirelessmode & WIRELESS_11B) && (wirelessmode == WIRELESS_11B)) { ++ _rtw_memcpy(supported_rates, rtw_basic_rate_cck, 4); ++ } else if (wirelessmode & WIRELESS_11B) { ++ _rtw_memcpy(supported_rates, rtw_basic_rate_mix, 7); ++ } else { ++ _rtw_memcpy(supported_rates, rtw_basic_rate_ofdm, 3); ++ } ++ ++ if (wirelessmode & WIRELESS_11B) ++ update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); ++ else ++ update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, supported_rates); ++} ++ ++unsigned char check_assoc_AP(u8 *pframe, uint len) ++{ ++ unsigned int i; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) || (_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3))) ++ { ++ DBG_871X("link to Artheros AP\n"); ++ return atherosAP; ++ } ++ else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))) ++ { ++ DBG_871X("link to Broadcom AP\n"); ++ return broadcomAP; ++ } ++ else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3)) ++ { ++ DBG_871X("link to Marvell AP\n"); ++ return marvellAP; ++ } ++ else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3)) ++ { ++ DBG_871X("link to Ralink AP\n"); ++ return ralinkAP; ++ } ++ else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3)) ++ { ++ DBG_871X("link to Cisco AP\n"); ++ return ciscoAP; ++ } ++ else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3)) ++ { ++ DBG_871X("link to Realtek 96B\n"); ++ return realtekAP; ++ } ++ else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI,3)) ++ { ++ DBG_871X("link to Airgo Cap\n"); ++ return airgocapAP; ++ } ++ else ++ { ++ break; ++ } ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ DBG_871X("link to new AP\n"); ++ return unknownAP; ++} ++ ++void update_IOT_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ switch (pmlmeinfo->assoc_AP_vendor) ++ { ++ case marvellAP: ++ pmlmeinfo->turboMode_cts2self = 1; ++ pmlmeinfo->turboMode_rtsen = 0; ++ break; ++ ++ case ralinkAP: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ //disable high power ++ Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE); ++ break; ++ case realtekAP: ++ //rtw_write16(padapter, 0x4cc, 0xffff); ++ //rtw_write16(padapter, 0x546, 0x01c0); ++ //disable high power ++ Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE); ++ break; ++ default: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ break; ++ } ++ ++} ++ ++void update_capinfo(PADAPTER Adapter, u16 updateCap) ++{ ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ BOOLEAN ShortPreamble; ++ ++ // Check preamble mode, 2005.01.06, by rcnjko. ++ // Mark to update preamble value forever, 2008.03.18 by lanhsin ++ //if( pMgntInfo->RegPreambleMode == PREAMBLE_AUTO ) ++ { ++ ++ if(updateCap & cShortPreamble) ++ { // Short Preamble ++ if(pmlmeinfo->preamble_mode != PREAMBLE_SHORT) // PREAMBLE_LONG or PREAMBLE_AUTO ++ { ++ ShortPreamble = _TRUE; ++ pmlmeinfo->preamble_mode = PREAMBLE_SHORT; ++ rtw_hal_set_hwreg( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); ++ } ++ } ++ else ++ { // Long Preamble ++ if(pmlmeinfo->preamble_mode != PREAMBLE_LONG) // PREAMBLE_SHORT or PREAMBLE_AUTO ++ { ++ ShortPreamble = _FALSE; ++ pmlmeinfo->preamble_mode = PREAMBLE_LONG; ++ rtw_hal_set_hwreg( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); ++ } ++ } ++ } ++ ++ if ( updateCap & cIBSS ) { ++ //Filen: See 802.11-2007 p.91 ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ else ++ { ++ //Filen: See 802.11-2007 p.90 ++ if( pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11_24N)) ++ { ++ if( (updateCap & cShortSlotTime) /* && (!(pMgntInfo->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)) */) ++ { // Short Slot Time ++ if(pmlmeinfo->slotTime != SHORT_SLOT_TIME) ++ { ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ } ++ } ++ else ++ { // Long Slot Time ++ if(pmlmeinfo->slotTime != NON_SHORT_SLOT_TIME) ++ { ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ } ++ } ++ else if( pmlmeext->cur_wireless_mode & (WIRELESS_11A | WIRELESS_11_5N)) ++ { ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ } ++ else ++ { ++ //B Mode ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ } ++ ++ rtw_hal_set_hwreg( Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime ); ++ ++} ++ ++void update_wireless_mode(_adapter *padapter) ++{ ++ u8 init_rate=0; ++ int ratelen, network_type = 0; ++ u32 SIFS_Timer, mask; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ unsigned char *rate = cur_network->SupportedRates; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ratelen = rtw_get_rateset_len(cur_network->SupportedRates); ++ ++ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) ++ { ++ pmlmeinfo->HT_enable = 1; ++ } ++ ++ if(pmlmeext->cur_channel > 14) ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_5N; ++ } ++ ++ network_type |= WIRELESS_11A; ++ } ++ else ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_24N; ++ } ++ ++ if ((cckratesonly_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11B; ++ } ++ else if((cckrates_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11BG; ++ } ++ else ++ { ++ network_type |= WIRELESS_11G; ++ } ++ } ++ ++ pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; ++ ++ //For STA mode, driver need to modify initial data rate, or MAC will use wrong tx rate. ++ //Modified by Thomas 2012-12-3 ++ mask = update_supported_rate(cur_network->SupportedRates, ratelen); ++ init_rate = get_highest_rate_idx(mask)&0x3f; ++ rtw_hal_set_hwreg( padapter, HW_VAR_INIT_DATA_RATE, (u8 *)&init_rate); ++ ++/* ++ if((pmlmeext->cur_wireless_mode==WIRELESS_11G) || ++ (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G) ++ SIFS_Timer = 0x0a0a;//CCK ++ else ++ SIFS_Timer = 0x0e0e;//pHalData->SifsTime; //OFDM ++*/ ++ ++ SIFS_Timer = 0x0a0a0808; //0x0808 -> for CCK, 0x0a0a -> for OFDM ++ //change this value if having IOT issues. ++ ++ rtw_hal_set_hwreg( padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer); ++ ++ if (pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB); ++ else ++ { ++ update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB); ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter && (pmlmeext->cur_wireless_mode & WIRELESS_11A)) ++ update_mgnt_tx_rate(pbuddy_adapter, IEEE80211_OFDM_RATE_6MB); ++#endif //CONFIG_CONCURRENT_MODE ++ } ++} ++ ++void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value); ++void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value) ++{ ++#if 0 ++ struct cmd_obj *ph2c; ++ struct reg_rw_parm *pwriteMacPara; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ if ((pwriteMacPara = (struct reg_rw_parm*)rtw_malloc(sizeof(struct reg_rw_parm))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ pwriteMacPara->rw = 1; ++ pwriteMacPara->addr = addr; ++ pwriteMacPara->value = value; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwriteMacPara, GEN_CMD_CODE(_Write_MACREG)); ++ rtw_enqueue_cmd(pcmdpriv, ph2c); ++#endif ++} ++ ++void update_bmc_sta_support_rate(_adapter *padapter, u32 mac_id) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ { ++ // Only B, B/G, and B/G/N AP could use CCK rate ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), rtw_basic_rate_cck, 4); ++ } ++ else ++ { ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), rtw_basic_rate_ofdm, 3); ++ } ++} ++ ++int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx) ++{ ++ unsigned int ie_len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ int supportRateNum = 0; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len); ++ if (pIE == NULL) ++ { ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len); ++ supportRateNum = ie_len; ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len); ++ if (pIE) ++ { ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len); ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) ++{ ++ struct sta_info *psta; ++ u16 tid, start_seq, param; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct ADDBA_request *preq = (struct ADDBA_request*)paddba_req; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ psta = rtw_get_stainfo(pstapriv, addr); ++ ++ if(psta) ++ { ++ start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; ++ ++ param = le16_to_cpu(preq->BA_para_set); ++ tid = (param>>2)&0x0f; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ ++ #ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ ++ preorder_ctrl->indicate_seq = start_seq; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, start_seq); ++ #endif ++ #else ++ preorder_ctrl->indicate_seq = 0xffff; ++ #endif ++ ++ preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE; ++ } ++ ++} ++ ++void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) ++{ ++ u8* pIE; ++ u32 *pbuf; ++ ++ pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ pbuf = (u32*)pIE; ++ ++ pmlmeext->TSFValue = le32_to_cpu(*(pbuf+1)); ++ ++ pmlmeext->TSFValue = pmlmeext->TSFValue << 32; ++ ++ pmlmeext->TSFValue |= le32_to_cpu(*pbuf); ++} ++ ++void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext) ++{ ++ rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, 0); ++} ++ ++void beacon_timing_control(_adapter *padapter) ++{ ++ rtw_hal_bcn_related_reg_setting(padapter); ++} ++ ++#if 0 ++unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) ++{ ++ unsigned short ATIMWindow; ++ unsigned char *pframe; ++ struct tx_desc *ptxdesc; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned int rate_len, len = 0; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ _rtw_memset(beacon_frame, 0, 256); ++ ++ pframe = beacon_frame + TXDESC_SIZE; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ len += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ len += 2; ++ ++ // capability info: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ len += 2; ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &len); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &len); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &len); ++ ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &len); ++ ++ //todo: ERP IE ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &len); ++ } ++ ++ if ((len + TXDESC_SIZE) > 256) ++ { ++ //DBG_871X("marc: beacon frame too large\n"); ++ return 0; ++ } ++ ++ //fill the tx descriptor ++ ptxdesc = (struct tx_desc *)beacon_frame; ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); //default = 32 bytes for TX Desc ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((0x10 << QSEL_SHT) & 0x00001f00); ++ ++ //offset 8 ++ ptxdesc->txdw2 |= cpu_to_le32(BMC); ++ ptxdesc->txdw2 |= cpu_to_le32(BK); ++ ++ //offset 16 ++ ptxdesc->txdw4 = 0x80000000; ++ ++ //offset 20 ++ ptxdesc->txdw5 = 0x00000000; //1M ++ ++ return (len + TXDESC_SIZE); ++} ++#endif ++ ++static _adapter *pbuddy_padapter = NULL; ++ ++int rtw_handle_dualmac(_adapter *adapter, bool init) ++{ ++ int status = _SUCCESS; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); ++ ++ if (!IS_HARDWARE_TYPE_8192D(adapter)) ++ goto exit; ++ ++ if (init) { ++ rtw_hal_get_def_var(adapter, HAL_DEF_DUAL_MAC_MODE, &dvobj->DualMacMode); ++ if (dvobj->DualMacMode == _TRUE) { ++ // temply disable IPS For 92D-VC ++ adapter->registrypriv.ips_mode = IPS_NONE; ++ } ++ ++ /* For SMSP on 92DU-VC, driver do not probe another Interface. */ ++ if ((dvobj->DualMacMode != _TRUE) && (dvobj->InterfaceNumber != 0)) { ++ DBG_871X("%s(): Do not init another Interface because SMSP\n",__FUNCTION__); ++ status = _FAIL; ++ goto exit; ++ } ++ ++#ifndef CONFIG_CONCURRENT_MODE ++ if (dvobj->DualMacMode == _TRUE) { ++ if (pbuddy_padapter == NULL) { ++ pbuddy_padapter = adapter; ++ DBG_871X("%s(): pbuddy_padapter == NULL, Set pbuddy_padapter\n",__FUNCTION__); ++ } else { ++ adapter->pbuddy_adapter = pbuddy_padapter; ++ pbuddy_padapter->pbuddy_adapter = adapter; ++ // clear global value ++ pbuddy_padapter = NULL; ++ DBG_871X("%s(): pbuddy_padapter exist, Exchange Information\n",__FUNCTION__); ++ } ++ } ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ if (dvobj->InterfaceNumber == 0) { ++ //set adapter_type/iface type ++ adapter->isprimary = _TRUE; ++ adapter->adapter_type = PRIMARY_ADAPTER; ++ adapter->iface_type = IFACE_PORT0; ++ DBG_871X("%s(): PRIMARY_ADAPTER\n",__FUNCTION__); ++ } else { ++ //set adapter_type/iface type ++ adapter->isprimary = _FALSE; ++ adapter->adapter_type = SECONDARY_ADAPTER; ++ adapter->iface_type = IFACE_PORT1; ++ DBG_871X("%s(): SECONDARY_ADAPTER\n",__FUNCTION__); ++ } ++#endif ++#endif ++ }else { ++ pbuddy_padapter = NULL; ++ } ++exit: ++ return status; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/core/rtw_xmit.c +@@ -0,0 +1,4156 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_XMIT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++#include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++ ++static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; ++static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; ++ ++static void _init_txservq(struct tx_servq *ptxservq) ++{ ++_func_enter_; ++ _rtw_init_listhead(&ptxservq->tx_pending); ++ _rtw_init_queue(&ptxservq->sta_pending); ++ ptxservq->qcnt = 0; ++_func_exit_; ++} ++ ++ ++void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv) ++{ ++ ++_func_enter_; ++ ++ _rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof (struct sta_xmit_priv)); ++ ++ _rtw_spinlock_init(&psta_xmitpriv->lock); ++ ++ //for(i = 0 ; i < MAX_NUMBLKS; i++) ++ // _init_txservq(&(psta_xmitpriv->blk_q[i])); ++ ++ _init_txservq(&psta_xmitpriv->be_q); ++ _init_txservq(&psta_xmitpriv->bk_q); ++ _init_txservq(&psta_xmitpriv->vi_q); ++ _init_txservq(&psta_xmitpriv->vo_q); ++ _rtw_init_listhead(&psta_xmitpriv->legacy_dz); ++ _rtw_init_listhead(&psta_xmitpriv->apsd); ++ ++_func_exit_; ++ ++} ++ ++s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) ++{ ++ int i; ++ struct xmit_buf *pxmitbuf; ++ struct xmit_frame *pxframe; ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv)); ++ ++ _rtw_spinlock_init(&pxmitpriv->lock); ++ _rtw_spinlock_init(&pxmitpriv->lock_sctx); ++ _rtw_init_sema(&pxmitpriv->xmit_sema, 0); ++ _rtw_init_sema(&pxmitpriv->terminate_xmitthread_sema, 0); ++ ++ /* ++ Please insert all the queue initializaiton using _rtw_init_queue below ++ */ ++ ++ pxmitpriv->adapter = padapter; ++ ++ //for(i = 0 ; i < MAX_NUMBLKS; i++) ++ // _rtw_init_queue(&pxmitpriv->blk_strms[i]); ++ ++ _rtw_init_queue(&pxmitpriv->be_pending); ++ _rtw_init_queue(&pxmitpriv->bk_pending); ++ _rtw_init_queue(&pxmitpriv->vi_pending); ++ _rtw_init_queue(&pxmitpriv->vo_pending); ++ _rtw_init_queue(&pxmitpriv->bm_pending); ++ ++ //_rtw_init_queue(&pxmitpriv->legacy_dz_queue); ++ //_rtw_init_queue(&pxmitpriv->apsd_queue); ++ ++ _rtw_init_queue(&pxmitpriv->free_xmit_queue); ++ ++ /* ++ Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME, ++ and initialize free_xmit_frame below. ++ Please also apply free_txobj to link_up all the xmit_frames... ++ */ ++ ++ pxmitpriv->pallocated_frame_buf = rtw_zvmalloc(NR_XMITFRAME * sizeof(struct xmit_frame) + 4); ++ ++ if (pxmitpriv->pallocated_frame_buf == NULL){ ++ pxmitpriv->pxmit_frame_buf =NULL; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_frame fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4); ++ //pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - ++ // ((SIZE_PTR) (pxmitpriv->pallocated_frame_buf) &3); ++ ++ pxframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; ++ ++ for (i = 0; i < NR_XMITFRAME; i++) ++ { ++ _rtw_init_listhead(&(pxframe->list)); ++ ++ pxframe->padapter = padapter; ++ pxframe->frame_tag = NULL_FRAMETAG; ++ ++ pxframe->pkt = NULL; ++ ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xmit_queue.queue)); ++ ++ pxframe++; ++ } ++ ++ pxmitpriv->free_xmitframe_cnt = NR_XMITFRAME; ++ ++ pxmitpriv->frag_len = MAX_FRAG_THRESHOLD; ++ ++ ++ //init xmit_buf ++ _rtw_init_queue(&pxmitpriv->free_xmitbuf_queue); ++ _rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue); ++ ++ pxmitpriv->pallocated_xmitbuf = rtw_zvmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4); ++ ++ if (pxmitpriv->pallocated_xmitbuf == NULL){ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_buf fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4); ++ //pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - ++ // ((SIZE_PTR) (pxmitpriv->pallocated_xmitbuf) &3); ++ ++ pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmitbuf; ++ ++ for (i = 0; i < NR_XMITBUFF; i++) ++ { ++ _rtw_init_listhead(&pxmitbuf->list); ++ ++ pxmitbuf->priv_data = NULL; ++ pxmitbuf->padapter = padapter; ++ pxmitbuf->ext_tag = _FALSE; ++ ++/* ++ pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++ //pxmitbuf->pbuf = pxmitbuf->pallocated_buf + XMITBUF_ALIGN_SZ -((SIZE_PTR) (pxmitbuf->pallocated_buf) &(XMITBUF_ALIGN_SZ-1)); ++*/ ++ ++ if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ))) == _FAIL) { ++ res= _FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->phead = pxmitbuf->pbuf; ++ pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ; ++ pxmitbuf->len = 0; ++ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; ++#endif ++ ++ pxmitbuf->flags = XMIT_VO_QUEUE; ++ ++ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue)); ++ #ifdef DBG_XMIT_BUF ++ pxmitbuf->no=i; ++ #endif ++ ++ pxmitbuf++; ++ ++ } ++ ++ pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF; ++ ++ /* init xframe_ext queue, the same count as extbuf */ ++ _rtw_init_queue(&pxmitpriv->free_xframe_ext_queue); ++ ++ pxmitpriv->xframe_ext_alloc_addr = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); ++ ++ if (pxmitpriv->xframe_ext_alloc_addr == NULL){ ++ pxmitpriv->xframe_ext = NULL; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xframe_ext fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ pxmitpriv->xframe_ext = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->xframe_ext_alloc_addr), 4); ++ pxframe = (struct xmit_frame*)pxmitpriv->xframe_ext; ++ ++ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { ++ _rtw_init_listhead(&(pxframe->list)); ++ ++ pxframe->padapter = padapter; ++ pxframe->frame_tag = NULL_FRAMETAG; ++ ++ pxframe->pkt = NULL; ++ ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ pxframe->ext_tag = 1; ++ ++ rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xframe_ext_queue.queue)); ++ ++ pxframe++; ++ } ++ pxmitpriv->free_xframe_ext_cnt = NR_XMIT_EXTBUFF; ++ ++ // Init xmit extension buff ++ _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); ++ ++ pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); ++ ++ if (pxmitpriv->pallocated_xmit_extbuf == NULL){ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); ++ ++ pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmit_extbuf; ++ ++ for (i = 0; i < NR_XMIT_EXTBUFF; i++) ++ { ++ _rtw_init_listhead(&pxmitbuf->list); ++ ++ pxmitbuf->priv_data = NULL; ++ pxmitbuf->padapter = padapter; ++ pxmitbuf->ext_tag = _TRUE; ++ ++/* ++ pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMIT_EXTBUF_SZ); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), 4); ++*/ ++ ++ if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ)) == _FAIL) { ++ res= _FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->phead = pxmitbuf->pbuf; ++ pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMIT_EXTBUF_SZ; ++ pxmitbuf->len = 0; ++ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; ++#endif ++ ++ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); ++ #ifdef DBG_XMIT_BUF ++ pxmitbuf->no=i; ++ #endif ++ pxmitbuf++; ++ ++ } ++ ++ pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF; ++ ++ rtw_alloc_hwxmits(padapter); ++ rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); ++ ++#ifdef CONFIG_USB_HCI ++ pxmitpriv->txirp_cnt=1; ++ ++ _rtw_init_sema(&(pxmitpriv->tx_retevt), 0); ++ ++ //per AC pending irp ++ pxmitpriv->beq_cnt = 0; ++ pxmitpriv->bkq_cnt = 0; ++ pxmitpriv->viq_cnt = 0; ++ pxmitpriv->voq_cnt = 0; ++#endif ++ ++ ++#ifdef CONFIG_XMIT_ACK ++ pxmitpriv->ack_tx = _FALSE; ++ _rtw_mutex_init(&pxmitpriv->ack_tx_mutex); ++ rtw_sctx_init(&pxmitpriv->ack_tx_ops, 0); ++#endif ++ ++ rtw_hal_init_xmit_priv(padapter); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv); ++void rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv) ++{ ++ _rtw_spinlock_free(&pxmitpriv->lock); ++ _rtw_free_sema(&pxmitpriv->xmit_sema); ++ _rtw_free_sema(&pxmitpriv->terminate_xmitthread_sema); ++ ++ _rtw_spinlock_free(&pxmitpriv->be_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->bk_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->vi_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->vo_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->bm_pending.lock); ++ ++ //_rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock); ++ //_rtw_spinlock_free(&pxmitpriv->apsd_queue.lock); ++ ++ _rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock); ++ _rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock); ++ _rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock); ++} ++ ++ ++void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv) ++{ ++ int i; ++ _adapter *padapter = pxmitpriv->adapter; ++ struct xmit_frame *pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; ++ ++ _func_enter_; ++ ++ rtw_hal_free_xmit_priv(padapter); ++ ++ rtw_mfree_xmit_priv_lock(pxmitpriv); ++ ++ if(pxmitpriv->pxmit_frame_buf==NULL) ++ goto out; ++ ++ for(i=0; ipallocated_buf) ++ // rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ); ++ ++ pxmitbuf++; ++ } ++ ++ if(pxmitpriv->pallocated_frame_buf) { ++ rtw_vmfree(pxmitpriv->pallocated_frame_buf, NR_XMITFRAME * sizeof(struct xmit_frame) + 4); ++ } ++ ++ ++ if(pxmitpriv->pallocated_xmitbuf) { ++ rtw_vmfree(pxmitpriv->pallocated_xmitbuf, NR_XMITBUFF * sizeof(struct xmit_buf) + 4); ++ } ++ ++ /* free xframe_ext queue, the same count as extbuf */ ++ if ((pxmitframe = (struct xmit_frame*)pxmitpriv->xframe_ext)) { ++ for (i=0; ixframe_ext_alloc_addr) ++ rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); ++ _rtw_spinlock_free(&pxmitpriv->free_xframe_ext_queue.lock); ++ ++ // free xmit extension buff ++ _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); ++ ++ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; ++ for(i=0; ipallocated_buf) ++ // rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMIT_EXTBUF_SZ); ++ ++ pxmitbuf++; ++ } ++ ++ if(pxmitpriv->pallocated_xmit_extbuf) { ++ rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); ++ } ++ ++ rtw_free_hwxmits(padapter); ++ ++#ifdef CONFIG_XMIT_ACK ++ _rtw_mutex_free(&pxmitpriv->ack_tx_mutex); ++#endif ++ ++out: ++ ++_func_exit_; ++ ++} ++ ++static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ u32 sz; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *psta = pattrib->psta; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pattrib->psta) ++ { ++ psta = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); ++ } ++ ++ if(psta==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return; ++ } ++ ++ if (pattrib->nr_frags != 1) ++ { ++ sz = padapter->xmitpriv.frag_len; ++ } ++ else //no frag ++ { ++ sz = pattrib->last_txcmdsz; ++ } ++ ++ // (1) RTS_Threshold is compared to the MPDU, not MSDU. ++ // (2) If there are more than one frag in this MSDU, only the first frag uses protection frame. ++ // Other fragments are protected by previous fragment. ++ // So we only need to check the length of first fragment. ++ if(pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) ++ { ++ if(sz > padapter->registrypriv.rts_thresh) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ } ++ else ++ { ++ if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ else ++ pattrib->vcs_mode = NONE_VCS; ++ } ++ } ++ else ++ { ++ while (_TRUE) ++ { ++#if 0 //Todo ++ //check IOT action ++ if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) ++ { ++ pattrib->vcs_mode = CTS_TO_SELF; ++ pattrib->rts_rate = MGN_24M; ++ break; ++ } ++ else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE)) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ pattrib->rts_rate = MGN_24M; ++ break; ++ } ++#endif ++ ++ //IOT action ++ if((pmlmeinfo->assoc_AP_vendor == atherosAP) && (pattrib->ampdu_en==_TRUE) && ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) ++ { ++ pattrib->vcs_mode = CTS_TO_SELF; ++ break; ++ } ++ ++ ++ //check ERP protection ++ if(psta->rtsen || psta->cts2self) ++ { ++ if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ ++ break; ++ } ++ ++ //check HT op mode ++ if(pattrib->ht_en) ++ { ++ u8 HTOpMode = pmlmeinfo->HT_protection; ++ if((pmlmeext->cur_bwmode && (HTOpMode == 2 || HTOpMode == 3)) || ++ (!pmlmeext->cur_bwmode && HTOpMode == 3) ) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ } ++ ++ //check rts ++ if(sz > padapter->registrypriv.rts_thresh) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ ++ //to do list: check MIMO power save condition. ++ ++ //check AMPDU aggregation for TXOP ++ if(pattrib->ampdu_en==_TRUE) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ ++ pattrib->vcs_mode = NONE_VCS; ++ break; ++ } ++ } ++} ++ ++static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta) ++{ ++ /*if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ else ++ pattrib->vcs_mode = NONE_VCS;*/ ++ ++ pattrib->mdata = 0; ++ pattrib->eosp = 0; ++ pattrib->triggered=0; ++ ++ //qos_en, ht_en, init rate, ,bw, ch_offset, sgi ++ pattrib->qos_en = psta->qos_option; ++ pattrib->ht_en = psta->htpriv.ht_option; ++ pattrib->raid = psta->raid; ++ pattrib->bwmode = psta->htpriv.bwmode; ++ pattrib->ch_offset = psta->htpriv.ch_offset; ++ pattrib->sgi= psta->htpriv.sgi; ++ pattrib->ampdu_en = _FALSE; ++ ++ //if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ //{ ++ // if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ // pattrib->ampdu_en = _TRUE; ++ //} ++ ++ ++ pattrib->retry_ctrl = _FALSE; ++ ++} ++ ++u8 qos_acm(u8 acm_mask, u8 priority) ++{ ++ u8 change_priority = priority; ++ ++ switch (priority) ++ { ++ case 0: ++ case 3: ++ if(acm_mask & BIT(1)) ++ change_priority = 1; ++ break; ++ case 1: ++ case 2: ++ break; ++ case 4: ++ case 5: ++ if(acm_mask & BIT(2)) ++ change_priority = 0; ++ break; ++ case 6: ++ case 7: ++ if(acm_mask & BIT(3)) ++ change_priority = 5; ++ break; ++ default: ++ DBG_871X("qos_acm(): invalid pattrib->priority: %d!!!\n", priority); ++ break; ++ } ++ ++ return change_priority; ++} ++ ++static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) ++{ ++ struct ethhdr etherhdr; ++ struct iphdr ip_hdr; ++ s32 UserPriority = 0; ++ ++ ++ _rtw_open_pktfile(ppktfile->pkt, ppktfile); ++ _rtw_pktfile_read(ppktfile, (unsigned char*)ðerhdr, ETH_HLEN); ++ ++ // get UserPriority from IP hdr ++ if (pattrib->ether_type == 0x0800) { ++ _rtw_pktfile_read(ppktfile, (u8*)&ip_hdr, sizeof(ip_hdr)); ++// UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3; ++ UserPriority = ip_hdr.tos >> 5; ++ } else if (pattrib->ether_type == 0x888e) { ++ // "When priority processing of data frames is supported, ++ // a STA's SME should send EAPOL-Key frames at the highest priority." ++ UserPriority = 7; ++ } ++ ++ pattrib->priority = UserPriority; ++ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; ++ pattrib->subtype = WIFI_QOS_DATA_TYPE; ++} ++ ++static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib) ++{ ++ uint i; ++ struct pkt_file pktfile; ++ struct sta_info *psta = NULL; ++ struct ethhdr etherhdr; ++ ++ sint bmcast; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ sint res = _SUCCESS; ++ ++ _func_enter_; ++ ++ _rtw_open_pktfile(pkt, &pktfile); ++ i = _rtw_pktfile_read(&pktfile, (u8*)ðerhdr, ETH_HLEN); ++ ++ pattrib->ether_type = ntohs(etherhdr.h_proto); ++ ++ ++ _rtw_memcpy(pattrib->dst, ðerhdr.h_dest, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, ðerhdr.h_source, ETH_ALEN); ++ ++ pattrib->pctrl = 0; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, get_bssid(pmlmepriv), ETH_ALEN); ++ } ++ ++ pattrib->pktlen = pktfile.pkt_len; ++ ++ if (ETH_P_IP == pattrib->ether_type) ++ { ++ // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time ++ // to prevent DHCP protocol fail ++ u8 tmp[24]; ++ _rtw_pktfile_read(&pktfile, &tmp[0], 24); ++ pattrib->dhcp_pkt = 0; ++ if (pktfile.pkt_len > 282) {//MINIMUM_DHCP_PACKET_SIZE) { ++ if (ETH_P_IP == pattrib->ether_type) {// IP header ++ if (((tmp[21] == 68) && (tmp[23] == 67)) || ++ ((tmp[21] == 67) && (tmp[23] == 68))) { ++ // 68 : UDP BOOTP client ++ // 67 : UDP BOOTP server ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("======================update_attrib: get DHCP Packet \n")); ++ // Use low rate to send DHCP packet. ++ //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) ++ //{ ++ // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m ++ // tcb_desc->bTxDisableRateFallBack = false; ++ //} ++ //else ++ // pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; ++ //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); ++ pattrib->dhcp_pkt = 1; ++ } ++ } ++ } ++ } ++ ++ if ( (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) ++ { ++ rtw_set_scan_deny(padapter, 3000); ++ } ++ ++#ifdef CONFIG_LPS ++ // If EAPOL , ARP , OR DHCP packet, driver must be in active mode. ++ if ( (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) ++ { ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); ++ } ++#endif ++ ++ bmcast = IS_MCAST(pattrib->ra); ++ ++ // get sta_info ++ if (bmcast) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta == NULL) { // if we cannot get psta => drrp the pkt ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); ++ #endif ++ res =_FAIL; ++ goto exit; ++ } ++ else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED))) ++ { ++ res =_FAIL; ++ goto exit; ++ } ++ } ++ ++ if (psta) ++ { ++ pattrib->mac_id = psta->mac_id; ++ pattrib->psta = psta; ++ } ++ else ++ { ++ // if we cannot get psta => drop the pkt ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pattrib->ack_policy = 0; ++ // get ether_hdr_len ++ pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag ++ ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA_TYPE; ++ pattrib->priority = 0; ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ if(psta->qos_option) ++ set_qos(&pktfile, pattrib); ++ } ++ else ++ { ++ if(pqospriv->qos_option) ++ { ++ set_qos(&pktfile, pattrib); ++ ++ if(pmlmepriv->acm_mask != 0) ++ { ++ pattrib->priority = qos_acm(pmlmepriv->acm_mask, pattrib->priority); ++ } ++ } ++ } ++ ++ //pattrib->priority = 5; //force to used VI queue, for testing ++ ++ if (psta->ieee8021x_blocked == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n psta->ieee8021x_blocked == _TRUE \n")); ++ ++ pattrib->encrypt = 0; ++ ++ if((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npsta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%.4x) != 0x888e\n",pattrib->ether_type)); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s psta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%.4x) != 0x888e\n", __FUNCTION__,pattrib->ether_type); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } ++ } ++ else ++ { ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); ++ ++ switch(psecuritypriv->dot11AuthAlgrthm) ++ { ++ case dot11AuthAlgrthm_Open: ++ case dot11AuthAlgrthm_Shared: ++ case dot11AuthAlgrthm_Auto: ++ pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case dot11AuthAlgrthm_8021X: ++ if(bmcast) ++ pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid; ++ else ++ pattrib->key_idx = 0; ++ break; ++ default: ++ pattrib->key_idx = 0; ++ break; ++ } ++ ++ ++ } ++ ++ switch (pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ pattrib->iv_len = 4; ++ pattrib->icv_len = 4; ++ break; ++ ++ case _TKIP_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 4; ++ ++ if(padapter->securitypriv.busetkipkey==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npadapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", padapter->securitypriv.busetkipkey)); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s padapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", __FUNCTION__, padapter->securitypriv.busetkipkey); ++ #endif ++ res =_FAIL; ++ goto exit; ++ } ++ ++ break; ++ case _AES_: ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n pattrib->encrypt=%d (_AES_)\n",pattrib->encrypt)); ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 8; ++ break; ++ ++ default: ++ pattrib->iv_len = 0; ++ pattrib->icv_len = 0; ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ++ ("update_attrib: encrypt=%d securitypriv.sw_encrypt=%d\n", ++ pattrib->encrypt, padapter->securitypriv.sw_encrypt)); ++ ++ if (pattrib->encrypt && ++ ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) ++ { ++ pattrib->bswenc = _TRUE; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_, ++ ("update_attrib: encrypt=%d securitypriv.hw_decrypted=%d bswenc=_TRUE\n", ++ pattrib->encrypt, padapter->securitypriv.sw_encrypt)); ++ } else { ++ pattrib->bswenc = _FALSE; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("update_attrib: bswenc=_FALSE\n")); ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if((pattrib->encrypt && bmcast) || (pattrib->encrypt ==_WEP40_) || (pattrib->encrypt ==_WEP104_)) ++ { ++ pattrib->bswenc = _TRUE;//force using sw enc. ++ } ++#endif ++ ++ rtw_set_tx_chksum_offload(pkt, pattrib); ++ ++ update_attrib_phy_info(pattrib, psta); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe){ ++ sint curfragnum,length; ++ u8 *pframe, *payload,mic[8]; ++ struct mic_data micdata; ++ struct sta_info *stainfo; ++ struct qos_priv *pqospriv= &(padapter->mlmepriv.qospriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ u8 priority[4]={0x0,0x0,0x0,0x0}; ++ sint bmcst = IS_MCAST(pattrib->ra); ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); ++ } ++ ++ if(stainfo==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return _FAIL; ++ } ++ ++ if(!(stainfo->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, stainfo->state); ++ return _FAIL; ++ } ++ ++_func_enter_; ++ ++ if(pattrib->encrypt ==_TKIP_)//if(psecuritypriv->dot11PrivacyAlgrthm==_TKIP_PRIVACY_) ++ { ++ //encode mic code ++ if(stainfo!= NULL){ ++ u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = pxmitframe->buf_addr + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = pxmitframe->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ if(bmcst) ++ { ++ if(_rtw_memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16)==_TRUE){ ++ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); ++ //rtw_msleep_os(10); ++ return _FAIL; ++ } ++ //start to calculate the mic code ++ rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey); ++ } ++ else ++ { ++ if(_rtw_memcmp(&stainfo->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ ++ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); ++ //rtw_msleep_os(10); ++ return _FAIL; ++ } ++ //start to calculate the mic code ++ rtw_secmicsetkey(&micdata, &stainfo->dot11tkiptxmickey.skey[0]); ++ } ++ ++ if(pframe[1]&1){ //ToDS==1 ++ rtw_secmicappend(&micdata, &pframe[16], 6); //DA ++ if(pframe[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &pframe[24], 6); ++ else ++ rtw_secmicappend(&micdata, &pframe[10], 6); ++ } ++ else{ //ToDS==0 ++ rtw_secmicappend(&micdata, &pframe[4], 6); //DA ++ if(pframe[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &pframe[16], 6); ++ else ++ rtw_secmicappend(&micdata, &pframe[10], 6); ++ ++ } ++ ++ //if(pqospriv->qos_option==1) ++ if(pattrib->qos_en) ++ priority[0]=(u8)pxmitframe->attrib.priority; ++ ++ ++ rtw_secmicappend(&micdata, &priority[0], 4); ++ ++ payload=pframe; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ payload=(u8 *)RND4((SIZE_PTR)(payload)); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("===curfragnum=%d, pframe= 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n", ++ curfragnum,*payload, *(payload+1),*(payload+2),*(payload+3),*(payload+4),*(payload+5),*(payload+6),*(payload+7))); ++ ++ payload=payload+pattrib->hdrlen+pattrib->iv_len; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d pattrib->hdrlen=%d pattrib->iv_len=%d",curfragnum,pattrib->hdrlen,pattrib->iv_len)); ++ if((curfragnum+1)==pattrib->nr_frags){ ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); ++ rtw_secmicappend(&micdata, payload,length); ++ payload=payload+length; ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); ++ rtw_secmicappend(&micdata, payload, length); ++ payload=payload+length+pattrib->icv_len; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d length=%d pattrib->icv_len=%d",curfragnum,length,pattrib->icv_len)); ++ } ++ } ++ rtw_secgetmic(&micdata,&(mic[0])); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: before add mic code!!!\n")); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: pattrib->last_txcmdsz=%d!!!\n",pattrib->last_txcmdsz)); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: mic[0]=0x%.2x ,mic[1]=0x%.2x ,mic[2]=0x%.2x ,mic[3]=0x%.2x \n\ ++ mic[4]=0x%.2x ,mic[5]=0x%.2x ,mic[6]=0x%.2x ,mic[7]=0x%.2x !!!!\n", ++ mic[0],mic[1],mic[2],mic[3],mic[4],mic[5],mic[6],mic[7])); ++ //add mic code and add the mic code length in last_txcmdsz ++ ++ _rtw_memcpy(payload, &(mic[0]),8); ++ pattrib->last_txcmdsz+=8; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("\n ========last pkt========\n")); ++ payload=payload-pattrib->last_txcmdsz+8; ++ for(curfragnum=0;curfragnumlast_txcmdsz;curfragnum=curfragnum+8) ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,(" %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x ", ++ *(payload+curfragnum), *(payload+curfragnum+1), *(payload+curfragnum+2),*(payload+curfragnum+3), ++ *(payload+curfragnum+4),*(payload+curfragnum+5),*(payload+curfragnum+6),*(payload+curfragnum+7))); ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: rtw_get_stainfo==NULL!!!\n")); ++ } ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++static s32 xmitframe_swencrypt(_adapter *padapter, struct xmit_frame *pxmitframe){ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ //struct security_priv *psecuritypriv=&padapter->securitypriv; ++ ++_func_enter_; ++ ++ //if((psecuritypriv->sw_encrypt)||(pattrib->bswenc)) ++ if(pattrib->bswenc) ++ { ++ //DBG_871X("start xmitframe_swencrypt\n"); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_alert_,("### xmitframe_swencrypt\n")); ++ switch(pattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ rtw_wep_encrypt(padapter, (u8 *)pxmitframe); ++ break; ++ case _TKIP_: ++ rtw_tkip_encrypt(padapter, (u8 *)pxmitframe); ++ break; ++ case _AES_: ++ rtw_aes_encrypt(padapter, (u8 * )pxmitframe); ++ break; ++ default: ++ break; ++ } ++ ++ } else { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_notice_,("### xmitframe_hwencrypt\n")); ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++s32 rtw_make_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) ++{ ++ u16 *qc; ++ ++ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv = &pmlmepriv->qospriv; ++ u8 qos_option = _FALSE; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL, *psta_backup=NULL; ++ u8 direct_link=0; ++#endif //CONFIG_TDLS ++ ++ sint res = _SUCCESS; ++ u16 *fctrl = &pwlanhdr->frame_ctl; ++ ++ struct sta_info *psta; ++ ++ sint bmcst = IS_MCAST(pattrib->ra); ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ if(bmcst) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ } ++ ++ if(psta==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return _FAIL; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return _FAIL; ++ } ++ ++ _rtw_memset(hdr, 0, WLANHDR_OFFSET); ++ ++ SetFrameSubType(fctrl, pattrib->subtype); ++ ++ if (pattrib->subtype & WIFI_DATA_TYPE) ++ { ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { ++ //to_ds = 1, fr_ds = 0; ++#ifdef CONFIG_TDLS ++ if((ptdlsinfo->setup_state == TDLS_LINKED_STATE)){ ++ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ if((ptdls_sta!=NULL)&&(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)&&(pattrib->ether_type!=0x0806)){ ++ //TDLS data transfer, ToDS=0, FrDs=0 ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ direct_link=1; ++ }else{ ++ // 1.Data transfer to AP ++ // 2.Arp pkt will relayed by AP ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ }else ++#endif //CONFIG_TDLS ++ { ++ //Data transfer to AP ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ ++ if (pqospriv->qos_option) ++ qos_option = _TRUE; ++ ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ) { ++ //to_ds = 0, fr_ds = 1; ++ SetFrDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); ++ ++ if(psta->qos_option) ++ qos_option = _TRUE; ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ ++ if(psta->qos_option) ++ qos_option = _TRUE; ++ } ++ else { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("fw_state:%x is not allowed to xmit frame\n", get_fwstate(pmlmepriv))); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ if(pattrib->mdata) ++ SetMData(fctrl); ++ ++ if (pattrib->encrypt) ++ SetPrivacy(fctrl); ++ ++ if (qos_option) ++ { ++ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); ++ ++ if (pattrib->priority) ++ SetPriority(qc, pattrib->priority); ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ } ++ ++ //TODO: fill HT Control Field ++ ++ //Update Seq Num will be handled by f/w ++ { ++ if(psta){ ++#ifdef CONFIG_TDLS ++ if(direct_link==1) ++ { ++ psta_backup = psta; ++ psta = ptdls_sta; ++ } ++#endif //CONFIG_TDLS ++ ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ ++ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ ++ SetSeqNum(hdr, pattrib->seqnum); ++ ++ ++ //check if enable ampdu ++ if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ { ++ if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ pattrib->ampdu_en = _TRUE; ++ } ++ ++ //re-check if enable ampdu by BA_starting_seqctrl ++ if(pattrib->ampdu_en == _TRUE) ++ { ++ u16 tx_seq; ++ ++ tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; ++ ++ //check BA_starting_seqctrl ++ if(SN_LESS(pattrib->seqnum, tx_seq)) ++ { ++ //DBG_871X("tx ampdu seqnum(%d) < tx_seq(%d)\n", pattrib->seqnum, tx_seq); ++ pattrib->ampdu_en = _FALSE;//AGG BK ++ } ++ else if(SN_EQUAL(pattrib->seqnum, tx_seq)) ++ { ++ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff; ++ ++ pattrib->ampdu_en = _TRUE;//AGG EN ++ } ++ else ++ { ++ //DBG_871X("tx ampdu over run\n"); ++ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff; ++ pattrib->ampdu_en = _TRUE;//AGG EN ++ } ++ ++ } ++ ++#ifdef CONFIG_TDLS ++ if(direct_link==1) ++ { ++ if (pattrib->encrypt){ ++ pattrib->encrypt= _AES_; ++ pattrib->iv_len=8; ++ pattrib->icv_len=8; ++ } ++ ++ //qos_en, ht_en, init rate, ,bw, ch_offset, sgi ++ //pattrib->qos_en = ptdls_sta->qos_option; ++ pattrib->ht_en = ptdls_sta->htpriv.ht_option; ++ pattrib->raid = ptdls_sta->raid; ++ pattrib->bwmode = ptdls_sta->htpriv.bwmode; ++ pattrib->ch_offset = ptdls_sta->htpriv.ch_offset; ++ pattrib->sgi= ptdls_sta->htpriv.sgi; ++ ++ pattrib->mac_id = ptdls_sta->mac_id; ++ ++ psta = psta_backup; ++ } ++#endif //CONFIG_TDLS ++ ++ } ++ } ++ ++ } ++ else ++ { ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++s32 rtw_txframes_pending(_adapter *padapter) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ return ((_rtw_queue_empty(&pxmitpriv->be_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->bk_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->vi_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->vo_pending) == _FALSE)); ++} ++ ++s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ int priority = pattrib->priority; ++ ++ if(pattrib->psta) ++ { ++ psta = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); ++ } ++ ++ if(psta==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return 0; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return 0; ++ } ++ ++ switch(priority) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ break; ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ break; ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ break; ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ break; ++ ++ } ++ ++ return ptxservq->qcnt; ++} ++ ++#ifdef CONFIG_TDLS ++ ++int rtw_build_tdls_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 action) ++{ ++ int res=_SUCCESS; ++ ++ switch(action){ ++ case TDLS_SETUP_REQUEST: ++ rtw_build_tdls_setup_req_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ rtw_build_tdls_setup_rsp_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ rtw_build_tdls_setup_cfm_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_TEARDOWN: ++ rtw_build_tdls_teardown_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ rtw_build_tdls_dis_req_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ rtw_build_tdls_peer_traffic_indication_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ rtw_build_tdls_ch_switch_req_ies(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ rtw_build_tdls_ch_switch_rsp_ies(padapter, pxmitframe, pframe); ++ break; ++#ifdef CONFIG_WFD ++ case TUNNELED_PROBE_REQ: ++ rtw_build_tunneled_probe_req_ies(padapter, pxmitframe, pframe); ++ break; ++ case TUNNELED_PROBE_RSP: ++ rtw_build_tunneled_probe_rsp_ies(padapter, pxmitframe, pframe); ++ break; ++#endif //CONFIG_WFD ++ default: ++ res=_FAIL; ++ break; ++ } ++ ++ return res; ++} ++ ++s32 rtw_make_tdls_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib, u8 action) ++{ ++ u16 *qc; ++ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv = &pmlmepriv->qospriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL, *ptdls_sta=NULL; ++ u8 tdls_seq=0, baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; ++ ++ sint res = _SUCCESS; ++ u16 *fctrl = &pwlanhdr->frame_ctl; ++ ++_func_enter_; ++ ++ _rtw_memset(hdr, 0, WLANHDR_OFFSET); ++ ++ SetFrameSubType(fctrl, pattrib->subtype); ++ ++ switch(action){ ++ case TDLS_SETUP_REQUEST: ++ case TDLS_SETUP_RESPONSE: ++ case TDLS_SETUP_CONFIRM: ++ case TDLS_TEARDOWN: //directly to peer STA or via AP ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ case TDLS_PEER_PSM_REQUEST: //directly to peer STA or via AP ++ case TUNNELED_PROBE_REQ: ++ case TUNNELED_PROBE_RSP: ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ case TDLS_PEER_PSM_RESPONSE: ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ tdls_seq=1; ++ break; ++ case TDLS_DISCOVERY_REQUEST: //unicast: directly to peer sta, Bcast: via AP ++ if(_rtw_memcmp(pattrib->dst, baddr, ETH_ALEN) ) ++ { ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ else ++ { ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ tdls_seq=1; ++ } ++ break; ++ } ++ ++ if (pattrib->encrypt) ++ SetPrivacy(fctrl); ++ ++ if (pqospriv->qos_option) ++ { ++ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); ++ if (pattrib->priority) ++ SetPriority(qc, pattrib->priority); ++ SetAckpolicy(qc, pattrib->ack_policy); ++ } ++ ++ psta = pattrib->psta; ++ ++ // 1. update seq_num per link by sta_info ++ // 2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len ++ if(tdls_seq==1){ ++ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); ++ if(ptdls_sta){ ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(hdr, pattrib->seqnum); ++ ++ if (pattrib->encrypt){ ++ pattrib->encrypt= _AES_; ++ pattrib->iv_len=8; ++ pattrib->icv_len=8; ++ } ++ }else{ ++ res=_FAIL; ++ goto exit; ++ } ++ }else if(psta){ ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(hdr, pattrib->seqnum); ++ } ++ ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++s32 rtw_xmit_tdls_coalesce(_adapter * padapter, struct xmit_frame * pxmitframe, u8 action) ++{ ++ s32 llc_sz; ++ ++ u8 *pframe, *mem_start; ++ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 *pbuf_start; ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ s32 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ if(bmcst) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ } ++ ++ if(psta==NULL) ++ return _FAIL; ++ ++ if (pxmitframe->buf_addr == NULL) ++ return _FAIL; ++ ++ pbuf_start = pxmitframe->buf_addr; ++ mem_start = pbuf_start + TXDESC_OFFSET; ++ ++ if (rtw_make_tdls_wlanhdr(padapter, mem_start, pattrib, action) == _FAIL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pframe = mem_start; ++ pframe += pattrib->hdrlen; ++ ++ //adding icv, if necessary... ++ if (pattrib->iv_len) ++ { ++ if (psta != NULL) ++ { ++ switch(pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ break; ++ case _TKIP_: ++ if(bmcst) ++ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ case _AES_: ++ if(bmcst) ++ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ AES_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ } ++ } ++ ++ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); ++ pframe += pattrib->iv_len; ++ ++ } ++ ++ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ ++ //pattrib->pktlen will be counted in rtw_build_tdls_ies ++ pattrib->pktlen = 0; ++ ++ rtw_build_tdls_ies(padapter, pxmitframe, pframe, action); ++ ++ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { ++ pframe += pattrib->pktlen; ++ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); ++ pframe += pattrib->icv_len; ++ } ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + llc_sz + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0) + pattrib->pktlen; ++ ++ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) ++ { ++ goto exit; ++ } ++ ++ xmitframe_swencrypt(padapter, pxmitframe); ++ ++ update_attrib_vcs_info(padapter, pxmitframe); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++#endif //CONFIG_TDLS ++ ++/* ++ * Calculate wlan 802.11 packet MAX size from pkt_attrib ++ * This function doesn't consider fragment case ++ */ ++u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib) ++{ ++ u32 len = 0; ++ ++ len = pattrib->hdrlen + pattrib->iv_len; // WLAN Header and IV ++ len += SNAP_SIZE + sizeof(u16); // LLC ++ len += pattrib->pktlen; ++ if (pattrib->encrypt == _TKIP_) len += 8; // MIC ++ len += pattrib->icv_len; // ICV ++ ++ return len; ++} ++ ++/* ++ ++This sub-routine will perform all the following: ++ ++1. remove 802.3 header. ++2. create wlan_header, based on the info in pxmitframe ++3. append sta's iv/ext-iv ++4. append LLC ++5. move frag chunk from pframe to pxmitframe->mem ++6. apply sw-encrypt, if necessary. ++ ++*/ ++s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) ++{ ++ struct pkt_file pktfile; ++ ++ s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; ++ ++ SIZE_PTR addr; ++ ++ u8 *pframe, *mem_start; ++ ++ struct sta_info *psta; ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ //struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ u8 *pbuf_start; ++ ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ s32 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) ++ { ++ psta = pattrib->psta; ++ } else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ { ++ ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return _FAIL; ++ } ++ ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return _FAIL; ++ } ++ ++ if (pxmitframe->buf_addr == NULL){ ++ DBG_8192C("==> %s buf_addr==NULL \n",__FUNCTION__); ++ return _FAIL; ++ } ++ ++ pbuf_start = pxmitframe->buf_addr; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ mem_start = pbuf_start + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ mem_start = pbuf_start + TXDESC_OFFSET; ++#endif ++ ++ if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n")); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_open_pktfile(pkt, &pktfile); ++ _rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen); ++ ++ frg_inx = 0; ++ frg_len = pxmitpriv->frag_len - 4;//2346-4 = 2342 ++ ++ while (1) ++ { ++ llc_sz = 0; ++ ++ mpdu_len = frg_len; ++ ++ pframe = mem_start; ++ ++ SetMFrag(mem_start); ++ ++ pframe += pattrib->hdrlen; ++ mpdu_len -= pattrib->hdrlen; ++ ++ //adding icv, if necessary... ++ if (pattrib->iv_len) ++ { ++ //if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) ++ // psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ //else ++ // psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ ++ if (psta != NULL) ++ { ++ switch(pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ break; ++ case _TKIP_: ++ if(bmcst) ++ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ case _AES_: ++ if(bmcst) ++ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ AES_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ } ++ } ++ ++ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_, ++ ("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n", ++ padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe+1), *(pframe+2), *(pframe+3))); ++ ++ pframe += pattrib->iv_len; ++ ++ mpdu_len -= pattrib->iv_len; ++ } ++ ++ if (frg_inx == 0) { ++ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ mpdu_len -= llc_sz; ++ } ++ ++ if ((pattrib->icv_len >0) && (pattrib->bswenc)) { ++ mpdu_len -= pattrib->icv_len; ++ } ++ ++ ++ if (bmcst) { ++ // don't do fragment to broadcat/multicast packets ++ mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen); ++ } else { ++ mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len); ++ } ++ ++ pframe += mem_sz; ++ ++ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { ++ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); ++ pframe += pattrib->icv_len; ++ } ++ ++ frg_inx++; ++ ++ if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE)) ++ { ++ pattrib->nr_frags = frg_inx; ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags==1)? llc_sz:0) + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz; ++ ++ ClearMFrag(mem_start); ++ ++ break; ++ } else { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("%s: There're still something in packet!\n", __FUNCTION__)); ++ } ++ ++ addr = (SIZE_PTR)(pframe); ++ ++ mem_start = (unsigned char *)RND4(addr) + TXDESC_OFFSET; ++ _rtw_memcpy(mem_start, pbuf_start + TXDESC_OFFSET, pattrib->hdrlen); ++ } ++ ++ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n")); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ xmitframe_swencrypt(padapter, pxmitframe); ++ ++ if(bmcst == _FALSE) ++ update_attrib_vcs_info(padapter, pxmitframe); ++ else ++ pattrib->vcs_mode = NONE_VCS; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++#ifdef CONFIG_IEEE80211W ++//broadcast or multicast management pkt use BIP, unicast management pkt use CCMP encryption ++s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) ++{ ++ struct pkt_file pktfile; ++ s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; ++ SIZE_PTR addr; ++ u8 *pframe, *mem_start = NULL, *tmp_buf=NULL; ++ u8 hw_hdr_offset, subtype ; ++ struct sta_info *psta = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 *pbuf_start; ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ s32 res = _FAIL; ++ u8 *BIP_AAD=NULL; ++ u8 *MGMT_body=NULL; ++ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u8 MME[_MME_IE_LENGTH_]; ++ ++ _irqL irqL; ++ u32 ori_len; ++ mem_start = pframe = (u8 *)(pxmitframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++_func_enter_; ++ ori_len = BIP_AAD_SIZE+pattrib->pktlen; ++ tmp_buf = BIP_AAD = rtw_zmalloc(ori_len); ++ subtype = GetFrameSubType(pframe); //bit(7)~bit(2) ++ ++ if(BIP_AAD == NULL) ++ return _FAIL; ++ ++ _enter_critical_bh(&padapter->security_key_mutex, &irqL); ++ ++ //only support station mode ++ if(!check_fwstate(pmlmepriv, WIFI_STATION_STATE) || !check_fwstate(pmlmepriv, _FW_LINKED)) ++ goto xmitframe_coalesce_success; ++ ++ //IGTK key is not install, it may not support 802.11w ++ if(padapter->securitypriv.binstallBIPkey != _TRUE) ++ { ++ DBG_871X("no instll BIP key\n"); ++ goto xmitframe_coalesce_success; ++ } ++ //station mode doesn't need TX BIP, just ready the code ++ if(bmcst) ++ { ++ int frame_body_len; ++ u8 mic[16]; ++ ++ _rtw_memset(MME, 0, 18); ++ ++ //other types doesn't need the BIP ++ if(GetFrameSubType(pframe) != WIFI_DEAUTH && GetFrameSubType(pframe) != WIFI_DISASSOC) ++ goto xmitframe_coalesce_fail; ++ ++ MGMT_body = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ pframe += pattrib->pktlen; ++ ++ //octent 0 and 1 is key index ,BIP keyid is 4 or 5, LSB only need octent 0 ++ MME[0]=padapter->securitypriv.dot11wBIPKeyid; ++ //copy packet number ++ _rtw_memcpy(&MME[2], &pmlmeext->mgnt_80211w_IPN, 6); ++ //increase the packet number ++ pmlmeext->mgnt_80211w_IPN++; ++ ++ //add MME IE with MIC all zero, MME string doesn't include element id and length ++ pframe = rtw_set_ie(pframe, _MME_IE_ , 16 , MME, &(pattrib->pktlen)); ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ // total frame length - header length ++ frame_body_len = pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //conscruct AAD, copy frame control field ++ _rtw_memcpy(BIP_AAD, &pwlanhdr->frame_ctl, 2); ++ ClearRetry(BIP_AAD); ++ ClearPwrMgt(BIP_AAD); ++ ClearMData(BIP_AAD); ++ //conscruct AAD, copy address 1 to address 3 ++ _rtw_memcpy(BIP_AAD+2, pwlanhdr->addr1, 18); ++ //copy management fram body ++ _rtw_memcpy(BIP_AAD+BIP_AAD_SIZE, MGMT_body, frame_body_len); ++ /*//dump total packet include MME with zero MIC ++ { ++ int i; ++ printk("Total packet: "); ++ for(i=0; i < BIP_AAD_SIZE+frame_body_len; i++) ++ printk(" %02x ", BIP_AAD[i]); ++ printk("\n"); ++ }*/ ++ //calculate mic ++ if(omac1_aes_128(padapter->securitypriv.dot11wBIPKey[padapter->securitypriv.dot11wBIPKeyid].skey ++ , BIP_AAD, BIP_AAD_SIZE+frame_body_len, mic)) ++ goto xmitframe_coalesce_fail; ++ ++ /*//dump calculated mic result ++ { ++ int i; ++ printk("Calculated mic result: "); ++ for(i=0; i<16; i++) ++ printk(" %02x ", mic[i]); ++ printk("\n"); ++ }*/ ++ //copy right BIP mic value, total is 128bits, we use the 0~63 bits ++ _rtw_memcpy(pframe-8, mic, 8); ++ /*/dump all packet after mic ok ++ { ++ int pp; ++ printk("pattrib->pktlen = %d \n", pattrib->pktlen); ++ for(pp=0;pp< pattrib->pktlen; pp++) ++ printk(" %02x ", mem_start[pp]); ++ printk("\n"); ++ }*/ ++ } ++ else //unicast mgmt frame TX ++ { ++ //start to encrypt mgmt frame ++ if(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC || ++ subtype == WIFI_REASSOCREQ || subtype == WIFI_ACTION) ++ { ++ if (pattrib->psta) ++ psta = pattrib->psta; ++ else ++ { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ { ++ ++ DBG_871X("%s, psta==NUL\n", __func__); ++ goto xmitframe_coalesce_fail; ++ } ++ ++ if(!(psta->state & _FW_LINKED) || pxmitframe->buf_addr==NULL) ++ { ++ DBG_871X("%s, not _FW_LINKED or addr null\n", __func__); ++ goto xmitframe_coalesce_fail; ++ } ++ ++ //DBG_871X("%s, action frame category=%d \n", __func__, pframe[WLAN_HDR_A3_LEN]); ++ //according 802.11-2012 standard, these five types are not robust types ++ if(subtype == WIFI_ACTION && ++ (pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_PUBLIC || ++ pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_HT || ++ pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_UNPROTECTED_WNM || ++ pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_SELF_PROTECTED || ++ pframe[WLAN_HDR_A3_LEN] == RTW_WLAN_CATEGORY_P2P)) ++ goto xmitframe_coalesce_fail; ++ //before encrypt dump the management packet content ++ /*{ ++ int i; ++ printk("Management pkt: "); ++ for(i=0; ipktlen; i++) ++ printk(" %02x ", pframe[i]); ++ printk("=======\n"); ++ }*/ ++ if(pattrib->encrypt>0) ++ _rtw_memcpy(pattrib->dot118021x_UncstKey.skey, psta->dot118021x_UncstKey.skey, 16); ++ //bakeup original management packet ++ _rtw_memcpy(tmp_buf, pframe, pattrib->pktlen); ++ //move to data portion ++ pframe += pattrib->hdrlen; ++ ++ //802.11w unicast management packet must be _AES_ ++ pattrib->iv_len = 8; ++ //it's MIC of AES ++ pattrib->icv_len = 8; ++ ++ switch(pattrib->encrypt) ++ { ++ case _AES_: ++ //set AES IV header ++ AES_IV(pattrib->iv, psta->dot11wtxpn, 0); ++ break; ++ default: ++ goto xmitframe_coalesce_fail; ++ } ++ //insert iv header into management frame ++ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); ++ pframe += pattrib->iv_len; ++ //copy mgmt data portion after CCMP header ++ _rtw_memcpy(pframe, tmp_buf+pattrib->hdrlen, pattrib->pktlen-pattrib->hdrlen); ++ //move pframe to end of mgmt pkt ++ pframe += pattrib->pktlen-pattrib->hdrlen; ++ //add 8 bytes CCMP IV header to length ++ pattrib->pktlen += pattrib->iv_len; ++ /*//dump management packet include AES IV header ++ { ++ int i; ++ printk("Management pkt + IV: "); ++ //for(i=0; ipktlen; i++) ++ //printk(" %02x ", mem_start[i]); ++ printk("@@@@@@@@@@@@@\n"); ++ }*/ ++ ++ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { ++ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); ++ pframe += pattrib->icv_len; ++ } ++ //add 8 bytes MIC ++ pattrib->pktlen += pattrib->icv_len; ++ //set final tx command size ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //set protected bit must be beofre SW encrypt ++ SetPrivacy(mem_start); ++ /*//dump management packet include AES header ++ { ++ int i; ++ printk("prepare to enc Management pkt + IV: "); ++ for(i=0; ipktlen; i++) ++ printk(" %02x ", mem_start[i]); ++ printk("@@@@@@@@@@@@@\n"); ++ }*/ ++ //software encrypt ++ xmitframe_swencrypt(padapter, pxmitframe); ++ } ++ } ++ ++xmitframe_coalesce_success: ++ _exit_critical_bh(&padapter->security_key_mutex, &irqL); ++ rtw_mfree(BIP_AAD, ori_len); ++_func_exit_; ++ return _SUCCESS; ++ ++xmitframe_coalesce_fail: ++ _exit_critical_bh(&padapter->security_key_mutex, &irqL); ++ rtw_mfree(BIP_AAD, ori_len); ++_func_exit_; ++ ++ return _FAIL; ++} ++#endif //CONFIG_IEEE80211W ++ ++/* Logical Link Control(LLC) SubNetwork Attachment Point(SNAP) header ++ * IEEE LLC/SNAP header contains 8 octets ++ * First 3 octets comprise the LLC portion ++ * SNAP portion, 5 octets, is divided into two fields: ++ * Organizationally Unique Identifier(OUI), 3 octets, ++ * type, defined by that organization, 2 octets. ++ */ ++s32 rtw_put_snap(u8 *data, u16 h_proto) ++{ ++ struct ieee80211_snap_hdr *snap; ++ u8 *oui; ++ ++_func_enter_; ++ ++ snap = (struct ieee80211_snap_hdr *)data; ++ snap->dsap = 0xaa; ++ snap->ssap = 0xaa; ++ snap->ctrl = 0x03; ++ ++ if (h_proto == 0x8137 || h_proto == 0x80f3) ++ oui = P802_1H_OUI; ++ else ++ oui = RFC1042_OUI; ++ ++ snap->oui[0] = oui[0]; ++ snap->oui[1] = oui[1]; ++ snap->oui[2] = oui[2]; ++ ++ *(u16 *)(data + SNAP_SIZE) = htons(h_proto); ++ ++_func_exit_; ++ ++ return SNAP_SIZE + sizeof(u16); ++} ++ ++void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len) ++{ ++ ++ uint protection; ++ u8 *perp; ++ sint erp_len; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++_func_enter_; ++ ++ switch(pxmitpriv->vcs_setting) ++ { ++ case DISABLE_VCS: ++ pxmitpriv->vcs = NONE_VCS; ++ break; ++ ++ case ENABLE_VCS: ++ break; ++ ++ case AUTO_VCS: ++ default: ++ perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); ++ if(perp == NULL) ++ { ++ pxmitpriv->vcs = NONE_VCS; ++ } ++ else ++ { ++ protection = (*(perp + 2)) & BIT(1); ++ if (protection) ++ { ++ if(pregistrypriv->vcs_type == RTS_CTS) ++ pxmitpriv->vcs = RTS_CTS; ++ else ++ pxmitpriv->vcs = CTS_TO_SELF; ++ } ++ else ++ pxmitpriv->vcs = NONE_VCS; ++ } ++ ++ break; ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz) ++{ ++ struct sta_info *psta = NULL; ++ struct stainfo_stats *pstats = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ pxmitpriv->tx_bytes += sz; ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pxmitframe->agg_num; ++#else ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod++; ++#endif ++ ++ psta = pxmitframe->attrib.psta; ++ ++ if(psta) ++ { ++ pstats = &psta->sta_stats; ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pstats->tx_pkts += pxmitframe->agg_num; ++#else ++ pstats->tx_pkts++; ++#endif ++ pstats->tx_bytes += sz; ++ } ++ } ++ ++} ++ ++struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv) ++{ ++ _irqL irqL; ++ struct xmit_buf *pxmitbuf = NULL; ++ _list *plist, *phead; ++ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; ++ ++_func_enter_; ++ ++ _enter_critical(&pfree_queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(pfree_queue) == _TRUE) { ++ pxmitbuf = NULL; ++ } else { ++ ++ phead = get_list_head(pfree_queue); ++ ++ plist = get_next(phead); ++ ++ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); ++ ++ rtw_list_delete(&(pxmitbuf->list)); ++ } ++ ++ if (pxmitbuf != NULL) ++ { ++ pxmitpriv->free_xmit_extbuf_cnt--; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF ALLOC no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmit_extbuf_cnt); ++ #endif ++ ++ ++ pxmitbuf->priv_data = NULL; ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->len = 0; ++ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; ++#endif ++#ifdef CONFIG_PCI_HCI ++ pxmitbuf->len = 0; ++#endif ++ ++ if (pxmitbuf->sctx) { ++ DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); ++ } ++ ++ } ++ ++ _exit_critical(&pfree_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pxmitbuf; ++} ++ ++s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ _irqL irqL; ++ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; ++ ++_func_enter_; ++ ++ if(pxmitbuf==NULL) ++ { ++ return _FAIL; ++ } ++ ++ _enter_critical(&pfree_queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitbuf->list); ++ ++ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_queue)); ++ pxmitpriv->free_xmit_extbuf_cnt++; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmit_extbuf_cnt); ++ #endif ++ ++ _exit_critical(&pfree_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv) ++{ ++ _irqL irqL; ++ struct xmit_buf *pxmitbuf = NULL; ++ _list *plist, *phead; ++ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; ++ ++_func_enter_; ++ ++ //DBG_871X("+rtw_alloc_xmitbuf\n"); ++ ++ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(pfree_xmitbuf_queue) == _TRUE) { ++ pxmitbuf = NULL; ++ } else { ++ ++ phead = get_list_head(pfree_xmitbuf_queue); ++ ++ plist = get_next(phead); ++ ++ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); ++ ++ rtw_list_delete(&(pxmitbuf->list)); ++ } ++ ++ if (pxmitbuf != NULL) ++ { ++ pxmitpriv->free_xmitbuf_cnt--; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF ALLOC no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmitbuf_cnt); ++ #endif ++ //DBG_871X("alloc, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); ++ ++ pxmitbuf->priv_data = NULL; ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->len = 0; ++ pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; ++#endif ++#ifdef CONFIG_PCI_HCI ++ pxmitbuf->len = 0; ++#endif ++ ++ if (pxmitbuf->sctx) { ++ DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_ALLOC); ++ } ++ } ++ #ifdef DBG_XMIT_BUF ++ else ++ { ++ DBG_871X("DBG_XMIT_BUF rtw_alloc_xmitbuf return NULL\n"); ++ } ++ #endif ++ ++ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pxmitbuf; ++} ++ ++s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ _irqL irqL; ++ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; ++ ++_func_enter_; ++ ++ //DBG_871X("+rtw_free_xmitbuf\n"); ++ ++ if(pxmitbuf==NULL) ++ { ++ return _FAIL; ++ } ++ ++ if (pxmitbuf->sctx) { ++ DBG_871X("%s pxmitbuf->sctx is not NULL\n", __func__); ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_BUF_FREE); ++ } ++ ++ if(pxmitbuf->ext_tag) ++ { ++ rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf); ++ } ++ else ++ { ++ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitbuf->list); ++ ++ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_xmitbuf_queue)); ++ ++ pxmitpriv->free_xmitbuf_cnt++; ++ //DBG_871X("FREE, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmitbuf_cnt); ++ #endif ++ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++void rtw_init_xmitframe(struct xmit_frame *pxframe) ++{ ++ if (pxframe != NULL)//default value setting ++ { ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ _rtw_memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); ++ //pxframe->attrib.psta = NULL; ++ ++ pxframe->frame_tag = DATA_FRAMETAG; ++ ++#ifdef CONFIG_USB_HCI ++ pxframe->pkt = NULL; ++ pxframe->pkt_offset = 1;//default use pkt_offset to fill tx desc ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pxframe->agg_num = 1; ++#endif ++ ++#endif //#ifdef CONFIG_USB_HCI ++ ++#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ pxframe->pg_num = 1; ++ pxframe->agg_num = 1; ++#endif ++ ++#ifdef CONFIG_XMIT_ACK ++ pxframe->ack_report = 0; ++#endif ++ ++ } ++} ++ ++/* ++Calling context: ++1. OS_TXENTRY ++2. RXENTRY (rx_thread or RX_ISR/RX_CallBack) ++ ++If we turn on USE_RXTHREAD, then, no need for critical section. ++Otherwise, we must use _enter/_exit critical to protect free_xmit_queue... ++ ++Must be very very cautious... ++ ++*/ ++struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv)//(_queue *pfree_xmit_queue) ++{ ++ /* ++ Please remember to use all the osdep_service api, ++ and lock/unlock or _enter/_exit critical to protect ++ pfree_xmit_queue ++ */ ++ ++ _irqL irqL; ++ struct xmit_frame *pxframe = NULL; ++ _list *plist, *phead; ++ _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; ++#ifdef PLATFORM_LINUX ++ _adapter *padapter = pxmitpriv->adapter; ++#endif //PLATFORM_LINUX ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(pfree_xmit_queue) == _TRUE) { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe:%d\n", pxmitpriv->free_xmitframe_cnt)); ++ pxframe = NULL; ++ } else { ++ phead = get_list_head(pfree_xmit_queue); ++ ++ plist = get_next(phead); ++ ++ pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ rtw_list_delete(&(pxframe->list)); ++ pxmitpriv->free_xmitframe_cnt--; ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); ++ } ++ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)) ++ if(pxmitpriv->free_xmitframe_cnt==1) ++ { ++ if (!rtw_netif_queue_stopped(padapter->pnetdev)) ++ rtw_netif_stop_queue(padapter->pnetdev); ++ } ++#endif ++#endif ++ ++ _exit_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++ rtw_init_xmitframe(pxframe); ++ ++_func_exit_; ++ ++ return pxframe; ++} ++ ++struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv) ++{ ++ _irqL irqL; ++ struct xmit_frame *pxframe = NULL; ++ _list *plist, *phead; ++ _queue *queue = &pxmitpriv->free_xframe_ext_queue; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(queue) == _TRUE) { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe_ext:%d\n", pxmitpriv->free_xframe_ext_cnt)); ++ pxframe = NULL; ++ } else { ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ rtw_list_delete(&(pxframe->list)); ++ pxmitpriv->free_xframe_ext_cnt--; ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe_ext():free_xmitframe_cnt=%d\n", pxmitpriv->free_xframe_ext_cnt)); ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ rtw_init_xmitframe(pxframe); ++ ++_func_exit_; ++ ++ return pxframe; ++} ++ ++struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv) ++{ ++ struct xmit_frame *pxframe = NULL; ++ u8 *alloc_addr; ++ ++ alloc_addr = rtw_zmalloc(sizeof(struct xmit_frame) + 4); ++ ++ if (alloc_addr == NULL) ++ goto exit; ++ ++ pxframe = (struct xmit_frame *)N_BYTE_ALIGMENT((SIZE_PTR)(alloc_addr), 4); ++ pxframe->alloc_addr = alloc_addr; ++ ++ pxframe->padapter = pxmitpriv->adapter; ++ pxframe->frame_tag = NULL_FRAMETAG; ++ ++ pxframe->pkt = NULL; ++ ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ rtw_init_xmitframe(pxframe); ++ ++ DBG_871X("################## %s ##################\n", __func__); ++ ++exit: ++ return pxframe; ++} ++ ++s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ _queue *queue = NULL; ++ _adapter *padapter = pxmitpriv->adapter; ++ _pkt *pndis_pkt = NULL; ++ ++_func_enter_; ++ ++ if (pxmitframe == NULL) { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("======rtw_free_xmitframe():pxmitframe==NULL!!!!!!!!!!\n")); ++ goto exit; ++ } ++ ++ if (pxmitframe->pkt){ ++ pndis_pkt = pxmitframe->pkt; ++ pxmitframe->pkt = NULL; ++ } ++ ++ if (pxmitframe->alloc_addr) { ++ DBG_871X("################## %s with alloc_addr ##################\n", __func__); ++ rtw_mfree(pxmitframe->alloc_addr, sizeof(struct xmit_frame) + 4); ++ goto check_pkt_complete; ++ } ++ ++ if (pxmitframe->ext_tag == 0) ++ queue = &pxmitpriv->free_xmit_queue; ++ else if(pxmitframe->ext_tag == 1) ++ queue = &pxmitpriv->free_xframe_ext_queue; ++ else ++ {} ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitframe->list); ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(queue)); ++ if (pxmitframe->ext_tag == 0) { ++ pxmitpriv->free_xmitframe_cnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); ++ } else if(pxmitframe->ext_tag == 1) { ++ pxmitpriv->free_xframe_ext_cnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xframe_ext_cnt=%d\n", pxmitpriv->free_xframe_ext_cnt)); ++ } else { ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++check_pkt_complete: ++ ++ if(pndis_pkt) ++ rtw_os_pkt_complete(padapter, pndis_pkt); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct xmit_frame *pxmitframe; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pframequeue->lock), &irqL); ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ ++ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ plist = get_next(plist); ++ ++ rtw_free_xmitframe(pxmitpriv,pxmitframe); ++ ++ } ++ _exit_critical_bh(&(pframequeue->lock), &irqL); ++ ++_func_exit_; ++} ++ ++s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ++ ("rtw_xmitframe_enqueue: drop xmit pkt for classifier fail\n")); ++// pxmitframe->pkt = NULL; ++ return _FAIL; ++ } ++ ++ return _SUCCESS; ++} ++ ++static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue) ++{ ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ xmitframe_phead = get_list_head(pframe_queue); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++/*#ifdef RTK_DMP_PLATFORM ++#ifdef CONFIG_USB_TX_AGGREGATION ++ if((ptxservq->qcnt>0) && (ptxservq->qcnt<=2)) ++ { ++ pxmitframe = NULL; ++ ++ tasklet_schedule(&pxmitpriv->xmit_tasklet); ++ ++ break; ++ } ++#endif ++#endif*/ ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptxservq->qcnt--; ++ ++ break; ++ ++ pxmitframe = NULL; ++ ++ } ++ ++ return pxmitframe; ++} ++ ++struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry) ++{ ++ _irqL irqL0; ++ _list *sta_plist, *sta_phead; ++ struct hw_xmit *phwxmit; ++ struct tx_servq *ptxservq = NULL; ++ _queue *pframe_queue = NULL; ++ struct xmit_frame *pxmitframe = NULL; ++ _adapter *padapter = pxmitpriv->adapter; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ int i, inx[4]; ++#ifdef CONFIG_USB_HCI ++// int j, tmp, acirp_cnt[4]; ++#endif ++ ++_func_enter_; ++ ++ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; ++ ++ if(pregpriv->wifi_spec==1) ++ { ++ int j, tmp, acirp_cnt[4]; ++#if 0 ++ if(flagsvo, 1->vi, 2->be, 3->bk. ++ acirp_cnt[0] = pxmitpriv->voq_cnt; ++ acirp_cnt[1] = pxmitpriv->viq_cnt; ++ acirp_cnt[2] = pxmitpriv->beq_cnt; ++ acirp_cnt[3] = pxmitpriv->bkq_cnt; ++ ++ for(i=0; i<4; i++) ++ { ++ for(j=i+1; j<4; j++) ++ { ++ if(acirp_cnt[j]lock, &irqL0); ++ ++ for(i = 0; i < entry; i++) ++ { ++ phwxmit = phwxmit_i + inx[i]; ++ ++ //_enter_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ sta_phead = get_list_head(phwxmit->sta_queue); ++ sta_plist = get_next(sta_phead); ++ ++ while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) ++ { ++ ++ ptxservq= LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); ++ ++ pframe_queue = &ptxservq->sta_pending; ++ ++ pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); ++ ++ if(pxmitframe) ++ { ++ phwxmit->accnt--; ++ ++ //Remove sta node when there is no pending packets. ++ if(_rtw_queue_empty(pframe_queue)) //must be done after get_next and before break ++ rtw_list_delete(&ptxservq->tx_pending); ++ ++ //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ goto exit; ++ } ++ ++ sta_plist = get_next(sta_plist); ++ ++ } ++ ++ //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ } ++ ++exit: ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++_func_exit_; ++ ++ return pxmitframe; ++} ++ ++#if 1 ++struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac) ++{ ++ struct tx_servq *ptxservq=NULL; ++ ++_func_enter_; ++ ++ switch (up) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ *(ac) = 3; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ *(ac) = 1; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ *(ac) = 0; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ *(ac) = 2; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); ++ break; ++ ++ } ++ ++_func_exit_; ++ ++ return ptxservq; ++} ++#else ++__inline static struct tx_servq *rtw_get_sta_pending ++ (_adapter *padapter, _queue **ppstapending, struct sta_info *psta, sint up) ++{ ++ struct tx_servq *ptxservq; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ ++_func_enter_; ++ ++#ifdef CONFIG_RTL8711 ++ ++ if(IS_MCAST(psta->hwaddr)) ++ { ++ ptxservq = &(psta->sta_xmitpriv.be_q); // we will use be_q to queue bc/mc frames in BCMC_stainfo ++ *ppstapending = &padapter->xmitpriv.bm_pending; ++ } ++ else ++#endif ++ { ++ switch (up) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ *ppstapending = &padapter->xmitpriv.bk_pending; ++ (phwxmits+3)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ *ppstapending = &padapter->xmitpriv.vi_pending; ++ (phwxmits+1)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ *ppstapending = &padapter->xmitpriv.vo_pending; ++ (phwxmits+0)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ *ppstapending = &padapter->xmitpriv.be_pending; ++ (phwxmits+2)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); ++ break; ++ ++ } ++ ++ } ++ ++_func_exit_; ++ ++ return ptxservq; ++} ++#endif ++ ++/* ++ * Will enqueue pxmitframe to the proper queue, ++ * and indicate it to xx_pending list..... ++ */ ++s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ //_irqL irqL0; ++ u8 ac_index; ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ sint res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ } ++ ++ if (psta == NULL) { ++ res = _FAIL; ++ DBG_8192C("rtw_xmit_classifier: psta == NULL\n"); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_xmit_classifier: psta == NULL\n")); ++ goto exit; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return _FAIL; ++ } ++ ++ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ++ ++ //_enter_critical(&pstapending->lock, &irqL0); ++ ++ if (rtw_is_list_empty(&ptxservq->tx_pending)) { ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue)); ++ } ++ ++ //_enter_critical(&ptxservq->sta_pending.lock, &irqL1); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); ++ ptxservq->qcnt++; ++ phwxmits[ac_index].accnt++; ++ ++ //_exit_critical(&ptxservq->sta_pending.lock, &irqL1); ++ ++ //_exit_critical(&pstapending->lock, &irqL0); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_alloc_hwxmits(_adapter *padapter) ++{ ++ struct hw_xmit *hwxmits; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ pxmitpriv->hwxmit_entry = HWXMIT_ENTRY; ++ ++ pxmitpriv->hwxmits = (struct hw_xmit *)rtw_zmalloc(sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry); ++ ++ hwxmits = pxmitpriv->hwxmits; ++ ++ if(pxmitpriv->hwxmit_entry == 5) ++ { ++ //pxmitpriv->bmc_txqueue.head = 0; ++ //hwxmits[0] .phwtxqueue = &pxmitpriv->bmc_txqueue; ++ hwxmits[0] .sta_queue = &pxmitpriv->bm_pending; ++ ++ //pxmitpriv->vo_txqueue.head = 0; ++ //hwxmits[1] .phwtxqueue = &pxmitpriv->vo_txqueue; ++ hwxmits[1] .sta_queue = &pxmitpriv->vo_pending; ++ ++ //pxmitpriv->vi_txqueue.head = 0; ++ //hwxmits[2] .phwtxqueue = &pxmitpriv->vi_txqueue; ++ hwxmits[2] .sta_queue = &pxmitpriv->vi_pending; ++ ++ //pxmitpriv->bk_txqueue.head = 0; ++ //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; ++ hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; ++ ++ //pxmitpriv->be_txqueue.head = 0; ++ //hwxmits[4] .phwtxqueue = &pxmitpriv->be_txqueue; ++ hwxmits[4] .sta_queue = &pxmitpriv->be_pending; ++ ++ } ++ else if(pxmitpriv->hwxmit_entry == 4) ++ { ++ ++ //pxmitpriv->vo_txqueue.head = 0; ++ //hwxmits[0] .phwtxqueue = &pxmitpriv->vo_txqueue; ++ hwxmits[0] .sta_queue = &pxmitpriv->vo_pending; ++ ++ //pxmitpriv->vi_txqueue.head = 0; ++ //hwxmits[1] .phwtxqueue = &pxmitpriv->vi_txqueue; ++ hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; ++ ++ //pxmitpriv->be_txqueue.head = 0; ++ //hwxmits[2] .phwtxqueue = &pxmitpriv->be_txqueue; ++ hwxmits[2] .sta_queue = &pxmitpriv->be_pending; ++ ++ //pxmitpriv->bk_txqueue.head = 0; ++ //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; ++ hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; ++ } ++ else ++ { ++ ++ ++ } ++ ++ ++} ++ ++void rtw_free_hwxmits(_adapter *padapter) ++{ ++ struct hw_xmit *hwxmits; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ hwxmits = pxmitpriv->hwxmits; ++ if(hwxmits) ++ rtw_mfree((u8 *)hwxmits, (sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry)); ++} ++ ++void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry) ++{ ++ sint i; ++_func_enter_; ++ for(i = 0; i < entry; i++, phwxmit++) ++ { ++ //_rtw_spinlock_init(&phwxmit->xmit_lock); ++ //_rtw_init_listhead(&phwxmit->pending); ++ //phwxmit->txcmdcnt = 0; ++ phwxmit->accnt = 0; ++ } ++_func_exit_; ++} ++ ++#ifdef CONFIG_BR_EXT ++int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb) ++{ ++ struct sk_buff *skb = *pskb; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb); ++ int res, is_vlan_tag=0, i, do_nat25=1; ++ unsigned short vlan_hdr=0; ++ void *br_port = NULL; ++ ++ //mac_clone_handle_frame(priv, skb); ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ _enter_critical_bh(&padapter->br_ext_lock, &irqL); ++ if ( !(skb->data[0] & 1) && ++ br_port && ++ memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) != __constant_htons(ETH_P_8021Q) && ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP) && ++ !memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) { ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ padapter->scdb_entry->ageing_timer = jiffies; ++ _exit_critical_bh(&padapter->br_ext_lock, &irqL); ++ } ++ else ++ //if (!priv->pmib->ethBrExtInfo.nat25_disable) ++ { ++// if (priv->dev->br_port && ++// !memcmp(skb->data+MACADDRLEN, priv->br_mac, MACADDRLEN)) { ++#if 1 ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ //if SA == br_mac && skb== IP => copy SIP to br_ip ?? why ++ if (!memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && ++ (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP))) ++ memcpy(padapter->br_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); ++ ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)) { ++ if (memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN)) { ++ void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr); ++ ++ if ((padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter, ++ skb->data+MACADDRLEN, skb->data+WLAN_ETHHDR_LEN+12)) != NULL) { ++ memcpy(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN); ++ memcpy(padapter->scdb_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); ++ padapter->scdb_entry->ageing_timer = jiffies; ++ do_nat25 = 0; ++ } ++ } ++ else { ++ if (padapter->scdb_entry) { ++ padapter->scdb_entry->ageing_timer = jiffies; ++ do_nat25 = 0; ++ } ++ else { ++ memset(padapter->scdb_mac, 0, MACADDRLEN); ++ memset(padapter->scdb_ip, 0, 4); ++ } ++ } ++ } ++ _exit_critical_bh(&padapter->br_ext_lock, &irqL); ++#endif // 1 ++ if (do_nat25) ++ { ++ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method); ++ if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) { ++ struct sk_buff *newskb; ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; ++ } ++ ++ newskb = rtw_skb_copy(skb); ++ if (newskb == NULL) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: rtw_skb_copy fail!\n"); ++ //goto stop_proc; ++ return -1; ++ } ++ rtw_skb_free(skb); ++ ++ *pskb = skb = newskb; ++ if (is_vlan_tag) { ++ vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ } ++ ++ if (skb_is_nonlinear(skb)) ++ DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __FUNCTION__); ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ res = skb_linearize(skb, GFP_ATOMIC); ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ res = skb_linearize(skb); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ if (res < 0) { ++ DEBUG_ERR("TX DROP: skb_linearize fail!\n"); ++ //goto free_and_stop; ++ return -1; ++ } ++ ++ res = nat25_db_handle(padapter, skb, NAT25_INSERT); ++ if (res < 0) { ++ if (res == -2) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: nat25_db_handle fail!\n"); ++ //goto free_and_stop; ++ return -1; ++ ++ } ++ // we just print warning message and let it go ++ //DEBUG_WARN("%s()-%d: nat25_db_handle INSERT Warning!\n", __FUNCTION__, __LINE__); ++ //return -1; // return -1 will cause system crash on 2011/08/30! ++ return 0; ++ } ++ } ++ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ ++ dhcp_flag_bcast(padapter, skb); ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; ++ } ++ } ++#if 0 ++ else{ ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ } ++ ++ if(is_vlan_tag){ ++ if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A_VALN(skb->data)){ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ } ++ }else ++ { ++ if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A(skb->data)){ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ } ++ } ++ } ++#endif // 0 ++ ++ // check if SA is equal to our MAC ++ if (memcmp(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n", ++ skb->data[6],skb->data[7],skb->data[8],skb->data[9],skb->data[10],skb->data[11]); ++ //goto free_and_stop; ++ return -1; ++ } ++ } ++ return 0; ++} ++#endif // CONFIG_BR_EXT ++ ++static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ u8 qsel; ++ ++ qsel = pattrib->priority; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel)); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++// if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++// qsel = 7;// ++#endif ++ ++ pattrib->qsel = qsel; ++} ++ ++/* ++ * The main transmit(tx) entry ++ * ++ * Return ++ * 1 enqueue ++ * 0 success, hardware will handle this xmit frame(packet) ++ * <0 fail ++ */ ++s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) ++{ ++ static u32 start = 0; ++ static u32 drop_cnt = 0; ++#ifdef CONFIG_AP_MODE ++ _irqL irqL0; ++#endif ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame *pxmitframe = NULL; ++#ifdef CONFIG_BR_EXT ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ void *br_port = NULL; ++#endif // CONFIG_BR_EXT ++ ++ s32 res; ++ ++ if (start == 0) ++ start = rtw_get_current_time(); ++ ++ pxmitframe = rtw_alloc_xmitframe(pxmitpriv); ++ ++ if (rtw_get_passing_time_ms(start) > 2000) { ++ if (drop_cnt) ++ DBG_871X("DBG_TX_DROP_FRAME %s no more pxmitframe, drop_cnt:%u\n", __FUNCTION__, drop_cnt); ++ start = rtw_get_current_time(); ++ drop_cnt = 0; ++ } ++ ++ if (pxmitframe == NULL) { ++ drop_cnt ++; ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: no more pxmitframe\n")); ++ return -1; ++ } ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ if( br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ res = rtw_br_client_tx(padapter, ppkt); ++ if (res == -1) ++ { ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ return -1; ++ } ++ } ++ ++#endif // CONFIG_BR_EXT ++ ++ res = update_attrib(padapter, *ppkt, &pxmitframe->attrib); ++ if (res == _FAIL) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: update attrib fail\n")); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__); ++ #endif ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ return -1; ++ } ++ pxmitframe->pkt = *ppkt; ++ ++ rtw_led_control(padapter, LED_CTL_TX); ++ ++ do_queue_select(padapter, &pxmitframe->attrib); ++ ++#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) ++ { ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ return 1; ++ } ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++#endif ++ ++ if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE) ++ return 1; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_TDLS ++sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ sint ret=_FALSE; ++ ++ _irqL irqL; ++ struct sta_info *ptdls_sta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ int i; ++ ++ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); ++ if(ptdls_sta==NULL){ ++ return ret; ++ }else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE){ ++ ++ if(pattrib->triggered==1) ++ { ++ ret = _TRUE; ++ return ret; ++ } ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ if(ptdls_sta->state&WIFI_SLEEP_STATE) ++ { ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q)); ++ ++ ptdls_sta->sleepq_len++; ++ ptdls_sta->sleepq_ac_len++; ++ ++ //indicate 4-AC queue bit in TDLS peer traffic indication ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ ptdls_sta->uapsd_bk = ptdls_sta->uapsd_bk | BIT(1); ++ break; ++ case 4: ++ case 5: ++ ptdls_sta->uapsd_vi = ptdls_sta->uapsd_vi | BIT(1); ++ break; ++ case 6: ++ case 7: ++ ptdls_sta->uapsd_vo = ptdls_sta->uapsd_vo | BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ ptdls_sta->uapsd_be = ptdls_sta->uapsd_be | BIT(1); ++ break; ++ } ++ ++ if(ptdls_sta->sleepq_len==1) ++ { ++ //transmit TDLS PTI via AP ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_SD_PTI); ++ } ++ ret = _TRUE; ++ ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ } ++ ++ return ret; ++ ++} ++#endif //CONFIG_TDLS ++ ++#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) ++ ++sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ sint ret=_FALSE; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ sint bmcst = IS_MCAST(pattrib->ra); ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ if( ptdlsinfo->setup_state == TDLS_LINKED_STATE ) ++ { ++ ret = xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pxmitframe); ++ return ret; ++ } ++#endif //CONFIG_TDLS ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ++ return ret; ++ ++ if(pattrib->psta) ++ { ++ psta = pattrib->psta; ++ } ++ else ++ { ++ DBG_871X("%s, call rtw_get_stainfo()\n", __func__); ++ psta=rtw_get_stainfo(pstapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ { ++ DBG_871X("%s, psta==NUL\n", __func__); ++ return _FALSE; ++ } ++ ++ if(!(psta->state &_FW_LINKED)) ++ { ++ DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); ++ return _FALSE; ++ } ++ ++ if(pattrib->triggered==1) ++ { ++ //DBG_871X("directly xmit pspoll_triggered packet\n"); ++ ++ //pattrib->triggered=0; ++ ++ if(bmcst) ++ pattrib->qsel = 0x11;//HIQ ++ ++ ++ return ret; ++ } ++ ++ ++ if(bmcst) ++ { ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ if(pstapriv->sta_dz_bitmap)//if anyone sta is in ps mode ++ { ++ //pattrib->qsel = 0x11;//HIQ ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); ++ ++ psta->sleepq_len++; ++ ++ pstapriv->tim_bitmap |= BIT(0);// ++ pstapriv->sta_dz_bitmap |= BIT(0); ++ ++ //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE);//tx bc/mc packets after upate bcn ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ ret = _TRUE; ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ return ret; ++ ++ } ++ ++ ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ { ++ u8 wmmps_ac=0; ++ ++ if(pstapriv->sta_dz_bitmap&BIT(psta->aid)) ++ { ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); ++ ++ psta->sleepq_len++; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(0); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(0); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(0); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(0); ++ break; ++ } ++ ++ if(wmmps_ac) ++ psta->sleepq_ac_len++; ++ ++ if(((psta->has_legacy_ac) && (!wmmps_ac)) ||((!psta->has_legacy_ac)&&(wmmps_ac))) ++ { ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ ++ //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++ if(psta->sleepq_len==1) ++ { ++ //DBG_871X("sleepq_len==1, update BCNTIM\n"); ++ //upate BCN for TIM IE ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ } ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ //if(psta->sleepq_len > (NR_XMITFRAME>>3)) ++ //{ ++ // wakeup_sta_to_xmit(padapter, psta); ++ //} ++ ++ ret = _TRUE; ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ return ret; ++ ++} ++ ++static void dequeue_xmitframes_to_sleeping_queue(_adapter *padapter, struct sta_info *psta, _queue *pframequeue) ++{ ++ sint ret; ++ _list *plist, *phead; ++ u8 ac_index; ++ struct tx_servq *ptxservq; ++ struct pkt_attrib *pattrib; ++ struct xmit_frame *pxmitframe; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ plist = get_next(plist); ++ ++ ret = xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); ++ ++ if(_TRUE == ret) ++ { ++ pattrib = &pxmitframe->attrib; ++ ++ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ++ ++ ptxservq->qcnt--; ++ phwxmits[ac_index].accnt--; ++ } ++ else ++ { ++ //DBG_871X("xmitframe_enqueue_for_sleeping_sta return _FALSE\n"); ++ } ++ ++ } ++ ++} ++ ++void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL0; ++ struct sta_info *psta_bmc; ++ struct sta_xmit_priv *pstaxmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ pstaxmitpriv = &psta->sta_xmitpriv; ++ ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ psta->state |= WIFI_SLEEP_STATE; ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) ++#endif //CONFIG_TDLS ++ pstapriv->sta_dz_bitmap |= BIT(psta->aid); ++ ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) ++ { ++ if( psta_bmc != NULL ) ++ { ++#endif //CONFIG_TDLS ++ ++ ++ //for BC/MC Frames ++ pstaxmitpriv = &psta_bmc->sta_xmitpriv; ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ ++ ++#ifdef CONFIG_TDLS ++ } ++ } ++#endif //CONFIG_TDLS ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ ++} ++ ++void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ u8 update_mask=0, wmmps_ac=0; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ switch(pxmitframe->attrib.priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ psta->sleepq_len--; ++ if(psta->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ if(wmmps_ac) ++ { ++ psta->sleepq_ac_len--; ++ if(psta->sleepq_ac_len>0) ++ { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } ++ else ++ { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ } ++ ++ pxmitframe->attrib.triggered = 1; ++ ++/* ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++*/ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ ++ } ++ ++ //for BC/MC Frames ++ if(!psta_bmc) ++ goto _exit; ++ ++ if((pstapriv->sta_dz_bitmap&0xfffe) == 0x0)//no any sta in ps mode ++ { ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ if(psta_bmc->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ ++ pxmitframe->attrib.triggered = 1; ++/* ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++*/ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ } ++ ++ if(psta_bmc->sleepq_len==0) ++ { ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_mask |= BIT(1); ++ } ++ ++ } ++ ++ if(psta->sleepq_len==0) ++ { ++#ifdef CONFIG_TDLS ++ if( psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ if(psta->state&WIFI_SLEEP_STATE) ++ psta->state ^= WIFI_SLEEP_STATE; ++ ++ goto _exit; ++ } ++#endif //CONFIG_TDLS ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_mask = BIT(0); ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ psta->state ^= WIFI_SLEEP_STATE; ++ ++ if(psta->state & WIFI_STA_ALIVE_CHK_STATE) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ psta->state ^= WIFI_STA_ALIVE_CHK_STATE; ++ } ++ ++ pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); ++ } ++ ++_exit: ++ ++ //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if(update_mask) ++ { ++ //update_BCNTIM(padapter); ++ //printk("%s => call update_beacon\n",__FUNCTION__); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++} ++ ++void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ u8 wmmps_ac=0; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ switch(pxmitframe->attrib.priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ if(!wmmps_ac) ++ continue; ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta->sleepq_len--; ++ psta->sleepq_ac_len--; ++ ++ if(psta->sleepq_ac_len>0) ++ { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } ++ else ++ { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ ++ pxmitframe->attrib.triggered = 1; ++ ++/* ++ if(rtw_hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++*/ ++ rtw_hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ if((psta->sleepq_ac_len==0) && (!psta->has_legacy_ac) && (wmmps_ac)) ++ { ++#ifdef CONFIG_TDLS ++ if(psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ return; ++ } ++#endif //CONFIG_TDLS ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ //update_mask = BIT(0); ++ } ++ ++ } ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++} ++ ++#endif ++ ++void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms) ++{ ++ sctx->timeout_ms = timeout_ms; ++ sctx->submit_time= rtw_get_current_time(); ++#ifdef PLATFORM_LINUX /* TODO: add condition wating interface for other os */ ++ init_completion(&sctx->done); ++#endif ++ sctx->status = RTW_SCTX_SUBMITTED; ++} ++ ++int rtw_sctx_wait(struct submit_ctx *sctx) ++{ ++ int ret = _FAIL; ++ unsigned long expire; ++ int status = 0; ++ ++#ifdef PLATFORM_LINUX ++ expire= sctx->timeout_ms ? msecs_to_jiffies(sctx->timeout_ms) : MAX_SCHEDULE_TIMEOUT; ++ if (!wait_for_completion_timeout(&sctx->done, expire)) { ++ /* timeout, do something?? */ ++ status = RTW_SCTX_DONE_TIMEOUT; ++ DBG_871X("%s timeout\n", __func__); ++ } else { ++ status = sctx->status; ++ } ++#endif ++ ++ if (status == RTW_SCTX_DONE_SUCCESS) { ++ ret = _SUCCESS; ++ } ++ ++ return ret; ++} ++ ++bool rtw_sctx_chk_waring_status(int status) ++{ ++ switch(status) { ++ case RTW_SCTX_DONE_UNKNOWN: ++ case RTW_SCTX_DONE_BUF_ALLOC: ++ case RTW_SCTX_DONE_BUF_FREE: ++ ++ case RTW_SCTX_DONE_DRV_STOP: ++ case RTW_SCTX_DONE_DEV_REMOVE: ++ return _TRUE; ++ default: ++ return _FALSE; ++ } ++} ++ ++void rtw_sctx_done_err(struct submit_ctx **sctx, int status) ++{ ++ if (*sctx) { ++ if (rtw_sctx_chk_waring_status(status)) ++ DBG_871X("%s status:%d\n", __func__, status); ++ (*sctx)->status = status; ++ #ifdef PLATFORM_LINUX ++ complete(&((*sctx)->done)); ++ #endif ++ *sctx = NULL; ++ } ++} ++ ++void rtw_sctx_done(struct submit_ctx **sctx) ++{ ++ rtw_sctx_done_err(sctx, RTW_SCTX_DONE_SUCCESS); ++} ++ ++#ifdef CONFIG_XMIT_ACK ++ ++#ifdef CONFIG_XMIT_ACK_POLLING ++s32 c2h_evt_hdl(_adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter); ++ ++/** ++ * rtw_ack_tx_polling - ++ * @pxmitpriv: xmit_priv to address ack_tx_ops ++ * @timeout_ms: timeout msec ++ * ++ * Init ack_tx_ops and then do c2h_evt_hdl() and polling ack_tx_ops repeatedly ++ * till tx report or timeout ++ * Returns: _SUCCESS if TX report ok, _FAIL for others ++ */ ++int rtw_ack_tx_polling(struct xmit_priv *pxmitpriv, u32 timeout_ms) ++{ ++ int ret = _FAIL; ++ struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; ++ _adapter *adapter = container_of(pxmitpriv, _adapter, xmitpriv); ++ ++ pack_tx_ops->submit_time = rtw_get_current_time(); ++ pack_tx_ops->timeout_ms = timeout_ms; ++ pack_tx_ops->status = RTW_SCTX_SUBMITTED; ++ ++ do { ++ c2h_evt_hdl(adapter, NULL, rtw_hal_c2h_id_filter_ccx(adapter)); ++ if (pack_tx_ops->status != RTW_SCTX_SUBMITTED) ++ break; ++ ++ if (adapter->bDriverStopped) { ++ pack_tx_ops->status = RTW_SCTX_DONE_DRV_STOP; ++ break; ++ } ++ if (adapter->bSurpriseRemoved) { ++ pack_tx_ops->status = RTW_SCTX_DONE_DEV_REMOVE; ++ break; ++ } ++ ++ rtw_msleep_os(10); ++ } while (rtw_get_passing_time_ms(pack_tx_ops->submit_time) < timeout_ms); ++ ++ if (pack_tx_ops->status == RTW_SCTX_SUBMITTED) { ++ pack_tx_ops->status = RTW_SCTX_DONE_TIMEOUT; ++ DBG_871X("%s timeout\n", __func__); ++ } ++ ++ if (pack_tx_ops->status == RTW_SCTX_DONE_SUCCESS) ++ ret = _SUCCESS; ++ ++ return ret; ++} ++#endif ++ ++int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms) ++{ ++#ifdef CONFIG_XMIT_ACK_POLLING ++ return rtw_ack_tx_polling(pxmitpriv, timeout_ms); ++#else ++ struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; ++ ++ pack_tx_ops->submit_time = rtw_get_current_time(); ++ pack_tx_ops->timeout_ms = timeout_ms; ++ pack_tx_ops->status = RTW_SCTX_SUBMITTED; ++ ++ return rtw_sctx_wait(pack_tx_ops); ++#endif ++} ++ ++void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status) ++{ ++ struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops; ++ ++ if (pxmitpriv->ack_tx) { ++ rtw_sctx_done_err(&pack_tx_ops, status); ++ } else { ++ DBG_871X("%s ack_tx not set\n", __func__); ++ } ++} ++#endif //CONFIG_XMIT_ACK ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/HalPwrSeqCmd.c +@@ -0,0 +1,177 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*++ ++Copyright (c) Realtek Semiconductor Corp. All rights reserved. ++ ++Module Name: ++ HalPwrSeqCmd.c ++ ++Abstract: ++ Implement HW Power sequence configuration CMD handling routine for Realtek devices. ++ ++Major Change History: ++ When Who What ++ ---------- --------------- ------------------------------- ++ 2011-10-26 Lucas Modify to be compatible with SD4-CE driver. ++ 2011-07-07 Roger Create. ++ ++--*/ ++#include ++#include ++ ++ ++// ++// Description: ++// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC. ++// ++// Assumption: ++// We should follow specific format which was released from HW SD. ++// ++// 2011.07.07, added by Roger. ++// ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrSeqCmd[]) ++{ ++ WLAN_PWR_CFG PwrCfgCmd = {0}; ++ u8 bPollingBit = _FALSE; ++ u32 AryIdx = 0; ++ u8 value = 0; ++ u32 offset = 0; ++ u32 pollingCount = 0; // polling autoload done. ++ u32 maxPollingCnt = 5000; ++ ++ do { ++ PwrCfgCmd = PwrSeqCmd[AryIdx]; ++ ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ++ ("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n", ++ GET_PWR_CFG_OFFSET(PwrCfgCmd), ++ GET_PWR_CFG_CUT_MASK(PwrCfgCmd), ++ GET_PWR_CFG_FAB_MASK(PwrCfgCmd), ++ GET_PWR_CFG_INTF_MASK(PwrCfgCmd), ++ GET_PWR_CFG_BASE(PwrCfgCmd), ++ GET_PWR_CFG_CMD(PwrCfgCmd), ++ GET_PWR_CFG_MASK(PwrCfgCmd), ++ GET_PWR_CFG_VALUE(PwrCfgCmd))); ++ ++ //2 Only Handle the command whose FAB, CUT, and Interface are matched ++ if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) && ++ (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) && ++ (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) ++ { ++ switch (GET_PWR_CFG_CMD(PwrCfgCmd)) ++ { ++ case PWR_CMD_READ: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n")); ++ break; ++ ++ case PWR_CMD_WRITE: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n")); ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++ ++#ifdef CONFIG_SDIO_HCI ++ // ++ // We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface ++ // 2011.07.07. ++ // ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ { ++ // Read Back SDIO Local value ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ ++ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); ++ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write Back SDIO Local value ++ SdioLocalCmd52Write1Byte(padapter, offset, value); ++ } ++ else ++#endif ++ { ++ // Read the value from system register ++ value = rtw_read8(padapter, offset); ++ ++ value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd)); ++ value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)); ++ ++ // Write the value back to sytem register ++ rtw_write8(padapter, offset, value); ++ } ++ break; ++ ++ case PWR_CMD_POLLING: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n")); ++ ++ bPollingBit = _FALSE; ++ offset = GET_PWR_CFG_OFFSET(PwrCfgCmd); ++ ++ do { ++#ifdef CONFIG_SDIO_HCI ++ if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) ++ value = SdioLocalCmd52Read1Byte(padapter, offset); ++ else ++#endif ++ value = rtw_read8(padapter, offset); ++ ++ value &= GET_PWR_CFG_MASK(PwrCfgCmd); ++ if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd))) ++ bPollingBit = _TRUE; ++ else ++ rtw_udelay_os(10); ++ ++ if (pollingCount++ > maxPollingCnt) { ++ RT_TRACE(_module_hal_init_c_ , _drv_err_, ("Fail to polling Offset[%#x]\n", offset)); ++ return _FALSE; ++ } ++ } while (!bPollingBit); ++ ++ break; ++ ++ case PWR_CMD_DELAY: ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n")); ++ if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US) ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)); ++ else ++ rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000); ++ break; ++ ++ case PWR_CMD_END: ++ // When this command is parsed, end the process ++ RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n")); ++ return _TRUE; ++ break; ++ ++ default: ++ RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n")); ++ break; ++ } ++ } ++ ++ AryIdx++;//Add Array Index ++ }while(1); ++ ++ return _TRUE; ++} ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/dm.c +@@ -0,0 +1,314 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++ ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++ ++bool rtw_adapter_linked(_adapter *adapter) ++{ ++ bool linked = _FALSE; ++ struct mlme_priv *mlmepriv = &adapter->mlmepriv; ++ ++ if( (check_fwstate(mlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ if(adapter->stapriv.asoc_sta_count > 2) ++ linked = _TRUE; ++ } ++ else{//Station mode ++ if(check_fwstate(mlmepriv, _FW_LINKED)== _TRUE) ++ linked = _TRUE; ++ } ++ ++ return linked; ++} ++ ++bool dm_linked(_adapter *adapter) ++{ ++ bool linked; ++ ++ if ((linked = rtw_adapter_linked(adapter))) ++ goto exit; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ((adapter = adapter->pbuddy_adapter) == NULL) ++ goto exit; ++ linked = rtw_adapter_linked(adapter); ++#endif ++ ++exit: ++ return linked; ++} ++ ++#if 0 ++void dm_enable_EDCCA(_adapter *adapter) ++{ ++ // Enable EDCCA. The value is suggested by SD3 Wilson. ++ ++ // ++ // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. ++ // ++ /*if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) ++ { ++ rtw_write8(adapter,rOFDM0_ECCAThreshold,0x00); ++ rtw_write8(adapter,rOFDM0_ECCAThreshold+2,0xFD); ++ ++ } ++ else*/ ++ { ++ rtw_write8(adapter,rOFDM0_ECCAThreshold,0x03); ++ rtw_write8(adapter,rOFDM0_ECCAThreshold+2,0x00); ++ } ++} ++ ++void dm_disable_EDCCA(_adapter *adapter) ++{ ++ // Disable EDCCA.. ++ rtw_write8(adapter, rOFDM0_ECCAThreshold, 0x7f); ++ rtw_write8(adapter, rOFDM0_ECCAThreshold+2, 0x7f); ++} ++ ++// ++// Description: According to initial gain value to determine to enable or disable EDCCA. ++// ++// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. ++// ++void dm_dynamic_EDCCA(_adapter *pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *dmpriv = &pHalData->dmpriv; ++ u8 RegC50, RegC58; ++ ++ RegC50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ RegC58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); ++ ++ ++ if((RegC50 > 0x28 && RegC58 > 0x28) ++ /*|| ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) ++ || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)*/ ++ ) ++ { ++ if(!dmpriv->bPreEdccaEnable) ++ { ++ dm_enable_EDCCA(pAdapter); ++ dmpriv->bPreEdccaEnable = _TRUE; ++ } ++ ++ } ++ else if((RegC50 < 0x25 && RegC58 < 0x25) ++ /*|| (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)*/ ++ ) ++ { ++ if(dmpriv->bPreEdccaEnable) ++ { ++ dm_disable_EDCCA(pAdapter); ++ dmpriv->bPreEdccaEnable = _FALSE; ++ } ++ } ++} ++#endif ++ ++#define DM_ADAPTIVITY_VER "ADAPTIVITY_V001" ++ ++int dm_adaptivity_get_parm_str(_adapter *pAdapter, char *buf, int len) ++{ ++#ifdef CONFIG_DM_ADAPTIVITY ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *dmpriv = &pHalData->dmpriv; ++ ++ return snprintf(buf, len, DM_ADAPTIVITY_VER"\n" ++ "TH_L2H_ini\tTH_EDCCA_HL_diff\tIGI_Base\tForceEDCCA\tAdapEn_RSSI\tIGI_LowerBound\n" ++ "0x%02x\t%d\t0x%02x\t%d\t%u\t%u\n", ++ (u8)dmpriv->TH_L2H_ini, ++ dmpriv->TH_EDCCA_HL_diff, ++ dmpriv->IGI_Base, ++ dmpriv->ForceEDCCA, ++ dmpriv->AdapEn_RSSI, ++ dmpriv->IGI_LowerBound ++ ); ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ return 0; ++} ++ ++void dm_adaptivity_set_parm(_adapter *pAdapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, ++ s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound) ++{ ++#ifdef CONFIG_DM_ADAPTIVITY ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *dmpriv = &pHalData->dmpriv; ++ ++ dmpriv->TH_L2H_ini = TH_L2H_ini; ++ dmpriv->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff; ++ dmpriv->IGI_Base = IGI_Base; ++ dmpriv->ForceEDCCA = ForceEDCCA; ++ dmpriv->AdapEn_RSSI = AdapEn_RSSI; ++ dmpriv->IGI_LowerBound = IGI_LowerBound; ++ ++#endif /* CONFIG_DM_ADAPTIVITY */ ++} ++ ++void dm_adaptivity_init(_adapter *pAdapter) ++{ ++#ifdef CONFIG_DM_ADAPTIVITY ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *dmpriv = &pHalData->dmpriv; ++ ++ /* ++ if(pDM_Odm->SupportICType == ODM_RTL8723B) ++ { ++ pDM_Odm->TH_L2H_ini = 0xf8; // -8 ++ } ++ if((pDM_Odm->SupportICType == ODM_RTL8192E)&&(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)) ++ { ++ pDM_Odm->TH_L2H_ini = 0xf0; // -16 ++ } ++ else */ ++ { ++ dmpriv->TH_L2H_ini = 0xf9; // -7 ++ } ++ ++ dmpriv->TH_EDCCA_HL_diff = 7; ++ dmpriv->IGI_Base = 0x32; ++ dmpriv->IGI_target = 0x1c; ++ dmpriv->ForceEDCCA = 0; ++ dmpriv->AdapEn_RSSI = 20; ++ dmpriv->IGI_LowerBound = 0; ++ ++ //Reg524[11]=0 is easily to transmit packets during adaptivity test ++ PHY_SetBBReg(pAdapter, 0x524, BIT11, 1); // stop counting if EDCCA is asserted ++ ++#endif /* CONFIG_DM_ADAPTIVITY */ ++} ++ ++void dm_adaptivity(_adapter *pAdapter) ++{ ++#ifdef CONFIG_DM_ADAPTIVITY ++ s8 TH_L2H_dmc, TH_H2L_dmc; ++ s8 TH_L2H, TH_H2L, Diff, IGI_target; ++ u32 value32; ++ BOOLEAN EDCCA_State; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *dmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &dmpriv->DM_DigTable; ++ u8 IGI = pDigTable->CurIGValue; ++ u8 RSSI_Min = pDigTable->Rssi_val_min; ++ HT_CHANNEL_WIDTH BandWidth = pHalData->CurrentChannelBW; ++ ++ if (!(dmpriv->DMFlag & DYNAMIC_FUNC_ADAPTIVITY)) ++ { ++ LOG_LEVEL(_drv_info_, "Go to odm_DynamicEDCCA() \n"); ++ // Add by Neil Chen to enable edcca to MP Platform ++ // Adjust EDCCA. ++ /*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) ++ dm_dynamic_EDCCA(pAdapter); ++ */ ++ return; ++ } ++ LOG_LEVEL(_drv_info_, "odm_Adaptivity() =====> \n"); ++ ++ LOG_LEVEL(_drv_info_, "ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", ++ dmpriv->ForceEDCCA, dmpriv->IGI_Base, dmpriv->TH_L2H_ini, dmpriv->TH_EDCCA_HL_diff, dmpriv->AdapEn_RSSI); ++ ++ /*if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) ++ PHY_SetBBReg(0x800, BIT10, 0); //ADC_mask enable ++ */ ++ ++ if(!dm_linked(pAdapter) || pHalData->CurrentChannel > 149) /* Band4 doesn't need adaptivity */ ++ { ++ /*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)*/ ++ { ++ PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); ++ PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f); ++ } ++ /*else ++ { ++ ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); ++ }*/ ++ return; ++ } ++ ++ if(!dmpriv->ForceEDCCA) ++ { ++ if(RSSI_Min > dmpriv->AdapEn_RSSI) ++ EDCCA_State = 1; ++ else if(RSSI_Min < (dmpriv->AdapEn_RSSI - 5)) ++ EDCCA_State = 0; ++ } ++ else ++ EDCCA_State = 1; ++ //if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G)) ++ //IGI_target = pDM_Odm->IGI_Base; ++ //else ++ { ++ ++ if(BandWidth == HT_CHANNEL_WIDTH_20) //CHANNEL_WIDTH_20 ++ IGI_target = dmpriv->IGI_Base; ++ else if(BandWidth == HT_CHANNEL_WIDTH_40) ++ IGI_target = dmpriv->IGI_Base + 2; ++ /*else if(*pDM_Odm->pBandWidth == ODM_BW80M) ++ IGI_target = pDM_Odm->IGI_Base + 6;*/ ++ else ++ IGI_target = dmpriv->IGI_Base; ++ } ++ ++ dmpriv->IGI_target = (u8)IGI_target; ++ ++ LOG_LEVEL(_drv_info_, "BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n", ++ (BandWidth==HT_CHANNEL_WIDTH_40)?"40M":"20M", IGI_target, EDCCA_State); ++ ++ if(EDCCA_State == 1) ++ { ++ Diff = IGI_target -(s8)IGI; ++ TH_L2H_dmc = dmpriv->TH_L2H_ini + Diff; ++ if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; ++ TH_H2L_dmc = TH_L2H_dmc - dmpriv->TH_EDCCA_HL_diff; ++ } ++ else ++ { ++ TH_L2H_dmc = 0x7f; ++ TH_H2L_dmc = 0x7f; ++ } ++ ++ LOG_LEVEL(_drv_info_, "IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", ++ IGI, TH_L2H_dmc, TH_H2L_dmc); ++ ++ /*if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)*/ ++ { ++ PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); ++ PHY_SetBBReg(pAdapter,rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); ++ } ++ /*else ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u8)TH_H2L_dmc<<8) | (u8)TH_L2H_dmc);*/ ++ ++skip_dm: ++ return; ++#endif /* CONFIG_DM_ADAPTIVITY */ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/dm.h +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ #ifndef __DM_H__ ++#define __DM_H__ ++ ++int dm_adaptivity_get_parm_str(_adapter *pAdapter, char *buf, int len); ++void dm_adaptivity_set_parm(_adapter *pAdapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, ++ s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound); ++void dm_adaptivity_init(_adapter *pAdapter); ++void dm_adaptivity(_adapter *pAdapter); ++ ++#endif /* __DM_H__ */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/hal_com.c +@@ -0,0 +1,371 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++ ++#define _HAL_COM_C_ ++ ++//============================================================ ++// Global var ++//============================================================ ++u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++ 0x0f00003c,// 37, -12.5dB ++ 0x0e400039,// 38, -13.0dB ++ 0x0d800036,// 39, -13.5dB ++ 0x0cc00033,// 40, -14.0dB ++ 0x0c000030,// 41, -14.5dB ++ 0x0b40002d,// 42, -15.0dB ++}; ++ ++ ++u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++ {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++ {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB ++ {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++ ++u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { ++ {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++ {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++ {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++ {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++ {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++ {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++ {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++ {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++ {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++ {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++ {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++ {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++ {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB ++ {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++ {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++ {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++ {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++ {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++ {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++ {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++ {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++ {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++ {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++ {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++ {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++ {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++ {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++ {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++ {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++ {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++ {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++ {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++ {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++ ++#ifdef CONFIG_CHIP_VER_INTEGRATION ++void dump_chip_info(HAL_VERSION ChipVersion) ++{ ++ if(IS_81XXC(ChipVersion)){ ++ DBG_871X("Chip Version Info: %s_",IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C"); ++ } ++ else if(IS_92D(ChipVersion)){ ++ DBG_871X("Chip Version Info: CHIP_8192D_"); ++ } ++ else if(IS_8723_SERIES(ChipVersion)){ ++ DBG_871X("Chip Version Info: CHIP_8723A_"); ++ } ++ else if(IS_8188E(ChipVersion)){ ++ DBG_871X("Chip Version Info: CHIP_8188E_"); ++ } ++ ++ DBG_871X("%s_",IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip"); ++ DBG_871X("%s_",IS_CHIP_VENDOR_TSMC(ChipVersion)?"TSMC":"UMC"); ++ if(IS_A_CUT(ChipVersion)) DBG_871X("A_CUT_"); ++ else if(IS_B_CUT(ChipVersion)) DBG_871X("B_CUT_"); ++ else if(IS_C_CUT(ChipVersion)) DBG_871X("C_CUT_"); ++ else if(IS_D_CUT(ChipVersion)) DBG_871X("D_CUT_"); ++ else if(IS_E_CUT(ChipVersion)) DBG_871X("E_CUT_"); ++ else DBG_871X("UNKNOWN_CUT(%d)_",ChipVersion.CUTVersion); ++ ++ if(IS_1T1R(ChipVersion)) DBG_871X("1T1R_"); ++ else if(IS_1T2R(ChipVersion)) DBG_871X("1T2R_"); ++ else if(IS_2T2R(ChipVersion)) DBG_871X("2T2R_"); ++ else DBG_871X("UNKNOWN_RFTYPE(%d)_",ChipVersion.RFType); ++ ++ ++ DBG_871X("RomVer(%d)\n",ChipVersion.ROMVer); ++} ++ ++#endif ++ ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++u8 //return the final channel plan decision ++hal_com_get_channel_plan( ++ IN PADAPTER padapter, ++ IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom) ++ IN u8 sw_channel_plan, //channel plan from SW (registry/module param) ++ IN u8 def_channel_plan, //channel plan used when the former two is invalid ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ u8 swConfig; ++ u8 chnlPlan; ++ ++ swConfig = _TRUE; ++ if (!AutoLoadFail) ++ { ++ if (!rtw_is_channel_plan_valid(sw_channel_plan)) ++ swConfig = _FALSE; ++ if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ++ swConfig = _FALSE; ++ } ++ ++ if (swConfig == _TRUE) ++ chnlPlan = sw_channel_plan; ++ else ++ chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK); ++ ++ if (!rtw_is_channel_plan_valid(chnlPlan)) ++ chnlPlan = def_channel_plan; ++ ++ return chnlPlan; ++} ++ ++u8 MRateToHwRate(u8 rate) ++{ ++ u8 ret = DESC_RATE1M; ++ ++ switch(rate) ++ { ++ // CCK and OFDM non-HT rates ++ case IEEE80211_CCK_RATE_1MB: ret = DESC_RATE1M; break; ++ case IEEE80211_CCK_RATE_2MB: ret = DESC_RATE2M; break; ++ case IEEE80211_CCK_RATE_5MB: ret = DESC_RATE5_5M; break; ++ case IEEE80211_CCK_RATE_11MB: ret = DESC_RATE11M; break; ++ case IEEE80211_OFDM_RATE_6MB: ret = DESC_RATE6M; break; ++ case IEEE80211_OFDM_RATE_9MB: ret = DESC_RATE9M; break; ++ case IEEE80211_OFDM_RATE_12MB: ret = DESC_RATE12M; break; ++ case IEEE80211_OFDM_RATE_18MB: ret = DESC_RATE18M; break; ++ case IEEE80211_OFDM_RATE_24MB: ret = DESC_RATE24M; break; ++ case IEEE80211_OFDM_RATE_36MB: ret = DESC_RATE36M; break; ++ case IEEE80211_OFDM_RATE_48MB: ret = DESC_RATE48M; break; ++ case IEEE80211_OFDM_RATE_54MB: ret = DESC_RATE54M; break; ++ ++ // HT rates since here ++ //case MGN_MCS0: ret = DESC_RATEMCS0; break; ++ //case MGN_MCS1: ret = DESC_RATEMCS1; break; ++ //case MGN_MCS2: ret = DESC_RATEMCS2; break; ++ //case MGN_MCS3: ret = DESC_RATEMCS3; break; ++ //case MGN_MCS4: ret = DESC_RATEMCS4; break; ++ //case MGN_MCS5: ret = DESC_RATEMCS5; break; ++ //case MGN_MCS6: ret = DESC_RATEMCS6; break; ++ //case MGN_MCS7: ret = DESC_RATEMCS7; break; ++ ++ default: break; ++ } ++ ++ return ret; ++} ++ ++void HalSetBrateCfg( ++ IN PADAPTER Adapter, ++ IN u8 *mBratesOS, ++ OUT u16 *pBrateCfg) ++{ ++ u8 i, is_brate, brate; ++ ++ for(i=0;ieeprompriv.mac_addr); ++#ifdef CONFIG_CONCURRENT_MODE ++ if (adapter->pbuddy_adapter) ++ rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr); ++#endif ++} ++ ++/* ++* C2H event format: ++* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID ++* BITS [127:120] [119:16] [15:8] [7:4] [3:0] ++*/ ++ ++void c2h_evt_clear(_adapter *adapter) ++{ ++ rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE); ++} ++ ++s32 c2h_evt_read(_adapter *adapter, u8 *buf) ++{ ++ s32 ret = _FAIL; ++ struct c2h_evt_hdr *c2h_evt; ++ int i; ++ u8 trigger; ++ ++ if (buf == NULL) ++ goto exit; ++ ++ trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR); ++ ++ if (trigger == C2H_EVT_HOST_CLOSE) { ++ goto exit; /* Not ready */ ++ } else if (trigger != C2H_EVT_FW_CLOSE) { ++ goto clear_evt; /* Not a valid value */ ++ } ++ ++ c2h_evt = (struct c2h_evt_hdr *)buf; ++ ++ _rtw_memset(c2h_evt, 0, 16); ++ ++ *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL); ++ *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1); ++ ++ RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ", ++ &c2h_evt , sizeof(c2h_evt)); ++ ++ if (0) { ++ DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__ ++ , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger); ++ } ++ ++ /* Read the content */ ++ for (i = 0; i < c2h_evt->plen; i++) ++ c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i); ++ ++ RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n", ++ c2h_evt->payload, c2h_evt->plen); ++ ++ ret = _SUCCESS; ++ ++clear_evt: ++ /* ++ * Clear event to notify FW we have read the command. ++ * If this field isn't clear, the FW won't update the next command message. ++ */ ++ c2h_evt_clear(adapter); ++exit: ++ return ret; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/hal_intf.c +@@ -0,0 +1,546 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#define _HAL_INTF_C_ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++ #include ++#elif defined(CONFIG_USB_HCI) ++ #include ++#elif defined(CONFIG_GSPI_HCI) ++ #include ++#endif ++ ++void rtw_hal_chip_configure(_adapter *padapter) ++{ ++ if(padapter->HalFunc.intf_chip_configure) ++ padapter->HalFunc.intf_chip_configure(padapter); ++} ++ ++void rtw_hal_read_chip_info(_adapter *padapter) ++{ ++ if(padapter->HalFunc.read_adapter_info) ++ padapter->HalFunc.read_adapter_info(padapter); ++} ++ ++void rtw_hal_read_chip_version(_adapter *padapter) ++{ ++ if(padapter->HalFunc.read_chip_version) ++ padapter->HalFunc.read_chip_version(padapter); ++} ++ ++void rtw_hal_def_value_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.init_default_value) ++ padapter->HalFunc.init_default_value(padapter); ++} ++ ++void rtw_hal_free_data(_adapter *padapter) ++{ ++ if(padapter->HalFunc.free_hal_data) ++ padapter->HalFunc.free_hal_data(padapter); ++} ++ ++void rtw_hal_dm_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.dm_init) ++ padapter->HalFunc.dm_init(padapter); ++} ++ ++void rtw_hal_dm_deinit(_adapter *padapter) ++{ ++ // cancel dm timer ++ if(padapter->HalFunc.dm_deinit) ++ padapter->HalFunc.dm_deinit(padapter); ++} ++ ++void rtw_hal_sw_led_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.InitSwLeds) ++ padapter->HalFunc.InitSwLeds(padapter); ++} ++ ++void rtw_hal_sw_led_deinit(_adapter *padapter) ++{ ++ if(padapter->HalFunc.DeInitSwLeds) ++ padapter->HalFunc.DeInitSwLeds(padapter); ++} ++ ++uint rtw_hal_init(_adapter *padapter) ++{ ++ uint status = _SUCCESS; ++ ++ if(padapter->hw_init_completed == _TRUE) ++ { ++ DBG_871X("rtw_hal_init: hw_init_completed == _TRUE\n"); ++ goto success; ++ } ++#ifdef CONFIG_DEINIT_BEFORE_INIT ++ status = padapter->HalFunc.hal_deinit(padapter); ++ if(status != _SUCCESS){ ++ DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!\n"); ++ goto fail; ++ } ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ // before init mac0, driver must init mac1 first to avoid usb rx error. ++ if((padapter->pbuddy_adapter != NULL) && (padapter->DualMacConcurrent == _TRUE) ++ && (padapter->adapter_type == PRIMARY_ADAPTER)) ++ { ++ if(padapter->pbuddy_adapter->hw_init_completed == _TRUE) ++ { ++ DBG_871X("rtw_hal_init: pbuddy_adapter hw_init_completed == _TRUE\n"); ++ } ++ else ++ { ++#ifdef CONFIG_DEINIT_BEFORE_INIT ++ status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter); ++ if(status != _SUCCESS){ ++ DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n"); ++ goto fail; ++ } ++#endif ++ status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter); ++ if(status == _SUCCESS){ ++ padapter->pbuddy_adapter->hw_init_completed = _TRUE; ++ } ++ else{ ++ padapter->pbuddy_adapter->hw_init_completed = _FALSE; ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n")); ++ goto fail; ++ } ++ } ++ } ++#else ++ if(adapter_to_dvobj(padapter)->DualMacMode == _TRUE) ++ { ++ if(padapter->pbuddy_adapter != NULL) { ++ if(padapter->pbuddy_adapter->hw_init_completed == _FALSE) ++ { ++#ifdef CONFIG_DEINIT_BEFORE_INIT ++ status = padapter->HalFunc.hal_deinit(padapter->pbuddy_adapter); ++ if(status != _SUCCESS){ ++ DBG_871X("rtw_hal_init: hal_deinit before hal_init FAIL !!(pbuddy_adapter)\n"); ++ goto fail; ++ } ++#endif ++ status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter); ++ if(status == _SUCCESS){ ++ padapter->pbuddy_adapter->hw_init_completed = _TRUE; ++ } ++ else{ ++ padapter->pbuddy_adapter->hw_init_completed = _FALSE; ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail for another interface\n")); ++ } ++ } ++ } ++ } ++#endif ++ ++ padapter->hw_init_completed=_FALSE; ++ ++ status = padapter->HalFunc.hal_init(padapter); ++ ++ if(status == _SUCCESS){ ++ padapter->hw_init_completed = _TRUE; ++ } ++ else{ ++ padapter->hw_init_completed = _FALSE; ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n")); ++ goto fail; ++ } ++ ++success: ++ ++ if (padapter->registrypriv.notch_filter == 1) ++ rtw_hal_notch_filter(padapter, 1); ++ ++ rtw_hal_reset_security_engine(padapter); ++ ++ rtw_sec_restore_wep_key(padapter); ++ ++ init_hw_mlme_ext(padapter); ++ ++fail: ++ ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status)); ++ ++ return status; ++} ++ ++uint rtw_hal_deinit(_adapter *padapter) ++{ ++ uint status = _SUCCESS; ++ ++_func_enter_; ++ ++ status = padapter->HalFunc.hal_deinit(padapter); ++ ++ if(status == _SUCCESS){ ++ padapter->hw_init_completed = _FALSE; ++ } ++ else ++ { ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n")); ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++ ++void rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val) ++{ ++ if (padapter->HalFunc.SetHwRegHandler) ++ padapter->HalFunc.SetHwRegHandler(padapter, variable, val); ++} ++ ++void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val) ++{ ++ if (padapter->HalFunc.GetHwRegHandler) ++ padapter->HalFunc.GetHwRegHandler(padapter, variable, val); ++} ++ ++u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) ++{ ++ if(padapter->HalFunc.SetHalDefVarHandler) ++ return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue); ++ return _FAIL; ++} ++ ++u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue) ++{ ++ if(padapter->HalFunc.GetHalDefVarHandler) ++ return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue); ++ return _FAIL; ++} ++ ++void rtw_hal_enable_interrupt(_adapter *padapter) ++{ ++ if (padapter->HalFunc.enable_interrupt) ++ padapter->HalFunc.enable_interrupt(padapter); ++ else ++ DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __FUNCTION__); ++ ++} ++void rtw_hal_disable_interrupt(_adapter *padapter) ++{ ++ if (padapter->HalFunc.disable_interrupt) ++ padapter->HalFunc.disable_interrupt(padapter); ++ else ++ DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __FUNCTION__); ++ ++} ++ ++u32 rtw_hal_inirp_init(_adapter *padapter) ++{ ++ u32 rst = _FAIL; ++ if(padapter->HalFunc.inirp_init) ++ rst = padapter->HalFunc.inirp_init(padapter); ++ else ++ DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__FUNCTION__); ++ return rst; ++} ++ ++u32 rtw_hal_inirp_deinit(_adapter *padapter) ++{ ++ ++ if(padapter->HalFunc.inirp_deinit) ++ return padapter->HalFunc.inirp_deinit(padapter); ++ ++ return _FAIL; ++ ++} ++ ++u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val) ++{ ++ if(padapter->HalFunc.interface_ps_func) ++ return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val); ++ return _FAIL; ++} ++ ++s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ if(padapter->HalFunc.hal_xmitframe_enqueue) ++ return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe); ++ ++ return _FALSE; ++} ++ ++s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ if(padapter->HalFunc.hal_xmit) ++ return padapter->HalFunc.hal_xmit(padapter, pxmitframe); ++ ++ return _FALSE; ++} ++ ++s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ s32 ret = _FAIL; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ _rtw_memcpy(pmgntframe->attrib.ra, pwlanhdr->addr1, ETH_ALEN); ++ ++#ifdef CONFIG_IEEE80211W ++ if(padapter->securitypriv.binstallBIPkey == _TRUE) ++ { ++ if(IS_MCAST(pmgntframe->attrib.ra)) ++ { ++ pmgntframe->attrib.encrypt = _BIP_; ++ //pmgntframe->attrib.bswenc = _TRUE; ++ } ++ else ++ { ++ pmgntframe->attrib.encrypt = _AES_; ++ pmgntframe->attrib.bswenc = _TRUE; ++ } ++ rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe); ++ } ++#endif //CONFIG_IEEE80211W ++ ++ if(padapter->HalFunc.mgnt_xmit) ++ ret = padapter->HalFunc.mgnt_xmit(padapter, pmgntframe); ++ return ret; ++} ++ ++s32 rtw_hal_init_xmit_priv(_adapter *padapter) ++{ ++ if(padapter->HalFunc.init_xmit_priv != NULL) ++ return padapter->HalFunc.init_xmit_priv(padapter); ++ return _FAIL; ++} ++ ++void rtw_hal_free_xmit_priv(_adapter *padapter) ++{ ++ if(padapter->HalFunc.free_xmit_priv != NULL) ++ padapter->HalFunc.free_xmit_priv(padapter); ++} ++ ++s32 rtw_hal_init_recv_priv(_adapter *padapter) ++{ ++ if(padapter->HalFunc.init_recv_priv) ++ return padapter->HalFunc.init_recv_priv(padapter); ++ ++ return _FAIL; ++} ++ ++void rtw_hal_free_recv_priv(_adapter *padapter) ++{ ++ if(padapter->HalFunc.free_recv_priv) ++ padapter->HalFunc.free_recv_priv(padapter); ++} ++ ++void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id) ++{ ++ if(padapter->HalFunc.UpdateRAMaskHandler) ++ padapter->HalFunc.UpdateRAMaskHandler(padapter,mac_id); ++} ++ ++void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg) ++{ ++ if(padapter->HalFunc.Add_RateATid) ++ padapter->HalFunc.Add_RateATid(padapter, bitmap, arg); ++} ++ ++u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask) ++{ ++ u32 data = 0; ++ if (padapter->HalFunc.read_bbreg) ++ data = padapter->HalFunc.read_bbreg(padapter, RegAddr, BitMask); ++ return data; ++} ++ ++void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data) ++{ ++ if (padapter->HalFunc.write_bbreg) ++ padapter->HalFunc.write_bbreg(padapter, RegAddr, BitMask, Data); ++} ++ ++u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask) ++{ ++ u32 data = 0; ++ if (padapter->HalFunc.read_rfreg) ++ data = padapter->HalFunc.read_rfreg(padapter, eRFPath, RegAddr, BitMask); ++ return data; ++} ++ ++void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data) ++{ ++ if (padapter->HalFunc.write_rfreg) ++ padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data); ++} ++ ++s32 rtw_hal_interrupt_handler(_adapter *padapter) ++{ ++ if(padapter->HalFunc.interrupt_handler) ++ return padapter->HalFunc.interrupt_handler(padapter); ++ return _FAIL; ++} ++ ++void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset) ++{ ++ if(padapter->HalFunc.set_bwmode_handler) ++ padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset); ++} ++ ++void rtw_hal_set_chan(_adapter *padapter, u8 channel) ++{ ++ if(padapter->HalFunc.set_channel_handler) ++ padapter->HalFunc.set_channel_handler(padapter, channel); ++} ++ ++void rtw_hal_dm_watchdog(_adapter *padapter) ++{ ++ if(padapter->HalFunc.hal_dm_watchdog) ++ padapter->HalFunc.hal_dm_watchdog(padapter); ++} ++ ++void rtw_hal_bcn_related_reg_setting(_adapter *padapter) ++{ ++ if(padapter->HalFunc.SetBeaconRelatedRegistersHandler) ++ padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter); ++} ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++u8 rtw_hal_antdiv_before_linked(_adapter *padapter) ++{ ++ if (padapter->HalFunc.AntDivBeforeLinkHandler) ++ return padapter->HalFunc.AntDivBeforeLinkHandler(padapter); ++ return _FALSE; ++} ++ ++void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) ++{ ++ if (padapter->HalFunc.AntDivCompareHandler) ++ padapter->HalFunc.AntDivCompareHandler(padapter, dst, src); ++} ++#endif ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) ++{ ++ if (padapter->HalFunc.hostap_mgnt_xmit_entry) ++ return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, pkt); ++ return _FAIL; ++} ++#endif //CONFIG_HOSTAPD_MLME ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtw_hal_sreset_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.sreset_init_value) ++ padapter->HalFunc.sreset_init_value(padapter); ++} ++ ++void rtw_hal_sreset_reset(_adapter *padapter) ++{ ++ padapter = GET_PRIMARY_ADAPTER(padapter); ++ ++ if(padapter->HalFunc.silentreset) ++ padapter->HalFunc.silentreset(padapter); ++} ++ ++void rtw_hal_sreset_reset_value(_adapter *padapter) ++{ ++ if(padapter->HalFunc.sreset_reset_value) ++ padapter->HalFunc.sreset_reset_value(padapter); ++} ++ ++void rtw_hal_sreset_xmit_status_check(_adapter *padapter) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type != PRIMARY_ADAPTER) ++ return; ++#endif ++ if(padapter->HalFunc.sreset_xmit_status_check) ++ padapter->HalFunc.sreset_xmit_status_check(padapter); ++} ++ ++void rtw_hal_sreset_linked_status_check(_adapter *padapter) ++{ ++ if(padapter->HalFunc.sreset_linked_status_check) ++ padapter->HalFunc.sreset_linked_status_check(padapter); ++} ++ ++u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter) ++{ ++ u8 status = 0; ++ if(padapter->HalFunc.sreset_get_wifi_status) ++ status = padapter->HalFunc.sreset_get_wifi_status(padapter); ++ return status; ++} ++ ++bool rtw_hal_sreset_inprogress(_adapter *padapter) ++{ ++ bool inprogress = _FALSE; ++ ++ padapter = GET_PRIMARY_ADAPTER(padapter); ++ ++ if(padapter->HalFunc.sreset_inprogress) ++ inprogress = padapter->HalFunc.sreset_inprogress(padapter); ++ return inprogress; ++} ++#endif //DBG_CONFIG_ERROR_DETECT ++ ++#ifdef CONFIG_IOL ++int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) ++{ ++ if (adapter->HalFunc.IOL_exec_cmds_sync) ++ return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); ++ return _FAIL; ++} ++#endif ++ ++void rtw_hal_notch_filter(_adapter *adapter, bool enable) ++{ ++ if(adapter->HalFunc.hal_notch_filter) ++ adapter->HalFunc.hal_notch_filter(adapter,enable); ++} ++ ++void rtw_hal_reset_security_engine(_adapter * adapter) ++{ ++ if(adapter->HalFunc.hal_reset_security_engine) ++ adapter->HalFunc.hal_reset_security_engine(adapter); ++} ++ ++s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt) ++{ ++ s32 ret = _FAIL; ++ if (adapter->HalFunc.c2h_handler) ++ ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt); ++ return ret; ++} ++ ++c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter) ++{ ++ return adapter->HalFunc.c2h_id_filter_ccx; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c +@@ -0,0 +1,1159 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_CMD_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++ ++#define RTL92C_MAX_H2C_BOX_NUMS 4 ++#define RTL92C_MAX_CMD_LEN 5 ++#define MESSAGE_BOX_SIZE 4 ++#define EX_MESSAGE_BOX_SIZE 2 ++ ++static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 msgbox_num) ++{ ++ u8 read_down = _FALSE; ++ int retry_cnts = 100; ++ ++ u8 valid; ++ ++// DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num); ++ ++ do{ ++ valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); ++ if(0 == valid ){ ++ read_down = _TRUE; ++ } ++ }while( (!read_down) && (retry_cnts--)); ++ ++ return read_down; ++ ++} ++ ++ ++/***************************************** ++* H2C Msg format : ++*| 31 - 8 |7 | 6 - 0 | ++*| h2c_msg |Ext_bit |CMD_ID | ++* ++******************************************/ ++int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer) ++{ ++ u8 bcmd_down = _FALSE; ++ int retry_cnts = 100; ++ u8 h2c_box_num; ++ u32 msgbox_addr; ++ u32 msgbox_ex_addr; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u32 h2c_cmd = 0; ++ u16 h2c_cmd_ex = 0; ++ int ret = _FAIL; ++ ++_func_enter_; ++ ++ padapter = GET_PRIMARY_ADAPTER(padapter); ++ pHalData = GET_HAL_DATA(padapter); ++ ++ if(padapter->bFWReady == _FALSE) ++ { ++ DBG_8192C("FillH2CCmd(): return H2C cmd because fw is not ready\n"); ++ return ret; ++ } ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); ++ ++ if(!pCmdBuffer){ ++ goto exit; ++ } ++ if(CmdLen > RTL92C_MAX_CMD_LEN){ ++ goto exit; ++ } ++ //pay attention to if race condition happened in H2C cmd setting. ++ do{ ++ h2c_box_num = pHalData->LastHMEBoxNum; ++ ++ if(!_is_fw_read_cmd_down(padapter, h2c_box_num)){ ++ DBG_8192C(" fw read cmd failed...\n"); ++ goto exit; ++ } ++ ++ if(CmdLen<=3) ++ { ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); ++ } ++ else{ ++ _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE); ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE)); ++ *(u8*)(&h2c_cmd) |= BIT(7); ++ } ++ ++ *(u8*)(&h2c_cmd) |= ElementID; ++ ++ if(h2c_cmd & BIT(7)){ ++ msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE); ++ h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex ); ++ rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex); ++ } ++ msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE); ++ h2c_cmd = cpu_to_le32( h2c_cmd ); ++ rtw_write32(padapter,msgbox_addr, h2c_cmd); ++ ++ bcmd_down = _TRUE; ++ ++ // DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" ++ // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); ++ ++ pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ; ++ ++ }while((!bcmd_down) && (retry_cnts--)); ++/* ++ if(bcmd_down) ++ DBG_8192C("H2C Cmd exe down. \n" ); ++ else ++ DBG_8192C("H2C Cmd exe failed. \n" ); ++*/ ++ ret = _SUCCESS; ++ ++exit: ++ ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ u8 ElementID, CmdLen; ++ u8 *pCmdBuffer; ++ struct cmd_msg_parm *pcmdmsg; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ pcmdmsg = (struct cmd_msg_parm*)pbuf; ++ ElementID = pcmdmsg->eid; ++ CmdLen = pcmdmsg->sz; ++ pCmdBuffer = pcmdmsg->buf; ++ ++ rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer); ++ ++ return H2C_SUCCESS; ++} ++ ++#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) ++u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) ++{ ++ u8 res=_SUCCESS; ++ struct H2C_SS_RFOFF_PARAM param; ++ DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); ++ param.gpio_period = period;//Polling GPIO_11 period time ++ param.ROFOn = (_TRUE == bfwpoll)?1:0; ++ rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); ++ return res; ++} ++#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED ++ ++u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); ++ ++ rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg) ++{ ++ u8 buf[5]; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_memset(buf, 0, 5); ++ mask = cpu_to_le32( mask ); ++ _rtw_memcpy(buf, &mask, 4); ++ buf[4] = arg; ++ ++ rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf); ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++//bitmap[0:27] = tx_rate_bitmap ++//bitmap[28:31]= Rate Adaptive id ++//arg[0:4] = macid ++//arg[5] = Short GI ++void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ rtl8192c_set_raid_cmd(pAdapter, bitmap, arg); ++ } ++ else ++ { ++ u8 macid, init_rate, shortGIrate=_FALSE; ++ ++ init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; ++ ++ macid = arg&0x1f; ++ ++ shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); ++ } ++ ++} ++ ++void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode) ++{ ++ SETPWRMODE_PARM H2CSetPwrMode; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps); ++ ++ H2CSetPwrMode.Mode = Mode; ++ ++ H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; ++ ++ H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl; ++ ++ rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); ++ ++_func_exit_; ++} ++ ++void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 rate_len, pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ // capability info: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //DBG_871X("ie len=%d\n", cur_network->IELength); ++ pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); ++ _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); ++ ++ goto _ConstructBeacon; ++ } ++ ++ //below for ad-hoc mode ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); ++ } ++ ++ ++ //todo: ERP IE ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++_ConstructBeacon: ++ ++ if ((pktlen + TXDESC_SIZE) > 512) ++ { ++ DBG_871X("beacon frame too large\n"); ++ return; ++ } ++ ++ *pLength = pktlen; ++ ++ //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); ++ ++} ++ ++void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ // Frame control. ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ SetPwrMgt(fctrl); ++ SetFrameSubType(pframe, WIFI_PSPOLL); ++ ++ // AID. ++ SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); ++ ++ // BSSID. ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ // TA. ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ *pLength = 16; ++} ++ ++void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &pmlmepriv->cur_network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ if (bForcePowerSave) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ switch(cur_network->network.InfrastructureMode) ++ { ++ case Ndis802_11Infrastructure: ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); ++ break; ++ case Ndis802_11APMode: ++ SetFrDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ break; ++ case Ndis802_11IBSS: ++ default: ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ break; ++ } ++ ++ SetSeqNum(pwlanhdr, 0); ++ ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ *pLength = pktlen; ++} ++ ++void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u8 *mac, *bssid; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0); ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pframe += pktlen; ++ ++ if(cur_network->IELength>MAX_IE_SZ) ++ return; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pktlen += cur_network->IELength; ++ ++ *pLength = pktlen; ++} ++ ++// ++// Description: In normal chip, we should send some packet to Hw which will be used by Fw ++// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then ++// Fw can tell Hw to send these packet derectly. ++// Added by tynli. 2009.10.15. ++// ++static VOID ++FillFakeTxDescriptor92C( ++ IN PADAPTER Adapter, ++ IN u8* pDesc, ++ IN u32 BufferLen, ++ IN BOOLEAN IsPsPoll ++) ++{ ++ struct tx_desc *ptxdesc = (struct tx_desc *)pDesc; ++ ++ // Clear all status ++ _rtw_memset(pDesc, 0, 32); ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; ++ ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); ++ } ++ else ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++#ifdef CONFIG_USB_HCI ++ // USB interface drop packet if the checksum of descriptor isn't correct. ++ // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++#endif ++ ++ //RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE); ++} ++ ++// To check if reserved page content is destroyed by beacon beacuse beacon is too large. ++// 2010.06.23. Added by tynli. ++VOID ++CheckFwRsvdPageContent( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); ++ u32 MaxBcnPageNum; ++ ++ if(pHalData->FwRsvdPageStartOffset != 0) ++ { ++ /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); ++ RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), ++ ("CheckFwRsvdPageContent(): The reserved page content has been"\ ++ "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", ++ MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ ++ } ++} ++ ++// ++// Description: Fill the reserved packets that FW will use to RSVD page. ++// Now we just send 4 types packet to rsvd page. ++// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. ++// Input: ++// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, ++// so we need to set the packet length to total lengh. ++// TRUE: At the second time, we should send the first packet (default:beacon) ++// to Hw again and set the lengh in descriptor to the real beacon lengh. ++// 2009.10.15 by tynli. ++static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength; ++ u8 *ReservedPagePacket; ++ u8 PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0; ++ u16 BufIndex=0; ++ u32 TotalPacketLen; ++ RSVDPAGE_LOC RsvdPageLoc; ++ BOOLEAN bDLOK = _FALSE; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ReservedPagePacket = (u8*)rtw_malloc(1000); ++ if(ReservedPagePacket == NULL){ ++ DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__); ++ return; ++ } ++ ++ _rtw_memset(ReservedPagePacket, 0, 1000); ++ ++ TxDescLen = 32;//TX_DESC_SIZE; ++ ++#ifdef CONFIG_USB_HCI ++ BufIndex = TXDESC_OFFSET; ++ TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor. ++#else ++ BufIndex = 0; ++ TxDescOffset = 0; ++#endif ++ ++ //(1) beacon ++ ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength); ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex)); ++ ++//-------------------------------------------------------------------- ++ ++ // When we count the first page size, we need to reserve description size for the RSVD ++ // packet, it will be filled in front of the packet in TXPKTBUF. ++ U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen); ++ PageNum += U1bTmp; ++ // To reserved 2 pages for beacon buffer. 2010.06.24. ++ if(PageNum == 1) ++ PageNum+=1; ++ pHalData->FwRsvdPageStartOffset = PageNum; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(2) ps-poll ++ ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE); ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); ++ ++ RsvdPageLoc.LocPsPoll = PageNum; ++ ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen); ++ PageNum += U1bTmp; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(3) null data ++ ConstructNullFunctionData( ++ Adapter, ++ &ReservedPagePacket[BufIndex], ++ &NullFunctionDataLength, ++ get_my_bssid(&(pmlmeinfo->network)), ++ _FALSE); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE); ++ ++ RsvdPageLoc.LocNullData = PageNum; ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen)); ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen); ++ PageNum += U1bTmp; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(4) probe response ++ ConstructProbeRsp( ++ Adapter, ++ &ReservedPagePacket[BufIndex], ++ &ProbeRspLength, ++ get_my_bssid(&(pmlmeinfo->network)), ++ _FALSE); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE); ++ ++ RsvdPageLoc.LocProbeRsp = PageNum; ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen)); ++ ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen); ++ ++ PageNum += U1bTmp; ++ ++ TotalPacketLen = (PageNum*128); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen; ++ _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); ++ ++ rtw_hal_mgnt_xmit(Adapter, pmgntframe); ++ ++ bDLOK = _TRUE; ++ ++ if(bDLOK) ++ { ++ DBG_871X("Set RSVD page location to Fw.\n"); ++ rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); ++ } ++ ++ rtw_mfree(ReservedPagePacket,1000); ++ ++} ++ ++void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus) ++{ ++ JOINBSSRPT_PARM JoinBssRptParm; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++_func_enter_; ++ ++ DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); ++ ++ if(mstatus == 1) ++ { ++ BOOLEAN bRecover = _FALSE; ++ ++ // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. ++ // Suggested by filen. Added by tynli. ++ rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); ++ // Do not set TSF again here or vWiFi beacon DMA INT will not work. ++ //correct_TSF(padapter, pmlmeext); ++ // Hw sequende enable by dedault. 2010.06.23. by tynli. ++ //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); ++ //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); ++ ++ //set REG_CR bit 8 ++ //U1bTmp = rtw_read8(padapter, REG_CR+1); ++ rtw_write8(padapter, REG_CR+1, 0x03); ++ ++ // Disable Hw protection for a time which revserd for Hw sending beacon. ++ // Fix download reserved page packet fail that access collision with the protection time. ++ // 2010.05.11. Added by tynli. ++ //SetBcnCtrlReg(padapter, 0, BIT3); ++ //SetBcnCtrlReg(padapter, BIT4, 0); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); ++ ++ // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. ++ if(pHalData->RegFwHwTxQCtrl&BIT6) ++ bRecover = _TRUE; ++ ++ // To tell Hw the packet is not a real beacon frame. ++ //U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ SetFwRsvdPagePkt(padapter, 0); ++ ++ // 2010.05.11. Added by tynli. ++ //SetBcnCtrlReg(padapter, BIT3, 0); ++ //SetBcnCtrlReg(padapter, 0, BIT4); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ // To make sure that if there exists an adapter which would like to send beacon. ++ // If exists, the origianl value of 0x422[6] will be 1, we should check this to ++ // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause ++ // the beacon cannot be sent by HW. ++ // 2010.06.23. Added by tynli. ++ if(bRecover) ++ { ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ } ++ ++ // Clear CR[8] or beacon packet will not be send to TxBuf anymore. ++ rtw_write8(padapter, REG_CR+1, 0x02); ++ } ++ ++ JoinBssRptParm.OpMode = mstatus; ++ ++ rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_P2P_PS ++void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow) ++{ ++ struct P2P_PS_CTWPeriod_t p2p_ps_ctw; ++ ++ p2p_ps_ctw.CTWPeriod = ctwindow; ++ ++ rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw)); ++ ++} ++ ++void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; ++ u8 i; ++ u16 ctwindow; ++ u32 start_time, tsf_low; ++ ++_func_enter_; ++ ++ switch(p2p_ps_state) ++ { ++ case P2P_PS_DISABLE: ++ DBG_8192C("P2P_PS_DISABLE \n"); ++ _rtw_memset(p2p_ps_offload, 0 ,1); ++ break; ++ case P2P_PS_ENABLE: ++ DBG_8192C("P2P_PS_ENABLE \n"); ++ // update CTWindow value. ++ if( pwdinfo->ctwindow > 0 ) ++ { ++ p2p_ps_offload->CTWindow_En = 1; ++ ctwindow = pwdinfo->ctwindow; ++ if(IS_HARDWARE_TYPE_8723A(padapter)) ++ { ++ //rtw_write16(padapter, REG_ATIMWND, ctwindow); ++ } ++ else ++ { ++ rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow); ++ } ++ } ++ ++ // hw only support 2 set of NoA ++ for( i=0 ; inoa_num ; i++) ++ { ++ // To control the register setting for which NOA ++ rtw_write8(padapter, 0x5CF, (i << 4)); ++ if(i == 0) ++ p2p_ps_offload->NoA0_En = 1; ++ else ++ p2p_ps_offload->NoA1_En = 1; ++ ++ // config P2P NoA Descriptor Register ++ rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]); ++ ++ rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]); ++ ++ //Get Current TSF value ++ tsf_low = rtw_read32(padapter, REG_TSFTR); ++ ++ start_time = pwdinfo->noa_start_time[i]; ++ if(pwdinfo->noa_count[i] != 1) ++ { ++ while( start_time <= (tsf_low+(50*1024) ) ) ++ { ++ start_time += pwdinfo->noa_interval[i]; ++ if(pwdinfo->noa_count[i] != 255) ++ pwdinfo->noa_count[i]--; ++ } ++ } ++ //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time); ++ rtw_write32(padapter, 0x5E8, start_time); ++ ++ rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]); ++ } ++ ++ if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) ++ { ++ // rst p2p circuit ++ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); ++ ++ p2p_ps_offload->Offload_En = 1; ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2p_ps_offload->role= 1; ++ p2p_ps_offload->AllStaSleep = 0; ++ } ++ else ++ { ++ p2p_ps_offload->role= 0; ++ } ++ ++ p2p_ps_offload->discovery = 0; ++ } ++ break; ++ case P2P_PS_SCAN: ++ DBG_8192C("P2P_PS_SCAN \n"); ++ p2p_ps_offload->discovery = 1; ++ break; ++ case P2P_PS_SCAN_DONE: ++ DBG_8192C("P2P_PS_SCAN_DONE \n"); ++ p2p_ps_offload->discovery = 0; ++ pwdinfo->p2p_ps_state = P2P_PS_ENABLE; ++ break; ++ default: ++ break; ++ } ++ ++ rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload); ++ ++_func_exit_; ++ ++} ++#endif // CONFIG_P2P_PS ++ ++#ifdef CONFIG_IOL ++#include ++int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) ++{ ++ IO_OFFLOAD_LOC IoOffloadLoc; ++ u32 start_time = rtw_get_current_time(); ++ u32 passing_time_ms; ++ u8 polling_ret; ++ int ret = _FAIL; ++ ++ if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) ++ goto exit; ++ ++ dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); ++ ++ IoOffloadLoc.LocCmd = 0; ++ if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc)) ++ goto exit; ++ ++ //polling if the IO offloading is done ++ while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) { ++ #if 0 //C2H ++ if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR)) ++ break; ++ #else// 0x1c3 ++ if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3))) ++ break; ++ #endif ++ rtw_msleep_os(5); ++ } ++ #if 0 //debug ++ DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" ++ , polling_ret==0xff?"success":"error" ++ , polling_ret ++ , rtw_read32(adapter, 0x1c0) ++ , rtw_read32(adapter, 0x1c4) ++ , rtw_read32(adapter, 0x1cc) ++ , rtw_read32(adapter, 0x1e8) ++ , rtw_read32(adapter, 0x130) ++ , rtw_read32(adapter, 0x134) ++ ); ++ rtw_write32(adapter, 0x1c0, 0x0); ++ #endif ++ ++ if(polling_ret == 0xff) ++ ret =_SUCCESS; ++ else { ++ DBG_871X("IOL %s, polling_ret:0x%02x\n" ++ //", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" ++ , polling_ret==0xff?"success":"error" ++ , polling_ret ++ //, rtw_read32(adapter, 0x1c0) ++ //, rtw_read32(adapter, 0x1c4) ++ //, rtw_read32(adapter, 0x1cc) ++ //, rtw_read32(adapter, 0x1e8) ++ //, rtw_read32(adapter, 0x130) ++ //, rtw_read32(adapter, 0x134) ++ ); ++ #if 0 //debug ++ rtw_write16(adapter, 0x1c4, 0x0000); ++ rtw_msleep_os(10); ++ DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4)); ++ #endif ++ ++ } ++ ++ { ++ #if 0 //C2H ++ u32 c2h_evt; ++ int i; ++ c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL); ++ DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt); ++ rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0); ++ #else// 0x1c3 ++ DBG_871X("IOL %s complete in %ums\n", __FUNCTION__, passing_time_ms); ++ rtw_write8(adapter, 0x1c3, 0x0); ++ #endif ++ } ++ ++exit: ++ return ret; ++ ++} ++#endif //CONFIG_IOL ++ ++ ++#ifdef CONFIG_BEACON_DISABLE_OFFLOAD ++/* ++ rtl8192c_dis_beacon_fun_cmd() ++ This function shall only be called by PORT1. ++ PORT0's beacon function can't be disabled, because it's used by RA function in FW/HW. ++ ++ // Still has the REG_BCN_CTRL_1 modified by unknowned party issue in case of Primary Interface + PORT1 combination. ++*/ ++u8 rtl8192c_dis_beacon_fun_cmd(_adapter* padapter) ++{ ++ u8 buf[2]; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_memset(buf, 0, sizeof(buf)); ++ ++ if (padapter->iface_type == IFACE_PORT0) { ++ //buf[0] = 0x1; ++ DBG_871X("%s(): ERROR! padapter->iface_type = %d\n", __FUNCTION__, padapter->iface_type); ++ return _FAIL; ++ } else ++ buf[1] = 0x1; ++ ++ rtl8192c_FillH2CCmd(padapter, H2C_92C_DISABLE_BCN_FUNC, 2, buf); ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif // CONFIG_BEACON_DISABLE_OFFLOAD ++ ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++/* ++ ask FW to Reset sync register at Beacon early interrupt ++*/ ++u8 rtl8192c_reset_tsf(_adapter *padapter, u8 reset_port ) ++{ ++ u8 buf[2]; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ if (IFACE_PORT0==reset_port) { ++ buf[0] = 0x1; buf[1] = 0; ++ ++ } else{ ++ buf[0] = 0x0; buf[1] = 0x1; ++ } ++ rtl8192c_FillH2CCmd(padapter, H2C_92C_RESET_TSF, 2, buf); ++_func_exit_; ++ ++ return res; ++} ++ ++int reset_tsf(PADAPTER Adapter, u8 reset_port ) ++{ ++ u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; ++ u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? ++ REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; ++ ++ rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ ++ reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); ++ rtl8192c_reset_tsf(Adapter, reset_port); ++ ++ while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { ++ rtw_msleep_os(100); ++ loop_cnt++; ++ reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); ++ } ++ ++ return(loop_cnt >= 10) ? _FAIL : _TRUE; ++} ++ ++ ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ ++#ifdef CONFIG_WOWLAN ++ ++void rtl8192c_set_wowlan_cmd(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ SETWOWLAN_PARM pwowlan_parm; ++ struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ pwowlan_parm.mode =0; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ pwowlan_parm.second_mode =0; ++ pwowlan_parm.reserve=0; ++ ++ if(pwrpriv->wowlan_mode ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; ++ //printk("\n %s 1.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ if(pwrpriv->wowlan_pattern ==_TRUE){ ++ pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; ++ //printk("\n %s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ if(pwrpriv->wowlan_magic ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; ++ //printk("\n %s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ if(pwrpriv->wowlan_unicast ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_UNICAST; ++ //printk("\n %s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ //WOWLAN_GPIO_ACTIVE means GPIO high active ++ //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; ++ pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; ++ pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; ++ ++ rtl8192c_set_FwJoinBssReport_cmd( padapter, 1); ++ ++ //GPIO3 ++ pwowlan_parm.gpio_index=3; ++ ++ //duration unit is 64us ++ pwowlan_parm.gpio_duration=0xff; ++ // ++ pwowlan_parm.second_mode|=FW_WOWLAN_GPIO_WAKEUP_EN; ++ //printk("\n %s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ { u8 *ptr=(u8 *)&pwowlan_parm; ++ printk("\n %s H2C_WO_WLAN=%x %02x:%02x:%02x:%02x:%02x \n",__FUNCTION__,H2C_WO_WLAN_CMD,ptr[0],ptr[1],ptr[2],ptr[3],ptr[4] ); ++ } ++ rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 4, (u8 *)&pwowlan_parm); ++ ++ //keep alive period = 3 * 10 BCN interval ++ pwowlan_parm.mode =3; ++ pwowlan_parm.gpio_index=3; ++ rtl8192c_FillH2CCmd(padapter, KEEP_ALIVE_CONTROL_CMD, 2, (u8 *)&pwowlan_parm); ++ printk("%s after KEEP_ALIVE_CONTROL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); ++ ++ pwowlan_parm.mode =1; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ rtl8192c_FillH2CCmd(padapter, DISCONNECT_DECISION_CTRL_CMD, 3, (u8 *)&pwowlan_parm); ++ printk("%s after DISCONNECT_DECISION_CTRL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); ++ ++ //enable GPIO wakeup ++ pwowlan_parm.mode =1; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ rtl8192c_FillH2CCmd(padapter, REMOTE_WAKE_CTRL_CMD, 3, (u8 *)&pwowlan_parm); ++ } ++ else ++ rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 3, (u8 *)&pwowlan_parm); ++ ++ ++_func_exit_; ++ ++ return ; ++ ++} ++ ++#endif //CONFIG_WOWLAN ++ ++ ++ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c +@@ -0,0 +1,5058 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include ++#include ++#include ++#include ++ ++#include ++#include "../dm.h" ++#ifdef CONFIG_INTEL_PROXIM ++#include "../proxim/intel_proxim.h" ++#endif ++//============================================================ ++// Global var ++//============================================================ ++static u32 EDCAParam[maxAP][3] = ++{ // UL DL ++ {0x5ea322, 0x00a630, 0x00a44f}, //atheros AP ++ {0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP ++ {0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP ++ {0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP ++ {0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP ++ //{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP ++ {0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP ++ {0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP ++ {0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP ++// {0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP ++}; ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_DIGInit() ++ * ++ * Overview: Set DIG scheme init value. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * ++ *---------------------------------------------------------------------------*/ ++static void dm_DIGInit( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ ++ pDigTable->Dig_Enable_Flag = _TRUE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ ++ pDigTable->CurIGValue = 0x20; ++ pDigTable->PreIGValue = 0x0; ++ ++ pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT; ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; ++ ++ pDigTable->RssiLowThresh = DM_DIG_THRESH_LOW; ++ pDigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; ++ ++ pDigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; ++ pDigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; ++ ++ ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ pDigTable->rx_gain_range_min = DM_DIG_MIN; ++ pDigTable->rx_gain_range_min_nolink = 0; ++ ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; ++ pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; ++ ++ pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX; ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ ++ pDigTable->ForbiddenIGI = DM_DIG_MIN; ++ pDigTable->LargeFAHit = 0; ++ pDigTable->Recover_cnt = 0; ++ pdmpriv->DIG_Dynamic_MIN = 0x25; //for FUNAI_TV ++} ++ ++ ++static u8 dm_initial_gain_MinPWDB( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ int Rssi_val_min = 0; ++ ++ if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) && ++ (pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ) ++ { ++ if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) ++#ifdef CONFIG_CONCURRENT_MODE ++ Rssi_val_min = (pdmpriv->UndecoratedSmoothedPWDB+pdmpriv->EntryMinUndecoratedSmoothedPWDB)/2; ++#else ++ Rssi_val_min = (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)? ++ pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++#endif //CONFIG_CONCURRENT_MODE ++ else ++ Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ } ++ else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || ++ pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) ++ Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) ++ Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ ++ //printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n" ++ //,__FUNCTION__,pDigTable->CurSTAConnectState, ++ //pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB); ++ ++ return (u8)Rssi_val_min; ++} ++ ++ ++static VOID ++dm_FalseAlarmCounterStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 ret_value; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord); ++ FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord); ++ FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord); ++ FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord); ++ FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ++ ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+ ++ FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; ++ ++ ++ //hold cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1); ++ ++ ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0); ++ FalseAlmCnt->Cnt_Cck_fail = ret_value; ++ ++ ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3); ++ FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; ++ ++ FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Parity_Fail + ++ FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + ++ FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Cck_fail); ++ ++ Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all; ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_adapter) ++ pbuddy_adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ //reset false alarm counter registers ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1); ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0); ++ //reset cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0); ++ //enable cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2); ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", ++ // FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) ); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", ++ // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", ++ // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); ++} ++ ++ ++static VOID ++DM_Write_DIG( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(pAdapter)) ++ { ++ PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter; ++ PHAL_DATA_TYPE pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter); ++ struct dm_priv *pbuddy_dmpriv = &pbuddy_HalData->dmpriv; ++ DIG_T *pbuddy_DigTable = &pbuddy_dmpriv->DM_DigTable; ++ ++ //sync IGValue ++ pbuddy_DigTable->PreIGValue = pDigTable->PreIGValue; ++ pbuddy_DigTable->CurIGValue = pDigTable->CurIGValue; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", ++ // DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal)); ++ ++ if (pDigTable->Dig_Enable_Flag == _FALSE) ++ { ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("DIG is disabled\n")); ++ pDigTable->PreIGValue = 0x17; ++ return; ++ } ++ ++ if( (pDigTable->PreIGValue != pDigTable->CurIGValue) || ( pAdapter->bForceWriteInitGain ) ) ++ { ++ // Set initial gain. ++ //PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue); ++ //PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue); ++ //printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue); ++ ++#if defined CONFIG_WIDI_DIG_3E && defined CONFIG_INTEL_WIDI ++ if( pAdapter->mlmepriv.widi_enable == _TRUE ) ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, 0x3e); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, 0x3e); ++ } ++ else ++#endif //defined CONFIG_WIDI_DIG_3E && defined CONFIG_INTEL_WIDI ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue); ++ } ++ pDigTable->PreIGValue = pDigTable->CurIGValue; ++ } ++} ++ ++ ++static VOID ++dm_CtrlInitGainByFA( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ u8 value_IGI = pDigTable->CurIGValue; ++ ++ if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) ++ value_IGI --; ++ else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) ++ value_IGI += 0; ++ else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2) ++ value_IGI ++; ++ else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2) ++ value_IGI +=2; ++ ++ if(value_IGI > DM_DIG_FA_UPPER) ++ value_IGI = DM_DIG_FA_UPPER; ++ if(value_IGI < DM_DIG_FA_LOWER) ++ value_IGI = DM_DIG_FA_LOWER; ++ ++ if(FalseAlmCnt->Cnt_all > 10000) ++ value_IGI = DM_DIG_FA_UPPER; ++ ++ pDigTable->CurIGValue = value_IGI; ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++ ++#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) ++{ ++ ++ u32 isBT; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++#ifdef CONFIG_DM_ADAPTIVITY ++ u8 Adap_IGI_Upper = pdmpriv->IGI_target + 30 + (u8) pdmpriv->TH_L2H_ini -(u8) pdmpriv->TH_EDCCA_HL_diff; ++#endif ++ ++ //modify DIG upper bound ++ if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ else ++ pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; ++ ++ //modify DIG lower bound ++ if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25)) ++ pdmpriv->DIG_Dynamic_MIN++; ++ if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) ++ pdmpriv->DIG_Dynamic_MIN--; ++ if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) ++ pdmpriv->DIG_Dynamic_MIN--; ++ ++ //modify DIG lower bound, deal with abnorally large false alarm ++ if(FalseAlmCnt->Cnt_all > 10000) ++ { ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); ++ pDigTable->LargeFAHit++; ++ if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) ++ { ++ pDigTable->ForbiddenIGI = pDigTable->CurIGValue; ++ pDigTable->LargeFAHit = 1; ++ } ++ if(pDigTable->LargeFAHit >= 3) ++ { ++ if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max) ++ pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; ++ else ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ pDigTable->Recover_cnt = 3600; //3600=2hr ++ } ++ } ++ else ++ { ++ //Recovery mechanism for IGI lower bound ++ if(pDigTable->Recover_cnt != 0){ ++ pDigTable->Recover_cnt --; ++ } ++ else ++ { ++ if(pDigTable->LargeFAHit == 0 ) ++ { ++ if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN) ++ { ++ pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; ++ pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; ++ } ++ else ++ { ++ pDigTable->ForbiddenIGI --; ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ } ++ } ++ else if(pDigTable->LargeFAHit == 3 ) ++ { ++ pDigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ #ifdef CONFIG_USB_HCI ++ if(FalseAlmCnt->Cnt_all < 250) ++ { ++#endif ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); ++ ++ isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; ++ ++ if(!isBT){ ++ ++ if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) ++ { ++ if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; ++ else ++ pDigTable->BackoffVal -= 2; ++ } ++ else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) ++ { ++ if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; ++ else ++ pDigTable->BackoffVal +=2; ++ } ++ } ++ else ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ ++ pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; ++ ++ //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); ++#ifdef CONFIG_USB_HCI ++ } ++ else ++ { ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); ++ //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); ++ ++ //Adjust initial gain by false alarm ++ if(FalseAlmCnt->Cnt_all > 1000) ++ pDigTable->CurIGValue = pDigTable ->PreIGValue+2; ++ else if (FalseAlmCnt->Cnt_all > 750) ++ pDigTable->CurIGValue = pDigTable->PreIGValue+1; ++ else if(FalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue = pDigTable->PreIGValue-1; ++ } ++#endif ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ if(pdmpriv->DMFlag & DYNAMIC_FUNC_ADAPTIVITY) ++ { ++ if(pDigTable->CurIGValue > Adap_IGI_Upper) ++ pDigTable->CurIGValue = Adap_IGI_Upper; ++ ++ if(pdmpriv->IGI_LowerBound != 0) ++ { ++ if(pDigTable->CurIGValue < pdmpriv->IGI_LowerBound) ++ pDigTable->CurIGValue = pdmpriv->IGI_LowerBound; ++ } ++ LOG_LEVEL(_drv_info_, FUNC_ADPT_FMT": pdmpriv->IGI_LowerBound = %d\n", ++ FUNC_ADPT_ARG(pAdapter), pdmpriv->IGI_LowerBound); ++ } ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ ++ //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, ++ // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); ++ //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++#else ++static VOID dm_CtrlInitGainByRssi(IN PADAPTER pAdapter) ++{ ++ u32 isBT; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ u8 RSSI_tmp = dm_initial_gain_MinPWDB(pAdapter); ++#ifdef CONFIG_DM_ADAPTIVITY ++ u8 Adap_IGI_Upper = pdmpriv->IGI_target + 30 + (u8) pdmpriv->TH_L2H_ini -(u8) pdmpriv->TH_EDCCA_HL_diff; ++#endif ++ ++ //modify DIG upper bound ++ if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ else ++ pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; ++ //printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max); ++ //modify DIG lower bound, deal with abnorally large false alarm ++ if(FalseAlmCnt->Cnt_all > 10000) ++ { ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); ++ ++ pDigTable->LargeFAHit++; ++ if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) ++ { ++ pDigTable->ForbiddenIGI = pDigTable->CurIGValue; ++ pDigTable->LargeFAHit = 1; ++ } ++ ++ if(pDigTable->LargeFAHit >= 3) ++ { ++ if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max) ++ pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; ++ else ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ pDigTable->Recover_cnt = 3600; //3600=2hr ++ } ++ } ++ else ++ { ++ //Recovery mechanism for IGI lower bound ++ if(pDigTable->Recover_cnt != 0) ++ pDigTable->Recover_cnt --; ++ else ++ { ++ if(pDigTable->LargeFAHit == 0 ) ++ { ++ if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN) ++ { ++ pDigTable->ForbiddenIGI = DM_DIG_MIN; ++ pDigTable->rx_gain_range_min = DM_DIG_MIN; ++ } ++ else ++ { ++ pDigTable->ForbiddenIGI --; ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ } ++ } ++ else if(pDigTable->LargeFAHit == 3 ) ++ { ++ pDigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit)); ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min)); ++ ++#ifdef CONFIG_USB_HCI ++ if(FalseAlmCnt->Cnt_all < 250) ++ { ++#endif ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); ++ ++ isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; ++ ++ if(!isBT){ ++ ++ if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) ++ { ++ if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; ++ else ++ pDigTable->BackoffVal -= 2; ++ } ++ else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) ++ { ++ if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; ++ else ++ pDigTable->BackoffVal +=2; ++ } ++ } ++ else ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ ++ pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; ++ ++ //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); ++#ifdef CONFIG_USB_HCI ++ } ++ else ++ { ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); ++ //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); ++ ++ //Adjust initial gain by false alarm ++ if(FalseAlmCnt->Cnt_all > 1000) ++ pDigTable->CurIGValue = pDigTable ->PreIGValue+2; ++ else if (FalseAlmCnt->Cnt_all > 750) ++ pDigTable->CurIGValue = pDigTable->PreIGValue+1; ++ else if(FalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue = pDigTable->PreIGValue-1; ++ } ++#endif ++ ++ if(RSSI_tmp <= DM_DIG_MIN) ++ pDigTable->rx_gain_range_min = DM_DIG_MIN; ++ else if(RSSI_tmp >= DM_DIG_MAX) ++ pDigTable->rx_gain_range_min = DM_DIG_MAX; ++ else ++ pDigTable->rx_gain_range_min = RSSI_tmp; ++ ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ if(pdmpriv->DMFlag & DYNAMIC_FUNC_ADAPTIVITY) ++ { ++ if(pDigTable->CurIGValue > Adap_IGI_Upper) ++ pDigTable->CurIGValue = Adap_IGI_Upper; ++ ++ if(pdmpriv->IGI_LowerBound != 0) ++ { ++ if(pDigTable->CurIGValue < pdmpriv->IGI_LowerBound) ++ pDigTable->CurIGValue = pdmpriv->IGI_LowerBound; ++ } ++ LOG_LEVEL(_drv_info_, FUNC_ADPT_FMT": pdmpriv->IGI_LowerBound = %d\n", ++ FUNC_ADPT_ARG(pAdapter), pdmpriv->IGI_LowerBound); ++ } ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ ++ //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, ++ // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); ++ //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++#endif ++ ++static VOID ++dm_initial_gain_Multi_STA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ int rssi_strength = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ BOOLEAN bMulti_STA = _FALSE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ //AP Mode ++ if(check_buddy_fwstate(pAdapter, WIFI_AP_STATE) == _TRUE && (rssi_strength !=0)) ++ { ++ bMulti_STA = _TRUE; ++ } ++ else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT && rssi_strength==0) //STA+STA MODE ++ { ++ bMulti_STA = _TRUE; ++ rssi_strength = pdmpriv->UndecoratedSmoothedPWDB; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ++ //ADHOC and AP Mode ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ bMulti_STA = _TRUE; ++ } ++ ++ ++ if((bMulti_STA == _FALSE) ++ || (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT)) ++ { ++ pdmpriv->binitialized = _FALSE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ return; ++ } ++ else if(pdmpriv->binitialized == _FALSE) ++ { ++ pdmpriv->binitialized = _TRUE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ ++ // Initial gain control by ap mode ++ if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) ++ { ++ if ( (rssi_strength < pDigTable->RssiLowThresh) && ++ (pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1)) ++ { ++ // Set to dig value to 0x20 for Luke's opinion after disable dig ++ if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2) ++ { ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1; ++ } ++ else if (rssi_strength > pDigTable->RssiHighThresh) ++ { ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2; ++ dm_CtrlInitGainByFA(pAdapter); ++ } ++ } ++ else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0) ++ { ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", ++ // DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage)); ++} ++ ++static VOID ++dm_initial_gain_STA_beforelinked( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); ++ //2012.03.30 LukeLee: enable DIG before link but with very high thresholds ++ // Updated by Albert 2012/09/27 ++ // Copy the same rule from 8192du code. ++ if( pFalseAlmCnt->Cnt_all > 2000 ) ++ pDigTable->CurIGValue += 2; ++ else if ( ( pFalseAlmCnt->Cnt_all > 1000 ) && ( pFalseAlmCnt->Cnt_all <= 1000 ) ) ++ pDigTable->CurIGValue += 1; ++ else if(pFalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue -= 1; ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++ printk("%s ==> FalseAlmCnt->Cnt_all:%d CurIGValue:0x%02x \n",__FUNCTION__,pFalseAlmCnt->Cnt_all ,pDigTable->CurIGValue); ++} ++ ++static VOID ++dm_initial_gain_STA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", ++ // DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState)); ++ ++ ++ if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState|| ++ pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT || ++ pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ++ { ++ // beforeconnect -> beforeconnect or connect -> connect ++ // (dis)connect -> beforeconnect ++ // disconnect -> connecct or beforeconnect -> connect ++ if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT) ++ { ++ pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); ++ dm_CtrlInitGainByRssi(pAdapter); ++ } ++#if 0 ++ else if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE ++ && pAdapter->wdinfo.driver_interface == DRIVER_CFG80211) ++ { ++ //pDigTable->CurIGValue = 0x30; ++ DM_Write_DIG(pAdapter); ++ } ++#endif ++ else{ // pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT ++ #ifdef CONFIG_BEFORE_LINKED_DIG ++ //printk("%s==> ##1 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); ++ dm_initial_gain_STA_beforelinked(pAdapter); ++ DM_Write_DIG(pAdapter); ++ #endif //CONFIG_BEFORE_LINKED_DIG ++ } ++ } ++ else ++ { ++ // connect -> disconnect or beforeconnect -> disconnect ++ pDigTable->Rssi_val_min = 0; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDigTable->CurIGValue = 0x20; ++ pDigTable->PreIGValue = 0; ++ #ifdef CONFIG_BEFORE_LINKED_DIG ++ //printk("%s==> ##2 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); ++ dm_initial_gain_STA_beforelinked(pAdapter); ++ #endif //CONFIG_BEFORE_LINKED_DIG ++ ++ ++ DM_Write_DIG(pAdapter); ++ } ++ ++} ++ ++ ++static void dm_CCK_PacketDetectionThresh( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ++ { ++ pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); ++ if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi) ++ { ++ if(pDigTable->Rssi_val_min <= 25) ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ else ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; ++ } ++ else{ ++ if(pDigTable->Rssi_val_min <= 20) ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ else ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; ++ } ++ } ++ else ++ pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX; ++ ++ if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState) ++ { ++ if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)|| ++ (pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX)) ++ { ++ PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83); ++ ++ //PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40); ++ //if(IS_92C_SERIAL(pHalData->VersionID)) ++ //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd); ++ //PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47); ++ //if(IS_92C_SERIAL(pHalData->VersionID)) ++ //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3); ++ } ++ ++ pDigTable->PreCCKPDState = pDigTable->CurCCKPDState; ++ } ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState)); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID))); ++ ++} ++ ++ ++static void ++dm_CtrlInitGainByTwoPort( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++ if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE) ++ { ++ } ++ else ++#endif ++ return; ++ } ++ ++ // Decide the current status and if modify initial gain or not ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT; ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_CONNECT; ++ } ++ else ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT; ++ } ++ ++ ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2)) ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ if(pAdapter->stapriv.asoc_sta_count > 2) ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(pAdapter, WIFI_AP_STATE) == _TRUE) ++ { ++ PADAPTER pbuddy_adapter = pAdapter->pbuddy_adapter; ++ ++ if(pbuddy_adapter->stapriv.asoc_sta_count > 2) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_CONNECT; ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; ++ } ++ } ++ else if(check_buddy_fwstate(pAdapter, WIFI_STATION_STATE) == _TRUE && ++ check_buddy_fwstate(pAdapter, _FW_LINKED) == _TRUE) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_CONNECT; ++ ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ ++ dm_initial_gain_STA(pAdapter); ++ dm_initial_gain_Multi_STA(pAdapter); ++ //Baron temp DIG solution for DMP ++ //dm_CtrlInitGainByFA(pAdapter); ++ ++ dm_CCK_PacketDetectionThresh(pAdapter); ++ ++ pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState; ++ ++} ++ ++ ++static void dm_DIG( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ //Read 0x0c50; Initial gain ++ pDigTable->PreIGValue = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n")); ++ ++ if(pdmpriv->bDMInitialGainEnable == _FALSE) ++ return; ++ ++ //if(pDigTable->Dig_Enable_Flag == _FALSE) ++ // return; ++ ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) ++ return; ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n")); ++ ++ dm_CtrlInitGainByTwoPort(pAdapter); ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n")); ++} ++ ++static void dm_SavePowerIndex(IN PADAPTER Adapter) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); ++} ++ ++static void dm_RestorePowerIndex(IN PADAPTER Adapter) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); ++} ++ ++static void dm_WritePowerIndex( ++ IN PADAPTER Adapter, ++ IN u8 Value) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ rtw_write8(Adapter, Power_Index_REG[index], Value); ++} ++ ++static void dm_InitDynamicTxPower(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_INTEL_PROXIM ++ if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) ++#else ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++#endif ++ { ++ dm_SavePowerIndex(Adapter); ++ pdmpriv->bDynamicTxPowerEnable = _TRUE; ++ } ++ else ++#else ++ pdmpriv->bDynamicTxPowerEnable = _FALSE; ++#endif ++ ++ pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++} ++ ++ ++static void dm_DynamicTxPower(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ int UndecoratedSmoothedPWDB; ++ ++ if(!pdmpriv->bDynamicTxPowerEnable) ++ return; ++ ++ // If dynamic high power is disabled. ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) ) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ // STA not connected and AP not connected ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && ++ (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++#ifdef CONFIG_INTEL_PROXIM ++ if(Adapter->proximity.proxim_on== _TRUE){ ++ struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; ++ // Intel set fixed tx power ++ printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); ++ if(prox_priv!=NULL){ ++ if(prox_priv->proxim_modeinfo->power_output> 0) ++ ++ { ++ switch(prox_priv->proxim_modeinfo->power_output){ ++ case 1: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ printk("TxHighPwrLevel_100\n"); ++ break; ++ case 2: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; ++ printk("TxHighPwrLevel_70\n"); ++ break; ++ case 3: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; ++ printk("TxHighPwrLevel_50\n"); ++ break; ++ case 4: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; ++ printk("TxHighPwrLevel_35\n"); ++ break; ++ case 5: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; ++ printk("TxHighPwrLevel_15\n"); ++ break; ++ default: ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; ++ printk("TxHighPwrLevel_100\n"); ++ break; ++ } ++ } ++ } ++ } ++ else ++#endif ++{ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port ++ { ++ //todo: AP Mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++} ++ if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal ++ dm_RestorePowerIndex(Adapter); ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ dm_WritePowerIndex(Adapter, 0x14); ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ dm_WritePowerIndex(Adapter, 0x10); ++ } ++ pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; ++ ++} ++ ++ ++static VOID ++DM_ChangeDynamicInitGainThresh( ++ IN PADAPTER pAdapter, ++ IN u32 DM_Type, ++ IN u32 DM_Value) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if (DM_Type == DIG_TYPE_THRESH_HIGH) ++ { ++ pDigTable->RssiHighThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_THRESH_LOW) ++ { ++ pDigTable->RssiLowThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_ENABLE) ++ { ++ pDigTable->Dig_Enable_Flag = _TRUE; ++ } ++ else if (DM_Type == DIG_TYPE_DISABLE) ++ { ++ pDigTable->Dig_Enable_Flag = _FALSE; ++ } ++ else if (DM_Type == DIG_TYPE_BACKOFF) ++ { ++ if(DM_Value > 30) ++ DM_Value = 30; ++ pDigTable->BackoffVal = (u8)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) ++ { ++ if(DM_Value == 0) ++ DM_Value = 0x1; ++ pDigTable->rx_gain_range_min = (u8)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) ++ { ++ if(DM_Value > 0x50) ++ DM_Value = 0x50; ++ pDigTable->rx_gain_range_max = (u8)DM_Value; ++ } ++} /* DM_ChangeDynamicInitGainThresh */ ++ ++ ++static VOID PWDB_Monitor( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ int i; ++ int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; ++ u8 sta_cnt=0; ++ u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi ++ ++ if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE) ++ return; ++ ++ ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ _list *plist, *phead; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &Adapter->stapriv; ++ u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(psta ->hwaddr, bcast_addr, ETH_ALEN) || ++ _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) ++ continue; ++ ++ if(psta->state & WIFI_ASOC_STATE) ++ { ++ ++ if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ // Report every sta's RSSI to FW ++ for(i=0; i< sta_cnt; i++) ++ { ++ rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); ++ } ++ } ++ ++ } ++ ++ ++ ++ if(tmpEntryMaxPWDB != 0) // If associated entry is found ++ { ++ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ } ++ else ++ { ++ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; ++ } ++ ++ if(tmpEntryMinPWDB != 0xff) // If associated entry is found ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ } ++ else ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; ++ } ++ ++ ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16); ++ ++ param |= 0;//macid=0 for sta mode; ++ ++ rtl8192c_set_rssi_cmd(Adapter, (u8*)¶m); ++ } ++ } ++ ++} ++ ++ ++static void ++DM_InitEdcaTurbo( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pHalData->bCurrentTurboEDCA = _FALSE; ++ Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE; ++ ++} ++ ++ ++static void ++dm_CheckEdcaTurbo( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ u8 bbtchange = _FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ ++ if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) ++ { ++ goto dm_CheckEdcaTurbo_EXIT; ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor >= maxAP) ++ { ++ goto dm_CheckEdcaTurbo_EXIT; ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(pbtpriv->BT_Coexist) ++ { ++ if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) ++ { ++ bbtchange = _TRUE; ++ } ++ } ++#endif ++ ++ // Check if the status needs to be changed. ++ if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) ++ { ++ cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; ++ cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; ++ ++ //traffic, TX or RX ++ if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++ if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA)) ++ { ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ { ++ edca_param = pbtpriv->BT_EDCA[trafficIndex]; ++ } ++ else ++#endif ++ { ++#if 0 ++ //adjust EDCA parameter for BE queue ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++#else ++ ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else ++ { ++ edca_param = EDCAParam[unknownAP][trafficIndex]; ++ } ++#endif ++ } ++ ++#ifdef CONFIG_PCI_HCI ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ edca_param = 0x60a42b; ++ } ++ else ++ { ++ edca_param = 0x6ea42b; ++ } ++#endif ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); ++ ++ pdmpriv->prv_traffic_idx = trafficIndex; ++ } ++ ++ pHalData->bCurrentTurboEDCA = _TRUE; ++ } ++ else ++ { ++ // ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ // ++ if(pHalData->bCurrentTurboEDCA) ++ { ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); ++ pHalData->bCurrentTurboEDCA = _FALSE; ++ } ++ } ++ ++dm_CheckEdcaTurbo_EXIT: ++ // Set variables for next time. ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; ++ precvpriv->last_rx_bytes = precvpriv->rx_bytes; ++ ++} ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++ ++static VOID ++dm_TXPowerTrackingCallback_ThermalMeter_92C( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100; ++ int ele_A, ele_D, TempCCk, X, value32; ++ int Y, ele_C; ++ s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0; ++ int i = 0; ++ BOOLEAN is2T = IS_92C_SERIAL(pHalData->VersionID); ++ ++#if MP_DRIVER == 1 ++ PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); ++ u8 *TxPwrLevel = pMptCtx->TxPwrLevel; ++#endif ++ u8 OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++#if 0 ++ u32 DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = { ++ {0x1c, 0x1c, 0x1d, 0x1d, 0x1e, ++ 0x1f, 0x00, 0x00, 0x01, 0x01, ++ 0x02, 0x02, 0x03}, ++ {0x1c, 0x1d, 0x1e, 0x1e, 0x1e, ++ 0x1f, 0x00, 0x00, 0x01, 0x02, ++ 0x02, 0x03, 0x03}}; ++#endif ++#ifdef CONFIG_USB_HCI ++ u8 ThermalValue_HP_count = 0; ++ u32 ThermalValue_HP = 0; ++ s32 index_mapping_HP[index_mapping_HP_NUM] = { ++ 0, 1, 3, 4, 6, ++ 7, 9, 10, 12, 13, ++ 15, 16, 18, 19, 21 ++ }; ++ ++ s8 index_HP; ++#endif ++ ++ pdmpriv->TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pdmpriv->bTXPowerTrackingInit = _TRUE; ++ ++ if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14) ++ pdmpriv->bCCKinCH14 = _TRUE; ++ else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14) ++ pdmpriv->bCCKinCH14 = _FALSE; ++ ++ //DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); ++ ++ ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER, 0x1f); // 0x24: RF Reg[4:0] ++ ++ //DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue, pHalData->EEPROMThermalMeter); ++ ++ rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter)); ++ ++ if(is2T) ++ rf = 2; ++ else ++ rf = 1; ++ ++ if(ThermalValue) ++ { ++// if(!pHalData->ThermalValue) ++ { ++ //Query OFDM path A default setting ++ ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; ++ for(i=0; ibCCKinCH14) ++ { ++ if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE) ++ { ++ CCK_index_old =(u8)i; ++ //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); ++ break; ++ } ++ } ++ else ++ { ++ if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE) ++ { ++ CCK_index_old =(u8)i; ++ //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); ++ break; ++ } ++ } ++ } ++ ++ if(!pdmpriv->ThermalValue) ++ { ++ pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter; ++ pdmpriv->ThermalValue_LCK = ThermalValue; ++ pdmpriv->ThermalValue_IQK = ThermalValue; ++ pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter; ++ ++#ifdef CONFIG_USB_HCI ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i]; ++ pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old; ++#else ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] = OFDM_index_old[i]; ++ pdmpriv->CCK_index = CCK_index_old; ++#endif ++ } ++ ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue; ++ pdmpriv->ThermalValue_HP_index++; ++ if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM) ++ pdmpriv->ThermalValue_HP_index = 0; ++ ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ { ++ if(pdmpriv->ThermalValue_HP[i]) ++ { ++ ThermalValue_HP += pdmpriv->ThermalValue_HP[i]; ++ ThermalValue_HP_count++; ++ } ++ } ++ ++ if(ThermalValue_HP_count) ++ ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count); ++ } ++#endif ++ } ++ ++ delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ if(pdmpriv->bDoneTxpower) ++ delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++ else ++ delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++ } ++ else ++#endif ++ { ++ delta_HP = 0; ++ } ++ delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue); ++ ++ //DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK); ++ ++ if(delta_LCK > 1) ++ { ++ pdmpriv->ThermalValue_LCK = ThermalValue; ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ } ++ ++ if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl) ++ { ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ pdmpriv->bDoneTxpower = _TRUE; ++ delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++ ++ if(delta_HP > index_mapping_HP_NUM-1) ++ index_HP = index_mapping_HP[index_mapping_HP_NUM-1]; ++ else ++ index_HP = index_mapping_HP[delta_HP]; ++ ++ if(ThermalValue > pHalData->EEPROMThermalMeter) //set larger Tx power ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP; ++ CCK_index = pdmpriv->CCK_index_HP -index_HP; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP; ++ CCK_index = pdmpriv->CCK_index_HP + index_HP; ++ } ++ ++ delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++ ++ } ++ else ++#endif ++ { ++ if(ThermalValue > pdmpriv->ThermalValue) ++ { ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] -= delta; ++ pdmpriv->CCK_index -= delta; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] += delta; ++ pdmpriv->CCK_index += delta; ++ } ++ } ++ ++ /*if(is2T) ++ { ++ DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", ++ pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index); ++ } ++ else ++ { ++ DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n", ++ pdmpriv->OFDM_index[0], pdmpriv->CCK_index); ++ }*/ ++ ++ //no adjust ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType != BOARD_USB_High_PA) ++#endif ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index[i]+1; ++ CCK_index = pdmpriv->CCK_index+1; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index[i]; ++ CCK_index = pdmpriv->CCK_index; ++ } ++ ++#if MP_DRIVER == 1 ++ for(i = 0; i < rf; i++) ++ { ++ if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ OFDM_index[i] -= 1; ++ else ++ OFDM_index[i] -= 2; ++ } ++ else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) ++ { ++ OFDM_index[i] += 1; ++ } ++ } ++ else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ OFDM_index[i] -= 1; ++ else ++ OFDM_index[i] -= 2; ++ } ++ else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) ++ { ++ OFDM_index[i] -= 1; ++ } ++ } ++ ++ { ++ if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ CCK_index -= 1; ++ else ++ CCK_index -= 2; ++ } ++ else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) ++ { ++ CCK_index += 1; ++ } ++ } ++ else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ CCK_index -= 1; ++ else ++ CCK_index -= 2; ++ } ++ else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) ++ { ++ CCK_index -= 1; ++ } ++ } ++#endif ++ } ++ ++ for(i = 0; i < rf; i++) ++ { ++ if(OFDM_index[i] > (OFDM_TABLE_SIZE_92C-1)) ++ OFDM_index[i] = (OFDM_TABLE_SIZE_92C-1); ++ else if (OFDM_index[i] < OFDM_min_index) ++ OFDM_index[i] = OFDM_min_index; ++ } ++ ++ if(CCK_index > (CCK_TABLE_SIZE-1)) ++ CCK_index = (CCK_TABLE_SIZE-1); ++ else if (CCK_index < 0) ++ CCK_index = 0; ++ ++ /*if(is2T) ++ { ++ DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", ++ OFDM_index[0], OFDM_index[1], CCK_index); ++ } ++ else ++ { ++ DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n", ++ OFDM_index[0], CCK_index); ++ }*/ ++ } ++ ++ if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) ++ { ++ //Adujst OFDM Ant_A according to IQK result ++ ele_D = (OFDMSwingTable[OFDM_index[0]] & 0xFFC00000)>>22; ++ X = pdmpriv->RegE94; ++ Y = pdmpriv->RegE9C; ++ ++ if(X != 0) ++ { ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D)>>8)&0x000003FF; ++ ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32); ++ ++ value32 = ((Y * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32); ++ ++ } ++ else ++ { ++ PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[0]]); ++ PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00); ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D)); ++ ++ //Adjust CCK according to IQK result ++ if(!pdmpriv->bCCKinCH14){ ++ rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); ++ rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); ++ rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); ++ rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); ++ rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); ++ rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); ++ rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); ++ rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); ++ } ++ else{ ++ rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); ++ rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); ++ rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); ++ rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); ++ rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); ++ rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); ++ rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); ++ rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); ++ } ++ ++ if(is2T) ++ { ++ ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ X = pdmpriv->RegEB4; ++ Y = pdmpriv->RegEBC; ++ ++ if(X != 0){ ++ if ((X & 0x00000200) != 0) //consider minus ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D)>>8)&0x00003FF; ++ ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32); ++ ++ value32 = ((Y * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32); ++ ++ } ++ else{ ++ PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[1]]); ++ PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00); ++ } ++ ++ //DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D); ++ } ++ ++ /* ++ DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \ ++ PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\ ++ PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \ ++ PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bMaskDWord)); ++ */ ++ } ++ ++#if MP_DRIVER == 1 ++ if(delta_IQK > 1) ++#else ++ if(delta_IQK > 3) ++#endif ++ { ++ pdmpriv->ThermalValue_IQK = ThermalValue; ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ } ++ ++ //update thermal meter value ++ if(pdmpriv->TxPowerTrackControl) ++ pdmpriv->ThermalValue = ThermalValue; ++ ++ } ++ ++ //DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); ++ ++ pdmpriv->TXPowercount = 0; ++ ++} ++ ++ ++static VOID ++dm_InitializeTXPowerTracking_ThermalMeter( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //pMgntInfo->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ pdmpriv->ThermalValue = 0; ++ ++#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default ++ pdmpriv->TxPowerTrackControl = _TRUE; ++#endif ++ ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++} ++ ++ ++static VOID ++DM_InitializeTXPowerTracking( ++ IN PADAPTER Adapter) ++{ ++ dm_InitializeTXPowerTracking_ThermalMeter(Adapter); ++} ++ ++// ++// Description: ++// - Dispatch TxPower Tracking direct call ONLY for 92s. ++// - We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource ++// leakage under some platform. ++// ++// Assumption: ++// PASSIVE_LEVEL when this routine is called. ++// ++// Added by Roger, 2009.06.18. ++// ++static VOID ++DM_TXPowerTracking92CDirectCall( ++ IN PADAPTER Adapter) ++{ ++ dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter); ++} ++ ++static VOID ++dm_CheckTXPowerTracking_ThermalMeter( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ //u1Byte TxPowerCheckCnt = 5; //10 sec ++ ++ //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS)) ++ { ++ return; ++ } ++ ++ if(!pdmpriv->TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pdmpriv->TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ pdmpriv->TM_Trigger = 0; ++ } ++ ++} ++ ++ ++VOID ++rtl8192c_dm_CheckTXPowerTracking( ++ IN PADAPTER Adapter) ++{ ++ dm_CheckTXPowerTracking_ThermalMeter(Adapter); ++} ++ ++#ifdef CONFIG_BT_COEXIST ++static BOOLEAN BT_BTStateChange(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct registry_priv *registry_par = &Adapter->registrypriv; ++ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ u32 Polling, Ratio_Tx, Ratio_PRI; ++ u32 BT_Tx, BT_PRI; ++ u8 BT_State; ++ static u8 ServiceTypeCnt = 0; ++ u8 CurServiceType; ++ static u8 LastServiceType = BT_Idle; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ return _FALSE; ++ ++ BT_State = rtw_read8(Adapter, 0x4fd); ++/* ++ temp = PlatformEFIORead4Byte(Adapter, 0x488); ++ BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); ++ BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); ++ ++ temp = PlatformEFIORead4Byte(Adapter, 0x48c); ++ Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + ++ ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); ++ ++*/ ++ BT_Tx = rtw_read32(Adapter, 0x488); ++ ++ DBG_8192C("Ratio 0x488 =%x\n", BT_Tx); ++ BT_Tx =BT_Tx & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); ++ ++ BT_PRI = rtw_read32(Adapter, 0x48c); ++ ++ DBG_8192C("Ratio 0x48c =%x\n", BT_PRI); ++ BT_PRI =BT_PRI & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); ++ ++ ++ Polling = rtw_read32(Adapter, 0x490); ++ //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); ++ ++ ++ if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff) ++ return _FALSE; ++ ++ BT_State &= BIT0; ++ ++ if(BT_State != pbtpriv->BT_CUR_State) ++ { ++ pbtpriv->BT_CUR_State = BT_State; ++ ++ if(registry_par->bt_sco == 3) ++ { ++ ServiceTypeCnt = 0; ++ ++ pbtpriv->BT_Service = BT_Idle; ++ ++ DBG_8192C("BT_%s\n", BT_State?"ON":"OFF"); ++ ++ BT_State = BT_State | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2; ++ ++ rtw_write8(Adapter, 0x4fd, BT_State); ++ DBG_8192C("BT set 0x4fd to %x\n", BT_State); ++ } ++ ++ return _TRUE; ++ } ++ DBG_8192C("bRegBT_Sco = %d\n",registry_par->bt_sco); ++ ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pbtpriv->Ratio_Tx=Ratio_Tx; ++ pbtpriv->Ratio_PRI=Ratio_PRI; ++ ++ DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx); ++ DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI); ++ ++ ++ if(BT_State && registry_par->bt_sco==3) ++ { ++ DBG_8192C("bt_sco ==3 Follow Counter\n"); ++// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) ++// { ++// ServiceTypeCnt = 0; ++// return FALSE; ++// } ++// else ++ { ++ /* ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ */ ++ if((Ratio_Tx < 30) && (Ratio_PRI < 30)) ++ CurServiceType = BT_Idle; ++ else if((Ratio_PRI > 110) && (Ratio_PRI < 250)) ++ CurServiceType = BT_SCO; ++ else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) ++ CurServiceType = BT_Busy; ++ else if((Ratio_Tx >=350) && (Ratio_Tx < 500)) ++ CurServiceType = BT_OtherBusy; ++ else if(Ratio_Tx >=500) ++ CurServiceType = BT_PAN; ++ else ++ CurServiceType=BT_OtherAction; ++ } ++ ++/* if(pHalData->bt_coexist.bStopCount) ++ { ++ ServiceTypeCnt=0; ++ pHalData->bt_coexist.bStopCount=FALSE; ++ } ++*/ ++// if(CurServiceType == BT_OtherBusy) ++ { ++ ServiceTypeCnt=2; ++ LastServiceType=CurServiceType; ++ } ++#if 0 ++ else if(CurServiceType == LastServiceType) ++ { ++ if(ServiceTypeCnt<3) ++ ServiceTypeCnt++; ++ } ++ else ++ { ++ ServiceTypeCnt = 0; ++ LastServiceType = CurServiceType; ++ } ++#endif ++ ++ if(ServiceTypeCnt==2) ++ { ++ pbtpriv->BT_Service = LastServiceType; ++ BT_State = BT_State | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | ++ //((pbtpriv->BT_Service==BT_SCO)?0:BIT2); ++ ((pbtpriv->BT_Service!=BT_Idle)?0:BIT2); ++ ++ //if(pbtpriv->BT_Service==BT_Busy) ++ // BT_State&= ~(BIT2); ++ ++ if(pbtpriv->BT_Service==BT_SCO) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_SCO\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_Idle) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_Idle\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_OtherAction) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_OtherAction\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_Busy) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_Busy\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_PAN\n"); ++ } ++ else ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n"); ++ } ++ ++ //Add interrupt migration when bt is not in idel state (no traffic). ++ //suggestion by Victor. ++ if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify ++ { ++ ++ rtw_write16(Adapter, 0x504, 0x0ccc); ++ rtw_write8(Adapter, 0x506, 0x54); ++ rtw_write8(Adapter, 0x507, 0x54); ++ ++ } ++ else ++ { ++ rtw_write8(Adapter, 0x506, 0x00); ++ rtw_write8(Adapter, 0x507, 0x00); ++ } ++ ++ rtw_write8(Adapter, 0x4fd, BT_State); ++ DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State); ++ return _TRUE; ++ } ++ } ++ ++ return _FALSE; ++ ++} ++ ++static BOOLEAN ++BT_WifiConnectChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++// PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static BOOLEAN bMediaConnect = _FALSE; ++ ++ //if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ { ++ bMediaConnect = _FALSE; ++ } ++ else ++ { ++ if(!bMediaConnect) ++ { ++ bMediaConnect = _TRUE; ++ return _TRUE; ++ } ++ bMediaConnect = _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++#define BT_RSSI_STATE_NORMAL_POWER BIT0 ++#define BT_RSSI_STATE_AMDPU_OFF BIT1 ++#define BT_RSSI_STATE_SPECIAL_LOW BIT2 ++#define BT_RSSI_STATE_BG_EDCA_LOW BIT3 ++ ++static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ s32 average_rssi; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) ++ { ++ average_rssi = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ } ++ else ++ { ++ average_rssi = pdmpriv->UndecoratedSmoothedPWDB; ++ } ++ return average_rssi; ++} ++ ++static u8 BT_RssiStateChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ s32 UndecoratedSmoothedPWDB; ++ u8 CurrBtRssiState = 0x00; ++ ++ ++ ++ ++ //if(pMgntInfo->bMediaConnect) // Default port ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter); ++ } ++ else // associated entry pwdb ++ { ++ if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) ++ UndecoratedSmoothedPWDB = 100; // No any RSSI information. Assume to be MAX. ++ else ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ } ++ ++ // Check RSSI to determine HighPower/NormalPower state for BT coexistence. ++ if(UndecoratedSmoothedPWDB >= 67) ++ CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER); ++ else if(UndecoratedSmoothedPWDB < 62) ++ CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER; ++ ++ // Check RSSI to determine AMPDU setting for BT coexistence. ++ if(UndecoratedSmoothedPWDB >= 40) ++ CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF); ++ else if(UndecoratedSmoothedPWDB <= 32) ++ CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF; ++ ++ // Marked RSSI state. It will be used to determine BT coexistence setting later. ++ if(UndecoratedSmoothedPWDB < 35) ++ CurrBtRssiState |= BT_RSSI_STATE_SPECIAL_LOW; ++ else ++ CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW); ++ ++ // Check BT state related to BT_Idle in B/G mode. ++ if(UndecoratedSmoothedPWDB < 15) ++ CurrBtRssiState |= BT_RSSI_STATE_BG_EDCA_LOW; ++ else ++ CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW); ++ ++ if(CurrBtRssiState != pbtpriv->BtRssiState) ++ { ++ pbtpriv->BtRssiState = CurrBtRssiState; ++ return _TRUE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++} ++ ++static void dm_BTCoexist(PADAPTER Adapter ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct mlme_ext_info *pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ //PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); ++ ++ //PRX_TS_RECORD pRxTs = NULL; ++ u8 BT_gpio_mux; ++ ++ BOOLEAN bWifiConnectChange, bBtStateChange,bRssiStateChange; ++ ++ if(pbtpriv->bCOBT == _FALSE) return; ++ ++ if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return; ++ ++ if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ) ++ { ++ bWifiConnectChange = BT_WifiConnectChange(Adapter); ++ bBtStateChange = BT_BTStateChange(Adapter); ++ bRssiStateChange = BT_RssiStateChange(Adapter); ++ ++ DBG_8192C("bWifiConnectChange %d, bBtStateChange %d,bRssiStateChange %d\n", ++ bWifiConnectChange,bBtStateChange,bRssiStateChange); ++ ++ // add by hpfan for debug message ++ BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux); ++ ++ if( bWifiConnectChange ||bBtStateChange ||bRssiStateChange ) ++ { ++ if(pbtpriv->BT_CUR_State) ++ { ++ ++ // Do not allow receiving A-MPDU aggregation. ++ if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++ { ++ ++ if(pmlmeinfo->assoc_AP_vendor == ciscoAP) ++ { ++ if(pbtpriv->BT_Service!=BT_Idle) ++ { ++ if(pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Disallow AMPDU \n"); ++ pmlmeinfo->bAcceptAddbaReq = _FALSE; ++ send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network))); ++ } ++ } ++ else ++ { ++ if(!pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU RSSI >=40\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(!pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU BT Idle\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ } ++ } ++ ++#if 0 ++ else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) ++ { ++ if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF) ++ { ++ if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); ++ pHTInfo->bAcceptAddbaReq = FALSE; ++ if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) ++ TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); ++ } ++ } ++ else ++ { ++ if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); ++ pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); ++ pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++#endif ++ ++ if(pbtpriv->BT_Ant_isolation) ++ { ++ DBG_8192C("BT_IsolationLow\n"); ++ ++// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. ++#if 0 ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ if(pMgntInfo->bUseRAMask) ++ { ++ // 20100407 Joseph: Fix rate adaptive modification for BT coexist. ++ // This fix is not complete yet. It shall also consider VWifi and Adhoc case, ++ // which connect with multiple STAs. ++ Adapter->HalFunc.UpdateHalRAMaskHandler( ++ Adapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pMgntInfo->RateAdaptive.RATRState, ++ RAMask_Normal); ++ } ++ else ++ { ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++#endif ++ ++ // 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying. ++ // Now we only enable HW BT coexist when BT in "Busy" state. ++ if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) ++ { ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && ++ pbtpriv->BT_Service==BT_OtherAction) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else ++ { ++ if((pbtpriv->BT_Service==BT_Busy) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else if((pbtpriv->BT_Service==BT_OtherAction) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW)) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ else ++ { ++ DBG_8192C("BT_Turn OFF Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ } ++ } ++ else ++ { ++ DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ ++ if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) ++ { ++ if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100); ++ } ++ else ++ { ++ DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); ++ } ++ } ++ else ++ { ++ DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); ++ } ++ ++ // 20100430 Joseph: Integrate the BT coexistence EDCA tuning here. ++ if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER) ++ { ++ if(pbtpriv->BT_Service==BT_OtherBusy) ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea72b; ++ //pbtpriv->BtEdcaDL = 0x5ea72b; ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b; ++ ++ DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b); ++ } ++ else if(pbtpriv->BT_Service==BT_Busy) ++ { ++ //pbtpriv->BtEdcaUL = 0x5eb82f; ++ //pbtpriv->BtEdcaDL = 0x5eb82f; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f; ++ ++ DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f); ++ } ++ else if(pbtpriv->BT_Service==BT_SCO) ++ { ++ if(pbtpriv->Ratio_Tx>160) ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea72f; ++ //pbtpriv->BtEdcaDL = 0x5ea72f; ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f; ++ DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f); ++ } ++ else ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea32b; ++ //pbtpriv->BtEdcaDL = 0x5ea42b; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b; ++ ++ DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f); ++ } ++ } ++ else ++ { ++ // BT coexistence mechanism does not control EDCA parameter. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ DBG_8192C("BT in State %d and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM); ++ } ++ ++ if((pbtpriv->BT_Service!=BT_Idle) && ++ (pmlmeext->cur_wireless_mode == WIRELESS_MODE_G) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW)) ++ { ++ //pbtpriv->BtEdcaUL = 0x5eb82b; ++ //pbtpriv->BtEdcaDL = 0x5eb82b; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b; ++ ++ DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b); ++ } ++ } ++ else ++ { ++ // BT coexistence mechanism does not control EDCA parameter. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ } ++ ++ // 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying. ++ if(pbtpriv->BT_Service!=BT_Idle) ++ { ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf); ++ } ++ else ++ { ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); ++ } ++ } ++ else ++ { ++ DBG_8192C("BT_IsolationHigh\n"); ++ // Do nothing. ++ } ++ } ++ else ++ { ++ ++ if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU bt is off\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ ++ DBG_8192C("BT_Turn OFF Coexist bt is off \n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); ++ ++ // BT coexistence mechanism does not control EDCA parameter since BT is disabled. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ ++ ++// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. ++#if 0 ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ if(pMgntInfo->bUseRAMask) ++ { ++ // 20100407 Joseph: Fix rate adaptive modification for BT coexist. ++ // This fix is not complete yet. It shall also consider VWifi and Adhoc case, ++ // which connect with multiple STAs. ++ Adapter->HalFunc.UpdateHalRAMaskHandler( ++ Adapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pMgntInfo->RateAdaptive.RATRState, ++ RAMask_Normal); ++ } ++ else ++ { ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++#endif ++ } ++ } ++ } ++} ++ ++static void dm_InitBtCoexistDM( PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ ++ if( !pbtpriv->BT_Coexist ) return; ++ ++ pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0); ++ pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0); ++} ++ ++void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ ++ pbtpriv->bCOBT = bStart; ++ send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network))); ++ send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network))); ++ ++} ++ ++void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir) ++{ ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR"); ++ send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network))); ++} ++ ++#endif ++ ++#if 0//def CONFIG_PCI_HCI ++ ++BOOLEAN ++BT_BTStateChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ u4Byte temp, Polling, Ratio_Tx, Ratio_PRI; ++ u4Byte BT_Tx, BT_PRI; ++ u1Byte BT_State; ++ static u1Byte ServiceTypeCnt = 0; ++ u1Byte CurServiceType; ++ static u1Byte LastServiceType = BT_Idle; ++ ++ if(!pMgntInfo->bMediaConnect) ++ return FALSE; ++ ++ BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd); ++/* ++ temp = PlatformEFIORead4Byte(Adapter, 0x488); ++ BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); ++ BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); ++ ++ temp = PlatformEFIORead4Byte(Adapter, 0x48c); ++ Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + ++ ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); ++ ++*/ ++ BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488); ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio 0x488 =%x\n", BT_Tx)); ++ BT_Tx =BT_Tx & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); ++ ++ BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c); ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c =%x\n", BT_PRI)); ++ BT_PRI =BT_PRI & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); ++ ++ ++ Polling = PlatformEFIORead4Byte(Adapter, 0x490); ++ //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); ++ ++ ++ if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff) ++ return FALSE; ++ ++ BT_State &= BIT0; ++ ++ if(BT_State != pHalData->bt_coexist.BT_CUR_State) ++ { ++ pHalData->bt_coexist.BT_CUR_State = BT_State; ++ ++ if(pMgntInfo->bRegBT_Sco == 3) ++ { ++ ServiceTypeCnt = 0; ++ ++ pHalData->bt_coexist.BT_Service = BT_Idle; ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF")); ++ ++ BT_State = BT_State | ++ ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2; ++ ++ PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); ++ RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State)); ++ } ++ ++ return TRUE; ++ } ++ RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco %d\n", pMgntInfo->bRegBT_Sco)); ++ ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ ++ if(BT_State && pMgntInfo->bRegBT_Sco==3) ++ { ++ RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco ==3 Follow Counter\n")); ++// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) ++// { ++// ServiceTypeCnt = 0; ++// return FALSE; ++// } ++// else ++ { ++ /* ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ */ ++ if((Ratio_Tx <= 50) && (Ratio_PRI <= 50)) ++ CurServiceType = BT_Idle; ++ else if((Ratio_PRI > 150) && (Ratio_PRI < 200)) ++ CurServiceType = BT_SCO; ++ else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) ++ CurServiceType = BT_Busy; ++ else if(Ratio_Tx >= 350) ++ CurServiceType = BT_OtherBusy; ++ else ++ CurServiceType=BT_OtherAction; ++ ++ } ++/* if(pHalData->bt_coexist.bStopCount) ++ { ++ ServiceTypeCnt=0; ++ pHalData->bt_coexist.bStopCount=FALSE; ++ } ++*/ ++ if(CurServiceType == BT_OtherBusy) ++ { ++ ServiceTypeCnt=2; ++ LastServiceType=CurServiceType; ++ } ++ else if(CurServiceType == LastServiceType) ++ { ++ if(ServiceTypeCnt<3) ++ ServiceTypeCnt++; ++ } ++ else ++ { ++ ServiceTypeCnt = 0; ++ LastServiceType = CurServiceType; ++ } ++ ++ if(ServiceTypeCnt==2) ++ { ++ pHalData->bt_coexist.BT_Service = LastServiceType; ++ BT_State = BT_State | ++ ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) | ++ ((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_Busy) ++ BT_State&= ~(BIT2); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_SCO) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_SCO\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_Idle) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Idle\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_OtherAction) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherAction\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_Busy) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Busy\n")); ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n")); ++ } ++ ++ //Add interrupt migration when bt is not in idel state (no traffic). ++ //suggestion by Victor. ++ if(pHalData->bt_coexist.BT_Service!=BT_Idle) ++ { ++ ++ PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc); ++ PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54); ++ PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54); ++ ++ } ++ else ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00); ++ PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00); ++ } ++ ++ PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); ++ RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State)); ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++ ++} ++ ++BOOLEAN ++BT_WifiConnectChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static BOOLEAN bMediaConnect = FALSE; ++ ++ if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) ++ { ++ bMediaConnect = FALSE; ++ } ++ else ++ { ++ if(!bMediaConnect) ++ { ++ bMediaConnect = TRUE; ++ return TRUE; ++ } ++ bMediaConnect = TRUE; ++ } ++ ++ return FALSE; ++} ++ ++BOOLEAN ++BT_RSSIChangeWithAMPDU( ++ IN PADAPTER Adapter ++ ) ++{ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ return FALSE; ++ ++ RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB)); ++ ++ if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32 Need change\n")); ++ return TRUE; ++ ++ } ++ else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq ) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n")); ++ return TRUE; ++ } ++ else ++ return FALSE; ++ ++} ++ ++ ++VOID ++dm_BTCoexist( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static u1Byte LastTxPowerLvl = 0xff; ++ PRX_TS_RECORD pRxTs = NULL; ++ ++ BOOLEAN bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU; ++ ++ if( (pHalData->bt_coexist.BluetoothCoexist) && ++ (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && ++ (!ACTING_AS_AP(Adapter)) ) ++ { ++ bWifiConnectChange = BT_WifiConnectChange(Adapter); ++ bBtStateChange = BT_BTStateChange(Adapter); ++ bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter); ++ RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange %d,LastTxPowerLvl %x, DynamicTxHighPowerLvl %x\n", ++ bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl)); ++ if( bWifiConnectChange ||bBtStateChange || ++ (LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl) ||bRSSIChangeWithAMPDU) ++ { ++ LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ if(pHalData->bt_coexist.BT_CUR_State) ++ { ++ // Do not allow receiving A-MPDU aggregation. ++ if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) ++ { ++ if(pHalData->UndecoratedSmoothedPWDB<=32) ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE; ++ if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) ++ TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); ++ } ++ } ++ else if(pHalData->UndecoratedSmoothedPWDB>=40) ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ ++ if(pHalData->bt_coexist.BT_Ant_isolation) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n")); ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_SCO) ++ { ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ } ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4); ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ } ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n")); ++ // Do nothing. ++ } ++ } ++ else ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++ } ++ } ++} ++#endif ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_CheckRfCtrlGPIO() ++ * ++ * Overview: Copy 8187B template for 9xseries. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/10/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++dm_CheckRfCtrlGPIO( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) ++ #ifdef CONFIG_USB_HCI ++ // 2010/08/12 MH Add for CU selective suspend. ++ PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(Adapter); ++ #else ++ PRT_SDIO_DEVICE pDevice = GET_RT_SDIO_DEVICE(Adapter); ++ #endif ++#endif ++ ++ if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) ++ return; ++ ++ RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); ++ ++#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) ++ // Walk around for DTM test, we will not enable HW - radio on/off because r/w ++ // page 1 register before Lextra bus is enabled cause system fails when resuming ++ // from S4. 20080218, Emily ++ if(Adapter->bInHctTest) ++ return; ++ ++//#if ((HAL_CODE_BASE == RTL8192_S) ) ++ //Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING); ++//#else ++ // 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to ++ // stop 8051. For dongle and minicard, we both support selective suspend mode. ++ //if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD) ++ ++ // ++ // 2010/08/12 MH We support severl power consumption combination as below. ++ // ++ // Power consumption combination ++ // SS Enable: (LPS disable + IPS + SW/HW radio off) ++ // 1. Dongle + PDN (support HW radio off) ++ // 2. Dongle + Normal (No HW radio off) ++ // 3. MiniCard + PDN (support HW radio off) ++ // 4. MiniCard + Normal (support HW radio off) ++ // ++ // SS Disable: (LPS + IPS + SW/HW radio off) ++ // 1. Dongle + PDN (support HW radio off) ++ // 2. Dongle + Normal (No HW radio off) ++ // 3. MiniCard + PDN (support HW radio off) ++ // 4. MiniCard + Normal (support HW radio off) ++ // ++ // For Power down module detection. We need to read power register no matter ++ // dongle or minicard, we will add the item is the detection method. ++ // ++ // ++ //vivi add du case ++ if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter)) ++ && pDevice->RegUsbSS) ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n")); ++ if (SUPPORT_HW_RADIO_DETECT(Adapter)) ++ { // Support HW radio detection ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); ++ GpioDetectTimerStart(Adapter); ++ } ++ else ++ { // Dongle does not support HW radio detection.?? In the fufure?? ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); ++ } ++ } ++ else if (IS_HARDWARE_TYPE_8192CU(Adapter) || ++ IS_HARDWARE_TYPE_8723AU(Adapter)|| ++ IS_HARDWARE_TYPE_8192DU(Adapter) || ++ IS_HARDWARE_TYPE_8723AS(Adapter)) ++ { // Not support Selective suspend ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n")); ++ if (SUPPORT_HW_RADIO_DETECT(Adapter)) ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++ } ++ else ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); ++ } ++ } ++ else ++ { // CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU. ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++ } ++//#endif ++#else if defined CONFIG_PCI_HCI ++ if(Adapter->bInHctTest) ++ return; ++ ++ // CE only support noemal HW radio detection now. We support timers GPIO detection in SE. ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++#endif ++#endif ++} /* dm_CheckRfCtrlGPIO */ ++ ++static VOID ++dm_InitRateAdaptiveMask( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive; ++ ++ pRA->RATRState = DM_RATR_STA_INIT; ++ pRA->PreRATRState = DM_RATR_STA_INIT; ++ ++ if (pdmpriv->DM_Type == DM_Type_ByDriver) ++ pdmpriv->bUseRAMask = _TRUE; ++ else ++ pdmpriv->bUseRAMask = _FALSE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_RefreshRateAdaptiveMask() ++ * ++ * Overview: Update rate table mask according to rssi ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/27/2009 hpfan Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++dm_RefreshRateAdaptiveMask( IN PADAPTER pAdapter) ++{ ++#if 0 ++ PADAPTER pTargetAdapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo); ++ PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; ++ u4Byte LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0; ++ ++ if(pAdapter->bDriverStopped) ++ { ++ RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if(!pMgntInfo->bUseRAMask) ++ { ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ // if default port is connected, update RA table for default port (infrastructure mode only) ++ if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) ++ { ++ ++ // decide rastate according to rssi ++ switch (pRA->PreRATRState) ++ { ++ case DM_RATR_STA_HIGH: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ HighRSSIThreshForRA = 55; ++ LowRSSIThreshForRA = 20; ++ break; ++ ++ case DM_RATR_STA_LOW: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 25; ++ break; ++ ++ default: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ break; ++ } ++ ++ if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) ++ pRA->RATRState = DM_RATR_STA_HIGH; ++ else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) ++ pRA->RATRState = DM_RATR_STA_MIDDLE; ++ else ++ pRA->RATRState = DM_RATR_STA_LOW; ++ ++ if(pRA->PreRATRState != pRA->RATRState) ++ { ++ RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler( ++ pAdapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pRA->RATRState); ++ pRA->PreRATRState = pRA->RATRState; ++ } ++ } ++ ++ // ++ // The following part configure AP/VWifi/IBSS rate adaptive mask. ++ // ++ if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter)) ++ { ++ pTargetAdapter = pAdapter; ++ } ++ else ++ { ++ pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE); ++ if(!ACTING_AS_AP(pTargetAdapter)) ++ pTargetAdapter = NULL; ++ } ++ ++ // if extension port (softap) is started, updaet RA table for more than one clients associate ++ if(pTargetAdapter != NULL) ++ { ++ int i; ++ PRT_WLAN_STA pEntry; ++ PRATE_ADAPTIVE pEntryRA; ++ ++ for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) ++ { ++ pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; ++ pEntryRA = &pEntry->RateAdaptive; ++ ++ switch (pEntryRA->PreRATRState) ++ { ++ case DM_RATR_STA_HIGH: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ } ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ { ++ HighRSSIThreshForRA = 55; ++ LowRSSIThreshForRA = 20; ++ } ++ break; ++ ++ case DM_RATR_STA_LOW: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 25; ++ } ++ break; ++ ++ default: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ } ++ } ++ ++ if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) ++ pEntryRA->RATRState = DM_RATR_STA_HIGH; ++ else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) ++ pEntryRA->RATRState = DM_RATR_STA_MIDDLE; ++ else ++ pEntryRA->RATRState = DM_RATR_STA_LOW; ++ ++ if(pEntryRA->PreRATRState != pEntryRA->RATRState) ++ { ++ RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler( ++ pTargetAdapter, ++ FALSE, ++ pEntry->AID+1, ++ pEntry->MacAddr, ++ pEntry, ++ pEntryRA->RATRState); ++ pEntryRA->PreRATRState = pEntryRA->RATRState; ++ } ++ ++ } ++ } ++ } ++#endif ++} ++ ++static VOID ++dm_CheckProtection( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte CurRate, RateThreshold; ++ ++ if(pMgntInfo->pHTInfo->bCurBW40MHz) ++ RateThreshold = MGN_MCS1; ++ else ++ RateThreshold = MGN_MCS3; ++ ++ if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) ++ { ++ pMgntInfo->bDmDisableProtect = TRUE; ++ DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++ else ++ { ++ pMgntInfo->bDmDisableProtect = FALSE; ++ DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++#endif ++} ++ ++static VOID ++dm_CheckStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ if(!Adapter->MgntInfo.bMediaConnect) ++ return; ++ ++ //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. ++ rtw_hal_get_hwreg( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); ++ ++ // Calculate current Tx Rate(Successful transmited!!) ++ ++ // Calculate current Rx Rate(Successful received!!) ++ ++ //for tx tx retry count ++ rtw_hal_get_hwreg( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); ++#endif ++} ++ ++static void dm_CheckPbcGPIO(_adapter *padapter) ++{ ++ u8 tmp1byte; ++ u8 bPbcPressed = _FALSE; ++ int i=0; ++ ++ if(!padapter->registrypriv.hw_wps_pbc) ++ return; ++ ++ do ++ { ++ i++; ++#ifdef CONFIG_USB_HCI ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode ++ ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level ++ ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode ++ ++ tmp1byte =rtw_read8(padapter, GPIO_IN); ++ ++ if (tmp1byte == 0xff) ++ { ++ bPbcPressed = _FALSE; ++ break ; ++ } ++ ++ if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) ++ { ++ bPbcPressed = _TRUE; ++ ++ if(i<=3) ++ rtw_msleep_os(50); ++ } ++#else ++ tmp1byte = rtw_read8(padapter, GPIO_IN); ++ //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); ++ ++ if (tmp1byte == 0xff || padapter->init_adpt_in_progress) ++ { ++ bPbcPressed = _FALSE; ++ break ; ++ } ++ ++ if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) ++ { ++ bPbcPressed = _TRUE; ++ ++ if(i<=3) ++ rtw_msleep_os(50); ++ } ++#endif ++ ++ }while(i<=3 && bPbcPressed == _TRUE); ++ ++ if( _TRUE == bPbcPressed) ++ { ++ // Here we only set bPbcPressed to true ++ // After trigger PBC, the variable will be set to false ++ DBG_8192C("CheckPbcGPIO - PBC is pressed, try_cnt=%d\n", i-1); ++ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); ++#endif ++#else ++ ++ if ( padapter->pid[0] == 0 ) ++ { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. ++ return; ++ } ++ ++#ifdef PLATFORM_LINUX ++ rtw_signal_process(padapter->pid[0], SIGUSR1); ++#endif ++#endif ++ } ++} ++ ++#ifdef CONFIG_PCI_HCI ++// ++// Description: ++// Perform interrupt migration dynamically to reduce CPU utilization. ++// ++// Assumption: ++// 1. Do not enable migration under WIFI test. ++// ++// Created by Roger, 2010.03.05. ++// ++VOID ++dm_InterruptMigration( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ BOOLEAN bCurrentIntMt, bCurrentACIntDisable; ++ BOOLEAN IntMtToSet = _FALSE; ++ BOOLEAN ACIntToSet = _FALSE; ++ ++ ++ // Retrieve current interrupt migration and Tx four ACs IMR settings first. ++ bCurrentIntMt = pHalData->bInterruptMigration; ++ bCurrentACIntDisable = pHalData->bDisableTxInt; ++ ++ // ++ // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics ++ // when interrupt migration is set before. 2010.03.05. ++ // ++ if(!Adapter->registrypriv.wifi_spec && ++ (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) ++ { ++ IntMtToSet = _TRUE; ++ ++ // To check whether we should disable Tx interrupt or not. ++ if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) ++ ACIntToSet = _TRUE; ++ } ++ ++ //Update current settings. ++ if( bCurrentIntMt != IntMtToSet ){ ++ DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); ++ if(IntMtToSet) ++ { ++ // ++ // Set interrrupt migration timer and corresponging Tx/Rx counter. ++ // timer 25ns*0xfa0=100us for 0xf packets. ++ // 2010.03.05. ++ // ++ rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ else ++ { ++ // Reset all interrupt migration settings. ++ rtw_write32(Adapter, REG_INT_MIG, 0); ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ } ++ ++ /*if( bCurrentACIntDisable != ACIntToSet ){ ++ DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); ++ if(ACIntToSet) // Disable four ACs interrupts. ++ { ++ // ++ // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. ++ // When extremely highly Rx OK occurs, we will disable Tx interrupts. ++ // 2010.03.05. ++ // ++ UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ else// Enable four ACs interrupts. ++ { ++ UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ }*/ ++ ++} ++ ++#endif ++ ++// ++// Initialize GPIO setting registers ++// ++static void ++dm_InitGPIOSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 tmp1byte; ++ ++ tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); ++ ++#ifdef CONFIG_BT_COEXIST ++ // UMB-B cut bug. We need to support the modification. ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && ++ pHalData->bt_coexist.BT_Coexist) ++ { ++ tmp1byte |= (BIT5); ++ } ++#endif ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); ++ ++} ++ ++static void update_EDCA_param(_adapter *padapter) ++{ ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 bbtchange = _FALSE; ++#endif ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //associated AP ++ if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) ++ { ++ return; ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor >= maxAP) ++ { ++ return; ++ } ++ ++ cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; ++ cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; ++ ++ //traffic, TX or RX ++ if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(pbtpriv->BT_Coexist) ++ { ++ if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) ++ { ++ bbtchange = _TRUE; ++ } ++ } ++#endif ++ ++ if (pdmpriv->prv_traffic_idx != trafficIndex) ++ { ++#if 0 ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]); ++ else ++#endif ++ //adjust EDCA parameter for BE queue ++ //fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); ++ ++#else ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) && ++ ((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG))) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else ++ { ++ edca_param = EDCAParam[unknownAP][trafficIndex]; ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ edca_param = pbtpriv->BT_EDCA[trafficIndex]; ++#endif ++ ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param); ++#endif ++ pdmpriv->prv_traffic_idx = trafficIndex; ++ } ++ ++//exit_update_EDCA_param: ++ ++ pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; ++ precvpriv->last_rx_bytes = precvpriv->rx_bytes; ++ ++ return; ++} ++ ++static void dm_InitDynamicBBPowerSaving( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ pPSTable->PreCCAState = CCA_MAX; ++ pPSTable->CurCCAState = CCA_MAX; ++ pPSTable->PreRFState = RF_MAX; ++ pPSTable->CurRFState = RF_MAX; ++ pPSTable->Rssi_val_min = 0; ++} ++ ++static void dm_1R_CCA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ if(pPSTable->Rssi_val_min != 0) ++ { ++ if(pPSTable->PreCCAState == CCA_2R) ++ { ++ if(pPSTable->Rssi_val_min >= 35) ++ pPSTable->CurCCAState = CCA_1R; ++ else ++ pPSTable->CurCCAState = CCA_2R; ++ } ++ else{ ++ if(pPSTable->Rssi_val_min <= 30) ++ pPSTable->CurCCAState = CCA_2R; ++ else ++ pPSTable->CurCCAState = CCA_1R; ++ } ++ } ++ else ++ pPSTable->CurCCAState=CCA_MAX; ++ ++ if(pPSTable->PreCCAState != pPSTable->CurCCAState) ++ { ++ if(pPSTable->CurCCAState == CCA_1R) ++ { ++ if(pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x13); ++ PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x23); ++ PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 ++ } ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33); ++ PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); ++ } ++ pPSTable->PreCCAState = pPSTable->CurCCAState; ++ } ++ //DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState); ++} ++ ++void ++rtl8192c_dm_RF_Saving( ++ IN PADAPTER pAdapter, ++ IN u8 bForceInNormal ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ if(pdmpriv->initialize == 0){ ++ pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14; ++ pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3; ++ pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24; ++ pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12; ++ //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); ++ pdmpriv->initialize = 1; ++ } ++ ++ if(!bForceInNormal) ++ { ++ if(pPSTable->Rssi_val_min != 0) ++ { ++ ++ if(pPSTable->PreRFState == RF_Normal) ++ { ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if(pPSTable->Rssi_val_min >= 50) ++ #else ++ if(pPSTable->Rssi_val_min >= 30) ++ #endif ++ pPSTable->CurRFState = RF_Save; ++ else ++ pPSTable->CurRFState = RF_Normal; ++ } ++ else{ ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if(pPSTable->Rssi_val_min <= 45) ++ #else ++ if(pPSTable->Rssi_val_min <= 25) ++ #endif ++ pPSTable->CurRFState = RF_Normal; ++ else ++ pPSTable->CurRFState = RF_Save; ++ } ++ } ++ else ++ pPSTable->CurRFState=RF_MAX; ++ } ++ else ++ { ++ pPSTable->CurRFState = RF_Normal; ++ } ++ ++ if(pPSTable->PreRFState != pPSTable->CurRFState) ++ { ++ if(pPSTable->CurRFState == RF_Save) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0 ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10 ++ PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 ++ DBG_8192C("%s(): RF_Save\n", __FUNCTION__); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1CC000, pdmpriv->rf_saving_Reg874); ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70); ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C); ++ PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74); ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); ++ DBG_8192C("%s(): RF_Normal\n", __FUNCTION__); ++ } ++ pPSTable->PreRFState = pPSTable->CurRFState; ++ } ++} ++ ++static void ++dm_DynamicBBPowerSaving( ++IN PADAPTER pAdapter ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ //1 1.Determine the minimum RSSI ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && ++ (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ pPSTable->Rssi_val_min = 0; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); ++ } ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port ++ { ++ //if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss) ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) //todo: AP Mode ++ { ++ pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ else ++ { ++ pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ ++ //1 2.Power Saving for 92C ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ //dm_1R_CCA(pAdapter); ++ } ++ ++ // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. ++ // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. ++ //1 3.Power Saving for 88C ++ else ++ { ++ rtl8192c_dm_RF_Saving(pAdapter, _FALSE); ++ } ++} ++ ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++// Add new function to reset the state of antenna diversity before link. ++// ++void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++} ++ ++// Compare RSSI for deciding antenna ++void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) ) ++ { ++ //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), ++ // src->Rssi,query_rx_pwr_percentage(src->Rssi)); ++ //select optimum_antenna for before linked =>For antenna diversity ++ if(dst->Rssi >= src->Rssi )//keep org parameter ++ { ++ src->Rssi = dst->Rssi; ++ src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; ++ } ++ } ++} ++ ++// Add new function to reset the state of antenna diversity before link. ++u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ // Condition that does not need to use antenna diversity. ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ { ++ //DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); ++ return _FALSE; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ return _FALSE; ++ } ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++/* ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ ++ ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ++ ("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, ++ pHalData->eRFPowerState)); ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++ return FALSE; ++ } ++*/ ++ ++ if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ ++ //switch channel ++ pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); ++ rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); ++ //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); ++ return _TRUE; ++ } ++ else ++ { ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ return _FALSE; ++ } ++ ++ ++ ++} ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++// ++// 20100514 Luke/Joseph: ++// Add new function to reset antenna diversity state after link. ++// ++void ++SwAntDivRestAfterLink8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ return; ++ ++ //DBG_8192C("======> SwAntDivRestAfterLink <========== \n"); ++ pHalData->RSSI_cnt_A= 0; ++ pHalData->RSSI_cnt_B= 0; ++ pHalData->RSSI_test = _FALSE; ++ ++ pDM_SWAT_Table->try_flag = 0xff; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; ++ ++ pdmpriv->lastTxOkCnt=0; ++ pdmpriv->lastRxOkCnt=0; ++ ++ pdmpriv->TXByteCnt_A=0; ++ pdmpriv->TXByteCnt_B=0; ++ pdmpriv->RXByteCnt_A=0; ++ pdmpriv->RXByteCnt_B=0; ++ pdmpriv->DoubleComfirm=0; ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ ++} ++ ++ ++// ++// 20100514 Luke/Joseph: ++// Add new function for antenna diversity after link. ++// This is the main function of antenna diversity after link. ++// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback(). ++// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. ++// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. ++// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just ++// listened on the air with the RSSI of original antenna. ++// It chooses the antenna with better RSSI. ++// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting ++// penalty to get next try. ++// ++static VOID ++dm_SW_AntennaSwitch( ++ PADAPTER Adapter, ++ u8 Step ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ s32 curRSSI=100, RSSI_A, RSSI_B; ++ u64 curTxOkCnt, curRxOkCnt; ++ u64 CurByteCnt = 0, PreByteCnt = 0; ++ u8 nextAntenna = 0; ++ u8 Score_A=0, Score_B=0; ++ u8 i; ++ ++ // Condition that does not need to use antenna diversity. ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ { ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n")); ++ return; ++ } ++ // If dynamic ant_div is disabled. ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) ) ++ { ++ return; ++ } ++ ++ if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED) ==_FALSE) ++ return; ++#if 0 //to do ++ // Radio off: Status reset to default and return. ++ if(pHalData->eRFPowerState==eRfOff) ++ { ++ SwAntDivRestAfterLink(Adapter); ++ return; ++ } ++#endif ++ //DBG_8192C("\n............................ %s.........................\n",__FUNCTION__); ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ SwAntDivRestAfterLink8192C(Adapter); ++ } ++ ++ ++ if(pDM_SWAT_Table->try_flag == 0xff) ++ { ++#if 0 ++ // Select RSSI checking target ++ if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) ++ { ++ // Target: Infrastructure mode AP. ++ pHalData->RSSI_target = NULL; ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n")); ++ } ++ else ++ { ++ u8 index = 0; ++ PRT_WLAN_STA pEntry = NULL; ++ PADAPTER pTargetAdapter = NULL; ++ ++ if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) ++ { ++ // Target: AP/IBSS peer. ++ pTargetAdapter = Adapter; ++ } ++ else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE))) ++ { ++ // Target: VWIFI peer. ++ pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE); ++ } ++ ++ if(pTargetAdapter != NULL) ++ { ++ for(index=0; indexbAssociated) ++ break; ++ } ++ } ++ } ++ ++ if(pEntry == NULL) ++ { ++ SwAntDivRestAfterLink(Adapter); ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n")); ++ return; ++ } ++ else ++ { ++ pHalData->RSSI_target = pEntry; ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n")); ++ } ++ } ++ ++ ++#endif ++ ++ pHalData->RSSI_cnt_A= 0; ++ pHalData->RSSI_cnt_B= 0; ++ pDM_SWAT_Table->try_flag = 0; ++ // DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n"); ++ return; ++ } ++ else ++ { ++ curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt; ++ curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt; ++ ++ pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ; ++ pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ; ++ ++ if(pDM_SWAT_Table->try_flag == 1) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ pdmpriv->TXByteCnt_A += curTxOkCnt; ++ pdmpriv->RXByteCnt_A += curRxOkCnt; ++ //DBG_8192C("##### TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A); ++ } ++ else ++ { ++ pdmpriv->TXByteCnt_B += curTxOkCnt; ++ pdmpriv->RXByteCnt_B += curRxOkCnt; ++ //DBG_8192C("##### TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B); ++ } ++ ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ pDM_SWAT_Table->RSSI_Trying--; ++ //DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying); ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ { ++ CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B); ++ PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A); ++ ++ //DBG_8192C("CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); ++ ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ PreByteCnt = PreByteCnt*9; //normalize:Cur=90ms:Pre=10ms ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ //CurByteCnt = CurByteCnt/2; ++ CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms ++ } ++ ++ ++ //DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ ++ curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; ++ //DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI); ++ //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", ++ //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); ++ //DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ //RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); ++ } ++ ++ } ++ else ++ { ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ //DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI); ++ //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", ++ //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); ++ ++ //DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ // RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); ++ } ++ ++ //1 Trying State ++ if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) ++ { ++ ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ //DBG_8192C("SWAS: TestMode = TP_MODE\n"); ++ //DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt); ++ if(CurByteCnt < PreByteCnt) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ } ++ else ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ } ++ for (i= 0; i<8; i++) ++ { ++ if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) ++ Score_A++; ++ else ++ Score_B++; ++ } ++ //DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap); ++ //DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B); ++ ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; ++ } ++ else ++ { ++ nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; ++ } ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", ++ //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); ++ ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ //DBG_8192C("SWAS: Switch back to another antenna\n"); ++ } ++ else ++ { ++ //DBG_8192C("SWAS: current anntena is good\n"); ++ } ++ } ++ ++ if(pDM_SWAT_Table->TestMode == RSSI_MODE) ++ { ++ //DBG_8192C("SWAS: TestMode = RSSI_MODE\n"); ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna ++ { ++ //DBG_8192C("SWAS: Switch back to another antenna\n"); ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ } ++ else // current anntena is good ++ { ++ nextAntenna = pDM_SWAT_Table->CurAntenna; ++ //DBG_8192C("SWAS: current anntena is good\n"); ++ } ++ } ++ pDM_SWAT_Table->try_flag = 0; ++ pHalData->RSSI_test = _FALSE; ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pdmpriv->TXByteCnt_A = 0; ++ pdmpriv->TXByteCnt_B = 0; ++ pdmpriv->RXByteCnt_A = 0; ++ pdmpriv->RXByteCnt_B = 0; ++ ++ } ++ ++ //1 Normal State ++ else if(pDM_SWAT_Table->try_flag == 0) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) ++ pdmpriv->TrafficLoad = TRAFFIC_HIGH; ++ else ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) ++ pdmpriv->TrafficLoad = TRAFFIC_HIGH; ++ else ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ } ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ //DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt); ++ ++ //Prepare To Try Antenna ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ pDM_SWAT_Table->try_flag = 1; ++ pHalData->RSSI_test = _TRUE; ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ pDM_SWAT_Table->RSSI_Trying = 4; ++ pDM_SWAT_Table->TestMode = TP_MODE; ++ } ++ else ++ { ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ pDM_SWAT_Table->TestMode = RSSI_MODE; ++ ++ } ++ //DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI"); ++ ++ ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ } ++ } ++ ++ //1 4.Change TRX antenna ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ //DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n "); ++ rtw_antenna_select_cmd(Adapter, nextAntenna, 1); ++ } ++ ++ //1 5.Reset Statistics ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = nextAntenna; ++ pDM_SWAT_Table->PreRSSI = curRSSI; ++ ++ ++ //1 6.Set next timer ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ return; ++ ++ if(pDM_SWAT_Table->RSSI_Trying%2 == 0) ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n"); ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n"); ++ } ++ } ++ else ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); ++ } ++ } ++ else ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms ++ } ++ else ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); ++ } ++ } ++ ++// RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n ")); ++ ++} ++ ++// ++// 20100514 Luke/Joseph: ++// Callback function for 500ms antenna test trying. ++// ++static void dm_SW_AntennaSwitchCallback(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ ++ if(padapter->net_closed == _TRUE) ++ return; ++ // Only ++ dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE); ++} ++ ++ ++// ++// 20100722 ++// This function is used to gather the RSSI information for antenna testing. ++// It selects the RSSI of the peer STA that we want to know. ++// ++void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ pHalData->RSSI_sum_A += RxPWDBAll; ++ pHalData->RSSI_cnt_A++; ++ } ++ else ++ { ++ pHalData->RSSI_sum_B+= RxPWDBAll; ++ pHalData->RSSI_cnt_B++; ++ ++ } ++ //DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt); ++ } ++ ++} ++ ++ ++ ++static VOID ++dm_SW_AntennaSwitchInit( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ ++ pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->try_flag = 0xff; ++ pDM_SWAT_Table->PreRSSI = 0; ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ ++ // Move the timer initialization to InitializeVariables function. ++ //PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer"); ++} ++ ++#endif ++ ++//#define RSSI_CCK 0 ++//#define RSSI_OFDM 1 ++static void dm_RSSIMonitorInit( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ pdmpriv->OFDM_Pkt_Cnt = 0; ++ pdmpriv->RSSI_Select = RSSI_DEFAULT; ++} ++ ++static void dm_RSSIMonitorCheck( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ return; ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE ) ++ { ++ if(Adapter->stapriv.asoc_sta_count < 2) ++ return; ++ } ++ ++ if(pdmpriv->OFDM_Pkt_Cnt == 0) ++ pdmpriv->RSSI_Select = RSSI_CCK; ++ else ++ pdmpriv->RSSI_Select = RSSI_OFDM; ++ ++ pdmpriv->OFDM_Pkt_Cnt = 0; ++ //DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n", ++ //(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK", ++ //pdmpriv->OFDM_Pkt_Cnt); ++} ++ ++//============================================================ ++// functions ++//============================================================ ++void rtl8192c_init_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter); ++#endif ++#endif ++} ++ ++void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ _cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); ++#endif ++} ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++void dm_InitHybridAntDiv(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ //Set OFDM HW RX Antenna Diversity ++ PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch ++ PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB" ++ PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold ++ PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB ++ PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb ++ PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1 ++ PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info ++ //Set CCK HW RX Antenna Diversity ++ PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity ++ PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample ++ PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 ++ PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0 ++ PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) ++ ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++} ++ ++ ++#define RxDefaultAnt1 0x65a9 ++#define RxDefaultAnt2 0x569a ++ ++void dm_SelectRXDefault(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ //DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt); ++ //DBG_8192C(" CCK_Ant1_Cnt = %d, CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt); ++ //DBG_8192C(" OFDM_Ant1_Cnt = %d, OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt); ++ if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) ++ { ++ if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 ) ++ { ++ if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt)) ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt)) ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt) ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ else ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++ } ++ } ++ else ++ { ++ if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt) ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ else ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++ } ++ ++ ++} ++ ++#endif ++ ++void ++rtl8192c_InitHalDm( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i; ++ ++#ifdef CONFIG_USB_HCI ++ dm_InitGPIOSetting(Adapter); ++#endif ++ ++ pdmpriv->DM_Type = DM_Type_ByDriver; ++ pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; ++ pdmpriv->UndecoratedSmoothedPWDB = (-1); ++ pdmpriv->UndecoratedSmoothedCCK = (-1); ++ ++ ++ //.1 DIG INIT ++ pdmpriv->bDMInitialGainEnable = _TRUE; ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG; ++ dm_DIGInit(Adapter); ++ ++ //.2 DynamicTxPower INIT ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_HP; ++ dm_InitDynamicTxPower(Adapter); ++ ++ //.3 ++ DM_InitEdcaTurbo(Adapter); ++ ++ //.4 RateAdaptive INIT ++ dm_InitRateAdaptiveMask(Adapter); ++ ++ //.5 Tx Power Tracking Init. ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_SS; ++ DM_InitializeTXPowerTracking(Adapter); ++ ++#ifdef CONFIG_BT_COEXIST ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; ++ dm_InitBtCoexistDM(Adapter); ++#endif ++ ++ dm_InitDynamicBBPowerSaving(Adapter); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; ++ dm_SW_AntennaSwitchInit(Adapter); ++#endif ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; ++ dm_InitHybridAntDiv(Adapter); ++#endif ++ ++ dm_RSSIMonitorInit(Adapter); ++ ++ pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; ++ ++ // Save REG_INIDATA_RATE_SEL value for TXDESC. ++ for(i = 0 ; i<32 ; i++) ++ { ++ pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; ++ } ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_ADAPTIVITY; ++ dm_adaptivity_init(Adapter); ++#endif ++ ++} ++ ++#ifdef CONFIG_CONCURRENT_MODE ++static void FindMinimumRSSI(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pbuddy_HalData; ++ struct dm_priv *pbuddy_dmpriv; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(!rtw_buddy_adapter_up(Adapter)) ++ return; ++ ++ pbuddy_HalData = GET_HAL_DATA(pbuddy_adapter); ++ pbuddy_dmpriv = &pbuddy_HalData->dmpriv; ++ ++ //get min. [PWDB] when both interfaces are connected ++ if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE ++ && Adapter->stapriv.asoc_sta_count > 2 ++ && check_buddy_fwstate(Adapter, _FW_LINKED)) || ++ (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE ++ && pbuddy_adapter->stapriv.asoc_sta_count > 2 ++ && check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ && check_buddy_fwstate(Adapter,WIFI_STATION_STATE) ++ && check_buddy_fwstate(Adapter,_FW_LINKED))) ++ { ++ if(pdmpriv->UndecoratedSmoothedPWDB > pbuddy_dmpriv->UndecoratedSmoothedPWDB) ++ pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB; ++ }//primary interface is not connected ++ else if((check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE ++ && pbuddy_adapter->stapriv.asoc_sta_count > 2) || ++ (check_buddy_fwstate(Adapter,WIFI_STATION_STATE) ++ && check_buddy_fwstate(Adapter,_FW_LINKED))) ++ { ++ pdmpriv->UndecoratedSmoothedPWDB = pbuddy_dmpriv->UndecoratedSmoothedPWDB; ++ } ++ //secondary is not connected ++ else if((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE ++ && Adapter->stapriv.asoc_sta_count > 2) || ++ (check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED))) ++ { ++ pbuddy_dmpriv->UndecoratedSmoothedPWDB = 0; ++ } ++ //both interfaces are not connected ++ else ++ { ++ pdmpriv->UndecoratedSmoothedPWDB = 0; ++ pbuddy_dmpriv->UndecoratedSmoothedPWDB = 0; ++ } ++ ++ //primary interface is ap mode ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && Adapter->stapriv.asoc_sta_count > 2) ++ { ++ pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB = 0; ++ }//secondary interface is ap mode ++ else if(check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE && pbuddy_adapter->stapriv.asoc_sta_count > 2) ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB; ++ } ++ else //both interfaces are not ap mode ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = pbuddy_dmpriv->EntryMinUndecoratedSmoothedPWDB = 0; ++ } ++ ++} ++ ++#endif //CONFIG_CONCURRENT_MODE ++ ++VOID ++rtl8192c_HalDmWatchDog( ++ IN PADAPTER Adapter ++ ) ++{ ++ BOOLEAN bFwCurrentInPSMode = _FALSE; ++ BOOLEAN bFwPSAwake = _TRUE; ++ u8 hw_init_completed = _FALSE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++#endif //CONFIG_CONCURRENT_MODE ++ ++ #if defined(CONFIG_CONCURRENT_MODE) ++ if (Adapter->isprimary == _FALSE && pbuddy_adapter) { ++ hw_init_completed = pbuddy_adapter->hw_init_completed; ++ } else ++ #endif ++ { ++ hw_init_completed = Adapter->hw_init_completed; ++ } ++ ++ if (hw_init_completed == _FALSE) ++ goto skip_dm; ++ ++#ifdef CONFIG_LPS ++ #if defined(CONFIG_CONCURRENT_MODE) ++ if (Adapter->iface_type != IFACE_PORT0 && pbuddy_adapter) { ++ bFwCurrentInPSMode = pbuddy_adapter->pwrctrlpriv.bFwCurrentInPSMode; ++ rtw_hal_get_hwreg(pbuddy_adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); ++ } else ++ #endif ++ { ++ bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode; ++ rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); ++ } ++#endif ++ ++#ifdef CONFIG_P2P_PS ++ // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. ++ // modifed by thomas. 2011.06.11. ++ if(Adapter->wdinfo.p2p_ps_mode) ++ bFwPSAwake = _FALSE; ++#endif // CONFIG_P2P_PS ++ ++ // Stop dynamic mechanism when: ++ // 1. RF is OFF. (No need to do DM.) ++ // 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.) ++ // 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM. ++ // Sometimes DM execution time is longer than 100ms such that the assertion ++ // in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by ++ // wating to long for RFChangeInProgress.) ++ // 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.) ++ // Noted by tynli. 2010.06.01. ++ //if(rfState == eRfOn) ++ if( (hw_init_completed == _TRUE) ++ && ((!bFwCurrentInPSMode) && bFwPSAwake)) ++ { ++ // ++ // Calculate Tx/Rx statistics. ++ // ++ dm_CheckStatistics(Adapter); ++ ++ // ++ // For PWDB monitor and record some value for later use. ++ // ++ PWDB_Monitor(Adapter); ++ ++ dm_RSSIMonitorCheck(Adapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->adapter_type > PRIMARY_ADAPTER) ++ goto _record_initrate; ++ ++ FindMinimumRSSI(Adapter); ++#endif ++ ++ // ++ // Dynamic Initial Gain mechanism. ++ // ++ dm_FalseAlarmCounterStatistics(Adapter); ++ dm_DIG(Adapter); ++ dm_adaptivity(Adapter); ++ ++ // ++ //Dynamic BB Power Saving Mechanism ++ // ++ dm_DynamicBBPowerSaving(Adapter); ++ ++ // ++ // Dynamic Tx Power mechanism. ++ // ++ dm_DynamicTxPower(Adapter); ++ ++ // ++ // Tx Power Tracking. ++ // ++#if MP_DRIVER == 0 ++#ifdef CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic == _FALSE) ++#endif //CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK ++#endif ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ ++ // ++ // Rate Adaptive by Rx Signal Strength mechanism. ++ // ++ dm_RefreshRateAdaptiveMask(Adapter); ++ ++#ifdef CONFIG_BT_COEXIST ++ //BT-Coexist ++ dm_BTCoexist(Adapter); ++#endif ++ ++ // EDCA turbo ++ //update the EDCA paramter according to the Tx/RX mode ++ //update_EDCA_param(Adapter); ++ dm_CheckEdcaTurbo(Adapter); ++ ++ // ++ // Dynamically switch RTS/CTS protection. ++ // ++ //dm_CheckProtection(Adapter); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ // ++ // Software Antenna diversity ++ // ++ dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK); ++#endif ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ dm_SelectRXDefault(Adapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. ++ // Tx Migration settings. ++ //dm_InterruptMigration(Adapter); ++ ++ //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) ++ // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); ++#endif ++ ++ ++_record_initrate: ++ ++ // Read REG_INIDATA_RATE_SEL value for TXDESC. ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; ++ ++#ifdef CONFIG_TDLS ++ if(Adapter->tdlsinfo.setup_state == TDLS_LINKED_STATE) ++ { ++ u8 i=1; ++ for(; i < (Adapter->tdlsinfo.macid_index) ; i++) ++ { ++ pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; ++ } ++ } ++#endif //CONFIG_TDLS ++ ++ } ++ else ++ { ++ u8 i; ++ for(i=1 ; i < (Adapter->stapriv.asoc_sta_count + 1); i++) ++ { ++ pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; ++ } ++ } ++ } ++ ++skip_dm: ++ ++ // Check GPIO to determine current RF on/off and Pbc status. ++ // Check Hardware Radio ON/OFF or not ++ //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) ++ //{ ++ //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); ++ // dm_CheckRfCtrlGPIO(Adapter); ++ //} ++ ++#ifdef CONFIG_PCI_HCI ++ if(pHalData->bGpioHwWpsPbc) ++#endif ++ { ++ dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11 ++ } ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c +@@ -0,0 +1,3628 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#define _RTL8192C_HAL_INIT_C_ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWrite_BT( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest); ++ ++static VOID ++_FWDownloadEnable( ++ IN PADAPTER Adapter, ++ IN BOOLEAN enable ++ ) ++{ ++ u8 tmp; ++ ++ if(enable) ++ { ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ // 8051 enable ++ tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04); ++ ++ // MCU firmware download enable. ++ tmp = rtw_read8(Adapter, REG_MCUFWDL); ++ rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01); ++ ++ // 8051 reset ++ tmp = rtw_read8(Adapter, REG_MCUFWDL+2); ++ rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7); ++ } ++ else ++ { ++ // MCU firmware download enable. ++ tmp = rtw_read8(Adapter, REG_MCUFWDL); ++ rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe); ++ ++ // Reserved for fw extension. ++ rtw_write8(Adapter, REG_MCUFWDL+1, 0x00); ++ } ++} ++ ++ ++#define MAX_REG_BOLCK_SIZE 196 ++#define MIN_REG_BOLCK_SIZE 8 ++ ++static int ++_BlockWrite( ++ IN PADAPTER Adapter, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ int ret = _SUCCESS; ++ ++#ifdef CONFIG_PCI_HCI ++ u32 blockSize = sizeof(u32); // Use 4-byte write to download FW ++ u8 *bufferPtr = (u8 *)buffer; ++ u32 *pu4BytePtr = (u32 *)buffer; ++ u32 i, offset, blockCount, remainSize; ++ u8 remainFW[4] = {0, 0, 0, 0}; ++ u8 *p = NULL; ++ ++ blockCount = size / blockSize; ++ remainSize = size % blockSize; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = i * blockSize; ++ rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), cpu_to_le32(*(pu4BytePtr + i))); ++ } ++ ++ p = (u8*)((u32*)(bufferPtr + blockCount * blockSize)); ++ if(remainSize){ ++ switch (remainSize) { ++ case 0: ++ break; ++ case 3: ++ remainFW[2]=*(p+2); ++ case 2: ++ remainFW[1]=*(p+1); ++ case 1: ++ remainFW[0]=*(p); ++ ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + blockCount * blockSize), ++ le32_to_cpu(*(u32*)remainFW)); ++ } ++ return ret; ++ } ++#else ++ ++#ifdef SUPPORTED_BLOCK_IO ++ u32 blockSize = MAX_REG_BOLCK_SIZE; // Use 196-byte write to download FW ++ u32 blockSize2 = MIN_REG_BOLCK_SIZE; ++#else ++ u32 blockSize = sizeof(u32); // Use 4-byte write to download FW ++ u32* pu4BytePtr = (u32*)buffer; ++ u32 blockSize2 = sizeof(u8); ++#endif ++ u8* bufferPtr = (u8*)buffer; ++ u32 i, offset = 0, offset2, blockCount, remainSize, remainSize2; ++ ++ blockCount = size / blockSize; ++ remainSize = size % blockSize; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = i * blockSize; ++ #ifdef SUPPORTED_BLOCK_IO ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize, (bufferPtr + offset)); ++ #else ++ ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), le32_to_cpu(*(pu4BytePtr + i))); ++ #endif ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ ++ if(remainSize){ ++ #if defined(SUPPORTED_BLOCK_IO) && defined(DBG_BLOCK_WRITE_ISSUE) //Can this be enabled? ++ offset = blockCount * blockSize; ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), remainSize, (bufferPtr + offset)); ++ goto exit; ++ #endif ++ offset2 = blockCount * blockSize; ++ blockCount = remainSize / blockSize2; ++ remainSize2 = remainSize % blockSize2; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = offset2 + i * blockSize2; ++ #ifdef SUPPORTED_BLOCK_IO ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize2, (bufferPtr + offset)); ++ #else ++ ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset ), *(bufferPtr + offset)); ++ #endif ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ ++ if(remainSize2) ++ { ++ offset += blockSize2; ++ bufferPtr += offset; ++ ++ for(i = 0 ; i < remainSize2 ; i++){ ++ ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i)); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ } ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++static int ++_PageWrite( ++ IN PADAPTER Adapter, ++ IN u32 page, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ u8 value8; ++ u8 u8Page = (u8) (page & 0x07) ; ++ ++ value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ; ++ rtw_write8(Adapter, REG_MCUFWDL+2,value8); ++ return _BlockWrite(Adapter,buffer,size); ++} ++ ++static VOID ++_FillDummy( ++ u8* pFwBuf, ++ u32* pFwLen ++ ) ++{ ++ u32 FwLen = *pFwLen; ++ u8 remain = (u8)(FwLen%4); ++ remain = (remain==0)?0:(4-remain); ++ ++ while(remain>0) ++ { ++ pFwBuf[FwLen] = 0; ++ FwLen++; ++ remain--; ++ } ++ ++ *pFwLen = FwLen; ++} ++ ++static int ++_WriteFW( ++ IN PADAPTER Adapter, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. ++ // We can remove _ReadChipVersion from ReadAdapterInfo8192C later. ++ ++ int ret = _SUCCESS; ++ u32 pageNums,remainSize ; ++ u32 page,offset; ++ u8* bufferPtr = (u8*)buffer; ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100120 Joseph: Add for 88CE normal chip. ++ // Fill in zero to make firmware image to dword alignment. ++// _FillDummy(bufferPtr, &size); ++#endif ++ ++ pageNums = size / MAX_PAGE_SIZE ; ++ //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); ++ remainSize = size % MAX_PAGE_SIZE; ++ ++ for(page = 0; page < pageNums; page++){ ++ offset = page *MAX_PAGE_SIZE; ++ ret = _PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ if(remainSize){ ++ offset = pageNums *MAX_PAGE_SIZE; ++ page = pageNums; ++ ret = _PageWrite(Adapter,page, (bufferPtr+offset),remainSize); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Normal chip.\n")); ++ ++exit: ++ return ret; ++} ++ ++static int _FWFreeToGo( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 counter = 0; ++ u32 value32; ++ u32 restarted = _FALSE; ++ ++ // polling CheckSum report ++ do{ ++ value32 = rtw_read32(Adapter, REG_MCUFWDL); ++ }while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt))); ++ ++ if(counter >= POLLING_READY_TIMEOUT_COUNT){ ++ DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x\n",value32); ++ return _FAIL; ++ } else { ++ //DBG_8192C("chksum report success ! REG_MCUFWDL:0x%08x, counter:%u\n",value32, counter); ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32)); ++ ++ ++ value32 = rtw_read32(Adapter, REG_MCUFWDL); ++ value32 |= MCUFWDL_RDY; ++ value32 &= ~WINTINI_RDY; ++ rtw_write32(Adapter, REG_MCUFWDL, value32); ++ ++ ++POLLING_FW_READY: ++ // polling for FW ready ++ counter = 0; ++ do ++ { ++ if(rtw_read32(Adapter, REG_MCUFWDL) & WINTINI_RDY){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",PlatformIORead4Byte(Adapter, REG_MCUFWDL)) ); ++ return _SUCCESS; ++ } ++ rtw_udelay_os(5); ++ }while(counter++ < POLLING_READY_TIMEOUT_COUNT); ++ ++ DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", rtw_read32(Adapter, REG_MCUFWDL)); ++ ++ if(restarted == _FALSE) { ++ u8 tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp & ~BIT2); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp & ~BIT2); ++ DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp|BIT2); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|BIT2); ++ restarted = _TRUE; ++ goto POLLING_FW_READY; ++ } ++ ++ ++ return _FAIL; ++ ++} ++ ++ ++VOID ++rtl8192c_FirmwareSelfReset( ++ IN PADAPTER Adapter ++) ++{ ++ u8 u1bTmp; ++ u8 Delay = 100; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if((pHalData->FirmwareVersion > 0x21) || ++ (pHalData->FirmwareVersion == 0x21 && ++ pHalData->FirmwareSubVersion >= 0x01)) // after 88C Fw v33.1 ++ { ++ //0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test ++ rtw_write8(Adapter, REG_HMETFR+3, 0x20); ++ ++ u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ while(u1bTmp&BIT2) ++ { ++ Delay--; ++ if(Delay == 0) ++ break; ++ rtw_udelay_os(50); ++ u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ } ++ ++ if((u1bTmp&BIT2) && (Delay == 0)) ++ { ++ DBG_8192C("FirmwareDownload92C():fw reset by itself Fail!!!!!! 0x03 = %x\n", u1bTmp); ++ //RT_ASSERT(FALSE, ("PowerOffAdapter8192CE(): 0x03 = %x\n", u1bTmp)); ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ rtw_write8(Adapter,REG_SYS_FUNC_EN+1,(rtw_read8(Adapter, REG_SYS_FUNC_EN+1)&~BIT2)); ++ } ++ ++ DBG_8192C("%s =====> 8051 reset success (%d) .\n", __FUNCTION__ ,Delay); ++ } ++} ++ ++#ifdef CONFIG_FILE_FWIMG ++extern char *rtw_fw_file_path; ++u8 FwBuffer8192C[FW_8192C_SIZE]; ++#endif //CONFIG_FILE_FWIMG ++// ++// Description: ++// Download 8192C firmware code. ++// ++// ++int FirmwareDownload92C( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bUsedWoWLANFw ++) ++{ ++ int rtStatus = _SUCCESS; ++ u8 writeFW_retry = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 R92CFwImageFileName_TSMC[] ={RTL8192C_FW_TSMC_IMG}; ++ s8 R92CFwImageFileName_UMC[] ={RTL8192C_FW_UMC_IMG}; ++ s8 R92CFwImageFileName_UMC_B[] ={RTL8192C_FW_UMC_B_IMG}; ++#ifdef CONFIG_WOWLAN ++ s8 R92CFwImageFileName_TSMC_WW[] ={RTL8192C_FW_TSMC_WW_IMG}; ++ s8 R92CFwImageFileName_UMC_WW[] ={RTL8192C_FW_UMC_WW_IMG}; ++ s8 R92CFwImageFileName_UMC_B_WW[] ={RTL8192C_FW_UMC_B_WW_IMG}; ++#endif //CONFIG_WOWLAN ++ ++ //s8 R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG}; ++ u8* FwImage = NULL; ++ u32 FwImageLen = 0; ++ char* pFwImageFileName; ++#ifdef CONFIG_WOWLAN ++ u8* FwImageWoWLAN; ++ u32 FwImageWoWLANLen; ++ char* pFwImageFileName_WoWLAN; ++#endif //CONFIG_WOWLAN ++ u8* pucMappedFile = NULL; ++ //vivi, merge 92c and 92s into one driver, 20090817 ++ //vivi modify this temply, consider it later!!!!!!!! ++ //PRT_FIRMWARE pFirmware = GET_FIRMWARE_819X(Adapter); ++ //PRT_FIRMWARE_92C pFirmware = GET_FIRMWARE_8192C(Adapter); ++ PRT_FIRMWARE_92C pFirmware = NULL; ++ PRT_8192C_FIRMWARE_HDR pFwHdr = NULL; ++ u8 *pFirmwareBuf; ++ u32 FirmwareLen; ++ ++ pFirmware = (PRT_FIRMWARE_92C)rtw_zvmalloc(sizeof(RT_FIRMWARE_92C)); ++ ++ if(!pFirmware) ++ { ++ rtStatus = _FAIL; ++ goto Exit; ++ } ++ ++ if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ pFwImageFileName = R92CFwImageFileName_UMC; ++ FwImage = Rtl819XFwUMCACutImageArray; ++ FwImageLen = UMCACutImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_WW; ++ FwImageWoWLAN= Rtl8192C_FwUMCWWImageArray; ++ FwImageWoWLANLen =UMCACutWWImgArrayLength ; ++#endif //CONFIG_WOWLAN ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC\n"); ++ } ++ else if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ { ++ // The ROM code of UMC B-cut Fw is the same as TSMC. by tynli. 2011.01.14. ++ pFwImageFileName = R92CFwImageFileName_UMC_B; ++ FwImage = Rtl819XFwUMCBCutImageArray; ++ FwImageLen = UMCBCutImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_B_WW; ++ FwImageWoWLAN= Rtl8192C_FwUMCBCutWWImageArray; ++ FwImageWoWLANLen =UMCBCutWWImgArrayLength ; ++#endif //CONFIG_WOWLAN ++ ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC_B\n"); ++ } ++ else ++ { ++ pFwImageFileName = R92CFwImageFileName_TSMC; ++ FwImage = Rtl819XFwTSMCImageArray; ++ FwImageLen = TSMCImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_TSMC_WW; ++ FwImageWoWLAN= Rtl8192C_FwTSMCWWImageArray; ++ FwImageWoWLANLen =TSMCWWImgArrayLength ; ++#endif //CONFIG_WOWLAN ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_TSMC\n"); ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:%s\n", pFwImageFileName)); ++ ++ #ifdef CONFIG_FILE_FWIMG ++ if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) ++ { ++ DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); ++ pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg. ++ } ++ else ++ #endif //CONFIG_FILE_FWIMG ++ { ++ DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__); ++ pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; ++ } ++ ++ ++ switch(pFirmware->eFWSource) ++ { ++ case FW_SOURCE_IMG_FILE: ++ ++ #ifdef CONFIG_FILE_FWIMG ++ rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192C, FW_8192C_SIZE); ++ pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; ++ pFirmware->szFwBuffer = FwBuffer8192C; ++ #endif //CONFIG_FILE_FWIMG ++ ++ if(pFirmware->ulFwLength <= 0) ++ { ++ rtStatus = _FAIL; ++ goto Exit; ++ } ++ break; ++ case FW_SOURCE_HEADER_FILE: ++ if(FwImageLen > FW_8192C_SIZE){ ++ rtStatus = _FAIL; ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) ); ++ DBG_871X("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE); ++ goto Exit; ++ } ++ ++ pFirmware->szFwBuffer = FwImage; ++ pFirmware->ulFwLength = FwImageLen; ++#ifdef CONFIG_WOWLAN ++ { ++ pFirmware->szWoWLANFwBuffer=FwImageWoWLAN; ++ pFirmware->ulWoWLANFwLength = FwImageWoWLANLen; ++ } ++#endif //CONFIG_WOWLAN ++ ++ break; ++ } ++ ++#ifdef CONFIG_WOWLAN ++ if(bUsedWoWLANFw) { ++ pFirmwareBuf = pFirmware->szWoWLANFwBuffer; ++ FirmwareLen = pFirmware->ulWoWLANFwLength; ++ pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer; ++ } ++ else ++#endif //CONFIG_WOWLAN ++ { ++ #ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file... ++ if(pFirmware->ulFwLength > 0) ++ { ++ rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength); ++ } ++ #endif ++ ++ pFirmwareBuf = pFirmware->szFwBuffer; ++ FirmwareLen = pFirmware->ulFwLength; ++ ++ // To Check Fw header. Added by tynli. 2009.12.04. ++ pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szFwBuffer; ++ } ++ pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); ++ pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" FirmwareVersion(%#x), Signature(%#x)\n", ++ // Adapter->MgntInfo.FirmwareVersion, pFwHdr->Signature)); ++ ++ DBG_8192C("fw_ver=v%d, fw_subver=%d, sig=0x%x\n", ++ pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, le16_to_cpu(pFwHdr->Signature)&0xFFF0); ++ ++ if(IS_FW_HEADER_EXIST(pFwHdr)) ++ { ++ //RT_TRACE(COMP_INIT, DBG_LOUD,("Shift 32 bytes for FW header!!\n")); ++ pFirmwareBuf = pFirmwareBuf + 32; ++ FirmwareLen = FirmwareLen -32; ++ } ++ ++ // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, ++ // or it will cause download Fw fail. 2010.02.01. by tynli. ++ if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code ++ { ++ rtl8192c_FirmwareSelfReset(Adapter); ++ rtw_write8(Adapter, REG_MCUFWDL, 0x00); ++ } ++ ++ ++ _FWDownloadEnable(Adapter, _TRUE); ++ while(1) { ++ u8 tmp8; ++ tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ ++ //reset the FWDL chksum ++ rtw_write8(Adapter, REG_MCUFWDL, tmp8|FWDL_ChkSum_rpt); ++ ++ //tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ //DBG_8192C("Before _WriteFW, REG_MCUFWDL:0x%02x, writeFW_retry:%u\n", tmp8, writeFW_retry); ++ ++ rtStatus = _WriteFW(Adapter, pFirmwareBuf, FirmwareLen); ++ ++ //tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ //DBG_8192C("After _WriteFW, REG_MCUFWDL:0x%02x, rtStatus:%d\n", tmp8, rtStatus); ++ ++ if(rtStatus == _SUCCESS || ++writeFW_retry>3) ++ break; ++ } ++ _FWDownloadEnable(Adapter, _FALSE); ++ ++ if(_SUCCESS != rtStatus){ ++ DBG_8192C("DL Firmware failed!\n"); ++ goto Exit; ++ } ++ ++ rtStatus = _FWFreeToGo(Adapter); ++ if(_SUCCESS != rtStatus){ ++ DBG_8192C("DL Firmware failed!\n"); ++ goto Exit; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" Firmware is ready to run!\n")); ++ ++Exit: ++ ++ if(pFirmware) { ++ rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92C)); ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n")); ++ return rtStatus; ++ ++} ++ ++VOID ++InitializeFirmwareVars92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Init Fw LPS related. ++ Adapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE; ++ ++ //Init H2C counter. by tynli. 2009.12.09. ++ pHalData->LastHMEBoxNum = 0; ++} ++ ++#ifdef CONFIG_WOWLAN ++//=========================================== ++ ++// ++// Description: Prepare some information to Fw for WoWLAN. ++// (1) Download wowlan Fw. ++// (2) Download RSVD page packets. ++// (3) Enable AP offload if needed. ++// ++// 2011.04.12 by tynli. ++// ++VOID ++SetFwRelatedForWoWLAN8192CU( ++ IN PADAPTER padapter, ++ IN u8 bHostIsGoingtoSleep ++) ++{ ++ int status=_FAIL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 bRecover = _FALSE; ++ ++ if(bHostIsGoingtoSleep) ++ { ++ // ++ // 1. Before WoWLAN we need to re-download WoWLAN Fw. ++ // ++ status = FirmwareDownload92C(padapter, bHostIsGoingtoSleep); ++ if(status != _SUCCESS) ++ { ++ DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware failed!!\n"); ++ return; ++ } ++ else ++ { ++ DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware Success !!\n"); ++ } ++ ++ // ++ // 2. Re-Init the variables about Fw related setting. ++ // ++ InitializeFirmwareVars92C(padapter); ++ ++ ++ } ++} ++#endif // CONFIG_WOWLAN ++ ++#ifdef CONFIG_BT_COEXIST ++static void _update_bt_param(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ ++ if(2 != registry_par->bt_iso) ++ pbtpriv->BT_Ant_isolation = registry_par->bt_iso;// 0:Low, 1:High, 2:From Efuse ++ ++ if(registry_par->bt_sco == 1) // 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy ++ pbtpriv->BT_Service = BT_OtherAction; ++ else if(registry_par->bt_sco==2) ++ pbtpriv->BT_Service = BT_SCO; ++ else if(registry_par->bt_sco==4) ++ pbtpriv->BT_Service = BT_Busy; ++ else if(registry_par->bt_sco==5) ++ pbtpriv->BT_Service = BT_OtherBusy; ++ else ++ pbtpriv->BT_Service = BT_Idle; ++ ++ pbtpriv->BT_Ampdu = registry_par->bt_ampdu; ++ pbtpriv->bCOBT = _TRUE; ++#if 1 ++ DBG_8192C("BT Coexistance = %s\n", (pbtpriv->BT_Coexist==_TRUE)?"enable":"disable"); ++ if(pbtpriv->BT_Coexist) ++ { ++ if(pbtpriv->BT_Ant_Num == Ant_x2) ++ { ++ DBG_8192C("BlueTooth BT_Ant_Num = Antx2\n"); ++ } ++ else if(pbtpriv->BT_Ant_Num == Ant_x1) ++ { ++ DBG_8192C("BlueTooth BT_Ant_Num = Antx1\n"); ++ } ++ switch(pbtpriv->BT_CoexistType) ++ { ++ case BT_2Wire: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_2Wire\n"); ++ break; ++ case BT_ISSC_3Wire: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_ISSC_3Wire\n"); ++ break; ++ case BT_Accel: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_Accel\n"); ++ break; ++ case BT_CSR_BC4: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_CSR_BC4\n"); ++ break; ++ case BT_RTL8756: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_RTL8756\n"); ++ break; ++ default: ++ DBG_8192C("BlueTooth BT_CoexistType = Unknown\n"); ++ break; ++ } ++ DBG_8192C("BlueTooth BT_Ant_isolation = %d\n", pbtpriv->BT_Ant_isolation); ++ ++ ++ switch(pbtpriv->BT_Service) ++ { ++ case BT_OtherAction: ++ DBG_8192C("BlueTooth BT_Service = BT_OtherAction\n"); ++ break; ++ case BT_SCO: ++ DBG_8192C("BlueTooth BT_Service = BT_SCO\n"); ++ break; ++ case BT_Busy: ++ DBG_8192C("BlueTooth BT_Service = BT_Busy\n"); ++ break; ++ case BT_OtherBusy: ++ DBG_8192C("BlueTooth BT_Service = BT_OtherBusy\n"); ++ break; ++ default: ++ DBG_8192C("BlueTooth BT_Service = BT_Idle\n"); ++ break; ++ } ++ ++ DBG_8192C("BT_RadioSharedType = 0x%x\n", pbtpriv->BT_RadioSharedType); ++ } ++#endif ++ ++} ++ ++ ++#define GET_BT_COEXIST(priv) (&priv->bt_coexist) ++ ++void rtl8192c_ReadBluetoothCoexistInfo( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 rf_opt4; ++ ++ if(AutoloadFail){ ++ pbtpriv->BT_Coexist = _FALSE; ++ pbtpriv->BT_CoexistType= BT_2Wire; ++ pbtpriv->BT_Ant_Num = Ant_x2; ++ pbtpriv->BT_Ant_isolation= 0; ++ pbtpriv->BT_RadioSharedType = BT_Radio_Shared; ++ return; ++ } ++ ++ pbtpriv->BT_Coexist = (((PROMContent[EEPROM_RF_OPT1]&BOARD_TYPE_NORMAL_MASK)>>5) == BOARD_USB_COMBO)?_TRUE:_FALSE; // bit [7:5] ++ rf_opt4 = PROMContent[EEPROM_RF_OPT4]; ++ pbtpriv->BT_CoexistType = ((rf_opt4&0xe)>>1); // bit [3:1] ++ pbtpriv->BT_Ant_Num = (rf_opt4&0x1); // bit [0] ++ pbtpriv->BT_Ant_isolation = ((rf_opt4&0x10)>>4); // bit [4] ++ pbtpriv->BT_RadioSharedType = ((rf_opt4&0x20)>>5); // bit [5] ++ ++ _update_bt_param(Adapter); ++ ++} ++#endif ++ ++VERSION_8192C ++rtl8192c_ReadChipVersion( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ //VERSION_8192C version; ++ u32 ChipVersion=0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ value32 = rtw_read32(Adapter, REG_SYS_CFG); ++ ++ if (value32 & TRP_VAUX_EN) ++ { ++#if 0 ++ // Test chip. ++ if(IS_HARDWARE_TYPE_8723A(Adapter)) { ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ } ++ else { ++ version = (value32 & TYPE_ID) ?VERSION_TEST_CHIP_92C :VERSION_TEST_CHIP_88C; ++ } ++#else ++ // tynli_test. 2011.01.10. ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ ChipVersion = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C : VERSION_TEST_CHIP_88C; ++ } ++ else ++ { ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ } ++#endif ++ } ++ else ++ { ++#if 0 ++ // Normal mass production chip. ++ ChipVersion = NORMAL_CHIP; ++#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION ++ ChipVersion |= ((value32 & TYPE_ID) ? CHIP_92C : 0); ++#endif ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ if(IS_8723_SERIES(ChipVersion)) ++ { ++ if(IS_VENDOR_UMC(ChipVersion)) ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) ? CHIP_VENDOR_UMC_B_CUT : 0); ++ } ++ else ++ { ++ // Mark out by tynli. UMC B-cut IC will not set the SYS_CFG[19] to UMC ++ // because we do not want the custmor to know. 2011.01.11. ++ //if(IS_VENDOR_UMC(ChipVersion)) ++ { ++ // To check the value of B-cut. by tynli. 2011.01.11. ++ u1bTmp = (u1Byte)((value32 & CHIP_VER_RTL_MASK)>>12); ++ if(u1bTmp == 1) ++ { // B-cut ++ ChipVersion |= CHIP_VENDOR_UMC_B_CUT; ++ } ++ } ++ } ++#else ++ // Normal mass production chip. ++ ChipVersion = NORMAL_CHIP; ++//#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION ++ ChipVersion |= ((value32 & TYPE_ID) ? RF_TYPE_2T2R : 0); //92c ++//#endif ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ // 88/92C UMC B-cut IC will not set the SYS_CFG[19] to UMC ++ // because we do not want the custmor to know. by tynli. 2011.01.17. ++ //MSG_8192C("mask result = 0x%x is_UMC %d chipversion 0x%x\n", (value32 & CHIP_VER_RTL_MASK), IS_CHIP_VENDOR_UMC(ChipVersion), ChipVersion); ++ if((!IS_CHIP_VENDOR_UMC(ChipVersion) )&& (value32 & CHIP_VER_RTL_MASK)) ++ { ++ //MSG_8192C("chip mask result = 0x%x\n", ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC)); ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC); // IC version (CUT) ++ //MSG_8192C("chip version = 0x%x\n", ChipVersion); ++ } ++ } ++ else ++ { ++ if(IS_CHIP_VENDOR_UMC(ChipVersion)) ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK)); // IC version (CUT) ++ } ++ ++ if(IS_92C_SERIAL(ChipVersion)) ++ { ++ value32 = rtw_read32(Adapter, REG_HPON_FSM); ++ ChipVersion |= ((CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_92C_1T2R) ? RF_TYPE_1T2R : 0); ++ } ++ else if(IS_8723_SERIES(ChipVersion)) ++ { ++ //RT_ASSERT(IS_HARDWARE_TYPE_8723A(Adapter), ("Incorrect chip version!!\n")); ++ value32 = rtw_read32(Adapter, REG_GPIO_OUTSTS); ++ ChipVersion |= ((value32 & RF_RL_ID)>>20); //ROM code version. ++ } ++#endif ++ ++ } ++ ++ //version = (VERSION_8192C)ChipVersion; ++ ++ // For multi-function consideration. Added by Roger, 2010.10.06. ++ if(IS_8723_SERIES(ChipVersion)) ++ { ++ pHalData->MultiFunc = RT_MULTI_FUNC_NONE; ++ value32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0) ); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0) ); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0) ); ++ pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); ++ //MSG_8192C("ReadChipVersion(): MultiFunc(%x), PolarityCtl(%x) \n", pHalData->MultiFunc, pHalData->PolarityCtl); ++ ++ //For regulator mode. by tynli. 2011.01.14 ++ pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); ++ //MSG_8192C("ReadChipVersion(): RegulatorMode(%x) \n", pHalData->RegulatorMode); ++ } ++ ++//#if DBG ++#if 1 ++ switch(ChipVersion) ++ { ++ case VERSION_NORMAL_TSMC_CHIP_92C_1T2R: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C_1T2R.\n"); ++ break; ++ case VERSION_NORMAL_TSMC_CHIP_92C: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"); ++ break; ++ case VERSION_NORMAL_TSMC_CHIP_88C: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT.\n"); ++ break; ++ case VERSION_TEST_CHIP_92C: ++ MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92C.\n"); ++ break; ++ case VERSION_TEST_CHIP_88C: ++ MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_88C.\n"); ++ break; ++ case VERSION_TEST_UMC_CHIP_8723: ++ MSG_8192C("Chip Version ID: VERSION_TEST_UMC_CHIP_8723.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT.\n"); ++ break; ++ default: ++ MSG_8192C("Chip Version ID: ???????????????.\n"); ++ break; ++ } ++#endif ++ ++ pHalData->VersionID = ChipVersion; ++ ++ if(IS_1T2R(ChipVersion)) ++ pHalData->rf_type = RF_1T2R; ++ else if(IS_2T2R(ChipVersion)) ++ pHalData->rf_type = RF_2T2R; ++ else if(IS_8723_SERIES(ChipVersion)) ++ pHalData->rf_type = RF_1T1R; ++ else ++ pHalData->rf_type = RF_1T1R; ++ ++ MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); ++ ++ return ChipVersion; ++} ++ ++void ++rtl8192c_EfuseParseChnlPlan( ++ IN PADAPTER padapter, ++ IN u8* hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ padapter->mlmepriv.ChannelPlan = hal_com_get_channel_plan( ++ padapter ++ , hwinfo?hwinfo[EEPROM_CHANNEL_PLAN]:0xFF ++ , padapter->registrypriv.channel_plan ++ , RT_CHANNEL_DOMAIN_WORLD_WIDE_13 ++ , AutoLoadFail ++ ); ++ ++ DBG_871X("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); ++} ++ ++u8 GetEEPROMSize8192C(PADAPTER Adapter) ++{ ++ u8 size = 0; ++ u32 curRCR; ++ ++ curRCR = rtw_read16(Adapter, REG_9346CR); ++ size = (curRCR & BOOT_FROM_EEPROM) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse. ++ ++ MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); ++ ++ return size; ++} ++ ++void rtl8192c_free_hal_data(_adapter * padapter) ++{ ++_func_enter_; ++ ++ DBG_8192C("=====> rtl8192c_free_hal_data =====\n"); ++ ++ if(padapter->HalData) ++ rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); ++ DBG_8192C("<===== rtl8192c_free_hal_data =====\n"); ++ ++_func_exit_; ++} ++ ++//=========================================================== ++// Efuse related code ++//=========================================================== ++enum{ ++ VOLTAGE_V25 = 0x03, ++ LDOE25_SHIFT = 28 , ++ }; ++ ++static VOID ++hal_EfusePowerSwitch_RTL8192C( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ u8 tempval; ++ u16 tmpV16; ++ ++ if (PwrState == _TRUE) ++ { ++ // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); ++ if( ! (tmpV16 & PWC_EV12V ) ){ ++ tmpV16 |= PWC_EV12V ; ++ rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); ++ } ++ // Reset: 0x0000h[28], default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); ++ if( !(tmpV16 & FEN_ELDR) ){ ++ tmpV16 |= FEN_ELDR ; ++ rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); ++ } ++ ++ // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); ++ if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ ++ tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; ++ rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); ++ } ++ ++ if(bWrite == _TRUE) ++ { ++ // Enable LDO 2.5V before read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ tempval &= 0x0F; ++ tempval |= (VOLTAGE_V25 << 4); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); ++ } ++ } ++ else ++ { ++ if(bWrite == _TRUE){ ++ // Disable LDO 2.5V after read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); ++ } ++ } ++} ++ ++static VOID ++hal_EfusePowerSwitch_RTL8723( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ u8 tempval; ++ u16 tmpV16; ++ ++ if (PwrState == _TRUE) ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); ++ ++ // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); ++ if( ! (tmpV16 & PWC_EV12V ) ){ ++ tmpV16 |= PWC_EV12V ; ++ rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); ++ } ++ // Reset: 0x0000h[28], default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); ++ if( !(tmpV16 & FEN_ELDR) ){ ++ tmpV16 |= FEN_ELDR ; ++ rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); ++ } ++ ++ // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); ++ if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ ++ tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; ++ rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); ++ } ++ ++ if(bWrite == _TRUE) ++ { ++ // Enable LDO 2.5V before read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ tempval &= 0x0F; ++ tempval |= (VOLTAGE_V25 << 4); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); ++ } ++ } ++ else ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); ++ ++ if(bWrite == _TRUE){ ++ // Disable LDO 2.5V after read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); ++ } ++ } ++} ++ ++static VOID ++rtl8192c_EfusePowerSwitch( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ hal_EfusePowerSwitch_RTL8192C(pAdapter, bWrite, PwrState); ++ } ++ else if(IS_HARDWARE_TYPE_8723A(pAdapter)) ++ { ++ hal_EfusePowerSwitch_RTL8723(pAdapter, bWrite, PwrState); ++ } ++} ++ ++static VOID ++ReadEFuse_RTL8192C( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 efuseTbl[EFUSE_MAP_LEN]; ++ u8 rtemp8[1]; ++ u16 eFuse_Addr = 0; ++ u8 offset, wren; ++ u16 i, j; ++ u16 eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT]; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ ++ // ++ // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. ++ // ++ if((_offset + _size_byte)>EFUSE_MAP_LEN) ++ {// total E-Fuse table is 128bytes ++ //DBG_8192C("ReadEFuse_RTL8192C(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ if(*rtemp8 != 0xFF) ++ { ++ efuse_utilized++; ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ eFuse_Addr++; ++ } ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN)) ++ { ++ // Check PG header for section num. ++ offset = ((*rtemp8 >> 4) & 0x0f); ++ ++ if(offset < EFUSE_MAX_SECTION) ++ { ++ // Get word enable value from PG header ++ wren = (*rtemp8 & 0x0f); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN) ++ break; ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); eFuse_Addr++; ++ efuse_utilized++; ++ eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); ++ ++ if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) ++ break; ++ } ++ ++ wren >>= 1; ++ ++ } ++ } ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ // Read next PG header ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ if(*rtemp8 != 0xFF && (eFuse_Addr < 512)) ++ { ++ efuse_utilized++; ++ eFuse_Addr++; ++ } ++ } ++ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN); ++ rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); ++ //rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage); ++} ++ ++static VOID ++ReadEFuse_RTL8723( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 efuseTbl[EFUSE_MAP_LEN_8723]; ++ u16 eFuse_Addr = 0; ++ u8 offset = 0, wden = 0; ++ u16 i, j; ++ u16 eFuseWord[EFUSE_MAX_SECTION_8723][EFUSE_MAX_WORD_UNIT]; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 offset_2_0=0; ++ u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; ++ // ++ // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. ++ // ++ if((_offset + _size_byte)>EFUSE_MAP_LEN_8723) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_RTL8723(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte)); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION_8723; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); ++ ++ if(efuseHeader != 0xFF) ++ { ++ efuse_utilized++; ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n")); ++ return; ++ } ++ ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseHeader)); ++ ++ // Check PG header for section num. ++ if(EXT_HEADER(efuseHeader)) //extended header ++ { ++ offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0)); ++ ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseExtHdr)); ++ ++ if(efuseExtHdr != 0xff) ++ { ++ efuse_utilized++; ++ if(ALL_WORDS_DISABLED(efuseExtHdr)) ++ { ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); ++ if(efuseHeader != 0xff) ++ { ++ efuse_utilized++; ++ } ++ continue; ++ } ++ else ++ { ++ offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0; ++ wden = (efuseExtHdr & 0x0F); ++ } ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n")); ++ // We should handle this condition. ++ } ++ } ++ else ++ { ++ offset = ((efuseHeader >> 4) & 0x0f); ++ wden = (efuseHeader & 0x0f); ++ } ++ ++ if(offset < EFUSE_MAX_SECTION_8723) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden)); ++ ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN); ++ rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); ++ //rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage); ++} ++ ++static BOOLEAN ++Hal_EfuseSwitchToBank( ++ IN PADAPTER pAdapter, ++ IN u8 bank, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet = _FALSE; ++ u32 value32=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); ++ if(bPseudoTest) ++ { ++ fakeEfuseBank = bank; ++ bRet = _TRUE; ++ } ++ else ++ { ++ if(IS_HARDWARE_TYPE_8723A(pAdapter) && ++ INCLUDE_MULTI_FUNC_BT(pAdapter)) ++ { ++ value32 = rtw_read32(pAdapter, EFUSE_TEST); ++ bRet = _TRUE; ++ switch(bank) ++ { ++ case 0: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); ++ break; ++ case 1: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); ++ break; ++ case 2: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); ++ break; ++ case 3: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); ++ break; ++ default: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); ++ bRet = _FALSE; ++ break; ++ } ++ rtw_write32(pAdapter, EFUSE_TEST, value32); ++ } ++ else ++ bRet = _TRUE; ++ } ++ return bRet; ++} ++ ++static VOID ++ReadEFuse_BT( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 *efuseTbl; ++ u16 eFuse_Addr = 0; ++ u8 offset = 0, wden = 0; ++ u16 i, j; ++ u16 **eFuseWord; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 offset_2_0=0; ++ u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; ++ u8 bank=0; ++ BOOLEAN bCheckNextBank=_FALSE; ++ ++ efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); ++ if(efuseTbl == NULL){ ++ DBG_8192C("efuseTbl malloc fail !\n"); ++ return; ++ } ++ ++ eFuseWord = (u16 **)rtw_zmalloc(sizeof(u16 *)*EFUSE_BT_MAX_SECTION); ++ if(eFuseWord == NULL){ ++ DBG_8192C("eFuseWord malloc fail !\n"); ++ return; ++ } ++ else{ ++ for(i=0;iEFUSE_BT_MAP_LEN) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_BT(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte)); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_BT_MAX_SECTION; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ for(bank=1; bank> 1) | offset_2_0; ++ wden = (efuseExtHdr & 0x0F); ++ } ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n")); ++ // We should handle this condition. ++ } ++ } ++ else ++ { ++ offset = ((efuseHeader >> 4) & 0x0f); ++ wden = (efuseHeader & 0x0f); ++ } ++ ++ if(offset < EFUSE_BT_MAX_SECTION) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN) ++ bCheckNextBank = _TRUE; ++ else ++ bCheckNextBank = _FALSE; ++ } ++ } ++ if(!bCheckNextBank) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Stop to check next bank\n")); ++ break; ++ } ++ } ++ ++ // switch bank back to bank 0 for later BT and wifi use. ++ Hal_EfuseSwitchToBank(Adapter, 0, bPseudoTest); ++ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_BT_REAL_CONTENT_LEN); ++ if(bPseudoTest) ++ { ++ fakeBTEfuseUsedBytes = (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1; ++ } ++ else ++ { ++ BTEfuseUsedBytes = (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1; ++ } ++ ++ for(i=0;i>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ return efuse_addr; ++} ++ ++static u16 ++Hal_EfuseGetCurrentSize_BT(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ int bContinual = _TRUE; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 efuse_data,word_cnts=0; ++ u8 bank=0, startBank=0; ++ u16 retU2=0; ++ u32 total_efuse_used=0; ++ ++ if(bPseudoTest) ++ { ++ efuse_addr = (u16)((fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN)); ++ startBank = (u8)(1+(fakeBTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN)); ++ } ++ else ++ { ++ efuse_addr = (u16)((BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN)); ++ startBank = (u8)(1+(BTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN)); ++ } ++ ++ if((startBank < 1) || (startBank >= EFUSE_MAX_BANK)) ++ DBG_8192C("Error, bank error, bank=%d\n", bank); ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), start bank=%d, start_efuse_addr = %d\n", startBank, efuse_addr)); ++ ++ for(bank=startBank; bank> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ // Check if we need to check next bank efuse ++ if(efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK)) ++ { ++ break;// don't need to check next bank. ++ } ++ } ++ ++ retU2 = ((bank-1)*EFUSE_REAL_CONTENT_LEN)+efuse_addr; ++ if(bPseudoTest) ++ { ++ fakeBTEfuseUsedBytes = retU2; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", fakeBTEfuseUsedBytes)); ++ } ++ else ++ { ++ BTEfuseUsedBytes = retU2; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", BTEfuseUsedBytes)); ++ } ++ ++ return retU2; ++} ++ ++ ++static u16 ++hal_EfuseGetCurrentSize_8723(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ int bContinual = _TRUE; ++ ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 efuse_data,word_cnts=0; ++ ++ if(bPseudoTest) ++ { ++ efuse_addr = (u16)(fakeEfuseUsedBytes); ++ } ++ else ++ { ++ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), start_efuse_addr = %d\n", efuse_addr)); ++ ++ while ( bContinual && ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && ++ AVAILABLE_EFUSE_ADDR(efuse_addr)) ++ { ++ if(efuse_data!=0xFF) ++ { ++ if((efuse_data&0x1F) == 0x0F) //extended header ++ { ++ hoffset = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if((efuse_data & 0x0F) == 0x0F) ++ { ++ efuse_addr++; ++ continue; ++ } ++ else ++ { ++ hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ if(bPseudoTest) ++ { ++ fakeEfuseUsedBytes = efuse_addr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", fakeEfuseUsedBytes)); ++ } ++ else ++ { ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", efuse_addr)); ++ } ++ ++ return efuse_addr; ++} ++ ++static u16 ++Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest); ++ ++ return ret; ++} ++ ++static u16 ++rtl8192c_EfuseGetCurrentSize( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ if(efuseType == EFUSE_WIFI) ++ { ++ if(bPseudoTest) ++ { ++ ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); ++ } ++ else ++ { ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfuseGetCurrentSize_8192C(pAdapter, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723A(pAdapter)) ++ { ++ ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest); ++ } ++ } ++ } ++ else ++ { ++ ret = Hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++hal_EfusePgPacketRead_8192C( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ReadState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE; ++ int bDataEmpty = _TRUE ; ++ ++ u8 efuse_data,word_cnts=0; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 tmpidx=0; ++ u8 tmpdata[8]; ++ ++ if(data==NULL) return _FALSE; ++ if(offset>15) return _FALSE; ++ ++ ++ _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // Skip dummy parts to prevent unexpected data read from Efuse. ++ // By pass right now. 2009.02.19. ++ // ++ while(bContinual && (efuse_addr < EFUSE_REAL_CONTENT_LEN) ) ++ { ++ //------- Header Read ------------- ++ if(ReadState & PG_STATE_HEADER) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)){ ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ bDataEmpty = _TRUE ; ++ ++ if(hoffset==offset){ ++ for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){ ++ if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){ ++ tmpdata[tmpidx] = efuse_data; ++ if(efuse_data!=0xff){ ++ bDataEmpty = _FALSE; ++ } ++ } ++ } ++ if(bDataEmpty==_FALSE){ ++ ReadState = PG_STATE_DATA; ++ }else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ } ++ else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ else{ ++ bContinual = _FALSE ; ++ } ++ } ++ //------- Data section Read ------------- ++ else if(ReadState & PG_STATE_DATA) ++ { ++ efuse_WordEnableDataRead(hworden,tmpdata,data); ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ ++ if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && ++ (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) ++ return _FALSE; ++ else ++ return _TRUE; ++ ++} ++ ++static int ++hal_EfusePgPacketRead_8723( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ReadState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE; ++ int bDataEmpty = _TRUE ; ++ ++ u8 efuse_data,word_cnts=0; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 tmpidx=0; ++ u8 tmpdata[8]; ++ u8 max_section=0; ++ u8 tmp_header = 0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); ++ ++ if(data==NULL) ++ return _FALSE; ++ if(offset>max_section) ++ return _FALSE; ++ ++ _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // Skip dummy parts to prevent unexpected data read from Efuse. ++ // By pass right now. 2009.02.19. ++ // ++ while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) ) ++ { ++ //------- Header Read ------------- ++ if(ReadState & PG_STATE_HEADER) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ tmp_header = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if(!ALL_WORDS_DISABLED(efuse_data)) ++ { ++ hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ else ++ { ++ DBG_8192C("Error, All words disabled\n"); ++ efuse_addr++; ++ continue; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ bDataEmpty = _TRUE ; ++ ++ if(hoffset==offset) ++ { ++ for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) ++ { ++ tmpdata[tmpidx] = efuse_data; ++ if(efuse_data!=0xff) ++ { ++ bDataEmpty = _FALSE; ++ } ++ } ++ } ++ if(bDataEmpty==_FALSE){ ++ ReadState = PG_STATE_DATA; ++ }else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ } ++ else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ else{ ++ bContinual = _FALSE ; ++ } ++ } ++ //------- Data section Read ------------- ++ else if(ReadState & PG_STATE_DATA) ++ { ++ efuse_WordEnableDataRead(hworden,tmpdata,data); ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ ++ if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && ++ (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) ++ return _FALSE; ++ else ++ return _TRUE; ++ ++} ++ ++static int ++Hal_EfusePgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfusePgPacketRead_8192C(pAdapter, offset, data, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723A(pAdapter)) ++ { ++ ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketRead_Pseudo( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++rtl8192c_Efuse_PgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static BOOLEAN ++hal_EfuseFixHeaderProcess( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN PPGPKT_STRUCT pFixPkt, ++ IN u16 *pAddr, ++ IN BOOLEAN bPseudoTest ++) ++{ ++ u8 originaldata[8], badworden=0; ++ u16 efuse_addr=*pAddr; ++ u32 PgWriteSuccess=0; ++ ++ _rtw_memset((PVOID)originaldata, 0xff, 8); ++ ++ if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) ++ { //check if data exist ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); ++ ++ if(badworden != 0xf) // write fail ++ { ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ *pAddr = efuse_addr; ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE, bContinual=_TRUE; ++ u16 efuse_addr=*pAddr, efuse_max_available_len=0; ++ u8 pg_header=0, tmp_header=0, pg_header_temp=0; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ ++ while(efuse_addr < efuse_max_available_len) ++ { ++ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ //to write ext_header ++ if(tmp_header == pg_header) ++ { ++ efuse_addr++; ++ pg_header_temp = pg_header; ++ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if((tmp_header & 0x0F) == 0x0F) //word_en PG fail ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); ++ return _FALSE; ++ } ++ else ++ { ++ efuse_addr++; ++ continue; ++ } ++ } ++ else if(pg_header != tmp_header) //offset PG fail ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); ++ fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ else ++ { ++ bRet = _TRUE; ++ break; ++ } ++ } ++ else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header ++ { ++ efuse_addr+=2; ++ continue; ++ } ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 pg_header=0, tmp_header=0; ++ u16 efuse_addr=*pAddr; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); ++ pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ return _FALSE; ++ } ++ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if(pg_header == tmp_header) ++ { ++ bRet = _TRUE; ++ } ++ else ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); ++ fixPkt.offset = (tmp_header>>4) & 0x0F; ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u16 efuse_addr=*pAddr; ++ u8 badworden=0; ++ u32 PgWriteSuccess=0; ++ ++ badworden = 0x0f; ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); ++ if(badworden == 0x0F) ++ { ++ // write ok ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); ++ return _TRUE; ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); ++ //reorganize other pg packet ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ return _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ ++ if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) ++ { ++ bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ else ++ { ++ bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgCheckAvailableAddr( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u16 efuse_max_available_len=0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); ++ ++ if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); ++ return _FALSE; ++ } ++ return _TRUE; ++} ++ ++static VOID ++hal_EfuseConstructPGPkt( ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN PPGPKT_STRUCT pTargetPkt ++ ++) ++{ ++ _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); ++ pTargetPkt->offset = offset; ++ pTargetPkt->word_en= word_en; ++ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); ++ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); ++} ++ ++static BOOLEAN ++hal_EfuseCheckIfDatafollowed( ++ IN PADAPTER pAdapter, ++ IN u8 word_cnts, ++ IN u16 startAddr, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data; ++ ++ for(i=0; i<(word_cnts*2) ; i++) ++ { ++ if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) ++ bRet = _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++wordEnMatched( ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN PPGPKT_STRUCT pCurPkt, ++ IN u8 *pWden ++) ++{ ++ u8 match_word_en = 0x0F; // default all words are disabled ++ u8 i; ++ ++ // check if the same words are enabled both target and current PG packet ++ if( ((pTargetPkt->word_en & BIT0) == 0) && ++ ((pCurPkt->word_en & BIT0) == 0) ) ++ { ++ match_word_en &= ~BIT0; // enable word 0 ++ } ++ if( ((pTargetPkt->word_en & BIT1) == 0) && ++ ((pCurPkt->word_en & BIT1) == 0) ) ++ { ++ match_word_en &= ~BIT1; // enable word 1 ++ } ++ if( ((pTargetPkt->word_en & BIT2) == 0) && ++ ((pCurPkt->word_en & BIT2) == 0) ) ++ { ++ match_word_en &= ~BIT2; // enable word 2 ++ } ++ if( ((pTargetPkt->word_en & BIT3) == 0) && ++ ((pCurPkt->word_en & BIT3) == 0) ) ++ { ++ match_word_en &= ~BIT3; // enable word 3 ++ } ++ ++ *pWden = match_word_en; ++ ++ if(match_word_en != 0xf) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++static BOOLEAN ++hal_EfusePartialWriteCheck( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data=0, cur_header=0; ++ u8 new_wden=0, matched_wden=0, badworden=0; ++ u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; ++ PGPKT_STRUCT curPkt; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); ++ ++ if(efuseType == EFUSE_WIFI) ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); ++ startAddr%=EFUSE_REAL_CONTENT_LEN; ++ } ++ } ++ else ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); ++ ++ while(1) ++ { ++ if(startAddr >= efuse_max_available_len) ++ { ++ bRet = _FALSE; ++ break; ++ } ++ ++ if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ cur_header = efuse_data; ++ startAddr++; ++ efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); ++ if(ALL_WORDS_DISABLED(efuse_data)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); ++ bRet = _FALSE; ++ break; ++ } ++ else ++ { ++ curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ curPkt.word_en = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ cur_header = efuse_data; ++ curPkt.offset = (cur_header>>4) & 0x0F; ++ curPkt.word_en = cur_header & 0x0F; ++ } ++ ++ curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); ++ // if same header is found but no data followed ++ // write some part of data followed by the header. ++ if( (curPkt.offset == pTargetPkt->offset) && ++ (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && ++ wordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); ++ // Here to write partial data ++ badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); ++ if(badworden != 0x0F) ++ { ++ u32 PgWriteSuccess=0; ++ // if write fail on some words, write these bad words again ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ ++ if(!PgWriteSuccess) ++ { ++ bRet = _FALSE; // write fail, return ++ break; ++ } ++ } ++ // partial write ok, update the target packet for later use ++ for(i=0; i<4; i++) ++ { ++ if((matched_wden & (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ } ++ // read from next header ++ startAddr = startAddr + (curPkt.word_cnts*2) +1; ++ } ++ else ++ { ++ // not used header, 0xff ++ *pAddr = startAddr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); ++ bRet = _TRUE; ++ break; ++ } ++ } ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_BT( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_BT; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_8723( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_WIFI; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static int ++hal_EfusePgPacketWrite_8192C(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 WriteState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE,bDataEmpty=_TRUE, bResult = _TRUE; ++ u16 efuse_addr = 0; ++ u8 efuse_data; ++ ++ u8 pg_header = 0; ++ ++ u8 tmp_word_cnts=0,target_word_cnts=0; ++ u8 tmp_header,match_word_en,tmp_word_en; ++ ++ PGPKT_STRUCT target_pkt; ++ PGPKT_STRUCT tmp_pkt; ++ ++ u8 originaldata[sizeof(u8)*8]; ++ u8 tmpindex = 0,badworden = 0x0F; ++ ++ static int repeat_times = 0; ++ u8 efuseType=EFUSE_WIFI; ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // So we have to prevent unexpected data string connection, which will cause ++ // incorrect data auto-load from HW. The total size is equal or smaller than 498bytes ++ // (i.e., offset 0~497, and dummy 1bytes) expected after CP test. ++ // 2009.02.19. ++ // ++ if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWrite_8192C(), over size\n")); ++ return _FALSE; ++ } ++ ++ // Init the 8 bytes content as 0xff ++ target_pkt.offset = offset; ++ target_pkt.word_en= word_en; ++ ++ _rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8); ++ ++ efuse_WordEnableDataRead(word_en,data,target_pkt.data); ++ target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); ++ ++ //efuse_reg_ctrl(pAdapter,_TRUE);//power on ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE Power ON\n")); ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // So we have to prevent unexpected data string connection, which will cause ++ // incorrect data auto-load from HW. Dummy 1bytes is additional. ++ // 2009.02.19. ++ // ++ while( bContinual && (efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ) ++ { ++ ++ if(WriteState==PG_STATE_HEADER) ++ { ++ bDataEmpty=_TRUE; ++ badworden = 0x0F; ++ //************ so ******************* ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER\n")); ++ if ( efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && ++ (efuse_data!=0xFF)) ++ { ++ tmp_header = efuse_data; ++ ++ tmp_pkt.offset = (tmp_header>>4) & 0x0F; ++ tmp_pkt.word_en = tmp_header & 0x0F; ++ tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); ++ ++ //************ so-1 ******************* ++ if(tmp_pkt.offset != target_pkt.offset) ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState = PG_STATE_HEADER; ++ #endif ++ } ++ else ++ { ++ //************ so-2 ******************* ++ for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++) ++ { ++ if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){ ++ bDataEmpty = _FALSE; ++ } ++ } ++ //************ so-2-1 ******************* ++ if(bDataEmpty == _FALSE) ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ #endif ++ } ++ else ++ {//************ so-2-2 ******************* ++ match_word_en = 0x0F; ++ if( !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0) )) ++ { ++ match_word_en &= (~BIT0); ++ } ++ if( !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1) )) ++ { ++ match_word_en &= (~BIT1); ++ } ++ if( !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2) )) ++ { ++ match_word_en &= (~BIT2); ++ } ++ if( !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3) )) ++ { ++ match_word_en &= (~BIT3); ++ } ++ ++ //************ so-2-2-A ******************* ++ if((match_word_en&0x0F)!=0x0F) ++ { ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest); ++ ++ //************ so-2-2-A-1 ******************* ++ //############################ ++ if(0x0F != (badworden&0x0F)) ++ { ++ u8 reorg_offset = offset; ++ u8 reorg_worden=badworden; ++ Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest); ++ } ++ //############################ ++ ++ tmp_word_en = 0x0F; ++ if( (target_pkt.word_en&BIT0)^(match_word_en&BIT0) ) ++ { ++ tmp_word_en &= (~BIT0); ++ } ++ if( (target_pkt.word_en&BIT1)^(match_word_en&BIT1) ) ++ { ++ tmp_word_en &= (~BIT1); ++ } ++ if( (target_pkt.word_en&BIT2)^(match_word_en&BIT2) ) ++ { ++ tmp_word_en &= (~BIT2); ++ } ++ if( (target_pkt.word_en&BIT3)^(match_word_en&BIT3) ) ++ { ++ tmp_word_en &=(~BIT3); ++ } ++ ++ //************ so-2-2-A-2 ******************* ++ if((tmp_word_en&0x0F)!=0x0F){ ++ //reorganize other pg packet ++ //efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= tmp_word_en; ++ //=========================== ++ }else{ ++ bContinual = _FALSE; ++ } ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ } ++ else{//************ so-2-2-B ******************* ++ //reorganize other pg packet ++ efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= target_pkt.word_en; ++ //=========================== ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ #endif ++ } ++ } ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-1\n")); ++ } ++ else //************ s1: header == oxff ******************* ++ { ++ pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en; ++ ++ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); ++ ++ if(tmp_header == pg_header) ++ { //************ s1-1******************* ++ WriteState = PG_STATE_DATA; ++ } ++ #if (EFUSE_ERROE_HANDLE == 1) ++ else if(tmp_header == 0xFF){//************ s1-3: if Write or read func doesn't work ******************* ++ //efuse_addr doesn't change ++ WriteState = PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ } ++ #endif ++ else ++ {//************ s1-2 : fixed the header procedure ******************* ++ tmp_pkt.offset = (tmp_header>>4) & 0x0F; ++ tmp_pkt.word_en= tmp_header & 0x0F; ++ tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); ++ ++ //************ s1-2-A :cover the exist data ******************* ++ //memset(originaldata,0xff,sizeof(UINT8)*8); ++ _rtw_memset((PVOID)originaldata, 0xff, sizeof(u8)*8); ++ ++ if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest)) ++ { //check if data exist ++ //efuse_reg_ctrl(pAdapter,_TRUE);//power on ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest); ++ //############################ ++ if(0x0F != (badworden&0x0F)) ++ { ++ u8 reorg_offset = tmp_pkt.offset; ++ u8 reorg_worden=badworden; ++ Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest); ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ } ++ //############################ ++ else{ ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ } ++ } ++ //************ s1-2-B: wrong address******************* ++ else ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ } ++ ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-2\n")); ++ } ++ ++ } ++ ++ } ++ //write data state ++ else if(WriteState==PG_STATE_DATA) ++ { //************ s1-1 ******************* ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_DATA\n")); ++ badworden = 0x0f; ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data, bPseudoTest); ++ if((badworden&0x0F)==0x0F) ++ { //************ s1-1-A ******************* ++ bContinual = _FALSE; ++ } ++ else ++ {//reorganize other pg packet //************ s1-1-B ******************* ++ efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr ++ ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= badworden; ++ target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); ++ //=========================== ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-3\n")); ++ } ++ } ++ } ++ ++ if(efuse_addr >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("hal_EfusePgPacketWrite_8192C(): efuse_addr(%#x) Out of size!!\n", efuse_addr)); ++ } ++ //efuse_reg_ctrl(pAdapter,_FALSE);//power off ++ ++ return _TRUE; ++} ++ ++static int ++Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfusePgPacketWrite_8192C(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723A(pAdapter)) ++ { ++ ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++rtl8192c_Efuse_PgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ return ret; ++} ++ ++VOID ++rtl8192c_EfuseParseIDCode( ++ IN PADAPTER pAdapter, ++ IN u8 *hwinfo ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u16 i,EEPROMId; ++ ++ // Checl 0x8129 again for making sure autoload status!! ++ EEPROMId = *((u16 *)&hwinfo[0]); ++ if( le16_to_cpu(EEPROMId) != RTL_EEPROM_ID) ++ { ++ DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); ++ pEEPROM->bautoload_fail_flag = _TRUE; ++ } ++ else ++ { ++ pEEPROM->bautoload_fail_flag = _FALSE; ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM ID = 0x%4x\n", EEPROMId)); ++} ++ ++void rtl8192c_read_chip_version(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter); ++} ++ ++void hal_notch_filter_8192c(_adapter *adapter, bool enable) ++{ ++ if (enable) { ++ DBG_871X("Enable notch filter\n"); ++ rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); ++ } else { ++ DBG_871X("Disable notch filter\n"); ++ rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); ++ } ++} ++ ++void hal_reset_security_engine_8192c(_adapter * adapter) ++{ ++ rtw_write8(adapter, 0x522, 0xFF); ++ rtw_write8(adapter, 0x21, 0x35); ++ rtw_usleep_os(300); ++ rtw_write8(adapter, 0x101, rtw_read8(adapter,0x101)&~0x02); ++ rtw_write8(adapter, 0x101, rtw_read8(adapter,0x101)|0x02); ++ rtw_write8(adapter, 0x21, 0x55); ++ rtw_write8(adapter, 0x522, 0x00); ++} ++ ++s32 c2h_id_filter_ccx_8192c(u8 id) ++{ ++ s32 ret = _FALSE; ++ if (id == C2H_CCX_TX_RPT) ++ ret = _TRUE; ++ ++ return ret; ++} ++ ++static s32 c2h_handler_8192c(_adapter *padapter, struct c2h_evt_hdr *c2h_evt) ++{ ++ s32 ret = _SUCCESS; ++ u8 i = 0; ++ ++ if (c2h_evt == NULL) { ++ DBG_8192C("%s c2h_evt is NULL\n",__FUNCTION__); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ switch (c2h_evt->id) { ++ case C2H_CCX_TX_RPT: ++ handle_txrpt_ccx_8192c(padapter, c2h_evt->payload); ++ break; ++ default: ++ ret = _FAIL; ++ break; ++ } ++ ++exit: ++ return ret; ++} ++ ++void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc) ++{ ++ pHalFunc->free_hal_data = &rtl8192c_free_hal_data; ++ ++ pHalFunc->dm_init = &rtl8192c_init_dm_priv; ++ pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv; ++ pHalFunc->read_chip_version = &rtl8192c_read_chip_version; ++ ++ pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; ++ pHalFunc->set_channel_handler = &PHY_SwChnl8192C; ++ ++ pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; ++ ++ pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ pHalFunc->AntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C; ++ pHalFunc->AntDivCompareHandler = &SwAntDivCompare8192C; ++#endif ++ ++ pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg; ++ pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg; ++ pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg; ++ pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg; ++ ++ //Efuse related function ++ pHalFunc->EfusePowerSwitch = &rtl8192c_EfusePowerSwitch; ++ pHalFunc->ReadEFuse = &rtl8192c_ReadEFuse; ++ pHalFunc->EFUSEGetEfuseDefinition = &rtl8192c_EFUSE_GetEfuseDefinition; ++ pHalFunc->EfuseGetCurrentSize = &rtl8192c_EfuseGetCurrentSize; ++ pHalFunc->Efuse_PgPacketRead = &rtl8192c_Efuse_PgPacketRead; ++ pHalFunc->Efuse_PgPacketWrite = &rtl8192c_Efuse_PgPacketWrite; ++ pHalFunc->Efuse_WordEnableDataWrite = &rtl8192c_Efuse_WordEnableDataWrite; ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ pHalFunc->sreset_init_value = &sreset_init_value; ++ pHalFunc->sreset_reset_value = &sreset_reset_value; ++ pHalFunc->silentreset = &sreset_reset; ++ pHalFunc->sreset_xmit_status_check = &rtl8192c_sreset_xmit_status_check; ++ pHalFunc->sreset_linked_status_check = &rtl8192c_sreset_linked_status_check; ++ pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; ++ pHalFunc->sreset_inprogress= &sreset_inprogress; ++#endif ++ ++#ifdef CONFIG_IOL ++ pHalFunc->IOL_exec_cmds_sync = &rtl8192c_IOL_exec_cmds_sync; ++#endif ++ pHalFunc->hal_notch_filter = &hal_notch_filter_8192c; ++ pHalFunc->hal_reset_security_engine = hal_reset_security_engine_8192c; ++ ++ pHalFunc->c2h_handler = c2h_handler_8192c; ++ pHalFunc->c2h_id_filter_ccx = c2h_id_filter_ccx_8192c; ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c +@@ -0,0 +1,1207 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_MP_C_ ++#ifdef CONFIG_MP_INCLUDED ++ ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++ ++ ++ ++s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ if (!netif_running(padapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ if (enable) ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ else ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ *enable = pdmpriv->TxPowerTrackControl; ++} ++ ++static void Hal_disable_dm(PADAPTER padapter) ++{ ++ u8 v8; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ //3 1. disable firmware dynamic mechanism ++ // disable Power Training, Rate Adaptive ++ v8 = rtw_read8(padapter, REG_BCN_CTRL); ++ v8 &= ~EN_BCN_FUNCTION; ++ rtw_write8(padapter, REG_BCN_CTRL, v8); ++ ++ //3 2. disable driver dynamic mechanism ++ // disable Dynamic Initial Gain ++ // disable High Power ++ // disable Power Tracking ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ // enable APK, LCK and IQK but disable power tracking ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: mpt_SwitchRfSetting ++ * ++ * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. ++ * ++ * Input: IN PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. ++ * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 ChannelToSw = pmp->channel, eRFPath = RF_PATH_A; ++ u8 ulRateIdx = pmp->rateidx; ++ u8 ulbandwidth = pmp->bandwidth; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ BOOLEAN bInteralPA = _FALSE; ++ u32 value = 0; ++ ++#ifdef CONFIG_USB_HCI ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ //92CE-VAU (92cu mCard) ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ } ++ else //92CU dongle ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else if (ChannelToSw & BIT0) // OFDM rate, odd number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ else if (ChannelToSw == 4) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); ++ } ++ else if(ChannelToSw == 10) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333); ++ } ++ else if(ChannelToSw == 12) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); ++ } ++ else ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ } ++ } ++ else //88cu ++ { ++ ++ //mcard interface ++ ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ ++ if(ChannelToSw == 6 || ChannelToSw == 8) ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); ++ } ++ else ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); ++ } ++ } ++ else ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else if (ChannelToSw & BIT0) // OFDM rate, odd number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ else ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ } ++ } ++ ++#else //PCI_INTERFACE ++ ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ //88CE ++ if(!IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if(ChannelToSw == 6 || ChannelToSw == 8) ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); ++ } ++ else ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); ++ } ++ } ++ ++#endif //CONFIG_USB_HCI ++ ++ ++} ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; ++ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; ++ u8 i; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ // get current cck swing value and check 0xa22 & 0xa23 later to match the table. ++ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); ++ ++ if (!bInCH14) ++ { ++ // Readback the current bb cck swing value and compare with the table to ++ // get the current swing index ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) ++ { ++ CCKSwingIndex = i; ++// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ //Write 0xa22 0xa23 ++ TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; ++ ++ ++ //Write 0xa24 ~ 0xa27 ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); ++ ++ //Write 0xa28 0xa29 ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; ++ } ++ else ++ { ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) ++ { ++ CCKSwingIndex = i; ++// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ //Write 0xa22 0xa23 ++ TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; ++ ++ //Write 0xa24 ~ 0xa27 ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ ++ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); ++ ++ //Write 0xa28 0xa29 ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; ++ } ++ ++ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); ++ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); ++ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); ++} ++ ++void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) ++{ ++ s32 TempCCk; ++ u8 CCK_index, CCK_index_old; ++ u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even ++ u8 TimeOut = 100; ++ s32 i = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ ++ if (!IS_92C_SERIAL(pHalData->VersionID)) ++ return; ++#if 0 ++ while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) ++ { ++ PlatformSleepUs(100); ++ TimeOut--; ++ if(TimeOut <= 0) ++ { ++ RTPRINT(FINIT, INIT_TxPower, ++ ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); ++ break; ++ } ++ } ++#endif ++ if (beven && !pMptCtx->bMptIndexEven) //odd->even ++ { ++ Action = 2; ++ pMptCtx->bMptIndexEven = _TRUE; ++ } ++ else if (!beven && pMptCtx->bMptIndexEven) //even->odd ++ { ++ Action = 1; ++ pMptCtx->bMptIndexEven = _FALSE; ++ } ++ ++ if (Action != 0) ++ { ++ //Query CCK default setting From 0xa24 ++ TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (pHalData->dmpriv.bCCKinCH14) ++ { ++ if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) ++ { ++ CCK_index_old = (u8) i; ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", ++// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); ++ break; ++ } ++ } ++ else ++ { ++ if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) ++ { ++ CCK_index_old = (u8) i; ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", ++// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); ++ break; ++ } ++ } ++ } ++ ++ if (Action == 1) ++ CCK_index = CCK_index_old - 1; ++ else ++ CCK_index = CCK_index_old + 1; ++ ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", ++// CCK_index)); ++ ++ //Adjust CCK according to gain index ++ if (!pHalData->dmpriv.bCCKinCH14) { ++ rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); ++ rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); ++ rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); ++ rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); ++ rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); ++ rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); ++ rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); ++ rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); ++ } else { ++ rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); ++ rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); ++ rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); ++ rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); ++ rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); ++ rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); ++ rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); ++ rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); ++ } ++ } ++#if 0 ++ RTPRINT(FINIT, INIT_TxPower, ++ ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); ++ ++ PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); ++#endif ++} ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++ ++/* ++ * SetChannel ++ * Description ++ * Use H2C command to change channel, ++ * not only modify rf register, but also other setting need to be done. ++ */ ++void Hal_SetChannel(PADAPTER pAdapter) ++{ ++#if 0 ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ ++// SelectChannel(pAdapter, pmp->channel); ++ set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); ++#else ++ u8 eRFPath; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ u8 rate = pmp->rateidx; ++ ++ ++ // set RF channel register ++ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) ++ { ++ if(IS_HARDWARE_TYPE_8192D(pAdapter)) ++ _write_rfreg(pAdapter, (RF_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel); ++ else ++ _write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel); ++ } ++ Hal_mpt_SwitchRfSetting(pAdapter); ++ ++ SelectChannel(pAdapter, channel); ++ ++ if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) { ++ pHalData->dmpriv.bCCKinCH14 = _TRUE; ++ Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); ++ } ++ else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) { ++ pHalData->dmpriv.bCCKinCH14 = _FALSE; ++ Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); ++ } ++ ++#endif ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void Hal_SetBandwidth(PADAPTER pAdapter) ++{ ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ ++ ++ SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); ++ Hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ u32 tmpval = 0; ++ ++ ++ // rf-A cck tx power ++ write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); ++ tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; ++ write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); ++ ++ // rf-B cck tx power ++ write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); ++ tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; ++ write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", ++ TxPower[RF_PATH_A], TxPower[RF_PATH_B])); ++} ++ ++void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ u32 TxAGC = 0; ++ u8 tmpval = 0; ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ // HT Tx-rf(A) ++ tmpval = TxPower[RF_PATH_A]; ++ TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; ++ ++ write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ ++ // HT Tx-rf(B) ++ tmpval = TxPower[RF_PATH_B]; ++ TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; ++ ++ write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n", ++ TxPower[RF_PATH_A], TxPower[RF_PATH_B])); ++} ++ ++void Hal_SetAntennaPathPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 TxPowerLevel[MAX_RF_PATH_NUMS]; ++ u8 rfPath; ++ ++ TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; ++ TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ switch (pHalData->rf_chip) ++ { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ Hal_SetCCKTxPower(pAdapter, TxPowerLevel); ++ if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); ++ Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++void Hal_SetTxPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 TxPower = pAdapter->mppriv.txpoweridx; ++ u8 TxPowerLevel[MAX_RF_PATH_NUMS]; ++ u8 rf, rfPath; ++ ++ for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) { ++ TxPowerLevel[rf] = TxPower; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ switch (pHalData->rf_chip) ++ { ++ // 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! ++ // We should call normal driver API later!! ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ Hal_SetCCKTxPower(pAdapter, TxPowerLevel); ++ if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); ++ Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); ++ break; ++ ++ default: ++ break; ++ } ++ ++// SetCCKTxPower(pAdapter, TxPower); ++// SetOFDMTxPower(pAdapter, TxPower); ++} ++ ++void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) ++{ ++ u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; ++ ++ TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); ++ TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); ++ TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); ++ ++ tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); ++ write_bbreg(pAdapter, rFPGA0_TxGainStage, ++ (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); ++} ++ ++void Hal_SetDataRate(PADAPTER pAdapter) ++{ ++ Hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++/*------------------------------Define structure----------------------------*/ ++typedef struct _R_ANTENNA_SELECT_OFDM { ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK { ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++#endif ++ ++void Hal_SetAntenna(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ ++ u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; ++ u8 chgTx = 0, chgRx = 0; ++ u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ++ ++ ++ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; ++ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; ++ ++ p_ofdm_tx->r_ant_ht1 = 0x1; ++ p_ofdm_tx->r_ant_ht2 = 0x2; // Second TX RF path is A ++ p_ofdm_tx->r_ant_non_ht = 0x3; // 0x1+0x2=0x3 ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ p_ofdm_tx->r_tx_antenna = 0x1; ++ r_ofdm_tx_en_val = 0x1; ++ p_ofdm_tx->r_ant_l = 0x1; ++ p_ofdm_tx->r_ant_ht_s1 = 0x1; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; ++ p_cck_txrx->r_ccktx_enable = 0x8; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF A=TX and B as standby ++// if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); ++ r_ofdm_tx_en_val = 0x3; ++ ++ // Power save ++ //cosa r_ant_select_ofdm_val = 0x11111111; ++ ++ // We need to close RFB by SW control ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); ++ } ++ } ++ break; ++ ++ case ANTENNA_B: ++ p_ofdm_tx->r_tx_antenna = 0x2; ++ r_ofdm_tx_en_val = 0x2; ++ p_ofdm_tx->r_ant_l = 0x2; ++ p_ofdm_tx->r_ant_ht_s1 = 0x2; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; ++ p_cck_txrx->r_ccktx_enable = 0x4; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF A as standby ++ //if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++// r_ofdm_tx_en_val = 0x3; ++ ++ // Power save ++ //cosa r_ant_select_ofdm_val = 0x22222222; ++ ++ // 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. ++ // 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control ++ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ break; ++ ++ case ANTENNA_AB: // For 8192S ++ p_ofdm_tx->r_tx_antenna = 0x3; ++ r_ofdm_tx_en_val = 0x3; ++ p_ofdm_tx->r_ant_l = 0x3; ++ p_ofdm_tx->r_ant_ht_s1 = 0x3; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; ++ p_cck_txrx->r_ccktx_enable = 0xC; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF B as standby ++ //if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ ++ // Disable Power save ++ //cosa r_ant_select_ofdm_val = 0x3321333; ++#if 0 ++ // 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table. ++ if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07. ++ { ++ mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF_PATH_A); ++ } ++#endif ++ // 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ // ++ // r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D ++ // r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D ++ // r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D ++ // ++ switch (pAdapter->mppriv.antenna_rx) ++ { ++ case ANTENNA_A: ++ r_rx_antenna_ofdm = 0x1; // A ++ p_cck_txrx->r_cckrx_enable = 0x0; // default: A ++ p_cck_txrx->r_cckrx_enable_2 = 0x0; // option: A ++ chgRx = 1; ++ break; ++ ++ case ANTENNA_B: ++ r_rx_antenna_ofdm = 0x2; // B ++ p_cck_txrx->r_cckrx_enable = 0x1; // default: B ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; // option: B ++ chgRx = 1; ++ break; ++ ++ case ANTENNA_AB: ++ r_rx_antenna_ofdm = 0x3; // AB ++ p_cck_txrx->r_cckrx_enable = 0x0; // default:A ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; // option:B ++ chgRx = 1; ++ break; ++ ++ default: ++ break; ++ } ++ ++ if (chgTx && chgRx) ++ { ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ //r_ant_sel_cck_val = r_ant_select_cck_val; ++ PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); //OFDM Tx ++ PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); //OFDM Tx ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val); //CCK TxRx ++ ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++ ++s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ target_ther &= 0xff; ++ if (target_ther < 0x07) ++ target_ther = 0x07; ++ else if (target_ther > 0x1d) ++ target_ther = 0x1d; ++ ++ pHalData->EEPROMThermalMeter = target_ther; ++ ++ return _SUCCESS; ++} ++ ++void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ ++ write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60); // 0x24: RF Reg[6:5] ++ ++// RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); ++} ++ ++u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) ++{ ++ u32 ThermalValue = 0; ++ ++ ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F); // 0x24: RF Reg[4:0] ++// RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); ++ return (u8)ThermalValue; ++} ++ ++void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++#if 0 ++ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); ++ rtw_msleep_os(1000); ++ fw_cmd_data(pAdapter, value, 1); ++ *value &= 0xFF; ++#else ++ ++ Hal_TriggerRFThermalMeter(pAdapter); ++ rtw_msleep_os(1000); ++ *value = Hal_ReadRFThermalMeter(pAdapter); ++#endif ++} ++ ++void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; ++ if (bStart)// Start Single Carrier. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); ++ // 1. if OFDM block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on ++ ++ { ++ // 2. set CCK test mode off, set to CCK normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); ++ // 3. turn on scramble setting ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); ++ } ++ // 4. Turn On Single Carrier Tx and turn off the other test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++#ifdef CONFIG_RTL8192C ++ // 5. Disable TX power saving at STF & LLTF ++ write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1); ++#endif ++ } ++ else// Stop Single Carrier. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); ++ ++ // Turn off all test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++#ifdef CONFIG_RTL8192C ++ // Cancel disable TX power saving at STF&LLTF ++ write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0); ++#endif ++ //Delay 10 ms //delay_ms(10); ++ rtw_msleep_os(10); ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++} ++ ++ ++void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ u8 rfPath; ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ pAdapter->mppriv.MptCtx.bSingleTone = bStart; ++ if (bStart)// Start Single Tone. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n")); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); ++ ++ if (is92C) ++ { ++ _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01); ++ rtw_usleep_os(100); ++ if (rfPath == RF_PATH_A) ++ write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on. ++ else if (rfPath == RF_PATH_B) ++ write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on. ++ } else { ++ write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); ++ rtw_usleep_os(100); ++ } ++ ++ write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. ++ rtw_usleep_os(100); ++ } ++ else// Stop Single Tone. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++ ++ if (is92C) { ++ _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); ++ rtw_usleep_os(100); ++ write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. ++ write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. ++ rtw_usleep_os(100); ++ } else { ++ write_rfreg(pAdapter, rfPath, 0x21, 0x54000); ++ rtw_usleep_os(100); ++ ++ write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. ++ rtw_usleep_os(100); ++ } ++ } ++ ++} ++ ++ ++void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; ++ if (bStart) // Start Carrier Suppression. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); ++ //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) ++ { ++ // 1. if CCK block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on ++ ++ //Turn Off All Test Mode ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting ++ ++ //Set CCK Tx Test Rate ++ //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps ++ } ++ } ++ else// Stop Carrier Suppression. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); ++ //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ } ++ //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); ++} ++ ++void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u32 cckrate; ++ ++ if (bStart) ++ { ++ RT_TRACE(_module_mp_, _drv_alert_, ++ ("SetCCKContinuousTx: test start\n")); ++ ++ // 1. if CCK block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on ++ ++ //Turn Off All Test Mode ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ //Set CCK Tx Test Rate ++ #if 0 ++ switch(pAdapter->mppriv.rateidx) ++ { ++ case 2: ++ cckrate = 0; ++ break; ++ case 4: ++ cckrate = 1; ++ break; ++ case 11: ++ cckrate = 2; ++ break; ++ case 22: ++ cckrate = 3; ++ break; ++ default: ++ cckrate = 0; ++ break; ++ } ++ #else ++ cckrate = pAdapter->mppriv.rateidx; ++ #endif ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting ++ ++#ifdef CONFIG_RTL8192C ++ // Patch for CCK 11M waveform ++ if (cckrate == MPT_RATE_1M) ++ write_bbreg(pAdapter, 0xA71, BIT(6), bDisable); ++ else ++ write_bbreg(pAdapter, 0xA71, BIT(6), bEnable); ++#endif ++ ++ } ++ else { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetCCKContinuousTx: test stop\n")); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = bStart; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; ++}/* mpt_StartCckContTx */ ++ ++void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); ++ // 1. if OFDM block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on ++ { ++ ++ // 2. set CCK test mode off, set to CCK normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); ++ ++ // 3. turn on scramble setting ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); ++ } ++ // 4. Turn On Continue Tx and turn off the other test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ } else { ++ RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ //Delay 10 ms ++ rtw_msleep_os(10); ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; ++}/* mpt_StartOfdmContTx */ ++ ++void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++#if 0 ++ // ADC turn off [bit24-21] adc port0 ~ port1 ++ if (bStart) { ++ write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); ++ rtw_usleep_os(100); ++ } ++#endif ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); ++ ++ pAdapter->mppriv.MptCtx.bStartContTx = bStart; ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) ++ { ++ Hal_SetCCKContinuousTx(pAdapter, bStart); ++ } ++ else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && ++ (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) ++ { ++ Hal_SetOFDMContinuousTx(pAdapter, bStart); ++ } ++#if 0 ++ // ADC turn on [bit24-21] adc port0 ~ port1 ++ if (!bStart) { ++ write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); ++ } ++#endif ++} ++ ++#endif // CONFIG_MP_INCLUDE +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c +@@ -0,0 +1,4841 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ ++ Module: rtl8192c_phycfg.c ++ ++ Note: Merge 92SE/SU PHY config as below ++ 1. BB register R/W API ++ 2. RF register R/W API ++ 3. Initial BB/RF/MAC config by reading BB/MAC/RF txt. ++ 3. Power setting API ++ 4. Channel switch API ++ 5. Initial gain switch API. ++ 6. Other BB/MAC/RF API. ++ ++ Function: PHY: Extern function, phy: local function ++ ++ Export: PHY_FunctionName ++ ++ Abbrev: NONE ++ ++ History: ++ Data Who Remark ++ 08/08/2008 MHC 1. Port from 9x series phycfg.c ++ 2. Reorganize code arch and ad description. ++ 3. Collect similar function. ++ 4. Seperate extern/local API. ++ 08/12/2008 MHC We must merge or move USB PHY relative function later. ++ 10/07/2008 MHC Add IQ calibration for PHY.(Only 1T2R mode now!!!) ++ 11/06/2008 MHC Add TX Power index PG file to config in 0xExx register ++ area to map with EEPROM/EFUSE tx pwr index. ++ ++******************************************************************************/ ++#define _HAL_8192C_PHYCFG_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_IOL ++#include ++#endif ++ ++#include ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/* Channel switch:The size of command tables for switch channel*/ ++#define MAX_PRECMD_CNT 16 ++#define MAX_RFDEPENDCMD_CNT 16 ++#define MAX_POSTCMD_CNT 16 ++ ++#define MAX_DOZE_WAITING_TIMES_9x 64 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*--------------------Define export function prototype-----------------------*/ ++// Please refer to header file ++/*--------------------Define export function prototype-----------------------*/ ++ ++/*----------------------------Function Body----------------------------------*/ ++// ++// 1. BB register R/W API ++// ++ ++/** ++* Function: phy_CalculateBitShift ++* ++* OverView: Get shifted position of the BitMask ++* ++* Input: ++* u4Byte BitMask, ++* ++* Output: none ++* Return: u4Byte Return the shift bit bit position of the mask ++*/ ++static u32 ++phy_CalculateBitShift( ++ u32 BitMask ++ ) ++{ ++ u32 i; ++ ++ for(i=0; i<=31; i++) ++ { ++ if ( ((BitMask>>i) & 0x1 ) == 1) ++ break; ++ } ++ ++ return (i); ++} ++ ++ ++/** ++* Function: PHY_QueryBBReg ++* ++* OverView: Read "sepcific bits" from BB register ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be readback ++* u4Byte BitMask //The target bit position in the target address ++* //to be readback ++* Output: None ++* Return: u4Byte Data //The readback register value ++* Note: This function is equal to "GetRegSetting" in PHY programming guide ++*/ ++u32 ++rtl8192c_PHY_QueryBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 ReturnValue = 0, OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); ++ ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ ReturnValue = (OriginalValue & BitMask) >> BitShift; ++ ++ //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); ++ ++ return (ReturnValue); ++ ++} ++ ++ ++/** ++* Function: PHY_SetBBReg ++* ++* OverView: Write "Specific bits" to BB register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register value in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRegSetting" in PHY programming guide ++*/ ++ ++VOID ++rtl8192c_PHY_SetBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u16 BBWaitCounter = 0; ++ u32 OriginalValue, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++ if(BitMask!= bMaskDWord){//if not "double word" write ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); ++ } ++ ++ rtw_write32(Adapter, RegAddr, Data); ++ ++ //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++} ++ ++ ++// ++// 2. RF register R/W API ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialRead() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static u32 ++phy_FwRFSerialRead( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset ) ++{ ++ u32 retValue = 0; ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++ return (retValue); ++ ++} /* phy_FwRFSerialRead */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialWrite() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++phy_FwRFSerialWrite( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data ) ++{ ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++} ++ ++ ++/** ++* Function: phy_RFSerialRead ++* ++* OverView: Read regster from RF chips ++* ++* Input: ++* PADAPTER Adapter, ++* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* ++* Output: None ++* Return: u4Byte reback value ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++*/ ++static u32 ++phy_RFSerialRead( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset ++ ) ++{ ++ u32 retValue = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ u32 tmplong,tmplong2; ++ u8 RfPiEnable=0; ++#if 0 ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return retValue; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return retValue; ++#endif ++ // ++ // Make sure RF register offset is correct ++ // ++ Offset &= 0x3f; ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); ++ // return 0xFFFFFFFF; ++ //} ++ ++ // For 92S LSSI Read RFLSSIRead ++ // For RF A/B write 0x824/82c(does not work in the future) ++ // We must use 0x824 for RF A and B to execute read trigger ++ tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); ++ if(eRFPath == RF_PATH_A) ++ tmplong2 = tmplong; ++ else ++ tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); ++ ++ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF ++ ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); ++ rtw_udelay_os(10);// PlatformStallExecution(10); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); ++ rtw_udelay_os(100);//PlatformStallExecution(100); ++ ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); ++ rtw_udelay_os(10);//PlatformStallExecution(10); ++ ++ if(eRFPath == RF_PATH_A) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); ++ else if(eRFPath == RF_PATH_B) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); ++ ++ if(RfPiEnable) ++ { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); ++ } ++ else ++ { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); ++ } ++ //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); ++ ++ return retValue; ++ ++} ++ ++ ++ ++/** ++* Function: phy_RFSerialWrite ++* ++* OverView: Write data to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* u4Byte Data //The new register Data in the target bit position ++* //of the target to be read ++* ++* Output: None ++* Return: None ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++ * ++ * Note: For RF8256 only ++ * The total count of RTL8256(Zebra4) register is around 36 bit it only employs ++ * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) ++ * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration ++ * programming guide" for more details. ++ * Thus, we define a sub-finction for RTL8526 register address conversion ++ * =========================================================== ++ * Register Mode RegCTL[1] RegCTL[0] Note ++ * (Reg00[12]) (Reg00[10]) ++ * =========================================================== ++ * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * ++ * 2008/09/02 MH Add 92S RF definition ++ * ++ * ++ * ++*/ ++static VOID ++phy_RFSerialWrite( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data ++ ) ++{ ++ u32 DataAndAddr = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ ++#if 0 ++ // We should check valid regs for RF_6052 case. ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return; ++#endif ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); ++ // return; ++ //} ++ ++ Offset &= 0x3f; ++ ++ // ++ // Shadow Update ++ // ++ //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // ++ // Put write addr in [5:0] and write data in [31:16] ++ // ++ //DataAndAddr = (Data<<16) | (NewOffset&0x3f); ++ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF ++ ++ // ++ // Write Operation ++ // ++ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); ++ //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); ++ ++} ++ ++ ++/** ++* Function: PHY_QueryRFReg ++* ++* OverView: Query "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be read ++* u4Byte BitMask //The target bit position in the target address ++* //to be read ++* ++* Output: None ++* Return: u4Byte Readback value ++* Note: This function is equal to "GetRFRegSetting" in PHY programming guide ++*/ ++u32 ++rtl8192c_PHY_QueryRFReg( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 Original_Value, Readback_Value, BitShift; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u8 RFWaitCounter = 0; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ ++ BitShift = phy_CalculateBitShift(BitMask); ++ Readback_Value = (Original_Value & BitMask) >> BitShift; ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", ++ // RegAddr, eRFPath, Original_Value)); ++ ++ return (Readback_Value); ++} ++ ++/** ++* Function: PHY_SetRFReg ++* ++* OverView: Write "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register Data in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRFRegSetting" in PHY programming guide ++*/ ++VOID ++rtl8192c_PHY_SetRFReg( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u1Byte RFWaitCounter = 0; ++ u32 Original_Value, BitShift; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ // RF data is 12 bits only ++ if (BitMask != bRFRegOffsetMask) ++ { ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); ++ } ++ ++ phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); ++ ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++} ++ ++ ++// ++// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigMACWithParaFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: The format of MACPHY_REG.txt is different from PHY and RF. ++ * [Register][Mask][Value] ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigMACWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigMACWithHeaderFile() ++ * ++ * Overview: This function read BB parameters from Header file we gen, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: The format of MACPHY_REG.txt is different from PHY and RF. ++ * [Register][Mask][Value] ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigMACWithHeaderFile( ++ IN PADAPTER Adapter ++) ++{ ++ u32 i = 0; ++ u32 ArrayLength = 0; ++ u32* ptrArray; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //2008.11.06 Modified by tynli. ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); ++ ArrayLength = MAC_2T_ArrayLength; ++ ptrArray = Rtl819XMAC_Array; ++ ++#ifdef CONFIG_IOL_MAC ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) ++ return _FAIL; ++ ++ for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column ++ rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); ++ } ++ ++ return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++#endif ++ { ++ for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column ++ rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); ++ } ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_MACConfig8192C ++ * ++ * Overview: Condig MAC by header file or parameter file. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++int ++PHY_MACConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 *pszMACRegFile; ++ s8 sz88CMACRegFile[] = RTL8188C_PHY_MACREG; ++ s8 sz92CMACRegFile[] = RTL8192C_PHY_MACREG; ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ if(is92C) ++ pszMACRegFile = sz92CMACRegFile; ++ else ++ pszMACRegFile = sz88CMACRegFile; ++ ++ // ++ // Config MAC ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigMACWithHeaderFile(Adapter); ++#else ++ ++ // Not make sure EEPROM, add later ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); ++ rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ //this switching setting cause some 8192cu hw have redownload fw fail issue ++ //improve 2-stream TX EVM by Jenyu ++ if(is92C) ++ rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71); ++#endif ++ ++ ++ // 2010.07.13 AMPDU aggregation number 9 ++ //rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); ++ rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18. ++#ifdef CONFIG_USB_HCI ++ if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) ++ rtw_write8(Adapter, 0x40,0x04); ++#endif ++ ++ return rtStatus; ++ ++} ++ ++ ++/** ++* Function: phy_InitBBRFRegisterDefinition ++* ++* OverView: Initialize Register definition offset for Radio Path A/B/C/D ++* ++* Input: ++* PADAPTER Adapter, ++* ++* Output: None ++* Return: None ++* Note: The initialization value is constant and it should never be changes ++*/ ++static VOID ++phy_InitBBRFRegisterDefinition( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // RF Interface Sowrtware Control ++ pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 ++ pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) ++ pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 ++ pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) ++ ++ // RF Interface Readback Value ++ pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 ++ pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) ++ pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 ++ pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) ++ ++ // RF Interface Output (and Enable) ++ pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 ++ pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 ++ ++ // RF Interface (Output and) Enable ++ pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) ++ pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) ++ ++ //Addr of LSSI. Wirte RF register by driver ++ pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter ++ pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; ++ ++ // RF parameter ++ pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select ++ pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; ++ pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; ++ pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; ++ ++ // Tx AGC Gain Stage (same for all path. Should we remove this?) ++ pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ ++ // Tranceiver A~D HSSI Parameter-1 ++ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 ++ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 ++ ++ // Tranceiver A~D HSSI Parameter-2 ++ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 ++ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 ++ ++ // RF switch Control ++ pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control ++ pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; ++ pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; ++ pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; ++ ++ // AGC control 1 ++ pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; ++ pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; ++ pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; ++ pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; ++ ++ // AGC control 2 ++ pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; ++ pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; ++ pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; ++ pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; ++ ++ // RX AFE control 1 ++ pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; ++ ++ // RX AFE control 1 ++ pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE; ++ pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; ++ pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; ++ pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; ++ ++ // Tx AFE control 1 ++ pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; ++ pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; ++ ++ // Tx AFE control 2 ++ pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE; ++ pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; ++ pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; ++ pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; ++ ++ // Tranceiver LSSI Readback SI mode ++ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; ++ pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; ++ ++ // Tranceiver LSSI Readback PI mode ++ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; ++ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; ++ //pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; ++ //pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithParaFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * 2008/11/06 MH For 92S we do not support silent reset now. Disable ++ * parameter file compare!!!!!!?? ++ * ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ return rtStatus; ++} ++ ++ ++ ++//**************************************** ++// The following is for High Power PA ++//**************************************** ++VOID ++phy_ConfigBBExternalPA( ++ IN PADAPTER Adapter ++) ++{ ++#ifdef CONFIG_USB_HCI ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 i=0; ++ u32 temp=0; ++ ++ if(!pHalData->ExternalPA) ++ { ++ return; ++ } ++ ++ // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the ++ // same code as SU. It is already updated in PHY_REG_1T_HP.txt. ++#if 0 ++ PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); ++ temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); ++ temp |= (BIT26|BIT21|BIT10|BIT5); ++ PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); ++ PHY_SetBBReg(Adapter, 0x870, BIT10, 0); ++ PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); ++ PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); ++#endif ++ ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithHeaderFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * u1Byte ConfigType 0 => PHY_CONFIG ++ * 1 =>AGC_TAB ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithHeaderFile( ++ IN PADAPTER Adapter, ++ IN u8 ConfigType ++) ++{ ++ int i; ++ u32* Rtl819XPHY_REGArray_Table; ++ u32* Rtl819XAGCTAB_Array_Table; ++ u16 PHY_REGArrayLen, AGCTAB_ArrayLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int ret = _SUCCESS; ++ ++ // ++ // 2009.11.24. Modified by tynli. ++ // ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ AGCTAB_ArrayLen = AGCTAB_2TArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray; ++ PHY_REGArrayLen = PHY_REG_2TArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray; ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray; ++ } ++#endif ++ } ++ else ++ { ++ AGCTAB_ArrayLen = AGCTAB_1TArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray; ++ PHY_REGArrayLen = PHY_REG_1TArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray; ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray; ++ } ++ else if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray; ++ PHY_REGArrayLen = PHY_REG_1T_HPArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray; ++ } ++#endif ++ } ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ #ifdef CONFIG_IOL_BB_PHY_REG ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ u32 tmp_value; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0])); ++ } ++ if(RegAddr == rTxAGC_A_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1])); ++ } ++ if(RegAddr == rTxAGC_A_CCK1_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6])); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5])); ++ } ++ if(RegAddr == rTxAGC_B_Rate18_06) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8])); ++ } ++ if(RegAddr == rTxAGC_B_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9])); ++ } ++ if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14])); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13])); ++ pHalData->pwrGroupCnt++; ++ } ++} ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithPgParaFile ++ * ++ * Overview: ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/06/2008 MHC Create Version 0. ++ * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithPgParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ ++ return rtStatus; ++ ++} /* phy_ConfigBBWithPgParaFile */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithPgHeaderFile ++ * ++ * Overview: Config PHY_REG_PG array ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! ++ * 11/10/2008 tynli Modify to mew files. ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithPgHeaderFile( ++ IN PADAPTER Adapter, ++ IN u8 ConfigType) ++{ ++ int i; ++ u32* Rtl819XPHY_REGArray_Table_PG; ++ u16 PHY_REGArrayPGLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Default: pHalData->RF_Type = RF_2T2R. ++ PHY_REGArrayPGLen = PHY_REG_Array_PGLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG; ++ ++#ifdef CONFIG_USB_HCI ++// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt ++/* ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard; ++ } ++ else */if(pHalData->BoardType ==BOARD_USB_High_PA ) ++ { ++ PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP; ++ } ++#endif ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ for(i=0;iBufOfLines), ++ MAX_LINES_HWCONFIG_TXT, ++ MAX_BYTES_LINE_HWCONFIG_TXT, ++ &nLinesRead ++ ); ++ if(rtStatus == RT_STATUS_SUCCESS) ++ { ++ PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesRead6 = nLinesRead; ++ } ++ else ++ { ++ // Temporarily skip PHY_REG_MP.txt if file does not exist. ++ pHalData->nLinesRead6 = 0; ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n")); ++ return RT_STATUS_SUCCESS; ++ } ++ } ++ else ++ { ++ PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ nLinesRead = pHalData->nLinesRead6; ++ rtStatus = RT_STATUS_SUCCESS; ++ } ++ ++ ++ if(rtStatus == RT_STATUS_SUCCESS) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName)); ++ ++ for(ithLine = 0; ithLine < nLinesRead; ithLine++) ++ { ++ szLine = pHalData->BufOfLines[ithLine]; ++ ++ if(!IsCommentString(szLine)) ++ { ++ // Get 1st hex value as register offset. ++ if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) ++ { ++ if(u4bRegOffset == 0xff) ++ { // Ending. ++ break; ++ } ++ else if (u4bRegOffset == 0xfe) ++ delay_ms(50); ++ else if (u4bRegOffset == 0xfd) ++ delay_ms(5); ++ else if (u4bRegOffset == 0xfc) ++ delay_ms(1); ++ else if (u4bRegOffset == 0xfb) ++ PlatformStallExecution(50); ++ else if (u4bRegOffset == 0xfa) ++ PlatformStallExecution(5); ++ else if (u4bRegOffset == 0xf9) ++ PlatformStallExecution(1); ++ ++ // Get 2nd hex value as register value. ++ szLine += u4bMove; ++ if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) ++ { ++ RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue)); ++ PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); ++ ++ // Add 1us delay between BB/RF register setting. ++ PlatformStallExecution(1); ++ } ++ } ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName)); ++ } ++#endif ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithMpHeaderFile ++ * ++ * Overview: Config PHY_REG_MP array ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 02/04/2010 chiyokolin Modify to new files. ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithMpHeaderFile( ++ IN PADAPTER Adapter, ++ IN u1Byte ConfigType) ++{ ++ int i; ++ u32* Rtl8192CPHY_REGArray_Table_MP; ++ u16 PHY_REGArrayMPLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PHY_REGArrayMPLen = PHY_REG_Array_MPLength; ++ Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP; ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ for(i=0;iphy_BB8192S_Config_ParaFile\n")); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID)){ ++ pszBBRegFile=(u8*)&sz92CBBRegFile ; ++ pszAGCTableFile =(u8*)&sz92CAGCTableFile; ++ } ++ else{ ++ pszBBRegFile=(u8*)&sz88CBBRegFile ; ++ pszAGCTableFile =(u8*)&sz88CAGCTableFile; ++ } ++ ++ // ++ // 1. Read PHY_REG.TXT BB INIT!! ++ // We will seperate as 88C / 92C according to chip version ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different ++ // type of parameter files to phy_reg.txt at first. ++ rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++#if MP_DRIVER == 1 ++ // ++ // 1.1 Read PHY_REG_MP.TXT BB INIT!! ++ // We will seperate as 88C / 92C according to chip version ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different ++ // type of parameter files to phy_reg.txt at first. ++ rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++#endif // #if (MP_DRIVER == 1) ++ ++ // ++ // 20100318 Joseph: Config 2T2R to 1T2R if necessary. ++ // ++ if(pHalData->rf_type == RF_1T2R) ++ { ++ phy_BB8192C_Config_1T(Adapter); ++ DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n"); ++ } ++ ++ // ++ // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt ++ // ++ if (pEEPROM->bautoload_fail_flag == _FALSE) ++ { ++ pHalData->pwrGroupCnt = 0; ++ ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile); ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++ // ++ // 3. BB AGC table Initialization ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB); ++#else ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); ++ rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++ // Check if the CCK HighPower is turned ON. ++ // This is used to calculate PWDB. ++ pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200)); ++ ++phy_BB8190_Config_ParaFile_Fail: ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_BBConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 RegVal; ++ u8 TmpU1B=0; ++ u8 value8; ++ ++ phy_InitBBRFRegisterDefinition(Adapter); ++ ++ if(IS_HARDWARE_TYPE_8723A(Adapter)) ++ { ++ // Suggested by Scott. tynli_test. 2010.12.30. ++ //1. 0x28[1] = 1 ++ TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); ++ rtw_udelay_os(2); ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1)); ++ rtw_udelay_os(2); ++ ++ //2. 0x29[7:0] = 0xFF ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff); ++ rtw_udelay_os(2); ++ ++ //3. 0x02[1:0] = 2b'11 ++ TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB)); ++ ++ //undo clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31)); ++ ++ //4. 0x25[6] = 0 ++ TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1); ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6))); ++ ++ //5. 0x24[20] = 0 //Advised by SD3 Alex Wang. 2011.02.09. ++ TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4))); ++ ++ //6. 0x1f[7:0] = 0x07 ++ rtw_write8(Adapter, REG_RF_CTRL, 0x07); ++ } ++ else ++ { ++ // Enable BB and RF ++ RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); ++ ++ // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); ++ ++ rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); ++ ++#ifdef CONFIG_USB_HCI ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); ++#else ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); ++#endif ++ ++ //undo clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31)); ++ ++ // 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. ++#ifdef CONFIG_USB_HCI ++ //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. ++ rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); ++ rtw_write8(Adapter, 0x15, 0xe9); ++#endif ++ ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); ++ ++#ifdef CONFIG_PCI_HCI ++ // Force use left antenna by default for 88C. ++ // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) ++ if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) ++ { ++ RegVal = rtw_read32(Adapter, REG_LEDCFG0); ++ rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); ++ } ++#endif ++ } ++ ++ // ++ // Config BB and AGC ++ // ++ rtStatus = phy_BB8192C_Config_ParaFile(Adapter); ++#if 0 ++ switch(Adapter->MgntInfo.bRegHwParaFile) ++ { ++ case 0: ++ phy_BB8190_Config_HardCode(Adapter); ++ break; ++ ++ case 1: ++ rtStatus = phy_BB8192C_Config_ParaFile(Adapter); ++ break; ++ ++ case 2: ++ // Partial Modify. ++ phy_BB8190_Config_HardCode(Adapter); ++ phy_BB8192C_Config_ParaFile(Adapter); ++ break; ++ ++ default: ++ phy_BB8190_Config_HardCode(Adapter); ++ break; ++ } ++#endif ++#ifdef CONFIG_USB_HCI ++ if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) ++ &&(pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write8(Adapter, 0xc72, 0x50); ++#endif ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_RFConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // RF config ++ // ++ rtStatus = PHY_RF6052_Config8192C(Adapter); ++#if 0 ++ switch(pHalData->rf_chip) ++ { ++ case RF_6052: ++ rtStatus = PHY_RF6052_Config(Adapter); ++ break; ++ case RF_8225: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ case RF_8256: ++ rtStatus = PHY_RF8256_Config(Adapter); ++ break; ++ case RF_8258: ++ break; ++ case RF_PSEUDO_11N: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch ++ break; ++ } ++#endif ++ return rtStatus; ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_ConfigRFWithParaFile() ++ * ++ * Overview: This function read RF parameters from general file format, and do RF 3-wire ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * RF_RADIO_PATH_E eRFPath ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: Delay may be required for RF configuration ++ *---------------------------------------------------------------------------*/ ++int ++rtl8192c_PHY_ConfigRFWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF_RADIO_PATH_E eRFPath ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ ++ return rtStatus; ++ ++} ++ ++//**************************************** ++// The following is for High Power PA ++//**************************************** ++#define HighPowerRadioAArrayLen 22 ++//This is for High power PA ++u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { ++0x013,0x00029ea4, ++0x013,0x00025e74, ++0x013,0x00020ea4, ++0x013,0x0001ced0, ++0x013,0x00019f40, ++0x013,0x00014e70, ++0x013,0x000106a0, ++0x013,0x0000c670, ++0x013,0x000082a0, ++0x013,0x00004270, ++0x013,0x00000240, ++}; ++ ++int ++PHY_ConfigRFExternalPA( ++ IN PADAPTER Adapter, ++ RF_RADIO_PATH_E eRFPath ++) ++{ ++ int rtStatus = _SUCCESS; ++#ifdef CONFIG_USB_HCI ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 i=0; ++ ++ if(!pHalData->ExternalPA) ++ { ++ return rtStatus; ++ } ++ ++ // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the ++ // same code as SU. It is already updated in radio_a_1T_HP.txt. ++#if 0 ++ //add for SU High Power PA ++ for(i = 0;iVersionID)) ++ { ++ RadioA_ArrayLen = RadioA_2TArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray; ++ RadioB_ArrayLen = RadioB_2TArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray; ++ } ++ else ++ { ++ RadioA_ArrayLen = RadioA_1TArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray; ++ RadioB_ArrayLen = RadioB_1TArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray; ++#ifdef CONFIG_USB_HCI ++ if( BOARD_MINICARD == pHalData->BoardType ) ++ { ++ RadioA_ArrayLen = RadioA_1T_mCardArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray; ++ RadioB_ArrayLen = RadioB_1T_mCardArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray; ++ } ++ else if( BOARD_USB_High_PA == pHalData->BoardType ) ++ { ++ RadioA_ArrayLen = RadioA_1T_HPArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray; ++ } ++#endif ++ } ++ ++ switch(eRFPath){ ++ case RF_PATH_A: ++ #ifdef CONFIG_IOL_RF_RF90_PATH_A ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { ++ rtStatus = _FAIL; ++ goto exit; ++ } ++ ++ for(i = 0;iPHYRegDef[eRFPath]; ++ u32 NewOffset = 0; ++ u32 DataAndAddr = 0; ++ ++ NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; ++ DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF ++ rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); ++ } ++ } ++ rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++ #endif ++ { ++ for(i = 0;iPHYRegDef[eRFPath]; ++ u32 NewOffset = 0; ++ u32 DataAndAddr = 0; ++ ++ NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; ++ DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF ++ rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); ++ } ++ } ++ rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++ #endif ++ { ++ for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() ++ // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK ++ // to run at Dispatch level to achive it. ++ //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); ++ WriteData[i] &= 0xfff; ++ PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); ++ // TODO: we should not delay for such a long time. Ask SD3 ++ rtw_mdelay_os(10); ++ ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); ++ rtw_mdelay_os(10); ++ //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); ++ break; ++ ++ default: ++ rtStatus = _FAIL; ++ break; ++ } ++ ++ ++ // ++ // Check whether readback data is correct ++ // ++ if(ulRegRead != WriteData[i]) ++ { ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); ++ rtStatus = _FAIL; ++ break; ++ } ++ } ++ ++ return rtStatus; ++} ++ ++ ++VOID ++rtl8192c_PHY_GetHWRegOriginalValue( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // read rx initial gain ++ pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", ++ //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], ++ //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); ++ ++ // read framesync ++ pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); ++ pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", ++ // rOFDM0_RxDetector3, pHalData->framesync)); ++} ++ ++ ++// ++// Description: ++// Map dBm into Tx power index according to ++// current HW model, for example, RF and PA, and ++// current wireless mode. ++// By Bruce, 2008-01-29. ++// ++static u8 ++phy_DbmToTxPwrIdx( ++ IN PADAPTER Adapter, ++ IN WIRELESS_MODE WirelessMode, ++ IN int PowerInDbm ++ ) ++{ ++ u8 TxPwrIdx = 0; ++ int Offset = 0; ++ ++ ++ // ++ // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to ++ // 3dbm, and OFDM HT equals to 0dbm repectively. ++ // Note: ++ // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. ++ // By Bruce, 2008-01-29. ++ // ++ switch(WirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ Offset = -7; ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ Offset = -8; ++ break; ++ default: ++ Offset = -8; ++ break; ++ } ++ ++ if((PowerInDbm - Offset) > 0) ++ { ++ TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); ++ } ++ else ++ { ++ TxPwrIdx = 0; ++ } ++ ++ // Tx Power Index is too large. ++ if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) ++ TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; ++ ++ return TxPwrIdx; ++} ++ ++// ++// Description: ++// Map Tx power index into dBm according to ++// current HW model, for example, RF and PA, and ++// current wireless mode. ++// By Bruce, 2008-01-29. ++// ++int ++phy_TxPwrIdxToDbm( ++ IN PADAPTER Adapter, ++ IN WIRELESS_MODE WirelessMode, ++ IN u8 TxPwrIdx ++ ) ++{ ++ int Offset = 0; ++ int PwrOutDbm = 0; ++ ++ // ++ // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. ++ // Note: ++ // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. ++ // By Bruce, 2008-01-29. ++ // ++ switch(WirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ Offset = -7; ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ Offset = -8; ++ default: ++ Offset = -8; ++ break; ++ } ++ ++ PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. ++ ++ return PwrOutDbm; ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: GetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "common" moudule ++ * ++ * Input: PADAPTER Adapter ++ * psByte Power Level ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_GetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ OUT u32* powerlevel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 TxPwrLevel = 0; ++ int TxPwrDbm; ++ ++ // ++ // Because the Tx power indexes are different, we report the maximum of them to ++ // meet the CCX TPC request. By Bruce, 2008-01-31. ++ // ++ ++ // CCK ++ TxPwrLevel = pHalData->CurrentCckTxPwrIdx; ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); ++ ++ // Legacy OFDM ++ TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; ++ ++ // Compare with Legacy OFDM Tx power. ++ if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); ++ ++ // HT OFDM ++ TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; ++ ++ // Compare with HT OFDM Tx power. ++ if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); ++ ++ *powerlevel = TxPwrDbm; ++} ++ ++ ++static void getTxPowerIndex( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN OUT u8* cckPowerLevel, ++ IN OUT u8* ofdmPowerLevel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 index = (channel -1); ++ // 1. CCK ++ cckPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelCck[RF_PATH_A][index]; //RF-A ++ cckPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelCck[RF_PATH_B][index]; //RF-B ++ ++ // 2. OFDM for 1S or 2S ++ if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) ++ { ++ // Read HT 40 OFDM TX power ++ ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF_PATH_A][index]; ++ ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF_PATH_B][index]; ++ } ++ else if (GET_RF_TYPE(Adapter) == RF_2T2R) ++ { ++ // Read HT 40 OFDM TX power ++ ofdmPowerLevel[RF_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF_PATH_A][index]; ++ ofdmPowerLevel[RF_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF_PATH_B][index]; ++ } ++ //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); ++} ++ ++static void ccxPowerIndexCheck( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN OUT u8* cckPowerLevel, ++ IN OUT u8* ofdmPowerLevel ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); ++ ++ // ++ // CCX 2 S31, AP control of client transmit power: ++ // 1. We shall not exceed Cell Power Limit as possible as we can. ++ // 2. Tolerance is +/- 5dB. ++ // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. ++ // ++ // TODO: ++ // 1. 802.11h power contraint ++ // ++ // 071011, by rcnjko. ++ // ++ if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && ++ pMgntInfo->mAssoc && ++ pCcxInfo->bUpdateCcxPwr && ++ pCcxInfo->bWithCcxCellPwr && ++ channel == pMgntInfo->dot11CurrentChannelNumber) ++ { ++ u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); ++ u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); ++ u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", ++ pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", ++ channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++ ++ // CCK ++ if(cckPowerLevel[0] > CckCellPwrIdx) ++ cckPowerLevel[0] = CckCellPwrIdx; ++ // Legacy OFDM, HT OFDM ++ if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) ++ { ++ if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) ++ { ++ ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; ++ } ++ else ++ { ++ ofdmPowerLevel[0] = 0; ++ } ++ } ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", ++ cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++ } ++ ++ pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; ++ pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", ++ cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++#endif ++} ++/*----------------------------------------------------------------------------- ++ * Function: SetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * We must consider RF path later!!!!!!! ++ * ++ * Input: PADAPTER Adapter ++ * u1Byte channel ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * 2008/11/04 MHC We remove EEPROM_93C56. ++ * We need to move CCX relative code to independet file. ++ * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 cckPowerLevel[2], ofdmPowerLevel[2]; // [0]:RF-A, [1]:RF-B ++ ++#if(MP_DRIVER == 1) ++ return; ++#endif ++ ++ if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE) ++ return; ++ ++ getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", ++ // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); ++ ++ ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); ++ ++ rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); ++ rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); ++ ++#if 0 ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); ++ PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); ++ break; ++ ++ case RF_8256: ++ PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); ++ PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); ++ break; ++ ++ case RF_6052: ++ PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); ++ PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); ++ break; ++ ++ case RF_8258: ++ break; ++ } ++#endif ++ ++} ++ ++ ++// ++// Description: ++// Update transmit power level of all channel supported. ++// ++// TODO: ++// A mode. ++// By Bruce, 2008-02-04. ++// ++BOOLEAN ++PHY_UpdateTxPowerDbm8192C( ++ IN PADAPTER Adapter, ++ IN int powerInDbm ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 idx; ++ u8 rf_path; ++ ++ // TODO: A mode Tx power. ++ u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); ++ u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); ++ ++ if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) ++ OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; ++ else ++ OfdmTxPwrIdx = 0; ++ ++ //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); ++ ++ for(idx = 0; idx < 14; idx++) ++ { ++ for (rf_path = 0; rf_path < 2; rf_path++) ++ { ++ pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; ++ pHalData->TxPwrLevelHT40_1S[rf_path][idx] = ++ pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; ++ } ++ } ++ ++ //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo ++ ++ return _TRUE; ++} ++ ++ ++/* ++ Description: ++ When beacon interval is changed, the values of the ++ hw registers should be modified. ++ By tynli, 2008.10.24. ++ ++*/ ++ ++ ++void ++rtl8192c_PHY_SetBeaconHwReg( ++ IN PADAPTER Adapter, ++ IN u16 BeaconInterval ++ ) ++{ ++ ++} ++ ++ ++VOID ++PHY_ScanOperationBackup8192C( ++ IN PADAPTER Adapter, ++ IN u8 Operation ++ ) ++{ ++#if 0 ++ IO_TYPE IoType; ++ ++ if(!Adapter->bDriverStopped) ++ { ++ switch(Operation) ++ { ++ case SCAN_OPT_BACKUP: ++ IoType = IO_CMD_PAUSE_DM_BY_SCAN; ++ rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ ++ break; ++ ++ case SCAN_OPT_RESTORE: ++ IoType = IO_CMD_RESUME_DM_BY_SCAN; ++ rtw_hal_set_hwreg(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ break; ++ ++ default: ++ RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); ++ break; ++ } ++ } ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_SetBWModeCallback8192C() ++ * ++ * Overview: Timer callback function for SetSetBWMode ++ * ++ * Input: PRT_TIMER pTimer ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: (1) We do not take j mode into consideration now ++ * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run ++ * concurrently? ++ *---------------------------------------------------------------------------*/ ++static VOID ++_PHY_SetBWMode92C( ++ IN PADAPTER Adapter ++) ++{ ++// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 regBwOpMode; ++ u8 regRRSR_RSC; ++ ++ //return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //u4Byte NowL, NowH; ++ //u8Byte BeginTime, EndTime; ++ ++ /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ ++ pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SetBWModeInProgress= _FALSE; ++ return; ++ } ++ ++ // There is no 40MHz mode in RF_8225. ++ if(pHalData->rf_chip==RF_8225) ++ return; ++ ++ if(Adapter->bDriverStopped) ++ return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //BeginTime = ((u8Byte)NowH << 32) + NowL; ++ ++ //3// ++ //3//<1>Set MAC register ++ //3// ++ //Adapter->HalFunc.SetBWModeHandler(); ++ ++ regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); ++ regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); ++ //regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); ++ ++ switch(pHalData->CurrentChannelBW) ++ { ++ case HT_CHANNEL_WIDTH_20: ++ regBwOpMode |= BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ break; ++ ++ case HT_CHANNEL_WIDTH_40: ++ regBwOpMode &= ~BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ ++ regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); ++ rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); ++ break; ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): ++ unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ ++ break; ++ } ++ ++ //3// ++ //3//<2>Set PHY related register ++ //3// ++ switch(pHalData->CurrentChannelBW) ++ { ++ /* 20 MHz channel*/ ++ case HT_CHANNEL_WIDTH_20: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); ++ PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); ++ ++ break; ++ ++ ++ /* 40 MHz channel*/ ++ case HT_CHANNEL_WIDTH_40: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); ++ ++ // Set Control channel to upper or lower. These settings are required only for 40MHz ++ PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); ++ PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); ++ ++ PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); ++ ++ break; ++ ++ ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ ++ ,pHalData->CurrentChannelBW));*/ ++ break; ++ ++ } ++ //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //EndTime = ((u8Byte)NowH << 32) + NowL; ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); ++ ++ //3<3>Set RF related register ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8256: ++ // Please implement this function in Hal8190PciPhy8256.c ++ //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8258: ++ // Please implement this function in Hal8190PciPhy8258.c ++ // PHY_SetRF8258Bandwidth(); ++ break; ++ ++ case RF_PSEUDO_11N: ++ // Do Nothing ++ break; ++ ++ case RF_6052: ++ rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); ++ break; ++ } ++ ++ //pHalData->SetBWModeInProgress= FALSE; ++ ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); ++} ++ ++ ++ /*----------------------------------------------------------------------------- ++ * Function: SetBWMode8190Pci() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * ++ * Input: PADAPTER Adapter ++ * HT_CHANNEL_WIDTH Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: We do not take j mode into consideration now ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetBWMode8192C( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; ++ // Modified it for 20/40 mhz switch by guangan 070531 ++ //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; ++ ++ //return; ++ ++ //if(pHalData->SwChnlInProgress) ++// if(pMgntInfo->bScanInProgress) ++// { ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", ++// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// return; ++// } ++ ++// if(pHalData->SetBWModeInProgress) ++// { ++// // Modified it for 20/40 mhz switch by guangan 070531 ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", ++// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); ++// //return; ++// } ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ //pHalData->SetBWModeInProgress= TRUE; ++ ++ pHalData->CurrentChannelBW = Bandwidth; ++ ++#if 0 ++ if(Offset==HT_EXTCHNL_OFFSET_LOWER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(Offset==HT_EXTCHNL_OFFSET_UPPER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++#else ++ pHalData->nCur40MhzPrimeSC = Offset; ++#endif ++ ++ if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) ++ { ++#ifdef USE_WORKITEM ++ //PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem)); ++#else ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); ++ #else ++ _PHY_SetBWMode92C(Adapter); ++ #endif ++#endif ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); ++ //pHalData->SetBWModeInProgress= FALSE; ++ pHalData->CurrentChannelBW = tmpBW; ++ } ++ ++} ++ ++ ++static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) ++{ ++ u8 eRFPath; ++ u32 param1, param2; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if ( Adapter->bNotifyChannelChange ) ++ { ++ DBG_871X( "[%s] ch = %d\n", __FUNCTION__, channel ); ++ } ++ ++ //s1. pre common command - CmdID_SetTxPowerLevel ++ PHY_SetTxPowerLevel8192C(Adapter, channel); ++ ++ //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel ++ param1 = RF_CHNLBW; ++ param2 = channel; ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); ++ } ++ ++ ++ //s3. post common command - CmdID_End, None ++ ++} ++ ++VOID ++PHY_SwChnl8192C( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 tmpchannel = pHalData->CurrentChannel; ++ BOOLEAN bResult = _TRUE; ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SwChnlInProgress=FALSE; ++ return; //return immediately if it is peudo-phy ++ } ++ ++ //if(pHalData->SwChnlInProgress) ++ // return; ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ //-------------------------------------------- ++ switch(pHalData->CurrentWirelessMode) ++ { ++ case WIRELESS_MODE_A: ++ case WIRELESS_MODE_N_5G: ++ //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); ++ break; ++ ++ case WIRELESS_MODE_B: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); ++ break; ++ } ++ //-------------------------------------------- ++ ++ //pHalData->SwChnlInProgress = TRUE; ++ if(channel == 0) ++ channel = 1; ++ ++ pHalData->CurrentChannel=channel; ++ ++ //pHalData->SwChnlStage=0; ++ //pHalData->SwChnlStep=0; ++ ++ if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) ++ { ++#ifdef USE_WORKITEM ++ //bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem)); ++#else ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); ++ #else ++ _PHY_SwChnl8192C(Adapter, channel); ++ #endif ++#endif ++ if(bResult) ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++ ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++} ++ ++ ++static BOOLEAN ++phy_SwChnlStepByStep( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN u8 *stage, ++ IN u8 *step, ++ OUT u32 *delay ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PCHANNEL_ACCESS_SETTING pChnlAccessSetting; ++ SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; ++ u4Byte PreCommonCmdCnt; ++ SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; ++ u4Byte PostCommonCmdCnt; ++ SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; ++ u4Byte RfDependCmdCnt; ++ SwChnlCmd *CurrentCmd; ++ u1Byte eRFPath; ++ u4Byte RfTXPowerCtrl; ++ BOOLEAN bAdjRfTXPowerCtrl = _FALSE; ++ ++ ++ RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); ++#if(MP_DRIVER != 1) ++ RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); ++#endif ++ RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); ++ ++ pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; ++ RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); ++ ++ //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ //{ ++ // <1> Fill up pre common command. ++ PreCommonCmdCnt = 0; ++ phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, ++ CmdID_SetTxPowerLevel, 0, 0, 0); ++ phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ // <2> Fill up post common command. ++ PostCommonCmdCnt = 0; ++ ++ phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ // <3> Fill up RF dependent command. ++ RfDependCmdCnt = 0; ++ switch( pHalData->RFChipID ) ++ { ++ case RF_8225: ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ // 2008/09/04 MH Change channel. ++ if(channel==14) channel++; ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ break; ++ ++ case RF_8256: ++ // TEST!! This is not the table for 8256!! ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, rRfChannel, channel, 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ break; ++ ++ case RF_6052: ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ break; ++ ++ case RF_8258: ++ break; ++ ++ // For FPGA two MAC verification ++ case RF_PSEUDO_11N: ++ return TRUE; ++ default: ++ RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); ++ return FALSE; ++ break; ++ } ++ ++ ++ do{ ++ switch(*stage) ++ { ++ case 0: ++ CurrentCmd=&PreCommonCmd[*step]; ++ break; ++ case 1: ++ CurrentCmd=&RfDependCmd[*step]; ++ break; ++ case 2: ++ CurrentCmd=&PostCommonCmd[*step]; ++ break; ++ } ++ ++ if(CurrentCmd->CmdID==CmdID_End) ++ { ++ if((*stage)==2) ++ { ++ return TRUE; ++ } ++ else ++ { ++ (*stage)++; ++ (*step)=0; ++ continue; ++ } ++ } ++ ++ switch(CurrentCmd->CmdID) ++ { ++ case CmdID_SetTxPowerLevel: ++ PHY_SetTxPowerLevel8192C(Adapter,channel); ++ break; ++ case CmdID_WritePortUlong: ++ PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); ++ break; ++ case CmdID_WritePortUshort: ++ PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); ++ break; ++ case CmdID_WritePortUchar: ++ PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); ++ break; ++ case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++#if 1 ++ pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); ++#else ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); ++#endif ++ } ++ break; ++ } ++ ++ break; ++ }while(TRUE); ++ //cosa }/*for(Number of RF paths)*/ ++ ++ (*delay)=CurrentCmd->msDelay; ++ (*step)++; ++ return FALSE; ++#endif ++ return _TRUE; ++} ++ ++ ++static BOOLEAN ++phy_SetSwChnlCmdArray( ++ SwChnlCmd* CmdTable, ++ u32 CmdTableIdx, ++ u32 CmdTableSz, ++ SwChnlCmdID CmdID, ++ u32 Para1, ++ u32 Para2, ++ u32 msDelay ++ ) ++{ ++ SwChnlCmd* pCmd; ++ ++ if(CmdTable == NULL) ++ { ++ //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); ++ return _FALSE; ++ } ++ if(CmdTableIdx >= CmdTableSz) ++ { ++ //RT_ASSERT(FALSE, ++ // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", ++ // CmdTableIdx, CmdTableSz)); ++ return _FALSE; ++ } ++ ++ pCmd = CmdTable + CmdTableIdx; ++ pCmd->CmdID = CmdID; ++ pCmd->Para1 = Para1; ++ pCmd->Para2 = Para2; ++ pCmd->msDelay = msDelay; ++ ++ return _TRUE; ++} ++ ++ ++static void ++phy_FinishSwChnlNow( // We should not call this function directly ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 delay; ++ ++ while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) ++ { ++ if(delay>0) ++ rtw_mdelay_os(delay); ++ } ++#endif ++} ++ ++ ++ ++// ++// Description: ++// Switch channel synchronously. Called by SwChnlByDelayHandler. ++// ++// Implemented by Bruce, 2008-02-14. ++// The following procedure is operted according to SwChanlCallback8190Pci(). ++// However, this procedure is performed synchronously which should be running under ++// passive level. ++// ++VOID ++PHY_SwChnlPhy8192C( // Only called during initialize ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); ++ ++ // Cannot IO. ++ //if(RT_CANNOT_IO(Adapter)) ++ // return; ++ ++ // Channel Switching is in progress. ++ //if(pHalData->SwChnlInProgress) ++ // return; ++ ++ //return immediately if it is peudo-phy ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SwChnlInProgress=FALSE; ++ return; ++ } ++ ++ //pHalData->SwChnlInProgress = TRUE; ++ if( channel == 0) ++ channel = 1; ++ ++ pHalData->CurrentChannel=channel; ++ ++ //pHalData->SwChnlStage = 0; ++ //pHalData->SwChnlStep = 0; ++ ++ phy_FinishSwChnlNow(Adapter,channel); ++ ++ //pHalData->SwChnlInProgress = FALSE; ++} ++ ++ ++// ++// Description: ++// Configure H/W functionality to enable/disable Monitor mode. ++// Note, because we possibly need to configure BB and RF in this function, ++// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. ++// ++VOID ++PHY_SetMonitorMode8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; ++ ++ //2 Note: we may need to stop antenna diversity. ++ if(bEnableMonitorMode) ++ { ++ bFilterOutNonAssociatedBSSID = FALSE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); ++ ++ pHalData->bInMonitorMode = TRUE; ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++ else ++ { ++ bFilterOutNonAssociatedBSSID = TRUE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); ++ ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); ++ pHalData->bInMonitorMode = FALSE; ++ rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++#endif ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHYCheckIsLegalRfPath8190Pci() ++ * ++ * Overview: Check different RF type to execute legal judgement. If RF Path is illegal ++ * We will return false. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/15/2007 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++BOOLEAN ++PHY_CheckIsLegalRfPath8192C( ++ IN PADAPTER pAdapter, ++ IN u32 eRFPath) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN rtValue = _TRUE; ++ ++ // NOt check RF Path now.! ++#if 0 ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) ++ { ++ rtValue = FALSE; ++ } ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF_PATH_A) ++ { ++ ++ } ++#endif ++ return rtValue; ++ ++} /* PHY_CheckIsLegalRfPath8192C */ ++ ++//------------------------------------------------------------------------- ++// ++// IQK ++// ++//------------------------------------------------------------------------- ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++_PHY_PathA_IQK( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN configPathB ++ ) ++{ ++ u32 regEAC, regE94, regE9C, regEA4; ++ u8 result = 0x00; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); ++ ++ //path-A IQK setting ++ //RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102); ++ ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 : ++ IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502); ++ ++ //path-B IQK setting ++ if(configPathB) ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102); ++ PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202); ++ } ++ ++ //LO calibration setting ++ //RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1); ++ ++ //One shot, path A LOK & IQK ++ //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); ++ rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ DBG_8192C("Path A Rx IQK fail!!\n"); ++ ++ return result; ++ ++ ++} ++ ++static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++_PHY_PathB_IQK( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u32 regEAC, regEB4, regEBC, regEC4, regECC; ++ u8 result = 0x00; ++ //RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); ++ ++ //One shot, path B LOK & IQK ++ //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002); ++ PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); ++ rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ DBG_8192C("Path B Rx IQK fail!!\n"); ++ ++ ++ return result; ++ ++} ++ ++static VOID ++_PHY_PathAFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN int result[][8], ++ IN u8 final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u32 Oldval_0, X, TX0_A, reg; ++ s32 Y, TX0_C; ++ ++ DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); ++ ++ if(final_candidate == 0xFF) ++ return; ++ else if(bIQKOK) ++ { ++ Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ TX0_C = (Y * Oldval_0) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n"); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg); ++ } ++} ++ ++static VOID ++_PHY_PathBFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN int result[][8], ++ IN u8 final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u32 Oldval_1, X, TX1_A, reg; ++ s32 Y, TX1_C; ++ ++ DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); ++ ++ if(final_candidate == 0xFF) ++ return; ++ else if(bIQKOK) ++ { ++ Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ TX1_C = (Y * Oldval_1) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++static VOID ++_PHY_SaveADDARegisters( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN u32* ADDABackup, ++ IN u32 RegisterNum ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++static VOID ++_PHY_SaveMACRegisters( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] =rtw_read8(pAdapter, MACReg[i]); ++ } ++ MACBackup[i] = rtw_read32(pAdapter, MACReg[i]); ++ ++} ++ ++static VOID ++_PHY_ReloadADDARegisters( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN u32* ADDABackup, ++ IN u32 RegiesterNum ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum ; i++){ ++ PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++static VOID ++_PHY_ReloadMACRegisters( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]); ++ } ++ rtw_write32(pAdapter, MACReg[i], MACBackup[i]); ++} ++ ++static VOID ++_PHY_PathADDAOn( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u32 pathOn; ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; ++ if(_FALSE == is2T){ ++ pathOn = 0x0bdb25a0; ++ PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0); ++ } ++ else{ ++ PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++static VOID ++_PHY_MACSettingCalibration( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i = 0; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n")); ++ ++ rtw_write8(pAdapter, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); ++ } ++ rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++static VOID ++_PHY_PathAStandBy( ++ IN PADAPTER pAdapter ++ ) ++{ ++ //RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0); ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); ++} ++ ++static VOID ++_PHY_PIModeSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN PIMode ++ ) ++{ ++ u32 mode; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode); ++ PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode); ++} ++ ++/* ++return _FALSE => do IQK again ++*/ ++static BOOLEAN ++_PHY_SimularityCompare( ++ IN PADAPTER pAdapter, ++ IN int result[][8], ++ IN u8 c1, ++ IN u8 c2 ++ ) ++{ ++ u32 i, j, diff, SimularityBitMap, bound = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<dmpriv; ++ u32 i; ++ u8 PathAOK, PathBOK; ++ u32 ADDA_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB, ++ rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, ++ rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD ++ }; ++ ++#if MP_DRIVER ++ const u32 retryCount = 9; ++#else ++ const u32 retryCount = 2; ++#endif ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ u32 bbvalue; ++ ++ if(t==0) ++ { ++ bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue)); ++ ++ //RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); ++ } ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T); ++ ++ if(t==0) ++ { ++ pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pdmpriv->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++ _PHY_PIModeSwitch(pAdapter, _TRUE); ++ } ++ ++ PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600); ++ PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4); ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00); ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000); ++ } ++ ++ //MAC settings ++ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ ++ //Page B init ++ PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000); ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000); ++ } ++ ++ // IQ calibration setting ++ //RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000); ++ PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathAOK = _PHY_PathA_IQK(pAdapter, is2T); ++ if(PathAOK == 0x03){ ++ DBG_8192C("Path A IQK Success!!\n"); ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ DBG_8192C("Path A IQK Only Tx Success!!\n"); ++ ++ result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ DBG_8192C("Path A IQK failed!!\n"); ++ } ++ ++ if(is2T){ ++ _PHY_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathBOK = _PHY_PathB_IQK(pAdapter); ++ if(PathBOK == 0x03){ ++ DBG_8192C("Path B IQK Success!!\n"); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ DBG_8192C("Path B Only Tx IQK Success!!\n"); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ DBG_8192C("Path B IQK failed!!\n"); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ //RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0); ++ ++ if(t!=0) ++ { ++ if(!pdmpriv->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++ _PHY_PIModeSwitch(pAdapter, _FALSE); ++ } ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ ++ // Reload BB parameters ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); ++ ++ // Restore RX initial gain ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3); ++ if(is2T){ ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3); ++ } ++ ++ //load 0xe30 IQC default value ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ ++ } ++ //RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n")); ++ ++} ++ ++ ++static VOID ++_PHY_LCCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ u8 tmpReg; ++ u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; ++ ++ //Check continuous TX and Packet TX ++ tmpReg = rtw_read8(pAdapter, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ rtw_write8(pAdapter, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++ RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits); ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++ LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); ++ ++ //4. Set LC calibration begin ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); ++ ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(100); ++ #else ++ rtw_mdelay_os(100); ++ #endif ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ rtw_write8(pAdapter, 0xd03, tmpReg); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ rtw_write8(pAdapter, REG_TXPAUSE, 0x00); ++ } ++ ++} ++ ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++static VOID ++_PHY_APCalibrate( ++ IN PADAPTER pAdapter, ++ IN char delta, ++ IN BOOLEAN is2T ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ u32 regD[PATH_NUM]; ++ u32 tmpReg, index, offset, i, apkbound; ++ u8 path, pathbound = PATH_NUM; ++ u32 BB_backup[APK_BB_REG_NUM]; ++ u32 BB_REG[APK_BB_REG_NUM] = { ++ rFPGA1_TxBlock, rOFDM0_TRxPathEnable, ++ rFPGA0_RFMOD, rOFDM0_TRMuxPar, ++ rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, ++ rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; ++ u32 BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u32 AFE_backup[IQK_ADDA_REG_NUM]; ++ u32 AFE_REG[IQK_ADDA_REG_NUM] = { ++ rFPGA0_XCD_SwitchControl, rBlue_Tooth, ++ rRx_Wait_CCA, rTx_CCK_RFON, ++ rTx_CCK_BBON, rTx_OFDM_RFON, ++ rTx_OFDM_BBON, rTx_To_Rx, ++ rTx_To_Tx, rRx_CCK, ++ rRx_OFDM, rRx_Wait_RIFS, ++ rRx_TO_Rx, rStandby, ++ rSleep, rPMPD_ANAEN }; ++ ++ u32 MAC_backup[IQK_MAC_REG_NUM]; ++ u32 MAC_REG[IQK_MAC_REG_NUM] = { ++ REG_TXPAUSE, REG_BCN_CTRL, ++ REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; ++ ++ u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++#if 0 ++ u32 APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, ++ {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} ++ }; ++#endif ++ u32 AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u32 APK_offset[PATH_NUM] = { ++ rConfig_AntA, rConfig_AntB}; ++ ++ u32 APK_normal_offset[PATH_NUM] = { ++ rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; ++ ++ u32 APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u32 APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ char APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u32 APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u32 APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++ //u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ int BB_offset, delta_V, delta_offset; ++ ++#if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++#endif ++ ++ //RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta)); ++ ++ //RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip"))); ++ ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if (MP_DRIVER != 1) ++ return; ++#endif ++ ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++ _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ if(path == RF_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = rPdp_AntA; ++ for(index = 0; index < 11; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ for(; index < 13; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); ++ ++ //path A ++ offset = rPdp_AntA; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); ++ } ++ else if(path == RF_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = rPdp_AntB; ++ for(index = 0; index < 10; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); ++ ++ PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); ++ ++ offset = rConfig_AntA; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); ++ } ++ ++ //save RF default value ++ regD[path] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask); ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ else if (index < 5) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); ++ } ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); ++ ++ //MAC settings ++ _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++ ++ if(path == RF_PATH_A) //Path B to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pdmpriv->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x894ae); ++ else ++#endif ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x8992e); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xc, bMaskDWord))); ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0x0, bMaskDWord))); ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xd, bMaskDWord))); ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000); ++ { ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ rtw_mdelay_os(3); ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(20); ++ #else ++ rtw_mdelay_os(20); ++ #endif ++ } ++ PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000); ++ ++ if(path == RF_PATH_A) ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000); ++ else ++ tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++ _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0) //skip ++ continue; ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++ _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]); ++ if(path == RF_PATH_B) ++ { ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101); ++ } ++ ++ //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ //RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == RF_PATH_A) ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++ PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++ } ++ ++ pdmpriv->bAPKdone = _TRUE; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n")); ++} ++ ++static VOID _PHY_SetRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++ u8 u1bTmp; ++ ++ if(!pAdapter->hw_init_completed) ++ { ++ u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; ++ rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); ++ //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else ++ { ++ ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux ++ } ++ ++} ++ ++//return value TRUE => Main; FALSE => Aux ++ ++static BOOLEAN _PHY_QueryRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++// if(is2T) ++// return _TRUE; ++ ++ if(!pAdapter->hw_init_completed) ++ { ++ PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++ else ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++} ++ ++VOID ++rtl8192c_PHY_IQCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ s32 result[4][8]; //last is final result ++ u8 i, final_candidate; ++ BOOLEAN bPathAOK, bPathBOK; ++ s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ BOOLEAN bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE; ++ u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, ++ rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, ++ rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, ++ rOFDM0_RxIQExtAnta}; ++ ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx; ++ bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression; ++#endif ++ ++ //ignore IQK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(bReCovery) ++ { ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9); ++ return; ++ } ++ DBG_8192C("IQK:Start!!!\n"); ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = _FALSE; ++ bPathBOK = _FALSE; ++ is12simular = _FALSE; ++ is23simular = _FALSE; ++ is13simular = _FALSE; ++ ++ for (i=0; i<3; i++) ++ { ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_IQCalibrate(pAdapter, result, i, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_IQCalibrate(pAdapter, result, i, _FALSE); ++ } ++ ++ if(i == 1) ++ { ++ is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1); ++ if(is12simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++ is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2); ++ if(is13simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ ++ is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2); ++ if(is23simular) ++ final_candidate = 1; ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ //RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pdmpriv->RegE94 = RegE94 = result[final_candidate][0]; ++ pdmpriv->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pdmpriv->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ DBG_8192C("IQK: final_candidate is %x\n", final_candidate); ++ DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC); ++ bPathAOK = bPathBOK = _TRUE; ++ } ++ else ++ { ++ RegE94 = RegEB4 = pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100; //X default value ++ RegE9C = RegEBC = pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0; //Y default value ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9); ++ ++} ++ ++ ++VOID ++rtl8192c_PHY_LCCalibrate( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mlme_ext_priv *pmlmeext = &pAdapter->mlmeextpriv; ++ BOOLEAN bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE; ++ ++#if MP_DRIVER == 1 ++ bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx; ++ bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone; ++ bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression; ++#endif ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ //ignore IQK when continuous Tx ++ if(bStartContTx || bSingleTone || bCarrierSuppression) ++ return; ++ ++ if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_LCCalibrate(pAdapter, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_LCCalibrate(pAdapter, _FALSE); ++ } ++} ++ ++VOID ++rtl8192c_PHY_APCalibrate( ++ IN PADAPTER pAdapter, ++ IN char delta ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //default disable APK, because Tx NG issue, suggest by Jenyu, 2011.11.25 ++ return; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(pdmpriv->bAPKdone) ++ return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_APCalibrate(pAdapter, delta, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_APCalibrate(pAdapter, delta, _FALSE); ++ } ++} ++ ++VOID rtl8192c_PHY_SetRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE); ++ } ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c +@@ -0,0 +1,1031 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192c_rf6052.c ( Source C File) ++ * ++ * Note: Provide RF 6052 series relative API. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * 11/05/2008 MHC Add API for tw power setting. ++ * ++ * ++******************************************************************************/ ++ ++#define _RTL8192C_RF6052_C_ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// Define local structure for debug!!!!! ++typedef struct RF_Shadow_Compare_Map { ++ // Shadow register value ++ u32 Value; ++ // Compare or not flag ++ u8 Compare; ++ // Record If it had ever modified unpredicted ++ u8 ErrorOrNot; ++ // Recorver Flag ++ u8 Recorver; ++ // ++ u8 Driver_Write; ++}RF_SHADOW_T; ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++/*------------------------Define global variable-----------------------------*/ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++// 2008/11/20 MH For Debug only, RF ++//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; ++static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: RF_ChangeTxPath ++ * ++ * Overview: For RL6052, we must change some RF settign for 1T or 2T. ++ * ++ * Input: u2Byte DataRate // 0x80-8f, 0x90-9f ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/25/2008 MHC Create Version 0. ++ * Firmwaer support the utility later. ++ * ++ *---------------------------------------------------------------------------*/ ++void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate) ++{ ++// We do not support gain table change inACUT now !!!! Delete later !!! ++#if 0//(RTL92SE_FPGA_VERIFY == 0) ++ static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T ++ static u4Byte tx_gain_tbl1[6] ++ = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; ++ static u4Byte tx_gain_tbl2[6] ++ = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; ++ u1Byte i; ++ ++ if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); ++ ++ // Set PA to high value ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); ++ } ++ else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x04440); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); ++ ++ // Set PA low gain ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)RF_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); ++ } ++#endif ++ ++} /* RF_ChangeTxPath */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetBandwidth() ++ * ++ * Overview: This function is called by SetBWModeCallback8190Pci() only ++ * ++ * Input: PADAPTER Adapter ++ * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: For RF type 0222D ++ *---------------------------------------------------------------------------*/ ++VOID ++rtl8192c_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(Bandwidth) ++ { ++ case HT_CHANNEL_WIDTH_20: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ case HT_CHANNEL_WIDTH_40: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); ++ break; ++ } ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetCckTxPower ++ * ++ * Overview: ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/05/2008 MHC Simulate 8192series.. ++ * ++ *---------------------------------------------------------------------------*/ ++ ++VOID ++rtl8192c_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; ++ u32 TxAGC[2]={0, 0}, tmpval=0; ++ BOOLEAN TurboScanOff = _FALSE; ++ u8 idx1, idx2; ++ u8* ptr; ++ ++ // 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU. ++ // Otherwise, external PA will be broken if power index > 0x20. ++#ifdef CONFIG_USB_HCI ++ if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA) ++#else ++ if (pHalData->EEPROMRegulatory != 0) ++#endif ++ { ++ //DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA); ++ TurboScanOff = _TRUE; ++ } ++ ++ if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ TxAGC[RF_PATH_A] = 0x3f3f3f3f; ++ TxAGC[RF_PATH_B] = 0x3f3f3f3f; ++ ++ TurboScanOff = _TRUE;//disable turbo scan ++ ++ if(TurboScanOff) ++ { ++ for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) ++ { ++ TxAGC[idx1] = ++ pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | ++ (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); ++#ifdef CONFIG_USB_HCI ++ // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. ++ if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) ++ TxAGC[idx1] = 0x20; ++#endif ++ } ++ } ++ } ++ else ++ { ++// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. ++// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. ++// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ { ++ TxAGC[RF_PATH_A] = 0x10101010; ++ TxAGC[RF_PATH_B] = 0x10101010; ++ } ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ { ++ TxAGC[RF_PATH_A] = 0x00000000; ++ TxAGC[RF_PATH_B] = 0x00000000; ++ } ++ else ++ { ++ for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) ++ { ++ TxAGC[idx1] = ++ pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | ++ (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); ++ } ++ ++ if(pHalData->EEPROMRegulatory==0) ++ { ++ tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + ++ (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); ++ TxAGC[RF_PATH_A] += tmpval; ++ ++ tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + ++ (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); ++ TxAGC[RF_PATH_B] += tmpval; ++ } ++ } ++ } ++ ++ for(idx1=RF_PATH_A; idx1<=RF_PATH_B; idx1++) ++ { ++ ptr = (u8*)(&(TxAGC[idx1])); ++ for(idx2=0; idx2<4; idx2++) ++ { ++ if(*ptr > RF6052_MAX_TX_PWR) ++ *ptr = RF6052_MAX_TX_PWR; ++ ptr++; ++ } ++ } ++ ++ // rf-A cck tx power ++ tmpval = TxAGC[RF_PATH_A]&0xff; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32)); ++ tmpval = TxAGC[RF_PATH_A]>>8; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); ++ ++ // rf-B cck tx power ++ tmpval = TxAGC[RF_PATH_B]>>24; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); ++ tmpval = TxAGC[RF_PATH_B]&0x00ffffff; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", ++ // tmpval, rTxAGC_B_CCK1_55_Mcs32)); ++ ++} /* PHY_RF6052SetCckTxPower */ ++ ++// ++// powerbase0 for OFDM rates ++// powerbase1 for HT MCS rates ++// ++static void getPowerBase( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel, ++ IN OUT u32* OfdmBase, ++ IN OUT u32* MCSBase ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 powerBase0, powerBase1; ++ u8 Legacy_pwrdiff=0; ++ s8 HT20_pwrdiff=0; ++ u8 i, powerlevel[2]; ++ ++ for(i=0; i<2; i++) ++ { ++ powerlevel[i] = pPowerLevel[i]; ++ Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; ++ powerBase0 = powerlevel[i] + Legacy_pwrdiff; ++ ++ powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; ++ *(OfdmBase+i) = powerBase0; ++ //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); ++ } ++ ++ for(i=0; i<2; i++) ++ { ++ //Check HT20 to HT40 diff ++ if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) ++ { ++ HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; ++ powerlevel[i] += HT20_pwrdiff; ++ } ++ powerBase1 = powerlevel[i]; ++ powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; ++ *(MCSBase+i) = powerBase1; ++ //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); ++ } ++} ++ ++static void getTxPowerWriteValByRegulatory( ++ IN PADAPTER Adapter, ++ IN u8 Channel, ++ IN u8 index, ++ IN u32* powerBase0, ++ IN u32* powerBase1, ++ OUT u32* pOutWriteVal ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i, chnlGroup = 0, pwr_diff_limit[4]; ++ u32 writeVal, customer_limit, rf; ++ ++ // ++ // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate ++ // ++ for(rf=0; rf<2; rf++) ++ { ++ switch(pHalData->EEPROMRegulatory) ++ { ++ case 0: // Realtek better performance ++ // increase power diff defined by Realtek for large power ++ chnlGroup = 0; ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ case 1: // Realtek regulatory ++ // increase power diff defined by Realtek for regulatory ++ { ++ if(pHalData->pwrGroupCnt == 1) ++ chnlGroup = 0; ++ if(pHalData->pwrGroupCnt >= 3) ++ { ++ if(Channel <= 3) ++ chnlGroup = 0; ++ else if(Channel >= 4 && Channel <= 9) ++ chnlGroup = 1; ++ else if(Channel > 9) ++ chnlGroup = 2; ++ ++ if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) ++ chnlGroup++; ++ else ++ chnlGroup+=4; ++ } ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ } ++ break; ++ case 2: // Better regulatory ++ // don't increase any power diff ++ writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ case 3: // Customer defined power diff. ++ // increase power diff defined by customer. ++ chnlGroup = 0; ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ ++ if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) ++ { ++ //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", ++ // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); ++ } ++ else ++ { ++ //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", ++ // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); ++ } ++ for (i=0; i<4; i++) ++ { ++ pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); ++ if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) ++ { ++ if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) ++ pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; ++ } ++ else ++ { ++ if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) ++ pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; ++ } ++ } ++ customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | ++ (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); ++ ++ writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ default: ++ chnlGroup = 0; ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ } ++ ++// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. ++// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. ++// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. ++ ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ writeVal = 0x14141414; ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ writeVal = 0x00000000; ++ ++ ++ // 20100628 Joseph: High power mode for BT-Coexist mechanism. ++ // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) ++ { ++ //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); ++ writeVal = writeVal - 0x06060606; ++ } ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) ++ { ++ //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); ++ writeVal = writeVal; ++ } ++ *(pOutWriteVal+rf) = writeVal; ++ } ++} ++ ++static void writeOFDMPowerReg( ++ IN PADAPTER Adapter, ++ IN u8 index, ++ IN u32* pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, ++ rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, ++ rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; ++ u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, ++ rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, ++ rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; ++ u8 i, rf, pwr_val[4]; ++ u32 writeVal; ++ u16 RegOffset; ++ ++ for(rf=0; rf<2; rf++) ++ { ++ writeVal = pValue[rf]; ++ for(i=0; i<4; i++) ++ { ++ pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); ++ if (pwr_val[i] > RF6052_MAX_TX_PWR) ++ pwr_val[i] = RF6052_MAX_TX_PWR; ++ } ++ writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; ++ ++ if(rf == 0) ++ RegOffset = RegOffset_A[index]; ++ else ++ RegOffset = RegOffset_B[index]; ++ ++ PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal)); ++ ++ // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. ++ if(((pHalData->rf_type == RF_2T2R) && ++ (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| ++ ((pHalData->rf_type != RF_2T2R) && ++ (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) ++ { ++ writeVal = pwr_val[3]; ++ if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) ++ RegOffset = 0xc90; ++ if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) ++ RegOffset = 0xc98; ++ for(i=0; i<3; i++) ++ { ++ if(i!=2) ++ writeVal = (writeVal>8)?(writeVal-8):0; ++ else ++ writeVal = (writeVal>6)?(writeVal-6):0; ++ rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); ++ } ++ } ++ } ++} ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetOFDMTxPower ++ * ++ * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for ++ * different channel and read original value in TX power register area from ++ * 0xe00. We increase offset and original value to be correct tx pwr. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/05/2008 MHC Simulate 8192 series method. ++ * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to ++ * A/B pwr difference or legacy/HT pwr diff. ++ * 2. We concern with path B legacy/HT OFDM difference. ++ * 01/22/2009 MHC Support new EPRO format from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++rtl8192c_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel) ++{ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 writeVal[2], powerBase0[2], powerBase1[2]; ++ u8 index = 0; ++ ++ getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]); ++ ++ for(index=0; index<6; index++) ++ { ++ getTxPowerWriteValByRegulatory(Adapter, Channel, index, ++ &powerBase0[0], &powerBase1[0], &writeVal[0]); ++ ++ writeOFDMPowerReg(Adapter, index, &writeVal[0]); ++ } ++ ++} ++ ++ ++static VOID ++phy_RF6052_Config_HardCode( ++ IN PADAPTER Adapter ++ ) ++{ ++ ++ // Set Default Bandwidth to 20M ++ //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); ++ ++ // TODO: Set Default Channel to channel one for RTL8225 ++ ++} ++ ++static int ++phy_RF6052_Config_ParaFile( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 u4RegValue=0; ++ u8 eRFPath; ++ BB_REGISTER_DEFINITION_T *pPhyReg; ++ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A; ++ static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B; ++#ifdef CONFIG_USB_HCI ++ static char sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard; ++ static char sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard; ++ static char sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP; ++#endif ++ static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A; ++ static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B; ++ static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A; ++ static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B; ++ char *pszRadioAFile, *pszRadioBFile; ++ ++ ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's ++ { ++ pszRadioAFile = sz92CRadioAFile; ++ pszRadioBFile = sz92CRadioBFile; ++ } ++ else ++ { ++ pszRadioAFile = sz88CRadioAFile; ++ pszRadioBFile = sz88CRadioBFile; ++#ifdef CONFIG_USB_HCI ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ pszRadioAFile = sz88CRadioAFile_mCard; ++ pszRadioBFile = sz88CRadioBFile_mCard; ++ } ++ else if( BOARD_USB_High_PA == pHalData->BoardType) ++ { ++ pszRadioAFile = sz88CRadioAFile_HP; ++ } ++#endif ++ } ++ } ++ else if(IS_HARDWARE_TYPE_8723A(Adapter)) ++ { ++ pszRadioAFile = sz8723RadioAFile; ++ pszRadioBFile = sz8723RadioBFile; ++ } ++ ++ //3//----------------------------------------------------------------- ++ //3// <2> Initialize RF ++ //3//----------------------------------------------------------------- ++ //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ ++ pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ ++ /*----Store original RFENV control type----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); ++ break; ++ } ++ ++ /*----Set RF_ENV enable----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Set RF_ENV output high----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /* Set bit number of Address and Data for RF register */ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Initialize RF fom connfiguration file----*/ ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); ++#else ++ rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath); ++#endif ++ break; ++ case RF_PATH_B: ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath); ++#else ++ rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath); ++#endif ++ break; ++ case RF_PATH_C: ++ break; ++ case RF_PATH_D: ++ break; ++ } ++ ++ /*----Restore RFENV control type----*/; ++ switch(eRFPath) ++ { ++ case RF_PATH_A: ++ case RF_PATH_C: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); ++ break; ++ case RF_PATH_B : ++ case RF_PATH_D: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); ++ break; ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); ++ goto phy_RF6052_Config_ParaFile_Fail; ++ } ++ ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); ++ return rtStatus; ++ ++phy_RF6052_Config_ParaFile_Fail: ++ return rtStatus; ++} ++ ++ ++int ++PHY_RF6052_Config8192C( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // Initialize general global value ++ // ++ // TODO: Extend RF_PATH_C and RF_PATH_D in the future ++ if(pHalData->rf_type == RF_1T1R) ++ pHalData->NumTotalRFPath = 1; ++ else ++ pHalData->NumTotalRFPath = 2; ++ ++ // ++ // Config BB and RF ++ // ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++#if 0 ++ switch( Adapter->MgntInfo.bRegHwParaFile ) ++ { ++ case 0: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ ++ case 1: ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ case 2: ++ // Partial Modify. ++ phy_RF6052_Config_HardCode(Adapter); ++ phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ default: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ } ++#endif ++ return rtStatus; ++ ++} ++ ++ ++// ++// ==> RF shadow Operation API Code Section!!! ++// ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RFShadowRead ++ * PHY_RFShadowWrite ++ * PHY_RFShadowCompare ++ * PHY_RFShadowRecorver ++ * PHY_RFShadowCompareAll ++ * PHY_RFShadowRecorverAll ++ * PHY_RFShadowCompareFlagSet ++ * PHY_RFShadowRecorverFlagSet ++ * ++ * Overview: When we set RF register, we must write shadow at first. ++ * When we are running, we must compare shadow abd locate error addr. ++ * Decide to recorver or not. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/20/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++u32 ++PHY_RFShadowRead( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ return RF_Shadow[eRFPath][Offset].Value; ++ ++} /* PHY_RFShadowRead */ ++ ++ ++VOID ++PHY_RFShadowWrite( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data) ++{ ++ RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); ++ RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; ++ ++} /* PHY_RFShadowWrite */ ++ ++ ++BOOLEAN ++PHY_RFShadowCompare( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ u32 reg; ++ // Check if we need to check the register ++ if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) ++ { ++ reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); ++ // Compare shadow and real rf register for 20bits!! ++ if (RF_Shadow[eRFPath][Offset].Value != reg) ++ { ++ // Locate error position. ++ RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", ++ //eRFPath, Offset, reg)); ++ } ++ return RF_Shadow[eRFPath][Offset].ErrorOrNot ; ++ } ++ return _FALSE; ++} /* PHY_RFShadowCompare */ ++ ++ ++VOID ++PHY_RFShadowRecorver( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ // Check if the address is error ++ if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) ++ { ++ // Check if we need to recorver the register. ++ if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) ++ { ++ PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, ++ RF_Shadow[eRFPath][Offset].Value); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", ++ //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); ++ } ++ } ++ ++} /* PHY_RFShadowRecorver */ ++ ++ ++VOID ++PHY_RFShadowCompareAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ PHY_RFShadowCompare(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); ++ } ++ } ++ ++} /* PHY_RFShadowCompareAll */ ++ ++ ++VOID ++PHY_RFShadowRecorverAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ PHY_RFShadowRecorver(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset); ++ } ++ } ++ ++} /* PHY_RFShadowRecorverAll */ ++ ++ ++VOID ++PHY_RFShadowCompareFlagSet( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u8 Type) ++{ ++ // Set True or False!!! ++ RF_Shadow[eRFPath][Offset].Compare = Type; ++ ++} /* PHY_RFShadowCompareFlagSet */ ++ ++ ++VOID ++PHY_RFShadowRecorverFlagSet( ++ IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u8 Type) ++{ ++ // Set True or False!!! ++ RF_Shadow[eRFPath][Offset].Recorver= Type; ++ ++} /* PHY_RFShadowRecorverFlagSet */ ++ ++ ++VOID ++PHY_RFShadowCompareFlagSetAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! ++ if (Offset != 0x26 && Offset != 0x27) ++ PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); ++ else ++ PHY_RFShadowCompareFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); ++ } ++ } ++ ++} /* PHY_RFShadowCompareFlagSetAll */ ++ ++ ++VOID ++PHY_RFShadowRecorverFlagSetAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! ++ if (Offset != 0x26 && Offset != 0x27) ++ PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _FALSE); ++ else ++ PHY_RFShadowRecorverFlagSet(Adapter, (RF_RADIO_PATH_E)eRFPath, Offset, _TRUE); ++ } ++ } ++ ++} /* PHY_RFShadowCompareFlagSetAll */ ++ ++VOID ++PHY_RFShadowRefresh( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset < RF6052_MAX_REG; Offset++) ++ { ++ RF_Shadow[eRFPath][Offset].Value = 0; ++ RF_Shadow[eRFPath][Offset].Compare = _FALSE; ++ RF_Shadow[eRFPath][Offset].Recorver = _FALSE; ++ RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; ++ RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; ++ } ++ } ++ ++} /* PHY_RFShadowRead */ ++ ++/* End of HalRf6052.c */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c +@@ -0,0 +1,876 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_REDESC_C_ ++#include ++#include ++#include ++#include ++ ++static u8 evm_db2percentage(s8 value) ++{ ++ // ++ // -33dB~0dB to 0%~99% ++ // ++ s8 ret_val; ++ ++ ret_val = value; ++ //ret_val /= 2; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val)); ++ ++ if(ret_val >= 0) ++ ret_val = 0; ++ if(ret_val <= -33) ++ ret_val = -33; ++ ++ ret_val = 0 - ret_val; ++ ret_val*=3; ++ ++ if(ret_val == 99) ++ ret_val = 100; ++ ++ return(ret_val); ++} ++ ++ ++static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig ) ++{ ++ s32 ret_sig; ++ ++#ifdef CONFIG_USB_HCI ++ if(cur_sig >= 51 && cur_sig <= 100) ++ { ++ ret_sig = 100; ++ } ++ else if(cur_sig >= 41 && cur_sig <= 50) ++ { ++ ret_sig = 80 + ((cur_sig - 40)*2); ++ } ++ else if(cur_sig >= 31 && cur_sig <= 40) ++ { ++ ret_sig = 66 + (cur_sig - 30); ++ } ++ else if(cur_sig >= 21 && cur_sig <= 30) ++ { ++ ret_sig = 54 + (cur_sig - 20); ++ } ++ else if(cur_sig >= 10 && cur_sig <= 20) ++ { ++ ret_sig = 42 + (((cur_sig - 10) * 2) / 3); ++ } ++ else if(cur_sig >= 5 && cur_sig <= 9) ++ { ++ ret_sig = 22 + (((cur_sig - 5) * 3) / 2); ++ } ++ else if(cur_sig >= 1 && cur_sig <= 4) ++ { ++ ret_sig = 6 + (((cur_sig - 1) * 3) / 2); ++ } ++ else ++ { ++ ret_sig = cur_sig; ++ } ++#else ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // Step 1. Scale mapping. ++ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. ++ // 20100426 Joseph: Modify Signal strength mapping. ++ // This modification makes the RSSI indication similar to Intel solution. ++ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. ++ if(cur_sig >= 54 && cur_sig <= 100) ++ { ++ ret_sig = 100; ++ } ++ else if(cur_sig>=42 && cur_sig <= 53 ) ++ { ++ ret_sig = 95; ++ } ++ else if(cur_sig>=36 && cur_sig <= 41 ) ++ { ++ ret_sig = 74 + ((cur_sig - 36) *20)/6; ++ } ++ else if(cur_sig>=33 && cur_sig <= 35 ) ++ { ++ ret_sig = 65 + ((cur_sig - 33) *8)/2; ++ } ++ else if(cur_sig>=18 && cur_sig <= 32 ) ++ { ++ ret_sig = 62 + ((cur_sig - 18) *2)/15; ++ } ++ else if(cur_sig>=15 && cur_sig <= 17 ) ++ { ++ ret_sig = 33 + ((cur_sig - 15) *28)/2; ++ } ++ else if(cur_sig>=10 && cur_sig <= 14 ) ++ { ++ ret_sig = 39; ++ } ++ else if(cur_sig>=8 && cur_sig <= 9 ) ++ { ++ ret_sig = 33; ++ } ++ else if(cur_sig <= 8 ) ++ { ++ ret_sig = 19; ++ } ++ } ++ else ++ { ++ // Step 1. Scale mapping. ++ if(cur_sig >= 61 && cur_sig <= 100) ++ { ++ ret_sig = 90 + ((cur_sig - 60) / 4); ++ } ++ else if(cur_sig >= 41 && cur_sig <= 60) ++ { ++ ret_sig = 78 + ((cur_sig - 40) / 2); ++ } ++ else if(cur_sig >= 31 && cur_sig <= 40) ++ { ++ ret_sig = 66 + (cur_sig - 30); ++ } ++ else if(cur_sig >= 21 && cur_sig <= 30) ++ { ++ ret_sig = 54 + (cur_sig - 20); ++ } ++ else if(cur_sig >= 5 && cur_sig <= 20) ++ { ++ ret_sig = 42 + (((cur_sig - 5) * 2) / 3); ++ } ++ else if(cur_sig == 4) ++ { ++ ret_sig = 36; ++ } ++ else if(cur_sig == 3) ++ { ++ ret_sig = 27; ++ } ++ else if(cur_sig == 2) ++ { ++ ret_sig = 18; ++ } ++ else if(cur_sig == 1) ++ { ++ ret_sig = 9; ++ } ++ else ++ { ++ ret_sig = cur_sig; ++ } ++ } ++#endif ++ ++ return ret_sig; ++} ++ ++ ++static s32 translate2dbm(u8 signal_strength_idx) ++{ ++ s32 signal_power; // in dBm. ++ ++ ++ // Translate to dBm (x=0.5y-95). ++ signal_power = (s32)((signal_strength_idx + 1) >> 1); ++ signal_power -= 95; ++ ++ return signal_power; ++} ++ ++static void query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat) ++{ ++ PHY_STS_OFDM_8192CD_T *pOfdm_buf; ++ PHY_STS_CCK_8192CD_T *pCck_buf; ++ u8 i, max_spatial_stream, evm; ++ s8 rx_pwr[4], rx_pwr_all = 0; ++ u8 pwdb_all; ++ u32 rssi,total_rssi=0; ++ u8 bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0; ++ _adapter *padapter = prframe->u.hdr.adapter; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 tmp_rxsnr; ++ s8 rx_snrX; ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat); ++ u8 bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE; ++#endif ++ ++ // Record it for next packet processing ++ bcck_rate=(pattrib->mcs_rate<=3? 1:0); ++ ++ if(bcck_rate) //CCK ++ { ++ u8 report; ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ if(bant1_sel == _TRUE) ++ pHalData->CCK_Ant1_Cnt++; ++ else ++ pHalData->CCK_Ant2_Cnt++; ++#endif ++ ++ // CCK Driver info Structure is not the same as OFDM packet. ++ pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat; ++ //Adapter->RxStats.NumQryPhyStatusCCK++; ++ ++ // ++ // (1)Hardware does not provide RSSI for CCK ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_on) ++ cck_highpwr = (u8)pHalData->bCckHighPower; ++ else ++ cck_highpwr = _FALSE; ++ ++ if(!cck_highpwr) ++ { ++ report = pCck_buf->cck_agc_rpt&0xc0; ++ report = report>>6; ++ switch(report) ++ { ++ // 03312009 modified by cosa ++ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion ++ // Note: different RF with the different RNA gain. ++ case 0x3: ++ rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x2: ++ rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x1: ++ rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x0: ++ rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ } ++ } ++ else ++ { ++ report = pCck_buf->cck_agc_rpt & 0x60; ++ report = report>>5; ++ switch(report) ++ { ++ case 0x3: ++ rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x2: ++ rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1); ++ break; ++ case 0x1: ++ rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x0: ++ rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ } ++ } ++ ++ pwdb_all= query_rx_pwr_percentage(rx_pwr_all); ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // CCK gain is smaller than OFDM/MCS gain, ++ // so we add gain diff by experiences, the val is 6 ++ pwdb_all+=6; ++ if(pwdb_all > 100) ++ pwdb_all = 100; ++ // modify the offset to make the same gain index with OFDM. ++ if(pwdb_all > 34 && pwdb_all <= 42) ++ pwdb_all -= 2; ++ else if(pwdb_all > 26 && pwdb_all <= 34) ++ pwdb_all -= 6; ++ else if(pwdb_all > 14 && pwdb_all <= 26) ++ pwdb_all -= 8; ++ else if(pwdb_all > 4 && pwdb_all <= 14) ++ pwdb_all -= 4; ++ } ++ ++ pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive ++ pattrib->RecvSignalPower = rx_pwr_all; //dBM ++ padapter->recvpriv.rxpwdb = rx_pwr_all; ++ // ++ // (3) Get Signal Quality (EVM) ++ // ++ //if(bPacketMatchBSSID) ++ { ++ u8 sq; ++ ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // mapping to 5 bars for vista signal strength ++ // signal quality in driver will be displayed to signal strength ++ // in vista. ++ if(pwdb_all >= 50) ++ sq = 100; ++ else if(pwdb_all >= 35 && pwdb_all < 50) ++ sq = 80; ++ else if(pwdb_all >= 22 && pwdb_all < 35) ++ sq = 60; ++ else if(pwdb_all >= 18 && pwdb_all < 22) ++ sq = 40; ++ else ++ sq = 20; ++ } ++ else ++ { ++ if(pwdb_all> 40) ++ { ++ sq = 100; ++ } ++ else ++ { ++ sq = pCck_buf->SQ_rpt; ++ ++ if(pCck_buf->SQ_rpt > 64) ++ sq = 0; ++ else if (pCck_buf->SQ_rpt < 20) ++ sq= 100; ++ else ++ sq = ((64-sq) * 100) / 44; ++ ++ } ++ } ++ ++ pattrib->signal_qual=sq; ++ pattrib->rx_mimo_signal_qual[0]=sq; ++ pattrib->rx_mimo_signal_qual[1]=(-1); ++ } ++ ++ } ++ else //OFDM/HT ++ { ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ if(bant1_sel == _TRUE) ++ pHalData->OFDM_Ant1_Cnt++; ++ else ++ pHalData->OFDM_Ant2_Cnt++; ++#endif ++ pdmpriv->OFDM_Pkt_Cnt++; ++ ++ pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat; ++ ++ // ++ // (1)Get RSSI per-path ++ // ++ for(i=0; iNumTotalRFPath; i++) ++ { ++ // 2008/01/30 MH we will judge RF RX path now. ++ if (pHalData->bRFPathRxEnable[i]) ++ rf_rx_num++; ++ //else ++ //continue; ++ ++ rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110; ++ padapter->recvpriv.RxRssi[i] = rx_pwr[i]; ++ /* Translate DBM to percentage. */ ++ pattrib->rx_rssi[i] = rssi = query_rx_pwr_percentage(rx_pwr[i]); ++ total_rssi += rssi; ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi)); ++ ++ //Get Rx snr value in DB ++ tmp_rxsnr = pOfdm_buf->rxsnr_X[i]; ++ rx_snrX = (s8)(tmp_rxsnr); ++ rx_snrX >>= 1; ++ padapter->recvpriv.RxSNRdB[i] = (int)rx_snrX; ++ pattrib->rx_snr[i]=pOfdm_buf->rxsnr_X[i]; ++ /* Record Signal Strength for next packet */ ++ //if(bPacketMatchBSSID) ++ { ++ //pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI; ++ ++ //The following is for lenovo signal strength in vista ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ u8 sq; ++ ++ if(i == 0) ++ { ++ // mapping to 5 bars for vista signal strength ++ // signal quality in driver will be displayed to signal strength ++ // in vista. ++ if(rssi >= 50) ++ sq = 100; ++ else if(rssi >= 35 && rssi < 50) ++ sq = 80; ++ else if(rssi >= 22 && rssi < 35) ++ sq = 60; ++ else if(rssi >= 18 && rssi < 22) ++ sq = 40; ++ else ++ sq = 20; ++ //DbgPrint("ofdm/mcs RSSI=%d\n", RSSI); ++ //pRfd->Status.SignalQuality = SQ; ++ //DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality); ++ } ++ } ++ } ++ } ++ ++ ++ // ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average ++ // ++ rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI ++ pwdb_all = query_rx_pwr_percentage(rx_pwr_all); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n", pwdb_all)); ++ ++ pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive ++ pattrib->RecvSignalPower = rx_pwr_all;//dBM ++ padapter->recvpriv.rxpwdb = rx_pwr_all; ++ // ++ // (3)EVM of HT rate ++ // ++ if(pHalData->CustomerID != RT_CID_819x_Lenovo) ++ { ++ if(pattrib->rxht && pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27) ++ max_spatial_stream = 2; //both spatial stream make sense ++ else ++ max_spatial_stream = 1; //only spatial stream 1 makes sense ++ ++ for(i=0; i>= 1" because the compilor of free build environment ++ // fill most significant bit to "zero" when doing shifting operation which may change a negative ++ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. ++ evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", ++ pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm)); ++ ++ //if(bPacketMatchBSSID) ++ { ++ if(i==0) // Fill value in RFD, Get the first spatial stream only ++ { ++ pattrib->signal_qual = (u8)(evm & 0xff); ++ } ++ pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff); ++ } ++ } ++ ++ } ++ ++ // ++ // 4. Record rx statistics for debug ++ // ++ ++ } ++ ++ ++ //UI BSS List signal strength(in percentage), make it good looking, from 0~100. ++ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). ++ if(bcck_rate) ++ { ++ pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all); ++ } ++ else ++ { ++ if (rf_rx_num != 0) ++ { ++ pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num)); ++ } ++ } ++ //DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll); ++ ++} ++ ++ ++static void process_rssi(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_rssi, tmp_val; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); ++ //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) ++ { ++ ++ #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->signal_strength; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ #else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test ++ if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; ++ last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; ++ padapter->recvpriv.signal_strength_data.total_val -= last_rssi; ++ } ++ padapter->recvpriv.signal_strength_data.total_val +=pattrib->signal_strength; ++ ++ padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength; ++ if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) ++ padapter->recvpriv.signal_strength_data.index = 0; ++ ++ ++ tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; ++ ++ if(padapter->recvpriv.is_signal_dbg) { ++ padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; ++ padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); ++ } else { ++ padapter->recvpriv.signal_strength= tmp_val; ++ padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); ++ #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ } ++ ++}// Process_UI_RSSI_8192C ++ ++ ++static void process_PWDB(_adapter *padapter, union recv_frame *prframe) ++{ ++ int UndecoratedSmoothedPWDB; ++ int UndecoratedSmoothedCCK; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct rx_pkt_attrib *pattrib= &prframe->u.hdr.attrib; ++ struct sta_info *psta = prframe->u.hdr.psta; ++ u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0); ++ ++ ++ if(psta) ++ { ++ UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK; ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; ++ UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK; ++ } ++ ++ //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) ++ ++ if(!isCCKrate) ++ { ++ // Process OFDM RSSI ++ if(UndecoratedSmoothedPWDB < 0) // initialize ++ { ++ UndecoratedSmoothedPWDB = pattrib->RxPWDBAll; ++ } ++ ++ if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB) ++ { ++ UndecoratedSmoothedPWDB = ++ ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ ++ UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = ++ ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ else ++ { ++ // Process CCK RSSI ++ if(UndecoratedSmoothedCCK < 0) // initialize ++ { ++ UndecoratedSmoothedCCK = pattrib->RxPWDBAll; ++ } ++ ++ if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK) ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ ++ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ ++ ++ if(psta) ++ { ++ //psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo: ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ if(pdmpriv->RSSI_Select == RSSI_OFDM){ ++ psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ else if(pdmpriv->RSSI_Select == RSSI_CCK){ ++ psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ } ++ else{ ++ if(UndecoratedSmoothedPWDB <0 ) ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ else ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ } ++ else ++ { ++ //pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ if(pdmpriv->RSSI_Select == RSSI_OFDM){ ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ else if(pdmpriv->RSSI_Select == RSSI_CCK){ ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ } ++ else { ++ if(UndecoratedSmoothedPWDB <0 ) ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ else ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ } ++ pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ } ++ ++ //UpdateRxSignalStatistics8192C(padapter, prframe); ++ ++} ++ ++ ++static void process_link_qual(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_evm=0, tmpVal; ++ struct rx_pkt_attrib *pattrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ if(prframe == NULL || padapter==NULL){ ++ return; ++ } ++ ++ pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ signal_stat = &padapter->recvpriv.signal_qual_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->signal_qual; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ ++#else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(pattrib->signal_qual != 0) ++ { ++ // ++ // 1. Record the general EVM to the sliding window. ++ // ++ if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; ++ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; ++ padapter->recvpriv.signal_qual_data.total_val -= last_evm; ++ } ++ padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual; ++ ++ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual; ++ if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ padapter->recvpriv.signal_qual_data.index = 0; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual)); ++ ++ // <1> Showed on UI for user, in percentage. ++ tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; ++ padapter->recvpriv.signal_qual=(u8)tmpVal; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual)); ++ } ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++}// Process_UiLinkQuality8192S ++ ++ ++static void process_phy_info(_adapter *padapter, union recv_frame *prframe) ++{ ++ union recv_frame *precvframe = (union recv_frame *)prframe; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ // If we switch to the antenna for testing, the signal strength ++ // of the packets in this time shall not be counted into total receiving power. ++ // This prevents error counting Rx signal strength and affecting other dynamic mechanism. ++ ++ // Select the packets to do RSSI checking for antenna switching. ++ SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll); ++ ++ if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE) ++ return; ++#endif ++ // ++ // Check RSSI ++ // ++ process_rssi(padapter, precvframe); ++ // ++ // Check PWDB. ++ // ++ process_PWDB(padapter, precvframe); ++ // ++ // Check EVM ++ // ++ process_link_qual(padapter, precvframe); ++ ++} ++ ++ ++void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info) ++{ ++ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; ++ _adapter *padapter = precvframe->u.hdr.adapter; ++ u8 bPacketMatchBSSID =_FALSE; ++ u8 bPacketToSelf = _FALSE; ++ u8 bPacketBeacon = _FALSE; ++ ++ if((pattrib->physt) && (pphy_info != NULL)) ++ { ++ bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !(pattrib->icv_err) && !(pattrib->crc_err) && ++ _rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_my_bssid(&padapter->mlmeextpriv.mlmext_info.network), ETH_ALEN)); ++ ++ ++ bPacketToSelf = bPacketMatchBSSID && (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN)); ++ ++ bPacketBeacon =bPacketMatchBSSID && (GetFrameSubType(precvframe->u.hdr.rx_data) == WIFI_BEACON); ++ ++ query_rx_phy_status(precvframe, pphy_info); ++ ++ precvframe->u.hdr.psta = NULL; ++ if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ u8 *sa; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sa = get_sa(precvframe->u.hdr.rx_data); ++ ++ psta = rtw_get_stainfo(pstapriv, sa); ++ if(psta) ++ { ++ precvframe->u.hdr.psta = psta; ++ process_phy_info(padapter, precvframe); ++ } ++ } ++ else if(bPacketToSelf || bPacketBeacon) ++ { ++ if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ u8 *sa; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sa = get_sa(precvframe->u.hdr.rx_data); ++ ++ psta = rtw_get_stainfo(pstapriv, sa); ++ if(psta) ++ { ++ precvframe->u.hdr.psta = psta; ++ } ++ } ++ ++ process_phy_info(padapter, precvframe); ++ } ++ } ++} ++ ++void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc) ++{ ++ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; ++ ++ //Offset 0 ++ pattrib->physt = (u8)((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1); ++ pattrib->pkt_len = (u16)(le32_to_cpu(pdesc->rxdw0)&0x00003fff); ++ pattrib->drvinfo_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes ++ ++ pattrib->shift_sz = (u8)((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3); ++ ++ pattrib->crc_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1); ++ pattrib->icv_err = (u8)((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1); ++ pattrib->qos = (u8)(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26 ++ pattrib->bdecrypted = (le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1; ++ ++ //Offset 4 ++ pattrib->mfrag = (u8)((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit ++ ++ //Offset 8 ++ pattrib->frag_num = (u8)((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number ++ ++ //Offset 12 ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( le32_to_cpu(pdesc->rxdw3) & BIT(13)){ ++ pattrib->tcpchk_valid = 1; // valid ++ if ( le32_to_cpu(pdesc->rxdw3) & BIT(11) ) { ++ pattrib->tcp_chkrpt = 1; // correct ++ //DBG_8192C("tcp csum ok\n"); ++ } ++ else ++ pattrib->tcp_chkrpt = 0; // incorrect ++ ++ if ( le32_to_cpu(pdesc->rxdw3) & BIT(12) ) ++ pattrib->ip_chkrpt = 1; // correct ++ else ++ pattrib->ip_chkrpt = 0; // incorrect ++ } ++ else { ++ pattrib->tcpchk_valid = 0; // invalid ++ } ++#endif ++ ++ pattrib->mcs_rate=(u8)((le32_to_cpu(pdesc->rxdw3))&0x3f); ++ pattrib->rxht=(u8)((le32_to_cpu(pdesc->rxdw3) >>6)&0x1); ++ pattrib->sgi=(u8)((le32_to_cpu(pdesc->rxdw3) >>8)&0x1); ++ //Offset 16 ++ //Offset 20 ++ ++} ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c +@@ -0,0 +1,94 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#include ++#include ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtl8192c_sreset_xmit_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ unsigned long current_time; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ unsigned int diff_time; ++ u32 txdma_status; ++ if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ ++ DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); ++ rtw_hal_sreset_reset(padapter); ++ } ++ ++ //total xmit irp = 4 ++ //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); ++ //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) ++ current_time = rtw_get_current_time(); ++ ++ if(0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { ++ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); ++ ++ if (diff_time > 2000) { ++ if (psrtpriv->last_tx_complete_time == 0) { ++ psrtpriv->last_tx_complete_time = current_time; ++ } ++ else{ ++ diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); ++ if (diff_time > 4000) { ++ //padapter->Wifi_Error_Status = WIFI_TX_HANG; ++ DBG_871X("%s tx hang\n", __FUNCTION__); ++ rtw_hal_sreset_reset(padapter); ++ } ++ } ++ } ++ } ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++void rtl8192c_sreset_linked_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u32 regc50,regc58,reg824,reg800; ++ regc50 = rtw_read32(padapter,0xc50); ++ regc58 = rtw_read32(padapter,0xc58); ++ reg824 = rtw_read32(padapter,0x824); ++ reg800 = rtw_read32(padapter,0x800); ++ if( ((regc50&0xFFFFFF00)!= 0x69543400)|| ++ ((regc58&0xFFFFFF00)!= 0x69543400)|| ++ (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| ++ ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) ++ { ++ DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, ++ regc50, regc58, reg824, reg800); ++ rtw_hal_sreset_reset(padapter); ++ } ++ ++ if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { ++ psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; ++ rtw_hal_sreset_reset(padapter); ++ return; ++ } ++} ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/rtl8192c_xmit.c +@@ -0,0 +1,63 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_XMIT_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_8192c(void *buf) ++{ ++ struct txrpt_ccx_8192c *txrpt_ccx = buf; ++ ++ DBG_871X("%s:\n" ++ "retry_cnt:%u, rsvd_0:%u, rts_retry_cnt:%u, rsvd_1:%u\n" ++ "ccx_qtime:%u, missed_pkt_num:%u, rsvd_4:%u\n" ++ "mac_id:%u, des1_fragssn:%u\n" ++ "rpt_pkt_num:%u, pkt_drop:%u, lifetime_over:%u, retry_over:%u\n" ++ "edca_tx_queue:%u, rsvd_7:%u, bmc:%u, pkt_ok:%u, init_ccx:%u\n" ++ , __func__ ++ , txrpt_ccx->retry_cnt, txrpt_ccx->rsvd_0, txrpt_ccx->rts_retry_cnt, txrpt_ccx->rsvd_1 ++ , txrpt_ccx_qtime_8192c(txrpt_ccx), txrpt_ccx->missed_pkt_num, txrpt_ccx->rsvd_4 ++ , txrpt_ccx->mac_id, txrpt_ccx->des1_fragssn ++ , txrpt_ccx->rpt_pkt_num, txrpt_ccx->pkt_drop, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over ++ , txrpt_ccx->edca_tx_queue, txrpt_ccx->rsvd_7, txrpt_ccx->bmc, txrpt_ccx->pkt_ok, txrpt_ccx->int_ccx ++ ); ++} ++ ++void handle_txrpt_ccx_8192c(_adapter *adapter, void *buf) ++{ ++ struct txrpt_ccx_8192c *txrpt_ccx = buf; ++ ++ #ifdef DBG_CCX ++ dump_txrpt_ccx_8192c(buf); ++ #endif ++ ++ if (txrpt_ccx->int_ccx) { ++ if (txrpt_ccx->pkt_ok) ++ rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); ++ else ++ rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); ++ } ++} ++#endif //CONFIG_XMIT_ACK ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c +@@ -0,0 +1,8758 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/*Created on 2011/ 6/15, 5:45*/ ++ ++#include ++#include "Hal8192CUHWImg.h" ++ ++#ifdef CONFIG_BT_COEXISTENCE ++// =================== v84 TSMC COMMON 2012-04-13 ======================= ++u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x54,0x00,0x01,0x00,0x04,0x13,0x11,0x07,0x3a,0x3d,0x00,0x00, ++0x58,0x97,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x50,0xa1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0x91,0x00,0x00,0x00,0x00,0x00,0xa1,0xe8,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x48,0x29, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x77, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x54,0x80,0x41,0x9e,0xb0,0x00,0x00,0xf0,0x90, ++0x9e,0x5d,0xe0,0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x85,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5, ++0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x85,0xf0,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x86, ++0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x5e,0x90,0x01,0x5f,0x74,0x05,0xf0, ++0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x63,0x14,0xf0,0xe5,0x61,0x54,0x0f,0xc3, ++0x94,0x0c,0x50,0x03,0x12,0x54,0xe3,0x22,0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4, ++0xf0,0x22,0xe4,0xf5,0x65,0x7f,0x60,0x7e,0x01,0x80,0xed,0x7d,0x01,0xaf,0x62,0x02, ++0x54,0xe7,0xb1,0xb0,0xbf,0x01,0x12,0x90,0x9e,0x79,0xe0,0xff,0xe4,0xfd,0xf1,0x79, ++0x12,0x5f,0xf7,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xb1,0xb0,0xbf,0x01,0x0f,0x90, ++0x02,0x09,0xe0,0xff,0x7d,0x01,0xf1,0x79,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x22, ++0x22,0x22,0x00,0x02,0x45,0x03,0x02,0x45,0x06,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x20,0x8a,0x21,0x89,0x22,0x90,0x9e,0x87,0x71,0x8b,0xab,0x23,0xaa,0x24,0xa9, ++0x25,0x90,0x9e,0x8a,0x71,0x8b,0xaf,0x26,0x15,0x26,0xef,0x60,0x1b,0x90,0x9e,0x8a, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x87,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x20,0xaa,0x21,0xa9,0x22,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x9e,0x11,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0x90,0x06,0xa9, ++0xe0,0x90,0x9e,0x10,0xf0,0xe0,0x54,0xc0,0x70,0x08,0x53,0x64,0xfe,0x53,0x64,0xfd, ++0x91,0xcb,0x90,0x9e,0x10,0xe0,0x30,0xe6,0x13,0x43,0x64,0x01,0x90,0x9e,0x66,0xe0, ++0x64,0x02,0x60,0x04,0x91,0xd2,0x80,0x07,0x91,0x79,0x80,0x03,0x53,0x64,0xfe,0x90, ++0x9e,0x10,0xe0,0x30,0xe7,0x16,0x43,0x64,0x02,0xe4,0x90,0x9e,0x85,0x91,0x4e,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x67,0x74,0x01,0xf0,0x22,0x53,0x64,0xfd,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4,0x74,0xb0,0xf0,0x74,0x45,0xa3, ++0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90, ++0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80, ++0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82, ++0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0x75,0x13,0x00,0x90,0x01,0xc4,0x74,0xe8,0xf0,0x74,0x45, ++0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55, ++0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5, ++0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x09,0x90, ++0x01,0x3c,0x74,0x02,0xf0,0x12,0x61,0xc9,0xe5,0x34,0x30,0xe2,0x38,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x85,0xe4,0xf0,0x90, ++0x9e,0x5b,0xe0,0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x91,0x5e, ++0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x07,0x90,0x9e, ++0x64,0xe4,0xf0,0x91,0xcb,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c,0x74,0x08,0xf0, ++0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x85,0xe4,0xf0,0x90,0x9e,0x5b,0xe0, ++0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x5e,0x90,0x01,0x5f, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e,0x63,0xe4,0xf0, ++0x91,0xcb,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x4b,0xfb, ++0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4c,0x3d,0xe5,0x35, ++0x30,0xe0,0x44,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0, ++0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x13,0xb4,0x01,0x02,0x80,0x1c,0xe5,0x13,0xb4, ++0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x13,0xb4,0x04,0x05,0x90,0x00,0x83,0x80, ++0x08,0xe5,0x13,0xb4,0x0c,0x06,0x90,0x00,0x83,0xe0,0xf5,0x62,0x90,0x01,0xbb,0xe5, ++0x62,0xf0,0x12,0x60,0xc0,0x91,0xcb,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74, ++0x04,0xf0,0xe5,0x35,0x30,0xe4,0x06,0x90,0x01,0x3d,0x74,0x10,0xf0,0xe5,0x36,0x30, ++0xe0,0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e, ++0x74,0x02,0xf0,0x74,0xe8,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x9e,0x98,0xef,0xf0,0xa3,0xed, ++0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x63,0x60,0x05,0xe4,0xff,0x12,0x54,0x97,0x90, ++0x9e,0x98,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9a,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90, ++0x9e,0x98,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90, ++0x9e,0x99,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9a,0xa3,0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54, ++0xf7,0xf0,0x90,0x9e,0x9a,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0x75,0x28,0x33,0xe4,0xf5, ++0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0, ++0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x16,0xf0,0xa3,0xf0, ++0x75,0x8e,0x02,0xf1,0xa1,0xf1,0xe9,0x90,0x9e,0x7e,0xef,0xf0,0xf1,0xdd,0x90,0x9e, ++0x80,0xef,0xf0,0xf1,0xf6,0x90,0x9e,0x75,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5,0x57, ++0x12,0x6e,0x77,0xf1,0xd4,0x12,0x60,0x4b,0x12,0x32,0x3d,0xf1,0xc9,0x11,0x0b,0x12, ++0x50,0x0e,0xf1,0xcd,0xf1,0xb1,0x12,0x44,0xff,0xf1,0x45,0x90,0x9e,0x18,0xe5,0xd9, ++0xf0,0x11,0xd0,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0xb1,0x45,0x75,0xe8, ++0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x9e,0x16,0xe0,0x64,0x01,0xf0,0x24,0x29,0x90, ++0x01,0xc4,0xf0,0x74,0x48,0xa3,0xf0,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57, ++0xef,0xd2,0xaf,0x12,0x58,0x74,0xe5,0x57,0x30,0xe6,0x17,0xc2,0xaf,0x53,0x57,0xbf, ++0xd2,0xaf,0x12,0x67,0xa1,0x90,0x9e,0x43,0xe0,0xff,0x60,0x03,0xb4,0x01,0x03,0x12, ++0x7b,0x5c,0x90,0x9e,0x43,0xe0,0x70,0x03,0x12,0x7c,0x5f,0x12,0x73,0x85,0x80,0xb6, ++0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0x31,0x05,0x7d,0xff,0x7f,0x55,0x31,0x05,0x7d, ++0xff,0x7f,0x56,0x31,0x05,0x7d,0xff,0x7f,0x57,0x80,0x0a,0xf0,0x90,0x00,0x45,0xe0, ++0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83, ++0x00,0xed,0xf0,0xb1,0x45,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60, ++0x66,0x24,0x02,0x60,0x02,0x21,0xc1,0x90,0x9e,0x3f,0x74,0x02,0xf0,0x90,0x00,0x48, ++0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x31,0x05,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f, ++0x47,0x31,0x05,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90, ++0x9e,0x3f,0xf0,0x90,0x9e,0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x31, ++0x05,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x46,0xe0, ++0x44,0x10,0xfd,0x7f,0x46,0x80,0x38,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x90,0x9e,0x45, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x00,0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x45,0xe0,0x44, ++0x10,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x31, ++0x05,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x41,0xf0,0x90,0x00,0x01,0x12, ++0x42,0x20,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x40,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25, ++0xe0,0x90,0x9e,0x44,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x4f,0xf0,0x90,0x05,0x61, ++0xe0,0x90,0x9e,0x50,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x51,0xf0,0x90,0x05,0x63, ++0xe0,0x90,0x9e,0x52,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x90, ++0x9e,0x40,0xe0,0xff,0x91,0xf0,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e, ++0x41,0xe0,0x70,0x02,0x41,0xc8,0x90,0x9e,0x40,0xe0,0x70,0x02,0x41,0xc8,0x90,0x9e, ++0x44,0xe0,0x70,0x02,0x41,0xc8,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf, ++0x90,0x9e,0x53,0x74,0x01,0xf0,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x11,0xfc, ++0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x31,0x05,0x90,0x9e,0x39,0xe0,0x60, ++0x15,0x90,0x9e,0x45,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e, ++0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0, ++0x54,0xef,0xfd,0x7f,0x45,0x31,0x05,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e, ++0x4f,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x50,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e, ++0x51,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x52,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d, ++0x20,0xe4,0xff,0x12,0x37,0x00,0x80,0x2b,0x90,0x9e,0x41,0xe0,0x70,0x2d,0x90,0x9e, ++0x53,0x11,0xfb,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x31,0x05,0x90,0x05, ++0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff, ++0x12,0x36,0x92,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x14,0x8a,0x15, ++0x89,0x16,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x42,0xf0,0xe0,0x30,0xe0,0x4b, ++0x90,0x9e,0x39,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x3b, ++0x12,0x2a,0x7f,0xab,0x14,0xaa,0x15,0xa9,0x16,0x90,0x00,0x01,0x12,0x42,0x20,0xff, ++0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0x90,0x9e,0x3b,0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e, ++0x45,0x12,0x2a,0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x39,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90, ++0x9e,0x3b,0x12,0x2a,0x7f,0x90,0x9e,0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x42,0xe0,0x30,0xe1,0x19,0x7d, ++0x0c,0x7f,0x47,0x31,0x05,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x31,0x05, ++0x90,0x00,0x46,0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f, ++0x47,0x31,0x05,0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x31,0x05,0x90,0x00, ++0x46,0xe0,0x54,0xef,0xfd,0x7f,0x46,0x31,0x05,0xe4,0x90,0x9e,0x3f,0xf0,0x22,0x90, ++0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x31,0x05,0xe4,0xfd,0x7f,0x51,0x31,0x05,0xe4, ++0xfd,0x7f,0x52,0x31,0x05,0xe4,0xfd,0x7f,0x53,0x21,0x05,0xe5,0x65,0x64,0x01,0x70, ++0x3b,0xd1,0x85,0xbf,0x01,0x04,0x7f,0x01,0xd1,0x79,0x90,0x00,0x46,0xe0,0x44,0x04, ++0xfd,0x7f,0x46,0x31,0x05,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x31,0x05, ++0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x31,0x05,0x7f,0x02,0xd1,0xa1,0x8f, ++0x69,0x90,0x01,0xc9,0xe5,0x69,0xf0,0xb4,0x01,0x02,0xd1,0x19,0x22,0x90,0x9e,0x41, ++0xe0,0x64,0x01,0x60,0x02,0x81,0xef,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46, ++0x31,0x05,0x90,0x9e,0x53,0xe0,0x70,0x31,0x90,0x9e,0x39,0xe0,0x60,0x15,0x90,0x9e, ++0x45,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f, ++0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x9e,0x40,0xe0,0xff,0x91,0xf0, ++0x90,0x9e,0x53,0x74,0x01,0x11,0xfb,0x80,0x3f,0x90,0x9e,0x53,0xe0,0x64,0x01,0x70, ++0x37,0x90,0x9e,0x44,0xe0,0xff,0x91,0xf0,0xe4,0x90,0x9e,0x53,0xf0,0x90,0x00,0x45, ++0xe0,0x44,0x01,0xfd,0x7f,0x45,0x31,0x05,0x90,0x9e,0x39,0xe0,0x60,0x15,0x90,0x9e, ++0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f, ++0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90, ++0x9e,0x4f,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x50,0xe0,0x90,0x05,0x85,0xf0,0x90, ++0x9e,0x51,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x52,0xe0,0x90,0x05,0x87,0xf0,0x22, ++0x90,0x05,0x60,0xe0,0x90,0x9e,0x4f,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x50,0xf0, ++0x90,0x05,0x62,0xe0,0x90,0x9e,0x51,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x52,0xf0, ++0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x50,0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0, ++0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90, ++0x9e,0x52,0x80,0x03,0x90,0x9e,0x51,0xe0,0x04,0xf0,0x22,0x90,0x9e,0x50,0xe0,0x2f, ++0xf0,0x22,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf,0xfe, ++0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x2a,0xed, ++0xf0,0x90,0x9e,0x29,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90, ++0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4, ++0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0, ++0xb1,0x45,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x59,0x90,0x9e,0x29,0xe0,0x24,0xf8,0xf0, ++0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80, ++0x1a,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0xb1,0x45,0x90,0x9e,0x29, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x43,0xb1,0x42,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,0xb1, ++0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x31,0x05,0x90,0x9e,0xb1,0xe0, ++0x44,0xb0,0xfd,0x7f,0x49,0x21,0x05,0x90,0x9e,0x27,0xee,0xf0,0xa3,0xef,0xf0,0x75, ++0x65,0x01,0x8e,0x66,0xf5,0x67,0xe4,0xfd,0x7f,0x0b,0xb1,0x55,0xe4,0xfd,0x7f,0x02, ++0xb1,0x55,0xd1,0x85,0xe4,0xff,0xd1,0x79,0xe4,0xf5,0x69,0x90,0x01,0xc9,0xe5,0x69, ++0xf0,0x90,0x9e,0x27,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45, ++0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0x90,0x01,0xca,0xe5,0x68,0xf0,0xef, ++0x60,0x02,0xd1,0x19,0x22,0x7f,0x0b,0xd1,0xa1,0xef,0x65,0x68,0x60,0x10,0xe5,0x68, ++0xb4,0x01,0x05,0xe4,0xf5,0x68,0x80,0x03,0x75,0x68,0x01,0x7f,0x01,0x22,0x7f,0x00, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07, ++0x50,0x43,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4, ++0xff,0x90,0x00,0x46,0xb1,0x42,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8, ++0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0, ++0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13, ++0xd8,0xf8,0xff,0x80,0x4b,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f, ++0xf0,0xb1,0x45,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe, ++0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff, ++0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x31,0x05,0x90,0x04,0xfd,0xe4,0xf0, ++0xa3,0xf0,0x90,0x9e,0x43,0xf0,0x90,0x9e,0x49,0xf0,0x90,0x9e,0x4c,0xf0,0x90,0x9e, ++0x4a,0xf0,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4b,0xf0,0x90,0x9e,0x4e,0xf0,0x90,0x9e, ++0x35,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x3a,0xf0,0x90,0x9e, ++0x3f,0xf0,0x90,0x9e,0x41,0xf0,0x90,0x9e,0x53,0xf0,0x90,0x9e,0x44,0xf0,0x90,0x9e, ++0x40,0xf0,0x90,0x9e,0x39,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x21, ++0x05,0xe4,0x90,0x9e,0x7d,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x21, ++0x05,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0xe4,0xf5,0x68,0x22,0x90,0x01,0x64, ++0x74,0xa0,0xf0,0x22,0x90,0x9e,0x80,0xe0,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0xf3, ++0xe0,0x7f,0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f, ++0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2, ++0xe0,0x30,0xe7,0x05,0x7e,0xfd,0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x90,0x00, ++0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3, ++0xe4,0xf0,0x22,0x90,0x01,0x02,0xe0,0x54,0x03,0xff,0xe0,0x54,0x0c,0x13,0x13,0x54, ++0x3f,0xfe,0xef,0x64,0x01,0x60,0x04,0xef,0xb4,0x03,0x10,0x90,0x9e,0x10,0x74,0x01, ++0xf0,0xa3,0x74,0x37,0xf0,0xa3,0x74,0x01,0xf0,0x80,0x1a,0xee,0x64,0x01,0x60,0x07, ++0xaf,0x06,0xee,0x64,0x03,0x70,0x49,0x90,0x9e,0x10,0x74,0x01,0xf0,0xa3,0x74,0x3d, ++0xf0,0xa3,0x74,0x40,0xf0,0x90,0x9e,0x10,0xe0,0xfe,0xa3,0xe0,0xff,0xf5,0x82,0x8e, ++0x83,0xe0,0xfd,0x90,0x9e,0x12,0xe0,0xfc,0xed,0x5c,0x60,0x0c,0x8f,0x82,0x8e,0x83, ++0xec,0xf0,0xe4,0x90,0x9e,0x77,0xf0,0x22,0x90,0x9e,0x77,0xe0,0x04,0xf0,0xe0,0xc3, ++0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x44,0xea, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0xa1,0xf0,0x74,0x50,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c, ++0xa3,0xe0,0x55,0x29,0xf5,0x2d,0xa3,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b, ++0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x46,0x90,0x01,0x34,0x74,0x01,0xf0,0x85, ++0xd1,0x4d,0x85,0xd2,0x4e,0x85,0xd3,0x4f,0x85,0xd4,0x50,0x85,0xd5,0x51,0x85,0xd6, ++0x52,0x85,0xd7,0x53,0x85,0xd9,0x54,0xe5,0x54,0x54,0x40,0xc3,0x13,0xff,0xe5,0x53, ++0x54,0x20,0x6f,0x70,0x02,0x21,0xf5,0xe5,0x54,0x30,0xe5,0x02,0x21,0xf5,0xe5,0x52, ++0x54,0x3f,0xf5,0x08,0xe5,0x4d,0x54,0x3f,0xf5,0x09,0xe5,0x51,0x54,0x1f,0xff,0xe5, ++0x08,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x09,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x09,0x04,0x75,0xf0,0x0a,0xe5,0x08,0x90,0x90,0x00,0x12,0x43,0x5f,0x75, ++0xf0,0x02,0xe5,0x09,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x53,0x54,0x1f, ++0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x08,0x90,0x90,0x00,0x12,0x43,0x5f, ++0x75,0xf0,0x02,0xe5,0x09,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x54,0x20, ++0xe6,0x24,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4f,0x30,0xe7,0x36,0xaf, ++0x08,0x12,0x63,0x51,0x80,0x2f,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24, ++0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4f, ++0x30,0xe7,0x12,0xe5,0x4f,0x54,0x7f,0xfd,0xe5,0x53,0x54,0x1f,0xf5,0x0d,0xab,0x09, ++0xaf,0x08,0x12,0x62,0xee,0xe5,0x63,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90,0x9e, ++0x66,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x71, ++0xc3,0xef,0x64,0x01,0x70,0x30,0x90,0x9e,0x85,0xf0,0x90,0x9e,0x5b,0xe0,0x90,0x9e, ++0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x5e,0x90,0x01,0x5b,0x74, ++0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x9e,0x64,0xf0,0x80,0x08,0x71,0xc3, ++0xbf,0x01,0x03,0x12,0x44,0xcb,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02, ++0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5,0x5c, ++0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0xd2,0xe5,0x2c,0x30,0xe3,0x06, ++0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10, ++0xf0,0x43,0x57,0x10,0xe5,0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f, ++0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00, ++0x12,0x4b,0xcf,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4d,0x45,0x80,0xfe,0xe5, ++0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x12,0x90, ++0x9e,0x7f,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x61,0x4e,0x90,0x9e,0x7f,0xe4, ++0xf0,0xe5,0x2e,0x30,0xe1,0x0b,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x11, ++0x23,0xe5,0x2e,0x30,0xe2,0x09,0x90,0x01,0x36,0x74,0x04,0xf0,0x12,0x60,0xdf,0xe5, ++0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x60,0x64,0x01,0x70,0x1c, ++0xe5,0x63,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90, ++0x9e,0x85,0xe4,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x60,0xb4,0x01,0x20,0xe5,0x63,0x60,0x1c, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x67,0xe4,0xf0, ++0x53,0x64,0xfd,0xe5,0x64,0x54,0x07,0x70,0x03,0x12,0x44,0xcb,0xe5,0x2e,0x30,0xe5, ++0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x60,0xb4,0x01,0x14,0xe5,0x63,0x60,0x10, ++0x90,0x9e,0x66,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xd2,0x80,0x03,0x12,0x44,0x79, ++0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x60,0xb4,0x01,0x10, ++0xe5,0x63,0x60,0x0c,0x53,0x64,0xfe,0xe5,0x64,0x54,0x07,0x70,0x03,0x12,0x44,0xcb, ++0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x91,0x64,0x74,0xa1,0x04, ++0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0, ++0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f, ++0x00,0x22,0x90,0x9e,0x10,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0, ++0x7b,0x00,0x7a,0x00,0x79,0x58,0x90,0x9e,0x90,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79, ++0x10,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x8d,0x12,0x43,0x8b,0x90,0x9e, ++0xb0,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01, ++0x12,0x71,0x7a,0xef,0x60,0x49,0x90,0x9e,0x8d,0x12,0x43,0x6b,0x8b,0x23,0x8a,0x24, ++0x89,0x25,0x75,0x26,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e, ++0x90,0x12,0x43,0x6b,0x8b,0x23,0x8a,0x24,0x89,0x25,0x90,0x9e,0x8d,0x12,0x43,0x6b, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x26,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12, ++0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0, ++0xd0,0x92,0xaf,0x22,0x90,0x9e,0xa0,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x63, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x1f,0x90,0x9e,0x66,0xe0,0x60,0x06,0x7d,0x01,0x7f, ++0x0c,0x80,0x0d,0xe5,0x61,0x54,0x0f,0xc3,0x94,0x04,0x50,0x06,0x7d,0x01,0x7f,0x04, ++0x91,0xe7,0xe4,0xff,0x91,0x97,0x22,0xef,0x60,0x0b,0x90,0x9e,0x80,0xe0,0xb4,0x01, ++0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x75, ++0xa5,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x74, ++0x12,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36, ++0xe6,0xe5,0x63,0x60,0x04,0x7f,0x01,0x91,0x97,0x12,0x74,0xd2,0x53,0x61,0xf0,0x43, ++0x61,0x02,0x22,0x7d,0x01,0x7f,0x0c,0x8f,0x6a,0x8d,0x6b,0xe5,0x6a,0x54,0x0f,0xff, ++0xe5,0x61,0x54,0x0f,0x6f,0x60,0x65,0xe5,0x6a,0x30,0xe2,0x28,0xe5,0x61,0x20,0xe2, ++0x04,0x7f,0x01,0xd1,0xc2,0xe5,0x61,0x30,0xe3,0x0c,0xe5,0x6a,0x20,0xe3,0x07,0xb1, ++0x5d,0xef,0x60,0x48,0xa1,0xa5,0xe5,0x61,0x20,0xe3,0x41,0xe5,0x6a,0x30,0xe3,0x3c, ++0xaf,0x6b,0xc1,0xdc,0xe5,0x61,0x54,0x0f,0xff,0xbf,0x0c,0x0c,0xe5,0x6a,0x20,0xe3, ++0x07,0xb1,0x5d,0xef,0x60,0x26,0xb1,0xa5,0xe5,0x61,0x54,0x0f,0xff,0xbf,0x04,0x0c, ++0xe5,0x6a,0x20,0xe2,0x07,0xf1,0x21,0xef,0x60,0x12,0x91,0xb2,0xe5,0x61,0x54,0x0f, ++0xff,0xbf,0x02,0x08,0x12,0x60,0xbd,0xef,0x60,0x02,0xd1,0xaf,0x22,0x71,0xc3,0xef, ++0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x9e,0x64,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x9e,0x63,0xe0,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x62,0x54,0x0f,0xd3,0x94,0x04,0x40, ++0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74, ++0x08,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x60,0xb4,0x01, ++0x04,0x7f,0x01,0xd1,0xf6,0x53,0x61,0xf0,0x43,0x61,0x04,0x22,0xef,0x64,0x01,0x70, ++0x2e,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x91,0xe3,0xe4,0xff,0x91,0x97, ++0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90, ++0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7b,0xff,0x12,0x36,0xe6,0x7d, ++0x02,0x7f,0x03,0x12,0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a, ++0xe0,0x44,0x07,0xf0,0x12,0x62,0x4c,0xe5,0x60,0x20,0xe0,0x05,0xe4,0x90,0x9e,0x58, ++0xf0,0x22,0x8b,0x14,0x8a,0x15,0x89,0x16,0x12,0x60,0xb1,0xab,0x14,0xaa,0x15,0xa9, ++0x16,0x12,0x29,0xd9,0xf5,0x63,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24, ++0x03,0x70,0x40,0x7f,0x01,0x80,0x3a,0xab,0x14,0xaa,0x15,0xa9,0x16,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0xe4,0xff,0xd1,0x84,0x80,0x27,0xab,0x14,0xaa,0x15,0xa9,0x16, ++0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0xd1,0x84,0x1f,0x80,0x13,0xab,0x14, ++0xaa,0x15,0xa9,0x16,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0xd1,0x84,0xe4, ++0xff,0xb1,0xbc,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x65,0x74, ++0x01,0xf0,0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x62,0xe0,0x90,0x9e,0x65,0xf0,0x80, ++0x05,0x90,0x9e,0x65,0xed,0xf0,0x90,0x9e,0x65,0xe0,0x90,0x9e,0x56,0xf0,0x22,0x53, ++0x61,0xf0,0x43,0x61,0x01,0x12,0x45,0x00,0x12,0x45,0x01,0x53,0x61,0xf0,0x43,0x61, ++0x02,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x12,0x74,0x53,0x90,0x9e,0xaf,0xe0,0x60,0x05, ++0x90,0x05,0x22,0xe4,0xf0,0x53,0x61,0xf0,0x43,0x61,0x04,0x22,0x90,0x06,0x04,0xe0, ++0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x60,0xb4,0x01,0x04,0xe4,0xff,0xd1,0xf6,0x53, ++0x61,0xf0,0x43,0x61,0x0c,0x22,0x8f,0x27,0x12,0x45,0xb0,0xbf,0x01,0x22,0x90,0x9e, ++0x7a,0xe0,0xff,0x7d,0x01,0x12,0x47,0x79,0xab,0x07,0xaa,0x06,0xad,0x03,0xac,0x02, ++0xaf,0x27,0x12,0x60,0x2a,0xaf,0x03,0x12,0x5f,0xf7,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x71,0xc3,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x58, ++0xe5,0x64,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a,0xe5,0x62, ++0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x39,0xe5, ++0x64,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x64,0x30,0xe4, ++0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x9e,0x58,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x9e,0x5e,0xe0,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0x91,0xf0,0x74,0x57,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff, ++0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0,0xff,0x90,0x00,0x56,0xe0, ++0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55,0x74,0x10,0xf0,0xe5,0x3d, ++0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d,0x30,0xe6,0x1b,0x90,0x00, ++0x55,0x74,0x40,0xf0,0x90,0x9e,0x42,0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x9e, ++0x3f,0xe0,0x60,0x05,0x7f,0x01,0x12,0x49,0x1a,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00, ++0x55,0x74,0x80,0xf0,0x90,0x9e,0x42,0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02, ++0x12,0x49,0x1a,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56,0x74,0x01,0xf0,0xe5,0x3e, ++0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e,0x30,0xe2,0x06,0x90,0x00, ++0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00,0x56,0x74,0x08,0xf0,0x90, ++0x01,0xc4,0x74,0x91,0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0x19,0xe0,0xfd,0x70,0x02,0x21,0xb5,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00, ++0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70, ++0x02,0x21,0xae,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f, ++0xe0,0x90,0x9e,0x1a,0xf0,0x75,0x23,0x01,0x75,0x24,0x9e,0x75,0x25,0x1a,0x75,0x26, ++0x01,0x7b,0x01,0x7a,0x9e,0x79,0x1b,0x12,0x45,0x09,0x90,0x9e,0x1b,0xe0,0xff,0xc4, ++0x13,0x13,0x13,0x54,0x01,0x90,0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90, ++0x00,0x88,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0, ++0x02,0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1d,0xf0,0x90,0x9e,0xae,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1e,0xf0,0x90,0x9e, ++0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1f,0xf0, ++0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x20,0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90, ++0x9e,0x1c,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f, ++0xe0,0x90,0x9e,0x1d,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12, ++0x43,0x5f,0xe0,0x90,0x9e,0x1e,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79, ++0x1c,0x31,0xb6,0x90,0x9e,0x19,0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8, ++0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0xae,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01, ++0xcc,0xf0,0x90,0x9e,0xae,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x7e,0x90,0x01, ++0xc6,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x21,0x12,0x43,0x8b,0xef,0x12,0x43,0x94, ++0x59,0xfc,0x01,0x59,0xf4,0x02,0x5a,0x20,0x03,0x5a,0x29,0x05,0x5a,0x32,0x06,0x5a, ++0x7e,0x07,0x5a,0x3a,0x09,0x5a,0x43,0x0b,0x5a,0x4c,0x0c,0x5a,0x55,0x0d,0x5a,0x5e, ++0x0e,0x5a,0x67,0x1b,0x5a,0x6f,0x1c,0x5a,0x05,0x2d,0x5a,0x0e,0x2e,0x5a,0x17,0x3b, ++0x00,0x00,0x5a,0x77,0x90,0x9e,0x21,0x12,0x43,0x6b,0xe1,0xe9,0x90,0x9e,0x21,0x12, ++0x43,0x6b,0x02,0x71,0xd0,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0x0b,0x90,0x9e, ++0x21,0x12,0x43,0x6b,0x02,0x72,0x53,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0x8c, ++0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0xb6,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02, ++0x70,0x4a,0x90,0x9e,0x21,0x12,0x43,0x6b,0x80,0x45,0x90,0x9e,0x21,0x12,0x43,0x6b, ++0x02,0x72,0xfe,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x70,0xa2,0x90,0x9e,0x21,0x12, ++0x43,0x6b,0x02,0x49,0xc2,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x7b,0x29,0x90,0x9e, ++0x21,0x12,0x43,0x6b,0x02,0x4a,0xfc,0x90,0x9e,0x21,0x12,0x43,0x6b,0xe1,0xef,0x90, ++0x9e,0x21,0x12,0x43,0x6b,0xe1,0xd1,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90, ++0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07, ++0xfd,0xaf,0x06,0x90,0x9e,0x24,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90, ++0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f, ++0x90,0x9e,0x29,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54, ++0x03,0x90,0x9e,0x2a,0xf0,0x90,0x9e,0x24,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,0x46, ++0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x2b,0xec,0xf0,0xa3,0xed,0xf0,0xef, ++0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12, ++0x43,0x8b,0x90,0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f, ++0xff,0x90,0x9e,0x2d,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x26,0x12,0x43, ++0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x2d,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42, ++0x20,0xff,0x90,0x9e,0x2b,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0, ++0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x29,0xe0,0xfe,0x90,0x9e, ++0x24,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,0x9e, ++0x25,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,0x75, ++0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x2a,0xe0, ++0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x14,0xef, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x16,0x8f,0x17,0xe5, ++0x14,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x18,0x01,0xf5, ++0x19,0x89,0x1a,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,0x82, ++0x85,0x83,0x1b,0x8f,0x1c,0xe5,0x14,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96, ++0x35,0xf0,0x75,0x1d,0x01,0xf5,0x1e,0x89,0x1f,0x74,0x82,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x5c,0x0d,0x00,0x5c,0x22,0x01,0x5c,0x37, ++0x02,0x5c,0x4c,0x03,0x5c,0x75,0x04,0x5c,0x8a,0x05,0x5c,0x9f,0x06,0x5c,0xc5,0x0c, ++0x5c,0xf2,0x0d,0x5d,0x1f,0x0e,0x5d,0x4c,0x0f,0x00,0x00,0x5d,0x80,0xe5,0x14,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15, ++0x80,0x3c,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74, ++0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x14,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5, ++0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3, ++0x74,0x8f,0xf0,0xa1,0x80,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x14,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5, ++0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0x74, ++0x0d,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xa1,0x80,0x90,0x04,0x47,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12, ++0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12, ++0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x44, ++0xa1,0x77,0x90,0x04,0x4b,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90, ++0x04,0x4a,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90, ++0x04,0x49,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90, ++0x04,0x4f,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0, ++0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x17,0x82, ++0x85,0x16,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xa3,0xf0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff, ++0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0xab,0x18,0xe5,0x1a,0x24,0x01,0xf9,0xe4,0x35,0x19,0xfa,0xc0,0x03, ++0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00, ++0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x17, ++0x82,0x85,0x16,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x1c,0x82,0x85,0x1b,0x83, ++0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x17,0x82,0x85,0x16,0x83,0xa3, ++0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x1c,0x82,0x85,0x1b,0x83,0xa3,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x15,0x0b,0x74,0x01,0x7e, ++0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x14, ++0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x06,0xe5,0x15,0x24,0x10,0x80,0x5d,0x15,0x15,0xe5,0x15,0xc3,0x94, ++0x00,0x50,0xca,0x80,0x56,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x15,0x0f,0x74,0x01,0x7e,0x00, ++0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x14,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f, ++0x4e,0x60,0x08,0x90,0x9e,0x30,0xe5,0x15,0xf0,0x80,0x10,0x15,0x15,0xe5,0x15,0xc3, ++0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x30,0xf0,0xe5,0x14,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4, ++0xf5,0x15,0x74,0x01,0x7e,0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x31,0xe5,0x15,0xf0,0x80, ++0x5b,0x05,0x15,0xe5,0x15,0xb4,0x10,0xca,0x80,0x52,0xe5,0x14,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5, ++0x15,0x74,0x01,0x7e,0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x15,0x24,0x10,0x80,0x0a,0x05,0x15, ++0xe5,0x15,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x31,0xf0,0x90,0x9e,0x30,0xe0, ++0xff,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,0x9e, ++0x31,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,0xf0, ++0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x06, ++0x90,0x9e,0x30,0x12,0x62,0x94,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x31,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x03,0x12,0x62,0x94, ++0x90,0x9e,0x30,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0, ++0x22,0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3, ++0x94,0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0, ++0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,0x13, ++0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x41,0x93,0x12,0x29,0xd9,0xf5,0x60,0x22,0x12, ++0x29,0xd9,0x90,0x95,0x01,0xf0,0x22,0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0,0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x22,0xe4,0xf5,0x60,0xf5,0x64, ++0xf5,0x63,0x75,0x62,0x0c,0x75,0x61,0x0c,0x90,0x9e,0x66,0xf0,0x90,0x9e,0x64,0xf0, ++0x90,0x9e,0x63,0xf0,0x90,0x9e,0x65,0x04,0xf0,0x90,0x9e,0x56,0xf0,0xe4,0x90,0x9e, ++0x67,0xf0,0x90,0x9e,0x58,0xf0,0x90,0x9e,0x61,0x74,0x07,0xf0,0xe4,0x90,0x9e,0x57, ++0xf0,0x90,0x9e,0x5f,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x5c,0x74,0x0a,0xf0,0xa3, ++0x74,0x05,0xf0,0x90,0x9e,0x5b,0x74,0x14,0xf0,0x90,0x9e,0x62,0x74,0x05,0xf0,0xe4, ++0x90,0x9e,0x5a,0xf0,0x90,0x9e,0x55,0xf0,0x90,0x9e,0x7f,0xf0,0x90,0x9e,0x5e,0xf0, ++0x22,0xe4,0x90,0x9e,0x67,0xf0,0x90,0x9e,0x57,0xf0,0xf5,0x64,0x22,0x7f,0x00,0x22, ++0xe5,0x62,0x30,0xe6,0x19,0xe5,0x62,0x54,0x0f,0xff,0x90,0x9e,0x54,0xe0,0xfe,0x4f, ++0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x54,0xf0,0x53,0x62,0xbf,0x22,0xe5, ++0x60,0x64,0x01,0x70,0x68,0xe5,0x63,0x60,0x64,0xe5,0x63,0x64,0x02,0x60,0x06,0xe5, ++0x63,0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x56,0xf0,0x90,0x06,0xaa, ++0xe0,0x90,0x9e,0x65,0xf0,0x90,0x9e,0x56,0xe0,0x70,0x07,0x90,0x9e,0x65,0xe0,0xff, ++0x80,0x05,0x90,0x9e,0x56,0xe0,0xff,0x90,0x9e,0x56,0xef,0xf0,0x90,0x9e,0x58,0xe0, ++0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90,0x9e,0x57,0xf0,0x90,0x05,0x58,0x74,0x03,0xf0, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x64,0xfd,0x53,0x64, ++0xef,0xe5,0x63,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0x22,0xe4,0xfb, ++0x90,0x9e,0x9c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x63,0x60,0x6a,0xe5,0x60, ++0x64,0x01,0x70,0x64,0xe5,0x63,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24,0x02,0x24, ++0xfb,0x50,0x02,0x80,0x21,0x90,0x9e,0x56,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0, ++0x60,0x14,0x90,0x9e,0x56,0xe0,0x70,0x08,0x90,0x9e,0x65,0xe0,0x90,0x9e,0x56,0xf0, ++0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x2f,0x43,0x64,0x10,0xe4,0x90,0x9e,0x85, ++0xf0,0x90,0x9e,0x57,0xe0,0x75,0xf0,0x03,0xa4,0xff,0x90,0x9e,0x61,0xe0,0x2f,0x12, ++0x44,0x53,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x61,0x54,0x0f,0xc3,0x94,0x04,0x50, ++0x07,0x7d,0x01,0x7f,0x04,0x12,0x54,0xe7,0x22,0xe4,0x90,0x9e,0x15,0xf0,0xe5,0x63, ++0x60,0x79,0x90,0x9e,0x67,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x64,0xfd,0xe5,0x64,0x54, ++0x07,0x70,0x68,0x80,0x63,0x90,0x9e,0x57,0xe0,0x04,0xf0,0x53,0x64,0xef,0x90,0x9e, ++0x15,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee,0x33,0xfc,0x90,0x9e,0x57,0xe0, ++0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef,0x24,0x02,0xff,0xe4,0x3e,0xfe, ++0x90,0x9e,0x57,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06,0x06,0x90,0x05,0x58,0xe0,0x04, ++0xf0,0xe9,0xff,0x90,0x9e,0x5c,0xe0,0x2f,0xff,0xe4,0x33,0xfe,0x90,0x9e,0x57,0xe0, ++0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40,0x0d,0xe5,0x60,0xb4,0x01,0x0b, ++0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44,0xcb,0x22,0x90,0x9e,0x5f,0xe0, ++0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x93,0x12,0x43,0x8b,0x90,0x9e,0x96,0xe0,0x54,0xf0,0x44,0x06,0xff,0xf0,0xed,0x54, ++0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x93,0x12,0x43,0x6b, ++0x90,0x9e,0x90,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x96,0x12,0x53,0xf1,0xd0, ++0xd0,0x92,0xaf,0x22,0xe0,0xfd,0x74,0x26,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xed,0xf0,0xaf,0x14,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20, ++0x50,0x0e,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29, ++0x74,0xa6,0x2f,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x68,0xef, ++0xf0,0x24,0xa6,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x69,0xf0,0x7b, ++0x01,0x7a,0x9e,0x79,0x68,0x7d,0x02,0x51,0x57,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x0a, ++0x8d,0x0b,0xe5,0x0b,0x54,0x1f,0xf5,0x10,0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94, ++0xf5,0x83,0xe0,0xf5,0x0e,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x11,0x03,0x80, ++0x03,0x75,0x11,0x01,0xeb,0xc3,0x95,0x11,0x40,0x04,0xaf,0x0a,0x80,0x33,0xe5,0x0e, ++0x25,0x0d,0xf5,0x0f,0xe5,0x10,0x90,0x41,0xd6,0x93,0xff,0xe5,0x0f,0xd3,0x9f,0x74, ++0x01,0x40,0x11,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x0b, ++0xaf,0x0a,0x41,0xa5,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x0f,0xf0, ++0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74, ++0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xe0,0x54,0x1f,0xf5,0x12,0xd3,0x9f, ++0x40,0x02,0x8f,0x12,0xe5,0x12,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x12,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe, ++0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee, ++0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x12,0x51,0xa5,0xaf,0x12,0x22,0xac,0x07,0xec, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x1f,0xe5,0x1f,0x54,0x1f,0xff,0x90,0x9e,0x25,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x27,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48, ++0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x28,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x29,0xcb,0xf0,0xa3,0xeb, ++0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3, ++0xe0,0x90,0x9e,0x2b,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e, ++0x28,0xe0,0x90,0x9e,0x25,0xf0,0xf5,0x1f,0xed,0x70,0x02,0xa1,0x13,0x90,0x9e,0x26, ++0xed,0xf0,0xe5,0x1f,0x30,0xe6,0x0a,0x90,0x9e,0x25,0xe0,0xf5,0x1f,0xa3,0xe0,0x14, ++0xf0,0x90,0x9e,0x26,0xe0,0x70,0x02,0xa1,0x13,0x90,0x9e,0x25,0xe0,0xff,0xd3,0x94, ++0x00,0x50,0x02,0xa1,0x13,0xe4,0x90,0x9e,0x24,0xf0,0xef,0x14,0x90,0x9e,0x23,0xf0, ++0x90,0x9e,0x27,0xe0,0xfd,0x90,0x9e,0x23,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x2b,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x9e,0x23,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x9e,0x29,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x23,0xe0,0xf5, ++0x1f,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x26,0xe0,0xff,0x90,0x9e,0x24,0xe0,0x6f,0x60, ++0x08,0x90,0x9e,0x23,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x26,0xe0,0xff,0x90,0x9e, ++0x24,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x23,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x27, ++0xe0,0xf5,0x1f,0xe5,0x1f,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x1f,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x04,0xad,0x1f,0x51,0xa5,0xaf,0x1f,0x22,0xad,0x07,0xed,0xc3, ++0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80, ++0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x1f, ++0xe5,0x1f,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0, ++0xff,0x90,0x9e,0x23,0xf0,0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x24,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x26, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xc1,0x7a, ++0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x9e, ++0x23,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xab,0xeb,0xc3,0x94,0x10,0x40,0x21, ++0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x24,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70, ++0x23,0xeb,0xc3,0x94,0x10,0x50,0x40,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x26,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x23,0xbb,0x11,0x09,0x90,0x9e,0x25,0xe0,0x30,0xe7,0x02,0x7b,0x17, ++0xeb,0x64,0x13,0x60,0x03,0xbb,0x12,0x09,0x90,0x9e,0x24,0xe0,0x30,0xe0,0x02,0x7b, ++0x18,0xac,0x03,0x8c,0x1f,0x80,0x34,0x0b,0x80,0x84,0x90,0x9e,0x23,0xe0,0xfb,0x6c, ++0x70,0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0, ++0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x1f,0x20,0xe6, ++0x07,0xec,0x44,0x40,0xf5,0x1f,0x80,0x03,0xaf,0x1f,0x22,0xec,0x25,0xe0,0x24,0x9e, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25, ++0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56, ++0x90,0x9e,0x23,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef, ++0xf0,0xac,0x07,0x8f,0x1f,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x1f,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83, ++0xe4,0xf0,0xaf,0x05,0xe5,0x1f,0x44,0x80,0xfd,0x51,0xa5,0xe5,0x1f,0x44,0x80,0xff, ++0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd, ++0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f, ++0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0, ++0x22,0xe4,0xf5,0x14,0xe5,0x14,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90, ++0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09, ++0xe5,0x14,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x03,0x02,0x6e,0x6a, ++0xe5,0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3, ++0xe0,0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x03,0x02,0x6e,0x6a,0xe5,0x14,0x94,0x20, ++0x40,0x09,0x90,0x9a,0xc5,0xe0,0x60,0x03,0x02,0x6e,0x76,0xe5,0x14,0x75,0xf0,0x0a, ++0xa4,0x24,0x00,0xf9,0x74,0x90,0x35,0xf0,0x75,0x18,0x01,0xf5,0x19,0x89,0x1a,0xe5, ++0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0, ++0x90,0x9e,0x1b,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x14,0x25,0xe0,0x24,0xc4,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x1d,0xcf,0xf0,0xa3,0xef, ++0xf0,0xe5,0x14,0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x19,0xf0,0x80,0x12,0x74,0xa6,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0x19,0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x48,0x12, ++0x43,0x5f,0xe0,0x90,0x9e,0x20,0xf0,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0x41,0x9f,0x90,0x9e,0x20,0xe0,0xff,0x90, ++0x9e,0x1a,0xe0,0x9f,0x40,0x13,0x90,0x9e,0x20,0xe0,0x90,0x9e,0x1a,0xf0,0xee,0x54, ++0x40,0xfe,0x90,0x9e,0x19,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x54,0x05,0x64, ++0x01,0x70,0x29,0x90,0x9e,0x1a,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40, ++0xda,0x80,0x30,0x90,0x9e,0x1a,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x1a,0xe0, ++0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x1a,0xe0, ++0x90,0x41,0x2e,0x93,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1f,0xe0,0x75,0xf0,0x06,0xa4, ++0x24,0x50,0xf9,0x74,0x40,0x35,0xf0,0xfa,0x7b,0xff,0x8b,0x15,0xf5,0x16,0x89,0x17, ++0xe5,0x14,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x1b, ++0xa3,0xe0,0xf5,0x1c,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a, ++0x12,0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35, ++0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x01,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab,0x15, ++0xaa,0x16,0xa9,0x17,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef, ++0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90, ++0x00,0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00, ++0x06,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee, ++0x35,0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x04,0x12,0x42,0x20, ++0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd, ++0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab, ++0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e, ++0x1b,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x1c,0x9f,0xe5,0x1b,0x9e, ++0x40,0x0c,0xe5,0x1c,0x9f,0xf5,0x1c,0xe5,0x1b,0x9e,0xf5,0x1b,0x80,0x05,0xe4,0xf5, ++0x1b,0xf5,0x1c,0xe5,0x14,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe5,0x1b,0xf0,0xa3,0xe5,0x1c,0xf0,0x90,0x9e,0x19,0xe0,0x25,0xe0,0x24,0x66,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x1c,0xe4,0x93,0x95,0x1b, ++0x50,0x07,0xaf,0x14,0x12,0x65,0x5c,0xa1,0x31,0x90,0x9e,0x19,0xe0,0x25,0xe0,0x24, ++0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x1c,0xe4,0x93, ++0x95,0x1b,0x50,0x02,0xa1,0x31,0x7d,0x01,0xaf,0x14,0x12,0x63,0xbd,0xa1,0x31,0x74, ++0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02, ++0x81,0x3a,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0xc3,0x94, ++0x19,0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x1a,0xe0,0xc3,0x94,0x11, ++0x40,0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x1a,0xe0, ++0xc3,0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x1a,0xe0,0xc3,0x94, ++0x03,0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0, ++0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x1e,0x74,0x44, ++0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02, ++0x61,0xe7,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x61,0xe7,0x74,0x85,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff, ++0xe4,0x33,0xfe,0x74,0x41,0x25,0x14,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd, ++0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4, ++0x33,0xfe,0x74,0x44,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f, ++0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x1a,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75, ++0x1e,0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x1e,0x03,0x80,0x03,0x75, ++0x1e,0x01,0x74,0x41,0x25,0x14,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74, ++0x85,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x14,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x1e,0x74,0xe6,0x25,0x14,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x1a,0xe0,0xff,0x74,0x26,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe5,0x1e,0xf0,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x4c,0x12, ++0x43,0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x1e,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x1e,0xa1,0x2c,0xec,0x64,0x06,0x60,0x02,0xa1, ++0x31,0xf5,0x1b,0xf5,0x1c,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x1b,0xe0, ++0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x21,0xee,0xf0,0xa3,0xef,0xf0,0x74, ++0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x1e,0xe4,0xf5,0x1d, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x75,0xf0,0x02,0xe5,0x1d,0xa4,0xf5,0x82,0x85,0xf0, ++0x83,0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x1d,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00, ++0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xc3,0x90,0x9e, ++0x22,0xe0,0x95,0x1c,0x90,0x9e,0x21,0xe0,0x95,0x1b,0x40,0x07,0x05,0x1d,0xe5,0x1d, ++0xb4,0x05,0xbd,0xe5,0x1d,0xc3,0x13,0xf5,0x1d,0xe5,0x1e,0xb4,0x01,0x06,0xe5,0x1d, ++0x70,0x46,0x80,0x13,0xe5,0x1e,0xb4,0x03,0x15,0xe5,0x1d,0x70,0x05,0x75,0x1e,0x03, ++0x80,0x39,0xe5,0x1d,0xb4,0x01,0x05,0x75,0x1e,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x1e, ++0xb4,0x05,0x28,0xe5,0x1d,0x70,0x05,0x75,0x1e,0x05,0x80,0x0d,0xe5,0x1d,0xb4,0x01, ++0x05,0x75,0x1e,0x03,0x80,0x03,0x75,0x1e,0x01,0xd3,0x90,0x9e,0x1e,0xe0,0x94,0x03, ++0x90,0x9e,0x1d,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x1e,0xd3,0x90,0x9e,0x1e,0xe0, ++0x94,0x03,0x90,0x9e,0x1d,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x1e,0x74,0x84,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x1e,0xf0,0xfd,0xaf,0x14,0x12,0x67, ++0x61,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05, ++0x74,0xe6,0x50,0x0e,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0, ++0x80,0x0b,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x1d, ++0xe0,0xfe,0xa3,0xe0,0xff,0xc3,0x74,0xff,0x9f,0xfd,0x74,0xff,0x9e,0xfc,0xe5,0x14, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xd3, ++0x9d,0xea,0x9c,0xe5,0x14,0x50,0x13,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xee,0x8f,0xf0,0x12,0x42,0x81,0x80,0x10,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0x74,0xff,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x44, ++0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xff,0xc3,0x74,0xff,0x9f, ++0xfd,0x74,0xff,0x9e,0xfc,0xe5,0x14,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xd3,0x9d,0xea,0x9c,0xe5,0x14,0x50,0x13,0x25,0xe0, ++0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xee,0x8f,0xf0,0x12,0x42,0x81,0x80, ++0x10,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xff,0xf0,0xa3, ++0xf0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4, ++0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00, ++0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,0xe5,0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0xc4,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x14,0xe5,0x14,0xc3,0x94, ++0x40,0x50,0x03,0x02,0x67,0xa4,0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0, ++0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95, ++0x01,0x04,0xf0,0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3, ++0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0x74,0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0, ++0xed,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0x74,0x86,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x90,0x41,0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c, ++0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x4a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f, ++0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74, ++0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3, ++0x94,0x20,0x50,0x0f,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13, ++0xf0,0x80,0x0d,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0, ++0x0d,0xed,0x64,0x40,0x60,0x03,0x02,0x6e,0xa5,0x22,0x12,0x29,0xd9,0xf5,0x14,0xc3, ++0x94,0x40,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x14,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x14,0xb4,0x40,0x0a,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x96,0x42,0xf0,0x22,0x90,0x9e,0x30,0x12,0x43,0x8b,0x90, ++0x9e,0x33,0xe0,0x54,0xf0,0x44,0x02,0xf0,0x54,0x0f,0x44,0xc0,0xf0,0x90,0x9e,0x30, ++0x12,0x43,0x6b,0x90,0x9e,0x90,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x33,0x02, ++0x53,0xf1,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x90,0x00,0x01,0x12,0x42,0x20,0xfc, ++0xed,0xc3,0x94,0x40,0x40,0x02,0xe4,0xfd,0xec,0xc3,0x94,0x40,0x40,0x02,0xe4,0xfc, ++0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0, ++0xfb,0xea,0x90,0x9e,0x24,0xf0,0xeb,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x26,0xf0,0xeb, ++0xa3,0xf0,0xa3,0xed,0xf0,0xa3,0x74,0xff,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x2a,0xf0,0xeb, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfa, ++0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x2c,0xf0,0xeb,0xa3,0xf0,0xa3,0xec,0xf0,0xa3,0x74, ++0xff,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0x7b,0x01,0x7a,0x9e,0x79,0x24,0x01,0x79,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0xa4,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e, ++0xa4,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa7, ++0xe0,0x94,0xe8,0x90,0x9e,0xa6,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44, ++0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa6,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81, ++0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x24,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x66,0xf0,0x90,0x00,0x03,0x12,0x42, ++0x20,0x90,0x9e,0x55,0xf0,0x12,0x56,0x22,0x90,0x01,0xe5,0xe5,0x63,0xf0,0x90,0x9e, ++0x66,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x5c,0xf0,0x90,0x00,0x01,0x12, ++0x42,0x20,0x90,0x9e,0x5d,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5b,0xf0,0x90, ++0x00,0x03,0x12,0x42,0x20,0x90,0x9e,0x62,0xf0,0x22,0x90,0x9e,0x5c,0x74,0x0a,0xf0, ++0x90,0x9e,0x5d,0x74,0x05,0xf0,0x90,0x9e,0x5b,0x74,0x14,0xf0,0x90,0x9e,0x62,0x74, ++0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x61, ++0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x5f,0xe4,0xf0,0xa3,0xef,0xf0, ++0x80,0x0f,0x90,0x9e,0x61,0x74,0x07,0xf0,0x90,0x9e,0x5f,0xe4,0xf0,0xa3,0x74,0x03, ++0xf0,0x90,0x9e,0x5f,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x9e,0x24,0x12, ++0x2a,0x8b,0x00,0x00,0x00,0x00,0x12,0x29,0xd9,0x60,0x0d,0x90,0x9e,0x5e,0xf0,0xe4, ++0xfd,0x7f,0x04,0x12,0x54,0xe7,0x80,0x05,0xe4,0x90,0x9e,0x5e,0xf0,0x90,0x9e,0x5e, ++0xe0,0x90,0x01,0xe7,0xf0,0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf, ++0x05,0xed,0x2e,0x90,0x9e,0x78,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f, ++0x90,0x9e,0x79,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x7a, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x7b,0xf0,0x90,0x00, ++0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed,0x2f,0x90,0x9e,0x7c,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x24,0x12,0x43,0x8b,0x90,0x9e,0x24,0x12,0x43, ++0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x9e,0x24,0x12,0x43,0x6b,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12, ++0x29,0xd9,0xff,0x60,0x2d,0xb5,0x65,0x16,0x90,0x9e,0x24,0x12,0x43,0x6b,0x90,0x00, ++0x01,0x12,0x42,0xc2,0x65,0x67,0x70,0x04,0xe5,0x66,0x65,0xf0,0x60,0x24,0x90,0x9e, ++0x24,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x12,0x4e,0x37, ++0x80,0x10,0x90,0x9e,0x24,0x12,0x43,0x6b,0x12,0x29,0xd9,0x65,0x65,0x60,0x03,0x12, ++0x44,0xc2,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x24,0x14,0x70,0x1a,0x7b,0x01, ++0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x71,0xb0,0xbf,0x01,0x09,0x90,0x06,0x35, ++0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0x80,0xcd,0xe4,0x90,0x06,0x34,0xf0,0x22, ++0x8e,0x14,0x8f,0x15,0x8b,0x16,0x8a,0x17,0x89,0x18,0xe4,0x90,0x9e,0x19,0xf0,0xef, ++0x90,0x00,0x31,0xf0,0x12,0x4d,0x45,0xe5,0x14,0x54,0x03,0xff,0x90,0x00,0x32,0xe0, ++0x54,0xfc,0x4f,0xf0,0x12,0x4d,0x45,0x90,0x00,0x33,0xe0,0x54,0x7f,0xf0,0x12,0x4d, ++0x45,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x19,0xe0,0xc3,0x94,0x64,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x19,0xe0,0xc3,0x94,0x64,0x50,0x10,0x90, ++0x00,0x30,0xe0,0xab,0x16,0xaa,0x17,0xa9,0x18,0x12,0x42,0x4d,0x7f,0x01,0x22,0x7f, ++0x00,0x22,0xe4,0x90,0x9e,0xac,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3, ++0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90, ++0x9e,0xad,0xe0,0x94,0xe8,0x90,0x9e,0xac,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22, ++0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x9e,0xac,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x80,0xc6,0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x4d,0x45,0x90,0x9d,0xff, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x9e,0x03,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c, ++0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00, ++0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x11, ++0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34, ++0x81,0x22,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xff,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08, ++0x12,0x27,0xde,0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90,0x9e,0x80,0xe0,0x90,0x9d,0xff, ++0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07, ++0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07, ++0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00, ++0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e,0x0b,0x12, ++0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff, ++0x12,0x34,0x81,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b, ++0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11,0xe0,0x54, ++0xf6,0xf0,0x02,0x4d,0x45,0xef,0x70,0x02,0xe1,0x5c,0x90,0x9e,0x0f,0xe0,0x60,0x03, ++0x02,0x7b,0x28,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d, ++0xc7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90, ++0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x2f,0xd9,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0, ++0x64,0x01,0x60,0x03,0x02,0x7b,0x28,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d, ++0xfb,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a, ++0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xb7,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12, ++0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xcb,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x9d,0xdf,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xe3,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x27,0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x27,0xde,0x90,0x9d,0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x9d,0xf7,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12, ++0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e, ++0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e, ++0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e, ++0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec, ++0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xe4,0xff,0xec,0x90, ++0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec, ++0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e, ++0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f, ++0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e, ++0xa8,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90, ++0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f, ++0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08, ++0x12,0x2f,0xd9,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90, ++0x9e,0x43,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x14, ++0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x49,0x05,0x7d,0x40, ++0x7f,0x01,0x12,0x36,0xaf,0xe5,0x14,0x24,0xff,0x92,0xaf,0x22,0x90,0x9e,0x3a,0xe0, ++0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0x81,0x14,0x90,0x9e,0x3a,0xe0,0x64,0x14, ++0x60,0x02,0x81,0x14,0x90,0x9e,0x49,0xe0,0x70,0x25,0x90,0x9e,0x4c,0xe0,0x70,0x1f, ++0x90,0x9e,0x4a,0xe0,0x70,0x19,0x90,0x9e,0x4d,0xe0,0x70,0x13,0x90,0x9e,0x4b,0xe0, ++0x70,0x0d,0x90,0x9e,0x4e,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90, ++0x9e,0x49,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x4a,0xe0,0x90,0x04,0x45,0xf0,0x90, ++0x9e,0x4b,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x4c,0xe0,0x90,0x04, ++0x48,0xf0,0x90,0x9e,0x4d,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x4e,0xe0,0x90,0x04, ++0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x36, ++0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e,0x37,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x38, ++0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0x35,0x04,0xf0,0xe4, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x49,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x19,0xf0,0x90,0x05,0x61,0xe0, ++0x90,0x9e,0x1a,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x1b,0xf0,0x90,0x05,0x63,0xe0, ++0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x52,0xe0,0xff,0x90,0x9e,0x1c,0xe0,0xfe,0xd3,0x9f, ++0x50,0x0b,0x90,0x9e,0x52,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x40, ++0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x44,0xe0,0xff,0x12,0x4c,0xf0,0x22,0x90, ++0x9e,0x53,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x41,0xe0,0x60,0x02,0xa1,0x36,0x90, ++0x9e,0x35,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x36, ++0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x37,0xe0, ++0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x36,0xf0,0x80,0x15,0x90, ++0x9e,0x38,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x37,0xf0, ++0x90,0x9e,0x36,0xf0,0x90,0x9e,0x35,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76, ++0xe0,0x30,0xe2,0x32,0x90,0x9e,0x49,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x24,0x90,0x9e,0x4a,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x11,0x90,0x9e,0x4b,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e, ++0x4a,0xf0,0x90,0x9e,0x49,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x4c, ++0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x4d,0xe0,0xc3, ++0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x4e,0xe0,0xc3,0x94, ++0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4c,0xf0,0x90, ++0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x00,0x37,0xda,}; ++ ++// =================== v79 UMC A Cut COMMON 2011-10-06 ===================== ++u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x09,0x58,0x3f,0x01,0x00, ++0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0xa9, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0, ++0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0, ++0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c, ++0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22, ++0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e, ++0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01, ++0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x03,0x12,0x4f,0x2a,0x22,0x22,0x22, ++0x22,0x22,0x00,0x02,0x60,0x8d,0x02,0x60,0x94,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x24,0x62,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63, ++0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90, ++0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc, ++0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90, ++0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05, ++0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7, ++0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5, ++0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55, ++0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34, ++0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38, ++0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89, ++0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80, ++0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c, ++0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90, ++0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e, ++0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0, ++0x12,0x4d,0xe2,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4e, ++0x25,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0, ++0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x64,0xa1,0x91,0xd3, ++0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0, ++0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0, ++0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71, ++0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2, ++0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x63,0x92,0x90,0x9e,0x5e, ++0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20, ++0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x63,0x2e,0x90,0x9e,0x5e,0xe0, ++0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x5e,0xf1,0xef,0x60, ++0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20, ++0xe2,0x09,0x12,0x62,0x50,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54, ++0x0f,0xff,0xbf,0x02,0x09,0x12,0x62,0xbb,0xef,0x60,0x03,0x12,0x64,0x87,0x22,0x90, ++0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x63,0x4d, ++0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0, ++0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27, ++0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56, ++0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3, ++0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e, ++0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4, ++0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3, ++0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04, ++0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24, ++0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x66,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x77,0x1c,0xef,0x70,0x06,0x90,0x01,0xc8,0x74, ++0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11, ++0x8f,0x11,0xdf,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7f, ++0x78,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xff,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c, ++0x12,0x22,0x65,0x90,0x9e,0x03,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x22,0x65, ++0x90,0x9e,0x07,0x12,0x25,0x08,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d, ++0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53, ++0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9e,0x07,0x12,0x43,0x53, ++0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12, ++0x2b,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9e,0x0b,0x12,0x25,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x30,0x2c, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00, ++0x00,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80, ++0x08,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00, ++0x47,0xe0,0x5f,0xf0,0x31,0xb9,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x31,0xb9,0x90, ++0x9e,0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45, ++0x80,0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x31,0xb1,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0, ++0x4f,0xf0,0x31,0xb9,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00, ++0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0, ++0x31,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f, ++0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x31, ++0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60, ++0x02,0x61,0x7d,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd, ++0x7f,0x48,0x51,0xc1,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90, ++0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45, ++0xe0,0x54,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f, ++0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0, ++0x44,0x20,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45, ++0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x51,0xc1,0x22,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0, ++0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f, ++0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b, ++0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d, ++0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff, ++0xd1,0xd8,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02, ++0x81,0x84,0x90,0x9e,0x1b,0xe0,0x70,0x02,0x81,0x84,0x90,0x9e,0x1f,0xe0,0x70,0x02, ++0x81,0x84,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74, ++0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x51,0xb8,0x90,0x00,0x46,0xe0, ++0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08, ++0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f, ++0x45,0x51,0xc1,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05, ++0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05, ++0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e, ++0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12, ++0x31,0xb7,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e,0x51,0xb7,0x90, ++0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x05,0x22,0xe4,0xf0,0xa2, ++0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x31,0x49,0x90, ++0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74, ++0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0x16,0x12,0x25,0x08,0xab, ++0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe, ++0x78,0x1a,0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16, ++0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x25,0x08, ++0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08, ++0x12,0x22,0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x25, ++0x08,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e, ++0x08,0x12,0x2b,0x08,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x51, ++0xc1,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0, ++0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xef, ++0xfd,0x7f,0x46,0x51,0xc1,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd, ++0x7f,0x54,0x51,0xc1,0x7d,0xff,0x7f,0x55,0x51,0xc1,0x7d,0xff,0x7f,0x56,0x51,0xc1, ++0x7d,0xff,0x7f,0x57,0x41,0xc1,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x51,0xc1, ++0xe4,0xfd,0x7f,0x51,0x51,0xc1,0xe4,0xfd,0x7f,0x52,0x51,0xc1,0xe4,0xfd,0x7f,0x53, ++0x41,0xc1,0xe5,0x22,0x64,0x01,0x70,0x3c,0xf1,0xbe,0xbf,0x01,0x05,0x7f,0x01,0x12, ++0x44,0xf1,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x00,0x44, ++0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f, ++0x46,0x51,0xc1,0x7f,0x02,0xf1,0xea,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4, ++0x01,0x02,0xf1,0x2a,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd7,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x2e,0xe0,0x70,0x31, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0xd1,0xd8,0x90,0x9e,0x2e,0x74,0x01,0x51,0xb7,0x80, ++0x3f,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x37,0x90,0x9e,0x1f,0xe0,0xff,0xd1,0xd8, ++0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x51,0xc1, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b, ++0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3, ++0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0, ++0x04,0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb1,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x51,0xc1,0x90,0x9e,0xb1, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x41,0xc1,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c, ++0x89,0x5d,0xe4,0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x31,0xb9,0xe5,0x59, ++0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x31,0xb9,0x90,0x00,0x33, ++0xe0,0x54,0x7f,0xf0,0x31,0xb9,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34, ++0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3, ++0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42, ++0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x45,0xb1,0xbf,0x01,0x10,0x90,0x02,0x09, ++0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x7f,0x0b, ++0xf1,0xea,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80, ++0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x9e,0x74,0xf0,0x90, ++0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x41,0xc1,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0, ++0x12,0x49,0xb9,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe, ++0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff, ++0x80,0x44,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x49,0xb1,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01, ++0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7, ++0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x75,0x28,0x33,0xe4,0xf5, ++0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0, ++0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0, ++0x75,0x8e,0x02,0x12,0x4f,0xda,0x12,0x5f,0xa9,0x12,0x5f,0xbc,0xe4,0xf5,0x12,0x12, ++0x6f,0xa1,0x12,0x77,0x5d,0x12,0x60,0x9b,0x12,0x2e,0x01,0x12,0x77,0x18,0x11,0x8b, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0xf4,0x12,0x5f,0x91,0x12,0x44,0xfe,0x12,0x7d,0x1d, ++0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x4d,0x8b,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44, ++0x40,0xf0,0x12,0x49,0xb9,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe, ++0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0, ++0x24,0xa9,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2, ++0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x8e,0xe5,0x12,0x30,0xe6,0x17,0xc2,0xaf,0x53, ++0x12,0xbf,0xd2,0xaf,0x12,0x69,0x51,0x90,0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01, ++0x03,0x12,0x7d,0x7b,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7e,0x7e,0x31,0x61,0x80, ++0xb8,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35, ++0x7f,0xf9,0x7e,0x01,0x12,0x4f,0x48,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0,0x54,0x0f, ++0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x0a,0xe4,0x90,0x06,0x34,0xf0,0x22,0x90,0x01, ++0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x41, ++0xcf,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3, ++0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0xc8,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75, ++0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79, ++0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90, ++0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90, ++0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90, ++0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39, ++0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x51,0xd0,0x90,0x9e,0x34, ++0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x98,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x53,0x0b,0x01,0x53,0x14,0x02, ++0x53,0x2f,0x03,0x53,0x38,0x05,0x53,0x41,0x06,0x53,0x8f,0x07,0x53,0x49,0x09,0x53, ++0x52,0x0c,0x53,0x5b,0x0d,0x53,0x64,0x0e,0x53,0x6d,0x1b,0x53,0x76,0x1c,0x53,0x7f, ++0x2c,0x53,0x1d,0x2d,0x53,0x26,0x2e,0x00,0x00,0x53,0x88,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x61,0x9d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc4,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xca,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x12,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x40,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71, ++0x74,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x72,0x88,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4b,0x7e,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x7c,0xea,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4c,0xb8,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xbc,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xa3,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x75,0xea,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22, ++0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54, ++0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b, ++0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54, ++0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13, ++0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96, ++0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0, ++0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3, ++0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54, ++0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90, ++0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12, ++0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef, ++0xf0,0x12,0x24,0x62,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90, ++0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90, ++0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45, ++0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59, ++0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c, ++0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01, ++0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf, ++0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74, ++0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x55,0x1e,0x00,0x55,0x33,0x01,0x55, ++0x48,0x02,0x55,0x5d,0x03,0x55,0x86,0x04,0x55,0x9b,0x05,0x55,0xb0,0x06,0x55,0xd6, ++0x0c,0x56,0x03,0x0d,0x56,0x30,0x0e,0x56,0x5d,0x0f,0x00,0x00,0x56,0x91,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74, ++0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0, ++0xa3,0x74,0x8f,0xf0,0xc1,0x91,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12, ++0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3, ++0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xc1,0x91,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f, ++0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01, ++0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04, ++0x44,0xc1,0x88,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d, ++0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f, ++0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58, ++0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d, ++0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d, ++0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62, ++0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x24,0x62,0x5f,0xd0,0x01,0xd0,0x02,0xd0, ++0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0, ++0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90, ++0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85, ++0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60, ++0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83, ++0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe, ++0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01, ++0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5, ++0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3, ++0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a, ++0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b, ++0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33, ++0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0, ++0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24, ++0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05, ++0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b, ++0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90, ++0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee, ++0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40, ++0x05,0x90,0x9e,0x4b,0x11,0xe0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0xe0,0x90, ++0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22, ++0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94, ++0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22, ++0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf, ++0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84, ++0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,0xf0,0x24,0xa6,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,0x01,0x7a,0x9e,0x79, ++0x78,0x7d,0x02,0x31,0x3a,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,0xf0,0x44,0x06,0xff, ++0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x97, ++0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x9a,0xd1, ++0x14,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56, ++0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd, ++0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57, ++0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41, ++0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x01,0xf1,0x25,0x50,0xf5,0x82, ++0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0, ++0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff, ++0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93, ++0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58, ++0x11,0xf1,0xaf,0x58,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75, ++0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06, ++0xc0,0x07,0x90,0x01,0xc4,0x74,0x45,0xf0,0x74,0x5a,0xa3,0xf0,0x90,0x01,0x34,0xe0, ++0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b, ++0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x61,0xe1,0x90,0x01,0x34,0x74,0x01,0xf0,0x85, ++0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6, ++0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e, ++0x54,0x20,0x6f,0x70,0x02,0x61,0x93,0xe5,0x0f,0x30,0xe5,0x02,0x61,0x93,0xe5,0x0d, ++0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75, ++0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f, ++0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f, ++0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20, ++0xe6,0x23,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x34,0xaf, ++0x4d,0x31,0xd9,0x80,0x2e,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44, ++0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30, ++0xe7,0x11,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf, ++0x4d,0x31,0x76,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x9e,0x61,0xe0, ++0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xd1,0x05,0xef, ++0x64,0x01,0x70,0x2d,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd, ++0x7f,0x58,0x7e,0x01,0x12,0x30,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92, ++0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x08,0xd1,0x05,0xbf,0x01,0x03,0x12,0x44, ++0xd3,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x13,0x85, ++0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,0x85,0xd7, ++0x19,0x85,0xd9,0x1a,0xd1,0x9c,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08, ++0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4d,0xb6,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x49,0xb9,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0, ++0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37, ++0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x18,0x90,0x9e, ++0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0, ++0x30,0xe0,0x03,0x12,0x4f,0xa7,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01, ++0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0xfe,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73, ++0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74, ++0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0, ++0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80, ++0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60, ++0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c, ++0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90, ++0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44, ++0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74, ++0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0, ++0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f, ++0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90, ++0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5, ++0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5, ++0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12, ++0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0xd1,0xbd,0x74, ++0x45,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5a,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05, ++0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83, ++0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60, ++0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x91,0x12,0x43, ++0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,0x75,0xe0,0x64,0x01,0x70, ++0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0xf1,0x3b,0xef,0x60,0x49,0x90,0x9e, ++0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a, ++0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f, ++0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5, ++0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0, ++0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,0xc1,0x14,0x7d,0x02,0x7f, ++0x03,0x12,0x31,0x2c,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x23,0x90,0x9e,0x61, ++0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3, ++0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,0x12,0x48,0x8f, ++0x22,0xd1,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32, ++0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x9e, ++0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x9e,0x60,0xe0, ++0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90, ++0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e, ++0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0, ++0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf, ++0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90, ++0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0, ++0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e, ++0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3, ++0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5, ++0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4a,0xd6,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4a,0xd6,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c, ++0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e, ++0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90, ++0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0, ++0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a, ++0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0, ++0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90, ++0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e, ++0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0, ++0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x31,0x03,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12, ++0x24,0x62,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70, ++0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42, ++0x20,0xfd,0xe4,0xff,0x31,0x72,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0x72,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a, ++0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0x72,0xe4,0xff,0x31, ++0xc6,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0, ++0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90, ++0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x24,0x62,0x65,0x74,0x60,0x02,0x31, ++0x11,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12, ++0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0, ++0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c, ++0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12, ++0x31,0x9d,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0, ++0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90, ++0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22, ++0x12,0x5e,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52, ++0x90,0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42, ++0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04, ++0xf0,0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0, ++0x80,0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80, ++0x11,0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x01, ++0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,0xe0,0xb4,0x02,0x10,0x90, ++0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90, ++0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0, ++0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06, ++0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,0x01,0x04,0xe4,0xff,0x71, ++0x4d,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x76,0x90, ++0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x45,0xb1,0xef,0x64, ++0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20, ++0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x71,0xb0,0x90,0x9e,0xaf,0xe0,0x60,0x05,0x90, ++0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22, ++0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x49,0xb9,0x90,0x9d,0xff,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x03, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08, ++0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08, ++0x12,0x2b,0x08,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95, ++0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68, ++0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f, ++0x27,0xe4,0x90,0x9e,0xa8,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7, ++0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90, ++0x9e,0xa8,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90, ++0x9e,0xa8,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15, ++0xd3,0x90,0x9e,0xa9,0xe0,0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90, ++0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44, ++0x01,0xf0,0x12,0x44,0xff,0x12,0x45,0x00,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0, ++0x22,0x90,0x9e,0x60,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0, ++0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60, ++0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90, ++0x9e,0x6a,0x12,0x47,0xfa,0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90, ++0x9e,0x2f,0xf0,0xe5,0x74,0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14, ++0x60,0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e, ++0x50,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70, ++0x0a,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01, ++0xf0,0x90,0x9e,0x2f,0xe0,0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90, ++0x9e,0x89,0xf0,0x90,0x9e,0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90, ++0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47, ++0x1a,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0, ++0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d, ++0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4, ++0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5, ++0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0, ++0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0, ++0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec, ++0xc3,0x9f,0x40,0x02,0xc1,0xc9,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xfa, ++0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e, ++0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e, ++0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e, ++0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb, ++0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18, ++0xac,0x03,0x8c,0x64,0x80,0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70, ++0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07, ++0xec,0x44,0x40,0xf5,0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0, ++0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93, ++0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90, ++0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0, ++0xac,0x07,0x8f,0x64,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13, ++0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3, ++0xef,0xf0,0xaf,0x64,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4, ++0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80,0xfd,0x12,0x58,0xf1,0xe5,0x64,0x44,0x80,0xff, ++0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0, ++0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09, ++0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e, ++0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0x21, ++0x07,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5, ++0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0x21,0x07,0x90,0x9e,0x40, ++0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x21,0x07,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14, ++0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d, ++0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8, ++0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10, ++0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90, ++0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41, ++0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05, ++0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24, ++0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e, ++0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x12,0x58,0xf1,0xaf,0x64, ++0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90, ++0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09, ++0xe5,0x59,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xe1,0x95,0xe5, ++0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0, ++0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x02,0xe1,0x95,0xe5,0x59,0x94,0x20,0x40,0x08, ++0x90,0x9a,0xc5,0xe0,0x60,0x02,0xe1,0xa0,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00, ++0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0, ++0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38, ++0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59, ++0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe, ++0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0, ++0xc3,0x94,0x05,0x40,0x02,0x81,0x6e,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0, ++0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90, ++0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e, ++0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e, ++0x35,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40, ++0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90, ++0x9e,0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40, ++0x35,0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2, ++0x93,0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09, ++0xe4,0xfd,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x2c,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x12,0x24,0x62,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12, ++0x42,0x97,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61, ++0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e, ++0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0, ++0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25, ++0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00, ++0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35, ++0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b, ++0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38, ++0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x24,0x7b,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40, ++0x0c,0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61, ++0xf5,0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5, ++0x61,0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50, ++0x07,0xaf,0x59,0x12,0x65,0xb2,0xe1,0x00,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95, ++0x61,0x50,0x02,0xe1,0x00,0x7d,0x01,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x00,0x74,0xe6, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xc1, ++0x09,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19, ++0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40, ++0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3, ++0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03, ++0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74, ++0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xa1, ++0xb6,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0xa1,0xb6,0x74,0x85,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4, ++0x33,0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3, ++0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee, ++0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63, ++0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63, ++0x01,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x98,0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43, ++0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x63,0xc1,0xfb,0xec,0x64,0x06,0x60,0x02,0xe1,0x00, ++0xf5,0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc, ++0xa3,0xe0,0xfd,0x12,0x24,0x7b,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab, ++0x5e,0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12, ++0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37, ++0xe0,0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4, ++0x05,0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70, ++0x46,0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80, ++0x39,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4, ++0x05,0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05, ++0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90, ++0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94, ++0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x65,0x72, ++0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74, ++0xe6,0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80, ++0x0b,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00, ++0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19, ++0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12, ++0x43,0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x21,0x54, ++0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3, ++0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d, ++0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74, ++0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5, ++0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41, ++0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b, ++0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f, ++0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03, ++0x02,0x6f,0xcf,0x22,0x12,0x24,0x62,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83, ++0xef,0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96, ++0x42,0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80, ++0xc4,0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x53,0xa4,0x12,0x24,0x62,0x90, ++0x95,0x01,0xf0,0x22,0x12,0x24,0x62,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90, ++0x9e,0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05, ++0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22, ++0x90,0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22, ++0x90,0x02,0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67, ++0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42, ++0x20,0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae, ++0x05,0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x9e,0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42, ++0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b, ++0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x24,0x62,0xff,0x60,0x2c,0xb5, ++0x22,0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24, ++0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00, ++0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x71,0x00,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43, ++0x6b,0x12,0x24,0x62,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4, ++0xfd,0x7f,0x0b,0x71,0x44,0xe4,0xfd,0x7f,0x02,0x71,0x44,0x12,0x4f,0xbe,0xe4,0xff, ++0x12,0x44,0xf1,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e, ++0x01,0x02,0x30,0x62,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0, ++0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12, ++0x49,0xb9,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0, ++0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80, ++0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x49,0xb9,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x49,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e, ++0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82, ++0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61, ++0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0x6b,0x00,0x75, ++0x93,0x01,0x74,0x71,0x02,0x74,0x71,0x03,0x74,0x71,0x04,0x75,0x93,0x05,0x75,0x63, ++0x80,0x75,0x79,0x81,0x75,0x93,0x82,0x00,0x00,0x75,0x8f,0xaf,0x69,0xb1,0x9a,0xa1, ++0x93,0x90,0x9e,0x40,0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80, ++0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0, ++0xc3,0xe5,0x64,0x94,0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5, ++0x61,0xc3,0x9f,0x40,0x02,0xa1,0x93,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61, ++0x25,0x65,0xff,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4a,0xc1, ++0x80,0x1a,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00, ++0x25,0x65,0xfd,0xec,0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba, ++0xc3,0xe5,0x64,0x94,0x10,0x40,0x02,0xa1,0x93,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60, ++0x02,0xa1,0x93,0xaf,0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x25,0x08,0x90,0x9e, ++0x41,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0xaf,0x65,0xae,0x64,0x12,0x2b, ++0x08,0x80,0x30,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5, ++0x62,0xaf,0x63,0xfe,0x12,0x32,0x15,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25, ++0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f, ++0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45, ++0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff, ++0x7d,0xff,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff,0x02,0x2d,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00, ++0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x91,0x0e,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5, ++0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0, ++0x80,0x63,0x05,0x60,0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x32, ++0x15,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0, ++0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05, ++0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75, ++0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74, ++0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45, ++0x5c,0x60,0x02,0xc1,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0, ++0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa, ++0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70, ++0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90, ++0x9e,0xaa,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x32, ++0x15,0x90,0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,0x9e,0x77, ++0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x1e,0x90,0x9e,0x0f,0xe0, ++0x60,0x03,0x02,0x7c,0xe9,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xab,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d, ++0xaf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbf,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xc3, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd7,0x12, ++0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xeb,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9d, ++0xef,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b, ++0x08,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e, ++0x09,0x12,0x2b,0x08,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e, ++0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xe9,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90, ++0x9d,0xfb,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xa7,0x12, ++0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xab,0x12,0x25,0x08,0x7f, ++0x6c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xaf,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e, ++0x12,0x22,0x65,0x90,0x9d,0xb3,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65, ++0x90,0x9d,0xb7,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbb, ++0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbf,0x12,0x25,0x08, ++0x7f,0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xc3,0x12,0x25,0x08,0x7f,0x84,0x7e, ++0x0e,0x12,0x22,0x65,0x90,0x9d,0xc7,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22, ++0x65,0x90,0x9d,0xcb,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d, ++0xcf,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd3,0x12,0x25, ++0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd7,0x12,0x25,0x08,0x7f,0xd8, ++0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xdb,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12, ++0x22,0x65,0x90,0x9d,0xdf,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90, ++0x9d,0xe3,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xe7,0x12, ++0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9d,0xeb,0x12,0x25,0x08,0x7f, ++0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x9d,0xef,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09, ++0x12,0x22,0x65,0x90,0x9d,0xf3,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65, ++0x90,0x9d,0xf7,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4, ++0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e, ++0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00, ++0x00,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb, ++0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20, ++0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14, ++0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25, ++0x14,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96, ++0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80, ++0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f, ++0xdc,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25, ++0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e, ++0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22, ++0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22, ++0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f, ++0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43, ++0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12, ++0x2b,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25,0x08, ++0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25, ++0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e, ++0x08,0x12,0x2b,0x08,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5, ++0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4a,0xc1,0x7d, ++0x40,0x7f,0x01,0x12,0x31,0x66,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f, ++0x45,0x12,0x4a,0xc1,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90, ++0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90, ++0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90, ++0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90, ++0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4a,0xc1,0x90,0x9e,0x15,0xe0,0xc3, ++0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0xc1,0x33,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60, ++0x02,0xc1,0x33,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90, ++0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70, ++0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e, ++0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e, ++0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48, ++0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a, ++0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0, ++0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0, ++0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50, ++0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x1b,0xe0, ++0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x12,0x4e,0xd8,0x22,0x90,0x9e, ++0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xe1,0x55,0x90,0x9e, ++0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0, ++0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3, ++0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e, ++0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90, ++0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0, ++0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80, ++0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11, ++0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25, ++0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0, ++0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94, ++0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff, ++0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04, ++0xfd,0xe0,0x44,0x01,0xf0,0x22,0xf5,0x67,}; ++ ++// =================== v84 UMC B Cut COMMON 2012-04-13 ===================== ++u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = { ++0xc2,0x88,0x02,0x00,0x54,0x00,0x01,0x00,0x04,0x13,0x11,0x08,0x26,0x3d,0x01,0x00, ++0x58,0x97,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x50,0xa1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0x91,0x00,0x00,0x00,0x00,0x00,0xa1,0xe8,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x48,0x29, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x77, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x54,0x80,0x41,0x9e,0xb0,0x00,0x00,0xf0,0x90, ++0x9e,0x5d,0xe0,0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x85,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5, ++0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x85,0xf0,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x86, ++0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x5e,0x90,0x01,0x5f,0x74,0x05,0xf0, ++0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x63,0x14,0xf0,0xe5,0x61,0x54,0x0f,0xc3, ++0x94,0x0c,0x50,0x03,0x12,0x54,0xe3,0x22,0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4, ++0xf0,0x22,0xe4,0xf5,0x65,0x7f,0x60,0x7e,0x01,0x80,0xed,0x7d,0x01,0xaf,0x62,0x02, ++0x54,0xe7,0xb1,0xb0,0xbf,0x01,0x12,0x90,0x9e,0x79,0xe0,0xff,0xe4,0xfd,0xf1,0x79, ++0x12,0x5f,0xf7,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xb1,0xb0,0xbf,0x01,0x0f,0x90, ++0x02,0x09,0xe0,0xff,0x7d,0x01,0xf1,0x79,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x22, ++0x22,0x22,0x00,0x02,0x45,0x03,0x02,0x45,0x06,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x20,0x8a,0x21,0x89,0x22,0x90,0x9e,0x87,0x71,0x8b,0xab,0x23,0xaa,0x24,0xa9, ++0x25,0x90,0x9e,0x8a,0x71,0x8b,0xaf,0x26,0x15,0x26,0xef,0x60,0x1b,0x90,0x9e,0x8a, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x87,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x20,0xaa,0x21,0xa9,0x22,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x9e,0x11,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0x90,0x06,0xa9, ++0xe0,0x90,0x9e,0x10,0xf0,0xe0,0x54,0xc0,0x70,0x08,0x53,0x64,0xfe,0x53,0x64,0xfd, ++0x91,0xcb,0x90,0x9e,0x10,0xe0,0x30,0xe6,0x13,0x43,0x64,0x01,0x90,0x9e,0x66,0xe0, ++0x64,0x02,0x60,0x04,0x91,0xd2,0x80,0x07,0x91,0x79,0x80,0x03,0x53,0x64,0xfe,0x90, ++0x9e,0x10,0xe0,0x30,0xe7,0x16,0x43,0x64,0x02,0xe4,0x90,0x9e,0x85,0x91,0x4e,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x67,0x74,0x01,0xf0,0x22,0x53,0x64,0xfd,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4,0x74,0xb0,0xf0,0x74,0x45,0xa3, ++0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90, ++0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80, ++0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82, ++0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0x75,0x13,0x00,0x90,0x01,0xc4,0x74,0xe8,0xf0,0x74,0x45, ++0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55, ++0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5, ++0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x09,0x90, ++0x01,0x3c,0x74,0x02,0xf0,0x12,0x61,0xc9,0xe5,0x34,0x30,0xe2,0x38,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x85,0xe4,0xf0,0x90, ++0x9e,0x5b,0xe0,0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x91,0x5e, ++0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x07,0x90,0x9e, ++0x64,0xe4,0xf0,0x91,0xcb,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c,0x74,0x08,0xf0, ++0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x85,0xe4,0xf0,0x90,0x9e,0x5b,0xe0, ++0x90,0x9e,0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x5e,0x90,0x01,0x5f, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e,0x63,0xe4,0xf0, ++0x91,0xcb,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x4b,0xfb, ++0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4c,0x3d,0xe5,0x35, ++0x30,0xe0,0x44,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0, ++0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x13,0xb4,0x01,0x02,0x80,0x1c,0xe5,0x13,0xb4, ++0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x13,0xb4,0x04,0x05,0x90,0x00,0x83,0x80, ++0x08,0xe5,0x13,0xb4,0x0c,0x06,0x90,0x00,0x83,0xe0,0xf5,0x62,0x90,0x01,0xbb,0xe5, ++0x62,0xf0,0x12,0x60,0xc0,0x91,0xcb,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74, ++0x04,0xf0,0xe5,0x35,0x30,0xe4,0x06,0x90,0x01,0x3d,0x74,0x10,0xf0,0xe5,0x36,0x30, ++0xe0,0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e, ++0x74,0x02,0xf0,0x74,0xe8,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x9e,0x98,0xef,0xf0,0xa3,0xed, ++0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x63,0x60,0x05,0xe4,0xff,0x12,0x54,0x97,0x90, ++0x9e,0x98,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9a,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90, ++0x9e,0x98,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90, ++0x9e,0x99,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9a,0xa3,0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54, ++0xf7,0xf0,0x90,0x9e,0x9a,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0x75,0x28,0x33,0xe4,0xf5, ++0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0, ++0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x16,0xf0,0xa3,0xf0, ++0x75,0x8e,0x02,0xf1,0xa1,0xf1,0xe9,0x90,0x9e,0x7e,0xef,0xf0,0xf1,0xdd,0x90,0x9e, ++0x80,0xef,0xf0,0xf1,0xf6,0x90,0x9e,0x75,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5,0x57, ++0x12,0x6e,0x77,0xf1,0xd4,0x12,0x60,0x4b,0x12,0x32,0x3d,0xf1,0xc9,0x11,0x0b,0x12, ++0x50,0x0e,0xf1,0xcd,0xf1,0xb1,0x12,0x44,0xff,0xf1,0x45,0x90,0x9e,0x18,0xe5,0xd9, ++0xf0,0x11,0xd0,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0xb1,0x45,0x75,0xe8, ++0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x9e,0x16,0xe0,0x64,0x01,0xf0,0x24,0x29,0x90, ++0x01,0xc4,0xf0,0x74,0x48,0xa3,0xf0,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57, ++0xef,0xd2,0xaf,0x12,0x58,0x74,0xe5,0x57,0x30,0xe6,0x17,0xc2,0xaf,0x53,0x57,0xbf, ++0xd2,0xaf,0x12,0x67,0xa1,0x90,0x9e,0x43,0xe0,0xff,0x60,0x03,0xb4,0x01,0x03,0x12, ++0x7b,0x49,0x90,0x9e,0x43,0xe0,0x70,0x03,0x12,0x7c,0x4c,0x12,0x73,0x85,0x80,0xb6, ++0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0x31,0x05,0x7d,0xff,0x7f,0x55,0x31,0x05,0x7d, ++0xff,0x7f,0x56,0x31,0x05,0x7d,0xff,0x7f,0x57,0x80,0x0a,0xf0,0x90,0x00,0x45,0xe0, ++0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83, ++0x00,0xed,0xf0,0xb1,0x45,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60, ++0x66,0x24,0x02,0x60,0x02,0x21,0xc1,0x90,0x9e,0x3f,0x74,0x02,0xf0,0x90,0x00,0x48, ++0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x31,0x05,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f, ++0x47,0x31,0x05,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90, ++0x9e,0x3f,0xf0,0x90,0x9e,0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x31, ++0x05,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x46,0xe0, ++0x44,0x10,0xfd,0x7f,0x46,0x80,0x38,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x90,0x9e,0x45, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x00,0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x45,0xe0,0x44, ++0x10,0xfd,0x7f,0x45,0x31,0x05,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x31, ++0x05,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x41,0xf0,0x90,0x00,0x01,0x12, ++0x42,0x20,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x40,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25, ++0xe0,0x90,0x9e,0x44,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x4f,0xf0,0x90,0x05,0x61, ++0xe0,0x90,0x9e,0x50,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x51,0xf0,0x90,0x05,0x63, ++0xe0,0x90,0x9e,0x52,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x90, ++0x9e,0x40,0xe0,0xff,0x91,0xf0,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e, ++0x41,0xe0,0x70,0x02,0x41,0xc8,0x90,0x9e,0x40,0xe0,0x70,0x02,0x41,0xc8,0x90,0x9e, ++0x44,0xe0,0x70,0x02,0x41,0xc8,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf, ++0x90,0x9e,0x53,0x74,0x01,0xf0,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x11,0xfc, ++0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x31,0x05,0x90,0x9e,0x39,0xe0,0x60, ++0x15,0x90,0x9e,0x45,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e, ++0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0, ++0x54,0xef,0xfd,0x7f,0x45,0x31,0x05,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e, ++0x4f,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x50,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e, ++0x51,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x52,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d, ++0x20,0xe4,0xff,0x12,0x37,0x00,0x80,0x2b,0x90,0x9e,0x41,0xe0,0x70,0x2d,0x90,0x9e, ++0x53,0x11,0xfb,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x31,0x05,0x90,0x05, ++0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x24,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff, ++0x12,0x36,0x92,0x90,0x9e,0x24,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x14,0x8a,0x15, ++0x89,0x16,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x42,0xf0,0xe0,0x30,0xe0,0x4b, ++0x90,0x9e,0x39,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x3b, ++0x12,0x2a,0x7f,0xab,0x14,0xaa,0x15,0xa9,0x16,0x90,0x00,0x01,0x12,0x42,0x20,0xff, ++0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0x90,0x9e,0x3b,0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e, ++0x45,0x12,0x2a,0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x39,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90, ++0x9e,0x3b,0x12,0x2a,0x7f,0x90,0x9e,0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x42,0xe0,0x30,0xe1,0x19,0x7d, ++0x0c,0x7f,0x47,0x31,0x05,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x31,0x05, ++0x90,0x00,0x46,0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f, ++0x47,0x31,0x05,0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x31,0x05,0x90,0x00, ++0x46,0xe0,0x54,0xef,0xfd,0x7f,0x46,0x31,0x05,0xe4,0x90,0x9e,0x3f,0xf0,0x22,0x90, ++0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x31,0x05,0xe4,0xfd,0x7f,0x51,0x31,0x05,0xe4, ++0xfd,0x7f,0x52,0x31,0x05,0xe4,0xfd,0x7f,0x53,0x21,0x05,0xe5,0x65,0x64,0x01,0x70, ++0x3b,0xd1,0x85,0xbf,0x01,0x04,0x7f,0x01,0xd1,0x79,0x90,0x00,0x46,0xe0,0x44,0x04, ++0xfd,0x7f,0x46,0x31,0x05,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x31,0x05, ++0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x31,0x05,0x7f,0x02,0xd1,0xa1,0x8f, ++0x69,0x90,0x01,0xc9,0xe5,0x69,0xf0,0xb4,0x01,0x02,0xd1,0x19,0x22,0x90,0x9e,0x41, ++0xe0,0x64,0x01,0x60,0x02,0x81,0xef,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46, ++0x31,0x05,0x90,0x9e,0x53,0xe0,0x70,0x31,0x90,0x9e,0x39,0xe0,0x60,0x15,0x90,0x9e, ++0x45,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f, ++0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x9e,0x40,0xe0,0xff,0x91,0xf0, ++0x90,0x9e,0x53,0x74,0x01,0x11,0xfb,0x80,0x3f,0x90,0x9e,0x53,0xe0,0x64,0x01,0x70, ++0x37,0x90,0x9e,0x44,0xe0,0xff,0x91,0xf0,0xe4,0x90,0x9e,0x53,0xf0,0x90,0x00,0x45, ++0xe0,0x44,0x01,0xfd,0x7f,0x45,0x31,0x05,0x90,0x9e,0x39,0xe0,0x60,0x15,0x90,0x9e, ++0x3b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f, ++0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90, ++0x9e,0x4f,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x50,0xe0,0x90,0x05,0x85,0xf0,0x90, ++0x9e,0x51,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x52,0xe0,0x90,0x05,0x87,0xf0,0x22, ++0x90,0x05,0x60,0xe0,0x90,0x9e,0x4f,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x50,0xf0, ++0x90,0x05,0x62,0xe0,0x90,0x9e,0x51,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x52,0xf0, ++0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x50,0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0, ++0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90, ++0x9e,0x52,0x80,0x03,0x90,0x9e,0x51,0xe0,0x04,0xf0,0x22,0x90,0x9e,0x50,0xe0,0x2f, ++0xf0,0x22,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf,0xfe, ++0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x2a,0xed, ++0xf0,0x90,0x9e,0x29,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90, ++0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4, ++0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0, ++0xb1,0x45,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x59,0x90,0x9e,0x29,0xe0,0x24,0xf8,0xf0, ++0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80, ++0x1a,0x90,0x9e,0x29,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0xb1,0x45,0x90,0x9e,0x29, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x43,0xb1,0x42,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,0xb1, ++0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x31,0x05,0x90,0x9e,0xb1,0xe0, ++0x44,0xb0,0xfd,0x7f,0x49,0x21,0x05,0x90,0x9e,0x27,0xee,0xf0,0xa3,0xef,0xf0,0x75, ++0x65,0x01,0x8e,0x66,0xf5,0x67,0xe4,0xfd,0x7f,0x0b,0xb1,0x55,0xe4,0xfd,0x7f,0x02, ++0xb1,0x55,0xd1,0x85,0xe4,0xff,0xd1,0x79,0xe4,0xf5,0x69,0x90,0x01,0xc9,0xe5,0x69, ++0xf0,0x90,0x9e,0x27,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45, ++0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0x90,0x01,0xca,0xe5,0x68,0xf0,0xef, ++0x60,0x02,0xd1,0x19,0x22,0x7f,0x0b,0xd1,0xa1,0xef,0x65,0x68,0x60,0x10,0xe5,0x68, ++0xb4,0x01,0x05,0xe4,0xf5,0x68,0x80,0x03,0x75,0x68,0x01,0x7f,0x01,0x22,0x7f,0x00, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07, ++0x50,0x43,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4, ++0xff,0x90,0x00,0x46,0xb1,0x42,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8, ++0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0, ++0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13, ++0xd8,0xf8,0xff,0x80,0x4b,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f, ++0xf0,0xb1,0x45,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb,0xe4,0xfe, ++0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff, ++0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x31,0x05,0x90,0x04,0xfd,0xe4,0xf0, ++0xa3,0xf0,0x90,0x9e,0x43,0xf0,0x90,0x9e,0x49,0xf0,0x90,0x9e,0x4c,0xf0,0x90,0x9e, ++0x4a,0xf0,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4b,0xf0,0x90,0x9e,0x4e,0xf0,0x90,0x9e, ++0x35,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x3a,0xf0,0x90,0x9e, ++0x3f,0xf0,0x90,0x9e,0x41,0xf0,0x90,0x9e,0x53,0xf0,0x90,0x9e,0x44,0xf0,0x90,0x9e, ++0x40,0xf0,0x90,0x9e,0x39,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x21, ++0x05,0xe4,0x90,0x9e,0x7d,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x21, ++0x05,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0xe4,0xf5,0x68,0x22,0x90,0x01,0x64, ++0x74,0xa0,0xf0,0x22,0x90,0x9e,0x80,0xe0,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0xf3, ++0xe0,0x7f,0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f, ++0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2, ++0xe0,0x30,0xe7,0x05,0x7e,0xfd,0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x90,0x00, ++0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3, ++0xe4,0xf0,0x22,0x90,0x01,0x02,0xe0,0x54,0x03,0xff,0xe0,0x54,0x0c,0x13,0x13,0x54, ++0x3f,0xfe,0xef,0x64,0x01,0x60,0x04,0xef,0xb4,0x03,0x10,0x90,0x9e,0x10,0x74,0x01, ++0xf0,0xa3,0x74,0x37,0xf0,0xa3,0x74,0x01,0xf0,0x80,0x1a,0xee,0x64,0x01,0x60,0x07, ++0xaf,0x06,0xee,0x64,0x03,0x70,0x49,0x90,0x9e,0x10,0x74,0x01,0xf0,0xa3,0x74,0x3d, ++0xf0,0xa3,0x74,0x40,0xf0,0x90,0x9e,0x10,0xe0,0xfe,0xa3,0xe0,0xff,0xf5,0x82,0x8e, ++0x83,0xe0,0xfd,0x90,0x9e,0x12,0xe0,0xfc,0xed,0x5c,0x60,0x0c,0x8f,0x82,0x8e,0x83, ++0xec,0xf0,0xe4,0x90,0x9e,0x77,0xf0,0x22,0x90,0x9e,0x77,0xe0,0x04,0xf0,0xe0,0xc3, ++0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x44,0xea, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0xa1,0xf0,0x74,0x50,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c, ++0xa3,0xe0,0x55,0x29,0xf5,0x2d,0xa3,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b, ++0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x46,0x90,0x01,0x34,0x74,0x01,0xf0,0x85, ++0xd1,0x4d,0x85,0xd2,0x4e,0x85,0xd3,0x4f,0x85,0xd4,0x50,0x85,0xd5,0x51,0x85,0xd6, ++0x52,0x85,0xd7,0x53,0x85,0xd9,0x54,0xe5,0x54,0x54,0x40,0xc3,0x13,0xff,0xe5,0x53, ++0x54,0x20,0x6f,0x70,0x02,0x21,0xf5,0xe5,0x54,0x30,0xe5,0x02,0x21,0xf5,0xe5,0x52, ++0x54,0x3f,0xf5,0x08,0xe5,0x4d,0x54,0x3f,0xf5,0x09,0xe5,0x51,0x54,0x1f,0xff,0xe5, ++0x08,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x09,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x09,0x04,0x75,0xf0,0x0a,0xe5,0x08,0x90,0x90,0x00,0x12,0x43,0x5f,0x75, ++0xf0,0x02,0xe5,0x09,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x53,0x54,0x1f, ++0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x08,0x90,0x90,0x00,0x12,0x43,0x5f, ++0x75,0xf0,0x02,0xe5,0x09,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x54,0x20, ++0xe6,0x24,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4f,0x30,0xe7,0x36,0xaf, ++0x08,0x12,0x63,0x51,0x80,0x2f,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24, ++0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4f, ++0x30,0xe7,0x12,0xe5,0x4f,0x54,0x7f,0xfd,0xe5,0x53,0x54,0x1f,0xf5,0x0d,0xab,0x09, ++0xaf,0x08,0x12,0x62,0xee,0xe5,0x63,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90,0x9e, ++0x66,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x71, ++0xc3,0xef,0x64,0x01,0x70,0x30,0x90,0x9e,0x85,0xf0,0x90,0x9e,0x5b,0xe0,0x90,0x9e, ++0x86,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x5e,0x90,0x01,0x5b,0x74, ++0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x9e,0x64,0xf0,0x80,0x08,0x71,0xc3, ++0xbf,0x01,0x03,0x12,0x44,0xcb,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02, ++0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5,0x5c, ++0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0xd2,0xe5,0x2c,0x30,0xe3,0x06, ++0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10, ++0xf0,0x43,0x57,0x10,0xe5,0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f, ++0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00, ++0x12,0x4b,0xcf,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4d,0x45,0x80,0xfe,0xe5, ++0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x12,0x90, ++0x9e,0x7f,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x61,0x4e,0x90,0x9e,0x7f,0xe4, ++0xf0,0xe5,0x2e,0x30,0xe1,0x0b,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x11, ++0x23,0xe5,0x2e,0x30,0xe2,0x09,0x90,0x01,0x36,0x74,0x04,0xf0,0x12,0x60,0xdf,0xe5, ++0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x60,0x64,0x01,0x70,0x1c, ++0xe5,0x63,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90, ++0x9e,0x85,0xe4,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x60,0xb4,0x01,0x20,0xe5,0x63,0x60,0x1c, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x67,0xe4,0xf0, ++0x53,0x64,0xfd,0xe5,0x64,0x54,0x07,0x70,0x03,0x12,0x44,0xcb,0xe5,0x2e,0x30,0xe5, ++0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x60,0xb4,0x01,0x14,0xe5,0x63,0x60,0x10, ++0x90,0x9e,0x66,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xd2,0x80,0x03,0x12,0x44,0x79, ++0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x60,0xb4,0x01,0x10, ++0xe5,0x63,0x60,0x0c,0x53,0x64,0xfe,0xe5,0x64,0x54,0x07,0x70,0x03,0x12,0x44,0xcb, ++0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x91,0x64,0x74,0xa1,0x04, ++0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0, ++0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f, ++0x00,0x22,0x90,0x9e,0x10,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0, ++0x7b,0x00,0x7a,0x00,0x79,0x58,0x90,0x9e,0x90,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79, ++0x10,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x8d,0x12,0x43,0x8b,0x90,0x9e, ++0xb0,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01, ++0x12,0x71,0x7a,0xef,0x60,0x49,0x90,0x9e,0x8d,0x12,0x43,0x6b,0x8b,0x23,0x8a,0x24, ++0x89,0x25,0x75,0x26,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e, ++0x90,0x12,0x43,0x6b,0x8b,0x23,0x8a,0x24,0x89,0x25,0x90,0x9e,0x8d,0x12,0x43,0x6b, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x26,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12, ++0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0, ++0xd0,0x92,0xaf,0x22,0x90,0x9e,0xa0,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x63, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x1f,0x90,0x9e,0x66,0xe0,0x60,0x06,0x7d,0x01,0x7f, ++0x0c,0x80,0x0d,0xe5,0x61,0x54,0x0f,0xc3,0x94,0x04,0x50,0x06,0x7d,0x01,0x7f,0x04, ++0x91,0xe7,0xe4,0xff,0x91,0x97,0x22,0xef,0x60,0x0b,0x90,0x9e,0x80,0xe0,0xb4,0x01, ++0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x75, ++0x92,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x74, ++0x12,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36, ++0xe6,0xe5,0x63,0x60,0x04,0x7f,0x01,0x91,0x97,0x12,0x74,0xc8,0x53,0x61,0xf0,0x43, ++0x61,0x02,0x22,0x7d,0x01,0x7f,0x0c,0x8f,0x6a,0x8d,0x6b,0xe5,0x6a,0x54,0x0f,0xff, ++0xe5,0x61,0x54,0x0f,0x6f,0x60,0x65,0xe5,0x6a,0x30,0xe2,0x28,0xe5,0x61,0x20,0xe2, ++0x04,0x7f,0x01,0xd1,0xc2,0xe5,0x61,0x30,0xe3,0x0c,0xe5,0x6a,0x20,0xe3,0x07,0xb1, ++0x5d,0xef,0x60,0x48,0xa1,0xa5,0xe5,0x61,0x20,0xe3,0x41,0xe5,0x6a,0x30,0xe3,0x3c, ++0xaf,0x6b,0xc1,0xdc,0xe5,0x61,0x54,0x0f,0xff,0xbf,0x0c,0x0c,0xe5,0x6a,0x20,0xe3, ++0x07,0xb1,0x5d,0xef,0x60,0x26,0xb1,0xa5,0xe5,0x61,0x54,0x0f,0xff,0xbf,0x04,0x0c, ++0xe5,0x6a,0x20,0xe2,0x07,0xf1,0x21,0xef,0x60,0x12,0x91,0xb2,0xe5,0x61,0x54,0x0f, ++0xff,0xbf,0x02,0x08,0x12,0x60,0xbd,0xef,0x60,0x02,0xd1,0xaf,0x22,0x71,0xc3,0xef, ++0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x9e,0x64,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x9e,0x63,0xe0,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x62,0x54,0x0f,0xd3,0x94,0x04,0x40, ++0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74, ++0x08,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x60,0xb4,0x01, ++0x04,0x7f,0x01,0xd1,0xf6,0x53,0x61,0xf0,0x43,0x61,0x04,0x22,0xef,0x64,0x01,0x70, ++0x2e,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x91,0xe3,0xe4,0xff,0x91,0x97, ++0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90, ++0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7b,0xff,0x12,0x36,0xe6,0x7d, ++0x02,0x7f,0x03,0x12,0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a, ++0xe0,0x44,0x07,0xf0,0x12,0x62,0x4c,0xe5,0x60,0x20,0xe0,0x05,0xe4,0x90,0x9e,0x58, ++0xf0,0x22,0x8b,0x14,0x8a,0x15,0x89,0x16,0x12,0x60,0xb1,0xab,0x14,0xaa,0x15,0xa9, ++0x16,0x12,0x29,0xd9,0xf5,0x63,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24, ++0x03,0x70,0x40,0x7f,0x01,0x80,0x3a,0xab,0x14,0xaa,0x15,0xa9,0x16,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0xe4,0xff,0xd1,0x84,0x80,0x27,0xab,0x14,0xaa,0x15,0xa9,0x16, ++0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0xd1,0x84,0x1f,0x80,0x13,0xab,0x14, ++0xaa,0x15,0xa9,0x16,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0xd1,0x84,0xe4, ++0xff,0xb1,0xbc,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x65,0x74, ++0x01,0xf0,0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x62,0xe0,0x90,0x9e,0x65,0xf0,0x80, ++0x05,0x90,0x9e,0x65,0xed,0xf0,0x90,0x9e,0x65,0xe0,0x90,0x9e,0x56,0xf0,0x22,0x53, ++0x61,0xf0,0x43,0x61,0x01,0x12,0x45,0x00,0x12,0x45,0x01,0x53,0x61,0xf0,0x43,0x61, ++0x02,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x12,0x74,0x53,0x90,0x9e,0xaf,0xe0,0x60,0x05, ++0x90,0x05,0x22,0xe4,0xf0,0x53,0x61,0xf0,0x43,0x61,0x04,0x22,0x90,0x06,0x04,0xe0, ++0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x60,0xb4,0x01,0x04,0xe4,0xff,0xd1,0xf6,0x53, ++0x61,0xf0,0x43,0x61,0x0c,0x22,0x8f,0x27,0x12,0x45,0xb0,0xbf,0x01,0x22,0x90,0x9e, ++0x7a,0xe0,0xff,0x7d,0x01,0x12,0x47,0x79,0xab,0x07,0xaa,0x06,0xad,0x03,0xac,0x02, ++0xaf,0x27,0x12,0x60,0x2a,0xaf,0x03,0x12,0x5f,0xf7,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x71,0xc3,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x58, ++0xe5,0x64,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a,0xe5,0x62, ++0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x39,0xe5, ++0x64,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x64,0x30,0xe4, ++0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x9e,0x58,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x9e,0x5e,0xe0,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0x91,0xf0,0x74,0x57,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff, ++0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0,0xff,0x90,0x00,0x56,0xe0, ++0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55,0x74,0x10,0xf0,0xe5,0x3d, ++0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d,0x30,0xe6,0x1b,0x90,0x00, ++0x55,0x74,0x40,0xf0,0x90,0x9e,0x42,0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x9e, ++0x3f,0xe0,0x60,0x05,0x7f,0x01,0x12,0x49,0x1a,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00, ++0x55,0x74,0x80,0xf0,0x90,0x9e,0x42,0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02, ++0x12,0x49,0x1a,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56,0x74,0x01,0xf0,0xe5,0x3e, ++0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e,0x30,0xe2,0x06,0x90,0x00, ++0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00,0x56,0x74,0x08,0xf0,0x90, ++0x01,0xc4,0x74,0x91,0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0x19,0xe0,0xfd,0x70,0x02,0x21,0xb5,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00, ++0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70, ++0x02,0x21,0xae,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f, ++0xe0,0x90,0x9e,0x1a,0xf0,0x75,0x23,0x01,0x75,0x24,0x9e,0x75,0x25,0x1a,0x75,0x26, ++0x01,0x7b,0x01,0x7a,0x9e,0x79,0x1b,0x12,0x45,0x09,0x90,0x9e,0x1b,0xe0,0xff,0xc4, ++0x13,0x13,0x13,0x54,0x01,0x90,0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90, ++0x00,0x88,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0, ++0x02,0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1d,0xf0,0x90,0x9e,0xae,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1e,0xf0,0x90,0x9e, ++0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x1f,0xf0, ++0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x20,0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90, ++0x9e,0x1c,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f, ++0xe0,0x90,0x9e,0x1d,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12, ++0x43,0x5f,0xe0,0x90,0x9e,0x1e,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79, ++0x1c,0x31,0xb6,0x90,0x9e,0x19,0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8, ++0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0xae,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01, ++0xcc,0xf0,0x90,0x9e,0xae,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x7e,0x90,0x01, ++0xc6,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x21,0x12,0x43,0x8b,0xef,0x12,0x43,0x94, ++0x59,0xfc,0x01,0x59,0xf4,0x02,0x5a,0x20,0x03,0x5a,0x29,0x05,0x5a,0x32,0x06,0x5a, ++0x7e,0x07,0x5a,0x3a,0x09,0x5a,0x43,0x0b,0x5a,0x4c,0x0c,0x5a,0x55,0x0d,0x5a,0x5e, ++0x0e,0x5a,0x67,0x1b,0x5a,0x6f,0x1c,0x5a,0x05,0x2d,0x5a,0x0e,0x2e,0x5a,0x17,0x3b, ++0x00,0x00,0x5a,0x77,0x90,0x9e,0x21,0x12,0x43,0x6b,0xe1,0xe9,0x90,0x9e,0x21,0x12, ++0x43,0x6b,0x02,0x71,0xd0,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0x0b,0x90,0x9e, ++0x21,0x12,0x43,0x6b,0x02,0x72,0x53,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0x8c, ++0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x72,0xb6,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02, ++0x70,0x4a,0x90,0x9e,0x21,0x12,0x43,0x6b,0x80,0x45,0x90,0x9e,0x21,0x12,0x43,0x6b, ++0x02,0x72,0xfe,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x70,0xa2,0x90,0x9e,0x21,0x12, ++0x43,0x6b,0x02,0x49,0xc2,0x90,0x9e,0x21,0x12,0x43,0x6b,0x02,0x7b,0x16,0x90,0x9e, ++0x21,0x12,0x43,0x6b,0x02,0x4a,0xfc,0x90,0x9e,0x21,0x12,0x43,0x6b,0xe1,0xef,0x90, ++0x9e,0x21,0x12,0x43,0x6b,0xe1,0xd1,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90, ++0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07, ++0xfd,0xaf,0x06,0x90,0x9e,0x24,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90, ++0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f, ++0x90,0x9e,0x29,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54, ++0x03,0x90,0x9e,0x2a,0xf0,0x90,0x9e,0x24,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,0x46, ++0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x2b,0xec,0xf0,0xa3,0xed,0xf0,0xef, ++0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12, ++0x43,0x8b,0x90,0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f, ++0xff,0x90,0x9e,0x2d,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x26,0x12,0x43, ++0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x2d,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x26,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42, ++0x20,0xff,0x90,0x9e,0x2b,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0, ++0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x29,0xe0,0xfe,0x90,0x9e, ++0x24,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,0x9e, ++0x25,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,0x75, ++0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x2a,0xe0, ++0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x14,0xef, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x16,0x8f,0x17,0xe5, ++0x14,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x18,0x01,0xf5, ++0x19,0x89,0x1a,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,0x82, ++0x85,0x83,0x1b,0x8f,0x1c,0xe5,0x14,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96, ++0x35,0xf0,0x75,0x1d,0x01,0xf5,0x1e,0x89,0x1f,0x74,0x82,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x5c,0x0d,0x00,0x5c,0x22,0x01,0x5c,0x37, ++0x02,0x5c,0x4c,0x03,0x5c,0x75,0x04,0x5c,0x8a,0x05,0x5c,0x9f,0x06,0x5c,0xc5,0x0c, ++0x5c,0xf2,0x0d,0x5d,0x1f,0x0e,0x5d,0x4c,0x0f,0x00,0x00,0x5d,0x80,0xe5,0x14,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15, ++0x80,0x3c,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74, ++0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x14,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5, ++0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3, ++0x74,0x8f,0xf0,0xa1,0x80,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x14,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5, ++0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0x74, ++0x0d,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xa1,0x80,0x90,0x04,0x47,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12, ++0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12, ++0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x44, ++0xa1,0x77,0x90,0x04,0x4b,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90, ++0x04,0x4a,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90, ++0x04,0x49,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90, ++0x04,0x4f,0xe0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0, ++0x85,0x17,0x82,0x85,0x16,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x17,0x82, ++0x85,0x16,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x17,0x82,0x85,0x16,0x83,0xa3,0xf0, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff, ++0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0xab,0x18,0xe5,0x1a,0x24,0x01,0xf9,0xe4,0x35,0x19,0xfa,0xc0,0x03, ++0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x1d,0xaa,0x1e,0xa9,0x1f,0x90,0x00, ++0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x17, ++0x82,0x85,0x16,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x1c,0x82,0x85,0x1b,0x83, ++0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x17,0x82,0x85,0x16,0x83,0xa3, ++0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x1c,0x82,0x85,0x1b,0x83,0xa3,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x15,0x0b,0x74,0x01,0x7e, ++0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x14, ++0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x06,0xe5,0x15,0x24,0x10,0x80,0x5d,0x15,0x15,0xe5,0x15,0xc3,0x94, ++0x00,0x50,0xca,0x80,0x56,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x15,0x0f,0x74,0x01,0x7e,0x00, ++0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x14,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f, ++0x4e,0x60,0x08,0x90,0x9e,0x30,0xe5,0x15,0xf0,0x80,0x10,0x15,0x15,0xe5,0x15,0xc3, ++0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x30,0xf0,0xe5,0x14,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4, ++0xf5,0x15,0x74,0x01,0x7e,0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x14,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x31,0xe5,0x15,0xf0,0x80, ++0x5b,0x05,0x15,0xe5,0x15,0xb4,0x10,0xca,0x80,0x52,0xe5,0x14,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5, ++0x15,0x74,0x01,0x7e,0x00,0xa8,0x15,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x14,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x15,0x24,0x10,0x80,0x0a,0x05,0x15, ++0xe5,0x15,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x31,0xf0,0x90,0x9e,0x30,0xe0, ++0xff,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,0x9e, ++0x31,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,0xf0, ++0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x06, ++0x90,0x9e,0x30,0x12,0x62,0x94,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x31,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x03,0x12,0x62,0x94, ++0x90,0x9e,0x30,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0, ++0x22,0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3, ++0x94,0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0, ++0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,0x13, ++0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x41,0x93,0x12,0x29,0xd9,0xf5,0x60,0x22,0x12, ++0x29,0xd9,0x90,0x95,0x01,0xf0,0x22,0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0,0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x22,0xe4,0xf5,0x60,0xf5,0x64, ++0xf5,0x63,0x75,0x62,0x0c,0x75,0x61,0x0c,0x90,0x9e,0x66,0xf0,0x90,0x9e,0x64,0xf0, ++0x90,0x9e,0x63,0xf0,0x90,0x9e,0x65,0x04,0xf0,0x90,0x9e,0x56,0xf0,0xe4,0x90,0x9e, ++0x67,0xf0,0x90,0x9e,0x58,0xf0,0x90,0x9e,0x61,0x74,0x07,0xf0,0xe4,0x90,0x9e,0x57, ++0xf0,0x90,0x9e,0x5f,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x5c,0x74,0x0a,0xf0,0xa3, ++0x74,0x05,0xf0,0x90,0x9e,0x5b,0x74,0x14,0xf0,0x90,0x9e,0x62,0x74,0x05,0xf0,0xe4, ++0x90,0x9e,0x5a,0xf0,0x90,0x9e,0x55,0xf0,0x90,0x9e,0x7f,0xf0,0x90,0x9e,0x5e,0xf0, ++0x22,0xe4,0x90,0x9e,0x67,0xf0,0x90,0x9e,0x57,0xf0,0xf5,0x64,0x22,0x7f,0x00,0x22, ++0xe5,0x62,0x30,0xe6,0x19,0xe5,0x62,0x54,0x0f,0xff,0x90,0x9e,0x54,0xe0,0xfe,0x4f, ++0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x54,0xf0,0x53,0x62,0xbf,0x22,0xe5, ++0x60,0x64,0x01,0x70,0x68,0xe5,0x63,0x60,0x64,0xe5,0x63,0x64,0x02,0x60,0x06,0xe5, ++0x63,0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x56,0xf0,0x90,0x06,0xaa, ++0xe0,0x90,0x9e,0x65,0xf0,0x90,0x9e,0x56,0xe0,0x70,0x07,0x90,0x9e,0x65,0xe0,0xff, ++0x80,0x05,0x90,0x9e,0x56,0xe0,0xff,0x90,0x9e,0x56,0xef,0xf0,0x90,0x9e,0x58,0xe0, ++0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90,0x9e,0x57,0xf0,0x90,0x05,0x58,0x74,0x03,0xf0, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x64,0xfd,0x53,0x64, ++0xef,0xe5,0x63,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0x22,0xe4,0xfb, ++0x90,0x9e,0x9c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x63,0x60,0x6a,0xe5,0x60, ++0x64,0x01,0x70,0x64,0xe5,0x63,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24,0x02,0x24, ++0xfb,0x50,0x02,0x80,0x21,0x90,0x9e,0x56,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0, ++0x60,0x14,0x90,0x9e,0x56,0xe0,0x70,0x08,0x90,0x9e,0x65,0xe0,0x90,0x9e,0x56,0xf0, ++0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x2f,0x43,0x64,0x10,0xe4,0x90,0x9e,0x85, ++0xf0,0x90,0x9e,0x57,0xe0,0x75,0xf0,0x03,0xa4,0xff,0x90,0x9e,0x61,0xe0,0x2f,0x12, ++0x44,0x53,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x61,0x54,0x0f,0xc3,0x94,0x04,0x50, ++0x07,0x7d,0x01,0x7f,0x04,0x12,0x54,0xe7,0x22,0xe4,0x90,0x9e,0x15,0xf0,0xe5,0x63, ++0x60,0x79,0x90,0x9e,0x67,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x64,0xfd,0xe5,0x64,0x54, ++0x07,0x70,0x68,0x80,0x63,0x90,0x9e,0x57,0xe0,0x04,0xf0,0x53,0x64,0xef,0x90,0x9e, ++0x15,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee,0x33,0xfc,0x90,0x9e,0x57,0xe0, ++0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef,0x24,0x02,0xff,0xe4,0x3e,0xfe, ++0x90,0x9e,0x57,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06,0x06,0x90,0x05,0x58,0xe0,0x04, ++0xf0,0xe9,0xff,0x90,0x9e,0x5c,0xe0,0x2f,0xff,0xe4,0x33,0xfe,0x90,0x9e,0x57,0xe0, ++0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40,0x0d,0xe5,0x60,0xb4,0x01,0x0b, ++0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44,0xcb,0x22,0x90,0x9e,0x5f,0xe0, ++0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x93,0x12,0x43,0x8b,0x90,0x9e,0x96,0xe0,0x54,0xf0,0x44,0x06,0xff,0xf0,0xed,0x54, ++0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x93,0x12,0x43,0x6b, ++0x90,0x9e,0x90,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x96,0x12,0x53,0xf1,0xd0, ++0xd0,0x92,0xaf,0x22,0xe0,0xfd,0x74,0x26,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xed,0xf0,0xaf,0x14,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20, ++0x50,0x0e,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29, ++0x74,0xa6,0x2f,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x68,0xef, ++0xf0,0x24,0xa6,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x69,0xf0,0x7b, ++0x01,0x7a,0x9e,0x79,0x68,0x7d,0x02,0x51,0x57,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x0a, ++0x8d,0x0b,0xe5,0x0b,0x54,0x1f,0xf5,0x10,0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94, ++0xf5,0x83,0xe0,0xf5,0x0e,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x11,0x03,0x80, ++0x03,0x75,0x11,0x01,0xeb,0xc3,0x95,0x11,0x40,0x04,0xaf,0x0a,0x80,0x33,0xe5,0x0e, ++0x25,0x0d,0xf5,0x0f,0xe5,0x10,0x90,0x41,0xd6,0x93,0xff,0xe5,0x0f,0xd3,0x9f,0x74, ++0x01,0x40,0x11,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x0b, ++0xaf,0x0a,0x41,0xa5,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x0f,0xf0, ++0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74, ++0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xe0,0x54,0x1f,0xf5,0x12,0xd3,0x9f, ++0x40,0x02,0x8f,0x12,0xe5,0x12,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x12,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe, ++0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee, ++0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x12,0x51,0xa5,0xaf,0x12,0x22,0xac,0x07,0xec, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x1f,0xe5,0x1f,0x54,0x1f,0xff,0x90,0x9e,0x25,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x27,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48, ++0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x28,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x29,0xcb,0xf0,0xa3,0xeb, ++0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3, ++0xe0,0x90,0x9e,0x2b,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e, ++0x28,0xe0,0x90,0x9e,0x25,0xf0,0xf5,0x1f,0xed,0x70,0x02,0xa1,0x13,0x90,0x9e,0x26, ++0xed,0xf0,0xe5,0x1f,0x30,0xe6,0x0a,0x90,0x9e,0x25,0xe0,0xf5,0x1f,0xa3,0xe0,0x14, ++0xf0,0x90,0x9e,0x26,0xe0,0x70,0x02,0xa1,0x13,0x90,0x9e,0x25,0xe0,0xff,0xd3,0x94, ++0x00,0x50,0x02,0xa1,0x13,0xe4,0x90,0x9e,0x24,0xf0,0xef,0x14,0x90,0x9e,0x23,0xf0, ++0x90,0x9e,0x27,0xe0,0xfd,0x90,0x9e,0x23,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x2b,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x9e,0x23,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x9e,0x29,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x23,0xe0,0xf5, ++0x1f,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x26,0xe0,0xff,0x90,0x9e,0x24,0xe0,0x6f,0x60, ++0x08,0x90,0x9e,0x23,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x26,0xe0,0xff,0x90,0x9e, ++0x24,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x23,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x27, ++0xe0,0xf5,0x1f,0xe5,0x1f,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x1f,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x04,0xad,0x1f,0x51,0xa5,0xaf,0x1f,0x22,0xad,0x07,0xed,0xc3, ++0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80, ++0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x1f, ++0xe5,0x1f,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0, ++0xff,0x90,0x9e,0x23,0xf0,0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x24,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x26, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xc1,0x7a, ++0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x9e, ++0x23,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xab,0xeb,0xc3,0x94,0x10,0x40,0x21, ++0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x24,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70, ++0x23,0xeb,0xc3,0x94,0x10,0x50,0x40,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x26,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x23,0xbb,0x11,0x09,0x90,0x9e,0x25,0xe0,0x30,0xe7,0x02,0x7b,0x17, ++0xeb,0x64,0x13,0x60,0x03,0xbb,0x12,0x09,0x90,0x9e,0x24,0xe0,0x30,0xe0,0x02,0x7b, ++0x18,0xac,0x03,0x8c,0x1f,0x80,0x34,0x0b,0x80,0x84,0x90,0x9e,0x23,0xe0,0xfb,0x6c, ++0x70,0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0, ++0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x1f,0x20,0xe6, ++0x07,0xec,0x44,0x40,0xf5,0x1f,0x80,0x03,0xaf,0x1f,0x22,0xec,0x25,0xe0,0x24,0x9e, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25, ++0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56, ++0x90,0x9e,0x23,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef, ++0xf0,0xac,0x07,0x8f,0x1f,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x1f,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83, ++0xe4,0xf0,0xaf,0x05,0xe5,0x1f,0x44,0x80,0xfd,0x51,0xa5,0xe5,0x1f,0x44,0x80,0xff, ++0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd, ++0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f, ++0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0, ++0x22,0xe4,0xf5,0x14,0xe5,0x14,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90, ++0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09, ++0xe5,0x14,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x03,0x02,0x6e,0x6a, ++0xe5,0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3, ++0xe0,0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x03,0x02,0x6e,0x6a,0xe5,0x14,0x94,0x20, ++0x40,0x09,0x90,0x9a,0xc5,0xe0,0x60,0x03,0x02,0x6e,0x76,0xe5,0x14,0x75,0xf0,0x0a, ++0xa4,0x24,0x00,0xf9,0x74,0x90,0x35,0xf0,0x75,0x18,0x01,0xf5,0x19,0x89,0x1a,0xe5, ++0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0, ++0x90,0x9e,0x1b,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x14,0x25,0xe0,0x24,0xc4,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x1d,0xcf,0xf0,0xa3,0xef, ++0xf0,0xe5,0x14,0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x19,0xf0,0x80,0x12,0x74,0xa6,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x19,0xf0,0x90,0x9e, ++0x19,0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x48,0x12, ++0x43,0x5f,0xe0,0x90,0x9e,0x20,0xf0,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0x41,0x9f,0x90,0x9e,0x20,0xe0,0xff,0x90, ++0x9e,0x1a,0xe0,0x9f,0x40,0x13,0x90,0x9e,0x20,0xe0,0x90,0x9e,0x1a,0xf0,0xee,0x54, ++0x40,0xfe,0x90,0x9e,0x19,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x54,0x05,0x64, ++0x01,0x70,0x29,0x90,0x9e,0x1a,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40, ++0xda,0x80,0x30,0x90,0x9e,0x1a,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x1a,0xe0, ++0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x1a,0xe0, ++0x90,0x41,0x2e,0x93,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1f,0xe0,0x75,0xf0,0x06,0xa4, ++0x24,0x50,0xf9,0x74,0x40,0x35,0xf0,0xfa,0x7b,0xff,0x8b,0x15,0xf5,0x16,0x89,0x17, ++0xe5,0x14,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x1b, ++0xa3,0xe0,0xf5,0x1c,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a, ++0x12,0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35, ++0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x01,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab,0x15, ++0xaa,0x16,0xa9,0x17,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef, ++0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90, ++0x00,0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00, ++0x06,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee, ++0x35,0x1b,0xf5,0x1b,0xab,0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x04,0x12,0x42,0x20, ++0xff,0x7e,0x00,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd, ++0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xab, ++0x15,0xaa,0x16,0xa9,0x17,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e, ++0x1b,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x1c,0x9f,0xe5,0x1b,0x9e, ++0x40,0x0c,0xe5,0x1c,0x9f,0xf5,0x1c,0xe5,0x1b,0x9e,0xf5,0x1b,0x80,0x05,0xe4,0xf5, ++0x1b,0xf5,0x1c,0xe5,0x14,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe5,0x1b,0xf0,0xa3,0xe5,0x1c,0xf0,0x90,0x9e,0x19,0xe0,0x25,0xe0,0x24,0x66,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x1c,0xe4,0x93,0x95,0x1b, ++0x50,0x07,0xaf,0x14,0x12,0x65,0x5c,0xa1,0x31,0x90,0x9e,0x19,0xe0,0x25,0xe0,0x24, ++0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x1c,0xe4,0x93, ++0x95,0x1b,0x50,0x02,0xa1,0x31,0x7d,0x01,0xaf,0x14,0x12,0x63,0xbd,0xa1,0x31,0x74, ++0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02, ++0x81,0x3a,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0xc3,0x94, ++0x19,0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x1a,0xe0,0xc3,0x94,0x11, ++0x40,0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x1a,0xe0, ++0xc3,0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x1a,0xe0,0xc3,0x94, ++0x03,0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0, ++0x74,0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x1e,0x74,0x44, ++0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02, ++0x61,0xe7,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x61,0xe7,0x74,0x85,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff, ++0xe4,0x33,0xfe,0x74,0x41,0x25,0x14,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd, ++0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4, ++0x33,0xfe,0x74,0x44,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f, ++0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x1a,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75, ++0x1e,0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x1e,0x03,0x80,0x03,0x75, ++0x1e,0x01,0x74,0x41,0x25,0x14,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74, ++0x85,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x14,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x1e,0x74,0xe6,0x25,0x14,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x1a,0xe0,0xff,0x74,0x26,0x25,0x14, ++0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe5,0x1e,0xf0,0x75,0xf0,0x09,0xe5,0x14,0x90,0x96,0x4c,0x12, ++0x43,0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x1e,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x1e,0xa1,0x2c,0xec,0x64,0x06,0x60,0x02,0xa1, ++0x31,0xf5,0x1b,0xf5,0x1c,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x1b,0xe0, ++0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x21,0xee,0xf0,0xa3,0xef,0xf0,0x74, ++0x84,0x25,0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x1e,0xe4,0xf5,0x1d, ++0xab,0x18,0xaa,0x19,0xa9,0x1a,0x75,0xf0,0x02,0xe5,0x1d,0xa4,0xf5,0x82,0x85,0xf0, ++0x83,0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x1d,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00, ++0x12,0x29,0xf2,0xef,0x25,0x1c,0xf5,0x1c,0xee,0x35,0x1b,0xf5,0x1b,0xc3,0x90,0x9e, ++0x22,0xe0,0x95,0x1c,0x90,0x9e,0x21,0xe0,0x95,0x1b,0x40,0x07,0x05,0x1d,0xe5,0x1d, ++0xb4,0x05,0xbd,0xe5,0x1d,0xc3,0x13,0xf5,0x1d,0xe5,0x1e,0xb4,0x01,0x06,0xe5,0x1d, ++0x70,0x46,0x80,0x13,0xe5,0x1e,0xb4,0x03,0x15,0xe5,0x1d,0x70,0x05,0x75,0x1e,0x03, ++0x80,0x39,0xe5,0x1d,0xb4,0x01,0x05,0x75,0x1e,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x1e, ++0xb4,0x05,0x28,0xe5,0x1d,0x70,0x05,0x75,0x1e,0x05,0x80,0x0d,0xe5,0x1d,0xb4,0x01, ++0x05,0x75,0x1e,0x03,0x80,0x03,0x75,0x1e,0x01,0xd3,0x90,0x9e,0x1e,0xe0,0x94,0x03, ++0x90,0x9e,0x1d,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x1e,0xd3,0x90,0x9e,0x1e,0xe0, ++0x94,0x03,0x90,0x9e,0x1d,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x1e,0x74,0x84,0x25, ++0x14,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x1e,0xf0,0xfd,0xaf,0x14,0x12,0x67, ++0x61,0x74,0xe6,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05, ++0x74,0xe6,0x50,0x0e,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0, ++0x80,0x0b,0x25,0x14,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x1d, ++0xe0,0xfe,0xa3,0xe0,0xff,0xc3,0x74,0xff,0x9f,0xfd,0x74,0xff,0x9e,0xfc,0xe5,0x14, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xd3, ++0x9d,0xea,0x9c,0xe5,0x14,0x50,0x13,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xee,0x8f,0xf0,0x12,0x42,0x81,0x80,0x10,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0x74,0xff,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x44, ++0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xff,0xc3,0x74,0xff,0x9f, ++0xfd,0x74,0xff,0x9e,0xfc,0xe5,0x14,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xd3,0x9d,0xea,0x9c,0xe5,0x14,0x50,0x13,0x25,0xe0, ++0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xee,0x8f,0xf0,0x12,0x42,0x81,0x80, ++0x10,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xff,0xf0,0xa3, ++0xf0,0xab,0x18,0xaa,0x19,0xa9,0x1a,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4, ++0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00, ++0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,0xe5,0x14,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0xc4,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,0x14,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x14,0xe5,0x14,0xc3,0x94, ++0x40,0x50,0x03,0x02,0x67,0xa4,0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0, ++0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95, ++0x01,0x04,0xf0,0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3, ++0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0x74,0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0, ++0xed,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0x74,0x86,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x90,0x41,0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c, ++0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x4a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f, ++0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74, ++0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3, ++0x94,0x20,0x50,0x0f,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13, ++0xf0,0x80,0x0d,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0, ++0x0d,0xed,0x64,0x40,0x60,0x03,0x02,0x6e,0xa5,0x22,0x12,0x29,0xd9,0xf5,0x14,0xc3, ++0x94,0x40,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x14,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x14,0xb4,0x40,0x0a,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x96,0x42,0xf0,0x22,0x90,0x9e,0x30,0x12,0x43,0x8b,0x90, ++0x9e,0x33,0xe0,0x54,0xf0,0x44,0x02,0xf0,0x54,0x0f,0x44,0xc0,0xf0,0x90,0x9e,0x30, ++0x12,0x43,0x6b,0x90,0x9e,0x90,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x33,0x02, ++0x53,0xf1,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x90,0x00,0x01,0x12,0x42,0x20,0xfc, ++0xed,0xc3,0x94,0x40,0x40,0x02,0xe4,0xfd,0xec,0xc3,0x94,0x40,0x40,0x02,0xe4,0xfc, ++0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0, ++0xfb,0xea,0x90,0x9e,0x24,0xf0,0xeb,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x26,0xf0,0xeb, ++0xa3,0xf0,0xa3,0xed,0xf0,0xa3,0x74,0xff,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xfa,0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x2a,0xf0,0xeb, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfa, ++0xa3,0xe0,0xfb,0xea,0x90,0x9e,0x2c,0xf0,0xeb,0xa3,0xf0,0xa3,0xec,0xf0,0xa3,0x74, ++0xff,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xec,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0x7b,0x01,0x7a,0x9e,0x79,0x24,0x01,0x79,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0xa4,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e, ++0xa4,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa7, ++0xe0,0x94,0xe8,0x90,0x9e,0xa6,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44, ++0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa6,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81, ++0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x24,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x66,0xf0,0x90,0x00,0x03,0x12,0x42, ++0x20,0x90,0x9e,0x55,0xf0,0x12,0x56,0x22,0x90,0x01,0xe5,0xe5,0x63,0xf0,0x90,0x9e, ++0x66,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x5c,0xf0,0x90,0x00,0x01,0x12, ++0x42,0x20,0x90,0x9e,0x5d,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5b,0xf0,0x90, ++0x00,0x03,0x12,0x42,0x20,0x90,0x9e,0x62,0xf0,0x22,0x90,0x9e,0x5c,0x74,0x0a,0xf0, ++0x90,0x9e,0x5d,0x74,0x05,0xf0,0x90,0x9e,0x5b,0x74,0x14,0xf0,0x90,0x9e,0x62,0x74, ++0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x61, ++0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x5f,0xe4,0xf0,0xa3,0xef,0xf0, ++0x80,0x0f,0x90,0x9e,0x61,0x74,0x07,0xf0,0x90,0x9e,0x5f,0xe4,0xf0,0xa3,0x74,0x03, ++0xf0,0x90,0x9e,0x5f,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x9e,0x24,0x12, ++0x2a,0x8b,0x00,0x00,0x00,0x00,0x12,0x29,0xd9,0x60,0x0d,0x90,0x9e,0x5e,0xf0,0xe4, ++0xfd,0x7f,0x04,0x12,0x54,0xe7,0x80,0x05,0xe4,0x90,0x9e,0x5e,0xf0,0x90,0x9e,0x5e, ++0xe0,0x90,0x01,0xe7,0xf0,0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf, ++0x05,0xed,0x2e,0x90,0x9e,0x78,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f, ++0x90,0x9e,0x79,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x7a, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x7b,0xf0,0x90,0x00, ++0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed,0x2f,0x90,0x9e,0x7c,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x24,0x12,0x43,0x8b,0x90,0x9e,0x24,0x12,0x43, ++0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x9e,0x24,0x12,0x43,0x6b,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12, ++0x29,0xd9,0xff,0x60,0x2d,0xb5,0x65,0x16,0x90,0x9e,0x24,0x12,0x43,0x6b,0x90,0x00, ++0x01,0x12,0x42,0xc2,0x65,0x67,0x70,0x04,0xe5,0x66,0x65,0xf0,0x60,0x24,0x90,0x9e, ++0x24,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x12,0x4e,0x37, ++0x80,0x10,0x90,0x9e,0x24,0x12,0x43,0x6b,0x12,0x29,0xd9,0x65,0x65,0x60,0x03,0x12, ++0x44,0xc2,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x24,0x14,0x70,0x1a,0x7b,0x01, ++0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x71,0xb0,0xbf,0x01,0x09,0x90,0x06,0x35, ++0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0x80,0xcd,0xe4,0x90,0x06,0x34,0xf0,0x22, ++0x8e,0x14,0x8f,0x15,0x8b,0x16,0x8a,0x17,0x89,0x18,0xe4,0x90,0x9e,0x19,0xf0,0xef, ++0x90,0x00,0x31,0xf0,0x12,0x4d,0x45,0xe5,0x14,0x54,0x03,0xff,0x90,0x00,0x32,0xe0, ++0x54,0xfc,0x4f,0xf0,0x12,0x4d,0x45,0x90,0x00,0x33,0xe0,0x54,0x7f,0xf0,0x12,0x4d, ++0x45,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x19,0xe0,0xc3,0x94,0x64,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x19,0xe0,0xc3,0x94,0x64,0x50,0x10,0x90, ++0x00,0x30,0xe0,0xab,0x16,0xaa,0x17,0xa9,0x18,0x12,0x42,0x4d,0x7f,0x01,0x22,0x7f, ++0x00,0x22,0xe4,0x90,0x9e,0xac,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3, ++0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90, ++0x9e,0xad,0xe0,0x94,0xe8,0x90,0x9e,0xac,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22, ++0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x9e,0xac,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x80,0xc6,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0b,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90, ++0x9e,0x80,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95, ++0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x9d,0xff,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0x03,0x12, ++0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90, ++0x9e,0x80,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff, ++0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43, ++0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c, ++0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9e,0x0b,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b, ++0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00, ++0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x80,0xe0,0xb4,0x01,0x11, ++0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34, ++0x81,0x22,0xef,0x70,0x02,0xe1,0x49,0x90,0x9e,0x0f,0xe0,0x60,0x03,0x02,0x7b,0x15, ++0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb3,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc7,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d, ++0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdf, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x9d,0xf3,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90, ++0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0,0x64,0x01,0x60, ++0x03,0x02,0x7b,0x15,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xfb,0x12,0x2a, ++0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a,0x7f,0x7f,0x5c, ++0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb7,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12,0x2a,0x7f,0x7f, ++0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcb, ++0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf,0x12,0x2a,0x7f, ++0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f,0x7f,0xd4,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xdf,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe3,0x12,0x2a, ++0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12, ++0x27,0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90, ++0x9d,0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xf7,0x12, ++0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90, ++0x9e,0xa8,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f, ++0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e, ++0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f, ++0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4, ++0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25, ++0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b, ++0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04, ++0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e, ++0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a, ++0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f, ++0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a, ++0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e, ++0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a, ++0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa8,0x12, ++0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa8,0x12, ++0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa8, ++0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0, ++0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43,0x53,0xed,0x44,0x10, ++0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04, ++0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12,0x43, ++0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8,0x12, ++0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa8,0x12,0x2a,0x7f,0x90,0x9e,0xa8, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9, ++0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x43,0xf0, ++0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x14,0xc2,0xaf,0x90, ++0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x49,0x05,0x7d,0x40,0x7f,0x01,0x12, ++0x36,0xaf,0xe5,0x14,0x24,0xff,0x92,0xaf,0x22,0x90,0x9e,0x3a,0xe0,0xc3,0x94,0x14, ++0x50,0x05,0xe0,0x04,0xf0,0x81,0x01,0x90,0x9e,0x3a,0xe0,0x64,0x14,0x60,0x02,0x81, ++0x01,0x90,0x9e,0x49,0xe0,0x70,0x25,0x90,0x9e,0x4c,0xe0,0x70,0x1f,0x90,0x9e,0x4a, ++0xe0,0x70,0x19,0x90,0x9e,0x4d,0xe0,0x70,0x13,0x90,0x9e,0x4b,0xe0,0x70,0x0d,0x90, ++0x9e,0x4e,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,0x49,0xe0, ++0x90,0x04,0x44,0xf0,0x90,0x9e,0x4a,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,0x4b,0xe0, ++0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x4c,0xe0,0x90,0x04,0x48,0xf0,0x90, ++0x9e,0x4d,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x4e,0xe0,0x90,0x04,0x4a,0xf0,0xa3, ++0xe4,0xf0,0x90,0x9e,0x35,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x36,0xe0,0x90,0x04, ++0x4d,0xf0,0x90,0x9e,0x37,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x38,0xe0,0x90,0x04, ++0x4f,0xf0,0xe4,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0x35,0x04,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x9e,0x49,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x19,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x1a, ++0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x1b,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x1c, ++0xf0,0x90,0x9e,0x52,0xe0,0xff,0x90,0x9e,0x1c,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90, ++0x9e,0x52,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x40,0xe0,0xb4,0x01, ++0x02,0x80,0x03,0x90,0x9e,0x44,0xe0,0xff,0x12,0x4c,0xf0,0x22,0x90,0x9e,0x53,0xe0, ++0x64,0x01,0x60,0x08,0x90,0x9e,0x41,0xe0,0x60,0x02,0xa1,0x23,0x90,0x9e,0x35,0xe0, ++0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x36,0xe0,0xc3,0x94, ++0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x37,0xe0,0xc3,0x94,0xff, ++0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x36,0xf0,0x80,0x15,0x90,0x9e,0x38,0xe0, ++0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x36, ++0xf0,0x90,0x9e,0x35,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2, ++0x32,0x90,0x9e,0x49,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90, ++0x9e,0x4a,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e, ++0x4b,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4a,0xf0,0x90, ++0x9e,0x49,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x4c,0xe0,0xc3,0x94, ++0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x4d,0xe0,0xc3,0x94,0xff,0x50, ++0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x4e,0xe0,0xc3,0x94,0xff,0x50,0x0c, ++0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x4d,0xf0,0x90,0x9e,0x4c,0xf0,0x90,0x04,0xfd,0xe0, ++0x44,0x01,0xf0,0x22,0x68,0x4c,}; ++#else ++// =================== v88 TSMC P2PPS with CCX report C2H 2012-12-05 ======================= ++u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { ++0xC1, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x12, 0xDE, 0x3E, 0x00, 0x00, ++0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x60, 0xF2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x68, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00, ++0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02, ++0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09, ++0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08, ++0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18, ++0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21, ++0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20, ++0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10, ++0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20, ++0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04, ++0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05, ++0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E, ++0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E, ++0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A, ++0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04, ++0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, ++0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40, ++0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8, ++0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C, ++0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28, ++0x00, 0x3C, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64, ++0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02, ++0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x02, 0x03, 0x04, 0x0A, 0x0C, 0x0E, ++0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06, ++0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xBB, 0x01, 0x0C, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0x22, 0x50, ++0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE6, 0x22, 0xBB, 0xFE, 0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0x22, ++0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0xBB, 0x01, 0x06, ++0x89, 0x82, 0x8A, 0x83, 0xF0, 0x22, 0x50, 0x02, 0xF7, 0x22, 0xBB, 0xFE, 0x01, 0xF3, 0x22, 0xF8, ++0xBB, 0x01, 0x0D, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0x22, ++0x50, 0x06, 0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x22, 0xBB, 0xFE, 0x05, 0xE9, 0x25, 0x82, 0xC8, 0xF2, ++0x22, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, ++0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, ++0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3, ++0xF5, 0xF0, 0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01, ++0x93, 0x22, 0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, ++0xF5, 0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22, ++0xBB, 0xFE, 0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A, ++0xF5, 0x83, 0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, ++0x83, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB, ++0xFE, 0x06, 0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29, ++0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09, ++0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8, ++0xF2, 0xE5, 0xF0, 0x08, 0xF2, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, ++0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4, ++0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, ++0xA3, 0xE0, 0xF9, 0x22, 0xF8, 0xE0, 0xFB, 0xA3, 0xA3, 0xE0, 0xF9, 0x25, 0xF0, 0xF0, 0xE5, 0x82, ++0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0xFA, 0x38, 0xF0, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, ++0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, ++0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, ++0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, ++0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, ++0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0xB5, 0xF0, 0x06, 0x74, 0x03, 0x93, 0x68, 0x60, ++0xE9, 0xA3, 0xA3, 0xA3, 0xA3, 0x80, 0xD8, 0xE4, 0x90, 0x8A, 0xC5, 0xF0, 0xE5, 0x24, 0x70, 0x03, ++0x02, 0x44, 0x9D, 0xE5, 0x21, 0x64, 0x01, 0x60, 0x03, 0x02, 0x44, 0x9D, 0xE5, 0x24, 0x14, 0x60, ++0x29, 0x24, 0xFD, 0x60, 0x25, 0x24, 0x02, 0x24, 0xFB, 0x50, 0x02, 0x80, 0x23, 0x90, 0x8B, 0x0B, ++0xE0, 0x14, 0xF0, 0xE0, 0x60, 0x04, 0xA3, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x0A, ++0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, 0xF0, 0x80, 0x00, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, ++0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x16, 0xA3, 0xE0, 0xB4, 0x06, 0x05, 0xE4, 0x90, 0x8A, 0xC5, ++0xF0, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x70, 0x04, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, 0xC5, ++0xE0, 0x60, 0x4A, 0x43, 0x25, 0x10, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0C, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0xFF, 0x90, 0x8B, 0x15, 0xE0, 0x2F, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0xE5, 0x22, 0x54, ++0x0F, 0xC3, 0x94, 0x04, 0x50, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x90, 0x8B, 0x2C, ++0xE0, 0x30, 0xE0, 0x09, 0x12, 0x7D, 0xC1, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0xE4, 0xF5, ++0x25, 0xF5, 0x24, 0x75, 0x23, 0x0C, 0x75, 0x22, 0x0C, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x8B, 0x18, ++0xF0, 0x90, 0x8B, 0x17, 0xF0, 0x90, 0x8B, 0x19, 0x04, 0xF0, 0x90, 0x8B, 0x0B, 0xF0, 0xE4, 0x90, ++0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0D, 0xF0, 0x90, 0x8B, 0x15, 0x74, 0x05, 0xF0, 0xE4, 0x90, 0x8B, ++0x0C, 0xF0, 0x90, 0x8B, 0x13, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x10, 0xF0, 0xA3, 0x74, ++0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0xE4, 0x90, ++0x8B, 0x0E, 0xF0, 0x90, 0x8B, 0x0A, 0xF0, 0x90, 0x8B, 0x08, 0xF0, 0x90, 0x8B, 0x12, 0xF0, 0x22, ++0x7F, 0x00, 0x22, 0x02, 0x45, 0x03, 0x02, 0x45, 0x06, 0x8E, 0x64, 0x8F, 0x65, 0xAD, 0x65, 0xAC, ++0x64, 0xAF, 0x63, 0x12, 0x4A, 0x5B, 0xAF, 0x65, 0xAE, 0x64, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, ++0xFD, 0xAC, 0x07, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x01, ++0xF0, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xAC, ++0x07, 0x74, 0x16, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0xFA, 0xF0, 0x74, ++0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, ++0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, ++0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, ++0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x4D, ++0xFD, 0x74, 0x14, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xED, 0xF0, 0x22, 0x7D, 0x01, ++0x7F, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x67, 0x8D, 0x68, 0xE5, 0x67, 0x54, ++0x0F, 0xFF, 0xE5, 0x22, 0x54, 0x0F, 0x6F, 0x60, 0x72, 0xE5, 0x67, 0x30, 0xE2, 0x30, 0xE5, 0x22, ++0x20, 0xE2, 0x05, 0x7F, 0x01, 0x12, 0x4A, 0xB2, 0xE5, 0x22, 0x30, 0xE3, 0x10, 0xE5, 0x67, 0x20, ++0xE3, 0x0B, 0x12, 0x49, 0xD5, 0xEF, 0x60, 0x53, 0x12, 0x4A, 0xCC, 0x80, 0x4E, 0xE5, 0x22, 0x20, ++0xE3, 0x49, 0xE5, 0x67, 0x30, 0xE3, 0x44, 0xAF, 0x68, 0x12, 0x4A, 0x7C, 0x80, 0x3D, 0xE5, 0x22, ++0x54, 0x0F, 0xFF, 0xBF, 0x0C, 0x0E, 0xE5, 0x67, 0x20, 0xE3, 0x09, 0x12, 0x49, 0xD5, 0xEF, 0x60, ++0x2A, 0x12, 0x4A, 0xCC, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, 0x04, 0x0E, 0xE5, 0x67, 0x20, 0xE2, ++0x09, 0x12, 0x49, 0x93, 0xEF, 0x60, 0x14, 0x12, 0x4A, 0x32, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, ++0x02, 0x09, 0x12, 0x45, 0x00, 0xEF, 0x60, 0x03, 0x12, 0x4B, 0x10, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x02, 0x46, 0x6E, 0x02, 0x50, 0xC6, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, ++0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, ++0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, ++0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x4B, ++0x23, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, ++0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, ++0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, ++0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, ++0xE7, 0x80, 0xBE, 0xE5, 0x21, 0x64, 0x01, 0x70, 0x67, 0xE5, 0x24, 0x60, 0x63, 0xE5, 0x24, 0x64, ++0x02, 0x60, 0x06, 0xE5, 0x24, 0x64, 0x05, 0x70, 0x27, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x8B, 0x19, 0xF0, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x07, 0x90, ++0x8B, 0x19, 0xE0, 0xFF, 0x80, 0x05, 0x90, 0x8B, 0x0B, 0xE0, 0xFF, 0x90, 0x8B, 0x0B, 0xEF, 0xF0, ++0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x02, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x0C, 0xF0, 0x90, 0x05, 0x58, ++0x74, 0x03, 0xF0, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x53, 0x25, ++0xFD, 0x53, 0x25, 0xEF, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x47, 0x8E, ++0x22, 0xEF, 0x64, 0x01, 0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x12, 0x36, 0x75, 0x7D, 0x02, 0x7F, ++0x03, 0x12, 0x36, 0x75, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x12, ++0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x7D, 0xC1, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, 0x7B, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x7B, 0xFF, 0x12, 0x36, 0xE6, 0x7D, 0x02, 0x7F, 0x03, 0x12, ++0x36, 0xE6, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, ++0x12, 0x4B, 0x4F, 0xE5, 0x21, 0x20, 0xE0, 0x05, 0xE4, 0x90, 0x8B, 0x0D, 0xF0, 0x22, 0xE4, 0x90, ++0x8A, 0xC5, 0xF0, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x8A, 0xC5, 0xF0, 0xE0, 0x54, 0xC0, 0x70, 0x09, ++0x53, 0x25, 0xFE, 0x53, 0x25, 0xFD, 0x12, 0x4A, 0xFC, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE6, 0x15, ++0x43, 0x25, 0x01, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, 0x4A, 0x97, 0x80, 0x08, ++0x12, 0x49, 0x49, 0x80, 0x03, 0x53, 0x25, 0xFE, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE7, 0x27, 0x43, ++0x25, 0x02, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, ++0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0x90, ++0x8B, 0x1B, 0x74, 0x01, 0xF0, 0x22, 0x53, 0x25, 0xFD, 0x22, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x8B, ++0x12, 0x4B, 0x43, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xF5, 0x24, 0x14, 0x60, ++0x0E, 0x14, 0x60, 0x1F, 0x14, 0x60, 0x31, 0x24, 0x03, 0x70, 0x44, 0x7F, 0x01, 0x80, 0x3D, 0x90, ++0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, 0xE4, 0xFF, 0x12, 0x4A, ++0x07, 0x80, 0x29, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, ++0x7F, 0x01, 0x12, 0x4A, 0x07, 0x1F, 0x80, 0x14, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, ++0x02, 0x12, 0x42, 0x20, 0xFD, 0x7F, 0x02, 0x12, 0x4A, 0x07, 0xE4, 0xFF, 0x12, 0x47, 0x21, 0x22, ++0xE4, 0x90, 0x8A, 0xCB, 0xF0, 0xE5, 0x24, 0x60, 0x49, 0x90, 0x8B, 0x1B, 0xE0, 0x60, 0x0D, 0xE4, ++0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x38, 0x80, 0x33, 0x90, 0x8B, 0x0C, 0xE0, ++0x04, 0xF0, 0x53, 0x25, 0xEF, 0x90, 0x8A, 0xCB, 0xE0, 0xFF, 0x90, 0x8B, 0x10, 0xE0, 0x2F, 0xFF, ++0xE4, 0x33, 0xFE, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0xEE, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x40, 0x0D, 0xE5, 0x21, 0xB4, 0x01, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xE0, 0x04, 0xF0, 0x22, 0x12, ++0x4A, 0xFC, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x63, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x24, 0x90, 0x05, 0x22, 0xE0, 0xF5, 0x66, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x9A, 0xBF, 0x01, ++0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, 0x12, 0x45, 0x09, 0x90, 0x05, ++0x22, 0xE5, 0x66, 0xF0, 0x80, 0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, ++0x12, 0x45, 0x09, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x24, ++0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x41, 0x90, 0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x12, 0x45, 0x9E, ++0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x58, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, ++0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x22, 0xE5, 0x22, 0x54, 0x0F, 0xC3, 0x94, 0x04, 0x50, ++0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x22, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, ++0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x5C, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, ++0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x17, 0x14, 0xF0, 0xE5, 0x22, 0x54, 0x0F, ++0xC3, 0x94, 0x0C, 0x50, 0x0D, 0x12, 0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, ++0x7D, 0xC1, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x37, 0xE5, 0x25, 0x54, 0x03, 0x70, ++0x31, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x02, 0x50, 0x28, 0xE5, 0x25, 0x20, 0xE2, 0x23, 0xE5, ++0x25, 0x20, 0xE4, 0x1E, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x18, 0x90, 0x8B, 0x12, 0xE0, 0x70, 0x12, ++0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x04, 0xF0, 0x7F, ++0x01, 0x22, 0x7F, 0x00, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x27, 0x90, 0x8B, 0x18, ++0xE0, 0x70, 0x21, 0x90, 0x8B, 0x17, 0xE0, 0x70, 0x1B, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x04, ++0x50, 0x12, 0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x08, ++0xF0, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x22, 0x90, ++0x8B, 0x19, 0x74, 0x01, 0xF0, 0x80, 0x16, 0xED, 0x70, 0x0A, 0x90, 0x8B, 0x16, 0xE0, 0x90, 0x8B, ++0x19, 0xF0, 0x80, 0x05, 0x90, 0x8B, 0x19, 0xED, 0xF0, 0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x22, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, ++0x9A, 0xEF, 0x70, 0x06, 0x90, 0x01, 0xC8, 0x74, 0xFD, 0xF0, 0x7D, 0x02, 0x7F, 0x03, 0x12, 0x36, ++0xE6, 0x12, 0x7C, 0x50, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x02, 0x22, 0xEF, 0x60, 0x0F, 0x74, 0x21, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, 0x21, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0xBF, 0xF0, 0xEF, 0x60, 0x0A, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0xE4, 0xFF, 0x12, 0x48, 0xB3, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x0C, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x14, 0x90, 0x8A, 0xF8, ++0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x5F, 0xFD, 0x8E, 0x69, 0x8F, 0x6A, 0x90, 0x04, 0x1F, 0x74, 0x20, ++0xF0, 0x22, 0x90, 0x8B, 0x52, 0xEF, 0xF0, 0x12, 0x7D, 0x42, 0x90, 0x8B, 0x52, 0xE0, 0x60, 0x05, ++0x90, 0x05, 0x22, 0xE4, 0xF0, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x04, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x44, 0x40, 0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0x7F, 0x01, 0x12, 0x48, 0xB3, 0x53, 0x22, 0xF0, ++0x43, 0x22, 0x04, 0x22, 0xE5, 0x23, 0x30, 0xE6, 0x12, 0xE5, 0x23, 0x54, 0x0F, 0xFF, 0x90, 0x01, ++0x2F, 0xE0, 0x54, 0x80, 0x4F, 0x64, 0x80, 0xF0, 0x53, 0x23, 0xBF, 0x22, 0x90, 0x8B, 0x2C, 0xE0, ++0x30, 0xE0, 0x05, 0xAF, 0x23, 0x02, 0x7E, 0x06, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x22, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x01, 0x12, 0x4B, 0x5A, 0x12, 0x4B, 0x5B, 0x53, 0x22, 0xF0, 0x43, ++0x22, 0x02, 0x22, 0x41, 0x8A, 0xF6, 0x00, 0x41, 0x8B, 0x05, 0x00, 0x41, 0x8B, 0x51, 0x00, 0x41, ++0x8B, 0x53, 0x00, 0x00, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x7F, 0x64, 0x7F, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0xE4, 0x90, 0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0C, 0xF0, 0xF5, 0x25, 0x22, 0x90, ++0x8B, 0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x22, 0x22, 0xF0, 0x90, 0x8B, 0x0F, ++0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x3D, 0xE0, 0xFB, 0xA3, 0xE0, 0xF5, 0x44, 0xE4, 0xF5, 0x45, 0x12, ++0x35, 0xAB, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x75, 0x0E, 0x00, 0x90, 0x01, 0xC4, 0x74, 0x87, 0xF0, 0x74, 0x4B, 0xA3, ++0xF0, 0x53, 0x91, 0xDF, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x30, 0xF5, 0x34, 0xA3, 0xE0, 0x55, 0x31, ++0xF5, 0x35, 0xA3, 0xE0, 0x55, 0x32, 0xF5, 0x36, 0xA3, 0xE0, 0x55, 0x33, 0xF5, 0x37, 0xE5, 0x34, ++0x30, 0xE0, 0x51, 0x90, 0x01, 0x3C, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x1F, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x34, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x1D, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x16, 0x90, 0x8B, ++0x2E, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, ++0x70, 0x02, 0xD1, 0x56, 0xE5, 0x34, 0x30, 0xE1, 0x08, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x11, ++0x60, 0xE5, 0x34, 0x30, 0xE2, 0x28, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0x90, 0x06, 0x92, 0xE0, ++0x30, 0xE0, 0x14, 0x90, 0x8B, 0x3D, 0xE4, 0x71, 0x5C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, ++0x06, 0x92, 0x74, 0x01, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x18, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, ++0x30, 0xE3, 0x38, 0x90, 0x01, 0x3C, 0x74, 0x08, 0xF0, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x24, ++0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x5C, 0x7E, 0x01, 0x71, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, ++0x02, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x17, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, 0x30, 0xE4, 0x09, ++0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0, 0x12, 0x51, 0xC9, 0xE5, 0x34, 0x30, 0xE5, 0x06, 0x90, 0x01, ++0x3C, 0x74, 0x20, 0xF0, 0xE5, 0x35, 0x30, 0xE0, 0x10, 0x90, 0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90, ++0x00, 0x83, 0xE0, 0xF5, 0x23, 0x51, 0xE4, 0x51, 0xFC, 0xE5, 0x35, 0x30, 0xE2, 0x06, 0x90, 0x01, ++0x3D, 0x74, 0x04, 0xF0, 0xE5, 0x35, 0x30, 0xE4, 0x1B, 0x90, 0x01, 0x3D, 0x74, 0x10, 0xF0, 0x90, ++0x8B, 0x05, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, ++0xFD, 0xE0, 0x04, 0xF0, 0xE5, 0x36, 0x30, 0xE0, 0x75, 0x90, 0x01, 0x3E, 0x74, 0x01, 0xF0, 0x90, ++0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x36, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, ++0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0xD1, 0x89, 0x90, 0x8B, ++0x2C, 0xE0, 0x30, 0xE0, 0x49, 0x90, 0x8B, 0x30, 0xE4, 0xF0, 0xFF, 0xB1, 0xE0, 0xEF, 0x60, 0x3E, ++0x12, 0x65, 0x5F, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, 0x32, 0xEF, 0xB4, 0x04, 0x02, ++0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, 0x80, 0x14, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x05, 0x7F, ++0x01, 0x12, 0x65, 0x82, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x12, 0x7D, 0xC1, 0xE5, 0x36, ++0x30, 0xE1, 0x47, 0x90, 0x01, 0x3E, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x19, ++0x90, 0x8B, 0x36, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, ++0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x1A, ++0x90, 0x8B, 0x30, 0x74, 0x01, 0xF0, 0x12, 0x7E, 0x2B, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, ++0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, 0x70, 0x02, 0xD1, 0x56, 0x74, 0x87, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x4B, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0xEF, 0x64, 0x01, 0x70, 0x3D, 0x90, 0x8B, 0x35, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, ++0x08, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x34, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, ++0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, ++0x07, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x36, 0xE0, 0x7F, 0x01, 0x60, 0x36, 0x7F, ++0x00, 0x22, 0x90, 0x8B, 0x2F, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x08, 0xE0, 0x60, ++0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2E, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2C, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x30, 0xE0, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x2D, 0xE0, ++0x70, 0x04, 0x7F, 0x05, 0x80, 0x1F, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x01, 0x70, 0x1A, 0x7F, 0x02, ++0x80, 0x13, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x03, 0x80, 0x08, 0x90, 0x8B, 0x2D, ++0xE0, 0x70, 0x05, 0x7F, 0x04, 0x12, 0x65, 0x82, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8B, 0x33, 0xE0, 0x90, 0x8B, 0x55, 0xF0, 0x6F, 0x70, 0x02, 0xE1, 0x55, 0xEF, 0x14, 0x60, ++0x3B, 0x14, 0x60, 0x5F, 0x14, 0x70, 0x02, 0xE1, 0x30, 0x24, 0x03, 0x60, 0x02, 0xE1, 0x55, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x04, 0xF1, 0xC2, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x02, ++0x04, 0xF1, 0xAF, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, 0x04, 0xF1, 0xC6, 0xE1, 0x55, ++0x90, 0x8B, 0x55, 0xE0, 0x64, 0x01, 0x70, 0x7D, 0xF1, 0xB1, 0x80, 0x79, 0x90, 0x8B, 0x55, 0xE0, ++0xFF, 0xB4, 0x03, 0x04, 0xF1, 0xCA, 0x80, 0x6D, 0xEF, 0xB4, 0x02, 0x04, 0xF1, 0xA1, 0x80, 0x65, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0xD5, 0x80, 0x59, 0xEF, 0x70, 0x56, 0xF1, ++0x8E, 0x80, 0x52, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x7C, 0x41, 0x80, 0x46, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x01, 0x04, 0xF1, 0x72, 0x80, 0x3B, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, ++0x05, 0x12, 0x7D, 0x23, 0x80, 0x2F, 0x90, 0x8B, 0x55, 0xE0, 0x70, 0x29, 0xF1, 0x70, 0x80, 0x25, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x01, 0x04, 0xF1, 0x5A, 0x80, 0x19, 0xEF, 0xB4, 0x02, 0x04, ++0xF1, 0x6B, 0x80, 0x11, 0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0x5A, 0x80, 0x05, ++0xEF, 0x70, 0x02, 0xF1, 0x67, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x05, 0x22, 0x74, 0x6F, 0xF0, ++0x90, 0x8B, 0x33, 0x74, 0x03, 0xF0, 0x22, 0xF1, 0x8E, 0x80, 0xEF, 0x12, 0x7D, 0x42, 0x80, 0xEA, ++0xF1, 0x8E, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x9A, 0xEF, 0x70, 0x06, 0x90, 0x01, ++0xC8, 0x74, 0xFD, 0xF0, 0x12, 0x7C, 0x50, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x01, ++0x3E, 0x74, 0x03, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x37, 0x00, 0x90, 0x8B, 0x33, 0x74, 0x01, 0xF0, ++0x22, 0x12, 0x7D, 0x42, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, 0xF1, ++0xA1, 0x7D, 0x03, 0x7F, 0x02, 0x12, 0x36, 0x92, 0x90, 0x05, 0x27, 0xE4, 0xF0, 0x90, 0x8B, 0x33, ++0xF0, 0x22, 0xF1, 0xCA, 0x80, 0xEB, 0xF1, 0xD5, 0x80, 0xE7, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, ++0x8B, 0x33, 0x04, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, ++0xF1, 0x8E, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0x90, ++0x02, 0x84, 0xEF, 0xF0, 0xA3, 0xEE, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x22, 0xEF, 0x8E, 0xF0, 0x12, ++0x43, 0xBA, 0x50, 0x1A, 0x00, 0x40, 0x50, 0x42, 0x00, 0x80, 0x50, 0x6D, 0x01, 0x00, 0x50, 0x81, ++0x02, 0x00, 0x50, 0x99, 0x04, 0x00, 0x00, 0x00, 0x50, 0xB6, 0xED, 0x54, 0x3F, 0x70, 0x04, 0xFE, ++0xFF, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x40, 0xEF, 0x2D, 0xFF, 0xEE, 0x3C, 0xFE, 0xEF, 0x78, 0x06, ++0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x78, 0x06, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0x80, 0x26, 0xED, 0x54, 0x7F, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x80, 0xEF, ++0x2D, 0xFF, 0xEE, 0x3C, 0xFE, 0xEF, 0x78, 0x07, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x78, ++0x07, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0x80, 0x49, 0xED, 0x70, 0x04, ++0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x01, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x7D, 0x00, 0xFC, 0x80, ++0x35, 0xEC, 0x54, 0x01, 0x4D, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x02, 0x7F, 0x00, 0xEF, ++0x2D, 0xEE, 0x3C, 0xC3, 0x13, 0x7D, 0x00, 0x80, 0x1A, 0xEC, 0x54, 0x03, 0x4D, 0x70, 0x04, 0xFE, ++0xFF, 0x80, 0x04, 0x7E, 0x04, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x13, 0x13, 0x54, 0x3F, 0x7D, ++0x00, 0x25, 0xE0, 0x25, 0xE0, 0xFC, 0xAE, 0x04, 0xAF, 0x05, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x58, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x22, 0xE4, 0x90, 0x8A, 0xCC, 0xF0, 0xA3, 0xF0, 0x75, 0x8E, 0x02, ++0x91, 0x0E, 0x12, 0x68, 0x44, 0x90, 0x8B, 0x07, 0xEF, 0xF0, 0x12, 0x68, 0x51, 0x90, 0x8B, 0x09, ++0xEF, 0xF0, 0x12, 0x68, 0x5D, 0x90, 0x8A, 0xF4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xF5, 0x55, ++0xF5, 0x21, 0x12, 0x72, 0x55, 0x12, 0x44, 0x9E, 0x12, 0x32, 0x3D, 0x7F, 0x03, 0x12, 0x78, 0x42, ++0x12, 0x7C, 0x3D, 0x12, 0x68, 0x0A, 0x12, 0x68, 0x75, 0x12, 0x68, 0x8A, 0x12, 0x68, 0x28, 0x12, ++0x68, 0x43, 0x90, 0x8A, 0xCE, 0xE5, 0xD9, 0xF0, 0x31, 0x5F, 0xC2, 0xAF, 0x90, 0x00, 0x80, 0xE0, ++0x44, 0x40, 0xF0, 0x51, 0x0E, 0x75, 0xE8, 0x03, 0x43, 0xA8, 0x85, 0xD2, 0xAF, 0x11, 0xBB, 0x90, ++0x8A, 0xCC, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xC6, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x50, 0xA3, 0xF0, ++0xE5, 0x55, 0x30, 0xE4, 0x09, 0xC2, 0xAF, 0x53, 0x55, 0xEF, 0xD2, 0xAF, 0xB1, 0x59, 0xE5, 0x55, ++0x30, 0xE6, 0xDC, 0xC2, 0xAF, 0x53, 0x55, 0xBF, 0xD2, 0xAF, 0x12, 0x6B, 0xBD, 0x80, 0xD0, 0x90, ++0x01, 0x3C, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x54, 0x31, 0x88, 0x7D, 0xFF, 0x7F, 0x55, 0x31, 0x88, 0x7D, 0xFF, ++0x7F, 0x56, 0x31, 0x88, 0x7D, 0xFF, 0x7F, 0x57, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, ++0x82, 0x75, 0x83, 0x00, 0xED, 0xF0, 0x51, 0x0E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x30, ++0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x38, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xFD, 0x7F, 0x50, 0x31, 0x88, 0xE4, 0xFD, 0x7F, 0x51, 0x31, 0x88, 0xE4, 0xFD, 0x7F, ++0x52, 0x31, 0x88, 0xE4, 0xFD, 0x7F, 0x53, 0x80, 0xBF, 0xE5, 0x5E, 0x64, 0x01, 0x70, 0x3B, 0x71, ++0x4E, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x71, 0x42, 0x90, 0x00, 0x46, 0xE0, 0x44, 0x04, 0xFD, 0x7F, ++0x46, 0x31, 0x88, 0x90, 0x00, 0x44, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x44, 0x31, 0x88, 0x90, 0x00, ++0x46, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x46, 0x31, 0x88, 0x7F, 0x02, 0x71, 0x6A, 0x8F, 0x62, 0x90, ++0x01, 0xC9, 0xE5, 0x62, 0xF0, 0xB4, 0x01, 0x02, 0x51, 0xE2, 0x22, 0xE0, 0x5F, 0xF0, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x10, 0xDF, 0xFE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xE0, 0xED, 0xF0, 0x90, 0x8A, 0xDF, 0xEF, 0xF0, 0xD3, ++0x94, 0x07, 0x50, 0x4E, 0xA3, 0xE0, 0x70, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, ++0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x5F, 0xF0, ++0x80, 0x17, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x4F, 0xF0, 0x51, 0x0E, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x46, ++0x80, 0x59, 0x90, 0x8A, 0xDF, 0xE0, 0x24, 0xF8, 0xF0, 0xA3, 0xE0, 0x70, 0x1D, 0x90, 0x8A, 0xDF, ++0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xC4, 0x54, 0xF0, ++0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x80, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0x00, ++0x43, 0xE0, 0x4F, 0xF0, 0x51, 0x0E, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0x51, 0x0B, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x00, 0x49, 0xE0, 0x90, 0x8B, 0x54, 0xF0, 0xE0, 0x54, 0x0F, 0xF0, 0x44, 0xF0, ++0xFD, 0x7F, 0x49, 0x31, 0x88, 0x90, 0x8B, 0x54, 0xE0, 0x44, 0xB0, 0xFD, 0x7F, 0x49, 0x21, 0x88, ++0x90, 0x8A, 0xDD, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0x5E, 0x01, 0x8E, 0x5F, 0xF5, 0x60, 0xE4, ++0xFD, 0x7F, 0x0B, 0x51, 0x1E, 0xE4, 0xFD, 0x7F, 0x02, 0x51, 0x1E, 0x71, 0x4E, 0xE4, 0xFF, 0x71, ++0x42, 0xE4, 0xF5, 0x62, 0x90, 0x01, 0xC9, 0xE5, 0x62, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0xEC, 0xFB, 0x8D, 0x44, 0xE4, 0xF5, 0x45, 0x7D, 0x01, 0x7F, 0x60, 0x7E, 0x01, 0x02, ++0x35, 0xAB, 0x90, 0x01, 0xCA, 0xE5, 0x61, 0xF0, 0xEF, 0x60, 0x02, 0x51, 0xE2, 0x22, 0x7F, 0x0B, ++0x71, 0x6A, 0xEF, 0x65, 0x61, 0x60, 0x10, 0xE5, 0x61, 0xB4, 0x01, 0x05, 0xE4, 0xF5, 0x61, 0x80, ++0x03, 0x75, 0x61, 0x01, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x8B, 0x57, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x43, 0xE0, 0xFF, 0x74, 0x01, 0xA8, ++0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x46, 0x51, 0x0B, 0x90, ++0x8B, 0x57, 0xE0, 0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x00, 0x44, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x5B, 0xA8, 0x05, ++0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0x80, 0x4B, 0x90, 0x8B, ++0x57, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x51, 0x0E, 0x90, 0x8B, 0x57, 0xE0, ++0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x5B, 0xA8, 0x05, 0x08, 0x80, 0x06, ++0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, ++0x8B, 0x04, 0xF0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x21, 0x88, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDA, 0x12, 0x43, ++0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFA, 0xE5, 0xF0, 0x24, 0x00, 0xFF, 0xE4, 0x3A, 0xFE, ++0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEE, 0x8F, 0xF0, 0x12, 0x43, 0x19, 0x12, ++0x29, 0xD9, 0xFF, 0x60, 0x2C, 0xB5, 0x5E, 0x16, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, ++0x01, 0x12, 0x42, 0xC2, 0x65, 0x60, 0x70, 0x04, 0xE5, 0x5F, 0x65, 0xF0, 0x60, 0x22, 0x90, 0x8A, ++0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFF, 0xAE, 0xF0, 0x71, 0x00, 0x80, ++0x0F, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0x65, 0x5E, 0x60, 0x02, 0x91, 0x95, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF5, 0x5E, 0x7F, 0x60, 0x7E, 0x01, 0x8F, 0x82, 0x8E, 0x83, ++0xA3, 0xA3, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x8B, 0xEF, 0x12, 0x43, 0x94, ++0x54, 0xE7, 0x01, 0x54, 0xDE, 0x02, 0x55, 0x0B, 0x03, 0x55, 0x14, 0x05, 0x55, 0x1D, 0x06, 0x55, ++0x58, 0x07, 0x55, 0x25, 0x08, 0x55, 0x2E, 0x09, 0x55, 0x36, 0x20, 0x55, 0x3F, 0x2C, 0x54, 0xF0, ++0x2D, 0x54, 0xF9, 0x2E, 0x55, 0x02, 0x3B, 0x55, 0x48, 0x4B, 0x00, 0x00, 0x55, 0x51, 0x90, 0x8A, ++0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x85, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x8B, ++0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0xB8, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, ++0x75, 0x00, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x75, 0x39, 0x90, 0x8A, 0xD7, 0x12, 0x43, ++0x6B, 0x02, 0x75, 0x52, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x0F, 0x90, 0x8A, 0xD7, ++0x12, 0x43, 0x6B, 0xC1, 0xA6, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x75, 0x9A, 0x90, 0x8A, ++0xD7, 0x12, 0x43, 0x6B, 0x81, 0x1E, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x78, 0x81, 0x90, ++0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x7A, 0xC2, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x7C, ++0x2B, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFD, 0x70, ++0x02, 0xC1, 0xA1, 0x90, 0x8B, 0x51, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0xC1, 0x9A, 0x90, ++0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD0, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD0, ++0xF0, 0x75, 0x1D, 0x01, 0x75, 0x1E, 0x8A, 0x75, 0x1F, 0xD0, 0x75, 0x20, 0x01, 0x7B, 0x01, 0x7A, ++0x8A, 0x79, 0xD1, 0x12, 0x5E, 0xE4, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0x90, 0x8B, 0x51, 0x30, 0xE0, 0x59, 0xE0, 0x75, 0xF0, 0x02, 0x90, 0x00, 0x88, 0x12, 0x43, ++0x5F, 0xE0, 0x90, 0x8A, 0xD2, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x02, 0x90, 0x00, 0x89, ++0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD3, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, ++0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD4, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, ++0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD5, 0xF0, 0x90, 0x8B, 0x51, 0xE0, ++0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD6, 0xF0, 0x80, 0x33, ++0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD2, 0xF0, 0x90, ++0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD3, ++0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, 0x5F, 0xE0, 0x90, ++0x8A, 0xD4, 0xF0, 0xEF, 0x54, 0x7F, 0xFF, 0x7B, 0x01, 0x7A, 0x8A, 0x79, 0xD2, 0x91, 0xA6, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x90, 0x8B, 0x51, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x8B, ++0x51, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0xA1, 0x6A, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x02, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, 0xFF, 0x54, 0x1F, 0xFE, ++0xEF, 0x54, 0x20, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xAF, 0x06, 0x90, 0x8A, 0xDA, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x03, 0x12, ++0x42, 0x20, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x42, ++0x20, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x8A, 0xE0, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, ++0xFF, 0x75, 0xF0, 0x09, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0xAD, 0x82, 0xAC, 0x83, 0x90, 0x8A, ++0xE1, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x75, 0xF0, 0x09, 0xA4, 0x24, 0x23, 0xF9, 0x74, 0x87, ++0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, ++0x00, 0x03, 0x12, 0x42, 0x20, 0x54, 0x0F, 0xFF, 0x90, 0x8A, 0xE3, 0x12, 0x43, 0x6B, 0xEF, 0x12, ++0x42, 0x4D, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x90, ++0x8A, 0xE3, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x90, 0x8A, 0xDC, 0x12, ++0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0xFC, 0xA3, 0xE0, ++0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xEF, 0xF0, 0x12, 0x29, 0xD9, 0x8D, 0x82, 0x8C, 0x83, 0xA3, 0xF0, ++0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x24, 0xC1, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, ++0x29, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, 0x12, 0x43, 0x5F, ++0x74, 0x01, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2B, 0x12, ++0x43, 0x5F, 0xEE, 0xF0, 0x8F, 0x0F, 0xEF, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, ++0xAF, 0x82, 0xF5, 0x10, 0x8F, 0x11, 0xE5, 0x0F, 0x75, 0xF0, 0x02, 0xA4, 0x24, 0x81, 0xF9, 0x74, ++0x86, 0x35, 0xF0, 0x75, 0x12, 0x01, 0xF5, 0x13, 0x89, 0x14, 0x75, 0xF0, 0x09, 0xE5, 0x0F, 0x90, ++0x87, 0x25, 0x12, 0x43, 0x5F, 0xAF, 0x82, 0x85, 0x83, 0x15, 0x8F, 0x16, 0xE5, 0x0F, 0x75, 0xF0, ++0x09, 0xA4, 0x24, 0x23, 0xF9, 0x74, 0x87, 0x35, 0xF0, 0x75, 0x17, 0x01, 0xF5, 0x18, 0x89, 0x19, ++0x74, 0xC1, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x12, 0x43, 0x94, 0x58, ++0x34, 0x00, 0x58, 0x49, 0x01, 0x58, 0x5E, 0x02, 0x58, 0x73, 0x03, 0x58, 0x9C, 0x04, 0x58, 0xB1, ++0x05, 0x58, 0xC6, 0x06, 0x58, 0xEC, 0x0C, 0x59, 0x19, 0x0D, 0x59, 0x46, 0x0E, 0x59, 0x73, 0x0F, ++0x00, 0x00, 0x59, 0xA7, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x15, 0x80, 0x3C, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x10, 0x80, 0x27, 0xE5, 0x0F, ++0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, ++0x05, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0x74, 0xF0, 0xF0, 0xA3, 0xE4, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0x8F, 0xF0, 0x21, 0xA7, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xF5, 0x80, ++0x27, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0x0F, ++0xF0, 0xA3, 0x74, 0xF0, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0x74, 0x0D, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, ++0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x21, 0xA7, 0x90, 0x04, 0x47, 0xE0, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x46, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x45, 0xE0, 0x85, 0x11, 0x82, ++0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x44, 0x21, 0x9E, 0x90, 0x04, 0x4B, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x4A, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x49, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, ++0xF0, 0x90, 0x04, 0x48, 0x80, 0x58, 0x90, 0x04, 0x4F, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x12, 0x42, 0x4D, 0x90, 0x04, 0x4E, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, ++0x12, 0x42, 0x5F, 0x90, 0x04, 0x4D, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, ++0x4C, 0x80, 0x2B, 0x90, 0x04, 0x53, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, ++0x90, 0x04, 0x52, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, ++0x90, 0x04, 0x51, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x50, 0xE0, 0x85, ++0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0xC0, 0x03, 0xC0, ++0x02, 0xC0, 0x01, 0x12, 0x29, 0xD9, 0xFF, 0xAB, 0x17, 0xAA, 0x18, 0xA9, 0x19, 0x12, 0x29, 0xD9, ++0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x42, 0x4D, 0xAB, 0x12, 0xE5, 0x14, 0x24, 0x01, ++0xF9, 0xE4, 0x35, 0x13, 0xFA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x29, 0xD9, 0xFF, 0xAB, ++0x17, 0xAA, 0x18, 0xA9, 0x19, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x5F, 0xD0, 0x01, 0xD0, 0x02, ++0xD0, 0x03, 0x12, 0x42, 0x4D, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, ++0xFF, 0x85, 0x16, 0x82, 0x85, 0x15, 0x83, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, ++0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x85, 0x16, 0x82, ++0x85, 0x15, 0x83, 0xA3, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0xE5, 0x0F, 0x25, ++0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, ++0x4B, 0x90, 0x8A, 0xE6, 0x74, 0x0B, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x00, 0x50, ++0x02, 0x41, 0xEC, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, ++0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x0A, 0x90, 0x8A, 0xE6, 0xE0, 0x24, 0x10, ++0xA3, 0xF0, 0x80, 0x68, 0x90, 0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBB, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x47, ++0x90, 0x8A, 0xE6, 0x74, 0x0F, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x00, 0x40, 0x3C, ++0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x5E, ++0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x08, 0x90, 0x8A, 0xE6, 0xE0, 0xA3, 0xF0, 0x80, 0x0D, 0x90, ++0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBF, 0xE4, 0x90, 0x8A, 0xE7, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x46, ++0xE4, 0x90, 0x8A, 0xE6, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x40, 0x02, 0x61, ++0xA5, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, ++0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x06, 0x90, 0x8A, 0xE6, 0xE0, 0x80, 0x63, 0x90, 0x8A, ++0xE6, 0xE0, 0x04, 0xF0, 0x80, 0xBF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x46, 0xE4, 0x90, 0x8A, 0xE6, 0xF0, 0x90, ++0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x0C, 0x50, 0x3C, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, ++0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, ++0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x08, ++0x90, 0x8A, 0xE6, 0xE0, 0x24, 0x10, 0x80, 0x09, 0x90, 0x8A, 0xE6, 0xE0, 0x04, 0xF0, 0x80, 0xBF, ++0xE4, 0x90, 0x8A, 0xE8, 0xF0, 0x90, 0x8A, 0xE7, 0xE0, 0xFF, 0x75, 0xF0, 0x09, 0xE5, 0x0F, 0x90, ++0x87, 0x27, 0x12, 0x43, 0x5F, 0xEF, 0xF0, 0x90, 0x8A, 0xE8, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xE5, ++0x0F, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xE5, 0x0F, 0xC3, 0x94, 0x20, 0x50, 0x32, ++0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xD3, 0x9F, 0x40, 0x02, ++0x80, 0x18, 0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xC3, 0x9E, ++0x50, 0x08, 0x90, 0x8A, 0xE8, 0xE0, 0xA3, 0xF0, 0x80, 0x08, 0x90, 0x8A, 0xE7, 0xE0, 0x90, 0x8A, ++0xE9, 0xF0, 0x90, 0x8A, 0xE9, 0xE0, 0xFD, 0xAF, 0x0F, 0x91, 0x4E, 0x90, 0x8A, 0xE9, 0xE0, 0xFF, ++0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x8A, 0xE7, ++0xE0, 0xFF, 0xD3, 0x94, 0x13, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x03, 0xF0, 0x22, 0xEF, 0xD3, ++0x94, 0x0B, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x02, 0xF0, 0x22, 0xEF, 0xD3, 0x94, 0x03, 0x40, ++0x07, 0x90, 0x87, 0x22, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0x87, 0x22, 0xF0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xED, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAC, 0x07, 0xED, 0x54, 0x1F, 0x90, 0x8A, 0xC7, 0xF0, 0x74, ++0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, ++0xC8, 0x74, 0x01, 0xF0, 0xEB, 0xC3, 0x94, 0x01, 0x40, 0x02, 0x80, 0x37, 0x90, 0x8A, 0xC5, 0xE0, ++0x25, 0x0D, 0xFF, 0xA3, 0xF0, 0xA3, 0xE0, 0x90, 0x41, 0x9E, 0x93, 0xFE, 0xEF, 0xD3, 0x9E, 0x40, ++0x10, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xAF, 0x04, 0x80, ++0x9D, 0x90, 0x8A, 0xC6, 0xE0, 0xFF, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEF, 0xF0, 0x22, 0xAD, 0x07, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, ++0xFF, 0x90, 0x8A, 0xCA, 0xF0, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, ++0x54, 0x1F, 0x90, 0x8A, 0xC9, 0xF0, 0xD3, 0x9F, 0x40, 0x06, 0xA3, 0xE0, 0x90, 0x8A, 0xC9, 0xF0, ++0x90, 0x8A, 0xC9, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, ++0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, ++0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xC9, 0xE0, 0xFD, 0x91, 0x4E, 0x90, 0x8A, 0xC9, 0xE0, 0xFF, ++0x22, 0xAC, 0x07, 0x74, 0x84, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x7F, ++0x90, 0x8A, 0xDE, 0xF0, 0xE0, 0x54, 0x1F, 0xFF, 0x90, 0x8A, 0xE1, 0xF0, 0x75, 0xF0, 0x09, 0xEC, ++0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xE3, 0xF0, 0x75, 0xF0, 0x09, 0xEC, 0x90, ++0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0x90, 0x8A, 0xE4, 0xF0, 0xEC, 0x25, 0xE0, 0x24, 0xE4, ++0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE5, 0xCB, 0xF0, ++0xA3, 0xEB, 0xF0, 0xEC, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, ++0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE7, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xEF, 0xD3, 0x9E, 0x40, 0x0C, ++0x90, 0x8A, 0xE4, 0xE0, 0x90, 0x8A, 0xE1, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0xED, 0x70, 0x02, 0xC1, ++0x93, 0x90, 0x8A, 0xE2, 0xED, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0x30, 0xE6, 0x0E, 0x90, 0x8A, 0xE1, ++0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0x14, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0x70, ++0x02, 0xC1, 0x93, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0xD3, 0x94, 0x00, 0x50, 0x02, 0xC1, 0x93, 0xE4, ++0x90, 0x8A, 0xE0, 0xF0, 0xEF, 0x14, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xE3, 0xE0, 0xFD, 0x90, ++0x8A, 0xDF, 0xE0, 0xFF, 0xD3, 0x9D, 0x40, 0x6F, 0xEF, 0x94, 0x10, 0x40, 0x21, 0xEF, 0x24, 0xF0, ++0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x8A, 0xE7, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x70, 0x27, 0x90, 0x8A, ++0xDF, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x37, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE5, 0xE0, 0x5E, 0xFE, 0xA3, ++0xE0, 0x5F, 0x4E, 0x60, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, 0x6F, 0x60, 0x08, 0x90, ++0x8A, 0xDF, 0xE0, 0x14, 0xF0, 0x80, 0x83, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, ++0xC3, 0x9F, 0x50, 0x0F, 0x90, 0x8A, 0xDF, 0xE0, 0xB5, 0x05, 0x08, 0x90, 0x8A, 0xE3, 0xE0, 0x90, ++0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, ++0xFE, 0xEF, 0x13, 0xFF, 0xEC, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x90, 0x8A, 0xDE, 0xE0, 0xFD, 0x91, 0x4E, 0x90, 0x8A, ++0xDE, 0xE0, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x1A, 0x8A, 0x1B, 0x89, ++0x1C, 0x90, 0x8B, 0x3F, 0x12, 0x43, 0x8B, 0xAB, 0x1D, 0xAA, 0x1E, 0xA9, 0x1F, 0x90, 0x8B, 0x42, ++0x12, 0x43, 0x8B, 0xAF, 0x20, 0x15, 0x20, 0xEF, 0x60, 0x1E, 0x90, 0x8B, 0x42, 0xE4, 0x75, 0xF0, ++0x01, 0x12, 0x43, 0x74, 0x12, 0x29, 0xD9, 0xFF, 0x90, 0x8B, 0x3F, 0xE4, 0x75, 0xF0, 0x01, 0x12, ++0x43, 0x74, 0xEF, 0x12, 0x42, 0x4D, 0x80, 0xDB, 0xAB, 0x1A, 0xAA, 0x1B, 0xA9, 0x1C, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x8B, ++0x90, 0x8B, 0x53, 0xE0, 0xFF, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x7F, 0xAF, ++0x7E, 0x01, 0x12, 0x74, 0x3B, 0xEF, 0x60, 0x47, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x6B, 0x8B, 0x1D, ++0x8A, 0x1E, 0x89, 0x1F, 0x75, 0x20, 0x02, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0xD1, 0xE4, 0x90, ++0x8B, 0x48, 0x12, 0x43, 0x6B, 0x8B, 0x1D, 0x8A, 0x1E, 0x89, 0x1F, 0x90, 0x8B, 0x45, 0x12, 0x43, ++0x6B, 0x12, 0x29, 0xD9, 0xFF, 0xC4, 0x54, 0x0F, 0xF5, 0x20, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA2, ++0xD1, 0xE4, 0x90, 0x01, 0xAF, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8A, 0xC5, 0xE0, 0x54, 0xF0, 0x44, 0x03, 0xF0, 0x54, 0x0F, 0x44, ++0x80, 0xF0, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x56, 0x90, 0x8B, 0x48, 0x12, 0x43, 0x8B, 0x0B, 0x7A, ++0x8A, 0x79, 0xC5, 0xE1, 0x33, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0xC4, 0x74, ++0xC5, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1A, 0x90, 0x05, 0x22, 0xE0, ++0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x01, 0xC7, 0xE0, 0x30, ++0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFB, 0xFA, 0xEF, 0x30, 0xE0, 0x02, 0x7B, 0x80, 0xEF, 0xC3, 0x13, ++0x90, 0xFD, 0x10, 0xF0, 0x90, 0x04, 0x25, 0xEF, 0xF0, 0xED, 0x60, 0x1E, 0xAF, 0x03, 0x74, 0x0F, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x10, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x03, 0x74, 0x08, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0x21, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x54, 0xF7, 0xF0, 0xAE, 0x02, 0xAF, 0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x5F, 0xC5, ++0xBF, 0x01, 0x10, 0x90, 0x02, 0x09, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, 0x90, 0x04, 0x1F, ++0x74, 0x20, 0xF0, 0x22, 0x90, 0x01, 0x02, 0xE0, 0x54, 0x03, 0xFF, 0xE0, 0x54, 0x0C, 0x13, 0x13, ++0x54, 0x3F, 0xFE, 0xEF, 0x64, 0x01, 0x60, 0x04, 0xEF, 0xB4, 0x03, 0x0E, 0x90, 0x8A, 0xC5, 0x74, ++0x01, 0xF0, 0xA3, 0x74, 0x37, 0xF0, 0x79, 0x01, 0x80, 0x18, 0xEE, 0x64, 0x01, 0x60, 0x07, 0xAF, ++0x06, 0xEE, 0x64, 0x03, 0x70, 0x3B, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x3D, 0xF0, ++0x79, 0x40, 0x90, 0x8A, 0xC5, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x59, ++0x60, 0x08, 0xE9, 0xF0, 0xE4, 0x90, 0x8A, 0xF6, 0xF0, 0x22, 0x90, 0x8A, 0xF6, 0xE0, 0x04, 0xF0, ++0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x0B, 0xE4, 0xF0, 0x90, 0x04, 0x19, 0xE0, 0x30, 0xE0, 0x02, 0x11, ++0x6D, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x01, 0xC4, 0x74, 0xF2, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x28, 0xF5, ++0x2C, 0xA3, 0xE0, 0x55, 0x29, 0xF5, 0x2D, 0xA3, 0xE0, 0x55, 0x2A, 0xF5, 0x2E, 0xA3, 0xE0, 0x55, ++0x2B, 0xF5, 0x2F, 0xE5, 0x2C, 0x20, 0xE0, 0x02, 0x41, 0x89, 0x90, 0x01, 0x34, 0x74, 0x01, 0xF0, ++0x85, 0xD1, 0x4D, 0x85, 0xD2, 0x4E, 0x85, 0xD3, 0x4F, 0x85, 0xD4, 0x50, 0x85, 0xD5, 0x51, 0x85, ++0xD6, 0x52, 0x85, 0xD7, 0x53, 0x85, 0xD9, 0x54, 0xE5, 0x54, 0x54, 0x40, 0xC3, 0x13, 0xFF, 0xE5, ++0x53, 0x54, 0x20, 0x6F, 0x70, 0x02, 0x41, 0x46, 0xE5, 0x54, 0x30, 0xE5, 0x02, 0x41, 0x46, 0xE5, ++0x52, 0x54, 0x1F, 0xF5, 0x08, 0xE5, 0x4D, 0x54, 0x3F, 0xF5, 0x09, 0xE5, 0x51, 0x54, 0x1F, 0xFF, ++0xE5, 0x08, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, ++0x12, 0x42, 0x81, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, ++0xE4, 0x34, 0x85, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x09, 0xD3, 0x94, 0x04, ++0x40, 0x03, 0x75, 0x09, 0x04, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, 0x43, 0x5F, ++0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE5, 0x53, 0x54, ++0x1F, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, 0x43, ++0x5F, 0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x54, ++0x20, 0xE6, 0x24, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, ++0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x4F, 0x30, 0xE7, 0x36, ++0xAF, 0x08, 0x12, 0x5C, 0xC3, 0x80, 0x2F, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, ++0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, ++0x4F, 0x30, 0xE7, 0x12, 0xE5, 0x4F, 0x54, 0x7F, 0xFD, 0xE5, 0x53, 0x54, 0x1F, 0xF5, 0x0D, 0xAB, ++0x09, 0xAF, 0x08, 0x12, 0x5C, 0x66, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x3A, 0x90, ++0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, ++0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x21, 0x90, 0x8B, 0x3D, 0x12, 0x4B, 0x5C, 0x90, 0x01, ++0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x80, 0x09, ++0x12, 0x4B, 0x34, 0xBF, 0x01, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2C, 0x30, 0xE1, 0x21, 0x90, 0x01, ++0x34, 0x74, 0x02, 0xF0, 0x85, 0xD1, 0x56, 0x85, 0xD2, 0x57, 0x85, 0xD3, 0x58, 0x85, 0xD4, 0x59, ++0x85, 0xD5, 0x5A, 0x85, 0xD6, 0x5B, 0x85, 0xD7, 0x5C, 0x85, 0xD9, 0x5D, 0x12, 0x5F, 0xA4, 0xE5, ++0x2C, 0x30, 0xE3, 0x06, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xE5, 0x2C, 0x30, 0xE4, 0x09, 0x90, ++0x01, 0x34, 0x74, 0x10, 0xF0, 0x43, 0x55, 0x10, 0xE5, 0x2C, 0x30, 0xE5, 0x26, 0x90, 0x01, 0xCF, ++0xE0, 0x30, 0xE5, 0x1F, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0x75, 0xA8, ++0x00, 0x75, 0xE8, 0x00, 0x12, 0x51, 0x9D, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x12, 0x52, ++0x0E, 0x80, 0xFE, 0xE5, 0x2C, 0x30, 0xE6, 0x2D, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0x90, 0x8B, ++0x32, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x90, 0x8B, 0x34, 0xE4, ++0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, ++0x90, 0x8B, 0x2E, 0xE4, 0xF0, 0xE5, 0x2E, 0x20, 0xE0, 0x02, 0x61, 0xE6, 0x90, 0x8B, 0x08, 0x74, ++0x01, 0xF0, 0x90, 0x01, 0x36, 0xF0, 0x90, 0x8B, 0x06, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, ++0x53, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, ++0xE0, 0x2F, 0x90, 0x8B, 0x37, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, ++0x3F, 0x30, 0xE0, 0x1D, 0x90, 0x8B, 0x34, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0D, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x7F, 0x04, 0x12, 0x4E, ++0x89, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x55, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x4E, ++0x90, 0x8B, 0x2E, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x3E, ++0xB1, 0x5F, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, ++0x2D, 0xEF, 0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, ++0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x02, 0x04, 0x7F, 0x01, 0xB1, 0x82, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x43, ++0xE7, 0x90, 0x8B, 0x08, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE1, 0x2F, 0x90, 0x01, 0x36, 0x74, 0x02, ++0xF0, 0x43, 0x55, 0x40, 0x11, 0x84, 0x90, 0x8B, 0x37, 0xE0, 0xB4, 0x01, 0x09, 0x90, 0x05, 0x22, ++0xE4, 0xF0, 0x90, 0x8B, 0x37, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x0D, 0xE4, 0xFF, 0x12, ++0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE2, 0x16, 0x90, ++0x01, 0x36, 0x74, 0x04, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x06, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x03, 0x12, 0x46, 0xB3, 0xE5, 0x2E, 0x30, 0xE3, 0x38, 0x90, 0x01, 0x36, 0x74, 0x08, 0xF0, ++0xE5, 0x21, 0x64, 0x01, 0x70, 0x2C, 0xE5, 0x24, 0x60, 0x28, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, ++0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, 0x8B, ++0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, ++0x05, 0xF0, 0xE5, 0x2E, 0x30, 0xE4, 0x2B, 0x90, 0x01, 0x36, 0x74, 0x10, 0xF0, 0xE5, 0x21, 0xB4, ++0x01, 0x20, 0xE5, 0x24, 0x60, 0x1C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, ++0xF0, 0x90, 0x8B, 0x1B, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x03, 0x12, ++0x4A, 0xFC, 0xE5, 0x2E, 0x30, 0xE5, 0x1F, 0x90, 0x01, 0x36, 0x74, 0x20, 0xF0, 0xE5, 0x21, 0xB4, ++0x01, 0x14, 0xE5, 0x24, 0x60, 0x10, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, 0x4A, ++0x97, 0x80, 0x03, 0x12, 0x49, 0x49, 0xE5, 0x2E, 0x30, 0xE6, 0x1B, 0x90, 0x01, 0x36, 0x74, 0x40, ++0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x10, 0xE5, 0x24, 0x60, 0x0C, 0x53, 0x25, 0xFE, 0xE5, 0x25, 0x54, ++0x07, 0x70, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2F, 0x30, 0xE1, 0x28, 0x90, 0x01, 0x37, 0x74, 0x02, ++0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x18, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x08, ++0x12, 0x48, 0xFE, 0x12, 0x7D, 0xC1, 0x80, 0x0B, 0x90, 0x8B, 0x31, 0x74, 0x01, 0xF0, 0x80, 0x03, ++0x12, 0x48, 0xFE, 0x74, 0xF2, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x05, ++0x58, 0xE0, 0xFF, 0x90, 0x8B, 0x38, 0xE0, 0x2F, 0x24, 0xFE, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, ++0xFD, 0x7F, 0x50, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x53, 0x74, 0x05, 0xF0, 0x22, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0A, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x04, 0x7F, 0x06, 0xB1, 0x82, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x03, 0x12, 0x78, ++0x35, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0x6F, 0x70, ++0x02, 0xE1, 0x4E, 0xEF, 0x12, 0x43, 0x94, 0x65, 0xB0, 0x00, 0x65, 0xEA, 0x01, 0x66, 0x30, 0x02, ++0x66, 0x6A, 0x03, 0x66, 0xA2, 0x04, 0x66, 0xDB, 0x05, 0x67, 0x16, 0x06, 0x00, 0x00, 0x67, 0x4E, ++0xEE, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, 0x81, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0xB4, ++0x05, 0x04, 0xF1, 0x5D, 0xE1, 0x4E, 0xEF, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0x80, 0x16, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xA4, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, ++0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, ++0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, ++0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0xE1, 0x4E, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, ++0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x02, 0x60, 0x02, 0xE1, 0x4E, 0xF1, 0x67, 0xE1, 0x4E, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0x80, 0x16, ++0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0x80, 0x08, 0xEE, 0xB4, ++0x03, 0x04, 0x7F, 0x01, 0xF1, 0x53, 0xF1, 0xD0, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, ++0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, ++0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, ++0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x06, 0xEE, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xB9, ++0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x13, ++0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, ++0x02, 0xF1, 0x67, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0xF1, 0xA4, 0x80, 0x09, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0xF1, 0xAF, 0x80, 0x73, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, ++0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x13, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, ++0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0x90, 0x8B, 0x2D, 0xE0, ++0xB4, 0x01, 0x04, 0xF1, 0xA4, 0x80, 0x0B, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x04, 0x7F, 0x01, ++0xF1, 0x81, 0xF1, 0xC3, 0x80, 0x38, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, ++0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0x90, 0x8B, 0x2D, 0xE0, ++0x70, 0x04, 0xF1, 0x9A, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0xE4, 0xFF, 0xF1, ++0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xDD, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x12, 0x4A, 0xB2, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x04, ++0xF0, 0x22, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, ++0x22, 0x90, 0x8B, 0x56, 0xEF, 0xF0, 0x12, 0x7D, 0x42, 0x90, 0x8B, 0x56, 0xE0, 0x60, 0x05, 0x90, ++0x05, 0x22, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, 0x4A, 0xCC, 0x90, 0x8B, 0x2D, ++0x74, 0x01, 0xF0, 0x22, 0x7F, 0x01, 0x12, 0x4A, 0x7C, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, ++0x7C, 0x4A, 0x90, 0x8B, 0x2D, 0x74, 0x04, 0xF0, 0x22, 0x12, 0x4A, 0x32, 0x90, 0x8B, 0x2D, 0x74, ++0x03, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x05, 0xF0, 0x22, ++0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0x74, 0x6F, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x06, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xE4, 0xFD, 0xFC, 0xEF, 0x30, 0xE0, 0x02, 0x7D, 0x80, 0xEF, 0xC3, 0x13, 0x90, 0xFD, 0x10, ++0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0x28, 0x33, 0xE4, 0xF5, 0x29, ++0x75, 0x2A, 0x07, 0xF5, 0x2B, 0x90, 0x01, 0x30, 0xE5, 0x28, 0xF0, 0xA3, 0xE5, 0x29, 0xF0, 0xA3, ++0xE5, 0x2A, 0xF0, 0xA3, 0xE5, 0x2B, 0xF0, 0x22, 0x75, 0x30, 0x1F, 0x75, 0x31, 0x01, 0x43, 0x31, ++0x10, 0xE4, 0xF5, 0x32, 0x90, 0x01, 0x38, 0xE5, 0x30, 0xF0, 0xA3, 0xE5, 0x31, 0xF0, 0xA3, 0xE5, ++0x32, 0xF0, 0x22, 0x22, 0x90, 0x00, 0x02, 0xE0, 0x54, 0xE0, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, ++0x22, 0x90, 0x00, 0xF3, 0xE0, 0x7F, 0x00, 0x30, 0xE3, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x09, ++0xE0, 0xB4, 0x01, 0x0C, 0x90, 0x00, 0xF2, 0xE0, 0x30, 0xE7, 0x05, 0x7E, 0xFD, 0x7F, 0x33, 0x22, ++0x7E, 0xFD, 0x7F, 0x2F, 0x22, 0x90, 0x00, 0xF3, 0xE0, 0x30, 0xE2, 0x0D, 0x90, 0x05, 0x41, 0x74, ++0x10, 0xF0, 0x90, 0x05, 0x5A, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x64, 0x74, 0xA0, 0xF0, ++0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x7D, 0x91, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x68, 0xFF, 0xA3, 0xF0, 0x53, 0x91, ++0xEF, 0x90, 0x00, 0x51, 0xE0, 0xFE, 0x90, 0x00, 0x55, 0xE0, 0x5E, 0xF5, 0x3D, 0x90, 0x00, 0x52, ++0xE0, 0xFE, 0x90, 0x00, 0x56, 0xE0, 0x5E, 0xF5, 0x3E, 0xE5, 0x3D, 0x30, 0xE4, 0x06, 0x90, 0x00, ++0x55, 0x74, 0x10, 0xF0, 0xE5, 0x3D, 0x30, 0xE5, 0x06, 0x90, 0x00, 0x55, 0x74, 0x20, 0xF0, 0xE5, ++0x3D, 0x30, 0xE6, 0x06, 0x90, 0x00, 0x55, 0x74, 0x40, 0xF0, 0xE5, 0x3D, 0x30, 0xE7, 0x06, 0x90, ++0x00, 0x55, 0x74, 0x80, 0xF0, 0xE5, 0x3E, 0x30, 0xE0, 0x06, 0x90, 0x00, 0x56, 0x74, 0x01, 0xF0, ++0xE5, 0x3E, 0x30, 0xE1, 0x06, 0x90, 0x00, 0x56, 0x74, 0x02, 0xF0, 0xE5, 0x3E, 0x30, 0xE2, 0x06, ++0x90, 0x00, 0x56, 0x74, 0x04, 0xF0, 0xE5, 0x3E, 0x30, 0xE3, 0x06, 0x90, 0x00, 0x56, 0x74, 0x08, ++0xF0, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xEF, 0xC3, 0x94, 0x20, 0x50, 0x39, 0xEF, 0x30, ++0xE0, 0x17, 0xED, 0xC4, 0x54, 0xF0, 0xFD, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x80, 0x10, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, ++0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0xA4, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x4D, 0xF0, 0x22, 0xAD, 0x07, 0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0x90, 0x8A, 0xDE, 0xF0, 0xE0, 0xF9, 0x54, 0x1F, 0xA3, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0xFF, 0x90, 0x8A, 0xE1, ++0xF0, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, ++0xE0, 0x90, 0x8A, 0xE2, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE4, 0xCB, 0xF0, 0xA3, 0xEB, ++0xF0, 0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, ++0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, ++0x34, 0x86, 0xF5, 0x83, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xEE, 0xC3, 0x9F, 0x40, 0x02, 0x41, 0xB9, ++0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, ++0xF0, 0xEF, 0x04, 0x90, 0x8A, 0xE0, 0xF0, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, ++0xFE, 0xD3, 0x9F, 0x40, 0x02, 0x41, 0xF3, 0xEE, 0xC3, 0x94, 0x10, 0x40, 0x21, 0xEE, 0x24, 0xF0, ++0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x8A, 0xE2, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x70, 0x27, 0x90, 0x8A, ++0xE0, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x59, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE4, 0xE0, 0x5E, 0xFE, 0xA3, ++0xE0, 0x5F, 0x4E, 0x60, 0x3C, 0x90, 0x8A, 0xE0, 0xE0, 0xB4, 0x11, 0x0D, 0x90, 0x8A, 0xE3, 0xE0, ++0x30, 0xE7, 0x06, 0x90, 0x8A, 0xE0, 0x74, 0x17, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFF, 0x64, 0x13, ++0x60, 0x04, 0xEF, 0xB4, 0x12, 0x0D, 0x90, 0x8A, 0xE2, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE0, ++0x74, 0x18, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0x80, ++0x42, 0x90, 0x8A, 0xE0, 0xE0, 0x04, 0xF0, 0x41, 0x17, 0x90, 0x8A, 0xE1, 0xE0, 0xFC, 0x90, 0x8A, ++0xDF, 0xE0, 0xFF, 0x6C, 0x70, 0x71, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, ++0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x29, 0x12, 0x43, 0x5F, 0xE0, 0xB4, 0x01, 0x10, ++0xE9, 0x20, 0xE6, 0x0C, 0x90, 0x8A, 0xDF, 0xE0, 0x44, 0x40, 0x90, 0x8A, 0xDE, 0xF0, 0x80, 0x03, ++0xAF, 0x01, 0x22, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, ++0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x66, 0x90, 0x8A, 0xDF, 0xE0, 0xD3, 0x9C, 0x40, 0x5E, 0x90, ++0x8A, 0xE1, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, ++0x90, 0x8A, 0xDF, 0xEF, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0xFC, 0xA3, 0xE0, 0xFF, 0x25, 0xE0, 0x24, ++0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, ++0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, ++0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, ++0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x22, 0x74, 0x01, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xDE, 0xE0, 0x44, ++0x80, 0xFD, 0x12, 0x5C, 0x4E, 0x90, 0x8A, 0xDE, 0xE0, 0x44, 0x80, 0xFF, 0x22, 0xE4, 0x90, 0x8A, ++0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, 0x03, 0x02, 0x72, 0x54, 0x75, ++0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, 0x12, 0x43, 0x5F, 0xE0, 0x64, 0x01, 0x60, 0x03, 0x02, 0x72, ++0x4B, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, ++0xE0, 0xFC, 0xA3, 0xE0, 0xD3, 0x94, 0x00, 0xEC, 0x94, 0x00, 0x50, 0x03, 0x02, 0x72, 0x4B, 0xEF, ++0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x00, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0x75, 0x12, 0x01, 0xF5, 0x13, ++0x89, 0x14, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, ++0x83, 0xE0, 0xFD, 0xA3, 0xE0, 0x90, 0x8A, 0xD4, 0xCD, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x25, 0xE0, ++0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xD6, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, ++0x04, 0xF5, 0x83, 0xE0, 0x54, 0x3F, 0x90, 0x8A, 0xD0, 0xF0, 0xE0, 0xFD, 0x54, 0x1F, 0xA3, 0xF0, ++0x75, 0xF0, 0x09, 0xEE, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD9, 0xF0, 0x90, ++0x8A, 0xCF, 0xE0, 0xFB, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xC3, 0x94, ++0x05, 0x40, 0x02, 0xC1, 0x9C, 0x90, 0x8A, 0xD9, 0xE0, 0xFE, 0x90, 0x8A, 0xD1, 0xE0, 0x9E, 0x40, ++0x13, 0x90, 0x8A, 0xD9, 0xE0, 0x90, 0x8A, 0xD1, 0xF0, 0xED, 0x54, 0x40, 0xFD, 0x90, 0x8A, 0xD0, ++0xF0, 0xEE, 0x4D, 0xF0, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0x90, 0x41, 0x12, 0x93, 0xFE, 0x74, 0x23, ++0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xC3, 0x9E, 0x40, 0x06, 0xEF, 0x90, 0x40, ++0xDA, 0x80, 0x07, 0x90, 0x8A, 0xD1, 0xE0, 0x90, 0x40, 0xF6, 0x93, 0x90, 0x8A, 0xD8, 0xF0, 0x90, ++0x8A, 0xD8, 0xE0, 0x75, 0xF0, 0x06, 0xA4, 0x24, 0x50, 0xF9, 0x74, 0x40, 0x35, 0xF0, 0x75, 0x0F, ++0xFF, 0xF5, 0x10, 0x89, 0x11, 0x90, 0x8A, 0xD0, 0xE0, 0x90, 0x41, 0xBA, 0x93, 0xFF, 0xD3, 0x90, ++0x8A, 0xD7, 0xE0, 0x9F, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0xE4, 0xFD, 0x12, 0x5D, 0x41, 0x02, 0x71, 0xE1, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, ++0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xD2, 0xCF, ++0xF0, 0xA3, 0xEF, 0xF0, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x12, 0x29, 0xD9, 0xFF, 0x7E, 0x00, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x97, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, ++0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, ++0x01, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x02, ++0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, ++0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x7E, ++0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x04, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, ++0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, ++0xA9, 0x11, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, ++0x14, 0x90, 0x00, 0x06, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, ++0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x04, 0x12, ++0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x08, 0x12, 0x42, ++0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, ++0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x05, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0x90, ++0x8A, 0xD4, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x29, 0xF2, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, 0x9F, ++0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x0C, 0xA3, 0xE0, 0x9F, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, ++0xF0, 0x80, 0x07, 0xE4, 0x90, 0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, ++0xF5, 0x83, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xD3, 0xED, 0x9B, ++0xEC, 0x9A, 0x40, 0x05, 0x31, 0x78, 0x02, 0x71, 0xAF, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, ++0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xC3, ++0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x03, 0x02, 0x71, 0xAF, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5D, 0x41, 0x02, 0x71, 0xAF, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xFC, 0x64, 0x05, 0x60, 0x03, ++0x02, 0x70, 0x7D, 0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x03, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, ++0x94, 0x19, 0x40, 0x3D, 0x80, 0x2E, 0xEE, 0xB4, 0x02, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, ++0x11, 0x40, 0x2E, 0x80, 0x1F, 0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x01, 0x0B, 0x90, 0x8A, 0xD1, ++0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x1B, 0x80, 0x0C, 0xEE, 0x70, 0x11, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, ++0x94, 0x03, 0x40, 0x0D, 0x90, 0x89, 0x43, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x89, 0x43, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, ++0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x23, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, ++0xC3, 0x94, 0x30, 0x50, 0x0B, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0x02, 0x70, 0x28, ++0x90, 0x89, 0x43, 0xE0, 0x64, 0x01, 0x60, 0x03, 0x02, 0x70, 0x1D, 0x90, 0x8A, 0xCF, 0xE0, 0x24, ++0x44, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x64, 0x0A, 0x60, 0x5B, 0x90, 0x8A, 0xCF, ++0xE0, 0xFF, 0xEE, 0x24, 0x05, 0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xE0, 0xFF, 0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x50, 0x38, ++0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0xEF, 0x24, 0x05, 0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x23, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x50, 0x16, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, ++0xFF, 0x90, 0x8A, 0xD1, 0xE0, 0x6F, 0x60, 0x56, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x23, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFF, 0xD3, 0x94, 0x42, 0x40, 0x08, 0x90, 0x8A, 0xDD, 0x74, ++0x05, 0xF0, 0x80, 0x11, 0xEF, 0xD3, 0x94, 0x39, 0x90, 0x8A, 0xDD, 0x40, 0x05, 0x74, 0x03, 0xF0, ++0x80, 0x03, 0x74, 0x01, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x23, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x44, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0x80, 0x2F, 0x90, 0x8A, ++0xCF, 0xE0, 0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x44, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x14, 0xE4, 0x90, 0x8A, ++0xDD, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0x90, 0x8A, 0xD1, 0xE0, 0xFE, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x84, 0xF5, 0x82, 0xE4, ++0x34, 0x8A, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFE, 0x74, 0x43, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x88, 0xF5, 0x83, 0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2B, 0x12, 0x43, ++0x5F, 0xE0, 0xB4, 0x01, 0x11, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0x21, 0xAC, 0xEC, 0x64, 0x06, ++0x60, 0x02, 0x21, 0xAF, 0x90, 0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x41, 0xDB, 0x93, 0xFF, 0x7E, ++0x00, 0x90, 0x8A, 0xD4, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xDB, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE0, 0x90, 0x8A, 0xDD, 0xF0, 0xE4, 0x90, 0x8A, 0xDA, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, ++0xD3, 0x94, 0x04, 0x50, 0x47, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x75, 0xF0, 0x02, 0xEF, 0xA4, ++0xF5, 0x82, 0x85, 0xF0, 0x83, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0xEF, 0x90, 0x41, 0xD6, 0x93, ++0xFF, 0x7E, 0x00, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0x90, ++0x8A, 0xDB, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, ++0xE0, 0x9E, 0x50, 0x08, 0x90, 0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0x80, 0xAF, 0x90, 0x8A, 0xDA, 0xE0, ++0xC3, 0x13, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFF, 0xB4, 0x01, 0x0D, 0x90, 0x8A, 0xDA, 0xE0, 0x70, ++0x5D, 0x90, 0x8A, 0xDD, 0x04, 0xF0, 0x80, 0x5B, 0xEF, 0xB4, 0x03, 0x1D, 0x90, 0x8A, 0xDA, 0xE0, ++0xFF, 0x70, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x03, 0xF0, 0x80, 0x48, 0xEF, 0xB4, 0x01, 0x08, 0x90, ++0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x80, 0x3C, 0x80, 0x35, 0x90, 0x8A, 0xDD, 0xE0, 0x64, 0x05, 0x70, ++0x32, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x05, 0xF0, 0x80, 0x0F, ++0xEF, 0x90, 0x8A, 0xDD, 0xB4, 0x01, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, 0xD3, ++0x90, 0x8A, 0xD7, 0xE0, 0x94, 0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x05, 0xE4, 0x90, ++0x8A, 0xDD, 0xF0, 0xD3, 0x90, 0x8A, 0xD7, 0xE0, 0x94, 0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, ++0x40, 0x05, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xED, 0xF0, 0x12, 0x69, 0x38, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xD3, 0x94, ++0x05, 0x50, 0x0F, 0x74, 0x64, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0x04, 0xF0, ++0x80, 0x0F, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0xE4, 0xF5, 0xF0, 0x12, 0x42, 0xFA, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x90, 0x00, 0x02, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x04, 0xE4, ++0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x06, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, ++0x08, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xC0, ++0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, ++0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, ++0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, ++0xF0, 0x02, 0x6B, 0xC2, 0x22, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xC3, ++0x94, 0x10, 0x50, 0x14, 0x74, 0xA4, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE4, 0xF0, ++0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x80, 0xE2, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, ++0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, 0x02, 0x81, 0x0E, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x00, ++0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x02, 0x12, 0x43, ++0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x04, 0x12, 0x43, 0x5F, 0xE4, ++0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x06, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, ++0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x08, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, ++0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x74, 0x44, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x43, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x88, ++0xF5, 0x83, 0xE4, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x44, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, ++0x74, 0x24, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x64, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x41, 0x8C, 0x93, 0xFE, 0x74, 0x01, 0x93, ++0xFF, 0x90, 0x41, 0x54, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x3E, 0xC3, 0x13, 0xFE, 0xEF, ++0x13, 0xFF, 0x90, 0x8A, 0xCF, 0xE0, 0xFD, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, ++0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x29, 0x12, 0x43, ++0x5F, 0x74, 0x01, 0xF0, 0x74, 0xC1, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0x74, 0x0C, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, ++0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x23, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, ++0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0x74, 0x13, 0xF0, 0x75, 0xF0, 0x09, ++0xED, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0x04, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x41, 0x7D, 0x22, 0x12, ++0x29, 0xD9, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x14, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFE, 0x74, ++0x23, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0xEF, 0xB4, 0x20, 0x0A, ++0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0x90, 0x87, 0x21, 0xF0, 0x22, 0x90, 0x8B, 0x4B, 0xEE, 0xF0, ++0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x8B, 0x4B, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, ++0x82, 0x8E, 0x83, 0xE0, 0x60, 0x2C, 0xC3, 0x90, 0x8B, 0x4E, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4D, ++0xE0, 0x94, 0x03, 0x40, 0x0A, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x00, 0x22, 0x90, ++0x8B, 0x4D, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x37, 0x54, ++0x80, 0xC6, 0x7F, 0x01, 0x22, 0x12, 0x29, 0xD9, 0xF5, 0x21, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x2A, 0x8B, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x01, 0x12, ++0x42, 0x20, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x0A, 0xF0, ++0x12, 0x47, 0xFA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x30, ++0xE0, 0x25, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x10, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, ++0x8B, 0x11, 0xF0, 0xEF, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x8B, 0x0F, 0xF0, 0x90, 0x00, 0x03, 0x12, ++0x42, 0x20, 0x90, 0x8B, 0x16, 0xF0, 0x22, 0x90, 0x8B, 0x10, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x11, ++0x74, 0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0x22, ++0x12, 0x29, 0xD9, 0x30, 0xE0, 0x19, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x8B, 0x15, 0xF0, 0x90, 0x00, ++0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8B, 0x13, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x0F, 0x90, ++0x8B, 0x15, 0x74, 0x05, 0xF0, 0x90, 0x8B, 0x13, 0xE4, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, ++0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x12, 0xF0, ++0x60, 0x07, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x90, 0x8B, 0x12, 0xE0, 0x90, 0x01, 0xE7, ++0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x29, 0xD9, 0xFE, 0xAF, 0x05, 0xED, 0x2E, 0x90, ++0x8A, 0xF7, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xF8, 0xF0, ++0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xF9, 0xF0, 0x90, 0x00, 0x03, ++0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xFA, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, ++0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x8A, 0xFB, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x12, 0x29, 0xD9, 0xC3, ++0x13, 0x20, 0xE0, 0x02, 0xC1, 0xED, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, ++0x54, 0x02, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0x54, 0xFD, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, ++0xEE, 0x54, 0xFE, 0x4F, 0xFF, 0xF0, 0x12, 0x29, 0xD9, 0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, ++0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, ++0x12, 0x29, 0xD9, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, ++0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xF0, 0x20, 0xE0, 0x02, 0xC1, 0xD9, 0x90, 0x8A, ++0xDD, 0x74, 0x21, 0xF0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, 0x13, 0x13, ++0x54, 0x01, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, 0x13, 0x54, 0x01, 0x6E, 0x60, 0x2A, 0xEF, ++0x54, 0x04, 0xFF, 0xED, 0x54, 0xFB, 0x4F, 0xF0, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0E, ++0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x36, 0xE6, 0x80, 0x0B, 0xE4, 0x90, ++0x8B, 0x34, 0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x36, 0x75, 0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x12, 0xF0, 0xED, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x14, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x8B, 0x32, ++0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x40, 0xF0, ++0x90, 0x8A, 0xDD, 0xE0, 0x90, 0x05, 0x27, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x70, 0x05, 0x7F, 0x01, ++0x12, 0x4E, 0x89, 0x90, 0x8B, 0x32, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x04, 0x7F, ++0x03, 0x80, 0x0E, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x02, 0x12, 0x4E, 0x89, 0x7F, 0x02, 0x02, 0x78, 0x2E, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, ++0x05, 0x27, 0xF0, 0xE4, 0xFF, 0x12, 0x4E, 0x89, 0x7F, 0x03, 0x02, 0x78, 0x2E, 0x90, 0x8A, 0xDA, ++0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, 0x54, 0x02, 0xFE, 0x90, 0x8B, 0x2C, 0xE0, 0x54, 0xFD, ++0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, 0xEE, 0x54, 0xFE, 0x4F, 0xFF, 0xF0, 0x12, 0x29, 0xD9, ++0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x8B, 0x2C, 0xF0, 0xEE, 0x54, 0x10, ++0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x29, 0xD9, 0xFE, 0x54, 0x40, 0xFD, 0xEF, 0x54, ++0xBF, 0x4D, 0xFF, 0x90, 0x8B, 0x2C, 0xF0, 0xEE, 0x54, 0x04, 0xFE, 0xEF, 0x54, 0xFB, 0x4E, 0xF0, ++0x20, 0xE0, 0x02, 0xE1, 0xE2, 0x90, 0x8A, 0xDD, 0x74, 0x31, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x20, 0xE0, 0x0B, 0xE4, 0x90, 0x8B, 0x2E, 0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x36, ++0x75, 0x90, 0x8B, 0x2C, 0xE0, 0xFD, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x8A, ++0xDD, 0xE0, 0x44, 0x02, 0xF0, 0xED, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, ++0x44, 0x04, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0x54, 0x06, 0x60, 0x0C, 0x90, 0x01, 0x3E, 0x74, 0x03, ++0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x37, 0x00, 0x90, 0x8A, 0xDD, 0xE0, 0x90, 0x05, 0x27, 0xF0, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0D, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x2C, 0x7F, 0x06, 0x12, 0x65, 0x82, 0x80, 0x25, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x06, 0x1B, ++0x7F, 0x01, 0x12, 0x65, 0x82, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x09, 0x7D, 0x01, 0xAF, ++0x23, 0x12, 0x45, 0xA2, 0x80, 0x05, 0x12, 0x4E, 0x56, 0x80, 0x03, 0x12, 0x7D, 0xC1, 0x7F, 0x01, ++0x80, 0x4C, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x27, 0xF0, 0x7D, 0x03, 0x7F, 0x02, ++0x12, 0x36, 0x92, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x06, 0x02, 0x80, 0x1B, 0x90, 0x8B, 0x2D, 0xE0, ++0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, 0x80, 0x14, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, ++0x02, 0x05, 0x7F, 0x01, 0x12, 0x65, 0x82, 0x11, 0x35, 0x12, 0x4A, 0xFC, 0x7F, 0x03, 0x11, 0x42, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8B, 0x31, 0xE0, 0xB4, 0x01, 0x05, 0xE4, 0xF0, 0x12, 0x48, ++0xFE, 0x22, 0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, 0x04, 0xEF, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x32, ++0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xED, 0x64, 0x02, 0x60, 0x04, 0xED, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x2C, 0xE0, 0x54, ++0xFE, 0xF0, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0x22, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x38, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8A, 0xFD, 0xE0, 0x90, 0x8A, 0xE8, 0xF0, 0x90, 0x8A, 0xFE, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, ++0x8A, 0xE9, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, ++0xFF, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x8B, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0xEB, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, ++0x04, 0xDA, 0x90, 0x8A, 0xE8, 0xE0, 0x12, 0x43, 0x94, 0x78, 0xF8, 0x00, 0x7A, 0x6B, 0x01, 0x79, ++0x01, 0x02, 0x79, 0x01, 0x03, 0x79, 0x01, 0x04, 0x7A, 0x6B, 0x05, 0x7A, 0x35, 0x80, 0x7A, 0x4E, ++0x81, 0x7A, 0x6B, 0x82, 0x00, 0x00, 0x7A, 0x67, 0x90, 0x8A, 0xEE, 0xE0, 0xFF, 0x51, 0x72, 0x41, ++0x6B, 0x90, 0x8A, 0xE8, 0xE0, 0xFF, 0xB4, 0x02, 0x08, 0x90, 0x8A, 0xE5, 0x74, 0x01, 0xF0, 0x80, ++0x0F, 0xEF, 0x90, 0x8A, 0xE5, 0xB4, 0x03, 0x05, 0x74, 0x02, 0xF0, 0x80, 0x03, 0x74, 0x04, 0xF0, ++0xC3, 0x90, 0x8A, 0xE9, 0xE0, 0x94, 0x08, 0x50, 0x78, 0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, ++0xE5, 0xE0, 0xFF, 0x90, 0x8A, 0xE4, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xE9, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0xEE, 0x94, 0x01, 0x90, 0x8A, 0xE4, 0xE0, 0x50, 0x1F, 0xFE, ++0x2F, 0xFF, 0xEE, 0xFD, 0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, ++0xF5, 0x82, 0x74, 0x8A, 0x3C, 0xF5, 0x83, 0xE0, 0xFD, 0x12, 0x51, 0x88, 0x80, 0x2B, 0xFF, 0xFD, ++0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, 0xF5, 0x82, 0x74, 0x8A, ++0x3C, 0xF5, 0x83, 0xE0, 0xFE, 0xEF, 0xFD, 0x90, 0x8A, 0xEA, 0xE0, 0x2D, 0xFD, 0x90, 0x8A, 0xE9, ++0xE0, 0x34, 0x00, 0x8D, 0x82, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0x80, ++0x8D, 0xC3, 0x90, 0x8A, 0xE9, 0xE0, 0x94, 0x10, 0x40, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xE8, 0xE0, ++0x64, 0x04, 0x60, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xEC, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, ++0x10, 0x12, 0x2A, 0x6C, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xEB, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x18, 0x12, 0x2A, 0x6C, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x43, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xED, ++0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x2A, 0x6C, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x43, 0x46, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0xA3, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x12, 0x43, 0x46, 0xA3, 0x12, 0x2A, 0x7F, 0x90, 0x8A, 0xEF, 0x12, ++0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x90, 0x8A, 0xE9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x12, 0x2F, 0xD9, 0x80, 0x36, 0x90, 0x8A, 0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, ++0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x37, 0x54, 0x80, 0x1D, 0x90, 0x8A, ++0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, ++0xEF, 0xF0, 0x12, 0x36, 0xCB, 0x80, 0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x8F, 0x0F, 0xE4, 0x90, 0x8A, 0xF3, 0xF0, 0xE5, 0x0F, 0x14, 0xFE, 0x90, 0x8A, 0xF3, ++0xE0, 0xFF, 0xC3, 0x9E, 0x50, 0x0E, 0xEF, 0x04, 0xFD, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE0, ++0x04, 0xF0, 0x80, 0xE5, 0xE5, 0x0F, 0x14, 0xFF, 0x7D, 0xFF, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, ++0xE5, 0x0F, 0xF0, 0x90, 0x8A, 0xF3, 0xE0, 0xC3, 0x94, 0xFF, 0x50, 0x0F, 0xE0, 0xFF, 0x04, 0xFD, ++0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE8, 0xAD, 0x0F, 0x7F, 0xFF, 0x02, ++0x34, 0xB7, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0xA3, 0x74, ++0x04, 0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x8A, 0xE2, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90, ++0x8A, 0xE1, 0xF0, 0x12, 0x29, 0xD9, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0x2F, 0x90, 0x8A, 0xE0, 0xF0, ++0x30, 0xE0, 0x0B, 0x90, 0x8A, 0xDB, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x80, 0x07, 0xE4, 0x90, ++0x8A, 0xDB, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90, ++0x8A, 0xDD, 0xE0, 0x24, 0x20, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFC, 0x2D, ++0xFF, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xFD, 0xF0, 0x74, ++0x02, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0xEC, 0x2D, 0x24, 0x03, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0x90, 0x8A, 0xFE, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xDA, 0x74, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFF, 0xA3, ++0xE0, 0x2F, 0xFF, 0x90, 0x8A, 0xDA, 0xE0, 0xFE, 0x2F, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0xFF, 0x74, 0xFC, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, ++0x90, 0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x08, 0xCF, 0x11, 0x89, 0xEF, 0x70, 0x45, 0x90, ++0x01, 0xC3, 0xE0, 0x60, 0x2B, 0xC3, 0x90, 0x8A, 0xE3, 0xE0, 0x94, 0xE8, 0x90, 0x8A, 0xE2, 0xE0, ++0x94, 0x03, 0x40, 0x09, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x79, 0x90, 0x8A, 0xE2, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x37, 0x54, 0x80, 0xCF, ++0x90, 0x01, 0xC6, 0xE0, 0x90, 0x01, 0xC3, 0x30, 0xE2, 0x05, 0x74, 0xFE, 0xF0, 0x80, 0x57, 0x74, ++0xFF, 0xF0, 0x80, 0x52, 0x90, 0x8A, 0xDD, 0xE0, 0xB4, 0x78, 0x2E, 0xE4, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x64, 0x80, 0x90, 0x8A, 0xDB, ++0x70, 0x05, 0xF0, 0xA3, 0xF0, 0x80, 0x06, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x80, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x24, 0x08, 0xF0, ++0x90, 0x8A, 0xDE, 0x74, 0xFF, 0xF5, 0xF0, 0x12, 0x42, 0x81, 0x90, 0x8A, 0xDE, 0xE0, 0x70, 0x02, ++0xA3, 0xE0, 0x60, 0x02, 0x61, 0x16, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x29, 0xD9, 0x90, 0x8B, ++0x05, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x06, 0xF0, 0x22, 0xE4, 0xF5, 0x61, ++0x22, 0x91, 0x4A, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, ++0x7F, 0x78, 0x7E, 0x08, 0x12, 0x27, 0xDE, 0x90, 0x8B, 0x1C, 0x12, 0x2A, 0x7F, 0x7F, 0x04, 0x7E, ++0x0C, 0x12, 0x27, 0xDE, 0x90, 0x8B, 0x20, 0x12, 0x2A, 0x7F, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x27, ++0xDE, 0x90, 0x8B, 0x24, 0x12, 0x2A, 0x7F, 0x90, 0x8B, 0x09, 0xE0, 0x90, 0x8B, 0x1C, 0xB4, 0x01, ++0x0D, 0x12, 0x43, 0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xED, 0x54, 0xC7, 0xFD, 0x80, 0x07, 0x12, 0x43, ++0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xEC, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x78, 0x7E, 0x08, ++0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x20, 0x12, 0x43, 0x53, 0xEF, 0x54, 0x0F, 0xFF, 0xEC, 0x90, 0x80, ++0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x04, 0x7E, 0x0C, 0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x24, 0x12, 0x43, ++0x53, 0xEF, 0x44, 0x02, 0xFF, 0xEC, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x00, 0x7E, 0x08, ++0x12, 0x2F, 0xD9, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x27, 0xDE, 0x90, 0x8B, 0x28, 0x12, 0x2A, 0x7F, ++0x90, 0x80, 0x85, 0x12, 0x2A, 0x8B, 0x00, 0x1B, 0x25, 0xA0, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2F, ++0xD9, 0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x34, ++0x81, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x00, ++0x00, 0x00, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x34, 0x81, 0x90, 0x00, 0x11, 0xE0, 0x54, 0xF6, 0xF0, ++0x02, 0x52, 0x0E, 0x91, 0x50, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, ++0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0xB1, 0x42, 0x90, 0x8B, 0x33, 0x74, 0x04, ++0xF0, 0x22, 0x90, 0x00, 0x11, 0xE0, 0x44, 0x09, 0xF0, 0x12, 0x52, 0x0E, 0x90, 0x8B, 0x1C, 0x12, ++0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x78, 0x7E, 0x08, 0x12, 0x2F, 0xD9, 0x90, ++0x8B, 0x20, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x04, 0x7E, 0x0C, 0x12, ++0x2F, 0xD9, 0x90, 0x8B, 0x24, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x00, ++0x7E, 0x08, 0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x28, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, ++0x7F, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2F, 0xD9, 0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x03, ++0x2D, 0x95, 0xE4, 0xFD, 0xFF, 0x12, 0x34, 0x81, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, ++0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x03, 0x2D, 0x95, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x34, 0x81, ++0x22, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x3C, 0xE5, 0x22, 0x54, 0x0F, 0x14, 0x60, 0x2E, ++0x14, 0x60, 0x1E, 0x24, 0xFE, 0x60, 0x0E, 0x24, 0xF8, 0x70, 0x2A, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, ++0x90, 0x05, 0x22, 0xF0, 0x22, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x22, 0xE4, 0xF0, ++0x22, 0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0x90, 0x01, ++0xC6, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0xAE, 0x07, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x18, ++0x90, 0x8B, 0x2C, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0C, 0xAF, 0x06, 0x7D, 0x01, ++0x12, 0x45, 0xA2, 0xB1, 0xC1, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, ++0x3C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x1B, 0xE0, ++0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0, 0x04, 0xF0, 0x53, ++0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0x40, 0x0E, 0xE5, ++0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x01, 0x5B, ++0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90, ++0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B, 0x4F, 0xF0, 0xA3, ++0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xA3, ++0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4F, ++0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x37, 0x54, 0x90, ++0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x00, 0x92, 0x00}; ++ ++// =================== v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05 ===================== ++u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = { ++0xC1, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x11, 0xDE, 0x3E, 0x01, 0x00, ++0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x60, 0xF2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x68, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00, ++0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02, ++0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09, ++0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08, ++0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18, ++0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21, ++0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20, ++0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10, ++0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20, ++0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04, ++0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05, ++0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E, ++0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E, ++0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A, ++0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04, ++0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, ++0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40, ++0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8, ++0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C, ++0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28, ++0x00, 0x3C, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64, ++0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02, ++0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x02, 0x03, 0x04, 0x0A, 0x0C, 0x0E, ++0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06, ++0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xBB, 0x01, 0x0C, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0x22, 0x50, ++0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE6, 0x22, 0xBB, 0xFE, 0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0x22, ++0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0xBB, 0x01, 0x06, ++0x89, 0x82, 0x8A, 0x83, 0xF0, 0x22, 0x50, 0x02, 0xF7, 0x22, 0xBB, 0xFE, 0x01, 0xF3, 0x22, 0xF8, ++0xBB, 0x01, 0x0D, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0x22, ++0x50, 0x06, 0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x22, 0xBB, 0xFE, 0x05, 0xE9, 0x25, 0x82, 0xC8, 0xF2, ++0x22, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, ++0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, ++0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3, ++0xF5, 0xF0, 0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01, ++0x93, 0x22, 0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, ++0xF5, 0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22, ++0xBB, 0xFE, 0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A, ++0xF5, 0x83, 0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, ++0x83, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB, ++0xFE, 0x06, 0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29, ++0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09, ++0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8, ++0xF2, 0xE5, 0xF0, 0x08, 0xF2, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, ++0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4, ++0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, ++0xA3, 0xE0, 0xF9, 0x22, 0xF8, 0xE0, 0xFB, 0xA3, 0xA3, 0xE0, 0xF9, 0x25, 0xF0, 0xF0, 0xE5, 0x82, ++0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0xFA, 0x38, 0xF0, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, ++0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, ++0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, ++0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, ++0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, ++0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0xB5, 0xF0, 0x06, 0x74, 0x03, 0x93, 0x68, 0x60, ++0xE9, 0xA3, 0xA3, 0xA3, 0xA3, 0x80, 0xD8, 0xE4, 0x90, 0x8A, 0xC5, 0xF0, 0xE5, 0x24, 0x70, 0x03, ++0x02, 0x44, 0x9D, 0xE5, 0x21, 0x64, 0x01, 0x60, 0x03, 0x02, 0x44, 0x9D, 0xE5, 0x24, 0x14, 0x60, ++0x29, 0x24, 0xFD, 0x60, 0x25, 0x24, 0x02, 0x24, 0xFB, 0x50, 0x02, 0x80, 0x23, 0x90, 0x8B, 0x0B, ++0xE0, 0x14, 0xF0, 0xE0, 0x60, 0x04, 0xA3, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x0A, ++0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, 0xF0, 0x80, 0x00, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, ++0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x16, 0xA3, 0xE0, 0xB4, 0x06, 0x05, 0xE4, 0x90, 0x8A, 0xC5, ++0xF0, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x70, 0x04, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, 0xC5, ++0xE0, 0x60, 0x4A, 0x43, 0x25, 0x10, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0C, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0xFF, 0x90, 0x8B, 0x15, 0xE0, 0x2F, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0xE5, 0x22, 0x54, ++0x0F, 0xC3, 0x94, 0x04, 0x50, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x90, 0x8B, 0x2C, ++0xE0, 0x30, 0xE0, 0x09, 0x12, 0x7D, 0xC1, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0xE4, 0xF5, ++0x25, 0xF5, 0x24, 0x75, 0x23, 0x0C, 0x75, 0x22, 0x0C, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x8B, 0x18, ++0xF0, 0x90, 0x8B, 0x17, 0xF0, 0x90, 0x8B, 0x19, 0x04, 0xF0, 0x90, 0x8B, 0x0B, 0xF0, 0xE4, 0x90, ++0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0D, 0xF0, 0x90, 0x8B, 0x15, 0x74, 0x05, 0xF0, 0xE4, 0x90, 0x8B, ++0x0C, 0xF0, 0x90, 0x8B, 0x13, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x10, 0xF0, 0xA3, 0x74, ++0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0xE4, 0x90, ++0x8B, 0x0E, 0xF0, 0x90, 0x8B, 0x0A, 0xF0, 0x90, 0x8B, 0x08, 0xF0, 0x90, 0x8B, 0x12, 0xF0, 0x22, ++0x7F, 0x00, 0x22, 0x02, 0x45, 0x03, 0x02, 0x45, 0x06, 0x8E, 0x64, 0x8F, 0x65, 0xAD, 0x65, 0xAC, ++0x64, 0xAF, 0x63, 0x12, 0x4A, 0x5B, 0xAF, 0x65, 0xAE, 0x64, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, ++0xFD, 0xAC, 0x07, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x01, ++0xF0, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xAC, ++0x07, 0x74, 0x16, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0xFA, 0xF0, 0x74, ++0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, ++0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, ++0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, ++0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x4D, ++0xFD, 0x74, 0x14, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xED, 0xF0, 0x22, 0x7D, 0x01, ++0x7F, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x67, 0x8D, 0x68, 0xE5, 0x67, 0x54, ++0x0F, 0xFF, 0xE5, 0x22, 0x54, 0x0F, 0x6F, 0x60, 0x72, 0xE5, 0x67, 0x30, 0xE2, 0x30, 0xE5, 0x22, ++0x20, 0xE2, 0x05, 0x7F, 0x01, 0x12, 0x4A, 0xB2, 0xE5, 0x22, 0x30, 0xE3, 0x10, 0xE5, 0x67, 0x20, ++0xE3, 0x0B, 0x12, 0x49, 0xD5, 0xEF, 0x60, 0x53, 0x12, 0x4A, 0xCC, 0x80, 0x4E, 0xE5, 0x22, 0x20, ++0xE3, 0x49, 0xE5, 0x67, 0x30, 0xE3, 0x44, 0xAF, 0x68, 0x12, 0x4A, 0x7C, 0x80, 0x3D, 0xE5, 0x22, ++0x54, 0x0F, 0xFF, 0xBF, 0x0C, 0x0E, 0xE5, 0x67, 0x20, 0xE3, 0x09, 0x12, 0x49, 0xD5, 0xEF, 0x60, ++0x2A, 0x12, 0x4A, 0xCC, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, 0x04, 0x0E, 0xE5, 0x67, 0x20, 0xE2, ++0x09, 0x12, 0x49, 0x93, 0xEF, 0x60, 0x14, 0x12, 0x4A, 0x32, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, ++0x02, 0x09, 0x12, 0x45, 0x00, 0xEF, 0x60, 0x03, 0x12, 0x4B, 0x10, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x02, 0x46, 0x6E, 0x02, 0x50, 0xC6, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, ++0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, ++0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, ++0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x4B, ++0x23, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, ++0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, ++0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, ++0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, ++0xE7, 0x80, 0xBE, 0xE5, 0x21, 0x64, 0x01, 0x70, 0x67, 0xE5, 0x24, 0x60, 0x63, 0xE5, 0x24, 0x64, ++0x02, 0x60, 0x06, 0xE5, 0x24, 0x64, 0x05, 0x70, 0x27, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x8B, 0x19, 0xF0, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x07, 0x90, ++0x8B, 0x19, 0xE0, 0xFF, 0x80, 0x05, 0x90, 0x8B, 0x0B, 0xE0, 0xFF, 0x90, 0x8B, 0x0B, 0xEF, 0xF0, ++0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x02, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x0C, 0xF0, 0x90, 0x05, 0x58, ++0x74, 0x03, 0xF0, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x53, 0x25, ++0xFD, 0x53, 0x25, 0xEF, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x47, 0x8E, ++0x22, 0xEF, 0x64, 0x01, 0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x12, 0x31, 0x2C, 0x7D, 0x02, 0x7F, ++0x03, 0x12, 0x31, 0x2C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x12, ++0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x7D, 0xC1, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, 0x7B, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x7B, 0xFF, 0x12, 0x31, 0x9D, 0x7D, 0x02, 0x7F, 0x03, 0x12, ++0x31, 0x9D, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, ++0x12, 0x4B, 0x4F, 0xE5, 0x21, 0x20, 0xE0, 0x05, 0xE4, 0x90, 0x8B, 0x0D, 0xF0, 0x22, 0xE4, 0x90, ++0x8A, 0xC5, 0xF0, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x8A, 0xC5, 0xF0, 0xE0, 0x54, 0xC0, 0x70, 0x09, ++0x53, 0x25, 0xFE, 0x53, 0x25, 0xFD, 0x12, 0x4A, 0xFC, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE6, 0x15, ++0x43, 0x25, 0x01, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, 0x4A, 0x97, 0x80, 0x08, ++0x12, 0x49, 0x49, 0x80, 0x03, 0x53, 0x25, 0xFE, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE7, 0x27, 0x43, ++0x25, 0x02, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, ++0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0x90, ++0x8B, 0x1B, 0x74, 0x01, 0xF0, 0x22, 0x53, 0x25, 0xFD, 0x22, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x8B, ++0x12, 0x4B, 0x43, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x12, 0x24, 0x62, 0xF5, 0x24, 0x14, 0x60, ++0x0E, 0x14, 0x60, 0x1F, 0x14, 0x60, 0x31, 0x24, 0x03, 0x70, 0x44, 0x7F, 0x01, 0x80, 0x3D, 0x90, ++0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, 0xE4, 0xFF, 0x12, 0x4A, ++0x07, 0x80, 0x29, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, ++0x7F, 0x01, 0x12, 0x4A, 0x07, 0x1F, 0x80, 0x14, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, ++0x02, 0x12, 0x42, 0x20, 0xFD, 0x7F, 0x02, 0x12, 0x4A, 0x07, 0xE4, 0xFF, 0x12, 0x47, 0x21, 0x22, ++0xE4, 0x90, 0x8A, 0xCB, 0xF0, 0xE5, 0x24, 0x60, 0x49, 0x90, 0x8B, 0x1B, 0xE0, 0x60, 0x0D, 0xE4, ++0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x38, 0x80, 0x33, 0x90, 0x8B, 0x0C, 0xE0, ++0x04, 0xF0, 0x53, 0x25, 0xEF, 0x90, 0x8A, 0xCB, 0xE0, 0xFF, 0x90, 0x8B, 0x10, 0xE0, 0x2F, 0xFF, ++0xE4, 0x33, 0xFE, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0xEE, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x40, 0x0D, 0xE5, 0x21, 0xB4, 0x01, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xE0, 0x04, 0xF0, 0x22, 0x12, ++0x4A, 0xFC, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x63, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x24, 0x90, 0x05, 0x22, 0xE0, 0xF5, 0x66, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x9A, 0xBF, 0x01, ++0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, 0x12, 0x45, 0x09, 0x90, 0x05, ++0x22, 0xE5, 0x66, 0xF0, 0x80, 0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, ++0x12, 0x45, 0x09, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x24, ++0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x41, 0x90, 0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x12, 0x45, 0x9E, ++0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x58, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, ++0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x22, 0xE5, 0x22, 0x54, 0x0F, 0xC3, 0x94, 0x04, 0x50, ++0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x22, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, ++0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x5C, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, ++0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x17, 0x14, 0xF0, 0xE5, 0x22, 0x54, 0x0F, ++0xC3, 0x94, 0x0C, 0x50, 0x0D, 0x12, 0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, ++0x7D, 0xC1, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x37, 0xE5, 0x25, 0x54, 0x03, 0x70, ++0x31, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x02, 0x50, 0x28, 0xE5, 0x25, 0x20, 0xE2, 0x23, 0xE5, ++0x25, 0x20, 0xE4, 0x1E, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x18, 0x90, 0x8B, 0x12, 0xE0, 0x70, 0x12, ++0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x04, 0xF0, 0x7F, ++0x01, 0x22, 0x7F, 0x00, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x27, 0x90, 0x8B, 0x18, ++0xE0, 0x70, 0x21, 0x90, 0x8B, 0x17, 0xE0, 0x70, 0x1B, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x04, ++0x50, 0x12, 0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x08, ++0xF0, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x22, 0x90, ++0x8B, 0x19, 0x74, 0x01, 0xF0, 0x80, 0x16, 0xED, 0x70, 0x0A, 0x90, 0x8B, 0x16, 0xE0, 0x90, 0x8B, ++0x19, 0xF0, 0x80, 0x05, 0x90, 0x8B, 0x19, 0xED, 0xF0, 0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x22, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, ++0x9A, 0xEF, 0x70, 0x06, 0x90, 0x01, 0xC8, 0x74, 0xFD, 0xF0, 0x7D, 0x02, 0x7F, 0x03, 0x12, 0x31, ++0x9D, 0x12, 0x7C, 0x50, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x02, 0x22, 0xEF, 0x60, 0x0F, 0x74, 0x21, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, 0x21, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0xBF, 0xF0, 0xEF, 0x60, 0x0A, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0xE4, 0xFF, 0x12, 0x48, 0xB3, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x0C, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x14, 0x90, 0x8A, 0xF8, ++0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x5F, 0xFD, 0x8E, 0x69, 0x8F, 0x6A, 0x90, 0x04, 0x1F, 0x74, 0x20, ++0xF0, 0x22, 0x90, 0x8B, 0x52, 0xEF, 0xF0, 0x12, 0x7D, 0x42, 0x90, 0x8B, 0x52, 0xE0, 0x60, 0x05, ++0x90, 0x05, 0x22, 0xE4, 0xF0, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x04, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x44, 0x40, 0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0x7F, 0x01, 0x12, 0x48, 0xB3, 0x53, 0x22, 0xF0, ++0x43, 0x22, 0x04, 0x22, 0xE5, 0x23, 0x30, 0xE6, 0x12, 0xE5, 0x23, 0x54, 0x0F, 0xFF, 0x90, 0x01, ++0x2F, 0xE0, 0x54, 0x80, 0x4F, 0x64, 0x80, 0xF0, 0x53, 0x23, 0xBF, 0x22, 0x90, 0x8B, 0x2C, 0xE0, ++0x30, 0xE0, 0x05, 0xAF, 0x23, 0x02, 0x7E, 0x06, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x22, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x01, 0x12, 0x4B, 0x5A, 0x12, 0x4B, 0x5B, 0x53, 0x22, 0xF0, 0x43, ++0x22, 0x02, 0x22, 0x41, 0x8A, 0xF6, 0x00, 0x41, 0x8B, 0x05, 0x00, 0x41, 0x8B, 0x51, 0x00, 0x41, ++0x8B, 0x53, 0x00, 0x00, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x7F, 0x64, 0x7F, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0xE4, 0x90, 0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0C, 0xF0, 0xF5, 0x25, 0x22, 0x90, ++0x8B, 0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x22, 0x22, 0xF0, 0x90, 0x8B, 0x0F, ++0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x3D, 0xE0, 0xFB, 0xA3, 0xE0, 0xF5, 0x44, 0xE4, 0xF5, 0x45, 0x12, ++0x30, 0x62, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x75, 0x0E, 0x00, 0x90, 0x01, 0xC4, 0x74, 0x87, 0xF0, 0x74, 0x4B, 0xA3, ++0xF0, 0x53, 0x91, 0xDF, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x30, 0xF5, 0x34, 0xA3, 0xE0, 0x55, 0x31, ++0xF5, 0x35, 0xA3, 0xE0, 0x55, 0x32, 0xF5, 0x36, 0xA3, 0xE0, 0x55, 0x33, 0xF5, 0x37, 0xE5, 0x34, ++0x30, 0xE0, 0x51, 0x90, 0x01, 0x3C, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x1F, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x34, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x1D, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x16, 0x90, 0x8B, ++0x2E, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, ++0x70, 0x02, 0xD1, 0x56, 0xE5, 0x34, 0x30, 0xE1, 0x08, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x11, ++0x60, 0xE5, 0x34, 0x30, 0xE2, 0x28, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0x90, 0x06, 0x92, 0xE0, ++0x30, 0xE0, 0x14, 0x90, 0x8B, 0x3D, 0xE4, 0x71, 0x5C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, ++0x06, 0x92, 0x74, 0x01, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x18, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, ++0x30, 0xE3, 0x38, 0x90, 0x01, 0x3C, 0x74, 0x08, 0xF0, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x24, ++0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x5C, 0x7E, 0x01, 0x71, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, ++0x02, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x17, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, 0x30, 0xE4, 0x09, ++0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0, 0x12, 0x51, 0xC9, 0xE5, 0x34, 0x30, 0xE5, 0x06, 0x90, 0x01, ++0x3C, 0x74, 0x20, 0xF0, 0xE5, 0x35, 0x30, 0xE0, 0x10, 0x90, 0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90, ++0x00, 0x83, 0xE0, 0xF5, 0x23, 0x51, 0xE4, 0x51, 0xFC, 0xE5, 0x35, 0x30, 0xE2, 0x06, 0x90, 0x01, ++0x3D, 0x74, 0x04, 0xF0, 0xE5, 0x35, 0x30, 0xE4, 0x1B, 0x90, 0x01, 0x3D, 0x74, 0x10, 0xF0, 0x90, ++0x8B, 0x05, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, ++0xFD, 0xE0, 0x04, 0xF0, 0xE5, 0x36, 0x30, 0xE0, 0x75, 0x90, 0x01, 0x3E, 0x74, 0x01, 0xF0, 0x90, ++0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x36, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, ++0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0xD1, 0x89, 0x90, 0x8B, ++0x2C, 0xE0, 0x30, 0xE0, 0x49, 0x90, 0x8B, 0x30, 0xE4, 0xF0, 0xFF, 0xB1, 0xE0, 0xEF, 0x60, 0x3E, ++0x12, 0x65, 0x5F, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, 0x32, 0xEF, 0xB4, 0x04, 0x02, ++0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, 0x80, 0x14, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x05, 0x7F, ++0x01, 0x12, 0x65, 0x82, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x12, 0x7D, 0xC1, 0xE5, 0x36, ++0x30, 0xE1, 0x47, 0x90, 0x01, 0x3E, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x19, ++0x90, 0x8B, 0x36, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, ++0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x1A, ++0x90, 0x8B, 0x30, 0x74, 0x01, 0xF0, 0x12, 0x7E, 0x2B, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, ++0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, 0x70, 0x02, 0xD1, 0x56, 0x74, 0x87, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x4B, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0xEF, 0x64, 0x01, 0x70, 0x3D, 0x90, 0x8B, 0x35, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, ++0x08, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x34, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, ++0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, ++0x07, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x36, 0xE0, 0x7F, 0x01, 0x60, 0x36, 0x7F, ++0x00, 0x22, 0x90, 0x8B, 0x2F, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x08, 0xE0, 0x60, ++0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2E, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2C, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x30, 0xE0, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x2D, 0xE0, ++0x70, 0x04, 0x7F, 0x05, 0x80, 0x1F, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x01, 0x70, 0x1A, 0x7F, 0x02, ++0x80, 0x13, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x03, 0x80, 0x08, 0x90, 0x8B, 0x2D, ++0xE0, 0x70, 0x05, 0x7F, 0x04, 0x12, 0x65, 0x82, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8B, 0x33, 0xE0, 0x90, 0x8B, 0x55, 0xF0, 0x6F, 0x70, 0x02, 0xE1, 0x55, 0xEF, 0x14, 0x60, ++0x3B, 0x14, 0x60, 0x5F, 0x14, 0x70, 0x02, 0xE1, 0x30, 0x24, 0x03, 0x60, 0x02, 0xE1, 0x55, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x04, 0xF1, 0xC2, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x02, ++0x04, 0xF1, 0xAF, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, 0x04, 0xF1, 0xC6, 0xE1, 0x55, ++0x90, 0x8B, 0x55, 0xE0, 0x64, 0x01, 0x70, 0x7D, 0xF1, 0xB1, 0x80, 0x79, 0x90, 0x8B, 0x55, 0xE0, ++0xFF, 0xB4, 0x03, 0x04, 0xF1, 0xCA, 0x80, 0x6D, 0xEF, 0xB4, 0x02, 0x04, 0xF1, 0xA1, 0x80, 0x65, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0xD5, 0x80, 0x59, 0xEF, 0x70, 0x56, 0xF1, ++0x8E, 0x80, 0x52, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x7C, 0x41, 0x80, 0x46, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x01, 0x04, 0xF1, 0x72, 0x80, 0x3B, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, ++0x05, 0x12, 0x7D, 0x23, 0x80, 0x2F, 0x90, 0x8B, 0x55, 0xE0, 0x70, 0x29, 0xF1, 0x70, 0x80, 0x25, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x01, 0x04, 0xF1, 0x5A, 0x80, 0x19, 0xEF, 0xB4, 0x02, 0x04, ++0xF1, 0x6B, 0x80, 0x11, 0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0x5A, 0x80, 0x05, ++0xEF, 0x70, 0x02, 0xF1, 0x67, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x05, 0x22, 0x74, 0x6F, 0xF0, ++0x90, 0x8B, 0x33, 0x74, 0x03, 0xF0, 0x22, 0xF1, 0x8E, 0x80, 0xEF, 0x12, 0x7D, 0x42, 0x80, 0xEA, ++0xF1, 0x8E, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x9A, 0xEF, 0x70, 0x06, 0x90, 0x01, ++0xC8, 0x74, 0xFD, 0xF0, 0x12, 0x7C, 0x50, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x01, ++0x3E, 0x74, 0x03, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x31, 0xB7, 0x90, 0x8B, 0x33, 0x74, 0x01, 0xF0, ++0x22, 0x12, 0x7D, 0x42, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, 0xF1, ++0xA1, 0x7D, 0x03, 0x7F, 0x02, 0x12, 0x31, 0x49, 0x90, 0x05, 0x27, 0xE4, 0xF0, 0x90, 0x8B, 0x33, ++0xF0, 0x22, 0xF1, 0xCA, 0x80, 0xEB, 0xF1, 0xD5, 0x80, 0xE7, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, ++0x8B, 0x33, 0x04, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, ++0xF1, 0x8E, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0x90, ++0x02, 0x84, 0xEF, 0xF0, 0xA3, 0xEE, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x22, 0xEF, 0x8E, 0xF0, 0x12, ++0x43, 0xBA, 0x50, 0x1A, 0x00, 0x40, 0x50, 0x42, 0x00, 0x80, 0x50, 0x6D, 0x01, 0x00, 0x50, 0x81, ++0x02, 0x00, 0x50, 0x99, 0x04, 0x00, 0x00, 0x00, 0x50, 0xB6, 0xED, 0x54, 0x3F, 0x70, 0x04, 0xFE, ++0xFF, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x40, 0xEF, 0x2D, 0xFF, 0xEE, 0x3C, 0xFE, 0xEF, 0x78, 0x06, ++0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x78, 0x06, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0x80, 0x26, 0xED, 0x54, 0x7F, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x80, 0xEF, ++0x2D, 0xFF, 0xEE, 0x3C, 0xFE, 0xEF, 0x78, 0x07, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x78, ++0x07, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0x80, 0x49, 0xED, 0x70, 0x04, ++0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x01, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x7D, 0x00, 0xFC, 0x80, ++0x35, 0xEC, 0x54, 0x01, 0x4D, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x02, 0x7F, 0x00, 0xEF, ++0x2D, 0xEE, 0x3C, 0xC3, 0x13, 0x7D, 0x00, 0x80, 0x1A, 0xEC, 0x54, 0x03, 0x4D, 0x70, 0x04, 0xFE, ++0xFF, 0x80, 0x04, 0x7E, 0x04, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x13, 0x13, 0x54, 0x3F, 0x7D, ++0x00, 0x25, 0xE0, 0x25, 0xE0, 0xFC, 0xAE, 0x04, 0xAF, 0x05, 0x22, 0x90, 0x01, 0xE4, 0x74, 0x58, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x22, 0xE4, 0x90, 0x8A, 0xCC, 0xF0, 0xA3, 0xF0, 0x75, 0x8E, 0x02, ++0x91, 0x0E, 0x12, 0x68, 0x44, 0x90, 0x8B, 0x07, 0xEF, 0xF0, 0x12, 0x68, 0x51, 0x90, 0x8B, 0x09, ++0xEF, 0xF0, 0x12, 0x68, 0x5D, 0x90, 0x8A, 0xF4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0xF5, 0x55, ++0xF5, 0x21, 0x12, 0x72, 0x55, 0x12, 0x44, 0x9E, 0x12, 0x2E, 0x01, 0x7F, 0x03, 0x12, 0x78, 0x42, ++0x12, 0x7C, 0x3D, 0x12, 0x68, 0x0A, 0x12, 0x68, 0x75, 0x12, 0x68, 0x8A, 0x12, 0x68, 0x28, 0x12, ++0x68, 0x43, 0x90, 0x8A, 0xCE, 0xE5, 0xD9, 0xF0, 0x31, 0x5F, 0xC2, 0xAF, 0x90, 0x00, 0x80, 0xE0, ++0x44, 0x40, 0xF0, 0x51, 0x0E, 0x75, 0xE8, 0x03, 0x43, 0xA8, 0x85, 0xD2, 0xAF, 0x11, 0xBB, 0x90, ++0x8A, 0xCC, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xC6, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x50, 0xA3, 0xF0, ++0xE5, 0x55, 0x30, 0xE4, 0x09, 0xC2, 0xAF, 0x53, 0x55, 0xEF, 0xD2, 0xAF, 0xB1, 0x59, 0xE5, 0x55, ++0x30, 0xE6, 0xDC, 0xC2, 0xAF, 0x53, 0x55, 0xBF, 0xD2, 0xAF, 0x12, 0x6B, 0xBD, 0x80, 0xD0, 0x90, ++0x01, 0x3C, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xF0, 0xA3, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x54, 0x31, 0x88, 0x7D, 0xFF, 0x7F, 0x55, 0x31, 0x88, 0x7D, 0xFF, ++0x7F, 0x56, 0x31, 0x88, 0x7D, 0xFF, 0x7F, 0x57, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, ++0x82, 0x75, 0x83, 0x00, 0xED, 0xF0, 0x51, 0x0E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x30, ++0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x38, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xFD, 0x7F, 0x50, 0x31, 0x88, 0xE4, 0xFD, 0x7F, 0x51, 0x31, 0x88, 0xE4, 0xFD, 0x7F, ++0x52, 0x31, 0x88, 0xE4, 0xFD, 0x7F, 0x53, 0x80, 0xBF, 0xE5, 0x5E, 0x64, 0x01, 0x70, 0x3B, 0x71, ++0x4E, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x71, 0x42, 0x90, 0x00, 0x46, 0xE0, 0x44, 0x04, 0xFD, 0x7F, ++0x46, 0x31, 0x88, 0x90, 0x00, 0x44, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x44, 0x31, 0x88, 0x90, 0x00, ++0x46, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x46, 0x31, 0x88, 0x7F, 0x02, 0x71, 0x6A, 0x8F, 0x62, 0x90, ++0x01, 0xC9, 0xE5, 0x62, 0xF0, 0xB4, 0x01, 0x02, 0x51, 0xE2, 0x22, 0xE0, 0x5F, 0xF0, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x10, 0xDF, 0xFE, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xE0, 0xED, 0xF0, 0x90, 0x8A, 0xDF, 0xEF, 0xF0, 0xD3, ++0x94, 0x07, 0x50, 0x4E, 0xA3, 0xE0, 0x70, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, ++0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x5F, 0xF0, ++0x80, 0x17, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x4F, 0xF0, 0x51, 0x0E, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x46, ++0x80, 0x59, 0x90, 0x8A, 0xDF, 0xE0, 0x24, 0xF8, 0xF0, 0xA3, 0xE0, 0x70, 0x1D, 0x90, 0x8A, 0xDF, ++0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xC4, 0x54, 0xF0, ++0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x80, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xC4, 0x54, 0xF0, 0xFF, 0x90, 0x00, ++0x43, 0xE0, 0x4F, 0xF0, 0x51, 0x0E, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, ++0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0x51, 0x0B, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x90, 0x00, 0x49, 0xE0, 0x90, 0x8B, 0x54, 0xF0, 0xE0, 0x54, 0x0F, 0xF0, 0x44, 0xF0, ++0xFD, 0x7F, 0x49, 0x31, 0x88, 0x90, 0x8B, 0x54, 0xE0, 0x44, 0xB0, 0xFD, 0x7F, 0x49, 0x21, 0x88, ++0x90, 0x8A, 0xDD, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0x5E, 0x01, 0x8E, 0x5F, 0xF5, 0x60, 0xE4, ++0xFD, 0x7F, 0x0B, 0x51, 0x1E, 0xE4, 0xFD, 0x7F, 0x02, 0x51, 0x1E, 0x71, 0x4E, 0xE4, 0xFF, 0x71, ++0x42, 0xE4, 0xF5, 0x62, 0x90, 0x01, 0xC9, 0xE5, 0x62, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0xEC, 0xFB, 0x8D, 0x44, 0xE4, 0xF5, 0x45, 0x7D, 0x01, 0x7F, 0x60, 0x7E, 0x01, 0x02, ++0x30, 0x62, 0x90, 0x01, 0xCA, 0xE5, 0x61, 0xF0, 0xEF, 0x60, 0x02, 0x51, 0xE2, 0x22, 0x7F, 0x0B, ++0x71, 0x6A, 0xEF, 0x65, 0x61, 0x60, 0x10, 0xE5, 0x61, 0xB4, 0x01, 0x05, 0xE4, 0xF5, 0x61, 0x80, ++0x03, 0x75, 0x61, 0x01, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x8B, 0x57, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x43, 0xE0, 0xFF, 0x74, 0x01, 0xA8, ++0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x46, 0x51, 0x0B, 0x90, ++0x8B, 0x57, 0xE0, 0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x00, 0x44, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x5B, 0xA8, 0x05, ++0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0x80, 0x4B, 0x90, 0x8B, ++0x57, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, ++0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x51, 0x0E, 0x90, 0x8B, 0x57, 0xE0, ++0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x5B, 0xA8, 0x05, 0x08, 0x80, 0x06, ++0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0x90, ++0x8B, 0x04, 0xF0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x21, 0x88, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDA, 0x12, 0x43, ++0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFA, 0xE5, 0xF0, 0x24, 0x00, 0xFF, 0xE4, 0x3A, 0xFE, ++0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEE, 0x8F, 0xF0, 0x12, 0x43, 0x19, 0x12, ++0x24, 0x62, 0xFF, 0x60, 0x2C, 0xB5, 0x5E, 0x16, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, ++0x01, 0x12, 0x42, 0xC2, 0x65, 0x60, 0x70, 0x04, 0xE5, 0x5F, 0x65, 0xF0, 0x60, 0x22, 0x90, 0x8A, ++0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFF, 0xAE, 0xF0, 0x71, 0x00, 0x80, ++0x0F, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x24, 0x62, 0x65, 0x5E, 0x60, 0x02, 0x91, 0x95, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF5, 0x5E, 0x7F, 0x60, 0x7E, 0x01, 0x8F, 0x82, 0x8E, 0x83, ++0xA3, 0xA3, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x8B, 0xEF, 0x12, 0x43, 0x94, ++0x54, 0xE7, 0x01, 0x54, 0xDE, 0x02, 0x55, 0x0B, 0x03, 0x55, 0x14, 0x05, 0x55, 0x1D, 0x06, 0x55, ++0x58, 0x07, 0x55, 0x25, 0x08, 0x55, 0x2E, 0x09, 0x55, 0x36, 0x20, 0x55, 0x3F, 0x2C, 0x54, 0xF0, ++0x2D, 0x54, 0xF9, 0x2E, 0x55, 0x02, 0x3B, 0x55, 0x48, 0x4B, 0x00, 0x00, 0x55, 0x51, 0x90, 0x8A, ++0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x85, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x8B, ++0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0xB8, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, ++0x75, 0x00, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x75, 0x39, 0x90, 0x8A, 0xD7, 0x12, 0x43, ++0x6B, 0x02, 0x75, 0x52, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, 0x0F, 0x90, 0x8A, 0xD7, ++0x12, 0x43, 0x6B, 0xC1, 0xA6, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x75, 0x9A, 0x90, 0x8A, ++0xD7, 0x12, 0x43, 0x6B, 0x81, 0x1E, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x78, 0x81, 0x90, ++0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x7A, 0xC2, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x7C, ++0x2B, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFD, 0x70, ++0x02, 0xC1, 0xA1, 0x90, 0x8B, 0x51, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, 0xC1, 0x9A, 0x90, ++0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD0, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD0, ++0xF0, 0x75, 0x1D, 0x01, 0x75, 0x1E, 0x8A, 0x75, 0x1F, 0xD0, 0x75, 0x20, 0x01, 0x7B, 0x01, 0x7A, ++0x8A, 0x79, 0xD1, 0x12, 0x5E, 0xE4, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x13, 0x54, ++0x01, 0x90, 0x8B, 0x51, 0x30, 0xE0, 0x59, 0xE0, 0x75, 0xF0, 0x02, 0x90, 0x00, 0x88, 0x12, 0x43, ++0x5F, 0xE0, 0x90, 0x8A, 0xD2, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x02, 0x90, 0x00, 0x89, ++0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD3, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, ++0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD4, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, ++0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD5, 0xF0, 0x90, 0x8B, 0x51, 0xE0, ++0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD6, 0xF0, 0x80, 0x33, ++0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD2, 0xF0, 0x90, ++0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD3, ++0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, 0x5F, 0xE0, 0x90, ++0x8A, 0xD4, 0xF0, 0xEF, 0x54, 0x7F, 0xFF, 0x7B, 0x01, 0x7A, 0x8A, 0x79, 0xD2, 0x91, 0xA6, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x90, 0x8B, 0x51, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, 0x08, 0x80, 0x02, ++0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0xFF, 0x74, ++0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, 0xF0, 0x90, 0x8B, ++0x51, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0xA1, 0x6A, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x02, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, 0xFF, 0x54, 0x1F, 0xFE, ++0xEF, 0x54, 0x20, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xAF, 0x06, 0x90, 0x8A, 0xDA, 0xEF, 0xF0, 0xA3, ++0xED, 0xF0, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x03, 0x12, ++0x42, 0x20, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x42, ++0x20, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x8A, 0xE0, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, ++0xFF, 0x75, 0xF0, 0x09, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0xAD, 0x82, 0xAC, 0x83, 0x90, 0x8A, ++0xE1, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x75, 0xF0, 0x09, 0xA4, 0x24, 0x23, 0xF9, 0x74, 0x87, ++0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, ++0x00, 0x03, 0x12, 0x42, 0x20, 0x54, 0x0F, 0xFF, 0x90, 0x8A, 0xE3, 0x12, 0x43, 0x6B, 0xEF, 0x12, ++0x42, 0x4D, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x90, ++0x8A, 0xE3, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x90, 0x8A, 0xDC, 0x12, ++0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0xFC, 0xA3, 0xE0, ++0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xEF, 0xF0, 0x12, 0x24, 0x62, 0x8D, 0x82, 0x8C, 0x83, 0xA3, 0xF0, ++0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x24, 0xC1, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, ++0x29, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, 0x12, 0x43, 0x5F, ++0x74, 0x01, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2B, 0x12, ++0x43, 0x5F, 0xEE, 0xF0, 0x8F, 0x0F, 0xEF, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, ++0xAF, 0x82, 0xF5, 0x10, 0x8F, 0x11, 0xE5, 0x0F, 0x75, 0xF0, 0x02, 0xA4, 0x24, 0x81, 0xF9, 0x74, ++0x86, 0x35, 0xF0, 0x75, 0x12, 0x01, 0xF5, 0x13, 0x89, 0x14, 0x75, 0xF0, 0x09, 0xE5, 0x0F, 0x90, ++0x87, 0x25, 0x12, 0x43, 0x5F, 0xAF, 0x82, 0x85, 0x83, 0x15, 0x8F, 0x16, 0xE5, 0x0F, 0x75, 0xF0, ++0x09, 0xA4, 0x24, 0x23, 0xF9, 0x74, 0x87, 0x35, 0xF0, 0x75, 0x17, 0x01, 0xF5, 0x18, 0x89, 0x19, ++0x74, 0xC1, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x12, 0x43, 0x94, 0x58, ++0x34, 0x00, 0x58, 0x49, 0x01, 0x58, 0x5E, 0x02, 0x58, 0x73, 0x03, 0x58, 0x9C, 0x04, 0x58, 0xB1, ++0x05, 0x58, 0xC6, 0x06, 0x58, 0xEC, 0x0C, 0x59, 0x19, 0x0D, 0x59, 0x46, 0x0E, 0x59, 0x73, 0x0F, ++0x00, 0x00, 0x59, 0xA7, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x15, 0x80, 0x3C, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x10, 0x80, 0x27, 0xE5, 0x0F, ++0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, ++0x05, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0x74, 0xF0, 0xF0, 0xA3, 0xE4, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0x8F, 0xF0, 0x21, 0xA7, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xF5, 0x80, ++0x27, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0x0F, ++0xF0, 0xA3, 0x74, 0xF0, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0x74, 0x0D, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, ++0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x21, 0xA7, 0x90, 0x04, 0x47, 0xE0, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x46, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x45, 0xE0, 0x85, 0x11, 0x82, ++0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x44, 0x21, 0x9E, 0x90, 0x04, 0x4B, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x4A, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x49, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, ++0xF0, 0x90, 0x04, 0x48, 0x80, 0x58, 0x90, 0x04, 0x4F, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x12, 0x42, 0x4D, 0x90, 0x04, 0x4E, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, ++0x12, 0x42, 0x5F, 0x90, 0x04, 0x4D, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, ++0x4C, 0x80, 0x2B, 0x90, 0x04, 0x53, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, ++0x90, 0x04, 0x52, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, ++0x90, 0x04, 0x51, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x50, 0xE0, 0x85, ++0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0xC0, 0x03, 0xC0, ++0x02, 0xC0, 0x01, 0x12, 0x24, 0x62, 0xFF, 0xAB, 0x17, 0xAA, 0x18, 0xA9, 0x19, 0x12, 0x24, 0x62, ++0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x42, 0x4D, 0xAB, 0x12, 0xE5, 0x14, 0x24, 0x01, ++0xF9, 0xE4, 0x35, 0x13, 0xFA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x24, 0x62, 0xFF, 0xAB, ++0x17, 0xAA, 0x18, 0xA9, 0x19, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x5F, 0xD0, 0x01, 0xD0, 0x02, ++0xD0, 0x03, 0x12, 0x42, 0x4D, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xC0, 0x83, 0xC0, 0x82, 0xE0, ++0xFF, 0x85, 0x16, 0x82, 0x85, 0x15, 0x83, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, ++0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, 0x85, 0x16, 0x82, ++0x85, 0x15, 0x83, 0xA3, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, 0xE5, 0x0F, 0x25, ++0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, ++0x4B, 0x90, 0x8A, 0xE6, 0x74, 0x0B, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x00, 0x50, ++0x02, 0x41, 0xEC, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, ++0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x0A, 0x90, 0x8A, 0xE6, 0xE0, 0x24, 0x10, ++0xA3, 0xF0, 0x80, 0x68, 0x90, 0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBB, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x47, ++0x90, 0x8A, 0xE6, 0x74, 0x0F, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x00, 0x40, 0x3C, ++0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x5E, ++0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x08, 0x90, 0x8A, 0xE6, 0xE0, 0xA3, 0xF0, 0x80, 0x0D, 0x90, ++0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBF, 0xE4, 0x90, 0x8A, 0xE7, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x46, ++0xE4, 0x90, 0x8A, 0xE6, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x40, 0x02, 0x61, ++0xA5, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, ++0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x06, 0x90, 0x8A, 0xE6, 0xE0, 0x80, 0x63, 0x90, 0x8A, ++0xE6, 0xE0, 0x04, 0xF0, 0x80, 0xBF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x46, 0xE4, 0x90, 0x8A, 0xE6, 0xF0, 0x90, ++0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x0C, 0x50, 0x3C, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, ++0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, ++0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x08, ++0x90, 0x8A, 0xE6, 0xE0, 0x24, 0x10, 0x80, 0x09, 0x90, 0x8A, 0xE6, 0xE0, 0x04, 0xF0, 0x80, 0xBF, ++0xE4, 0x90, 0x8A, 0xE8, 0xF0, 0x90, 0x8A, 0xE7, 0xE0, 0xFF, 0x75, 0xF0, 0x09, 0xE5, 0x0F, 0x90, ++0x87, 0x27, 0x12, 0x43, 0x5F, 0xEF, 0xF0, 0x90, 0x8A, 0xE8, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xE5, ++0x0F, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xE5, 0x0F, 0xC3, 0x94, 0x20, 0x50, 0x32, ++0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xD3, 0x9F, 0x40, 0x02, ++0x80, 0x18, 0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xC3, 0x9E, ++0x50, 0x08, 0x90, 0x8A, 0xE8, 0xE0, 0xA3, 0xF0, 0x80, 0x08, 0x90, 0x8A, 0xE7, 0xE0, 0x90, 0x8A, ++0xE9, 0xF0, 0x90, 0x8A, 0xE9, 0xE0, 0xFD, 0xAF, 0x0F, 0x91, 0x4E, 0x90, 0x8A, 0xE9, 0xE0, 0xFF, ++0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x8A, 0xE7, ++0xE0, 0xFF, 0xD3, 0x94, 0x13, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x03, 0xF0, 0x22, 0xEF, 0xD3, ++0x94, 0x0B, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x02, 0xF0, 0x22, 0xEF, 0xD3, 0x94, 0x03, 0x40, ++0x07, 0x90, 0x87, 0x22, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0x87, 0x22, 0xF0, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xED, ++0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAC, 0x07, 0xED, 0x54, 0x1F, 0x90, 0x8A, 0xC7, 0xF0, 0x74, ++0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, ++0xC8, 0x74, 0x01, 0xF0, 0xEB, 0xC3, 0x94, 0x01, 0x40, 0x02, 0x80, 0x37, 0x90, 0x8A, 0xC5, 0xE0, ++0x25, 0x0D, 0xFF, 0xA3, 0xF0, 0xA3, 0xE0, 0x90, 0x41, 0x9E, 0x93, 0xFE, 0xEF, 0xD3, 0x9E, 0x40, ++0x10, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xAF, 0x04, 0x80, ++0x9D, 0x90, 0x8A, 0xC6, 0xE0, 0xFF, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEF, 0xF0, 0x22, 0xAD, 0x07, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, ++0xFF, 0x90, 0x8A, 0xCA, 0xF0, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, ++0x54, 0x1F, 0x90, 0x8A, 0xC9, 0xF0, 0xD3, 0x9F, 0x40, 0x06, 0xA3, 0xE0, 0x90, 0x8A, 0xC9, 0xF0, ++0x90, 0x8A, 0xC9, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, ++0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, ++0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xC9, 0xE0, 0xFD, 0x91, 0x4E, 0x90, 0x8A, 0xC9, 0xE0, 0xFF, ++0x22, 0xAC, 0x07, 0x74, 0x84, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x7F, ++0x90, 0x8A, 0xDE, 0xF0, 0xE0, 0x54, 0x1F, 0xFF, 0x90, 0x8A, 0xE1, 0xF0, 0x75, 0xF0, 0x09, 0xEC, ++0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xE3, 0xF0, 0x75, 0xF0, 0x09, 0xEC, 0x90, ++0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0x90, 0x8A, 0xE4, 0xF0, 0xEC, 0x25, 0xE0, 0x24, 0xE4, ++0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE5, 0xCB, 0xF0, ++0xA3, 0xEB, 0xF0, 0xEC, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, ++0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE7, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xEF, 0xD3, 0x9E, 0x40, 0x0C, ++0x90, 0x8A, 0xE4, 0xE0, 0x90, 0x8A, 0xE1, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0xED, 0x70, 0x02, 0xC1, ++0x93, 0x90, 0x8A, 0xE2, 0xED, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0x30, 0xE6, 0x0E, 0x90, 0x8A, 0xE1, ++0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0x14, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0x70, ++0x02, 0xC1, 0x93, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0xD3, 0x94, 0x00, 0x50, 0x02, 0xC1, 0x93, 0xE4, ++0x90, 0x8A, 0xE0, 0xF0, 0xEF, 0x14, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xE3, 0xE0, 0xFD, 0x90, ++0x8A, 0xDF, 0xE0, 0xFF, 0xD3, 0x9D, 0x40, 0x6F, 0xEF, 0x94, 0x10, 0x40, 0x21, 0xEF, 0x24, 0xF0, ++0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x8A, 0xE7, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x70, 0x27, 0x90, 0x8A, ++0xDF, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x37, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE5, 0xE0, 0x5E, 0xFE, 0xA3, ++0xE0, 0x5F, 0x4E, 0x60, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, 0x6F, 0x60, 0x08, 0x90, ++0x8A, 0xDF, 0xE0, 0x14, 0xF0, 0x80, 0x83, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, ++0xC3, 0x9F, 0x50, 0x0F, 0x90, 0x8A, 0xDF, 0xE0, 0xB5, 0x05, 0x08, 0x90, 0x8A, 0xE3, 0xE0, 0x90, ++0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, ++0xFE, 0xEF, 0x13, 0xFF, 0xEC, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x90, 0x8A, 0xDE, 0xE0, 0xFD, 0x91, 0x4E, 0x90, 0x8A, ++0xDE, 0xE0, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x1A, 0x8A, 0x1B, 0x89, ++0x1C, 0x90, 0x8B, 0x3F, 0x12, 0x43, 0x8B, 0xAB, 0x1D, 0xAA, 0x1E, 0xA9, 0x1F, 0x90, 0x8B, 0x42, ++0x12, 0x43, 0x8B, 0xAF, 0x20, 0x15, 0x20, 0xEF, 0x60, 0x1E, 0x90, 0x8B, 0x42, 0xE4, 0x75, 0xF0, ++0x01, 0x12, 0x43, 0x74, 0x12, 0x24, 0x62, 0xFF, 0x90, 0x8B, 0x3F, 0xE4, 0x75, 0xF0, 0x01, 0x12, ++0x43, 0x74, 0xEF, 0x12, 0x42, 0x4D, 0x80, 0xDB, 0xAB, 0x1A, 0xAA, 0x1B, 0xA9, 0x1C, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x8B, ++0x90, 0x8B, 0x53, 0xE0, 0xFF, 0x04, 0xF0, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x7F, 0xAF, ++0x7E, 0x01, 0x12, 0x74, 0x3B, 0xEF, 0x60, 0x47, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x6B, 0x8B, 0x1D, ++0x8A, 0x1E, 0x89, 0x1F, 0x75, 0x20, 0x02, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0xD1, 0xE4, 0x90, ++0x8B, 0x48, 0x12, 0x43, 0x6B, 0x8B, 0x1D, 0x8A, 0x1E, 0x89, 0x1F, 0x90, 0x8B, 0x45, 0x12, 0x43, ++0x6B, 0x12, 0x24, 0x62, 0xFF, 0xC4, 0x54, 0x0F, 0xF5, 0x20, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA2, ++0xD1, 0xE4, 0x90, 0x01, 0xAF, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, ++0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8A, 0xC5, 0xE0, 0x54, 0xF0, 0x44, 0x03, 0xF0, 0x54, 0x0F, 0x44, ++0x80, 0xF0, 0x7B, 0x00, 0x7A, 0x00, 0x79, 0x56, 0x90, 0x8B, 0x48, 0x12, 0x43, 0x8B, 0x0B, 0x7A, ++0x8A, 0x79, 0xC5, 0xE1, 0x33, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0xC4, 0x74, ++0xC5, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1A, 0x90, 0x05, 0x22, 0xE0, ++0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x01, 0xC7, 0xE0, 0x30, ++0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFB, 0xFA, 0xEF, 0x30, 0xE0, 0x02, 0x7B, 0x80, 0xEF, 0xC3, 0x13, ++0x90, 0xFD, 0x10, 0xF0, 0x90, 0x04, 0x25, 0xEF, 0xF0, 0xED, 0x60, 0x1E, 0xAF, 0x03, 0x74, 0x0F, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x10, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x03, 0x74, 0x08, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0x21, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, ++0xE0, 0x54, 0xF7, 0xF0, 0xAE, 0x02, 0xAF, 0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x5F, 0xC5, ++0xBF, 0x01, 0x10, 0x90, 0x02, 0x09, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xFD, 0x90, 0x04, 0x1F, ++0x74, 0x20, 0xF0, 0x22, 0x90, 0x01, 0x02, 0xE0, 0x54, 0x03, 0xFF, 0xE0, 0x54, 0x0C, 0x13, 0x13, ++0x54, 0x3F, 0xFE, 0xEF, 0x64, 0x01, 0x60, 0x04, 0xEF, 0xB4, 0x03, 0x0E, 0x90, 0x8A, 0xC5, 0x74, ++0x01, 0xF0, 0xA3, 0x74, 0x37, 0xF0, 0x79, 0x01, 0x80, 0x18, 0xEE, 0x64, 0x01, 0x60, 0x07, 0xAF, ++0x06, 0xEE, 0x64, 0x03, 0x70, 0x3B, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x3D, 0xF0, ++0x79, 0x40, 0x90, 0x8A, 0xC5, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x59, ++0x60, 0x08, 0xE9, 0xF0, 0xE4, 0x90, 0x8A, 0xF6, 0xF0, 0x22, 0x90, 0x8A, 0xF6, 0xE0, 0x04, 0xF0, ++0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x0B, 0xE4, 0xF0, 0x90, 0x04, 0x19, 0xE0, 0x30, 0xE0, 0x02, 0x11, ++0x6D, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, ++0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, ++0x01, 0xC4, 0x74, 0xF2, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x28, 0xF5, ++0x2C, 0xA3, 0xE0, 0x55, 0x29, 0xF5, 0x2D, 0xA3, 0xE0, 0x55, 0x2A, 0xF5, 0x2E, 0xA3, 0xE0, 0x55, ++0x2B, 0xF5, 0x2F, 0xE5, 0x2C, 0x20, 0xE0, 0x02, 0x41, 0x89, 0x90, 0x01, 0x34, 0x74, 0x01, 0xF0, ++0x85, 0xD1, 0x4D, 0x85, 0xD2, 0x4E, 0x85, 0xD3, 0x4F, 0x85, 0xD4, 0x50, 0x85, 0xD5, 0x51, 0x85, ++0xD6, 0x52, 0x85, 0xD7, 0x53, 0x85, 0xD9, 0x54, 0xE5, 0x54, 0x54, 0x40, 0xC3, 0x13, 0xFF, 0xE5, ++0x53, 0x54, 0x20, 0x6F, 0x70, 0x02, 0x41, 0x46, 0xE5, 0x54, 0x30, 0xE5, 0x02, 0x41, 0x46, 0xE5, ++0x52, 0x54, 0x1F, 0xF5, 0x08, 0xE5, 0x4D, 0x54, 0x3F, 0xF5, 0x09, 0xE5, 0x51, 0x54, 0x1F, 0xFF, ++0xE5, 0x08, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, ++0x12, 0x42, 0x81, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, ++0xE4, 0x34, 0x85, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x09, 0xD3, 0x94, 0x04, ++0x40, 0x03, 0x75, 0x09, 0x04, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, 0x43, 0x5F, ++0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE5, 0x53, 0x54, ++0x1F, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, 0x43, ++0x5F, 0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, 0x54, ++0x20, 0xE6, 0x24, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, ++0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x4F, 0x30, 0xE7, 0x36, ++0xAF, 0x08, 0x12, 0x5C, 0xC3, 0x80, 0x2F, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, ++0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, ++0x4F, 0x30, 0xE7, 0x12, 0xE5, 0x4F, 0x54, 0x7F, 0xFD, 0xE5, 0x53, 0x54, 0x1F, 0xF5, 0x0D, 0xAB, ++0x09, 0xAF, 0x08, 0x12, 0x5C, 0x66, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x3A, 0x90, ++0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, ++0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x21, 0x90, 0x8B, 0x3D, 0x12, 0x4B, 0x5C, 0x90, 0x01, ++0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x80, 0x09, ++0x12, 0x4B, 0x34, 0xBF, 0x01, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2C, 0x30, 0xE1, 0x21, 0x90, 0x01, ++0x34, 0x74, 0x02, 0xF0, 0x85, 0xD1, 0x56, 0x85, 0xD2, 0x57, 0x85, 0xD3, 0x58, 0x85, 0xD4, 0x59, ++0x85, 0xD5, 0x5A, 0x85, 0xD6, 0x5B, 0x85, 0xD7, 0x5C, 0x85, 0xD9, 0x5D, 0x12, 0x5F, 0xA4, 0xE5, ++0x2C, 0x30, 0xE3, 0x06, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xE5, 0x2C, 0x30, 0xE4, 0x09, 0x90, ++0x01, 0x34, 0x74, 0x10, 0xF0, 0x43, 0x55, 0x10, 0xE5, 0x2C, 0x30, 0xE5, 0x26, 0x90, 0x01, 0xCF, ++0xE0, 0x30, 0xE5, 0x1F, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0x75, 0xA8, ++0x00, 0x75, 0xE8, 0x00, 0x12, 0x51, 0x9D, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x12, 0x52, ++0x0E, 0x80, 0xFE, 0xE5, 0x2C, 0x30, 0xE6, 0x2D, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0x90, 0x8B, ++0x32, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x90, 0x8B, 0x34, 0xE4, ++0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, ++0x90, 0x8B, 0x2E, 0xE4, 0xF0, 0xE5, 0x2E, 0x20, 0xE0, 0x02, 0x61, 0xE6, 0x90, 0x8B, 0x08, 0x74, ++0x01, 0xF0, 0x90, 0x01, 0x36, 0xF0, 0x90, 0x8B, 0x06, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, ++0x53, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, ++0xE0, 0x2F, 0x90, 0x8B, 0x37, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, ++0x3F, 0x30, 0xE0, 0x1D, 0x90, 0x8B, 0x34, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0D, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x7F, 0x04, 0x12, 0x4E, ++0x89, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x55, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x4E, ++0x90, 0x8B, 0x2E, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x3E, ++0xB1, 0x5F, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, ++0x2D, 0xEF, 0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, ++0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x02, 0x04, 0x7F, 0x01, 0xB1, 0x82, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x43, ++0xE7, 0x90, 0x8B, 0x08, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE1, 0x2F, 0x90, 0x01, 0x36, 0x74, 0x02, ++0xF0, 0x43, 0x55, 0x40, 0x11, 0x84, 0x90, 0x8B, 0x37, 0xE0, 0xB4, 0x01, 0x09, 0x90, 0x05, 0x22, ++0xE4, 0xF0, 0x90, 0x8B, 0x37, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x0D, 0xE4, 0xFF, 0x12, ++0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE2, 0x16, 0x90, ++0x01, 0x36, 0x74, 0x04, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x06, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x03, 0x12, 0x46, 0xB3, 0xE5, 0x2E, 0x30, 0xE3, 0x38, 0x90, 0x01, 0x36, 0x74, 0x08, 0xF0, ++0xE5, 0x21, 0x64, 0x01, 0x70, 0x2C, 0xE5, 0x24, 0x60, 0x28, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, ++0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, 0x8B, ++0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, ++0x05, 0xF0, 0xE5, 0x2E, 0x30, 0xE4, 0x2B, 0x90, 0x01, 0x36, 0x74, 0x10, 0xF0, 0xE5, 0x21, 0xB4, ++0x01, 0x20, 0xE5, 0x24, 0x60, 0x1C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, ++0xF0, 0x90, 0x8B, 0x1B, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x03, 0x12, ++0x4A, 0xFC, 0xE5, 0x2E, 0x30, 0xE5, 0x1F, 0x90, 0x01, 0x36, 0x74, 0x20, 0xF0, 0xE5, 0x21, 0xB4, ++0x01, 0x14, 0xE5, 0x24, 0x60, 0x10, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, 0x4A, ++0x97, 0x80, 0x03, 0x12, 0x49, 0x49, 0xE5, 0x2E, 0x30, 0xE6, 0x1B, 0x90, 0x01, 0x36, 0x74, 0x40, ++0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x10, 0xE5, 0x24, 0x60, 0x0C, 0x53, 0x25, 0xFE, 0xE5, 0x25, 0x54, ++0x07, 0x70, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2F, 0x30, 0xE1, 0x28, 0x90, 0x01, 0x37, 0x74, 0x02, ++0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x18, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x08, ++0x12, 0x48, 0xFE, 0x12, 0x7D, 0xC1, 0x80, 0x0B, 0x90, 0x8B, 0x31, 0x74, 0x01, 0xF0, 0x80, 0x03, ++0x12, 0x48, 0xFE, 0x74, 0xF2, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x05, ++0x58, 0xE0, 0xFF, 0x90, 0x8B, 0x38, 0xE0, 0x2F, 0x24, 0xFE, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, ++0xFD, 0x7F, 0x50, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x53, 0x74, 0x05, 0xF0, 0x22, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0A, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x04, 0x7F, 0x06, 0xB1, 0x82, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x03, 0x12, 0x78, ++0x35, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0x6F, 0x70, ++0x02, 0xE1, 0x4E, 0xEF, 0x12, 0x43, 0x94, 0x65, 0xB0, 0x00, 0x65, 0xEA, 0x01, 0x66, 0x30, 0x02, ++0x66, 0x6A, 0x03, 0x66, 0xA2, 0x04, 0x66, 0xDB, 0x05, 0x67, 0x16, 0x06, 0x00, 0x00, 0x67, 0x4E, ++0xEE, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, 0x81, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0xB4, ++0x05, 0x04, 0xF1, 0x5D, 0xE1, 0x4E, 0xEF, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0x80, 0x16, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xA4, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, ++0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, ++0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, ++0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0xE1, 0x4E, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, ++0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x02, 0x60, 0x02, 0xE1, 0x4E, 0xF1, 0x67, 0xE1, 0x4E, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0x80, 0x16, ++0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xF1, 0x72, 0x80, 0x08, 0xEE, 0xB4, ++0x03, 0x04, 0x7F, 0x01, 0xF1, 0x53, 0xF1, 0xD0, 0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, ++0x06, 0x7F, 0x01, 0xF1, 0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, ++0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xF1, 0x9A, 0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, ++0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x06, 0xEE, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xB9, ++0xE1, 0x4E, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x13, ++0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, 0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, ++0x02, 0xF1, 0x67, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0xF1, 0xA4, 0x80, 0x09, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0xF1, 0xAF, 0x80, 0x73, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, ++0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xF1, 0x72, 0x80, 0x13, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xF1, ++0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0x90, 0x8B, 0x2D, 0xE0, ++0xB4, 0x01, 0x04, 0xF1, 0xA4, 0x80, 0x0B, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x04, 0x7F, 0x01, ++0xF1, 0x81, 0xF1, 0xC3, 0x80, 0x38, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xF1, ++0x81, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xF1, 0x5D, 0x90, 0x8B, 0x2D, 0xE0, ++0x70, 0x04, 0xF1, 0x9A, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0xE4, 0xFF, 0xF1, ++0x53, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xF1, 0x67, 0xF1, 0xDD, 0xD0, 0xD0, ++0x92, 0xAF, 0x22, 0x12, 0x4A, 0xB2, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x04, ++0xF0, 0x22, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, ++0x22, 0x90, 0x8B, 0x56, 0xEF, 0xF0, 0x12, 0x7D, 0x42, 0x90, 0x8B, 0x56, 0xE0, 0x60, 0x05, 0x90, ++0x05, 0x22, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, 0x4A, 0xCC, 0x90, 0x8B, 0x2D, ++0x74, 0x01, 0xF0, 0x22, 0x7F, 0x01, 0x12, 0x4A, 0x7C, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, ++0x7C, 0x4A, 0x90, 0x8B, 0x2D, 0x74, 0x04, 0xF0, 0x22, 0x12, 0x4A, 0x32, 0x90, 0x8B, 0x2D, 0x74, ++0x03, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x05, 0xF0, 0x22, ++0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0x74, 0x6F, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x06, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0xE4, 0xFD, 0xFC, 0xEF, 0x30, 0xE0, 0x02, 0x7D, 0x80, 0xEF, 0xC3, 0x13, 0x90, 0xFD, 0x10, ++0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x75, 0x28, 0x33, 0xE4, 0xF5, 0x29, ++0x75, 0x2A, 0x07, 0xF5, 0x2B, 0x90, 0x01, 0x30, 0xE5, 0x28, 0xF0, 0xA3, 0xE5, 0x29, 0xF0, 0xA3, ++0xE5, 0x2A, 0xF0, 0xA3, 0xE5, 0x2B, 0xF0, 0x22, 0x75, 0x30, 0x1F, 0x75, 0x31, 0x01, 0x43, 0x31, ++0x10, 0xE4, 0xF5, 0x32, 0x90, 0x01, 0x38, 0xE5, 0x30, 0xF0, 0xA3, 0xE5, 0x31, 0xF0, 0xA3, 0xE5, ++0x32, 0xF0, 0x22, 0x22, 0x90, 0x00, 0x02, 0xE0, 0x54, 0xE0, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, ++0x22, 0x90, 0x00, 0xF3, 0xE0, 0x7F, 0x00, 0x30, 0xE3, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x09, ++0xE0, 0xB4, 0x01, 0x0C, 0x90, 0x00, 0xF2, 0xE0, 0x30, 0xE7, 0x05, 0x7E, 0xFD, 0x7F, 0x33, 0x22, ++0x7E, 0xFD, 0x7F, 0x2F, 0x22, 0x90, 0x00, 0xF3, 0xE0, 0x30, 0xE2, 0x0D, 0x90, 0x05, 0x41, 0x74, ++0x10, 0xF0, 0x90, 0x05, 0x5A, 0xF0, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x64, 0x74, 0xA0, 0xF0, ++0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x06, ++0xC0, 0x07, 0x7D, 0x91, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0x74, 0x68, 0xFF, 0xA3, 0xF0, 0x53, 0x91, ++0xEF, 0x90, 0x00, 0x51, 0xE0, 0xFE, 0x90, 0x00, 0x55, 0xE0, 0x5E, 0xF5, 0x3D, 0x90, 0x00, 0x52, ++0xE0, 0xFE, 0x90, 0x00, 0x56, 0xE0, 0x5E, 0xF5, 0x3E, 0xE5, 0x3D, 0x30, 0xE4, 0x06, 0x90, 0x00, ++0x55, 0x74, 0x10, 0xF0, 0xE5, 0x3D, 0x30, 0xE5, 0x06, 0x90, 0x00, 0x55, 0x74, 0x20, 0xF0, 0xE5, ++0x3D, 0x30, 0xE6, 0x06, 0x90, 0x00, 0x55, 0x74, 0x40, 0xF0, 0xE5, 0x3D, 0x30, 0xE7, 0x06, 0x90, ++0x00, 0x55, 0x74, 0x80, 0xF0, 0xE5, 0x3E, 0x30, 0xE0, 0x06, 0x90, 0x00, 0x56, 0x74, 0x01, 0xF0, ++0xE5, 0x3E, 0x30, 0xE1, 0x06, 0x90, 0x00, 0x56, 0x74, 0x02, 0xF0, 0xE5, 0x3E, 0x30, 0xE2, 0x06, ++0x90, 0x00, 0x56, 0x74, 0x04, 0xF0, 0xE5, 0x3E, 0x30, 0xE3, 0x06, 0x90, 0x00, 0x56, 0x74, 0x08, ++0xF0, 0x90, 0x01, 0xC4, 0xED, 0xF0, 0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, ++0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xE0, 0x32, 0xEF, 0xC3, 0x94, 0x20, 0x50, 0x39, 0xEF, 0x30, ++0xE0, 0x17, 0xED, 0xC4, 0x54, 0xF0, 0xFD, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x0F, 0x80, 0x10, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, ++0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0xA4, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x4D, 0xF0, 0x22, 0xAD, 0x07, 0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0x90, 0x8A, 0xDE, 0xF0, 0xE0, 0xF9, 0x54, 0x1F, 0xA3, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0xFF, 0x90, 0x8A, 0xE1, ++0xF0, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, ++0xE0, 0x90, 0x8A, 0xE2, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE4, 0xCB, 0xF0, 0xA3, 0xEB, ++0xF0, 0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, ++0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, ++0x34, 0x86, 0xF5, 0x83, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xEE, 0xC3, 0x9F, 0x40, 0x02, 0x41, 0xB9, ++0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, ++0xF0, 0xEF, 0x04, 0x90, 0x8A, 0xE0, 0xF0, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, ++0xFE, 0xD3, 0x9F, 0x40, 0x02, 0x41, 0xF3, 0xEE, 0xC3, 0x94, 0x10, 0x40, 0x21, 0xEE, 0x24, 0xF0, ++0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, ++0xF9, 0xFF, 0x90, 0x8A, 0xE2, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x70, 0x27, 0x90, 0x8A, ++0xE0, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x59, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, ++0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE4, 0xE0, 0x5E, 0xFE, 0xA3, ++0xE0, 0x5F, 0x4E, 0x60, 0x3C, 0x90, 0x8A, 0xE0, 0xE0, 0xB4, 0x11, 0x0D, 0x90, 0x8A, 0xE3, 0xE0, ++0x30, 0xE7, 0x06, 0x90, 0x8A, 0xE0, 0x74, 0x17, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFF, 0x64, 0x13, ++0x60, 0x04, 0xEF, 0xB4, 0x12, 0x0D, 0x90, 0x8A, 0xE2, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE0, ++0x74, 0x18, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0x80, ++0x42, 0x90, 0x8A, 0xE0, 0xE0, 0x04, 0xF0, 0x41, 0x17, 0x90, 0x8A, 0xE1, 0xE0, 0xFC, 0x90, 0x8A, ++0xDF, 0xE0, 0xFF, 0x6C, 0x70, 0x71, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, ++0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x29, 0x12, 0x43, 0x5F, 0xE0, 0xB4, 0x01, 0x10, ++0xE9, 0x20, 0xE6, 0x0C, 0x90, 0x8A, 0xDF, 0xE0, 0x44, 0x40, 0x90, 0x8A, 0xDE, 0xF0, 0x80, 0x03, ++0xAF, 0x01, 0x22, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, ++0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x66, 0x90, 0x8A, 0xDF, 0xE0, 0xD3, 0x9C, 0x40, 0x5E, 0x90, ++0x8A, 0xE1, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, ++0x90, 0x8A, 0xDF, 0xEF, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0xFC, 0xA3, 0xE0, 0xFF, 0x25, 0xE0, 0x24, ++0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, ++0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, ++0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, ++0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x22, 0x74, 0x01, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xDE, 0xE0, 0x44, ++0x80, 0xFD, 0x12, 0x5C, 0x4E, 0x90, 0x8A, 0xDE, 0xE0, 0x44, 0x80, 0xFF, 0x22, 0xE4, 0x90, 0x8A, ++0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, 0x03, 0x02, 0x72, 0x54, 0x75, ++0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, 0x12, 0x43, 0x5F, 0xE0, 0x64, 0x01, 0x60, 0x03, 0x02, 0x72, ++0x4B, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, ++0xE0, 0xFC, 0xA3, 0xE0, 0xD3, 0x94, 0x00, 0xEC, 0x94, 0x00, 0x50, 0x03, 0x02, 0x72, 0x4B, 0xEF, ++0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x00, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0x75, 0x12, 0x01, 0xF5, 0x13, ++0x89, 0x14, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, ++0x83, 0xE0, 0xFD, 0xA3, 0xE0, 0x90, 0x8A, 0xD4, 0xCD, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x25, 0xE0, ++0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xD6, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, ++0x04, 0xF5, 0x83, 0xE0, 0x54, 0x3F, 0x90, 0x8A, 0xD0, 0xF0, 0xE0, 0xFD, 0x54, 0x1F, 0xA3, 0xF0, ++0x75, 0xF0, 0x09, 0xEE, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD9, 0xF0, 0x90, ++0x8A, 0xCF, 0xE0, 0xFB, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xC3, 0x94, ++0x05, 0x40, 0x02, 0xC1, 0x9C, 0x90, 0x8A, 0xD9, 0xE0, 0xFE, 0x90, 0x8A, 0xD1, 0xE0, 0x9E, 0x40, ++0x13, 0x90, 0x8A, 0xD9, 0xE0, 0x90, 0x8A, 0xD1, 0xF0, 0xED, 0x54, 0x40, 0xFD, 0x90, 0x8A, 0xD0, ++0xF0, 0xEE, 0x4D, 0xF0, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0x90, 0x41, 0x12, 0x93, 0xFE, 0x74, 0x23, ++0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xC3, 0x9E, 0x40, 0x06, 0xEF, 0x90, 0x40, ++0xDA, 0x80, 0x07, 0x90, 0x8A, 0xD1, 0xE0, 0x90, 0x40, 0xF6, 0x93, 0x90, 0x8A, 0xD8, 0xF0, 0x90, ++0x8A, 0xD8, 0xE0, 0x75, 0xF0, 0x06, 0xA4, 0x24, 0x50, 0xF9, 0x74, 0x40, 0x35, 0xF0, 0x75, 0x0F, ++0xFF, 0xF5, 0x10, 0x89, 0x11, 0x90, 0x8A, 0xD0, 0xE0, 0x90, 0x41, 0xBA, 0x93, 0xFF, 0xD3, 0x90, ++0x8A, 0xD7, 0xE0, 0x9F, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x0D, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0xE4, 0xFD, 0x12, 0x5D, 0x41, 0x02, 0x71, 0xE1, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, ++0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xD2, 0xCF, ++0xF0, 0xA3, 0xEF, 0xF0, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x12, 0x24, 0x62, 0xFF, 0x7E, 0x00, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x97, 0xFD, 0xAC, 0xF0, 0x12, 0x24, 0x7B, 0x90, ++0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, ++0x01, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x02, ++0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x24, 0x7B, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, ++0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x7E, ++0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x04, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, ++0x12, 0x24, 0x7B, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, ++0xA9, 0x11, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, ++0x14, 0x90, 0x00, 0x06, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x24, 0x7B, 0x90, 0x8A, 0xD2, ++0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x04, 0x12, ++0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x08, 0x12, 0x42, ++0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x24, 0x7B, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, ++0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x05, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0x90, ++0x8A, 0xD4, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x24, 0x7B, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, 0x9F, ++0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x0C, 0xA3, 0xE0, 0x9F, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, ++0xF0, 0x80, 0x07, 0xE4, 0x90, 0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, 0xFC, 0xA3, ++0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, ++0xF5, 0x83, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xD3, 0xED, 0x9B, ++0xEC, 0x9A, 0x40, 0x05, 0x31, 0x78, 0x02, 0x71, 0xAF, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, ++0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xC3, ++0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x03, 0x02, 0x71, 0xAF, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5D, 0x41, 0x02, 0x71, 0xAF, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xFC, 0x64, 0x05, 0x60, 0x03, ++0x02, 0x70, 0x7D, 0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x03, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, ++0x94, 0x19, 0x40, 0x3D, 0x80, 0x2E, 0xEE, 0xB4, 0x02, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, ++0x11, 0x40, 0x2E, 0x80, 0x1F, 0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x01, 0x0B, 0x90, 0x8A, 0xD1, ++0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x1B, 0x80, 0x0C, 0xEE, 0x70, 0x11, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, ++0x94, 0x03, 0x40, 0x0D, 0x90, 0x89, 0x43, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x89, 0x43, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, ++0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x23, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, ++0xC3, 0x94, 0x30, 0x50, 0x0B, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0x02, 0x70, 0x28, ++0x90, 0x89, 0x43, 0xE0, 0x64, 0x01, 0x60, 0x03, 0x02, 0x70, 0x1D, 0x90, 0x8A, 0xCF, 0xE0, 0x24, ++0x44, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x64, 0x0A, 0x60, 0x5B, 0x90, 0x8A, 0xCF, ++0xE0, 0xFF, 0xEE, 0x24, 0x05, 0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xE0, 0xFF, 0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x50, 0x38, ++0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0xEF, 0x24, 0x05, 0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x23, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x50, 0x16, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, ++0xFF, 0x90, 0x8A, 0xD1, 0xE0, 0x6F, 0x60, 0x56, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x23, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFF, 0xD3, 0x94, 0x42, 0x40, 0x08, 0x90, 0x8A, 0xDD, 0x74, ++0x05, 0xF0, 0x80, 0x11, 0xEF, 0xD3, 0x94, 0x39, 0x90, 0x8A, 0xDD, 0x40, 0x05, 0x74, 0x03, 0xF0, ++0x80, 0x03, 0x74, 0x01, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x23, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x44, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0x80, 0x2F, 0x90, 0x8A, ++0xCF, 0xE0, 0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x44, ++0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x14, 0xE4, 0x90, 0x8A, ++0xDD, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0x90, 0x8A, 0xD1, 0xE0, 0xFE, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x84, 0xF5, 0x82, 0xE4, ++0x34, 0x8A, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFE, 0x74, 0x43, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0x88, 0xF5, 0x83, 0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2B, 0x12, 0x43, ++0x5F, 0xE0, 0xB4, 0x01, 0x11, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0xF5, 0x82, 0xE4, ++0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0x21, 0xAC, 0xEC, 0x64, 0x06, ++0x60, 0x02, 0x21, 0xAF, 0x90, 0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x41, 0xDB, 0x93, 0xFF, 0x7E, ++0x00, 0x90, 0x8A, 0xD4, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x24, 0x7B, 0x90, 0x8A, 0xDB, 0xEE, ++0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE0, 0x90, 0x8A, 0xDD, 0xF0, 0xE4, 0x90, 0x8A, 0xDA, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, ++0xD3, 0x94, 0x04, 0x50, 0x47, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x75, 0xF0, 0x02, 0xEF, 0xA4, ++0xF5, 0x82, 0x85, 0xF0, 0x83, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0xEF, 0x90, 0x41, 0xD6, 0x93, ++0xFF, 0x7E, 0x00, 0x12, 0x24, 0x7B, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0x90, ++0x8A, 0xDB, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, ++0xE0, 0x9E, 0x50, 0x08, 0x90, 0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0x80, 0xAF, 0x90, 0x8A, 0xDA, 0xE0, ++0xC3, 0x13, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFF, 0xB4, 0x01, 0x0D, 0x90, 0x8A, 0xDA, 0xE0, 0x70, ++0x5D, 0x90, 0x8A, 0xDD, 0x04, 0xF0, 0x80, 0x5B, 0xEF, 0xB4, 0x03, 0x1D, 0x90, 0x8A, 0xDA, 0xE0, ++0xFF, 0x70, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x03, 0xF0, 0x80, 0x48, 0xEF, 0xB4, 0x01, 0x08, 0x90, ++0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x80, 0x3C, 0x80, 0x35, 0x90, 0x8A, 0xDD, 0xE0, 0x64, 0x05, 0x70, ++0x32, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x05, 0xF0, 0x80, 0x0F, ++0xEF, 0x90, 0x8A, 0xDD, 0xB4, 0x01, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, 0xD3, ++0x90, 0x8A, 0xD7, 0xE0, 0x94, 0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x05, 0xE4, 0x90, ++0x8A, 0xDD, 0xF0, 0xD3, 0x90, 0x8A, 0xD7, 0xE0, 0x94, 0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, ++0x40, 0x05, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, ++0xFF, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xED, 0xF0, 0x12, 0x69, 0x38, 0x90, ++0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xD3, 0x94, ++0x05, 0x50, 0x0F, 0x74, 0x64, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0x04, 0xF0, ++0x80, 0x0F, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0xE4, 0xF5, 0xF0, 0x12, 0x42, 0xFA, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x90, 0x00, 0x02, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x04, 0xE4, ++0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x06, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, ++0x08, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xC0, ++0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, ++0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, ++0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, ++0xF0, 0x02, 0x6B, 0xC2, 0x22, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xC3, ++0x94, 0x10, 0x50, 0x14, 0x74, 0xA4, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE4, 0xF0, ++0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x80, 0xE2, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, ++0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, 0x02, 0x81, 0x0E, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x00, ++0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x02, 0x12, 0x43, ++0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x04, 0x12, 0x43, 0x5F, 0xE4, ++0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x06, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, ++0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x08, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, ++0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x74, 0x44, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x43, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x88, ++0xF5, 0x83, 0xE4, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x44, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, ++0x74, 0x24, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x64, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x41, 0x8C, 0x93, 0xFE, 0x74, 0x01, 0x93, ++0xFF, 0x90, 0x41, 0x54, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x3E, 0xC3, 0x13, 0xFE, 0xEF, ++0x13, 0xFF, 0x90, 0x8A, 0xCF, 0xE0, 0xFD, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, ++0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x29, 0x12, 0x43, ++0x5F, 0x74, 0x01, 0xF0, 0x74, 0xC1, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0x74, 0x0C, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, ++0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x23, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, 0xF0, ++0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0x74, 0x13, 0xF0, 0x75, 0xF0, 0x09, ++0xED, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, 0x34, ++0x04, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x41, 0x7D, 0x22, 0x12, ++0x24, 0x62, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x14, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFE, 0x74, ++0x23, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0xEF, 0xB4, 0x20, 0x0A, ++0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0x90, 0x87, 0x21, 0xF0, 0x22, 0x90, 0x8B, 0x4B, 0xEE, 0xF0, ++0xA3, 0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x8B, 0x4B, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, ++0x82, 0x8E, 0x83, 0xE0, 0x60, 0x2C, 0xC3, 0x90, 0x8B, 0x4E, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4D, ++0xE0, 0x94, 0x03, 0x40, 0x0A, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x00, 0x22, 0x90, ++0x8B, 0x4D, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x32, 0x15, ++0x80, 0xC6, 0x7F, 0x01, 0x22, 0x12, 0x24, 0x62, 0xF5, 0x21, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x25, 0x14, 0x00, 0x00, 0x00, 0x00, 0x90, 0x00, 0x01, 0x12, ++0x42, 0x20, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x0A, 0xF0, ++0x12, 0x47, 0xFA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x30, ++0xE0, 0x25, 0x12, 0x24, 0x62, 0x90, 0x8B, 0x10, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, ++0x8B, 0x11, 0xF0, 0xEF, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x8B, 0x0F, 0xF0, 0x90, 0x00, 0x03, 0x12, ++0x42, 0x20, 0x90, 0x8B, 0x16, 0xF0, 0x22, 0x90, 0x8B, 0x10, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x11, ++0x74, 0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0x22, ++0x12, 0x24, 0x62, 0x30, 0xE0, 0x19, 0xC3, 0x13, 0x54, 0x7F, 0x90, 0x8B, 0x15, 0xF0, 0x90, 0x00, ++0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8B, 0x13, 0xE4, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x0F, 0x90, ++0x8B, 0x15, 0x74, 0x05, 0xF0, 0x90, 0x8B, 0x13, 0xE4, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, ++0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x12, 0x24, 0x62, 0x90, 0x8B, 0x12, 0xF0, ++0x60, 0x07, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x90, 0x8B, 0x12, 0xE0, 0x90, 0x01, 0xE7, ++0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x24, 0x62, 0xFE, 0xAF, 0x05, 0xED, 0x2E, 0x90, ++0x8A, 0xF7, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xF8, 0xF0, ++0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xF9, 0xF0, 0x90, 0x00, 0x03, ++0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xFA, 0xF0, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, ++0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x8A, 0xFB, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, ++0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x12, 0x24, 0x62, 0xC3, ++0x13, 0x20, 0xE0, 0x02, 0xC1, 0xED, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x24, 0x62, 0xFF, ++0x54, 0x02, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0x54, 0xFD, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, ++0xEE, 0x54, 0xFE, 0x4F, 0xFF, 0xF0, 0x12, 0x24, 0x62, 0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, ++0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, ++0x12, 0x24, 0x62, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, 0xDF, 0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, ++0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xF0, 0x20, 0xE0, 0x02, 0xC1, 0xD9, 0x90, 0x8A, ++0xDD, 0x74, 0x21, 0xF0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x24, 0x62, 0xFF, 0x13, 0x13, ++0x54, 0x01, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, 0x13, 0x54, 0x01, 0x6E, 0x60, 0x2A, 0xEF, ++0x54, 0x04, 0xFF, 0xED, 0x54, 0xFB, 0x4F, 0xF0, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0E, ++0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x12, 0x31, 0x9D, 0x80, 0x0B, 0xE4, 0x90, ++0x8B, 0x34, 0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x31, 0x2C, 0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, 0x13, ++0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x12, 0xF0, 0xED, 0xC4, 0x54, ++0x0F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x14, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xC4, ++0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x8B, 0x32, ++0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x40, 0xF0, ++0x90, 0x8A, 0xDD, 0xE0, 0x90, 0x05, 0x27, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x70, 0x05, 0x7F, 0x01, ++0x12, 0x4E, 0x89, 0x90, 0x8B, 0x32, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x04, 0x7F, ++0x03, 0x80, 0x0E, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, ++0x02, 0x12, 0x4E, 0x89, 0x7F, 0x02, 0x02, 0x78, 0x2E, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, ++0x05, 0x27, 0xF0, 0xE4, 0xFF, 0x12, 0x4E, 0x89, 0x7F, 0x03, 0x02, 0x78, 0x2E, 0x90, 0x8A, 0xDA, ++0x12, 0x43, 0x6B, 0x12, 0x24, 0x62, 0xFF, 0x54, 0x02, 0xFE, 0x90, 0x8B, 0x2C, 0xE0, 0x54, 0xFD, ++0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, 0xEE, 0x54, 0xFE, 0x4F, 0xFF, 0xF0, 0x12, 0x24, 0x62, ++0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x8B, 0x2C, 0xF0, 0xEE, 0x54, 0x10, ++0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x24, 0x62, 0xFE, 0x54, 0x40, 0xFD, 0xEF, 0x54, ++0xBF, 0x4D, 0xFF, 0x90, 0x8B, 0x2C, 0xF0, 0xEE, 0x54, 0x04, 0xFE, 0xEF, 0x54, 0xFB, 0x4E, 0xF0, ++0x20, 0xE0, 0x02, 0xE1, 0xE2, 0x90, 0x8A, 0xDD, 0x74, 0x31, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x13, ++0x13, 0x54, 0x3F, 0x20, 0xE0, 0x0B, 0xE4, 0x90, 0x8B, 0x2E, 0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x31, ++0x2C, 0x90, 0x8B, 0x2C, 0xE0, 0xFD, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x8A, ++0xDD, 0xE0, 0x44, 0x02, 0xF0, 0xED, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, ++0x44, 0x04, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0x54, 0x06, 0x60, 0x0C, 0x90, 0x01, 0x3E, 0x74, 0x03, ++0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x31, 0xB7, 0x90, 0x8A, 0xDD, 0xE0, 0x90, 0x05, 0x27, 0xF0, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0D, 0xA3, 0xE0, 0x64, 0x06, ++0x60, 0x2C, 0x7F, 0x06, 0x12, 0x65, 0x82, 0x80, 0x25, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x06, 0x1B, ++0x7F, 0x01, 0x12, 0x65, 0x82, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x09, 0x7D, 0x01, 0xAF, ++0x23, 0x12, 0x45, 0xA2, 0x80, 0x05, 0x12, 0x4E, 0x56, 0x80, 0x03, 0x12, 0x7D, 0xC1, 0x7F, 0x01, ++0x80, 0x4C, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x27, 0xF0, 0x7D, 0x03, 0x7F, 0x02, ++0x12, 0x31, 0x49, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x06, 0x02, 0x80, 0x1B, 0x90, 0x8B, 0x2D, 0xE0, ++0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, 0x80, 0x14, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, ++0x02, 0x05, 0x7F, 0x01, 0x12, 0x65, 0x82, 0x11, 0x35, 0x12, 0x4A, 0xFC, 0x7F, 0x03, 0x11, 0x42, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x8B, 0x31, 0xE0, 0xB4, 0x01, 0x05, 0xE4, 0xF0, 0x12, 0x48, ++0xFE, 0x22, 0xAD, 0x07, 0xEF, 0x64, 0x01, 0x60, 0x04, 0xEF, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x32, ++0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0xA3, 0xF0, 0xED, 0x64, 0x02, 0x60, 0x04, 0xED, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x2C, 0xE0, 0x54, ++0xFE, 0xF0, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, ++0x22, 0x12, 0x24, 0x62, 0x90, 0x8B, 0x38, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8A, 0xFD, 0xE0, 0x90, 0x8A, 0xE8, 0xF0, 0x90, 0x8A, 0xFE, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, ++0x8A, 0xE9, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, ++0xFF, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0x8B, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0xEB, 0x2F, 0xF5, ++0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, ++0x04, 0xDA, 0x90, 0x8A, 0xE8, 0xE0, 0x12, 0x43, 0x94, 0x78, 0xF8, 0x00, 0x7A, 0x6B, 0x01, 0x79, ++0x01, 0x02, 0x79, 0x01, 0x03, 0x79, 0x01, 0x04, 0x7A, 0x6B, 0x05, 0x7A, 0x35, 0x80, 0x7A, 0x4E, ++0x81, 0x7A, 0x6B, 0x82, 0x00, 0x00, 0x7A, 0x67, 0x90, 0x8A, 0xEE, 0xE0, 0xFF, 0x51, 0x72, 0x41, ++0x6B, 0x90, 0x8A, 0xE8, 0xE0, 0xFF, 0xB4, 0x02, 0x08, 0x90, 0x8A, 0xE5, 0x74, 0x01, 0xF0, 0x80, ++0x0F, 0xEF, 0x90, 0x8A, 0xE5, 0xB4, 0x03, 0x05, 0x74, 0x02, 0xF0, 0x80, 0x03, 0x74, 0x04, 0xF0, ++0xC3, 0x90, 0x8A, 0xE9, 0xE0, 0x94, 0x08, 0x50, 0x78, 0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, ++0xE5, 0xE0, 0xFF, 0x90, 0x8A, 0xE4, 0xE0, 0xC3, 0x9F, 0x40, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xE9, ++0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xC3, 0xEE, 0x94, 0x01, 0x90, 0x8A, 0xE4, 0xE0, 0x50, 0x1F, 0xFE, ++0x2F, 0xFF, 0xEE, 0xFD, 0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, ++0xF5, 0x82, 0x74, 0x8A, 0x3C, 0xF5, 0x83, 0xE0, 0xFD, 0x12, 0x51, 0x88, 0x80, 0x2B, 0xFF, 0xFD, ++0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, 0xF5, 0x82, 0x74, 0x8A, ++0x3C, 0xF5, 0x83, 0xE0, 0xFE, 0xEF, 0xFD, 0x90, 0x8A, 0xEA, 0xE0, 0x2D, 0xFD, 0x90, 0x8A, 0xE9, ++0xE0, 0x34, 0x00, 0x8D, 0x82, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0x80, ++0x8D, 0xC3, 0x90, 0x8A, 0xE9, 0xE0, 0x94, 0x10, 0x40, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xE8, 0xE0, ++0x64, 0x04, 0x60, 0x02, 0x41, 0x6B, 0x90, 0x8A, 0xEC, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, ++0x10, 0x12, 0x24, 0xF5, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xEB, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x18, 0x12, 0x24, 0xF5, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, ++0xD0, 0x00, 0x12, 0x43, 0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xED, ++0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x08, 0x12, 0x24, 0xF5, 0xD0, 0x03, 0xD0, 0x02, 0xD0, ++0x01, 0xD0, 0x00, 0x12, 0x43, 0x46, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0xA3, 0xE0, ++0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x12, 0x43, 0x46, 0xA3, 0x12, 0x25, 0x08, 0x90, 0x8A, 0xEF, 0x12, ++0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x90, 0x8A, 0xE9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, ++0x12, 0x2B, 0x08, 0x80, 0x36, 0x90, 0x8A, 0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, ++0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x32, 0x15, 0x80, 0x1D, 0x90, 0x8A, ++0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, ++0xEF, 0xF0, 0x12, 0x31, 0x82, 0x80, 0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, ++0xAF, 0x22, 0x8F, 0x0F, 0xE4, 0x90, 0x8A, 0xF3, 0xF0, 0xE5, 0x0F, 0x14, 0xFE, 0x90, 0x8A, 0xF3, ++0xE0, 0xFF, 0xC3, 0x9E, 0x50, 0x0E, 0xEF, 0x04, 0xFD, 0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3, 0xE0, ++0x04, 0xF0, 0x80, 0xE5, 0xE5, 0x0F, 0x14, 0xFF, 0x7D, 0xFF, 0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3, ++0xE5, 0x0F, 0xF0, 0x90, 0x8A, 0xF3, 0xE0, 0xC3, 0x94, 0xFF, 0x50, 0x0F, 0xE0, 0xFF, 0x04, 0xFD, ++0x12, 0x2D, 0x4D, 0x90, 0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE8, 0xAD, 0x0F, 0x7F, 0xFF, 0x02, ++0x2D, 0x4D, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0xA3, 0x74, ++0x04, 0xF0, 0xA3, 0xE4, 0xF0, 0x90, 0x8A, 0xE2, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90, ++0x8A, 0xE1, 0xF0, 0x12, 0x24, 0x62, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0x2F, 0x90, 0x8A, 0xE0, 0xF0, ++0x30, 0xE0, 0x0B, 0x90, 0x8A, 0xDB, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x80, 0x07, 0xE4, 0x90, ++0x8A, 0xDB, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90, ++0x8A, 0xDD, 0xE0, 0x24, 0x20, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFC, 0x2D, ++0xFF, 0x24, 0x01, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xFD, 0xF0, 0x74, ++0x02, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0xEC, 0x2D, 0x24, 0x03, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0x90, 0x8A, 0xFE, 0xF0, ++0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xDA, 0x74, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFF, 0xA3, ++0xE0, 0x2F, 0xFF, 0x90, 0x8A, 0xDA, 0xE0, 0xFE, 0x2F, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0xFF, 0x74, 0xFC, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, ++0x90, 0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x08, 0xCF, 0x11, 0x89, 0xEF, 0x70, 0x45, 0x90, ++0x01, 0xC3, 0xE0, 0x60, 0x2B, 0xC3, 0x90, 0x8A, 0xE3, 0xE0, 0x94, 0xE8, 0x90, 0x8A, 0xE2, 0xE0, ++0x94, 0x03, 0x40, 0x09, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x79, 0x90, 0x8A, 0xE2, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x32, 0x15, 0x80, 0xCF, ++0x90, 0x01, 0xC6, 0xE0, 0x90, 0x01, 0xC3, 0x30, 0xE2, 0x05, 0x74, 0xFE, 0xF0, 0x80, 0x57, 0x74, ++0xFF, 0xF0, 0x80, 0x52, 0x90, 0x8A, 0xDD, 0xE0, 0xB4, 0x78, 0x2E, 0xE4, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x64, 0x80, 0x90, 0x8A, 0xDB, ++0x70, 0x05, 0xF0, 0xA3, 0xF0, 0x80, 0x06, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x90, 0x8A, 0xE0, ++0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x80, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x24, 0x08, 0xF0, ++0x90, 0x8A, 0xDE, 0x74, 0xFF, 0xF5, 0xF0, 0x12, 0x42, 0x81, 0x90, 0x8A, 0xDE, 0xE0, 0x70, 0x02, ++0xA3, 0xE0, 0x60, 0x02, 0x61, 0x16, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x24, 0x62, 0x90, 0x8B, ++0x05, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x06, 0xF0, 0x22, 0xE4, 0xF5, 0x61, ++0x22, 0x91, 0x4A, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, ++0x7F, 0x78, 0x7E, 0x08, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x1C, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E, ++0x0C, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x20, 0x12, 0x25, 0x08, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x22, ++0x65, 0x90, 0x8B, 0x24, 0x12, 0x25, 0x08, 0x90, 0x8B, 0x09, 0xE0, 0x90, 0x8B, 0x1C, 0xB4, 0x01, ++0x0D, 0x12, 0x43, 0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xED, 0x54, 0xC7, 0xFD, 0x80, 0x07, 0x12, 0x43, ++0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xEC, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x78, 0x7E, 0x08, ++0x12, 0x2B, 0x08, 0x90, 0x8B, 0x20, 0x12, 0x43, 0x53, 0xEF, 0x54, 0x0F, 0xFF, 0xEC, 0x90, 0x80, ++0x96, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E, 0x0C, 0x12, 0x2B, 0x08, 0x90, 0x8B, 0x24, 0x12, 0x43, ++0x53, 0xEF, 0x44, 0x02, 0xFF, 0xEC, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x00, 0x7E, 0x08, ++0x12, 0x2B, 0x08, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x22, 0x65, 0x90, 0x8B, 0x28, 0x12, 0x25, 0x08, ++0x90, 0x80, 0x96, 0x12, 0x25, 0x14, 0x00, 0x1B, 0x25, 0xA0, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2B, ++0x08, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x30, ++0x2C, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x00, ++0x00, 0x00, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x30, 0x2C, 0x90, 0x00, 0x11, 0xE0, 0x54, 0xF6, 0xF0, ++0x02, 0x52, 0x0E, 0x91, 0x50, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, ++0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0xB1, 0x42, 0x90, 0x8B, 0x33, 0x74, 0x04, ++0xF0, 0x22, 0x90, 0x00, 0x11, 0xE0, 0x44, 0x09, 0xF0, 0x12, 0x52, 0x0E, 0x90, 0x8B, 0x1C, 0x12, ++0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x78, 0x7E, 0x08, 0x12, 0x2B, 0x08, 0x90, ++0x8B, 0x20, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x04, 0x7E, 0x0C, 0x12, ++0x2B, 0x08, 0x90, 0x8B, 0x24, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, 0x08, 0x7F, 0x00, ++0x7E, 0x08, 0x12, 0x2B, 0x08, 0x90, 0x8B, 0x28, 0x12, 0x43, 0x53, 0x90, 0x80, 0x96, 0x12, 0x25, ++0x08, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2B, 0x08, 0x90, 0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x03, ++0x2D, 0x95, 0xE4, 0xFD, 0xFF, 0x12, 0x30, 0x2C, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, ++0x80, 0x68, 0x12, 0x25, 0x14, 0x00, 0x03, 0x2D, 0x95, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x30, 0x2C, ++0x22, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x3C, 0xE5, 0x22, 0x54, 0x0F, 0x14, 0x60, 0x2E, ++0x14, 0x60, 0x1E, 0x24, 0xFE, 0x60, 0x0E, 0x24, 0xF8, 0x70, 0x2A, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, ++0x90, 0x05, 0x22, 0xF0, 0x22, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x22, 0xE4, 0xF0, ++0x22, 0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0x90, 0x01, ++0xC6, 0xE0, 0x44, 0x08, 0xF0, 0x22, 0xAE, 0x07, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x18, ++0x90, 0x8B, 0x2C, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0C, 0xAF, 0x06, 0x7D, 0x01, ++0x12, 0x45, 0xA2, 0xB1, 0xC1, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x01, 0x57, 0xE0, 0x60, ++0x3C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x1B, 0xE0, ++0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0, 0x04, 0xF0, 0x53, ++0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0x40, 0x0E, 0xE5, ++0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0, 0x90, 0x01, 0x5B, ++0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0xE4, 0x90, ++0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B, 0x4F, 0xF0, 0xA3, ++0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xA3, ++0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4F, ++0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, 0x32, 0x15, 0x90, ++0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x00, 0xFB, 0x98}; ++ ++// =================== v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05 ===================== ++u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = { ++0xC2, 0x88, 0x02, 0x05, 0x58, 0x00, 0x02, 0x00, 0x12, 0x05, 0x17, 0x10, 0xC0, 0x3E, 0x01, 0x00, ++0x94, 0x18, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x02, 0x46, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x60, 0xF3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x02, 0x67, 0x5B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x4B, 0x87, 0x00, 0x00, ++0x05, 0x04, 0x03, 0x02, 0x00, 0x03, 0x06, 0x05, 0x04, 0x03, 0x00, 0x04, 0x06, 0x05, 0x04, 0x02, ++0x00, 0x04, 0x08, 0x07, 0x06, 0x04, 0x00, 0x06, 0x0A, 0x09, 0x08, 0x06, 0x00, 0x08, 0x0A, 0x09, ++0x08, 0x04, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x02, 0x00, 0x08, 0x0A, 0x09, 0x08, 0x00, 0x00, 0x08, ++0x12, 0x11, 0x10, 0x08, 0x00, 0x10, 0x1A, 0x19, 0x18, 0x10, 0x00, 0x18, 0x22, 0x21, 0x20, 0x18, ++0x00, 0x20, 0x22, 0x21, 0x20, 0x10, 0x00, 0x20, 0x22, 0x21, 0x20, 0x08, 0x00, 0x20, 0x22, 0x21, ++0x1C, 0x08, 0x00, 0x20, 0x22, 0x21, 0x14, 0x08, 0x00, 0x20, 0x22, 0x20, 0x18, 0x08, 0x00, 0x20, ++0x31, 0x30, 0x20, 0x10, 0x00, 0x30, 0x31, 0x30, 0x18, 0x00, 0x00, 0x30, 0x31, 0x2F, 0x10, 0x10, ++0x00, 0x30, 0x31, 0x2C, 0x10, 0x10, 0x00, 0x30, 0x31, 0x28, 0x10, 0x00, 0x00, 0x30, 0x31, 0x20, ++0x10, 0x00, 0x00, 0x30, 0x31, 0x10, 0x10, 0x00, 0x00, 0x30, 0x04, 0x04, 0x04, 0x05, 0x04, 0x04, ++0x05, 0x07, 0x07, 0x07, 0x08, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x06, 0x0A, 0x0B, 0x0D, 0x05, 0x05, ++0x07, 0x07, 0x08, 0x0B, 0x0D, 0x0F, 0x04, 0x04, 0x04, 0x05, 0x07, 0x07, 0x09, 0x09, 0x0C, 0x0E, ++0x10, 0x12, 0x06, 0x07, 0x09, 0x0A, 0x0C, 0x0E, 0x11, 0x13, 0x09, 0x09, 0x09, 0x09, 0x0C, 0x0E, ++0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x26, 0x2A, 0x18, 0x1A, ++0x1D, 0x1F, 0x21, 0x27, 0x29, 0x2A, 0x00, 0x00, 0x00, 0x1F, 0x23, 0x28, 0x2A, 0x2C, 0x00, 0x04, ++0x00, 0x04, 0x00, 0x08, 0x00, 0x10, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, ++0x00, 0x90, 0x00, 0xC0, 0x00, 0xD8, 0x00, 0x50, 0x00, 0x78, 0x00, 0xA0, 0x00, 0xC8, 0x01, 0x40, ++0x01, 0x90, 0x01, 0xE0, 0x02, 0x30, 0x01, 0x2C, 0x01, 0x40, 0x01, 0xE0, 0x02, 0xD0, 0x03, 0xE8, ++0x04, 0xB0, 0x06, 0x40, 0x07, 0xD0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x04, 0x00, 0x08, 0x00, 0x0C, ++0x00, 0x12, 0x00, 0x18, 0x00, 0x24, 0x00, 0x30, 0x00, 0x48, 0x00, 0x60, 0x00, 0x6C, 0x00, 0x28, ++0x00, 0x3C, 0x00, 0x50, 0x00, 0x64, 0x00, 0xA0, 0x00, 0xC8, 0x00, 0xF0, 0x01, 0x18, 0x00, 0x64, ++0x00, 0xA0, 0x00, 0xF0, 0x01, 0x68, 0x01, 0xF4, 0x02, 0x58, 0x03, 0x20, 0x03, 0xE8, 0x02, 0x02, ++0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x07, 0x02, 0x03, 0x04, 0x0A, 0x0C, 0x0E, ++0x10, 0x12, 0x05, 0x07, 0x07, 0x08, 0x0B, 0x12, 0x24, 0x3C, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, ++0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x05, 0x06, ++0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x20, 0x1E, 0x1C, 0x18, 0x10, 0x18, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++0xBB, 0x01, 0x0C, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, 0x22, 0x50, ++0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE6, 0x22, 0xBB, 0xFE, 0x06, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0x22, ++0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0xBB, 0x01, 0x06, ++0x89, 0x82, 0x8A, 0x83, 0xF0, 0x22, 0x50, 0x02, 0xF7, 0x22, 0xBB, 0xFE, 0x01, 0xF3, 0x22, 0xF8, ++0xBB, 0x01, 0x0D, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0x22, ++0x50, 0x06, 0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x22, 0xBB, 0xFE, 0x05, 0xE9, 0x25, 0x82, 0xC8, 0xF2, ++0x22, 0xC5, 0xF0, 0xF8, 0xA3, 0xE0, 0x28, 0xF0, 0xC5, 0xF0, 0xF8, 0xE5, 0x82, 0x15, 0x82, 0x70, ++0x02, 0x15, 0x83, 0xE0, 0x38, 0xF0, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, 0x83, 0xE0, 0xF5, ++0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x06, 0x87, 0xF0, 0x09, 0xE7, 0x19, 0x22, 0xBB, 0xFE, 0x07, 0xE3, ++0xF5, 0xF0, 0x09, 0xE3, 0x19, 0x22, 0x89, 0x82, 0x8A, 0x83, 0xE4, 0x93, 0xF5, 0xF0, 0x74, 0x01, ++0x93, 0x22, 0xBB, 0x01, 0x10, 0xE5, 0x82, 0x29, 0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE0, ++0xF5, 0xF0, 0xA3, 0xE0, 0x22, 0x50, 0x09, 0xE9, 0x25, 0x82, 0xF8, 0x86, 0xF0, 0x08, 0xE6, 0x22, ++0xBB, 0xFE, 0x0A, 0xE9, 0x25, 0x82, 0xF8, 0xE2, 0xF5, 0xF0, 0x08, 0xE2, 0x22, 0xE5, 0x83, 0x2A, ++0xF5, 0x83, 0xE9, 0x93, 0xF5, 0xF0, 0xA3, 0xE9, 0x93, 0x22, 0xBB, 0x01, 0x0A, 0x89, 0x82, 0x8A, ++0x83, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x06, 0xF7, 0x09, 0xA7, 0xF0, 0x19, 0x22, 0xBB, ++0xFE, 0x06, 0xF3, 0xE5, 0xF0, 0x09, 0xF3, 0x19, 0x22, 0xF8, 0xBB, 0x01, 0x11, 0xE5, 0x82, 0x29, ++0xF5, 0x82, 0xE5, 0x83, 0x3A, 0xF5, 0x83, 0xE8, 0xF0, 0xE5, 0xF0, 0xA3, 0xF0, 0x22, 0x50, 0x09, ++0xE9, 0x25, 0x82, 0xC8, 0xF6, 0x08, 0xA6, 0xF0, 0x22, 0xBB, 0xFE, 0x09, 0xE9, 0x25, 0x82, 0xC8, ++0xF2, 0xE5, 0xF0, 0x08, 0xF2, 0x22, 0xEF, 0x4B, 0xFF, 0xEE, 0x4A, 0xFE, 0xED, 0x49, 0xFD, 0xEC, ++0x48, 0xFC, 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x22, 0xA4, ++0x25, 0x82, 0xF5, 0x82, 0xE5, 0xF0, 0x35, 0x83, 0xF5, 0x83, 0x22, 0xE0, 0xFB, 0xA3, 0xE0, 0xFA, ++0xA3, 0xE0, 0xF9, 0x22, 0xF8, 0xE0, 0xFB, 0xA3, 0xA3, 0xE0, 0xF9, 0x25, 0xF0, 0xF0, 0xE5, 0x82, ++0x15, 0x82, 0x70, 0x02, 0x15, 0x83, 0xE0, 0xFA, 0x38, 0xF0, 0x22, 0xEB, 0xF0, 0xA3, 0xEA, 0xF0, ++0xA3, 0xE9, 0xF0, 0x22, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, 0x93, 0x70, 0x12, 0x74, 0x01, 0x93, ++0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, 0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, ++0x02, 0x93, 0x68, 0x60, 0xEF, 0xA3, 0xA3, 0xA3, 0x80, 0xDF, 0xD0, 0x83, 0xD0, 0x82, 0xF8, 0xE4, ++0x93, 0x70, 0x12, 0x74, 0x01, 0x93, 0x70, 0x0D, 0xA3, 0xA3, 0x93, 0xF8, 0x74, 0x01, 0x93, 0xF5, ++0x82, 0x88, 0x83, 0xE4, 0x73, 0x74, 0x02, 0x93, 0xB5, 0xF0, 0x06, 0x74, 0x03, 0x93, 0x68, 0x60, ++0xE9, 0xA3, 0xA3, 0xA3, 0xA3, 0x80, 0xD8, 0xE4, 0x90, 0x8A, 0xC5, 0xF0, 0xE5, 0x24, 0x70, 0x03, ++0x02, 0x44, 0x9D, 0xE5, 0x21, 0x64, 0x01, 0x60, 0x03, 0x02, 0x44, 0x9D, 0xE5, 0x24, 0x14, 0x60, ++0x29, 0x24, 0xFD, 0x60, 0x25, 0x24, 0x02, 0x24, 0xFB, 0x50, 0x02, 0x80, 0x23, 0x90, 0x8B, 0x0B, ++0xE0, 0x14, 0xF0, 0xE0, 0x60, 0x04, 0xA3, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x0A, ++0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, 0xF0, 0x80, 0x00, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, ++0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x16, 0xA3, 0xE0, 0xB4, 0x06, 0x05, 0xE4, 0x90, 0x8A, 0xC5, ++0xF0, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x70, 0x04, 0x90, 0x8A, 0xC5, 0xF0, 0x90, 0x8A, 0xC5, ++0xE0, 0x60, 0x4A, 0x43, 0x25, 0x10, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0C, 0xE0, 0x75, ++0xF0, 0x03, 0xA4, 0xFF, 0x90, 0x8B, 0x15, 0xE0, 0x2F, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0xE5, 0x22, 0x54, ++0x0F, 0xC3, 0x94, 0x04, 0x50, 0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x90, 0x8B, 0x2C, ++0xE0, 0x30, 0xE0, 0x09, 0x12, 0x66, 0x20, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0xE4, 0xF5, ++0x25, 0xF5, 0x24, 0x75, 0x23, 0x0C, 0x75, 0x22, 0x0C, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x8B, 0x18, ++0xF0, 0x90, 0x8B, 0x17, 0xF0, 0x90, 0x8B, 0x19, 0x04, 0xF0, 0x90, 0x8B, 0x0B, 0xF0, 0xE4, 0x90, ++0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0D, 0xF0, 0x90, 0x8B, 0x15, 0x74, 0x05, 0xF0, 0xE4, 0x90, 0x8B, ++0x0C, 0xF0, 0x90, 0x8B, 0x13, 0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x10, 0xF0, 0xA3, 0x74, ++0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, 0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0xE4, 0x90, ++0x8B, 0x0E, 0xF0, 0x90, 0x8B, 0x0A, 0xF0, 0x90, 0x8B, 0x08, 0xF0, 0x90, 0x8B, 0x12, 0xF0, 0x22, ++0x7F, 0x00, 0x22, 0x02, 0x45, 0x03, 0x02, 0x45, 0x06, 0x8E, 0x64, 0x8F, 0x65, 0xAD, 0x65, 0xAC, ++0x64, 0xAF, 0x63, 0x12, 0x4A, 0x5B, 0xAF, 0x65, 0xAE, 0x64, 0x90, 0x04, 0x80, 0xE0, 0x54, 0x0F, ++0xFD, 0xAC, 0x07, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x01, ++0xF0, 0x74, 0x11, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xFB, 0xF0, 0xAC, ++0x07, 0x74, 0x16, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0xFA, 0xF0, 0x74, ++0x15, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x1F, 0xF0, 0xAC, 0x07, 0x74, ++0x06, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x0F, 0xF0, 0x90, 0x04, 0x53, ++0xE4, 0xF0, 0x90, 0x04, 0x52, 0xF0, 0x90, 0x04, 0x51, 0x74, 0xFF, 0xF0, 0x90, 0x04, 0x50, 0x74, ++0xFD, 0xF0, 0x74, 0x14, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0x4D, ++0xFD, 0x74, 0x14, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xED, 0xF0, 0x22, 0x7D, 0x01, ++0x7F, 0x0C, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x67, 0x8D, 0x68, 0xE5, 0x67, 0x54, ++0x0F, 0xFF, 0xE5, 0x22, 0x54, 0x0F, 0x6F, 0x60, 0x72, 0xE5, 0x67, 0x30, 0xE2, 0x30, 0xE5, 0x22, ++0x20, 0xE2, 0x05, 0x7F, 0x01, 0x12, 0x4A, 0xB2, 0xE5, 0x22, 0x30, 0xE3, 0x10, 0xE5, 0x67, 0x20, ++0xE3, 0x0B, 0x12, 0x49, 0xD5, 0xEF, 0x60, 0x53, 0x12, 0x4A, 0xCC, 0x80, 0x4E, 0xE5, 0x22, 0x20, ++0xE3, 0x49, 0xE5, 0x67, 0x30, 0xE3, 0x44, 0xAF, 0x68, 0x12, 0x4A, 0x7C, 0x80, 0x3D, 0xE5, 0x22, ++0x54, 0x0F, 0xFF, 0xBF, 0x0C, 0x0E, 0xE5, 0x67, 0x20, 0xE3, 0x09, 0x12, 0x49, 0xD5, 0xEF, 0x60, ++0x2A, 0x12, 0x4A, 0xCC, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, 0x04, 0x0E, 0xE5, 0x67, 0x20, 0xE2, ++0x09, 0x12, 0x49, 0x93, 0xEF, 0x60, 0x14, 0x12, 0x4A, 0x32, 0xE5, 0x22, 0x54, 0x0F, 0xFF, 0xBF, ++0x02, 0x09, 0x12, 0x45, 0x00, 0xEF, 0x60, 0x03, 0x12, 0x4B, 0x10, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x02, 0x46, 0x6E, 0x02, 0x51, 0x39, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0x40, 0x03, 0xF6, ++0x80, 0x01, 0xF2, 0x08, 0xDF, 0xF4, 0x80, 0x29, 0xE4, 0x93, 0xA3, 0xF8, 0x54, 0x07, 0x24, 0x0C, ++0xC8, 0xC3, 0x33, 0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40, 0x04, 0xF4, 0x56, 0x80, 0x01, ++0x46, 0xF6, 0xDF, 0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x90, 0x4B, ++0x23, 0xE4, 0x7E, 0x01, 0x93, 0x60, 0xBC, 0xA3, 0xFF, 0x54, 0x3F, 0x30, 0xE5, 0x09, 0x54, 0x1F, ++0xFE, 0xE4, 0x93, 0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25, 0xE0, 0x60, 0xA8, 0x40, 0xB8, ++0xE4, 0x93, 0xA3, 0xFA, 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, ++0xC5, 0x83, 0xCA, 0xF0, 0xA3, 0xC8, 0xC5, 0x82, 0xC8, 0xCA, 0xC5, 0x83, 0xCA, 0xDF, 0xE9, 0xDE, ++0xE7, 0x80, 0xBE, 0xE5, 0x21, 0x64, 0x01, 0x70, 0x67, 0xE5, 0x24, 0x60, 0x63, 0xE5, 0x24, 0x64, ++0x02, 0x60, 0x06, 0xE5, 0x24, 0x64, 0x05, 0x70, 0x27, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x90, 0x8B, 0x19, 0xF0, 0x90, 0x8B, 0x0B, 0xE0, 0x70, 0x07, 0x90, ++0x8B, 0x19, 0xE0, 0xFF, 0x80, 0x05, 0x90, 0x8B, 0x0B, 0xE0, 0xFF, 0x90, 0x8B, 0x0B, 0xEF, 0xF0, ++0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x02, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x0C, 0xF0, 0x90, 0x05, 0x58, ++0x74, 0x03, 0xF0, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x53, 0x25, ++0xFD, 0x53, 0x25, 0xEF, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x03, 0x12, 0x47, 0x8E, ++0x22, 0xEF, 0x64, 0x01, 0x70, 0x35, 0x7D, 0x78, 0x7F, 0x02, 0x12, 0x36, 0x75, 0x7D, 0x02, 0x7F, ++0x03, 0x12, 0x36, 0x75, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x12, ++0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x66, 0x20, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, 0x7B, ++0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x7B, 0xFF, 0x12, 0x36, 0xE6, 0x7D, 0x02, 0x7F, 0x03, 0x12, ++0x36, 0xE6, 0x90, 0x06, 0x04, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x44, 0x07, 0xF0, ++0x12, 0x4B, 0x4F, 0xE5, 0x21, 0x20, 0xE0, 0x05, 0xE4, 0x90, 0x8B, 0x0D, 0xF0, 0x22, 0xE4, 0x90, ++0x8A, 0xC5, 0xF0, 0x90, 0x06, 0xA9, 0xE0, 0x90, 0x8A, 0xC5, 0xF0, 0xE0, 0x54, 0xC0, 0x70, 0x09, ++0x53, 0x25, 0xFE, 0x53, 0x25, 0xFD, 0x12, 0x4A, 0xFC, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE6, 0x15, ++0x43, 0x25, 0x01, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, 0x4A, 0x97, 0x80, 0x08, ++0x12, 0x49, 0x49, 0x80, 0x03, 0x53, 0x25, 0xFE, 0x90, 0x8A, 0xC5, 0xE0, 0x30, 0xE7, 0x27, 0x43, ++0x25, 0x02, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, ++0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, 0x74, 0x05, 0xF0, 0x90, ++0x8B, 0x1B, 0x74, 0x01, 0xF0, 0x22, 0x53, 0x25, 0xFD, 0x22, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x8B, ++0x12, 0x4B, 0x43, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xF5, 0x24, 0x14, 0x60, ++0x0E, 0x14, 0x60, 0x1F, 0x14, 0x60, 0x31, 0x24, 0x03, 0x70, 0x44, 0x7F, 0x01, 0x80, 0x3D, 0x90, ++0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, 0xE4, 0xFF, 0x12, 0x4A, ++0x07, 0x80, 0x29, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFD, ++0x7F, 0x01, 0x12, 0x4A, 0x07, 0x1F, 0x80, 0x14, 0x90, 0x8A, 0xDE, 0x12, 0x43, 0x6B, 0x90, 0x00, ++0x02, 0x12, 0x42, 0x20, 0xFD, 0x7F, 0x02, 0x12, 0x4A, 0x07, 0xE4, 0xFF, 0x12, 0x47, 0x21, 0x22, ++0xE4, 0x90, 0x8A, 0xCB, 0xF0, 0xE5, 0x24, 0x60, 0x49, 0x90, 0x8B, 0x1B, 0xE0, 0x60, 0x0D, 0xE4, ++0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x38, 0x80, 0x33, 0x90, 0x8B, 0x0C, 0xE0, ++0x04, 0xF0, 0x53, 0x25, 0xEF, 0x90, 0x8A, 0xCB, 0xE0, 0xFF, 0x90, 0x8B, 0x10, 0xE0, 0x2F, 0xFF, ++0xE4, 0x33, 0xFE, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, 0xEE, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, ++0x40, 0x0D, 0xE5, 0x21, 0xB4, 0x01, 0x0B, 0xA3, 0xE0, 0x70, 0x07, 0xE0, 0x04, 0xF0, 0x22, 0x12, ++0x4A, 0xFC, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x63, 0x90, 0x04, 0x1D, 0xE0, ++0x60, 0x24, 0x90, 0x05, 0x22, 0xE0, 0xF5, 0x66, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x2D, 0xBF, 0x01, ++0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xDE, 0x12, 0x45, 0x09, 0x90, 0x05, ++0x22, 0xE5, 0x66, 0xF0, 0x80, 0x0D, 0x90, 0x8A, 0xF9, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xDE, ++0x12, 0x45, 0x09, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE5, 0x24, ++0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x41, 0x90, 0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x12, 0x45, 0x9E, ++0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x58, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, ++0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x22, 0xE5, 0x22, 0x54, 0x0F, 0xC3, 0x94, 0x04, 0x50, ++0x07, 0x7D, 0x01, 0x7F, 0x04, 0x12, 0x45, 0xA2, 0x22, 0x90, 0x01, 0x5F, 0xE4, 0xF0, 0x90, 0x01, ++0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, ++0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x5C, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, ++0xF0, 0x90, 0x06, 0x92, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x17, 0x14, 0xF0, 0xE5, 0x22, 0x54, 0x0F, ++0xC3, 0x94, 0x0C, 0x50, 0x0D, 0x12, 0x45, 0x9E, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x03, 0x12, ++0x66, 0x20, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x37, 0xE5, 0x25, 0x54, 0x03, 0x70, ++0x31, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x02, 0x50, 0x28, 0xE5, 0x25, 0x20, 0xE2, 0x23, 0xE5, ++0x25, 0x20, 0xE4, 0x1E, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x18, 0x90, 0x8B, 0x12, 0xE0, 0x70, 0x12, ++0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x04, 0xF0, 0x7F, ++0x01, 0x22, 0x7F, 0x00, 0x22, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x27, 0x90, 0x8B, 0x18, ++0xE0, 0x70, 0x21, 0x90, 0x8B, 0x17, 0xE0, 0x70, 0x1B, 0xE5, 0x23, 0x54, 0x0F, 0xD3, 0x94, 0x04, ++0x50, 0x12, 0xE5, 0x26, 0x70, 0x0E, 0x90, 0x01, 0xB9, 0xE4, 0xF0, 0x90, 0x01, 0xB8, 0x74, 0x08, ++0xF0, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xEF, 0x24, 0xFE, 0x60, 0x0B, 0x04, 0x70, 0x22, 0x90, ++0x8B, 0x19, 0x74, 0x01, 0xF0, 0x80, 0x16, 0xED, 0x70, 0x0A, 0x90, 0x8B, 0x16, 0xE0, 0x90, 0x8B, ++0x19, 0xF0, 0x80, 0x05, 0x90, 0x8B, 0x19, 0xED, 0xF0, 0x90, 0x8B, 0x19, 0xE0, 0x90, 0x8B, 0x0B, ++0xF0, 0x22, 0x90, 0x01, 0x37, 0x74, 0x02, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, ++0x2D, 0xEF, 0x70, 0x06, 0x90, 0x01, 0xC8, 0x74, 0xFD, 0xF0, 0x7D, 0x02, 0x7F, 0x03, 0x12, 0x36, ++0xE6, 0x12, 0x7A, 0x6D, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x02, 0x22, 0xEF, 0x60, 0x0F, 0x74, 0x21, ++0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, 0x21, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x54, 0xBF, 0xF0, 0xEF, 0x60, 0x0A, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0xE4, 0xFF, 0x12, 0x48, 0xB3, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x0C, 0x22, 0x90, 0x04, 0x1D, 0xE0, 0x70, 0x14, 0x90, 0x8A, 0xF8, ++0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x5F, 0xDE, 0x8E, 0x69, 0x8F, 0x6A, 0x90, 0x04, 0x1F, 0x74, 0x20, ++0xF0, 0x22, 0x90, 0x8B, 0x52, 0xEF, 0xF0, 0x12, 0x4F, 0xED, 0x90, 0x8B, 0x52, 0xE0, 0x60, 0x05, ++0x90, 0x05, 0x22, 0xE4, 0xF0, 0x53, 0x22, 0xF0, 0x43, 0x22, 0x04, 0x22, 0x90, 0x06, 0x04, 0xE0, ++0x44, 0x40, 0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x05, 0x7F, 0x01, 0x12, 0x48, 0xB3, 0x53, 0x22, 0xF0, ++0x43, 0x22, 0x04, 0x22, 0xE5, 0x23, 0x30, 0xE6, 0x12, 0xE5, 0x23, 0x54, 0x0F, 0xFF, 0x90, 0x01, ++0x2F, 0xE0, 0x54, 0x80, 0x4F, 0x64, 0x80, 0xF0, 0x53, 0x23, 0xBF, 0x22, 0x90, 0x8B, 0x2C, 0xE0, ++0x30, 0xE0, 0x05, 0xAF, 0x23, 0x02, 0x66, 0x65, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x22, ++0x53, 0x22, 0xF0, 0x43, 0x22, 0x01, 0x12, 0x4B, 0x5A, 0x12, 0x4B, 0x5B, 0x53, 0x22, 0xF0, 0x43, ++0x22, 0x02, 0x22, 0x41, 0x8A, 0xF6, 0x00, 0x41, 0x8B, 0x05, 0x00, 0x41, 0x8B, 0x51, 0x00, 0x41, ++0x8B, 0x53, 0x00, 0x00, 0x90, 0x04, 0x1B, 0xE0, 0x54, 0x7F, 0x64, 0x7F, 0x7F, 0x01, 0x60, 0x02, ++0x7F, 0x00, 0x22, 0xE4, 0x90, 0x8B, 0x1B, 0xF0, 0x90, 0x8B, 0x0C, 0xF0, 0xF5, 0x25, 0x22, 0x90, ++0x8B, 0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, 0x22, 0x22, 0xF0, 0x90, 0x8B, 0x0F, ++0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x58, 0x7E, 0x01, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x3D, 0xE0, 0xFB, 0xA3, 0xE0, 0xF5, 0x44, 0xE4, 0xF5, 0x45, 0x12, ++0x35, 0xAB, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, ++0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, ++0xC0, 0x06, 0xC0, 0x07, 0x75, 0x0E, 0x00, 0x90, 0x01, 0xC4, 0x74, 0x87, 0xF0, 0x74, 0x4B, 0xA3, ++0xF0, 0x53, 0x91, 0xDF, 0x90, 0x01, 0x3C, 0xE0, 0x55, 0x30, 0xF5, 0x34, 0xA3, 0xE0, 0x55, 0x31, ++0xF5, 0x35, 0xA3, 0xE0, 0x55, 0x32, 0xF5, 0x36, 0xA3, 0xE0, 0x55, 0x33, 0xF5, 0x37, 0xE5, 0x34, ++0x30, 0xE0, 0x51, 0x90, 0x01, 0x3C, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x1F, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x34, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, ++0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x1D, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x16, 0x90, 0x8B, ++0x2E, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, ++0x70, 0x02, 0xD1, 0x56, 0xE5, 0x34, 0x30, 0xE1, 0x08, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x11, ++0x60, 0xE5, 0x34, 0x30, 0xE2, 0x28, 0x90, 0x01, 0x3C, 0x74, 0x04, 0xF0, 0x90, 0x06, 0x92, 0xE0, ++0x30, 0xE0, 0x14, 0x90, 0x8B, 0x3D, 0xE4, 0x71, 0x5C, 0x90, 0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, ++0x06, 0x92, 0x74, 0x01, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x18, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, ++0x30, 0xE3, 0x38, 0x90, 0x01, 0x3C, 0x74, 0x08, 0xF0, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x24, ++0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x0F, 0xE0, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, ++0x7F, 0x5C, 0x7E, 0x01, 0x71, 0x6C, 0x90, 0x01, 0x5F, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, ++0x02, 0xF0, 0x80, 0x07, 0x90, 0x8B, 0x17, 0xE4, 0xF0, 0x51, 0xFC, 0xE5, 0x34, 0x30, 0xE4, 0x09, ++0x90, 0x01, 0x3C, 0x74, 0x10, 0xF0, 0x12, 0x52, 0x3C, 0xE5, 0x34, 0x30, 0xE5, 0x06, 0x90, 0x01, ++0x3C, 0x74, 0x20, 0xF0, 0xE5, 0x35, 0x30, 0xE0, 0x10, 0x90, 0x01, 0x3D, 0x74, 0x01, 0xF0, 0x90, ++0x00, 0x83, 0xE0, 0xF5, 0x23, 0x51, 0xE4, 0x51, 0xFC, 0xE5, 0x35, 0x30, 0xE2, 0x06, 0x90, 0x01, ++0x3D, 0x74, 0x04, 0xF0, 0xE5, 0x35, 0x30, 0xE4, 0x1B, 0x90, 0x01, 0x3D, 0x74, 0x10, 0xF0, 0x90, ++0x8B, 0x05, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, 0x53, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0x05, ++0xFD, 0xE0, 0x04, 0xF0, 0xE5, 0x36, 0x30, 0xE0, 0x75, 0x90, 0x01, 0x3E, 0x74, 0x01, 0xF0, 0x90, ++0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x18, 0x90, 0x8B, 0x36, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, ++0x03, 0x60, 0x0B, 0x7F, 0x01, 0xB1, 0xE0, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0xD1, 0x89, 0x90, 0x8B, ++0x2C, 0xE0, 0x30, 0xE0, 0x49, 0x90, 0x8B, 0x30, 0xE4, 0xF0, 0xFF, 0xB1, 0xE0, 0xEF, 0x60, 0x3E, ++0x12, 0x65, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, 0x32, 0xEF, 0xB4, 0x04, 0x02, ++0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, 0x80, 0x14, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x05, 0x7F, ++0x01, 0x12, 0x7B, 0x49, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x12, 0x66, 0x20, 0xE5, 0x36, ++0x30, 0xE1, 0x47, 0x90, 0x01, 0x3E, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, 0xE0, 0x19, ++0x90, 0x8B, 0x36, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x33, 0xE0, 0x64, 0x03, 0x60, 0x0B, 0x7F, 0x01, ++0xB1, 0xE0, 0xEF, 0x70, 0x04, 0x7F, 0x02, 0xD1, 0x89, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x1A, ++0x90, 0x8B, 0x30, 0x74, 0x01, 0xF0, 0x12, 0x7D, 0xBE, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, ++0x09, 0xE4, 0xFF, 0xB1, 0xE0, 0xEF, 0x70, 0x02, 0xD1, 0x56, 0x74, 0x87, 0x04, 0x90, 0x01, 0xC4, ++0xF0, 0x74, 0x4B, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, ++0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, ++0xEF, 0x64, 0x01, 0x70, 0x3D, 0x90, 0x8B, 0x35, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, ++0x08, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x34, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, ++0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0B, 0xEF, 0xC4, 0x13, 0x54, ++0x07, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x36, 0xE0, 0x7F, 0x01, 0x60, 0x36, 0x7F, ++0x00, 0x22, 0x90, 0x8B, 0x2F, 0xE0, 0x60, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x08, 0xE0, 0x60, ++0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2E, 0xE0, 0x60, 0x03, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x2C, ++0xE0, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x30, 0xE0, 0x7F, ++0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x0D, 0xE0, 0x60, 0x16, 0x90, 0x8B, 0x2D, 0xE0, ++0x70, 0x04, 0x7F, 0x05, 0x80, 0x1F, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x01, 0x70, 0x1A, 0x7F, 0x02, ++0x80, 0x13, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0x7F, 0x03, 0x80, 0x08, 0x90, 0x8B, 0x2D, ++0xE0, 0x70, 0x05, 0x7F, 0x04, 0x12, 0x7B, 0x49, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8B, 0x33, 0xE0, 0x90, 0x8B, 0x55, 0xF0, 0x6F, 0x70, 0x02, 0xE1, 0x55, 0xEF, 0x14, 0x60, ++0x3B, 0x14, 0x60, 0x5F, 0x14, 0x70, 0x02, 0xE1, 0x30, 0x24, 0x03, 0x60, 0x02, 0xE1, 0x55, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x04, 0xF1, 0xC0, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x02, ++0x04, 0xF1, 0xAD, 0xE1, 0x55, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, 0x04, 0xF1, 0xC4, 0xE1, 0x55, ++0x90, 0x8B, 0x55, 0xE0, 0x64, 0x01, 0x70, 0x7D, 0xF1, 0xAF, 0x80, 0x79, 0x90, 0x8B, 0x55, 0xE0, ++0xFF, 0xB4, 0x03, 0x04, 0xF1, 0xC8, 0x80, 0x6D, 0xEF, 0xB4, 0x02, 0x04, 0xF1, 0xA0, 0x80, 0x65, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0xD3, 0x80, 0x59, 0xEF, 0x70, 0x56, 0xF1, ++0x8D, 0x80, 0x52, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x03, 0x05, 0x12, 0x7A, 0x5E, 0x80, 0x46, 0x90, ++0x8B, 0x55, 0xE0, 0xB4, 0x01, 0x04, 0xF1, 0x71, 0x80, 0x3B, 0x90, 0x8B, 0x55, 0xE0, 0xB4, 0x04, ++0x05, 0x12, 0x7B, 0x37, 0x80, 0x2F, 0x90, 0x8B, 0x55, 0xE0, 0x70, 0x29, 0xF1, 0x6F, 0x80, 0x25, ++0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x01, 0x04, 0xF1, 0x5A, 0x80, 0x19, 0xEF, 0xB4, 0x02, 0x04, ++0xF1, 0x6B, 0x80, 0x11, 0x90, 0x8B, 0x55, 0xE0, 0xFF, 0xB4, 0x04, 0x04, 0xF1, 0x5A, 0x80, 0x05, ++0xEF, 0x70, 0x02, 0xF1, 0x67, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x05, 0x22, 0x74, 0x6F, 0xF0, ++0x90, 0x8B, 0x33, 0x74, 0x03, 0xF0, 0x22, 0xF1, 0x8D, 0x80, 0xEF, 0xF1, 0xED, 0x80, 0xEB, 0xF1, ++0x8D, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, 0x7E, 0x2D, 0xEF, 0x70, 0x06, 0x90, 0x01, 0xC8, ++0x74, 0xFD, 0xF0, 0x12, 0x7A, 0x6D, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x01, 0x3E, ++0x74, 0x03, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x37, 0x00, 0x90, 0x8B, 0x33, 0x74, 0x01, 0xF0, 0x22, ++0xF1, 0xED, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, 0xF1, 0xA0, 0x7D, ++0x03, 0x7F, 0x02, 0x12, 0x36, 0x92, 0x90, 0x05, 0x27, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0xF0, 0x22, ++0xF1, 0xC8, 0x80, 0xEB, 0xF1, 0xD3, 0x80, 0xE7, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, ++0x04, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x33, 0x04, 0xF0, 0x22, 0xF1, 0x8D, ++0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x8B, 0x1C, ++0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x78, 0x7E, 0x08, 0x12, 0x2F, 0xD9, ++0x90, 0x8B, 0x20, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x04, 0x7E, 0x0C, ++0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x24, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, ++0x00, 0x7E, 0x08, 0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x28, 0x12, 0x43, 0x53, 0x90, 0x80, 0x85, 0x12, ++0x2A, 0x7F, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2F, 0xD9, 0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, ++0x03, 0x2D, 0x95, 0xE4, 0xFD, 0xFF, 0x12, 0x34, 0x81, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x11, ++0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x03, 0x2D, 0x95, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x34, ++0x81, 0x22, 0x90, 0x02, 0x84, 0xEF, 0xF0, 0xA3, 0xEE, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x22, 0xEF, ++0x8E, 0xF0, 0x12, 0x43, 0xBA, 0x50, 0x8D, 0x00, 0x40, 0x50, 0xB5, 0x00, 0x80, 0x50, 0xE0, 0x01, ++0x00, 0x50, 0xF4, 0x02, 0x00, 0x51, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x51, 0x29, 0xED, 0x54, 0x3F, ++0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x00, 0x7F, 0x40, 0xEF, 0x2D, 0xFF, 0xEE, 0x3C, 0xFE, ++0xEF, 0x78, 0x06, 0xCE, 0xC3, 0x13, 0xCE, 0x13, 0xD8, 0xF9, 0x78, 0x06, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0x80, 0x26, 0xED, 0x54, 0x7F, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x00, ++0x7F, 0x80, 0xEF, 0x2D, 0xFF, 0xEE, 0x3C, 0xFE, 0xEF, 0x78, 0x07, 0xCE, 0xC3, 0x13, 0xCE, 0x13, ++0xD8, 0xF9, 0x78, 0x07, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFD, 0xAC, 0x06, 0x80, 0x49, ++0xED, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x01, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x7D, ++0x00, 0xFC, 0x80, 0x35, 0xEC, 0x54, 0x01, 0x4D, 0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x02, ++0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0xC3, 0x13, 0x7D, 0x00, 0x80, 0x1A, 0xEC, 0x54, 0x03, 0x4D, ++0x70, 0x04, 0xFE, 0xFF, 0x80, 0x04, 0x7E, 0x04, 0x7F, 0x00, 0xEF, 0x2D, 0xEE, 0x3C, 0x13, 0x13, ++0x54, 0x3F, 0x7D, 0x00, 0x25, 0xE0, 0x25, 0xE0, 0xFC, 0xAE, 0x04, 0xAF, 0x05, 0x22, 0x90, 0x01, ++0xE4, 0x74, 0x58, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x22, 0xE4, 0x90, 0x8A, 0xCC, 0xF0, 0xA3, 0xF0, ++0x75, 0x8E, 0x02, 0x91, 0x81, 0x12, 0x67, 0x0E, 0x90, 0x8B, 0x07, 0xEF, 0xF0, 0x12, 0x67, 0x1B, ++0x90, 0x8B, 0x09, 0xEF, 0xF0, 0x12, 0x67, 0x27, 0x90, 0x8A, 0xF4, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0xF5, 0x55, 0xF5, 0x21, 0x12, 0x71, 0x16, 0x12, 0x44, 0x9E, 0x12, 0x32, 0x3D, 0x7F, 0x03, ++0x12, 0x76, 0xAB, 0x12, 0x7A, 0x5A, 0x12, 0x66, 0xD4, 0x12, 0x67, 0x3F, 0x12, 0x67, 0x54, 0x12, ++0x66, 0xF2, 0x12, 0x67, 0x0D, 0x90, 0x8A, 0xCE, 0xE5, 0xD9, 0xF0, 0x31, 0xD2, 0xC2, 0xAF, 0x90, ++0x00, 0x80, 0xE0, 0x44, 0x40, 0xF0, 0x51, 0x81, 0x75, 0xE8, 0x03, 0x43, 0xA8, 0x85, 0xD2, 0xAF, ++0x31, 0x2E, 0x90, 0x8A, 0xCC, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0x39, 0x90, 0x01, 0xC4, 0xF0, 0x74, ++0x51, 0xA3, 0xF0, 0xE5, 0x55, 0x30, 0xE4, 0x09, 0xC2, 0xAF, 0x53, 0x55, 0xEF, 0xD2, 0xAF, 0xB1, ++0xCC, 0xE5, 0x55, 0x30, 0xE6, 0xDC, 0xC2, 0xAF, 0x53, 0x55, 0xBF, 0xD2, 0xAF, 0x12, 0x68, 0x42, ++0x80, 0xD0, 0x90, 0x01, 0x3C, 0x74, 0xFF, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xF0, ++0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x54, 0x31, 0xFB, 0x7D, 0xFF, 0x7F, 0x55, 0x31, ++0xFB, 0x7D, 0xFF, 0x7F, 0x56, 0x31, 0xFB, 0x7D, 0xFF, 0x7F, 0x57, 0xD3, 0x10, 0xAF, 0x01, 0xC3, ++0xC0, 0xD0, 0x8F, 0x82, 0x75, 0x83, 0x00, 0xED, 0xF0, 0x51, 0x81, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x01, 0x30, 0xE4, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x01, 0x38, 0xF0, 0xA3, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xFD, 0x7F, 0x50, 0x31, 0xFB, 0xE4, 0xFD, 0x7F, 0x51, 0x31, 0xFB, ++0xE4, 0xFD, 0x7F, 0x52, 0x31, 0xFB, 0xE4, 0xFD, 0x7F, 0x53, 0x80, 0xBF, 0xE5, 0x5E, 0x64, 0x01, ++0x70, 0x3B, 0x71, 0xC1, 0xBF, 0x01, 0x04, 0x7F, 0x01, 0x71, 0xB5, 0x90, 0x00, 0x46, 0xE0, 0x44, ++0x04, 0xFD, 0x7F, 0x46, 0x31, 0xFB, 0x90, 0x00, 0x44, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x44, 0x31, ++0xFB, 0x90, 0x00, 0x46, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x46, 0x31, 0xFB, 0x7F, 0x02, 0x71, 0xDD, ++0x8F, 0x62, 0x90, 0x01, 0xC9, 0xE5, 0x62, 0xF0, 0xB4, 0x01, 0x02, 0x71, 0x55, 0x22, 0xE0, 0x5F, ++0xF0, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x7F, 0x10, 0xDF, 0xFE, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xE0, 0xED, 0xF0, 0x90, 0x8A, 0xDF, ++0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x4E, 0xA3, 0xE0, 0x70, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x47, ++0xE0, 0x5F, 0xF0, 0x80, 0x17, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xFF, 0x90, 0x00, 0x47, 0xE0, 0x4F, 0xF0, 0x51, 0x81, 0x90, 0x8A, ++0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, ++0x90, 0x00, 0x46, 0x80, 0x59, 0x90, 0x8A, 0xDF, 0xE0, 0x24, 0xF8, 0xF0, 0xA3, 0xE0, 0x70, 0x1D, ++0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, ++0xC4, 0x54, 0xF0, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x80, 0x1A, 0x90, 0x8A, 0xDF, ++0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xC4, 0x54, 0xF0, ++0xFF, 0x90, 0x00, 0x43, 0xE0, 0x4F, 0xF0, 0x51, 0x81, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0x01, ++0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0x51, 0x7E, ++0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x49, 0xE0, 0x90, 0x8B, 0x54, 0xF0, 0xE0, 0x54, 0x0F, ++0xF0, 0x44, 0xF0, 0xFD, 0x7F, 0x49, 0x31, 0xFB, 0x90, 0x8B, 0x54, 0xE0, 0x44, 0xB0, 0xFD, 0x7F, ++0x49, 0x21, 0xFB, 0x90, 0x8A, 0xDD, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0x5E, 0x01, 0x8E, 0x5F, ++0xF5, 0x60, 0xE4, 0xFD, 0x7F, 0x0B, 0x51, 0x91, 0xE4, 0xFD, 0x7F, 0x02, 0x51, 0x91, 0x71, 0xC1, ++0xE4, 0xFF, 0x71, 0xB5, 0xE4, 0xF5, 0x62, 0x90, 0x01, 0xC9, 0xE5, 0x62, 0xF0, 0x90, 0x8A, 0xDD, ++0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFB, 0x8D, 0x44, 0xE4, 0xF5, 0x45, 0x7D, 0x01, 0x7F, 0x60, ++0x7E, 0x01, 0x02, 0x35, 0xAB, 0x90, 0x01, 0xCA, 0xE5, 0x61, 0xF0, 0xEF, 0x60, 0x02, 0x71, 0x55, ++0x22, 0x7F, 0x0B, 0x71, 0xDD, 0xEF, 0x65, 0x61, 0x60, 0x10, 0xE5, 0x61, 0xB4, 0x01, 0x05, 0xE4, ++0xF5, 0x61, 0x80, 0x03, 0x75, 0x61, 0x01, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0xD3, 0x10, 0xAF, ++0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x57, 0xEF, 0xF0, 0xD3, 0x94, 0x07, 0x50, 0x43, 0xE0, 0xFF, ++0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x46, ++0x51, 0x7E, 0x90, 0x8B, 0x57, 0xE0, 0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, ++0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x00, 0x44, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, ++0x5B, 0xA8, 0x05, 0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0x80, ++0x4B, 0x90, 0x8B, 0x57, 0xE0, 0x24, 0xF8, 0xF0, 0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, ++0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0xFF, 0x90, 0x00, 0x43, 0xE0, 0x5F, 0xF0, 0x51, 0x81, 0x90, ++0x8B, 0x57, 0xE0, 0xFD, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x05, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x00, 0x42, 0xE0, 0xFB, 0xE4, 0xFE, 0xEF, 0x5B, 0xA8, 0x05, ++0x08, 0x80, 0x06, 0xCE, 0xA2, 0xE7, 0x13, 0xCE, 0x13, 0xD8, 0xF8, 0xFF, 0xD0, 0xD0, 0x92, 0xAF, ++0x22, 0xE4, 0x90, 0x8B, 0x04, 0xF0, 0x90, 0x00, 0x80, 0xE0, 0x44, 0x80, 0xFD, 0x7F, 0x80, 0x21, ++0xFB, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0x90, 0x8A, ++0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFA, 0xE5, 0xF0, 0x24, 0x00, 0xFF, ++0xE4, 0x3A, 0xFE, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEE, 0x8F, 0xF0, 0x12, ++0x43, 0x19, 0x12, 0x29, 0xD9, 0xFF, 0x60, 0x2C, 0xB5, 0x5E, 0x16, 0x90, 0x8A, 0xDA, 0x12, 0x43, ++0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0x65, 0x60, 0x70, 0x04, 0xE5, 0x5F, 0x65, 0xF0, 0x60, ++0x22, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0xC2, 0xFF, 0xAE, 0xF0, ++0x71, 0x73, 0x80, 0x0F, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0x65, 0x5E, 0x60, ++0x02, 0xB1, 0x08, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xF5, 0x5E, 0x7F, 0x60, 0x7E, 0x01, 0x8F, ++0x82, 0x8E, 0x83, 0xA3, 0xA3, 0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x8B, 0xEF, ++0x12, 0x43, 0x94, 0x55, 0x5A, 0x01, 0x55, 0x51, 0x02, 0x55, 0x7E, 0x03, 0x55, 0x87, 0x05, 0x55, ++0x90, 0x06, 0x55, 0xCB, 0x07, 0x55, 0x98, 0x08, 0x55, 0xA1, 0x09, 0x55, 0xA9, 0x20, 0x55, 0xB2, ++0x2C, 0x55, 0x63, 0x2D, 0x55, 0x6C, 0x2E, 0x55, 0x75, 0x3B, 0x55, 0xBB, 0x4B, 0x00, 0x00, 0x55, ++0xC4, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x72, 0xFC, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, ++0x02, 0x73, 0x02, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x73, 0x2F, 0x90, 0x8A, 0xD7, 0x12, ++0x43, 0x6B, 0x02, 0x73, 0x77, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x73, 0xB0, 0x90, 0x8A, ++0xD7, 0x12, 0x43, 0x6B, 0x02, 0x73, 0xC9, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x72, 0xD0, ++0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0xE1, 0x19, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x74, ++0x11, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x81, 0x91, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, ++0x76, 0xEA, 0x90, 0x8A, 0xD7, 0x12, 0x43, 0x6B, 0x02, 0x78, 0xDE, 0x90, 0x8A, 0xD7, 0x12, 0x43, ++0x6B, 0x02, 0x7A, 0x48, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x01, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, ++0xC3, 0xC0, 0xD0, 0x90, 0x01, 0xCC, 0xE0, 0x54, 0x0F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, ++0xE0, 0xFD, 0x70, 0x02, 0xE1, 0x14, 0x90, 0x8B, 0x51, 0xE0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, ++0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xEF, 0x5D, 0x70, 0x02, ++0xE1, 0x0D, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD0, 0x12, 0x43, 0x5F, 0xE0, ++0x90, 0x8A, 0xD0, 0xF0, 0x75, 0x1D, 0x01, 0x75, 0x1E, 0x8A, 0x75, 0x1F, 0xD0, 0x75, 0x20, 0x01, ++0x7B, 0x01, 0x7A, 0x8A, 0x79, 0xD1, 0x12, 0x5F, 0x57, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, ++0x13, 0x13, 0x54, 0x01, 0x90, 0x8B, 0x51, 0x30, 0xE0, 0x59, 0xE0, 0x75, 0xF0, 0x02, 0x90, 0x00, ++0x88, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD2, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x02, ++0x90, 0x00, 0x89, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD3, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, ++0xF0, 0x04, 0x90, 0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD4, 0xF0, 0x90, 0x8B, 0x51, ++0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD5, 0xF0, 0x90, ++0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD6, ++0xF0, 0x80, 0x33, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD1, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, ++0xD2, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD2, 0x12, 0x43, 0x5F, 0xE0, ++0x90, 0x8A, 0xD3, 0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x75, 0xF0, 0x04, 0x90, 0x01, 0xD3, 0x12, 0x43, ++0x5F, 0xE0, 0x90, 0x8A, 0xD4, 0xF0, 0xEF, 0x54, 0x7F, 0xFF, 0x7B, 0x01, 0x7A, 0x8A, 0x79, 0xD2, ++0xB1, 0x19, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x90, 0x8B, 0x51, 0xE0, 0xFE, 0x74, 0x01, 0xA8, 0x06, ++0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0xF4, 0x5F, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8B, 0x51, ++0xE0, 0xFF, 0x74, 0x01, 0xA8, 0x07, 0x08, 0x80, 0x02, 0xC3, 0x33, 0xD8, 0xFC, 0x90, 0x01, 0xCC, ++0xF0, 0x90, 0x8B, 0x51, 0xE0, 0x04, 0xF0, 0xE0, 0x54, 0x03, 0xF0, 0xA1, 0xDD, 0x90, 0x01, 0xC6, ++0xE0, 0x44, 0x02, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, 0xFF, ++0x54, 0x1F, 0xFE, 0xEF, 0x54, 0x20, 0xC4, 0x13, 0x54, 0x07, 0xFD, 0xAF, 0x06, 0x90, 0x8A, 0xDA, ++0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, ++0x00, 0x03, 0x12, 0x42, 0x20, 0x54, 0xF0, 0xC4, 0x54, 0x0F, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x00, ++0x04, 0x12, 0x42, 0x20, 0x54, 0x40, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x8A, 0xE0, 0xF0, 0x90, ++0x8A, 0xDA, 0xE0, 0xFF, 0x75, 0xF0, 0x09, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0xAD, 0x82, 0xAC, ++0x83, 0x90, 0x8A, 0xE1, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, 0x75, 0xF0, 0x09, 0xA4, 0x24, 0x23, ++0xF9, 0x74, 0x87, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xA3, 0x12, 0x43, 0x8B, 0x90, 0x8A, 0xDC, 0x12, ++0x43, 0x6B, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0x54, 0x0F, 0xFF, 0x90, 0x8A, 0xE3, 0x12, 0x43, ++0x6B, 0xEF, 0x12, 0x42, 0x4D, 0x90, 0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x02, 0x12, 0x42, ++0x20, 0xFF, 0x90, 0x8A, 0xE3, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x90, ++0x8A, 0xDC, 0x12, 0x43, 0x6B, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xEF, 0xF0, 0x12, 0x29, 0xD9, 0x8D, 0x82, 0x8C, ++0x83, 0xA3, 0xF0, 0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x24, 0xC1, 0xF5, ++0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xDB, 0xE0, 0xFE, 0x75, 0xF0, 0x09, ++0xEF, 0x90, 0x87, 0x29, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, ++0x12, 0x43, 0x5F, 0x74, 0x01, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFE, 0x75, 0xF0, 0x09, 0xEF, 0x90, ++0x87, 0x2B, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0x8F, 0x0F, 0xEF, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, ++0xE4, 0x34, 0x89, 0xAF, 0x82, 0xF5, 0x10, 0x8F, 0x11, 0xE5, 0x0F, 0x75, 0xF0, 0x02, 0xA4, 0x24, ++0x81, 0xF9, 0x74, 0x86, 0x35, 0xF0, 0x75, 0x12, 0x01, 0xF5, 0x13, 0x89, 0x14, 0x75, 0xF0, 0x09, ++0xE5, 0x0F, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0xAF, 0x82, 0x85, 0x83, 0x15, 0x8F, 0x16, 0xE5, ++0x0F, 0x75, 0xF0, 0x09, 0xA4, 0x24, 0x23, 0xF9, 0x74, 0x87, 0x35, 0xF0, 0x75, 0x17, 0x01, 0xF5, ++0x18, 0x89, 0x19, 0x74, 0xC1, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x12, ++0x43, 0x94, 0x58, 0xA7, 0x00, 0x58, 0xBC, 0x01, 0x58, 0xD1, 0x02, 0x58, 0xE6, 0x03, 0x59, 0x0F, ++0x04, 0x59, 0x24, 0x05, 0x59, 0x39, 0x06, 0x59, 0x5F, 0x0C, 0x59, 0x8C, 0x0D, 0x59, 0xB9, 0x0E, ++0x59, 0xE6, 0x0F, 0x00, 0x00, 0x5A, 0x1A, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, ++0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x15, 0x80, 0x3C, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0x74, 0x10, 0x80, ++0x27, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0xF0, ++0xF0, 0xA3, 0x74, 0x05, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0x74, 0xF0, 0xF0, 0xA3, 0xE4, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, ++0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0x8F, 0xF0, 0x41, 0x1A, 0xE5, ++0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0x74, 0x0F, 0xF0, 0xA3, ++0x74, 0xF5, 0x80, 0x27, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0x74, 0x0F, 0xF0, 0xA3, 0x74, 0xF0, 0x80, 0x12, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, ++0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0x74, 0x0D, 0xF0, 0xE5, 0x0F, 0x25, 0xE0, ++0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x41, 0x1A, 0x90, ++0x04, 0x47, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x46, 0xE0, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x45, 0xE0, ++0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x44, 0x41, 0x11, 0x90, 0x04, 0x4B, 0xE0, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x4A, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x49, 0xE0, 0x85, 0x11, 0x82, ++0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, 0x48, 0x80, 0x58, 0x90, 0x04, 0x4F, 0xE0, 0xAB, 0x12, 0xAA, ++0x13, 0xA9, 0x14, 0x12, 0x42, 0x4D, 0x90, 0x04, 0x4E, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x90, 0x00, 0x01, 0x12, 0x42, 0x5F, 0x90, 0x04, 0x4D, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, ++0xF0, 0x90, 0x04, 0x4C, 0x80, 0x2B, 0x90, 0x04, 0x53, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0x12, 0x42, 0x4D, 0x90, 0x04, 0x52, 0xE0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x01, ++0x12, 0x42, 0x5F, 0x90, 0x04, 0x51, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xF0, 0x90, 0x04, ++0x50, 0xE0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, ++0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x29, 0xD9, 0xFF, 0xAB, 0x17, 0xAA, 0x18, 0xA9, 0x19, ++0x12, 0x29, 0xD9, 0x5F, 0xD0, 0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x42, 0x4D, 0xAB, 0x12, 0xE5, ++0x14, 0x24, 0x01, 0xF9, 0xE4, 0x35, 0x13, 0xFA, 0xC0, 0x03, 0xC0, 0x02, 0xC0, 0x01, 0x12, 0x29, ++0xD9, 0xFF, 0xAB, 0x17, 0xAA, 0x18, 0xA9, 0x19, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x5F, 0xD0, ++0x01, 0xD0, 0x02, 0xD0, 0x03, 0x12, 0x42, 0x4D, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xC0, 0x83, ++0xC0, 0x82, 0xE0, 0xFF, 0x85, 0x16, 0x82, 0x85, 0x15, 0x83, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, ++0xD0, 0x83, 0xF0, 0x85, 0x11, 0x82, 0x85, 0x10, 0x83, 0xA3, 0xC0, 0x83, 0xC0, 0x82, 0xE0, 0xFF, ++0x85, 0x16, 0x82, 0x85, 0x15, 0x83, 0xA3, 0xE0, 0xFE, 0xEF, 0x5E, 0xD0, 0x82, 0xD0, 0x83, 0xF0, ++0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, ++0xE0, 0x4E, 0x60, 0x4B, 0x90, 0x8A, 0xE6, 0x74, 0x0B, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, ++0x94, 0x00, 0x50, 0x02, 0x61, 0x5F, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, ++0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, ++0x34, 0x86, 0xF5, 0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x0A, 0x90, 0x8A, 0xE6, ++0xE0, 0x24, 0x10, 0xA3, 0xF0, 0x80, 0x68, 0x90, 0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBB, 0xE5, ++0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, ++0x4E, 0x60, 0x47, 0x90, 0x8A, 0xE6, 0x74, 0x0F, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, ++0x00, 0x40, 0x3C, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, ++0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x08, 0x90, 0x8A, 0xE6, 0xE0, 0xA3, 0xF0, ++0x80, 0x0D, 0x90, 0x8A, 0xE6, 0xE0, 0x14, 0xF0, 0x80, 0xBF, 0xE4, 0x90, 0x8A, 0xE7, 0xF0, 0xE5, ++0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, ++0x4E, 0x60, 0x46, 0xE4, 0x90, 0x8A, 0xE6, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x10, ++0x40, 0x02, 0x81, 0x18, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, ++0xF5, 0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x06, 0x90, 0x8A, 0xE6, 0xE0, 0x80, ++0x63, 0x90, 0x8A, 0xE6, 0xE0, 0x04, 0xF0, 0x80, 0xBF, 0xE5, 0x0F, 0x25, 0xE0, 0x24, 0x81, 0xF5, ++0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFE, 0xA3, 0xE0, 0x4E, 0x60, 0x46, 0xE4, 0x90, 0x8A, ++0xE6, 0xF0, 0x90, 0x8A, 0xE6, 0xE0, 0xFF, 0xC3, 0x94, 0x0C, 0x50, 0x3C, 0x74, 0x01, 0x7E, 0x00, ++0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0xE5, 0x0F, 0x25, ++0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, ++0x4E, 0x60, 0x08, 0x90, 0x8A, 0xE6, 0xE0, 0x24, 0x10, 0x80, 0x09, 0x90, 0x8A, 0xE6, 0xE0, 0x04, ++0xF0, 0x80, 0xBF, 0xE4, 0x90, 0x8A, 0xE8, 0xF0, 0x90, 0x8A, 0xE7, 0xE0, 0xFF, 0x75, 0xF0, 0x09, ++0xE5, 0x0F, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xEF, 0xF0, 0x90, 0x8A, 0xE8, 0xE0, 0xFE, 0x75, ++0xF0, 0x09, 0xE5, 0x0F, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xE5, 0x0F, 0xC3, 0x94, ++0x20, 0x50, 0x32, 0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0xD3, ++0x9F, 0x40, 0x02, 0x80, 0x18, 0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, ++0xE0, 0xC3, 0x9E, 0x50, 0x08, 0x90, 0x8A, 0xE8, 0xE0, 0xA3, 0xF0, 0x80, 0x08, 0x90, 0x8A, 0xE7, ++0xE0, 0x90, 0x8A, 0xE9, 0xF0, 0x90, 0x8A, 0xE9, 0xE0, 0xFD, 0xAF, 0x0F, 0x91, 0xC1, 0x90, 0x8A, ++0xE9, 0xE0, 0xFF, 0x74, 0x84, 0x25, 0x0F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, ++0x90, 0x8A, 0xE7, 0xE0, 0xFF, 0xD3, 0x94, 0x13, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x03, 0xF0, ++0x22, 0xEF, 0xD3, 0x94, 0x0B, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x02, 0xF0, 0x22, 0xEF, 0xD3, ++0x94, 0x03, 0x40, 0x07, 0x90, 0x87, 0x22, 0x74, 0x01, 0xF0, 0x22, 0xE4, 0x90, 0x87, 0x22, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, ++0xF5, 0x83, 0xED, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAC, 0x07, 0xED, 0x54, 0x1F, 0x90, 0x8A, ++0xC7, 0xF0, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xC5, ++0xF0, 0x90, 0x8A, 0xC8, 0x74, 0x01, 0xF0, 0xEB, 0xC3, 0x94, 0x01, 0x40, 0x02, 0x80, 0x37, 0x90, ++0x8A, 0xC5, 0xE0, 0x25, 0x0D, 0xFF, 0xA3, 0xF0, 0xA3, 0xE0, 0x90, 0x41, 0x9E, 0x93, 0xFE, 0xEF, ++0xD3, 0x9E, 0x40, 0x10, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE4, 0xF0, ++0xAF, 0x04, 0x80, 0x9D, 0x90, 0x8A, 0xC6, 0xE0, 0xFF, 0x74, 0x01, 0x2C, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEF, 0xF0, 0x22, 0xAD, 0x07, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, ++0x43, 0x5F, 0xE0, 0xFF, 0x90, 0x8A, 0xCA, 0xF0, 0x74, 0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, ++0xF5, 0x83, 0xE0, 0x54, 0x1F, 0x90, 0x8A, 0xC9, 0xF0, 0xD3, 0x9F, 0x40, 0x06, 0xA3, 0xE0, 0x90, ++0x8A, 0xC9, 0xF0, 0x90, 0x8A, 0xC9, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, ++0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, ++0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xC9, 0xE0, 0xFD, 0x91, 0xC1, 0x90, 0x8A, ++0xC9, 0xE0, 0xFF, 0x22, 0xAC, 0x07, 0x74, 0x84, 0x2C, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, ++0xE0, 0x54, 0x7F, 0x90, 0x8A, 0xDE, 0xF0, 0xE0, 0x54, 0x1F, 0xFF, 0x90, 0x8A, 0xE1, 0xF0, 0x75, ++0xF0, 0x09, 0xEC, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xE3, 0xF0, 0x75, 0xF0, ++0x09, 0xEC, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0x90, 0x8A, 0xE4, 0xF0, 0xEC, 0x25, ++0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, ++0xE5, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xEC, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, 0x86, ++0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE7, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xEF, 0xD3, ++0x9E, 0x40, 0x0C, 0x90, 0x8A, 0xE4, 0xE0, 0x90, 0x8A, 0xE1, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0xED, ++0x70, 0x02, 0xE1, 0x06, 0x90, 0x8A, 0xE2, 0xED, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0x30, 0xE6, 0x0E, ++0x90, 0x8A, 0xE1, 0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0x14, 0xF0, 0x90, 0x8A, ++0xE2, 0xE0, 0x70, 0x02, 0xE1, 0x06, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0xD3, 0x94, 0x00, 0x50, 0x02, ++0xE1, 0x06, 0xE4, 0x90, 0x8A, 0xE0, 0xF0, 0xEF, 0x14, 0x90, 0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xE3, ++0xE0, 0xFD, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0xD3, 0x9D, 0x40, 0x6F, 0xEF, 0x94, 0x10, 0x40, 0x21, ++0xEF, 0x24, 0xF0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, ++0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE7, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x70, ++0x27, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x37, 0x74, 0x01, 0x7E, 0x00, 0xA8, ++0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE5, 0xE0, ++0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x1A, 0x90, 0x8A, 0xDF, 0xE0, 0x90, 0x8A, 0xDE, 0xF0, ++0x90, 0x8A, 0xE0, 0xE0, 0x04, 0xF0, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, 0x6F, ++0x60, 0x08, 0x90, 0x8A, 0xDF, 0xE0, 0x14, 0xF0, 0x80, 0x83, 0x90, 0x8A, 0xE2, 0xE0, 0xFF, 0x90, ++0x8A, 0xE0, 0xE0, 0xC3, 0x9F, 0x50, 0x0F, 0x90, 0x8A, 0xDF, 0xE0, 0xB5, 0x05, 0x08, 0x90, 0x8A, ++0xE3, 0xE0, 0x90, 0x8A, 0xDE, 0xF0, 0x90, 0x8A, 0xDE, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, ++0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, ++0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, ++0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xEC, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x90, 0x8A, 0xDE, 0xE0, 0xFD, 0x91, ++0xC1, 0x90, 0x8A, 0xDE, 0xE0, 0xFF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, 0x1A, ++0x8A, 0x1B, 0x89, 0x1C, 0x90, 0x8B, 0x3F, 0x12, 0x43, 0x8B, 0xAB, 0x1D, 0xAA, 0x1E, 0xA9, 0x1F, ++0x90, 0x8B, 0x42, 0x12, 0x43, 0x8B, 0xAF, 0x20, 0x15, 0x20, 0xEF, 0x60, 0x1E, 0x90, 0x8B, 0x42, ++0xE4, 0x75, 0xF0, 0x01, 0x12, 0x43, 0x74, 0x12, 0x29, 0xD9, 0xFF, 0x90, 0x8B, 0x3F, 0xE4, 0x75, ++0xF0, 0x01, 0x12, 0x43, 0x74, 0xEF, 0x12, 0x42, 0x4D, 0x80, 0xDB, 0xAB, 0x1A, 0xAA, 0x1B, 0xA9, ++0x1C, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0xC4, ++0x74, 0xA6, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0x90, 0x04, 0x1D, 0xE0, 0x60, 0x1A, 0x90, 0x05, 0x22, ++0xE0, 0x54, 0x90, 0x60, 0x07, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x01, 0xC7, 0xE0, ++0x30, 0xE1, 0xE4, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFB, 0xFA, 0xEF, 0x30, 0xE0, 0x02, 0x7B, 0x80, 0xEF, 0xC3, ++0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90, 0x04, 0x25, 0xEF, 0xF0, 0xED, 0x60, 0x1E, 0xAF, 0x03, 0x74, ++0x0F, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x74, 0x10, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x03, 0x74, 0x08, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x09, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xF0, 0xF0, 0x74, 0x21, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, ++0x83, 0xE0, 0x54, 0xF7, 0xF0, 0xAE, 0x02, 0xAF, 0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFD, 0xFC, 0xEF, 0x30, 0xE0, 0x02, 0x7D, 0x80, 0xEF, 0xC3, ++0x13, 0x90, 0xFD, 0x10, 0xF0, 0xAE, 0x04, 0xAF, 0x05, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x5F, ++0xA6, 0xBF, 0x01, 0x10, 0x90, 0x02, 0x09, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5F, 0xDE, 0x90, 0x04, ++0x1F, 0x74, 0x20, 0xF0, 0x22, 0x90, 0x01, 0x02, 0xE0, 0x54, 0x03, 0xFF, 0xE0, 0x54, 0x0C, 0x13, ++0x13, 0x54, 0x3F, 0xFE, 0xEF, 0x64, 0x01, 0x60, 0x04, 0xEF, 0xB4, 0x03, 0x0E, 0x90, 0x8A, 0xC5, ++0x74, 0x01, 0xF0, 0xA3, 0x74, 0x37, 0xF0, 0x79, 0x01, 0x80, 0x18, 0xEE, 0x64, 0x01, 0x60, 0x07, ++0xAF, 0x06, 0xEE, 0x64, 0x03, 0x70, 0x3B, 0x90, 0x8A, 0xC5, 0x74, 0x01, 0xF0, 0xA3, 0x74, 0x3D, ++0xF0, 0x79, 0x40, 0x90, 0x8A, 0xC5, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, ++0x59, 0x60, 0x08, 0xE9, 0xF0, 0xE4, 0x90, 0x8A, 0xF6, 0xF0, 0x22, 0x90, 0x8A, 0xF6, 0xE0, 0x04, ++0xF0, 0xE0, 0xC3, 0x94, 0x0A, 0x40, 0x0B, 0xE4, 0xF0, 0x90, 0x04, 0x19, 0xE0, 0x30, 0xE0, 0x02, ++0x11, 0x6E, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, ++0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, ++0x90, 0x01, 0xC4, 0x74, 0xF3, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0x90, 0x01, 0x34, 0xE0, 0x55, 0x28, ++0xF5, 0x2C, 0xA3, 0xE0, 0x55, 0x29, 0xF5, 0x2D, 0xA3, 0xE0, 0x55, 0x2A, 0xF5, 0x2E, 0xA3, 0xE0, ++0x55, 0x2B, 0xF5, 0x2F, 0xE5, 0x2C, 0x20, 0xE0, 0x02, 0x41, 0x8A, 0x90, 0x01, 0x34, 0x74, 0x01, ++0xF0, 0x85, 0xD1, 0x4D, 0x85, 0xD2, 0x4E, 0x85, 0xD3, 0x4F, 0x85, 0xD4, 0x50, 0x85, 0xD5, 0x51, ++0x85, 0xD6, 0x52, 0x85, 0xD7, 0x53, 0x85, 0xD9, 0x54, 0xE5, 0x54, 0x54, 0x40, 0xC3, 0x13, 0xFF, ++0xE5, 0x53, 0x54, 0x20, 0x6F, 0x70, 0x02, 0x41, 0x47, 0xE5, 0x54, 0x30, 0xE5, 0x02, 0x41, 0x47, ++0xE5, 0x52, 0x54, 0x1F, 0xF5, 0x08, 0xE5, 0x4D, 0x54, 0x3F, 0xF5, 0x09, 0xE5, 0x51, 0x54, 0x1F, ++0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, ++0xF0, 0x12, 0x42, 0x81, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0xC0, 0xF5, ++0x82, 0xE4, 0x34, 0x85, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x09, 0xD3, 0x94, ++0x04, 0x40, 0x03, 0x75, 0x09, 0x04, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, 0x43, ++0x5F, 0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0xE5, 0x53, ++0x54, 0x1F, 0x2F, 0xFF, 0xE4, 0x3E, 0xFE, 0x75, 0xF0, 0x0A, 0xE5, 0x08, 0x90, 0x84, 0x00, 0x12, ++0x43, 0x5F, 0x75, 0xF0, 0x02, 0xE5, 0x09, 0x12, 0x43, 0x5F, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0xE5, ++0x54, 0x20, 0xE6, 0x24, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, 0xE0, 0x24, 0x63, 0xF5, ++0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xE5, 0x4F, 0x30, 0xE7, ++0x36, 0xAF, 0x08, 0x12, 0x5D, 0x36, 0x80, 0x2F, 0xE5, 0x53, 0x54, 0x1F, 0xFF, 0xE5, 0x08, 0x25, ++0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE4, 0x8F, 0xF0, 0x12, 0x42, 0x81, ++0xE5, 0x4F, 0x30, 0xE7, 0x12, 0xE5, 0x4F, 0x54, 0x7F, 0xFD, 0xE5, 0x53, 0x54, 0x1F, 0xF5, 0x0D, ++0xAB, 0x09, 0xAF, 0x08, 0x12, 0x5C, 0xD9, 0xE5, 0x24, 0x14, 0x24, 0xFD, 0x50, 0x02, 0x80, 0x3A, ++0x90, 0x8B, 0x1A, 0xE0, 0x60, 0x2B, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, ++0xF0, 0x12, 0x4B, 0x34, 0xEF, 0x64, 0x01, 0x70, 0x21, 0x90, 0x8B, 0x3D, 0x12, 0x4B, 0x5C, 0x90, ++0x01, 0x5B, 0x74, 0x05, 0xF0, 0x90, 0x06, 0x92, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x18, 0xF0, 0x80, ++0x09, 0x12, 0x4B, 0x34, 0xBF, 0x01, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2C, 0x30, 0xE1, 0x20, 0x90, ++0x01, 0x34, 0x74, 0x02, 0xF0, 0x85, 0xD1, 0x56, 0x85, 0xD2, 0x57, 0x85, 0xD3, 0x58, 0x85, 0xD4, ++0x59, 0x85, 0xD5, 0x5A, 0x85, 0xD6, 0x5B, 0x85, 0xD7, 0x5C, 0x85, 0xD9, 0x5D, 0xB1, 0x5F, 0xE5, ++0x2C, 0x30, 0xE3, 0x06, 0x90, 0x01, 0x34, 0x74, 0x08, 0xF0, 0xE5, 0x2C, 0x30, 0xE4, 0x09, 0x90, ++0x01, 0x34, 0x74, 0x10, 0xF0, 0x43, 0x55, 0x10, 0xE5, 0x2C, 0x30, 0xE5, 0x26, 0x90, 0x01, 0xCF, ++0xE0, 0x30, 0xE5, 0x1F, 0xE0, 0x54, 0xDF, 0xF0, 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0x75, 0xA8, ++0x00, 0x75, 0xE8, 0x00, 0x12, 0x52, 0x10, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xF0, 0x12, 0x52, ++0x81, 0x80, 0xFE, 0xE5, 0x2C, 0x30, 0xE6, 0x2D, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0x90, 0x8B, ++0x32, 0xE0, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, 0x90, 0x8B, 0x34, 0xE4, ++0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x0C, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x05, ++0x90, 0x8B, 0x2E, 0xE4, 0xF0, 0xE5, 0x2E, 0x20, 0xE0, 0x02, 0x61, 0xE7, 0x90, 0x8B, 0x08, 0x74, ++0x01, 0xF0, 0x90, 0x01, 0x36, 0xF0, 0x90, 0x8B, 0x06, 0xE0, 0x60, 0x0F, 0xE4, 0xF0, 0x90, 0x05, ++0x53, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x05, 0xFC, 0xE0, 0x04, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0x30, ++0xE0, 0x2F, 0x90, 0x8B, 0x37, 0x74, 0x01, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xFF, 0x13, 0x13, 0x54, ++0x3F, 0x30, 0xE0, 0x1D, 0x90, 0x8B, 0x34, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0x90, 0x8B, 0x33, 0xE0, ++0x64, 0x03, 0x60, 0x0D, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x7F, 0x04, 0x12, 0x4E, ++0x89, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0x30, 0xE0, 0x56, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x4F, ++0x90, 0x8B, 0x2E, 0x74, 0x01, 0xF0, 0xB1, 0x39, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x3F, ++0xB1, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0x64, 0x06, 0x60, ++0x2E, 0xEF, 0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x04, 0xE4, 0xFF, ++0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x02, 0x05, 0x7F, 0x01, 0x12, 0x7B, 0x49, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x12, ++0x43, 0xE7, 0x90, 0x8B, 0x08, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE1, 0x2F, 0x90, 0x01, 0x36, 0x74, ++0x02, 0xF0, 0x43, 0x55, 0x40, 0x11, 0x85, 0x90, 0x8B, 0x37, 0xE0, 0xB4, 0x01, 0x09, 0x90, 0x05, ++0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x37, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x0D, 0xE4, 0xFF, ++0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0xE5, 0x2E, 0x30, 0xE2, 0x16, ++0x90, 0x01, 0x36, 0x74, 0x04, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x06, 0xA3, 0xE0, 0x64, ++0x06, 0x60, 0x03, 0x12, 0x46, 0xB3, 0xE5, 0x2E, 0x30, 0xE3, 0x38, 0x90, 0x01, 0x36, 0x74, 0x08, ++0xF0, 0xE5, 0x21, 0x64, 0x01, 0x70, 0x2C, 0xE5, 0x24, 0x60, 0x28, 0x90, 0x01, 0x57, 0xE4, 0xF0, ++0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0x8B, 0x3D, 0xE4, 0xF0, 0x90, 0x8B, 0x11, 0xE0, 0x90, ++0x8B, 0x3E, 0xF0, 0xE4, 0xFB, 0xFD, 0x7F, 0x54, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x57, ++0x74, 0x05, 0xF0, 0xE5, 0x2E, 0x30, 0xE4, 0x2B, 0x90, 0x01, 0x36, 0x74, 0x10, 0xF0, 0xE5, 0x21, ++0xB4, 0x01, 0x20, 0xE5, 0x24, 0x60, 0x1C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, ++0x02, 0xF0, 0x90, 0x8B, 0x1B, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0xE5, 0x25, 0x54, 0x07, 0x70, 0x03, ++0x12, 0x4A, 0xFC, 0xE5, 0x2E, 0x30, 0xE5, 0x1F, 0x90, 0x01, 0x36, 0x74, 0x20, 0xF0, 0xE5, 0x21, ++0xB4, 0x01, 0x14, 0xE5, 0x24, 0x60, 0x10, 0x90, 0x8B, 0x1A, 0xE0, 0x64, 0x02, 0x60, 0x05, 0x12, ++0x4A, 0x97, 0x80, 0x03, 0x12, 0x49, 0x49, 0xE5, 0x2E, 0x30, 0xE6, 0x1B, 0x90, 0x01, 0x36, 0x74, ++0x40, 0xF0, 0xE5, 0x21, 0xB4, 0x01, 0x10, 0xE5, 0x24, 0x60, 0x0C, 0x53, 0x25, 0xFE, 0xE5, 0x25, ++0x54, 0x07, 0x70, 0x03, 0x12, 0x4A, 0xFC, 0xE5, 0x2F, 0x30, 0xE1, 0x27, 0x90, 0x01, 0x37, 0x74, ++0x02, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0x30, 0xE0, 0x17, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, ++0x07, 0x12, 0x48, 0xFE, 0xD1, 0x20, 0x80, 0x0B, 0x90, 0x8B, 0x31, 0x74, 0x01, 0xF0, 0x80, 0x03, ++0x12, 0x48, 0xFE, 0x74, 0xF3, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x60, 0xA3, 0xF0, 0xD0, 0x07, ++0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, ++0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0xE4, 0x90, 0x8B, 0x3D, 0xF0, 0x90, 0x05, ++0x58, 0xE0, 0xFF, 0x90, 0x8B, 0x38, 0xE0, 0x2F, 0x24, 0xFE, 0x90, 0x8B, 0x3E, 0xF0, 0xE4, 0xFB, ++0xFD, 0x7F, 0x50, 0x7E, 0x01, 0x12, 0x4B, 0x6C, 0x90, 0x01, 0x53, 0x74, 0x05, 0xF0, 0x22, 0x90, ++0x8A, 0xC5, 0xE0, 0x54, 0xF0, 0x44, 0x03, 0xF0, 0x54, 0x0F, 0x44, 0x80, 0xF0, 0x7B, 0x00, 0x7A, ++0x00, 0x79, 0x56, 0x90, 0x8B, 0x48, 0x12, 0x43, 0x8B, 0x0B, 0x7A, 0x8A, 0x79, 0xC5, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x8B, 0x90, 0x8B, 0x53, 0xE0, 0xFF, ++0x04, 0xF0, 0x90, 0x00, 0x01, 0xEF, 0x12, 0x42, 0x5F, 0x7F, 0xAF, 0x7E, 0x01, 0xD1, 0x8A, 0xEF, ++0x60, 0x49, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x6B, 0x8B, 0x1D, 0x8A, 0x1E, 0x89, 0x1F, 0x75, 0x20, ++0x02, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA0, 0x12, 0x5F, 0x57, 0x90, 0x8B, 0x48, 0x12, 0x43, 0x6B, ++0x8B, 0x1D, 0x8A, 0x1E, 0x89, 0x1F, 0x90, 0x8B, 0x45, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, ++0xC4, 0x54, 0x0F, 0xF5, 0x20, 0x7B, 0x01, 0x7A, 0x01, 0x79, 0xA2, 0x12, 0x5F, 0x57, 0x90, 0x01, ++0xAF, 0x74, 0xFF, 0xF0, 0x90, 0x01, 0xCB, 0xE0, 0x64, 0x80, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, ++0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0B, 0xA3, 0xE0, 0x64, ++0x06, 0x60, 0x05, 0x7F, 0x06, 0x12, 0x7B, 0x49, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x02, ++0xD1, 0x13, 0x22, 0x90, 0x8B, 0x31, 0xE0, 0xB4, 0x01, 0x05, 0xE4, 0xF0, 0x12, 0x48, 0xFE, 0x22, ++0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x06, 0x60, 0x3C, 0xE5, 0x22, 0x54, 0x0F, 0x14, 0x60, 0x2E, 0x14, ++0x60, 0x1E, 0x24, 0xFE, 0x60, 0x0E, 0x24, 0xF8, 0x70, 0x2A, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x90, ++0x05, 0x22, 0xF0, 0x22, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x22, ++0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x22, 0x90, 0x01, 0xC6, ++0xE0, 0x44, 0x08, 0xF0, 0x22, 0xAE, 0x07, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, 0x60, 0x18, 0x90, ++0x8B, 0x2C, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0C, 0xAF, 0x06, 0x7D, 0x01, 0x12, ++0x45, 0xA2, 0xD1, 0x20, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x8B, 0x4B, 0xEE, 0xF0, 0xA3, ++0xEF, 0xF0, 0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0x90, 0x8B, 0x4B, 0xE0, 0xFE, 0xA3, 0xE0, 0xF5, 0x82, ++0x8E, 0x83, 0xE0, 0x60, 0x2C, 0xC3, 0x90, 0x8B, 0x4E, 0xE0, 0x94, 0xE8, 0x90, 0x8B, 0x4D, 0xE0, ++0x94, 0x03, 0x40, 0x0A, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x7F, 0x00, 0x22, 0x90, 0x8B, ++0x4D, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x37, 0x54, 0x80, ++0xC6, 0x7F, 0x01, 0x22, 0x75, 0x28, 0x33, 0xE4, 0xF5, 0x29, 0x75, 0x2A, 0x07, 0xF5, 0x2B, 0x90, ++0x01, 0x30, 0xE5, 0x28, 0xF0, 0xA3, 0xE5, 0x29, 0xF0, 0xA3, 0xE5, 0x2A, 0xF0, 0xA3, 0xE5, 0x2B, ++0xF0, 0x22, 0x75, 0x30, 0x1F, 0x75, 0x31, 0x01, 0x43, 0x31, 0x10, 0xE4, 0xF5, 0x32, 0x90, 0x01, ++0x38, 0xE5, 0x30, 0xF0, 0xA3, 0xE5, 0x31, 0xF0, 0xA3, 0xE5, 0x32, 0xF0, 0x22, 0x22, 0x90, 0x00, ++0x02, 0xE0, 0x54, 0xE0, 0x7F, 0x01, 0x60, 0x02, 0x7F, 0x00, 0x22, 0x90, 0x00, 0xF3, 0xE0, 0x7F, ++0x00, 0x30, 0xE3, 0x02, 0x7F, 0x01, 0x22, 0x90, 0x8B, 0x09, 0xE0, 0xB4, 0x01, 0x0C, 0x90, 0x00, ++0xF2, 0xE0, 0x30, 0xE7, 0x05, 0x7E, 0xFD, 0x7F, 0x33, 0x22, 0x7E, 0xFD, 0x7F, 0x2F, 0x22, 0x90, ++0x00, 0xF3, 0xE0, 0x30, 0xE2, 0x0D, 0x90, 0x05, 0x41, 0x74, 0x10, 0xF0, 0x90, 0x05, 0x5A, 0xF0, ++0xA3, 0xE4, 0xF0, 0x22, 0x90, 0x01, 0x64, 0x74, 0xA0, 0xF0, 0x22, 0xC0, 0xE0, 0xC0, 0x83, 0xC0, ++0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x7D, 0x5B, 0x90, 0x01, ++0xC4, 0xED, 0xF0, 0x74, 0x67, 0xFF, 0xA3, 0xF0, 0x53, 0x91, 0xEF, 0x90, 0x00, 0x51, 0xE0, 0xFE, ++0x90, 0x00, 0x55, 0xE0, 0x5E, 0xF5, 0x3D, 0x90, 0x00, 0x52, 0xE0, 0xFE, 0x90, 0x00, 0x56, 0xE0, ++0x5E, 0xF5, 0x3E, 0xE5, 0x3D, 0x30, 0xE4, 0x06, 0x90, 0x00, 0x55, 0x74, 0x10, 0xF0, 0xE5, 0x3D, ++0x30, 0xE5, 0x06, 0x90, 0x00, 0x55, 0x74, 0x20, 0xF0, 0xE5, 0x3D, 0x30, 0xE6, 0x06, 0x90, 0x00, ++0x55, 0x74, 0x40, 0xF0, 0xE5, 0x3D, 0x30, 0xE7, 0x06, 0x90, 0x00, 0x55, 0x74, 0x80, 0xF0, 0xE5, ++0x3E, 0x30, 0xE0, 0x06, 0x90, 0x00, 0x56, 0x74, 0x01, 0xF0, 0xE5, 0x3E, 0x30, 0xE1, 0x06, 0x90, ++0x00, 0x56, 0x74, 0x02, 0xF0, 0xE5, 0x3E, 0x30, 0xE2, 0x06, 0x90, 0x00, 0x56, 0x74, 0x04, 0xF0, ++0xE5, 0x3E, 0x30, 0xE3, 0x06, 0x90, 0x00, 0x56, 0x74, 0x08, 0xF0, 0x90, 0x01, 0xC4, 0xED, 0xF0, ++0xA3, 0xEF, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, ++0xE0, 0x32, 0xEF, 0xC3, 0x94, 0x20, 0x50, 0x39, 0xEF, 0x30, 0xE0, 0x17, 0xED, 0xC4, 0x54, 0xF0, ++0xFD, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, ++0x0F, 0x80, 0x10, 0xEF, 0xC3, 0x13, 0xFE, 0x24, 0xA4, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, ++0xE0, 0x54, 0xF0, 0xF0, 0x74, 0xA4, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x4D, ++0xF0, 0x22, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, ++0x02, 0xC1, 0xCD, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2A, 0x12, 0x43, 0x5F, 0xE0, 0x64, 0x01, ++0x60, 0x02, 0xC1, 0xC5, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, ++0x85, 0xF5, 0x83, 0xE0, 0xFC, 0xA3, 0xE0, 0xD3, 0x94, 0x00, 0xEC, 0x94, 0x00, 0x50, 0x02, 0xC1, ++0xC5, 0xEF, 0x75, 0xF0, 0x0A, 0xA4, 0x24, 0x00, 0xF9, 0x74, 0x84, 0x35, 0xF0, 0x75, 0x12, 0x01, ++0xF5, 0x13, 0x89, 0x14, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, ++0x85, 0xF5, 0x83, 0xE0, 0xFD, 0xA3, 0xE0, 0x90, 0x8A, 0xD4, 0xCD, 0xF0, 0xA3, 0xED, 0xF0, 0xEF, ++0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, ++0x8A, 0xD6, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, 0x24, 0x84, 0xF5, 0x82, ++0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x3F, 0x90, 0x8A, 0xD0, 0xF0, 0xE0, 0xFD, 0x54, 0x1F, ++0xA3, 0xF0, 0x75, 0xF0, 0x09, 0xEE, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0xE0, 0x90, 0x8A, 0xD9, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFB, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, ++0xC3, 0x94, 0x05, 0x40, 0x02, 0x61, 0x1A, 0x90, 0x8A, 0xD9, 0xE0, 0xFE, 0x90, 0x8A, 0xD1, 0xE0, ++0x9E, 0x40, 0x13, 0x90, 0x8A, 0xD9, 0xE0, 0x90, 0x8A, 0xD1, 0xF0, 0xED, 0x54, 0x40, 0xFD, 0x90, ++0x8A, 0xD0, 0xF0, 0xEE, 0x4D, 0xF0, 0x90, 0x8A, 0xD1, 0xE0, 0xFF, 0x90, 0x41, 0x12, 0x93, 0xFE, ++0x74, 0x23, 0x2B, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xC3, 0x9E, 0x40, 0x06, 0xEF, ++0x90, 0x40, 0xDA, 0x80, 0x07, 0x90, 0x8A, 0xD1, 0xE0, 0x90, 0x40, 0xF6, 0x93, 0x90, 0x8A, 0xD8, ++0xF0, 0x90, 0x8A, 0xD8, 0xE0, 0x75, 0xF0, 0x06, 0xA4, 0x24, 0x50, 0xF9, 0x74, 0x40, 0x35, 0xF0, ++0x75, 0x0F, 0xFF, 0xF5, 0x10, 0x89, 0x11, 0x90, 0x8A, 0xD0, 0xE0, 0x90, 0x41, 0xBA, 0x93, 0xFF, ++0xD3, 0x90, 0x8A, 0xD7, 0xE0, 0x9F, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x0C, 0x90, 0x8A, ++0xCF, 0xE0, 0xFF, 0xE4, 0xFD, 0x12, 0x5D, 0xB4, 0xC1, 0x5B, 0x90, 0x8A, 0xCF, 0xE0, 0x25, 0xE0, ++0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xD2, ++0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x12, 0x29, 0xD9, 0xFF, 0x7E, ++0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x12, 0x42, 0x97, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, ++0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, ++0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, ++0x02, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, ++0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, ++0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x04, 0x12, 0x42, 0xC2, 0xFD, 0xAC, ++0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, ++0x10, 0xA9, 0x11, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, ++0xA9, 0x14, 0x90, 0x00, 0x06, 0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, ++0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x04, ++0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x08, 0x12, ++0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, ++0x81, 0xAB, 0x0F, 0xAA, 0x10, 0xA9, 0x11, 0x90, 0x00, 0x05, 0x12, 0x42, 0x20, 0xFF, 0x7E, 0x00, ++0x90, 0x8A, 0xD4, 0xE0, 0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x29, 0xF2, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, ++0x9F, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x0C, 0xA3, 0xE0, 0x9F, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, ++0x9E, 0xF0, 0x80, 0x07, 0xE4, 0x90, 0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xD2, 0xE0, 0xFC, ++0xA3, 0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEC, 0xF0, 0xA3, 0xED, 0xF0, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, 0x2E, ++0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xD3, 0xED, ++0x9B, 0xEC, 0x9A, 0x40, 0x04, 0xD1, 0xCE, 0xC1, 0x29, 0x90, 0x8A, 0xD0, 0xE0, 0x25, 0xE0, 0x24, ++0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFE, 0x74, 0x01, 0x93, 0xFF, 0xC3, ++0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x40, 0x02, 0xC1, 0x29, 0x90, 0x8A, ++0xCF, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x5D, 0xB4, 0xC1, 0x29, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, ++0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xFC, 0x64, 0x05, 0x60, 0x02, 0x81, 0xF8, ++0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x03, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, 0x19, 0x40, ++0x3D, 0x80, 0x2E, 0xEE, 0xB4, 0x02, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, 0x11, 0x40, 0x2E, ++0x80, 0x1F, 0x90, 0x87, 0x22, 0xE0, 0xFE, 0xB4, 0x01, 0x0B, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, ++0x0A, 0x40, 0x1B, 0x80, 0x0C, 0xEE, 0x70, 0x11, 0x90, 0x8A, 0xD1, 0xE0, 0xC3, 0x94, 0x03, 0x40, ++0x0D, 0x90, 0x89, 0x43, 0x74, 0x01, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0x89, 0x43, 0xF0, 0x90, 0x8A, ++0xCF, 0xE0, 0xFE, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xDD, ++0xF0, 0x74, 0x23, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, 0xC3, 0x94, 0x30, ++0x50, 0x0A, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0x81, 0xA3, 0x90, 0x89, 0x43, 0xE0, ++0x64, 0x01, 0x60, 0x02, 0x81, 0x98, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x44, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE0, 0x64, 0x0A, 0x60, 0x5B, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0xEE, 0x24, 0x05, ++0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xE0, 0xFF, ++0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x50, 0x38, 0x90, 0x8A, 0xCF, 0xE0, 0xFE, ++0xEF, 0x24, 0x05, 0xFB, 0xE4, 0x33, 0xFA, 0x74, 0x23, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0xE0, 0xD3, 0x9B, 0xEA, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x98, 0x50, 0x16, 0x90, 0x8A, 0xCF, ++0xE0, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xFF, 0x90, 0x8A, 0xD1, 0xE0, ++0x6F, 0x60, 0x56, 0x90, 0x8A, 0xCF, 0xE0, 0x24, 0x23, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, ++0xE0, 0xFF, 0xD3, 0x94, 0x42, 0x40, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x05, 0xF0, 0x80, 0x11, 0xEF, ++0xD3, 0x94, 0x39, 0x90, 0x8A, 0xDD, 0x40, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, ++0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x23, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFE, ++0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, ++0x24, 0x44, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0x80, 0x2F, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x64, ++0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x44, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x89, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x14, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x90, 0x8A, 0xCF, ++0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x8A, 0xD1, 0xE0, ++0xFE, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x84, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEE, ++0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFE, 0x74, 0x43, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, ++0xEE, 0xF0, 0x75, 0xF0, 0x09, 0xEF, 0x90, 0x87, 0x2B, 0x12, 0x43, 0x5F, 0xE0, 0xB4, 0x01, 0x11, ++0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0x74, 0x64, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0xC1, 0x27, 0xEC, 0x64, 0x06, 0x60, 0x02, 0xC1, 0x29, 0x90, ++0x8A, 0xD2, 0xF0, 0xA3, 0xF0, 0x90, 0x41, 0xDB, 0x93, 0xFF, 0x7E, 0x00, 0x90, 0x8A, 0xD4, 0xE0, ++0xFC, 0xA3, 0xE0, 0xFD, 0x12, 0x29, 0xF2, 0x90, 0x8A, 0xDB, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x8A, 0xCF, 0xE0, 0x24, 0x43, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xDD, ++0xF0, 0xE4, 0x90, 0x8A, 0xDA, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0xD3, 0x94, 0x04, 0x50, 0x47, ++0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x75, 0xF0, 0x02, 0xEF, 0xA4, 0xF5, 0x82, 0x85, 0xF0, 0x83, ++0x12, 0x42, 0xC2, 0xFD, 0xAC, 0xF0, 0xEF, 0x90, 0x41, 0xD6, 0x93, 0xFF, 0x7E, 0x00, 0x12, 0x29, ++0xF2, 0x90, 0x8A, 0xD2, 0xEE, 0x8F, 0xF0, 0x12, 0x42, 0x81, 0x90, 0x8A, 0xDB, 0xE0, 0xFE, 0xA3, ++0xE0, 0xFF, 0xD3, 0x90, 0x8A, 0xD3, 0xE0, 0x9F, 0x90, 0x8A, 0xD2, 0xE0, 0x9E, 0x50, 0x08, 0x90, ++0x8A, 0xDA, 0xE0, 0x04, 0xF0, 0x80, 0xAF, 0x90, 0x8A, 0xDA, 0xE0, 0xC3, 0x13, 0xF0, 0x90, 0x8A, ++0xDD, 0xE0, 0xFF, 0xB4, 0x01, 0x0D, 0x90, 0x8A, 0xDA, 0xE0, 0x70, 0x5D, 0x90, 0x8A, 0xDD, 0x04, ++0xF0, 0x80, 0x5B, 0xEF, 0xB4, 0x03, 0x1D, 0x90, 0x8A, 0xDA, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0x8A, ++0xDD, 0x74, 0x03, 0xF0, 0x80, 0x48, 0xEF, 0xB4, 0x01, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, ++0x80, 0x3C, 0x80, 0x35, 0x90, 0x8A, 0xDD, 0xE0, 0x64, 0x05, 0x70, 0x32, 0x90, 0x8A, 0xDA, 0xE0, ++0xFF, 0x70, 0x08, 0x90, 0x8A, 0xDD, 0x74, 0x05, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0x8A, 0xDD, 0xB4, ++0x01, 0x05, 0x74, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x01, 0xF0, 0xD3, 0x90, 0x8A, 0xD7, 0xE0, 0x94, ++0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x05, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0xD3, 0x90, ++0x8A, 0xD7, 0xE0, 0x94, 0x03, 0x90, 0x8A, 0xD6, 0xE0, 0x94, 0x00, 0x40, 0x05, 0xE4, 0x90, 0x8A, ++0xDD, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0xFD, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x43, 0xF5, 0x82, ++0xE4, 0x34, 0x88, 0xF5, 0x83, 0xED, 0xF0, 0x11, 0x02, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x24, 0x64, ++0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0xD3, 0x94, 0x05, 0x50, 0x0F, 0x74, 0x64, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE0, 0x04, 0xF0, 0x80, 0x0F, 0x90, 0x8A, 0xCF, 0xE0, ++0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0xAB, 0x12, 0xAA, 0x13, 0xA9, ++0x14, 0xE4, 0xF5, 0xF0, 0x12, 0x42, 0xFA, 0xAB, 0x12, 0xAA, 0x13, 0xA9, 0x14, 0x90, 0x00, 0x02, ++0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x04, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, ++0x00, 0x06, 0xE4, 0xF5, 0xF0, 0x12, 0x43, 0x19, 0x90, 0x00, 0x08, 0xE4, 0xF5, 0xF0, 0x12, 0x43, ++0x19, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x01, 0x47, 0x22, 0xAD, 0x07, ++0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0x90, 0x8A, 0xDE, ++0xF0, 0xE0, 0xF9, 0x54, 0x1F, 0xA3, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, ++0x5F, 0xE0, 0xFF, 0x90, 0x8A, 0xE1, 0xF0, 0xED, 0x25, 0xE0, 0x24, 0x81, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, 0x8A, 0xE2, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0xED, ++0x25, 0xE0, 0x24, 0xE4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE0, 0xFB, 0xA3, 0xE0, 0x90, ++0x8A, 0xE4, 0xCB, 0xF0, 0xA3, 0xEB, 0xF0, 0x90, 0x8A, 0xDF, 0xE0, 0xFE, 0x25, 0xE0, 0x24, 0x2E, ++0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xED, 0x25, ++0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEA, 0xF0, 0xA3, 0xEB, 0xF0, 0xEE, ++0xC3, 0x9F, 0x40, 0x03, 0x02, 0x70, 0x12, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, 0xF5, ++0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0xEF, 0x04, 0x90, 0x8A, 0xE0, 0xF0, 0x90, 0x8A, ++0xE1, 0xE0, 0xFF, 0x90, 0x8A, 0xE0, 0xE0, 0xFE, 0xD3, 0x9F, 0x40, 0x03, 0x02, 0x70, 0x4C, 0xEE, ++0xC3, 0x94, 0x10, 0x40, 0x21, 0xEE, 0x24, 0xF0, 0xFF, 0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, ++0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, 0xFF, 0x90, 0x8A, 0xE2, 0xE0, 0x5E, 0xFE, ++0xA3, 0xE0, 0x5F, 0x4E, 0x70, 0x27, 0x90, 0x8A, 0xE0, 0xE0, 0xFF, 0xC3, 0x94, 0x10, 0x50, 0x59, ++0x74, 0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x80, 0x05, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9, ++0xFF, 0x90, 0x8A, 0xE4, 0xE0, 0x5E, 0xFE, 0xA3, 0xE0, 0x5F, 0x4E, 0x60, 0x3C, 0x90, 0x8A, 0xE0, ++0xE0, 0xB4, 0x11, 0x0D, 0x90, 0x8A, 0xE3, 0xE0, 0x30, 0xE7, 0x06, 0x90, 0x8A, 0xE0, 0x74, 0x17, ++0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xFF, 0x64, 0x13, 0x60, 0x04, 0xEF, 0xB4, 0x12, 0x0D, 0x90, 0x8A, ++0xE2, 0xE0, 0x30, 0xE0, 0x06, 0x90, 0x8A, 0xE0, 0x74, 0x18, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0x90, ++0x8A, 0xDF, 0xF0, 0x90, 0x8A, 0xDE, 0xF0, 0x80, 0x43, 0x90, 0x8A, 0xE0, 0xE0, 0x04, 0xF0, 0x02, ++0x6F, 0x6E, 0x90, 0x8A, 0xE1, 0xE0, 0xFC, 0x90, 0x8A, 0xDF, 0xE0, 0xFF, 0x6C, 0x70, 0x71, 0x74, ++0xA5, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, ++0x87, 0x29, 0x12, 0x43, 0x5F, 0xE0, 0xB4, 0x01, 0x10, 0xE9, 0x20, 0xE6, 0x0C, 0x90, 0x8A, 0xDF, ++0xE0, 0x44, 0x40, 0x90, 0x8A, 0xDE, 0xF0, 0x80, 0x03, 0xAF, 0x01, 0x22, 0x90, 0x8A, 0xDF, 0xE0, ++0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0xE4, 0x93, 0xFA, 0x74, ++0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, 0x83, 0x74, ++0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, 0x13, 0xFF, 0xED, 0x25, 0xE0, ++0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x66, ++0x90, 0x8A, 0xDF, 0xE0, 0xD3, 0x9C, 0x40, 0x5E, 0x90, 0x8A, 0xE1, 0xE0, 0xFF, 0x74, 0xA5, 0x2D, ++0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x8A, 0xDF, 0xEF, 0xF0, 0x90, 0x8A, ++0xDE, 0xF0, 0xFC, 0xA3, 0xE0, 0xFF, 0x25, 0xE0, 0x24, 0x66, 0xF5, 0x82, 0xE4, 0x34, 0x41, 0xF5, ++0x83, 0xE4, 0x93, 0xFA, 0x74, 0x01, 0x93, 0xFB, 0xEF, 0x25, 0xE0, 0x24, 0x2E, 0xF5, 0x82, 0xE4, ++0x34, 0x41, 0xF5, 0x83, 0x74, 0x01, 0x93, 0x2B, 0xFF, 0xE4, 0x93, 0x3A, 0xC3, 0x13, 0xFE, 0xEF, ++0x13, 0xFF, 0xED, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0xEE, 0xF0, ++0xA3, 0xEF, 0xF0, 0xAF, 0x04, 0x22, 0x74, 0x01, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, ++0xE4, 0xF0, 0xAF, 0x05, 0x90, 0x8A, 0xDE, 0xE0, 0x44, 0x80, 0xFD, 0x12, 0x5C, 0xC1, 0x90, 0x8A, ++0xDE, 0xE0, 0x44, 0x80, 0xFF, 0x22, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0xFF, ++0xC3, 0x94, 0x10, 0x50, 0x14, 0x74, 0xA4, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x04, 0xF5, 0x83, 0xE4, ++0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x80, 0xE2, 0xE4, 0x90, 0x8A, 0xCF, 0xF0, 0x90, 0x8A, ++0xCF, 0xE0, 0xFF, 0xC3, 0x94, 0x20, 0x40, 0x02, 0x41, 0xCF, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, ++0x00, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x02, 0x12, ++0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x04, 0x12, 0x43, 0x5F, ++0xE4, 0xF0, 0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x06, 0x12, 0x43, 0x5F, 0xE4, 0xF0, ++0xA3, 0xF0, 0x75, 0xF0, 0x0A, 0xEF, 0x90, 0x84, 0x08, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0xF0, ++0x74, 0x84, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x74, 0x44, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x43, 0x2F, 0xF5, 0x82, 0xE4, 0x34, ++0x88, 0xF5, 0x83, 0xE4, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xC0, 0xF5, 0x82, 0xE4, 0x34, 0x85, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x63, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xE3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA3, 0xF5, 0x82, 0xE4, 0x34, 0x88, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0x64, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0xEF, 0x25, 0xE0, 0x24, 0xA4, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, ++0x83, 0xE4, 0xF0, 0xA3, 0xF0, 0x74, 0x44, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, ++0xF0, 0x74, 0x24, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x74, 0x64, 0x2F, ++0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xE4, 0xF0, 0x90, 0x41, 0x8C, 0x93, 0xFE, 0x74, 0x01, ++0x93, 0xFF, 0x90, 0x41, 0x54, 0x74, 0x01, 0x93, 0x2F, 0xFF, 0xE4, 0x93, 0x3E, 0xC3, 0x13, 0xFE, ++0xEF, 0x13, 0xFF, 0x90, 0x8A, 0xCF, 0xE0, 0xFD, 0x25, 0xE0, 0x24, 0xE1, 0xF5, 0x82, 0xE4, 0x34, ++0x86, 0xF5, 0x83, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x29, 0x12, ++0x43, 0x5F, 0x74, 0x01, 0xF0, 0x74, 0xC1, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0x86, 0xF5, 0x83, 0x74, ++0x0C, 0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x25, 0x12, 0x43, 0x5F, 0x74, 0xFF, 0xF0, 0xA3, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x23, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0xA3, 0x74, 0x0F, ++0xF0, 0x75, 0xF0, 0x09, 0xED, 0x90, 0x87, 0x27, 0x12, 0x43, 0x5F, 0x74, 0x13, 0xF0, 0x75, 0xF0, ++0x09, 0xED, 0x90, 0x87, 0x28, 0x12, 0x43, 0x5F, 0xE4, 0xF0, 0x74, 0x84, 0x2D, 0xF5, 0x82, 0xE4, ++0x34, 0x04, 0xF5, 0x83, 0x74, 0x13, 0xF0, 0x90, 0x8A, 0xCF, 0xE0, 0x04, 0xF0, 0x21, 0x3E, 0x22, ++0x12, 0x29, 0xD9, 0xFF, 0xC3, 0x94, 0x20, 0x50, 0x14, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFE, ++0x74, 0x23, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x89, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0xEF, 0xB4, 0x20, ++0x0A, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0x90, 0x87, 0x21, 0xF0, 0x22, 0x12, 0x29, 0xD9, 0xF5, ++0x21, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x2A, 0x8B, 0x00, ++0x00, 0x00, 0x00, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x1A, 0xF0, 0x90, 0x00, 0x03, ++0x12, 0x42, 0x20, 0x90, 0x8B, 0x0A, 0xF0, 0x12, 0x47, 0xFA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, ++0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0x30, 0xE0, 0x25, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x10, 0xF0, ++0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x11, 0xF0, 0xEF, 0xC3, 0x13, 0x54, 0x7F, 0x90, ++0x8B, 0x0F, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x16, 0xF0, 0x22, 0x90, 0x8B, ++0x10, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x11, 0x74, 0x05, 0xF0, 0x90, 0x8B, 0x0F, 0x74, 0x14, 0xF0, ++0x90, 0x8B, 0x16, 0x74, 0x05, 0xF0, 0x22, 0x12, 0x29, 0xD9, 0x30, 0xE0, 0x19, 0xC3, 0x13, 0x54, ++0x7F, 0x90, 0x8B, 0x15, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, 0xFF, 0x90, 0x8B, 0x13, 0xE4, ++0xF0, 0xA3, 0xEF, 0xF0, 0x80, 0x0F, 0x90, 0x8B, 0x15, 0x74, 0x05, 0xF0, 0x90, 0x8B, 0x13, 0xE4, ++0xF0, 0xA3, 0x74, 0x03, 0xF0, 0x90, 0x8B, 0x13, 0xE0, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x22, ++0x12, 0x29, 0xD9, 0x90, 0x8B, 0x12, 0xF0, 0x60, 0x07, 0xE4, 0xFD, 0x7F, 0x04, 0x12, 0x45, 0xA2, ++0x90, 0x8B, 0x12, 0xE0, 0x90, 0x01, 0xE7, 0xF0, 0x22, 0x90, 0x02, 0x09, 0xE0, 0xFD, 0x12, 0x29, ++0xD9, 0xFE, 0xAF, 0x05, 0xED, 0x2E, 0x90, 0x8A, 0xF7, 0xF0, 0x90, 0x00, 0x01, 0x12, 0x42, 0x20, ++0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xF8, 0xF0, 0x90, 0x00, 0x02, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, ++0x90, 0x8A, 0xF9, 0xF0, 0x90, 0x00, 0x03, 0x12, 0x42, 0x20, 0xFF, 0xED, 0x2F, 0x90, 0x8A, 0xFA, ++0xF0, 0x90, 0x00, 0x04, 0x12, 0x42, 0x20, 0xFF, 0xAE, 0x05, 0xED, 0x2F, 0x90, 0x8A, 0xFB, 0xF0, ++0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x8B, 0xE4, 0x90, ++0x8A, 0xDD, 0xF0, 0x12, 0x29, 0xD9, 0xC3, 0x13, 0x20, 0xE0, 0x02, 0xA1, 0x62, 0x90, 0x8A, 0xDA, ++0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, 0x54, 0x02, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0x54, 0xFD, ++0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, 0xEE, 0x54, 0xFE, 0x4F, 0xFF, 0xF0, 0x12, 0x29, 0xD9, ++0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, 0xEE, 0x54, 0x10, ++0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x29, 0xD9, 0xFE, 0x54, 0x20, 0xFD, 0xEF, 0x54, ++0xDF, 0x4D, 0xFF, 0x90, 0x8B, 0x32, 0xF0, 0xEE, 0x54, 0x40, 0xFE, 0xEF, 0x54, 0xBF, 0x4E, 0xF0, ++0x20, 0xE0, 0x02, 0xA1, 0x4F, 0x90, 0x8A, 0xDD, 0x74, 0x21, 0xF0, 0x90, 0x8A, 0xDA, 0x12, 0x43, ++0x6B, 0x12, 0x29, 0xD9, 0xFF, 0x13, 0x13, 0x54, 0x01, 0xFE, 0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, ++0x13, 0x54, 0x01, 0x6E, 0x60, 0x2A, 0xEF, 0x54, 0x04, 0xFF, 0xED, 0x54, 0xFB, 0x4F, 0xF0, 0xE0, ++0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x0E, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, ++0x12, 0x36, 0xE6, 0x80, 0x0B, 0xE4, 0x90, 0x8B, 0x34, 0xF0, 0x7D, 0x40, 0xFF, 0x12, 0x36, 0x75, ++0x90, 0x8B, 0x32, 0xE0, 0xFD, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, ++0xE0, 0x44, 0x12, 0xF0, 0xED, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, ++0x14, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, ++0xE0, 0x44, 0x80, 0xF0, 0x90, 0x8B, 0x32, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x07, ++0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0x90, 0x05, 0x27, 0xF0, 0x90, ++0x8B, 0x33, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x4E, 0x89, 0x90, 0x8B, 0x32, 0xE0, 0xC4, 0x13, ++0x13, 0x54, 0x03, 0x30, 0xE0, 0x04, 0x7F, 0x03, 0x80, 0x0E, 0x7F, 0x01, 0x12, 0x4D, 0xE0, 0xEF, ++0x60, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x02, 0x12, 0x4E, 0x89, 0x7F, 0x02, 0xC1, 0xA4, 0x90, ++0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x27, 0xF0, 0xE4, 0xFF, 0x12, 0x4E, 0x89, 0x7F, 0x03, ++0xC1, 0xA4, 0x90, 0x8A, 0xDA, 0x12, 0x43, 0x6B, 0x12, 0x29, 0xD9, 0xFF, 0x54, 0x02, 0xFE, 0x90, ++0x8B, 0x2C, 0xE0, 0x54, 0xFD, 0x4E, 0xFE, 0xF0, 0xEF, 0x54, 0x01, 0xFF, 0xEE, 0x54, 0xFE, 0x4F, ++0xFF, 0xF0, 0x12, 0x29, 0xD9, 0xFE, 0x54, 0x08, 0xFD, 0xEF, 0x54, 0xF7, 0x4D, 0xFF, 0x90, 0x8B, ++0x2C, 0xF0, 0xEE, 0x54, 0x10, 0xFE, 0xEF, 0x54, 0xEF, 0x4E, 0xFF, 0xF0, 0x12, 0x29, 0xD9, 0xFE, ++0x54, 0x40, 0xFD, 0xEF, 0x54, 0xBF, 0x4D, 0xFF, 0x90, 0x8B, 0x2C, 0xF0, 0xEE, 0x54, 0x04, 0xFE, ++0xEF, 0x54, 0xFB, 0x4E, 0xF0, 0x20, 0xE0, 0x02, 0xC1, 0x57, 0x90, 0x8A, 0xDD, 0x74, 0x31, 0xF0, ++0x90, 0x8B, 0x2C, 0xE0, 0x13, 0x13, 0x54, 0x3F, 0x20, 0xE0, 0x0B, 0xE4, 0x90, 0x8B, 0x2E, 0xF0, ++0x7D, 0x40, 0xFF, 0x12, 0x36, 0x75, 0x90, 0x8B, 0x2C, 0xE0, 0xFD, 0x13, 0x13, 0x13, 0x54, 0x1F, ++0x30, 0xE0, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x02, 0xF0, 0xED, 0xC4, 0x54, 0x0F, 0x30, 0xE0, ++0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x44, 0x04, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0x54, 0x06, 0x60, 0x0C, ++0x90, 0x01, 0x3E, 0x74, 0x03, 0xF0, 0xFD, 0x7F, 0x02, 0x12, 0x37, 0x00, 0x90, 0x8A, 0xDD, 0xE0, ++0x90, 0x05, 0x27, 0xF0, 0x90, 0x8B, 0x2C, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, ++0x0D, 0xA3, 0xE0, 0x64, 0x06, 0x60, 0x2C, 0x7F, 0x06, 0x12, 0x7B, 0x49, 0x80, 0x25, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x06, 0x1B, 0x7F, 0x01, 0x12, 0x7B, 0x49, 0xE4, 0xFF, 0x12, 0x4D, 0xE0, 0xEF, ++0x60, 0x09, 0x7D, 0x01, 0xAF, 0x23, 0x12, 0x45, 0xA2, 0x80, 0x05, 0x12, 0x4E, 0x56, 0x80, 0x03, ++0x12, 0x66, 0x20, 0x7F, 0x01, 0x80, 0x4D, 0x90, 0x8A, 0xDD, 0x74, 0x01, 0xF0, 0x90, 0x05, 0x27, ++0xF0, 0x7D, 0x03, 0x7F, 0x02, 0x12, 0x36, 0x92, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x06, 0x02, 0x80, ++0x1B, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x02, 0x80, 0x07, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, ++0x04, 0xE4, 0xFF, 0x80, 0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0x80, 0x09, ++0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x05, 0x7F, 0x01, 0x12, 0x7B, 0x49, 0x12, 0x66, 0x13, 0x12, ++0x4A, 0xFC, 0x7F, 0x03, 0xD1, 0xAB, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xAD, 0x07, 0xEF, 0x64, 0x01, ++0x60, 0x04, 0xEF, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x32, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFB, 0xF0, ++0xE4, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xED, 0x64, 0x02, 0x60, 0x04, ++0xED, 0xB4, 0x03, 0x15, 0x90, 0x8B, 0x2C, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFB, 0xF0, 0xE4, 0xA3, ++0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0xA3, 0xF0, 0x22, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x38, ++0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x8A, 0xFD, 0xE0, 0x90, 0x8A, 0xE8, ++0xF0, 0x90, 0x8A, 0xFE, 0xE0, 0xFF, 0xA3, 0xE0, 0x90, 0x8A, 0xE9, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, ++0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0xFF, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, ++0x8B, 0xF5, 0x83, 0xE0, 0xFE, 0x74, 0xEB, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEE, ++0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x04, 0xDA, 0x90, 0x8A, 0xE8, 0xE0, 0x12, ++0x43, 0x94, 0x77, 0x61, 0x00, 0x78, 0xD7, 0x01, 0x77, 0x6C, 0x02, 0x77, 0x6C, 0x03, 0x77, 0x6C, ++0x04, 0x78, 0xD7, 0x05, 0x78, 0xA1, 0x80, 0x78, 0xBA, 0x81, 0x78, 0xD7, 0x82, 0x00, 0x00, 0x78, ++0xD3, 0x90, 0x8A, 0xEE, 0xE0, 0xFF, 0x12, 0x7E, 0x6E, 0x02, 0x78, 0xD7, 0x90, 0x8A, 0xE8, 0xE0, ++0xFF, 0xB4, 0x02, 0x08, 0x90, 0x8A, 0xE5, 0x74, 0x01, 0xF0, 0x80, 0x0F, 0xEF, 0x90, 0x8A, 0xE5, ++0xB4, 0x03, 0x05, 0x74, 0x02, 0xF0, 0x80, 0x03, 0x74, 0x04, 0xF0, 0xC3, 0x90, 0x8A, 0xE9, 0xE0, ++0x94, 0x08, 0x50, 0x79, 0xE4, 0x90, 0x8A, 0xE4, 0xF0, 0x90, 0x8A, 0xE5, 0xE0, 0xFF, 0x90, 0x8A, ++0xE4, 0xE0, 0xC3, 0x9F, 0x40, 0x03, 0x02, 0x78, 0xD7, 0x90, 0x8A, 0xE9, 0xE0, 0xFE, 0xA3, 0xE0, ++0xFF, 0xC3, 0xEE, 0x94, 0x01, 0x90, 0x8A, 0xE4, 0xE0, 0x50, 0x1F, 0xFE, 0x2F, 0xFF, 0xEE, 0xFD, ++0xC3, 0x74, 0x03, 0x9D, 0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, 0xF5, 0x82, 0x74, 0x8A, ++0x3C, 0xF5, 0x83, 0xE0, 0xFD, 0x12, 0x51, 0xFB, 0x80, 0x2B, 0xFF, 0xFD, 0xC3, 0x74, 0x03, 0x9D, ++0xFD, 0xE4, 0x94, 0x00, 0xFC, 0x74, 0xEB, 0x2D, 0xF5, 0x82, 0x74, 0x8A, 0x3C, 0xF5, 0x83, 0xE0, ++0xFE, 0xEF, 0xFD, 0x90, 0x8A, 0xEA, 0xE0, 0x2D, 0xFD, 0x90, 0x8A, 0xE9, 0xE0, 0x34, 0x00, 0x8D, ++0x82, 0xF5, 0x83, 0xEE, 0xF0, 0x90, 0x8A, 0xE4, 0xE0, 0x04, 0xF0, 0x80, 0x8C, 0xC3, 0x90, 0x8A, ++0xE9, 0xE0, 0x94, 0x10, 0x40, 0x02, 0x01, 0xD7, 0x90, 0x8A, 0xE8, 0xE0, 0x64, 0x04, 0x60, 0x02, ++0x01, 0xD7, 0x90, 0x8A, 0xEC, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, 0xFE, 0x78, 0x10, 0x12, 0x2A, 0x6C, ++0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xEB, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, ++0xFE, 0x78, 0x18, 0x12, 0x2A, 0x6C, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, 0x43, ++0x46, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x8A, 0xED, 0xE0, 0xFF, 0xE4, 0xFC, ++0xFD, 0xFE, 0x78, 0x08, 0x12, 0x2A, 0x6C, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0x12, ++0x43, 0x46, 0xA8, 0x04, 0xA9, 0x05, 0xAA, 0x06, 0xAB, 0x07, 0xA3, 0xE0, 0xFF, 0xE4, 0xFC, 0xFD, ++0xFE, 0x12, 0x43, 0x46, 0xA3, 0x12, 0x2A, 0x7F, 0x90, 0x8A, 0xEF, 0x12, 0x43, 0x53, 0x90, 0x80, ++0x85, 0x12, 0x2A, 0x7F, 0x90, 0x8A, 0xE9, 0xE0, 0xFE, 0xA3, 0xE0, 0xFF, 0x12, 0x2F, 0xD9, 0x80, ++0x36, 0x90, 0x8A, 0xED, 0xE0, 0xFE, 0xA3, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x8A, ++0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x37, 0x54, 0x80, 0x1D, 0x90, 0x8A, 0xED, 0xE0, 0xFE, 0xA3, ++0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0xFE, 0x90, 0x8A, 0xE6, 0xF0, 0xA3, 0xEF, 0xF0, 0x12, 0x36, ++0xCB, 0x80, 0x04, 0x7F, 0x00, 0x80, 0x02, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, ++0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0x90, 0x8A, 0xDD, 0xF0, 0xA3, 0x74, 0x04, 0xF0, 0xA3, 0xE4, ++0xF0, 0x90, 0x8A, 0xE2, 0xF0, 0xA3, 0xF0, 0x90, 0x02, 0x09, 0xE0, 0x90, 0x8A, 0xE1, 0xF0, 0x12, ++0x29, 0xD9, 0xFF, 0x90, 0x8A, 0xE1, 0xE0, 0x2F, 0x90, 0x8A, 0xE0, 0xF0, 0x30, 0xE0, 0x0B, 0x90, ++0x8A, 0xDB, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x80, 0x07, 0xE4, 0x90, 0x8A, 0xDB, 0xF0, 0xA3, ++0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xC3, 0x13, 0x90, 0xFD, 0x10, 0xF0, 0x90, 0x8A, 0xDD, 0xE0, 0x24, ++0x20, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFD, 0xA3, 0xE0, 0xFC, 0x2D, 0xFF, 0x24, 0x01, 0xF5, ++0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x90, 0x8A, 0xFD, 0xF0, 0x74, 0x02, 0x2F, 0xF5, 0x82, ++0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFE, 0xEC, 0x2D, 0x24, 0x03, 0xF5, 0x82, 0xE4, 0x34, 0xFC, ++0xF5, 0x83, 0xE0, 0x24, 0x00, 0xFF, 0xE4, 0x3E, 0x90, 0x8A, 0xFE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, ++0x8A, 0xDA, 0x74, 0x04, 0xF0, 0x90, 0x8A, 0xDB, 0xA3, 0xE0, 0xFF, 0xA3, 0xE0, 0x2F, 0xFF, 0x90, ++0x8A, 0xDA, 0xE0, 0xFE, 0x2F, 0x24, 0x00, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0xFF, ++0x74, 0xFC, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x8A, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0x8A, 0xDA, 0xE0, ++0x04, 0xF0, 0xE0, 0xB4, 0x08, 0xCF, 0x12, 0x76, 0xF2, 0xEF, 0x70, 0x45, 0x90, 0x01, 0xC3, 0xE0, ++0x60, 0x2B, 0xC3, 0x90, 0x8A, 0xE3, 0xE0, 0x94, 0xE8, 0x90, 0x8A, 0xE2, 0xE0, 0x94, 0x03, 0x40, ++0x09, 0x90, 0x01, 0xC6, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x79, 0x90, 0x8A, 0xE2, 0xE4, 0x75, 0xF0, ++0x01, 0x12, 0x42, 0x81, 0x7F, 0x0A, 0x7E, 0x00, 0x12, 0x37, 0x54, 0x80, 0xCF, 0x90, 0x01, 0xC6, ++0xE0, 0x90, 0x01, 0xC3, 0x30, 0xE2, 0x05, 0x74, 0xFE, 0xF0, 0x80, 0x57, 0x74, 0xFF, 0xF0, 0x80, ++0x52, 0x90, 0x8A, 0xDD, 0xE0, 0xB4, 0x78, 0x2E, 0xE4, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0x04, 0xF0, ++0x90, 0x8A, 0xDB, 0xE0, 0x70, 0x04, 0xA3, 0xE0, 0x64, 0x80, 0x90, 0x8A, 0xDB, 0x70, 0x05, 0xF0, ++0xA3, 0xF0, 0x80, 0x06, 0xE4, 0xF0, 0xA3, 0x74, 0x80, 0xF0, 0x90, 0x8A, 0xE0, 0xE0, 0xC3, 0x13, ++0x90, 0xFD, 0x10, 0xF0, 0x80, 0x07, 0x90, 0x8A, 0xDD, 0xE0, 0x24, 0x08, 0xF0, 0x90, 0x8A, 0xDE, ++0x74, 0xFF, 0xF5, 0xF0, 0x12, 0x42, 0x81, 0x90, 0x8A, 0xDE, 0xE0, 0x70, 0x02, 0xA3, 0xE0, 0x60, ++0x02, 0x21, 0x32, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x29, 0xD9, 0x90, 0x8B, 0x05, 0xF0, 0x90, ++0x00, 0x01, 0x12, 0x42, 0x20, 0x90, 0x8B, 0x06, 0xF0, 0x22, 0xE4, 0xF5, 0x61, 0x22, 0x51, 0x67, ++0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x7F, 0x78, 0x7E, ++0x08, 0x12, 0x27, 0xDE, 0x90, 0x8B, 0x1C, 0x12, 0x2A, 0x7F, 0x7F, 0x04, 0x7E, 0x0C, 0x12, 0x27, ++0xDE, 0x90, 0x8B, 0x20, 0x12, 0x2A, 0x7F, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x27, 0xDE, 0x90, 0x8B, ++0x24, 0x12, 0x2A, 0x7F, 0x90, 0x8B, 0x09, 0xE0, 0x90, 0x8B, 0x1C, 0xB4, 0x01, 0x0D, 0x12, 0x43, ++0x53, 0xEF, 0x54, 0xC7, 0xFF, 0xED, 0x54, 0xC7, 0xFD, 0x80, 0x07, 0x12, 0x43, 0x53, 0xEF, 0x54, ++0xC7, 0xFF, 0xEC, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x78, 0x7E, 0x08, 0x12, 0x2F, 0xD9, ++0x90, 0x8B, 0x20, 0x12, 0x43, 0x53, 0xEF, 0x54, 0x0F, 0xFF, 0xEC, 0x90, 0x80, 0x85, 0x12, 0x2A, ++0x7F, 0x7F, 0x04, 0x7E, 0x0C, 0x12, 0x2F, 0xD9, 0x90, 0x8B, 0x24, 0x12, 0x43, 0x53, 0xEF, 0x44, ++0x02, 0xFF, 0xEC, 0x90, 0x80, 0x85, 0x12, 0x2A, 0x7F, 0x7F, 0x00, 0x7E, 0x08, 0x12, 0x2F, 0xD9, ++0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x27, 0xDE, 0x90, 0x8B, 0x28, 0x12, 0x2A, 0x7F, 0x90, 0x80, 0x85, ++0x12, 0x2A, 0x8B, 0x00, 0x1B, 0x25, 0xA0, 0x7F, 0x70, 0x7E, 0x0E, 0x12, 0x2F, 0xD9, 0x90, 0x80, ++0x59, 0x12, 0x2A, 0x8B, 0x00, 0x00, 0x00, 0x00, 0xE4, 0xFD, 0xFF, 0x12, 0x34, 0x81, 0x90, 0x8B, ++0x09, 0xE0, 0xB4, 0x01, 0x11, 0x90, 0x80, 0x59, 0x12, 0x2A, 0x8B, 0x00, 0x00, 0x00, 0x00, 0xE4, ++0xFD, 0x7F, 0x01, 0x12, 0x34, 0x81, 0x22, 0x51, 0x6D, 0x90, 0x8B, 0x33, 0x74, 0x02, 0xF0, 0x22, ++0x51, 0x67, 0x90, 0x8B, 0x2D, 0x74, 0x04, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, ++0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xA1, 0x15, 0xEF, 0x12, 0x43, 0x94, 0x7B, 0x77, ++0x00, 0x7B, 0xB1, 0x01, 0x7B, 0xF7, 0x02, 0x7C, 0x31, 0x03, 0x7C, 0x69, 0x04, 0x7C, 0xA2, 0x05, ++0x7C, 0xDD, 0x06, 0x00, 0x00, 0x7D, 0x15, 0xEE, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0xA1, ++0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFF, 0xB4, 0x05, 0x04, 0xB1, 0x24, 0xA1, 0x15, 0xEF, 0xB4, 0x06, ++0x06, 0x7F, 0x01, 0xB1, 0x39, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x03, 0x06, 0x7F, 0x01, ++0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xB1, 0x2E, 0xB1, 0x6B, 0xA1, ++0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0xA1, ++0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F, 0x01, 0xB1, 0x39, 0xA1, 0x15, 0xEE, ++0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0x64, 0x02, 0x60, ++0x02, 0xA1, 0x15, 0xB1, 0x2E, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, ++0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, ++0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80, 0x16, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0x7F, ++0x01, 0xB1, 0x39, 0x80, 0x08, 0xEE, 0xB4, 0x03, 0x04, 0x7F, 0x01, 0xB1, 0x1A, 0xB1, 0x8D, 0xA1, ++0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80, ++0x14, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x06, 0xEE, ++0xB4, 0x02, 0x02, 0xB1, 0x2E, 0xB1, 0x76, 0xA1, 0x15, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, ++0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x13, 0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0x80, ++0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, 0x02, 0xB1, 0x2E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, ++0x04, 0xB1, 0x6B, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, 0x02, 0xB1, 0x24, 0x71, 0x40, ++0x80, 0x73, 0x90, 0x8B, 0x2D, 0xE0, 0xFE, 0xB4, 0x06, 0x06, 0xE4, 0xFF, 0xB1, 0x39, 0x80, 0x13, ++0xEE, 0xB4, 0x03, 0x06, 0x7F, 0x01, 0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, ++0x02, 0xB1, 0x2E, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x01, 0x04, 0xB1, 0x6B, 0x80, 0x0B, 0x90, 0x8B, ++0x2D, 0xE0, 0xB4, 0x04, 0x04, 0x7F, 0x01, 0xB1, 0x48, 0xB1, 0x80, 0x80, 0x38, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x04, 0x06, 0x7F, 0x01, 0xB1, 0x48, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x05, ++0x02, 0xB1, 0x24, 0x90, 0x8B, 0x2D, 0xE0, 0x70, 0x04, 0xB1, 0x61, 0x80, 0x16, 0x90, 0x8B, 0x2D, ++0xE0, 0xB4, 0x03, 0x06, 0xE4, 0xFF, 0xB1, 0x1A, 0x80, 0x09, 0x90, 0x8B, 0x2D, 0xE0, 0xB4, 0x02, ++0x02, 0xB1, 0x2E, 0xB1, 0x9A, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x12, 0x4A, 0xB2, 0x90, 0x8B, 0x2D, ++0x74, 0x01, 0xF0, 0x22, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x90, 0x05, ++0x22, 0xE4, 0xF0, 0x90, 0x8B, 0x2D, 0x04, 0xF0, 0x22, 0xEF, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, ++0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x90, 0x8B, 0x56, 0xEF, 0xF0, 0x12, 0x4F, 0xED, ++0x90, 0x8B, 0x56, 0xE0, 0x60, 0x05, 0x90, 0x05, 0x22, 0xE4, 0xF0, 0xE4, 0x90, 0x8B, 0x2D, 0xF0, ++0x22, 0x12, 0x4A, 0xCC, 0x90, 0x8B, 0x2D, 0x74, 0x01, 0xF0, 0x22, 0x7F, 0x01, 0x12, 0x4A, 0x7C, ++0xE4, 0x90, 0x8B, 0x2D, 0xF0, 0x22, 0x12, 0x4A, 0x32, 0x90, 0x8B, 0x2D, 0x74, 0x03, 0xF0, 0x22, ++0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x05, 0xF0, 0x22, 0x90, 0x05, 0x22, ++0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x2D, 0x74, 0x02, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0x6F, 0xF0, ++0x90, 0x8B, 0x2D, 0x74, 0x06, 0xF0, 0x22, 0x90, 0x05, 0x22, 0x74, 0xFF, 0xF0, 0x90, 0x8B, 0x33, ++0x74, 0x04, 0xF0, 0x22, 0x12, 0x4F, 0xED, 0x90, 0x8B, 0x33, 0x74, 0x04, 0xF0, 0x22, 0x90, 0x01, ++0x57, 0xE0, 0x60, 0x3C, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, ++0x8B, 0x1B, 0xE0, 0x60, 0x07, 0xE4, 0xF0, 0x53, 0x25, 0xFD, 0x80, 0x24, 0x90, 0x8B, 0x0C, 0xE0, ++0x04, 0xF0, 0x53, 0x25, 0xEF, 0x90, 0x8B, 0x10, 0xE0, 0xFF, 0x90, 0x8B, 0x0C, 0xE0, 0xD3, 0x9F, ++0x40, 0x0E, 0xE5, 0x21, 0xB4, 0x01, 0x09, 0x90, 0x8B, 0x0D, 0xE0, 0x70, 0x03, 0xE0, 0x04, 0xF0, ++0x90, 0x01, 0x5B, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5B, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x04, ++0xF0, 0xE4, 0x90, 0x8B, 0x18, 0xF0, 0x90, 0x01, 0x5F, 0xE0, 0x60, 0x10, 0x90, 0x01, 0x5F, 0xE4, ++0xF0, 0x90, 0x01, 0x3C, 0x74, 0x08, 0xF0, 0xE4, 0x90, 0x8B, 0x17, 0xF0, 0x22, 0xE4, 0x90, 0x8B, ++0x4F, 0xF0, 0xA3, 0xF0, 0x90, 0x05, 0xF8, 0xE0, 0x70, 0x0F, 0xA3, 0xE0, 0x70, 0x0B, 0xA3, 0xE0, ++0x70, 0x07, 0xA3, 0xE0, 0x70, 0x03, 0x7F, 0x01, 0x22, 0xD3, 0x90, 0x8B, 0x50, 0xE0, 0x94, 0xE8, ++0x90, 0x8B, 0x4F, 0xE0, 0x94, 0x03, 0x40, 0x03, 0x7F, 0x00, 0x22, 0x7F, 0x32, 0x7E, 0x00, 0x12, ++0x37, 0x54, 0x90, 0x8B, 0x4F, 0xE4, 0x75, 0xF0, 0x01, 0x12, 0x42, 0x81, 0x80, 0xC6, 0x8F, 0x0F, ++0xE4, 0x90, 0x8A, 0xF3, 0xF0, 0xE5, 0x0F, 0x14, 0xFE, 0x90, 0x8A, 0xF3, 0xE0, 0xFF, 0xC3, 0x9E, ++0x50, 0x0E, 0xEF, 0x04, 0xFD, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE5, ++0xE5, 0x0F, 0x14, 0xFF, 0x7D, 0xFF, 0x12, 0x34, 0xB7, 0x90, 0x8A, 0xF3, 0xE5, 0x0F, 0xF0, 0x90, ++0x8A, 0xF3, 0xE0, 0xC3, 0x94, 0xFF, 0x50, 0x0F, 0xE0, 0xFF, 0x04, 0xFD, 0x12, 0x34, 0xB7, 0x90, ++0x8A, 0xF3, 0xE0, 0x04, 0xF0, 0x80, 0xE8, 0xAD, 0x0F, 0x7F, 0xFF, 0x02, 0x34, 0xB7, 0xDC, 0xD3, ++}; ++#endif ++ ++//8188C_Formal_All_PHYforMP_111117 2011-11-23 ++//8192C_Formal_92CU_PHYforMP_110817 2011-11-23 ++ ++u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x800,0x80040002, ++0x804,0x00000003, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10000330, //for Broadcom AP IOT ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x01000100, ++0x82c,0x00390004, ++0x830,0x27272727, ++0x834,0x27272727, ++0x838,0x27272727, ++0x83c,0x27272727, ++0x840,0x00010000, ++0x844,0x00010000, ++0x848,0x27272727, ++0x84c,0x27272727, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x0c1b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x27272727, ++0x86c,0x2b2b2b27, ++0x870,0x07000700, ++0x874,0x22184000, ++0x878,0x08080808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xcc0000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121313, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05633, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x69543420, ++0xc54,0x43bc0094, ++0xc58,0x69543420, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x2186115b, ++0xc78,0x0000001f, ++0xc7c,0x00b99612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0xa0e40000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020403, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000010, ++0xe68,0x001b25a4, ++0xe6c,0x63db25a4, ++0xe70,0x63db25a4, ++0xe74,0x0c1b25a4, ++0xe78,0x0c1b25a4, ++0xe7c,0x0c1b25a4, ++0xe80,0x0c1b25a4, ++0xe84,0x63db25a4, ++0xe88,0x0c1b25a4, ++0xe8c,0x63db25a4, ++0xed0,0x63db25a4, ++0xed4,0x63db25a4, ++0xed8,0x63db25a4, ++0xedc,0x001b25a4, ++0xee0,0x001b25a4, ++0xeec,0x6fdb25a4, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10000330, //for Broadcom AP IOT ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x32323200, ++0x870,0x07000700, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x69543420, ++0xc54,0x43bc0094, ++0xc58,0x69543420, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00000740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { ++0xe00,0xffffffff,0x07090c0c, ++0xe04,0xffffffff,0x01020405, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x0b0c0c0e, ++0xe14,0xffffffff,0x01030506, ++0xe18,0xffffffff,0x0b0c0d0e, ++0xe1c,0xffffffff,0x01030509, ++0x830,0xffffffff,0x07090c0c, ++0x834,0xffffffff,0x01020405, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x0b0c0d0e, ++0x848,0xffffffff,0x01030509, ++0x84c,0xffffffff,0x0b0c0d0e, ++0x868,0xffffffff,0x01030509, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x06060606, ++0xe14,0xffffffff,0x00020406, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x06060606, ++0x848,0xffffffff,0x00020406, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = { ++0xe00,0xffffffff,0x0a0c0c0c, ++0xe04,0xffffffff,0x02040608, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x0a0c0d0e, ++0xe14,0xffffffff,0x02040608, ++0xe18,0xffffffff,0x0a0c0d0e, ++0xe1c,0xffffffff,0x02040608, ++0x830,0xffffffff,0x0a0c0c0c, ++0x834,0xffffffff,0x02040608, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x0a0c0d0e, ++0x848,0xffffffff,0x02040608, ++0x84c,0xffffffff,0x0a0c0d0e, ++0x868,0xffffffff,0x02040608, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x06060606, ++0xe14,0xffffffff,0x00020406, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x06060606, ++0x848,0xffffffff,0x00020406, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = { ++0xc30,0x69e9ac4a, ++0xc3c,0x0a979718, ++}; ++ ++u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x040,0x000c0004, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10000330, //for Broadcom AP IOT ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390204, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x20202000, ++0x870,0x03000300, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00ffc3f1, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x15160000, ++0xa24,0x070b0f12, ++0xa28,0x00000104, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954342e, ++0xc54,0x43bc0094, ++0xc58,0x6954342f, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c46000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x24000090, ++0xc84,0x20f60000, ++0xc88,0x24000090, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00000740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x24242424, ++0xe04,0x24242424, ++0xe08,0x03902024, ++0xe10,0x24242424, ++0xe14,0x24242424, ++0xe18,0x24242424, ++0xe1c,0x24242424, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xee8,0x31555448, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = { ++0x024,0x0011800d, ++0x028,0x00ffdb83, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10000330, //for Broadcom AP IOT ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x32323200, ++0x870,0x07000700, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x69543420, ++0xc54,0x43bc0094, ++0xc58,0x69543420, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00000740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = { ++0x024,0x0011800d, ++0x028,0x00ffdb83, ++0x800,0x80040002, ++0x804,0x00000003, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10000330, //for Broadcom AP IOT ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x01000100, ++0x82c,0x00390004, ++0x830,0x27272727, ++0x834,0x27272727, ++0x838,0x27272727, ++0x83c,0x27272727, ++0x840,0x00010000, ++0x844,0x00010000, ++0x848,0x27272727, ++0x84c,0x27272727, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x0c1b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x27272727, ++0x86c,0x2b2b2b27, ++0x870,0x07000700, ++0x874,0x22184000, ++0x878,0x08080808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xcc0000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121313, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05633, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x69543420, ++0xc54,0x43bc0094, ++0xc58,0x69543420, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x218610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0xa0e40000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020403, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000010, ++0xe68,0x001b25a4, ++0xe6c,0x63db25a4, ++0xe70,0x63db25a4, ++0xe74,0x0c1b25a4, ++0xe78,0x0c1b25a4, ++0xe7c,0x0c1b25a4, ++0xe80,0x0c1b25a4, ++0xe84,0x63db25a4, ++0xe88,0x0c1b25a4, ++0xe8c,0x63db25a4, ++0xed0,0x63db25a4, ++0xed4,0x63db25a4, ++0xed8,0x63db25a4, ++0xedc,0x001b25a4, ++0xee0,0x001b25a4, ++0xeec,0x6fdb25a4, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = { ++0xe00,0xffffffff,0x06080808, ++0xe04,0xffffffff,0x00040406, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x04060608, ++0xe14,0xffffffff,0x00020204, ++0xe18,0xffffffff,0x04060608, ++0xe1c,0xffffffff,0x00020204, ++0x830,0xffffffff,0x06080808, ++0x834,0xffffffff,0x00040406, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x04060608, ++0x848,0xffffffff,0x00020204, ++0x84c,0xffffffff,0x04060608, ++0x868,0xffffffff,0x00020204, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287af, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x00014297, ++0x013,0x00010295, ++0x013,0x0000c298, ++0x013,0x0000819c, ++0x013,0x000040a8, ++0x013,0x0000001c, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++}; ++ ++u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f405, ++0x015,0x0004f405, ++0x015,0x0008f405, ++0x015,0x000cf405, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = { ++0x0, }; ++ ++ ++u32 Rtl8192CURadioA_2T_mCardArray[RadioA_2T_mCardArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_2T_mCardArray[RadioB_2T_mCardArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287af, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x00014297, ++0x013,0x00010295, ++0x013,0x0000c298, ++0x013,0x0000819c, ++0x013,0x000040a8, ++0x013,0x0000001c, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++}; ++ ++u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f200, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb0, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e529, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00000255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x0000083c, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000977c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x000d8000, ++0x012,0x00090000, ++0x012,0x00051000, ++0x012,0x00012000, ++0x013,0x00028fb4, ++0x013,0x00024fa8, ++0x013,0x000207a4, ++0x013,0x0001c3b0, ++0x013,0x000183a4, ++0x013,0x00014398, ++0x013,0x000101a4, ++0x013,0x0000c198, ++0x013,0x000080a4, ++0x013,0x00004098, ++0x013,0x00000000, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f405, ++0x015,0x0004f405, ++0x015,0x0008f405, ++0x015,0x000cf405, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = { ++0x0, }; ++ ++// MAC reg V14 - 2011-11-23 ++u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = { ++0x420,0x00000080, ++0x423,0x00000000, ++0x430,0x00000000, ++0x431,0x00000000, ++0x432,0x00000000, ++0x433,0x00000001, ++0x434,0x00000004, ++0x435,0x00000005, ++0x436,0x00000006, ++0x437,0x00000007, ++0x438,0x00000000, ++0x439,0x00000000, ++0x43a,0x00000000, ++0x43b,0x00000001, ++0x43c,0x00000004, ++0x43d,0x00000005, ++0x43e,0x00000006, ++0x43f,0x00000007, ++0x440,0x0000005d, ++0x441,0x00000001, ++0x442,0x00000000, ++0x444,0x00000015, ++0x445,0x000000f0, ++0x446,0x0000000f, ++0x447,0x00000000, ++0x458,0x00000041, ++0x459,0x000000a8, ++0x45a,0x00000072, ++0x45b,0x000000b9, ++0x460,0x00000066, ++0x461,0x00000066, ++0x462,0x00000008, ++0x463,0x00000003, ++0x4c8,0x000000ff, ++0x4c9,0x00000008, ++0x4cc,0x000000ff, ++0x4cd,0x000000ff, ++0x4ce,0x00000001, ++0x500,0x00000026, ++0x501,0x000000a2, ++0x502,0x0000002f, ++0x503,0x00000000, ++0x504,0x00000028, ++0x505,0x000000a3, ++0x506,0x0000005e, ++0x507,0x00000000, ++0x508,0x0000002b, ++0x509,0x000000a4, ++0x50a,0x0000005e, ++0x50b,0x00000000, ++0x50c,0x0000004f, ++0x50d,0x000000a4, ++0x50e,0x00000000, ++0x50f,0x00000000, ++0x512,0x0000001c, ++0x514,0x0000000a, ++0x515,0x00000010, ++0x516,0x0000000a, ++0x517,0x00000010, ++0x51a,0x00000016, ++0x524,0x0000000f, ++0x525,0x0000004f, ++0x546,0x00000040, ++0x547,0x00000000, ++0x550,0x00000010, ++0x551,0x00000010, ++0x559,0x00000002, ++0x55a,0x00000002, ++0x55d,0x000000ff, ++0x605,0x00000030, ++0x608,0x0000000e, ++0x609,0x0000002a, ++0x652,0x00000020, ++0x652,0x00000020, ++0x63c,0x00000008, ++0x63d,0x00000008, ++0x63e,0x0000000c, ++0x63f,0x0000000c, ++0x66e,0x00000005, ++0x700,0x00000021, ++0x701,0x00000043, ++0x702,0x00000065, ++0x703,0x00000087, ++0x708,0x00000021, ++0x709,0x00000043, ++0x70a,0x00000065, ++0x70b,0x00000087, ++}; ++ ++u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = { ++0x0, }; ++ ++u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7a060001, ++0xc78,0x79070001, ++0xc78,0x78080001, ++0xc78,0x77090001, ++0xc78,0x760a0001, ++0xc78,0x750b0001, ++0xc78,0x740c0001, ++0xc78,0x730d0001, ++0xc78,0x720e0001, ++0xc78,0x710f0001, ++0xc78,0x70100001, ++0xc78,0x6f110001, ++0xc78,0x6e120001, ++0xc78,0x6d130001, ++0xc78,0x6c140001, ++0xc78,0x6b150001, ++0xc78,0x6a160001, ++0xc78,0x69170001, ++0xc78,0x68180001, ++0xc78,0x67190001, ++0xc78,0x661a0001, ++0xc78,0x651b0001, ++0xc78,0x641c0001, ++0xc78,0x631d0001, ++0xc78,0x621e0001, ++0xc78,0x611f0001, ++0xc78,0x60200001, ++0xc78,0x49210001, ++0xc78,0x48220001, ++0xc78,0x47230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7a460001, ++0xc78,0x79470001, ++0xc78,0x78480001, ++0xc78,0x77490001, ++0xc78,0x764a0001, ++0xc78,0x754b0001, ++0xc78,0x744c0001, ++0xc78,0x734d0001, ++0xc78,0x724e0001, ++0xc78,0x714f0001, ++0xc78,0x70500001, ++0xc78,0x6f510001, ++0xc78,0x6e520001, ++0xc78,0x6d530001, ++0xc78,0x6c540001, ++0xc78,0x6b550001, ++0xc78,0x6a560001, ++0xc78,0x69570001, ++0xc78,0x68580001, ++0xc78,0x67590001, ++0xc78,0x665a0001, ++0xc78,0x655b0001, ++0xc78,0x645c0001, ++0xc78,0x635d0001, ++0xc78,0x625e0001, ++0xc78,0x615f0001, ++0xc78,0x60600001, ++0xc78,0x49610001, ++0xc78,0x48620001, ++0xc78,0x47630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ ++u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7a060001, ++0xc78,0x79070001, ++0xc78,0x78080001, ++0xc78,0x77090001, ++0xc78,0x760a0001, ++0xc78,0x750b0001, ++0xc78,0x740c0001, ++0xc78,0x730d0001, ++0xc78,0x720e0001, ++0xc78,0x710f0001, ++0xc78,0x70100001, ++0xc78,0x6f110001, ++0xc78,0x6e120001, ++0xc78,0x6d130001, ++0xc78,0x6c140001, ++0xc78,0x6b150001, ++0xc78,0x6a160001, ++0xc78,0x69170001, ++0xc78,0x68180001, ++0xc78,0x67190001, ++0xc78,0x661a0001, ++0xc78,0x651b0001, ++0xc78,0x641c0001, ++0xc78,0x631d0001, ++0xc78,0x621e0001, ++0xc78,0x611f0001, ++0xc78,0x60200001, ++0xc78,0x49210001, ++0xc78,0x48220001, ++0xc78,0x47230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7a460001, ++0xc78,0x79470001, ++0xc78,0x78480001, ++0xc78,0x77490001, ++0xc78,0x764a0001, ++0xc78,0x754b0001, ++0xc78,0x744c0001, ++0xc78,0x734d0001, ++0xc78,0x724e0001, ++0xc78,0x714f0001, ++0xc78,0x70500001, ++0xc78,0x6f510001, ++0xc78,0x6e520001, ++0xc78,0x6d530001, ++0xc78,0x6c540001, ++0xc78,0x6b550001, ++0xc78,0x6a560001, ++0xc78,0x69570001, ++0xc78,0x68580001, ++0xc78,0x67590001, ++0xc78,0x665a0001, ++0xc78,0x655b0001, ++0xc78,0x645c0001, ++0xc78,0x635d0001, ++0xc78,0x625e0001, ++0xc78,0x615f0001, ++0xc78,0x60600001, ++0xc78,0x49610001, ++0xc78,0x48620001, ++0xc78,0x47630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ ++u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7b060001, ++0xc78,0x7b070001, ++0xc78,0x7b080001, ++0xc78,0x7a090001, ++0xc78,0x790a0001, ++0xc78,0x780b0001, ++0xc78,0x770c0001, ++0xc78,0x760d0001, ++0xc78,0x750e0001, ++0xc78,0x740f0001, ++0xc78,0x73100001, ++0xc78,0x72110001, ++0xc78,0x71120001, ++0xc78,0x70130001, ++0xc78,0x6f140001, ++0xc78,0x6e150001, ++0xc78,0x6d160001, ++0xc78,0x6c170001, ++0xc78,0x6b180001, ++0xc78,0x6a190001, ++0xc78,0x691a0001, ++0xc78,0x681b0001, ++0xc78,0x671c0001, ++0xc78,0x661d0001, ++0xc78,0x651e0001, ++0xc78,0x641f0001, ++0xc78,0x63200001, ++0xc78,0x62210001, ++0xc78,0x61220001, ++0xc78,0x60230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7b460001, ++0xc78,0x7b470001, ++0xc78,0x7b480001, ++0xc78,0x7a490001, ++0xc78,0x794a0001, ++0xc78,0x784b0001, ++0xc78,0x774c0001, ++0xc78,0x764d0001, ++0xc78,0x754e0001, ++0xc78,0x744f0001, ++0xc78,0x73500001, ++0xc78,0x72510001, ++0xc78,0x71520001, ++0xc78,0x70530001, ++0xc78,0x6f540001, ++0xc78,0x6e550001, ++0xc78,0x6d560001, ++0xc78,0x6c570001, ++0xc78,0x6b580001, ++0xc78,0x6a590001, ++0xc78,0x695a0001, ++0xc78,0x685b0001, ++0xc78,0x675c0001, ++0xc78,0x665d0001, ++0xc78,0x655e0001, ++0xc78,0x645f0001, ++0xc78,0x63600001, ++0xc78,0x62610001, ++0xc78,0x61620001, ++0xc78,0x60630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c +@@ -0,0 +1,2564 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++#include ++#include "Hal8192CUHWImg_wowlan.h" ++ ++ ++u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x43,0x72,0x34,0x00,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x2a,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x54,0xfe,0xf0,0x02,0x50,0xd6,0x22,0xe4, ++0xf5,0x75,0x22,0x02,0x5f,0xe2,0x02,0x5f,0xe9,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x29,0xd9,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x1c,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0x65,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x5a,0x3f,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x62,0x4a,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x5a,0x3f,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x5b,0xb3,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x63, ++0x56,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x61,0xa3,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x68,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x46,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x51,0x0c,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef,0x64, ++0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36, ++0x75,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x36,0xe6,0x7d,0x10,0x7f, ++0x03,0x12,0x36,0x92,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12, ++0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a, ++0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d, ++0x7b,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0x7d,0x10,0x7f,0x03, ++0x12,0x36,0x92,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x12,0x64,0x11,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22,0x8b, ++0x0e,0x8a,0x0f,0x89,0x10,0x12,0x62,0x3e,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x29, ++0xd9,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xfe, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x7f,0x78,0x7e,0x08, ++0x12,0x27,0xde,0x90,0x90,0xd8,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde, ++0x90,0x90,0xdc,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0xe0, ++0x12,0x2a,0x7f,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43,0x09, ++0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54,0xc7, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44,0x02, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f, ++0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xe4,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59, ++0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd, ++0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,0x08,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf, ++0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b, ++0xed,0xf0,0x90,0x91,0x9a,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f, ++0xf0,0x51,0xe6,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x9b,0xe0, ++0x60,0x16,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90, ++0x91,0x9a,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x51,0xde,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51, ++0xe6,0x90,0x91,0x9b,0xe0,0x60,0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f, ++0x80,0x1a,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x51,0xe6,0xd0, ++0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x51,0xe6,0xd0,0xd0, ++0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0x81,0xaa, ++0x90,0x90,0xf3,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71, ++0xee,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x45,0xe0, ++0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x54,0xef, ++0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38, ++0x90,0x90,0xf3,0x74,0x01,0xf0,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd, ++0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x71,0xee,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x71,0xee,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0x90,0x90,0xf5,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90, ++0x90,0xf4,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05, ++0x60,0xe0,0x90,0x91,0x03,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05, ++0x62,0xe0,0x90,0x91,0x05,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x12,0x6e,0x67, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xa1,0xb2, ++0x90,0x90,0xf4,0xe0,0x70,0x02,0xa1,0xb2,0x90,0x90,0xf8,0xe0,0x70,0x02,0xa1,0xb2, ++0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x71,0xe5,0x90,0x00,0x46,0xe0,0x44,0x01, ++0xfd,0x7f,0x46,0x71,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x71, ++0xee,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0, ++0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0, ++0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0, ++0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x37,0x00, ++0x80,0x2b,0x90,0x90,0xf5,0xe0,0x70,0x2d,0x90,0x91,0x07,0x71,0xe4,0x90,0x00,0x46, ++0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x71,0xee,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33, ++0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90,0x91,0x1c, ++0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12, ++0x42,0x20,0x90,0x90,0xf6,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0xef,0x12,0x2a,0x7f,0xab,0x0e,0xaa, ++0x0f,0xa9,0x10,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a, ++0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43, ++0x09,0xec,0x54,0x03,0xfc,0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x2a,0x7f,0x90,0x05, ++0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27, ++0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x2a,0x7f,0x90, ++0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x90,0xf6,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x71,0xee,0x90, ++0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10, ++0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x48, ++0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f, ++0x46,0x71,0xee,0xe4,0x90,0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54, ++0x71,0xee,0x7d,0xff,0x7f,0x55,0x71,0xee,0x7d,0xff,0x7f,0x56,0x71,0xee,0x7d,0xff, ++0x7f,0x57,0x61,0xee,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x71,0xee,0xe4,0xfd, ++0x7f,0x51,0x71,0xee,0xe4,0xfd,0x7f,0x52,0x71,0xee,0xe4,0xfd,0x7f,0x53,0x61,0xee, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x22,0xed,0xf0,0x90,0x91,0x21,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x46,0x80,0x59,0x90,0x91,0x21,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90, ++0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4, ++0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0x51,0xe6,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0, ++0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x71,0xee,0x90,0x91,0x9f,0xe0,0x44,0xb0, ++0xfd,0x7f,0x49,0x61,0xee,0x12,0x47,0xe6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff, ++0x7d,0x01,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x75,0x28,0x33,0xe4, ++0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29, ++0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3, ++0xf0,0x75,0x8e,0x02,0xf1,0x25,0xd1,0xe8,0x90,0x91,0x4f,0xef,0xf0,0xf1,0x0b,0x90, ++0x91,0x51,0xef,0xf0,0xf1,0x60,0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5, ++0x57,0xf1,0x02,0x12,0x61,0xc4,0x12,0x32,0x3d,0x12,0x44,0xff,0x11,0x0c,0xf1,0x36, ++0xd1,0xfb,0xd1,0xd0,0x12,0x44,0xfe,0x31,0x13,0x12,0x44,0xf4,0x12,0x6e,0x09,0x90, ++0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4e,0xb9,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4a,0xe6,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0, ++0x64,0x01,0xf0,0x24,0x2a,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30, ++0xe2,0x10,0x12,0x5f,0xf0,0xbf,0x01,0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12, ++0x71,0x97,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x60, ++0x2d,0x90,0x90,0xf7,0xe0,0x70,0x03,0x12,0x70,0x74,0x11,0xe7,0x90,0x91,0x3f,0xe0, ++0x90,0x01,0xba,0xf0,0x80,0xb6,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x67,0xe4,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xe1,0x17,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x29,0xd9,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x36,0xe6,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x36, ++0x75,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x31,0xf1,0x31,0x13,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x5a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x30,0x01,0x52,0x39,0x02,0x52,0x5b,0x03,0x52,0x64,0x09,0x52,0x6c, ++0x0c,0x52,0x75,0x0d,0x52,0x7d,0x0e,0x52,0x8e,0x1a,0x52,0x96,0x2c,0x52,0x41,0x2d, ++0x52,0x4a,0x2e,0x52,0x9e,0x30,0x52,0x53,0x3b,0x52,0x86,0x3c,0x00,0x00,0x52,0xa6, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0x72,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xf5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0x8d,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x65,0xd5,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x4b,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x66,0x0e,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4c,0xab,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x98,0x90,0x91,0x19, ++0x12,0x43,0x21,0x02,0x4d,0xe6,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0x90,0x90,0x91, ++0x19,0x12,0x43,0x21,0xa1,0x9b,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x7a,0x90,0x91, ++0x19,0x12,0x43,0x21,0xe1,0x78,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43, ++0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12, ++0x29,0xd9,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00, ++0x01,0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91, ++0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x26,0x80, ++0x10,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0x65,0x72,0x60,0x03,0x12,0x44, ++0xe8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72, ++0x01,0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x12,0x4f,0x10,0xe4,0xfd,0x7f,0x02, ++0x12,0x4f,0x10,0x71,0x6a,0xe4,0xff,0x71,0xcc,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5, ++0x76,0xf0,0x90,0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5, ++0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0x7f,0x0b,0x71,0xd9,0xef,0x65, ++0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05,0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x72,0x64,0x01,0x70,0x3f,0x71,0x6a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xcc,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4b, ++0xee,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4b,0xee,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x7f,0x02,0x71,0xd9,0x8f,0x76,0x90, ++0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xd7,0x22,0x90,0x01,0xca,0xe5, ++0x75,0xf0,0xef,0x60,0x03,0x12,0x4f,0xd7,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4a,0xe6,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4a,0xde,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5,0x15,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0,0x08,0x75,0x0e,0x00, ++0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91,0x48,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x12,0x66,0x56,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3, ++0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10, ++0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f,0x0a,0x7e,0x00,0x12, ++0x37,0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe, ++0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78,0x23,0xe4,0xf5,0x10, ++0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e,0xf5,0x0f,0x80,0x06, ++0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06, ++0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02,0x15,0x11,0xe5,0x12, ++0x45,0x11,0x60,0x02,0x81,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1c,0x12,0x43, ++0x41,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfe,0x4e,0xf0, ++0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x02,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff,0xe0,0x54,0xf7,0x4f, ++0xf0,0x12,0x29,0xd9,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xef,0x4e,0xf0, ++0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x40,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff,0xe0,0x54,0x7f,0x4f, ++0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0,0x54,0xfd,0x4f,0xf0, ++0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61,0xe0,0x54,0xfb,0x4f, ++0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90,0x91,0x5e,0xe0,0xff, ++0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0,0x54,0x01,0x90,0x01, ++0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x29,0xd9,0x20,0xe0,0x02,0x21,0xf1,0xe4,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0xff,0xc3, ++0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef,0x13,0x13,0x54,0x3f, ++0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x29,0xd9,0x13,0x13,0x13, ++0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0,0x90,0x91,0x61,0xe0, ++0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0, ++0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22, ++0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3, ++0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01, ++0x60,0x02,0x7f,0x00,0x22,0x12,0x29,0xd9,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80, ++0xfd,0x7f,0x80,0x02,0x4b,0xee,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41, ++0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x29,0xd9,0x60,0x02, ++0x80,0x01,0xe4,0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22, ++0x90,0x91,0x51,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd, ++0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01, ++0x12,0x42,0x20,0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90, ++0xf7,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4b,0xee,0x7d,0x40,0x7f, ++0x01,0x12,0x36,0xaf,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xcb,0xf0,0x74,0x57, ++0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a, ++0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90, ++0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0, ++0x51,0x30,0xef,0x64,0x01,0x70,0x30,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90, ++0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x91,0x37,0xf0,0x80,0x08,0x51, ++0x30,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5, ++0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0x5c,0xe5,0x2c,0x30,0xe3, ++0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57, ++0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4e,0xe4,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4a,0xe6,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x13,0x90,0x91,0x50,0x74,0x01,0xf0, ++0x90,0x01,0x36,0xf0,0x91,0x23,0x51,0x87,0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54, ++0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90, ++0x91,0x40,0xe4,0xf0,0x80,0x18,0x90,0x91,0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a, ++0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x4f,0xf5,0xe5,0x2e, ++0x30,0xe2,0x19,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05, ++0x58,0x74,0x03,0xf0,0x51,0xd8,0x90,0x91,0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3, ++0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60, ++0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4, ++0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01, ++0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01,0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57, ++0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd, ++0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01, ++0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01,0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b, ++0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8,0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30, ++0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60, ++0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30, ++0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x71,0x7e,0x74,0xcb,0x04,0x90,0x01,0xc4, ++0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0, ++0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32, ++0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x51, ++0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x91, ++0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x91,0x36,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54,0x0f,0xd3,0x94, ++0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01, ++0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d, ++0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04,0xf0,0xe5,0x70,0x64,0x03,0x60,0x05, ++0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0,0xff,0x74,0x01,0xd3,0x9f,0x50,0x14, ++0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b,0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff,0x90,0x91,0x54,0xe0,0xb5,0x07,0x07, ++0x71,0x4e,0xe4,0x90,0x91,0x55,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x42,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe5,0x6e, ++0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91,0x08,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58, ++0x90,0x91,0x71,0x12,0x43,0x41,0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0x90,0x91, ++0x80,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80, ++0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x6e,0x54, ++0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0xe4,0xff,0x12, ++0x48,0xb3,0x22,0x51,0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0, ++0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80, ++0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71, ++0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe4,0xfb,0x90,0x91,0x78,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5, ++0x70,0x70,0x02,0x81,0xb5,0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b, ++0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0, ++0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90, ++0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45, ++0x43,0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4, ++0xff,0x90,0x91,0x34,0xe0,0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5, ++0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90, ++0x91,0x2e,0xe0,0x60,0x10,0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d, ++0xf0,0x22,0x74,0x09,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0, ++0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0x53,0x91,0xef, ++0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0, ++0xff,0x90,0x00,0x56,0xe0,0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55, ++0x74,0x10,0xf0,0xe5,0x3d,0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d, ++0x30,0xe6,0x1b,0x90,0x00,0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x90,0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4c,0x03,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0x03,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56, ++0x74,0x01,0xf0,0xe5,0x3e,0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e, ++0x30,0xe2,0x06,0x90,0x00,0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00, ++0x56,0x74,0x08,0xf0,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0x99,0xf0,0x74, ++0x5d,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0, ++0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37, ++0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0x57,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90, ++0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44, ++0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90, ++0x91,0x37,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91, ++0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91, ++0x36,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10, ++0xf0,0x12,0x53,0x86,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12, ++0x6e,0xb9,0xe5,0x35,0x30,0xe0,0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f, ++0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80, ++0x1c,0xe5,0x0d,0xb4,0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05, ++0x90,0x00,0x83,0x80,0x08,0xe5,0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f, ++0x80,0x06,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f, ++0x30,0xe0,0x03,0xa3,0x80,0x03,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xf1,0x38,0x12,0x44, ++0xc2,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0, ++0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74, ++0x02,0xf0,0x74,0x99,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5d,0xa3,0xf0,0xd0,0x07,0xd0, ++0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0, ++0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xe5,0x6f,0x30,0xe6,0x19,0xe5,0x6f,0x54, ++0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90, ++0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70,0x70,0x02, ++0xe1,0xe1,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54, ++0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef,0x90,0x91, ++0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee, ++0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef, ++0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06, ++0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f,0xff,0xe4, ++0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40, ++0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44, ++0xc2,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24,0x8d,0x25,0x22, ++0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1,0x2c,0xc3,0x90, ++0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a,0x90,0x01,0xc6, ++0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x01,0x7e,0x00,0x12,0x37,0x54,0x80,0xcd,0x7f,0x01,0x22,0x90,0x01,0xcc, ++0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70,0x02,0x21,0x6f, ++0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x21,0x68,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12,0xf0,0x75,0x63, ++0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a,0x91,0x79,0x13, ++0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x91, ++0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x15, ++0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12, ++0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91, ++0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0, ++0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x51,0xf8,0x90,0x91,0x11, ++0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x91,0x9c,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x37,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0, ++0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f,0x0c,0x75,0x6e, ++0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0,0x90,0x91,0x39, ++0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x29,0xf0,0x90, ++0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32,0xf0,0xa3,0x74, ++0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74, ++0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0,0x90,0x91,0x25, ++0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0,0x90,0x91,0x26, ++0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0,0x22,0xe4,0x90, ++0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf, ++0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53,0x6e, ++0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x51,0x7e,0x90,0x91,0x9d,0xe0, ++0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90,0x00, ++0x11,0xe0,0x44,0x09,0xf0,0x12,0x4a,0xe6,0x90,0x90,0xd8,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xdc,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90, ++0xe0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd, ++0xff,0x12,0x34,0x81,0x90,0x91,0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a, ++0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x77,0xe4, ++0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f, ++0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91,0x97,0xe0,0x94,0x88,0x90,0x91,0x96, ++0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x91,0x96, ++0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90, ++0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7, ++0xe0,0x30,0xe0,0xb2,0x22,0x22,0x53,0x6e,0xf0,0x43,0x6e,0x01,0x71,0x55,0x71,0x67, ++0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x22,0x8f,0x78,0x12,0x47,0xe6,0xef,0x64,0x01, ++0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5,0x78,0x60,0x10,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01, ++0xc3,0xc0,0xd0,0x90,0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0, ++0x90,0x91,0x84,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90, ++0x91,0x87,0xe0,0x94,0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6, ++0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92, ++0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90, ++0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90, ++0x91,0x25,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0, ++0xef,0xc3,0x13,0x54,0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x13,0x13,0x54,0x01,0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70, ++0x26,0x12,0x2a,0x8b,0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f,0x12,0x2a, ++0x8b,0x00,0x00,0x03,0x10,0x80,0x24,0x12,0x2a,0x8b,0x00,0x00,0x01,0x10,0x90,0x91, ++0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91, ++0x26,0xe0,0x70,0x3d,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x1f,0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02, ++0xfc,0x90,0x91,0x1f,0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb, ++0xf0,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x49,0x7f,0x90,0x01,0xe5,0xe5,0x70,0xf0, ++0x90,0x91,0x3b,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x91,0x2f,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74, ++0x0a,0xf0,0x90,0x91,0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91, ++0x35,0x74,0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90, ++0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91,0x41,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x47, ++0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0,0xf5,0x1a,0xe4, ++0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0x74, ++0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5,0x90,0x91,0x1d, ++0xe0,0x12,0x43,0x4a,0x66,0xb3,0x00,0x67,0xdc,0x01,0x66,0xba,0x02,0x66,0xba,0x03, ++0x66,0xba,0x04,0x67,0xdc,0x05,0x67,0xac,0x80,0x67,0xc2,0x81,0x67,0xdc,0x82,0x00, ++0x00,0x67,0xd8,0xaf,0x1e,0x12,0x73,0xea,0xe1,0xdc,0x90,0x91,0x1d,0xe0,0xff,0xb4, ++0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x91,0x1c,0xb4,0x03, ++0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19,0x94,0x08,0x50,0x49, ++0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f,0x40,0x02,0xe1,0xdc, ++0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a,0xff,0xc3,0x74,0x03,0x95, ++0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4b,0xee,0x80,0x1a,0xc3,0x74,0x03,0x95,0x16, ++0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a,0xfd,0xec,0x35,0x19,0x8d, ++0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xba,0xc3,0xe5,0x19,0x94,0x10,0x40,0x02, ++0xe1,0xdc,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x02,0xe1,0xdc,0xaf,0x1c,0xfc,0xfd, ++0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b, ++0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc, ++0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12, ++0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe, ++0x12,0x42,0xfc,0xa3,0x12,0x2a,0x7f,0x90,0x91,0x1e,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0xaf,0x1a,0xae,0x19,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x1d,0x7f,0x00, ++0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x37,0x54, ++0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17, ++0xaf,0x18,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0, ++0x92,0xaf,0x22,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10,0x8a,0x11,0x89,0x12,0xe4,0x90, ++0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4a,0xe6,0xe5,0x0e,0x54,0x03,0xff, ++0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x54, ++0x7f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x91,0x11,0xe0, ++0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x91,0x11,0xe0,0xc3,0x94, ++0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x42,0x4d, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98,0xf0,0xa3,0xf0,0x90,0x05,0xf8, ++0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f, ++0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90,0x91,0x98,0xe0,0x94,0x03,0x40, ++0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x91,0x98,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0xef,0x70,0x02,0x41,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xc1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09, ++0x12,0x2f,0xd9,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xc1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xd4,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x80,0x12,0x2a, ++0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x84,0x12,0x2a,0x7f,0x7f,0x6c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x88,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x90,0x8c,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x90,0x90,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x94,0x12, ++0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x98,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x9c,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x90,0xa0,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x90,0xa4,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xa8, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xac,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xb0,0x12,0x2a,0x7f,0x7f,0xd8,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x90,0xb4,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x90,0xb8,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90, ++0xbc,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xc0,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x90,0xc4,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x27,0xde,0x90,0x90,0xc8,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x27,0xde,0x90,0x90,0xcc,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x90,0xd0,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12, ++0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f, ++0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08, ++0x12,0x2f,0xd9,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4b,0xee, ++0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0,0x90, ++0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0,0x90, ++0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0,0x44, ++0xc0,0xfd,0x7f,0x51,0x02,0x4b,0xee,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04,0xe0, ++0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0, ++0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0,0x04, ++0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60, ++0x02,0xe1,0x6e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x90, ++0x91,0x07,0xe0,0x70,0x32,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x90,0xf4,0xe0,0xff,0xd1,0x67,0x90,0x91,0x07, ++0x74,0x01,0x12,0x4b,0xe4,0x80,0x40,0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90, ++0x90,0xf8,0xe0,0xff,0xd1,0x67,0xe4,0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44, ++0x01,0xfd,0x7f,0x45,0x12,0x4b,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91, ++0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91, ++0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90, ++0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x70,0x29,0x90,0x90, ++0xee,0xe0,0x64,0x14,0x60,0x03,0x02,0x70,0x29,0x90,0x90,0xfd,0xe0,0x70,0x25,0x90, ++0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91,0x01,0xe0,0x70, ++0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07,0x90,0x04,0xfd, ++0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90,0x90,0xfe,0xe0, ++0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90, ++0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04,0x49,0xf0,0x90, ++0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9,0xe0,0x90,0x04, ++0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb,0xe0,0x90,0x04, ++0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90,0xee,0xf0,0x90, ++0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,0xfd,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x8c, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x8e, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0,0xff,0x90,0x91, ++0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e,0xd3,0x94,0x01, ++0x40,0x11,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90,0xf8,0xe0,0xff, ++0x12,0x6e,0x67,0x22,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08,0x90,0x90,0xf5,0xe0, ++0x60,0x02,0x21,0x4b,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x90, ++0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0, ++0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9,0xf0,0x90,0x00,0x44, ++0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0, ++0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90,0x00,0x44,0xe0,0x30, ++0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24, ++0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90, ++0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x01,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x06,0x90,0xe0, ++0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f,0xe0,0xff,0x90, ++0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4a,0xf6,0x90,0x91,0x60,0xe0, ++0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x37,0x54,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0, ++0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0x90, ++0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90,0x01,0x1f,0xe0, ++0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91,0x56,0xe0,0x20, ++0xe0,0x02,0x61,0xc4,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0,0xff,0x90,0x91, ++0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xc4,0x90,0x91,0x11,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54,0xf8,0xff,0xed, ++0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x7a, ++0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91,0x13,0xf0,0xa3, ++0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4,0x35,0xf0,0xfe, ++0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0,0xff,0xad,0x03, ++0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19,0x74,0x02,0xf0, ++0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea,0x8f,0xf0,0x12, ++0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24,0x01,0xff,0x90, ++0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24,0x20,0x70,0x27, ++0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x02,0x61,0x9c, ++0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0,0x44,0x08,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x61,0x95,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x13,0x54,0x03, ++0x20,0xe0,0x02,0x61,0x9c,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19,0xe0,0xfe,0xef, ++0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0, ++0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x64, ++0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f,0xff,0x90,0x91, ++0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83, ++0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0,0x44,0x02,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90,0x91,0x56,0xe0, ++0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x4c,0x71,0xc9,0xbf,0x01, ++0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90,0x91,0x17,0xe0, ++0x04,0xf0,0x21,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0,0xc4,0x13,0x13, ++0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e,0xe0,0xc4,0x54, ++0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4,0x90,0x91,0x22, ++0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x1f,0x14,0xff, ++0x7d,0xff,0x12,0x34,0xb7,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,0x22,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x34,0xb7,0xc3,0xee,0x94,0x01,0x40,0x0a, ++0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,0x94,0x01,0x40, ++0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,0x05,0x07,0x90, ++0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4,0x2f,0xff,0x22, ++0x0f,0x75,}; ++ ++u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x44,0x72,0x34,0x01,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x2a,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x54,0xfe,0xf0,0x02,0x50,0xd6,0x22,0xe4, ++0xf5,0x75,0x22,0x02,0x5f,0xe2,0x02,0x5f,0xe9,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x25,0x14,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x22, ++0x65,0x90,0x91,0x09,0x12,0x25,0x08,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x25,0x08,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x24,0x62,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x1c,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0x65,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x5a,0x3f,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x62,0x4a,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x5a,0x3f,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x5b,0xb3,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x63, ++0x56,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x61,0xa3,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x68,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x46,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x51,0x0c,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef,0x64, ++0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31, ++0x2c,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x31,0x9d,0x7d,0x10,0x7f, ++0x03,0x12,0x31,0x49,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12, ++0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a, ++0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d, ++0x7b,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0x7d,0x10,0x7f,0x03, ++0x12,0x31,0x49,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x12,0x64,0x11,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22,0x8b, ++0x0e,0x8a,0x0f,0x89,0x10,0x12,0x62,0x3e,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x24, ++0x62,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xfe, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x7f,0x78,0x7e,0x08, ++0x12,0x22,0x65,0x90,0x90,0xd8,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65, ++0x90,0x90,0xdc,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0xe0, ++0x12,0x25,0x08,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43,0x09, ++0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54,0xc7, ++0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90, ++0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44,0x02, ++0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x7f, ++0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xe4,0x12,0x25,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68, ++0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd, ++0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,0x08,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf, ++0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b, ++0xed,0xf0,0x90,0x91,0x9a,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f, ++0xf0,0x51,0xe6,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x9b,0xe0, ++0x60,0x16,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90, ++0x91,0x9a,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x51,0xde,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51, ++0xe6,0x90,0x91,0x9b,0xe0,0x60,0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f, ++0x80,0x1a,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x51,0xe6,0xd0, ++0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x51,0xe6,0xd0,0xd0, ++0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0x81,0xaa, ++0x90,0x90,0xf3,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71, ++0xee,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x45,0xe0, ++0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12, ++0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90, ++0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x54,0xef, ++0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38, ++0x90,0x90,0xf3,0x74,0x01,0xf0,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd, ++0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x71,0xee,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x71,0xee,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0x90,0x90,0xf5,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90, ++0x90,0xf4,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05, ++0x60,0xe0,0x90,0x91,0x03,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05, ++0x62,0xe0,0x90,0x91,0x05,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x12,0x6e,0x67, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xa1,0xb2, ++0x90,0x90,0xf4,0xe0,0x70,0x02,0xa1,0xb2,0x90,0x90,0xf8,0xe0,0x70,0x02,0xa1,0xb2, ++0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x71,0xe5,0x90,0x00,0x46,0xe0,0x44,0x01, ++0xfd,0x7f,0x46,0x71,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x71, ++0xee,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0, ++0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0, ++0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0, ++0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x31,0xb7, ++0x80,0x2b,0x90,0x90,0xf5,0xe0,0x70,0x2d,0x90,0x91,0x07,0x71,0xe4,0x90,0x00,0x46, ++0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x71,0xee,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33, ++0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x31,0x49,0x90,0x91,0x1c, ++0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12, ++0x42,0x20,0x90,0x90,0xf6,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0xef,0x12,0x25,0x08,0xab,0x0e,0xaa, ++0x0f,0xa9,0x10,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a, ++0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43, ++0x09,0xec,0x54,0x03,0xfc,0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x25,0x08,0x90,0x05, ++0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22, ++0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x25,0x08,0x90, ++0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x90,0xf6,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x71,0xee,0x90, ++0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10, ++0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x48, ++0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f, ++0x46,0x71,0xee,0xe4,0x90,0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54, ++0x71,0xee,0x7d,0xff,0x7f,0x55,0x71,0xee,0x7d,0xff,0x7f,0x56,0x71,0xee,0x7d,0xff, ++0x7f,0x57,0x61,0xee,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x71,0xee,0xe4,0xfd, ++0x7f,0x51,0x71,0xee,0xe4,0xfd,0x7f,0x52,0x71,0xee,0xe4,0xfd,0x7f,0x53,0x61,0xee, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x22,0xed,0xf0,0x90,0x91,0x21,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x46,0x80,0x59,0x90,0x91,0x21,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90, ++0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4, ++0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0x51,0xe6,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0, ++0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x71,0xee,0x90,0x91,0x9f,0xe0,0x44,0xb0, ++0xfd,0x7f,0x49,0x61,0xee,0x12,0x47,0xe6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff, ++0x7d,0x01,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x75,0x28,0x33,0xe4, ++0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29, ++0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3, ++0xf0,0x75,0x8e,0x02,0xf1,0x25,0xd1,0xe8,0x90,0x91,0x4f,0xef,0xf0,0xf1,0x0b,0x90, ++0x91,0x51,0xef,0xf0,0xf1,0x60,0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5, ++0x57,0xf1,0x02,0x12,0x61,0xc4,0x12,0x2e,0x01,0x12,0x44,0xff,0x11,0x0c,0xf1,0x36, ++0xd1,0xfb,0xd1,0xd0,0x12,0x44,0xfe,0x31,0x13,0x12,0x44,0xf4,0x12,0x6e,0x09,0x90, ++0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4e,0xb9,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4a,0xe6,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0, ++0x64,0x01,0xf0,0x24,0x2a,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30, ++0xe2,0x10,0x12,0x5f,0xf0,0xbf,0x01,0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12, ++0x71,0x97,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x60, ++0x2d,0x90,0x90,0xf7,0xe0,0x70,0x03,0x12,0x70,0x74,0x11,0xe7,0x90,0x91,0x3f,0xe0, ++0x90,0x01,0xba,0xf0,0x80,0xb6,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x67,0xe4,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xe1,0x17,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x24,0x62,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x31,0x9d,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x31, ++0x2c,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x31,0xf1,0x31,0x13,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x5a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x30,0x01,0x52,0x39,0x02,0x52,0x5b,0x03,0x52,0x64,0x09,0x52,0x6c, ++0x0c,0x52,0x75,0x0d,0x52,0x7d,0x0e,0x52,0x8e,0x1a,0x52,0x96,0x2c,0x52,0x41,0x2d, ++0x52,0x4a,0x2e,0x52,0x9e,0x30,0x52,0x53,0x3b,0x52,0x86,0x3c,0x00,0x00,0x52,0xa6, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0x72,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xf5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0x8d,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x65,0xd5,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x4b,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x66,0x0e,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4c,0xab,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x98,0x90,0x91,0x19, ++0x12,0x43,0x21,0x02,0x4d,0xe6,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0x90,0x90,0x91, ++0x19,0x12,0x43,0x21,0xa1,0x9b,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x7a,0x90,0x91, ++0x19,0x12,0x43,0x21,0xe1,0x78,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43, ++0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12, ++0x24,0x62,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00, ++0x01,0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91, ++0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x26,0x80, ++0x10,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x24,0x62,0x65,0x72,0x60,0x03,0x12,0x44, ++0xe8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72, ++0x01,0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x12,0x4f,0x10,0xe4,0xfd,0x7f,0x02, ++0x12,0x4f,0x10,0x71,0x6a,0xe4,0xff,0x71,0xcc,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5, ++0x76,0xf0,0x90,0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5, ++0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x30,0x62,0x7f,0x0b,0x71,0xd9,0xef,0x65, ++0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05,0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x72,0x64,0x01,0x70,0x3f,0x71,0x6a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xcc,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4b, ++0xee,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4b,0xee,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x7f,0x02,0x71,0xd9,0x8f,0x76,0x90, ++0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xd7,0x22,0x90,0x01,0xca,0xe5, ++0x75,0xf0,0xef,0x60,0x03,0x12,0x4f,0xd7,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4a,0xe6,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4a,0xde,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5,0x15,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0,0x08,0x75,0x0e,0x00, ++0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91,0x48,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x12,0x66,0x56,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3, ++0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10, ++0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f,0x0a,0x7e,0x00,0x12, ++0x32,0x15,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe, ++0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78,0x23,0xe4,0xf5,0x10, ++0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e,0xf5,0x0f,0x80,0x06, ++0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06, ++0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02,0x15,0x11,0xe5,0x12, ++0x45,0x11,0x60,0x02,0x81,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1c,0x12,0x43, ++0x41,0x12,0x24,0x62,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfe,0x4e,0xf0, ++0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x24,0x62,0xff,0x54,0x02,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff,0xe0,0x54,0xf7,0x4f, ++0xf0,0x12,0x24,0x62,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xef,0x4e,0xf0, ++0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x24,0x62,0xff,0x54,0x40,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff,0xe0,0x54,0x7f,0x4f, ++0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0,0x54,0xfd,0x4f,0xf0, ++0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61,0xe0,0x54,0xfb,0x4f, ++0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90,0x91,0x5e,0xe0,0xff, ++0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0,0x54,0x01,0x90,0x01, ++0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x24,0x62,0x20,0xe0,0x02,0x21,0xf1,0xe4,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x24,0x62,0xff,0xc3, ++0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef,0x13,0x13,0x54,0x3f, ++0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x24,0x62,0x13,0x13,0x13, ++0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0,0x90,0x91,0x61,0xe0, ++0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0, ++0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22, ++0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3, ++0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01, ++0x60,0x02,0x7f,0x00,0x22,0x12,0x24,0x62,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80, ++0xfd,0x7f,0x80,0x02,0x4b,0xee,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41, ++0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x24,0x62,0x60,0x02, ++0x80,0x01,0xe4,0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22, ++0x90,0x91,0x51,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd, ++0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x24,0x62,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01, ++0x12,0x42,0x20,0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90, ++0xf7,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4b,0xee,0x7d,0x40,0x7f, ++0x01,0x12,0x31,0x66,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xcb,0xf0,0x74,0x57, ++0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a, ++0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90, ++0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0, ++0x51,0x30,0xef,0x64,0x01,0x70,0x30,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90, ++0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x91,0x37,0xf0,0x80,0x08,0x51, ++0x30,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5, ++0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0x5c,0xe5,0x2c,0x30,0xe3, ++0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57, ++0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4e,0xe4,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4a,0xe6,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x13,0x90,0x91,0x50,0x74,0x01,0xf0, ++0x90,0x01,0x36,0xf0,0x91,0x23,0x51,0x87,0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54, ++0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90, ++0x91,0x40,0xe4,0xf0,0x80,0x18,0x90,0x91,0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a, ++0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x4f,0xf5,0xe5,0x2e, ++0x30,0xe2,0x19,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05, ++0x58,0x74,0x03,0xf0,0x51,0xd8,0x90,0x91,0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3, ++0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60, ++0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4, ++0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01, ++0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01,0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57, ++0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd, ++0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01, ++0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01,0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b, ++0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8,0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30, ++0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60, ++0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30, ++0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x71,0x7e,0x74,0xcb,0x04,0x90,0x01,0xc4, ++0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0, ++0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32, ++0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x51, ++0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x91, ++0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x91,0x36,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54,0x0f,0xd3,0x94, ++0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01, ++0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d, ++0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04,0xf0,0xe5,0x70,0x64,0x03,0x60,0x05, ++0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0,0xff,0x74,0x01,0xd3,0x9f,0x50,0x14, ++0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b,0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff,0x90,0x91,0x54,0xe0,0xb5,0x07,0x07, ++0x71,0x4e,0xe4,0x90,0x91,0x55,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x42,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe5,0x6e, ++0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91,0x08,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58, ++0x90,0x91,0x71,0x12,0x43,0x41,0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0x90,0x91, ++0x80,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80, ++0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x6e,0x54, ++0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0xe4,0xff,0x12, ++0x48,0xb3,0x22,0x51,0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0, ++0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80, ++0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71, ++0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe4,0xfb,0x90,0x91,0x78,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5, ++0x70,0x70,0x02,0x81,0xb5,0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b, ++0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0, ++0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90, ++0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45, ++0x43,0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4, ++0xff,0x90,0x91,0x34,0xe0,0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5, ++0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90, ++0x91,0x2e,0xe0,0x60,0x10,0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d, ++0xf0,0x22,0x74,0x09,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0, ++0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0x53,0x91,0xef, ++0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0, ++0xff,0x90,0x00,0x56,0xe0,0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55, ++0x74,0x10,0xf0,0xe5,0x3d,0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d, ++0x30,0xe6,0x1b,0x90,0x00,0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x90,0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4c,0x03,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0x03,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56, ++0x74,0x01,0xf0,0xe5,0x3e,0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e, ++0x30,0xe2,0x06,0x90,0x00,0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00, ++0x56,0x74,0x08,0xf0,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0x99,0xf0,0x74, ++0x5d,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0, ++0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37, ++0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0x57,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90, ++0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44, ++0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90, ++0x91,0x37,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91, ++0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91, ++0x36,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10, ++0xf0,0x12,0x53,0x86,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12, ++0x6e,0xb9,0xe5,0x35,0x30,0xe0,0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f, ++0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80, ++0x1c,0xe5,0x0d,0xb4,0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05, ++0x90,0x00,0x83,0x80,0x08,0xe5,0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f, ++0x80,0x06,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f, ++0x30,0xe0,0x03,0xa3,0x80,0x03,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xf1,0x38,0x12,0x44, ++0xc2,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0, ++0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74, ++0x02,0xf0,0x74,0x99,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5d,0xa3,0xf0,0xd0,0x07,0xd0, ++0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0, ++0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xe5,0x6f,0x30,0xe6,0x19,0xe5,0x6f,0x54, ++0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90, ++0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70,0x70,0x02, ++0xe1,0xe1,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54, ++0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef,0x90,0x91, ++0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee, ++0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef, ++0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06, ++0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f,0xff,0xe4, ++0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40, ++0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44, ++0xc2,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24,0x8d,0x25,0x22, ++0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1,0x2c,0xc3,0x90, ++0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a,0x90,0x01,0xc6, ++0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x01,0x7e,0x00,0x12,0x32,0x15,0x80,0xcd,0x7f,0x01,0x22,0x90,0x01,0xcc, ++0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70,0x02,0x21,0x6f, ++0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x21,0x68,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12,0xf0,0x75,0x63, ++0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a,0x91,0x79,0x13, ++0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x91, ++0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x15, ++0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12, ++0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91, ++0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0, ++0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x51,0xf8,0x90,0x91,0x11, ++0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x91,0x9c,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x37,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0, ++0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f,0x0c,0x75,0x6e, ++0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0,0x90,0x91,0x39, ++0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x29,0xf0,0x90, ++0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32,0xf0,0xa3,0x74, ++0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74, ++0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0,0x90,0x91,0x25, ++0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0,0x90,0x91,0x26, ++0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0,0x22,0xe4,0x90, ++0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf, ++0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53,0x6e, ++0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x51,0x7e,0x90,0x91,0x9d,0xe0, ++0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90,0x00, ++0x11,0xe0,0x44,0x09,0xf0,0x12,0x4a,0xe6,0x90,0x90,0xd8,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0xdc,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90, ++0xe0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b, ++0x08,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd, ++0xff,0x12,0x30,0x2c,0x90,0x91,0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25, ++0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f,0x77,0xe4, ++0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f, ++0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91,0x97,0xe0,0x94,0x88,0x90,0x91,0x96, ++0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x91,0x96, ++0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15,0xd3,0x90, ++0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7, ++0xe0,0x30,0xe0,0xb2,0x22,0x22,0x53,0x6e,0xf0,0x43,0x6e,0x01,0x71,0x55,0x71,0x67, ++0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x22,0x8f,0x78,0x12,0x47,0xe6,0xef,0x64,0x01, ++0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5,0x78,0x60,0x10,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01, ++0xc3,0xc0,0xd0,0x90,0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0, ++0x90,0x91,0x84,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90, ++0x91,0x87,0xe0,0x94,0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6, ++0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92, ++0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90, ++0x91,0x1f,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90, ++0x91,0x25,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0, ++0xef,0xc3,0x13,0x54,0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x13,0x13,0x54,0x01,0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70, ++0x26,0x12,0x25,0x14,0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x60,0x7e,0x08,0x12,0x2b,0x08,0x90,0x91,0x1f,0x12,0x25, ++0x14,0x00,0x00,0x03,0x10,0x80,0x24,0x12,0x25,0x14,0x00,0x00,0x01,0x10,0x90,0x91, ++0x1f,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x60,0x7e,0x08,0x12,0x2b, ++0x08,0x90,0x91,0x1f,0x12,0x25,0x14,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x08,0x12,0x2b,0x08,0x90,0x91, ++0x26,0xe0,0x70,0x3d,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x22, ++0x65,0x90,0x91,0x1f,0x12,0x25,0x08,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02, ++0xfc,0x90,0x91,0x1f,0x12,0x25,0x08,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x90,0x02,0x86,0xe0,0x54,0xfb, ++0xf0,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x49,0x7f,0x90,0x01,0xe5,0xe5,0x70,0xf0, ++0x90,0x91,0x3b,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x91,0x2f,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74, ++0x0a,0xf0,0x90,0x91,0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91, ++0x35,0x74,0x05,0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90, ++0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91,0x41,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x47, ++0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0,0xf5,0x1a,0xe4, ++0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0x74, ++0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5,0x90,0x91,0x1d, ++0xe0,0x12,0x43,0x4a,0x66,0xb3,0x00,0x67,0xdc,0x01,0x66,0xba,0x02,0x66,0xba,0x03, ++0x66,0xba,0x04,0x67,0xdc,0x05,0x67,0xac,0x80,0x67,0xc2,0x81,0x67,0xdc,0x82,0x00, ++0x00,0x67,0xd8,0xaf,0x1e,0x12,0x73,0xea,0xe1,0xdc,0x90,0x91,0x1d,0xe0,0xff,0xb4, ++0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x91,0x1c,0xb4,0x03, ++0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19,0x94,0x08,0x50,0x49, ++0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f,0x40,0x02,0xe1,0xdc, ++0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a,0xff,0xc3,0x74,0x03,0x95, ++0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4b,0xee,0x80,0x1a,0xc3,0x74,0x03,0x95,0x16, ++0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a,0xfd,0xec,0x35,0x19,0x8d, ++0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xba,0xc3,0xe5,0x19,0x94,0x10,0x40,0x02, ++0xe1,0xdc,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x02,0xe1,0xdc,0xaf,0x1c,0xfc,0xfd, ++0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b, ++0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc, ++0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12, ++0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe, ++0x12,0x42,0xfc,0xa3,0x12,0x25,0x08,0x90,0x91,0x1e,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0xaf,0x1a,0xae,0x19,0x12,0x2b,0x08,0x80,0x30,0xe5,0x1d,0x7f,0x00, ++0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x32,0x15, ++0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17, ++0xaf,0x18,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0, ++0x92,0xaf,0x22,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10,0x8a,0x11,0x89,0x12,0xe4,0x90, ++0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4a,0xe6,0xe5,0x0e,0x54,0x03,0xff, ++0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x54, ++0x7f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x91,0x11,0xe0, ++0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x91,0x11,0xe0,0xc3,0x94, ++0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x42,0x4d, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98,0xf0,0xa3,0xf0,0x90,0x05,0xf8, ++0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f, ++0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90,0x91,0x98,0xe0,0x94,0x03,0x40, ++0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x32,0x15,0x90,0x91,0x98,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0xef,0x70,0x02,0x41,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xc1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x88, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09, ++0x12,0x2b,0x08,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xc1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x90, ++0xd4,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0x80,0x12,0x25, ++0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0x84,0x12,0x25,0x08,0x7f,0x6c, ++0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x88,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12, ++0x22,0x65,0x90,0x90,0x8c,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65,0x90, ++0x90,0x90,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x94,0x12, ++0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x98,0x12,0x25,0x08,0x7f, ++0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x9c,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e, ++0x12,0x22,0x65,0x90,0x90,0xa0,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22,0x65, ++0x90,0x90,0xa4,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xa8, ++0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xac,0x12,0x25,0x08, ++0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xb0,0x12,0x25,0x08,0x7f,0xd8,0x7e, ++0x0e,0x12,0x22,0x65,0x90,0x90,0xb4,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,0x22, ++0x65,0x90,0x90,0xb8,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90, ++0xbc,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xc0,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x90,0xc4,0x12,0x25,0x08,0x7f,0x04, ++0x7e,0x0d,0x12,0x22,0x65,0x90,0x90,0xc8,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12, ++0x22,0x65,0x90,0x90,0xcc,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90, ++0x90,0xd0,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x91,0x88,0x12, ++0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25, ++0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96, ++0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80, ++0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b, ++0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x25,0x08,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x25,0x08, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08, ++0x12,0x2b,0x08,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4b,0xee, ++0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0,0x90, ++0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0,0x90, ++0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0,0x44, ++0xc0,0xfd,0x7f,0x51,0x02,0x4b,0xee,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04,0xe0, ++0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0, ++0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0,0x04, ++0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60, ++0x02,0xe1,0x6e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x90, ++0x91,0x07,0xe0,0x70,0x32,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x90,0xf4,0xe0,0xff,0xd1,0x67,0x90,0x91,0x07, ++0x74,0x01,0x12,0x4b,0xe4,0x80,0x40,0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90, ++0x90,0xf8,0xe0,0xff,0xd1,0x67,0xe4,0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44, ++0x01,0xfd,0x7f,0x45,0x12,0x4b,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08, ++0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91, ++0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91, ++0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90, ++0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x70,0x29,0x90,0x90, ++0xee,0xe0,0x64,0x14,0x60,0x03,0x02,0x70,0x29,0x90,0x90,0xfd,0xe0,0x70,0x25,0x90, ++0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91,0x01,0xe0,0x70, ++0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07,0x90,0x04,0xfd, ++0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90,0x90,0xfe,0xe0, ++0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90, ++0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04,0x49,0xf0,0x90, ++0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9,0xe0,0x90,0x04, ++0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb,0xe0,0x90,0x04, ++0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90,0xee,0xf0,0x90, ++0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,0xfd,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x8c, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x8e, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0,0xff,0x90,0x91, ++0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e,0xd3,0x94,0x01, ++0x40,0x11,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90,0xf8,0xe0,0xff, ++0x12,0x6e,0x67,0x22,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08,0x90,0x90,0xf5,0xe0, ++0x60,0x02,0x21,0x4b,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x90, ++0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0, ++0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9,0xf0,0x90,0x00,0x44, ++0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0, ++0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90,0x00,0x44,0xe0,0x30, ++0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24, ++0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90, ++0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x01,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x06,0x90,0xe0, ++0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f,0xe0,0xff,0x90, ++0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4a,0xf6,0x90,0x91,0x60,0xe0, ++0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x32,0x15,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0, ++0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0x90, ++0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90,0x01,0x1f,0xe0, ++0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91,0x56,0xe0,0x20, ++0xe0,0x02,0x61,0xc4,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0,0xff,0x90,0x91, ++0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xc4,0x90,0x91,0x11,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54,0xf8,0xff,0xed, ++0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x7a, ++0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91,0x13,0xf0,0xa3, ++0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4,0x35,0xf0,0xfe, ++0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0,0xff,0xad,0x03, ++0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19,0x74,0x02,0xf0, ++0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea,0x8f,0xf0,0x12, ++0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24,0x01,0xff,0x90, ++0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24,0x20,0x70,0x27, ++0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x02,0x61,0x9c, ++0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0,0x44,0x08,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x61,0x95,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x13,0x54,0x03, ++0x20,0xe0,0x02,0x61,0x9c,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19,0xe0,0xfe,0xef, ++0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0, ++0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x64, ++0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f,0xff,0x90,0x91, ++0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83, ++0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0,0x44,0x02,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90,0x91,0x56,0xe0, ++0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x4c,0x71,0xc9,0xbf,0x01, ++0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90,0x91,0x17,0xe0, ++0x04,0xf0,0x21,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0,0xc4,0x13,0x13, ++0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e,0xe0,0xc4,0x54, ++0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4,0x90,0x91,0x22, ++0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x1f,0x14,0xff, ++0x7d,0xff,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,0x22,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x2d,0x4d,0xc3,0xee,0x94,0x01,0x40,0x0a, ++0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,0x94,0x01,0x40, ++0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,0x05,0x07,0x90, ++0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4,0x2f,0xff,0x22, ++0x14,0x25,}; ++ ++ ++ ++u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength] = { ++0xc2,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x45,0x66,0x34,0x01,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x4a,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xe1,0x00,0x00,0x00,0x00,0x00,0x02,0x58,0xc4,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x34,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x22, ++0x22,0x22,0x22,0x02,0x5e,0x55,0x02,0x5e,0x5c,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x29,0xd9,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x88,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x61,0x86,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x60,0xb1,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x61,0x6b,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x60,0xb1,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x60,0xfa,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x62, ++0x6c,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x60,0x16,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x69,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x7c,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x12,0x68,0xbd,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef, ++0x64,0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12, ++0x36,0x75,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x36,0xe6,0x7d,0x10, ++0x7f,0x03,0x12,0x36,0x92,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x12,0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06, ++0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0, ++0x7d,0x7b,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0x7d,0x10,0x7f, ++0x03,0x12,0x36,0x92,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44, ++0x07,0xf0,0x12,0x44,0xf4,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22, ++0x8b,0x0e,0x8a,0x0f,0x89,0x10,0xf1,0xf2,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x29, ++0xd9,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xff, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x12,0x47,0xe6,0xbf, ++0x01,0x0f,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x11,0x22,0x90,0x04,0x1f,0x74,0x20, ++0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0, ++0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90, ++0x01,0xc4,0x74,0x22,0xf0,0x74,0x4a,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5, ++0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5, ++0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14, ++0x24,0xfd,0x50,0x02,0x80,0x48,0x90,0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x91,0x89,0xef,0x64,0x01,0x70,0x30,0x90,0x91, ++0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x12,0x44,0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0, ++0x90,0x91,0x37,0xf0,0x80,0x08,0x91,0x89,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c, ++0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85, ++0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5,0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9, ++0x5f,0x12,0x64,0x66,0xe5,0x2c,0x30,0xe3,0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90, ++0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57,0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01, ++0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0, ++0x30,0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00, ++0x75,0xe8,0x00,0xd1,0x65,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x91,0xa0,0x80,0xfe, ++0xe5,0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x15, ++0x90,0x91,0x50,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x63,0x2e,0x12,0x70,0xee, ++0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,0xf0, ++0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,0x37, ++0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x91,0x40,0xe4,0xf0,0x80,0x17,0x90,0x91, ++0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,0xe0, ++0x30,0xe0,0x02,0x51,0x0c,0xe5,0x2e,0x30,0xe2,0x1a,0x90,0x01,0x36,0x74,0x04,0xf0, ++0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05,0x58,0x74,0x03,0xf0,0x12,0x62,0xb8,0x90,0x91, ++0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5, ++0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4,0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05, ++0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01, ++0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44, ++0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01, ++0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8, ++0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0, ++0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60,0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07, ++0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x12,0x64,0x31,0x74,0x22,0x04,0x90,0x01,0xc4,0xf0,0x74,0x4a,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64, ++0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b,0xed,0xf0,0x90,0x91,0x9a,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x91,0xa0,0x90,0x91,0x9a, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00, ++0x46,0xe0,0x4f,0xf0,0x91,0xa0,0x90,0x91,0x9b,0xe0,0x60,0x16,0x90,0x91,0x9a,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45, ++0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90,0x91,0x9a,0xe0,0x24,0xf8,0xf0, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0x91,0x98,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x91,0xa0,0x90,0x91,0x9b,0xe0,0x60, ++0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x91,0x9a,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4, ++0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x91,0xa0,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90, ++0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f, ++0x82,0x75,0x83,0x00,0xed,0xf0,0x91,0xa0,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60, ++0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0xc1,0x64,0x90,0x90,0xf3,0x74,0x02,0xf0, ++0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0xb1,0xa8,0x90,0x00,0x47,0xe0,0x44, ++0x08,0xfd,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80, ++0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd, ++0x7f,0x45,0xb1,0xa8,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0xb1,0xa8,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38,0x90,0x90,0xf3,0x74,0x01,0xf0, ++0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0xb1,0xa8,0x90,0x00, ++0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd, ++0x7f,0x46,0xb1,0xa8,0x22,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0xb1,0xa8,0xe4, ++0xfd,0x7f,0x51,0xb1,0xa8,0xe4,0xfd,0x7f,0x52,0xb1,0xa8,0xe4,0xfd,0x7f,0x53,0xa1, ++0xa8,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf6, ++0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x27,0xde,0x90,0x90,0xef,0x12,0x2a,0x7f,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00, ++0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04, ++0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43,0x09,0xec,0x54,0x03,0xfc, ++0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x2a,0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d, ++0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc, ++0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x2a,0x7f,0x90,0x90,0xef,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xf6, ++0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x48,0xe0,0x44,0x0c, ++0xfd,0x7f,0x48,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47, ++0xe0,0x54,0xf3,0xfd,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f, ++0x48,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f,0x46,0xb1,0xa8,0xe4,0x90, ++0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01, ++0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0xb1,0xa8,0x7d,0xff,0x7f, ++0x55,0xb1,0xa8,0x7d,0xff,0x7f,0x56,0xb1,0xa8,0x7d,0xff,0x7f,0x57,0xa1,0xa8,0xe5, ++0x72,0x64,0x01,0x70,0x3e,0x12,0x54,0x41,0xbf,0x01,0x05,0x7f,0x01,0x12,0x56,0xe7, ++0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0xb1,0xa8,0x90,0x00,0x44,0xe0,0x54, ++0xfb,0xfd,0x7f,0x44,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0xb1, ++0xa8,0x7f,0x02,0x12,0x6f,0x09,0x8f,0x76,0x90,0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01, ++0x02,0xf1,0xd4,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0,0x54,0x0f,0xf0, ++0x44,0xf0,0xfd,0x7f,0x49,0xb1,0xa8,0x90,0x91,0x9f,0xe0,0x44,0xb0,0xfd,0x7f,0x49, ++0xa1,0xa8,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x75,0x28, ++0x33,0xe4,0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3, ++0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0x75,0x30,0x1f,0x75, ++0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3, ++0xe5,0x32,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0xf1,0x02, ++0xd1,0xb4,0x90,0x91,0x4f,0xef,0xf0,0xd1,0xdb,0x90,0x91,0x51,0xef,0xf0,0xf1,0x3d, ++0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5,0x57,0xd1,0xd2,0x12,0x60,0x37, ++0x12,0x32,0x3d,0xd1,0xc1,0x12,0x4f,0xfe,0xf1,0x13,0xd1,0xcb,0x11,0x1c,0x12,0x44, ++0xff,0x31,0x23,0x11,0xdf,0x12,0x6f,0xaa,0x90,0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4f, ++0x64,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4c,0xa0,0x75,0xe8,0x03, ++0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0,0x64,0x01,0xf0,0x24,0x34,0x90,0x01, ++0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30,0xe2,0x10,0x12,0x5e,0x63,0xbf,0x01, ++0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12,0x71,0x8a,0xe5,0x57,0x30,0xe4,0x0a, ++0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x5e,0xa0,0x90,0x90,0xf7,0xe0,0x70,0x03, ++0x12,0x70,0x08,0x11,0xf7,0x90,0x91,0x3f,0xe0,0x90,0x01,0xba,0xf0,0x80,0xb6,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0xf0,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x68,0x1a,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xc1,0xf4,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x29,0xd9,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x36,0xe6,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x36, ++0x75,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x51,0x01,0x31,0x23,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x6a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x40,0x01,0x52,0x49,0x02,0x52,0x6a,0x03,0x52,0x73,0x09,0x52,0x7b, ++0x0c,0x52,0x84,0x0d,0x52,0x8c,0x0e,0x52,0x9d,0x1a,0x52,0xa5,0x2c,0x52,0x51,0x2d, ++0x52,0x5a,0x2e,0x52,0xad,0x30,0x52,0x62,0x3b,0x52,0x95,0x3c,0x00,0x00,0x52,0xb5, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0xde,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xc5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0xf9,0x90,0x91,0x19,0x12,0x43,0x21, ++0xe1,0xa8,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x28,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x66,0x41,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x5d,0x16,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x75,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4e,0x91,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0xa0,0x90,0x91,0x19, ++0x12,0x43,0x21,0xa1,0x7f,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x5e,0x90,0x91,0x19, ++0x12,0x43,0x21,0xe1,0x55,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43,0x21, ++0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90, ++0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12,0x29, ++0xd9,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01, ++0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91,0x1c, ++0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x35,0x80,0x10, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0x65,0x72,0x60,0x03,0x12,0x44,0xe8, ++0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72,0x01, ++0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x71,0x77,0xe4,0xfd,0x7f,0x02,0x71,0x77, ++0x91,0x41,0xe4,0xff,0xd1,0xe7,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5,0x76,0xf0,0x90, ++0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01, ++0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x22,0xed,0xf0,0x90,0x91,0x21,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70, ++0x1a,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0, ++0x4f,0xf0,0x12,0x4c,0xa0,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x91,0x21,0xe0, ++0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0, ++0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4c, ++0xa0,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x4c,0xa0,0xd0,0xd0,0x92,0xaf, ++0x22,0x7f,0x0b,0x12,0x6f,0x09,0xef,0x65,0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05, ++0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5, ++0x15,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0, ++0x08,0x75,0x0e,0x00,0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13, ++0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10, ++0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0, ++0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24, ++0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91, ++0x48,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82, ++0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5, ++0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x12,0x66,0x89,0xef,0x70,0x3f,0x90,0x01,0xc3, ++0xe0,0x60,0x25,0xc3,0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01, ++0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f, ++0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30, ++0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78, ++0x23,0xe4,0xf5,0x10,0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e, ++0xf5,0x0f,0x80,0x06,0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02, ++0x15,0x11,0xe5,0x12,0x45,0x11,0x60,0x02,0x81,0x9c,0xd0,0xd0,0x92,0xaf,0x22,0x90, ++0x91,0x1c,0x12,0x43,0x41,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0, ++0x54,0xfe,0x4e,0xf0,0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x29,0xd9, ++0xff,0x54,0x02,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff, ++0xe0,0x54,0xf7,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0, ++0x54,0xef,0x4e,0xf0,0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x29,0xd9, ++0xff,0x54,0x40,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff, ++0xe0,0x54,0x7f,0x4f,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0x54,0x01,0xfe,0x90,0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0, ++0x54,0xfd,0x4f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61, ++0xe0,0x54,0xfb,0x4f,0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90, ++0x91,0x5e,0xe0,0xff,0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0, ++0x54,0x01,0x90,0x01,0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x29,0xd9,0x20,0xe0,0x02, ++0x41,0x01,0xe4,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x90,0x91,0x1c,0x12,0x43,0x21,0x12, ++0x29,0xd9,0xff,0xc3,0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef, ++0x13,0x13,0x54,0x3f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x29, ++0xd9,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0, ++0x90,0x91,0x61,0xe0,0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30, ++0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01, ++0x12,0x4c,0xb0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00, ++0x22,0xe4,0xf5,0x75,0x22,0x12,0x29,0xd9,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x01,0xca,0xe5,0x75,0xf0,0xef,0x60,0x03, ++0x12,0x4f,0xd4,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80, ++0x02,0x4d,0xa8,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0, ++0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x29,0xd9,0x60,0x02,0x80,0x01,0xe4, ++0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd,0x7f,0x33,0x22, ++0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x53,0xe0, ++0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01,0x12,0x42,0x20, ++0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf7,0xf0,0xe0, ++0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2,0xaf,0x90,0x00, ++0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4d,0xa8,0x7d,0x40,0x7f,0x01,0x12,0x36, ++0xaf,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13, ++0x54,0x7f,0x90,0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32, ++0xe4,0xf0,0xa3,0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32, ++0xe4,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0xe1,0xf0,0x74,0x57,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff, ++0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0,0xff,0x90,0x00,0x56,0xe0, ++0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55,0x74,0x10,0xf0,0xe5,0x3d, ++0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d,0x30,0xe6,0x1b,0x90,0x00, ++0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x90, ++0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4d,0xbd,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00, ++0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02, ++0x12,0x4d,0xbd,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56,0x74,0x01,0xf0,0xe5,0x3e, ++0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e,0x30,0xe2,0x06,0x90,0x00, ++0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00,0x56,0x74,0x08,0xf0,0x90, ++0x01,0xc4,0x74,0xe1,0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0, ++0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0xc4,0xf0,0x74,0x58,0xa3,0xf0,0x53,0x91, ++0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3, ++0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06, ++0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02, ++0xf0,0x71,0x89,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06, ++0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b,0x74, ++0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90,0x91,0x37,0xe4,0xf0,0x12, ++0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92, ++0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67, ++0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5f,0x74,0x05, ++0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91,0x36,0xe4,0xf0,0x12,0x44, ++0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x4f,0x8f,0xe5, ++0x34,0x30,0xe5,0x08,0x90,0x01,0x3c,0x74,0x20,0xf0,0x51,0x62,0xe5,0x35,0x30,0xe0, ++0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00, ++0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80,0x1c,0xe5,0x0d,0xb4,0x02,0x05, ++0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05,0x90,0x00,0x83,0x80,0x08,0xe5, ++0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f,0x80,0x06,0x90,0x01,0xbe,0xe0, ++0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f,0x30,0xe0,0x03,0xa3,0x80,0x03, ++0x90,0x01,0xbd,0xe0,0x04,0xf0,0x71,0x6a,0x12,0x44,0xc2,0xe5,0x35,0x30,0xe2,0x06, ++0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0,0x06,0x90,0x01,0x3e,0x74,0x01, ++0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74,0x02,0xf0,0x74,0xc4,0x04,0x90, ++0x01,0xc4,0xf0,0x74,0x58,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0, ++0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0, ++0xe0,0x32,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60,0x02,0x61,0x17,0x90,0x00,0x46,0xe0, ++0x44,0x01,0xfd,0x7f,0x46,0x12,0x4d,0xa8,0x90,0x91,0x07,0xe0,0x70,0x32,0x90,0x90, ++0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90, ++0x90,0xf4,0xe0,0xff,0x71,0x18,0x90,0x91,0x07,0x74,0x01,0x12,0x4d,0x9e,0x80,0x40, ++0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90,0x90,0xf8,0xe0,0xff,0x71,0x18,0xe4, ++0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12,0x4d,0xa8, ++0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04, ++0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3, ++0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0, ++0x04,0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0xe5,0x6f,0x30,0xe6,0x19,0xe5, ++0x6f,0x54,0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64, ++0x80,0x90,0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70, ++0x70,0x02,0x81,0x13,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5, ++0x71,0x54,0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef, ++0x90,0x91,0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01, ++0xfd,0xee,0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80, ++0x12,0xef,0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4, ++0xb5,0x06,0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f, ++0xff,0xe4,0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80, ++0x98,0x40,0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22, ++0x12,0x44,0xc2,0x22,0x90,0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0, ++0x81,0xcc,0x90,0x90,0xee,0xe0,0x64,0x14,0x60,0x02,0x81,0xcc,0x90,0x90,0xfd,0xe0, ++0x70,0x25,0x90,0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91, ++0x01,0xe0,0x70,0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07, ++0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90, ++0x90,0xfe,0xe0,0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3, ++0xe4,0xf0,0x90,0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04, ++0x49,0xf0,0x90,0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9, ++0xe0,0x90,0x04,0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb, ++0xe0,0x90,0x04,0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90, ++0xee,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90, ++0xfd,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0, ++0x90,0x91,0x8c,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0, ++0x90,0x91,0x8e,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0, ++0xff,0x90,0x91,0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e, ++0xd3,0x94,0x01,0x40,0x10,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90, ++0xf8,0xe0,0xff,0x71,0x18,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf5,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf4,0xf0,0x12,0x29, ++0xd9,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x03, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c, ++0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x71,0x18,0x90,0x91,0x1c,0xe0,0x24,0xff, ++0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xc1,0x1f,0x90,0x90,0xf4,0xe0,0x70,0x02, ++0xc1,0x1f,0x90,0x90,0xf8,0xe0,0x70,0x02,0xc1,0x1f,0xa2,0xaf,0xe4,0x33,0x90,0x91, ++0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0,0x90,0x91,0x1c,0xe0,0x24,0xff, ++0x92,0xaf,0x12,0x4d,0x9f,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4d, ++0xa8,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74, ++0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x12,0x4d,0xa8,0x90,0x05, ++0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04, ++0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06, ++0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90, ++0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x37,0x00,0x80,0x2d,0x90, ++0x90,0xf5,0xe0,0x70,0x2f,0x90,0x91,0x07,0x12,0x4d,0x9e,0x90,0x00,0x46,0xe0,0x54, ++0xfe,0xfd,0x7f,0x46,0x12,0x4d,0xa8,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90, ++0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90,0x91,0x1c,0xe0, ++0x24,0xff,0x92,0xaf,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24, ++0x8d,0x25,0x22,0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1, ++0x2c,0xc3,0x90,0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a, ++0x90,0x01,0xc6,0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0, ++0x01,0x12,0x42,0x81,0x7f,0x01,0x7e,0x00,0x12,0x37,0x54,0x80,0xcd,0x7f,0x01,0x22, ++0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70, ++0x02,0xe1,0xe2,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0xe1,0xdb,0x90, ++0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12, ++0xf0,0x75,0x63,0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a, ++0x91,0x79,0x13,0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54, ++0x01,0x90,0x91,0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43, ++0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89, ++0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90, ++0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90, ++0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15, ++0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x16,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x52,0x08, ++0x90,0x91,0x11,0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90, ++0x91,0x9c,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0xc1,0xaa,0x90,0x01,0xc6,0xe0,0x44, ++0x02,0xf0,0x22,0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x44,0x01,0xf0,0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f, ++0x0c,0x75,0x6e,0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0, ++0x90,0x91,0x39,0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91, ++0x29,0xf0,0x90,0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32, ++0xf0,0xa3,0x74,0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90, ++0x91,0x2d,0x74,0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0, ++0x90,0x91,0x25,0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0, ++0x90,0x91,0x26,0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0, ++0x22,0x12,0x4c,0x89,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80, ++0x30,0x90,0x91,0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90, ++0x91,0x36,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54, ++0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01, ++0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x12,0x4c,0x89,0xef,0x64,0x01, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a,0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40, ++0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01, ++0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10, ++0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80, ++0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54, ++0xbf,0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53, ++0x6e,0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x31,0x9f,0x90,0x91,0x9d, ++0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90, ++0x90,0xd8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x90,0xdc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a, ++0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91,0x51,0xe0,0xb4, ++0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01, ++0x12,0x34,0x81,0x22,0x8f,0x77,0xe4,0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09, ++0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91, ++0x97,0xe0,0x94,0x88,0x90,0x91,0x96,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0, ++0x44,0x80,0xf0,0x22,0x90,0x91,0x96,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14, ++0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0, ++0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x53,0x6e,0xf0,0x43, ++0x6e,0x01,0x12,0x45,0x00,0x12,0x45,0x01,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x8f, ++0x78,0x12,0x47,0xe6,0xef,0x64,0x01,0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5, ++0x78,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10, ++0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef, ++0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x22,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfb, ++0x90,0x91,0x78,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x70,0x02,0x61,0xc0, ++0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24, ++0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0,0x14,0xf0,0xe0,0x60,0x04, ++0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90,0x91,0x39,0xe0,0x90,0x91, ++0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45,0x43,0x71,0x10,0xe4,0x90, ++0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff,0x90,0x91,0x34,0xe0, ++0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x10, ++0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d,0xf0,0x22,0x74,0x09,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x80,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd, ++0x50,0x02,0x80,0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d, ++0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27, ++0xe4,0xff,0x12,0x48,0xb3,0x22,0x90,0x91,0x08,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54, ++0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58,0x90,0x91,0x71,0x12,0x43,0x41, ++0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x91,0x84,0xe0, ++0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x91,0x87,0xe0,0x94, ++0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0, ++0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a, ++0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1f,0x12,0x2a, ++0x8b,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x25,0xf0,0x90, ++0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0,0xef,0xc3,0x13,0x54, ++0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x13,0x13,0x54,0x01, ++0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70,0x26,0x12,0x2a,0x8b, ++0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x03, ++0x10,0x80,0x24,0x12,0x2a,0x8b,0x00,0x00,0x01,0x10,0x90,0x91,0x1f,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f, ++0x12,0x2a,0x8b,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x26,0xe0,0x70,0x3d, ++0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x1f, ++0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02,0xfc,0x90,0x91,0x1f, ++0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90,0x91,0x1c, ++0x12,0x43,0x21,0x12,0x49,0x80,0x90,0x01,0xe5,0xe5,0x70,0xf0,0x90,0x91,0x3b,0xe0, ++0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff, ++0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x91,0x2f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d,0xf0,0x90,0x00,0x03, ++0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74,0x0a,0xf0,0x90,0x91, ++0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0, ++0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91, ++0x41,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0xae,0x05,0xed,0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x47,0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0, ++0xf5,0x1a,0xe4,0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83, ++0xe0,0xff,0x74,0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5, ++0x90,0x91,0x1d,0xe0,0x12,0x43,0x4a,0x66,0xe6,0x00,0x68,0x13,0x01,0x66,0xee,0x02, ++0x66,0xee,0x03,0x66,0xee,0x04,0x68,0x13,0x05,0x67,0xe3,0x80,0x67,0xf9,0x81,0x68, ++0x13,0x82,0x00,0x00,0x68,0x0f,0xaf,0x1e,0x12,0x73,0xdd,0x02,0x68,0x13,0x90,0x91, ++0x1d,0xe0,0xff,0xb4,0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90, ++0x91,0x1c,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19, ++0x94,0x08,0x50,0x4a,0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f, ++0x40,0x03,0x02,0x68,0x13,0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a, ++0xff,0xc3,0x74,0x03,0x95,0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4d,0xa8,0x80,0x1a, ++0xc3,0x74,0x03,0x95,0x16,0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a, ++0xfd,0xec,0x35,0x19,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xb9,0xc3,0xe5, ++0x19,0x94,0x10,0x40,0x03,0x02,0x68,0x13,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x03, ++0x02,0x68,0x13,0xaf,0x1c,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe,0x12,0x42,0xfc,0xa3,0x12,0x2a,0x7f,0x90,0x91, ++0x1e,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x1a,0xae,0x19,0x12,0x2f, ++0xd9,0x80,0x30,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5, ++0x17,0xaf,0x18,0xfe,0x12,0x37,0x54,0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25, ++0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f, ++0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10, ++0x8a,0x11,0x89,0x12,0xe4,0x90,0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4c, ++0xa0,0xe5,0x0e,0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4c, ++0xa0,0x90,0x00,0x33,0xe0,0x54,0x7f,0xf0,0x12,0x4c,0xa0,0x90,0x00,0x33,0xe0,0x20, ++0xe7,0x0e,0x90,0x91,0x11,0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb, ++0x90,0x91,0x11,0xe0,0xc3,0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa, ++0x11,0xa9,0x12,0x12,0x42,0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98, ++0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70, ++0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90, ++0x91,0x98,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37, ++0x54,0x90,0x91,0x98,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e, ++0x08,0x12,0x27,0xde,0x90,0x90,0xd8,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27, ++0xde,0x90,0x90,0xdc,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xe0,0x12,0x2a,0x7f,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43, ++0x09,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54, ++0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44, ++0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9, ++0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xe4,0x12,0x2a,0x7f,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91, ++0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4, ++0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0xef,0x70,0x02,0x61,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xe1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09, ++0x12,0x2f,0xd9,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xe1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xd4,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x80,0x12,0x2a, ++0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x84,0x12,0x2a,0x7f,0x7f,0x6c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x88,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x90,0x8c,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x90,0x90,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x94,0x12, ++0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x98,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x9c,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x90,0xa0,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x90,0xa4,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xa8, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xac,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xb0,0x12,0x2a,0x7f,0x7f,0xd8,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x90,0xb4,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x90,0xb8,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90, ++0xbc,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xc0,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x90,0xc4,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x27,0xde,0x90,0x90,0xc8,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x27,0xde,0x90,0x90,0xcc,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x90,0xd0,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12, ++0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f, ++0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08, ++0x12,0x2f,0xd9,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4c,0xa0,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4c,0x98,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4d, ++0xa8,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0, ++0x90,0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0x90,0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0, ++0x90,0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0, ++0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4d,0xa8,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08, ++0x90,0x90,0xf5,0xe0,0x60,0x02,0x01,0xdf,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0, ++0x04,0xf0,0xe4,0x80,0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04, ++0xf0,0xe4,0x90,0x90,0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50, ++0x10,0xe0,0x04,0xf0,0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9, ++0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd, ++0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3, ++0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94, ++0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0, ++0x04,0xf0,0x80,0x24,0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0, ++0xe4,0x80,0x11,0x90,0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x01,0xf0,0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22, ++0xe5,0x6e,0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91, ++0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d,0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04, ++0xf0,0xe5,0x70,0x64,0x03,0x60,0x05,0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0, ++0xff,0x74,0x01,0xd3,0x9f,0x50,0x14,0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b, ++0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff, ++0x90,0x91,0x54,0xe0,0xb5,0x07,0x07,0x11,0xe0,0xe4,0x90,0x91,0x55,0xf0,0x22,0x90, ++0x06,0x90,0xe0,0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f, ++0xe0,0xff,0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4c,0xb0,0x90, ++0x91,0x60,0xe0,0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x37,0x54,0x90,0x91,0x5e, ++0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90, ++0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4c,0xb0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0x90,0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90, ++0x01,0x1f,0xe0,0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90, ++0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91, ++0x56,0xe0,0x20,0xe0,0x02,0x61,0xb7,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0, ++0xff,0x90,0x91,0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xb7,0x90,0x91,0x11,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02, ++0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54, ++0xf8,0xff,0xed,0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4, ++0x34,0xfb,0xf5,0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x7a,0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91, ++0x13,0xf0,0xa3,0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4, ++0x35,0xf0,0xfe,0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0, ++0xff,0xad,0x03,0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0, ++0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19, ++0x74,0x02,0xf0,0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea, ++0x8f,0xf0,0x12,0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11, ++0xe0,0xfc,0xa3,0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24, ++0x01,0xff,0x90,0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90, ++0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24, ++0x20,0x70,0x27,0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0, ++0x02,0x61,0x8f,0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0, ++0x44,0x08,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x61,0x88,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x13,0x54,0x03,0x20,0xe0,0x02,0x61,0x8f,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19, ++0xe0,0xfe,0xef,0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f, ++0xff,0x90,0x91,0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4, ++0x34,0xfb,0xf5,0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0, ++0x44,0x02,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90, ++0x91,0x56,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x3f,0x71, ++0xbc,0xbf,0x01,0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90, ++0x91,0x17,0xe0,0x04,0xf0,0x21,0xcc,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0, ++0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e, ++0xe0,0xc4,0x54,0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4, ++0x90,0x91,0x22,0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50, ++0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5, ++0x1f,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91, ++0x22,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91, ++0x22,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x34,0xb7,0xc3,0xee,0x94, ++0x01,0x40,0x0a,0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee, ++0x94,0x01,0x40,0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5, ++0x05,0x07,0x90,0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4, ++0x2f,0xff,0x22,0x00,0x18,0x58,}; ++ ++ ++ ++ ++ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c +@@ -0,0 +1,2680 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include "drv_types.h" ++#include "rtl8192c_hal.h" ++ ++//================================================================================ ++// Constant. ++//================================================================================ ++ ++// ++// Default LED behavior. ++// ++#define LED_BLINK_NORMAL_INTERVAL 100 ++#define LED_BLINK_SLOWLY_INTERVAL 200 ++#define LED_BLINK_LONG_INTERVAL 400 ++ ++#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 ++#define LED_BLINK_LINK_INTERVAL_ALPHA 500 //500 ++#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 //150 ++#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 ++#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 ++ ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++ ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void BlinkTimerCallback(void *data); ++#else ++void BlinkTimerCallback(struct timer_list *t); ++#endif ++ ++static void BlinkWorkItemCallback(struct work_struct *work); ++ ++// ++// Description: ++// Reset blinking status of LED_871x object. ++// ++static void ++ResetLedStatus(PLED_871x pLed) { ++ pLed->CurrLedState = RTW_LED_OFF; // Current LED state. ++ pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. ++ ++ pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. ++ pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. ++} ++ ++//================================================================================ ++// LED_819xUsb routines. ++//================================================================================ ++ ++// ++// Description: ++// Initialize an LED_871x object. ++// ++static void ++InitLed871x( ++ _adapter *padapter, ++ PLED_871x pLed, ++ LED_PIN_871x LedPin ++ ) ++{ ++ pLed->padapter = padapter; ++ pLed->LedPin = LedPin; ++ ++ ResetLedStatus(pLed); ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); ++#else ++ timer_setup(&pLed->BlinkTimer, BlinkTimerCallback, 0); ++#endif ++ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); ++} ++ ++ ++// ++// Description: ++// DeInitialize an LED_871x object. ++// ++static void ++DeInitLed871x( ++ PLED_871x pLed ++ ) ++{ ++ //call _cancel_workitem_sync(&(pLed->BlinkWorkItem)) ++ //before _cancel_timer_ex(&(pLed->BlinkTimer)) to ++ //avoid led timer restarting when driver is removed ++ ++ _cancel_workitem_sync(&(pLed->BlinkWorkItem)); ++ ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ ++ // We should reset bLedBlinkInProgress if we cancel the LedControlTimer, 2005.03.10, by rcnjko. ++ ResetLedStatus(pLed); ++} ++ ++// ++// Description: ++// Turn on LED according to LedPin specified. ++// ++static void ++SwLedOn( ++ _adapter *padapter, ++ PLED_871x pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ return; ++ } ++ ++ if( (BOARD_MINICARD == pHalData->BoardType )|| ++ (BOARD_USB_SOLO == pHalData->BoardType)|| ++ (BOARD_USB_COMBO == pHalData->BoardType)) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. ++ break; ++ ++ case LED_PIN_LED1: ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. ++ break; ++ ++ default: ++ break; ++ ++ } ++ } ++ else ++ { ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ if(pHalData->AntDivCfg) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); ++ } ++ else ++#endif ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG0); ++ rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg = rtw_read8(padapter,(REG_LEDCFG1)); ++ rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ ++ break; ++ ++ default: ++ break; ++ } ++ } ++ pLed->bLedOn = _TRUE; ++ ++} ++ ++ ++// ++// Description: ++// Turn off LED according to LedPin specified. ++// ++static void ++SwLedOff( ++ _adapter *padapter, ++ PLED_871x pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ goto exit; ++ } ++ ++ if( (BOARD_MINICARD == pHalData->BoardType )|| ++ (BOARD_USB_SOLO == pHalData->BoardType)|| ++ (BOARD_USB_COMBO == pHalData->BoardType)) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E ++ ++ switch(pLed->LedPin) ++ { ++ ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++ if(BOARD_USB_COMBO == pHalData->BoardType) ++ { ++ LedCfg &= 0x90; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); ++ LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); ++ LedCfg &= 0xFE; ++ rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); ++ } ++ else ++ { ++ LedCfg &= 0xf0; // Set to software control. ++ if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6)); ++ else ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg &= 0x0f; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ if(pHalData->AntDivCfg) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ LedCfg &= 0xe0; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); ++ } ++ else ++#endif ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG0); ++ LedCfg &= 0x70; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg = rtw_read8(padapter, (REG_LEDCFG1)); ++ LedCfg &= 0x70; // Set to software control. ++ rtw_write8(padapter, (REG_LEDCFG1), (LedCfg|BIT3)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++exit: ++ pLed->bLedOn = _FALSE; ++ ++} ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++ ++ ++// ++// Description: ++// Implementation of LED blinking behavior. ++// It toggle off LED and schedule corresponding timer if necessary. ++// ++static void ++SwLedBlink( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ // Determine if we shall change LED state again. ++ pLed->BlinkTimes--; ++ switch(pLed->CurrLedState) ++ { ++ ++ case LED_BLINK_NORMAL: ++ if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ else if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ ++ default: ++ bStopBlinking = _TRUE; ++ break; ++ ++ } ++ ++ if(bStopBlinking) ++ { ++ //if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2) ++ if(0) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && pLed->bLedOn == _TRUE) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ // Assign LED state to toggle. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ // Schedule a timer to toggle LED state. ++ switch( pLed->CurrLedState ) ++ { ++ case LED_BLINK_NORMAL: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_SLOWLY: ++ case LED_BLINK_StartToBlink: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS: ++ { ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ else ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ break; ++ ++ default: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ } ++ } ++} ++ ++ ++static void ++SwLedBlink1( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOn(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(!pLed1->bLedOn) ++ SwLedOn(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); ++ } ++ else ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOff(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(pLed1->bLedOn) ++ SwLedOff(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); ++ } ++ } ++ ++ ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ ResetLedStatus(pLed); ++ return; ++ } ++ ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_NORMAL: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ bStopBlinking = _FALSE; ++ else ++ bStopBlinking = _TRUE; ++ ++ if(bStopBlinking) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++static void ++SwLedBlink2( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++static void ++SwLedBlink3( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ if(pLed->CurrLedState != LED_BLINK_WPS_STOP) ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == RTW_LED_ON) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++static void ++SwLedBlink4( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) ++ { ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ SwLedOff(padapter, pLed1); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _FALSE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS authentication fail ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap ++ pLed->BlinkTimes--; ++ if(pLed->BlinkTimes == 0) ++ { ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkTimes = 1; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ } ++ ++ if(bStopBlinking) ++ { ++ pLed->BlinkTimes = 10; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++static void ++SwLedBlink5( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++static void ++SwLedBlink6( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == RTW_LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); ++} ++ ++ ++// ++// Description: ++// Callback function of LED BlinkTimer, ++// it just schedules to corresponding BlinkWorkItem. ++// ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void BlinkTimerCallback(void * data) ++{ ++ PLED_871x pLed = (PLED_871x)data; ++#else ++void BlinkTimerCallback(struct timer_list *t) ++{ ++ PLED_871x pLed = from_timer(pLed, t, BlinkTimer); ++#endif ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ return; ++ } ++ ++#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ rtw_led_blink_cmd(padapter, pLed); ++#else ++ _set_workitem(&(pLed->BlinkWorkItem)); ++#endif ++} ++ ++// ++// Description: ++// Handler function of LED Blinking. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkHandler(PLED_871x pLed) ++{ ++ struct led_priv *ledpriv = &(pLed->padapter->ledpriv); ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedBlink(pLed); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedBlink1(pLed); ++ break; ++ ++ case SW_LED_MODE2: ++ SwLedBlink2(pLed); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedBlink3(pLed); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedBlink4(pLed); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedBlink5(pLed); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedBlink6(pLed); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); ++ //SwLedBlink(pLed); ++ break; ++ } ++} ++ ++// ++// Description: ++// Callback function of LED BlinkWorkItem. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++static void BlinkWorkItemCallback(struct work_struct *work) ++{ ++ PLED_871x pLed = container_of(work, LED_871x, BlinkWorkItem); ++ BlinkHandler(pLed); ++} ++ ++ ++ ++//================================================================================ ++// Default LED behavior. ++//================================================================================ ++ ++// ++// Description: ++// Implement each led action for SW_LED_MODE0. ++// This is default strategy. ++// ++static void ++SwLedControlMode0( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_871x pLed = &(ledpriv->SwLed1); ++ ++ // Decide led state ++ switch(LedAction) ++ { ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ pLed->BlinkTimes = 2; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ pLed->BlinkTimes = 24; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ break; ++ ++ case LED_CTL_NO_LINK: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ if(pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ SwLedOff(padapter, pLed); ++ break; ++ ++ case LED_CTL_START_WPS: ++ if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_WPS; ++ pLed->BlinkTimes = 20; ++ ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedBlinkInProgress) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++ ++} ++ ++ //ALPHA, added by chiyoko, 20090106 ++static void ++SwLedControlMode1( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if( pLed->bLedLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //Arcadyan/Sitecom , added by chiyoko, 20090216 ++static void ++SwLedControlMode2( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ //COREGA, added by chiyoko, 20090316 ++ static void ++ SwLedControlMode3( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ ++ //Edimax-Belkin, added by chiyoko, 20090413 ++static void ++SwLedControlMode4( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_START_TO_LINK: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedStartToLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ //LED1 settings ++ if(LedAction == LED_CTL_LINK) ++ { ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ } ++ ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ pLed1->CurrLedState = RTW_LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: //WPS connect success ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; ++ pLed1->BlinkTimes = 10; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed1->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedStartToLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ } ++ ++ if( pLed1->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed1->BlinkingLedState = LED_UNKNOWN; ++ SwLedOff(padapter, pLed); ++ SwLedOff(padapter, pLed1); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ ++ ++ //Sercomm-Belkin, added by chiyoko, 20090415 ++static void ++SwLedControlMode5( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_NO_LINK: ++ case LED_CTL_LINK: //solid blue ++ pLed->CurrLedState = RTW_LED_ON; ++ pLed->BlinkingLedState = RTW_LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK) ++ { ++ return; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ else ++ pLed->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = RTW_LED_OFF; ++ pLed->BlinkingLedState = RTW_LED_OFF; ++ ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //WNC-Corega, added by chiyoko, 20090902 ++static void ++SwLedControlMode6( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed0 = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ _cancel_timer_ex(&(pLed0->BlinkTimer)); ++ pLed0->CurrLedState = RTW_LED_ON; ++ pLed0->BlinkingLedState = RTW_LED_ON; ++ _set_timer(&(pLed0->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ SwLedOff(padapter, pLed0); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed0->CurrLedState)); ++} ++ ++ ++// ++// Description: ++// Dispatch LED action according to pHalData->LedStrategy. ++// ++static void ++LedControl871x( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) ++ ||(padapter->hw_init_completed == _FALSE) ) ++ { ++ return; ++ } ++ ++ ++ if( ledpriv->bRegUseLed == _FALSE) ++ return; ++ ++ //if (!priv->up) ++ // return; ++ ++ //if(priv->bInHctTest) ++ // return; ++ ++ if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on && ++ padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) && ++ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || ++ LedAction == LED_CTL_SITE_SURVEY || ++ LedAction == LED_CTL_LINK || ++ LedAction == LED_CTL_NO_LINK || ++ LedAction == LED_CTL_POWER_ON) ) ++ { ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ //SwLedControlMode0(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedControlMode1(padapter, LedAction); ++ break; ++ case SW_LED_MODE2: ++ SwLedControlMode2(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedControlMode3(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedControlMode4(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedControlMode5(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedControlMode6(padapter, LedAction); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); ++} ++ ++// ++// Description: ++// Initialize all LED_871x objects. ++// ++void ++rtl8192cu_InitSwLeds( ++ _adapter *padapter ++ ) ++{ ++ struct led_priv *pledpriv = &(padapter->ledpriv); ++ ++ pledpriv->LedControlHandler = LedControl871x; ++ ++ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); ++ ++ InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); ++} ++ ++ ++// ++// Description: ++// DeInitialize all LED_819xUsb objects. ++// ++void ++rtl8192cu_DeInitSwLeds( ++ _adapter *padapter ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ DeInitLed871x( &(ledpriv->SwLed0) ); ++ DeInitLed871x( &(ledpriv->SwLed1) ); ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c +@@ -0,0 +1,229 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192CU_RECV_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++ ++#include ++ ++ ++void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ ++ precvbuf->transfer_len = 0; ++ ++ precvbuf->len = 0; ++ ++ precvbuf->ref_cnt = 0; ++ ++ if(precvbuf->pbuf) ++ { ++ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; ++ precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; ++ } ++ ++} ++ ++int rtl8192cu_init_recv_priv(_adapter *padapter) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ int i, res = _SUCCESS; ++ struct recv_buf *precvbuf; ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed ++ _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed ++#endif ++ ++#ifdef PLATFORM_LINUX ++ tasklet_init(&precvpriv->recv_tasklet, ++ (void(*)(unsigned long))rtl8192cu_recv_tasklet, ++ (unsigned long)padapter); ++#endif ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++#ifdef PLATFORM_LINUX ++ precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); ++ if(precvpriv->int_in_urb == NULL){ ++ DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); ++ } ++#endif ++ precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX)); ++ if(precvpriv->int_in_buf == NULL){ ++ DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); ++ } ++#endif ++ ++ //init recv_buf ++ _rtw_init_queue(&precvpriv->free_recv_buf_queue); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ _rtw_init_queue(&precvpriv->recv_buf_pending_queue); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ if(precvpriv->pallocated_recv_buf==NULL){ ++ res= _FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); ++ goto exit; ++ } ++ _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ ++ precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); ++ //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - ++ // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); ++ ++ ++ precvbuf = (struct recv_buf*)precvpriv->precv_buf; ++ ++ for(i=0; i < NR_RECVBUFF ; i++) ++ { ++ _rtw_init_listhead(&precvbuf->list); ++ ++ _rtw_spinlock_init(&precvbuf->recvbuf_lock); ++ ++ precvbuf->alloc_sz = MAX_RECVBUF_SZ; ++ ++ res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); ++ if(res==_FAIL) ++ break; ++ ++ precvbuf->ref_cnt = 0; ++ precvbuf->adapter =padapter; ++ ++ ++ //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); ++ ++ precvbuf++; ++ ++ } ++ ++ precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; ++ ++#ifdef PLATFORM_LINUX ++ ++ skb_queue_head_init(&precvpriv->rx_skb_queue); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ { ++ int i; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ struct sk_buff *pskb=NULL; ++ ++ skb_queue_head_init(&precvpriv->free_recv_skb_queue); ++ ++ for(i=0; idev = padapter->pnetdev; ++ ++ tmpaddr = (SIZE_PTR)pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); ++ } ++ ++ pskb=NULL; ++ ++ } ++ } ++#endif ++ ++#endif ++ ++exit: ++ ++ return res; ++ ++} ++ ++void rtl8192cu_free_recv_priv (_adapter *padapter) ++{ ++ int i; ++ struct recv_buf *precvbuf; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ ++ for(i=0; i < NR_RECVBUFF ; i++) ++ { ++ rtw_os_recvbuf_resource_free(padapter, precvbuf); ++ precvbuf++; ++ } ++ ++ if(precvpriv->pallocated_recv_buf) ++ rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++#ifdef PLATFORM_LINUX ++ if(precvpriv->int_in_urb) ++ { ++ usb_free_urb(precvpriv->int_in_urb); ++ } ++#endif ++ if(precvpriv->int_in_buf) ++ rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX)); ++#endif ++ ++#ifdef PLATFORM_LINUX ++ ++ if (skb_queue_len(&precvpriv->rx_skb_queue)) { ++ DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); ++ } ++ ++ rtw_skb_queue_purge(&precvpriv->rx_skb_queue); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ ++ if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { ++ DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); ++ } ++ ++ rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); ++ ++#endif ++ ++#endif ++ ++} ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c +@@ -0,0 +1,1150 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_XMIT_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++ ++s32 rtl8192cu_init_xmit_priv(_adapter *padapter) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++#ifdef PLATFORM_LINUX ++ tasklet_init(&pxmitpriv->xmit_tasklet, ++ (void(*)(unsigned long))rtl8192cu_xmit_tasklet, ++ (unsigned long)padapter); ++#endif ++ return _SUCCESS; ++} ++ ++void rtl8192cu_free_xmit_priv(_adapter *padapter) ++{ ++} ++ ++u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe) ++{ ++ u32 addr; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ switch(pattrib->qsel) ++ { ++ case 0: ++ case 3: ++ addr = BE_QUEUE_INX; ++ break; ++ case 1: ++ case 2: ++ addr = BK_QUEUE_INX; ++ break; ++ case 4: ++ case 5: ++ addr = VI_QUEUE_INX; ++ break; ++ case 6: ++ case 7: ++ addr = VO_QUEUE_INX; ++ break; ++ case 0x10: ++ addr = BCN_QUEUE_INX; ++ break; ++ case 0x11://BC/MC in PS (HIQ) ++ addr = HIGH_QUEUE_INX; ++ break; ++ case 0x12: ++ addr = MGT_QUEUE_INX; ++ break; ++ default: ++ addr = BE_QUEUE_INX; ++ break; ++ ++ } ++ ++ return addr; ++ ++} ++ ++int urb_zero_packet_chk(_adapter *padapter, int sz) ++{ ++ int blnSetTxDescOffset; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ ++ if ( pdvobj->ishighspeed ) ++ { ++ if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) { ++ blnSetTxDescOffset = 1; ++ } else { ++ blnSetTxDescOffset = 0; ++ } ++ } ++ else ++ { ++ if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) { ++ blnSetTxDescOffset = 1; ++ } else { ++ blnSetTxDescOffset = 0; ++ } ++ } ++ ++ return blnSetTxDescOffset; ++ ++} ++ ++void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc) ++{ ++ u16 *usPtr = (u16*)ptxdesc; ++ u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times ++ u32 index; ++ u16 checksum = 0; ++ ++ //Clear first ++ ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); ++ ++ for(index = 0 ; index < count ; index++){ ++ checksum = checksum ^ le16_to_cpu(*(usPtr + index)); ++ } ++ ++ ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum); ++ ++} ++ ++void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) ++{ ++ if ((pattrib->encrypt > 0) && !pattrib->bswenc) ++ { ++ switch (pattrib->encrypt) ++ { ++ //SEC_TYPE ++ case _WEP40_: ++ case _WEP104_: ++ ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ //ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000); ++ ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); ++ break; ++ case _AES_: ++ ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000); ++ break; ++ case _NO_PRIVACY_: ++ default: ++ break; ++ ++ } ++ ++ } ++ ++} ++ ++static void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) ++{ ++ //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); ++ ++ switch(pattrib->vcs_mode) ++ { ++ case RTS_CTS: ++ *pdw |= cpu_to_le32(BIT(12)); ++ break; ++ case CTS_TO_SELF: ++ *pdw |= cpu_to_le32(BIT(11)); ++ break; ++ case NONE_VCS: ++ default: ++ break; ++ } ++ ++ if(pattrib->vcs_mode) { ++ *pdw |= cpu_to_le32(BIT(13)); ++ ++ // Set RTS BW ++ if(pattrib->ht_en) ++ { ++ *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(27)):0; ++ ++ if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ *pdw |= cpu_to_le32((0x01<<28)&0x30000000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) ++ *pdw |= cpu_to_le32((0x02<<28)&0x30000000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ++ *pdw |= 0; ++ else ++ *pdw |= cpu_to_le32((0x03<<28)&0x30000000); ++ } ++ } ++} ++ ++static void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) ++{ ++ //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); ++ ++ if(pattrib->ht_en) ++ { ++ *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0; ++ ++ if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ *pdw |= cpu_to_le32((0x01<<20)&0x00300000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) ++ *pdw |= cpu_to_le32((0x02<<20)&0x00300000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ++ *pdw |= 0; ++ else ++ *pdw |= cpu_to_le32((0x03<<20)&0x00300000); ++ } ++} ++ ++static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bagg_pkt) ++{ ++ int pull=0; ++ uint qsel; ++ _adapter *padapter = pxmitframe->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct tx_desc *ptxdesc = (struct tx_desc *)pmem; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ sint bmcst = IS_MCAST(pattrib->ra); ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ if((_FALSE == bagg_pkt) && (urb_zero_packet_chk(padapter, sz)==0)) ++ { ++ ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); ++ pull = 1; ++ pxmitframe->pkt_offset --; ++ } ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel & 0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); ++ ++ ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); ++ ++ fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ if(pattrib->ampdu_en==_TRUE) ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN ++ else ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ++ //offset 8 ++ ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ ++ //offset 16 , offset 20 ++ if (pattrib->qos_en) ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS ++ ++ if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1)) ++ { ++ //Non EAP & ARP & DHCP type data packet ++ ++ fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); ++ fill_txdesc_phy(pattrib, &ptxdesc->txdw4); ++ ++ ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M ++ ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);// ++ //ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M ++ ++ //use REG_INIDATA_RATE_SEL value ++ ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); ++ ++ if(0)//for driver dbg ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ if(pattrib->ht_en) ++ ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI ++ ++ ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7 ++ } ++ ++ } ++ else ++ { ++ // EAP data packet and ARP packet. ++ // Use the 1M data rate to send the EAP/ARP packet. ++ // This will maybe make the handshake smooth. ++ ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT ++ ++ ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); ++ } ++ ++ //offset 24 ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ if ( pattrib->hw_tcp_csum == 1 ) { ++ // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! ++ u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; ++ ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); ++ DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); ++ } ++#endif ++ } ++ else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) ++ { ++ //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel&0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel<txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); ++ ++ //fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ //offset 8 ++#ifdef CONFIG_XMIT_ACK ++ //CCX-TXRPT ack for xmit mgmt frames. ++ if (pxmitframe->ack_report) { ++ ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); ++ #ifdef DBG_CCX ++ DBG_871X("%s set ccx\n", __func__); ++ #endif ++ } ++#endif //CONFIG_XMIT_ACK ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable ++ if(pattrib->retry_ctrl == _TRUE) ++ { ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++#ifdef CONFIG_INTEL_WIDI ++ if(padapter->mlmepriv.widi_enable == _TRUE) ++ ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 ++ else ++#endif //CONFIG_INTEL_WIDI ++ ptxdesc->txdw5 |= cpu_to_le32(0x00080000);//retry limit = 2 ++ } ++ else ++#endif //CONFIG_P2P ++ ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 ++ } ++ else ++ ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12 ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ ++ printk("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); ++ ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate); ++ } ++ else ++#endif ++ { ++ ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); ++ } ++ } ++ else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) ++ { ++ DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); ++ } ++#ifdef CONFIG_MP_INCLUDED ++ else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) ++ { ++ fill_txdesc_for_mp(padapter, ptxdesc); ++ } ++#endif ++ else ++ { ++ DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID) ++ ++ ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid ++ ++ //offset 8 ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); ++ } ++ ++ // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. ++ // (1) The sequence number of each non-Qos frame / broadcast / multicast / ++ // mgnt frame should be controled by Hw because Fw will also send null data ++ // which we cannot control when Fw LPS enable. ++ // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. ++ // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. ++ // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. ++ // 2010.06.23. Added by tynli. ++ if(!pattrib->qos_en) ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BIT(24)); ++ } ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0)); ++ ++ //offset 4 ++ // pkt_offset, unit:8 bytes padding ++ if (pxmitframe->pkt_offset > 0) ++ ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ if (pxmitframe->agg_num > 1) ++ ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000); ++#endif ++ ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++ ++ return pull; ++ ++} ++ ++static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ s32 ret = _SUCCESS; ++ s32 inner_ret = _SUCCESS; ++ int t, sz, w_sz, pull=0; ++ u8 *mem_addr; ++ u32 ff_hwaddr; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ if ((pxmitframe->frame_tag == DATA_FRAMETAG) && ++ (pxmitframe->attrib.ether_type != 0x0806) && ++ (pxmitframe->attrib.ether_type != 0x888e) && ++ (pxmitframe->attrib.dhcp_pkt != 1)) ++ { ++ rtw_issue_addbareq_cmd(padapter, pxmitframe); ++ } ++ ++ mem_addr = pxmitframe->buf_addr; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); ++ ++ for (t = 0; t < pattrib->nr_frags; t++) ++ { ++ if (inner_ret != _SUCCESS && ret == _SUCCESS) ++ ret = _FAIL; ++ ++ if (t != (pattrib->nr_frags - 1)) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); ++ ++ sz = pxmitpriv->frag_len; ++ sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); ++ } ++ else //no frag ++ { ++ sz = pattrib->last_txcmdsz; ++ } ++ ++ pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); ++ ++ if(pull) ++ { ++ mem_addr += PACKET_OFFSET_SZ; //pull txdesc head ++ ++ //pxmitbuf ->pbuf = mem_addr; ++ pxmitframe->buf_addr = mem_addr; ++ ++ w_sz = sz + TXDESC_SIZE; ++ } ++ else ++ { ++ w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; ++ } ++ ++ ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); ++ ++ inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); ++ ++ rtw_count_tx_stats(padapter, pxmitframe, sz); ++ ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); ++ //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); ++ ++ mem_addr += w_sz; ++ ++ mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); ++ ++ } ++ ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ if (ret != _SUCCESS) ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); ++ ++ return ret; ++} ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ u32 len = 0; ++ ++ // no consider fragement ++ len = pattrib->hdrlen + pattrib->iv_len + ++ SNAP_SIZE + sizeof(u16) + ++ pattrib->pktlen + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0); ++ ++ if(pattrib->encrypt ==_TKIP_) ++ len += 8; ++ ++ return len; ++} ++ ++#define IDEA_CONDITION 1 // check all packets before enqueue ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct xmit_frame *pxmitframe = NULL; ++ struct xmit_frame *pfirstframe = NULL; ++ ++ // aggregate variable ++ struct hw_xmit *phwxmit; ++ struct sta_info *psta = NULL; ++ struct tx_servq *ptxservq = NULL; ++ ++ _irqL irqL; ++ _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; ++ ++ u32 pbuf; // next pkt address ++ u32 pbuf_tail; // last pkt tail ++ u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET ++ ++ u32 bulkSize = pHalData->UsbBulkOutSize; ++ u8 descCount; ++ u32 bulkPtr; ++ ++ // dump frame variable ++ u32 ff_hwaddr; ++ ++#ifndef IDEA_CONDITION ++ int res = _SUCCESS; ++#endif ++ ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); ++ ++ ++ // check xmitbuffer is ok ++ if (pxmitbuf == NULL) { ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) return _FALSE; ++ } ++ ++ ++ //3 1. pick up first frame ++ do { ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); ++ if (pxmitframe == NULL) { ++ // no more xmit frame, release xmit buffer ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ return _FALSE; ++ } ++ ++ ++#ifndef IDEA_CONDITION ++ if (pxmitframe->frame_tag != DATA_FRAMETAG) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", ++ pxmitframe->frame_tag, DATA_FRAMETAG)); ++// rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // TID 0~15 ++ if ((pxmitframe->attrib.priority < 0) || ++ (pxmitframe->attrib.priority > 15)) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: TID(%d) should be 0~15!\n", ++ pxmitframe->attrib.priority)); ++// rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pxmitframe; ++ ++ //pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. ++ pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset ++ ++ ++ if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { ++ DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); ++ continue; ++ } ++ ++ ++ // always return ndis_packet after rtw_xmitframe_coalesce ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ ++ break; ++ } while (1); ++ ++ //3 2. aggregate same priority and same DA(AP or STA) frames ++ pfirstframe = pxmitframe; ++ len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET; ++ pbuf_tail = len; ++ pbuf = _RND8(pbuf_tail); ++ ++ // check pkt amount in one bluk ++ descCount = 0; ++ bulkPtr = bulkSize; ++ if (pbuf < bulkPtr) ++ descCount++; ++ else { ++ descCount = 0; ++ bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize ++ } ++ ++ // dequeue same priority packet from station tx queue ++ psta = pfirstframe->attrib.psta; ++ switch (pfirstframe->attrib.priority) { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ phwxmit = pxmitpriv->hwxmits + 3; ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ phwxmit = pxmitpriv->hwxmits + 1; ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ phwxmit = pxmitpriv->hwxmits; ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ phwxmit = pxmitpriv->hwxmits + 2; ++ break; ++ } ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptxservq->sta_pending); ++ xmitframe_plist = get_next(xmitframe_phead); ++ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset ++ if (pbuf + len > MAX_XMITBUF_SZ) break; ++ ++ rtw_list_delete(&pxmitframe->list); ++ ptxservq->qcnt--; ++ phwxmit->accnt--; ++ ++#ifndef IDEA_CONDITION ++ // suppose only data frames would be in queue ++ if (pxmitframe->frame_tag != DATA_FRAMETAG) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", ++ pxmitframe->frame_tag, DATA_FRAMETAG)); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // TID 0~15 ++ if ((pxmitframe->attrib.priority < 0) || ++ (pxmitframe->attrib.priority > 15)) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: TID(%d) should be 0~15!\n", ++ pxmitframe->attrib.priority)); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++// pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; ++ ++ pxmitframe->agg_num = 0; // not first frame of aggregation ++ pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset ++ ++ if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { ++ DBG_871X("%s coalesce failed \n",__FUNCTION__); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // always return ndis_packet after rtw_xmitframe_coalesce ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ ++ // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz ++ update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, _TRUE); ++ ++ // don't need xmitframe any more ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ // handle pointer and stop condition ++ pbuf_tail = pbuf + len; ++ pbuf = _RND8(pbuf_tail); ++ ++ pfirstframe->agg_num++; ++ if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) ++ break; ++ ++ if (pbuf < bulkPtr) { ++ descCount++; ++ if (descCount == pHalData->UsbTxAggDescNum) ++ break; ++ } else { ++ descCount = 0; ++ bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; ++ } ++ } ++ if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) ++ rtw_list_delete(&ptxservq->tx_pending); ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if ((pfirstframe->attrib.ether_type != 0x0806) && ++ (pfirstframe->attrib.ether_type != 0x888e) && ++ (pfirstframe->attrib.dhcp_pkt != 1)) ++ { ++ rtw_issue_addbareq_cmd(padapter, pfirstframe); ++ } ++ ++#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ //3 3. update first frame txdesc ++ if ((pbuf_tail % bulkSize) == 0) { ++ // remove pkt_offset ++ pbuf_tail -= PACKET_OFFSET_SZ; ++ pfirstframe->buf_addr += PACKET_OFFSET_SZ; ++ pfirstframe->pkt_offset = 0; ++ } ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, _TRUE); ++ ++ //3 4. write xmit buffer to USB FIFO ++ ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); ++ ++ // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr ++ rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); ++ ++ ++ //3 5. update statisitc ++ pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); ++ if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ; ++ ++ rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); ++ ++ rtw_free_xmitframe(pxmitpriv, pfirstframe); ++ ++ return _TRUE; ++} ++ ++#else ++ ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ ++ struct hw_xmit *phwxmits; ++ sint hwentry; ++ struct xmit_frame *pxmitframe=NULL; ++ int res=_SUCCESS, xcnt = 0; ++ ++ phwxmits = pxmitpriv->hwxmits; ++ hwentry = pxmitpriv->hwxmit_entry; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); ++ ++ if(pxmitbuf==NULL) ++ { ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if(!pxmitbuf) ++ { ++ return _FALSE; ++ } ++ } ++ ++ ++ do ++ { ++ pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); ++ ++ if(pxmitframe) ++ { ++ pxmitframe->pxmitbuf = pxmitbuf; ++ ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ ++ pxmitbuf->priv_data = pxmitframe; ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ if(pxmitframe->attrib.priority<=15)//TID0~15 ++ { ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ } ++ ++ rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce ++ } ++ ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); ++ ++ ++ if(res == _SUCCESS) ++ { ++ rtw_dump_xframe(padapter, pxmitframe); ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ } ++ ++ xcnt++; ++ ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ return _FALSE; ++ } ++ ++ break; ++ ++ }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); ++ ++ return _TRUE; ++ ++} ++#endif ++ ++ ++ ++static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ s32 res = _SUCCESS; ++ ++ ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (res == _SUCCESS) { ++ rtw_dump_xframe(padapter, pxmitframe); ++ } ++ ++ return res; ++} ++ ++/* ++ * Return ++ * _TRUE dump packet directly ++ * _FALSE enqueue packet ++ */ ++static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ s32 res; ++ struct xmit_buf *pxmitbuf = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ ++ if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) ++ goto enqueue; ++ ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ goto enqueue; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ goto enqueue; ++#endif ++ ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) ++ goto enqueue; ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pxmitframe; ++ ++ if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ } ++ ++ return _TRUE; ++ ++enqueue: ++ res = rtw_xmitframe_enqueue(padapter, pxmitframe); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if (res != _SUCCESS) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ // Trick, make the statistics correct ++ pxmitpriv->tx_pkts--; ++ pxmitpriv->tx_drop++; ++ return _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++s32 rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ return rtw_dump_xframe(padapter, pmgntframe); ++} ++ ++/* ++ * Return ++ * _TRUE dump packet directly ok ++ * _FALSE temporary can't transmit packets to hardware ++ */ ++s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ return pre_xmitframe(padapter, pxmitframe); ++} ++ ++s32 rtl8192cu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ s32 err; ++ ++ if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) ++ { ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ // Trick, make the statistics correct ++ pxmitpriv->tx_pkts--; ++ pxmitpriv->tx_drop++; ++ } ++ else ++ { ++#ifdef PLATFORM_LINUX ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++#endif ++ } ++ ++ return err; ++ ++} ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ ++static void rtl8192cu_hostap_mgnt_xmit_cb(struct urb *urb) ++{ ++#ifdef PLATFORM_LINUX ++ struct sk_buff *skb = (struct sk_buff *)urb->context; ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ rtw_skb_free(skb); ++#endif ++} ++ ++s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) ++{ ++#ifdef PLATFORM_LINUX ++ u16 fc; ++ int rc, len, pipe; ++ unsigned int bmcst, tid, qsel; ++ struct sk_buff *skb, *pxmit_skb; ++ struct urb *urb; ++ unsigned char *pxmitbuf; ++ struct tx_desc *ptxdesc; ++ struct rtw_ieee80211_hdr *tx_hdr; ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pnetdev = padapter->pnetdev; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ skb = pkt; ++ ++ len = skb->len; ++ tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); ++ fc = le16_to_cpu(tx_hdr->frame_ctl); ++ bmcst = IS_MCAST(tx_hdr->addr1); ++ ++ if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) ++ goto _exit; ++ ++ pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); ++ ++ if(!pxmit_skb) ++ goto _exit; ++ ++ pxmitbuf = pxmit_skb->data; ++ ++ urb = usb_alloc_urb(0, GFP_ATOMIC); ++ if (!urb) { ++ goto _exit; ++ } ++ ++ // ----- fill tx desc ----- ++ ptxdesc = (struct tx_desc *)pxmitbuf; ++ _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ ++ if(bmcst) ++ { ++ ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); ++ } ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID ++ ++ ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode ++ ++ //offset 8 ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ ++ ++ //HW append seq ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ ++ ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++ // ----- end of fill tx desc ----- ++ ++ // ++ skb_put(pxmit_skb, len + TXDESC_SIZE); ++ pxmitbuf = pxmitbuf + TXDESC_SIZE; ++ _rtw_memcpy(pxmitbuf, skb->data, len); ++ ++ //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); ++ ++ ++ // ----- prepare urb for submit ----- ++ ++ //translate DMA FIFO addr to pipehandle ++ //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); ++ pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); ++ ++ usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, ++ pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); ++ ++ urb->transfer_flags |= URB_ZERO_PACKET; ++ usb_anchor_urb(urb, &phostapdpriv->anchored); ++ rc = usb_submit_urb(urb, GFP_ATOMIC); ++ if (rc < 0) { ++ usb_unanchor_urb(urb); ++ kfree_skb(skb); ++ } ++ usb_free_urb(urb); ++ ++ ++_exit: ++ ++ rtw_skb_free(skb); ++ ++#endif ++ ++ return 0; ++ ++} ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c +@@ -0,0 +1,6261 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_HAL_INIT_C_ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192c_sreset.h" ++#endif ++ ++#ifdef CONFIG_IOL ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ ++#error "CONFIG_USB_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++ ++#if DISABLE_BB_RF ++ #define HAL_MAC_ENABLE 0 ++ #define HAL_BB_ENABLE 0 ++ #define HAL_RF_ENABLE 0 ++#else ++ #define HAL_MAC_ENABLE 1 ++ #define HAL_BB_ENABLE 1 ++ #define HAL_RF_ENABLE 1 ++#endif ++ ++//endpoint number 1,2,3,4,5 ++// bult in : 1 ++// bult out: 2 (High) ++// bult out: 3 (Normal) for 3 out_ep, (Low) for 2 out_ep ++// interrupt in: 4 ++// bult out: 5 (Low) for 3 out_ep ++ ++ ++static VOID ++_OneOutEpMapping( ++ IN HAL_DATA_TYPE *pHalData ++ ) ++{ ++ //only endpoint number 0x02 ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++} ++ ++ ++static VOID ++_TwoOutEpMapping( ++ IN HAL_DATA_TYPE *pHalData, ++ IN BOOLEAN bWIFICfg ++ ) ++{ ++ ++/* ++#define VO_QUEUE_INX 0 ++#define VI_QUEUE_INX 1 ++#define BE_QUEUE_INX 2 ++#define BK_QUEUE_INX 3 ++#define BCN_QUEUE_INX 4 ++#define MGT_QUEUE_INX 5 ++#define HIGH_QUEUE_INX 6 ++#define TXCMD_QUEUE_INX 7 ++*/ ++ if(bWIFICfg){ // Normal chip && wmm ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:L (end_number=0x03) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[1];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ else{//typical setting ++ ++ //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:L (end_number=0x03) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ ++} ++ ++ ++static VOID _ThreeOutEpMapping( ++ IN HAL_DATA_TYPE *pHalData, ++ IN BOOLEAN bWIFICfg ++ ) ++{ ++ if(bWIFICfg){//for WMM ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ else{//typical setting ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05) ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[2];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ ++} ++ ++static BOOLEAN ++_MappingOutEP( ++ IN PADAPTER pAdapter, ++ IN u8 NumOutPipe ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct registry_priv *pregistrypriv = &pAdapter->registrypriv; ++ ++ BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE; ++ ++ BOOLEAN result = _TRUE; ++ ++ switch(NumOutPipe) ++ { ++ case 2: ++ _TwoOutEpMapping(pHalData, bWIFICfg); ++ break; ++ case 3: ++ _ThreeOutEpMapping(pHalData, bWIFICfg); ++ break; ++ case 1: ++ _OneOutEpMapping(pHalData); ++ break; ++ default: ++ result = _FALSE; ++ break; ++ } ++ ++ return result; ++ ++} ++ ++static VOID ++_ConfigChipOutEP( ++ IN PADAPTER pAdapter, ++ IN u8 NumOutPipe ++ ) ++{ ++ u8 value8; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ pHalData->OutEpQueueSel = 0; ++ pHalData->OutEpNumber = 0; ++ ++ // Normal and High queue ++ value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1)); ++ ++ if(value8 & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_HQ; ++ pHalData->OutEpNumber++; ++ } ++ ++#ifdef CONFIG_USB_ONE_OUT_EP ++ return; ++#endif ++ ++ if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_NQ; ++ pHalData->OutEpNumber++; ++ } ++ ++ // Low queue ++ value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2)); ++ if(value8 & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_LQ; ++ pHalData->OutEpNumber++; ++ } ++ ++ // TODO: Error recovery for this case ++ //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber)); ++ ++} ++ ++static BOOLEAN HalUsbSetQueuePipeMapping8192CUsb( ++ IN PADAPTER pAdapter, ++ IN u8 NumInPipe, ++ IN u8 NumOutPipe ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN result = _FALSE; ++ ++ _ConfigChipOutEP(pAdapter, NumOutPipe); ++ ++ #ifndef CONFIG_USB_ONE_OUT_EP ++ // Normal chip with one IN and one OUT doesn't have interrupt IN EP. ++ if(1 == pHalData->OutEpNumber){ ++ if(1 != NumInPipe){ ++ return result; ++ } ++ } ++ #endif ++ result = _MappingOutEP(pAdapter, NumOutPipe); ++ ++ return result; ++ ++} ++ ++void rtl8192cu_interface_configure(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ ++ if (pdvobjpriv->ishighspeed == _TRUE) ++ { ++ pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes ++ } ++ else ++ { ++ pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes ++ } ++ ++ pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; ++ pHalData->RtBulkInPipe = pdvobjpriv->ep_num[0]; ++ pHalData->RtBulkOutPipe[0] = pdvobjpriv->ep_num[1]; ++ pHalData->RtBulkOutPipe[1] = pdvobjpriv->ep_num[2]; ++ pHalData->RtIntInPipe = pdvobjpriv->ep_num[3]; ++ pHalData->RtBulkOutPipe[2] = pdvobjpriv->ep_num[4]; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pHalData->UsbTxAggMode = 1; ++ pHalData->UsbTxAggDescNum = 0x6; // only 4 bits ++#endif ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; ++ pHalData->UsbRxAggBlockCount = 8; //unit : 512b ++ pHalData->UsbRxAggBlockTimeout = 0x6; ++ pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize ++ pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) ++#endif ++ ++ HalUsbSetQueuePipeMapping8192CUsb(padapter, pdvobjpriv->RtNumInPipes, ++ #ifdef CONFIG_USB_ONE_OUT_EP ++ 1 ++ #else ++ pdvobjpriv->RtNumOutPipes ++ #endif ++ ); ++ ++} ++ ++static u8 _InitPowerOn(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 ret = _SUCCESS; ++ u16 value16=0; ++ u8 value8 = 0; ++ u32 value32 = 0; ++ ++ // polling autoload done. ++ u32 pollingCount = 0; ++ ++ do ++ { ++ if(rtw_read8(padapter, REG_APS_FSMCO) & PFM_ALDN){ ++ //RT_TRACE(COMP_INIT,DBG_LOUD,("Autoload Done!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++ ++// For hardware power on sequence. ++ ++ //0. RSV_CTRL 0x1C[7:0] = 0x00 // unlock ISO/CLK/Power control register ++ rtw_write8(padapter, REG_RSV_CTRL, 0x0); ++ // Power on when re-enter from IPS/Radio off/card disable ++ rtw_write8(padapter, REG_SPS0_CTRL, 0x2b);//enable SPS into PWM mode ++/* ++ value16 = PlatformIORead2Byte(Adapter, REG_AFE_XTAL_CTRL);//enable AFE clock ++ value16 &= (~XTAL_GATE_AFE); ++ PlatformIOWrite2Byte(Adapter,REG_AFE_XTAL_CTRL, value16 ); ++*/ ++ ++ rtw_udelay_os(100);//PlatformSleepUs(150);//this is not necessary when initially power on ++ ++ value8 = rtw_read8(padapter, REG_LDOV12D_CTRL); ++ if(0== (value8 & LDV12_EN) ){ ++ value8 |= LDV12_EN; ++ rtw_write8(padapter, REG_LDOV12D_CTRL, value8); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); ++ rtw_udelay_os(100);//PlatformSleepUs(100);//this is not necessary when initially power on ++ value8 = rtw_read8(padapter, REG_SYS_ISO_CTRL); ++ value8 &= ~ISO_MD2PP; ++ rtw_write8(padapter, REG_SYS_ISO_CTRL, value8); ++ } ++ ++ // auto enable WLAN ++ pollingCount = 0; ++ value16 = rtw_read16(padapter, REG_APS_FSMCO); ++ value16 |= APFM_ONMAC; ++ rtw_write16(padapter, REG_APS_FSMCO, value16); ++ ++ do ++ { ++ if(0 == (rtw_read16(padapter, REG_APS_FSMCO) & APFM_ONMAC)){ ++ //RT_TRACE(COMP_INIT,DBG_LOUD,("MAC auto ON okay!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++ //Enable Radio ,GPIO ,and LED function ++ rtw_write16(padapter,REG_APS_FSMCO,0x0812); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ //for usb Combo card ,BT ++ if((BOARD_USB_COMBO == pHalData->BoardType)&&(padapter->registrypriv.usbss_enable)) ++ { ++ value32 = rtw_read32(padapter, REG_APS_FSMCO); ++ value32 |= (SOP_ABG|SOP_AMB|XOP_BTCK); ++ rtw_write32(padapter, REG_APS_FSMCO, value32); ++ } ++#endif ++ ++ // release RF digital isolation ++ value16 = rtw_read16(padapter, REG_SYS_ISO_CTRL); ++ value16 &= ~ISO_DIOR; ++ rtw_write16(padapter, REG_SYS_ISO_CTRL, value16); ++ ++ // Enable MAC DMA/WMAC/SCHEDULE/SEC block ++ value16 = rtw_read16(padapter, REG_CR); ++ value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN ++ | PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC); ++ rtw_write16(padapter, REG_CR, value16); ++ ++ //tynli_test for suspend mode. ++ { ++ rtw_write8(padapter, 0xfe10, 0x19); ++ } ++ ++ // 2010/11/22 MH For slim combo debug mode check. ++ if (pHalData->BoardType == BOARD_USB_COMBO) ++ { ++ if (pHalData->SlimComboDbg == _TRUE) ++ { ++ DBG_8192C("SlimComboDbg == TRUE\n"); ++ ++ // 1. SIC?Test Mode , Debug Ports |۰ Enable, ҥH Driver Wӫ, ++ // nг]w 0x 00[7] -> "1", N Disable. effect if not: power consumption increase ++ rtw_write8(padapter, REG_SYS_ISO_CTRL, rtw_read8(padapter, REG_SYS_ISO_CTRL)|BIT7); ++ ++ // 2. SIC?Test Mode , GPIO-8?| report Power State ҥH Driver Wӫ, г]w? 0x04[6] -> "1" N Disable ++ // effect if not: GPIO-8 could not be GPIO or LED function ++ rtw_write8(padapter, REG_APS_FSMCO, rtw_read8(padapter, REG_APS_FSMCO)|BIT6); ++ ++ // 3. SIC Test Mode , EESK, EECS | report?Host Clock status, ҥH Driver Wӫ, г]w? 0x40[4] -> "1" N EEPROM ϥ Pin (autoload still from Efuse) ++ // effect if not:power consumption increase ++ value8 = rtw_read8(padapter, REG_GPIO_MUXCFG)|BIT4 ; ++ #ifdef CONFIG_BT_COEXIST ++ // 2011/01/26 MH UMB-B cut bug. We need to support the modification. ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && ++ pHalData->bt_coexist.BT_Coexist) ++ { ++ value8 |= (BIT5); ++ } ++ #endif ++ rtw_write8(padapter, REG_GPIO_MUXCFG,value8 ); ++ ++ ++ // 4. SIC Test Mode ,?SIC Debug ports |۰ Enable , ҥH Driver WӫᰨW, г]w? 0x40[15:11] -> 0x00, NDisable ++ // 4.1Two Steps setting for safety: 0x40[15,13,12, 11] -> "0", then ?0x40[14] -> "0" ++ // effect if not: Host could not transfer packets, and GPIO-3,2 will occupied by SIC then Co-exist could not work. ++ rtw_write16(padapter, REG_GPIO_MUXCFG, (rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF)|BIT14); ++ rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF); ++ } ++ } ++ ++ ++ // 2011/02/18 To Fix RU LNA power leakage problem. We need to execute below below in ++ // Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all ++ // IC. According to Johnny's opinion, only RU will meet the condition. ++ if (IS_HARDWARE_TYPE_8192C(padapter) && (pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write32(padapter, rFPGA0_XCD_RFParameter, rtw_read32(padapter, rFPGA0_XCD_RFParameter)&(~BIT1)); ++ return ret; ++ ++} ++ ++ ++static void _dbg_dump_macreg(_adapter *padapter) ++{ ++ u32 offset = 0; ++ u32 val32 = 0; ++ u32 index =0 ; ++ for(index=0;index<64;index++) ++ { ++ offset = index*4; ++ val32 = rtw_read32(padapter,offset); ++ DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); ++ } ++} ++ ++ ++static void _InitPABias(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 pa_setting; ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ //FIXED PA current issue ++ //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); ++ pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); ++ ++ if(!(pa_setting & BIT0)) ++ { ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406); ++ PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); ++ } ++ ++ if(!(pa_setting & BIT1) && is92C) ++ { ++ PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406); ++ PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406); ++ PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406); ++ PHY_SetRFReg(padapter,RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); ++ } ++ ++ if(!(pa_setting & BIT4)) ++ { ++ pa_setting = rtw_read8(padapter, 0x16); ++ pa_setting &= 0x0F; ++ rtw_write8(padapter, 0x16, pa_setting | 0x90); ++ } ++} ++#ifdef CONFIG_BT_COEXIST ++static void _InitBTCoexist(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 u1Tmp; ++ ++ if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) ++ { ++ ++#if MP_DRIVER != 1 ++ if(pbtpriv->BT_Ant_isolation) ++ { ++ rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0); ++ } ++#endif ++ ++ u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0; ++ u1Tmp = u1Tmp | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | ++ ((pbtpriv->BT_Service==BT_SCO)?0:BIT2); ++ rtw_write8( padapter, 0x4fd, u1Tmp); ++ DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp); ++ ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa); ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040); ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+0xc, 0x40000010); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010); ++ ++ //Config to 1T1R ++ u1Tmp = rtw_read8(padapter,rOFDM0_TRxPathEnable); ++ u1Tmp &= ~(BIT1); ++ rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp); ++ DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp); ++ ++ u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); ++ u1Tmp &= ~(BIT1); ++ rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp); ++ DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp); ++ ++ } ++} ++#endif ++ ++//------------------------------------------------------------------------- ++// ++// LLT R/W/Init function ++// ++//------------------------------------------------------------------------- ++static u8 _LLTWrite( ++ IN PADAPTER Adapter, ++ IN u32 address, ++ IN u32 data ++ ) ++{ ++ u8 status = _SUCCESS; ++ int count = 0; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); ++ ++ rtw_write32(Adapter, REG_LLT_INIT, value); ++ ++ //polling ++ do{ ++ ++ value = rtw_read32(Adapter, REG_LLT_INIT); ++ if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ ++ break; ++ } ++ ++ if(count > POLLING_LLT_THRESHOLD){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address)); ++ status = _FAIL; ++ break; ++ } ++ }while(count++); ++ ++ return status; ++ ++} ++ ++ ++static u8 _LLTRead( ++ IN PADAPTER Adapter, ++ IN u32 address ++ ) ++{ ++ int count = 0; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); ++ ++ rtw_write32(Adapter, REG_LLT_INIT, value); ++ ++ //polling and get value ++ do{ ++ ++ value = rtw_read32(Adapter, REG_LLT_INIT); ++ if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ ++ return (u8)value; ++ } ++ ++ if(count > POLLING_LLT_THRESHOLD){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address)); ++ break; ++ } ++ }while(count++); ++ ++ return 0xFF; ++ ++} ++ ++ ++static u8 InitLLTTable( ++ IN PADAPTER Adapter, ++ IN u32 boundary ++ ) ++{ ++ u8 status = _SUCCESS; ++ u32 i; ++ ++#ifdef CONFIG_IOL_LLT ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) ++ return _FAIL; ++ ++ rtw_IOL_append_LLT_cmd(xmit_frame, boundary); ++ status = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++#endif ++ { ++ for(i = 0 ; i < (boundary - 1) ; i++){ ++ status = _LLTWrite(Adapter, i , i + 1); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ // end of list ++ status = _LLTWrite(Adapter, (boundary - 1), 0xFF); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ ++ // Make the other pages as ring buffer ++ // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. ++ // Otherwise used as local loopback buffer. ++ for(i = boundary ; i < LAST_ENTRY_OF_TX_PKT_BUFFER ; i++){ ++ status = _LLTWrite(Adapter, i, (i + 1)); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ // Let last entry point to the start entry of ring buffer ++ status = _LLTWrite(Adapter, LAST_ENTRY_OF_TX_PKT_BUFFER, boundary); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ return status; ++ ++} ++ ++ ++//--------------------------------------------------------------- ++// ++// MAC init functions ++// ++//--------------------------------------------------------------- ++static VOID ++_SetMacID( ++ IN PADAPTER Adapter, u8* MacID ++ ) ++{ ++ u32 i; ++ for(i=0 ; i< MAC_ADDR_LEN ; i++){ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ rtw_write32(Adapter, REG_MACID1+i, MacID[i]); ++ else ++#endif ++ rtw_write32(Adapter, REG_MACID+i, MacID[i]); ++ } ++} ++ ++static VOID ++_SetBSSID( ++ IN PADAPTER Adapter, u8* BSSID ++ ) ++{ ++ u32 i; ++ for(i=0 ; i< MAC_ADDR_LEN ; i++){ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ rtw_write32(Adapter, REG_BSSID1+i, BSSID[i]); ++ else ++#endif ++ rtw_write32(Adapter, REG_BSSID+i, BSSID[i]); ++ } ++} ++ ++ ++// Shall USB interface init this? ++static VOID ++_InitInterrupt( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ // HISR - turn all on ++ value32 = 0xFFFFFFFF; ++ rtw_write32(Adapter, REG_HISR, value32); ++ ++ // HIMR - turn all on ++ rtw_write32(Adapter, REG_HIMR, value32); ++} ++ ++ ++static VOID ++_InitQueueReservedPage( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ ++ u32 outEPNum = (u32)pHalData->OutEpNumber; ++ u32 numHQ = 0; ++ u32 numLQ = 0; ++ u32 numNQ = 0; ++ u32 numPubQ; ++ u32 value32; ++ u8 value8; ++ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; ++ //u32 txQPageNum, txQPageUnit,txQRemainPage; ++ ++ { //for WMM ++ //RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n")); ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_HQ){ ++ numHQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_HPQ:NORMAL_PAGE_NUM_HPQ; ++ } ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_LQ){ ++ numLQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_LPQ:NORMAL_PAGE_NUM_LPQ; ++ } ++ // NOTE: This step shall be proceed before writting REG_RQPN. ++ if(pHalData->OutEpQueueSel & TX_SELE_NQ){ ++ numNQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_NPQ:NORMAL_PAGE_NUM_NPQ; ++ } ++ value8 = (u8)_NPQ(numNQ); ++ rtw_write8(Adapter, REG_RQPN_NPQ, value8); ++ ++ if (bWiFiConfig) ++ numPubQ = WMM_NORMAL_TX_TOTAL_PAGE_NUMBER - numHQ - numLQ - numNQ; ++ else ++ numPubQ = TX_TOTAL_PAGE_NUMBER - numHQ - numLQ - numNQ; ++ } ++ ++ // TX DMA ++ value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; ++ rtw_write32(Adapter, REG_RQPN, value32); ++} ++ ++static VOID ++_InitTxBufferBoundary( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 txpktbuf_bndy; ++ ++ if(!pregistrypriv->wifi_spec){ ++ txpktbuf_bndy = TX_PAGE_BOUNDARY; ++ } ++ else{//for WMM ++ txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY; ++ } ++ ++ rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); ++#if 1 ++ rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); ++#else ++ txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL); ++ txdmactrl &= ~BCN_HEAD_MASK; ++ txdmactrl |= BCN_HEAD(txpktbuf_bndy); ++ PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl); ++#endif ++} ++ ++static VOID ++_InitPageBoundary( ++ IN PADAPTER Adapter ++ ) ++{ ++ // RX Page Boundary ++ //srand(static_cast(time(NULL)) ); ++ u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF; ++ ++ rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); ++ ++ // TODO: ?? shall we set tx boundary? ++} ++ ++ ++static VOID ++_InitNormalChipRegPriority( ++ IN PADAPTER Adapter, ++ IN u16 beQ, ++ IN u16 bkQ, ++ IN u16 viQ, ++ IN u16 voQ, ++ IN u16 mgtQ, ++ IN u16 hiQ ++ ) ++{ ++ u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); ++ ++ value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | ++ _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | ++ _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); ++ ++ rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); ++} ++ ++static VOID ++_InitNormalChipOneOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ u16 value = 0; ++ switch(pHalData->OutEpQueueSel) ++ { ++ case TX_SELE_HQ: ++ value = QUEUE_HIGH; ++ break; ++ case TX_SELE_LQ: ++ value = QUEUE_LOW; ++ break; ++ case TX_SELE_NQ: ++ value = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ _InitNormalChipRegPriority(Adapter, ++ value, ++ value, ++ value, ++ value, ++ value, ++ value ++ ); ++ ++} ++ ++static VOID ++_InitNormalChipTwoOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; ++ ++ ++ u16 valueHi = 0; ++ u16 valueLow = 0; ++ ++ switch(pHalData->OutEpQueueSel) ++ { ++ case (TX_SELE_HQ | TX_SELE_LQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_NQ | TX_SELE_LQ): ++ valueHi = QUEUE_NORMAL; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_HQ | TX_SELE_NQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ if(!pregistrypriv->wifi_spec ){ ++ beQ = valueLow; ++ bkQ = valueLow; ++ viQ = valueHi; ++ voQ = valueHi; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE ++ beQ = valueLow; ++ bkQ = valueHi; ++ viQ = valueHi; ++ voQ = valueLow; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ ++ _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++ ++} ++ ++static VOID ++_InitNormalChipThreeOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; ++ ++ if(!pregistrypriv->wifi_spec ){// typical setting ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_LOW; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ else{// for WMM ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_NORMAL; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++} ++ ++static VOID ++_InitNormalChipQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(pHalData->OutEpNumber) ++ { ++ case 1: ++ _InitNormalChipOneOutEpPriority(Adapter); ++ break; ++ case 2: ++ _InitNormalChipTwoOutEpPriority(Adapter); ++ break; ++ case 3: ++ _InitNormalChipThreeOutEpPriority(Adapter); ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ ++} ++ ++static VOID ++_InitQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ _InitNormalChipQueuePriority(Adapter); ++} ++ ++static VOID ++_InitHardwareDropIncorrectBulkOut( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); ++ value32 |= DROP_DATA_EN; ++ rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); ++} ++ ++static VOID ++_InitNetworkType( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(Adapter, REG_CR); ++ ++ // TODO: use the other function to set network type ++#if RTL8191C_FPGA_NETWORKTYPE_ADHOC ++ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); ++#else ++ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); ++#endif ++ rtw_write32(Adapter, REG_CR, value32); ++// RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); ++} ++ ++static VOID ++_InitTransferPageSize( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Tx page size is always 128. ++ ++ u8 value8; ++ value8 = _PSRX(PBP_128) | _PSTX(PBP_128); ++ rtw_write8(Adapter, REG_PBP, value8); ++} ++ ++static VOID ++_InitDriverInfoSize( ++ IN PADAPTER Adapter, ++ IN u8 drvInfoSize ++ ) ++{ ++ rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); ++} ++ ++static VOID ++_InitWMACSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ //u4Byte value32; ++ //u16 value16; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; ++ //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; ++ // don't turn on AAP, it will allow all packets to driver ++ pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; ++ ++#if (0 == RTL8192C_RX_PACKET_NO_INCLUDE_CRC) ++ pHalData->ReceiveConfig |= ACRC32; ++#endif ++ ++ // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() ++ rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); ++ ++ // Accept all multicast address ++ rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); ++ rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); ++ ++ ++ // Accept all data frames ++ //value16 = 0xFFFF; ++ //rtw_write16(Adapter, REG_RXFLTMAP2, value16); ++ ++ // 2010.09.08 hpfan ++ // Since ADF is removed from RCR, ps-poll will not be indicate to driver, ++ // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. ++ //value16 = 0x400; ++ //rtw_write16(Adapter, REG_RXFLTMAP1, value16); ++ ++ // Accept all management frames ++ //value16 = 0xFFFF; ++ //rtw_write16(Adapter, REG_RXFLTMAP0, value16); ++ ++ //enable RX_SHIFT bits ++ //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); ++ ++} ++ ++static VOID ++_InitAdaptiveCtrl( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ u32 value32; ++ ++ // Response Rate Set ++ value32 = rtw_read32(Adapter, REG_RRSR); ++ value32 &= ~RATE_BITMAP_ALL; ++ value32 |= RATE_RRSR_CCK_ONLY_1M; ++ rtw_write32(Adapter, REG_RRSR, value32); ++ ++ // CF-END Threshold ++ //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); ++ ++ // SIFS (used in NAV) ++ value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); ++ rtw_write16(Adapter, REG_SPEC_SIFS, value16); ++ ++ // Retry Limit ++ value16 = _LRL(0x30) | _SRL(0x30); ++ rtw_write16(Adapter, REG_RL, value16); ++ ++} ++ ++static VOID ++_InitRateFallback( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Set Data Auto Rate Fallback Retry Count register. ++ rtw_write32(Adapter, REG_DARFRC, 0x00000000); ++ rtw_write32(Adapter, REG_DARFRC+4, 0x10080404); ++ rtw_write32(Adapter, REG_RARFRC, 0x04030201); ++ rtw_write32(Adapter, REG_RARFRC+4, 0x08070605); ++ ++} ++ ++ ++static VOID ++_InitEDCA( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Set Spec SIFS (used in NAV) ++ rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); ++ rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); ++ ++ //REG514:SIFS_CCK_CTX ++ //REG515:SIFS_OFDM_CTX ++ //REG516:SIFS_CCK_TRX ++ //REG517:SIFS_OFDM_TRX ++ ++ // Set SIFS for CCK_CTS and OFDM_CTX ++ rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); ++ ++ // Set SIFS for CCK_TRX and OFDM_TRX ++ rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); ++ ++ // TXOP ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); ++ rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); ++ rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); ++ rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); ++} ++ ++ ++static VOID ++_InitBeaconMaxError( ++ IN PADAPTER Adapter, ++ IN BOOLEAN InfraMode ++ ) ++{ ++#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING ++ rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++#else ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); ++#endif ++} ++ ++ ++#ifdef CONFIG_LED ++static void _InitHWLed(PADAPTER Adapter) ++{ ++ struct led_priv *pledpriv = &(Adapter->ledpriv); ++ ++ if( pledpriv->LedStrategy != HW_LED) ++ return; ++ ++// HW led control ++// to do .... ++//must consider cases of antenna diversity/ commbo card/solo card/mini card ++ ++} ++#endif //CONFIG_LED ++ ++static VOID ++_InitRDGSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ rtw_write8(Adapter,REG_RD_CTRL,0xFF); ++ rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); ++ rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); ++} ++ ++static VOID ++_InitRxSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ rtw_write32(Adapter, REG_MACID, 0x87654321); ++ rtw_write32(Adapter, 0x0700, 0x87654321); ++} ++ ++static VOID ++_InitRetryFunction( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 value8; ++ ++ value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); ++ value8 |= EN_AMPDU_RTY_NEW; ++ rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); ++ ++ // Set ACK timeout ++ rtw_write8(Adapter, REG_ACKTO, 0x40); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: usb_AggSettingTxUpdate() ++ * ++ * Overview: Seperate TX/RX parameters update independent for TP detection and ++ * dynamic TX/RX aggreagtion parameters update. ++ * ++ * Input: PADAPTER ++ * ++ * Output/Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Seperate to smaller function. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++usb_AggSettingTxUpdate( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u32 value32; ++ ++ if(Adapter->registrypriv.wifi_spec) ++ pHalData->UsbTxAggMode = _FALSE; ++ ++ if(pHalData->UsbTxAggMode){ ++ value32 = rtw_read32(Adapter, REG_TDECTRL); ++ value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); ++ value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); ++ ++ rtw_write32(Adapter, REG_TDECTRL, value32); ++ } ++ ++#endif ++} // usb_AggSettingTxUpdate ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: usb_AggSettingRxUpdate() ++ * ++ * Overview: Seperate TX/RX parameters update independent for TP detection and ++ * dynamic TX/RX aggreagtion parameters update. ++ * ++ * Input: PADAPTER ++ * ++ * Output/Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Seperate to smaller function. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++usb_AggSettingRxUpdate( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u8 valueDMA; ++ u8 valueUSB; ++ ++ valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); ++ valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); ++ ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ valueDMA |= RXDMA_AGG_EN; ++ valueUSB &= ~USB_AGG_EN; ++ break; ++ case USB_RX_AGG_USB: ++ valueDMA &= ~RXDMA_AGG_EN; ++ valueUSB |= USB_AGG_EN; ++ break; ++ case USB_RX_AGG_MIX: ++ valueDMA |= RXDMA_AGG_EN; ++ valueUSB |= USB_AGG_EN; ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ valueDMA &= ~RXDMA_AGG_EN; ++ valueUSB &= ~USB_AGG_EN; ++ break; ++ } ++ ++ rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); ++ rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); ++ ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); ++ rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); ++ break; ++ case USB_RX_AGG_USB: ++ rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); ++ rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); ++ break; ++ case USB_RX_AGG_MIX: ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); ++ rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); ++ rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); ++ rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ // TODO: ++ break; ++ } ++ ++ switch(PBP_128) ++ { ++ case PBP_128: ++ pHalData->HwRxPageSize = 128; ++ break; ++ case PBP_64: ++ pHalData->HwRxPageSize = 64; ++ break; ++ case PBP_256: ++ pHalData->HwRxPageSize = 256; ++ break; ++ case PBP_512: ++ pHalData->HwRxPageSize = 512; ++ break; ++ case PBP_1024: ++ pHalData->HwRxPageSize = 1024; ++ break; ++ default: ++ //RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); ++ break; ++ } ++#endif ++} // usb_AggSettingRxUpdate ++ ++static VOID ++InitUsbAggregationSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Tx aggregation setting ++ usb_AggSettingTxUpdate(Adapter); ++ ++ // Rx aggregation setting ++ usb_AggSettingRxUpdate(Adapter); ++ ++ // 201/12/10 MH Add for USB agg mode dynamic switch. ++ pHalData->UsbRxHighSpeedMode = _FALSE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: USB_AggModeSwitch() ++ * ++ * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase ++ * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we ++ * need to monitor the influence of FTP/network share. ++ * For TX mode, we are still ubder investigation. ++ * ++ * Input: PADAPTER ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++USB_AggModeSwitch( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ //pHalData->UsbRxHighSpeedMode = FALSE; ++ // How to measure the RX speed? We assume that when traffic is more than ++ if (pMgntInfo->bRegAggDMEnable == _FALSE) ++ { ++ return; // Inf not support. ++ } ++ ++ ++ if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _TRUE && ++ pHalData->UsbRxHighSpeedMode == _FALSE) ++ { ++ pHalData->UsbRxHighSpeedMode = _TRUE; ++ DBG_8192C("UsbAggModeSwitchCheck to HIGH\n"); ++ } ++ else if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _FALSE && ++ pHalData->UsbRxHighSpeedMode == _TRUE) ++ { ++ pHalData->UsbRxHighSpeedMode = _FALSE; ++ DBG_8192C("UsbAggModeSwitchCheck to LOW\n"); ++ } ++ else ++ { ++ return; ++ } ++ ++ // 2010/12/10 MH Add for USB Aggregation judgement we need to ++ //if( pMgntInfo->LinkDetectInfo.NumRxOkInPeriod > 4000 || ++ // pMgntInfo->LinkDetectInfo.NumTxOkInPeriod > 4000 ) ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ //usb_AggSettingTxUpdate(Adapter); ++#endif ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ if (pHalData->UsbRxHighSpeedMode == _TRUE) ++ { ++ // 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. ++ // USB mode ++ pHalData->UsbRxAggBlockCount = 40; ++ pHalData->UsbRxAggBlockTimeout = 5; ++ // Mix mode ++ pHalData->UsbRxAggPageCount = 72; ++ pHalData->UsbRxAggPageTimeout = 6; ++ } ++ else ++ { ++ // USB mode ++ pHalData->UsbRxAggBlockCount = pMgntInfo->RegUsbRxAggBlockCount; ++ pHalData->UsbRxAggBlockTimeout = pMgntInfo->RegUsbRxAggBlockTimeout; ++ // Mix mode ++ pHalData->UsbRxAggPageCount = pMgntInfo->RegUsbRxAggPageCount; ++ pHalData->UsbRxAggPageTimeout = pMgntInfo->RegUsbRxAggPageTimeout; ++ } ++#endif ++#endif ++} // USB_AggModeSwitch ++ ++static VOID ++_InitOperationMode( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0//gtest ++ PHAL_DATA_8192CUSB pHalData = GetHalData8192CUsb(Adapter); ++ u1Byte regBwOpMode = 0; ++ u4Byte regRATR = 0, regRRSR = 0; ++ ++ ++ //1 This part need to modified according to the rate set we filtered!! ++ // ++ // Set RRSR, RATR, and REG_BWOPMODE registers ++ // ++ switch(Adapter->RegWirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK; ++ regRRSR = RATE_ALL_CCK; ++ break; ++ case WIRELESS_MODE_A: ++ ASSERT(FALSE); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ case WIRELESS_MODE_G: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_AUTO: ++ if (Adapter->bInHctTest) ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ else ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ break; ++ case WIRELESS_MODE_N_24G: ++ // It support CCK rate by default. ++ // CCK rate will be filtered out only when associated AP does not support it. ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_N_5G: ++ ASSERT(FALSE); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G; ++ regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ } ++ ++ // Ziv ???????? ++ //PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR); ++ PlatformEFIOWrite1Byte(Adapter, REG_BWOPMODE, regBwOpMode); ++ ++ // For Min Spacing configuration. ++ switch(pHalData->RF_Type) ++ { ++ case RF_1T2R: ++ case RF_1T1R: ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)"))); ++ Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3); ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n")); ++ Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3); ++ break; ++ } ++ ++ PlatformEFIOWrite1Byte(Adapter, REG_AMPDU_MIN_SPACE, Adapter->MgntInfo.MinSpaceCfg); ++#endif ++} ++ ++ ++ static VOID ++_InitBeaconParameters( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); ++ ++ // TODO: Remove these magic number ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms ++ ++ rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms ++ rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms ++ ++ // Suggested by designer timchen. Change beacon AIFS to the largest number ++ // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 ++ rtw_write16(Adapter, REG_BCNTCFG, 0x660F); ++} ++ ++static VOID ++_InitRFType( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++ return; ++#endif ++ ++ pHalData->rf_chip = RF_6052; ++ ++ if(_FALSE == is92CU){ ++ pHalData->rf_type = RF_1T1R; ++ DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); ++ return; ++ } ++ ++ // TODO: Consider that EEPROM set 92CU to 1T1R later. ++ // Force to overwrite setting according to chip version. Ignore EEPROM setting. ++ //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; ++ MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); ++ ++} ++ ++static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter) ++{ ++#if RTL8192CU_ADHOC_WORKAROUND_SETTING ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); ++ pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); ++ pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); ++ pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); ++#endif ++} ++ ++static VOID ++_BeaconFunctionEnable( ++ IN PADAPTER Adapter, ++ IN BOOLEAN Enable, ++ IN BOOLEAN Linked ++ ) ++{ ++ rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); ++ //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); ++ //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550))); ++ ++ rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); ++} ++ ++ ++// Set CCK and OFDM Block "ON" ++static VOID _BBTurnOnBlock( ++ IN PADAPTER Adapter ++ ) ++{ ++#if (DISABLE_BB_RF) ++ return; ++#endif ++ ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++} ++ ++static VOID _RfPowerSave( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte eRFPath; ++ ++#if (DISABLE_BB_RF) ++ return; ++#endif ++ ++ if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry. ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); ++ MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); ++ // Those action will be discard in MgntActSet_RF_State because off the same state ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); ++ } ++ else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); ++ MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); ++ } ++ else{ ++ pHalData->eRFPowerState = eRfOn; ++ pMgntInfo->RfOffReason = 0; ++ if(Adapter->bInSetPower || Adapter->bResetInProgress) ++ PlatformUsbEnableInPipes(Adapter); ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); ++ } ++#endif ++} ++ ++enum { ++ Antenna_Lfet = 1, ++ Antenna_Right = 2, ++}; ++ ++static VOID ++_InitAntenna_Selection(IN PADAPTER Adapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pHalData->AntDivCfg==0) ++ return; ++ DBG_8192C("==> %s ....\n",__FUNCTION__); ++ ++ if((RF_1T1R == pHalData->rf_type)) ++ { ++ rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23); ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ ++ if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) ++ pHalData->CurAntenna = Antenna_A; ++ else ++ pHalData->CurAntenna = Antenna_B; ++ DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B"); ++ ++} ++ ++ ++} ++// ++// 2010/08/09 MH Add for power down check. ++// ++static BOOLEAN ++HalDetectPwrDownMode( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 tmpvalue; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; ++ ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3, (u32 *)&tmpvalue); ++ ++ // 2010/08/25 MH INF priority > PDN Efuse value. ++ if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) ++ { ++ pHalData->pwrdown = _TRUE; ++ } ++ else ++ { ++ pHalData->pwrdown = _FALSE; ++ } ++ ++ DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); ++ return pHalData->pwrdown; ++ ++} // HalDetectPwrDownMode ++ ++ ++// ++// 2010/08/26 MH Add for selective suspend mode check. ++// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and ++// slim card. ++// ++static VOID ++HalDetectSelectiveSuspendMode( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 tmpvalue; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); ++ ++ // If support HW radio detect, we need to enable WOL ability, otherwise, we ++ // can not use FW to notify host the power state switch. ++ ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); ++ ++ DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); ++ if(tmpvalue & BIT1) ++ { ++ DBG_8192C("Enable\n"); ++ } ++ else ++ { ++ DBG_8192C("Disable\n"); ++ pdvobjpriv->RegUsbSS = _FALSE; ++ } ++ ++ // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. ++ if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) ++ { ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ //if (!pMgntInfo->bRegDongleSS) ++ //{ ++ // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); ++ pdvobjpriv->RegUsbSS = _FALSE; ++ //} ++ } ++} // HalDetectSelectiveSuspendMode ++/*----------------------------------------------------------------------------- ++ * Function: HwSuspendModeEnable92Cu() ++ * ++ * Overview: HW suspend mode switch. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/23/2010 MHC HW suspend mode switch test.. ++ *---------------------------------------------------------------------------*/ ++static VOID ++HwSuspendModeEnable92Cu( ++ IN PADAPTER pAdapter, ++ IN u8 Type ++ ) ++{ ++ //PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); ++ u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); ++ ++ //if (!pDevice->RegUsbSS) ++ { ++ return; ++ } ++ ++ // ++ // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW ++ // to enter suspend mode automatically. Otherwise, it will shut down major power ++ // domain and 8051 will stop. When we try to enter selective suspend mode, we ++ // need to prevent HW to enter D2 mode aumotmatically. Another way, Host will ++ // issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). ++ // We need to enable HW suspend mode when enter S3/S4 or disable. We need ++ // to disable HW suspend mode for IPS/radio_off. ++ // ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type)); ++ if (Type == _FALSE) ++ { ++ reg |= BIT14; ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ reg |= BIT12; ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ } ++ else ++ { ++ reg &= (~BIT12); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ reg &= (~BIT14); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ } ++ ++} // HwSuspendModeEnable92Cu ++rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 val8; ++ rt_rf_power_state rfpowerstate = rf_off; ++ ++ if(pAdapter->pwrctrlpriv.bHWPowerdown) ++ { ++ val8 = rtw_read8(pAdapter, REG_HSISR); ++ DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); ++ rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; ++ } ++ else // rf on/off ++ { ++ rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); ++ val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); ++ DBG_8192C("GPIO_IN=%02x\n", val8); ++ rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; ++ } ++ return rfpowerstate; ++} // HalDetectPwrDownMode ++ ++void _ps_open_RF(_adapter *padapter); ++ ++ ++u32 rtl8192cu_hal_init(PADAPTER Adapter) ++{ ++ u8 val8 = 0; ++ u32 boundary, status = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u8 is92C = IS_92C_SERIAL(pHalData->VersionID); ++ rt_rf_power_state eRfPowerStateToSet; ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ u32 init_start_time = rtw_get_current_time(); ++ ++ ++#ifdef DBG_HAL_INIT_PROFILING ++ ++ enum HAL_INIT_STAGES { ++ HAL_INIT_STAGES_BEGIN = 0, ++ HAL_INIT_STAGES_INIT_PW_ON, ++ HAL_INIT_STAGES_MISC01, ++ HAL_INIT_STAGES_DOWNLOAD_FW, ++ HAL_INIT_STAGES_INIT_LLTT, ++ HAL_INIT_STAGES_MAC, ++ HAL_INIT_STAGES_MISC02, ++ HAL_INIT_STAGES_BB, ++ HAL_INIT_STAGES_RF, ++ HAL_INIT_STAGES_TURN_ON_BLOCK, ++ HAL_INIT_STAGES_INIT_SECURITY, ++ HAL_INIT_STAGES_MISC11, ++ //HAL_INIT_STAGES_RF_PS, ++ HAL_INIT_STAGES_IQK, ++ HAL_INIT_STAGES_PW_TRACK, ++ HAL_INIT_STAGES_LCK, ++ HAL_INIT_STAGES_MISC21, ++ HAL_INIT_STAGES_INIT_PABIAS, ++ HAL_INIT_STAGES_BT_COEXIST, ++ //HAL_INIT_STAGES_ANTENNA_SEL, ++ HAL_INIT_STAGES_INIT_HAL_DM, ++ HAL_INIT_STAGES_MISC31, ++ HAL_INIT_STAGES_END, ++ HAL_INIT_STAGES_NUM ++ }; ++ ++ char * hal_init_stages_str[] = { ++ "HAL_INIT_STAGES_BEGIN", ++ "HAL_INIT_STAGES_INIT_PW_ON", ++ "HAL_INIT_STAGES_MISC01", ++ "HAL_INIT_STAGES_DOWNLOAD_FW", ++ "HAL_INIT_STAGES_INIT_LLTT", ++ "HAL_INIT_STAGES_MAC", ++ "HAL_INIT_STAGES_MISC02", ++ "HAL_INIT_STAGES_BB", ++ "HAL_INIT_STAGES_RF", ++ "HAL_INIT_STAGES_TURN_ON_BLOCK", ++ "HAL_INIT_STAGES_INIT_SECURITY", ++ "HAL_INIT_STAGES_MISC11", ++ //"HAL_INIT_STAGES_RF_PS", ++ "HAL_INIT_STAGES_IQK", ++ "HAL_INIT_STAGES_PW_TRACK", ++ "HAL_INIT_STAGES_LCK", ++ "HAL_INIT_STAGES_MISC21", ++ "HAL_INIT_STAGES_INIT_PABIAS", ++ "HAL_INIT_STAGES_BT_COEXIST", ++ //"HAL_INIT_STAGES_ANTENNA_SEL", ++ "HAL_INIT_STAGES_INIT_HAL_DM", ++ "HAL_INIT_STAGES_MISC31", ++ "HAL_INIT_STAGES_END", ++ }; ++ ++ int hal_init_profiling_i; ++ u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_ipwrctrlpriv.bkeepfwalive) ++ { ++ _ps_open_RF(Adapter); ++ ++ if(pHalData->bIQKInitialized ){ ++ rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); ++ } ++ else{ ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ pHalData->bIQKInitialized = _TRUE; ++ } ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ ++ goto exit; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); ++ status = _InitPowerOn(Adapter); ++ if(status == _FAIL){ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); ++ goto exit; ++ } ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); ++ _InitQueueReservedPage(Adapter); ++ _InitTxBufferBoundary(Adapter); ++ _InitQueuePriority(Adapter); ++ _InitPageBoundary(Adapter); ++ _InitTransferPageSize(Adapter); ++ ++ ++#if ENABLE_USB_DROP_INCORRECT_OUT ++ _InitHardwareDropIncorrectBulkOut(Adapter); ++#endif ++ ++ if(pHalData->bRDGEnable){ ++ _InitRDGSetting(Adapter); ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); ++#if (1 == MP_DRIVER) ++ _InitRxSetting(Adapter); ++ // Don't Download Firmware ++ Adapter->bFWReady = _FALSE; ++#elif RTL8192CU_FW_DOWNLOAD_ENABLE ++ status = FirmwareDownload92C(Adapter,_FALSE); ++ if(status != _SUCCESS) ++ { ++ Adapter->bFWReady = _FALSE; ++ pHalData->fw_ractrl = _FALSE; ++ DBG_8192C("fw download fail!\n"); ++ goto exit; ++ } ++ else ++ { ++ Adapter->bFWReady = _TRUE; ++ pHalData->fw_ractrl = _TRUE; ++ DBG_8192C("fw download ok!\n"); ++ } ++#endif ++ ++ InitializeFirmwareVars92C(Adapter); ++ ++ if(pwrctrlpriv->reg_rfoff == _TRUE){ ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ } ++ ++ // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting ++ // HW GPIO pin. Before PHY_RFConfig8192C. ++ //HalDetectPwrDownMode(Adapter); ++ // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. ++ //HalDetectSelectiveSuspendMode(Adapter); ++ ++ // Set RF type for BB/RF configuration ++ _InitRFType(Adapter);//->_ReadRFType() ++ ++ // Save target channel ++ // Current Channel will be updated again later. ++ pHalData->CurrentChannel = 6;//default set to 6 ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); ++ if(!pregistrypriv->wifi_spec){ ++ boundary = TX_PAGE_BOUNDARY; ++ } ++ else{// for WMM ++ boundary = WMM_NORMAL_TX_PAGE_BOUNDARY; ++ } ++ status = InitLLTTable(Adapter, boundary); ++ if(status == _FAIL){ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); ++ goto exit; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); ++#if (HAL_MAC_ENABLE == 1) ++ status = PHY_MACConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); ++ // Get Rx PHY status in order to report RSSI and others. ++ _InitDriverInfoSize(Adapter, DRVINFO_SZ); ++ ++ _InitInterrupt(Adapter); ++ hal_init_macaddr(Adapter);//set mac_address ++ _InitNetworkType(Adapter);//set msr ++ _InitWMACSetting(Adapter); ++ _InitAdaptiveCtrl(Adapter); ++ _InitEDCA(Adapter); ++ _InitRateFallback(Adapter); ++ _InitRetryFunction(Adapter); ++ InitUsbAggregationSetting(Adapter); ++ _InitOperationMode(Adapter);//todo ++ _InitBeaconParameters(Adapter); ++ _InitBeaconMaxError(Adapter, _TRUE); ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) ++ ++#ifdef CONFIG_CHECK_AC_LIFETIME ++ // Enable lifetime check for the four ACs ++ rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F); ++#endif // CONFIG_CHECK_AC_LIFETIME ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++ rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++#else // CONFIG_TX_MCAST2UNI ++ rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s ++ rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s ++#endif // CONFIG_TX_MCAST2UNI ++#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI ++ ++ ++#ifdef CONFIG_LED ++ _InitHWLed(Adapter); ++#endif //CONFIG_LED ++ ++ // ++ //d. Initialize BB related configurations. ++ // ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); ++#if (HAL_BB_ENABLE == 1) ++ status = PHY_BBConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++#endif ++ ++ // 92CU use 3-wire to r/w RF ++ //pHalData->Rf_Mode = RF_OP_By_SW_3wire; ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); ++#if (HAL_RF_ENABLE == 1) ++ status = PHY_RFConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++ ++ if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_RX_G1, bMaskDWord, 0x30255); ++ PHY_SetRFReg(Adapter, RF_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00); ++ } ++#endif ++ ++ // ++ // Joseph Note: Keep RfRegChnlVal for later use. ++ // ++ pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); ++ pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); ++ _BBTurnOnBlock(Adapter); ++ //NicIFSetMacAddress(padapter, padapter->PermanentAddress); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); ++ invalidate_cam_all(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); ++ // 2010/12/17 MH We need to set TX power according to EFUSE content at first. ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ ++// Move by Neo for USB SS to below setp ++//_RfPowerSave(Adapter); ++ ++ if (!IS_92C_SERIAL( pHalData->VersionID) && (pHalData->AntDivCfg!=0)) ++ { //for 88CU ,1T1R ++ _InitAntenna_Selection(Adapter); ++ } ++ ++ ++ // ++ // Disable BAR, suggested by Scott ++ // 2010.04.09 add by hpfan ++ // ++ rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); ++ ++ // HW SEQ CTRL ++ //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. ++ rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); ++ ++ if(pregistrypriv->wifi_spec) ++ rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); ++ ++ //Nav limit , suggest by scott ++ rtw_write8(Adapter, 0x652, 0x0); ++ ++#if (MP_DRIVER == 1) ++ Adapter->mppriv.channel = pHalData->CurrentChannel; ++ MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); ++#else ++ // ++ // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status ++ // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not ++ // call init_adapter. May cause some problem?? ++ // ++ // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed ++ // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState ++ // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. ++ // Added by tynli. 2010.03.30. ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ ++#if 0 //to do ++ RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); ++#if 1 //Todo ++ // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. ++ // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. ++ ++ eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter); ++ pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; ++ pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0; ++ ++ if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW) ++ pwrctrlpriv->b_hw_radio_off = _TRUE; ++ ++ DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet); ++ ++ if(pwrctrlpriv->reg_rfoff == _TRUE) ++ { // User disable RF via registry. ++ DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n"); ++ //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE); ++ ++ // Those action will be discard in MgntActSet_RF_State because off the same state ++ //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ //PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); ++ } ++ else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS) ++ { // H/W or S/W RF OFF before sleep. ++ DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason); ++ //pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ //MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ else ++ { ++ // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. ++ if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/) ++ { ++ DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet); ++ if (eRfPowerStateToSet == rf_off) ++ { ++ //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE); ++ pwrctrlpriv->b_hw_radio_off = _TRUE; ++ } ++ else ++ { ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ pwrctrlpriv->b_hw_radio_off = _FALSE; ++ //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ } ++ else ++ { ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ ++ pwrctrlpriv->rfoff_reason = 0; ++ pwrctrlpriv->b_hw_radio_off = _FALSE; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ rtw_led_control(Adapter, LED_CTL_POWER_ON); ++ ++ } ++ ++ // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. ++ // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. ++ if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) ++ { ++ // Enable register area 0x0-0xc. ++ rtw_write8(Adapter, REG_RSV_CTRL, 0x0); ++ ++ // ++ // We should configure HW PDn source for WiFi ONLY, and then ++ // our HW will be set in power-down mode if PDn source from all functions are configured. ++ // 2010.10.06. ++ // ++ //if(IS_HARDWARE_TYPE_8723AU(Adapter)) ++ //{ ++ // u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL); ++ // rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN)); ++ //} ++ //else ++ //{ ++ rtw_write16(Adapter, REG_APS_FSMCO, 0x8812); ++ //} ++ } ++ //DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD. ++#endif ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); ++ // 2010/08/26 MH Merge from 8192CE. ++ if(pwrctrlpriv->rf_pwrstate == rf_on) ++ { ++ if(pHalData->bIQKInitialized ){ ++ rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); ++ } ++ else ++ { ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ pHalData->bIQKInitialized = _TRUE; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ } ++#endif /* #if (MP_DRIVER == 1) */ ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); ++#if RTL8192CU_ADHOC_WORKAROUND_SETTING ++ _InitAdhocWorkaroundParams(Adapter); ++#endif ++ ++ ++#ifdef USB_INTERFERENCE_ISSUE ++ //fixed USB interface interference issue ++ rtw_write8(Adapter, 0xfe40, 0xe0); ++ rtw_write8(Adapter, 0xfe41, 0x8d); ++ rtw_write8(Adapter, 0xfe42, 0x80); ++ rtw_write32(Adapter,0x20c,0xfd0320); ++#if 1 ++ //2011/01/07 ,suggest by Johnny,for solved the problem that too many protocol error on USB bus ++ if(!IS_VENDOR_UMC_A_CUT(pHalData->VersionID) )//&& !IS_92C_SERIAL(pHalData->VersionID))// TSMC , 8188 ++ { ++ // 0xE6=0x94 ++ rtw_write8(Adapter, 0xFE40, 0xE6); ++ rtw_write8(Adapter, 0xFE41, 0x94); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE0=0x19 ++ rtw_write8(Adapter, 0xFE40, 0xE0); ++ rtw_write8(Adapter, 0xFE41, 0x19); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE5=0x91 ++ rtw_write8(Adapter, 0xFE40, 0xE5); ++ rtw_write8(Adapter, 0xFE41, 0x91); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE2=0x81 ++ rtw_write8(Adapter, 0xFE40, 0xE2); ++ rtw_write8(Adapter, 0xFE41, 0x81); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ } ++ ++#endif ++#endif //USB_INTERFERENCE_ISSUE ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); ++ _InitPABias(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); ++#ifdef CONFIG_BT_COEXIST ++ _InitBTCoexist(Adapter); ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); ++ rtl8192c_InitHalDm(Adapter); ++ ++ // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter ++ // suspend mode automatically. ++ //HwSuspendModeEnable92Cu(Adapter, _FALSE); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); ++ rtw_write8(Adapter, 0x15, 0xe9);//suggest by Johnny for lower temperature ++ ++ rtw_write8(Adapter, 0xc87, 0x50);//suggest by Jackson for CCA ++ ++ //_dbg_dump_macreg(padapter); ++ ++ rtw_write16(Adapter, REG_BCN_CTRL, 0x1818); // For 2 PORT TSF SYNC ++ ++ ++ ++#ifdef CONFIG_XMIT_ACK ++ //ack for xmit mgmt frames. ++ rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); ++#endif //CONFIG_XMIT_ACK ++ ++exit: ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); ++ ++ DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); ++ ++ #ifdef DBG_HAL_INIT_PROFILING ++ hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_irf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); ++ else ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); ++ ++ //AFE ++ //DbgPrint("0x0e70 = %x\n", Adapter->PS_BBRegBackup[PSBBREG_AFE0]); ++ //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,Adapter->PS_BBRegBackup[PSBBREG_AFE0] ); ++ //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,0x631B25A0 ); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); ++ ++ // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. ++ // We can only prvide a usual value instead and then HW will modify the value by itself. ++ PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95); ++ } ++ } ++ else // Level 2 or others. ++ { ++ //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x81); ++ ++ // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x800F); ++ rtw_mdelay_os(1); ++ ++ // 1. Enable MAC Clock. Can not be enabled now. ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3)); ++ ++ // 2. Force PWM, Enable SPS18_LDO_Marco_Block ++ rtw_write8(Adapter, REG_SPS0_CTRL, ++ rtw_read8(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3)); ++ ++ // 3. restore BB, AFE control register. ++ //RF ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); ++ else ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); ++ ++ //AFE ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); ++ ++ // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. ++ // We can only prvide a usual value instead and then HW will modify the value by itself. ++ PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0x32D95); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0x32D95); ++ } ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ //PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)|(BIT3)); ++ ++ { ++ //u8 eRFPath = RF_PATH_A,value8 = 0, retry = 0; ++ u8 bytetmp; ++ //PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ // 2010/08/12 MH Add for B path under SS test. ++ //if (pHalData->RF_Type == RF_2T2R) ++ //PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0); ++ ++ bytetmp = rtw_read8(Adapter, REG_APSD_CTRL); ++ rtw_write8(Adapter, REG_APSD_CTRL, bytetmp & ~BIT6); ++ ++ rtw_mdelay_os(10); ++ ++ // Set BB reset at first ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, 0x17 );//0x16 ++ //undo clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)&(~BIT31)); ++ // Enable TX ++ rtw_write8(Adapter, REG_TXPAUSE, 0x0); ++ } ++ //Adapter->HalFunc.InitializeAdapterHandler(Adapter, Adapter->MgntInfo.dot11CurrentChannelNumber); ++ //CardSelectiveSuspendLeave(Adapter); ++ } ++ ++ break; ++ ++ case rf_sleep: ++ case rf_off: ++ value8 = rtw_read8(Adapter, REG_SPS0_CTRL) ; ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ value8 &= ~(BIT0); ++ else ++ value8 &= ~(BIT0|BIT3); ++ if (bRegSSPwrLvl == 1) ++ { ++ //RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL1\n")); ++ // Disable RF and BB only for SelectSuspend. ++ ++ // 1. Set BB/RF to shutdown. ++ // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving ++ // (2)Reg878[21:19]= 0 //Turn off RF-B ++ // (3) RegC04[7:4]= 0 // turn off all paths for packet detection ++ // (4) Reg800[1] = 1 // enable preamble power saving ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); ++ } ++ else if (pHalData->rf_type == RF_1T1R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); ++ } ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); ++ ++ // 2 .AFE control register to power down. bit[30:22] ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); ++ ++ // 3. issue 3-wire command that RF set to power down. ++ PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0); ++ } ++ ++ // 4. Force PFM , disable SPS18_LDO_Marco_Block ++ rtw_write8(Adapter, REG_SPS0_CTRL, value8); ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ } ++ else // Level 2 or others. ++ { ++ //RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL2\n")); ++ { ++ u8 eRFPath = RF_PATH_A,value8 = 0; ++ rtw_write8(Adapter, REG_TXPAUSE, 0xFF); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ // 2010/08/12 MH Add for B path under SS test. ++ //if (pHalData->RF_Type == RF_2T2R) ++ //PHY_SetRFReg(Adapter, RF_PATH_B, 0x0, bMaskByte0, 0x0); ++ ++ value8 |= APSDOFF; ++ rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40 ++ ++ // After switch APSD, we need to delay for stability ++ rtw_mdelay_os(10); ++ //before BB reset should do clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31)); ++ // Set BB reset at first ++ value8 = 0 ; ++ value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 ++ } ++ ++ // Disable RF and BB only for SelectSuspend. ++ ++ // 1. Set BB/RF to shutdown. ++ // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving ++ // (2)Reg878[21:19]= 0 //Turn off RF-B ++ // (3) RegC04[7:4]= 0 // turn off all paths for packet detection ++ // (4) Reg800[1] = 1 // enable preamble power saving ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); ++ } ++ else if (pHalData->rf_type == RF_1T1R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); ++ } ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); ++ ++ // 2 .AFE control register to power down. bit[30:22] ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); ++ ++ // 3. issue 3-wire command that RF set to power down. ++ PHY_SetRFReg(Adapter,RF_PATH_A, 0, bRFRegOffsetMask,0); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF_PATH_B, 0, bRFRegOffsetMask,0); ++ } ++ ++ // 4. Force PFM , disable SPS18_LDO_Marco_Block ++ rtw_write8(Adapter, REG_SPS0_CTRL, value8); ++ ++ // 2010/10/13 MH/Isaachsu exchange sequence. ++ //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80); ++ rtw_mdelay_os(1); ++ ++ // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0xA80F); ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ //PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)& ~(BIT3)) ++ ++ //CardSelectiveSuspendEnter(Adapter); ++ } ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++} // phy_PowerSwitch92CU ++ ++void _ps_open_RF(_adapter *padapter) { ++ //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified ++ phy_SsPwrSwitch92CU(padapter, rf_on, 1); ++} ++ ++void _ps_close_RF(_adapter *padapter){ ++ //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified ++ phy_SsPwrSwitch92CU(padapter, rf_off, 1); ++} ++#endif //SYNC_SD7_20110802_phy_SsPwrSwitch92CU ++ ++ ++ ++static VOID ++_DisableGPIO( ++ IN PADAPTER Adapter ++ ) ++{ ++/*************************************** ++j. GPIO_PIN_CTRL 0x44[31:0]=0x000 // ++k. Value = GPIO_PIN_CTRL[7:0] ++l. GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level ++m. GPIO_MUXCFG 0x42 [15:0] = 0x0780 ++n. LEDCFG 0x4C[15:0] = 0x8080 ++***************************************/ ++ u8 value8; ++ u16 value16; ++ u32 value32; ++ ++ //1. Disable GPIO[7:0] ++ rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000); ++ value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF; ++ value8 = (u8) (value32&0x000000FF); ++ value32 |= ((value8<<8) | 0x00FF0000); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32); ++ ++ //2. Disable GPIO[10:8] ++ rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00); ++ value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F; ++ value8 = (u8) (value16&0x000F); ++ value16 |= ((value8<<4) | 0x0780); ++ rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16); ++ ++ //3. Disable LED0 & 1 ++ rtw_write16(Adapter, REG_LEDCFG0, 0x8080); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n")); ++ ++} //end of _DisableGPIO() ++ ++static VOID ++_ResetFWDownloadRegister( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(Adapter, REG_MCUFWDL); ++ value32 &= ~(MCUFWDL_EN | MCUFWDL_RDY); ++ rtw_write32(Adapter, REG_MCUFWDL, value32); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n")); ++} ++ ++ ++static int ++_DisableRF_AFE( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ u32 pollingCount = 0; ++ u8 value8; ++ ++ //disable RF/ AFE AD/DA ++ value8 = APSDOFF; ++ rtw_write8(Adapter, REG_APSD_CTRL, value8); ++ ++ ++#if (RTL8192CU_ASIC_VERIFICATION) ++ ++ do ++ { ++ if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++#endif ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n")); ++ return rtStatus; ++ ++} ++ ++static VOID ++_ResetBB( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ ++ //before BB reset should do clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31)); ++ //reset BB ++ value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n")); ++} ++ ++static VOID ++_ResetMCU( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ ++ // reset MCU ++ value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ value16 &= ~FEN_CPUEN; ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n")); ++} ++ ++static VOID ++_DisableMAC_AFE_PLL( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ //disable MAC/ AFE PLL ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ value32 |= APDM_MAC; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++ value32 |= APFM_OFF; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n")); ++} ++ ++static VOID ++_AutoPowerDownToHostOff( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ rtw_write8(Adapter, REG_SPS0_CTRL, 0x22); ++ ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ ++ value32 |= APDM_HOST;//card disable ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n")); ++ ++ // set USB suspend ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ value32 &= ~AFSM_PCIE; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++} ++ ++static VOID ++_SetUsbSuspend( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ ++ // set USB suspend ++ value32 |= AFSM_HSUS; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++ //RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),("")); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n")); ++ ++} ++ ++static VOID ++_DisableRFAFEAndResetBB( ++ IN PADAPTER Adapter ++ ) ++{ ++/************************************** ++a. TXPAUSE 0x522[7:0] = 0xFF //Pause MAC TX queue ++b. RF path 0 offset 0x00 = 0x00 // disable RF ++c. APSD_CTRL 0x600[7:0] = 0x40 ++d. SYS_FUNC_EN 0x02[7:0] = 0x16 //reset BB state machine ++e. SYS_FUNC_EN 0x02[7:0] = 0x14 //reset BB state machine ++***************************************/ ++ u8 eRFPath = 0,value8 = 0; ++ rtw_write8(Adapter, REG_TXPAUSE, 0xFF); ++ PHY_SetRFReg(Adapter, (RF_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ ++ value8 |= APSDOFF; ++ rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40 ++ //before BB reset should do clock gated ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|(BIT31)); ++ value8 = 0 ; ++ value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 ++ ++ value8 &=( ~FEN_BB_GLB_RSTn ); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14 ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); ++} ++ ++static VOID ++_ResetDigitalProcedure1( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bWithoutHWSM ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pHalData->FirmwareVersion <= 0x20){ ++ #if 0 ++ /***************************** ++ f. SYS_FUNC_EN 0x03[7:0]=0x54 // reset MAC register, DCORE ++ g. MCUFWDL 0x80[7:0]=0 // reset MCU ready status ++ ******************************/ ++ u4Byte value32 = 0; ++ PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54); ++ PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0); ++ #else ++ /***************************** ++ f. MCUFWDL 0x80[7:0]=0 // reset MCU ready status ++ g. SYS_FUNC_EN 0x02[10]= 0 // reset MCU register, (8051 reset) ++ h. SYS_FUNC_EN 0x02[15-12]= 5 // reset MAC register, DCORE ++ i. SYS_FUNC_EN 0x02[10]= 1 // enable MCU register, (8051 enable) ++ ******************************/ ++ u16 valu16 = 0; ++ rtw_write8(Adapter, REG_MCUFWDL, 0); ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051 ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF; ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC ++ ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051 ++ ++ ++ #endif ++ } ++ else{ ++ u8 retry_cnts = 0; ++ ++ if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1) ++ { //IF fw in RAM code, do reset ++ ++ rtw_write8(Adapter, REG_MCUFWDL, 0); ++ if(Adapter->bFWReady){ ++ // 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other ++ // HRCV INT to influence 8051 reset. ++ rtw_write8(Adapter, REG_FWIMR, 0x20); ++ ++ rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self ++ ++ while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN))) ++ { ++ rtw_udelay_os(50);//PlatformStallExecution(50);//us ++ } ++ ++ if(retry_cnts >= 100){ ++ DBG_8192C("%s #####=> 8051 reset failed!.........................\n", __FUNCTION__); ++ // if 8051 reset fail we trigger GPIO 0 for LA ++ //PlatformEFIOWrite4Byte( Adapter, ++ // REG_GPIO_PIN_CTRL, ++ // 0x00010100); ++ // 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly. ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50); //Reset MAC and Enable 8051 ++ rtw_mdelay_os(10); ++ } ++ else { ++ //DBG_871X("%s =====> 8051 reset success (%d) .\n", __FUNCTION__, retry_cnts); ++ } ++ } ++ else { ++ DBG_871X("%s =====> 8051 in RAM but !Adapter->bFWReady\n", __FUNCTION__); ++ } ++ } ++ else{ ++ //DBG_871X("%s =====> 8051 in ROM.\n", __FUNCTION__); ++ } ++ ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54); //Reset MAC and Enable 8051 ++ } ++ ++ // Clear rpwm value for initial toggle bit trigger. ++ rtw_write8(Adapter, REG_USB_HRPWM, 0x00); ++ ++ if(bWithoutHWSM){ ++ /***************************** ++ Without HW auto state machine ++ g. SYS_CLKR 0x08[15:0] = 0x30A3 //disable MAC clock ++ h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 // isolated digital to PON ++ ******************************/ ++ //rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3); ++ rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott. ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80); ++ rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F); ++ rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9); ++ } ++ else ++ { ++ // Disable all RF/BB power ++ rtw_write8(Adapter, REG_RF_CTRL, 0x00); ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n")); ++ ++} ++ ++static VOID ++_ResetDigitalProcedure2( ++ IN PADAPTER Adapter ++) ++{ ++/***************************** ++k. SYS_FUNC_EN 0x03[7:0] = 0x44 // disable ELDR runction ++l. SYS_CLKR 0x08[15:0] = 0x3083 // disable ELDR clock ++m. SYS_ISO_CTRL 0x01[7:0] = 0x83 // isolated ELDR to PON ++******************************/ ++ //rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott. ++ //rtw_write16(Adapter, REG_SYS_CLKR, 0x3083); ++ //rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83); ++ ++ rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. ++ rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott. ++} ++ ++static VOID ++_DisableAnalog( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bWithoutHWSM ++ ) ++{ ++ u16 value16 = 0; ++ u8 value8=0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(bWithoutHWSM){ ++ /***************************** ++ n. LDOA15_CTRL 0x20[7:0] = 0x04 // disable A15 power ++ o. LDOV12D_CTRL 0x21[7:0] = 0x54 // disable digital core power ++ r. When driver call disable, the ASIC will turn off remaining clock automatically ++ ******************************/ ++ ++ rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04); ++ //PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54); ++ ++ value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL); ++ value8 &= (~LDV12_EN); ++ rtw_write8(Adapter, REG_LDOV12D_CTRL, value8); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); ++ } ++ ++/***************************** ++h. SPS0_CTRL 0x11[7:0] = 0x23 //enter PFM mode ++i. APS_FSMCO 0x04[15:0] = 0x4802 // set USB suspend ++******************************/ ++ ++ ++ value8 = 0x23; ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ value8 |= BIT3; ++ ++ rtw_write8(Adapter, REG_SPS0_CTRL, value8); ++ ++ ++ if(bWithoutHWSM) ++ { ++ //value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN); ++ // 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically. ++ // Becasue suspend operatione need the asistance of 8051 to wait for 3ms. ++ value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); ++ } ++ else ++ { ++ value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); ++ } ++ ++ rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 ++ ++ rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); ++ ++ #if 0 ++ //tynli_test for suspend mode. ++ if(!bWithoutHWSM){ ++ rtw_write8(Adapter, 0xfe10, 0x19); ++ } ++#endif ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16)); ++} ++ ++static int ++CardDisableHWSM( // HW Auto state machine ++ IN PADAPTER Adapter, ++ IN BOOLEAN resetMCU ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ if(Adapter->bSurpriseRemoved){ ++ return rtStatus; ++ } ++#if 1 ++ //==== RF Off Sequence ==== ++ _DisableRFAFEAndResetBB(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure1(Adapter, _FALSE); ++ ++ // ==== Pull GPIO PIN to balance level and LED control ====== ++ _DisableGPIO(Adapter); ++ ++ // ==== Disable analog sequence === ++ _DisableAnalog(Adapter, _FALSE); ++ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n")); ++#else ++ _DisableGPIO(Adapter); ++ ++ //reset FW download register ++ _ResetFWDownloadRegister(Adapter); ++ ++ ++ //disable RF/ AFE AD/DA ++ rtStatus = _DisableRF_AFE(Adapter); ++ if(RT_STATUS_SUCCESS != rtStatus){ ++ RT_TRACE(COMP_INIT, DBG_SERIOUS, ("_DisableRF_AFE failed!\n")); ++ goto Exit; ++ } ++ _ResetBB(Adapter); ++ ++ if(resetMCU){ ++ _ResetMCU(Adapter); ++ } ++ ++ _AutoPowerDownToHostOff(Adapter); ++ //_DisableMAC_AFE_PLL(Adapter); ++ ++ _SetUsbSuspend(Adapter); ++Exit: ++#endif ++ return rtStatus; ++ ++} ++ ++static int ++CardDisableWithoutHWSM( // without HW Auto state machine ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ ++ if(Adapter->bSurpriseRemoved){ ++ return rtStatus; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n")); ++ //==== RF Off Sequence ==== ++ _DisableRFAFEAndResetBB(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure1(Adapter, _TRUE); ++ ++ // ==== Pull GPIO PIN to balance level and LED control ====== ++ _DisableGPIO(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure2(Adapter); ++ ++ // ==== Disable analog sequence === ++ _DisableAnalog(Adapter, _TRUE); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n")); ++ return rtStatus; ++} ++ ++static void rtl8192cu_hw_power_down(_adapter *padapter) ++{ ++ // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. ++ // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. ++ ++ // Enable register area 0x0-0xc. ++ rtw_write8(padapter,REG_RSV_CTRL, 0x0); ++ rtw_write16(padapter, REG_APS_FSMCO, 0x8812); ++} ++ ++u32 rtl8192cu_hal_deinit(PADAPTER Adapter) ++ { ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ DBG_8192C("==> %s \n",__FUNCTION__); ++ // 2011/02/18 To Fix RU LNA power leakage problem. We need to execute below below in ++ // Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all ++ // IC. Accord to johnny's opinion, only RU need the support. ++ if (IS_HARDWARE_TYPE_8192C(Adapter) && (pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|BIT1); ++ ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ DBG_8192C("bkeepfwalive(%x)\n",Adapter->pwrctrlpriv.bkeepfwalive); ++ if(Adapter->pwrctrlpriv.bkeepfwalive) ++ { ++ _ps_close_RF(Adapter); ++ if((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) ++ rtl8192cu_hw_power_down(Adapter); ++ } ++ else ++#endif ++ { ++ if( Adapter->bCardDisableWOHSM == _FALSE) ++ { ++ DBG_8192C("card disble HWSM...........\n"); ++ CardDisableHWSM(Adapter, _FALSE); ++ } ++ else ++ { ++ DBG_8192C("card disble without HWSM...........\n"); ++ CardDisableWithoutHWSM(Adapter); // without HW Auto state machine ++ ++ if((Adapter->pwrctrlpriv.bHWPwrPindetect ) && (Adapter->pwrctrlpriv.bHWPowerdown)) ++ rtl8192cu_hw_power_down(Adapter); ++ } ++ } ++ ++ return _SUCCESS; ++ } ++ ++ ++unsigned int rtl8192cu_inirp_init(PADAPTER Adapter) ++{ ++ u8 i; ++ struct recv_buf *precvbuf; ++ uint status; ++ struct dvobj_priv *pdev = adapter_to_dvobj(Adapter); ++ struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); ++#endif ++ ++_func_enter_; ++ ++ _read_port = pintfhdl->io_ops._read_port; ++ ++ status = _SUCCESS; ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); ++ ++ precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; ++ ++ //issue Rx irp to receive data ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) ++ { ++ RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ precvbuf++; ++ precvpriv->free_recv_buf_queue_cnt--; ++ } ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ _read_interrupt = pintfhdl->io_ops._read_interrupt; ++ if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) ++ { ++ RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); ++ status = _FAIL; ++ } ++#endif ++ ++exit: ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); ++ ++_func_exit_; ++ ++ return status; ++ ++} ++ ++unsigned int rtl8192cu_inirp_deinit(PADAPTER Adapter) ++{ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); ++ ++ rtw_read_port_cancel(Adapter); ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); ++ ++ return _SUCCESS; ++} ++ ++ ++//------------------------------------------------------------------------- ++// ++// EEPROM Power index mapping ++// ++//------------------------------------------------------------------------- ++ ++ static VOID ++_ReadPowerValueFromPROM( ++ IN PTxPowerInfo pwrInfo, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ u32 rfPath, eeAddr, group; ++ ++ _rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo)); ++ ++ if(AutoLoadFail){ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ ++ pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; ++ pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; ++ pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff; ++ pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff; ++ pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff; ++ pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset; ++ pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset; ++ } ++ } ++ ++ pwrInfo->TSSI_A = EEPROM_Default_TSSI; ++ pwrInfo->TSSI_B = EEPROM_Default_TSSI; ++ ++ return; ++ } ++ ++ for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group; ++ pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr]; ++ ++ eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group; ++ pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr]; ++ } ++ } ++ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ ++ pwrInfo->HT40_2SIndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++ ++#if 1 ++ pwrInfo->HT20IndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++ if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number ++ pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0; ++#else ++ pwrInfo->HT20IndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++#endif ++ ++ pwrInfo->OFDMIndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF; ++ ++ pwrInfo->HT40MaxOffset[rfPath][group] = ++ (PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; ++ ++ pwrInfo->HT20MaxOffset[rfPath][group] = ++ (PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; ++ } ++ } ++ ++ pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A]; ++ pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B]; ++ ++} ++ ++ ++static u32 ++_GetChannelGroup( ++ IN u32 channel ++ ) ++{ ++ //RT_ASSERT((channel < 14), ("Channel %d no is supported!\n")); ++ ++ if(channel < 3){ // Channel 1~3 ++ return 0; ++ } ++ else if(channel < 9){ // Channel 4~9 ++ return 1; ++ } ++ ++ return 2; // Channel 10~14 ++} ++ ++ ++static VOID ++ReadTxPowerInfo( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ TxPowerInfo pwrInfo; ++ u32 rfPath, ch, group; ++ u8 pwr, diff; ++ ++ _ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail); ++ ++ if(!AutoLoadFail) ++ pHalData->bTXPowerDataReadFromEEPORM = _TRUE; ++ ++ for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ group = _GetChannelGroup(ch); ++ ++ pHalData->TxPwrLevelCck[rfPath][ch] = pwrInfo.CCKIndex[rfPath][group]; ++ pHalData->TxPwrLevelHT40_1S[rfPath][ch] = pwrInfo.HT40_1SIndex[rfPath][group]; ++ ++ pHalData->TxPwrHt20Diff[rfPath][ch] = pwrInfo.HT20IndexDiff[rfPath][group]; ++ pHalData->TxPwrLegacyHtDiff[rfPath][ch] = pwrInfo.OFDMIndexDiff[rfPath][group]; ++ pHalData->PwrGroupHT20[rfPath][ch] = pwrInfo.HT20MaxOffset[rfPath][group]; ++ pHalData->PwrGroupHT40[rfPath][ch] = pwrInfo.HT40MaxOffset[rfPath][group]; ++ ++ pwr = pwrInfo.HT40_1SIndex[rfPath][group]; ++ diff = pwrInfo.HT40_2SIndexDiff[rfPath][group]; ++ ++ pHalData->TxPwrLevelHT40_2S[rfPath][ch] = (pwr > diff) ? (pwr - diff) : 0; ++ } ++ } ++ ++#if DBG ++ ++ for(rfPath = 0 ; rfPath < RF_PATH_MAX ; rfPath++){ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ++ ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", ++ rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], ++ pHalData->TxPwrLevelHT40_1S[rfPath][ch], ++ pHalData->TxPwrLevelHT40_2S[rfPath][ch])); ++ ++ } ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_A][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_A][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF_PATH_B][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF_PATH_B][ch])); ++ } ++ ++#endif ++ // 2010/10/19 MH Add Regulator recognize for CU. ++ if(!AutoLoadFail) ++ { ++ pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7); //bit0~2 ++ } ++ else ++ { ++ pHalData->EEPROMRegulatory = 0; ++ } ++ DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); ++ ++} ++ ++ ++//------------------------------------------------------------------- ++// ++// EEPROM/EFUSE Content Parsing ++// ++//------------------------------------------------------------------- ++static void ++_ReadIDs( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(_FALSE == AutoloadFail){ ++ // VID, PID ++ pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]); ++ pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]); ++ ++ // Customer ID, 0x00 and 0xff are reserved for Realtek. ++ pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID]; ++ pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID]; ++ ++ } ++ else{ ++ pHalData->EEPROMVID = EEPROM_Default_VID; ++ pHalData->EEPROMPID = EEPROM_Default_PID; ++ ++ // Customer ID, 0x00 and 0xff are reserved for Realtek. ++ pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; ++ pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; ++ ++ } ++ ++ // For customized behavior. ++ if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. ++ pHalData->CustomerID = RT_CID_819x_HP; ++ ++ // Decide CustomerID according to VID/DID or EEPROM ++ switch(pHalData->EEPROMCustomerID) ++ { ++ case EEPROM_CID_DEFAULT: ++ if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ break; ++ case EEPROM_CID_WHQL: ++/* ++ Adapter->bInHctTest = TRUE; ++ ++ pMgntInfo->bSupportTurboMode = FALSE; ++ pMgntInfo->bAutoTurboBy8186 = FALSE; ++ ++ pMgntInfo->PowerSaveControl.bInactivePs = FALSE; ++ pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; ++ pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; ++ ++ pMgntInfo->keepAliveLevel = 0; ++ ++ Adapter->bUnloadDriverwhenS3S4 = FALSE; ++*/ ++ break; ++ default: ++ pHalData->CustomerID = RT_CID_DEFAULT; ++ break; ++ ++ } ++ ++ MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID); ++ MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID); ++ MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID); ++ MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID); ++ ++ MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID); ++ ++} ++ ++ ++static VOID ++_ReadMACAddress( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ ++ if(_FALSE == AutoloadFail){ ++ //Read Permanent MAC address and set value to hardware ++ _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN); ++ } ++ else{ ++ //Random assigh MAC address ++ u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; ++ //sMacAddr[5] = (u8)GetRandomNumber(1, 254); ++ _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); ++ } ++ DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); ++ //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); ++ //RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress); ++ ++} ++ ++static VOID ++_ReadBoardType( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 value32; ++ u8 boardType = BOARD_USB_DONGLE; ++ ++ if(AutoloadFail){ ++ if(IS_8723_SERIES(pHalData->VersionID)) ++ pHalData->rf_type = RF_1T1R; ++ else ++ pHalData->rf_type = RF_2T2R; ++ ++ pHalData->BluetoothCoexist = _FALSE; ++ pHalData->BoardType = boardType; ++ return; ++ } ++ ++ boardType = PROMContent[EEPROM_NORMAL_BoardType]; ++ boardType &= BOARD_TYPE_NORMAL_MASK;//bit[7:5] ++ boardType >>= 5; ++ ++ pHalData->BoardType = boardType; ++ MSG_8192C("_ReadBoardType(%x)\n",pHalData->BoardType); ++ ++ if (boardType == BOARD_USB_High_PA) ++ pHalData->ExternalPA = 1; ++} ++ ++ ++static VOID ++_ReadLEDSetting( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ struct led_priv *pledpriv = &(Adapter->ledpriv); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#ifdef CONFIG_SW_LED ++ pledpriv->bRegUseLed = _TRUE; ++ ++ // ++ // Led mode ++ // ++ switch(pHalData->CustomerID) ++ { ++ case RT_CID_DEFAULT: ++ pledpriv->LedStrategy = SW_LED_MODE1; ++ pledpriv->bRegUseLed = _TRUE; ++ break; ++ ++ case RT_CID_819x_HP: ++ pledpriv->LedStrategy = SW_LED_MODE6; ++ break; ++ ++ default: ++ pledpriv->LedStrategy = SW_LED_MODE1; ++ break; ++ } ++ ++ if( BOARD_MINICARD == pHalData->BoardType ) ++ { ++ pledpriv->LedStrategy = SW_LED_MODE6; ++ } ++ pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++#else // HW LED ++ pledpriv->LedStrategy = HW_LED; ++#endif //CONFIG_SW_LED ++} ++ ++static VOID ++_ReadThermalMeter( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 tempval; ++ ++ // ++ // ThermalMeter from EEPROM ++ // ++ if(!AutoloadFail) ++ tempval = PROMContent[EEPROM_THERMAL_METER]; ++ else ++ tempval = EEPROM_Default_ThermalMeter; ++ ++ pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] ++ ++ if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail) ++ pdmpriv->bAPKThermalMeterIgnore = _TRUE; ++ ++#if 0 ++ if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c) ++ pHalData->EEPROMThermalMeter = 0x12; ++#endif ++ ++ pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter; ++ ++ //RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter)); ++ ++} ++ ++static VOID ++_ReadRFSetting( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++} ++ ++static void ++_ReadPROMVersion( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(AutoloadFail){ ++ pHalData->EEPROMVersion = EEPROM_Default_Version; ++ } ++ else{ ++ pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION]; ++ } ++} ++ ++static VOID ++readAntennaDiversity( ++ IN PADAPTER pAdapter, ++ IN u8 *hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct registry_priv *registry_par = &pAdapter->registrypriv; ++ ++ if(!AutoLoadFail) ++ { ++ // Antenna Diversity setting. ++ if(registry_par->antdiv_cfg == 2) // 2: From Efuse ++ pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3; ++ else ++ pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, ++ ++ DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg); ++ ++ //if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) ++ // pHalData->AntDivCfg = 0; ++ } ++ else ++ { ++ pHalData->AntDivCfg = 0; ++ } ++ ++} ++ ++static VOID ++hal_InitPGData( ++ IN PADAPTER pAdapter, ++ IN OUT u8 *PROMContent ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u32 i; ++ u16 value16; ++ ++ if(_FALSE == pEEPROM->bautoload_fail_flag) ++ { // autoload OK. ++ if (_TRUE == pEEPROM->EepromOrEfuse) ++ { ++ // Read all Content from EEPROM or EFUSE. ++ for(i = 0; i < HWSET_MAX_SIZE; i += 2) ++ { ++ //value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); ++ //*((u16 *)(&PROMContent[i])) = value16; ++ } ++ } ++ else ++ { ++ // Read EFUSE real map to shadow. ++ EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); ++ _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE); ++ } ++ } ++ else ++ {//autoload fail ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); ++ pEEPROM->bautoload_fail_flag = _TRUE; ++ //update to default value 0xFF ++ if (_FALSE == pEEPROM->EepromOrEfuse) ++ EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); ++ } ++} ++// Read HW power down mode selection ++static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8 AutoloadFail) ++{ ++ if(AutoloadFail){ ++ Adapter->pwrctrlpriv.bHWPowerdown = _FALSE; ++ Adapter->pwrctrlpriv.bSupportRemoteWakeup = _FALSE; ++ } ++ else { ++ //if(SUPPORT_HW_RADIO_DETECT(Adapter)) ++ Adapter->pwrctrlpriv.bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect; ++ //else ++ //Adapter->pwrctrlpriv.bHWPwrPindetect = _FALSE;//dongle not support new ++ ++ ++ //hw power down mode selection , 0:rf-off / 1:power down ++ ++ if(Adapter->registrypriv.hwpdn_mode==2) ++ Adapter->pwrctrlpriv.bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4); ++ else ++ Adapter->pwrctrlpriv.bHWPowerdown = Adapter->registrypriv.hwpdn_mode; ++#ifdef CONFIG_WOWLAN ++ // decide hw if support remote wakeup function ++ // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume ++ Adapter->pwrctrlpriv.bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE; ++#endif //CONFIG_WOWLAN ++ ++ //if(SUPPORT_HW_RADIO_DETECT(Adapter)) ++ //Adapter->registrypriv.usbss_enable = Adapter->pwrctrlpriv.bSupportRemoteWakeup ; ++ ++ DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, ++ Adapter->pwrctrlpriv.bHWPwrPindetect,Adapter->pwrctrlpriv.bHWPowerdown ,Adapter->pwrctrlpriv.bSupportRemoteWakeup); ++ ++ DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable); ++ ++ } ++ ++} ++ ++static VOID ++readAdapterInfo_8192CU( ++ IN PADAPTER Adapter ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u8 PROMContent[HWSET_MAX_SIZE]={0}; ++ ++ hal_InitPGData(Adapter, PROMContent); ++ rtl8192c_EfuseParseIDCode(Adapter, PROMContent); ++ ++ _ReadPROMVersion(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadIDs(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadMACAddress(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ReadTxPowerInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadBoardType(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ++#ifdef CONFIG_BT_COEXIST ++ // ++ // Read Bluetooth co-exist and initialize ++ // ++ rtl8192c_ReadBluetoothCoexistInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++#endif ++ ++ rtl8192c_EfuseParseChnlPlan(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadThermalMeter(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadLEDSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ readAntennaDiversity(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ++ //hal_CustomizedBehavior_8723U(Adapter); ++ ++ Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1; ++ DBG_8192C("%s(): REPLACEMENT = %x\n",__FUNCTION__,Adapter->bDongle); ++#ifdef CONFIG_INTEL_PROXIM ++ /* for intel proximity */ ++ if (pHalData->rf_type== RF_1T1R) { ++ Adapter->proximity.proxim_support = _TRUE; ++ } else if (pHalData->rf_type== RF_2T2R) { ++ if ((pHalData->EEPROMPID == 0x8186) && ++ (pHalData->EEPROMVID== 0x0bda)) ++ Adapter->proximity.proxim_support = _TRUE; ++ } else { ++ Adapter->proximity.proxim_support = _FALSE; ++ } ++#endif //CONFIG_INTEL_PROXIM ++} ++ ++static void _ReadPROMContent( ++ IN PADAPTER Adapter ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 PROMContent[HWSET_MAX_SIZE]={0}; ++ u8 eeValue; ++ u32 i; ++ u16 value16; ++ ++ eeValue = rtw_read8(Adapter, REG_9346CR); ++ // To check system boot selection. ++ pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; ++ pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; ++ ++ ++ DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), ++ (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); ++ ++ //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; ++ ++ //if(IS_HARDWARE_TYPE_8723A(Adapter)) ++ // readAdapterInfo_8723U(Adapter); ++ //else ++ readAdapterInfo_8192CU(Adapter); ++} ++ ++ ++static VOID ++_InitOtherVariable( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ //if(Adapter->bInHctTest){ ++ // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; ++ // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; ++ // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; ++ // pMgntInfo->keepAliveLevel = 0; ++ //} ++ ++ // 2009/06/10 MH For 92S 1*1=1R/ 1*2&2*2 use 2R. We default set 1*1 use radio A ++ // So if you want to use radio B. Please modify RF path enable bit for correct signal ++ // strength calculate. ++ if (pHalData->rf_type == RF_1T1R){ ++ pHalData->bRFPathRxEnable[0] = _TRUE; ++ } ++ else{ ++ pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE; ++ } ++ ++} ++ ++static VOID ++_ReadRFType( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++#else ++ pHalData->rf_chip = RF_6052; ++#endif ++} ++ ++void _ReadSilmComboMode(PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pHalData->SlimComboDbg = _FALSE; // Default is not debug mode. ++ ++ // 2010/11/22 MH We need to enter debug mode for TSMA and UMC A cut ++ if ((Adapter->chip_type == RTL8188C_8192C) && ++ (pHalData->BoardType == BOARD_USB_COMBO)) ++ { ++ switch (pHalData->VersionID) ++ { ++ case VERSION_NORMAL_TSMC_CHIP_88C: ++ case VERSION_NORMAL_TSMC_CHIP_92C: ++ case VERSION_NORMAL_TSMC_CHIP_92C_1T2R: ++ case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: ++ if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) ++ pHalData->SlimComboDbg = _TRUE; ++ ++ break; ++ ++ case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: ++ // 2011/02/15 MH UNC-B cut ECO fail, we need to support slim combo debug mode. ++ if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) ++ pHalData->SlimComboDbg = _TRUE; ++ break; ++ ++ default: ++ break; ++ } ++ ++ } ++ ++} ++static int _ReadAdapterInfo8192CU(PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 start=rtw_get_current_time(); ++ ++ MSG_8192C("====> ReadAdapterInfo8192C\n"); ++ ++ //Efuse_InitSomeVar(Adapter); ++ ++ //if(IS_HARDWARE_TYPE_8723A(Adapter)) ++ // _EfuseCellSel(Adapter); ++ ++ _ReadRFType(Adapter);//rf_chip -> _InitRFType() ++ _ReadPROMContent(Adapter); ++ ++ // 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize. ++ _ReadSilmComboMode(Adapter); ++ ++ _InitOtherVariable(Adapter); ++ ++ //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); ++ ++ MSG_8192C("<==== ReadAdapterInfo8192C in %d ms\n", rtw_get_passing_time_ms(start)); ++ ++ return _SUCCESS; ++} ++ ++ ++static void ReadAdapterInfo8192CU(PADAPTER Adapter) ++{ ++ // Read EEPROM size before call any EEPROM function ++ //Adapter->EepromAddressSize=Adapter->HalFunc.GetEEPROMSizeHandler(Adapter); ++ Adapter->EepromAddressSize = GetEEPROMSize8192C(Adapter); ++ ++ _ReadAdapterInfo8192CU(Adapter); ++} ++ ++ ++#define GPIO_DEBUG_PORT_NUM 0 ++static void rtl8192cu_trigger_gpio_0(_adapter *padapter) ++{ ++ ++ u32 gpioctrl; ++ DBG_8192C("==> trigger_gpio_0...\n"); ++ rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0); ++ rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF); ++ gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16); ++ rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); ++ gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8); ++ rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); ++ DBG_8192C("<=== trigger_gpio_0...\n"); ++ ++} ++ ++static void ResumeTxBeacon(_adapter *padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++} ++ ++static void StopTxBeacon(_adapter *padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ ++ //todo: CheckFwRsvdPageContent(Adapter); // 2010.06.23. Added by tynli. ++ ++} ++ ++u16 CRC16(u8 data,u16 CRC) ++{ ++ unsigned char shift_in,CRC_BIT15,DataBit,CRC_BIT11,CRC_BIT4 ; ++ int index; ++ unsigned short CRC_Result; ++ ++ for(index=0;index<8;index++) ++ { ++ CRC_BIT15=((CRC&BIT15) ? 1:0); ++ DataBit =(data&(BIT0<iface_type == IFACE_PORT1) ++ { ++ // disable Port1 TSF update ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ ++ // set net_type ++ val8 = rtw_read8(Adapter, MSR)&0x03; ++ val8 |= (mode<<2); ++ rtw_write8(Adapter, MSR, val8); ++ ++ //reset TSF1 ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); ++ ++ DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); ++ ++ if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) ++ { ++ if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++ { ++ StopTxBeacon(Adapter); ++ } ++ ++ rtw_write8(Adapter,REG_BCN_CTRL_1, 0x19);//disable atim wnd ++ //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); ++ } ++ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ { ++ ResumeTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); ++ } ++ else if(mode == _HW_STATE_AP_) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); ++ ++ //Set RCR ++ //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 ++ rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ //enable to rx ps-poll ++ rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); ++ ++ //Beacon Control related register for first time ++ rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++ rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 ++ rtw_write16(Adapter, REG_BCNTCFG, 0x00); ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); ++ rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) ++ ++ ++ //enable BCN1 Function for if2 ++ //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) ++ rtw_write8(Adapter, REG_BCN_CTRL, ++ rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); ++#endif ++ ++ DBG_871X("%s()-%d: REG_BCN_CTRL_1 = %02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_BCN_CTRL_1)); ++ ++ //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked ++ //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); ++ //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); ++ ++ //dis BCN0 ATIM WND if if1 is station ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(0)); ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Reset TSF for STA+AP concurrent mode ++ if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { ++ if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ } ++ ++ } ++ else // (Adapter->iface_type == IFACE_PORT1) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ // disable Port0 TSF update ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ ++ // set net_type ++ val8 = rtw_read8(Adapter, MSR)&0x0c; ++ val8 |= mode; ++ rtw_write8(Adapter, MSR, val8); ++ ++ //reset TSF0 ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); ++ ++ DBG_871X("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); ++ ++ if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ StopTxBeacon(Adapter); ++ } ++ ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd ++ //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); ++ } ++ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ { ++ ResumeTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); ++ } ++ else if(mode == _HW_STATE_AP_) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ rtw_write8(Adapter, REG_BCN_CTRL, 0x12); ++ ++ //Set RCR ++ //write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 ++ rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ //enable to rx ps-poll ++ rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); ++ ++ //Beacon Control related register for first time ++ ++ rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms ++ ++ //write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++ rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms for port0 ++ rtw_write16(Adapter, REG_BCNTCFG, 0x00); ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); ++ rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) ++ ++ //enable BCN0 Function for if1 ++ //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) ++ rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | EN_TXBCN_RPT|BIT(1))); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, ++ rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); ++#endif ++ //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked ++ //only interface 2 as AP MODE need to sync ++ //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); ++ ++ ++ //dis BCN1 ATIM WND if if2 is station ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(0)); ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Reset TSF for STA+AP concurrent mode ++ if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { ++ if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ ++ } ++ ++ ++ } ++ ++} ++ ++static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u8 idx = 0; ++ u32 reg_macid; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ reg_macid = REG_MACID1; ++ } ++ else ++#endif ++ { ++ reg_macid = REG_MACID; ++ } ++ ++ for(idx = 0 ; idx < 6; idx++) ++ { ++ rtw_write8(Adapter, (reg_macid+idx), val[idx]); ++ } ++ ++} ++ ++static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u8 idx = 0; ++ u32 reg_bssid; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ reg_bssid = REG_BSSID1; ++ } ++ else ++#endif ++ { ++ reg_bssid = REG_BSSID; ++ } ++ ++ for(idx = 0 ; idx < 6; idx++) ++ { ++ rtw_write8(Adapter, (reg_bssid+idx), val[idx]); ++ } ++ ++} ++ ++static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u32 bcn_ctrl_reg; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ bcn_ctrl_reg = REG_BCN_CTRL_1; ++ ++ if(*((u8 *)val)) ++ { ++ rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); ++ } ++ else ++ { ++ rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); ++ } ++ } ++ else ++#endif ++ { ++ bcn_ctrl_reg = REG_BCN_CTRL; ++ if(*((u8 *)val)) ++ { ++ rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); ++ } ++ else ++ { ++ //rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); ++ rtw_write8(Adapter, bcn_ctrl_reg, (rtw_read8(Adapter, bcn_ctrl_reg)&(~(EN_TXBCN_RPT))) | DIS_TSF_UDT0_NORMAL_CHIP); ++ } ++ } ++ ++ ++} ++ ++#ifdef CONFIG_WOWLAN ++static int rtw_wowlan_set_pattern(_adapter *padapter ,u8* pbuf){ ++ struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; ++ int res=0,crc_idx; ++ u32 content=0,cmd=0; ++ u32 *pdata; ++ u8 config,crc,mc,bc,uc,idx,pattern_len,packet[200],packet_len,valid; ++ u16 crc_val=0,i; ++ ++ config=pbuf[0]; ++ bc=config & BIT(3)?1:0; ++ mc=config & BIT(4)?1:0; ++ uc=config & BIT(5)?1:0; ++ idx=config & 0x7; ++ crc=config & BIT(6)?1:0; ++ valid=config & BIT(7)?1:0; ++ pattern_len=pbuf[1]; ++ packet_len=pattern_len*8; ++ pdata=(u32 *)pbuf; ++ ++ // Write to the Wakeup CAM ++ //offset 0 ++ if(pattern_len>=4){ ++ content=pdata[1]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("\nrtw_wowlan_set_pattern offset[0] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][0]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+0); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 4 ++ if(pattern_len>=8){ ++ content=pdata[2]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[4] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][1]= __cpu_to_le32(content); ++ ++ //cmd=BIT(31)|BIT(16)|(idx+1); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 8 ++ if(pattern_len>=12){ ++ content=pdata[3]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[8] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][2]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+2); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 12 ++ if(pattern_len>=16){ ++ content=pdata[4]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[12] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][3]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+3); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ if(crc){ ++ // Have the CRC value ++ crc_val=*(u16 *)(&pbuf[2]); ++ DBG_8192C("rtw_wowlan_set_pattern crc_val 0x%x \n", crc_val); ++ crc_val=__cpu_to_le16(crc_val); ++ DBG_8192C("rtw_wowlan_set_pattern crc_val after 0x%x \n", crc_val); ++ } ++ else{ ++ DBG_8192C("+rtw_wowlan_set_pattern crc=0[%x] Should calculate the CRC\n", crc); ++ // calculate the CRC the write to the Wakeup CAM ++ crc_idx=0; ++ for(i=0;iwowlan_pattern_context[idx][4]= content; ++ //cmd=BIT(31)|BIT(16)|(idx+4); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ pwrpriv->wowlan_pattern_idx|=BIT(idx); ++ ++_rtw_wowlan_set_pattern_exit: ++ return res; ++} ++ ++ ++ ++void rtw_wowlan_reload_pattern(_adapter *padapter){ ++ struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; ++ u32 content=0,cmd=0; ++ u8 idx; ++ ++ for (idx=0;idx<8;idx ++){ ++ if(pwrpriv->wowlan_pattern_idx & BIT(idx)){ ++ //offset 0 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][0]); ++ cmd=BIT(31)|BIT(16)|(idx+0); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 4 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][1]); ++ cmd=BIT(31)|BIT(16)|(idx+1); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 8 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][2]); ++ cmd=BIT(31)|BIT(16)|(idx+2); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 12 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][3]); ++ cmd=BIT(31)|BIT(16)|(idx+3); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 16 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][4]); ++ cmd=BIT(31)|BIT(16)|(idx+4); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ } ++ printk("print WOWCAM idx =%d\n",idx); ++ cmd=BIT(31)|(idx+0); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[0] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+1); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[1] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+2); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[2] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+3); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[3] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+4); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[4] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ ++ ++ } ++} ++#endif //CONFIG_WOWLAN ++ ++static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ u64 tsf; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); ++ StopTxBeacon(Adapter); ++ } ++ ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR1, tsf); ++ rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); ++ ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! ++ if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE ++ && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) { ++ if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port0 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ ++ } ++ else // Adapter->iface_type == IFACE_PORT1 ++ { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); ++ // disable TSF update instead! May induce burst beacon TX ++ //rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ ++ rtw_write32(Adapter, REG_TSFTR, tsf); ++ rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); ++ //rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ // Update buddy port's TSF if it is SoftAP for beacon TX issue! ++ if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE ++ && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ++ ) { ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ // disable TSF update instead! ++ //rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ ++ rtw_write32(Adapter, REG_TSFTR1, tsf); ++ rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); ++ //rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); ++ } ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++ // Update buddy port's TSF if it is SoftAP for beacon TX issue! ++ if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE ++ && check_buddy_fwstate(Adapter, WIFI_AP_STATE) ) { ++ if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) ++ DBG_871X("ERROR! %s()-%d: Reset port1 TSF fail\n", ++ __FUNCTION__, __LINE__); ++ } ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ } ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause &= (~STOP_BCNQ); ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ++ ResumeTxBeacon(Adapter); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++} ++ ++static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PADAPTER pbuddy_adapter = Adapter->pbuddy_adapter; ++ ++ ++ if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); ++ ++ ++ if(Adapter->iface_type == IFACE_PORT1) ++ { ++ int i; ++ u8 reg_bcn_ctrl_1; ++ ++ // a.Driver set 0x422 bit 6 =0 ++ rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ ++ ++#ifdef CONFIG_BEACON_DISABLE_OFFLOAD ++ u8 reg_bcn_disable_cnt = rtw_read8(Adapter, REG_FW_BCN_DIS_CNT); ++ DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, reg_bcn_disable_cnt); ++ ++ reg_bcn_ctrl_1 = rtw_read8(Adapter, REG_BCN_CTRL_1); ++ DBG_871X("%s()-%d: reg_bcn_ctrl_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1); ++ ++ // b. driver set h2c cmd ++ rtl8192c_dis_beacon_fun_cmd(Adapter); ++ ++ /* ++ // FW Job for port 0 ++ ++ c. 8051 set nettype to ap ++ d. 8051 check dma_int ++ e. 8051 set nettype to no_link ++ f.8051 dis_tsf_update 0x550 bit 4 ++ g.8051 reset beacon function test count 0x553 bit0. ++ h.8051 disable beacon function 0x550 bit3 ++ i. 8051 sent ready to driver ++ ++ */ ++ ++ // The worst case is 100 + 15 ms ++ rtw_msleep_os(120); ++ ++ for (i=0; i< 10; i++) { ++ reg_bcn_ctrl_1 = rtw_read8(Adapter, REG_BCN_CTRL_1); ++ if ( (reg_bcn_ctrl_1 & BIT(3)) == 0 ) { ++ //DBG_871X("%s()-%d: BEACON_DISABLE_OFFLOAD finished! reg=%02x\n", __FUNCTION__, __LINE__, reg); ++ break; ++ } ++ DBG_871X("%s()-%d: BEACON_DISABLE_OFFLOAD not finished! REG_BCN_CTRL_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1); ++ DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_FW_BCN_DIS_CNT)); ++ DBG_871X("%s()-%d: REG_BCN_CTRL=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_BCN_CTRL)); ++ DBG_871X("%s()-%d: FWISR=%08x\n", __FUNCTION__, __LINE__, rtw_read32(Adapter, REG_FWISR)); ++ rtw_msleep_os(100); ++ } ++ DBG_871X("%s()-%d: reg_bcn_disable_cnt=%02x\n", __FUNCTION__, __LINE__, rtw_read8(Adapter, REG_FW_BCN_DIS_CNT)); ++ DBG_871X("%s()-%d: reg_bcn_ctrl_1=%02x\n", __FUNCTION__, __LINE__, reg_bcn_ctrl_1); ++ ++#else // CONFIG_BEACON_DISABLE_OFFLOAD ++ ++ //disable update TSF1 ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); ++ ++ //reset TSF1 ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); ++ ++ // disable Port1's beacon function ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); ++ ++#endif // CONFIG_BEACON_DISABLE_OFFLOAD ++ ++ // j, Driver set 0x422 bit 6 =1 ++ rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ ++ // k. re_download beacon pkt ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++ set_tx_beacon_cmd(pbuddy_adapter); ++ ++ ++ } ++ else // (Adapter->iface_type == IFACE_PORT1) ++ { ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); ++ ++ // Can't disable Port0's beacon function due to it is used by RA ++ } ++#endif ++} ++ ++static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ u32 value_rcr, rcr_clear_bit, reg_bcn_ctl; ++ u16 value_rxfltmap2; ++ struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv); ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(Adapter->iface_type == IFACE_PORT1) ++ reg_bcn_ctl = REG_BCN_CTRL_1; ++ else ++#endif ++ reg_bcn_ctl = REG_BCN_CTRL; ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ ++ if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++#ifdef CONFIG_CONCURRENT_MODE ++ || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE) ++#endif ++#ifdef CONFIG_TDLS ++ // TDLS will clear RCR_CBSSID_DATA bit for connection. ++ || ( Adapter->tdlsinfo.setup_state & TDLS_LINKED_STATE ) ++#endif // CONFIG_TDLS ++ ) ++ { ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ } ++ else ++ { ++ rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); ++ } ++ ++ // Recieve all data frames ++ value_rxfltmap2 = 0xFFFF; ++ ++#else /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ rcr_clear_bit = RCR_CBSSID_BCN; ++ ++ //config RCR to receive different BSSID & not to receive data frame ++ value_rxfltmap2 = 0; ++ ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ value_rcr = rtw_read32(Adapter, REG_RCR); ++ ++ if(*((u8 *)val))//under sitesurvey ++ { ++ value_rcr &= ~(rcr_clear_bit); ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ ++ rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { ++ //disable update TSF ++ rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)|BIT(4)); ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ StopTxBeacon(Adapter); ++ } ++#endif ++ } ++ else//sitesurvey done ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED) || check_fwstate(pmlmepriv, WIFI_AP_STATE) ++#ifdef CONFIG_CONCURRENT_MODE ++ || check_buddy_fwstate(Adapter, _FW_LINKED) || check_buddy_fwstate(Adapter, WIFI_AP_STATE) ++#endif ++ ) ++ { ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); ++ } ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { ++ //enable update TSF ++ rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)&(~BIT(4))); ++ } ++ ++ value_rcr |= rcr_clear_bit; ++ rtw_write32(Adapter, REG_RCR, value_rcr); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ ResumeTxBeacon(Adapter); ++ } ++#endif ++ } ++} ++ ++static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) ++{ ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 RetryLimit = 0x30; ++ u8 type = *((u8 *)val); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(type == 0) // prepare to join ++ { ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ StopTxBeacon(Adapter); ++ } ++ ++ //enable to rx data frame.Accept all data frame ++ //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); ++ else ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; ++ } ++ else // Ad-hoc Mode ++ { ++ RetryLimit = 0x7; ++ } ++ } ++ else if(type == 1) //joinbss_event call back when join res < 0 ++ { ++ if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ //reset TSF 1/2 after ResumeTxBeacon ++ //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); ++ ++ } ++ } ++ else if(type == 2) //sta add event call back ++ { ++ ++ //enable update TSF ++ if(Adapter->iface_type == IFACE_PORT1) ++ rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); ++ else ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ //fixed beacon issue for 8191su........... ++ rtw_write8(Adapter,0x542 ,0x02); ++ RetryLimit = 0x7; ++ } ++ ++ ++ if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && ++ check_buddy_fwstate(Adapter, _FW_LINKED)) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ //reset TSF 1/2 after ResumeTxBeacon ++ //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); ++ } ++ ++ } ++ ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ ++#endif ++} ++ ++void SetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++_func_enter_; ++ ++ switch(variable) ++ { ++ case HW_VAR_MEDIA_STATUS: ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(Adapter, MSR)&0x0c; ++ val8 |= *((u8 *)val); ++ rtw_write8(Adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_MEDIA_STATUS1: ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(Adapter, MSR)&0x03; ++ val8 |= *((u8 *)val) <<2; ++ rtw_write8(Adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_SET_OPMODE: ++ hw_var_set_opmode(Adapter, variable, val); ++ break; ++ case HW_VAR_MAC_ADDR: ++ hw_var_set_macaddr(Adapter, variable, val); ++ break; ++ case HW_VAR_BSSID: ++ hw_var_set_bssid(Adapter, variable, val); ++ break; ++ case HW_VAR_BASIC_RATE: ++ { ++ u16 BrateCfg = 0; ++ u8 RateIndex = 0; ++ ++ // 2007.01.16, by Emily ++ // Select RRSR (in Legacy-OFDM and CCK) ++ // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. ++ // We do not use other rates. ++ HalSetBrateCfg( Adapter, val, &BrateCfg ); ++ ++ //2011.03.30 add by Luke Lee ++ //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT ++ //because CCK 2M has poor TXEVM ++ //CCK 5.5M & 11M ACK should be enabled for better performance ++ ++ pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; ++ ++ BrateCfg |= 0x01; // default enable 1M ACK rate ++ ++ DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); ++ ++ // Set RRSR rate table. ++ rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff); ++ rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff); ++ rtw_write8(Adapter, REG_RRSR+2, rtw_read8(Adapter, REG_RRSR+2)&0xf0); ++ ++ // Set RTS initial rate ++ while(BrateCfg > 0x1) ++ { ++ BrateCfg = (BrateCfg>> 1); ++ RateIndex++; ++ } ++ // Ziv - Check ++ rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); ++ } ++ break; ++ case HW_VAR_TXPAUSE: ++ rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); ++ break; ++ case HW_VAR_BCN_FUNC: ++ hw_var_set_bcn_func(Adapter, variable, val); ++ break; ++ case HW_VAR_CORRECT_TSF: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_correct_tsf(Adapter, variable, val); ++#else ++ { ++ u64 tsf; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); ++ StopTxBeacon(Adapter); ++ } ++ ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR, tsf); ++ rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); ++ ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause &= (~STOP_BCNQ); ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ++ ResumeTxBeacon(Adapter); ++ } ++ } ++#endif ++ break; ++ case HW_VAR_CHECK_BSSID: ++ if(*((u8 *)val)) ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ else ++ { ++ u32 val32; ++ ++ val32 = rtw_read32(Adapter, REG_RCR); ++ val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); ++ rtw_write32(Adapter, REG_RCR, val32); ++ } ++ break; ++ case HW_VAR_MLME_DISCONNECT: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_mlme_disconnect(Adapter, variable, val); ++#else ++ { ++ //Set RCR to not to receive data frame when NO LINK state ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); ++ //reject all data frames ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++#endif ++ break; ++ case HW_VAR_MLME_SITESURVEY: ++ hw_var_set_mlme_sitesurvey(Adapter, variable, val); ++ break; ++ case HW_VAR_MLME_JOIN: ++#ifdef CONFIG_CONCURRENT_MODE ++ hw_var_set_mlme_join(Adapter, variable, val); ++#else ++ { ++ u8 RetryLimit = 0x30; ++ u8 type = *((u8 *)val); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(type == 0) // prepare to join ++ { ++ //enable to rx data frame.Accept all data frame ++ //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; ++ } ++ else // Ad-hoc Mode ++ { ++ RetryLimit = 0x7; ++ } ++ } ++ else if(type == 1) //joinbss_event call back when join res < 0 ++ { ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ } ++ else if(type == 2) //sta add event call back ++ { ++ //enable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ //fixed beacon issue for 8191su........... ++ rtw_write8(Adapter,0x542 ,0x02); ++ RetryLimit = 0x7; ++ } ++ } ++ ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ } ++#endif ++ break; ++ ++ case HW_VAR_ON_RCR_AM: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_AM); ++ DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); ++ break; ++ case HW_VAR_OFF_RCR_AM: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)& (~RCR_AM)); ++ DBG_871X("%s, %d, RCR= %x \n", __FUNCTION__,__LINE__, rtw_read32(Adapter, REG_RCR)); ++ break; ++ ++ case HW_VAR_BEACON_INTERVAL: ++ rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); ++ break; ++ case HW_VAR_SLOT_TIME: ++ { ++ u8 u1bAIFS, aSifsTime; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ rtw_write8(Adapter, REG_SLOT, val[0]); ++ ++ if(pmlmeinfo->WMM_enable == 0) ++ { ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); ++ ++ // Temporary removed, 2008.06.20. ++ rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); ++ } ++ } ++ break; ++ case HW_VAR_RESP_SIFS: ++ { ++#if 0 ++ // SIFS for OFDM Data ACK ++ rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]); ++ // SIFS for OFDM consecutive tx like CTS data! ++ rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]); ++ ++ rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]); ++ rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]); ++ ++ // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. ++ rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); //0x08 - CCK ++ rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); //0x0e - OFDM ++#else ++ //SIFS_Timer = 0x0a0a0808; ++ //RESP_SIFS for CCK ++ rtw_write8(Adapter, REG_R2T_SIFS, val[0]); // SIFS_T2T_CCK (0x08) ++ rtw_write8(Adapter, REG_R2T_SIFS+1, val[1]); //SIFS_R2T_CCK(0x08) ++ //RESP_SIFS for OFDM ++ rtw_write8(Adapter, REG_T2T_SIFS, val[2]); //SIFS_T2T_OFDM (0x0a) ++ rtw_write8(Adapter, REG_T2T_SIFS+1, val[3]); //SIFS_R2T_OFDM(0x0a) ++#endif ++ } ++ break; ++ case HW_VAR_ACK_PREAMBLE: ++ { ++ u8 regTmp; ++ u8 bShortPreamble = *( (PBOOLEAN)val ); ++ // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) ++ regTmp = (pHalData->nCur40MhzPrimeSC)<<5; ++ //regTmp = 0; ++ if(bShortPreamble) ++ regTmp |= 0x80; ++ ++ rtw_write8(Adapter, REG_RRSR+2, regTmp); ++ } ++ break; ++ case HW_VAR_SEC_CFG: ++#ifdef CONFIG_CONCURRENT_MODE ++ rtw_write8(Adapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC ++#else ++ rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); ++#endif ++ break; ++ case HW_VAR_DM_FLAG: ++ pdmpriv->DMFlag = *((u8 *)val); ++ break; ++ case HW_VAR_DM_FUNC_OP: ++ if(val[0]) ++ {// save dm flag ++ pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; ++ } ++ else ++ {// restore dm flag ++ pdmpriv->DMFlag = pdmpriv->DMFlag_tmp; ++ } ++ break; ++ case HW_VAR_DM_FUNC_SET: ++ pdmpriv->DMFlag |= *((u8 *)val); ++ break; ++ case HW_VAR_DM_FUNC_CLR: ++ pdmpriv->DMFlag &= *((u8 *)val); ++ break; ++ case HW_VAR_CAM_EMPTY_ENTRY: ++ { ++ u8 ucIndex = *((u8 *)val); ++ u8 i; ++ u32 ulCommand=0; ++ u32 ulContent=0; ++ u32 ulEncAlgo=CAM_AES; ++ ++ for(i=0;iAcParam_BE = ((u32 *)(val))[0]; ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_AC_PARAM_BK: ++ rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_ACM_CTRL: ++ { ++ u8 acm_ctrl = *((u8 *)val); ++ u8 AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL); ++ ++ if(acm_ctrl > 1) ++ AcmCtrl = AcmCtrl | 0x1; ++ ++ if(acm_ctrl & BIT(3)) ++ AcmCtrl |= AcmHw_VoqEn; ++ else ++ AcmCtrl &= (~AcmHw_VoqEn); ++ ++ if(acm_ctrl & BIT(2)) ++ AcmCtrl |= AcmHw_ViqEn; ++ else ++ AcmCtrl &= (~AcmHw_ViqEn); ++ ++ if(acm_ctrl & BIT(1)) ++ AcmCtrl |= AcmHw_BeqEn; ++ else ++ AcmCtrl &= (~AcmHw_BeqEn); ++ ++ DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ); ++ rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl ); ++ } ++ break; ++ case HW_VAR_AMPDU_MIN_SPACE: ++ { ++ u8 MinSpacingToSet; ++ u8 SecMinSpace; ++ ++ MinSpacingToSet = *((u8 *)val); ++ if(MinSpacingToSet <= 7) ++ { ++ switch(Adapter->securitypriv.dot11PrivacyAlgrthm) ++ { ++ case _NO_PRIVACY_: ++ case _AES_: ++ SecMinSpace = 0; ++ break; ++ ++ case _WEP40_: ++ case _WEP104_: ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ SecMinSpace = 6; ++ break; ++ default: ++ SecMinSpace = 7; ++ break; ++ } ++ ++ if(MinSpacingToSet < SecMinSpace){ ++ MinSpacingToSet = SecMinSpace; ++ } ++ ++ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg)); ++ rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); ++ } ++ } ++ break; ++ case HW_VAR_AMPDU_FACTOR: ++ { ++ u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; ++ u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; ++ u8 FactorToSet; ++ u8 *pRegToSet; ++ u8 index = 0; ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pHalData->bt_coexist.BT_Coexist) && ++ (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) ++ pRegToSet = RegToSet_BT; // 0x97427431; ++ else ++#endif ++ pRegToSet = RegToSet_Normal; // 0xb972a841; ++ ++ FactorToSet = *((u8 *)val); ++ if(FactorToSet <= 3) ++ { ++ FactorToSet = (1<<(FactorToSet + 2)); ++ if(FactorToSet>0xf) ++ FactorToSet = 0xf; ++ ++ for(index=0; index<4; index++) ++ { ++ if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) ++ pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); ++ ++ if((pRegToSet[index] & 0x0f) > FactorToSet) ++ pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); ++ ++ rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); ++ } ++ ++ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); ++ } ++ } ++ break; ++ case HW_VAR_RXDMA_AGG_PG_TH: ++ #ifdef CONFIG_USB_RX_AGGREGATION ++ { ++ u8 threshold = *((u8 *)val); ++ if( threshold == 0) ++ { ++ threshold = pHalData->UsbRxAggPageCount; ++ } ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); ++ } ++ #endif ++ break; ++ case HW_VAR_SET_RPWM: ++ rtw_write8(Adapter, REG_USB_HRPWM, *((u8 *)val)); ++ break; ++ case HW_VAR_H2C_FW_PWRMODE: ++ { ++ u8 psmode = (*(u8 *)val); ++ ++ // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power ++ // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. ++ if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) ++ { ++ rtl8192c_dm_RF_Saving(Adapter, _TRUE); ++ } ++ rtl8192c_set_FwPwrMode_cmd(Adapter, psmode); ++ } ++ break; ++ case HW_VAR_H2C_FW_JOINBSSRPT: ++ { ++ u8 mstatus = (*(u8 *)val); ++ rtl8192c_set_FwJoinBssReport_cmd(Adapter, mstatus); ++ } ++ break; ++#ifdef CONFIG_P2P_PS ++ case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: ++ { ++ u8 p2p_ps_state = (*(u8 *)val); ++ rtl8192c_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); ++ } ++ break; ++#endif // CONFIG_P2P_PS ++#ifdef CONFIG_TDLS ++ case HW_VAR_TDLS_WRCR: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) )); ++ break; ++ case HW_VAR_TDLS_INIT_CH_SEN: ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) )&(~ BIT(7) )); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xffff); ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ break; ++ case HW_VAR_TDLS_DONE_CH_SEN: ++ { ++ //enable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~ BIT(4))); ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(7) )); ++ } ++ break; ++ case HW_VAR_TDLS_RS_RCR: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(6))); ++ break; ++#endif //CONFIG_TDLS ++ case HW_VAR_INITIAL_GAIN: ++ { ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ u32 rx_gain = ((u32 *)(val))[0]; ++ ++ if(rx_gain == 0xff){//restore rx gain ++ pDigTable->CurIGValue = pDigTable->BackupIGValue; ++ PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,pDigTable->CurIGValue ); ++ PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,pDigTable->CurIGValue); ++ } ++ else{ ++ pDigTable->BackupIGValue = pDigTable->CurIGValue; ++ PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,rx_gain ); ++ PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,rx_gain); ++ pDigTable->CurIGValue = (u8)rx_gain; ++ } ++ ++ ++ } ++ break; ++ case HW_VAR_TRIGGER_GPIO_0: ++ rtl8192cu_trigger_gpio_0(Adapter); ++ break; ++#ifdef CONFIG_BT_COEXIST ++ case HW_VAR_BT_SET_COEXIST: ++ { ++ u8 bStart = (*(u8 *)val); ++ rtl8192c_set_dm_bt_coexist(Adapter, bStart); ++ } ++ break; ++ case HW_VAR_BT_ISSUE_DELBA: ++ { ++ u8 dir = (*(u8 *)val); ++ rtl8192c_issue_delete_ba(Adapter, dir); ++ } ++ break; ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ ++ case HW_VAR_ANTENNA_DIVERSITY_LINK: ++ SwAntDivRestAfterLink8192C(Adapter); ++ break; ++ case HW_VAR_ANTENNA_DIVERSITY_SELECT: ++ { ++ u8 Optimum_antenna = (*(u8 *)val); ++ //switch antenna to Optimum_antenna ++ // DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ if(pHalData->CurAntenna != Optimum_antenna) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna); ++ pHalData->CurAntenna = Optimum_antenna ; ++ //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ } ++ } ++ break; ++#endif ++ case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. ++ pHalData->EfuseUsedBytes = *((u16 *)val); ++ break; ++ case HW_VAR_FIFO_CLEARN_UP: ++ { ++ #define RW_RELEASE_EN BIT18 ++ #define RXDMA_IDLE BIT17 ++ ++ struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv; ++ u8 trycnt = 100; ++ ++ //pause tx ++ rtw_write8(Adapter,REG_TXPAUSE,0xff); ++ ++ //keep sn ++ Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ); ++ ++ if(pwrpriv->bkeepfwalive != _TRUE) ++ { ++ //RX DMA stop ++ rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); ++ do{ ++ if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) ++ break; ++ }while(trycnt--); ++ if(trycnt ==0) ++ DBG_8192C("Stop RX DMA failed...... \n"); ++ ++ //RQPN Load 0 ++ rtw_write16(Adapter,REG_RQPN_NPQ,0x0); ++ rtw_write32(Adapter,REG_RQPN,0x80000000); ++ rtw_mdelay_os(10); ++ } ++ } ++ break; ++ case HW_VAR_WOWLAN: ++#ifdef CONFIG_WOWLAN ++ { ++ struct wowlan_ioctl_param *poidparam; ++ ++ int res; ++ ++ poidparam = (struct wowlan_ioctl_param *)val; ++ switch (poidparam->subcode){ ++ case WOWLAN_PATTERN_MATCH: ++ //Turn on the Pattern Match feature ++ DBG_8192C("\n PATTERN_MATCH poidparam->subcode_value=%d\n",poidparam->subcode_value); ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1))); ++ Adapter->pwrctrlpriv.wowlan_pattern=_TRUE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_pattern=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_pattern); ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(1))); ++ Adapter->pwrctrlpriv.wowlan_pattern=_FALSE; ++ } ++ break; ++ case WOWLAN_MAGIC_PACKET: ++ //Turn on the Magic Packet feature ++ DBG_8192C("\n MAGIC_PACKET poidparam->subcode_value=%d\n",poidparam->subcode_value); ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(2))); ++ Adapter->pwrctrlpriv.wowlan_magic=_TRUE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_magic=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_magic); ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(2))); ++ Adapter->pwrctrlpriv.wowlan_magic=_FALSE; ++ } ++ break; ++ case WOWLAN_UNICAST: ++ //Turn on the Unicast wakeup feature ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(3))); ++ Adapter->pwrctrlpriv.wowlan_unicast=_TRUE; ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(3))); ++ Adapter->pwrctrlpriv.wowlan_unicast=_FALSE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_unicast=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_unicast); ++ } ++ break; ++ case WOWLAN_SET_PATTERN: ++ //Setting the Pattern for wowlan ++ res=rtw_wowlan_set_pattern(Adapter,poidparam->pattern); ++ if(res) ++ DBG_8192C("rtw_wowlan_set_pattern retern value=0x%x",res); ++ break; ++ case WOWLAN_DUMP_REG: ++ //dump the WKFMCAM and WOW_CTRL register ++ /*DBG_8192C("\n\n\n\n rtw_wowlan_ctrl: WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++ DBG_8192C("print WKFMCAM index =%d ",poidparam->data[0]); ++ { int cmd=0,offset=0; ++ for(offset=0;offset<5;offset++){ ++ cmd=BIT(31)|(poidparam->data[0]+offset); ++ rtw_write32(Adapter, REG_WKFMCAM_CMD, cmd); ++ DBG_8192C("offset[%d]=0x%.8x ",offset,rtw_read32(Adapter, REG_WKFMCAM_RWD)); ++ DBG_8192C("offset[%d]=MSB 0x%x:0x%x:0x%x:0x%x ",offset,rtw_read8(Adapter, REG_WKFMCAM_RWD+3),rtw_read8(Adapter, REG_WKFMCAM_RWD+2),rtw_read8(Adapter, REG_WKFMCAM_RWD+1),rtw_read8(Adapter, REG_WKFMCAM_RWD)); ++ } ++ }*/ ++ ++ break; ++ case WOWLAN_ENABLE: ++ SetFwRelatedForWoWLAN8192CU(Adapter, _TRUE); ++ //Set Pattern ++ if(Adapter->pwrctrlpriv.wowlan_pattern==_TRUE) ++ rtw_wowlan_reload_pattern(Adapter); ++ rtl8192c_set_wowlan_cmd(Adapter); ++ rtw_write8(Adapter, 0x6, rtw_read8(Adapter, 0x6)|BIT(3)); ++ rtw_msleep_os(10); ++ //DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++// if(rtw_read8(Adapter, REG_WOW_CTRL)==0) ++// rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1)|BIT(2)|BIT(3))); ++ //DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++ break; ++ ++ case WOWLAN_DISABLE: ++ Adapter->pwrctrlpriv.wowlan_mode=_FALSE; ++ rtl8192c_set_wowlan_cmd(Adapter); ++ rtw_msleep_os(10); ++ break; ++ ++ case WOWLAN_STATUS: ++ poidparam->wakeup_reason = rtw_read8(Adapter, REG_WOWLAN_REASON); ++ DBG_8192C("wake on wlan reason 0x%02x\n", poidparam->wakeup_reason); ++ break; ++ ++ default: ++ break; ++ } ++ if (Adapter->pwrctrlpriv.wowlan_unicast||Adapter->pwrctrlpriv.wowlan_magic || Adapter->pwrctrlpriv.wowlan_pattern) ++ Adapter->pwrctrlpriv.wowlan_mode =_TRUE; ++ else ++ Adapter->pwrctrlpriv.wowlan_mode =_FALSE; ++ } ++ ++ break; ++#endif //CONFIG_WOWLAN ++ case HW_VAR_CHECK_TXBUF: ++#ifdef CONFIG_CONCURRENT_MODE ++ { ++ int i; ++ u8 RetryLimit = 0x01; ++ ++ //rtw_write16(Adapter, REG_RL,0x0101); ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ ++ for(i=0;i<1000;i++) ++ { ++ if(rtw_read32(Adapter, 0x200) != rtw_read32(Adapter, 0x204)) ++ { ++ //DBG_871X("packet in tx packet buffer - 0x204=%x, 0x200=%x (%d)\n", rtw_read32(Adapter, 0x204), rtw_read32(Adapter, 0x200), i); ++ rtw_msleep_os(10); ++ } ++ else ++ { ++ DBG_871X("no packet in tx packet buffer (%d)\n", i); ++ break; ++ } ++ } ++ ++ RetryLimit = 0x30; ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ ++ } ++#endif ++ break; ++ case HW_VAR_BCN_VALID: ++ //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw ++ rtw_write8(Adapter, REG_TDECTRL+2, rtw_read8(Adapter, REG_TDECTRL+2) | BIT0); ++ break; ++ case HW_VAR_USB_RXAGG_PAGE_TO: ++ rtw_write8(Adapter, REG_USB_DMA_AGG_TO, *((u8 *)val)); ++ break; ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++void GetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++_func_enter_; ++ ++ switch(variable) ++ { ++ case HW_VAR_BASIC_RATE: ++ *((u16 *)(val)) = pHalData->BasicRateSet; ++ case HW_VAR_TXPAUSE: ++ val[0] = rtw_read8(Adapter, REG_TXPAUSE); ++ break; ++ case HW_VAR_BCN_VALID: ++ //BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 ++ val[0] = (BIT0 & rtw_read8(Adapter, REG_TDECTRL+2))?_TRUE:_FALSE; ++ break; ++ case HW_VAR_DM_FLAG: ++ val[0] = pHalData->dmpriv.DMFlag; ++ break; ++ case HW_VAR_RF_TYPE: ++ val[0] = pHalData->rf_type; ++ break; ++ case HW_VAR_FWLPS_RF_ON: ++ { ++ //When we halt NIC, we should check if FW LPS is leave. ++ u32 valRCR; ++ ++ if(Adapter->pwrctrlpriv.rf_pwrstate == rf_off) ++ { ++ // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, ++ // because Fw is unload. ++ val[0] = _TRUE; ++ } ++ else ++ { ++ valRCR = rtw_read32(Adapter, REG_RCR); ++ valRCR &= 0x00070000; ++ if(valRCR) ++ val[0] = _FALSE; ++ else ++ val[0] = _TRUE; ++ } ++ } ++ break; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HW_VAR_CURRENT_ANTENNA: ++ val[0] = pHalData->CurAntenna; ++ break; ++#endif ++ case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. ++ *((u16 *)(val)) = pHalData->EfuseUsedBytes; ++ break; ++ case HW_VAR_VID: ++ *((u16 *)(val)) = pHalData->EEPROMVID; ++ break; ++ case HW_VAR_PID: ++ *((u16 *)(val)) = pHalData->EEPROMPID; ++ break; ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++// ++// Description: ++// Query setting of specified variable. ++// ++u8 ++GetHalDefVar8192CUsb( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _TRUE; ++ ++ switch(eVariable) ++ { ++ case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: ++#if 0 //trunk ++ { ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ struct sta_priv * pstapriv = &Adapter->stapriv; ++ struct sta_info * psta; ++ psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress); ++ if(psta) ++ { ++ *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ } ++ } ++#else //v4 branch ++ //if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){ ++ *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; ++ //} ++ //else{ ++ ++ //} ++#endif ++ break; ++ case HAL_DEF_IS_SUPPORT_ANT_DIV: ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE; ++ #endif ++ break; ++ case HAL_DEF_CURRENT_ANTENNA: ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ *(( u8*)pValue) = pHalData->CurAntenna; ++ #endif ++ break; ++ case HAL_DEF_DRVINFO_SZ: ++ *(( u32*)pValue) = DRVINFO_SZ; ++ break; ++ case HAL_DEF_MAX_RECVBUF_SZ: ++ *(( u32*)pValue) = MAX_RECVBUF_SZ; ++ break; ++ case HAL_DEF_RX_PACKET_OFFSET: ++ *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; ++ break; ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ *(( u8*)pValue) = pHalData->bDumpRxPkt; ++ break; ++ case HAL_DEF_DBG_DM_FUNC: ++ *(( u8*)pValue) = pHalData->dmpriv.DMFlag; ++ break; ++ default: ++ //RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): Unkown variable: %d!\n", eVariable)); ++ bResult = _FALSE; ++ break; ++ } ++ ++ return bResult; ++} ++ ++ ++ ++ ++// ++// Description: ++// Change default setting of specified variable. ++// ++u8 ++SetHalDefVar8192CUsb( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _TRUE; ++ ++ switch(eVariable) ++ { ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ pHalData->bDumpRxPkt = *(( u8*)pValue); ++ break; ++ case HAL_DEF_DBG_DM_FUNC: ++ { ++ u8 dm_func = *(( u8*)pValue); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ if(dm_func == 0){ //disable all dynamic func ++ pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; ++ DBG_8192C("==> Disable all dynamic function...\n"); ++ } ++ else if(dm_func == 1){//disable DIG ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_DIG); ++ DBG_8192C("==> Disable DIG...\n"); ++ } ++ else if(dm_func == 2){//disable High power ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_HP); ++ } ++ else if(dm_func == 3){//disable tx power tracking ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_SS); ++ DBG_8192C("==> Disable tx power tracking...\n"); ++ } ++ else if(dm_func == 4){//disable BT coexistence ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); ++ } ++ else if(dm_func == 5){//disable antenna diversity ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_ANT_DIV); ++ } ++ else if(dm_func == 6){//turn on all dynamic func ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) ++ { ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ pDigTable->PreIGValue = rtw_read8(Adapter,0xc50); ++ } ++ ++ pdmpriv->DMFlag |= (DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS| ++ DYNAMIC_FUNC_BT|DYNAMIC_FUNC_ANT_DIV) ; ++ DBG_8192C("==> Turn on all dynamic function...\n"); ++ } ++ } ++ break; ++ default: ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("SetHalDefVar819xUsb(): Unkown variable: %d!\n", eVariable)); ++ bResult = _FALSE; ++ break; ++ } ++ ++ return bResult; ++} ++ ++u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ unsigned int BrateCfg = 0; ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4) ) ++ { ++ BrateCfg = mask & 0x151; ++ //DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151); ++ } ++ else ++#endif ++ { ++ if(pHalData->VersionID != VERSION_TEST_CHIP_88C) ++ BrateCfg = mask & 0x15F; ++ else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning ++ BrateCfg = mask & 0x159; ++ } ++ ++ BrateCfg |= 0x01; // default enable 1M ACK rate ++ ++ return BrateCfg; ++} ++ ++void _update_response_rate(_adapter *padapter,unsigned int mask) ++{ ++ u8 RateIndex = 0; ++ // Set RRSR rate table. ++ rtw_write8(padapter, REG_RRSR, mask&0xff); ++ rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); ++ ++ ++ // Set RTS initial rate ++ while(mask > 0x1) ++ { ++ mask = (mask>> 1); ++ RateIndex++; ++ } ++ rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); ++} ++ ++void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id) ++{ ++ //volatile unsigned int result; ++ u8 init_rate=0; ++ u8 networkType, raid; ++ u32 mask; ++ u8 shortGIrate = _FALSE; ++ int supportRateNum = 0; ++ struct sta_info *psta; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ if (mac_id >= NUM_STA) //CAM_SIZE ++ { ++ return; ++ } ++ ++ psta = pmlmeinfo->FW_sta_info[mac_id].psta; ++ if(psta == NULL) ++ { ++ return; ++ } ++ ++ switch (mac_id) ++ { ++ case 0:// for infra mode ++#ifdef CONFIG_CONCURRENT_MODE ++ case 2:// first station uses macid=0, second station uses macid=2 ++#endif ++ supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); ++ networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; ++ //pmlmeext->cur_wireless_mode = networkType; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; ++ mask |= ((raid<<28)&0xf0000000); ++ ++ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) ++ { ++ shortGIrate = _TRUE; ++ } ++ ++ break; ++ ++ case 1://for broadcast/multicast ++ supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ networkType = WIRELESS_11B; ++ else ++ networkType = WIRELESS_11G; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= ((raid<<28)&0xf0000000); ++ ++ break; ++ ++ default: //for each sta in IBSS ++#ifdef CONFIG_TDLS ++ if(psta->tdls_sta_state & TDLS_LINKED_STATE) ++ { ++ shortGIrate = update_sgi_tdls(padapter, psta); ++ mask = update_mask_tdls(padapter, psta); ++ raid = mask>>28; ++ break; ++ } ++ else ++#endif //CONFIG_TDLS ++ { ++ supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); ++ networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; ++ //pmlmeext->cur_wireless_mode = networkType; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= ((raid<<28)&0xf0000000); ++ ++ //todo: support HT in IBSS ++ ++ break; ++ } ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pbtpriv->BT_Coexist) && ++ (pbtpriv->BT_CoexistType == BT_CSR_BC4) && ++ (pbtpriv->BT_CUR_State) && ++ (pbtpriv->BT_Ant_isolation) && ++ ((pbtpriv->BT_Service==BT_SCO)|| ++ (pbtpriv->BT_Service==BT_Busy)) ) ++ mask &= 0xffffcfc0; ++ else ++#endif ++ mask &=0xffffffff; ++ ++ ++ init_rate = get_highest_rate_idx(mask)&0x3f; ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg = 0; ++ ++ //arg = (cam_idx-4)&0x1f;//MACID ++ arg = mac_id&0x1f;//MACID ++ ++ arg |= BIT(7); ++ ++ if (shortGIrate==_TRUE) ++ arg |= BIT(5); ++ ++ DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); ++ psta->ra_mask=mask; ++#ifdef CONFIG_INTEL_PROXIM ++ if(padapter->proximity.proxim_on ==_TRUE){ ++ arg &= ~BIT(6); ++ } ++ else { ++ arg |= BIT(6); ++ } ++#endif //CONFIG_INTEL_PROXIM ++ rtl8192c_set_raid_cmd(padapter, mask, arg); ++ ++ } ++ else ++ { ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate); ++ } ++ ++ ++ //set ra_id ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ //set correct initial date rate for each mac_id ++ pdmpriv->INIDATA_RATE[mac_id] = init_rate; ++} ++ ++void SetBeaconRelatedRegisters8192CUsb(PADAPTER padapter) ++{ ++ u32 value32; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //reset TSF, enable update TSF, correcting TSF On Beacon ++ ++ //REG_BCN_INTERVAL ++ //REG_BCNDMATIM ++ //REG_ATIMWND ++ //REG_TBTT_PROHIBIT ++ //REG_DRVERLYINT ++ //REG_BCN_MAX_ERR ++ //REG_BCNTCFG //(0x510) ++ //REG_DUAL_TSF_RST ++ //REG_BCN_CTRL //(0x550) ++ ++ //BCN interval ++ rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); ++ rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms ++ ++ _InitBeaconParameters(padapter); ++ ++ rtw_write8(padapter, REG_SLOT, 0x09); ++ ++ value32 =rtw_read32(padapter, REG_TCR); ++ value32 &= ~TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ value32 |= TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ // NOTE: Fix test chip's bug (about contention windows's randomness) ++ rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); ++ rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); ++ ++ _BeaconFunctionEnable(padapter, _TRUE, _TRUE); ++ ++ ResumeTxBeacon(padapter); ++ ++ //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); ++ ++ //rtw_write8(padapter, 0x541, 0xff); ++ ++ //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); ++ ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(1)); ++ ++} ++ ++static void rtl8192cu_init_default_value(_adapter * padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i; ++ ++ //init default value ++ pHalData->fw_ractrl = _FALSE; ++ pHalData->bIQKInitialized = _FALSE; ++ if(!pwrctrlpriv->bkeepfwalive) ++ pHalData->LastHMEBoxNum = 0; ++ ++ pHalData->bIQKInitialized = _FALSE; ++ //init dm default value ++ pdmpriv->TM_Trigger = 0; ++ pdmpriv->binitialized = _FALSE; ++ pdmpriv->prv_traffic_idx = 3; ++ pdmpriv->initialize = 0; ++ ++ pdmpriv->ThermalValue_HP_index = 0; ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ pdmpriv->ThermalValue_HP[i] = 0; ++} ++ ++static u8 rtl8192cu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) ++{ ++ u8 bResult = _TRUE; ++ switch(efunc_id){ ++ ++ #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) ++ case HAL_USB_SELECT_SUSPEND: ++ { ++ u8 bfwpoll = *(( u8*)val); ++ rtl8192c_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect ++ } ++ break; ++ #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED ++ ++ default: ++ break; ++ } ++ return bResult; ++} ++ ++void rtl8192cu_set_hal_ops(_adapter * padapter) ++{ ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++_func_enter_; ++ ++ padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE)); ++ if(padapter->HalData == NULL){ ++ DBG_8192C("cant not alloc memory for HAL DATA \n"); ++ } ++ //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); ++ padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); ++ ++ pHalFunc->hal_init = &rtl8192cu_hal_init; ++ pHalFunc->hal_deinit = &rtl8192cu_hal_deinit; ++ ++ //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; ++ ++ pHalFunc->inirp_init = &rtl8192cu_inirp_init; ++ pHalFunc->inirp_deinit = &rtl8192cu_inirp_deinit; ++ ++ pHalFunc->init_xmit_priv = &rtl8192cu_init_xmit_priv; ++ pHalFunc->free_xmit_priv = &rtl8192cu_free_xmit_priv; ++ ++ pHalFunc->init_recv_priv = &rtl8192cu_init_recv_priv; ++ pHalFunc->free_recv_priv = &rtl8192cu_free_recv_priv; ++#ifdef CONFIG_SW_LED ++ pHalFunc->InitSwLeds = &rtl8192cu_InitSwLeds; ++ pHalFunc->DeInitSwLeds = &rtl8192cu_DeInitSwLeds; ++#else //case of hw led or no led ++ pHalFunc->InitSwLeds = NULL; ++ pHalFunc->DeInitSwLeds = NULL; ++#endif//CONFIG_SW_LED ++ ++ //pHalFunc->dm_init = &rtl8192c_init_dm_priv; ++ //pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv; ++ ++ pHalFunc->init_default_value = &rtl8192cu_init_default_value; ++ pHalFunc->intf_chip_configure = &rtl8192cu_interface_configure; ++ pHalFunc->read_adapter_info = &ReadAdapterInfo8192CU; ++ ++ //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; ++ //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; ++ ++ //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; ++ ++ pHalFunc->SetHwRegHandler = &SetHwReg8192CU; ++ pHalFunc->GetHwRegHandler = &GetHwReg8192CU; ++ pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192CUsb; ++ pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192CUsb; ++ ++ pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb; ++ pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8192CUsb; ++ ++ //pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; ++ ++//#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //pHalFunc->AntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C; ++ //pHalFunc->AntDivCompareHandler = &SwAntDivCompare8192C; ++//#endif ++ ++ pHalFunc->hal_xmit = &rtl8192cu_hal_xmit; ++ pHalFunc->mgnt_xmit = &rtl8192cu_mgnt_xmit; ++ pHalFunc->hal_xmitframe_enqueue = &rtl8192cu_hal_xmitframe_enqueue; ++ ++ //pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg; ++ //pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg; ++ //pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg; ++ //pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg; ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; ++#endif ++ pHalFunc->interface_ps_func = &rtl8192cu_ps_func; ++ ++ rtl8192c_set_hal_ops(pHalFunc); ++_func_exit_; ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c +@@ -0,0 +1,1207 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifndef PLATFORM_OS_CE ++ #error "PLATFORM_OS_CE shall be set \n" ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ #error "CONFIG_USB_HCI shall be on!\n" ++#endif ++ ++#include ++#include ++ ++#include ++ ++ ++struct zero_bulkout_context ++{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++ ++ ++#define PUSB_ERROR LPDWORD ++#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) ++ ++ ++USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr); ++ ++ ++static NTSTATUS usb_async_interrupt_in_complete( LPVOID Context ); ++static NTSTATUS usb_async_interrupt_out_complete( LPVOID Context ); ++ ++DWORD usb_write_port_complete( LPVOID Context ); ++DWORD usb_read_port_complete( LPVOID Context ); ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++_func_exit_; ++} ++ ++ ++ ++BOOL ++CloseTransferHandle( ++ LPCUSB_FUNCS pUsbFuncs, ++ USB_TRANSFER hTransfer ++ ) ++{ ++ BOOL bRc = TRUE; ++ ++ // This assert may fail on suprise remove, ++ // but should pass during normal I/O. ++ // ASSERT( pUsbFuncs->lpIsTransferComplete(hTransfer) ); ++ ++ // CloseTransfer aborts any pending transfers ++ if ( !pUsbFuncs->lpCloseTransfer(hTransfer) ) { ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError())); ++ bRc = FALSE; ++ } ++ ++ return bRc; ++} ++ ++ ++BOOL ++GetTransferStatus( ++ LPCUSB_FUNCS pUsbFuncs, ++ USB_TRANSFER hTransfer, ++ LPDWORD pBytesTransferred , // OPTIONAL returns number of bytes transferred ++ PUSB_ERROR pUsbError // returns USB error code ++ ) ++{ ++ ++ BOOL bRc = TRUE; ++ ++ if ( pUsbFuncs->lpGetTransferStatus(hTransfer, pBytesTransferred, pUsbError) ) { ++ if ( USB_NO_ERROR != *pUsbError ) { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError())); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("GetTransferStatus (BytesTransferred:%d, UsbError:0x%x)\n", pBytesTransferred?*pBytesTransferred:-1, pUsbError?*pUsbError:-1 )); ++ } ++ } else { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_,("*** GetTransferStatus ERROR:%d ***\n", GetLastError())); ++ *pUsbError = USB_CANCELED_ERROR; ++ bRc = FALSE; ++ } ++ ++ return bRc; ++} ++ ++ ++// The driver should never read RxCmd register. We have to set ++// RCR CMDHAT0 (bit6) to append Rx status before the Rx frame. ++// ++// |<-------- pBulkUrb->TransferBufferLength ------------>| ++// +------------------+-------------------+------------+ ++// | Rx status (16 bytes) | Rx frame ..... | CRC(4 bytes) | ++// +------------------+-------------------+------------+ ++// ^ ++// ^pRfd->Buffer.VirtualAddress ++// ++/*! \brief USB RX IRP Complete Routine. ++ @param Context pointer of RT_RFD ++*/ ++u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ _adapter *adapter = (_adapter *)pdvobj_priv->padapter; ++ ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ DWORD dwErr = ERROR_SUCCESS ; ++ DWORD dwBytesTransferred = 0 ; ++ USB_TRANSFER hTransfer = NULL; ++ USB_PIPE hPipe; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__)); ++ ++#if (CONFIG_PWRCTRL == 1) ++ if (adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ return _FALSE; ++ } ++#endif ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_info_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n")); ++ return _FALSE; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ ++ // get a recv buffer ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt++; ++ precvbuf->irp_pending = _TRUE; ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__)); ++ ++ precvbuf->usb_transfer_read_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, ++ usb_read_port_complete, ++ precvbuf, ++ USB_IN_TRANSFER|USB_SHORT_TRANSFER_OK, ++ MAX_RECVBUF_SZ, ++ precvbuf->pbuf, ++ 0); ++ ++ ++ if(precvbuf->usb_transfer_read_port) ++ { ++ ++ // GetTransferStatus(usb_funcs_vp, hTransfer, &dwBytesTransferred,&UsbRc); ++ ++ // CloseTransferHandle(usb_funcs_vp, hTransfer); ++ ++ } ++ else ++ { ++ ++ dwErr = GetLastError(); ++ //RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr)); ++ ++ } ++ ++// if ( USB_NO_ERROR != UsbRc && ERROR_SUCCESS == dwErr) { ++// dwErr = ERROR_GEN_FAILURE; ++// } ++ ++ ++ if ( ERROR_SUCCESS != dwErr ) { ++ ++ SetLastError(dwErr); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr)); ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port(%u)\n", __LINE__)); ++ ++ } ++ else // if(precvbuf !=NULL) ++ { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n")); ++ } ++ ++ return _TRUE; ++ ++} ++ ++DWORD usb_read_port_complete( PVOID context ) ++{ ++ struct recv_buf *precvbuf = (struct recv_buf *)context; ++ _adapter *adapter = (_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ ++ ++ struct intf_hdl *pintfhdl = &adapter->pio_queue->intf; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ uint isevt, *pbuf; ++ int fComplete =_FALSE; ++ ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_complete(%u)\n", __LINE__)); ++ ++_func_enter_; ++ ++ ++ _rtw_spinlock_ex(&precvpriv->lock); ++ precvbuf->irp_pending=_FALSE; ++ precvpriv->rx_pending_cnt --; ++ _rtw_spinunlock_ex(&precvpriv->lock); ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(precvbuf->usb_transfer_read_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(precvbuf->usb_transfer_read_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(precvbuf->usb_transfer_read_port); ++ ++ ++#endif ++ ++ ++ if(USB_NO_ERROR != dwErr) ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete Fail :%d\n",dwErr)); ++ ++ { ++ ++ if ( dwBytesTransferred > MAX_RECVBUF_SZ || dwBytesTransferred < RXDESC_SIZE ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_, ++ ("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE): %d\n",dwBytesTransferred)); ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ ++ //usb_read_port(pintfhdl, 0, 0, (unsigned char *)precvframe); ++ } ++ else ++ { ++ precvbuf->transfer_len = dwBytesTransferred; ++ ++ pbuf = (uint*)precvbuf->pbuf; ++ ++ if((isevt = *(pbuf+1)&0x1ff) == 0x1ff) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_, ++ ("\n usb_read_port_complete: get a event\n")); ++ rxcmd_event_hdl(adapter, pbuf);//rx c2h events ++ ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets ++ { ++ //precvbuf->reuse = _TRUE; ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ } ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port_complete(%u)\n", __LINE__)); ++ ++_func_exit_; ++ return ERROR_SUCCESS; ++// return STATUS_MORE_PROCESSING_REQUIRED; ++} ++ ++void usb_read_port_cancel(_adapter *padapter){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_cancel(%u)\n",__FUNCTION__, __LINE__)); ++} ++ ++DWORD usb_write_mem_complete( LPVOID Context ) ++{ ++ int fComplete =_FALSE; ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ _irqL irqL; ++ _list *head; ++ _list *plist; ++ struct io_req *pio_req; ++ struct io_queue *pio_q = (struct io_queue *) Context; ++ struct intf_hdl *pintf = &(pio_q->intf); ++ struct intf_priv *pintfpriv = pintf->pintfpriv; ++ _adapter *padapter = (_adapter *)pintf->adapter; ++ NTSTATUS status = STATUS_SUCCESS; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ USB_HANDLE usbHandle = pdvobj_priv->usb_extension._hDevice; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ // get the head from the processing io_queue ++ head = &(pio_q->processing); ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_mem_complete %p\n", Context)); ++ ++#if 1 ++ _enter_critical_bh(&(pio_q->lock), &irqL); ++ ++ ++ //free irp in processing list... ++ while(rtw_is_list_empty(head) != _TRUE) ++ { ++ plist = get_next(head); ++ rtw_list_delete(plist); ++ pio_req = LIST_CONTAINOR(plist, struct io_req, list); ++ _rtw_up_sema(&pio_req->sema); ++ } ++ ++ _exit_critical_bh(&(pio_q->lock), &irqL); ++#endif ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem ); ++ ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem_complete\n")); ++ ++_func_exit_; ++ ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++ ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++ NTSTATUS NtStatus = STATUS_SUCCESS; ++ USB_PIPE hPipe; ++ _irqL irqL; ++ ++ int fComplete = _FALSE; ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ ++ struct io_req *pio_req; ++ ++ _adapter *adapter = (_adapter *)pintfhdl->adapter; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ ++ struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_mem(%u) pintfhdl %p wmem %p\n", __LINE__, pintfhdl, wmem)); ++ ++ // fetch a io_request from the io_queue ++ pio_req = alloc_ioreq(pio_queue); ++ ++ if ((pio_req == NULL)||(adapter->bSurpriseRemoved)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved )); ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pio_queue->lock), &irqL); ++ ++ ++ // insert the io_request into processing io_queue ++ rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing)); ++ ++ ++ if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ goto exit; ++ } ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_,("usb_write_mem(%u)\n",__LINE__)); ++ ++ pio_req->usb_transfer_write_mem = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, ++ usb_write_mem_complete, ++ pio_queue, ++ USB_OUT_TRANSFER, ++ cnt, ++ wmem, ++ 0); ++ ++#if 0 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr); ++ ++ while( fComplete != _TRUE) ++ { ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem); ++ if(fComplete==_TRUE) ++ { ++ (*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem ); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem finished\n")); ++ break; ++ } ++ else ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ++ ("usb_write_mem not yet finished %X\n", ++ pio_req->usb_transfer_write_mem)); ++ rtw_msleep_os(10); ++ } ++ ++ } ++ ++#endif ++ ++ ++// _rtw_down_sema(&pio_req->sema); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem(%X)\n",pio_req->usb_transfer_write_mem)); ++ ++ _exit_critical_bh(&(pio_queue->lock), &irqL); ++ ++ _rtw_down_sema(&pio_req->sema); ++ free_ioreq(pio_req, pio_queue); ++ ++exit: ++_func_exit_; ++ return; ++} ++ ++u32 usb_write_cnt=0; ++u32 usb_complete_cnt=0; ++ ++USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr) ++{ ++ USB_PIPE PipeHandle = NULL; ++ _adapter *padapter = pNdisCEDvice->padapter; ++ ++ ++ if(pNdisCEDvice->nr_endpoint == 11) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_BCNQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[6]; ++ break; ++ case RTL8712_DMA_BMCQ: //HI Queue ++ PipeHandle= padapter->halpriv.pipehdls_r8712[7]; ++ break; ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[8]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[9]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 6) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 4) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VIQ: ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint)); ++ } ++ ++ return PipeHandle; ++ ++} ++ ++DWORD usb_bulkout_zero_complete( LPVOID pZeroContext ) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext; ++ _adapter * padapter = pcontext->padapter; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++_func_enter_; ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_bulkout_zero_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ ++#endif ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ rtw_mfree(pcontext->pbuf, sizeof(int)); ++ } ++ ++ rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context)); ++ } ++ ++_func_exit_; ++ ++ return ERROR_SUCCESS; ++ ++ ++} ++ ++u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ struct zero_bulkout_context *pcontext; ++ unsigned char *pbuf; ++ u8 len = 0 ; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj->usb_extension._lpUsbFuncs; ++ ++ USB_PIPE hPipe; ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ ++ pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context)); ++ ++ pbuf = (unsigned char *)rtw_zmalloc(sizeof(int)); ++ ++ len = 0; ++ ++ pcontext->pbuf = pbuf; ++ pcontext->purb = NULL; ++ pcontext->pirp = NULL; ++ pcontext->padapter = padapter; ++ ++ ++//translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ ++ ++ ++ pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, usb_bulkout_zero_complete, ++ pcontext, USB_OUT_TRANSFER, ++ len, pbuf, 0); ++ ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++ u32 i, bwritezero = _FALSE; ++ u32 ac_tag = addr; ++ ++ u8* ptr; ++ ++ struct intf_priv * pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ _adapter * padapter = pdvobj_priv->padapter; ++ ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame * pxmitframe = (struct xmit_frame *)wmem; ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ USB_PIPE hPipe; ++ ++ u32 bResult = _FALSE; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_port\n")); ++ ++#if (CONFIG_PWRCTRL == 1) ++ if(padapter->pwrctrlpriv.pnp_bstop_trx==_TRUE){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ ++ } ++#endif ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ bResult = _FALSE; ++ goto exit; ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port(%u)\n", __LINE__)); ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitframe->bpending[i] == _FALSE) ++ { ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt++; ++ pxmitframe->bpending[i] = _TRUE; ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ pxmitframe->sz[i] = cnt; ++ pxmitframe->ac_tag[i] = ac_tag; ++ ++ break; ++ } ++ } ++ ++ ++ //TODO: ++ if (pdvobj_priv->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt)); ++ // cnt=cnt+1; ++ bwritezero = _TRUE; ++ ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("cnt=%d\n", cnt)); ++ // cnt=cnt+1; ++ bwritezero = _TRUE; ++ ++ } ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port: pipe handle convert\n")); ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ ++#if 0 ++ // for tx fifo, the maximum payload number is 8, ++ // we workaround this issue here by separate whole fifo into 8 segments. ++ if (cnt <= 500) ++ cnt = 500; ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ++ ("usb_write_port(%u): pxmitframe %X pxmitframe->padapter %X\n",__LINE__, pxmitframe, pxmitframe->padapter)); ++ ++ pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, usb_write_port_complete, ++ pxmitframe, USB_OUT_TRANSFER, ++ cnt, pxmitframe->mem_addr, 0); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ ++ ptr=(u8 *)&pxmitframe->mem; ++ ++#if 0 ++ if (pdvobj_priv->ishighspeed) ++ { ++ ptr=ptr+512; ++ } ++ else ++ { ++ ptr=ptr+64; ++ ++ } ++#endif ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++// if (!pxmitframe->usb_transfer_xmit) ++// padapter->bSurpriseRemoved=_TRUE; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ bResult = _SUCCESS; ++ ++exit: ++_func_exit_; ++ return bResult; ++} ++ ++DWORD usb_write_port_complete( LPVOID Context ) ++{ ++ ++// u8 *ptr; ++ ++ struct xmit_frame * pxmitframe = (struct xmit_frame *) Context; ++ _adapter * padapter = pxmitframe->padapter; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u), pxmitframe %X\n",__FUNCTION__, __LINE__, Context)); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("+usb_write_port_complete\n")); ++ ++ _rtw_spinlock_ex(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; ++ _rtw_spinunlock_ex(&pxmitpriv->lock); ++ ++ if(pxmitpriv->txirp_cnt==0){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++ ++ ++ //not to consider tx fragment ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ ++#else ++ ++ if((*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port)) ++ { ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ } ++ ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ++ ("%s(%u): pxmitpriv %X pxmitpriv->free_xmitframe_cnt %X pxmitframe->padapter %X pxmitframe->padapter %X\n", ++ __LINE__, pxmitpriv, pxmitpriv->free_xmitframe_cnt, pxmitframe->padapter)); ++ ++ rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf); ++ ++_func_exit_; ++ ++ return STATUS_SUCCESS; ++} ++ ++DWORD usb_write_scsi_complete(LPVOID pTxContext) ++{ ++#ifndef PLATFORM_OS_CE ++ struct SCSI_BUFFER_ENTRY *psb_entry = (struct SCSI_BUFFER_ENTRY *)pTxContext; ++ _adapter *padapter = psb_entry->padapter; ++ struct SCSI_BUFFER *psb = padapter->pscsi_buf; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ LPCUSB_FUNCS lpUsbFuncs = pdvobj_priv->pUsbExtension->_lpUsbFuncs; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u): circ_space = %d\n",__FUNCTION__, __LINE__, CIRC_SPACE( psb->head,psb->tail, SCSI_BUFFER_NUMBER))); ++ ++#if 1 ++ ++ (*lpUsbFuncs->lpGetTransferStatus)(psb_entry->usb_transfer_scsi_txcmd, &dwBytesTransferred, &dwErr); ++ fComplete = (*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_scsi_complete CloseTransfer before complete\n")); ++ } ++ (*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd); ++ ++#else ++ ++ if((*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd)) ++ (*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd); ++#endif ++ ++ memset(psb_entry->entry_memory, 0, 8); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if((psb->tail+1)==SCSI_BUFFER_NUMBER) ++ psb->tail=0; ++ else ++ psb->tail++; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if(CIRC_CNT(psb->head,psb->tail,SCSI_BUFFER_NUMBER)==0){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("write_txcmd_scsififo_callback: up_sema\n")); ++ _rtw_up_sema(&pxmitpriv->xmit_sema); ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if(padapter->bSurpriseRemoved) { ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++_func_exit_; ++#endif ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++} ++ ++uint usb_write_scsi(struct intf_hdl *pintfhdl, u32 cnt, u8 *wmem) ++{ ++ ++#ifndef PLATFORM_OS_CE ++ ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdev = (struct dvobj_priv*)&padapter->dvobjpriv; ++ ++ struct SCSI_BUFFER *psb =padapter->pscsi_buf; ++ struct SCSI_BUFFER_ENTRY *psb_entry=LIST_CONTAINOR(wmem,struct SCSI_BUFFER_ENTRY,entry_memory); ++ ++_func_enter_; ++ if(padapter->bSurpriseRemoved||padapter->bDriverStopped) ++ return 0; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ psb_entry->usb_transfer_scsi_txcmd=pdev->pUsbExtension->_lpUsbFuncs->lpIssueBulkTransfer( ++ pdev->scsi_out_pipehandle, ++ usb_write_scsi_complete, ++ psb_entry, ++ USB_OUT_TRANSFER, ++ cnt, ++ wmem, ++ 0); ++ ++_func_exit_; ++#endif ++ ++ return _SUCCESS; ++} ++ ++ ++/* ++ */ ++uint usb_init_intf_priv(struct intf_priv *pintfpriv) ++{ ++ // get the dvobj_priv object ++ struct dvobj_priv * pNdisCEDvice = (struct dvobj_priv *) pintfpriv->intf_dev; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ // set init intf_priv init status as _IOREADY ++ pintfpriv->intf_status = _IOREADY; ++ ++ // determine the max io size by dvobj_priv.ishighspeed ++ if(pNdisCEDvice->ishighspeed) ++ pintfpriv->max_iosz = 128; ++ else ++ pintfpriv->max_iosz = 64; ++ ++ // read/write size set as 0 ++ pintfpriv->io_wsz = 0; ++ pintfpriv->io_rsz = 0; ++ ++ // init io_rwmem buffer ++ pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ if (pintfpriv->allocated_io_rwmem == NULL) ++ { ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4); ++ return _FAIL; ++ } ++ else ++ { ++ // word align the io_rwmem ++ pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 - ( (u32)(pintfpriv->allocated_io_rwmem) & 3); ++ } ++ ++#ifndef PLATFORM_OS_CE ++ ++ // init io_r_mem buffer ++ pintfpriv->allocated_io_r_mem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ if (pintfpriv->allocated_io_r_mem == NULL) ++ { ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz +4); ++ return _FAIL; ++ } ++ else ++ { ++ // word align the io_rwmem ++ pintfpriv->io_r_mem = pintfpriv->allocated_io_r_mem + 4 - ( (u32)(pintfpriv->allocated_io_r_mem) & 3); ++ } ++#endif ++ ++ return _SUCCESS; ++} ++ ++void usb_unload_intf_priv(struct intf_priv *pintfpriv) ++{ ++#ifndef PLATFORM_OS_CE ++ ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4); ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz+4); ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++} ++ ++ ++ ++void usb_write_port_cancel(_adapter *padapter) ++{ ++ ++ sint i,j; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ struct xmit_frame *pxmitframe; ++ ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ if (pxmitpriv->txirp_cnt) ++ { ++ // Canceling Pending Recv Irp ++ pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf; ++ ++ for( i = 0; i < NR_XMITFRAME; i++ ) ++ { ++ for(j=0;j<8;j++) ++ { ++ if (pxmitframe->bpending[j]==_TRUE) ++ { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n")); ++ ++ } ++ } ++ ++ pxmitframe++; ++ } ++ ++ _rtw_down_sema(&(pxmitpriv->tx_retevt)); ++ ++ } ++ ++} ++ ++DWORD usbctrl_vendorreq_complete(LPVOID lpvNotifyParameter) ++{ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)lpvNotifyParameter; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq_complete\n")); ++ ++ return STATUS_SUCCESS; ++} ++ ++ ++int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ u8 ret=_TRUE; ++// NTSTATUS ntstatus; ++// int fComplete; ++// LPCUSB_DEVICE lpDeviceInfo; ++ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfpriv->intf_dev; ++ ++ USB_TRANSFER usbTrans; ++ USB_DEVICE_REQUEST usb_device_req; ++ USB_HANDLE usbHandle = pdvobjpriv->usb_extension._hDevice; ++ LPCUSB_FUNCS usbFuncs = pdvobjpriv->usb_extension._lpUsbFuncs; ++ ++ u32 transfer_flags = 0; ++ ++ _func_enter_; ++ ++ memset( &usb_device_req, 0, sizeof( USB_DEVICE_REQUEST ) ); ++ ++ if( 0x01 == requesttype ) ++ { ++ usb_device_req.bmRequestType = USB_REQUEST_DEVICE_TO_HOST | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE; ++ } ++ else ++ { ++ usb_device_req.bmRequestType = USB_REQUEST_HOST_TO_DEVICE | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE; ++ } ++ ++ usb_device_req.bRequest = request; ++ usb_device_req.wValue = value; ++ usb_device_req.wIndex = index; ++ usb_device_req.wLength = len; ++ ++ if (requesttype == 0x01) ++ { ++ transfer_flags = USB_IN_TRANSFER;//read_in ++ } ++ else ++ { ++ transfer_flags= USB_OUT_TRANSFER;//write_out ++ } ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq\n",__FUNCTION__,__LINE__)); ++ ++#if 0 ++ // Remember to add callback for sync ++ usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, ++ usbctrl_vendorreq_complete, pdvobjpriv, ++ transfer_flags, &usb_device_req, pdata, 0); ++#else ++ // Remember to add callback for sync ++ usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, ++ NULL, 0, ++ transfer_flags, &usb_device_req, pdata, 0); ++#endif ++ ++// rtw_usleep_os(10); ++ ++ if ( usbTrans ) ++ { ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ int fComplete; ++ ++ (*usbFuncs->lpGetTransferStatus)(usbTrans, &dwBytes, &dwErr); ++ ++ fComplete = (*usbFuncs->lpIsTransferComplete)(usbTrans); ++ ++ if (fComplete== _TRUE) ++ { ++ (*usbFuncs->lpCloseTransfer)(usbTrans); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("usbctrl_vendorreq lpCloseTransfer\n")); ++ } ++ ++ if ( dwErr != USB_NO_ERROR || fComplete != _TRUE) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq lpCloseTransfer without complete\n")); ++ ret = _FALSE; ++ goto exit; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq without usbTrans\n")); ++ ret = _FALSE; ++ goto exit; ++ ++ } ++ ++exit: ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("-usbctrl_vendorreq\n")); ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c +@@ -0,0 +1,1536 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ _adapter *padapter = pintfhdl->padapter; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct usb_device *udev = pdvobjpriv->pusbdev; ++ ++ unsigned int pipe; ++ int status = 0; ++ u32 tmp_buflen=0; ++ u8 reqtype; ++ u8 *pIo_buf; ++ int vendorreq_times = 0; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ u8 *tmp_buf; ++ #else // use stack memory ++ u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; ++ #endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type > PRIMARY_ADAPTER) ++ { ++ padapter = padapter->pbuddy_adapter; ++ pdvobjpriv = adapter_to_dvobj(padapter); ++ udev = pdvobjpriv->pusbdev; ++ } ++#endif ++ ++ ++ //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); ++ ++ if((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ status = -EPERM; ++ goto exit; ++ } ++ ++ if(len>MAX_VENDOR_REQ_CMD_SIZE){ ++ DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); ++ status = -EINVAL; ++ goto exit; ++ } ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); ++ #endif ++ ++ ++ // Acquire IO memory for vendorreq ++#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ pIo_buf = pdvobjpriv->usb_vendor_req_buf; ++#else ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); ++ tmp_buflen = (u32)len + ALIGNMENT_UNIT; ++ #else // use stack memory ++ tmp_buflen = MAX_USB_IO_CTL_SIZE; ++ #endif ++ ++ // Added by Albert 2010/02/09 ++ // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. ++ // Trying to fix it here. ++ pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); ++#endif ++ ++ if ( pIo_buf== NULL) { ++ DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); ++ status = -ENOMEM; ++ goto release_mutex; ++ } ++ ++ while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) ++ { ++ _rtw_memset(pIo_buf, 0, len); ++ ++ if (requesttype == 0x01) ++ { ++ pipe = usb_rcvctrlpipe(udev, 0);//read_in ++ reqtype = REALTEK_USB_VENQT_READ; ++ } ++ else ++ { ++ pipe = usb_sndctrlpipe(udev, 0);//write_out ++ reqtype = REALTEK_USB_VENQT_WRITE; ++ _rtw_memcpy( pIo_buf, pdata, len); ++ } ++ ++ #if 0 ++ //timeout test for firmware downloading ++ status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len ++ , ((value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) ||value!=0x1000) ?RTW_USB_CONTROL_MSG_TIMEOUT : RTW_USB_CONTROL_MSG_TIMEOUT_TEST ++ ); ++ #else ++ status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); ++ #endif ++ ++ if ( status == len) // Success this control transfer. ++ { ++ rtw_reset_continual_urb_error(pdvobjpriv); ++ if ( requesttype == 0x01 ) ++ { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. ++ _rtw_memcpy( pdata, pIo_buf, len ); ++ } ++ } ++ else { // error cases ++ DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" ++ , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); ++ ++ if (status < 0) { ++ if(status == (-ESHUTDOWN) || status == -ENODEV ) ++ { ++ padapter->bSurpriseRemoved = _TRUE; ++ } else { ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; ++ } ++ #endif ++ } ++ } ++ else // status != len && status >= 0 ++ { ++ if(status > 0) { ++ if ( requesttype == 0x01 ) ++ { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. ++ _rtw_memcpy( pdata, pIo_buf, len ); ++ } ++ } ++ } ++ ++ if(rtw_inc_and_chk_continual_urb_error(pdvobjpriv) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ break; ++ } ++ ++ } ++ ++ // firmware download is checksumed, don't retry ++ if( (value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) || status == len ) ++ break; ++ ++ } ++ ++ // release IO memory used by vendorreq ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ rtw_mfree(tmp_buf, tmp_buflen); ++ #endif ++ ++release_mutex: ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); ++ #endif ++exit: ++ return status; ++ ++} ++ ++static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 1; ++ ++ usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return (u8)(le32_to_cpu(data)&0x0ff); ++ ++} ++ ++static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 2; ++ ++ usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return (u16)(le32_to_cpu(data)&0xffff); ++ ++} ++ ++static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 4; ++ ++ usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return le32_to_cpu(data); ++ ++} ++ ++static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 1; ++ ++ data = val; ++ data = cpu_to_le32(data&0x000000ff); ++ ++ ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 2; ++ ++ data = val; ++ data = cpu_to_le32(data&0x0000ffff); ++ ++ ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 4; ++ data = cpu_to_le32(val); ++ ++ ++ ret =usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; ++ int ret; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = length; ++ _rtw_memcpy(buf, pdata, len ); ++ ++ ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ int err; ++ _adapter *padapter = (_adapter *)purb->context; ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if (purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX)) ++ { ++ DBG_8192C("usb_read_interrupt_complete: purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX) \n"); ++ } ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); ++ } ++ } ++ else ++ { ++ DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ break; ++ case -EINPROGRESS: ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ break; ++ } ++ } ++ ++} ++ ++static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ int err; ++ unsigned int pipe; ++ u32 ret = _SUCCESS; ++ _adapter *adapter = pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++_func_enter_; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, ++ precvpriv->int_in_buf, ++ sizeof(INTERRUPT_MSG_FORMAT_EX), ++ usb_read_interrupt_complete, ++ adapter, ++ 1); ++ ++ err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif ++ ++static s32 pre_recv_entry(union recv_frame *precvframe, struct recv_stat *prxstat, struct phy_stat *pphy_info) ++{ ++ s32 ret=_SUCCESS; ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 *primary_myid, *secondary_myid, *paddr1; ++ union recv_frame *precvframe_if2 = NULL; ++ _adapter *primary_padapter = precvframe->u.hdr.adapter; ++ _adapter *secondary_padapter = primary_padapter->pbuddy_adapter; ++ struct recv_priv *precvpriv = &primary_padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ u8 *pbuf = precvframe->u.hdr.rx_data; ++ ++ if(!secondary_padapter) ++ return ret; ++ ++ paddr1 = GetAddr1Ptr(precvframe->u.hdr.rx_data); ++ ++ if(IS_MCAST(paddr1) == _FALSE)//unicast packets ++ { ++ //primary_myid = myid(&primary_padapter->eeprompriv); ++ secondary_myid = myid(&secondary_padapter->eeprompriv); ++ ++ if(_rtw_memcmp(paddr1, secondary_myid, ETH_ALEN)) ++ { ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ } ++ ++ //ret = recv_entry(precvframe); ++ ++ } ++ else // Handle BC/MC Packets ++ { ++ ++ u8 clone = _TRUE; ++#if 0 ++ u8 type, subtype, *paddr2, *paddr3; ++ ++ type = GetFrameType(pbuf); ++ subtype = GetFrameSubType(pbuf); //bit(7)~bit(2) ++ ++ switch (type) ++ { ++ case WIFI_MGT_TYPE: //Handle BC/MC mgnt Packets ++ if(subtype == WIFI_BEACON) ++ { ++ paddr3 = GetAddr3Ptr(precvframe->u.hdr.rx_data); ++ ++ if (check_fwstate(&secondary_padapter->mlmepriv, _FW_LINKED) && ++ _rtw_memcmp(paddr3, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) ++ { ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ clone = _FALSE; ++ } ++ ++ if(check_fwstate(&primary_padapter->mlmepriv, _FW_LINKED) && ++ _rtw_memcmp(paddr3, get_bssid(&primary_padapter->mlmepriv), ETH_ALEN)) ++ { ++ if(clone==_FALSE) ++ { ++ clone = _TRUE; ++ } ++ else ++ { ++ clone = _FALSE; ++ } ++ ++ precvframe->u.hdr.adapter = primary_padapter; ++ } ++ ++ if(check_fwstate(&primary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) || ++ check_fwstate(&secondary_padapter->mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)) ++ { ++ clone = _TRUE; ++ precvframe->u.hdr.adapter = primary_padapter; ++ } ++ ++ } ++ else if(subtype == WIFI_PROBEREQ) ++ { ++ //probe req frame is only for interface2 ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ clone = _FALSE; ++ } ++ break; ++ case WIFI_CTRL_TYPE: // Handle BC/MC ctrl Packets ++ ++ break; ++ case WIFI_DATA_TYPE: //Handle BC/MC data Packets ++ //Notes: AP MODE never rx BC/MC data packets ++ ++ paddr2 = GetAddr2Ptr(precvframe->u.hdr.rx_data); ++ ++ if(_rtw_memcmp(paddr2, get_bssid(&secondary_padapter->mlmepriv), ETH_ALEN)) ++ { ++ //change to secondary interface ++ precvframe->u.hdr.adapter = secondary_padapter; ++ clone = _FALSE; ++ } ++ ++ break; ++ default: ++ ++ break; ++ } ++#endif ++ ++ if(_TRUE == clone) ++ { ++ //clone/copy to if2 ++ u8 shift_sz = 0; ++ u32 alloc_sz, skb_len; ++ _pkt *pkt_copy = NULL; ++ struct rx_pkt_attrib *pattrib = NULL; ++ ++ precvframe_if2 = rtw_alloc_recvframe(pfree_recv_queue); ++ if(precvframe_if2) ++ { ++ precvframe_if2->u.hdr.adapter = secondary_padapter; ++ ++ _rtw_init_listhead(&precvframe_if2->u.hdr.list); ++ precvframe_if2->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe_if2->u.hdr.len=0; ++ ++ _rtw_memcpy(&precvframe_if2->u.hdr.attrib, &precvframe->u.hdr.attrib, sizeof(struct rx_pkt_attrib)); ++ ++ pattrib = &precvframe_if2->u.hdr.attrib; ++ ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if (pattrib->qos) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ skb_len = pattrib->pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ pkt_copy = rtw_skb_alloc(alloc_sz); ++ ++ if(pkt_copy) ++ { ++ pkt_copy->dev = secondary_padapter->pnetdev; ++ precvframe_if2->u.hdr.pkt = pkt_copy; ++ precvframe_if2->u.hdr.rx_head = pkt_copy->data; ++ precvframe_if2->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, pbuf, skb_len); ++ precvframe_if2->u.hdr.rx_data = precvframe_if2->u.hdr.rx_tail = pkt_copy->data; ++ ++ ++ recvframe_put(precvframe_if2, skb_len); ++ //recvframe_pull(precvframe_if2, drvinfo_sz + RXDESC_SIZE); ++ ++ rtl8192c_translate_rx_signal_stuff(precvframe_if2, pphy_info); ++ ++ ret = rtw_recv_entry(precvframe_if2); ++ ++ } else { ++ rtw_free_recvframe(precvframe_if2, pfree_recv_queue); ++ DBG_8192C("%s()-%d: alloc_skb() failed!\n", __FUNCTION__, __LINE__); ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++ rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info); ++ ++ ret = rtw_recv_entry(precvframe); ++ ++#endif ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ u8 *pbuf; ++ u8 shift_sz = 0; ++ u16 pkt_cnt, drvinfo_sz; ++ u32 pkt_offset, skb_len, alloc_sz; ++ s32 transfer_len; ++ struct recv_stat *prxstat; ++ struct phy_stat *pphy_info = NULL; ++ _pkt *pkt_copy = NULL; ++ union recv_frame *precvframe = NULL; ++ struct rx_pkt_attrib *pattrib = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ ++ ++ transfer_len = (s32)precvbuf->transfer_len; ++ pbuf = precvbuf->pbuf; ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++#if 0 //temp remove when disable usb rx aggregation ++ if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); ++ ++ prxstat = (struct recv_stat *)pbuf; ++ ++ precvframe = rtw_alloc_recvframe(pfree_recv_queue); ++ if(precvframe==NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); ++ DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe->u.hdr.len=0; ++ ++ rtl8192c_query_rx_desc_status(precvframe, prxstat); ++ ++ pattrib = &precvframe->u.hdr.attrib; ++ if(pattrib->physt) ++ { ++ pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET); ++ } ++ ++ pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; ++ ++ if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); ++ DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if (pattrib->qos) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ skb_len = pattrib->pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ pkt_copy = rtw_skb_alloc(alloc_sz); ++ ++ if(pkt_copy) ++ { ++ pkt_copy->dev = padapter->pnetdev; ++ precvframe->u.hdr.pkt = pkt_copy; ++ precvframe->u.hdr.rx_head = pkt_copy->data; ++ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); ++ precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; ++ } ++ else ++ { ++ DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n"); ++ //precvframe->u.hdr.pkt = rtw_skb_clone(pskb); ++ //precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; ++ //precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612); ++ ++ precvframe->u.hdr.pkt = NULL; ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ recvframe_put(precvframe, skb_len); ++ //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ case USB_RX_AGG_MIX: ++ pkt_offset = (u16)_RND128(pkt_offset); ++ break; ++ case USB_RX_AGG_USB: ++ pkt_offset = (u16)_RND4(pkt_offset); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ break; ++ } ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ else ++ { ++ rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info); ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ ++#else ++ rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info); ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++#endif ++ ++ pkt_cnt--; ++ transfer_len -= pkt_offset; ++ pbuf += pkt_offset; ++ precvframe = NULL; ++ pkt_copy = NULL; ++ ++ if(transfer_len>0 && pkt_cnt==0) ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++ }while((transfer_len>0) && (pkt_cnt>0)); ++ ++_exit_recvbuf2recvframe: ++ ++ return _SUCCESS; ++} ++ ++void rtl8192cu_recv_tasklet(void *priv) ++{ ++ struct recv_buf *precvbuf = NULL; ++ _adapter *padapter = (_adapter*)priv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ { ++ DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); ++ ++ break; ++ } ++ ++ ++ recvbuf2recvframe(padapter, precvbuf); ++ ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ ++} ++ ++static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ struct recv_buf *precvbuf = (struct recv_buf *)purb->context; ++ _adapter *padapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ precvpriv->rx_pending_cnt --; ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ ++ goto exit; ++ } ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); ++ ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ rtw_reset_continual_urb_error(adapter_to_dvobj(padapter)); ++ ++ precvbuf->transfer_len = purb->actual_length; ++ ++ //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); ++ rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ tasklet_schedule(&precvpriv->recv_tasklet); ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ ++ DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); ++ ++ if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ case -EILSEQ: ++ case -ETIME: ++ case -ECOMM: ++ case -EOVERFLOW: ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; ++ } ++ #endif ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ break; ++ case -EINPROGRESS: ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ break; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ int err; ++ unsigned int pipe; ++ u32 ret = _SUCCESS; ++ PURB purb = NULL; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ _adapter *adapter = pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ if(precvbuf->pbuf) ++ { ++ precvpriv->rx_pending_cnt++; ++ ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ precvbuf->pbuf, ++ MAX_RECVBUF_SZ, ++ usb_read_port_complete, ++ precvbuf);//context is precvbuf ++ ++ purb->transfer_dma = precvbuf->dma_transfer_addr; ++ purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); ++ DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ++ ret = _FAIL; ++ } ++ ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#else // CONFIG_USE_USB_BUFFER_ALLOC_RX ++static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb) ++{ ++ u8 *pbuf; ++ u8 shift_sz = 0; ++ u16 pkt_cnt; ++ u32 pkt_offset, skb_len, alloc_sz; ++ s32 transfer_len; ++ struct recv_stat *prxstat; ++ struct phy_stat *pphy_info = NULL; ++ _pkt *pkt_copy = NULL; ++ union recv_frame *precvframe = NULL; ++ struct rx_pkt_attrib *pattrib = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ ++ ++ transfer_len = (s32)pskb->len; ++ pbuf = pskb->data; ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++#if 0 //temp remove when disable usb rx aggregation ++ if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); ++ ++ prxstat = (struct recv_stat *)pbuf; ++ ++ precvframe = rtw_alloc_recvframe(pfree_recv_queue); ++ if(precvframe==NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); ++ DBG_8192C("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe->u.hdr.len=0; ++ ++ rtl8192c_query_rx_desc_status(precvframe, prxstat); ++ ++ pattrib = &precvframe->u.hdr.attrib; ++ if(pattrib->physt) ++ { ++ pphy_info = (struct phy_stat *)(pbuf + RXDESC_OFFSET); ++ } ++ ++ pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; ++ ++ if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); ++ DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if (pattrib->qos) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ skb_len = pattrib->pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((pattrib->mfrag == 1)&&(pattrib->frag_num == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ pkt_copy = rtw_skb_alloc(alloc_sz); ++ ++ if(pkt_copy) ++ { ++ pkt_copy->dev = padapter->pnetdev; ++ precvframe->u.hdr.pkt = pkt_copy; ++ precvframe->u.hdr.rx_head = pkt_copy->data; ++ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len); ++ precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; ++ ++ } ++ else ++ { ++ precvframe->u.hdr.pkt = rtw_skb_clone(pskb); ++ if(pkt_copy) ++ { ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; ++ precvframe->u.hdr.rx_end = pbuf + alloc_sz; ++ } ++ else ++ { ++ DBG_8192C("recvbuf2recvframe: rtw_skb_clone fail\n"); ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ goto _exit_recvbuf2recvframe; ++ } ++ } ++ ++ recvframe_put(precvframe, skb_len); ++ //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ case USB_RX_AGG_MIX: ++ pkt_offset = (u16)_RND128(pkt_offset); ++ break; ++ case USB_RX_AGG_USB: ++ pkt_offset = (u16)_RND4(pkt_offset); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ break; ++ } ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ if(pre_recv_entry(precvframe, prxstat, pphy_info) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ else ++ { ++ rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info); ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ ++#else ++ rtl8192c_translate_rx_signal_stuff(precvframe, pphy_info); ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++#endif ++ ++ pkt_cnt--; ++ transfer_len -= pkt_offset; ++ pbuf += pkt_offset; ++ precvframe = NULL; ++ pkt_copy = NULL; ++ ++ if(transfer_len>0 && pkt_cnt==0) ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++ }while((transfer_len>0) && (pkt_cnt>0)); ++ ++_exit_recvbuf2recvframe: ++ ++ return _SUCCESS; ++} ++ ++void rtl8192cu_recv_tasklet(void *priv) ++{ ++ _pkt *pskb; ++ _adapter *padapter = (_adapter*)priv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ { ++ DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); ++ rtw_skb_free(pskb); ++ break; ++ } ++ ++ recvbuf2recvframe(padapter, pskb); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ ++ skb_reset_tail_pointer(pskb); ++ ++ pskb->len = 0; ++ ++ skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); ++ ++#else ++ rtw_skb_free(pskb); ++#endif ++ ++ } ++ ++} ++ ++ ++static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ _irqL irqL; ++ uint isevt, *pbuf; ++ struct recv_buf *precvbuf = (struct recv_buf *)purb->context; ++ _adapter *padapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ //_enter_critical(&precvpriv->lock, &irqL); ++ //precvbuf->irp_pending=_FALSE; ++ //precvpriv->rx_pending_cnt --; ++ //_exit_critical(&precvpriv->lock, &irqL); ++ ++ precvpriv->rx_pending_cnt --; ++ ++ //if(precvpriv->rx_pending_cnt== 0) ++ //{ ++ // RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); ++ // _rtw_up_sema(&precvpriv->allrxreturnevt); ++ //} ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ ++ #ifdef CONFIG_PREALLOC_RECV_SKB ++ precvbuf->reuse = _TRUE; ++ #else ++ if(precvbuf->pskb){ ++ DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); ++ rtw_skb_free(precvbuf->pskb); ++ } ++ #endif ++ DBG_8192C("%s()-%d: RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n", ++ __FUNCTION__, __LINE__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel); ++ goto exit; ++ } ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); ++ precvbuf->reuse = _TRUE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ DBG_8192C("%s()-%d: RX Warning!\n", __FUNCTION__, __LINE__); ++ } ++ else ++ { ++ rtw_reset_continual_urb_error(adapter_to_dvobj(padapter)); ++ ++ precvbuf->transfer_len = purb->actual_length; ++ skb_put(precvbuf->pskb, purb->actual_length); ++ skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); ++ ++ if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) ++ tasklet_schedule(&precvpriv->recv_tasklet); ++ ++ precvbuf->pskb = NULL; ++ precvbuf->reuse = _FALSE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ ++ DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); ++ ++ if(rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(padapter)) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ case -EILSEQ: ++ case -ETIME: ++ case -ECOMM: ++ case -EOVERFLOW: ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; ++ } ++ #endif ++ precvbuf->reuse = _TRUE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ break; ++ case -EINPROGRESS: ++ precvpriv->read_port_complete_EINPROGRESS_cnt++; ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ precvpriv->read_port_complete_other_urb_err_cnt++; ++ break; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ _irqL irqL; ++ int err; ++ unsigned int pipe; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ u32 ret = _SUCCESS; ++ PURB purb = NULL; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ _adapter *adapter = pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter); ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) ++ { ++ if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) ++ { ++ precvbuf->reuse = _TRUE; ++ } ++ } ++#endif ++ ++ ++ if(precvbuf !=NULL) ++ { ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ //re-assign for linux based on skb ++ if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) ++ { ++ precvbuf->pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++ ++ if(precvbuf->pskb == NULL) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); ++ precvpriv->recvbuf_skb_alloc_fail_cnt++; ++ return _FAIL; ++ } ++ ++ tmpaddr = (SIZE_PTR)precvbuf->pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); ++ precvbuf->pend = skb_end_pointer(precvbuf->pskb); ++ precvbuf->pbuf = precvbuf->pskb->data; ++ } ++ else//reuse skb ++ { ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ precvbuf->ptail = skb_tail_pointer(precvbuf->pskb); ++ precvbuf->pend = skb_end_pointer(precvbuf->pskb); ++ precvbuf->pbuf = precvbuf->pskb->data; ++ ++ precvbuf->reuse = _FALSE; ++ } ++ ++ //_enter_critical(&precvpriv->lock, &irqL); ++ //precvpriv->rx_pending_cnt++; ++ //precvbuf->irp_pending = _TRUE; ++ //_exit_critical(&precvpriv->lock, &irqL); ++ ++ precvpriv->rx_pending_cnt++; ++ ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ precvbuf->pbuf, ++ MAX_RECVBUF_SZ, ++ usb_read_port_complete, ++ precvbuf);//context is precvbuf ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); ++ DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ++ ret = _FAIL; ++ } ++ } ++ else ++ { ++ precvpriv->recvbuf_null_cnt++; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++void rtl8192cu_xmit_tasklet(void *priv) ++{ ++ int ret = _FALSE; ++ _adapter *padapter = (_adapter*)priv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ return; ++ ++ while(1) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) ++ { ++ DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); ++ break; ++ } ++ ++ ret = rtl8192cu_xmitframe_complete(padapter, pxmitpriv, NULL); ++ ++ if(ret==_FALSE) ++ break; ++ ++ } ++ ++} ++ ++void rtl8192cu_set_intf_ops(struct _io_ops *pops) ++{ ++ _func_enter_; ++ ++ _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); ++ ++ pops->_read8 = &usb_read8; ++ pops->_read16 = &usb_read16; ++ pops->_read32 = &usb_read32; ++ pops->_read_mem = &usb_read_mem; ++ pops->_read_port = &usb_read_port; ++ ++ pops->_write8 = &usb_write8; ++ pops->_write16 = &usb_write16; ++ pops->_write32 = &usb_write32; ++ pops->_writeN = &usb_writeN; ++ ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++ pops->_write8_async= &usb_async_write8; ++ pops->_write16_async = &usb_async_write16; ++ pops->_write32_async = &usb_async_write32; ++#endif ++ pops->_write_mem = &usb_write_mem; ++ pops->_write_port = &usb_write_port; ++ ++ pops->_read_port_cancel = &usb_read_port_cancel; ++ pops->_write_port_cancel = &usb_write_port_cancel; ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ pops->_read_interrupt = &usb_read_interrupt; ++#endif ++ ++ _func_exit_; ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c +@@ -0,0 +1,1265 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ #error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ #error "CONFIG_USB_HCI shall be on!\n" ++#endif ++ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++ ++struct zero_bulkout_context ++{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++#define usb_write_cmd usb_write_mem ++#define usb_read_cmd usb_read_mem ++#define usb_write_cmd_complete usb_write_mem_complete ++//#define usb_read_cmd_complete usb_read_mem_complete ++ ++ ++ ++uint usb_init_intf_priv(struct intf_priv *pintfpriv) ++{ ++ ++ PURB piorw_urb; ++ u8 NextDeviceStackSize; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ _adapter * padapter=pdev->padapter; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n +usb_init_intf_priv\n")); ++ ++ pintfpriv->intf_status = _IOREADY; ++ ++ if(pdev->ishighspeed) pintfpriv->max_iosz = 128; ++ else pintfpriv->max_iosz = 64; ++ ++ ++ _init_timer(&pintfpriv->io_timer, padapter->hndis_adapter, io_irp_timeout_handler, pintfpriv); ++ ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("usb_init_intf_priv:pintfpriv->max_iosz:%d\n",pintfpriv->max_iosz)); ++ ++ pintfpriv->io_wsz = 0; ++ pintfpriv->io_rsz = 0; ++ ++ pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ ++ if (pintfpriv->allocated_io_rwmem == NULL){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_init_intf_priv:pintfpriv->allocated_io_rwmem == NULL\n")); ++ goto usb_init_intf_priv_fail; ++ } ++ ++ pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 \ ++ -( (u32)(pintfpriv->allocated_io_rwmem) & 3); ++ ++ ++ ++ NextDeviceStackSize = (u8)pdev->nextdevstacksz;//pintfpriv->pUsbDevObj->StackSize + 1; ++ ++ piorw_urb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB) ); ++ if(piorw_urb == NULL) ++ goto usb_init_intf_priv_fail; ++ ++ pintfpriv->piorw_urb = piorw_urb; ++ ++ pintfpriv->piorw_irp = IoAllocateIrp(NextDeviceStackSize , FALSE); ++ ++ ++ pintfpriv->io_irp_cnt=1; ++ pintfpriv->bio_irp_pending=_FALSE; ++ ++ _rtw_init_sema(&(pintfpriv->io_retevt), 0);//NdisInitializeEvent(&pintfpriv->io_irp_return_evt); ++ ++_func_exit_; ++ return _SUCCESS; ++ ++usb_init_intf_priv_fail: ++ ++ if (pintfpriv->allocated_io_rwmem) ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4); ++ ++ if(piorw_urb) ++ ExFreePool(piorw_urb); ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n -usb_init_intf_priv(usb_init_intf_priv_fail)\n")); ++ ++_func_exit_; ++ return _FAIL; ++ ++} ++ ++void usb_unload_intf_priv(struct intf_priv *pintfpriv) ++{ ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n+usb_unload_intf_priv\n")); ++ ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4); ++ ++#ifdef PLATFORM_WINDOWS ++ if(pintfpriv->piorw_urb) ++ ExFreePool(pintfpriv->piorw_urb); ++ ++ if(pintfpriv->piorw_irp) ++ IoFreeIrp(pintfpriv->piorw_irp); ++#endif ++ ++ ++#ifdef PLATFORM_LINUX ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npintfpriv->io_irp_cnt=%d\n",pintfpriv->io_irp_cnt)); ++ pintfpriv->io_irp_cnt--; ++ if(pintfpriv->io_irp_cnt){ ++ if(pintfpriv->bio_irp_pending==_TRUE){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\nkill iorw_urb\n")); ++ usb_kill_urb(pintfpriv->piorw_urb); ++ } ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n wait io_retevt\n")); ++ _rtw_down_sema(&(pintfpriv->io_retevt)); ++ } ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n cancel io_urb ok\n")); ++#endif ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n-usb_unload_intf_priv\n")); ++ ++_func_exit_; ++ ++} ++ ++void *ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr) ++{ ++ HANDLE PipeHandle = NULL; ++ _adapter *padapter = pNdisCEDvice->padapter; ++ ++ ++ if(pNdisCEDvice->nr_endpoint == 11) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_BCNQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[6]; ++ break; ++ case RTL8712_DMA_BMCQ: //HI Queue ++ PipeHandle= padapter->halpriv.pipehdls_r8712[7]; ++ break; ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[8]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[9]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 6) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 4) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ //case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ //case RTL8712_DMA_VIQ: ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint)); ++ } ++ ++ return PipeHandle; ++ ++} ++ ++ ++NTSTATUS usb_bulkout_zero_complete( ++ PDEVICE_OBJECT pUsbDevObj, ++ PIRP pIrp, void* pZeroContext) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext; ++ ++_func_enter_; ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ ExFreePool(pcontext->pbuf); ++ } ++ ++ if(pcontext->purb) ++ { ++ ExFreePool(pcontext->purb); ++ } ++ ++ if(pcontext->pirp && (pIrp ==pcontext->pirp)) ++ { ++ IoFreeIrp(pIrp); ++ } ++ ++ ExFreePool(pcontext); ++ } ++ ++_func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++ ++} ++ ++u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ struct zero_bulkout_context *pcontext; ++ unsigned char *pbuf; ++ char NextDeviceStackSize, len; ++ PIO_STACK_LOCATION nextStack; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ PIRP pirp = NULL; ++ PURB purb = NULL; ++ NDIS_STATUS ndisStatus = NDIS_STATUS_SUCCESS; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ len = 0; ++ NextDeviceStackSize = (char)pdvobj->nextdevstacksz; ++ ++ pcontext = (struct zero_bulkout_context *)ExAllocatePool(NonPagedPool, sizeof(struct zero_bulkout_context)); ++ pbuf = (unsigned char *)ExAllocatePool(NonPagedPool, sizeof(int)); ++ purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB)); ++ pirp = IoAllocateIrp(NextDeviceStackSize, FALSE); ++ ++ pcontext->pbuf = pbuf; ++ pcontext->purb = purb; ++ pcontext->pirp = pirp; ++ pcontext->padapter = padapter; ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdvobj, addr); ++ ++ ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ pbuf, ++ NULL, ++ len, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ //Set Completion Routine ++ IoSetCompletionRoutine(pirp, // irp to use ++ usb_bulkout_zero_complete, // callback routine ++ pcontext, // context ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ ++ // Call IoCallDriver to send the irp to the usb bus driver ++ // ++ ndisStatus = IoCallDriver(pdvobj->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) ++ { ++ padapter->bDriverStopped=_TRUE; ++ padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ // ++ // The usb bus driver should always return STATUS_PENDING when bulk out irp async ++ // ++ if ( ndisStatus != STATUS_PENDING ) ++ { ++ return _FAIL; ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ _func_enter_; ++ ++ ++ ++ _func_exit_; ++} ++ ++NTSTATUS usb_write_mem_complete(PDEVICE_OBJECT pUsbDevObj, PIRP piowrite_irp, PVOID pusb_cnxt) ++{ ++ ++ _irqL irqL; ++ _list *head, *plist; ++ struct io_req *pio_req; ++ struct io_queue *pio_q = (struct io_queue *) pusb_cnxt; ++ struct intf_hdl *pintf = &(pio_q->intf); ++ struct intf_priv *pintfpriv = pintf->pintfpriv; ++ _adapter *padapter = (_adapter *)pintf->adapter; ++ NTSTATUS status = STATUS_SUCCESS; ++ ++ head = &(pio_q->processing); ++ ++ _func_enter_; ++ ++ _enter_critical_bh(&(pio_q->lock), &irqL); ++ ++ pintfpriv->io_irp_cnt--; ++ if(pintfpriv->io_irp_cnt ==0){ ++ _rtw_up_sema(&(pintfpriv->io_retevt)); ++ } ++ ++ pintfpriv->bio_irp_pending=_FALSE; ++ ++ switch(piowrite_irp->IoStatus.Status) ++ { ++ case STATUS_SUCCESS: ++ break; ++ ++ default: ++ padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usbAsynIntOutComplete:pioread_irp->IoStatus.Status !=STATUS_SUCCESS\n")); ++ break; ++ } ++ ++ //free irp in processing list... ++ while(rtw_is_list_empty(head) != _TRUE) ++ { ++ plist = get_next(head); ++ rtw_list_delete(plist); ++ pio_req = LIST_CONTAINOR(plist, struct io_req, list); ++ _rtw_up_sema(&pio_req->sema); ++ } ++ ++ _exit_critical_bh(&(pio_q->lock), &irqL); ++ ++ _func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ u32 bwritezero; ++ _irqL irqL; ++ USBD_STATUS usbdstatus; ++ PIO_STACK_LOCATION nextStack; ++ HANDLE PipeHandle; ++ struct io_req *pio_req; ++ ++ _adapter *adapter = (_adapter *)pintfhdl->adapter; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ PURB piorw_urb = pintfpriv->piorw_urb; ++ PIRP piorw_irp = pintfpriv->piorw_irp; ++ struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ NTSTATUS NtStatus = STATUS_SUCCESS; ++ ++ _func_enter_; ++ ++ pio_req = alloc_ioreq(pio_queue); ++ ++ if ((pio_req == NULL)||(adapter->bSurpriseRemoved)){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved )); ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pio_queue->lock), &irqL); ++ ++ rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing)); ++ ++ ++#ifdef NDIS51_MINIPORT ++ IoReuseIrp(piorw_irp, STATUS_SUCCESS); ++#else ++ piorw_irp->Cancel = _FALSE; ++#endif ++ ++ if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ _func_exit_; ++ return; ++ } ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdev, addr); ++ ++ ++ pintfpriv->io_irp_cnt++; ++ pintfpriv->bio_irp_pending=_TRUE; ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ piorw_urb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ (PVOID)wmem, ++ NULL, ++ cnt, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(piorw_irp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = (PURB)piorw_urb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ IoSetCompletionRoutine( ++ piorw_irp, // irp to use ++ usb_write_mem_complete, // routine to call when irp is done ++ pio_queue, // context to pass routine ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ // ++ // Call IoCallDriver to send the irp to the usb port ++ // ++ NtStatus = IoCallDriver(pdev->pnextdevobj, piorw_irp); ++ usbdstatus = URB_STATUS(piorw_urb); ++ ++ // ++ // The USB driver should always return STATUS_PENDING when ++ // it receives a write irp ++ // ++ if ((NtStatus != STATUS_PENDING) || USBD_HALTED(usbdstatus) ) { ++ ++ if( USBD_HALTED(usbdstatus) ) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_mem():USBD_HALTED(usbdstatus)=%X!\n",USBD_HALTED(usbdstatus)) ); ++ } ++ _func_exit_; ++ return;//STATUS_UNSUCCESSFUL; ++ } ++ ++ _exit_critical_bh(&(pio_queue->lock), &irqL); ++ ++ _rtw_down_sema(&pio_req->sema); ++ free_ioreq(pio_req, pio_queue); ++ ++ ++ bwritezero = _FALSE; ++ if (pdev->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ bwritezero = _TRUE; ++ ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ bwritezero = _TRUE; ++ } ++ ++ ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++} ++ ++NTSTATUS usb_read_port_complete(PDEVICE_OBJECT pUsbDevObj, PIRP pIrp, PVOID context) ++{ ++ uint isevt, *pbuf; ++ struct _URB_BULK_OR_INTERRUPT_TRANSFER *pbulkurb; ++ USBD_STATUS usbdstatus; ++ struct recv_buf *precvbuf = (struct recv_buf *)context; ++ _adapter *adapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct dvobj_priv *dev = (struct dvobj_priv *)&adapter->dvobjpriv; ++ PURB purb = precvbuf->purb; ++ struct intf_hdl *pintfhdl = &adapter->pio_queue->intf; ++ ++ //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ usbdstatus = URB_STATUS(purb); ++ ++ _rtw_spinlock_ex(&precvpriv->lock); ++ precvbuf->irp_pending=_FALSE; ++ precvpriv->rx_pending_cnt --; ++ _rtw_spinunlock_ex(&precvpriv->lock); ++ ++ if(precvpriv->rx_pending_cnt== 0) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&precvpriv->allrxreturnevt); ++ } ++ ++ ++ if( pIrp->Cancel == _TRUE ) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: One IRP has been cancelled succesfully\n")); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ if(adapter->bSurpriseRemoved) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ switch(pIrp->IoStatus.Status) ++ { ++ case STATUS_SUCCESS: ++ ++ pbulkurb = &(precvbuf->purb)->UrbBulkOrInterruptTransfer; ++ if((pbulkurb->TransferBufferLength >(MAX_RECVBUF_SZ)) || (pbulkurb->TransferBufferLength < RXDESC_SIZE) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE)\n")); ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ precvbuf->transfer_len = pbulkurb->TransferBufferLength; ++ ++ pbuf = (uint*)precvbuf->pbuf; ++ ++ if((isevt = *(pbuf+1)&0x1ff) == 0x1ff) ++ { ++ rxcmd_event_hdl(adapter, pbuf);//rx c2h events ++ ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets ++ { ++ //precvbuf->reuse = _TRUE; ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ ++ } ++ ++ break; ++ ++ default: ++ ++ if( !USBD_HALTED(usbdstatus) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete():USBD_HALTED(usbdstatus)=%x (need to handle ) \n",USBD_HALTED(usbdstatus))); ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus)) ); ++ adapter->bDriverStopped = _TRUE; ++ adapter->bSurpriseRemoved = _TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus))) ; ++ } ++ ++ break; ++ ++ } ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ u8 *pdata; ++ u16 size; ++ PURB purb; ++ PIRP pirp; ++ PIO_STACK_LOCATION nextStack; ++ NTSTATUS ntstatus; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ _adapter *adapter = (_adapter *)pdev->padapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ u32 bResult = _FALSE; ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return bResult; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt++; ++ precvbuf->irp_pending = _TRUE; ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ pdata = (u8*)precvbuf->pbuf; ++ ++ size = sizeof( struct _URB_BULK_OR_INTERRUPT_TRANSFER ); ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdev, addr); ++ ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ (USHORT)size, ++ PipeHandle, ++ pdata, ++ NULL, ++ MAX_RECVBUF_SZ, ++ USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK, ++ NULL ++ ); ++ ++ pirp = precvbuf->pirp; ++ ++#if NDIS51_MINIPORT ++ IoReuseIrp(pirp, STATUS_SUCCESS); ++#else ++ pirp->Cancel = _FALSE; ++#endif ++ ++ // call the class driver to perform the operation ++ // and pass the URB to the USB driver stack ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ ++ IoSetCompletionRoutine( ++ pirp, // irp to use ++ usb_read_port_complete, // routine to call when irp is done ++ precvbuf, // context to pass routine ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ // ++ // The IoCallDriver routine ++ // sends an IRP to the driver associated with a specified device object. ++ // ++ ntstatus = IoCallDriver(pdev->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port(): USBD_HALTED(usbdstatus=0x%.8x)=%.8x \n\n", usbdstatus, USBD_HALTED(usbdstatus))); ++ pdev->padapter->bDriverStopped=_TRUE; ++ pdev->padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ if( ntstatus == STATUS_PENDING ) ++ { ++ bResult = _TRUE;// The IRP is pended in USBD as we expected. ++ } ++ else { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! IRP STATUS: %X\n", ntstatus)); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! USB STATUS: %X\n", usbdstatus)); ++ } ++ ++ } ++ else{ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n")); ++ } ++ ++_func_exit_; ++ ++ return bResult; ++ ++} ++ ++void usb_read_port_cancel(_adapter *padapter) ++{ ++ struct recv_buf *precvbuf; ++ sint i; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct recv_priv *precvpriv=&padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n ==>usb_read_port_cancel\n")); ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ if (precvpriv->rx_pending_cnt) ++ { ++ // Canceling Pending Recv Irp ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ ++ for( i = 0; i < NR_RECVBUFF; i++ ) ++ { ++ if (precvbuf->irp_pending == _TRUE) ++ { ++ IoCancelIrp(precvbuf->pirp); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel() :IoCancelIrp\n")); ++ } ++ ++ precvbuf++; ++ } ++ ++ _rtw_down_sema(&precvpriv->allrxreturnevt); ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel:down sema\n")); ++ ++ } ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("<==usb_read_port_cancel\n")); ++ ++} ++ ++NTSTATUS usb_write_port_complete( ++ PDEVICE_OBJECT pUsbDevObj, ++ PIRP pIrp, ++ PVOID pTxContext ++) ++{ ++ u32 i, bIrpSuccess, sz; ++ NTSTATUS status = STATUS_SUCCESS; ++ u8 *ptr; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *) pTxContext; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ _adapter *padapter = pxmitframe->padapter; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct io_queue *pio_queue = (struct io_queue *)padapter->pio_queue; ++ struct intf_hdl *pintfhdl = &(pio_queue->intf); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n")); ++ ++ _rtw_spinlock_ex(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; ++ _rtw_spinunlock_ex(&pxmitpriv->lock); ++ ++ if(pxmitpriv->txirp_cnt==0){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++ ++ status = pIrp->IoStatus.Status; ++ ++ if( status == STATUS_SUCCESS ) ++ bIrpSuccess = _TRUE; ++ else ++ bIrpSuccess = _FALSE; ++ ++ if( pIrp->Cancel == _TRUE ) ++ { ++ if(pxmitframe !=NULL) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pIrp->Cancel == _TRUE,(pxmitframe !=NULL\n")); ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ } ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ if(padapter->bSurpriseRemoved) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ ++ // ++ // Send 0-byte here if necessary. ++ // ++ // ++ // 1. We MUST keep at most one IRP pending in each endpoint, otherwise USB host controler driver will hang. ++ // Besides, even 0-byte IRP shall be count into #IRP sent down, so, we send 0-byte here instead of TxFillDescriptor8187(). ++ // 2. If we don't count 0-byte IRP into an #IRP sent down, Tx will stuck when we download files via BT and ++ // play online video on XP SP1 EHCU. ++ // 2005.12.26, by rcnjko. ++ // ++ ++ ++ for(i=0; i< 8; i++) ++ { ++ if(pIrp == pxmitframe->pxmit_irp[i]) ++ { ++ pxmitframe->bpending[i] = _FALSE;// ++ //ac_tag = pxmitframe->ac_tag[i]; ++ sz = pxmitframe->sz[i]; ++ break; ++ } ++ } ++ ++#if 0 ++ pxmitframe->fragcnt--; ++ if(pxmitframe->fragcnt == 0)// if((pxmitframe->fragcnt == 0) && (pxmitframe->irpcnt == 8)){ ++ { ++ //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pxmitframe->fragcnt == 0\n")); ++ rtw_free_xmitframe(pxmitpriv,pxmitframe); ++ } ++#else ++ ++ //not to consider tx fragment ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++#endif ++ ++ rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf); ++ ++_func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ u32 i, bwritezero; ++ u8 *ptr; ++ PIO_STACK_LOCATION nextStack; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ PIRP pirp = NULL; ++ PURB purb = NULL; ++ NDIS_STATUS ndisStatus = NDIS_STATUS_SUCCESS; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pNdisCEDvice = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *)wmem; ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitframe->bpending[i] == _FALSE) ++ { ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt++; ++ pxmitframe->bpending[i] = _TRUE; ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ pxmitframe->sz[i] = cnt; ++ purb = pxmitframe->pxmit_urb[i]; ++ pirp = pxmitframe->pxmit_irp[i]; ++ ++ //pxmitframe->ac_tag[i] = ac_tag; ++ ++ break; ++ } ++ } ++ ++ bwritezero = _FALSE; ++ if (pNdisCEDvice->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt)); ++ //cnt=cnt+1; ++ bwritezero = _TRUE; ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cnt=%d\n", cnt)); ++ //cnt=cnt+1; ++ bwritezero = _TRUE; ++ } ++ } ++ ++ ++#ifdef NDIS51_MINIPORT ++ IoReuseIrp(pirp, STATUS_SUCCESS); ++#else ++ pirp->Cancel = _FALSE; ++#endif ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pNdisCEDvice, addr); ++ ++ ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ pxmitframe->mem_addr, ++ NULL, ++ cnt, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ //Set Completion Routine ++ IoSetCompletionRoutine(pirp, // irp to use ++ usb_write_port_complete, // callback routine ++ pxmitframe, // context ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ ++ // Call IoCallDriver to send the irp to the usb bus driver ++ // ++ ndisStatus = IoCallDriver(pNdisCEDvice->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): USBD_HALTED(usbdstatus)=%x set bDriverStopped TRUE!\n\n",USBD_HALTED(usbdstatus)) ); ++ padapter->bDriverStopped=_TRUE; ++ padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ // ++ // The usb bus driver should always return STATUS_PENDING when bulk out irp async ++ // ++ if ( ndisStatus != STATUS_PENDING ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): ndisStatus(%x) != STATUS_PENDING!\n\n", ndisStatus)); ++ ++ _func_exit_; ++ ++ return _FAIL; ++ } ++ ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++ ++void usb_write_port_cancel(_adapter *padapter) ++{ ++ ++ sint i,j; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ struct xmit_frame *pxmitframe; ++ ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ if (pxmitpriv->txirp_cnt) ++ { ++ // Canceling Pending Recv Irp ++ pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf; ++ ++ for( i = 0; i < NR_XMITFRAME; i++ ) ++ { ++ for(j=0;j<8;j++) ++ { ++ if (pxmitframe->bpending[j]==_TRUE) ++ { ++ IoCancelIrp(pxmitframe->pxmit_irp[j]); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n")); ++ ++ } ++ } ++ ++ pxmitframe++; ++ } ++ ++ _rtw_down_sema(&(pxmitpriv->tx_retevt)); ++ ++ } ++ ++} ++ ++ ++/*! \brief Wrap the pUrb to an IRP and send this IRP to Bus Driver. Then wait for this IRP completion. ++ The Caller shall be at Passive Level. ++*/ ++NTSTATUS sync_callusbd(struct dvobj_priv *pdvobjpriv, PURB purb) ++{ ++ ++ KEVENT kevent; ++ PIRP irp; ++ IO_STATUS_BLOCK iostatusblock; ++ PIO_STACK_LOCATION nextstack; ++ USBD_STATUS usbdstatus; ++ LARGE_INTEGER waittime; ++ NTSTATUS ntstatus = STATUS_SUCCESS; ++ _adapter *padapter = pdvobjpriv->padapter; ++ ++ ++ _func_enter_; ++ ++// if(padapter->bDriverStopped) { ++// goto exit; ++// } ++ ++ KeInitializeEvent(&kevent, NotificationEvent, _FALSE); ++ irp = IoBuildDeviceIoControlRequest( ++ IOCTL_INTERNAL_USB_SUBMIT_URB, ++ pdvobjpriv->pphysdevobj,//CEdevice->pUsbDevObj, ++ NULL, ++ 0, ++ NULL, ++ 0, ++ _TRUE, ++ &kevent, ++ &iostatusblock); ++ ++ if(irp == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: memory alloc for irp failed\n")); ++ ntstatus=STATUS_INSUFFICIENT_RESOURCES; ++ goto exit; ++ } ++ ++ nextstack = IoGetNextIrpStackLocation(irp); ++ if(nextstack == NULL) ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("IoGetNextIrpStackLocation fail\n")); ++ ++ nextstack->Parameters.Others.Argument1 = purb; ++ ++ // Issue an IRP for Sync IO. ++ ntstatus = IoCallDriver(pdvobjpriv->pphysdevobj, irp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if(ntstatus == STATUS_PENDING) ++ { ++ // Method 1 ++ waittime.QuadPart = -10000 * 50000; ++ ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, &waittime); //8150 code ++ ++ // Method 2 ++ //ntStatus = KeWaitForSingleObject(&Kevent, Executive, KernelMode, FALSE, NULL); //DDK sample ++ ++ usbdstatus = URB_STATUS(purb); ++ ++ if(ntstatus == STATUS_TIMEOUT) ++ { ++ //usbdevice->nIoStuckCnt++; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: TIMEOUT....5000ms\n")); ++ ++ // Method 2 ++ IoCancelIrp(irp); ++ ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, NULL); //DDK sample ++ usbdstatus = URB_STATUS(purb); ++ ++ usbdstatus = USBD_STATUS_SUCCESS; ++ } ++ ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ntstatus; ++ ++} ++int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ PURB purb; ++ u8 ret; ++ unsigned long transferflags; ++ NTSTATUS ntstatus; ++ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfpriv->intf_dev; ++ ++ _func_enter_; ++ ++ ret=_TRUE; ++ purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST) ); ++ if(purb == NULL) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq(): Failed to allocate urb !!!\n")); ++ ret =_FALSE; ++ goto exit; ++ } ++ ++ if (requesttype == 0x01) { ++ transferflags = USBD_TRANSFER_DIRECTION_IN;//read_in ++ } else { ++ transferflags= 0;//write_out ++ } ++ ++ UsbBuildVendorRequest( ++ purb, //Pointer to an URB that is to be formatted as a vendor or class request. ++ URB_FUNCTION_VENDOR_DEVICE, //Indicates the URB is a vendor-defined request for a USB device. ++ sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST), //Specifies the length, in bytes, of the URB. ++ transferflags, //TransferFlags ++ 0, //ReservedBits ++ request, //Request ++ value, //Value ++ index, //Index ++ pdata, //TransferBuffer ++ NULL, //TransferBufferMDL ++ len, //TransferBufferLength ++ NULL //Link ++ ); ++ ++ ntstatus = sync_callusbd(pdvobjpriv, purb); ++ if(!NT_SUCCESS(ntstatus)) ++ { ++ ExFreePool(purb); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usbctrl_vendorreq() : SOMETHING WRONG\n") ); ++ ret = _FALSE; ++ goto exit; ++ } ++ ++ ExFreePool(purb); ++ ++exit: ++ _func_exit_; ++ ++ return ret; ++ ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/ifcfg-wlan0 +@@ -0,0 +1,4 @@ ++#DHCP client ++DEVICE=wlan0 ++BOOTPROTO=dhcp ++ONBOOT=yes +\ No newline at end of file +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CEHWImg.h +@@ -0,0 +1,85 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CE_FW_IMG_H ++#define __INC_HAL8192CE_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/ 6/15, 5:45*/ ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define TSMCImgArrayLength 15706 //v84 TSMC COMMON 2012-04-13 ++#else //#ifdef CONFIG_P2P ++#define TSMCImgArrayLength 16126 //v88 TSMC P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCACutImgArrayLength 16126 //v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCBCutImgArrayLength 15686 //v84 UMC B Cut COMMON 2012-04-13 ++#else //#ifdef CONFIG_P2P ++#define UMCBCutImgArrayLength 16096 //v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength]; ++ ++//8192C_Formal_92CE_PHYforMP_110804 2011-11-23 ++//8188C_Formal_88CE_PHYforMP_111117 2011-11-23 ++ ++#define PHY_REG_2TArrayLength 374 ++extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength]; ++#define PHY_REG_1TArrayLength 374 ++extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength]; ++#define PHY_ChangeTo_1T1RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; ++#define PHY_ChangeTo_1T2RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; ++#define PHY_ChangeTo_2T2RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; ++#define PHY_REG_Array_PGLength 336 ++extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; ++#define PHY_REG_Array_MPLength 4 ++extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; ++#define RadioA_2TArrayLength 282 ++extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength]; ++#define RadioB_2TArrayLength 78 ++extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength]; ++#define RadioA_1TArrayLength 282 ++extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength]; ++#define RadioB_1TArrayLength 1 ++extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength]; ++#define RadioB_GM_ArrayLength 1 ++extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength]; ++// MAC reg V14 - 2011-11-23 ++#define MAC_2T_ArrayLength 174 ++extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength]; ++#define MACPHY_Array_PGLength 1 ++extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength]; ++#define AGCTAB_2TArrayLength 320 ++extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength]; ++#define AGCTAB_1TArrayLength 320 ++extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CE_FW_IMG_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyCfg.h +@@ -0,0 +1,428 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * Module: __INC_HAL8192CPHYCFG_H ++ * ++ * ++ * Note: ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * ++ *****************************************************************************/ ++ /* Check to see if the file has been included already. */ ++#ifndef __INC_HAL8192CPHYCFG_H ++#define __INC_HAL8192CPHYCFG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM 9 ++#define HP_THERMAL_NUM 8 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0A0A ++#else ++#define MAX_AGGR_NUM 0x0909 ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ ++{ \ ++ u1Byte u1bTmp; \ ++ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ ++ u1bTmp |= BIT0; \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ ++ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++ delay_us(100); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++} ++#endif ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++typedef enum _SwChnlCmdID{ ++ CmdID_End, ++ CmdID_SetTxPowerLevel, ++ CmdID_BBRegWrite10, ++ CmdID_WritePortUlong, ++ CmdID_WritePortUshort, ++ CmdID_WritePortUchar, ++ CmdID_RF_WriteReg, ++}SwChnlCmdID; ++ ++ ++/* 1. Switch channel related */ ++typedef struct _SwChnlCmd{ ++ SwChnlCmdID CmdID; ++ u32 Para1; ++ u32 Para2; ++ u32 msDelay; ++}SwChnlCmd; ++ ++typedef enum _HW90_BLOCK{ ++ HW90_BLOCK_MAC = 0, ++ HW90_BLOCK_PHY0 = 1, ++ HW90_BLOCK_PHY1 = 2, ++ HW90_BLOCK_RF = 3, ++ HW90_BLOCK_MAXIMUM = 4, // Never use this ++}HW90_BLOCK_E, *PHW90_BLOCK_E; ++ ++#define RF_PATH_MAX 2 ++ ++#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number ++#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups ++ ++typedef enum _WIRELESS_MODE { ++ WIRELESS_MODE_UNKNOWN = 0x00, ++ WIRELESS_MODE_A = 0x01, ++ WIRELESS_MODE_B = 0x02, ++ WIRELESS_MODE_G = 0x04, ++ WIRELESS_MODE_AUTO = 0x08, ++ WIRELESS_MODE_N_24G = 0x10, ++ WIRELESS_MODE_N_5G = 0x20 ++} WIRELESS_MODE; ++ ++typedef enum _BaseBand_Config_Type{ ++ BaseBand_Config_PHY_REG = 0, //Radio Path A ++ BaseBand_Config_AGC_TAB = 1, //Radio Path B ++}BaseBand_Config_Type, *PBaseBand_Config_Type; ++ ++ ++typedef enum _PHY_Rate_Tx_Power_Offset_Area{ ++ RA_OFFSET_LEGACY_OFDM1, ++ RA_OFFSET_LEGACY_OFDM2, ++ RA_OFFSET_HT_OFDM1, ++ RA_OFFSET_HT_OFDM2, ++ RA_OFFSET_HT_OFDM3, ++ RA_OFFSET_HT_OFDM4, ++ RA_OFFSET_HT_CCK, ++}RA_OFFSET_AREA,*PRA_OFFSET_AREA; ++ ++ ++/* BB/RF related */ ++typedef enum _RF_TYPE_8190P{ ++ RF_TYPE_MIN, // 0 ++ RF_8225=1, // 1 11b/g RF for verification only ++ RF_8256=2, // 2 11b/g/n ++ RF_8258=3, // 3 11a/b/g/n RF ++ RF_6052=4, // 4 11b/g/n RF ++ //RF_6052=5, // 4 11b/g/n RF ++ // TODO: We sholud remove this psudo PHY RF after we get new RF. ++ RF_PSEUDO_11N=5, // 5, It is a temporality RF. ++}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; ++ ++typedef struct _BB_REGISTER_DEFINITION{ ++ u32 rfintfs; // set software control: ++ // 0x870~0x877[8 bytes] ++ ++ u32 rfintfi; // readback data: ++ // 0x8e0~0x8e7[8 bytes] ++ ++ u32 rfintfo; // output data: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rfintfe; // output enable: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rf3wireOffset; // LSSI data: ++ // 0x840~0x84f [16 bytes] ++ ++ u32 rfLSSI_Select; // BB Band Select: ++ // 0x878~0x87f [8 bytes] ++ ++ u32 rfTxGainStage; // Tx gain stage: ++ // 0x80c~0x80f [4 bytes] ++ ++ u32 rfHSSIPara1; // wire parameter control1 : ++ // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] ++ ++ u32 rfHSSIPara2; // wire parameter control2 : ++ // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] ++ ++ u32 rfSwitchControl; //Tx Rx antenna control : ++ // 0x858~0x85f [16 bytes] ++ ++ u32 rfAGCControl1; //AGC parameter control1 : ++ // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] ++ ++ u32 rfAGCControl2; //AGC parameter control2 : ++ // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] ++ ++ u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : ++ // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] ++ ++ u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : ++ // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] ++ ++ u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix ++ // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] ++ ++ u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type ++ // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] ++ ++ u32 rfLSSIReadBack; //LSSI RF readback data SI mode ++ // 0x8a0~0x8af [16 bytes] ++ ++ u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B ++ ++}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; ++ ++#ifdef CONFIG_MP_INCLUDED ++typedef enum _ANTENNA_PATH{ ++ ANTENNA_NONE = 0x00, ++ ANTENNA_D , ++ ANTENNA_C , ++ ANTENNA_CD , ++ ANTENNA_B , ++ ANTENNA_BD , ++ ANTENNA_BC , ++ ANTENNA_BCD , ++ ANTENNA_A , ++ ANTENNA_AD , ++ ANTENNA_AC , ++ ANTENNA_ACD , ++ ANTENNA_AB , ++ ANTENNA_ABD , ++ ANTENNA_ABC , ++ ANTENNA_ABCD ++} ANTENNA_PATH; ++#endif ++ ++typedef struct _R_ANTENNA_SELECT_OFDM{ ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK{ ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8192C( IN PADAPTER Adapter ); ++int PHY_BBConfig8192C( IN PADAPTER Adapter ); ++int PHY_RFConfig8192C( IN PADAPTER Adapter ); ++/* RF config */ ++int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, ++ IN u8* pFileName, ++ IN RF_RADIO_PATH_E eRFPath); ++int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath); ++ ++/* BB/RF readback check for making sure init OK */ ++int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, ++ IN HW90_BLOCK_E CheckBlock, ++ IN RF_RADIO_PATH_E eRFPath ); ++/* Read initi reg value for tx power setting. */ ++void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter, ++ OUT u32* powerlevel ); ++void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++// ++VOID ++PHY_ScanOperationBackup8192C(IN PADAPTER Adapter, ++ IN u8 Operation ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8192C( IN PADAPTER pAdapter, ++ IN HT_CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8192C( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ // Call after initialization ++void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++void ChkFwCmdIoDone( IN PADAPTER Adapter); ++ ++#ifdef USE_WORKITEM ++//extern void SetIOWorkItemCallback( IN PVOID pContext ); ++#else ++//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); ++#endif ++ ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++// ++// IQ calibrate ++// ++VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery); ++ ++// ++// LC calibrate ++// ++VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); ++ ++VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++// ++// Modify the value of the hw register when beacon interval be changed. ++// ++void ++rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter, ++ IN u16 BeaconInterval ); ++ ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) ++#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) ++#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) ++ ++#define PHY_SetMacReg PHY_SetBBReg ++ ++#endif // __INC_HAL8192CPHYCFG_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CPhyReg.h +@@ -0,0 +1,1123 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192CPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192CPHYREG_H ++#define __INC_HAL8192CPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rConfig_Pmpd_AntB 0xb98 ++#define rAPK 0xbd8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg.h +@@ -0,0 +1,105 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CU_FW_IMG_H ++#define __INC_HAL8192CU_FW_IMG_H ++ ++/*Created on 2011/ 6/15, 5:45*/ ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define TSMCImgArrayLength 15706 //v84 TSMC COMMON 2012-04-13 ++#else //#ifdef CONFIG_P2P ++#define TSMCImgArrayLength 16126 //v88 TSMC P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCACutImgArrayLength 16126 //v88 UMC A Cut P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCBCutImgArrayLength 15686 //v84 UMC B Cut COMMON 2012-04-13 ++#else //#ifdef CONFIG_P2P ++#define UMCBCutImgArrayLength 16096 //v88 UMC B Cut P2PPS with CCX report C2H 2012-12-05 ++#endif ++extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength]; ++ ++//8188C_Formal_All_PHYforMP_111117 2011-11-23 ++//8192C_Formal_92CU_PHYforMP_110817 2011-11-23 ++#define PHY_REG_2TArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength]; ++#define PHY_REG_1TArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength]; ++#define PHY_ChangeTo_1T1RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; ++#define PHY_ChangeTo_1T2RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; ++#define PHY_ChangeTo_2T2RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; ++#define PHY_REG_Array_PGLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; ++#define PHY_REG_Array_PG_mCardLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength]; ++#define PHY_REG_Array_MPLength 4 ++extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength]; ++#define PHY_REG_1T_HPArrayLength 378 ++extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength]; ++#define PHY_REG_1T_mCardArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength]; ++#define PHY_REG_2T_mCardArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength]; ++#define PHY_REG_Array_PG_HPLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength]; ++#define RadioA_2TArrayLength 282 ++extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength]; ++#define RadioB_2TArrayLength 78 ++extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength]; ++#define RadioA_1TArrayLength 282 ++extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength]; ++#define RadioB_1TArrayLength 1 ++extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength]; ++#define RadioA_2T_mCardArrayLength 282 ++extern u32 Rtl8192CURadioA_2T_mCardArray[RadioA_2T_mCardArrayLength]; ++#define RadioB_2T_mCardArrayLength 78 ++extern u32 Rtl8192CURadioB_2T_mCardArray[RadioB_2T_mCardArrayLength]; ++#define RadioA_1T_mCardArrayLength 282 ++extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength]; ++#define RadioB_1T_mCardArrayLength 1 ++extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength]; ++#define RadioA_1T_HPArrayLength 282 ++extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength]; ++#define RadioB_GM_ArrayLength 1 ++extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength]; ++ ++// MAC reg V14 - 2011-11-23 ++#define MAC_2T_ArrayLength 174 ++extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength]; ++#define MACPHY_Array_PGLength 1 ++extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength]; ++#define AGCTAB_2TArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength]; ++#define AGCTAB_1TArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength]; ++#define AGCTAB_1T_HPArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192CUHWImg_wowlan.h +@@ -0,0 +1,34 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CU_FW_IMG_WOWLAN_H ++#define __INC_HAL8192CU_FW_IMG_WOWLAN_H ++ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++ ++#define TSMCWWImgArrayLength 13458 ++extern u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength]; ++#define UMCACutWWImgArrayLength 13458 ++extern u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength]; ++#define UMCBCutWWImgArrayLength 13446 ++extern u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_WOWLAN_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DEHWImg.h +@@ -0,0 +1,66 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DE_FW_IMG_H ++#define __INC_HAL8192DE_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/11/11, 8: 8*/ ++ ++#define Rtl8192DEImgArrayLength 32296 ++extern const u8 Rtl8192DEFwImgArray[Rtl8192DEImgArrayLength]; ++#define Rtl8192DEMainArrayLength 1 ++extern const u8 Rtl8192DEFwMainArray[Rtl8192DEMainArrayLength]; ++#define Rtl8192DEDataArrayLength 1 ++extern const u8 Rtl8192DEFwDataArray[Rtl8192DEDataArrayLength]; ++#define Rtl8192DEPHY_REG_2TArrayLength 372 ++extern const u32 Rtl8192DEPHY_REG_2TArray[Rtl8192DEPHY_REG_2TArrayLength]; ++#define Rtl8192DEPHY_REG_1TArrayLength 1 ++extern const u32 Rtl8192DEPHY_REG_1TArray[Rtl8192DEPHY_REG_1TArrayLength]; ++#define Rtl8192DEPHY_REG_Array_PGLength 624 ++extern const u32 Rtl8192DEPHY_REG_Array_PG[Rtl8192DEPHY_REG_Array_PGLength]; ++#define Rtl8192DEPHY_REG_Array_MPLength 12 ++extern const u32 Rtl8192DEPHY_REG_Array_MP[Rtl8192DEPHY_REG_Array_MPLength]; ++#define Rtl8192DERadioA_2TArrayLength 378 ++extern const u32 Rtl8192DERadioA_2TArray[Rtl8192DERadioA_2TArrayLength]; ++#define Rtl8192DERadioB_2TArrayLength 384 ++extern const u32 Rtl8192DERadioB_2TArray[Rtl8192DERadioB_2TArrayLength]; ++#define Rtl8192DERadioA_1TArrayLength 1 ++extern const u32 Rtl8192DERadioA_1TArray[Rtl8192DERadioA_1TArrayLength]; ++#define Rtl8192DERadioB_1TArrayLength 1 ++extern const u32 Rtl8192DERadioB_1TArray[Rtl8192DERadioB_1TArrayLength]; ++#define Rtl8192DERadioA_2T_intPAArrayLength 378 ++extern const u32 Rtl8192DERadioA_2T_intPAArray[Rtl8192DERadioA_2T_intPAArrayLength]; ++#define Rtl8192DERadioB_2T_intPAArrayLength 384 ++extern const u32 Rtl8192DERadioB_2T_intPAArray[Rtl8192DERadioB_2T_intPAArrayLength]; ++#define Rtl8192DEMAC_2T_ArrayLength 192 ++extern const u32 Rtl8192DEMAC_2T_Array[Rtl8192DEMAC_2T_ArrayLength]; ++#define Rtl8192DEAGCTAB_ArrayLength 386 ++extern const u32 Rtl8192DEAGCTAB_Array[Rtl8192DEAGCTAB_ArrayLength]; ++#define Rtl8192DEAGCTAB_5GArrayLength 194 ++extern const u32 Rtl8192DEAGCTAB_5GArray[Rtl8192DEAGCTAB_5GArrayLength]; ++#define Rtl8192DEAGCTAB_2GArrayLength 194 ++extern const u32 Rtl8192DEAGCTAB_2GArray[Rtl8192DEAGCTAB_2GArrayLength]; ++#define Rtl8192DEAGCTAB_2TArrayLength 1 ++extern const u32 Rtl8192DEAGCTAB_2TArray[Rtl8192DEAGCTAB_2TArrayLength]; ++#define Rtl8192DEAGCTAB_1TArrayLength 1 ++extern const u32 Rtl8192DEAGCTAB_1TArray[Rtl8192DEAGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyCfg.h +@@ -0,0 +1,528 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192DPHYCFG_H ++ * ++ * ++ * Note: ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * ++ *****************************************************************************/ ++ /* Check to see if the file has been included already. */ ++#ifndef __INC_HAL8192DPHYCFG_H ++#define __INC_HAL8192DPHYCFG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM 10 ++#define IQK_BB_REG_NUM_92C 9 ++#define IQK_BB_REG_NUM_92D 10 ++#define IQK_BB_REG_NUM_test 6 ++#define index_mapping_NUM 13 ++#define Rx_index_mapping_NUM 15 ++#define AVG_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_Matrix_Settings_NUM 1+24+21 ++ ++#ifdef CONFIG_PCI_HCI ++#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ ++{ \ ++ u1Byte u1bTmp; \ ++ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ ++ u1bTmp |= BIT0; \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ ++ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++ delay_us(100); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++} ++#endif ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++typedef enum _SwChnlCmdID{ ++ CmdID_End, ++ CmdID_SetTxPowerLevel, ++ CmdID_BBRegWrite10, ++ CmdID_WritePortUlong, ++ CmdID_WritePortUshort, ++ CmdID_WritePortUchar, ++ CmdID_RF_WriteReg, ++}SwChnlCmdID; ++ ++ ++/* 1. Switch channel related */ ++typedef struct _SwChnlCmd{ ++ SwChnlCmdID CmdID; ++ u32 Para1; ++ u32 Para2; ++ u32 msDelay; ++}SwChnlCmd; ++ ++typedef enum _HW90_BLOCK{ ++ HW90_BLOCK_MAC = 0, ++ HW90_BLOCK_PHY0 = 1, ++ HW90_BLOCK_PHY1 = 2, ++ HW90_BLOCK_RF = 3, ++ HW90_BLOCK_MAXIMUM = 4, // Never use this ++}HW90_BLOCK_E, *PHW90_BLOCK_E; ++ ++//vivi added this for read parameter from header, 20100908 ++typedef enum _RF_CONTENT{ ++ radioa_txt = 0x1000, ++ radiob_txt = 0x1001, ++ radioc_txt = 0x1002, ++ radiod_txt = 0x1003 ++} RF_CONTENT; ++ ++#define RF_PATH_MAX 2 ++ ++typedef enum _WIRELESS_MODE { ++ WIRELESS_MODE_UNKNOWN = 0x00, ++ WIRELESS_MODE_A = 0x01, ++ WIRELESS_MODE_B = 0x02, ++ WIRELESS_MODE_G = 0x04, ++ WIRELESS_MODE_AUTO = 0x08, ++ WIRELESS_MODE_N_24G = 0x10, ++ WIRELESS_MODE_N_5G = 0x20 ++} WIRELESS_MODE; ++ ++ ++#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number ++#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups ++#define MAX_PG_GROUP 13 ++ ++#define CHANNEL_GROUP_MAX_2G 3 ++#define CHANNEL_GROUP_IDX_5GL 3 ++#define CHANNEL_GROUP_IDX_5GM 6 ++#define CHANNEL_GROUP_IDX_5GH 9 ++#define CHANNEL_GROUP_MAX_5G 9 ++#define CHANNEL_MAX_NUMBER_2G 14 ++ ++typedef enum _BaseBand_Config_Type{ ++ BaseBand_Config_PHY_REG = 0, //Radio Path A ++ BaseBand_Config_AGC_TAB = 1, //Radio Path B ++}BaseBand_Config_Type, *PBaseBand_Config_Type; ++ ++typedef enum _MACPHY_MODE_8192D{ ++ SINGLEMAC_SINGLEPHY, ++ DUALMAC_DUALPHY, ++ DUALMAC_SINGLEPHY, ++}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; ++ ++typedef enum _MACPHY_MODE_CHANGE_ACTION{ ++ DMDP2DMSP = 0, ++ DMSP2DMDP = 1, ++ DMDP2SMSP = 2, ++ SMSP2DMDP = 3, ++ DMSP2SMSP = 4, ++ SMSP2DMSP = 5, ++ MAXACTION ++}MACPHY_MODE_CHANGE_ACTION,*PMACPHY_MODE_CHANGE_ACTION; ++ ++typedef enum _BAND_TYPE{ ++ BAND_ON_2_4G = 0, ++ BAND_ON_5G, ++ BAND_ON_BOTH, ++ BANDMAX ++}BAND_TYPE,*PBAND_TYPE; ++ ++typedef enum _PHY_Rate_Tx_Power_Offset_Area{ ++ RA_OFFSET_LEGACY_OFDM1, ++ RA_OFFSET_LEGACY_OFDM2, ++ RA_OFFSET_HT_OFDM1, ++ RA_OFFSET_HT_OFDM2, ++ RA_OFFSET_HT_OFDM3, ++ RA_OFFSET_HT_OFDM4, ++ RA_OFFSET_HT_CCK, ++}RA_OFFSET_AREA,*PRA_OFFSET_AREA; ++ ++ ++/* BB/RF related */ ++typedef enum _RF_TYPE_8190P{ ++ RF_TYPE_MIN, // 0 ++ RF_8225=1, // 1 11b/g RF for verification only ++ RF_8256=2, // 2 11b/g/n ++ RF_8258=3, // 3 11a/b/g/n RF ++ RF_6052=4, // 4 11b/g/n RF ++ //RF_6052=5, // 4 11b/g/n RF ++ // TODO: We sholud remove this psudo PHY RF after we get new RF. ++ RF_PSEUDO_11N=5, // 5, It is a temporality RF. ++}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; ++ ++typedef struct _BB_REGISTER_DEFINITION{ ++ u32 rfintfs; // set software control: ++ // 0x870~0x877[8 bytes] ++ ++ u32 rfintfi; // readback data: ++ // 0x8e0~0x8e7[8 bytes] ++ ++ u32 rfintfo; // output data: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rfintfe; // output enable: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rf3wireOffset; // LSSI data: ++ // 0x840~0x84f [16 bytes] ++ ++ u32 rfLSSI_Select; // BB Band Select: ++ // 0x878~0x87f [8 bytes] ++ ++ u32 rfTxGainStage; // Tx gain stage: ++ // 0x80c~0x80f [4 bytes] ++ ++ u32 rfHSSIPara1; // wire parameter control1 : ++ // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] ++ ++ u32 rfHSSIPara2; // wire parameter control2 : ++ // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] ++ ++ u32 rfSwitchControl; //Tx Rx antenna control : ++ // 0x858~0x85f [16 bytes] ++ ++ u32 rfAGCControl1; //AGC parameter control1 : ++ // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] ++ ++ u32 rfAGCControl2; //AGC parameter control2 : ++ // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] ++ ++ u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : ++ // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] ++ ++ u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : ++ // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] ++ ++ u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix ++ // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] ++ ++ u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type ++ // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] ++ ++ u32 rfLSSIReadBack; //LSSI RF readback data SI mode ++ // 0x8a0~0x8af [16 bytes] ++ ++ u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B ++ ++}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; ++ ++#ifdef CONFIG_MP_INCLUDED ++typedef enum _ANTENNA_PATH{ ++ ANTENNA_NONE = 0x00, ++ ANTENNA_D , ++ ANTENNA_C , ++ ANTENNA_CD , ++ ANTENNA_B , ++ ANTENNA_BD , ++ ANTENNA_BC , ++ ANTENNA_BCD , ++ ANTENNA_A , ++ ANTENNA_AD , ++ ANTENNA_AC , ++ ANTENNA_ACD , ++ ANTENNA_AB , ++ ANTENNA_ABD , ++ ANTENNA_ABC , ++ ANTENNA_ABCD ++} ANTENNA_PATH; ++#endif ++ ++typedef struct _R_ANTENNA_SELECT_OFDM{ ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK{ ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++//Added for TX Power ++//u8 GetRightChnlPlace(u8 chnl); ++u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl); ++u8 rtl8192d_getChnlGroupfromArray(u8 chnl); ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++extern int PHY_MACConfig8192D( IN PADAPTER Adapter ); ++extern int PHY_BBConfig8192D( IN PADAPTER Adapter ); ++extern int PHY_RFConfig8192D( IN PADAPTER Adapter ); ++/* RF config */ ++int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, ++ IN u8* pFileName, ++ IN RF_RADIO_PATH_E eRFPath); ++int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, ++ IN RF_CONTENT Content, ++ IN RF_RADIO_PATH_E eRFPath); ++/* BB/RF readback check for making sure init OK */ ++int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, ++ IN HW90_BLOCK_E CheckBlock, ++ IN RF_RADIO_PATH_E eRFPath ); ++/* Read initi reg value for tx power setting. */ ++void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter, ++ OUT u32* powerlevel ); ++void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++// ++VOID ++PHY_ScanOperationBackup8192D(IN PADAPTER Adapter, ++ IN u8 Operation ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8192D( IN PADAPTER pAdapter, ++ IN HT_CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8192D( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ // Call after initialization ++void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++extern void ChkFwCmdIoDone( IN PADAPTER Adapter); ++ ++#ifdef USE_WORKITEM ++//extern void SetIOWorkItemCallback( IN PVOID pContext ); ++#else ++//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); ++#endif ++ ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++// ++// IQ calibrate ++// ++void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter); ++ ++ ++// ++// LC calibrate ++// ++void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); ++ ++ ++// ++// Modify the value of the hw register when beacon interval be changed. ++// ++void ++rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter, ++ IN u16 BeaconInterval ); ++ ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++PHY_StopTRXBeforeChangeBand8192D( ++ PADAPTER Adapter ++); ++ ++VOID ++PHY_UpdateBBRFConfiguration8192D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bisBandSwitch ++); ++ ++VOID PHY_ReadMacPhyMode92D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN AutoloadFail ++); ++ ++VOID PHY_ConfigMacPhyMode92D( ++ IN PADAPTER Adapter ++); ++ ++VOID PHY_ConfigMacPhyModeInfo92D( ++ IN PADAPTER Adapter ++); ++ ++VOID PHY_ConfigMacCoexist_RFPage92D( ++ IN PADAPTER Adapter ++); ++ ++VOID ++rtl8192d_PHY_InitRxSetting( ++ IN PADAPTER Adapter ++); ++ ++VOID ++rtl8192d_PHY_ResetIQKResult( ++ IN PADAPTER Adapter ++); ++ ++ ++VOID ++rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++VOID ++HalChangeCCKStatus8192D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bCCKDisable ++); ++ ++VOID ++PHY_InitPABias92D(IN PADAPTER Adapter); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) ++#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) ++#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) ++ ++#define PHY_SetMacReg PHY_SetBBReg ++ ++#endif // __INC_HAL8192SPHYCFG_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DPhyReg.h +@@ -0,0 +1,1171 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192DPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192DPHYREG_H ++#define __INC_HAL8192DPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x42 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++//#define bRFRegOffsetMask 0xfff ++ ++//MAC0 will wirte PHY1 ++#define MAC0_ACCESS_PHY1 0x4000 ++//MAC1 will wirte PHY0 ++#define MAC1_ACCESS_PHY0 0x2000 ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg.h +@@ -0,0 +1,66 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DU_FW_IMG_H ++#define __INC_HAL8192DU_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/11/11, 8: 8*/ ++ ++#define Rtl8192DUImgArrayLength 31452 ++extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength]; ++#define Rtl8192DUMainArrayLength 1 ++extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength]; ++#define Rtl8192DUDataArrayLength 1 ++extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength]; ++#define Rtl8192DUPHY_REG_2TArrayLength 372 ++extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength]; ++#define Rtl8192DUPHY_REG_1TArrayLength 1 ++extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength]; ++#define Rtl8192DUPHY_REG_Array_PGLength 624 ++extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength]; ++#define Rtl8192DUPHY_REG_Array_MPLength 14 ++extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength]; ++#define Rtl8192DURadioA_2TArrayLength 378 ++extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength]; ++#define Rtl8192DURadioB_2TArrayLength 384 ++extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength]; ++#define Rtl8192DURadioA_1TArrayLength 1 ++extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength]; ++#define Rtl8192DURadioB_1TArrayLength 1 ++extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength]; ++#define Rtl8192DURadioA_2T_intPAArrayLength 378 ++extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength]; ++#define Rtl8192DURadioB_2T_intPAArrayLength 384 ++extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength]; ++#define Rtl8192DUMAC_2T_ArrayLength 192 ++extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength]; ++#define Rtl8192DUAGCTAB_ArrayLength 386 ++extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength]; ++#define Rtl8192DUAGCTAB_5GArrayLength 194 ++extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength]; ++#define Rtl8192DUAGCTAB_2GArrayLength 194 ++extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength]; ++#define Rtl8192DUAGCTAB_2TArrayLength 1 ++extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength]; ++#define Rtl8192DUAGCTAB_1TArrayLength 1 ++extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/Hal8192DUHWImg_wowlan.h +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DU_FW_IMG_WOWLAN_H ++#define __INC_HAL8192DU_FW_IMG_WOWLAN_H ++ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++ ++#define DUWWImgArrayLength 24818 ++extern u8 Rtl8192DUFwWWImgArray[DUWWImgArrayLength]; ++ ++#endif //__INC_HAL8192DU_FW_IMG_WOWLAN_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/HalPwrSeqCmd.h +@@ -0,0 +1,137 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HALPWRSEQCMD_H__ ++#define __HALPWRSEQCMD_H__ ++ ++#include ++ ++/*---------------------------------------------*/ ++//3 The value of cmd: 4 bits ++/*---------------------------------------------*/ ++#define PWR_CMD_READ 0x00 ++ // offset: the read register offset ++ // msk: the mask of the read value ++ // value: N/A, left by 0 ++ // note: dirver shall implement this function by read & msk ++ ++#define PWR_CMD_WRITE 0x01 ++ // offset: the read register offset ++ // msk: the mask of the write bits ++ // value: write value ++ // note: driver shall implement this cmd by read & msk after write ++ ++#define PWR_CMD_POLLING 0x02 ++ // offset: the read register offset ++ // msk: the mask of the polled value ++ // value: the value to be polled, masked by the msd field. ++ // note: driver shall implement this cmd by ++ // do{ ++ // if( (Read(offset) & msk) == (value & msk) ) ++ // break; ++ // } while(not timeout); ++ ++#define PWR_CMD_DELAY 0x03 ++ // offset: the value to delay ++ // msk: N/A ++ // value: the unit of delay, 0: us, 1: ms ++ ++#define PWR_CMD_END 0x04 ++ // offset: N/A ++ // msk: N/A ++ // value: N/A ++ ++/*---------------------------------------------*/ ++//3 The value of base: 4 bits ++/*---------------------------------------------*/ ++ // define the base address of each block ++#define PWR_BASEADDR_MAC 0x00 ++#define PWR_BASEADDR_USB 0x01 ++#define PWR_BASEADDR_PCIE 0x02 ++#define PWR_BASEADDR_SDIO 0x03 ++ ++/*---------------------------------------------*/ ++//3 The value of interface_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_INTF_SDIO_MSK BIT(0) ++#define PWR_INTF_USB_MSK BIT(1) ++#define PWR_INTF_PCI_MSK BIT(2) ++#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of fab_msk: 4 bits ++/*---------------------------------------------*/ ++#define PWR_FAB_TSMC_MSK BIT(0) ++#define PWR_FAB_UMC_MSK BIT(1) ++#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3)) ++ ++/*---------------------------------------------*/ ++//3 The value of cut_msk: 8 bits ++/*---------------------------------------------*/ ++#define PWR_CUT_TESTCHIP_MSK BIT(0) ++#define PWR_CUT_A_MSK BIT(1) ++#define PWR_CUT_B_MSK BIT(2) ++#define PWR_CUT_C_MSK BIT(3) ++#define PWR_CUT_D_MSK BIT(4) ++#define PWR_CUT_E_MSK BIT(5) ++#define PWR_CUT_F_MSK BIT(6) ++#define PWR_CUT_G_MSK BIT(7) ++#define PWR_CUT_ALL_MSK 0xFF ++ ++ ++typedef enum _PWRSEQ_CMD_DELAY_UNIT_ ++{ ++ PWRSEQ_DELAY_US, ++ PWRSEQ_DELAY_MS, ++} PWRSEQ_DELAY_UNIT; ++ ++typedef struct _WL_PWR_CFG_ ++{ ++ u16 offset; ++ u8 cut_msk; ++ u8 fab_msk:4; ++ u8 interface_msk:4; ++ u8 base:4; ++ u8 cmd:4; ++ u8 msk; ++ u8 value; ++} WLAN_PWR_CFG, *PWLAN_PWR_CFG; ++ ++ ++#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset ++#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk ++#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk ++#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk ++#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base ++#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd ++#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk ++#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++u8 HalPwrSeqCmdParsing( ++ PADAPTER padapter, ++ u8 CutVersion, ++ u8 FabVersion, ++ u8 InterfaceType, ++ WLAN_PWR_CFG PwrCfgCmd[]); ++ ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/autoconf.h +@@ -0,0 +1,336 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/* ++ * Public General Config ++ */ ++#define AUTOCONF_INCLUDED ++#define RTL871X_MODULE_NAME "92CU" ++#define DRV_NAME "rtl8192cu" ++ ++#define CONFIG_USB_HCI 1 ++ ++#define CONFIG_RTL8192C 1 ++ ++#define PLATFORM_LINUX 1 ++ ++#define CONFIG_IOCTL_CFG80211 1 ++#ifdef CONFIG_IOCTL_CFG80211 ++ #define RTW_USE_CFG80211_STA_EVENT /* Indicate new sta asoc through cfg80211_new_sta */ ++ //#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER ++ //#define CONFIG_DEBUG_CFG80211 1 ++ //#define CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2 ++ #define CONFIG_SET_SCAN_DENY_TIMER ++#endif ++ ++/* ++ * Internal General Config ++ */ ++//#define CONFIG_PWRCTRL ++//#define CONFIG_H2CLBK ++ ++#define CONFIG_EMBEDDED_FWIMG 1 ++//#define CONFIG_FILE_FWIMG ++ ++#ifdef CONFIG_WAKE_ON_WLAN ++#define CONFIG_WOWLAN 1 ++#endif //CONFIG_WAKE_ON_WLAN ++ ++#define CONFIG_R871X_TEST 1 ++ ++#define CONFIG_XMIT_ACK ++#ifdef CONFIG_XMIT_ACK ++ #define CONFIG_XMIT_ACK_POLLING ++ #define CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#endif ++ ++#define CONFIG_80211N_HT 1 ++ ++#define CONFIG_RECV_REORDERING_CTRL 1 ++ ++//#define CONFIG_TCP_CSUM_OFFLOAD_RX 1 ++ ++//#define CONFIG_BEFORE_LINKED_DIG ++//#define CONFIG_DRVEXT_MODULE 1 ++ ++#ifndef CONFIG_MP_INCLUDED ++ #define CONFIG_IPS 1 ++ #ifdef CONFIG_IPS ++ //#define CONFIG_IPS_LEVEL_2 1 //enable this to set default IPS mode to IPS_LEVEL_2 ++ #endif ++ ++ #define SUPPORT_HW_RFOFF_DETECTED 1 ++ ++ #define CONFIG_LPS 1 ++ #define CONFIG_BT_COEXIST 1 ++ ++ //befor link ++ #define CONFIG_ANTENNA_DIVERSITY ++ ++ //after link ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ #define CONFIG_SW_ANTENNA_DIVERSITY ++ //#define CONFIG_HW_ANTENNA_DIVERSITY ++ #endif ++ ++ #define CONFIG_IOL ++#else //#ifndef CONFIG_MP_INCLUDED ++ #define CONFIG_MP_IWPRIV_SUPPORT 1 ++#endif //#ifndef CONFIG_MP_INCLUDED ++ ++#define CONFIG_AP_MODE 1 ++#ifdef CONFIG_AP_MODE ++ #define CONFIG_NATIVEAP_MLME 1 ++ #ifndef CONFIG_NATIVEAP_MLME ++ #define CONFIG_HOSTAPD_MLME 1 ++ #endif ++ #define CONFIG_FIND_BEST_CHANNEL 1 ++ //#define CONFIG_NO_WIRELESS_HANDLERS 1 ++#endif ++ ++// Added by Albert 20110314 ++#define CONFIG_P2P 1 ++#ifdef CONFIG_P2P ++ //Added by Albert 20110812 ++ //The CONFIG_WFD is for supporting the Wi-Fi display ++ #define CONFIG_WFD ++ ++ #ifndef CONFIG_WIFI_TEST ++ #define CONFIG_P2P_REMOVE_GROUP_INFO ++ #endif ++ //#define CONFIG_DBG_P2P ++ ++ //#define CONFIG_P2P_PS ++ //#define CONFIG_P2P_IPS ++ ++ #define P2P_OP_CHECK_SOCIAL_CH ++ // Added comment by Borg 2013/06/21 ++ // Issue: Nexus 4 is hard to do miracast. ++ // Root Cause: After group formation, ++ // Nexus 4 is possible to be not at OP channel of Invitation Resp/Nego Confirm but at social channel. ++ // Patch: While scan OP channel, ++ // not only scan OP channel of Invitation Resp/Nego Confirm, ++ // but also scan social channel(1, 6, 11) ++#endif ++ ++// Added by Kurt 20110511 ++//#define CONFIG_TDLS 1 ++#ifdef CONFIG_TDLS ++// #ifndef CONFIG_WFD ++// #define CONFIG_WFD 1 ++// #endif ++// #define CONFIG_TDLS_AUTOSETUP 1 ++// #define CONFIG_TDLS_AUTOCHECKALIVE 1 ++#endif ++ ++#define CONFIG_SKB_COPY 1//for amsdu ++ ++#define CONFIG_LED ++#ifdef CONFIG_LED ++ #define CONFIG_SW_LED ++ #ifdef CONFIG_SW_LED ++ //#define CONFIG_LED_HANDLED_BY_CMD_THREAD ++ #endif ++#endif // CONFIG_LED ++ ++ ++ ++#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface ++#define CONFIG_GLOBAL_UI_PID ++ ++#define CONFIG_LAYER2_ROAMING ++#define CONFIG_LAYER2_ROAMING_RESUME ++//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general... ++//#define CONFIG_RESUME_IN_WORKQUEUE ++//#define CONFIG_SET_SCAN_DENY_TIMER ++#define CONFIG_LONG_DELAY_ISSUE ++#define CONFIG_NEW_SIGNAL_STAT_PROCESS ++//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm ++#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable */ ++#define CONFIG_DEAUTH_BEFORE_CONNECT ++ ++#ifdef CONFIG_IOL ++ #define CONFIG_IOL_LLT ++ #define CONFIG_IOL_MAC ++ #define CONFIG_IOL_BB_PHY_REG ++ #define CONFIG_IOL_BB_AGC_TAB ++ #define CONFIG_IOL_RF_RF90_PATH_A ++ #define CONFIG_IOL_RF_RF90_PATH_B ++#endif ++ ++#define CONFIG_BR_EXT 1 // Enable NAT2.5 support for STA mode interface with a L2 Bridge ++#ifdef CONFIG_BR_EXT ++#define CONFIG_BR_EXT_BRNAME "br0" ++#endif // CONFIG_BR_EXT ++ ++#define CONFIG_TX_MCAST2UNI 1 // Support IP multicast->unicast ++//#define CONFIG_DM_ADAPTIVITY ++//#define CONFIG_CHECK_AC_LIFETIME 1 // Check packet lifetime of 4 ACs. ++ ++//#define CONFIG_CONCURRENT_MODE 1 ++#ifdef CONFIG_CONCURRENT_MODE ++ #define CONFIG_TSF_RESET_OFFLOAD 1 // For 2 PORT TSF SYNC. ++ //#define CONFIG_HWPORT_SWAP //Port0->Sec , Port1 -> Pri ++ //#define CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ //#define CONFIG_MULTI_VIR_IFACES //besides primary&secondary interfaces, extend to support more interfaces ++#endif // CONFIG_CONCURRENT_MODE ++ ++#define CONFIG_80211D ++ ++/* ++ * Interface Related Config ++ */ ++ ++//#define CONFIG_USB_ONE_OUT_EP ++//#define CONFIG_USB_INTERRUPT_IN_PIPE 1 ++ ++#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #define CONFIG_USB_TX_AGGREGATION 1 ++ #define CONFIG_USB_RX_AGGREGATION 1 ++#endif ++ ++#define CONFIG_PREALLOC_RECV_SKB 1 ++//#define CONFIG_REDUCE_USB_TX_INT 1 // Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms. ++//#define CONFIG_EASY_REPLACEMENT 1 ++ ++/* ++ * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now! ++ */ ++//#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms. ++//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++#undef CONFIG_PREALLOC_RECV_SKB ++#endif ++ ++/* ++ * USB VENDOR REQ BUFFER ALLOCATION METHOD ++ * if not set we'll use function local variable (stack memory) ++ */ ++//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ ++#define CONFIG_USB_VENDOR_REQ_MUTEX ++#define CONFIG_VENDOR_REQ_RETRY ++ ++//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1 ++ ++ ++/* ++ * HAL Related Config ++ */ ++ ++#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC 1 ++ ++#define SUPPORTED_BLOCK_IO ++ ++ ++ ++#define RTL8192CU_FW_DOWNLOAD_ENABLE 1 ++ ++#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0 ++ ++#define CONFIG_OUT_EP_WIFI_MODE 0 ++ ++#define ENABLE_USB_DROP_INCORRECT_OUT 0 ++ ++#define RTL8192CU_ASIC_VERIFICATION 0 // For ASIC verification. ++ ++#define RTL8192CU_ADHOC_WORKAROUND_SETTING 1 ++ ++#define DISABLE_BB_RF 0 ++ ++#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0 ++ ++#ifdef CONFIG_MP_INCLUDED ++ #define MP_DRIVER 1 ++ #undef CONFIG_USB_TX_AGGREGATION ++ #undef CONFIG_USB_RX_AGGREGATION ++#else ++ #define MP_DRIVER 0 ++#endif ++ ++ ++/* ++ * Platform Related Config ++ */ ++#ifdef CONFIG_PLATFORM_MN10300 ++#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ ++#if defined (CONFIG_SW_ANTENNA_DIVERSITY) ++ #undef CONFIG_SW_ANTENNA_DIVERSITY ++ #define CONFIG_HW_ANTENNA_DIVERSITY ++#endif ++ ++#endif ++ ++#ifdef CONFIG_WISTRON_PLATFORM ++ ++#endif ++ ++#ifdef CONFIG_PLATFORM_TI_DM365 ++#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 ++#endif ++ ++#define CONFIG_ATTEMPT_TO_FIX_AP_BEACON_ERROR ++ ++/* ++ * Debug Related Config ++ */ ++//#define CONFIG_DEBUG_RTL871X ++ ++#define DBG 0 ++//#define CONFIG_DEBUG_RTL819X ++ ++//#define CONFIG_PROC_DEBUG 1 ++ ++//#define DBG_IO ++//#define DBG_DELAY_OS ++//#define DBG_MEM_ALLOC ++//#define DBG_IOCTL ++ ++//#define DBG_TX ++//#define DBG_XMIT_BUF ++//#define DBG_TX_DROP_FRAME ++ ++//#define DBG_RX_DROP_FRAME ++//#define DBG_RX_SEQ ++//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING ++//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" ++ ++//#define DBG_EXPIRATION_CHK ++ ++ ++//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++//#define DBG_ROAMING_TEST ++ ++//#define DBG_HAL_INIT_PROFILING ++ ++//#define DBG_MEMORY_LEAK 1 ++ ++//#define DBG_CONFIG_ERROR_DETECT ++//#define DBG_CONFIG_ERROR_RESET ++ ++//TX use 1 urb ++//#define CONFIG_SINGLE_XMIT_BUF ++//RX use 1 urb ++//#define CONFIG_SINGLE_RECV_BUF ++ ++//turn off power tracking when traffic is busy ++//#define CONFIG_BUSY_TRAFFIC_SKIP_PWR_TRACK +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/basic_types.h +@@ -0,0 +1,321 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __BASIC_TYPES_H__ ++#define __BASIC_TYPES_H__ ++ ++#include ++ ++ ++#define SUCCESS 0 ++#define FAIL (-1) ++ ++#ifndef TRUE ++ #define _TRUE 1 ++#else ++ #define _TRUE TRUE ++#endif ++ ++#ifndef FALSE ++ #define _FALSE 0 ++#else ++ #define _FALSE FALSE ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ typedef signed char s8; ++ typedef unsigned char u8; ++ ++ typedef signed short s16; ++ typedef unsigned short u16; ++ ++ typedef signed long s32; ++ typedef unsigned long u32; ++ ++ typedef unsigned int uint; ++ typedef signed int sint; ++ ++ ++ typedef signed long long s64; ++ typedef unsigned long long u64; ++ ++ #ifdef NDIS50_MINIPORT ++ ++ #define NDIS_MAJOR_VERSION 5 ++ #define NDIS_MINOR_VERSION 0 ++ ++ #endif ++ ++ #ifdef NDIS51_MINIPORT ++ ++ #define NDIS_MAJOR_VERSION 5 ++ #define NDIS_MINOR_VERSION 1 ++ ++ #endif ++ ++ typedef NDIS_PROC proc_t; ++ ++ typedef LONG atomic_t; ++ ++#endif ++ ++ ++#ifdef PLATFORM_LINUX ++ ++ #include ++ #define IN ++ #define OUT ++ #define VOID void ++ #define NDIS_OID uint ++ #define NDIS_STATUS uint ++ ++ typedef signed int sint; ++ ++ #ifndef PVOID ++ typedef void * PVOID; ++ //#define PVOID (void *) ++ #endif ++ ++ #define UCHAR u8 ++ #define USHORT u16 ++ #define UINT u32 ++ #define ULONG u32 ++ ++ typedef void (*proc_t)(void*); ++ ++ typedef __kernel_size_t SIZE_T; ++ typedef __kernel_ssize_t SSIZE_T; ++ #define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field) ++ ++#endif ++ ++ ++#ifdef PLATFORM_FREEBSD ++ ++ typedef signed char s8; ++ typedef unsigned char u8; ++ ++ typedef signed short s16; ++ typedef unsigned short u16; ++ ++ typedef signed int s32; ++ typedef unsigned int u32; ++ ++ typedef unsigned int uint; ++ typedef signed int sint; ++ typedef long atomic_t; ++ ++ typedef signed long long s64; ++ typedef unsigned long long u64; ++ #define IN ++ #define OUT ++ #define VOID void ++ #define NDIS_OID uint ++ #define NDIS_STATUS uint ++ ++ #ifndef PVOID ++ typedef void * PVOID; ++ //#define PVOID (void *) ++ #endif ++ typedef u32 dma_addr_t; ++ #define UCHAR u8 ++ #define USHORT u16 ++ #define UINT u32 ++ #define ULONG u32 ++ ++ typedef void (*proc_t)(void*); ++ ++ typedef unsigned int __kernel_size_t; ++ typedef int __kernel_ssize_t; ++ ++ typedef __kernel_size_t SIZE_T; ++ typedef __kernel_ssize_t SSIZE_T; ++ #define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field) ++ ++#endif ++ ++#define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T)) ++#define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1) ++ ++#define SIZE_PTR SIZE_T ++#define SSIZE_PTR SSIZE_T ++ ++//port from fw by thomas ++// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness ++ ++/* ++ * Call endian free function when ++ * 1. Read/write packet content. ++ * 2. Before write integer to IO. ++ * 3. After read integer from IO. ++*/ ++ ++// ++// Byte Swapping routine. ++// ++#define EF1Byte ++#define EF2Byte le16_to_cpu ++#define EF4Byte le32_to_cpu ++ ++// ++// Read LE format data from memory ++// ++#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr))) ++#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr))) ++#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr))) ++ ++// ++// Write LE data to memory ++// ++#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val) ++#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val) ++#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val) ++ ++// ++// Example: ++// BIT_LEN_MASK_32(0) => 0x00000000 ++// BIT_LEN_MASK_32(1) => 0x00000001 ++// BIT_LEN_MASK_32(2) => 0x00000003 ++// BIT_LEN_MASK_32(32) => 0xFFFFFFFF ++// ++#define BIT_LEN_MASK_32(__BitLen) \ ++ (0xFFFFFFFF >> (32 - (__BitLen))) ++// ++// Example: ++// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 ++// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 ++// ++#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) ++ ++// ++// Description: ++// Return 4-byte value in host byte ordering from ++// 4-byte pointer in litten-endian system. ++// ++#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ ++ (EF4Byte(*((u32 *)(__pStart)))) ++ ++// ++// Description: ++// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to ++// 4-byte value in host byte ordering. ++// ++#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_32(__BitLen) \ ++ ) ++ ++// ++// Description: ++// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering ++// and return the result in 4-byte value in host byte ordering. ++// ++#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \ ++ ) ++ ++// ++// Description: ++// Set subfield of little-endian 4-byte value to specified value. ++// ++#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u32 *)(__pStart)) = \ ++ EF4Byte( \ ++ LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++ ++#define BIT_LEN_MASK_16(__BitLen) \ ++ (0xFFFF >> (16 - (__BitLen))) ++ ++#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_16(__BitLen) << (__BitOffset)) ++ ++#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ ++ (EF2Byte(*((u16 *)(__pStart)))) ++ ++#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_16(__BitLen) \ ++ ) ++ ++#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \ ++ ) ++ ++#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u16 *)(__pStart)) = \ ++ EF2Byte( \ ++ LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++#define BIT_LEN_MASK_8(__BitLen) \ ++ (0xFF >> (8 - (__BitLen))) ++ ++#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_8(__BitLen) << (__BitOffset)) ++ ++#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ ++ (EF1Byte(*((u8 *)(__pStart)))) ++ ++#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_8(__BitLen) \ ++ ) ++ ++#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \ ++ ) ++ ++#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u8 *)(__pStart)) = \ ++ EF1Byte( \ ++ LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++// Get the N-bytes aligment offset from the current length ++#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment)) ++ ++typedef unsigned char BOOLEAN,*PBOOLEAN; ++ ++#endif //__BASIC_TYPES_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/byteorder/big_endian.h +@@ -0,0 +1,87 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H ++#define _LINUX_BYTEORDER_BIG_ENDIAN_H ++ ++#ifndef __BIG_ENDIAN ++#define __BIG_ENDIAN 4321 ++#endif ++#ifndef __BIG_ENDIAN_BITFIELD ++#define __BIG_ENDIAN_BITFIELD ++#endif ++ ++#include ++ ++#define __constant_htonl(x) ((__u32)(x)) ++#define __constant_ntohl(x) ((__u32)(x)) ++#define __constant_htons(x) ((__u16)(x)) ++#define __constant_ntohs(x) ((__u16)(x)) ++#define __constant_cpu_to_le64(x) ___constant_swab64((x)) ++#define __constant_le64_to_cpu(x) ___constant_swab64((x)) ++#define __constant_cpu_to_le32(x) ___constant_swab32((x)) ++#define __constant_le32_to_cpu(x) ___constant_swab32((x)) ++#define __constant_cpu_to_le16(x) ___constant_swab16((x)) ++#define __constant_le16_to_cpu(x) ___constant_swab16((x)) ++#define __constant_cpu_to_be64(x) ((__u64)(x)) ++#define __constant_be64_to_cpu(x) ((__u64)(x)) ++#define __constant_cpu_to_be32(x) ((__u32)(x)) ++#define __constant_be32_to_cpu(x) ((__u32)(x)) ++#define __constant_cpu_to_be16(x) ((__u16)(x)) ++#define __constant_be16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_le64(x) __swab64((x)) ++#define __le64_to_cpu(x) __swab64((x)) ++#define __cpu_to_le32(x) __swab32((x)) ++#define __le32_to_cpu(x) __swab32((x)) ++#define __cpu_to_le16(x) __swab16((x)) ++#define __le16_to_cpu(x) __swab16((x)) ++#define __cpu_to_be64(x) ((__u64)(x)) ++#define __be64_to_cpu(x) ((__u64)(x)) ++#define __cpu_to_be32(x) ((__u32)(x)) ++#define __be32_to_cpu(x) ((__u32)(x)) ++#define __cpu_to_be16(x) ((__u16)(x)) ++#define __be16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_le64p(x) __swab64p((x)) ++#define __le64_to_cpup(x) __swab64p((x)) ++#define __cpu_to_le32p(x) __swab32p((x)) ++#define __le32_to_cpup(x) __swab32p((x)) ++#define __cpu_to_le16p(x) __swab16p((x)) ++#define __le16_to_cpup(x) __swab16p((x)) ++#define __cpu_to_be64p(x) (*(__u64*)(x)) ++#define __be64_to_cpup(x) (*(__u64*)(x)) ++#define __cpu_to_be32p(x) (*(__u32*)(x)) ++#define __be32_to_cpup(x) (*(__u32*)(x)) ++#define __cpu_to_be16p(x) (*(__u16*)(x)) ++#define __be16_to_cpup(x) (*(__u16*)(x)) ++#define __cpu_to_le64s(x) __swab64s((x)) ++#define __le64_to_cpus(x) __swab64s((x)) ++#define __cpu_to_le32s(x) __swab32s((x)) ++#define __le32_to_cpus(x) __swab32s((x)) ++#define __cpu_to_le16s(x) __swab16s((x)) ++#define __le16_to_cpus(x) __swab16s((x)) ++#define __cpu_to_be64s(x) do {} while (0) ++#define __be64_to_cpus(x) do {} while (0) ++#define __cpu_to_be32s(x) do {} while (0) ++#define __be32_to_cpus(x) do {} while (0) ++#define __cpu_to_be16s(x) do {} while (0) ++#define __be16_to_cpus(x) do {} while (0) ++ ++#include ++ ++#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/byteorder/generic.h +@@ -0,0 +1,212 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_GENERIC_H ++#define _LINUX_BYTEORDER_GENERIC_H ++ ++/* ++ * linux/byteorder_generic.h ++ * Generic Byte-reordering support ++ * ++ * Francois-Rene Rideau 19970707 ++ * gathered all the good ideas from all asm-foo/byteorder.h into one file, ++ * cleaned them up. ++ * I hope it is compliant with non-GCC compilers. ++ * I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, ++ * because I wasn't sure it would be ok to put it in types.h ++ * Upgraded it to 2.1.43 ++ * Francois-Rene Rideau 19971012 ++ * Upgraded it to 2.1.57 ++ * to please Linus T., replaced huge #ifdef's between little/big endian ++ * by nestedly #include'd files. ++ * Francois-Rene Rideau 19971205 ++ * Made it to 2.1.71; now a facelift: ++ * Put files under include/linux/byteorder/ ++ * Split swab from generic support. ++ * ++ * TODO: ++ * = Regular kernel maintainers could also replace all these manual ++ * byteswap macros that remain, disseminated among drivers, ++ * after some grep or the sources... ++ * = Linus might want to rename all these macros and files to fit his taste, ++ * to fit his personal naming scheme. ++ * = it seems that a few drivers would also appreciate ++ * nybble swapping support... ++ * = every architecture could add their byteswap macro in asm/byteorder.h ++ * see how some architectures already do (i386, alpha, ppc, etc) ++ * = cpu_to_beXX and beXX_to_cpu might some day need to be well ++ * distinguished throughout the kernel. This is not the case currently, ++ * since little endian, big endian, and pdp endian machines needn't it. ++ * But this might be the case for, say, a port of Linux to 20/21 bit ++ * architectures (and F21 Linux addict around?). ++ */ ++ ++/* ++ * The following macros are to be defined by : ++ * ++ * Conversion of long and short int between network and host format ++ * ntohl(__u32 x) ++ * ntohs(__u16 x) ++ * htonl(__u32 x) ++ * htons(__u16 x) ++ * It seems that some programs (which? where? or perhaps a standard? POSIX?) ++ * might like the above to be functions, not macros (why?). ++ * if that's true, then detect them, and take measures. ++ * Anyway, the measure is: define only ___ntohl as a macro instead, ++ * and in a separate file, have ++ * unsigned long inline ntohl(x){return ___ntohl(x);} ++ * ++ * The same for constant arguments ++ * __constant_ntohl(__u32 x) ++ * __constant_ntohs(__u16 x) ++ * __constant_htonl(__u32 x) ++ * __constant_htons(__u16 x) ++ * ++ * Conversion of XX-bit integers (16- 32- or 64-) ++ * between native CPU format and little/big endian format ++ * 64-bit stuff only defined for proper architectures ++ * cpu_to_[bl]eXX(__uXX x) ++ * [bl]eXX_to_cpu(__uXX x) ++ * ++ * The same, but takes a pointer to the value to convert ++ * cpu_to_[bl]eXXp(__uXX x) ++ * [bl]eXX_to_cpup(__uXX x) ++ * ++ * The same, but change in situ ++ * cpu_to_[bl]eXXs(__uXX x) ++ * [bl]eXX_to_cpus(__uXX x) ++ * ++ * See asm-foo/byteorder.h for examples of how to provide ++ * architecture-optimized versions ++ * ++ */ ++ ++ ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) || defined(PLATFORM_FREEBSD) ++/* ++ * inside the kernel, we can use nicknames; ++ * outside of it, we must avoid POSIX namespace pollution... ++ */ ++#define cpu_to_le64 __cpu_to_le64 ++#define le64_to_cpu __le64_to_cpu ++#define cpu_to_le32 __cpu_to_le32 ++#define le32_to_cpu __le32_to_cpu ++#define cpu_to_le16 __cpu_to_le16 ++#define le16_to_cpu __le16_to_cpu ++#define cpu_to_be64 __cpu_to_be64 ++#define be64_to_cpu __be64_to_cpu ++#define cpu_to_be32 __cpu_to_be32 ++#define be32_to_cpu __be32_to_cpu ++#define cpu_to_be16 __cpu_to_be16 ++#define be16_to_cpu __be16_to_cpu ++#define cpu_to_le64p __cpu_to_le64p ++#define le64_to_cpup __le64_to_cpup ++#define cpu_to_le32p __cpu_to_le32p ++#define le32_to_cpup __le32_to_cpup ++#define cpu_to_le16p __cpu_to_le16p ++#define le16_to_cpup __le16_to_cpup ++#define cpu_to_be64p __cpu_to_be64p ++#define be64_to_cpup __be64_to_cpup ++#define cpu_to_be32p __cpu_to_be32p ++#define be32_to_cpup __be32_to_cpup ++#define cpu_to_be16p __cpu_to_be16p ++#define be16_to_cpup __be16_to_cpup ++#define cpu_to_le64s __cpu_to_le64s ++#define le64_to_cpus __le64_to_cpus ++#define cpu_to_le32s __cpu_to_le32s ++#define le32_to_cpus __le32_to_cpus ++#define cpu_to_le16s __cpu_to_le16s ++#define le16_to_cpus __le16_to_cpus ++#define cpu_to_be64s __cpu_to_be64s ++#define be64_to_cpus __be64_to_cpus ++#define cpu_to_be32s __cpu_to_be32s ++#define be32_to_cpus __be32_to_cpus ++#define cpu_to_be16s __cpu_to_be16s ++#define be16_to_cpus __be16_to_cpus ++#endif ++ ++ ++/* ++ * Handle ntohl and suches. These have various compatibility ++ * issues - like we want to give the prototype even though we ++ * also have a macro for them in case some strange program ++ * wants to take the address of the thing or something.. ++ * ++ * Note that these used to return a "long" in libc5, even though ++ * long is often 64-bit these days.. Thus the casts. ++ * ++ * They have to be macros in order to do the constant folding ++ * correctly - if the argument passed into a inline function ++ * it is no longer constant according to gcc.. ++ */ ++ ++#undef ntohl ++#undef ntohs ++#undef htonl ++#undef htons ++ ++/* ++ * Do the prototypes. Somebody might want to take the ++ * address or some such sick thing.. ++ */ ++#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) ++extern __u32 ntohl(__u32); ++extern __u32 htonl(__u32); ++#else //defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) ++#ifndef PLATFORM_FREEBSD ++extern unsigned long int ntohl(unsigned long int); ++extern unsigned long int htonl(unsigned long int); ++#endif ++#endif ++#ifndef PLATFORM_FREEBSD ++extern unsigned short int ntohs(unsigned short int); ++extern unsigned short int htons(unsigned short int); ++#endif ++ ++#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL) ++ ++#define ___htonl(x) __cpu_to_be32(x) ++#define ___htons(x) __cpu_to_be16(x) ++#define ___ntohl(x) __be32_to_cpu(x) ++#define ___ntohs(x) __be16_to_cpu(x) ++ ++#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) ++#define htonl(x) ___htonl(x) ++#define ntohl(x) ___ntohl(x) ++#else ++#define htonl(x) ((unsigned long)___htonl(x)) ++#define ntohl(x) ((unsigned long)___ntohl(x)) ++#endif ++#define htons(x) ___htons(x) ++#define ntohs(x) ___ntohs(x) ++ ++#endif /* OPTIMIZE */ ++ ++ ++#if defined (PLATFORM_WINDOWS) ++ ++#define htonl(x) __cpu_to_be32(x) ++#define ntohl(x) __be32_to_cpu(x) ++#define htons(x) __cpu_to_be16(x) ++#define ntohs(x) __be16_to_cpu(x) ++ ++ ++#endif ++ ++#endif /* _LINUX_BYTEORDER_GENERIC_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/byteorder/little_endian.h +@@ -0,0 +1,89 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H ++#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H ++ ++#ifndef __LITTLE_ENDIAN ++#define __LITTLE_ENDIAN 1234 ++#endif ++#ifndef __LITTLE_ENDIAN_BITFIELD ++#define __LITTLE_ENDIAN_BITFIELD ++#endif ++ ++#include ++ ++#ifndef __constant_htonl ++#define __constant_htonl(x) ___constant_swab32((x)) ++#define __constant_ntohl(x) ___constant_swab32((x)) ++#define __constant_htons(x) ___constant_swab16((x)) ++#define __constant_ntohs(x) ___constant_swab16((x)) ++#define __constant_cpu_to_le64(x) ((__u64)(x)) ++#define __constant_le64_to_cpu(x) ((__u64)(x)) ++#define __constant_cpu_to_le32(x) ((__u32)(x)) ++#define __constant_le32_to_cpu(x) ((__u32)(x)) ++#define __constant_cpu_to_le16(x) ((__u16)(x)) ++#define __constant_le16_to_cpu(x) ((__u16)(x)) ++#define __constant_cpu_to_be64(x) ___constant_swab64((x)) ++#define __constant_be64_to_cpu(x) ___constant_swab64((x)) ++#define __constant_cpu_to_be32(x) ___constant_swab32((x)) ++#define __constant_be32_to_cpu(x) ___constant_swab32((x)) ++#define __constant_cpu_to_be16(x) ___constant_swab16((x)) ++#define __constant_be16_to_cpu(x) ___constant_swab16((x)) ++#define __cpu_to_le64(x) ((__u64)(x)) ++#define __le64_to_cpu(x) ((__u64)(x)) ++#define __cpu_to_le32(x) ((__u32)(x)) ++#define __le32_to_cpu(x) ((__u32)(x)) ++#define __cpu_to_le16(x) ((__u16)(x)) ++#define __le16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_be64(x) __swab64((x)) ++#define __be64_to_cpu(x) __swab64((x)) ++#define __cpu_to_be32(x) __swab32((x)) ++#define __be32_to_cpu(x) __swab32((x)) ++#define __cpu_to_be16(x) __swab16((x)) ++#define __be16_to_cpu(x) __swab16((x)) ++#define __cpu_to_le64p(x) (*(__u64*)(x)) ++#define __le64_to_cpup(x) (*(__u64*)(x)) ++#define __cpu_to_le32p(x) (*(__u32*)(x)) ++#define __le32_to_cpup(x) (*(__u32*)(x)) ++#define __cpu_to_le16p(x) (*(__u16*)(x)) ++#define __le16_to_cpup(x) (*(__u16*)(x)) ++#define __cpu_to_be64p(x) __swab64p((x)) ++#define __be64_to_cpup(x) __swab64p((x)) ++#define __cpu_to_be32p(x) __swab32p((x)) ++#define __be32_to_cpup(x) __swab32p((x)) ++#define __cpu_to_be16p(x) __swab16p((x)) ++#define __be16_to_cpup(x) __swab16p((x)) ++#define __cpu_to_le64s(x) do {} while (0) ++#define __le64_to_cpus(x) do {} while (0) ++#define __cpu_to_le32s(x) do {} while (0) ++#define __le32_to_cpus(x) do {} while (0) ++#define __cpu_to_le16s(x) do {} while (0) ++#define __le16_to_cpus(x) do {} while (0) ++#define __cpu_to_be64s(x) __swab64s((x)) ++#define __be64_to_cpus(x) __swab64s((x)) ++#define __cpu_to_be32s(x) __swab32s((x)) ++#define __be32_to_cpus(x) __swab32s((x)) ++#define __cpu_to_be16s(x) __swab16s((x)) ++#define __be16_to_cpus(x) __swab16s((x)) ++#endif // __constant_htonl ++ ++#include ++ ++#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/byteorder/swab.h +@@ -0,0 +1,140 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_SWAB_H ++#define _LINUX_BYTEORDER_SWAB_H ++ ++#if !defined(CONFIG_PLATFORM_MSTAR) ++#ifndef __u16 ++typedef unsigned short __u16; ++#endif ++ ++#ifndef __u32 ++typedef unsigned int __u32; ++#endif ++ ++#ifndef __u8 ++typedef unsigned char __u8; ++#endif ++ ++#ifndef __u64 ++typedef unsigned long long __u64; ++#endif ++ ++ ++__inline static __u16 ___swab16(__u16 x) ++{ ++ __u16 __x = x; ++ return ++ ((__u16)( ++ (((__u16)(__x) & (__u16)0x00ffU) << 8) | ++ (((__u16)(__x) & (__u16)0xff00U) >> 8) )); ++ ++} ++ ++__inline static __u32 ___swab32(__u32 x) ++{ ++ __u32 __x = (x); ++ return ((__u32)( ++ (((__u32)(__x) & (__u32)0x000000ffUL) << 24) | ++ (((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | ++ (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | ++ (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); ++} ++ ++__inline static __u64 ___swab64(__u64 x) ++{ ++ __u64 __x = (x); ++ ++ return ++ ((__u64)( \ ++ (__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \ ++ (__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \ ++} ++#endif // CONFIG_PLATFORM_MSTAR ++ ++#ifndef __arch__swab16 ++__inline static __u16 __arch__swab16(__u16 x) ++{ ++ return ___swab16(x); ++} ++ ++#endif ++ ++#ifndef __arch__swab32 ++__inline static __u32 __arch__swab32(__u32 x) ++{ ++ __u32 __tmp = (x) ; ++ return ___swab32(__tmp); ++} ++#endif ++ ++#ifndef __arch__swab64 ++ ++__inline static __u64 __arch__swab64(__u64 x) ++{ ++ __u64 __tmp = (x) ; ++ return ___swab64(__tmp); ++} ++ ++ ++#endif ++ ++#ifndef __swab16 ++#define __swab16(x) __fswab16(x) ++#define __swab32(x) __fswab32(x) ++#define __swab64(x) __fswab64(x) ++#endif // __swab16 ++ ++#ifdef PLATFORM_FREEBSD ++__inline static __u16 __fswab16(__u16 x) ++#else ++__inline static const __u16 __fswab16(__u16 x) ++#endif //PLATFORM_FREEBSD ++{ ++ return __arch__swab16(x); ++} ++#ifdef PLATFORM_FREEBSD ++__inline static __u32 __fswab32(__u32 x) ++#else ++__inline static const __u32 __fswab32(__u32 x) ++#endif //PLATFORM_FREEBSD ++{ ++ return __arch__swab32(x); ++} ++ ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) ++#define swab16 __swab16 ++#define swab32 __swab32 ++#define swab64 __swab64 ++#define swab16p __swab16p ++#define swab32p __swab32p ++#define swab64p __swab64p ++#define swab16s __swab16s ++#define swab32s __swab32s ++#define swab64s __swab64s ++#endif ++ ++#endif /* _LINUX_BYTEORDER_SWAB_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/byteorder/swabb.h +@@ -0,0 +1,156 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_SWABB_H ++#define _LINUX_BYTEORDER_SWABB_H ++ ++/* ++ * linux/byteorder/swabb.h ++ * SWAp Bytes Bizarrely ++ * swaHHXX[ps]?(foo) ++ * ++ * Support for obNUXIous pdp-endian and other bizarre architectures. ++ * Will Linux ever run on such ancient beasts? if not, this file ++ * will be but a programming pearl. Still, it's a reminder that we ++ * shouldn't be making too many assumptions when trying to be portable. ++ * ++ */ ++ ++/* ++ * Meaning of the names I chose (vaxlinux people feel free to correct them): ++ * swahw32 swap 16-bit half-words in a 32-bit word ++ * swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word ++ * ++ * No 64-bit support yet. I don't know NUXI conventions for long longs. ++ * I guarantee it will be a mess when it's there, though :-> ++ * It will be even worse if there are conflicting 64-bit conventions. ++ * Hopefully, no one ever used 64-bit objects on NUXI machines. ++ * ++ */ ++ ++#define ___swahw32(x) \ ++({ \ ++ __u32 __x = (x); \ ++ ((__u32)( \ ++ (((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \ ++ (((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \ ++}) ++#define ___swahb32(x) \ ++({ \ ++ __u32 __x = (x); \ ++ ((__u32)( \ ++ (((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \ ++ (((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \ ++}) ++ ++#define ___constant_swahw32(x) \ ++ ((__u32)( \ ++ (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ ++ (((__u32)(x) & (__u32)0xffff0000UL) >> 16) )) ++#define ___constant_swahb32(x) \ ++ ((__u32)( \ ++ (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ ++ (((__u32)(x) & (__u32)0xff00ff00UL) >> 8) )) ++ ++/* ++ * provide defaults when no architecture-specific optimization is detected ++ */ ++#ifndef __arch__swahw32 ++# define __arch__swahw32(x) ___swahw32(x) ++#endif ++#ifndef __arch__swahb32 ++# define __arch__swahb32(x) ___swahb32(x) ++#endif ++ ++#ifndef __arch__swahw32p ++# define __arch__swahw32p(x) __swahw32(*(x)) ++#endif ++#ifndef __arch__swahb32p ++# define __arch__swahb32p(x) __swahb32(*(x)) ++#endif ++ ++#ifndef __arch__swahw32s ++# define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0) ++#endif ++#ifndef __arch__swahb32s ++# define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0) ++#endif ++ ++ ++/* ++ * Allow constant folding ++ */ ++#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) ++# define __swahw32(x) \ ++(__builtin_constant_p((__u32)(x)) ? \ ++ ___swahw32((x)) : \ ++ __fswahw32((x))) ++# define __swahb32(x) \ ++(__builtin_constant_p((__u32)(x)) ? \ ++ ___swahb32((x)) : \ ++ __fswahb32((x))) ++#else ++# define __swahw32(x) __fswahw32(x) ++# define __swahb32(x) __fswahb32(x) ++#endif /* OPTIMIZE */ ++ ++ ++__inline static__ __const__ __u32 __fswahw32(__u32 x) ++{ ++ return __arch__swahw32(x); ++} ++__inline static__ __u32 __swahw32p(__u32 *x) ++{ ++ return __arch__swahw32p(x); ++} ++__inline static__ void __swahw32s(__u32 *addr) ++{ ++ __arch__swahw32s(addr); ++} ++ ++ ++__inline static__ __const__ __u32 __fswahb32(__u32 x) ++{ ++ return __arch__swahb32(x); ++} ++__inline static__ __u32 __swahb32p(__u32 *x) ++{ ++ return __arch__swahb32p(x); ++} ++__inline static__ void __swahb32s(__u32 *addr) ++{ ++ __arch__swahb32s(addr); ++} ++ ++#ifdef __BYTEORDER_HAS_U64__ ++/* ++ * Not supported yet ++ */ ++#endif /* __BYTEORDER_HAS_U64__ */ ++ ++#if defined(PLATFORM_LINUX) ++#define swahw32 __swahw32 ++#define swahb32 __swahb32 ++#define swahw32p __swahw32p ++#define swahb32p __swahb32p ++#define swahw32s __swahw32s ++#define swahb32s __swahb32s ++#endif ++ ++#endif /* _LINUX_BYTEORDER_SWABB_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/circ_buf.h +@@ -0,0 +1,27 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CIRC_BUF_H_ ++#define __CIRC_BUF_H_ 1 ++ ++#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1)) ++ ++#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size)) ++ ++#endif //_CIRC_BUF_H_ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/cmd_osdep.h +@@ -0,0 +1,36 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CMD_OSDEP_H_ ++#define __CMD_OSDEP_H_ ++ ++ ++#include ++#include ++#include ++ ++extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); ++extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv); ++extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv); ++extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); ++extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj); ++extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_conf.h +@@ -0,0 +1,78 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_CONF_H__ ++#define __DRV_CONF_H__ ++#include "autoconf.h" ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++//Older Android kernel doesn't has CONFIG_ANDROID defined, ++//add this to force CONFIG_ANDROID defined ++#ifdef CONFIG_PLATFORM_ANDROID ++#define CONFIG_ANDROID ++#endif ++ ++#ifdef CONFIG_ANDROID ++//Some Android build will restart the UI while non-printable ascii is passed ++//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID ++//for Android here. If you are sure there is no risk on your system about this, ++//mask this macro define to support non-printable ascii ssid. ++//#define CONFIG_VALIDATE_SSID ++ ++//Android expect dbm as the rx signal strength unit ++#define CONFIG_SIGNAL_DISPLAY_DBM ++#endif ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE) ++ #warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" ++ #undef CONFIG_RESUME_IN_WORKQUEUE ++#endif ++ ++#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE) ++ #warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" ++ #undef CONFIG_RESUME_IN_WORKQUEUE ++#endif ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this... ++ #if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER) ++ #error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..." ++ #error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..." ++ #endif ++#endif ++ ++//About USB VENDOR REQ ++#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically" ++ #define CONFIG_USB_VENDOR_REQ_MUTEX ++#endif ++#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically" ++ #define CONFIG_USB_VENDOR_REQ_MUTEX ++#endif ++ ++ ++//#include ++ ++#endif // __DRV_CONF_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_types.h +@@ -0,0 +1,662 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*------------------------------------------------------------------------------- ++ ++ For type defines and data structure defines ++ ++--------------------------------------------------------------------------------*/ ++ ++ ++#ifndef __DRV_TYPES_H__ ++#define __DRV_TYPES_H__ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++#include ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++#ifdef PLATFORM_LINUX ++#include ++#endif ++ ++enum _NIC_VERSION { ++ ++ RTL8711_NIC, ++ RTL8712_NIC, ++ RTL8713_NIC, ++ RTL8716_NIC ++ ++}; ++ ++enum{ ++ UP_LINK, ++ DOWN_LINK, ++}; ++typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; ++ ++#ifdef CONFIG_80211N_HT ++#include ++#endif ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_DRVEXT_MODULE ++#include ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++#include ++#endif ++ ++#ifdef CONFIG_BR_EXT ++#include ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ #include "ioctl_cfg80211.h" ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#define SPEC_DEV_ID_NONE BIT(0) ++#define SPEC_DEV_ID_DISABLE_HT BIT(1) ++#define SPEC_DEV_ID_ENABLE_PS BIT(2) ++#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3) ++#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4) ++#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5) ++ ++struct specific_device_id{ ++ ++ u32 flags; ++ ++ u16 idVendor; ++ u16 idProduct; ++ ++}; ++ ++struct registry_priv ++{ ++ u8 chip_version; ++ u8 rfintfs; ++ u8 lbkmode; ++ u8 hci; ++ NDIS_802_11_SSID ssid; ++ u8 network_mode; //infra, ad-hoc, auto ++ u8 channel;//ad-hoc support requirement ++ u8 wireless_mode;//A, B, G, auto ++ u8 scan_mode;//active, passive ++ u8 radio_enable; ++ u8 preamble;//long, short, auto ++ u8 vrtl_carrier_sense;//Enable, Disable, Auto ++ u8 vcs_type;//RTS/CTS, CTS-to-self ++ u16 rts_thresh; ++ u16 frag_thresh; ++ u8 adhoc_tx_pwr; ++ u8 soft_ap; ++ u8 power_mgnt; ++ u8 ips_mode; ++ u8 smart_ps; ++ u8 long_retry_lmt; ++ u8 short_retry_lmt; ++ u16 busy_thresh; ++ u8 ack_policy; ++ u8 mp_mode; ++ u8 software_encrypt; ++ u8 software_decrypt; ++ ++ u8 acm_method; ++ //UAPSD ++ u8 wmm_enable; ++ u8 uapsd_enable; ++ u8 uapsd_max_sp; ++ u8 uapsd_acbk_en; ++ u8 uapsd_acbe_en; ++ u8 uapsd_acvi_en; ++ u8 uapsd_acvo_en; ++ ++ WLAN_BSSID_EX dev_network; ++ ++#ifdef CONFIG_80211N_HT ++ u8 ht_enable; ++ u8 cbw40_enable; ++ u8 ampdu_enable;//for tx ++ u8 rx_stbc; ++ u8 ampdu_amsdu;//A-MPDU Supports A-MSDU is permitted ++#endif ++ u8 lowrate_two_xmit; ++ ++ u8 rf_config ; ++ u8 low_power ; ++ ++ u8 wifi_spec;// !turbo_mode ++ ++ u8 channel_plan; ++#ifdef CONFIG_BT_COEXIST ++ u8 bt_iso; ++ u8 bt_sco; ++ u8 bt_ampdu; ++#endif ++ BOOLEAN bAcceptAddbaReq; ++ ++ u8 antdiv_cfg; ++ ++ u8 usbss_enable;//0:disable,1:enable ++ u8 hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config ++ u8 hwpwrp_detect;//0:disable,1:enable ++ ++ u8 hw_wps_pbc;//0:disable,1:enable ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ char adaptor_info_caching_file_path[PATH_LENGTH_MAX]; ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ u8 max_roaming_times; // the max number driver will try to roaming ++#endif ++ ++#ifdef CONFIG_IOL ++ bool force_iol; //enable iol without other concern ++#endif ++ u8 special_rf_path; //0: 2T2R ,1: only turn on path A 1T1R, 2: only turn on path B 1T1R ++ u8 mac_phy_mode; //0:by efuse, 1:smsp, 2:dmdp, 3:dmsp. ++ ++#ifdef CONFIG_80211D ++ u8 enable80211d; ++#endif ++ ++ u8 ifname[16]; ++ u8 if2name[16]; ++ ++ u8 notch_filter; ++ ++#ifdef CONFIG_MULTI_VIR_IFACES ++ u8 ext_iface_num;//primary/secondary iface is excluded ++#endif ++}; ++ ++ ++//For registry parameters ++#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field)) ++#define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field) ++#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field)) ++#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) ++ ++#define MAX_CONTINUAL_URB_ERR 4 ++ ++#ifdef CONFIG_SDIO_HCI ++#include ++#define INTF_DATA SDIO_DATA ++#endif ++ ++#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->if1) ++ ++#define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums) ++#define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id]) ++ ++enum _IFACE_ID { ++ IFACE_ID0, //maping to PRIMARY_ADAPTER ++ IFACE_ID1, //maping to SECONDARY_ADAPTER ++ IFACE_ID2, ++ IFACE_ID3, ++ IFACE_ID_MAX, ++}; ++ ++struct dvobj_priv ++{ ++ _adapter *if1; //PRIMARY_ADAPTER ++ _adapter *if2; //SECONDARY_ADAPTER ++ ++ s32 processing_dev_remove; ++ ++ //for local/global synchronization ++ _mutex hw_init_mutex; ++ _mutex h2c_fwcmd_mutex; ++ _mutex setch_mutex; ++ _mutex setbw_mutex; ++ ++ unsigned char oper_channel; //saved channel info when call set_channel_bw ++ unsigned char oper_bwmode; ++ unsigned char oper_ch_offset;//PRIME_CHNL_OFFSET ++ u32 on_oper_ch_time; ++ ++ //extend to support mulitu interface ++ //padapters[IFACE_ID0] == if1 ++ //padapters[IFACE_ID1] == if2 ++ _adapter *padapters[IFACE_ID_MAX]; ++ u8 iface_nums; // total number of ifaces used runtime ++ ++ //For 92D, DMDP have 2 interface. ++ u8 InterfaceNumber; ++ u8 NumInterfaces; ++ u8 DualMacMode; ++ u8 irq_alloc; ++ ++/*-------- below is for SDIO INTERFACE --------*/ ++ ++#ifdef INTF_DATA ++ INTF_DATA intf_data; ++#endif ++ ++/*-------- below is for USB INTERFACE --------*/ ++ ++#ifdef CONFIG_USB_HCI ++ ++ u8 nr_endpoint; ++ u8 ishighspeed; ++ u8 RtNumInPipes; ++ u8 RtNumOutPipes; ++ int ep_num[5]; //endpoint number ++ ++ int RegUsbSS; ++ ++ _sema usb_suspend_sema; ++ ++#ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _mutex usb_vendor_req_mutex; ++#endif ++ ++#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ u8 * usb_alloc_vendor_req_buf; ++ u8 * usb_vendor_req_buf; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ //related device objects ++ PDEVICE_OBJECT pphysdevobj;//pPhysDevObj; ++ PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj; ++ PDEVICE_OBJECT pnextdevobj;//pNextDevObj; ++ ++ u8 nextdevstacksz;//unsigned char NextDeviceStackSize; //= (CHAR)CEdevice->pUsbDevObj->StackSize + 1; ++ ++ //urb for control diescriptor request ++ ++#ifdef PLATFORM_OS_XP ++ struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb; ++ PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;//UsbConfigurationDescriptor; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; // adapter regpath ++ USB_EXTENSION usb_extension; ++ ++ _nic_hdl pipehdls_r8192c[0x10]; ++#endif ++ ++ u32 config_descriptor_len;//ULONG UsbConfigurationDescriptorLength; ++#endif//PLATFORM_WINDOWS ++ ++#ifdef PLATFORM_LINUX ++ struct usb_interface *pusbintf; ++ struct usb_device *pusbdev; ++#endif//PLATFORM_LINUX ++ ++#ifdef PLATFORM_FREEBSD ++ struct usb_interface *pusbintf; ++ struct usb_device *pusbdev; ++#endif//PLATFORM_FREEBSD ++ ATOMIC_T continual_urb_error; ++#endif//CONFIG_USB_HCI ++ ++/*-------- below is for PCIE INTERFACE --------*/ ++ ++#ifdef CONFIG_PCI_HCI ++ ++#ifdef PLATFORM_LINUX ++ struct pci_dev *ppcidev; ++ ++ //PCI MEM map ++ unsigned long pci_mem_end; /* shared mem end */ ++ unsigned long pci_mem_start; /* shared mem start */ ++ ++ //PCI IO map ++ unsigned long pci_base_addr; /* device I/O address */ ++ ++ //PciBridge ++ struct pci_priv pcipriv; ++ ++ u16 irqline; ++ u8 irq_enabled; ++ RT_ISR_CONTENT isr_content; ++ _lock irq_th_lock; ++ ++ //ASPM ++ u8 const_pci_aspm; ++ u8 const_amdpci_aspm; ++ u8 const_hwsw_rfoff_d3; ++ u8 const_support_pciaspm; ++ // pci-e bridge */ ++ u8 const_hostpci_aspm_setting; ++ // pci-e device */ ++ u8 const_devicepci_aspm_setting; ++ u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. ++ u8 b_support_backdoor; ++ u8 bdma64; ++#endif//PLATFORM_LINUX ++ ++#endif//CONFIG_PCI_HCI ++}; ++ ++#ifdef PLATFORM_LINUX ++static struct device *dvobj_to_dev(struct dvobj_priv *dvobj) ++{ ++ /* todo: get interface type from dvobj and the return the dev accordingly */ ++#ifdef RTW_DVOBJ_CHIP_HW_TYPE ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ return &dvobj->pusbintf->dev; ++#endif ++#ifdef CONFIG_SDIO_HCI ++ return &dvobj->intf_data.func->dev; ++#endif ++#ifdef CONFIG_PCI_HCI ++ return &dvobj->ppcidev->dev; ++#endif ++} ++#endif ++ ++ ++enum _IFACE_TYPE { ++ IFACE_PORT0, //mapping to port0 for C/D series chips ++ IFACE_PORT1, //mapping to port1 for C/D series chip ++ MAX_IFACE_PORT, ++}; ++ ++enum _ADAPTER_TYPE { ++ PRIMARY_ADAPTER, ++ SECONDARY_ADAPTER, ++ MAX_ADAPTER = 0xFF, ++}; ++ ++typedef enum _DRIVER_STATE{ ++ DRIVER_NORMAL = 0, ++ DRIVER_DISAPPEAR = 1, ++ DRIVER_REPLACE_DONGLE = 2, ++}DRIVER_STATE; ++ ++#ifdef CONFIG_INTEL_PROXIM ++struct proxim { ++ bool proxim_support; ++ bool proxim_on; ++ ++ void *proximity_priv; ++ int (*proxim_rx)(_adapter *padapter, ++ union recv_frame *precv_frame); ++ u8 (*proxim_get_var)(_adapter* padapter, u8 type); ++}; ++#endif //CONFIG_INTEL_PROXIM ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++typedef struct loopbackdata ++{ ++ _sema sema; ++ _thread_hdl_ lbkthread; ++ u8 bstop; ++ u32 cnt; ++ u16 size; ++ u16 txsize; ++ u8 txbuf[0x8000]; ++ u16 rxsize; ++ u8 rxbuf[0x8000]; ++ u8 msg[100]; ++ ++}LOOPBACKDATA, *PLOOPBACKDATA; ++#endif ++ ++struct _ADAPTER{ ++ int DriverState;// for disable driver using module, use dongle to replace module. ++ int pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd ++ int bDongle;//build-in module or external dongle ++ u16 chip_type; ++ u16 HardwareType; ++ u16 interface_type;//USB,SDIO,PCI ++ ++ struct dvobj_priv *dvobj; ++ struct mlme_priv mlmepriv; ++ struct mlme_ext_priv mlmeextpriv; ++ struct cmd_priv cmdpriv; ++ struct evt_priv evtpriv; ++ //struct io_queue *pio_queue; ++ struct io_priv iopriv; ++ struct xmit_priv xmitpriv; ++ struct recv_priv recvpriv; ++ struct sta_priv stapriv; ++ struct security_priv securitypriv; ++ _lock security_key_mutex; // add for CONFIG_IEEE80211W, none 11w also can use ++ struct registry_priv registrypriv; ++ struct pwrctrl_priv pwrctrlpriv; ++ struct eeprom_priv eeprompriv; ++ struct led_priv ledpriv; ++ ++#ifdef CONFIG_MP_INCLUDED ++ struct mp_priv mppriv; ++#endif ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ struct drvext_priv drvextpriv; ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ struct hostapd_priv *phostapdpriv; ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef CONFIG_P2P ++ struct cfg80211_wifidirect_info cfg80211_wdinfo; ++#endif //CONFIG_P2P ++#endif //CONFIG_IOCTL_CFG80211 ++ u32 setband; ++#ifdef CONFIG_P2P ++ struct wifidirect_info wdinfo; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info tdlsinfo; ++#endif //CONFIG_TDLS ++ ++#ifdef CONFIG_WFD ++ struct wifi_display_info wfd_info; ++#endif //CONFIG_WFD ++ ++ PVOID HalData; ++ u32 hal_data_sz; ++ struct hal_ops HalFunc; ++ ++#ifdef CONFIG_BT_COEXIST ++ //struct btcoexist_priv bt_coexist; ++#endif ++ s32 bDriverStopped; ++ s32 bSurpriseRemoved; ++ s32 bCardDisableWOHSM; ++ ++ u32 IsrContent; ++ u32 ImrContent; ++ ++ u8 EepromAddressSize; ++ u8 hw_init_completed; ++ u8 bDriverIsGoingToUnload; ++ u8 init_adpt_in_progress; ++ u8 bHaltInProgress; ++ ++ _thread_hdl_ cmdThread; ++ _thread_hdl_ evtThread; ++ _thread_hdl_ xmitThread; ++ _thread_hdl_ recvThread; ++ ++#ifndef PLATFORM_LINUX ++ NDIS_STATUS (*dvobj_init)(struct dvobj_priv *dvobj); ++ void (*dvobj_deinit)(struct dvobj_priv *dvobj); ++#endif ++ ++ void (*intf_start)(_adapter * adapter); ++ void (*intf_stop)(_adapter * adapter); ++ ++#ifdef PLATFORM_WINDOWS ++ _nic_hdl hndis_adapter;//hNdisAdapter(NDISMiniportAdapterHandle); ++ _nic_hdl hndis_config;//hNdisConfiguration; ++ NDIS_STRING fw_img; ++ ++ u32 NdisPacketFilter; ++ u8 MCList[MAX_MCAST_LIST_NUM][6]; ++ u32 MCAddrCount; ++#endif //end of PLATFORM_WINDOWS ++ ++ ++#ifdef PLATFORM_LINUX ++ _nic_hdl pnetdev; ++ ++ // used by rtw_rereg_nd_name related function ++ struct rereg_nd_name_data { ++ _nic_hdl old_pnetdev; ++ char old_ifname[IFNAMSIZ]; ++ u8 old_ips_mode; ++ u8 old_bRegUseLed; ++ } rereg_nd_name_priv; ++ ++ int bup; ++ struct net_device_stats stats; ++ struct iw_statistics iwstats; ++ struct proc_dir_entry *dir_dev;// for proc directory ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *rtw_wdev; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#endif //end of PLATFORM_LINUX ++ ++#ifdef PLATFORM_FREEBSD ++ _nic_hdl pifp; ++ int bup; ++ _lock glock; ++#endif //PLATFORM_FREEBSD ++ int net_closed; ++ ++ u8 bFWReady; ++ u8 bReadPortCancel; ++ u8 bWritePortCancel; ++ u8 bRxRSSIDisplay; ++ // Added by Albert 2012/07/26 ++ // The driver will write the initial gain everytime when running in the DM_Write_DIG function. ++ u8 bForceWriteInitGain; ++ // Added by Albert 2012/10/26 ++ // The driver will show up the desired channel number when this flag is 1. ++ u8 bNotifyChannelChange; ++#ifdef CONFIG_P2P ++ // Added by Albert 2012/12/06 ++ // The driver will show the current P2P status when the upper application reads it. ++ u8 bShowGetP2PState; ++#endif ++#ifdef CONFIG_AUTOSUSPEND ++ u8 bDisableAutosuspend; ++#endif ++ ++ //pbuddy_adapter is used only in two inteface case, (iface_nums=2 in struct dvobj_priv) ++ //PRIMARY_ADAPTER's buddy is SECONDARY_ADAPTER ++ //SECONDARY_ADAPTER's buddy is PRIMARY_ADAPTER ++ //for iface_id > SECONDARY_ADAPTER(IFACE_ID1), refer to padapters[iface_id] in struct dvobj_priv ++ //and their pbuddy_adapter is PRIMARY_ADAPTER. ++ //for PRIMARY_ADAPTER(IFACE_ID0) can directly refer to if1 in struct dvobj_priv ++ _adapter *pbuddy_adapter; ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++ u8 isprimary; //is primary adapter or not ++ //notes: ++ // if isprimary is true, the adapter_type value is 0, iface_id is IFACE_ID0 for PRIMARY_ADAPTER ++ // if isprimary is false, the adapter_type value is 1, iface_id is IFACE_ID1 for SECONDARY_ADAPTER ++ // refer to iface_id if iface_nums>2 and isprimary is false and the adapter_type value is 0xff. ++ u8 adapter_type;//used only in two inteface case(PRIMARY_ADAPTER and SECONDARY_ADAPTER) . ++ u8 iface_type; //interface port type, it depends on HW port ++#endif ++ ++ //extend to support multi interface ++ //IFACE_ID0 is equals to PRIMARY_ADAPTER ++ //IFACE_ID1 is equals to SECONDARY_ADAPTER ++ u8 iface_id; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ u8 DualMacConcurrent; // 1: DMSP 0:DMDP ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ _lock br_ext_lock; ++ //unsigned int macclone_completed; ++ struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE]; ++ int pppoe_connection_in_progress; ++ unsigned char pppoe_addr[MACADDRLEN]; ++ unsigned char scdb_mac[MACADDRLEN]; ++ unsigned char scdb_ip[4]; ++ struct nat25_network_db_entry *scdb_entry; ++ unsigned char br_mac[MACADDRLEN]; ++ unsigned char br_ip[4]; ++ ++ struct br_ext_info ethBrExtInfo; ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_INTEL_PROXIM ++ /* intel Proximity, should be alloc mem ++ * in intel Proximity module and can only ++ * be used in intel Proximity mode */ ++ struct proxim proximity; ++#endif //CONFIG_INTEL_PROXIM ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++ PLOOPBACKDATA ploopback; ++#endif ++ ++}; ++ ++#define adapter_to_dvobj(adapter) (adapter->dvobj) ++ ++int rtw_handle_dualmac(_adapter *adapter, bool init); ++ ++__inline static u8 *myid(struct eeprom_priv *peepriv) ++{ ++ return (peepriv->mac_addr); ++} ++ ++ ++#endif //__DRV_TYPES_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_types_ce.h +@@ -0,0 +1,92 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_CE_H__ ++#define __DRV_TYPES_CE_H__ ++ ++#include ++#include ++ ++#include ++ ++#define MAX_ACTIVE_REG_PATH 256 ++ ++#define MAX_MCAST_LIST_NUM 32 ++ ++ ++ ++//for ioctl ++#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) ++ ++#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h ++#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++ ++typedef struct _MP_REG_ENTRY ++{ ++ ++ NDIS_STRING RegName; // variable name text ++ BOOLEAN bRequired; // 1 -> required, 0 -> optional ++ ++ u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString ++ uint FieldOffset; // offset to MP_ADAPTER field ++ uint FieldSize; // size (in bytes) of the field ++ ++#ifdef UNDER_AMD64 ++ u64 Default; ++#else ++ u32 Default; // default value to use ++#endif ++ ++ u32 Min; // minimum value allowed ++ u32 Max; // maximum value allowed ++} MP_REG_ENTRY, *PMP_REG_ENTRY; ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _USB_EXTENSION { ++ LPCUSB_FUNCS _lpUsbFuncs; ++ USB_HANDLE _hDevice; ++ PVOID pAdapter; ++ ++#if 0 ++ USB_ENDPOINT_DESCRIPTOR _endpACLIn; ++ USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh; ++ USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal; ++ ++ USB_PIPE pPipeIn; ++ USB_PIPE pPipeOutNormal; ++ USB_PIPE pPipeOutHigh; ++#endif ++ ++} USB_EXTENSION, *PUSB_EXTENSION; ++#endif ++ ++ ++typedef struct _OCTET_STRING{ ++ u8 *Octet; ++ u16 Length; ++} OCTET_STRING, *POCTET_STRING; ++ ++ ++ ++ ++ ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_types_linux.h +@@ -0,0 +1,25 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_LINUX_H__ ++#define __DRV_TYPES_LINUX_H__ ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_types_sdio.h +@@ -0,0 +1,70 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_SDIO_H__ ++#define __DRV_TYPES_SDIO_H__ ++ ++#include ++#include ++ ++// SDIO Header Files ++#ifdef PLATFORM_LINUX ++#include ++#endif ++#ifdef PLATFORM_OS_XP ++#include ++#include ++#endif ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++ ++typedef struct sdio_data ++{ ++ u8 func_number; ++ ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u32 block_transfer_len; ++ ++#ifdef PLATFORM_LINUX ++ struct sdio_func *func; ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PDEVICE_OBJECT pphysdevobj; ++ PDEVICE_OBJECT pfuncdevobj; ++ PDEVICE_OBJECT pnextdevobj; ++ SDBUS_INTERFACE_STANDARD sdbusinft; ++ u8 nextdevstacksz; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ SD_DEVICE_HANDLE hDevice; ++ SD_CARD_RCA sd_rca; ++ SD_CARD_INTERFACE card_intf; ++ BOOLEAN enableIsarWithStatus; ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; ++ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; ++#endif ++} SDIO_DATA, *PSDIO_DATA; ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/drv_types_xp.h +@@ -0,0 +1,95 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_XP_H__ ++#define __DRV_TYPES_XP_H__ ++ ++#include ++#include ++ ++ ++ ++#define MAX_MCAST_LIST_NUM 32 ++ ++ ++ ++//for ioctl ++#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) ++ ++#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h ++#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++ ++ ++#undef ON_VISTA ++//added by Jackson ++#ifndef ON_VISTA ++// ++// Bus driver versions ++// ++ ++#define SDBUS_DRIVER_VERSION_1 0x100 ++#define SDBUS_DRIVER_VERSION_2 0x200 ++ ++#define SDP_FUNCTION_TYPE 4 ++#define SDP_BUS_DRIVER_VERSION 5 ++#define SDP_BUS_WIDTH 6 ++#define SDP_BUS_CLOCK 7 ++#define SDP_BUS_INTERFACE_CONTROL 8 ++#define SDP_HOST_BLOCK_LENGTH 9 ++#define SDP_FUNCTION_BLOCK_LENGTH 10 ++#define SDP_FN0_BLOCK_LENGTH 11 ++#define SDP_FUNCTION_INT_ENABLE 12 ++#endif ++ ++ ++typedef struct _MP_REG_ENTRY ++{ ++ ++ NDIS_STRING RegName; // variable name text ++ BOOLEAN bRequired; // 1 -> required, 0 -> optional ++ ++ u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString ++ uint FieldOffset; // offset to MP_ADAPTER field ++ uint FieldSize; // size (in bytes) of the field ++ ++#ifdef UNDER_AMD64 ++ u64 Default; ++#else ++ u32 Default; // default value to use ++#endif ++ ++ u32 Min; // minimum value allowed ++ u32 Max; // maximum value allowed ++} MP_REG_ENTRY, *PMP_REG_ENTRY; ++ ++ ++typedef struct _OCTET_STRING{ ++ u8 *Octet; ++ u16 Length; ++} OCTET_STRING, *POCTET_STRING; ++ ++ ++ ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/ethernet.h +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*! \file */ ++#ifndef __INC_ETHERNET_H ++#define __INC_ETHERNET_H ++ ++#define ETHERNET_ADDRESS_LENGTH 6 //!< Ethernet Address Length ++#define ETHERNET_HEADER_SIZE 14 //!< Ethernet Header Length ++#define LLC_HEADER_SIZE 6 //!< LLC Header Length ++#define TYPE_LENGTH_FIELD_SIZE 2 //!< Type/Length Size ++#define MINIMUM_ETHERNET_PACKET_SIZE 60 //!< Minimum Ethernet Packet Size ++#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 //!< Maximum Ethernet Packet Size ++ ++#define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01)!=0) //!< Is Multicast Address? ++#define RT_ETH_IS_BROADCAST(_pAddr) ( \ ++ ((UCHAR *)(_pAddr))[0]==0xff && \ ++ ((UCHAR *)(_pAddr))[1]==0xff && \ ++ ((UCHAR *)(_pAddr))[2]==0xff && \ ++ ((UCHAR *)(_pAddr))[3]==0xff && \ ++ ((UCHAR *)(_pAddr))[4]==0xff && \ ++ ((UCHAR *)(_pAddr))[5]==0xff ) //!< Is Broadcast Address? ++ ++ ++#endif // #ifndef __INC_ETHERNET_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/h2clbk.h +@@ -0,0 +1,35 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _H2CLBK_H_ ++ ++ ++#include ++#include ++ ++ ++void _lbk_cmd(PADAPTER Adapter); ++ ++void _lbk_rsp(PADAPTER Adapter); ++ ++void _lbk_evt(IN PADAPTER Adapter); ++ ++void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/hal_com.h +@@ -0,0 +1,146 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HAL_COMMON_H__ ++#define __HAL_COMMON_H__ ++ ++//CCK ++#define RATE_1M BIT(0) ++#define RATE_2M BIT(1) ++#define RATE_5_5M BIT(2) ++#define RATE_11M BIT(3) ++//OFDM ++#define RATE_6M BIT(4) ++#define RATE_9M BIT(5) ++#define RATE_12M BIT(6) ++#define RATE_18M BIT(7) ++#define RATE_24M BIT(8) ++#define RATE_36M BIT(9) ++#define RATE_48M BIT(10) ++#define RATE_54M BIT(11) ++//MCS 1 Spatial Stream ++#define RATE_MCS0 BIT(12) ++#define RATE_MCS1 BIT(13) ++#define RATE_MCS2 BIT(14) ++#define RATE_MCS3 BIT(15) ++#define RATE_MCS4 BIT(16) ++#define RATE_MCS5 BIT(17) ++#define RATE_MCS6 BIT(18) ++#define RATE_MCS7 BIT(19) ++//MCS 2 Spatial Stream ++#define RATE_MCS8 BIT(20) ++#define RATE_MCS9 BIT(21) ++#define RATE_MCS10 BIT(22) ++#define RATE_MCS11 BIT(23) ++#define RATE_MCS12 BIT(24) ++#define RATE_MCS13 BIT(25) ++#define RATE_MCS14 BIT(26) ++#define RATE_MCS15 BIT(27) ++ ++// ALL CCK Rate ++#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M ++#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ ++ RATR_36M|RATR_48M|RATR_54M ++#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ ++ RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 ++#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\ ++ RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 ++ ++/*------------------------------ Tx Desc definition Macro ------------------------*/ ++//#pragma mark -- Tx Desc related definition. -- ++//---------------------------------------------------------------------------- ++//----------------------------------------------------------- ++// Rate ++//----------------------------------------------------------- ++// CCK Rates, TxHT = 0 ++#define DESC_RATE1M 0x00 ++#define DESC_RATE2M 0x01 ++#define DESC_RATE5_5M 0x02 ++#define DESC_RATE11M 0x03 ++ ++// OFDM Rates, TxHT = 0 ++#define DESC_RATE6M 0x04 ++#define DESC_RATE9M 0x05 ++#define DESC_RATE12M 0x06 ++#define DESC_RATE18M 0x07 ++#define DESC_RATE24M 0x08 ++#define DESC_RATE36M 0x09 ++#define DESC_RATE48M 0x0a ++#define DESC_RATE54M 0x0b ++ ++// MCS Rates, TxHT = 1 ++#define DESC_RATEMCS0 0x0c ++#define DESC_RATEMCS1 0x0d ++#define DESC_RATEMCS2 0x0e ++#define DESC_RATEMCS3 0x0f ++#define DESC_RATEMCS4 0x10 ++#define DESC_RATEMCS5 0x11 ++#define DESC_RATEMCS6 0x12 ++#define DESC_RATEMCS7 0x13 ++#define DESC_RATEMCS8 0x14 ++#define DESC_RATEMCS9 0x15 ++#define DESC_RATEMCS10 0x16 ++#define DESC_RATEMCS11 0x17 ++#define DESC_RATEMCS12 0x18 ++#define DESC_RATEMCS13 0x19 ++#define DESC_RATEMCS14 0x1a ++#define DESC_RATEMCS15 0x1b ++#define DESC_RATEMCS15_SG 0x1c ++#define DESC_RATEMCS32 0x20 ++ ++//============================================================ ++// Global var ++//============================================================ ++#define OFDM_TABLE_SIZE_92C 37 ++#define OFDM_TABLE_SIZE_92D 43 ++#define CCK_TABLE_SIZE 33 ++ ++extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ; ++ ++extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++ ++extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++#ifdef CONFIG_CHIP_VER_INTEGRATION ++void dump_chip_info(HAL_VERSION ChipVersion); ++#endif ++ ++u8 //return the final channel plan decision ++hal_com_get_channel_plan( ++ IN PADAPTER padapter, ++ IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom) ++ IN u8 sw_channel_plan, //channel plan from SW (registry/module param) ++ IN u8 def_channel_plan, //channel plan used when the former two is invalid ++ IN BOOLEAN AutoLoadFail ++ ); ++ ++void HalSetBrateCfg( ++ IN PADAPTER Adapter, ++ IN u8 *mBratesOS, ++ OUT u16 *pBrateCfg); ++ ++u8 MRateToHwRate(u8 rate); ++ ++void hal_init_macaddr(_adapter *adapter); ++ ++void c2h_evt_clear(_adapter *adapter); ++s32 c2h_evt_read(_adapter *adapter, u8 *buf); ++ ++#endif //__HAL_COMMON_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/hal_intf.h +@@ -0,0 +1,432 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HAL_INTF_H__ ++#define __HAL_INTF_H__ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++ ++enum RTL871X_HCI_TYPE { ++ ++ RTW_SDIO, ++ RTW_USB, ++ RTW_PCIE ++}; ++ ++enum _CHIP_TYPE { ++ ++ NULL_CHIP_TYPE, ++ RTL8712_8188S_8191S_8192S, ++ RTL8188C_8192C, ++ RTL8192D, ++ RTL8723A, ++ RTL8188E, ++ MAX_CHIP_TYPE ++}; ++ ++ ++typedef enum _HW_VARIABLES{ ++ HW_VAR_MEDIA_STATUS, ++ HW_VAR_MEDIA_STATUS1, ++ HW_VAR_SET_OPMODE, ++ HW_VAR_MAC_ADDR, ++ HW_VAR_BSSID, ++ HW_VAR_INIT_RTS_RATE, ++ HW_VAR_INIT_DATA_RATE, ++ HW_VAR_BASIC_RATE, ++ HW_VAR_TXPAUSE, ++ HW_VAR_BCN_FUNC, ++ HW_VAR_CORRECT_TSF, ++ HW_VAR_CHECK_BSSID, ++ HW_VAR_MLME_DISCONNECT, ++ HW_VAR_MLME_SITESURVEY, ++ HW_VAR_MLME_JOIN, ++ HW_VAR_ON_RCR_AM, ++ HW_VAR_OFF_RCR_AM, ++ HW_VAR_BEACON_INTERVAL, ++ HW_VAR_SLOT_TIME, ++ HW_VAR_RESP_SIFS, ++ HW_VAR_ACK_PREAMBLE, ++ HW_VAR_SEC_CFG, ++ HW_VAR_BCN_VALID, ++ HW_VAR_RF_TYPE, ++ HW_VAR_DM_FLAG, ++ HW_VAR_DM_FUNC_OP, ++ HW_VAR_DM_FUNC_SET, ++ HW_VAR_DM_FUNC_CLR, ++ HW_VAR_DM_INIT_PWDB, ++ HW_VAR_CAM_EMPTY_ENTRY, ++ HW_VAR_CAM_INVALID_ALL, ++ HW_VAR_CAM_WRITE, ++ HW_VAR_CAM_READ, ++ HW_VAR_AC_PARAM_VO, ++ HW_VAR_AC_PARAM_VI, ++ HW_VAR_AC_PARAM_BE, ++ HW_VAR_AC_PARAM_BK, ++ HW_VAR_ACM_CTRL, ++ HW_VAR_AMPDU_MIN_SPACE, ++ HW_VAR_AMPDU_FACTOR, ++ HW_VAR_RXDMA_AGG_PG_TH, ++ HW_VAR_SET_RPWM, ++ HW_VAR_H2C_FW_PWRMODE, ++ HW_VAR_H2C_FW_JOINBSSRPT, ++ HW_VAR_FWLPS_RF_ON, ++ HW_VAR_H2C_FW_P2P_PS_OFFLOAD, ++ HW_VAR_TDLS_WRCR, ++ HW_VAR_TDLS_INIT_CH_SEN, ++ HW_VAR_TDLS_RS_RCR, ++ HW_VAR_TDLS_DONE_CH_SEN, ++ HW_VAR_INITIAL_GAIN, ++ HW_VAR_TRIGGER_GPIO_0, ++ HW_VAR_BT_SET_COEXIST, ++ HW_VAR_BT_ISSUE_DELBA, ++ HW_VAR_CURRENT_ANTENNA, ++ HW_VAR_ANTENNA_DIVERSITY_LINK, ++ HW_VAR_ANTENNA_DIVERSITY_SELECT, ++ HW_VAR_SWITCH_EPHY_WoWLAN, ++ HW_VAR_EFUSE_BYTES, ++ HW_VAR_FIFO_CLEARN_UP, ++ HW_VAR_CHECK_TXBUF, ++ HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only ++ HW_VAR_WOWLAN, ++ HW_VAR_VID, ++ HW_VAR_PID, ++ HW_VAR_MBSSID_CAM_WRITE, ++ HW_VAR_MBSSID_CAM_CLEAR, ++ HW_VAR_RCR_MBSSID_EN, ++ HW_VAR_USB_RXAGG_PAGE_TO, ++}HW_VARIABLES; ++ ++typedef enum _HAL_DEF_VARIABLE{ ++ HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, ++ HAL_DEF_IS_SUPPORT_ANT_DIV, ++ HAL_DEF_CURRENT_ANTENNA, ++ HAL_DEF_DRVINFO_SZ, ++ HAL_DEF_MAX_RECVBUF_SZ, ++ HAL_DEF_RX_PACKET_OFFSET, ++ HAL_DEF_DBG_DUMP_RXPKT,//for dbg ++ HAL_DEF_DBG_DM_FUNC,//for dbg ++ HAL_DEF_DUAL_MAC_MODE, ++}HAL_DEF_VARIABLE; ++ ++typedef enum _HAL_INTF_PS_FUNC{ ++ HAL_USB_SELECT_SUSPEND, ++ HAL_MAX_ID, ++}HAL_INTF_PS_FUNC; ++ ++typedef s32 (*c2h_id_filter)(u8 id); ++ ++struct hal_ops { ++ u32 (*hal_init)(PADAPTER Adapter); ++ u32 (*hal_deinit)(PADAPTER Adapter); ++ ++ void (*free_hal_data)(PADAPTER Adapter); ++ ++ u32 (*inirp_init)(PADAPTER Adapter); ++ u32 (*inirp_deinit)(PADAPTER Adapter); ++ ++ s32 (*init_xmit_priv)(PADAPTER Adapter); ++ void (*free_xmit_priv)(PADAPTER Adapter); ++ ++ s32 (*init_recv_priv)(PADAPTER Adapter); ++ void (*free_recv_priv)(PADAPTER Adapter); ++ ++ void (*InitSwLeds)(PADAPTER Adapter); ++ void (*DeInitSwLeds)(PADAPTER Adapter); ++ ++ void (*dm_init)(PADAPTER Adapter); ++ void (*dm_deinit)(PADAPTER Adapter); ++ void (*read_chip_version)(PADAPTER Adapter); ++ ++ void (*init_default_value)(PADAPTER Adapter); ++ ++ void (*intf_chip_configure)(PADAPTER Adapter); ++ ++ void (*read_adapter_info)(PADAPTER Adapter); ++ ++ void (*enable_interrupt)(PADAPTER Adapter); ++ void (*disable_interrupt)(PADAPTER Adapter); ++ s32 (*interrupt_handler)(PADAPTER Adapter); ++ ++ void (*set_bwmode_handler)(PADAPTER Adapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset); ++ void (*set_channel_handler)(PADAPTER Adapter, u8 channel); ++ ++ void (*hal_dm_watchdog)(PADAPTER Adapter); ++ ++ void (*SetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val); ++ void (*GetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val); ++ ++ u8 (*GetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++ u8 (*SetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++ ++ void (*UpdateRAMaskHandler)(PADAPTER Adapter, u32 mac_id); ++ void (*SetBeaconRelatedRegistersHandler)(PADAPTER Adapter); ++ ++ void (*Add_RateATid)(PADAPTER Adapter, u32 bitmap, u8 arg); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ u8 (*AntDivBeforeLinkHandler)(PADAPTER Adapter); ++ void (*AntDivCompareHandler)(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); ++#endif ++ u8 (*interface_ps_func)(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8* val); ++ ++ s32 (*hal_xmit)(PADAPTER Adapter, struct xmit_frame *pxmitframe); ++ s32 (*mgnt_xmit)(PADAPTER Adapter, struct xmit_frame *pmgntframe); ++ s32 (*hal_xmitframe_enqueue)(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++ u32 (*read_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask); ++ void (*write_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask, u32 Data); ++ u32 (*read_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask); ++ void (*write_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ s32 (*hostap_mgnt_xmit_entry)(PADAPTER Adapter, _pkt *pkt); ++#endif ++ void (*EfusePowerSwitch)(PADAPTER pAdapter, u8 bWrite, u8 PwrState); ++ void (*ReadEFuse)(PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest); ++ void (*EFUSEGetEfuseDefinition)(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest); ++ u16 (*EfuseGetCurrentSize)(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++ int (*Efuse_PgPacketRead)(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); ++ int (*Efuse_PgPacketWrite)(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ u8 (*Efuse_WordEnableDataWrite)(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ void (*sreset_init_value)(_adapter *padapter); ++ void (*sreset_reset_value)(_adapter *padapter); ++ void (*silentreset)(_adapter *padapter); ++ void (*sreset_xmit_status_check)(_adapter *padapter); ++ void (*sreset_linked_status_check) (_adapter *padapter); ++ u8 (*sreset_get_wifi_status)(_adapter *padapter); ++ bool (*sreset_inprogress)(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_IOL ++ int (*IOL_exec_cmds_sync)(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++#endif ++ void (*hal_notch_filter)(_adapter * adapter, bool enable); ++ void (*hal_reset_security_engine)(_adapter * adapter); ++ ++ s32 (*c2h_handler)(_adapter *padapter, struct c2h_evt_hdr *c2h_evt); ++ c2h_id_filter c2h_id_filter_ccx; ++}; ++ ++typedef enum _RT_EEPROM_TYPE{ ++ EEPROM_93C46, ++ EEPROM_93C56, ++ EEPROM_BOOT_EFUSE, ++}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE; ++ ++#define USB_HIGH_SPEED_BULK_SIZE 512 ++#define USB_FULL_SPEED_BULK_SIZE 64 ++ ++#define RF_CHANGE_BY_INIT 0 ++#define RF_CHANGE_BY_IPS BIT28 ++#define RF_CHANGE_BY_PS BIT29 ++#define RF_CHANGE_BY_HW BIT30 ++#define RF_CHANGE_BY_SW BIT31 ++ ++typedef enum _HARDWARE_TYPE{ ++ HARDWARE_TYPE_RTL8180, ++ HARDWARE_TYPE_RTL8185, ++ HARDWARE_TYPE_RTL8187, ++ HARDWARE_TYPE_RTL8188, ++ HARDWARE_TYPE_RTL8190P, ++ HARDWARE_TYPE_RTL8192E, ++ HARDWARE_TYPE_RTL819xU, ++ HARDWARE_TYPE_RTL8192SE, ++ HARDWARE_TYPE_RTL8192SU, ++ HARDWARE_TYPE_RTL8192CE, ++ HARDWARE_TYPE_RTL8192CU, ++ HARDWARE_TYPE_RTL8192DE, ++ HARDWARE_TYPE_RTL8192DU, ++ HARDWARE_TYPE_RTL8723AE, ++ HARDWARE_TYPE_RTL8723AU, ++ HARDWARE_TYPE_RTL8723AS, ++ HARDWARE_TYPE_RTL8188EE, ++ HARDWARE_TYPE_RTL8188EU, ++ HARDWARE_TYPE_RTL8188ES, ++ HARDWARE_TYPE_MAX, ++}HARDWARE_TYPE; ++ ++// ++// RTL8192C Series ++// ++#define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE) ++#define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU) ++#define IS_HARDWARE_TYPE_8192C(_Adapter) \ ++(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter)) ++ ++// ++// RTL8192D Series ++// ++#define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE) ++#define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU) ++#define IS_HARDWARE_TYPE_8192D(_Adapter) \ ++(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter)) ++ ++// ++// RTL8723A Series ++// ++#define IS_HARDWARE_TYPE_8723AE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AE) ++#define IS_HARDWARE_TYPE_8723AU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AU) ++#define IS_HARDWARE_TYPE_8723AS(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723AS) ++#define IS_HARDWARE_TYPE_8723A(_Adapter) \ ++(IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter)) ++ ++// ++// RTL8188E Series ++// ++#define IS_HARDWARE_TYPE_8188EE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EE) ++#define IS_HARDWARE_TYPE_8188EU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188EU) ++#define IS_HARDWARE_TYPE_8188ES(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8188ES) ++#define IS_HARDWARE_TYPE_8188E(_Adapter) \ ++(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) ++ ++ ++typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV; ++#define GET_EEPROM_EFUSE_PRIV(priv) (&priv->eeprompriv) ++ ++#ifdef CONFIG_WOWLAN ++typedef enum _wowlan_subcode{ ++ WOWLAN_PATTERN_MATCH = 1, ++ WOWLAN_MAGIC_PACKET = 2, ++ WOWLAN_UNICAST = 3, ++ WOWLAN_SET_PATTERN = 4, ++ WOWLAN_DUMP_REG = 5, ++ WOWLAN_ENABLE = 6, ++ WOWLAN_DISABLE = 7, ++ WOWLAN_STATUS = 8, ++ WOWLAN_DEBUG_RELOAD_FW = 9, ++ WOWLAN_DEBUG_1 =10, ++ WOWLAN_DEBUG_2 =11 ++}wowlan_subcode; ++ ++struct wowlan_ioctl_param{ ++ unsigned int subcode; ++ unsigned int subcode_value; ++ unsigned int wakeup_reason; ++ unsigned int len; ++ unsigned char pattern[0]; ++}; ++ ++#define Rx_Pairwisekey BIT(0) ++#define Rx_GTK BIT(1) ++#define Rx_DisAssoc BIT(2) ++#define Rx_DeAuth BIT(3) ++#define FWDecisionDisconnect BIT(4) ++#define Rx_MagicPkt BIT(5) ++#define FinishBtFwPatch BIT(7) ++ ++#endif // CONFIG_WOWLAN ++ ++void rtw_hal_def_value_init(_adapter *padapter); ++void rtw_hal_free_data(_adapter *padapter); ++ ++void rtw_hal_dm_init(_adapter *padapter); ++void rtw_hal_dm_deinit(_adapter *padapter); ++void rtw_hal_sw_led_init(_adapter *padapter); ++void rtw_hal_sw_led_deinit(_adapter *padapter); ++ ++uint rtw_hal_init(_adapter *padapter); ++uint rtw_hal_deinit(_adapter *padapter); ++void rtw_hal_stop(_adapter *padapter); ++ ++void rtw_hal_set_hwreg(PADAPTER padapter, u8 variable, u8 *val); ++void rtw_hal_get_hwreg(PADAPTER padapter, u8 variable, u8 *val); ++ ++void rtw_hal_chip_configure(_adapter *padapter); ++void rtw_hal_read_chip_info(_adapter *padapter); ++void rtw_hal_read_chip_version(_adapter *padapter); ++ ++u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++ ++void rtw_hal_enable_interrupt(_adapter *padapter); ++void rtw_hal_disable_interrupt(_adapter *padapter); ++ ++u32 rtw_hal_inirp_init(_adapter *padapter); ++u32 rtw_hal_inirp_deinit(_adapter *padapter); ++ ++u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val); ++ ++s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtw_hal_init_xmit_priv(_adapter *padapter); ++void rtw_hal_free_xmit_priv(_adapter *padapter); ++ ++s32 rtw_hal_init_recv_priv(_adapter *padapter); ++void rtw_hal_free_recv_priv(_adapter *padapter); ++ ++void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id); ++void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg); ++ ++void rtw_hal_bcn_related_reg_setting(_adapter *padapter); ++ ++u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask); ++void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); ++u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask); ++void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); ++ ++s32 rtw_hal_interrupt_handler(_adapter *padapter); ++ ++void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset); ++void rtw_hal_set_chan(_adapter *padapter, u8 channel); ++ ++void rtw_hal_dm_watchdog(_adapter *padapter); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++u8 rtw_hal_antdiv_before_linked(_adapter *padapter); ++void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); ++#endif ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtw_hal_sreset_init(_adapter *padapter); ++void rtw_hal_sreset_reset(_adapter *padapter); ++void rtw_hal_sreset_reset_value(_adapter *padapter); ++void rtw_hal_sreset_xmit_status_check(_adapter *padapter); ++void rtw_hal_sreset_linked_status_check(_adapter *padapter); ++u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter); ++bool rtw_hal_sreset_inprogress(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_IOL ++int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++#endif ++ ++void rtw_hal_notch_filter(_adapter * adapter, bool enable); ++void rtw_hal_reset_security_engine(_adapter * adapter); ++ ++s32 rtw_hal_c2h_handler(_adapter *adapter, struct c2h_evt_hdr *c2h_evt); ++c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter); ++ ++#endif //__HAL_INTF_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/ieee80211.h +@@ -0,0 +1,1580 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IEEE80211_H ++#define __IEEE80211_H ++ ++ ++#ifndef CONFIG_RTL8711FW ++ ++ #include ++ #include ++ #include ++ #include "wifi.h" ++ ++ #if defined PLATFORM_OS_XP ++ #include ++ #endif ++ #if defined PLATFORM_LINUX ++ #include ++ #endif ++#else ++ ++ #include ++ ++#endif ++ ++#define MGMT_QUEUE_NUM 5 ++ ++#define ETH_ALEN 6 ++#define ETH_TYPE_LEN 2 ++#define PAYLOAD_TYPE_LEN 1 ++ ++#ifdef CONFIG_AP_MODE ++ ++#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28) ++ ++/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */ ++enum { ++ RTL871X_HOSTAPD_FLUSH = 1, ++ RTL871X_HOSTAPD_ADD_STA = 2, ++ RTL871X_HOSTAPD_REMOVE_STA = 3, ++ RTL871X_HOSTAPD_GET_INFO_STA = 4, ++ /* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */ ++ RTL871X_HOSTAPD_GET_WPAIE_STA = 5, ++ RTL871X_SET_ENCRYPTION = 6, ++ RTL871X_GET_ENCRYPTION = 7, ++ RTL871X_HOSTAPD_SET_FLAGS_STA = 8, ++ RTL871X_HOSTAPD_GET_RID = 9, ++ RTL871X_HOSTAPD_SET_RID = 10, ++ RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11, ++ RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12, ++ RTL871X_HOSTAPD_MLME = 13, ++ RTL871X_HOSTAPD_SCAN_REQ = 14, ++ RTL871X_HOSTAPD_STA_CLEAR_STATS = 15, ++ RTL871X_HOSTAPD_SET_BEACON=16, ++ RTL871X_HOSTAPD_SET_WPS_BEACON = 17, ++ RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18, ++ RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19, ++ RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20, ++ RTL871X_HOSTAPD_SET_MACADDR_ACL = 21, ++ RTL871X_HOSTAPD_ACL_ADD_STA = 22, ++ RTL871X_HOSTAPD_ACL_REMOVE_STA = 23, ++}; ++ ++/* STA flags */ ++#define WLAN_STA_AUTH BIT(0) ++#define WLAN_STA_ASSOC BIT(1) ++#define WLAN_STA_PS BIT(2) ++#define WLAN_STA_TIM BIT(3) ++#define WLAN_STA_PERM BIT(4) ++#define WLAN_STA_AUTHORIZED BIT(5) ++#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */ ++#define WLAN_STA_SHORT_PREAMBLE BIT(7) ++#define WLAN_STA_PREAUTH BIT(8) ++#define WLAN_STA_WME BIT(9) ++#define WLAN_STA_MFP BIT(10) ++#define WLAN_STA_HT BIT(11) ++#define WLAN_STA_WPS BIT(12) ++#define WLAN_STA_MAYBE_WPS BIT(13) ++#define WLAN_STA_NONERP BIT(31) ++ ++#endif ++ ++#define IEEE_CMD_SET_WPA_PARAM 1 ++#define IEEE_CMD_SET_WPA_IE 2 ++#define IEEE_CMD_SET_ENCRYPTION 3 ++#define IEEE_CMD_MLME 4 ++ ++#define IEEE_PARAM_WPA_ENABLED 1 ++#define IEEE_PARAM_TKIP_COUNTERMEASURES 2 ++#define IEEE_PARAM_DROP_UNENCRYPTED 3 ++#define IEEE_PARAM_PRIVACY_INVOKED 4 ++#define IEEE_PARAM_AUTH_ALGS 5 ++#define IEEE_PARAM_IEEE_802_1X 6 ++#define IEEE_PARAM_WPAX_SELECT 7 ++ ++#define AUTH_ALG_OPEN_SYSTEM 0x1 ++#define AUTH_ALG_SHARED_KEY 0x2 ++#define AUTH_ALG_LEAP 0x00000004 ++ ++#define IEEE_MLME_STA_DEAUTH 1 ++#define IEEE_MLME_STA_DISASSOC 2 ++ ++#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2 ++#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3 ++#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4 ++#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5 ++#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6 ++#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7 ++ ++ ++#define IEEE_CRYPT_ALG_NAME_LEN 16 ++ ++#define WPA_CIPHER_NONE BIT(0) ++#define WPA_CIPHER_WEP40 BIT(1) ++#define WPA_CIPHER_WEP104 BIT(2) ++#define WPA_CIPHER_TKIP BIT(3) ++#define WPA_CIPHER_CCMP BIT(4) ++ ++ ++ ++#define WPA_SELECTOR_LEN 4 ++extern u8 RTW_WPA_OUI_TYPE[] ; ++extern u16 RTW_WPA_VERSION ; ++extern u8 WPA_AUTH_KEY_MGMT_NONE[]; ++extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[]; ++extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; ++extern u8 WPA_CIPHER_SUITE_NONE[]; ++extern u8 WPA_CIPHER_SUITE_WEP40[]; ++extern u8 WPA_CIPHER_SUITE_TKIP[]; ++extern u8 WPA_CIPHER_SUITE_WRAP[]; ++extern u8 WPA_CIPHER_SUITE_CCMP[]; ++extern u8 WPA_CIPHER_SUITE_WEP104[]; ++ ++ ++#define RSN_HEADER_LEN 4 ++#define RSN_SELECTOR_LEN 4 ++ ++extern u16 RSN_VERSION_BSD; ++extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[]; ++extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[]; ++extern u8 RSN_CIPHER_SUITE_NONE[]; ++extern u8 RSN_CIPHER_SUITE_WEP40[]; ++extern u8 RSN_CIPHER_SUITE_TKIP[]; ++extern u8 RSN_CIPHER_SUITE_WRAP[]; ++extern u8 RSN_CIPHER_SUITE_CCMP[]; ++extern u8 RSN_CIPHER_SUITE_WEP104[]; ++ ++typedef enum _RATR_TABLE_MODE{ ++ RATR_INX_WIRELESS_NGB = 0, // BGN 40 Mhz 2SS 1SS ++ RATR_INX_WIRELESS_NG = 1, // GN or N ++ RATR_INX_WIRELESS_NB = 2, // BGN 20 Mhz 2SS 1SS or BN ++ RATR_INX_WIRELESS_N = 3, ++ RATR_INX_WIRELESS_GB = 4, ++ RATR_INX_WIRELESS_G = 5, ++ RATR_INX_WIRELESS_B = 6, ++ RATR_INX_WIRELESS_MC = 7, ++ RATR_INX_WIRELESS_AC_N = 8, ++}RATR_TABLE_MODE, *PRATR_TABLE_MODE; ++ ++enum NETWORK_TYPE ++{ ++ WIRELESS_INVALID = 0, ++ //Sub-Element ++ WIRELESS_11B = BIT(0), // tx: cck only , rx: cck only, hw: cck ++ WIRELESS_11G = BIT(1), // tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm ++ WIRELESS_11A = BIT(2), // tx: ofdm only, rx: ofdm only, hw: ofdm only ++ WIRELESS_11_24N = BIT(3), // tx: MCS only, rx: MCS & cck, hw: MCS & cck ++ WIRELESS_11_5N = BIT(4), // tx: MCS only, rx: MCS & ofdm, hw: ofdm only ++ //WIRELESS_AUTO = BIT(5), ++ WIRELESS_AC = BIT(6), ++ ++ //Combination ++ WIRELESS_11BG = (WIRELESS_11B|WIRELESS_11G), // tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm ++ WIRELESS_11G_24N = (WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm ++ WIRELESS_11A_5N = (WIRELESS_11A|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only ++ WIRELESS_11BG_24N = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck ++ WIRELESS_11AGN = (WIRELESS_11A|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only ++ WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), ++}; ++ ++#define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N) ++#define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N) ++ ++#define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? _TRUE : _FALSE) ++#define IsSupported5G(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? _TRUE : _FALSE) ++ ++#define IsEnableHWCCK(NetType) IsSupported24G(NetType) ++#define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11_24N|SUPPORTED_5G_NETTYPE_MSK) ? _TRUE : _FALSE) ++ ++#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType) ++#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType) ++#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType) ++ ++#define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? _TRUE : _FALSE) ++#define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11A) ? _TRUE : _FALSE) ++#define IsSupportedTxMCS(NetType) ((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? _TRUE : _FALSE) ++ ++ ++typedef struct ieee_param { ++ u32 cmd; ++ u8 sta_addr[ETH_ALEN]; ++ union { ++ struct { ++ u8 name; ++ u32 value; ++ } wpa_param; ++ struct { ++ u32 len; ++ u8 reserved[32]; ++ u8 data[0]; ++ } wpa_ie; ++ struct{ ++ int command; ++ int reason_code; ++ } mlme; ++ struct { ++ u8 alg[IEEE_CRYPT_ALG_NAME_LEN]; ++ u8 set_tx; ++ u32 err; ++ u8 idx; ++ u8 seq[8]; /* sequence counter (set: RX, get: TX) */ ++ u16 key_len; ++ u8 key[0]; ++ } crypt; ++#ifdef CONFIG_AP_MODE ++ struct { ++ u16 aid; ++ u16 capability; ++ int flags; ++ u8 tx_supp_rates[16]; ++ struct rtw_ieee80211_ht_cap ht_cap; ++ } add_sta; ++ struct { ++ u8 reserved[2];//for set max_num_sta ++ u8 buf[0]; ++ } bcn_ie; ++#endif ++ ++ } u; ++}ieee_param; ++ ++#ifdef CONFIG_AP_MODE ++typedef struct ieee_param_ex { ++ u32 cmd; ++ u8 sta_addr[ETH_ALEN]; ++ u8 data[0]; ++}ieee_param_ex; ++ ++struct sta_data{ ++ u16 aid; ++ u16 capability; ++ int flags; ++ u32 sta_set; ++ u8 tx_supp_rates[16]; ++ u32 tx_supp_rates_len; ++ struct rtw_ieee80211_ht_cap ht_cap; ++ u64 rx_pkts; ++ u64 rx_bytes; ++ u64 rx_drops; ++ u64 tx_pkts; ++ u64 tx_bytes; ++ u64 tx_drops; ++}; ++#endif ++ ++ ++#if WIRELESS_EXT < 17 ++#define IW_QUAL_QUAL_INVALID 0x10 ++#define IW_QUAL_LEVEL_INVALID 0x20 ++#define IW_QUAL_NOISE_INVALID 0x40 ++#define IW_QUAL_QUAL_UPDATED 0x1 ++#define IW_QUAL_LEVEL_UPDATED 0x2 ++#define IW_QUAL_NOISE_UPDATED 0x4 ++#endif ++ ++#define IEEE80211_DATA_LEN 2304 ++/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section ++ 6.2.1.1.2. ++ ++ The figure in section 7.1.2 suggests a body size of up to 2312 ++ bytes is allowed, which is a bit confusing, I suspect this ++ represents the 2304 bytes of real data, plus a possible 8 bytes of ++ WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ ++ ++ ++#define IEEE80211_HLEN 30 ++#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) ++ ++ ++/* this is stolen from ipw2200 driver */ ++#define IEEE_IBSS_MAC_HASH_SIZE 31 ++ ++struct ieee_ibss_seq { ++ u8 mac[ETH_ALEN]; ++ u16 seq_num; ++ u16 frag_num; ++ unsigned long packet_time; ++ _list list; ++}; ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW)||defined(PLATFORM_FREEBSD) ++ ++struct rtw_ieee80211_hdr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++} __attribute__ ((packed)); ++ ++struct rtw_ieee80211_hdr_3addr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++} __attribute__ ((packed)); ++ ++ ++struct rtw_ieee80211_hdr_qos { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++ u16 qc; ++} __attribute__ ((packed)); ++ ++struct rtw_ieee80211_hdr_3addr_qos { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u16 qc; ++} __attribute__ ((packed)); ++ ++struct eapol { ++ u8 snap[6]; ++ u16 ethertype; ++ u8 version; ++ u8 type; ++ u16 length; ++} __attribute__ ((packed)); ++ ++#endif ++ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct rtw_ieee80211_hdr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++}; ++ ++struct rtw_ieee80211_hdr_3addr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++}; ++ ++ ++struct rtw_ieee80211_hdr_qos { ++ struct rtw_ieee80211_hdr wlan_hdr; ++ u16 qc; ++}; ++ ++struct rtw_ieee80211_hdr_3addr_qos { ++ struct rtw_ieee80211_hdr_3addr wlan_hdr; ++ u16 qc; ++}; ++ ++struct eapol { ++ u8 snap[6]; ++ u16 ethertype; ++ u8 version; ++ u8 type; ++ u16 length; ++}; ++#pragma pack() ++ ++#endif ++ ++ ++ ++enum eap_type { ++ EAP_PACKET = 0, ++ EAPOL_START, ++ EAPOL_LOGOFF, ++ EAPOL_KEY, ++ EAPOL_ENCAP_ASF_ALERT ++}; ++ ++#define IEEE80211_3ADDR_LEN 24 ++#define IEEE80211_4ADDR_LEN 30 ++#define IEEE80211_FCS_LEN 4 ++ ++#define MIN_FRAG_THRESHOLD 256U ++#define MAX_FRAG_THRESHOLD 2346U ++ ++/* Frame control field constants */ ++#define RTW_IEEE80211_FCTL_VERS 0x0003 ++#define RTW_IEEE80211_FCTL_FTYPE 0x000c ++#define RTW_IEEE80211_FCTL_STYPE 0x00f0 ++#define RTW_IEEE80211_FCTL_TODS 0x0100 ++#define RTW_IEEE80211_FCTL_FROMDS 0x0200 ++#define RTW_IEEE80211_FCTL_MOREFRAGS 0x0400 ++#define RTW_IEEE80211_FCTL_RETRY 0x0800 ++#define RTW_IEEE80211_FCTL_PM 0x1000 ++#define RTW_IEEE80211_FCTL_MOREDATA 0x2000 ++#define RTW_IEEE80211_FCTL_PROTECTED 0x4000 ++#define RTW_IEEE80211_FCTL_ORDER 0x8000 ++#define RTW_IEEE80211_FCTL_CTL_EXT 0x0f00 ++ ++#define RTW_IEEE80211_FTYPE_MGMT 0x0000 ++#define RTW_IEEE80211_FTYPE_CTL 0x0004 ++#define RTW_IEEE80211_FTYPE_DATA 0x0008 ++#define RTW_IEEE80211_FTYPE_EXT 0x000c ++ ++/* management */ ++#define RTW_IEEE80211_STYPE_ASSOC_REQ 0x0000 ++#define RTW_IEEE80211_STYPE_ASSOC_RESP 0x0010 ++#define RTW_IEEE80211_STYPE_REASSOC_REQ 0x0020 ++#define RTW_IEEE80211_STYPE_REASSOC_RESP 0x0030 ++#define RTW_IEEE80211_STYPE_PROBE_REQ 0x0040 ++#define RTW_IEEE80211_STYPE_PROBE_RESP 0x0050 ++#define RTW_IEEE80211_STYPE_BEACON 0x0080 ++#define RTW_IEEE80211_STYPE_ATIM 0x0090 ++#define RTW_IEEE80211_STYPE_DISASSOC 0x00A0 ++#define RTW_IEEE80211_STYPE_AUTH 0x00B0 ++#define RTW_IEEE80211_STYPE_DEAUTH 0x00C0 ++#define RTW_IEEE80211_STYPE_ACTION 0x00D0 ++ ++/* control */ ++#define RTW_IEEE80211_STYPE_CTL_EXT 0x0060 ++#define RTW_IEEE80211_STYPE_BACK_REQ 0x0080 ++#define RTW_IEEE80211_STYPE_BACK 0x0090 ++#define RTW_IEEE80211_STYPE_PSPOLL 0x00A0 ++#define RTW_IEEE80211_STYPE_RTS 0x00B0 ++#define RTW_IEEE80211_STYPE_CTS 0x00C0 ++#define RTW_IEEE80211_STYPE_ACK 0x00D0 ++#define RTW_IEEE80211_STYPE_CFEND 0x00E0 ++#define RTW_IEEE80211_STYPE_CFENDACK 0x00F0 ++ ++/* data */ ++#define RTW_IEEE80211_STYPE_DATA 0x0000 ++#define RTW_IEEE80211_STYPE_DATA_CFACK 0x0010 ++#define RTW_IEEE80211_STYPE_DATA_CFPOLL 0x0020 ++#define RTW_IEEE80211_STYPE_DATA_CFACKPOLL 0x0030 ++#define RTW_IEEE80211_STYPE_NULLFUNC 0x0040 ++#define RTW_IEEE80211_STYPE_CFACK 0x0050 ++#define RTW_IEEE80211_STYPE_CFPOLL 0x0060 ++#define RTW_IEEE80211_STYPE_CFACKPOLL 0x0070 ++#define RTW_IEEE80211_STYPE_QOS_DATA 0x0080 ++#define RTW_IEEE80211_STYPE_QOS_DATA_CFACK 0x0090 ++#define RTW_IEEE80211_STYPE_QOS_DATA_CFPOLL 0x00A0 ++#define RTW_IEEE80211_STYPE_QOS_DATA_CFACKPOLL 0x00B0 ++#define RTW_IEEE80211_STYPE_QOS_NULLFUNC 0x00C0 ++#define RTW_IEEE80211_STYPE_QOS_CFACK 0x00D0 ++#define RTW_IEEE80211_STYPE_QOS_CFPOLL 0x00E0 ++#define RTW_IEEE80211_STYPE_QOS_CFACKPOLL 0x00F0 ++ ++/* sequence control field */ ++#define RTW_IEEE80211_SCTL_FRAG 0x000F ++#define RTW_IEEE80211_SCTL_SEQ 0xFFF0 ++ ++ ++#define RTW_ERP_INFO_NON_ERP_PRESENT BIT(0) ++#define RTW_ERP_INFO_USE_PROTECTION BIT(1) ++#define RTW_ERP_INFO_BARKER_PREAMBLE_MODE BIT(2) ++ ++/* QoS,QOS */ ++#define NORMAL_ACK 0 ++#define NO_ACK 1 ++#define NON_EXPLICIT_ACK 2 ++#define BLOCK_ACK 3 ++ ++#ifndef ETH_P_PAE ++#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ ++#endif /* ETH_P_PAE */ ++ ++#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ ++ ++#define ETH_P_ECONET 0x0018 ++ ++#ifndef ETH_P_80211_RAW ++#define ETH_P_80211_RAW (ETH_P_ECONET + 1) ++#endif ++ ++/* IEEE 802.11 defines */ ++ ++#define P80211_OUI_LEN 3 ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) || defined(PLATFORM_FREEBSD) ++ ++struct ieee80211_snap_hdr { ++ ++ u8 dsap; /* always 0xAA */ ++ u8 ssap; /* always 0xAA */ ++ u8 ctrl; /* always 0x03 */ ++ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_snap_hdr { ++ ++ u8 dsap; /* always 0xAA */ ++ u8 ssap; /* always 0xAA */ ++ u8 ctrl; /* always 0x03 */ ++ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ ++ ++}; ++#pragma pack() ++ ++#endif ++ ++ ++#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) ++ ++#define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) ++#define WLAN_FC_GET_STYPE(fc) ((fc) & RTW_IEEE80211_FCTL_STYPE) ++ ++#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f) ++ ++#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG) ++#define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ) ++ ++/* Authentication algorithms */ ++#define WLAN_AUTH_OPEN 0 ++#define WLAN_AUTH_SHARED_KEY 1 ++ ++#define WLAN_AUTH_CHALLENGE_LEN 128 ++ ++#define WLAN_CAPABILITY_BSS (1<<0) ++#define WLAN_CAPABILITY_IBSS (1<<1) ++#define WLAN_CAPABILITY_CF_POLLABLE (1<<2) ++#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3) ++#define WLAN_CAPABILITY_PRIVACY (1<<4) ++#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5) ++#define WLAN_CAPABILITY_PBCC (1<<6) ++#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) ++#define WLAN_CAPABILITY_SHORT_SLOT (1<<10) ++ ++/* Status codes */ ++#define WLAN_STATUS_SUCCESS 0 ++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 ++#define WLAN_STATUS_CAPS_UNSUPPORTED 10 ++#define WLAN_STATUS_REASSOC_NO_ASSOC 11 ++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 ++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 ++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 ++#define WLAN_STATUS_CHALLENGE_FAIL 15 ++#define WLAN_STATUS_AUTH_TIMEOUT 16 ++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 ++#define WLAN_STATUS_ASSOC_DENIED_RATES 18 ++/* 802.11b */ ++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 ++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 ++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 ++ ++/* Reason codes */ ++#define WLAN_REASON_UNSPECIFIED 1 ++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 ++#define WLAN_REASON_DEAUTH_LEAVING 3 ++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 ++#define WLAN_REASON_DISASSOC_AP_BUSY 5 ++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 ++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 ++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 ++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 ++#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534 ++#define WLAN_REASON_EXPIRATION_CHK 65535 ++ ++/* Information Element IDs */ ++#define WLAN_EID_SSID 0 ++#define WLAN_EID_SUPP_RATES 1 ++#define WLAN_EID_FH_PARAMS 2 ++#define WLAN_EID_DS_PARAMS 3 ++#define WLAN_EID_CF_PARAMS 4 ++#define WLAN_EID_TIM 5 ++#define WLAN_EID_IBSS_PARAMS 6 ++#define WLAN_EID_CHALLENGE 16 ++/* EIDs defined by IEEE 802.11h - START */ ++#define WLAN_EID_PWR_CONSTRAINT 32 ++#define WLAN_EID_PWR_CAPABILITY 33 ++#define WLAN_EID_TPC_REQUEST 34 ++#define WLAN_EID_TPC_REPORT 35 ++#define WLAN_EID_SUPPORTED_CHANNELS 36 ++#define WLAN_EID_CHANNEL_SWITCH 37 ++#define WLAN_EID_MEASURE_REQUEST 38 ++#define WLAN_EID_MEASURE_REPORT 39 ++#define WLAN_EID_QUITE 40 ++#define WLAN_EID_IBSS_DFS 41 ++/* EIDs defined by IEEE 802.11h - END */ ++#define WLAN_EID_ERP_INFO 42 ++#define WLAN_EID_HT_CAP 45 ++#define WLAN_EID_RSN 48 ++#define WLAN_EID_EXT_SUPP_RATES 50 ++#define WLAN_EID_MOBILITY_DOMAIN 54 ++#define WLAN_EID_FAST_BSS_TRANSITION 55 ++#define WLAN_EID_TIMEOUT_INTERVAL 56 ++#define WLAN_EID_RIC_DATA 57 ++#define WLAN_EID_HT_OPERATION 61 ++#define WLAN_EID_SECONDARY_CHANNEL_OFFSET 62 ++#define WLAN_EID_20_40_BSS_COEXISTENCE 72 ++#define WLAN_EID_20_40_BSS_INTOLERANT 73 ++#define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74 ++#define WLAN_EID_MMIE 76 ++#define WLAN_EID_VENDOR_SPECIFIC 221 ++#define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC) ++ ++#define IEEE80211_MGMT_HDR_LEN 24 ++#define IEEE80211_DATA_HDR3_LEN 24 ++#define IEEE80211_DATA_HDR4_LEN 30 ++ ++ ++#define IEEE80211_STATMASK_SIGNAL (1<<0) ++#define IEEE80211_STATMASK_RSSI (1<<1) ++#define IEEE80211_STATMASK_NOISE (1<<2) ++#define IEEE80211_STATMASK_RATE (1<<3) ++#define IEEE80211_STATMASK_WEMASK 0x7 ++ ++ ++#define IEEE80211_CCK_MODULATION (1<<0) ++#define IEEE80211_OFDM_MODULATION (1<<1) ++ ++#define IEEE80211_24GHZ_BAND (1<<0) ++#define IEEE80211_52GHZ_BAND (1<<1) ++ ++#define IEEE80211_CCK_RATE_LEN 4 ++#define IEEE80211_NUM_OFDM_RATESLEN 8 ++ ++ ++#define IEEE80211_CCK_RATE_1MB 0x02 ++#define IEEE80211_CCK_RATE_2MB 0x04 ++#define IEEE80211_CCK_RATE_5MB 0x0B ++#define IEEE80211_CCK_RATE_11MB 0x16 ++#define IEEE80211_OFDM_RATE_LEN 8 ++#define IEEE80211_OFDM_RATE_6MB 0x0C ++#define IEEE80211_OFDM_RATE_9MB 0x12 ++#define IEEE80211_OFDM_RATE_12MB 0x18 ++#define IEEE80211_OFDM_RATE_18MB 0x24 ++#define IEEE80211_OFDM_RATE_24MB 0x30 ++#define IEEE80211_OFDM_RATE_36MB 0x48 ++#define IEEE80211_OFDM_RATE_48MB 0x60 ++#define IEEE80211_OFDM_RATE_54MB 0x6C ++#define IEEE80211_BASIC_RATE_MASK 0x80 ++ ++#define IEEE80211_CCK_RATE_1MB_MASK (1<<0) ++#define IEEE80211_CCK_RATE_2MB_MASK (1<<1) ++#define IEEE80211_CCK_RATE_5MB_MASK (1<<2) ++#define IEEE80211_CCK_RATE_11MB_MASK (1<<3) ++#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4) ++#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5) ++#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6) ++#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7) ++#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8) ++#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9) ++#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10) ++#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11) ++ ++#define IEEE80211_CCK_RATES_MASK 0x0000000F ++#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \ ++ IEEE80211_CCK_RATE_2MB_MASK) ++#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \ ++ IEEE80211_CCK_RATE_5MB_MASK | \ ++ IEEE80211_CCK_RATE_11MB_MASK) ++ ++#define IEEE80211_OFDM_RATES_MASK 0x00000FF0 ++#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \ ++ IEEE80211_OFDM_RATE_12MB_MASK | \ ++ IEEE80211_OFDM_RATE_24MB_MASK) ++#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \ ++ IEEE80211_OFDM_RATE_9MB_MASK | \ ++ IEEE80211_OFDM_RATE_18MB_MASK | \ ++ IEEE80211_OFDM_RATE_36MB_MASK | \ ++ IEEE80211_OFDM_RATE_48MB_MASK | \ ++ IEEE80211_OFDM_RATE_54MB_MASK) ++#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \ ++ IEEE80211_CCK_DEFAULT_RATES_MASK) ++ ++#define IEEE80211_NUM_OFDM_RATES 8 ++#define IEEE80211_NUM_CCK_RATES 4 ++#define IEEE80211_OFDM_SHIFT_MASK_A 4 ++ ++ ++ ++ ++/* NOTE: This data is for statistical purposes; not all hardware provides this ++ * information for frames received. Not setting these will not cause ++ * any adverse affects. */ ++struct ieee80211_rx_stats { ++ //u32 mac_time[2]; ++ s8 rssi; ++ u8 signal; ++ u8 noise; ++ u8 received_channel; ++ u16 rate; /* in 100 kbps */ ++ //u8 control; ++ u8 mask; ++ u8 freq; ++ u16 len; ++}; ++ ++/* IEEE 802.11 requires that STA supports concurrent reception of at least ++ * three fragmented frames. This define can be increased to support more ++ * concurrent frames, but it should be noted that each entry can consume about ++ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ ++#define IEEE80211_FRAG_CACHE_LEN 4 ++ ++struct ieee80211_frag_entry { ++ u32 first_frag_time; ++ uint seq; ++ uint last_frag; ++ uint qos; //jackson ++ uint tid; //jackson ++ struct sk_buff *skb; ++ u8 src_addr[ETH_ALEN]; ++ u8 dst_addr[ETH_ALEN]; ++}; ++ ++#ifndef PLATFORM_FREEBSD //Baron BSD has already defined ++struct ieee80211_stats { ++ uint tx_unicast_frames; ++ uint tx_multicast_frames; ++ uint tx_fragments; ++ uint tx_unicast_octets; ++ uint tx_multicast_octets; ++ uint tx_deferred_transmissions; ++ uint tx_single_retry_frames; ++ uint tx_multiple_retry_frames; ++ uint tx_retry_limit_exceeded; ++ uint tx_discards; ++ uint rx_unicast_frames; ++ uint rx_multicast_frames; ++ uint rx_fragments; ++ uint rx_unicast_octets; ++ uint rx_multicast_octets; ++ uint rx_fcs_errors; ++ uint rx_discards_no_buffer; ++ uint tx_discards_wrong_sa; ++ uint rx_discards_undecryptable; ++ uint rx_message_in_msg_fragments; ++ uint rx_message_in_bad_msg_fragments; ++}; ++#endif //PLATFORM_FREEBSD ++struct ieee80211_softmac_stats{ ++ uint rx_ass_ok; ++ uint rx_ass_err; ++ uint rx_probe_rq; ++ uint tx_probe_rs; ++ uint tx_beacons; ++ uint rx_auth_rq; ++ uint rx_auth_rs_ok; ++ uint rx_auth_rs_err; ++ uint tx_auth_rq; ++ uint no_auth_rs; ++ uint no_ass_rs; ++ uint tx_ass_rq; ++ uint rx_ass_rq; ++ uint tx_probe_rq; ++ uint reassoc; ++ uint swtxstop; ++ uint swtxawake; ++}; ++ ++#define SEC_KEY_1 (1<<0) ++#define SEC_KEY_2 (1<<1) ++#define SEC_KEY_3 (1<<2) ++#define SEC_KEY_4 (1<<3) ++#define SEC_ACTIVE_KEY (1<<4) ++#define SEC_AUTH_MODE (1<<5) ++#define SEC_UNICAST_GROUP (1<<6) ++#define SEC_LEVEL (1<<7) ++#define SEC_ENABLED (1<<8) ++ ++#define SEC_LEVEL_0 0 /* None */ ++#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ ++#define SEC_LEVEL_2 2 /* Level 1 + TKIP */ ++#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ ++#define SEC_LEVEL_3 4 /* Level 2 + CCMP */ ++ ++#define WEP_KEYS 4 ++#define WEP_KEY_LEN 13 ++ ++#ifdef CONFIG_IEEE80211W ++#define BIP_MAX_KEYID 5 ++#define BIP_AAD_SIZE 20 ++#endif //CONFIG_IEEE80211W ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct ieee80211_security { ++ u16 active_key:2, ++ enabled:1, ++ auth_mode:2, ++ auth_algo:4, ++ unicast_uses_group:1; ++ u8 key_sizes[WEP_KEYS]; ++ u8 keys[WEP_KEYS][WEP_KEY_LEN]; ++ u8 level; ++ u16 flags; ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_security { ++ u16 active_key:2, ++ enabled:1, ++ auth_mode:2, ++ auth_algo:4, ++ unicast_uses_group:1; ++ u8 key_sizes[WEP_KEYS]; ++ u8 keys[WEP_KEYS][WEP_KEY_LEN]; ++ u8 level; ++ u16 flags; ++} ; ++#pragma pack() ++ ++#endif ++ ++/* ++ ++ 802.11 data frame from AP ++ ++ ,-------------------------------------------------------------------. ++Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 | ++ |------|------|---------|---------|---------|------|---------|------| ++Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs | ++ | | tion | (BSSID) | | | ence | data | | ++ `-------------------------------------------------------------------' ++ ++Total: 28-2340 bytes ++ ++*/ ++ ++struct ieee80211_header_data { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[6]; ++ u8 addr2[6]; ++ u8 addr3[6]; ++ u16 seq_ctrl; ++}; ++ ++#define BEACON_PROBE_SSID_ID_POSITION 12 ++ ++/* Management Frame Information Element Types */ ++#define MFIE_TYPE_SSID 0 ++#define MFIE_TYPE_RATES 1 ++#define MFIE_TYPE_FH_SET 2 ++#define MFIE_TYPE_DS_SET 3 ++#define MFIE_TYPE_CF_SET 4 ++#define MFIE_TYPE_TIM 5 ++#define MFIE_TYPE_IBSS_SET 6 ++#define MFIE_TYPE_CHALLENGE 16 ++#define MFIE_TYPE_ERP 42 ++#define MFIE_TYPE_RSN 48 ++#define MFIE_TYPE_RATES_EX 50 ++#define MFIE_TYPE_GENERIC 221 ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct ieee80211_info_element_hdr { ++ u8 id; ++ u8 len; ++} __attribute__ ((packed)); ++ ++struct ieee80211_info_element { ++ u8 id; ++ u8 len; ++ u8 data[0]; ++} __attribute__ ((packed)); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_info_element_hdr { ++ u8 id; ++ u8 len; ++} ; ++ ++struct ieee80211_info_element { ++ u8 id; ++ u8 len; ++ u8 data[0]; ++} ; ++#pragma pack() ++ ++#endif ++ ++ ++/* ++ * These are the data types that can make up management packets ++ * ++ u16 auth_algorithm; ++ u16 auth_sequence; ++ u16 beacon_interval; ++ u16 capability; ++ u8 current_ap[ETH_ALEN]; ++ u16 listen_interval; ++ struct { ++ u16 association_id:14, reserved:2; ++ } __attribute__ ((packed)); ++ u32 time_stamp[2]; ++ u16 reason; ++ u16 status; ++*/ ++ ++#define IEEE80211_DEFAULT_TX_ESSID "Penguin" ++#define IEEE80211_DEFAULT_BASIC_RATE 10 ++ ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++ ++struct ieee80211_authentication { ++ struct ieee80211_header_data header; ++ u16 algorithm; ++ u16 transaction; ++ u16 status; ++ //struct ieee80211_info_element_hdr info_element; ++} __attribute__ ((packed)); ++ ++ ++struct ieee80211_probe_response { ++ struct ieee80211_header_data header; ++ u32 time_stamp[2]; ++ u16 beacon_interval; ++ u16 capability; ++ struct ieee80211_info_element info_element; ++} __attribute__ ((packed)); ++ ++struct ieee80211_probe_request { ++ struct ieee80211_header_data header; ++ /*struct ieee80211_info_element info_element;*/ ++} __attribute__ ((packed)); ++ ++struct ieee80211_assoc_request_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 listen_interval; ++ //u8 current_ap[ETH_ALEN]; ++ struct ieee80211_info_element_hdr info_element; ++} __attribute__ ((packed)); ++ ++struct ieee80211_assoc_response_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 status; ++ u16 aid; ++// struct ieee80211_info_element info_element; /* supported rates */ ++} __attribute__ ((packed)); ++#endif ++ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_authentication { ++ struct ieee80211_header_data header; ++ u16 algorithm; ++ u16 transaction; ++ u16 status; ++ //struct ieee80211_info_element_hdr info_element; ++} ; ++ ++ ++struct ieee80211_probe_response { ++ struct ieee80211_header_data header; ++ u32 time_stamp[2]; ++ u16 beacon_interval; ++ u16 capability; ++ struct ieee80211_info_element info_element; ++} ; ++ ++struct ieee80211_probe_request { ++ struct ieee80211_header_data header; ++ /*struct ieee80211_info_element info_element;*/ ++} ; ++ ++struct ieee80211_assoc_request_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 listen_interval; ++ //u8 current_ap[ETH_ALEN]; ++ struct ieee80211_info_element_hdr info_element; ++} ; ++ ++struct ieee80211_assoc_response_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 status; ++ u16 aid; ++// struct ieee80211_info_element info_element; /* supported rates */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++ ++ ++ ++struct ieee80211_txb { ++ u8 nr_frags; ++ u8 encrypted; ++ u16 reserved; ++ u16 frag_size; ++ u16 payload_size; ++ struct sk_buff *fragments[0]; ++}; ++ ++ ++/* SWEEP TABLE ENTRIES NUMBER*/ ++#define MAX_SWEEP_TAB_ENTRIES 42 ++#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 ++/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs ++ * only use 8, and then use extended rates for the remaining supported ++ * rates. Other APs, however, stick all of their supported rates on the ++ * main rates information element... */ ++#define MAX_RATES_LENGTH ((u8)12) ++#define MAX_RATES_EX_LENGTH ((u8)16) ++#define MAX_NETWORK_COUNT 128 ++#define MAX_CHANNEL_NUMBER 161 ++#define IEEE80211_SOFTMAC_SCAN_TIME 400 ++//(HZ / 2) ++#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2) ++ ++#define CRC_LENGTH 4U ++ ++#define MAX_WPA_IE_LEN (256) ++#define MAX_WPS_IE_LEN (512) ++#define MAX_P2P_IE_LEN (256) ++#define MAX_WFD_IE_LEN (128) ++ ++#define NETWORK_EMPTY_ESSID (1<<0) ++#define NETWORK_HAS_OFDM (1<<1) ++#define NETWORK_HAS_CCK (1<<2) ++ ++#define IEEE80211_DTIM_MBCAST 4 ++#define IEEE80211_DTIM_UCAST 2 ++#define IEEE80211_DTIM_VALID 1 ++#define IEEE80211_DTIM_INVALID 0 ++ ++#define IEEE80211_PS_DISABLED 0 ++#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST ++#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST ++#define IW_ESSID_MAX_SIZE 32 ++#if 0 ++struct ieee80211_network { ++ /* These entries are used to identify a unique network */ ++ u8 bssid[ETH_ALEN]; ++ u8 channel; ++ /* Ensure null-terminated for any debug msgs */ ++ u8 ssid[IW_ESSID_MAX_SIZE + 1]; ++ u8 ssid_len; ++ u8 rssi; //relative signal strength ++ u8 sq; //signal quality ++ ++ /* These are network statistics */ ++ //struct ieee80211_rx_stats stats; ++ u16 capability; ++ u16 aid; ++ u8 rates[MAX_RATES_LENGTH]; ++ u8 rates_len; ++ u8 rates_ex[MAX_RATES_EX_LENGTH]; ++ u8 rates_ex_len; ++ ++ u8 edca_parmsets[18]; ++ ++ u8 mode; ++ u8 flags; ++ u8 time_stamp[8]; ++ u16 beacon_interval; ++ u16 listen_interval; ++ u16 atim_window; ++ u8 wpa_ie[MAX_WPA_IE_LEN]; ++ size_t wpa_ie_len; ++ u8 rsn_ie[MAX_WPA_IE_LEN]; ++ size_t rsn_ie_len; ++ u8 country[6]; ++ u8 dtim_period; ++ u8 dtim_data; ++ u8 power_constraint; ++ u8 qosinfo; ++ u8 qbssload[5]; ++ u8 network_type; ++ int join_res; ++ unsigned long last_scanned; ++}; ++#endif ++/* ++join_res: ++-1: authentication fail ++-2: association fail ++> 0: TID ++*/ ++ ++#ifndef PLATFORM_FREEBSD //Baron BSD has already defined ++ ++enum ieee80211_state { ++ ++ /* the card is not linked at all */ ++ IEEE80211_NOLINK = 0, ++ ++ /* IEEE80211_ASSOCIATING* are for BSS client mode ++ * the driver shall not perform RX filtering unless ++ * the state is LINKED. ++ * The driver shall just check for the state LINKED and ++ * defaults to NOLINK for ALL the other states (including ++ * LINKED_SCANNING) ++ */ ++ ++ /* the association procedure will start (wq scheduling)*/ ++ IEEE80211_ASSOCIATING, ++ IEEE80211_ASSOCIATING_RETRY, ++ ++ /* the association procedure is sending AUTH request*/ ++ IEEE80211_ASSOCIATING_AUTHENTICATING, ++ ++ /* the association procedure has successfully authentcated ++ * and is sending association request ++ */ ++ IEEE80211_ASSOCIATING_AUTHENTICATED, ++ ++ /* the link is ok. the card associated to a BSS or linked ++ * to a ibss cell or acting as an AP and creating the bss ++ */ ++ IEEE80211_LINKED, ++ ++ /* same as LINKED, but the driver shall apply RX filter ++ * rules as we are in NO_LINK mode. As the card is still ++ * logically linked, but it is doing a syncro site survey ++ * then it will be back to LINKED state. ++ */ ++ IEEE80211_LINKED_SCANNING, ++ ++}; ++#endif //PLATFORM_FREEBSD ++ ++#define DEFAULT_MAX_SCAN_AGE (15 * HZ) ++#define DEFAULT_FTS 2346 ++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" ++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] ++ ++#ifdef PLATFORM_FREEBSD //Baron change func to macro ++#define is_multicast_mac_addr(Addr) ((((Addr[0]) & 0x01) == 0x01) && ((Addr[0]) != 0xff)) ++#define is_broadcast_mac_addr(Addr) ((((Addr[0]) & 0xff) == 0xff) && (((Addr[1]) & 0xff) == 0xff) && \ ++(((Addr[2]) & 0xff) == 0xff) && (((Addr[3]) & 0xff) == 0xff) && (((Addr[4]) & 0xff) == 0xff) && \ ++(((Addr[5]) & 0xff) == 0xff)) ++#else ++extern __inline int is_multicast_mac_addr(const u8 *addr) ++{ ++ return ((addr[0] != 0xff) && (0x01 & addr[0])); ++} ++ ++extern __inline int is_broadcast_mac_addr(const u8 *addr) ++{ ++ return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ ++ (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); ++} ++ ++extern __inline int is_zero_mac_addr(const u8 *addr) ++{ ++ return ((addr[0] == 0x00) && (addr[1] == 0x00) && (addr[2] == 0x00) && \ ++ (addr[3] == 0x00) && (addr[4] == 0x00) && (addr[5] == 0x00)); ++} ++#endif //PLATFORM_FREEBSD ++ ++#define CFG_IEEE80211_RESERVE_FCS (1<<0) ++#define CFG_IEEE80211_COMPUTE_FCS (1<<1) ++ ++typedef struct tx_pending_t{ ++ int frag; ++ struct ieee80211_txb *txb; ++}tx_pending_t; ++ ++ ++ ++#define MAXTID 16 ++ ++#define IEEE_A (1<<0) ++#define IEEE_B (1<<1) ++#define IEEE_G (1<<2) ++#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G) ++ ++//Baron move to ieee80211.c ++int ieee80211_is_empty_essid(const char *essid, int essid_len); ++int ieee80211_get_hdrlen(u16 fc); ++ ++#if 0 ++/* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */ ++#define WLAN_ACTION_SPECTRUM_MGMT 0 ++#define WLAN_ACTION_QOS 1 ++#define WLAN_ACTION_DLS 2 ++#define WLAN_ACTION_BLOCK_ACK 3 ++#define WLAN_ACTION_RADIO_MEASUREMENT 5 ++#define WLAN_ACTION_FT 6 ++#define WLAN_ACTION_SA_QUERY 8 ++#define WLAN_ACTION_WMM 17 ++#endif ++ ++ ++/* Action category code */ ++enum rtw_ieee80211_category { ++ RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ RTW_WLAN_CATEGORY_QOS = 1, ++ RTW_WLAN_CATEGORY_DLS = 2, ++ RTW_WLAN_CATEGORY_BACK = 3, ++ RTW_WLAN_CATEGORY_PUBLIC = 4, //IEEE 802.11 public action frames ++ RTW_WLAN_CATEGORY_RADIO_MEASUREMENT = 5, ++ RTW_WLAN_CATEGORY_FT = 6, ++ RTW_WLAN_CATEGORY_HT = 7, ++ RTW_WLAN_CATEGORY_SA_QUERY = 8, ++ RTW_WLAN_CATEGORY_UNPROTECTED_WNM = 11, // add for CONFIG_IEEE80211W, none 11w also can use ++ RTW_WLAN_CATEGORY_TDLS = 12, ++ RTW_WLAN_CATEGORY_SELF_PROTECTED = 15, // add for CONFIG_IEEE80211W, none 11w also can use ++ RTW_WLAN_CATEGORY_WMM = 17, ++ RTW_WLAN_CATEGORY_P2P = 0x7f,//P2P action frames ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum rtw_ieee80211_spectrum_mgmt_actioncode { ++ RTW_WLAN_ACTION_SPCT_MSR_REQ = 0, ++ RTW_WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ RTW_WLAN_ACTION_SPCT_TPC_REQ = 2, ++ RTW_WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ RTW_WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ RTW_WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++enum _PUBLIC_ACTION{ ++ ACT_PUBLIC_BSSCOEXIST = 0, // 20/40 BSS Coexistence ++ ACT_PUBLIC_DSE_ENABLE = 1, ++ ACT_PUBLIC_DSE_DEENABLE = 2, ++ ACT_PUBLIC_DSE_REG_LOCATION = 3, ++ ACT_PUBLIC_EXT_CHL_SWITCH = 4, ++ ACT_PUBLIC_DSE_MSR_REQ = 5, ++ ACT_PUBLIC_DSE_MSR_RPRT = 6, ++ ACT_PUBLIC_MP = 7, // Measurement Pilot ++ ACT_PUBLIC_DSE_PWR_CONSTRAINT = 8, ++ ACT_PUBLIC_VENDOR = 9, // for WIFI_DIRECT ++ ACT_PUBLIC_GAS_INITIAL_REQ = 10, ++ ACT_PUBLIC_GAS_INITIAL_RSP = 11, ++ ACT_PUBLIC_GAS_COMEBACK_REQ = 12, ++ ACT_PUBLIC_GAS_COMEBACK_RSP = 13, ++ ACT_PUBLIC_TDLS_DISCOVERY_RSP = 14, ++ ACT_PUBLIC_LOCATION_TRACK = 15, ++ ACT_PUBLIC_MAX ++}; ++ ++#ifdef CONFIG_TDLS ++enum TDLS_ACTION_FIELD{ ++ TDLS_SETUP_REQUEST = 0, ++ TDLS_SETUP_RESPONSE = 1, ++ TDLS_SETUP_CONFIRM = 2, ++ TDLS_TEARDOWN = 3, ++ TDLS_PEER_TRAFFIC_INDICATION = 4, ++ TDLS_CHANNEL_SWITCH_REQUEST = 5, ++ TDLS_CHANNEL_SWITCH_RESPONSE = 6, ++ TDLS_PEER_PSM_REQUEST = 7, ++ TDLS_PEER_PSM_RESPONSE = 8, ++ TDLS_PEER_TRAFFIC_RESPONSE = 9, ++ TDLS_DISCOVERY_REQUEST = 10, ++ TDLS_DISCOVERY_RESPONSE = 14, //it's used in public action frame ++}; ++ ++#define TUNNELED_PROBE_REQ 15 ++#define TUNNELED_PROBE_RSP 16 ++#endif //CONFIG_TDLS ++ ++/* BACK action code */ ++enum rtw_ieee80211_back_actioncode { ++ RTW_WLAN_ACTION_ADDBA_REQ = 0, ++ RTW_WLAN_ACTION_ADDBA_RESP = 1, ++ RTW_WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum rtw_ieee80211_ht_actioncode { ++ RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ RTW_WLAN_ACTION_SM_PS = 1, ++ RTW_WLAN_ACTION_PSPM = 2, ++ RTW_WLAN_ACTION_PCO_PHASE = 3, ++ RTW_WLAN_ACTION_MIMO_CSI_MX = 4, ++ RTW_WLAN_ACTION_MIMO_NONCP_BF = 5, ++ RTW_WLAN_ACTION_MIMP_CP_BF = 6, ++ RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ RTW_WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum rtw_ieee80211_back_parties { ++ RTW_WLAN_BACK_RECIPIENT = 0, ++ RTW_WLAN_BACK_INITIATOR = 1, ++ RTW_WLAN_BACK_TIMER = 2, ++}; ++ ++ ++#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) ++ * 00:50:F2 */ ++#ifndef PLATFORM_FREEBSD //Baron BSD has defined ++#define WME_OUI_TYPE 2 ++#endif //PLATFORM_FREEBSD ++#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WME_VERSION 1 ++ ++#define WME_ACTION_CODE_SETUP_REQUEST 0 ++#define WME_ACTION_CODE_SETUP_RESPONSE 1 ++#define WME_ACTION_CODE_TEARDOWN 2 ++ ++#define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0 ++#define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1 ++#define WME_SETUP_RESPONSE_STATUS_REFUSED 3 ++ ++#define WME_TSPEC_DIRECTION_UPLINK 0 ++#define WME_TSPEC_DIRECTION_DOWNLINK 1 ++#define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3 ++ ++ ++#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */ ++ ++#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */ ++ ++/** ++ * enum rtw_ieee80211_channel_flags - channel flags ++ * ++ * Channel flags set by the regulatory control code. ++ * ++ * @RTW_IEEE80211_CHAN_DISABLED: This channel is disabled. ++ * @RTW_IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted ++ * on this channel. ++ * @RTW_IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel. ++ * @RTW_IEEE80211_CHAN_RADAR: Radar detection is required on this channel. ++ * @RTW_IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel ++ * is not permitted. ++ * @RTW_IEEE80211_CHAN_NO_HT40MINUS: extension channel below this channel ++ * is not permitted. ++ */ ++ enum rtw_ieee80211_channel_flags { ++ RTW_IEEE80211_CHAN_DISABLED = 1<<0, ++ RTW_IEEE80211_CHAN_PASSIVE_SCAN = 1<<1, ++ RTW_IEEE80211_CHAN_NO_IBSS = 1<<2, ++ RTW_IEEE80211_CHAN_RADAR = 1<<3, ++ RTW_IEEE80211_CHAN_NO_HT40PLUS = 1<<4, ++ RTW_IEEE80211_CHAN_NO_HT40MINUS = 1<<5, ++ }; ++ ++ #define RTW_IEEE80211_CHAN_NO_HT40 \ ++ (RTW_IEEE80211_CHAN_NO_HT40PLUS | RTW_IEEE80211_CHAN_NO_HT40MINUS) ++ ++/* Represent channel details, subset of ieee80211_channel */ ++struct rtw_ieee80211_channel { ++ //enum ieee80211_band band; ++ //u16 center_freq; ++ u16 hw_value; ++ u32 flags; ++ //int max_antenna_gain; ++ //int max_power; ++ //int max_reg_power; ++ //bool beacon_found; ++ //u32 orig_flags; ++ //int orig_mag; ++ //int orig_mpwr; ++}; ++ ++#define CHAN_FMT \ ++ /*"band:%d, "*/ \ ++ /*"center_freq:%u, "*/ \ ++ "hw_value:%u, " \ ++ "flags:0x%08x" \ ++ /*"max_antenna_gain:%d\n"*/ \ ++ /*"max_power:%d\n"*/ \ ++ /*"max_reg_power:%d\n"*/ \ ++ /*"beacon_found:%u\n"*/ \ ++ /*"orig_flags:0x%08x\n"*/ \ ++ /*"orig_mag:%d\n"*/ \ ++ /*"orig_mpwr:%d\n"*/ ++ ++#define CHAN_ARG(channel) \ ++ /*(channel)->band*/ \ ++ /*, (channel)->center_freq*/ \ ++ (channel)->hw_value \ ++ , (channel)->flags \ ++ /*, (channel)->max_antenna_gain*/ \ ++ /*, (channel)->max_power*/ \ ++ /*, (channel)->max_reg_power*/ \ ++ /*, (channel)->beacon_found*/ \ ++ /*, (channel)->orig_flags*/ \ ++ /*, (channel)->orig_mag*/ \ ++ /*, (channel)->orig_mpwr*/ \ ++ ++/* Parsed Information Elements */ ++struct rtw_ieee802_11_elems { ++ u8 *ssid; ++ u8 ssid_len; ++ u8 *supp_rates; ++ u8 supp_rates_len; ++ u8 *fh_params; ++ u8 fh_params_len; ++ u8 *ds_params; ++ u8 ds_params_len; ++ u8 *cf_params; ++ u8 cf_params_len; ++ u8 *tim; ++ u8 tim_len; ++ u8 *ibss_params; ++ u8 ibss_params_len; ++ u8 *challenge; ++ u8 challenge_len; ++ u8 *erp_info; ++ u8 erp_info_len; ++ u8 *ext_supp_rates; ++ u8 ext_supp_rates_len; ++ u8 *wpa_ie; ++ u8 wpa_ie_len; ++ u8 *rsn_ie; ++ u8 rsn_ie_len; ++ u8 *wme; ++ u8 wme_len; ++ u8 *wme_tspec; ++ u8 wme_tspec_len; ++ u8 *wps_ie; ++ u8 wps_ie_len; ++ u8 *power_cap; ++ u8 power_cap_len; ++ u8 *supp_channels; ++ u8 supp_channels_len; ++ u8 *mdie; ++ u8 mdie_len; ++ u8 *ftie; ++ u8 ftie_len; ++ u8 *timeout_int; ++ u8 timeout_int_len; ++ u8 *ht_capabilities; ++ u8 ht_capabilities_len; ++ u8 *ht_operation; ++ u8 ht_operation_len; ++ u8 *vendor_ht_cap; ++ u8 vendor_ht_cap_len; ++}; ++ ++typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes; ++ ++ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, ++ struct rtw_ieee802_11_elems *elems, ++ int show_errors); ++ ++u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen); ++u8 *rtw_set_ie(u8 *pbuf, sint index, uint len, u8 *source, uint *frlen); ++ ++enum secondary_ch_offset { ++ SCN = 0, /* no secondary channel */ ++ SCA = 1, /* secondary channel above */ ++ SCB = 3, /* secondary channel below */ ++}; ++u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset); ++u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset); ++u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt); ++u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset); ++u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, u8 flags, u16 reason, u16 precedence); ++ ++u8 *rtw_get_ie(u8*pbuf, sint index, sint *len, sint limit); ++u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen); ++int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len); ++ ++void rtw_set_supported_rate(u8* SupportedRates, uint mode) ; ++ ++unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit); ++unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit); ++int rtw_get_wpa_cipher_suite(u8 *s); ++int rtw_get_wpa2_cipher_suite(u8 *s); ++int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher); ++int rtw_parse_wpa2_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher); ++ ++int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len); ++ ++u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen); ++u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen); ++u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr); ++u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content); ++ ++/** ++ * for_each_ie - iterate over continuous IEs ++ * @ie: ++ * @buf: ++ * @buf_len: ++ */ ++#define for_each_ie(ie, buf, buf_len) \ ++ for (ie = (void*)buf; (((u8*)ie) - ((u8*)buf) + 1) < buf_len; ie = (void*)(((u8*)ie) + *(((u8*)ie)+1) + 2)) ++ ++void dump_ies(u8 *buf, u32 buf_len); ++void dump_wps_ie(u8 *ie, u32 ie_len); ++ ++#ifdef CONFIG_P2P ++u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len); ++int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie); ++void dump_p2p_ie(u8 *ie, u32 ie_len); ++u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen); ++u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr); ++u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content); ++u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr); ++void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); ++#endif ++ ++#ifdef CONFIG_WFD ++int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen); ++int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen); ++#endif // CONFIG_WFD ++ ++uint rtw_get_rateset_len(u8 *rateset); ++ ++struct registry_priv; ++int rtw_generate_ie(struct registry_priv *pregistrypriv); ++ ++ ++int rtw_get_bit_value_from_ieee_value(u8 val); ++ ++uint rtw_is_cckrates_included(u8 *rate); ++ ++uint rtw_is_cckratesonly_included(u8 *rate); ++ ++int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); ++ ++void rtw_macaddr_cfg(u8 *mac_addr); ++ ++u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char * MCS_rate); ++ ++int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8* category, u8 *action); ++const char *action_public_str(u8 action); ++ ++#endif /* IEEE80211_H */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/ieee80211_ext.h +@@ -0,0 +1,477 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IEEE80211_EXT_H ++#define __IEEE80211_EXT_H ++ ++#include ++#include ++#include ++ ++#define WMM_OUI_TYPE 2 ++#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WMM_VERSION 1 ++ ++#define WPA_PROTO_WPA BIT(0) ++#define WPA_PROTO_RSN BIT(1) ++ ++#define WPA_KEY_MGMT_IEEE8021X BIT(0) ++#define WPA_KEY_MGMT_PSK BIT(1) ++#define WPA_KEY_MGMT_NONE BIT(2) ++#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) ++#define WPA_KEY_MGMT_WPA_NONE BIT(4) ++ ++ ++#define WPA_CAPABILITY_PREAUTH BIT(0) ++#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) ++#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) ++ ++ ++#define PMKID_LEN 16 ++ ++ ++#ifdef PLATFORM_LINUX ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct wme_ac_parameter { ++#if defined(CONFIG_LITTLE_ENDIAN) ++ /* byte 1 */ ++ u8 aifsn:4, ++ acm:1, ++ aci:2, ++ reserved:1; ++ ++ /* byte 2 */ ++ u8 eCWmin:4, ++ eCWmax:4; ++#elif defined(CONFIG_BIG_ENDIAN) ++ /* byte 1 */ ++ u8 reserved:1, ++ aci:2, ++ acm:1, ++ aifsn:4; ++ ++ /* byte 2 */ ++ u8 eCWmax:4, ++ eCWmin:4; ++#else ++#error "Please fix " ++#endif ++ ++ /* bytes 3 & 4 */ ++ u16 txopLimit; ++} __attribute__ ((packed)); ++ ++struct wme_parameter_element { ++ /* required fields for WME version 1 */ ++ u8 oui[3]; ++ u8 oui_type; ++ u8 oui_subtype; ++ u8 version; ++ u8 acInfo; ++ u8 reserved; ++ struct wme_ac_parameter ac[4]; ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}; ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) ++//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) ++ ++ ++ ++/* Action category code */ ++enum ieee80211_category { ++ WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ WLAN_CATEGORY_QOS = 1, ++ WLAN_CATEGORY_DLS = 2, ++ WLAN_CATEGORY_BACK = 3, ++ WLAN_CATEGORY_HT = 7, ++ WLAN_CATEGORY_WMM = 17, ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum ieee80211_spectrum_mgmt_actioncode { ++ WLAN_ACTION_SPCT_MSR_REQ = 0, ++ WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ WLAN_ACTION_SPCT_TPC_REQ = 2, ++ WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++/* BACK action code */ ++enum ieee80211_back_actioncode { ++ WLAN_ACTION_ADDBA_REQ = 0, ++ WLAN_ACTION_ADDBA_RESP = 1, ++ WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum ieee80211_ht_actioncode { ++ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ WLAN_ACTION_SM_PS = 1, ++ WLAN_ACTION_PSPM = 2, ++ WLAN_ACTION_PCO_PHASE = 3, ++ WLAN_ACTION_MIMO_CSI_MX = 4, ++ WLAN_ACTION_MIMO_NONCP_BF = 5, ++ WLAN_ACTION_MIMP_CP_BF = 6, ++ WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum ieee80211_back_parties { ++ WLAN_BACK_RECIPIENT = 0, ++ WLAN_BACK_INITIATOR = 1, ++ WLAN_BACK_TIMER = 2, ++}; ++ ++#ifdef PLATFORM_LINUX ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) auth; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) reassoc_req; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) disassoc; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_req; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_resp; ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) wme_action; ++#if 0 ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } __attribute__ ((packed)) chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } __attribute__ ((packed)) measurement; ++#endif ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } __attribute__ ((packed)) addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } __attribute__ ((packed)) addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } __attribute__ ((packed)) delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) mesh_action; ++ } __attribute__ ((packed)) u; ++ } __attribute__ ((packed)) action; ++ } __attribute__ ((packed)) u; ++}__attribute__ ((packed)); ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } auth; ++ struct { ++ u16 reason_code; ++ } deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } reassoc_req; ++ struct { ++ u16 reason_code; ++ } disassoc; ++#if 0 ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } probe_req; ++ ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } probe_resp; ++#endif ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } wme_action; ++/* ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } measurement; ++*/ ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } mesh_action; ++ } u; ++ } action; ++ } u; ++} ; ++ ++#pragma pack() ++ ++#endif ++ ++/* mgmt header + 1 byte category code */ ++#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) ++ ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/if_ether.h +@@ -0,0 +1,112 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef _LINUX_IF_ETHER_H ++#define _LINUX_IF_ETHER_H ++ ++/* ++ * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble ++ * and FCS/CRC (frame check sequence). ++ */ ++ ++#define ETH_ALEN 6 /* Octets in one ethernet addr */ ++#define ETH_HLEN 14 /* Total octets in header. */ ++#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ ++#define ETH_DATA_LEN 1500 /* Max. octets in payload */ ++#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ ++ ++/* ++ * These are the defined Ethernet Protocol ID's. ++ */ ++ ++#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ ++#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ ++#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ ++#define ETH_P_IP 0x0800 /* Internet Protocol packet */ ++#define ETH_P_X25 0x0805 /* CCITT X.25 */ ++#define ETH_P_ARP 0x0806 /* Address Resolution packet */ ++#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */ ++#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ ++#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ ++#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ ++#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ ++#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ ++#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ ++#define ETH_P_LAT 0x6004 /* DEC LAT */ ++#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ ++#define ETH_P_CUST 0x6006 /* DEC Customer use */ ++#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ ++#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ ++#define ETH_P_ATALK 0x809B /* Appletalk DDP */ ++#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ ++#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ ++#define ETH_P_IPX 0x8137 /* IPX over DIX */ ++#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ ++#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ ++#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ ++#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ ++#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport ++ * over Ethernet ++ */ ++ ++/* ++ * Non DIX types. Won't clash for 1500 types. ++ */ ++ ++#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ ++#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ ++#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ ++#define ETH_P_802_2 0x0004 /* 802.2 frames */ ++#define ETH_P_SNAP 0x0005 /* Internal only */ ++#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ ++#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ ++#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ ++#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ ++#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ ++#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ ++#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ ++#define ETH_P_CONTROL 0x0016 /* Card specific control frames */ ++#define ETH_P_IRDA 0x0017 /* Linux-IrDA */ ++#define ETH_P_ECONET 0x0018 /* Acorn Econet */ ++ ++/* ++ * This is an Ethernet frame header. ++ */ ++ ++struct ethhdr ++{ ++ unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ ++ unsigned char h_source[ETH_ALEN]; /* source ether addr */ ++ unsigned short h_proto; /* packet type ID field */ ++}; ++ ++struct _vlan { ++ unsigned short h_vlan_TCI; // Encapsulates priority and VLAN ID ++ unsigned short h_vlan_encapsulated_proto; ++}; ++ ++ ++ ++#define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff) ++#define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13) ++#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto)) ++ ++ ++#endif /* _LINUX_IF_ETHER_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/ioctl_cfg80211.h +@@ -0,0 +1,184 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IOCTL_CFG80211_H__ ++#define __IOCTL_CFG80211_H__ ++ ++#if defined(CONFIG_IOCTL_CFG80211) && !defined(CONFIG_CFG80211) && !defined(CONFIG_CFG80211_MODULE) ++ #error "Can't define CONFIG_IOCTL_CFG80211 because neither CONFIG_CFG80211 nor CONFIG_CFG80211_MODULE is defined in kernel" ++#endif ++#if defined(CONFIG_IOCTL_CFG80211) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ++ #error "We haven't verify our cfg80211 solution below kernel version 2.6.35" ++#endif ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) ++ #undef CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER ++#endif ++ ++struct rtw_wdev_invit_info { ++ u8 state; /* 0: req, 1:rep */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 flags; ++ u8 status; ++ u8 req_op_ch; ++ u8 rsp_op_ch; ++}; ++ ++#define rtw_wdev_invit_info_init(invit_info) \ ++ do { \ ++ (invit_info)->state = 0xff; \ ++ _rtw_memset((invit_info)->peer_mac, 0, ETH_ALEN); \ ++ (invit_info)->active = 0xff; \ ++ (invit_info)->token = 0; \ ++ (invit_info)->flags = 0x00; \ ++ (invit_info)->status = 0xff; \ ++ (invit_info)->req_op_ch = 0; \ ++ (invit_info)->rsp_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_nego_info { ++ u8 state; /* 0: req, 1:rep, 3:conf */ ++ u8 peer_mac[ETH_ALEN]; ++ u8 active; ++ u8 token; ++ u8 status; ++ u8 req_intent; ++ u8 req_op_ch; ++ u8 req_listen_ch; ++ u8 rsp_intent; ++ u8 rsp_op_ch; ++ u8 conf_op_ch; ++}; ++ ++#define rtw_wdev_nego_info_init(nego_info) \ ++ do { \ ++ (nego_info)->state = 0xff; \ ++ _rtw_memset((nego_info)->peer_mac, 0, ETH_ALEN); \ ++ (nego_info)->active = 0xff; \ ++ (nego_info)->token = 0; \ ++ (nego_info)->status = 0xff; \ ++ (nego_info)->req_intent = 0xff; \ ++ (nego_info)->req_op_ch = 0; \ ++ (nego_info)->req_listen_ch = 0; \ ++ (nego_info)->rsp_intent = 0xff; \ ++ (nego_info)->rsp_op_ch = 0; \ ++ (nego_info)->conf_op_ch = 0; \ ++ } while (0) ++ ++struct rtw_wdev_priv ++{ ++ struct wireless_dev *rtw_wdev; ++ ++ _adapter *padapter; ++ ++ struct cfg80211_scan_request *scan_request; ++ _lock scan_req_lock; ++ ++ struct net_device *pmon_ndev;//for monitor interface ++ char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface ++ ++ u8 p2p_enabled; ++ ++ u8 provdisc_req_issued; ++ ++ struct rtw_wdev_invit_info invit_info; ++ struct rtw_wdev_nego_info nego_info; ++ ++ u8 bandroid_scan; ++ bool block; ++ bool power_mgmt; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_T ro_ch_to; ++ ATOMIC_T switch_ch_to; ++#endif ++ ++}; ++ ++#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w))) ++ ++#define wiphy_to_adapter(x) (_adapter *)(((struct rtw_wdev_priv*)wiphy_priv(x))->padapter) ++ ++#define wiphy_to_wdev(x) (struct wireless_dev *)(((struct rtw_wdev_priv*)wiphy_priv(x))->rtw_wdev) ++ ++int rtw_wdev_alloc(_adapter *padapter, struct device *dev); ++void rtw_wdev_free(struct wireless_dev *wdev); ++void rtw_wdev_unregister(struct wireless_dev *wdev); ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter); ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); ++int rtw_cfg80211_check_bss(_adapter *padapter); ++void rtw_cfg80211_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter); ++void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted); ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg); ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); ++ ++bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,18,0)) ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, 0, gfp) ++#else ++#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, 0) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) ++#else ++#define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, bss, buf, len) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->pnetdev, cookie, buf, len, ack, gfp) ++#else ++#define rtw_cfg80211_mgmt_tx_status(adapter, cookie, buf, len, ack, gfp) cfg80211_mgmt_tx_status((adapter)->rtw_wdev, cookie, buf, len, ack, gfp) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->pnetdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->pnetdev, cookie, chan, chan_type, gfp) ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, channel_type, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, chan_type, gfp) ++#else ++#define rtw_cfg80211_ready_on_channel(adapter, cookie, chan, channel_type, duration, gfp) cfg80211_ready_on_channel((adapter)->rtw_wdev, cookie, chan, duration, gfp) ++#define rtw_cfg80211_remain_on_channel_expired(adapter, cookie, chan, chan_type, gfp) cfg80211_remain_on_channel_expired((adapter)->rtw_wdev, cookie, chan, gfp) ++#endif ++ ++#endif //__IOCTL_CFG80211_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/ip.h +@@ -0,0 +1,141 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_IP_H ++#define _LINUX_IP_H ++#include ++ ++/* SOL_IP socket options */ ++ ++#define IPTOS_TOS_MASK 0x1E ++#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK) ++#define IPTOS_LOWDELAY 0x10 ++#define IPTOS_THROUGHPUT 0x08 ++#define IPTOS_RELIABILITY 0x04 ++#define IPTOS_MINCOST 0x02 ++ ++#define IPTOS_PREC_MASK 0xE0 ++#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK) ++#define IPTOS_PREC_NETCONTROL 0xe0 ++#define IPTOS_PREC_INTERNETCONTROL 0xc0 ++#define IPTOS_PREC_CRITIC_ECP 0xa0 ++#define IPTOS_PREC_FLASHOVERRIDE 0x80 ++#define IPTOS_PREC_FLASH 0x60 ++#define IPTOS_PREC_IMMEDIATE 0x40 ++#define IPTOS_PREC_PRIORITY 0x20 ++#define IPTOS_PREC_ROUTINE 0x00 ++ ++ ++/* IP options */ ++#define IPOPT_COPY 0x80 ++#define IPOPT_CLASS_MASK 0x60 ++#define IPOPT_NUMBER_MASK 0x1f ++ ++#define IPOPT_COPIED(o) ((o)&IPOPT_COPY) ++#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK) ++#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK) ++ ++#define IPOPT_CONTROL 0x00 ++#define IPOPT_RESERVED1 0x20 ++#define IPOPT_MEASUREMENT 0x40 ++#define IPOPT_RESERVED2 0x60 ++ ++#define IPOPT_END (0 |IPOPT_CONTROL) ++#define IPOPT_NOOP (1 |IPOPT_CONTROL) ++#define IPOPT_SEC (2 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_LSRR (3 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_TIMESTAMP (4 |IPOPT_MEASUREMENT) ++#define IPOPT_RR (7 |IPOPT_CONTROL) ++#define IPOPT_SID (8 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_SSRR (9 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_RA (20|IPOPT_CONTROL|IPOPT_COPY) ++ ++#define IPVERSION 4 ++#define MAXTTL 255 ++#define IPDEFTTL 64 ++ ++/* struct timestamp, struct route and MAX_ROUTES are removed. ++ ++ REASONS: it is clear that nobody used them because: ++ - MAX_ROUTES value was wrong. ++ - "struct route" was wrong. ++ - "struct timestamp" had fatally misaligned bitfields and was completely unusable. ++ */ ++ ++#define IPOPT_OPTVAL 0 ++#define IPOPT_OLEN 1 ++#define IPOPT_OFFSET 2 ++#define IPOPT_MINOFF 4 ++#define MAX_IPOPTLEN 40 ++#define IPOPT_NOP IPOPT_NOOP ++#define IPOPT_EOL IPOPT_END ++#define IPOPT_TS IPOPT_TIMESTAMP ++ ++#define IPOPT_TS_TSONLY 0 /* timestamps only */ ++#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */ ++#define IPOPT_TS_PRESPEC 3 /* specified modules only */ ++ ++#ifdef PLATFORM_LINUX ++ ++struct ip_options { ++ __u32 faddr; /* Saved first hop address */ ++ unsigned char optlen; ++ unsigned char srr; ++ unsigned char rr; ++ unsigned char ts; ++ unsigned char is_setbyuser:1, /* Set by setsockopt? */ ++ is_data:1, /* Options in __data, rather than skb */ ++ is_strictroute:1, /* Strict source route */ ++ srr_is_hit:1, /* Packet destination addr was our one */ ++ is_changed:1, /* IP checksum more not valid */ ++ rr_needaddr:1, /* Need to record addr of outgoing dev */ ++ ts_needtime:1, /* Need to record timestamp */ ++ ts_needaddr:1; /* Need to record addr of outgoing dev */ ++ unsigned char router_alert; ++ unsigned char __pad1; ++ unsigned char __pad2; ++ unsigned char __data[0]; ++}; ++ ++#define optlength(opt) (sizeof(struct ip_options) + opt->optlen) ++#endif ++ ++struct iphdr { ++#if defined(__LITTLE_ENDIAN_BITFIELD) ++ __u8 ihl:4, ++ version:4; ++#elif defined (__BIG_ENDIAN_BITFIELD) ++ __u8 version:4, ++ ihl:4; ++#else ++#error "Please fix " ++#endif ++ __u8 tos; ++ __u16 tot_len; ++ __u16 id; ++ __u16 frag_off; ++ __u8 ttl; ++ __u8 protocol; ++ __u16 check; ++ __u32 saddr; ++ __u32 daddr; ++ /*The options start here. */ ++}; ++ ++#endif /* _LINUX_IP_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/linux/wireless.h +@@ -0,0 +1,90 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef _LINUX_WIRELESS_H ++#define _LINUX_WIRELESS_H ++ ++/***************************** INCLUDES *****************************/ ++ ++#if 0 ++#include /* for __u* and __s* typedefs */ ++#include /* for "struct sockaddr" et al */ ++#include /* for IFNAMSIZ and co... */ ++#else ++#define __user ++//typedef uint16_t __u16; ++#include /* for "struct sockaddr" et al */ ++#include /* for IFNAMSIZ and co... */ ++#endif ++ ++/****************************** TYPES ******************************/ ++ ++/* --------------------------- SUBTYPES --------------------------- */ ++/* ++ * For all data larger than 16 octets, we need to use a ++ * pointer to memory allocated in user space. ++ */ ++struct iw_point ++{ ++ void __user *pointer; /* Pointer to the data (in user space) */ ++ __u16 length; /* number of fields or size in bytes */ ++ __u16 flags; /* Optional params */ ++}; ++ ++ ++/* ------------------------ IOCTL REQUEST ------------------------ */ ++/* ++ * This structure defines the payload of an ioctl, and is used ++ * below. ++ * ++ * Note that this structure should fit on the memory footprint ++ * of iwreq (which is the same as ifreq), which mean a max size of ++ * 16 octets = 128 bits. Warning, pointers might be 64 bits wide... ++ * You should check this when increasing the structures defined ++ * above in this file... ++ */ ++union iwreq_data ++{ ++ /* Config - generic */ ++ char name[IFNAMSIZ]; ++ /* Name : used to verify the presence of wireless extensions. ++ * Name of the protocol/provider... */ ++ ++ struct iw_point data; /* Other large parameters */ ++}; ++ ++/* ++ * The structure to exchange data for ioctl. ++ * This structure is the same as 'struct ifreq', but (re)defined for ++ * convenience... ++ * Do I need to remind you about structure size (32 octets) ? ++ */ ++struct iwreq ++{ ++ union ++ { ++ char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */ ++ } ifr_ifrn; ++ ++ /* Data part (defined just above) */ ++ union iwreq_data u; ++}; ++ ++#endif /* _LINUX_WIRELESS_H */ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/mlme_osdep.h +@@ -0,0 +1,40 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __MLME_OSDEP_H_ ++#define __MLME_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) ++extern int time_after(u32 now, u32 old); ++#endif ++ ++extern void rtw_init_mlme_timer(_adapter *padapter); ++extern void rtw_os_indicate_disconnect( _adapter *adapter ); ++extern void rtw_os_indicate_connect( _adapter *adapter ); ++void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted); ++extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie); ++ ++void rtw_reset_securitypriv( _adapter *adapter ); ++ ++#endif //_MLME_OSDEP_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/mp_custom_oid.h +@@ -0,0 +1,353 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CUSTOM_OID_H ++#define __CUSTOM_OID_H ++ ++// by Owen ++// 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit ++// 0xFF818500 - 0xFF81850F RTL8185 Setup Utility ++// 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility ++ ++// ++ ++// by Owen for Production Kit ++// For Production Kit with Agilent Equipments ++// in order to make our custom oids hopefully somewhat unique ++// we will use 0xFF (indicating implementation specific OID) ++// 81(first byte of non zero Realtek unique identifier) ++// 80 (second byte of non zero Realtek unique identifier) ++// XX (the custom OID number - providing 255 possible custom oids) ++ ++#define OID_RT_PRO_RESET_DUT 0xFF818000 ++#define OID_RT_PRO_SET_DATA_RATE 0xFF818001 ++#define OID_RT_PRO_START_TEST 0xFF818002 ++#define OID_RT_PRO_STOP_TEST 0xFF818003 ++#define OID_RT_PRO_SET_PREAMBLE 0xFF818004 ++#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005 ++#define OID_RT_PRO_SET_FILTER_BB 0xFF818006 ++#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007 ++#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008 ++#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009 ++#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A ++ ++#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D ++#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E ++#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F ++#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010 ++#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011 ++#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012 ++#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013 ++#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014 ++#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015 ++#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016 ++#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017 ++#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018 ++#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019 ++#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A ++#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B ++#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C ++#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D ++#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E ++#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F ++#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020 ++#define OID_RT_PRO_WRITE_EEPROM 0xFF818021 ++#define OID_RT_PRO_READ_EEPROM 0xFF818022 ++#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023 ++#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024 ++#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025 ++#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026 ++#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027 ++#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028 ++#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029 ++#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A ++#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C ++// added by Owen on 04/08/03 for Cameo's request ++#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D ++#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E ++#define OID_RT_PRO_SET_MODULATION 0xFF81802F ++// ++ ++//Sean ++#define OID_RT_DRIVER_OPTION 0xFF818080 ++#define OID_RT_RF_OFF 0xFF818081 ++#define OID_RT_AUTH_STATUS 0xFF818082 ++ ++//======================================================================== ++#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B ++#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C ++#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B ++#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043 ++//======================================================================== ++ ++ ++// by Owen for RTL8185 Phy Status Report Utility ++#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580 ++#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581 ++#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582 ++#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583 ++#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584 ++#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585 ++#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586 ++// ++ ++// by Owen on 03/09/19-03/09/22 for RTL8185 ++#define OID_RT_WIRELESS_MODE 0xFF818500 ++#define OID_RT_SUPPORTED_RATES 0xFF818501 ++#define OID_RT_DESIRED_RATES 0xFF818502 ++#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503 ++// ++ ++#define OID_RT_GET_CONNECT_STATE 0xFF030001 ++#define OID_RT_RESCAN 0xFF030002 ++#define OID_RT_SET_KEY_LENGTH 0xFF030003 ++#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004 ++ ++#define OID_RT_SET_CHANNEL 0xFF010182 ++#define OID_RT_SET_SNIFFER_MODE 0xFF010183 ++#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184 ++#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185 ++#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186 ++#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187 ++#define OID_RT_GET_TX_RETRY 0xFF010188 ++#define OID_RT_GET_RX_RETRY 0xFF010189 ++#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A//S ++#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B//S ++ ++#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190 ++#define OID_RT_GET_TX_BEACON_OK 0xFF010191 ++#define OID_RT_GET_TX_BEACON_ERR 0xFF010192 ++#define OID_RT_GET_RX_ICV_ERR 0xFF010193 ++#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194 ++#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195 ++#define OID_RT_GET_PREAMBLE_MODE 0xFF010196 ++#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197 ++#define OID_RT_GET_AP_IP 0xFF010198 ++#define OID_RT_GET_CHANNELPLAN 0xFF010199 ++#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A ++#define OID_RT_SET_BCN_INTVL 0xFF01019B ++#define OID_RT_GET_RF_VENDER 0xFF01019C ++#define OID_RT_DEDICATE_PROBE 0xFF01019D ++#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E ++ ++#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F ++ ++#define OID_RT_GET_CCA_ERR 0xFF0101A0 ++#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1 ++#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2 ++ ++#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3 ++#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4 ++ ++// by Owen on 03/31/03 for Cameo's request ++#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5 ++// ++#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5 ++#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6 ++#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7 ++#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8 ++#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9 ++#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA ++#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB ++#define OID_RT_GET_CHANNEL 0xFF0101AC ++ ++#define OID_RT_SET_CHANNELPLAN 0xFF0101AD ++#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE ++#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF ++#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0 ++#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1 ++#define OID_RT_GET_IS_ROAMING 0xFF0101B2 ++#define OID_RT_GET_IS_PRIVACY 0xFF0101B3 ++#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4 ++#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5 ++#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6 ++#define OID_RT_RESET_LOG 0xFF0101B7 ++#define OID_RT_GET_LOG 0xFF0101B8 ++#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9 ++#define OID_RT_GET_HEADER_FAIL 0xFF0101BA ++#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB ++#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC ++#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD ++#define OID_RT_GET_TX_INFO 0xFF0101BE ++#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF ++#define OID_RT_RF_READ_WRITE 0xFF0101C0 ++ ++// For Netgear request. 2005.01.13, by rcnjko. ++#define OID_RT_FORCED_DATA_RATE 0xFF0101C1 ++#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2 ++// For Netgear request. 2005.02.17, by rcnjko. ++#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3 ++// For AZ project. 2005.06.27, by rcnjko. ++#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4 ++ ++// Vincent 8185MP ++#define OID_RT_PRO_RX_FILTER 0xFF0111C0 ++ ++//Andy TEST ++//#define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1 ++//#define OID_RT_PRO_READ_REGISTRY 0xFF0111C2 ++#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1 ++#define OID_CE_USB_READ_REGISTRY 0xFF0111C2 ++ ++ ++#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3 ++#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4 ++#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5 ++#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6 ++#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7 ++#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8 ++#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9 ++#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA ++ ++// AP OID ++#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300 ++#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301 ++#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302 ++#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303 ++#define OID_RT_AP_SUPPORTED 0xFF010304 // Determine if driver supports AP mode. 2004.08.27, by rcnjko. ++#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 // Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko. ++ ++// 8187MP. 2004.09.06, by rcnjko. ++#define OID_RT_PRO8187_WI_POLL 0xFF818780 ++#define OID_RT_PRO_WRITE_BB_REG 0xFF818781 ++#define OID_RT_PRO_READ_BB_REG 0xFF818782 ++#define OID_RT_PRO_WRITE_RF_REG 0xFF818783 ++#define OID_RT_PRO_READ_RF_REG 0xFF818784 ++ ++// Meeting House. added by Annie, 2005-07-20. ++#define OID_RT_MH_VENDER_ID 0xFFEDC100 ++ ++//8711 MP OID added 20051230. ++#define OID_RT_PRO8711_JOIN_BSS 0xFF871100//S ++ ++#define OID_RT_PRO_READ_REGISTER 0xFF871101 //Q ++#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 //S ++ ++#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 //Q ++#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 //S ++ ++#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 //S ++ ++#define OID_RT_PRO_READ16_EEPROM 0xFF871106 //Q ++#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 //S ++ ++#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 //S ++#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 //Q ++ ++#define OID_RT_PRO8711_WI_POLL 0xFF87110A //Q ++#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B //Q ++#define OID_RT_RD_ATTRIB_MEM 0xFF87110C//Q ++#define OID_RT_WR_ATTRIB_MEM 0xFF87110D//S ++ ++ ++//Method 2 for H2C/C2H ++#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 //S ++#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 //Q ++#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 //S ++#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 //Q ++#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114//Q ++ ++#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 //Q, S ++ ++#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 //S ++#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 //Q,S ++#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 //Q ++#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 //Q ++ ++#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A //S ++#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B //Q ++#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C //S ++#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D //Q ++#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E //S ++#define OID_RT_POLL_RX_STATUS 0xFF87111F //Q ++ ++#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 //Q,S ++#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121//S ++#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122//S ++#define OID_RT_PRO_READ_TSSI 0xFF871123//S ++#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124//S ++ ++ ++#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 //Q ++#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 //S ++ ++//Method 2 , using workitem ++#define OID_RT_SET_READ_REG 0xFF871181 //S ++#define OID_RT_SET_WRITE_REG 0xFF871182 //S ++#define OID_RT_SET_BURST_READ_REG 0xFF871183 //S ++#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 //S ++#define OID_RT_SET_WRITE_TXCMD 0xFF871185 //S ++#define OID_RT_SET_READ16_EEPROM 0xFF871186 //S ++#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 //S ++#define OID_RT_QRY_POLL_WKITEM 0xFF871188 //Q ++ ++//For SDIO INTERFACE only ++#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 //Q, S ++#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1 ++ ++//For USB INTERFACE only ++#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 //Q, S ++#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 //S ++#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 //S ++#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 //Q ++#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 //Q ++ ++#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB //S ++#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC //S ++#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE ++ ++#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 //Q, S ++#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 //S ++#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 //S ++#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 //Q ++ ++#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 //Q, S ++ ++#define OID_RT_PRO_READ_EFUSE 0xFF871205 //Q ++#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 //S ++#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 //Q, S ++#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 //Q ++ ++#define OID_RT_SET_BANDWIDTH 0xFF871209 //S ++#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A //S ++ ++#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B //S ++ ++#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C //Q ++ ++#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D //S ++ ++#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E //S ++ ++#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F //S ++ ++#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 //Q ++ ++#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 //S ++#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 //Q ++#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 //Q ++ ++#define OID_RT_SET_POWER_DOWN 0xFF871214 //S ++ ++#define OID_RT_GET_POWER_MODE 0xFF871215 //Q ++ ++#define OID_RT_PRO_EFUSE 0xFF871216 //Q, S ++#define OID_RT_PRO_EFUSE_MAP 0xFF871217 //Q, S ++ ++#endif //#ifndef __CUSTOM_OID_H +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/nic_spec.h +@@ -0,0 +1,47 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __NIC_SPEC_H__ ++#define __NIC_SPEC_H__ ++ ++#include ++ ++#define RTL8711_MCTRL_ (0x20000) ++#define RTL8711_UART_ (0x30000) ++#define RTL8711_TIMER_ (0x40000) ++#define RTL8711_FINT_ (0x50000) ++#define RTL8711_HINT_ (0x50000) ++#define RTL8711_GPIO_ (0x60000) ++#define RTL8711_WLANCTRL_ (0x200000) ++#define RTL8711_WLANFF_ (0xe00000) ++#define RTL8711_HCICTRL_ (0x600000) ++#define RTL8711_SYSCFG_ (0x620000) ++#define RTL8711_SYSCTRL_ (0x620000) ++#define RTL8711_MCCTRL_ (0x020000) ++ ++ ++#include ++ ++#include ++ ++ ++#endif // __RTL8711_SPEC_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/osdep_ce_service.h +@@ -0,0 +1,171 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_CE_SERVICE_H_ ++#define __OSDEP_CE_SERVICE_H_ ++ ++ ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include "SDCardDDK.h" ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++typedef HANDLE _sema; ++typedef LIST_ENTRY _list; ++typedef NDIS_STATUS _OS_STATUS; ++ ++typedef NDIS_SPIN_LOCK _lock; ++ ++typedef HANDLE _rwlock; //Mutex ++ ++typedef u32 _irqL; ++ ++typedef NDIS_HANDLE _nic_hdl; ++ ++ ++typedef NDIS_MINIPORT_TIMER _timer; ++ ++struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++}; ++ ++typedef NDIS_PACKET _pkt; ++typedef NDIS_BUFFER _buffer; ++typedef struct __queue _queue; ++ ++typedef HANDLE _thread_hdl_; ++typedef DWORD thread_return; ++typedef void* thread_context; ++typedef NDIS_WORK_ITEM _workitem; ++ ++#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; ++ ++ ++#define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_prev(_list *list) ++{ ++ return list->Blink; ++} ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++ ++__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ WaitForSingleObject(*prwlock, INFINITE ); ++ ++} ++ ++__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ ReleaseMutex(*prwlock); ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/osdep_intf.h +@@ -0,0 +1,155 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_INTF_H_ ++#define __OSDEP_INTF_H_ ++ ++#include ++#include ++#include ++ ++struct intf_priv { ++ ++ u8 *intf_dev; ++ u32 max_iosz; //USB2.0: 128, USB1.1: 64, SDIO:64 ++ u32 max_xmitsz; //USB2.0: unlimited, SDIO:512 ++ u32 max_recvsz; //USB2.0: unlimited, SDIO:512 ++ ++ volatile u8 *io_rwmem; ++ volatile u8 *allocated_io_rwmem; ++ u32 io_wsz; //unit: 4bytes ++ u32 io_rsz;//unit: 4bytes ++ u8 intf_status; ++ ++ void (*_bus_io)(u8 *priv); ++ ++/* ++Under Sync. IRP (SDIO/USB) ++A protection mechanism is necessary for the io_rwmem(read/write protocol) ++ ++Under Async. IRP (SDIO/USB) ++The protection mechanism is through the pending queue. ++*/ ++ ++ _mutex ioctl_mutex; ++ ++ ++#ifdef PLATFORM_LINUX ++ #ifdef CONFIG_USB_HCI ++ // when in USB, IO is through interrupt in/out endpoints ++ struct usb_device *udev; ++ PURB piorw_urb; ++ u8 io_irp_cnt; ++ u8 bio_irp_pending; ++ _sema io_retevt; ++ _timer io_timer; ++ u8 bio_irp_timeout; ++ u8 bio_timer_cancel; ++ #endif ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ #ifdef CONFIG_SDIO_HCI ++ // below is for io_rwmem... ++ PMDL pmdl; ++ PSDBUS_REQUEST_PACKET sdrp; ++ PSDBUS_REQUEST_PACKET recv_sdrp; ++ PSDBUS_REQUEST_PACKET xmit_sdrp; ++ ++ PIRP piorw_irp; ++ ++ #endif ++ #ifdef CONFIG_USB_HCI ++ PURB piorw_urb; ++ PIRP piorw_irp; ++ u8 io_irp_cnt; ++ u8 bio_irp_pending; ++ _sema io_retevt; ++ #endif ++#endif ++ ++}; ++ ++ ++#ifdef CONFIG_R871X_TEST ++int rtw_start_pseudo_adhoc(_adapter *padapter); ++int rtw_stop_pseudo_adhoc(_adapter *padapter); ++#endif ++ ++struct dvobj_priv *devobj_init(void); ++void devobj_deinit(struct dvobj_priv *pdvobj); ++ ++u8 rtw_init_drv_sw(_adapter *padapter); ++u8 rtw_free_drv_sw(_adapter *padapter); ++u8 rtw_reset_drv_sw(_adapter *padapter); ++ ++u32 rtw_start_drv_threads(_adapter *padapter); ++void rtw_stop_drv_threads (_adapter *padapter); ++void rtw_cancel_all_timer(_adapter *padapter); ++ ++#ifdef PLATFORM_LINUX ++int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); ++ ++int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname); ++struct net_device *rtw_init_netdev(_adapter *padapter); ++void rtw_unregister_netdevs(struct dvobj_priv *dvobj); ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++u16 rtw_recv_select_queue(struct sk_buff *skb); ++#endif //LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35) ++ ++#ifdef CONFIG_PROC_DEBUG ++void rtw_proc_init_one(struct net_device *dev); ++void rtw_proc_remove_one(struct net_device *dev); ++#else //!CONFIG_PROC_DEBUG ++static void rtw_proc_init_one(struct net_device *dev){} ++static void rtw_proc_remove_one(struct net_device *dev){} ++#endif //!CONFIG_PROC_DEBUG ++#endif //PLATFORM_LINUX ++ ++ ++#ifdef PLATFORM_FREEBSD ++extern int rtw_ioctl(struct ifnet * ifp, u_long cmd, caddr_t data); ++#endif ++ ++void rtw_ips_dev_unload(_adapter *padapter); ++#ifdef CONFIG_IPS ++int rtw_ips_pwr_up(_adapter *padapter); ++void rtw_ips_pwr_down(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++struct _io_ops; ++_adapter *rtw_drv_if2_init(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops)); ++void rtw_drv_if2_free(_adapter *if2); ++void rtw_drv_if2_stop(_adapter *if2); ++#ifdef CONFIG_MULTI_VIR_IFACES ++struct dvobj_priv; ++_adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops)); ++void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj); ++void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj); ++#endif //CONFIG_MULTI_VIR_IFACES ++#endif ++ ++int rtw_drv_register_netdev(_adapter *padapter); ++void rtw_ndev_destructor(_nic_hdl ndev); ++ ++#endif //_OSDEP_INTF_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/osdep_service.h +@@ -0,0 +1,1821 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_SERVICE_H_ ++#define __OSDEP_SERVICE_H_ ++ ++#include ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) ++#include ++#endif ++#include ++#include ++//#include ++ ++#define _FAIL 0 ++#define _SUCCESS 1 ++#define RTW_RX_HANDLED 2 ++//#define RTW_STATUS_TIMEDOUT -110 ++ ++#undef _TRUE ++#define _TRUE 1 ++ ++#undef _FALSE ++#define _FALSE 0 ++ ++ ++#ifdef PLATFORM_FREEBSD ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "usbdevs.h" ++ ++#define USB_DEBUG_VAR rum_debug ++#include ++ ++#if 1 //Baron porting from linux, it's all temp solution, needs to check again ++#include ++#include /* XXX for PCPU_GET */ ++// typedef struct semaphore _sema; ++ typedef struct sema _sema; ++// typedef spinlock_t _lock; ++ typedef struct mtx _lock; ++ typedef struct mtx _mutex; ++ typedef struct timer_list _timer; ++ struct list_head { ++ struct list_head *next, *prev; ++ }; ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ //typedef struct sk_buff _pkt; ++ typedef struct mbuf _pkt; ++ typedef struct mbuf _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct ifnet * _nic_hdl; ++ ++ typedef pid_t _thread_hdl_; ++// typedef struct thread _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ //#define thread_exit() complete_and_exit(NULL, 0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ typedef struct work_struct _workitem; ++ ++#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) ++/* emulate a modern version */ ++#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) ++ ++#define WIRELESS_EXT -1 ++#define HZ hz ++#define spin_lock_irqsave mtx_lock_irqsave ++#define spin_lock_bh mtx_lock_irqsave ++#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} ++//#define IFT_RTW 0xf9 //ifnet allocate type for RTW ++#define free_netdev if_free ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) ++/* ++ * Linux timers are emulated using FreeBSD callout functions ++ * (and taskqueue functionality). ++ * ++ * Currently no timer stats functionality. ++ * ++ * See (linux_compat) processes.c ++ * ++ */ ++struct timer_list { ++ ++ /* FreeBSD callout related fields */ ++ struct callout callout; ++ ++ //timeout function ++ void (*function)(void*); ++ //argument ++ void *arg; ++ ++}; ++struct workqueue_struct; ++struct work_struct; ++typedef void (*work_func_t)(struct work_struct *work); ++/* Values for the state of an item of work (work_struct) */ ++typedef enum work_state { ++ WORK_STATE_UNSET = 0, ++ WORK_STATE_CALLOUT_PENDING = 1, ++ WORK_STATE_TASK_PENDING = 2, ++ WORK_STATE_WORK_CANCELLED = 3 ++} work_state_t; ++ ++struct work_struct { ++ struct task task; /* FreeBSD task */ ++ work_state_t state; /* the pending or otherwise state of work. */ ++ work_func_t func; ++}; ++#define spin_unlock_irqrestore mtx_unlock_irqrestore ++#define spin_unlock_bh mtx_unlock_irqrestore ++#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); ++extern void _rtw_spinlock_init(_lock *plock); ++ ++//modify private structure to match freebsd ++#define BITS_PER_LONG 32 ++union ktime { ++ s64 tv64; ++#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) ++ struct { ++#ifdef __BIG_ENDIAN ++ s32 sec, nsec; ++#else ++ s32 nsec, sec; ++#endif ++ } tv; ++#endif ++}; ++#define kmemcheck_bitfield_begin(name) ++#define kmemcheck_bitfield_end(name) ++#define CHECKSUM_NONE 0 ++typedef unsigned char *sk_buff_data_t; ++typedef union ktime ktime_t; /* Kill this */ ++ ++void rtw_mtx_lock(_lock *plock); ++ ++void rtw_mtx_unlock(_lock *plock); ++ ++/** ++ * struct sk_buff - socket buffer ++ * @next: Next buffer in list ++ * @prev: Previous buffer in list ++ * @sk: Socket we are owned by ++ * @tstamp: Time we arrived ++ * @dev: Device we arrived on/are leaving by ++ * @transport_header: Transport layer header ++ * @network_header: Network layer header ++ * @mac_header: Link layer header ++ * @_skb_refdst: destination entry (with norefcount bit) ++ * @sp: the security path, used for xfrm ++ * @cb: Control buffer. Free for use by every layer. Put private vars here ++ * @len: Length of actual data ++ * @data_len: Data length ++ * @mac_len: Length of link layer header ++ * @hdr_len: writable header length of cloned skb ++ * @csum: Checksum (must include start/offset pair) ++ * @csum_start: Offset from skb->head where checksumming should start ++ * @csum_offset: Offset from csum_start where checksum should be stored ++ * @local_df: allow local fragmentation ++ * @cloned: Head may be cloned (check refcnt to be sure) ++ * @nohdr: Payload reference only, must not modify header ++ * @pkt_type: Packet class ++ * @fclone: skbuff clone status ++ * @ip_summed: Driver fed us an IP checksum ++ * @priority: Packet queueing priority ++ * @users: User count - see {datagram,tcp}.c ++ * @protocol: Packet protocol from driver ++ * @truesize: Buffer size ++ * @head: Head of buffer ++ * @data: Data head pointer ++ * @tail: Tail pointer ++ * @end: End pointer ++ * @destructor: Destruct function ++ * @mark: Generic packet mark ++ * @nfct: Associated connection, if any ++ * @ipvs_property: skbuff is owned by ipvs ++ * @peeked: this packet has been seen already, so stats have been ++ * done for it, don't do them again ++ * @nf_trace: netfilter packet trace flag ++ * @nfctinfo: Relationship of this skb to the connection ++ * @nfct_reasm: netfilter conntrack re-assembly pointer ++ * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c ++ * @skb_iif: ifindex of device we arrived on ++ * @rxhash: the packet hash computed on receive ++ * @queue_mapping: Queue mapping for multiqueue devices ++ * @tc_index: Traffic control index ++ * @tc_verd: traffic control verdict ++ * @ndisc_nodetype: router type (from link layer) ++ * @dma_cookie: a cookie to one of several possible DMA operations ++ * done by skb DMA functions ++ * @secmark: security marking ++ * @vlan_tci: vlan tag control information ++ */ ++ ++struct sk_buff { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ ktime_t tstamp; ++ ++ struct sock *sk; ++ //struct net_device *dev; ++ struct ifnet *dev; ++ ++ /* ++ * This is the control buffer. It is free to use for every ++ * layer. Please put your private variables there. If you ++ * want to keep them across layers you have to do a skb_clone() ++ * first. This is owned by whoever has the skb queued ATM. ++ */ ++ char cb[48] __aligned(8); ++ ++ unsigned long _skb_refdst; ++#ifdef CONFIG_XFRM ++ struct sec_path *sp; ++#endif ++ unsigned int len, ++ data_len; ++ u16 mac_len, ++ hdr_len; ++ union { ++ u32 csum; ++ struct { ++ u16 csum_start; ++ u16 csum_offset; ++ }smbol2; ++ }smbol1; ++ u32 priority; ++ kmemcheck_bitfield_begin(flags1); ++ u8 local_df:1, ++ cloned:1, ++ ip_summed:2, ++ nohdr:1, ++ nfctinfo:3; ++ u8 pkt_type:3, ++ fclone:2, ++ ipvs_property:1, ++ peeked:1, ++ nf_trace:1; ++ kmemcheck_bitfield_end(flags1); ++ u16 protocol; ++ ++ void (*destructor)(struct sk_buff *skb); ++#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) ++ struct nf_conntrack *nfct; ++ struct sk_buff *nfct_reasm; ++#endif ++#ifdef CONFIG_BRIDGE_NETFILTER ++ struct nf_bridge_info *nf_bridge; ++#endif ++ ++ int skb_iif; ++#ifdef CONFIG_NET_SCHED ++ u16 tc_index; /* traffic control index */ ++#ifdef CONFIG_NET_CLS_ACT ++ u16 tc_verd; /* traffic control verdict */ ++#endif ++#endif ++ ++ u32 rxhash; ++ ++ kmemcheck_bitfield_begin(flags2); ++ u16 queue_mapping:16; ++#ifdef CONFIG_IPV6_NDISC_NODETYPE ++ u8 ndisc_nodetype:2, ++ deliver_no_wcard:1; ++#else ++ u8 deliver_no_wcard:1; ++#endif ++ kmemcheck_bitfield_end(flags2); ++ ++ /* 0/14 bit hole */ ++ ++#ifdef CONFIG_NET_DMA ++ dma_cookie_t dma_cookie; ++#endif ++#ifdef CONFIG_NETWORK_SECMARK ++ u32 secmark; ++#endif ++ union { ++ u32 mark; ++ u32 dropcount; ++ }symbol3; ++ ++ u16 vlan_tci; ++ ++ sk_buff_data_t transport_header; ++ sk_buff_data_t network_header; ++ sk_buff_data_t mac_header; ++ /* These elements must be at the end, see alloc_skb() for details. */ ++ sk_buff_data_t tail; ++ sk_buff_data_t end; ++ unsigned char *head, ++ *data; ++ unsigned int truesize; ++ atomic_t users; ++}; ++struct sk_buff_head { ++ /* These two members must be first. */ ++ struct sk_buff *next; ++ struct sk_buff *prev; ++ ++ u32 qlen; ++ _lock lock; ++}; ++#define skb_tail_pointer(skb) skb->tail ++static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) ++{ ++ unsigned char *tmp = skb_tail_pointer(skb); ++ //SKB_LINEAR_ASSERT(skb); ++ skb->tail += len; ++ skb->len += len; ++ return tmp; ++} ++ ++static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ skb->len -= len; ++ if(skb->len < skb->data_len) ++ printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); ++ return skb->data += len; ++} ++static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) ++{ ++ #ifdef PLATFORM_FREEBSD ++ return __skb_pull(skb, len); ++ #else ++ return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); ++ #endif //PLATFORM_FREEBSD ++} ++static inline u32 skb_queue_len(const struct sk_buff_head *list_) ++{ ++ return list_->qlen; ++} ++static inline void __skb_insert(struct sk_buff *newsk, ++ struct sk_buff *prev, struct sk_buff *next, ++ struct sk_buff_head *list) ++{ ++ newsk->next = next; ++ newsk->prev = prev; ++ next->prev = prev->next = newsk; ++ list->qlen++; ++} ++static inline void __skb_queue_before(struct sk_buff_head *list, ++ struct sk_buff *next, ++ struct sk_buff *newsk) ++{ ++ __skb_insert(newsk, next->prev, next, list); ++} ++static inline void skb_queue_tail(struct sk_buff_head *list, ++ struct sk_buff *newsk) ++{ ++ mtx_lock(&list->lock); ++ __skb_queue_before(list, (struct sk_buff *)list, newsk); ++ mtx_unlock(&list->lock); ++} ++static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) ++{ ++ struct sk_buff *list = ((struct sk_buff *)list_)->next; ++ if (list == (struct sk_buff *)list_) ++ list = NULL; ++ return list; ++} ++static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) ++{ ++ struct sk_buff *next, *prev; ++ ++ list->qlen--; ++ next = skb->next; ++ prev = skb->prev; ++ skb->next = skb->prev = NULL; ++ next->prev = prev; ++ prev->next = next; ++} ++ ++static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) ++{ ++ mtx_lock(&list->lock); ++ ++ struct sk_buff *skb = skb_peek(list); ++ if (skb) ++ __skb_unlink(skb, list); ++ ++ mtx_unlock(&list->lock); ++ ++ return skb; ++} ++static inline void skb_reserve(struct sk_buff *skb, int len) ++{ ++ skb->data += len; ++ skb->tail += len; ++} ++static inline void __skb_queue_head_init(struct sk_buff_head *list) ++{ ++ list->prev = list->next = (struct sk_buff *)list; ++ list->qlen = 0; ++} ++/* ++ * This function creates a split out lock class for each invocation; ++ * this is needed for now since a whole lot of users of the skb-queue ++ * infrastructure in drivers have different locking usage (in hardirq) ++ * than the networking core (in softirq only). In the long run either the ++ * network layer or drivers should need annotation to consolidate the ++ * main types of usage into 3 classes. ++ */ ++static inline void skb_queue_head_init(struct sk_buff_head *list) ++{ ++ _rtw_spinlock_init(&list->lock); ++ __skb_queue_head_init(list); ++} ++unsigned long copy_from_user(void *to, const void *from, unsigned long n); ++unsigned long copy_to_user(void *to, const void *from, unsigned long n); ++struct sk_buff * dev_alloc_skb(unsigned int size); ++struct sk_buff *skb_clone(const struct sk_buff *skb); ++void dev_kfree_skb_any(struct sk_buff *skb); ++#endif //Baron porting from linux, it's all temp solution, needs to check again ++ ++ ++#if 1 // kenny add Linux compatibility code for Linux USB driver ++#include ++ ++#define __init // __attribute ((constructor)) ++#define __exit // __attribute ((destructor)) ++ ++/* ++ * Definitions for module_init and module_exit macros. ++ * ++ * These macros will use the SYSINIT framework to call a specified ++ * function (with no arguments) on module loading or unloading. ++ * ++ */ ++ ++void module_init_exit_wrapper(void *arg); ++ ++#define module_init(initfn) \ ++ SYSINIT(mod_init_ ## initfn, \ ++ SI_SUB_KLD, SI_ORDER_FIRST, \ ++ module_init_exit_wrapper, initfn) ++ ++#define module_exit(exitfn) \ ++ SYSUNINIT(mod_exit_ ## exitfn, \ ++ SI_SUB_KLD, SI_ORDER_ANY, \ ++ module_init_exit_wrapper, exitfn) ++ ++/* ++ * The usb_register and usb_deregister functions are used to register ++ * usb drivers with the usb subsystem. ++ */ ++int usb_register(struct usb_driver *driver); ++int usb_deregister(struct usb_driver *driver); ++ ++/* ++ * usb_get_dev and usb_put_dev - increment/decrement the reference count ++ * of the usb device structure. ++ * ++ * Original body of usb_get_dev: ++ * ++ * if (dev) ++ * get_device(&dev->dev); ++ * return dev; ++ * ++ * Reference counts are not currently used in this compatibility ++ * layer. So these functions will do nothing. ++ */ ++static inline struct usb_device * ++usb_get_dev(struct usb_device *dev) ++{ ++ return dev; ++} ++ ++static inline void ++usb_put_dev(struct usb_device *dev) ++{ ++ return; ++} ++ ++ ++// rtw_usb_compat_linux ++int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); ++int rtw_usb_unlink_urb(struct urb *urb); ++int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); ++int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, ++ uint8_t request, uint8_t requesttype, ++ uint16_t value, uint16_t index, void *data, ++ uint16_t size, usb_timeout_t timeout); ++int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); ++int rtw_usb_setup_endpoint(struct usb_device *dev, ++ struct usb_host_endpoint *uhe, usb_size_t bufsize); ++struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); ++struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); ++struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); ++struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); ++void *rtw_usb_buffer_alloc(struct usb_device *dev, usb_size_t size, uint8_t *dma_addr); ++void *rtw_usbd_get_intfdata(struct usb_interface *intf); ++void rtw_usb_linux_register(void *arg); ++void rtw_usb_linux_deregister(void *arg); ++void rtw_usb_linux_free_device(struct usb_device *dev); ++void rtw_usb_buffer_free(struct usb_device *dev, usb_size_t size, ++ void *addr, uint8_t dma_addr); ++void rtw_usb_free_urb(struct urb *urb); ++void rtw_usb_init_urb(struct urb *urb); ++void rtw_usb_kill_urb(struct urb *urb); ++void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); ++void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, ++ struct usb_host_endpoint *uhe, void *buf, ++ int length, usb_complete_t callback, void *arg); ++int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, ++ void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); ++void *usb_get_intfdata(struct usb_interface *intf); ++int usb_linux_init_endpoints(struct usb_device *udev); ++ ++ ++ ++typedef struct urb * PURB; ++ ++typedef unsigned gfp_t; ++#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ ++#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ ++#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ ++#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ ++#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ ++#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ ++#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ ++#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ ++#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ ++#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ ++#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ ++#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ ++#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ ++#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ ++ ++/* This equals 0, but use constants in case they ever change */ ++#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) ++/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ ++#define GFP_ATOMIC (__GFP_HIGH) ++#define GFP_NOIO (__GFP_WAIT) ++#define GFP_NOFS (__GFP_WAIT | __GFP_IO) ++#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) ++#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) ++#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ ++ __GFP_HIGHMEM) ++ ++ ++#endif // kenny add Linux compatibility code for Linux USB ++ ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ++#endif ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_lock(pmutex); ++ ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ ++ mtx_unlock(pmutex); ++ ++} ++static inline void __list_del(struct list_head * prev, struct list_head * next) ++{ ++ next->prev = prev; ++ prev->next = next; ++} ++static inline void INIT_LIST_HEAD(struct list_head *list) ++{ ++ list->next = list; ++ list->prev = list; ++} ++__inline static void rtw_list_delete(_list *plist) ++{ ++ __list_del(plist->prev, plist->next); ++ INIT_LIST_HEAD(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl padapter,void *pfunc,void* cntx) ++{ ++ ptimer->function = pfunc; ++ ptimer->arg = cntx; ++ callout_init(&ptimer->callout, CALLOUT_MPSAFE); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ // mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++ if(ptimer->function && ptimer->arg){ ++ rtw_mtx_lock(NULL); ++ callout_reset(&ptimer->callout, delay_time,ptimer->function, ptimer->arg); ++ rtw_mtx_unlock(NULL); ++ } ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ // del_timer_sync(ptimer); ++ // *bcancelled= _TRUE;//TRUE ==1; FALSE==0 ++ rtw_mtx_lock(NULL); ++ callout_drain(&ptimer->callout); ++ rtw_mtx_unlock(NULL); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ printf("%s Not implement yet! \n",__FUNCTION__); ++// schedule_work(pwork); ++} ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++#endif //PLATFORM_FREEBSD ++ ++ ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) ++ #include ++#endif ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ #include ++#else ++ #include ++#endif ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include // Necessary because we use the proc fs ++ #include // for struct tasklet_struct ++ #include ++ #include ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++// #include ++ #include ++ #include ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++ #include ++#else ++ #include ++#endif ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ #include ++#endif ++ ++ ++#ifdef CONFIG_USB_HCI ++ typedef struct urb * PURB; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++#ifdef CONFIG_USB_SUSPEND ++#define CONFIG_AUTOSUSPEND 1 ++#endif ++#endif ++#endif ++ ++ typedef struct semaphore _sema; ++ typedef spinlock_t _lock; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ typedef struct mutex _mutex; ++#else ++ typedef struct semaphore _mutex; ++#endif ++ typedef struct timer_list _timer; ++ ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ typedef struct sk_buff _pkt; ++ typedef unsigned char _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct net_device * _nic_hdl; ++ ++ typedef void* _thread_hdl_; ++ typedef int thread_return; ++ typedef void* thread_context; ++ ++ #define thread_exit() complete_and_exit(NULL, 0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ typedef struct work_struct _workitem; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) ++// Porting from linux kernel, for compatible with old kernel. ++static inline unsigned char *skb_tail_pointer(const struct sk_buff *skb) ++{ ++ return skb->tail; ++} ++ ++static inline void skb_reset_tail_pointer(struct sk_buff *skb) ++{ ++ skb->tail = skb->data; ++} ++ ++static inline void skb_set_tail_pointer(struct sk_buff *skb, const int offset) ++{ ++ skb->tail = skb->data + offset; ++} ++ ++static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) ++{ ++ return skb->end; ++} ++#endif ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock); ++} ++ ++__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_lock(pmutex); ++#else ++ down(pmutex); ++#endif ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_unlock(pmutex); ++#else ++ up(pmutex); ++#endif ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ list_del_init(plist); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) ++{ ++ //setup_timer(ptimer, pfunc,(u32)cntx); ++ ptimer->function = pfunc; ++ ptimer->data = (unsigned long)cntx; ++ init_timer(ptimer); ++} ++#endif ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ del_timer_sync(ptimer); ++ *bcancelled= _TRUE;//TRUE ==1; FALSE==0 ++} ++ ++#ifdef PLATFORM_LINUX ++#define RTW_TIMER_HDL_ARGS void *FunctionContext ++#elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS) ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++#endif ++ ++#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl ++#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS) ++ ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) ++ INIT_WORK(pwork, pfunc); ++#else ++ INIT_WORK(pwork, pfunc,pwork); ++#endif ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ schedule_work(pwork); ++} ++ ++__inline static void _cancel_workitem_sync(_workitem *pwork) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++ cancel_work_sync(pwork); ++#else ++ flush_scheduled_work(); ++#endif ++} ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ ++ { \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++ msleep(10); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++} ++ ++static inline int rtw_netif_queue_stopped(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ return (netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 1)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 2)) && ++ netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3)) ); ++#else ++ return netif_queue_stopped(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_wake_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_wake_all_queues(pnetdev); ++#else ++ netif_wake_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_start_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_start_all_queues(pnetdev); ++#else ++ netif_start_queue(pnetdev); ++#endif ++} ++ ++static inline void rtw_netif_stop_queue(struct net_device *pnetdev) ++{ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ netif_tx_stop_all_queues(pnetdev); ++#else ++ netif_stop_queue(pnetdev); ++#endif ++} ++ ++#endif // PLATFORM_LINUX ++ ++ ++#ifdef PLATFORM_OS_XP ++ ++ #include ++ #include ++ #include ++ #include ++ ++#ifdef CONFIG_USB_HCI ++ #include ++ #include ++ #include ++#endif ++ ++ typedef KSEMAPHORE _sema; ++ typedef LIST_ENTRY _list; ++ typedef NDIS_STATUS _OS_STATUS; ++ ++ ++ typedef NDIS_SPIN_LOCK _lock; ++ ++ typedef KMUTEX _mutex; ++ ++ typedef KIRQL _irqL; ++ ++ // USB_PIPE for WINCE , but handle can be use just integer under windows ++ typedef NDIS_HANDLE _nic_hdl; ++ ++ ++ typedef NDIS_MINIPORT_TIMER _timer; ++ ++ struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++ }; ++ ++ typedef NDIS_PACKET _pkt; ++ typedef NDIS_BUFFER _buffer; ++ typedef struct __queue _queue; ++ ++ typedef PKTHREAD _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ typedef NDIS_WORK_ITEM _workitem; ++ ++ #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); ++ ++ #define HZ 10000000 ++ #define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++ ++__inline static _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); ++} ++ ++ ++__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeReleaseMutex(pmutex, FALSE); ++} ++ ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++#endif // PLATFORM_OS_XP ++ ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++#include ++ ++#ifndef BIT ++ #define BIT(x) ( 1 << (x)) ++#endif ++ ++extern int RTW_STATUS_CODE(int error_code); ++ ++#define CONFIG_USE_VMALLOC ++ ++/* flags used for rtw_mstat_update() */ ++enum mstat_f { ++ /* type: 0x00ff */ ++ MSTAT_TYPE_VIR = 0x00, ++ MSTAT_TYPE_PHY= 0x01, ++ MSTAT_TYPE_SKB = 0x02, ++ MSTAT_TYPE_USB = 0x03, ++ MSTAT_TYPE_MAX = 0x04, ++ ++ /* func: 0xff00 */ ++ MSTAT_FUNC_UNSPECIFIED = 0x00<<8, ++ MSTAT_FUNC_IO = 0x01<<8, ++ MSTAT_FUNC_TX_IO = 0x02<<8, ++ MSTAT_FUNC_RX_IO = 0x03<<8, ++ MSTAT_FUNC_TX = 0x04<<8, ++ MSTAT_FUNC_RX = 0x05<<8, ++ MSTAT_FUNC_MAX = 0x06<<8, ++}; ++ ++#define mstat_tf_idx(flags) ((flags)&0xff) ++#define mstat_ff_idx(flags) (((flags)&0xff00) >> 8) ++ ++typedef enum mstat_status{ ++ MSTAT_ALLOC_SUCCESS = 0, ++ MSTAT_ALLOC_FAIL, ++ MSTAT_FREE ++} MSTAT_STATUS; ++ ++#ifdef DBG_MEM_ALLOC ++void rtw_mstat_update(const enum mstat_f flags, const MSTAT_STATUS status, u32 sz); ++int _rtw_mstat_dump(char *buf, int len); ++void rtw_mstat_dump (void); ++u8* dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); ++u8* dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); ++void dbg_rtw_vmfree(u8 *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); ++u8* dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line); ++u8* dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line); ++void dbg_rtw_mfree(u8 *pbuf, const enum mstat_f flags, u32 sz, const char *func, const int line); ++ ++struct sk_buff * dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, const int line); ++void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); ++struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); ++struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line); ++int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line); ++void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line); ++ ++#ifdef CONFIG_USB_HCI ++void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line); ++void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line); ++#endif /* CONFIG_USB_HCI */ ++ ++#ifdef CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_vmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zvmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_vmfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_VIR, __FUNCTION__, __LINE__) ++#else /* CONFIG_USE_VMALLOC */ ++#define rtw_vmalloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_zvmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_vmfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_vmalloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_zvmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_vmfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#endif /* CONFIG_USE_VMALLOC */ ++#define rtw_malloc(sz) dbg_rtw_malloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_malloc_f(sz, mstat_f) dbg_rtw_malloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_zmalloc_f(sz, mstat_f) dbg_rtw_zmalloc((sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++#define rtw_mfree_f(pbuf, sz, mstat_f) dbg_rtw_mfree((pbuf), (sz), ((mstat_f)&0xff00)|MSTAT_TYPE_PHY, __FUNCTION__, __LINE__) ++ ++#define rtw_skb_alloc(size) dbg_rtw_skb_alloc((size), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_free(skb) dbg_rtw_skb_free((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_alloc_f(size, mstat_f) dbg_rtw_skb_alloc((size), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_free_f(skb, mstat_f) dbg_rtw_skb_free((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_copy(skb) dbg_rtw_skb_copy((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_clone(skb) dbg_rtw_skb_clone((skb), MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_copy_f(skb, mstat_f) dbg_rtw_skb_copy((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_clone_f(skb, mstat_f) dbg_rtw_skb_clone((skb), ((mstat_f)&0xff00)|MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_netif_rx(ndev, skb) dbg_rtw_netif_rx(ndev, skb, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) ++#ifdef CONFIG_USB_HCI ++#define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) ++#define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __FUNCTION__, __LINE__) ++#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f)&0xff00)|MSTAT_TYPE_USB, __FUNCTION__, __LINE__) ++#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f)&0xff00)|MSTAT_TYPE_USB, __FUNCTION__, __LINE__) ++#endif /* CONFIG_USB_HCI */ ++ ++#else /* DBG_MEM_ALLOC */ ++#define rtw_mstat_update(flag, status, sz) do {} while(0) ++#define rtw_mstat_dump() do {} while(0) ++u8* _rtw_vmalloc(u32 sz); ++u8* _rtw_zvmalloc(u32 sz); ++void _rtw_vmfree(u8 *pbuf, u32 sz); ++u8* _rtw_zmalloc(u32 sz); ++u8* _rtw_malloc(u32 sz); ++void _rtw_mfree(u8 *pbuf, u32 sz); ++ ++struct sk_buff *_rtw_skb_alloc(u32 sz); ++void _rtw_skb_free(struct sk_buff *skb); ++struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb); ++struct sk_buff *_rtw_skb_clone(struct sk_buff *skb); ++int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb); ++void _rtw_skb_queue_purge(struct sk_buff_head *list); ++ ++#ifdef CONFIG_USB_HCI ++void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma); ++void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); ++#endif /* CONFIG_USB_HCI */ ++ ++#ifdef CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) _rtw_vmalloc((sz)) ++#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz)) ++#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz)) ++#define rtw_vmalloc_f(sz, mstat_f) _rtw_vmalloc((sz)) ++#define rtw_zvmalloc_f(sz, mstat_f) _rtw_zvmalloc((sz)) ++#define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_vmfree((pbuf), (sz)) ++#else /* CONFIG_USE_VMALLOC */ ++#define rtw_vmalloc(sz) _rtw_malloc((sz)) ++#define rtw_zvmalloc(sz) _rtw_zmalloc((sz)) ++#define rtw_vmfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) ++#define rtw_vmalloc_f(sz, mstat_f) _rtw_malloc((sz)) ++#define rtw_zvmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) ++#define rtw_vmfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) ++#endif /* CONFIG_USE_VMALLOC */ ++#define rtw_malloc(sz) _rtw_malloc((sz)) ++#define rtw_zmalloc(sz) _rtw_zmalloc((sz)) ++#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) ++#define rtw_malloc_f(sz, mstat_f) _rtw_malloc((sz)) ++#define rtw_zmalloc_f(sz, mstat_f) _rtw_zmalloc((sz)) ++#define rtw_mfree_f(pbuf, sz, mstat_f) _rtw_mfree((pbuf), (sz)) ++ ++#define rtw_skb_alloc(size) _rtw_skb_alloc((size)) ++#define rtw_skb_free(skb) _rtw_skb_free((skb)) ++#define rtw_skb_alloc_f(size, mstat_f) _rtw_skb_alloc((size)) ++#define rtw_skb_free_f(skb, mstat_f) _rtw_skb_free((skb)) ++#define rtw_skb_copy(skb) _rtw_skb_copy((skb)) ++#define rtw_skb_clone(skb) _rtw_skb_clone((skb)) ++#define rtw_skb_copy_f(skb, mstat_f) _rtw_skb_copy((skb)) ++#define rtw_skb_clone_f(skb, mstat_f) _rtw_skb_clone((skb)) ++#define rtw_netif_rx(ndev, skb) _rtw_netif_rx(ndev, skb) ++#define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head) ++#ifdef CONFIG_USB_HCI ++#define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma)) ++#define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) ++#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma)) ++#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) ++#endif /* CONFIG_USB_HCI */ ++#endif /* DBG_MEM_ALLOC */ ++ ++extern void* rtw_malloc2d(int h, int w, int size); ++extern void rtw_mfree2d(void *pbuf, int h, int w, int size); ++ ++extern void _rtw_memcpy(void *dec, const void *sour, u32 sz); ++extern int _rtw_memcmp(const void *dst, const void *src, u32 sz); ++extern void _rtw_memset(void *pbuf, int c, u32 sz); ++ ++extern void _rtw_init_listhead(_list *list); ++extern u32 rtw_is_list_empty(_list *phead); ++extern void rtw_list_insert_head(_list *plist, _list *phead); ++extern void rtw_list_insert_tail(_list *plist, _list *phead); ++#ifndef PLATFORM_FREEBSD ++extern void rtw_list_delete(_list *plist); ++#endif //PLATFORM_FREEBSD ++ ++extern void _rtw_init_sema(_sema *sema, int init_val); ++extern void _rtw_free_sema(_sema *sema); ++extern void _rtw_up_sema(_sema *sema); ++extern u32 _rtw_down_sema(_sema *sema); ++extern void _rtw_mutex_init(_mutex *pmutex); ++extern void _rtw_mutex_free(_mutex *pmutex); ++#ifndef PLATFORM_FREEBSD ++extern void _rtw_spinlock_init(_lock *plock); ++#endif //PLATFORM_FREEBSD ++extern void _rtw_spinlock_free(_lock *plock); ++extern void _rtw_spinlock(_lock *plock); ++extern void _rtw_spinunlock(_lock *plock); ++extern void _rtw_spinlock_ex(_lock *plock); ++extern void _rtw_spinunlock_ex(_lock *plock); ++ ++extern void _rtw_init_queue(_queue *pqueue); ++extern u32 _rtw_queue_empty(_queue *pqueue); ++extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement); ++ ++extern u32 rtw_get_current_time(void); ++extern u32 rtw_systime_to_ms(u32 systime); ++extern u32 rtw_ms_to_systime(u32 ms); ++extern s32 rtw_get_passing_time_ms(u32 start); ++extern s32 rtw_get_time_interval_ms(u32 start, u32 end); ++ ++extern void rtw_sleep_schedulable(int ms); ++ ++extern void rtw_msleep_os(int ms); ++extern void rtw_usleep_os(int us); ++ ++extern u32 rtw_atoi(u8* s); ++ ++#ifdef DBG_DELAY_OS ++#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__) ++#define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__) ++extern void _rtw_mdelay_os(int ms, const char *func, const int line); ++extern void _rtw_udelay_os(int us, const char *func, const int line); ++#else ++extern void rtw_mdelay_os(int ms); ++extern void rtw_udelay_os(int us); ++#endif ++ ++extern void rtw_yield_os(void); ++ ++ ++__inline static unsigned char _cancel_timer_ex(_timer *ptimer) ++{ ++#ifdef PLATFORM_LINUX ++ return del_timer_sync(ptimer); ++#endif ++#ifdef PLATFORM_FREEBSD ++ _cancel_timer(ptimer,0); ++ return 0; ++#endif ++#ifdef PLATFORM_WINDOWS ++ u8 bcancelled; ++ ++ _cancel_timer(ptimer, &bcancelled); ++ ++ return bcancelled; ++#endif ++} ++ ++#ifdef PLATFORM_FREEBSD ++static __inline void thread_enter(void *context); ++#endif //PLATFORM_FREEBSD ++static __inline void thread_enter(char *name) ++{ ++#ifdef PLATFORM_LINUX ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)) ++ daemonize("%s", name); ++ #endif ++ allow_signal(SIGTERM); ++#endif ++#ifdef PLATFORM_FREEBSD ++ printf("%s", "RTKTHREAD_enter"); ++#endif ++} ++ ++#ifdef PLATFORM_FREEBSD ++#define thread_exit() do{printf("%s", "RTKTHREAD_exit");}while(0) ++#endif //PLATFORM_FREEBSD ++__inline static void flush_signals_thread(void) ++{ ++#ifdef PLATFORM_LINUX ++ if (signal_pending (current)) ++ { ++ flush_signals(current); ++ } ++#endif ++} ++ ++__inline static _OS_STATUS res_to_status(sint res) ++{ ++ ++ ++#if defined (PLATFORM_LINUX) || defined (PLATFORM_MPIXEL) || defined (PLATFORM_FREEBSD) ++ return res; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ if (res == _SUCCESS) ++ return NDIS_STATUS_SUCCESS; ++ else ++ return NDIS_STATUS_FAILURE; ++ ++#endif ++ ++} ++ ++__inline static void rtw_dump_stack(void) ++{ ++#ifdef PLATFORM_LINUX ++ dump_stack(); ++#endif ++} ++ ++#ifdef PLATFORM_LINUX ++#define rtw_warn_on(condition) WARN_ON(condition) ++#else ++#define rtw_warn_on(condition) do {} while (0) ++#endif ++ ++#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r)) ++#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2) ++ ++__inline static u32 _RND4(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND8(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND128(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND256(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND512(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9; ++ ++ return val; ++ ++} ++ ++__inline static u32 bitshift(u32 bitmask) ++{ ++ u32 i; ++ ++ for (i = 0; i <= 31; i++) ++ if (((bitmask>>i) & 0x1) == 1) break; ++ ++ return i; ++} ++ ++#ifndef MAC_FMT ++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" ++#endif ++#ifndef MAC_ARG ++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] ++#endif ++ ++//#ifdef __GNUC__ ++#ifdef PLATFORM_LINUX ++#define STRUCT_PACKED __attribute__ ((packed)) ++#else ++#define STRUCT_PACKED ++#endif ++ ++ ++// limitation of path length ++#ifdef PLATFORM_LINUX ++ #define PATH_LENGTH_MAX PATH_MAX ++#elif defined(PLATFORM_WINDOWS) ++ #define PATH_LENGTH_MAX MAX_PATH ++#endif ++ ++ ++// Suspend lock prevent system from going suspend ++#ifdef CONFIG_WAKELOCK ++#include ++#elif defined(CONFIG_ANDROID_POWER) ++#include ++#endif ++ ++extern void rtw_suspend_lock_init(void); ++extern void rtw_suspend_lock_uninit(void); ++extern void rtw_lock_suspend(void); ++extern void rtw_unlock_suspend(void); ++extern void rtw_lock_suspend_timeout(u32 timeout_ms); ++ ++ ++//Atomic integer operations ++#ifdef PLATFORM_LINUX ++ #define ATOMIC_T atomic_t ++#elif defined(PLATFORM_WINDOWS) ++ #define ATOMIC_T LONG ++#elif defined(PLATFORM_FREEBSD) ++ typedef uint32_t ATOMIC_T ; ++#endif ++ ++extern void ATOMIC_SET(ATOMIC_T *v, int i); ++extern int ATOMIC_READ(ATOMIC_T *v); ++extern void ATOMIC_ADD(ATOMIC_T *v, int i); ++extern void ATOMIC_SUB(ATOMIC_T *v, int i); ++extern void ATOMIC_INC(ATOMIC_T *v); ++extern void ATOMIC_DEC(ATOMIC_T *v); ++extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i); ++extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i); ++extern int ATOMIC_INC_RETURN(ATOMIC_T *v); ++extern int ATOMIC_DEC_RETURN(ATOMIC_T *v); ++ ++//File operation APIs, just for linux now ++extern int rtw_is_file_readable(char *path); ++extern int rtw_retrive_from_file(char *path, u8* buf, u32 sz); ++extern int rtw_store_to_file(char *path, u8* buf, u32 sz); ++ ++ ++#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR ++struct rtw_netdev_priv_indicator { ++ void *priv; ++ u32 sizeof_priv; ++}; ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); ++extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); ++ ++#ifndef PLATFORM_FREEBSD ++#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) ++#else //PLATFORM_FREEBSD ++#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) ++#endif //PLATFORM_FREEBSD ++ ++#ifndef PLATFORM_FREEBSD ++extern void rtw_free_netdev(struct net_device * netdev); ++#else //PLATFORM_FREEBSD ++#define rtw_free_netdev(netdev) if_free((netdev)) ++#endif //PLATFORM_FREEBSD ++ ++#else //MEM_ALLOC_REFINE_ADAPTOR ++ ++#define rtw_alloc_etherdev(sizeof_priv) alloc_etherdev((sizeof_priv)) ++ ++#ifndef PLATFORM_FREEBSD ++#define rtw_netdev_priv(netdev) netdev_priv((netdev)) ++#define rtw_free_netdev(netdev) free_netdev((netdev)) ++#else //PLATFORM_FREEBSD ++#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) ++#define rtw_free_netdev(netdev) if_free((netdev)) ++#endif //PLATFORM_FREEBSD ++#endif ++ ++#ifdef PLATFORM_LINUX ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) ndev->name ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) adapter->pnetdev->name ++#define FUNC_NDEV_FMT "%s(%s)" ++#define FUNC_NDEV_ARG(ndev) __func__, ndev->name ++#define FUNC_ADPT_FMT "%s(%s)" ++#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name ++#else ++#define NDEV_FMT "%s" ++#define NDEV_ARG(ndev) "" ++#define ADPT_FMT "%s" ++#define ADPT_ARG(adapter) "" ++#define FUNC_NDEV_FMT "%s" ++#define FUNC_NDEV_ARG(ndev) __func__ ++#define FUNC_ADPT_FMT "%s" ++#define FUNC_ADPT_ARG(adapter) __func__ ++#endif ++ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) ++#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) ++#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#endif //PLATFORM_LINUX ++ ++extern u64 rtw_modular64(u64 x, u64 y); ++extern u64 rtw_division64(u64 x, u64 y); ++ ++ ++/* Macros for handling unaligned memory accesses */ ++ ++#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1])) ++#define RTW_PUT_BE16(a, val) \ ++ do { \ ++ (a)[0] = ((u16) (val)) >> 8; \ ++ (a)[1] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0])) ++#define RTW_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \ ++ ((u32) (a)[2])) ++#define RTW_PUT_BE24(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[2] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ ++ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) ++#define RTW_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \ ++ (((u32) (a)[1]) << 8) | ((u32) (a)[0])) ++#define RTW_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \ ++ (((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \ ++ (((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \ ++ (((u64) (a)[6]) << 8) | ((u64) (a)[7])) ++#define RTW_PUT_BE64(a, val) \ ++ do { \ ++ (a)[0] = (u8) (((u64) (val)) >> 56); \ ++ (a)[1] = (u8) (((u64) (val)) >> 48); \ ++ (a)[2] = (u8) (((u64) (val)) >> 40); \ ++ (a)[3] = (u8) (((u64) (val)) >> 32); \ ++ (a)[4] = (u8) (((u64) (val)) >> 24); \ ++ (a)[5] = (u8) (((u64) (val)) >> 16); \ ++ (a)[6] = (u8) (((u64) (val)) >> 8); \ ++ (a)[7] = (u8) (((u64) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \ ++ (((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \ ++ (((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \ ++ (((u64) (a)[1]) << 8) | ((u64) (a)[0])) ++ ++void rtw_buf_free(u8 **buf, u32 *buf_len); ++void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len); ++ ++struct rtw_cbuf { ++ u32 write; ++ u32 read; ++ u32 size; ++ void *bufs[0]; ++}; ++ ++bool rtw_cbuf_full(struct rtw_cbuf *cbuf); ++bool rtw_cbuf_empty(struct rtw_cbuf *cbuf); ++bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf); ++void *rtw_cbuf_pop(struct rtw_cbuf *cbuf); ++struct rtw_cbuf *rtw_cbuf_alloc(u32 size); ++void rtw_cbuf_free(struct rtw_cbuf *cbuf); ++ ++#endif ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/pci_hal.h +@@ -0,0 +1,168 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_HAL_H__ ++#define __PCI_HAL_H__ ++ ++ ++#define INTEL_VENDOR_ID 0x8086 ++#define SIS_VENDOR_ID 0x1039 ++#define ATI_VENDOR_ID 0x1002 ++#define ATI_DEVICE_ID 0x7914 ++#define AMD_VENDOR_ID 0x1022 ++ ++#define PCI_MAX_BRIDGE_NUMBER 255 ++#define PCI_MAX_DEVICES 32 ++#define PCI_MAX_FUNCTION 8 ++ ++#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address ++#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data ++ ++#define PCI_CLASS_BRIDGE_DEV 0x06 ++#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 ++ ++#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 ++ ++#define U1DONTCARE 0xFF ++#define U2DONTCARE 0xFFFF ++#define U4DONTCARE 0xFFFFFFFF ++ ++#define PCI_VENDER_ID_REALTEK 0x10ec ++ ++#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 ++#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b ++#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b ++#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b ++#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 ++#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E ++#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E ++#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE ++#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE ++#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab ++#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE ++#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron ++#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga ++#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga ++#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga ++#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga ++#define HAL_HW_PCI_700F_DEVICE_ID 0x700F ++#define HAL_HW_PCI_701F_DEVICE_ID 0x701F ++#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 ++#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce ++#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce ++#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce ++#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce ++#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce ++#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de ++#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD ++ ++#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 ++#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers ++ ++enum pci_bridge_vendor { ++ PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 ++ PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 ++ PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 ++ PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 ++ PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 ++ PCI_BRIDGE_VENDOR_MAX ,//= 0x80 ++} ; ++ ++struct rt_pci_capabilities_header { ++ u8 capability_id; ++ u8 next; ++}; ++ ++struct pci_priv{ ++ u8 linkctrl_reg; ++ ++ u8 busnumber; ++ u8 devnumber; ++ u8 funcnumber; ++ ++ u8 pcibridge_busnum; ++ u8 pcibridge_devnum; ++ u8 pcibridge_funcnum; ++ u8 pcibridge_vendor; ++ u16 pcibridge_vendorid; ++ u16 pcibridge_deviceid; ++ u8 pcibridge_pciehdr_offset; ++ u8 pcibridge_linkctrlreg; ++ ++ u8 amd_l1_patch; ++}; ++ ++typedef struct _RT_ISR_CONTENT ++{ ++ union{ ++ u32 IntArray[2]; ++ u32 IntReg4Byte; ++ u16 IntReg2Byte; ++ }; ++}RT_ISR_CONTENT, *PRT_ISR_CONTENT; ++ ++//#define RegAddr(addr) (addr + 0xB2000000UL) ++//some platform macros will def here ++static inline void NdisRawWritePortUlong(u32 port, u32 val) ++{ ++ outl(val, port); ++ //writel(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawWritePortUchar(u32 port, u8 val) ++{ ++ outb(val, port); ++ //writeb(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUchar(u32 port, u8 *pval) ++{ ++ *pval = inb(port); ++ //*pval = readb((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUshort(u32 port, u16 *pval) ++{ ++ *pval = inw(port); ++ //*pval = readw((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUlong(u32 port, u32 *pval) ++{ ++ *pval = inl(port); ++ //*pval = readl((u8 *)RegAddr(port)); ++} ++ ++#ifdef CONFIG_RTL8192C ++void rtl8192ce_set_hal_ops(_adapter * padapter); ++#endif ++#ifdef CONFIG_RTL8192D ++void rtl8192de_set_hal_ops(_adapter * padapter); ++#endif ++ ++#endif //__PCIE_HAL_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/pci_ops.h +@@ -0,0 +1,60 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_OPS_H_ ++#define __PCI_OPS_H_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++u32 rtl8192ce_init_desc_ring(_adapter * padapter); ++u32 rtl8192ce_free_desc_ring(_adapter * padapter); ++void rtl8192ce_reset_desc_ring(_adapter * padapter); ++#ifdef CONFIG_64BIT_DMA ++u8 PlatformEnable92CEDMA64(PADAPTER Adapter); ++#endif ++int rtl8192ce_interrupt(PADAPTER Adapter); ++void rtl8192ce_xmit_tasklet(void *priv); ++void rtl8192ce_recv_tasklet(void *priv); ++void rtl8192ce_prepare_bcn_tasklet(void *priv); ++void rtl8192ce_set_intf_ops(struct _io_ops *pops); ++#define pci_set_intf_ops rtl8192ce_set_intf_ops ++#endif ++ ++#ifdef CONFIG_RTL8192D ++u32 rtl8192de_init_desc_ring(_adapter * padapter); ++u32 rtl8192de_free_desc_ring(_adapter * padapter); ++void rtl8192de_reset_desc_ring(_adapter * padapter); ++#ifdef CONFIG_64BIT_DMA ++u8 PlatformEnable92DEDMA64(PADAPTER Adapter); ++#endif ++int rtl8192de_interrupt(PADAPTER Adapter); ++void rtl8192de_xmit_tasklet(void *priv); ++void rtl8192de_recv_tasklet(void *priv); ++void rtl8192de_prepare_bcn_tasklet(void *priv); ++void rtl8192de_set_intf_ops(struct _io_ops *pops); ++#define pci_set_intf_ops rtl8192de_set_intf_ops ++u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct); ++void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct); ++#endif ++ ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/pci_osintf.h +@@ -0,0 +1,33 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_OSINTF_H ++#define __PCI_OSINTF_H ++ ++#include ++#include ++#include ++ ++ ++void rtw_pci_disable_aspm(_adapter *padapter); ++void rtw_pci_enable_aspm(_adapter *padapter); ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/recv_osdep.h +@@ -0,0 +1,58 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RECV_OSDEP_H_ ++#define __RECV_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++ ++extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); ++extern void _rtw_free_recv_priv (struct recv_priv *precvpriv); ++ ++ ++extern s32 rtw_recv_entry(union recv_frame *precv_frame); ++extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); ++extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt); ++ ++extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame); ++extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup); ++ ++ ++int rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); ++void rtw_free_recv_priv (struct recv_priv *precvpriv); ++ ++ ++int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter); ++int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe); ++void rtw_os_recv_resource_free(struct recv_priv *precvpriv); ++ ++ ++int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf); ++int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf); ++ ++void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf); ++ ++void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl); ++ ++ ++#endif // ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_cmd.h +@@ -0,0 +1,153 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192C_CMD_H_ ++#define __RTL8192C_CMD_H_ ++ ++ ++enum cmd_msg_element_id ++{ ++ NONE_CMDMSG_EID, ++ AP_OFFLOAD_EID=0, ++ SET_PWRMODE_EID=1, ++ JOINBSS_RPT_EID=2, ++ RSVD_PAGE_EID=3, ++ RSSI_4_EID = 4, ++ RSSI_SETTING_EID=5, ++ MACID_CONFIG_EID=6, ++ MACID_PS_MODE_EID=7, ++ P2P_PS_OFFLOAD_EID=8, ++ SELECTIVE_SUSPEND_ROF_CMD=9, ++#ifdef CONFIG_WOWLAN ++ H2C_WO_WLAN_CMD = 26, // Wake on Wlan. ++ EXT_MACID_PERIOD_EID = 27, // support macid to 64 ++ MACID64_CONFIG_EID = 28, // support macid to 64 ++#endif // CONFIG_WOWLAN ++ P2P_PS_CTW_CMD_EID=32, ++ H2C_92C_IO_OFFLOAD=44, ++#ifdef CONFIG_WOWLAN ++ KEEP_ALIVE_CONTROL_CMD=48, ++ DISCONNECT_DECISION_CTRL_CMD=49, ++ REMOTE_WAKE_CTRL_CMD=60, ++#endif // CONFIG_WOWLAN ++ H2C_92C_TSF_SYNC=67, ++ H2C_92C_DISABLE_BCN_FUNC=68, ++ H2C_92C_RESET_TSF = 75, ++ H2C_92C_CMD_MAX ++}; ++ ++struct cmd_msg_parm { ++ u8 eid; //element id ++ u8 sz; // sz ++ u8 buf[6]; ++}; ++ ++typedef struct _SETPWRMODE_PARM{ ++ u8 Mode; ++ u8 SmartPS; ++ u8 BcnPassTime; // unit: 100ms ++}SETPWRMODE_PARM, *PSETPWRMODE_PARM; ++ ++#ifdef CONFIG_WOWLAN ++typedef struct _SETWOWLAN_PARM{ ++ u8 mode; ++ u8 gpio_index; ++ u8 gpio_duration; ++ u8 second_mode; ++ u8 reserve; ++}SETWOWLAN_PARM, *PSETWOWLAN_PARM; ++ ++#define FW_WOWLAN_FUN_EN BIT(0) ++#define FW_WOWLAN_PATTERN_MATCH BIT(1) ++#define FW_WOWLAN_MAGIC_PKT BIT(2) ++#define FW_WOWLAN_UNICAST BIT(3) ++#define FW_WOWLAN_ALL_PKT_DROP BIT(4) ++#define FW_WOWLAN_GPIO_ACTIVE BIT(5) ++#define FW_WOWLAN_REKEY_WAKEUP BIT(6) ++#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) ++ ++#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) ++#define FW_FW_PARSE_MAGIC_PKT BIT(1) ++#endif // CONFIG_WOWLAN ++ ++struct H2C_SS_RFOFF_PARAM{ ++ u8 ROFOn; // 1: on, 0:off ++ u16 gpio_period; // unit: 1024 us ++}__attribute__ ((packed)); ++ ++ ++typedef struct JOINBSSRPT_PARM{ ++ u8 OpMode; // RT_MEDIA_STATUS ++}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM; ++ ++typedef struct _RSVDPAGE_LOC{ ++ u8 LocProbeRsp; ++ u8 LocPsPoll; ++ u8 LocNullData; ++}RSVDPAGE_LOC, *PRSVDPAGE_LOC; ++ ++struct P2P_PS_Offload_t { ++ unsigned char Offload_En:1; ++ unsigned char role:1; // 1: Owner, 0: Client ++ unsigned char CTWindow_En:1; ++ unsigned char NoA0_En:1; ++ unsigned char NoA1_En:1; ++ unsigned char AllStaSleep:1; // Only valid in Owner ++ unsigned char discovery:1; ++ unsigned char rsvd:1; ++}; ++ ++struct P2P_PS_CTWPeriod_t { ++ unsigned char CTWPeriod; //TU ++}; ++ ++// host message to firmware cmd ++void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); ++void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); ++u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param); ++u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); ++void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg); ++u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period); ++#ifdef CONFIG_P2P ++void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_IOL ++typedef struct _IO_OFFLOAD_LOC{ ++ u8 LocCmd; ++}IO_OFFLOAD_LOC, *PIO_OFFLOAD_LOC; ++int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++#endif //CONFIG_IOL ++ ++#ifdef CONFIG_BEACON_DISABLE_OFFLOAD ++u8 rtl8192c_dis_beacon_fun_cmd(_adapter* padapter); ++#endif // CONFIG_BEACON_DISABLE_OFFLOAD ++ ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++int reset_tsf(PADAPTER Adapter, u8 reset_port ); ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ ++#ifdef CONFIG_WOWLAN ++void rtl8192c_set_wowlan_cmd(_adapter* padapter); ++void SetFwRelatedForWoWLAN8192CU(_adapter* padapter,u8 bHostIsGoingtoSleep); ++#endif // CONFIG_WOWLAN ++ ++#endif // __RTL8192C_CMD_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_dm.h +@@ -0,0 +1,516 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192C_DM_H__ ++#define __RTL8192C_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++ ++#define RSSI_CCK 0 ++#define RSSI_OFDM 1 ++#define RSSI_DEFAULT 2 ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u32 Cnt_Parity_Fail; ++ u32 Cnt_Rate_Illegal; ++ u32 Cnt_Crc8_fail; ++ u32 Cnt_Mcs_fail; ++ u32 Cnt_Ofdm_fail; ++ u32 Cnt_Cck_fail; ++ u32 Cnt_all; ++ u32 Cnt_Fast_Fsync; ++ u32 Cnt_SB_Search_fail; ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 PreRFState; ++ u8 CurRFState; ++ ++ s32 Rssi_val_min; ++ ++}PS_T; ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ u8 Dig_Enable_Flag; ++ u8 Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u32 FALowThresh; ++ u32 FAHighThresh; ++ ++ u8 CurSTAConnectState; ++ u8 PreSTAConnectState; ++ u8 CurMultiSTAConnectState; ++ ++ u8 PreIGValue; ++ u8 CurIGValue; ++ u8 BackupIGValue; ++ ++ char BackoffVal; ++ char BackoffVal_range_max; ++ char BackoffVal_range_min; ++ u8 rx_gain_range_max; ++ u8 rx_gain_range_min; ++ u8 Rssi_val_min; ++ ++ u8 PreCCKPDState; ++ u8 CurCCKPDState; ++ u8 PreCCKFAState; ++ u8 CurCCKFAState; ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 LargeFAHit; ++ u8 ForbiddenIGI; ++ u32 Recover_cnt; ++ u8 rx_gain_range_min_nolink; ++ ++}DIG_T; ++ ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_1R =0, ++ CCA_2R = 1, ++ CCA_MAX = 2, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++ ++typedef enum _BT_Ant_NUM{ ++ Ant_x2 = 0, ++ Ant_x1 = 1 ++} BT_Ant_NUM, *PBT_Ant_NUM; ++ ++typedef enum _BT_CoType{ ++ BT_2Wire = 0, ++ BT_ISSC_3Wire = 1, ++ BT_Accel = 2, ++ BT_CSR_BC4 = 3, ++ BT_CSR_BC8 = 4, ++ BT_RTL8756 = 5, ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_CurState{ ++ BT_OFF = 0, ++ BT_ON = 1, ++} BT_CurState, *PBT_CurState; ++ ++typedef enum _BT_ServiceType{ ++ BT_SCO = 0, ++ BT_A2DP = 1, ++ BT_HID = 2, ++ BT_HID_Idle = 3, ++ BT_Scan = 4, ++ BT_Idle = 5, ++ BT_OtherAction = 6, ++ BT_Busy = 7, ++ BT_OtherBusy = 8, ++ BT_PAN = 9, ++} BT_ServiceType, *PBT_ServiceType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++struct btcoexist_priv { ++ u8 BT_Coexist; ++ u8 BT_Ant_Num; ++ u8 BT_CoexistType; ++ u8 BT_State; ++ u8 BT_CUR_State; //0:on, 1:off ++ u8 BT_Ant_isolation; //0:good, 1:bad ++ u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic ++ u8 BT_Service; ++ u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++ u8 BT_RadioSharedType; ++ u32 Ratio_Tx; ++ u32 Ratio_PRI; ++ u8 BtRfRegOrigin1E; ++ u8 BtRfRegOrigin1F; ++ u8 BtRssiState; ++ u32 BtEdcaUL; ++ u32 BtEdcaDL; ++ u32 BT_EDCA[2]; ++ u8 bCOBT; ++ ++ u8 bInitSet; ++ u8 bBTBusyTraffic; ++ u8 bBTTrafficModeSet; ++ u8 bBTNonTrafficModeSet; ++ //BTTraffic BT21TrafficStatistics; ++ u32 CurrentState; ++ u32 PreviousState; ++ u8 BtPreRssiState; ++ u8 bFWCoexistAllOff; ++ u8 bSWCoexistAllOff; ++}; ++ ++#define BW_AUTO_SWITCH_HIGH_LOW 25 ++#define BW_AUTO_SWITCH_LOW_HIGH 30 ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX 0x3e ++#define DM_DIG_MIN 0x1e //0x22//0x1c ++ ++#define DM_DIG_FA_UPPER 0x3e ++#define DM_DIG_FA_LOWER 0x20 ++#define DM_DIG_FA_TH0 0x20 ++#define DM_DIG_FA_TH1 0x100 ++#define DM_DIG_FA_TH2 0x200 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN (-4) ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define RxPathSelection_SS_TH_low 30 ++#define RxPathSelection_diff_TH 18 ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++ ++#define CTSToSelfTHVal 30 ++#define RegC38_TH 20 ++ ++#define WAIotTHVal 25 ++ ++//Dynamic Tx Power Control Threshold ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++ ++typedef struct _RATE_ADAPTIVE ++{ ++ u8 RateAdaptiveDisabled; ++ u8 RATRState; ++ u16 reserve; ++ ++ u32 HighRSSIThreshForRA; ++ u32 High2LowRSSIThreshForRA; ++ u8 Low2HighRSSIThreshForRA40M; ++ u32 LowRSSIThreshForRA40M; ++ u8 Low2HighRSSIThreshForRA20M; ++ u32 LowRSSIThreshForRA20M; ++ u32 UpperRSSIThresholdRATR; ++ u32 MiddleRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR40M; ++ u32 LowRSSIThresholdRATR20M; ++ u8 PingRSSIEnable; //cosa add for Netcore long range ping issue ++ u32 PingRSSIRATR; //cosa add for Netcore long range ping issue ++ u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue ++ u32 LastRATR; ++ u8 PreRATRState; ++ ++} RATE_ADAPTIVE, *PRATE_ADAPTIVE; ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_B = 1, ++ Antenna_A = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++// This indicates two different the steps. ++// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. ++// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK ++// with original RSSI to determine if it is necessary to switch antenna. ++#define SWAW_STEP_PEAK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++ ++typedef struct _SW_Antenna_Switch_ ++{ ++ u8 try_flag; ++ s32 PreRSSI; ++ u8 CurAntenna; ++ u8 PreAntenna; ++ u8 RSSI_Trying; ++ u8 TestMode; ++ u8 bTriggerAntennaSwitch; ++ u8 SelectAntennaMap; ++ // Before link Antenna Switch check ++ u8 SWAS_NoLink_State; ++ ++}SWAT_T; ++ ++ ++#endif ++ ++ ++struct dm_priv ++{ ++ u8 DM_Type; ++ u8 DMFlag, DMFlag_tmp; ++ ++ ++ //for DIG ++ u8 bDMInitialGainEnable; ++ u8 binitialized; // for dm_initial_gain_Multi_STA use. ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u8 bUseRAMask; ++ RATE_ADAPTIVE RateAdaptive; ++ ++ //* Upper and Lower Signal threshold for Rate Adaptive*/ ++ int UndecoratedSmoothedPWDB; ++ int UndecoratedSmoothedCCK; ++ int EntryMinUndecoratedSmoothedPWDB; ++ int EntryMaxUndecoratedSmoothedPWDB; ++ ++ ++ //for High Power ++ u8 bDynamicTxPowerEnable; ++ u8 LastDTPLvl; ++ u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 ++ ++ //for tx power tracking ++ //u8 bTXPowerTracking; ++ u8 TXPowercount; ++ u8 bTXPowerTrackingInit; ++ u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u8 TM_Trigger; ++ ++ u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u8 ThermalValue; ++ u8 ThermalValue_LCK; ++ u8 ThermalValue_IQK; ++ u8 ThermalValue_DPK; ++ ++ u8 bRfPiEnable; ++ ++ //for APK ++ u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u8 bAPKdone; ++ u8 bAPKThermalMeterIgnore; ++ u8 bDPdone; ++ u8 bDPPathAOK; ++ u8 bDPPathBOK; ++ ++ //for IQK ++ u32 RegC04; ++ u32 Reg874; ++ u32 RegC08; ++ u32 RegB68; ++ u32 RegB6C; ++ u32 Reg870; ++ u32 Reg860; ++ u32 Reg864; ++ u32 ADDA_backup[IQK_ADDA_REG_NUM]; ++ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u32 IQK_BB_backup_recover[9]; ++ u32 IQK_BB_backup[IQK_BB_REG_NUM]; ++ u8 PowerIndex_backup[6]; ++ ++ u8 bCCKinCH14; ++ ++ char CCK_index; ++ char OFDM_index[2]; ++ ++ BOOLEAN bDoneTxpower; ++ char CCK_index_HP; ++ char OFDM_index_HP[2]; ++ u8 ThermalValue_HP[HP_THERMAL_NUM]; ++ u8 ThermalValue_HP_index; ++ ++ //for TxPwrTracking ++ int RegE94; ++ int RegE9C; ++ int RegEB4; ++ int RegEBC; ++ ++ u32 TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u32 prv_traffic_idx; // edca turbo ++ ++ // for dm_RF_Saving ++ u8 initialize; ++ u32 rf_saving_Reg874; ++ u32 rf_saving_RegC70; ++ u32 rf_saving_Reg85C; ++ u32 rf_saving_RegA74; ++ ++ //for Antenna diversity ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ SWAT_T DM_SWAT_Table; ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ _timer SwAntennaSwitchTimer; ++ ++ u64 lastTxOkCnt; ++ u64 lastRxOkCnt; ++ u64 TXByteCnt_A; ++ u64 TXByteCnt_B; ++ u64 RXByteCnt_A; ++ u64 RXByteCnt_B; ++ u8 DoubleComfirm; ++ u8 TrafficLoad; ++#endif ++ ++ s32 OFDM_Pkt_Cnt; ++ u8 RSSI_Select; ++ u8 DIG_Dynamic_MIN ; ++ ++ // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas ++ u8 INIDATA_RATE[32]; ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ /* Ported from ODM, for ESTI Adaptivity test */ ++ s8 TH_L2H_ini; ++ s8 TH_EDCCA_HL_diff; ++ s8 IGI_Base; ++ u8 IGI_target; ++ bool ForceEDCCA; ++ u8 AdapEn_RSSI; ++ s8 Force_TH_H; ++ s8 Force_TH_L; ++ u8 IGI_LowerBound; ++ ++ bool bPreEdccaEnable; ++#endif ++}; ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++ ++//============================================================ ++// function prototype ++//============================================================ ++void rtl8192c_init_dm_priv(IN PADAPTER Adapter); ++void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter); ++void rtl8192c_InitHalDm(IN PADAPTER Adapter); ++void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter); ++ ++VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); ++ ++void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart); ++void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir); ++#endif ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll); ++void SwAntDivRestAfterLink8192C(IN PADAPTER Adapter); ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); ++u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter); ++#endif ++ ++#endif //__HAL8190PCIDM_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_event.h +@@ -0,0 +1,28 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192C_EVENT_H_ ++#define _RTL8192C_EVENT_H_ ++ ++ ++ ++ ++#endif ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_hal.h +@@ -0,0 +1,937 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192C_HAL_H__ ++#define __RTL8192C_HAL_H__ ++ ++#include "hal_com.h" ++#include "rtl8192c_spec.h" ++#include "Hal8192CPhyReg.h" ++#include "Hal8192CPhyCfg.h" ++#include "rtl8192c_rf.h" ++#include "rtl8192c_dm.h" ++#include "rtl8192c_recv.h" ++#include "rtl8192c_xmit.h" ++#include "rtl8192c_cmd.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192c_sreset.h" ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ ++ #include "Hal8192CEHWImg.h" ++ ++ #define RTL819X_DEFAULT_RF_TYPE RF_2T2R ++ //#define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ #define RTL819X_TOTAL_RF_PATH 2 ++ ++ //2TODO: The following need to check!! ++ #define RTL8192C_FW_TSMC_IMG "rtl8192CE\\rtl8192cfwT.bin" ++ #define RTL8192C_FW_UMC_IMG "rtl8192CE\\rtl8192cfwU.bin" ++ #define RTL8192C_FW_UMC_B_IMG "rtl8192CE\\rtl8192cfwU_B.bin" ++ ++ #define RTL8188C_PHY_REG "rtl8192CE\\PHY_REG_1T.txt" ++ #define RTL8188C_PHY_RADIO_A "rtl8192CE\\radio_a_1T.txt" ++ #define RTL8188C_PHY_RADIO_B "rtl8192CE\\radio_b_1T.txt" ++ #define RTL8188C_AGC_TAB "rtl8192CE\\AGC_TAB_1T.txt" ++ #define RTL8188C_PHY_MACREG "rtl8192CE\\MACREG_1T.txt" ++ ++ #define RTL8192C_PHY_REG "rtl8192CE\\PHY_REG_2T.txt" ++ #define RTL8192C_PHY_RADIO_A "rtl8192CE\\radio_a_2T.txt" ++ #define RTL8192C_PHY_RADIO_B "rtl8192CE\\radio_b_2T.txt" ++ #define RTL8192C_AGC_TAB "rtl8192CE\\AGC_TAB_2T.txt" ++ #define RTL8192C_PHY_MACREG "rtl8192CE\\MACREG_2T.txt" ++ ++ #define RTL819X_PHY_MACPHY_REG "rtl8192CE\\MACPHY_reg.txt" ++ #define RTL819X_PHY_MACPHY_REG_PG "rtl8192CE\\MACPHY_reg_PG.txt" ++ #define RTL819X_PHY_MACREG "rtl8192CE\\MAC_REG.txt" ++ #define RTL819X_PHY_REG "rtl8192CE\\PHY_REG.txt" ++ #define RTL819X_PHY_REG_1T2R "rtl8192CE\\PHY_REG_1T2R.txt" ++ #define RTL819X_PHY_REG_to1T1R "rtl8192CE\\phy_to1T1R_a.txt" ++ #define RTL819X_PHY_REG_to1T2R "rtl8192CE\\phy_to1T2R.txt" ++ #define RTL819X_PHY_REG_to2T2R "rtl8192CE\\phy_to2T2R.txt" ++ #define RTL819X_PHY_REG_PG "rtl8192CE\\PHY_REG_PG.txt" ++ #define RTL819X_AGC_TAB "rtl8192CE\\AGC_TAB.txt" ++ #define RTL819X_PHY_RADIO_A "rtl8192CE\\radio_a.txt" ++ #define RTL819X_PHY_RADIO_A_1T "rtl8192CE\\radio_a_1t.txt" ++ #define RTL819X_PHY_RADIO_A_2T "rtl8192CE\\radio_a_2t.txt" ++ #define RTL819X_PHY_RADIO_B "rtl8192CE\\radio_b.txt" ++ #define RTL819X_PHY_RADIO_B_GM "rtl8192CE\\radio_b_gm.txt" ++ #define RTL819X_PHY_RADIO_C "rtl8192CE\\radio_c.txt" ++ #define RTL819X_PHY_RADIO_D "rtl8192CE\\radio_d.txt" ++ #define RTL819X_EEPROM_MAP "rtl8192CE\\8192ce.map" ++ #define RTL819X_EFUSE_MAP "rtl8192CE\\8192ce.map" ++ ++//--------------------------------------------------------------------- ++// RTL8723E From file ++//--------------------------------------------------------------------- ++ #define RTL8723_FW_UMC_IMG "rtl8723E\\rtl8723fw.bin" ++ #define RTL8723_PHY_REG "rtl8723E\\PHY_REG_1T.txt" ++ #define RTL8723_PHY_RADIO_A "rtl8723E\\radio_a_1T.txt" ++ #define RTL8723_PHY_RADIO_B "rtl8723E\\radio_b_1T.txt" ++ #define RTL8723_AGC_TAB "rtl8723E\\AGC_TAB_1T.txt" ++ #define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt" ++ #define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt" ++ #define RTL8723_PHY_REG_PG "rtl8723E\\PHY_REG_PG.txt" ++ #define RTL8723_PHY_REG_MP "rtl8723E\\PHY_REG_MP.txt" ++ ++ // The file name "_2T" is for 92CE, "_1T" is for 88CE. Modified by tynli. 2009.11.24. ++ #define Rtl819XFwTSMCImageArray Rtl8192CEFwTSMCImgArray ++ #define Rtl819XFwUMCACutImageArray Rtl8192CEFwUMCACutImgArray ++ #define Rtl819XFwUMCBCutImageArray Rtl8192CEFwUMCBCutImgArray ++ ++ #define Rtl8723FwUMCImageArray Rtl8192CEFwUMC8723ImgArray ++ #define Rtl819XMAC_Array Rtl8192CEMAC_2T_Array ++ #define Rtl819XAGCTAB_2TArray Rtl8192CEAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192CEAGCTAB_1TArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192CEPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192CEPHY_REG_1TArray ++ #define Rtl819XRadioA_2TArray Rtl8192CERadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192CERadioA_1TArray ++ #define Rtl819XRadioB_2TArray Rtl8192CERadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192CERadioB_1TArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192CEPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_MP Rtl8192CEPHY_REG_Array_MP ++ ++#elif defined(CONFIG_USB_HCI) ++ ++ #include "Hal8192CUHWImg.h" ++#ifdef CONFIG_WOWLAN ++ #include "Hal8192CUHWImg_wowlan.h" ++#endif //CONFIG_WOWLAN ++ //2TODO: We should define 8192S firmware related macro settings here!! ++ #define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ #define RTL819X_TOTAL_RF_PATH 2 ++ ++ //TODO: The following need to check!! ++ #define RTL8192C_FW_TSMC_IMG "rtl8192CU\\rtl8192cfwT.bin" ++ #define RTL8192C_FW_UMC_IMG "rtl8192CU\\rtl8192cfwU.bin" ++ #define RTL8192C_FW_UMC_B_IMG "rtl8192CU\\rtl8192cfwU_B.bin" ++#ifdef CONFIG_WOWLAN ++ #define RTL8192C_FW_TSMC_WW_IMG "rtl8192CU\\rtl8192cfwTww.bin" ++ #define RTL8192C_FW_UMC_WW_IMG "rtl8192CU\\rtl8192cfwUww.bin" ++ #define RTL8192C_FW_UMC_B_WW_IMG "rtl8192CU\\rtl8192cfwU_Bww.bin" ++#endif // CONFIG_WOWLAN ++ //#define RTL819X_FW_BOOT_IMG "rtl8192CU\\boot.img" ++ //#define RTL819X_FW_MAIN_IMG "rtl8192CU\\main.img" ++ //#define RTL819X_FW_DATA_IMG "rtl8192CU\\data.img" ++ ++ #define RTL8188C_PHY_REG "rtl8188CU\\PHY_REG.txt" ++ #define RTL8188C_PHY_RADIO_A "rtl8188CU\\radio_a.txt" ++ #define RTL8188C_PHY_RADIO_B "rtl8188CU\\radio_b.txt" ++ #define RTL8188C_PHY_RADIO_A_mCard "rtl8192CU\\radio_a_1T_mCard.txt" ++ #define RTL8188C_PHY_RADIO_B_mCard "rtl8192CU\\radio_b_1T_mCard.txt" ++ #define RTL8188C_PHY_RADIO_A_HP "rtl8192CU\\radio_a_1T_HP.txt" ++ #define RTL8188C_AGC_TAB "rtl8188CU\\AGC_TAB.txt" ++ #define RTL8188C_PHY_MACREG "rtl8188CU\\MACREG.txt" ++ ++ #define RTL8192C_PHY_REG "rtl8192CU\\PHY_REG.txt" ++ #define RTL8192C_PHY_RADIO_A "rtl8192CU\\radio_a.txt" ++ #define RTL8192C_PHY_RADIO_B "rtl8192CU\\radio_b.txt" ++ #define RTL8192C_AGC_TAB "rtl8192CU\\AGC_TAB.txt" ++ #define RTL8192C_PHY_MACREG "rtl8192CU\\MACREG.txt" ++ ++ #define RTL819X_PHY_REG_PG "rtl8192CU\\PHY_REG_PG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8723U From file ++//--------------------------------------------------------------------- ++ #define RTL8723_FW_UMC_IMG "rtl8723U\\rtl8723fw.bin" ++ #define RTL8723_PHY_REG "rtl8723U\\PHY_REG_1T.txt" ++ #define RTL8723_PHY_RADIO_A "rtl8723U\\radio_a_1T.txt" ++ #define RTL8723_PHY_RADIO_B "rtl8723U\\radio_b_1T.txt" ++ #define RTL8723_AGC_TAB "rtl8723U\\AGC_TAB_1T.txt" ++ #define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt" ++ #define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt" ++ #define RTL8723_PHY_REG_PG "rtl8723U\\PHY_REG_PG.txt" ++ #define RTL8723_PHY_REG_MP "rtl8723U\\PHY_REG_MP.txt" ++ ++ // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. ++ #define Rtl819XFwImageArray Rtl8192CUFwTSMCImgArray ++ #define Rtl819XFwTSMCImageArray Rtl8192CUFwTSMCImgArray ++ #define Rtl819XFwUMCACutImageArray Rtl8192CUFwUMCACutImgArray ++ #define Rtl819XFwUMCBCutImageArray Rtl8192CUFwUMCBCutImgArray ++#ifdef CONFIG_WOWLAN ++ #define Rtl8192C_FwTSMCWWImageArray Rtl8192CUFwTSMCWWImgArray ++ #define Rtl8192C_FwUMCWWImageArray Rtl8192CUFwUMCACutWWImgArray ++ #define Rtl8192C_FwUMCBCutWWImageArray Rtl8192CUFwUMCBCutWWImgArray ++#endif //CONFIG_WOWLAN ++ #define Rtl819XMAC_Array Rtl8192CUMAC_2T_Array ++ #define Rtl819XAGCTAB_2TArray Rtl8192CUAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192CUAGCTAB_1TArray ++ #define Rtl819XAGCTAB_1T_HPArray Rtl8192CUAGCTAB_1T_HPArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192CUPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192CUPHY_REG_1TArray ++ #define Rtl819XPHY_REG_1T_mCardArray Rtl8192CUPHY_REG_1T_mCardArray ++ #define Rtl819XPHY_REG_2T_mCardArray Rtl8192CUPHY_REG_2T_mCardArray ++ #define Rtl819XPHY_REG_1T_HPArray Rtl8192CUPHY_REG_1T_HPArray ++ #define Rtl819XRadioA_2TArray Rtl8192CURadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192CURadioA_1TArray ++ #define Rtl819XRadioA_1T_mCardArray Rtl8192CURadioA_1T_mCardArray ++ #define Rtl819XRadioB_2TArray Rtl8192CURadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192CURadioB_1TArray ++ #define Rtl819XRadioB_1T_mCardArray Rtl8192CURadioB_1T_mCardArray ++ #define Rtl819XRadioA_1T_HPArray Rtl8192CURadioA_1T_HPArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192CUPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_PG_mCard Rtl8192CUPHY_REG_Array_PG_mCard ++ #define Rtl819XPHY_REG_Array_PG_HP Rtl8192CUPHY_REG_Array_PG_HP ++ #define Rtl819XPHY_REG_Array_MP Rtl8192CUPHY_REG_Array_MP ++#endif ++ ++#define DRVINFO_SZ 4 // unit is 8bytes ++#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) ++ ++#define FW_8192C_SIZE 16384+32//16k ++#define FW_8192C_START_ADDRESS 0x1000 ++//#define FW_8192C_END_ADDRESS 0x3FFF //Filen said this is for test chip ++#define FW_8192C_END_ADDRESS 0x1FFF ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300) ++ ++typedef enum _FIRMWARE_SOURCE{ ++ FW_SOURCE_IMG_FILE = 0, ++ FW_SOURCE_HEADER_FILE = 1, //from header file ++}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; ++ ++typedef struct _RT_FIRMWARE{ ++ FIRMWARE_SOURCE eFWSource; ++ u8* szFwBuffer; ++ u32 ulFwLength; ++#ifdef CONFIG_WOWLAN ++ u8* szWoWLANFwBuffer; ++ u32 ulWoWLANFwLength; ++#endif //CONFIG_WOWLAN ++}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92C, *PRT_FIRMWARE_92C; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u16 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++ ++}RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME 0x05 ++#define BCN_DMA_ATIME_INT_TIME 0x02 ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ ++typedef enum _USB_RX_AGG_MODE{ ++ USB_RX_AGG_DISABLE, ++ USB_RX_AGG_DMA, ++ USB_RX_AGG_USB, ++ USB_RX_AGG_MIX ++}USB_RX_AGG_MODE; ++ ++#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer ++ ++#endif ++ ++ ++#define TX_SELE_HQ BIT(0) // High Queue ++#define TX_SELE_LQ BIT(1) // Low Queue ++#define TX_SELE_NQ BIT(2) // Normal Queue ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++#define TX_TOTAL_PAGE_NUMBER 0xF8 ++#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_PUBQ 0xE7 ++#define NORMAL_PAGE_NUM_HPQ 0x0C ++#define NORMAL_PAGE_NUM_LPQ 0x02 ++#define NORMAL_PAGE_NUM_NPQ 0x02 ++ ++ ++// For Test Chip Setting ++// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define TEST_PAGE_NUM_PUBQ 0x7E ++ ++ ++// For Test Chip Setting ++#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 ++#define WMM_TEST_PAGE_NUM_HPQ 0x29 ++#define WMM_TEST_PAGE_NUM_LPQ 0x29 ++ ++ ++//Note: For Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ 0x65 ++#define WMM_NORMAL_PAGE_NUM_HPQ 0x30 ++#define WMM_NORMAL_PAGE_NUM_LPQ 0x30 ++#define WMM_NORMAL_PAGE_NUM_NPQ 0x30 ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++// ++// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. ++// ++/* ++ | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | ++ |-------------+-----------+-----------+-------+-----------+-------| ++ | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | ++ | | | TSMC/UMC | | TEST/NORMAL| | ++*/ ++// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 ++// [7] Manufacturer: TSMC=0, UMC=1 ++// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 ++// [3] Chip type: TEST=0, NORMAL=1 ++// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 ++ ++#define CHIP_8723 BIT(0) ++#define CHIP_92D BIT(1) ++#define NORMAL_CHIP BIT(3) ++#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) ++#define RF_TYPE_1T2R BIT(4) ++#define RF_TYPE_2T2R BIT(5) ++#define CHIP_VENDOR_UMC BIT(7) ++#define B_CUT_VERSION BIT(12) ++#define C_CUT_VERSION BIT(13) ++#define D_CUT_VERSION ((BIT(13)|BIT(14))) ++ ++ ++// MASK ++#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) ++#define CHIP_TYPE_MASK BIT(3) ++#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) ++#define MANUFACTUER_MASK BIT(7) ++#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) ++#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) ++ ++// Get element ++#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) ++#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) ++#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) ++#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) ++#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) ++#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) ++ ++#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) ++#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) ++#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) ++#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) ++#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) ++#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) ++#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) ++#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) ++ ++#define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE) ++#define IS_92D_TEST_CHIP(version) ((IS_92D(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE) ++#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) ++#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. ++#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) ++#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) ++#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x2) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x3) ? _TRUE : _FALSE) : _FALSE) ++ ++typedef enum _VERSION_8192C{ ++ VERSION_TEST_CHIP_88C = 0x0000, ++ VERSION_TEST_CHIP_92C = 0x0020, ++ VERSION_TEST_UMC_CHIP_8723 = 0x0081, ++ VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, ++ VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, ++ VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, ++ VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, ++ VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, ++ VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, ++ VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, ++ VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, ++ VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, ++ VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, ++ VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, ++}VERSION_8192C,*PVERSION_8192C; ++ ++ ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++enum ChannelPlan{ ++ CHPL_FCC = 0, ++ CHPL_IC = 1, ++ CHPL_ETSI = 2, ++ CHPL_SPAIN = 3, ++ CHPL_FRANCE = 4, ++ CHPL_MKK = 5, ++ CHPL_MKK1 = 6, ++ CHPL_ISRAEL = 7, ++ CHPL_TELEC = 8, ++ CHPL_GLOBAL = 9, ++ CHPL_WORLD = 10, ++}; ++ ++typedef struct _TxPowerInfo{ ++ u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 TSSI_A; ++ u8 TSSI_B; ++}TxPowerInfo, *PTxPowerInfo; ++ ++#define EFUSE_REAL_CONTENT_LEN 512 ++#define EFUSE_MAP_LEN 128 ++#define EFUSE_MAX_SECTION 16 ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) ++// ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++ ++#define EFUSE_MAP_LEN_8723 256 ++#define EFUSE_MAX_SECTION_8723 32 ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++// ++// For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. ++// ++typedef enum _RT_MULTI_FUNC{ ++ RT_MULTI_FUNC_NONE = 0x00, ++ RT_MULTI_FUNC_WIFI = 0x01, ++ RT_MULTI_FUNC_BT = 0x02, ++ RT_MULTI_FUNC_GPS = 0x04, ++}RT_MULTI_FUNC,*PRT_MULTI_FUNC; ++ ++// ++// For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. ++// ++typedef enum _RT_POLARITY_CTL{ ++ RT_POLARITY_LOW_ACT = 0, ++ RT_POLARITY_HIGH_ACT = 1, ++}RT_POLARITY_CTL,*PRT_POLARITY_CTL; ++ ++// For RTL8723 regulator mode. by tynli. 2011.01.14. ++typedef enum _RT_REGULATOR_MODE{ ++ RT_SWITCHING_REGULATOR = 0, ++ RT_LDO_REGULATOR = 1, ++}RT_REGULATOR_MODE,*PRT_REGULATOR_MODE; ++ ++enum c2h_id_8192c { ++ C2H_DBG = 0, ++ C2H_TSF = 1, ++ C2H_AP_RPT_RSP = 2, ++ C2H_CCX_TX_RPT = 3, ++ C2H_BT_RSSI = 4, ++ C2H_BT_OP_MODE = 5, ++ C2H_EXT_RA_RPT = 6, ++ C2H_HW_INFO_EXCH = 10, ++ C2H_C2H_H2C_TEST = 11, ++ C2H_BT_INFO = 12, ++ C2H_BT_MP_INFO = 15, ++ MAX_C2HEVENT ++}; ++ ++#ifdef CONFIG_PCI_HCI ++struct hal_data_8192ce ++{ ++ VERSION_8192C VersionID; ++ RT_MULTI_FUNC MultiFunc; // For multi-function consideration. ++ RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. ++ RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ u32 IntrMask[2]; ++ u32 IntrMaskToSet[2]; ++ ++ u32 DisabledFunctions; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ u32 TransmitConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ _lock rf_lock; ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ INTERFACE_SELECT_8192CPCIe InterfaceSel; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMDID; ++ u16 EEPROMSVID; ++ u16 EEPROMSMID; ++ u16 EEPROMChannelPlan; ++ u16 EEPROMVersion; ++ ++ u8 EEPROMChnlAreaTxPwrCCK[2][3]; ++ u8 EEPROMChnlAreaTxPwrHT40_1S[2][3]; ++ u8 EEPROMChnlAreaTxPwrHT40_2SDiff[2][3]; ++ u8 EEPROMPwrLimitHT20[3]; ++ u8 EEPROMPwrLimitHT40[3]; ++ ++ u8 bTXPowerDataReadFromEEPORM; ++ u8 EEPROMThermalMeter; ++ u8 EEPROMTSSI[2]; ++ ++ u8 EEPROMCustomerID; ++ u8 EEPROMBoardType; ++ u8 EEPROMRegulatory; ++ ++ u8 bDefaultAntenna; ++ u8 bIQKInitialized; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[7][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ u8 RegTxPause; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 CurAntenna; ++ u8 AntDivCfg; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //SW Antenna Switch ++ s32 RSSI_sum_A; ++ s32 RSSI_sum_B; ++ s32 RSSI_cnt_A; ++ s32 RSSI_cnt_B; ++ BOOLEAN RSSI_test; ++#endif ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ u32 CCK_Ant1_Cnt; ++ u32 CCK_Ant2_Cnt; ++ u32 OFDM_Ant1_Cnt; ++ u32 OFDM_Ant2_Cnt; ++#endif ++ ++ struct dm_priv dmpriv; ++ u8 bDumpRxPkt;//for debug ++#ifdef DBG_CONFIG_ERROR_DETECT ++ struct sreset_priv srestpriv; ++#endif ++ u8 bInterruptMigration; ++ u8 bDisableTxInt; ++ u8 bGpioHwWpsPbc; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ u16 EfuseUsedBytes; ++ ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192ce HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++ ++// ++// Function disabled. ++// ++#define DF_TX_BIT BIT0 ++#define DF_RX_BIT BIT1 ++#define DF_IO_BIT BIT2 ++#define DF_IO_D3_BIT BIT3 ++ ++#define RT_DF_TYPE u32 ++#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) ++#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) ++#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++struct hal_data_8192cu ++{ ++ VERSION_8192C VersionID; ++ RT_MULTI_FUNC MultiFunc; // For multi-function consideration. ++ RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. ++ RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ u8 BoardType; ++ //INTERFACE_SELECT_8192CUSB InterfaceSel; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMPID; ++ u16 EEPROMSVID; ++ u16 EEPROMSDID; ++ u8 EEPROMCustomerID; ++ u8 EEPROMSubCustomerID; ++ u8 EEPROMVersion; ++ u8 EEPROMRegulatory; ++ ++ u8 bTXPowerDataReadFromEEPORM; ++ u8 EEPROMThermalMeter; ++ ++ u8 bIQKInitialized; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[7][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ ++ u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ u8 RegTxPause; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ ++ struct dm_priv dmpriv; ++#ifdef DBG_CONFIG_ERROR_DETECT ++ struct sreset_priv srestpriv; ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ u8 CurAntenna; ++ u8 AntDivCfg; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //SW Antenna Switch ++ s32 RSSI_sum_A; ++ s32 RSSI_sum_B; ++ s32 RSSI_cnt_A; ++ s32 RSSI_cnt_B; ++ BOOLEAN RSSI_test; ++#endif ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ u32 CCK_Ant1_Cnt; ++ u32 CCK_Ant2_Cnt; ++ u32 OFDM_Ant1_Cnt; ++ u32 OFDM_Ant2_Cnt; ++#endif ++ ++ u8 bDumpRxPkt;//for debug ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ // 2010/08/09 MH Add CU power down mode. ++ BOOLEAN pwrdown; ++ ++ // For 92C USB endpoint setting ++ // ++ ++ u32 UsbBulkOutSize; ++ ++ int RtBulkOutPipe[3]; ++ int RtBulkInPipe; ++ int RtIntInPipe; ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u8 OutEpQueueSel; ++ u8 OutEpNumber; ++ ++ u8 Queue2EPNum[8];//for out endpoint number mapping ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 UsbTxAggMode; ++ u8 UsbTxAggDescNum; ++#endif ++#ifdef CONFIG_USB_RX_AGGREGATION ++ u16 HwRxPageSize; // Hardware setting ++ u32 MaxUsbRxAggBlock; ++ ++ USB_RX_AGG_MODE UsbRxAggMode; ++ u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed ++ u8 UsbRxAggBlockTimeout; ++ u8 UsbRxAggPageCount; // 8192C DMA page count ++ u8 UsbRxAggPageTimeout; ++#endif ++ ++ // 2010/12/10 MH Add for USB aggreation mode dynamic shceme. ++ BOOLEAN UsbRxHighSpeedMode; ++ ++ // 2010/11/22 MH Add for slim combo debug mode selective. ++ // This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. ++ BOOLEAN SlimComboDbg; ++ ++ u16 EfuseUsedBytes; ++ ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192cu HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++#endif ++ ++#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) ++#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter); ++int FirmwareDownload92C(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); ++VOID InitializeFirmwareVars92C(PADAPTER Adapter); ++u8 GetEEPROMSize8192C(PADAPTER Adapter); ++void rtl8192c_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++VERSION_8192C rtl8192c_ReadChipVersion(IN PADAPTER Adapter); ++void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++//void rtl8192c_free_hal_data(_adapter * padapter); ++VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo); ++void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc); ++ ++s32 c2h_id_filter_ccx_8192c(u8 id); ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++extern void Hal_SetAntenna(PADAPTER pAdapter); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetTxPower(PADAPTER pAdapter); ++extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); ++extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); ++ ++extern void Hal_SetDataRate(PADAPTER pAdapter); ++extern void Hal_SetChannel(PADAPTER pAdapter); ++extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); ++extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); ++extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); ++extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); ++extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++ ++#endif ++ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_led.h +@@ -0,0 +1,42 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192C_LED_H_ ++#define __RTL8192C_LED_H_ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192cu_InitSwLeds(_adapter *padapter); ++void rtl8192cu_DeInitSwLeds(_adapter *padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter); ++void rtl8192ce_InitSwLeds(_adapter *padapter); ++void rtl8192ce_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_recv.h +@@ -0,0 +1,184 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192C_RECV_H_ ++#define _RTL8192C_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++ #define NR_RECVBUFF (16) ++#elif defined(PLATFORM_OS_CE) ++ #define NR_RECVBUFF (4) ++#else ++#ifdef CONFIG_SINGLE_RECV_BUF ++ #define NR_RECVBUFF (1) ++#else ++ #define NR_RECVBUFF (4) ++#endif //CONFIG_SINGLE_RECV_BUF ++ ++ #define NR_PREALLOC_RECV_SKB (8) ++#endif ++ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++#define RX_MPDU_QUEUE 0 ++#define RX_CMD_QUEUE 1 ++#define RX_MAX_QUEUE 2 ++#endif ++ ++ ++#define RECV_BULK_IN_ADDR 0x80 ++#define RECV_INT_IN_ADDR 0x81 ++ ++#define PHY_RSSI_SLID_WIN_MAX 100 ++#define PHY_LINKQUALITY_SLID_WIN_MAX 20 ++ ++ ++struct phy_stat ++{ ++ unsigned int phydw0; ++ ++ unsigned int phydw1; ++ ++ unsigned int phydw2; ++ ++ unsigned int phydw3; ++ ++ unsigned int phydw4; ++ ++ unsigned int phydw5; ++ ++ unsigned int phydw6; ++ ++ unsigned int phydw7; ++}; ++ ++typedef struct _Phy_OFDM_Rx_Status_Report_8192cd ++{ ++ unsigned char trsw_gain_X[4]; ++ unsigned char pwdb_all; ++ unsigned char cfosho_X[4]; ++ unsigned char cfotail_X[4]; ++ unsigned char rxevm_X[2]; ++ unsigned char rxsnr_X[4]; ++ unsigned char pdsnr_X[2]; ++ unsigned char csi_current_X[2]; ++ unsigned char csi_target_X[2]; ++ unsigned char sigevm; ++ unsigned char max_ex_pwr; ++//#ifdef RTL8192SE ++#ifdef CONFIG_LITTLE_ENDIAN ++ unsigned char ex_intf_flg:1; ++ unsigned char sgi_en:1; ++ unsigned char rxsc:2; ++ //unsigned char rsvd:4; ++ unsigned char idle_long:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char ANTSELB:1; ++ unsigned char ANTSEL:1; ++#else // _BIG_ENDIAN_ ++ //unsigned char rsvd:4; ++ unsigned char ANTSEL:1; ++ unsigned char ANTSELB:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char idle_long:1; ++ unsigned char rxsc:2; ++ unsigned char sgi_en:1; ++ unsigned char ex_intf_flg:1; ++#endif ++//#else // RTL8190, RTL8192E ++// unsigned char sgi_en; ++// unsigned char rxsc_sgien_exflg; ++//#endif ++} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; ++ ++typedef struct _Phy_CCK_Rx_Status_Report_8192cd ++{ ++ /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend ++ 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ ++ u8 adc_pwdb_X[4]; ++ u8 SQ_rpt; ++ u8 cck_agc_rpt; ++} PHY_STS_CCK_8192CD_T; ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _INTERRUPT_MSG_FORMAT_EX{ ++ unsigned int C2H_MSG0; ++ unsigned int C2H_MSG1; ++ unsigned int C2H_MSG2; ++ unsigned int C2H_MSG3; ++ unsigned int HISR; // from HISR Reg0x124, read to clear ++ unsigned int HISRE;// from HISRE Reg0x12c, read to clear ++ unsigned int MSG_EX; ++}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; ++ ++void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++int rtl8192cu_init_recv_priv(_adapter * padapter); ++void rtl8192cu_free_recv_priv(_adapter * padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++int rtl8192ce_init_recv_priv(_adapter * padapter); ++void rtl8192ce_free_recv_priv(_adapter * padapter); ++#endif ++ ++void rtl8192c_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info); ++void rtl8192c_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_rf.h +@@ -0,0 +1,92 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192c_rf.h ( Header File) ++ * ++ * Note: Collect every HAL RF type exter API or constant. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * ++ * ++******************************************************************************/ ++#ifndef _RTL8192C_RF_H_ ++#define _RTL8192C_RF_H_ ++/* Check to see if the file has been included already. */ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++// ++// For RF 6052 Series ++// ++#define RF6052_MAX_TX_PWR 0x3F ++#define RF6052_MAX_REG 0x3F ++#define RF6052_MAX_PATH 2 ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// RF RL6052 Series API ++// ++void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate); ++void rtl8192c_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth); ++VOID rtl8192c_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel); ++VOID rtl8192c_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel); ++int PHY_RF6052_Config8192C( IN PADAPTER Adapter ); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++ ++#endif/* End of HalRf.h */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_spec.h +@@ -0,0 +1,1865 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192C_SPEC_H__ ++#define __RTL8192C_SPEC_H__ ++ ++#include ++ ++#ifndef BIT ++#define BIT(x) (1 << (x)) ++#endif ++ ++#define BIT0 0x00000001 ++#define BIT1 0x00000002 ++#define BIT2 0x00000004 ++#define BIT3 0x00000008 ++#define BIT4 0x00000010 ++#define BIT5 0x00000020 ++#define BIT6 0x00000040 ++#define BIT7 0x00000080 ++#define BIT8 0x00000100 ++#define BIT9 0x00000200 ++#define BIT10 0x00000400 ++#define BIT11 0x00000800 ++#define BIT12 0x00001000 ++#define BIT13 0x00002000 ++#define BIT14 0x00004000 ++#define BIT15 0x00008000 ++#define BIT16 0x00010000 ++#define BIT17 0x00020000 ++#define BIT18 0x00040000 ++#define BIT19 0x00080000 ++#define BIT20 0x00100000 ++#define BIT21 0x00200000 ++#define BIT22 0x00400000 ++#define BIT23 0x00800000 ++#define BIT24 0x01000000 ++#define BIT25 0x02000000 ++#define BIT26 0x04000000 ++#define BIT27 0x08000000 ++#define BIT28 0x10000000 ++#define BIT29 0x20000000 ++#define BIT30 0x40000000 ++#define BIT31 0x80000000 ++ ++ ++//============================================================ ++// 8192C Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL 0x0000 ++#define REG_SYS_FUNC_EN 0x0002 ++#define REG_APS_FSMCO 0x0004 ++#define REG_SYS_CLKR 0x0008 ++#define REG_9346CR 0x000A ++#define REG_EE_VPD 0x000C ++#define REG_AFE_MISC 0x0010 ++#define REG_SPS0_CTRL 0x0011 ++#define REG_SPS_OCP_CFG 0x0018 ++#define REG_RSV_CTRL 0x001C ++#define REG_RF_CTRL 0x001F ++#define REG_LDOA15_CTRL 0x0020 ++#define REG_LDOV12D_CTRL 0x0021 ++#define REG_LDOHCI12_CTRL 0x0022 ++#define REG_LPLDO_CTRL 0x0023 ++#define REG_AFE_XTAL_CTRL 0x0024 ++#define REG_AFE_PLL_CTRL 0x0028 ++#define REG_EFUSE_CTRL 0x0030 ++#define REG_EFUSE_TEST 0x0034 ++#define REG_PWR_DATA 0x0038 ++#define REG_CAL_TIMER 0x003C ++#define REG_ACLK_MON 0x003E ++#define REG_GPIO_MUXCFG 0x0040 ++#define REG_GPIO_IO_SEL 0x0042 ++#define REG_MAC_PINMUX_CFG 0x0043 ++#define REG_GPIO_PIN_CTRL 0x0044 ++#define REG_GPIO_INTM 0x0048 ++#define REG_LEDCFG0 0x004C ++#define REG_LEDCFG1 0x004D ++#define REG_LEDCFG2 0x004E ++#define REG_LEDCFG3 0x004F ++#define REG_LEDCFG REG_LEDCFG2 ++#define REG_FSIMR 0x0050 ++#define REG_FSISR 0x0054 ++#define REG_HSIMR 0x0058 ++#define REG_HSISR 0x005c ++#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. ++#define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. ++#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source. ++#define REG_MCUFWDL 0x0080 ++#ifdef CONFIG_WOWLAN ++#define REG_WOWLAN_REASON 0x0081 ++#endif //CONFIG_WOWLAN ++#define REG_HMEBOX_EXT_0 0x0088 ++#define REG_HMEBOX_EXT_1 0x008A ++#define REG_HMEBOX_EXT_2 0x008C ++#define REG_HMEBOX_EXT_3 0x008E ++#define REG_HOST_SUSP_CNT 0x00BC // Host suspend counter on FPGA platform ++#define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723 ++#define REG_BIST_SCAN 0x00D0 ++#define REG_BIST_RPT 0x00D4 ++#define REG_BIST_ROM_RPT 0x00D8 ++#define REG_USB_SIE_INTF 0x00E0 ++#define REG_PCIE_MIO_INTF 0x00E4 ++#define REG_PCIE_MIO_INTD 0x00E8 ++#define REG_HPON_FSM 0x00EC ++#define REG_SYS_CFG 0x00F0 ++#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only. ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR 0x0100 ++#define REG_PBP 0x0104 ++#define REG_TRXDMA_CTRL 0x010C ++#define REG_TRXFF_BNDY 0x0114 ++#define REG_TRXFF_STATUS 0x0118 ++#define REG_RXFF_PTR 0x011C ++#define REG_HIMR 0x0120 ++#define REG_HISR 0x0124 ++#define REG_HIMRE 0x0128 ++#define REG_HISRE 0x012C ++#define REG_CPWM 0x012F ++#define REG_FWIMR 0x0130 ++#define REG_FWISR 0x0134 ++#define REG_PKTBUF_DBG_CTRL 0x0140 ++#define REG_PKTBUF_DBG_DATA_L 0x0144 ++#define REG_PKTBUF_DBG_DATA_H 0x0148 ++ ++#define REG_TC0_CTRL 0x0150 ++#define REG_TC1_CTRL 0x0154 ++#define REG_TC2_CTRL 0x0158 ++#define REG_TC3_CTRL 0x015C ++#define REG_TC4_CTRL 0x0160 ++#define REG_TCUNIT_BASE 0x0164 ++#define REG_MBIST_START 0x0174 ++#define REG_MBIST_DONE 0x0178 ++#define REG_MBIST_FAIL 0x017C ++#define REG_C2HEVT_MSG_NORMAL 0x01A0 ++#define REG_C2HEVT_CLEAR 0x01AF ++#define REG_C2HEVT_MSG_TEST 0x01B8 ++#define REG_MCUTST_1 0x01c0 ++#define REG_FMETHR 0x01C8 ++#define REG_HMETFR 0x01CC ++#define REG_HMEBOX_0 0x01D0 ++#define REG_HMEBOX_1 0x01D4 ++#define REG_HMEBOX_2 0x01D8 ++#define REG_HMEBOX_3 0x01DC ++ ++#define REG_LLT_INIT 0x01E0 ++#define REG_BB_ACCEESS_CTRL 0x01E8 ++#define REG_BB_ACCESS_DATA 0x01EC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN 0x0200 ++#define REG_FIFOPAGE 0x0204 ++#define REG_TDECTRL 0x0208 ++#define REG_TXDMA_OFFSET_CHK 0x020C ++#define REG_TXDMA_STATUS 0x0210 ++#define REG_RQPN_NPQ 0x0214 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH 0x0280 ++#define REG_RXPKT_NUM 0x0284 ++#define REG_RXDMA_STATUS 0x0288 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG 0x0300 ++#define REG_INT_MIG 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address ++#define REG_DBI 0x0348 // Backdoor REG for Access Configuration ++#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_DBG_SEL 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM ++#define REG_UART_CTRL 0x0364 // UART Control ++#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address ++#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address ++ ++ ++// spec version 11 ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION 0x0400 ++#define REG_VIQ_INFORMATION 0x0404 ++#define REG_BEQ_INFORMATION 0x0408 ++#define REG_BKQ_INFORMATION 0x040C ++#define REG_MGQ_INFORMATION 0x0410 ++#define REG_HGQ_INFORMATION 0x0414 ++#define REG_BCNQ_INFORMATION 0x0418 ++ ++ ++#define REG_CPU_MGQ_INFORMATION 0x041C ++#define REG_FWHW_TXQ_CTRL 0x0420 ++#define REG_HWSEQ_CTRL 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY 0x0425 ++#define REG_LIFETIME_EN 0x0426 ++#define REG_MULTI_BCNQ_OFFSET 0x0427 ++#define REG_SPEC_SIFS 0x0428 ++#define REG_RL 0x042A ++#define REG_DARFRC 0x0430 ++#define REG_RARFRC 0x0438 ++#define REG_RRSR 0x0440 ++#define REG_ARFR0 0x0444 ++#define REG_ARFR1 0x0448 ++#define REG_ARFR2 0x044C ++#define REG_ARFR3 0x0450 ++#define REG_AGGLEN_LMT 0x0458 ++#define REG_AMPDU_MIN_SPACE 0x045C ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D ++#define REG_FAST_EDCA_CTRL 0x0460 ++#define REG_RD_RESP_PKT_TH 0x0463 ++#define REG_INIRTS_RATE_SEL 0x0480 ++#define REG_INIDATA_RATE_SEL 0x0484 ++ ++//#define REG_FW_TSF_SYNC_CNT 0x04A0 ++#define REG_FW_RESET_TSF_CNT_1 0x05FC ++#define REG_FW_RESET_TSF_CNT_0 0x05FD ++#define REG_FW_BCN_DIS_CNT 0x05FE ++ ++#define REG_POWER_STATUS 0x04A4 ++#define REG_POWER_STAGE1 0x04B4 ++#define REG_POWER_STAGE2 0x04B8 ++#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 ++#define REG_STBC_SETTING 0x04C4 ++#define REG_PROT_MODE_CTRL 0x04C8 ++#define REG_MAX_AGGR_NUM 0x04CA ++#define REG_RTS_MAX_AGGR_NUM 0x04CB ++#define REG_BAR_MODE_CTRL 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT 0x04CF ++#define REG_NQOS_SEQ 0x04DC ++#define REG_QOS_SEQ 0x04DE ++#define REG_NEED_CPU_HANDLE 0x04E0 ++#define REG_PKT_LOSE_RPT 0x04E1 ++#define REG_PTCL_ERR_STATUS 0x04E2 ++#define REG_DUMMY 0x04FC ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM 0x0500 ++#define REG_EDCA_VI_PARAM 0x0504 ++#define REG_EDCA_BE_PARAM 0x0508 ++#define REG_EDCA_BK_PARAM 0x050C ++#define REG_BCNTCFG 0x0510 ++#define REG_PIFS 0x0512 ++#define REG_RDG_PIFS 0x0513 ++#define REG_SIFS_CCK 0x0514 ++#define REG_SIFS_OFDM 0x0516 ++#define REG_SIFS_CTX 0x0514 ++#define REG_SIFS_TRX 0x0516 ++#define REG_TSFTR_SYN_OFFSET 0x0518 ++#define REG_AGGR_BREAK_TIME 0x051A ++#define REG_SLOT 0x051B ++#define REG_TX_PTCL_CTRL 0x0520 ++#define REG_TXPAUSE 0x0522 ++#define REG_DIS_TXREQ_CLR 0x0523 ++#define REG_RD_CTRL 0x0524 ++#define REG_TBTT_PROHIBIT 0x0540 ++#define REG_RD_NAV_NXT 0x0544 ++#define REG_NAV_PROT_LEN 0x0546 ++#define REG_BCN_CTRL 0x0550 ++#define REG_BCN_CTRL_1 0x0551 ++#define REG_MBID_NUM 0x0552 ++#define REG_DUAL_TSF_RST 0x0553 ++#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE ++#define REG_MBSSID_BCN_SPACE 0x0554 ++#define REG_DRVERLYINT 0x0558 ++#define REG_BCNDMATIM 0x0559 ++#define REG_ATIMWND 0x055A ++#define REG_BCN_MAX_ERR 0x055D ++#define REG_RXTSF_OFFSET_CCK 0x055E ++#define REG_RXTSF_OFFSET_OFDM 0x055F ++#define REG_TSFTR 0x0560 ++#define REG_TSFTR1 0x0568 ++#define REG_INIT_TSFTR 0x0564 ++#define REG_ATIMWND_1 0x0570 ++#define REG_PSTIMER 0x0580 ++#define REG_TIMER0 0x0584 ++#define REG_TIMER1 0x0588 ++#define REG_ACMHWCTRL 0x05C0 ++#define REG_ACMRSTCTRL 0x05C1 ++#define REG_ACMAVG 0x05C2 ++#define REG_VO_ADMTIME 0x05C4 ++#define REG_VI_ADMTIME 0x05C6 ++#define REG_BE_ADMTIME 0x05C8 ++#define REG_EDCA_RANDOM_GEN 0x05CC ++#define REG_SCH_TXCMD 0x05D0 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_APSD_CTRL 0x0600 ++#define REG_BWOPMODE 0x0603 ++#define REG_TCR 0x0604 ++#define REG_RCR 0x0608 ++#define REG_RX_PKT_LIMIT 0x060C ++#define REG_RX_DLK_TIME 0x060D ++#define REG_RX_DRVINFO_SZ 0x060F ++ ++#define REG_MACID 0x0610 ++#define REG_BSSID 0x0618 ++#define REG_MAR 0x0620 ++#define REG_MBIDCAMCFG 0x0628 ++ ++#define REG_USTIME_EDCA 0x0638 ++#define REG_MAC_SPEC_SIFS 0x063A ++ ++// 20100719 Joseph: Hardware register definition change. (HW datasheet v54) ++#define REG_R2T_SIFS 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK ++#define REG_T2T_SIFS 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK ++#define REG_ACKTO 0x0640 ++#define REG_CTS2TO 0x0641 ++#define REG_EIFS 0x0642 ++ ++//WMA, BA, CCX ++#define REG_NAV_CTRL 0x0650 ++#define REG_BACAMCMD 0x0654 ++#define REG_BACAMCONTENT 0x0658 ++#define REG_LBDLY 0x0660 ++#define REG_FWDLY 0x0661 ++#define REG_RXERR_RPT 0x0664 ++#define REG_WMAC_TRXPTCL_CTL 0x0668 ++ ++ ++// Security ++#define REG_CAMCMD 0x0670 ++#define REG_CAMWRITE 0x0674 ++#define REG_CAMREAD 0x0678 ++#define REG_CAMDBG 0x067C ++#define REG_SECCFG 0x0680 ++ ++// Power ++#define REG_WOW_CTRL 0x0690 ++#define REG_PSSTATUS 0x0691 ++#define REG_PS_RX_INFO 0x0692 ++#define REG_LPNAV_CTRL 0x0694 ++#define REG_WKFMCAM_CMD 0x0698 ++#define REG_WKFMCAM_RWD 0x069C ++#define REG_RXFLTMAP0 0x06A0 ++#define REG_RXFLTMAP1 0x06A2 ++#define REG_RXFLTMAP2 0x06A4 ++#define REG_BCN_PSR_RPT 0x06A8 ++#define REG_CALB32K_CTRL 0x06AC ++#define REG_PKT_MON_CTRL 0x06B4 ++#define REG_BT_COEX_TABLE 0x06C0 ++#define REG_WMAC_RESP_TXINFO 0x06D8 ++ ++#define REG_MACID1 0x0700 ++#define REG_BSSID1 0x0708 ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++// For test chip ++#define REG_TEST_USB_TXQS 0xFE48 ++#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_TEST_SIE_OPTIONAL 0xFE64 ++#define REG_TEST_SIE_CHIRP_K 0xFE65 ++#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B ++#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 ++ ++ ++// For normal chip ++#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_NORMAL_SIE_OPTIONAL 0xFE64 ++#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 ++#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B ++#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C ++#define REG_NORMAL_SIE_GPS_EP 0xFE6D // 0xFE6D, for RTL8723 only. ++#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++ ++#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. ++#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. ++#define SYS_CLK REG_SYS_CLKR ++#define CR9346 REG_9346CR // 93C46/93C56 Command Register. ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. ++#define MSR (REG_CR + 2) // Media Status register ++#define ISR REG_HISR ++#define TSFR REG_TSFTR // Timing Sync Function Timer Register. ++ ++#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 ++#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++#define PBP REG_PBP ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0 MACIDR0 ++#define IDR4 MACIDR4 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI REG_CAMWRITE // Software write CAM input content ++#define RCAMO REG_CAMREAD // Software read/write CAM config ++#define CAMDBG REG_CAMDBG ++#define SECR REG_SECCFG //Security Configuration Register ++ ++// Unused register ++#define UnusedRegister 0x1BF ++#define DCAM UnusedRegister ++#define PSR UnusedRegister ++#define BBAddr UnusedRegister ++#define PhyDataR UnusedRegister ++ ++#define InvalidBBRFValue 0x12345678 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C Cmd9346CR bits (Offset 0xA, 16bit) ++//---------------------------------------------------------------------------- ++#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 ++#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 ++#define Cmd9346CR_9356SEL BIT4 ++#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) ++#define AutoLoadEFUSE CmdEEPROM_En ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++//---------------------------------------------------------------------------- ++// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) ++//---------------------------------------------------------------------------- ++/* ++Network Type ++00: No link ++01: Link in ad hoc network ++10: Link in infrastructure network ++11: AP mode ++Default: 00b. ++*/ ++#define MSR_NOLINK 0x00 ++#define MSR_ADHOC 0x01 ++#define MSR_INFRA 0x02 ++#define MSR_AP 0x03 ++ ++// ++// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) ++// ++//---------------------------------------------------------------------------- ++// 8192C Response Rate Set Register (offset 0x181, 24bits) ++//---------------------------------------------------------------------------- ++#define RRSR_RSC_OFFSET 21 ++#define RRSR_SHORT_OFFSET 23 ++#define RRSR_RSC_BW_40M 0x600000 ++#define RRSR_RSC_UPSUBCHNL 0x400000 ++#define RRSR_RSC_LOWSUBCHNL 0x200000 ++#define RRSR_SHORT 0x800000 ++#define RRSR_1M BIT0 ++#define RRSR_2M BIT1 ++#define RRSR_5_5M BIT2 ++#define RRSR_11M BIT3 ++#define RRSR_6M BIT4 ++#define RRSR_9M BIT5 ++#define RRSR_12M BIT6 ++#define RRSR_18M BIT7 ++#define RRSR_24M BIT8 ++#define RRSR_36M BIT9 ++#define RRSR_48M BIT10 ++#define RRSR_54M BIT11 ++#define RRSR_MCS0 BIT12 ++#define RRSR_MCS1 BIT13 ++#define RRSR_MCS2 BIT14 ++#define RRSR_MCS3 BIT15 ++#define RRSR_MCS4 BIT16 ++#define RRSR_MCS5 BIT17 ++#define RRSR_MCS6 BIT18 ++#define RRSR_MCS7 BIT19 ++#define BRSR_AckShortPmb BIT23 ++// CCK ACK: use Short Preamble or not ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C Rate Definition ++//---------------------------------------------------------------------------- ++//CCK ++#define RATR_1M 0x00000001 ++#define RATR_2M 0x00000002 ++#define RATR_55M 0x00000004 ++#define RATR_11M 0x00000008 ++//OFDM ++#define RATR_6M 0x00000010 ++#define RATR_9M 0x00000020 ++#define RATR_12M 0x00000040 ++#define RATR_18M 0x00000080 ++#define RATR_24M 0x00000100 ++#define RATR_36M 0x00000200 ++#define RATR_48M 0x00000400 ++#define RATR_54M 0x00000800 ++//MCS 1 Spatial Stream ++#define RATR_MCS0 0x00001000 ++#define RATR_MCS1 0x00002000 ++#define RATR_MCS2 0x00004000 ++#define RATR_MCS3 0x00008000 ++#define RATR_MCS4 0x00010000 ++#define RATR_MCS5 0x00020000 ++#define RATR_MCS6 0x00040000 ++#define RATR_MCS7 0x00080000 ++//MCS 2 Spatial Stream ++#define RATR_MCS8 0x00100000 ++#define RATR_MCS9 0x00200000 ++#define RATR_MCS10 0x00400000 ++#define RATR_MCS11 0x00800000 ++#define RATR_MCS12 0x01000000 ++#define RATR_MCS13 0x02000000 ++#define RATR_MCS14 0x04000000 ++#define RATR_MCS15 0x08000000 ++ ++//---------------------------------------------------------------------------- ++// 8192C BW_OPMODE bits (Offset 0x203, 8bit) ++//---------------------------------------------------------------------------- ++#define BW_OPMODE_20MHZ BIT2 ++#define BW_OPMODE_5G BIT1 ++#define BW_OPMODE_11J BIT0 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C CAM Config Setting (offset 0x250, 1 byte) ++//---------------------------------------------------------------------------- ++#define CAM_VALID BIT15 ++#define CAM_NOTVALID 0x0000 ++#define CAM_USEDK BIT5 ++ ++#define CAM_CONTENT_COUNT 8 ++ ++#define CAM_NONE 0x0 ++#define CAM_WEP40 0x01 ++#define CAM_TKIP 0x02 ++#define CAM_AES 0x04 ++#define CAM_WEP104 0x05 ++ ++#define TOTAL_CAM_ENTRY 32 ++#define HALF_CAM_ENTRY 16 ++ ++#define CAM_CONFIG_USEDK _TRUE ++#define CAM_CONFIG_NO_USEDK _FALSE ++ ++#define CAM_WRITE BIT16 ++#define CAM_READ 0x00000000 ++#define CAM_POLLINIG BIT31 ++ ++#define SCR_UseDK 0x01 ++#define SCR_TxSecEnable 0x02 ++#define SCR_RxSecEnable 0x04 ++ ++ ++// ++// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) ++// ++//---------------------------------------------------------------------------- ++// 8190 IMR/ISR bits (offset 0xfd, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR8190_DISABLED 0x0 ++// IMR DW0 Bit 0-31 ++#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 ++#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 ++#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 ++#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 ++#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow ++#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt ++#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 ++#define IMR_RXFOVW BIT12 // Receive FIFO Overflow ++#define IMR_RDU BIT11 // Receive Descriptor Unavailable ++#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt ++#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup ++#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt ++#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup ++#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt ++#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt ++#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt ++#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt ++#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt ++#define IMR_VODOK BIT1 // AC_VO DMA Interrupt ++#define IMR_ROK BIT0 // Receive DMA OK Interrupt ++ ++#define IMR_RX_MASK (IMR_ROK|IMR_RDU|IMR_RXFOVW) ++#define IMR_TX_MASK (IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK) ++ ++// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) ++#define IMR_BcnInt_E BIT12 ++#define IMR_TXERR BIT11 ++#define IMR_RXERR BIT10 ++#define IMR_C2HCMD BIT9 ++#define IMR_CPWM BIT8 ++//RSVD [2-7] ++#define IMR_OCPINT BIT1 ++#define IMR_WLANOFF BIT0 ++ ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C EFUSE ++//---------------------------------------------------------------------------- ++#define HWSET_MAX_SIZE 128 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++// ++// Default Value for EEPROM or EFUSE!!! ++// ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_TxPowerDiff 0x0 ++#define EEPROM_Default_CrystalCap 0x5 ++#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) ++#define EEPROM_Default_TxPower 0x1010 ++#define EEPROM_Default_HT2T_TxPwr 0x10 ++ ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_ThermalMeter 0x12 ++ ++#define EEPROM_Default_AntTxPowerDiff 0x0 ++#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 ++#define EEPROM_Default_TxPowerLevel 0x22 ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++// For debug ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC 0xB ++#define EEPROM_USB_OPTIONAL1 0xE ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define RTL_EEPROM_ID 0x8129 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) ++#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) ++#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) ++ ++// ++// Interface type. ++// ++typedef enum _INTERFACE_SELECT_8192CPCIe{ ++ INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard ++ INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard ++ INTF_SEL2_PCIe = 2, // PCIe Card ++} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe; ++ ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_TESTR 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0x0A // SE Vendor ID.A-B ++#define EEPROM_DID 0x0C // SE Device ID. C-D ++#define EEPROM_SVID 0x0E // SE Vendor ID.E-F ++#define EEPROM_SMID 0x10 // SE PCI Subsystem ID. 10-11 ++ ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++ ++//---------------------------------------------------------------- ++// Ziv - Let PCIe and USB use the same define. Modify address mapping later. ++#define EEPROM_CCK_TX_PWR_INX 0x5A ++#define EEPROM_HT40_1S_TX_PWR_INX 0x60 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 ++#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C ++#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F ++#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 ++ ++#define EEPROM_CHANNEL_PLAN 0x75 ++#define EEPROM_TSSI_A 0x76 ++#define EEPROM_TSSI_B 0x77 ++#define EEPROM_THERMAL_METER 0x78 ++#define EEPROM_RF_OPT1 0x79 ++#define EEPROM_RF_OPT2 0x7A ++#define EEPROM_RF_OPT3 0x7B ++#define EEPROM_RF_OPT4 0x7C ++#define EEPROM_VERSION 0x7E ++#define EEPROM_CUSTOMER_ID 0x7F ++ ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++ ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++//should be renamed and moved to another file ++typedef enum _BOARD_TYPE_8192CUSB{ ++ BOARD_USB_DONGLE = 0, // USB dongle ++ BOARD_USB_High_PA = 1, // USB dongle with high power PA ++ BOARD_MINICARD = 2, // Minicard ++ BOARD_USB_SOLO = 3, // USB solo-Slim module ++ BOARD_USB_COMBO = 4, // USB Combo-Slim module ++} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; ++ ++#define SUPPORT_HW_RADIO_DETECT(pHalData) (pHalData->BoardType == BOARD_MINICARD||\ ++ pHalData->BoardType == BOARD_USB_SOLO||\ ++ pHalData->BoardType == BOARD_USB_COMBO) ++ ++//--------------------------------------------------------------- ++// EEPROM address for Test chip ++//--------------------------------------------------------------- ++#define EEPROM_TEST_USB_OPT 0x0E ++#define EEPROM_TEST_CHIRP_K 0x0F ++#define EEPROM_TEST_EP_SETTING 0x0E ++#define EEPROM_TEST_USB_PHY 0x10 ++ ++ ++//--------------------------------------------------------------- ++// EEPROM address for Normal chip ++//--------------------------------------------------------------- ++#define EEPROM_NORMAL_USB_OPT 0x0E ++#define EEPROM_NORMAL_CHIRP_K 0x0E // Changed ++#define EEPROM_NORMAL_EP_SETTING 0x0F // Changed ++#define EEPROM_NORMAL_USB_PHY 0x12 // Changed ++ ++ ++// Test chip and normal chip common define ++//--------------------------------------------------------------- ++// EEPROM address for both ++//--------------------------------------------------------------- ++#define EEPROM_ID0 0x00 ++#define EEPROM_ID1 0x01 ++#define EEPROM_RTK_RSV1 0x02 ++#define EEPROM_RTK_RSV2 0x03 ++#define EEPROM_RTK_RSV3 0x04 ++#define EEPROM_RTK_RSV4 0x05 ++#define EEPROM_RTK_RSV5 0x06 ++#define EEPROM_DBG_SEL 0x07 ++#define EEPROM_RTK_RSV6 0x08 ++#define EEPROM_VID 0x0A ++#define EEPROM_PID 0x0C ++ ++#define EEPROM_MAC_ADDR 0x16 ++#define EEPROM_STRING 0x1C ++#define EEPROM_SUBCUSTOMER_ID 0x59 ++#define EEPROM_CCK_TX_PWR_INX 0x5A ++#define EEPROM_HT40_1S_TX_PWR_INX 0x60 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 ++#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C ++#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F ++#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 ++ ++#define EEPROM_CHANNEL_PLAN 0x75 ++#define EEPROM_TSSI_A 0x76 ++#define EEPROM_TSSI_B 0x77 ++#define EEPROM_THERMAL_METER 0x78 ++#define EEPROM_RF_OPT1 0x79 ++#define EEPROM_RF_OPT2 0x7A ++#define EEPROM_RF_OPT3 0x7B ++#define EEPROM_RF_OPT4 0x7C ++#define EEPROM_VERSION 0x7E ++#define EEPROM_CUSTOMER_ID 0x7F ++ ++#define EEPROM_BoardType 0x54 //0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU ++#define EEPROM_TxPwIndex 0x5C //0x5C-0x76, Tx Power index. ++#define EEPROM_PwDiff 0x67 // Difference of gain index between legacy and high throughput OFDM. ++ ++#define EEPROM_TxPowerCCK 0x5A // CCK Tx Power ++ ++// 2009/02/09 Cosa Add for SD3 requirement ++#define EEPROM_TX_PWR_HT20_DIFF 0x6e// HT20 Tx Power Index Difference ++#define DEFAULT_HT20_TXPWR_DIFF 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_TX_PWR_OFDM_DIFF 0x71// OFDM Tx Power Index Difference ++ ++#define EEPROM_TxPWRGroup 0x73// Power diff for channel group ++#define EEPROM_Regulatory 0x79// Check if power safety is need ++ ++#define EEPROM_BLUETOOTH_COEXIST 0x7E // 92cu, 0x7E[4] ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++#define BOARD_TYPE_NORMAL_MASK 0xE0 ++#define BOARD_TYPE_TEST_MASK 0x0F ++#define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle ++//------------------------------------------------------------- ++// EEPROM content definitions ++//------------------------------------------------------------- ++#define OS_LINK_SPEED BIT(5) ++ ++#define BOARD_TYPE_MASK 0xF ++ ++#define BT_COEXISTENCE BIT(4) ++#define BT_CO_SHIFT 4 ++ ++#define EP_NUMBER_MASK 0x30 //bit 4:5 0Eh ++#define EP_NUMBER_SHIFT 4 ++ ++ ++#define USB_PHY_PARA_SIZE 5 ++ ++ ++//------------------------------------------------------------- ++// EEPROM default value definitions ++//------------------------------------------------------------- ++// Use 0xABCD instead of 0x8192 for debug ++#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 ++#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 ++ ++#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 ++#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 ++#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 ++ ++#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A ++#define EEPROM_DEF_VID_1 0x0B ++ ++#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C ++#define EEPROM_DEF_PID_1 0x81 ++ ++ ++#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E ++#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E ++ ++#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F ++ ++#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 ++#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 ++#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 ++#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 ++ ++#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 ++#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 ++ ++ ++#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A ++ ++#define RF_OPTION1 0x79// Check if power safety spec is need ++#define RF_OPTION2 0x7A ++#define RF_OPTION3 0x7B ++#define RF_OPTION4 0x7C ++ ++ ++#define EEPROM_USB_SN BIT(0) ++#define EEPROM_USB_REMOTE_WAKEUP BIT(1) ++#define EEPROM_USB_DEVICE_PWR BIT(2) ++#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) ++ ++#if 0 ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define EEPROM_CID_DEFAULT 0x0 ++ ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#endif ++ ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++/* ++Based on Datasheet V33---090401 ++Register Summary ++Current IOREG MAP ++0x0000h ~ 0x00FFh System Configuration (256 Bytes) ++0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) ++0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) ++0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) ++0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) ++0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) ++0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) ++0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) ++0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) ++*/ ++ ++//---------------------------------------------------------------------------- ++// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) ++//---------------------------------------------------------------------------- ++#define RCR_APPFCS BIT31 //WMAC append FCS after pauload ++#define RCR_APP_MIC BIT30 // ++#define RCR_APP_PHYSTS BIT28// ++#define RCR_APP_ICV BIT29 // ++#define RCR_APP_PHYST_RXFF BIT28 // ++#define RCR_APP_BA_SSN BIT27 //Accept BA SSN ++#define RCR_ENMBID BIT24 //Enable Multiple BssId. ++#define RCR_LSIGEN BIT23 ++#define RCR_MFBEN BIT22 ++#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 ++#define RCR_AMF BIT13 //Accept management type frame ++#define RCR_ACF BIT12 //Accept control type frame ++#define RCR_ADF BIT11 //Accept data type frame ++#define RCR_AICV BIT9 //Accept ICV error packet ++#define RCR_ACRC32 BIT8 //Accept CRC32 error packet ++#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) ++#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) ++#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet ++#define RCR_APWRMGT BIT5 //Accept power management packet ++#define RCR_ADD3 BIT4 //Accept address 3 match packet ++#define RCR_AB BIT3 //Accept broadcast packet ++#define RCR_AM BIT2 //Accept multicast packet ++#define RCR_APM BIT1 //Accept physical match packet ++#define RCR_AAP BIT0 //Accept all unicast packet ++#define RCR_MXDMA_OFFSET 8 ++#define RCR_FIFO_OFFSET 13 ++ ++ ++ ++//============================================================================ ++// 8192c USB specific Regsiter Offset and Content definition, ++// 2009.08.18, added by vivi. for merge 92c and 92C into one driver ++//============================================================================ ++//#define APS_FSMCO 0x0004 same with 92Ce ++#define RSV_CTRL 0x001C ++#define RD_CTRL 0x0524 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++#define REG_USB_VID 0xFE60 ++#define REG_USB_PID 0xFE62 ++#define REG_USB_OPTIONAL 0xFE64 ++#define REG_USB_CHIRP_K 0xFE65 ++#define REG_USB_PHY 0xFE66 ++#define REG_USB_MAC_ADDR 0xFE70 ++ ++#define REG_USB_HRPWM 0xFE58 ++#define REG_USB_HCPWM 0xFE57 ++ ++#define InvalidBBRFValue 0x12345678 ++ ++//============================================================================ ++// 8192C Regsiter Bit and Content definition ++//============================================================================ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++ ++//2 SPS0_CTRL ++#define SW18_FPWM BIT(3) ++ ++ ++//2 SYS_ISO_CTRL ++#define ISO_MD2PP BIT(0) ++#define ISO_UA2USB BIT(1) ++#define ISO_UD2CORE BIT(2) ++#define ISO_PA2PCIE BIT(3) ++#define ISO_PD2CORE BIT(4) ++#define ISO_IP2MAC BIT(5) ++#define ISO_DIOP BIT(6) ++#define ISO_DIOE BIT(7) ++#define ISO_EB2CORE BIT(8) ++#define ISO_DIOR BIT(9) ++ ++#define PWC_EV25V BIT(14) ++#define PWC_EV12V BIT(15) ++ ++ ++//2 SYS_FUNC_EN ++#define FEN_BBRSTB BIT(0) ++#define FEN_BB_GLB_RSTn BIT(1) ++#define FEN_USBA BIT(2) ++#define FEN_UPLL BIT(3) ++#define FEN_USBD BIT(4) ++#define FEN_DIO_PCIE BIT(5) ++#define FEN_PCIEA BIT(6) ++#define FEN_PPLL BIT(7) ++#define FEN_PCIED BIT(8) ++#define FEN_DIOE BIT(9) ++#define FEN_CPUEN BIT(10) ++#define FEN_DCORE BIT(11) ++#define FEN_ELDR BIT(12) ++#define FEN_DIO_RF BIT(13) ++#define FEN_HWPDN BIT(14) ++#define FEN_MREGEN BIT(15) ++ ++//2 APS_FSMCO ++#define PFM_LDALL BIT(0) ++#define PFM_ALDN BIT(1) ++#define PFM_LDKP BIT(2) ++#define PFM_WOWL BIT(3) ++#define EnPDN BIT(4) ++#define PDN_PL BIT(5) ++#define APFM_ONMAC BIT(8) ++#define APFM_OFF BIT(9) ++#define APFM_RSM BIT(10) ++#define AFSM_HSUS BIT(11) ++#define AFSM_PCIE BIT(12) ++#define APDM_MAC BIT(13) ++#define APDM_HOST BIT(14) ++#define APDM_HPDN BIT(15) ++#define RDY_MACON BIT(16) ++#define SUS_HOST BIT(17) ++#define ROP_ALD BIT(20) ++#define ROP_PWR BIT(21) ++#define ROP_SPS BIT(22) ++#define SOP_MRST BIT(25) ++#define SOP_FUSE BIT(26) ++#define SOP_ABG BIT(27) ++#define SOP_AMB BIT(28) ++#define SOP_RCK BIT(29) ++#define SOP_A8M BIT(30) ++#define XOP_BTCK BIT(31) ++ ++//2 SYS_CLKR ++#define ANAD16V_EN BIT(0) ++#define ANA8M BIT(1) ++#define MACSLP BIT(4) ++#define LOADER_CLK_EN BIT(5) ++#define _80M_SSC_DIS BIT(7) ++#define _80M_SSC_EN_HO BIT(8) ++#define PHY_SSC_RSTB BIT(9) ++#define SEC_CLK_EN BIT(10) ++#define MAC_CLK_EN BIT(11) ++#define SYS_CLK_EN BIT(12) ++#define RING_CLK_EN BIT(13) ++ ++ ++//2 9346CR ++ ++ ++#define EEDO BIT(0) ++#define EEDI BIT(1) ++#define EESK BIT(2) ++#define EECS BIT(3) ++//#define EERPROMSEL BIT(4) ++//#define EEPROM_EN BIT(5) ++#define BOOT_FROM_EEPROM BIT(4) ++#define EEPROM_EN BIT(5) ++#define EEM0 BIT(6) ++#define EEM1 BIT(7) ++ ++ ++//2 AFE_MISC ++#define AFE_BGEN BIT(0) ++#define AFE_MBEN BIT(1) ++#define MAC_ID_EN BIT(7) ++ ++ ++//2 SPS0_CTRL ++ ++ ++//2 SPS_OCP_CFG ++ ++ ++//2 RSV_CTRL ++#define WLOCK_ALL BIT(0) ++#define WLOCK_00 BIT(1) ++#define WLOCK_04 BIT(2) ++#define WLOCK_08 BIT(3) ++#define WLOCK_40 BIT(4) ++#define R_DIS_PRST_0 BIT(5) ++#define R_DIS_PRST_1 BIT(6) ++#define LOCK_ALL_EN BIT(7) ++ ++//2 RF_CTRL ++#define RF_EN BIT(0) ++#define RF_RSTB BIT(1) ++#define RF_SDMRSTB BIT(2) ++ ++ ++ ++//2 LDOA15_CTRL ++#define LDA15_EN BIT(0) ++#define LDA15_STBY BIT(1) ++#define LDA15_OBUF BIT(2) ++#define LDA15_REG_VOS BIT(3) ++#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) ++ ++ ++ ++//2 LDOV12D_CTRL ++#define LDV12_EN BIT(0) ++#define LDV12_SDBY BIT(1) ++#define LPLDO_HSM BIT(2) ++#define LPLDO_LSM_DIS BIT(3) ++#define _LDV12_VADJ(x) (((x) & 0xF) << 4) ++ ++ ++//2 AFE_XTAL_CTRL ++#define XTAL_EN BIT(0) ++#define XTAL_BSEL BIT(1) ++#define _XTAL_BOSC(x) (((x) & 0x3) << 2) ++#define _XTAL_CADJ(x) (((x) & 0xF) << 4) ++#define XTAL_GATE_USB BIT(8) ++#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) ++#define XTAL_GATE_AFE BIT(11) ++#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) ++#define XTAL_RF_GATE BIT(14) ++#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) ++#define XTAL_GATE_DIG BIT(17) ++#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) ++#define XTAL_BT_GATE BIT(20) ++#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) ++#define _XTAL_GPIO(x) (((x) & 0x7) << 23) ++ ++ ++#define CKDLY_AFE BIT(26) ++#define CKDLY_USB BIT(27) ++#define CKDLY_DIG BIT(28) ++#define CKDLY_BT BIT(29) ++ ++ ++//2 AFE_PLL_CTRL ++#define APLL_EN BIT(0) ++#define APLL_320_EN BIT(1) ++#define APLL_FREF_SEL BIT(2) ++#define APLL_EDGE_SEL BIT(3) ++#define APLL_WDOGB BIT(4) ++#define APLL_LPFEN BIT(5) ++ ++#define APLL_REF_CLK_13MHZ 0x1 ++#define APLL_REF_CLK_19_2MHZ 0x2 ++#define APLL_REF_CLK_20MHZ 0x3 ++#define APLL_REF_CLK_25MHZ 0x4 ++#define APLL_REF_CLK_26MHZ 0x5 ++#define APLL_REF_CLK_38_4MHZ 0x6 ++#define APLL_REF_CLK_40MHZ 0x7 ++ ++#define APLL_320EN BIT(14) ++#define APLL_80EN BIT(15) ++#define APLL_1MEN BIT(24) ++ ++ ++//2 EFUSE_CTRL ++#define ALD_EN BIT(18) ++#define EF_PD BIT(19) ++#define EF_FLAG BIT(31) ++ ++//2 EFUSE_TEST (For RTL8723 partially) ++#define EF_TRPT BIT(7) ++#define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 ++#define LDOE25_EN BIT(31) ++#define EFUSE_SEL(x) (((x) & 0x3) << 8) ++#define EFUSE_SEL_MASK 0x300 ++#define EFUSE_WIFI_SEL_0 0x0 ++#define EFUSE_BT_SEL_0 0x1 ++#define EFUSE_BT_SEL_1 0x2 ++#define EFUSE_BT_SEL_2 0x3 ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++//2 PWR_DATA ++ ++//2 CAL_TIMER ++ ++//2 ACLK_MON ++#define RSM_EN BIT(0) ++#define Timer_EN BIT(4) ++ ++ ++//2 GPIO_MUXCFG ++#define TRSW0EN BIT(2) ++#define TRSW1EN BIT(3) ++#define EROM_EN BIT(4) ++#define EnBT BIT(5) ++#define EnUart BIT(8) ++#define Uart_910 BIT(9) ++#define EnPMAC BIT(10) ++#define SIC_SWRST BIT(11) ++#define EnSIC BIT(12) ++#define SIC_23 BIT(13) ++#define EnHDP BIT(14) ++#define SIC_LBK BIT(15) ++ ++//2 GPIO_PIN_CTRL ++ ++// GPIO BIT ++#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) ++ ++//2 GPIO_INTM ++ ++//2 LEDCFG ++#define LED0PL BIT(4) ++#define LED0DIS BIT(7) ++#define LED1DIS BIT(15) ++#define LED1PL BIT(12) ++ ++#define SECCAM_CLR BIT(30) ++ ++ ++//2 FSIMR ++ ++//2 FSISR ++ ++ ++//2 8051FWDL ++//2 MCUFWDL ++#define MCUFWDL_EN BIT(0) ++#define MCUFWDL_RDY BIT(1) ++#define FWDL_ChkSum_rpt BIT(2) ++#define MACINI_RDY BIT(3) ++#define BBINI_RDY BIT(4) ++#define RFINI_RDY BIT(5) ++#define WINTINI_RDY BIT(6) ++#define CPRST BIT(23) ++ ++//2REG_HPON_FSM ++#define BOND92CE_1T2R_CFG BIT(22) ++ ++ ++//2 REG_SYS_CFG ++#define XCLK_VLD BIT(0) ++#define ACLK_VLD BIT(1) ++#define UCLK_VLD BIT(2) ++#define PCLK_VLD BIT(3) ++#define PCIRSTB BIT(4) ++#define V15_VLD BIT(5) ++#define TRP_B15V_EN BIT(7) ++#define SIC_IDLE BIT(8) ++#define BD_MAC2 BIT(9) ++#define BD_MAC1 BIT(10) ++#define IC_MACPHY_MODE BIT(11) ++#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) ++#define BT_FUNC BIT(16) ++#define VENDOR_ID BIT(19) ++#define PAD_HWPD_IDN BIT(22) ++#define TRP_VAUX_EN BIT(23) ++#define TRP_BT_EN BIT(24) ++#define BD_PKG_SEL BIT(25) ++#define BD_HCI_SEL BIT(26) ++#define TYPE_ID BIT(27) ++ ++#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 ++#define CHIP_VER_RTL_SHIFT 12 ++ ++//2REG_GPIO_OUTSTS (For RTL8723 only) ++#define EFS_HCI_SEL (BIT(0)|BIT(1)) ++#define PAD_HCI_SEL (BIT(2)|BIT(3)) ++#define HCI_SEL (BIT(4)|BIT(5)) ++#define PKG_SEL_HCI BIT(6) ++#define FEN_GPS BIT(7) ++#define FEN_BT BIT(8) ++#define FEN_WL BIT(9) ++#define FEN_PCI BIT(10) ++#define FEN_USB BIT(11) ++#define BTRF_HWPDN_N BIT(12) ++#define WLRF_HWPDN_N BIT(13) ++#define PDN_BT_N BIT(14) ++#define PDN_GPS_N BIT(15) ++#define BT_CTL_HWPDN BIT(16) ++#define GPS_CTL_HWPDN BIT(17) ++#define PPHY_SUSB BIT(20) ++#define UPHY_SUSB BIT(21) ++#define PCI_SUSEN BIT(22) ++#define USB_SUSEN BIT(23) ++#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++ ++ ++//2 Function Enable Registers ++//2 CR ++ ++#define REG_LBMODE (REG_CR + 3) ++ ++ ++#define HCI_TXDMA_EN BIT(0) ++#define HCI_RXDMA_EN BIT(1) ++#define TXDMA_EN BIT(2) ++#define RXDMA_EN BIT(3) ++#define PROTOCOL_EN BIT(4) ++#define SCHEDULE_EN BIT(5) ++#define MACTXEN BIT(6) ++#define MACRXEN BIT(7) ++#define ENSWBCN BIT(8) ++#define ENSEC BIT(9) ++ ++// Network type ++#define _NETTYPE(x) (((x) & 0x3) << 16) ++#define MASK_NETTYPE 0x30000 ++#define NT_NO_LINK 0x0 ++#define NT_LINK_AD_HOC 0x1 ++#define NT_LINK_AP 0x2 ++#define NT_AS_AP 0x3 ++ ++#define _LBMODE(x) (((x) & 0xF) << 24) ++#define MASK_LBMODE 0xF000000 ++#define LOOPBACK_NORMAL 0x0 ++#define LOOPBACK_IMMEDIATELY 0xB ++#define LOOPBACK_MAC_DELAY 0x3 ++#define LOOPBACK_PHY 0x1 ++#define LOOPBACK_DMA 0x7 ++ ++ ++//2 PBP - Page Size Register ++#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) ++#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) ++#define _PSRX_MASK 0xF ++#define _PSTX_MASK 0xF0 ++#define _PSRX(x) (x) ++#define _PSTX(x) ((x) << 4) ++ ++#define PBP_64 0x0 ++#define PBP_128 0x1 ++#define PBP_256 0x2 ++#define PBP_512 0x3 ++#define PBP_1024 0x4 ++ ++ ++//2 TX/RXDMA ++#define RXDMA_ARBBW_EN BIT(0) ++#define RXSHFT_EN BIT(1) ++#define RXDMA_AGG_EN BIT(2) ++#define QS_VO_QUEUE BIT(8) ++#define QS_VI_QUEUE BIT(9) ++#define QS_BE_QUEUE BIT(10) ++#define QS_BK_QUEUE BIT(11) ++#define QS_MANAGER_QUEUE BIT(12) ++#define QS_HIGH_QUEUE BIT(13) ++ ++#define HQSEL_VOQ BIT(0) ++#define HQSEL_VIQ BIT(1) ++#define HQSEL_BEQ BIT(2) ++#define HQSEL_BKQ BIT(3) ++#define HQSEL_MGTQ BIT(4) ++#define HQSEL_HIQ BIT(5) ++ ++// For normal driver, 0x10C ++#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) ++#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) ++#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) ++#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) ++#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) ++#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) ++ ++#define QUEUE_LOW 1 ++#define QUEUE_NORMAL 2 ++#define QUEUE_HIGH 3 ++ ++ ++ ++//2 TRXFF_BNDY ++ ++ ++//2 LLT_INIT ++#define _LLT_NO_ACTIVE 0x0 ++#define _LLT_WRITE_ACCESS 0x1 ++#define _LLT_READ_ACCESS 0x2 ++ ++#define _LLT_INIT_DATA(x) ((x) & 0xFF) ++#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) ++#define _LLT_OP(x) (((x) & 0x3) << 30) ++#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) ++ ++ ++//2 BB_ACCESS_CTRL ++#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) ++#define BB_WRITE_EN BIT(30) ++#define BB_READ_EN BIT(31) ++//#define BB_ADDR_MASK 0xFFF ++//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++//2 RQPN ++#define _HPQ(x) ((x) & 0xFF) ++#define _LPQ(x) (((x) & 0xFF) << 8) ++#define _PUBQ(x) (((x) & 0xFF) << 16) ++#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register ++ ++ ++#define HPQ_PUBLIC_DIS BIT(24) ++#define LPQ_PUBLIC_DIS BIT(25) ++#define LD_RQPN BIT(31) ++ ++ ++//2 TDECTRL ++#define BCN_VALID BIT(16) ++#define BCN_HEAD(x) (((x) & 0xFF) << 8) ++#define BCN_HEAD_MASK 0xFF00 ++ ++//2 TDECTL ++#define BLK_DESC_NUM_SHIFT 4 ++#define BLK_DESC_NUM_MASK 0xF ++ ++ ++//2 TXDMA_OFFSET_CHK ++#define DROP_DATA_EN BIT(9) ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++//2 FWHW_TXQ_CTRL ++#define EN_AMPDU_RTY_NEW BIT(7) ++ ++//2 INIRTSMCS_SEL ++#define _INIRTSMCS_SEL(x) ((x) & 0x3F) ++ ++ ++//2 SPEC SIFS ++#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) ++#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) ++ ++ ++//2 RRSR ++ ++#define RATE_REG_BITMAP_ALL 0xFFFFF ++ ++#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) ++ ++#define _RRSR_RSC(x) (((x) & 0x3) << 21) ++#define RRSR_RSC_RESERVED 0x0 ++#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 ++#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 ++#define RRSR_RSC_DUPLICATE_MODE 0x3 ++ ++ ++//2 ARFR ++#define USE_SHORT_G1 BIT(20) ++ ++//2 AGGLEN_LMT_L ++#define _AGGLMT_MCS0(x) ((x) & 0xF) ++#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) ++#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) ++#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) ++#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) ++#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) ++#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) ++#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) ++ ++ ++//2 RL ++#define RETRY_LIMIT_SHORT_SHIFT 8 ++#define RETRY_LIMIT_LONG_SHIFT 0 ++ ++ ++//2 DARFRC ++#define _DARF_RC1(x) ((x) & 0x1F) ++#define _DARF_RC2(x) (((x) & 0x1F) << 8) ++#define _DARF_RC3(x) (((x) & 0x1F) << 16) ++#define _DARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (DARFRC + 4) ++#define _DARF_RC5(x) ((x) & 0x1F) ++#define _DARF_RC6(x) (((x) & 0x1F) << 8) ++#define _DARF_RC7(x) (((x) & 0x1F) << 16) ++#define _DARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++//2 RARFRC ++#define _RARF_RC1(x) ((x) & 0x1F) ++#define _RARF_RC2(x) (((x) & 0x1F) << 8) ++#define _RARF_RC3(x) (((x) & 0x1F) << 16) ++#define _RARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (RARFRC + 4) ++#define _RARF_RC5(x) ((x) & 0x1F) ++#define _RARF_RC6(x) (((x) & 0x1F) << 8) ++#define _RARF_RC7(x) (((x) & 0x1F) << 16) ++#define _RARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++ ++ ++//2 EDCA setting ++#define AC_PARAM_TXOP_LIMIT_OFFSET 16 ++#define AC_PARAM_ECW_MAX_OFFSET 12 ++#define AC_PARAM_ECW_MIN_OFFSET 8 ++#define AC_PARAM_AIFS_OFFSET 0 ++ ++ ++//2 EDCA_VO_PARAM ++#define _AIFS(x) (x) ++#define _ECW_MAX_MIN(x) ((x) << 8) ++#define _TXOP_LIMIT(x) ((x) << 16) ++ ++ ++#define _BCNIFS(x) ((x) & 0xFF) ++#define _BCNECW(x) (((x) & 0xF))<< 8) ++ ++ ++#define _LRL(x) ((x) & 0x3F) ++#define _SRL(x) (((x) & 0x3F) << 8) ++ ++ ++//2 SIFS_CCK ++#define _SIFS_CCK_CTX(x) ((x) & 0xFF) ++#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 SIFS_OFDM ++#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) ++#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 TBTT PROHIBIT ++#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) ++ ++ ++//2 REG_RD_CTRL ++#define DIS_EDCA_CNT_DWN BIT(11) ++ ++ ++//2 BCN_CTRL ++#define EN_MBSSID BIT(1) ++#define EN_TXBCN_RPT BIT(2) ++#define EN_BCN_FUNCTION BIT(3) ++// The same function but different bit field. ++#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) ++#define DIS_TSF_UDT0_TEST_CHIP BIT(5) ++ ++//2 ACMHWCTRL ++#define AcmHw_HwEn BIT(0) ++#define AcmHw_BeqEn BIT(1) ++#define AcmHw_ViqEn BIT(2) ++#define AcmHw_VoqEn BIT(3) ++#define AcmHw_BeqStatus BIT(4) ++#define AcmHw_ViqStatus BIT(5) ++#define AcmHw_VoqStatus BIT(6) ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++//2 APSD_CTRL ++#define APSDOFF BIT(6) ++#define APSDOFF_STATUS BIT(7) ++ ++ ++//2 BWOPMODE ++#define BW_20MHZ BIT(2) ++//#define BW_OPMODE_20MHZ BIT(2) // For compability ++ ++ ++#define RATE_BITMAP_ALL 0xFFFFF ++ ++// Only use CCK 1M rate for ACK ++#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 ++ ++//2 TCR ++#define TSFRST BIT(0) ++#define DIS_GCLK BIT(1) ++#define PAD_SEL BIT(2) ++#define PWR_ST BIT(6) ++#define PWRBIT_OW_EN BIT(7) ++#define ACRC BIT(8) ++#define CFENDFORM BIT(9) ++#define ICV BIT(10) ++ ++ ++ ++//2 RCR ++#define AAP BIT(0) ++#define APM BIT(1) ++#define AM BIT(2) ++#define AB BIT(3) ++#define ADD3 BIT(4) ++#define APWRMGT BIT(5) ++#define CBSSID BIT(6) ++#define CBSSID_BCN BIT(7) ++#define ACRC32 BIT(8) ++#define AICV BIT(9) ++#define ADF BIT(11) ++#define ACF BIT(12) ++#define AMF BIT(13) ++#define HTC_LOC_CTRL BIT(14) ++#define UC_DATA_EN BIT(16) ++#define BM_DATA_EN BIT(17) ++#define MFBEN BIT(22) ++#define LSIGEN BIT(23) ++#define EnMBID BIT(24) ++#define APP_BASSN BIT(27) ++#define APP_PHYSTS BIT(28) ++#define APP_ICV BIT(29) ++#define APP_MIC BIT(30) ++#define APP_FCS BIT(31) ++ ++//2 RX_PKT_LIMIT ++ ++//2 RX_DLK_TIME ++ ++//2 MBIDCAMCFG ++ ++ ++ ++//2 AMPDU_MIN_SPACE ++#define _MIN_SPACE(x) ((x) & 0x7) ++#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) ++ ++ ++//2 RXERR_RPT ++#define RXERR_TYPE_OFDM_PPDU 0 ++#define RXERR_TYPE_OFDM_FALSE_ALARM 1 ++#define RXERR_TYPE_OFDM_MPDU_OK 2 ++#define RXERR_TYPE_OFDM_MPDU_FAIL 3 ++#define RXERR_TYPE_CCK_PPDU 4 ++#define RXERR_TYPE_CCK_FALSE_ALARM 5 ++#define RXERR_TYPE_CCK_MPDU_OK 6 ++#define RXERR_TYPE_CCK_MPDU_FAIL 7 ++#define RXERR_TYPE_HT_PPDU 8 ++#define RXERR_TYPE_HT_FALSE_ALARM 9 ++#define RXERR_TYPE_HT_MPDU_TOTAL 10 ++#define RXERR_TYPE_HT_MPDU_OK 11 ++#define RXERR_TYPE_HT_MPDU_FAIL 12 ++#define RXERR_TYPE_RX_FULL_DROP 15 ++ ++#define RXERR_COUNTER_MASK 0xFFFFF ++#define RXERR_RPT_RST BIT(27) ++#define _RXERR_RPT_SEL(type) ((type) << 28) ++ ++ ++//2 SECCFG ++#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key ++#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key ++#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption ++#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption ++#define SCR_SKByA2 BIT(4) //Search kEY BY A2 ++#define SCR_NoSKMC BIT(5) //No Key Search Multicast ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 USB Information (0xFE17) ++#define USB_IS_HIGH_SPEED 0 ++#define USB_IS_FULL_SPEED 1 ++#define USB_SPEED_MASK BIT(5) ++ ++#define USB_NORMAL_SIE_EP_MASK 0xF ++#define USB_NORMAL_SIE_EP_SHIFT 4 ++ ++#define USB_TEST_EP_MASK 0x30 ++#define USB_TEST_EP_SHIFT 4 ++ ++//2 Special Option ++#define USB_AGG_EN BIT(3) ++ ++ ++//2REG_C2HEVT_CLEAR ++#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message ++#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. ++ ++ ++//2REG_MULTI_FUNC_CTRL(For RTL8723 Only) ++#define WL_HWPDN_EN BIT0 // Enable GPIO[9] as WiFi HW PDn source ++#define WL_HWPDN_SL BIT1 // WiFi HW PDn polarity control ++#define WL_FUNC_EN BIT2 // WiFi function enable ++#define WL_HWROF_EN BIT3 // Enable GPIO[9] as WiFi RF HW PDn source ++#define BT_HWPDN_EN BIT16 // Enable GPIO[11] as BT HW PDn source ++#define BT_HWPDN_SL BIT17 // BT HW PDn polarity control ++#define BT_FUNC_EN BIT18 // BT function enable ++#define BT_HWROF_EN BIT19 // Enable GPIO[11] as BT/GPS RF HW PDn source ++#define GPS_HWPDN_EN BIT20 // Enable GPIO[10] as GPS HW PDn source ++#define GPS_HWPDN_SL BIT21 // GPS HW PDn polarity control ++#define GPS_FUNC_EN BIT22 // GPS function enable ++ ++//3 REG_LIFECTRL_CTRL ++#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 ++#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 ++#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 ++#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 ++ ++#define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MAC_ADDR_LEN 6 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 ++ ++#define POLLING_LLT_THRESHOLD 20 ++#define POLLING_READY_TIMEOUT_COUNT 1000 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++ ++ ++#include "basic_types.h" ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_sreset.h +@@ -0,0 +1,32 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192C_SRESET_C_ ++#define _RTL8192C_SRESET_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter); ++extern void rtl8192c_sreset_linked_status_check(_adapter *padapter); ++#endif ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192c_xmit.h +@@ -0,0 +1,129 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192C_XMIT_H_ ++#define _RTL8192C_XMIT_H_ ++ ++// ++// Queue Select Value in TxDesc ++// ++#define QSLT_BK 0x2//0x01 ++#define QSLT_BE 0x0 ++#define QSLT_VI 0x5//0x4 ++#define QSLT_VO 0x7//0x6 ++#define QSLT_BEACON 0x10 ++#define QSLT_HIGH 0x11 ++#define QSLT_MGNT 0x12 ++#define QSLT_CMD 0x13 ++ ++struct txrpt_ccx_8192c { ++ /* offset 0 */ ++ u8 retry_cnt:6; ++ u8 rsvd_0:2; ++ ++ /* offset 1 */ ++ u8 rts_retry_cnt:6; ++ u8 rsvd_1:2; ++ ++ /* offset 2 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 4 */ ++ u8 missed_pkt_num:5; ++ u8 rsvd_4:3; ++ ++ /* offset 5 */ ++ u8 mac_id:5; ++ u8 des1_fragssn:3; ++ ++ /* offset 6 */ ++ u8 rpt_pkt_num:5; ++ u8 pkt_drop:1; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 7*/ ++ u8 edca_tx_queue:4; ++ u8 rsvd_7:1; ++ u8 bmc:1; ++ u8 pkt_ok:1; ++ u8 int_ccx:1; ++}; ++ ++#define txrpt_ccx_qtime_8192c(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_8192c(void *buf); ++void handle_txrpt_ccx_8192c(_adapter *adapter, void *buf); ++#else ++#define dump_txrpt_ccx_8192c(buf) do {} while(0) ++#define handle_txrpt_ccx_8192c(adapter, buf) do {} while(0) ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++#define MAX_TX_AGG_PACKET_NUMBER 0xFF ++#endif ++ ++s32 rtl8192cu_init_xmit_priv(_adapter * padapter); ++ ++void rtl8192cu_free_xmit_priv(_adapter * padapter); ++ ++void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++s32 rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++s32 rtl8192cu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ce_init_xmit_priv(_adapter * padapter); ++void rtl8192ce_free_xmit_priv(_adapter * padapter); ++ ++s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); ++struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++ ++void rtl8192ce_xmitframe_resume(_adapter *padapter); ++ ++s32 rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++s32 rtl8192ce_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_cmd.h +@@ -0,0 +1,142 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192D_CMD_H_ ++#define __RTL8192D_CMD_H_ ++ ++ ++//-------------------------------------------- ++//3 Host Message Box ++//-------------------------------------------- ++ ++// User Define Message [31:8] ++ ++//_SETPWRMODE_PARM ++#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++//JOINBSSRPT_PARM ++#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++ ++//_RSVDPAGE_LOC ++#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++//P2P_PS_OFFLOAD ++ ++struct P2P_PS_Offload_t { ++ unsigned char Offload_En:1; ++ unsigned char role:1; // 1: Owner, 0: Client ++ unsigned char CTWindow_En:1; ++ unsigned char NoA0_En:1; ++ unsigned char NoA1_En:1; ++ unsigned char AllStaSleep:1; // Only valid in Owner ++ unsigned char discovery:1; ++ unsigned char rsvd:1; ++}; ++ ++#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) ++ ++// Description: Determine the types of H2C commands that are the same in driver and Fw. ++// Fisrt constructed by tynli. 2009.10.09. ++typedef enum _RTL8192D_H2C_CMD ++{ ++ H2C_AP_OFFLOAD = 0, /*0*/ ++ H2C_SETPWRMODE = 1, /*1*/ ++ H2C_JOINBSSRPT = 2, /*2*/ ++ H2C_RSVDPAGE = 3, ++ H2C_RSSI_REPORT = 5, ++ H2C_RA_MASK = 6, ++ H2C_P2P_PS_OFFLOAD = 8, ++ H2C_MAC_MODE_SEL = 9, ++ H2C_PWRM=15, ++#ifdef CONFIG_WOWLAN ++ H2C_WO_WLAN_CMD = 20, // Wake on Wlan. ++#endif // CONFIG_WOWLAN ++ H2C_P2P_PS_CTW_CMD = 24, ++ H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15 ++#ifdef CONFIG_WOWLAN ++ KEEP_ALIVE_CONTROL_CMD=31, //keep alive for wake on wlan ++ DISCONNECT_DECISION_CTRL_CMD=32, ++ REMOTE_WAKE_CTRL_CMD=34, ++#endif // CONFIG_WOWLAN ++ H2C_92D_TSF_SYNC=36, ++ H2C_92D_RESET_TSF = 43, ++ H2C_CMD_MAX ++}RTL8192D_H2C_CMD; ++ ++struct cmd_msg_parm { ++ u8 eid; //element id ++ u8 sz; // sz ++ u8 buf[6]; ++}; ++ ++ ++void FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); ++ ++// host message to firmware cmd ++void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); ++void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); ++u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param); ++u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); ++void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg); ++#ifdef CONFIG_P2P ++void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_TSF_RESET_OFFLOAD ++int reset_tsf(PADAPTER Adapter, u8 reset_port ); ++#endif // CONFIG_TSF_RESET_OFFLOAD ++ ++#ifdef CONFIG_WOWLAN ++typedef struct _SETWOWLAN_PARM{ ++ u8 mode; ++ u8 gpio_index; ++ u8 gpio_duration; ++ u8 second_mode; ++ u8 reserve; ++}SETWOWLAN_PARM, *PSETWOWLAN_PARM; ++ ++#define FW_WOWLAN_FUN_EN BIT(0) ++#define FW_WOWLAN_PATTERN_MATCH BIT(1) ++#define FW_WOWLAN_MAGIC_PKT BIT(2) ++#define FW_WOWLAN_UNICAST BIT(3) ++#define FW_WOWLAN_ALL_PKT_DROP BIT(4) ++#define FW_WOWLAN_GPIO_ACTIVE BIT(5) ++#define FW_WOWLAN_REKEY_WAKEUP BIT(6) ++#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) ++ ++#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) ++#define FW_FW_PARSE_MAGIC_PKT BIT(1) ++ ++void rtl8192d_set_wowlan_cmd(_adapter* padapter); ++void SetFwRelatedForWoWLAN8192DU(_adapter* padapter,u8 bHostIsGoingtoSleep); ++#endif // CONFIG_WOWLAN ++ ++#endif // __RTL8192D_CMD_H_ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_dm.h +@@ -0,0 +1,420 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192D_DM_H__ ++#define __RTL8192D_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++//============================================================ ++// Global var ++//============================================================ ++ ++extern u32 EDCAParam[maxAP][3] ; ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u32 Cnt_Parity_Fail; ++ u32 Cnt_Rate_Illegal; ++ u32 Cnt_Crc8_fail; ++ u32 Cnt_Mcs_fail; ++ u32 Cnt_Ofdm_fail; ++ u32 Cnt_Cck_fail; ++ u32 Cnt_all; ++ u32 Cnt_Fast_Fsync; ++ u32 Cnt_SB_Search_fail; ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 PreRFState; ++ u8 CurRFState; ++ ++ //int Rssi_val_min; ++ ++}PS_T,*pPS_T; ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ u8 Dig_Enable_Flag; ++ u8 Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u32 FALowThresh; ++ u32 FAHighThresh; ++ ++ u8 CurSTAConnectState; ++ u8 PreSTAConnectState; ++ u8 CurMultiSTAConnectState; ++ ++ u8 PreIGValue; ++ u8 CurIGValue; ++ u8 BackupIGValue; ++ ++ char BackoffVal; ++ char BackoffVal_range_max; ++ char BackoffVal_range_min; ++ u8 rx_gain_range_max; ++ u8 rx_gain_range_min; ++ u8 Rssi_val_min; ++ ++ u8 PreCCKPDState; ++ u8 CurCCKPDState; ++ ++ u8 LargeFAHit; ++ u8 ForbiddenIGI; ++ u32 Recover_cnt; ++ u8 rx_gain_range_min_nolink; ++}DIG_T,*pDIG_T; ++ ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_MIN = 0, ++ CCA_1R =1, ++ CCA_2R = 2, ++ CCA_MAX = 3, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX 0x3e ++#define DM_DIG_MIN 0x1e //0x22//0x1c ++ ++#define DM_DIG_FA_UPPER 0x32 ++#define DM_DIG_FA_LOWER 0x20 ++ ++//vivi 92c&92d has different definition, 20110504 ++//this is for 92c ++#define DM_DIG_FA_TH0 0x200//0x20 ++#define DM_DIG_FA_TH1 0x300//0x100 ++#define DM_DIG_FA_TH2 0x400//0x200 ++//this is for 92d ++#define DM_DIG_FA_TH0_92D 0x100 ++#define DM_DIG_FA_TH1_92D 0x150 ++#define DM_DIG_FA_TH2_92D 0x250 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN (-4) ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define RxPathSelection_SS_TH_low 30 ++#define RxPathSelection_diff_TH 18 ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++ ++#define CTSToSelfTHVal 30 ++#define RegC38_TH 20 ++ ++#define WAIotTHVal 25 ++ ++//Dynamic Tx Power Control Threshold ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++typedef struct _RATE_ADAPTIVE ++{ ++ u8 RateAdaptiveDisabled; ++ u8 RATRState; ++ u16 reserve; ++ ++ u32 HighRSSIThreshForRA; ++ u32 High2LowRSSIThreshForRA; ++ u8 Low2HighRSSIThreshForRA40M; ++ u32 LowRSSIThreshForRA40M; ++ u8 Low2HighRSSIThreshForRA20M; ++ u32 LowRSSIThreshForRA20M; ++ u32 UpperRSSIThresholdRATR; ++ u32 MiddleRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR40M; ++ u32 LowRSSIThresholdRATR20M; ++ u8 PingRSSIEnable; //cosa add for Netcore long range ping issue ++ u32 PingRSSIRATR; //cosa add for Netcore long range ping issue ++ u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue ++ u32 LastRATR; ++ u8 PreRATRState; ++ ++} RATE_ADAPTIVE, *PRATE_ADAPTIVE; ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_B = 1, ++ Antenna_A = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++// 20100514 Joseph: Add definition for antenna switching test after link. ++// This indicates two different the steps. ++// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. ++// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK ++// with original RSSI to determine if it is necessary to switch antenna. ++#define SWAW_STEP_PEAK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++ ++//============================= ++//Neil Chen---2011--06--15-- ++//============================== ++//3 PathDiv ++typedef struct _SW_Antenna_Switch_ ++{ ++ u8 try_flag; ++ s32 PreRSSI; ++ u8 CurAntenna; ++ u8 PreAntenna; ++ u8 RSSI_Trying; ++ u8 TestMode; ++ u8 bTriggerAntennaSwitch; ++ u8 SelectAntennaMap; ++ ++ // Before link Antenna Switch check ++ u8 SWAS_NoLink_State; ++ u32 SWAS_NoLink_BK_Reg860; ++}SWAT_T, *pSWAT_T; ++//======================================== ++ ++struct dm_priv ++{ ++ u8 DM_Type; ++ u8 DMFlag, DMFlag_tmp; ++ ++ //for DIG ++ u8 bDMInitialGainEnable; ++ //u8 binitialized; // for dm_initial_gain_Multi_STA use. ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u8 bUseRAMask; ++ RATE_ADAPTIVE RateAdaptive; ++ ++ //* Upper and Lower Signal threshold for Rate Adaptive*/ ++ int UndecoratedSmoothedPWDB; ++ int EntryMinUndecoratedSmoothedPWDB; ++ int EntryMaxUndecoratedSmoothedPWDB; ++ int MinUndecoratedPWDBForDM; ++ int LastMinUndecoratedPWDBForDM; ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ int RssiValMinForAnotherMacOfDMSP; ++ u32 CurDigValueForAnotherMacOfDMSP; ++ BOOLEAN bWriteDigForAnotherMacOfDMSP; ++ BOOLEAN bChangeCCKPDStateForAnotherMacOfDMSP; ++ u8 CurCCKPDStateForAnotherMacOfDMSP; ++ BOOLEAN bChangeTxHighPowerLvlForAnotherMacOfDMSP; ++ u8 CurTxHighLvlForAnotherMacOfDMSP; ++#endif ++ ++ //for High Power ++ u8 bDynamicTxPowerEnable; ++ u8 LastDTPLvl; ++ u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 ++ ++ //for tx power tracking ++ u8 bTXPowerTracking; ++ u8 TXPowercount; ++ u8 bTXPowerTrackingInit; ++ u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u8 TM_Trigger; ++ ++ u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u8 ThermalValue; ++ u8 ThermalValue_LCK; ++ u8 ThermalValue_IQK; ++ u8 ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u8 ThermalValue_AVG_index; ++ u8 ThermalValue_RxGain; ++ u8 ThermalValue_Crystal; ++ u8 Delta_IQK; ++ u8 Delta_LCK; ++ u8 bRfPiEnable; ++ u8 bReloadtxpowerindex; ++ u8 bDoneTxpower; ++ ++ //for APK ++ u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u8 bAPKdone; ++ u8 bAPKThermalMeterIgnore; ++ BOOLEAN bDPKdone[2]; ++ BOOLEAN bDPKstore; ++ BOOLEAN bDPKworking; ++ u8 OFDM_min_index_internalPA_DPK[2]; ++ u8 TxPowerLevelDPK[2]; ++ ++ u32 RegA24; ++ ++ //for IQK ++ u32 Reg874; ++ u32 RegC08; ++ u32 Reg88C; ++ u8 Reg522; ++ u8 Reg550; ++ u8 Reg551; ++ u32 Reg870; ++ u32 ADDA_backup[IQK_ADDA_REG_NUM]; ++ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u32 IQK_BB_backup[IQK_BB_REG_NUM]; ++ ++ u8 bCCKinCH14; ++ ++ char CCK_index; ++ //u8 Record_CCK_20Mindex; ++ //u8 Record_CCK_40Mindex; ++ char OFDM_index[2]; ++ ++ SWAT_T DM_SWAT_Table; ++ ++ //for TxPwrTracking ++ int RegE94; ++ int RegE9C; ++ int RegEB4; ++ int RegEBC; ++#if MP_DRIVER == 1 ++ u8 RegC04_MP; ++ u32 RegD04_MP; ++#endif ++ u32 TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u32 prv_traffic_idx; // edca turbo ++ ++ u32 RegRF3C[2]; //pathA / pathB ++ ++ // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas ++ u8 INIDATA_RATE[32]; ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ /* Ported from ODM, for ESTI Adaptivity test */ ++ s8 TH_L2H_ini; ++ s8 TH_EDCCA_HL_diff; ++ s8 IGI_Base; ++ u8 IGI_target; ++ bool ForceEDCCA; ++ u8 AdapEn_RSSI; ++ s8 Force_TH_H; ++ s8 Force_TH_L; ++ u8 IGI_LowerBound; ++ ++ bool bPreEdccaEnable; ++#endif ++}; ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++ ++//============================================================ ++// function prototype ++//============================================================ ++void rtl8192d_init_dm_priv(IN PADAPTER Adapter); ++void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter); ++void rtl8192d_InitHalDm(IN PADAPTER Adapter); ++void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter); ++ ++VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter); ++ ++#endif //__HAL8190PCIDM_H__ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_hal.h +@@ -0,0 +1,1126 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192D_HAL_H__ ++#define __RTL8192D_HAL_H__ ++ ++#include "hal_com.h" ++#include "rtl8192d_spec.h" ++#include "Hal8192DPhyReg.h" ++#include "Hal8192DPhyCfg.h" ++#include "rtl8192d_rf.h" ++#include "rtl8192d_dm.h" ++#include "rtl8192d_recv.h" ++#include "rtl8192d_xmit.h" ++#include "rtl8192d_cmd.h" ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/* Channel switch:The size of command tables for switch channel*/ ++#define MAX_PRECMD_CNT 16 ++#define MAX_RFDEPENDCMD_CNT 16 ++#define MAX_POSTCMD_CNT 16 ++ ++#define MAX_DOZE_WAITING_TIMES_9x 64 ++ ++#define MAX_RF_IMR_INDEX 12 ++#define MAX_RF_IMR_INDEX_NORMAL 13 ++#define RF_REG_NUM_for_C_CUT_5G 6 ++#define RF_REG_NUM_for_C_CUT_5G_internalPA 7 ++#define RF_REG_NUM_for_C_CUT_2G 5 ++#define RF_CHNL_NUM_5G 19 ++#define RF_CHNL_NUM_5G_40M 17 ++#define TARGET_CHNL_NUM_5G 221 ++#define TARGET_CHNL_NUM_2G 14 ++#define TARGET_CHNL_NUM_2G_5G 59 ++#define CV_CURVE_CNT 64 ++ ++//static u32 RF_REG_FOR_5G_SWCHNL[MAX_RF_IMR_INDEX]={0,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x38,0x39,0x0}; ++static u32 RF_REG_FOR_5G_SWCHNL_NORMAL[MAX_RF_IMR_INDEX_NORMAL]={0,0x2f,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x0}; ++ ++static u8 RF_REG_for_C_CUT_5G[RF_REG_NUM_for_C_CUT_5G] = ++ {RF_SYN_G1, RF_SYN_G2, RF_SYN_G3, RF_SYN_G4, RF_SYN_G5, RF_SYN_G6}; ++ ++static u8 RF_REG_for_C_CUT_5G_internalPA[RF_REG_NUM_for_C_CUT_5G_internalPA] = ++ {0x0B, 0x48, 0x49, 0x4B, 0x03, 0x04, 0x0E}; ++static u8 RF_REG_for_C_CUT_2G[RF_REG_NUM_for_C_CUT_2G] = ++ {RF_SYN_G1, RF_SYN_G2, RF_SYN_G3, RF_SYN_G7, RF_SYN_G8}; ++ ++#if DBG ++static u32 RF_REG_MASK_for_C_CUT_2G[RF_REG_NUM_for_C_CUT_2G] = ++ {BIT19|BIT18|BIT17|BIT14|BIT1, BIT10|BIT9, ++ BIT18|BIT17|BIT16|BIT1, BIT2|BIT1, ++ BIT15|BIT14|BIT13|BIT12|BIT11}; ++#endif //amy, temp remove ++static u8 RF_CHNL_5G[RF_CHNL_NUM_5G] = ++ {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140}; ++static u8 RF_CHNL_5G_40M[RF_CHNL_NUM_5G_40M] = ++ {38,42,46,50,54,58,62,102,106,110,114,118,122,126,130,134,138}; ++ ++static u32 RF_REG_Param_for_C_CUT_5G[5][RF_REG_NUM_for_C_CUT_5G] = { ++ {0xE43BE, 0xFC638, 0x77C0A, 0xDE471, 0xd7110, 0x8EB04}, ++ {0xE43BE, 0xFC078, 0xF7C1A, 0xE0C71, 0xD7550, 0xAEB04}, ++ {0xE43BF, 0xFF038, 0xF7C0A, 0xDE471, 0xE5550, 0xAEB04}, ++ {0xE43BF, 0xFF079, 0xF7C1A, 0xDE471, 0xE5550, 0xAEB04}, ++ {0xE43BF, 0xFF038, 0xF7C1A, 0xDE471, 0xd7550, 0xAEB04}}; ++ ++static u32 RF_REG_Param_for_C_CUT_2G[3][RF_REG_NUM_for_C_CUT_2G] = { ++ {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, ++ {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, ++ {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; ++ ++#if SWLCK == 1 ++static u32 RF_REG_SYN_G4_for_C_CUT_2G = 0xD1C31&0x7FF; ++#endif ++ ++static u32 RF_REG_Param_for_C_CUT_5G_internalPA[3][RF_REG_NUM_for_C_CUT_5G_internalPA] = { ++ {0x01a00, 0x40443, 0x00eb5, 0x89bec, 0x94a12, 0x94a12, 0x94a12}, ++ {0x01800, 0xc0443, 0x00730, 0x896ee, 0x94a52, 0x94a52, 0x94a52}, ++ {0x01800, 0xc0443, 0x00730, 0x896ee, 0x94a12, 0x94a12, 0x94a12}}; ++ ++ ++ ++//[mode][patha+b][reg] ++static u32 RF_IMR_Param_Normal[1][3][MAX_RF_IMR_INDEX_NORMAL]={{ ++ {0x70000,0x00ff0,0x4400f,0x00ff0,0x0,0x0,0x0,0x0,0x0,0x64888,0xe266c,0x00090,0x22fff},// channel 1-14. ++ {0x70000,0x22880,0x4470f,0x55880,0x00070, 0x88000, 0x0,0x88080,0x70000,0x64a82,0xe466c,0x00090,0x32c9a}, //path 36-64 ++ {0x70000,0x44880,0x4477f,0x77880,0x00070, 0x88000, 0x0,0x880b0,0x0,0x64b82,0xe466c,0x00090,0x32c9a} //100 -165 ++} ++}; ++ ++//static u32 CurveIndex_5G[TARGET_CHNL_NUM_5G]={0}; ++//static u32 CurveIndex_2G[TARGET_CHNL_NUM_2G]={0}; ++static u32 CurveIndex[TARGET_CHNL_NUM_2G_5G]={0}; ++ ++static u32 TargetChnl_5G[TARGET_CHNL_NUM_5G] = { ++25141, 25116, 25091, 25066, 25041, ++25016, 24991, 24966, 24941, 24917, ++24892, 24867, 24843, 24818, 24794, ++24770, 24765, 24721, 24697, 24672, ++24648, 24624, 24600, 24576, 24552, ++24528, 24504, 24480, 24457, 24433, ++24409, 24385, 24362, 24338, 24315, ++24291, 24268, 24245, 24221, 24198, ++24175, 24151, 24128, 24105, 24082, ++24059, 24036, 24013, 23990, 23967, ++23945, 23922, 23899, 23876, 23854, ++23831, 23809, 23786, 23764, 23741, ++23719, 23697, 23674, 23652, 23630, ++23608, 23586, 23564, 23541, 23519, ++23498, 23476, 23454, 23432, 23410, ++23388, 23367, 23345, 23323, 23302, ++23280, 23259, 23237, 23216, 23194, ++23173, 23152, 23130, 23109, 23088, ++23067, 23046, 23025, 23003, 22982, ++22962, 22941, 22920, 22899, 22878, ++22857, 22837, 22816, 22795, 22775, ++22754, 22733, 22713, 22692, 22672, ++22652, 22631, 22611, 22591, 22570, ++22550, 22530, 22510, 22490, 22469, ++22449, 22429, 22409, 22390, 22370, ++22350, 22336, 22310, 22290, 22271, ++22251, 22231, 22212, 22192, 22173, ++22153, 22134, 22114, 22095, 22075, ++22056, 22037, 22017, 21998, 21979, ++21960, 21941, 21921, 21902, 21883, ++21864, 21845, 21826, 21807, 21789, ++21770, 21751, 21732, 21713, 21695, ++21676, 21657, 21639, 21620, 21602, ++21583, 21565, 21546, 21528, 21509, ++21491, 21473, 21454, 21436, 21418, ++21400, 21381, 21363, 21345, 21327, ++21309, 21291, 21273, 21255, 21237, ++21219, 21201, 21183, 21166, 21148, ++21130, 21112, 21095, 21077, 21059, ++21042, 21024, 21007, 20989, 20972, ++25679, 25653, 25627, 25601, 25575, ++25549, 25523, 25497, 25471, 25446, ++25420, 25394, 25369, 25343, 25318, ++25292, 25267, 25242, 25216, 25191, ++25166 }; ++ ++static u32 TargetChnl_2G[TARGET_CHNL_NUM_2G] = { // channel 1~14 ++26084, 26030, 25976, 25923, 25869, 25816, 25764, ++25711, 25658, 25606, 25554, 25502, 25451, 25328 ++}; ++ ++ ++#ifdef CONFIG_PCI_HCI ++ #include ++ #include "Hal8192DEHWImg.h" ++ ++ #define RTL819X_DEFAULT_RF_TYPE RF_2T2R ++ ++//--------------------------------------------------------------------- ++// RTL8192DE From file ++//--------------------------------------------------------------------- ++ #define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin" ++ ++ #define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt" ++ #define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt" ++ #define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt" ++ ++ #define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt" ++ #define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt" ++ #define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt" ++ #define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt" ++ #define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt" ++ #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt" ++ #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt" ++ #define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192DE From header ++//--------------------------------------------------------------------- ++ ++ // Fw Array ++ #define Rtl8192D_FwImageArray Rtl8192DEFwImgArray ++ ++ // MAC/BB/PHY Array ++ #define Rtl8192D_MAC_Array Rtl8192DEMAC_2T_Array ++ #define Rtl8192D_AGCTAB_Array Rtl8192DEAGCTAB_Array ++ #define Rtl8192D_AGCTAB_5GArray Rtl8192DEAGCTAB_5GArray ++ #define Rtl8192D_AGCTAB_2GArray Rtl8192DEAGCTAB_2GArray ++ #define Rtl8192D_AGCTAB_2TArray Rtl8192DEAGCTAB_2TArray ++ #define Rtl8192D_AGCTAB_1TArray Rtl8192DEAGCTAB_1TArray ++ #define Rtl8192D_PHY_REG_2TArray Rtl8192DEPHY_REG_2TArray ++ #define Rtl8192D_PHY_REG_1TArray Rtl8192DEPHY_REG_1TArray ++ #define Rtl8192D_PHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG ++ #define Rtl8192D_PHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP ++ #define Rtl8192D_RadioA_2TArray Rtl8192DERadioA_2TArray ++ #define Rtl8192D_RadioA_1TArray Rtl8192DERadioA_1TArray ++ #define Rtl8192D_RadioB_2TArray Rtl8192DERadioB_2TArray ++ #define Rtl8192D_RadioB_1TArray Rtl8192DERadioB_1TArray ++ #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray ++ #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray ++ ++ // Array length ++ #define Rtl8192D_FwImageArrayLength Rtl8192DEImgArrayLength ++ #define Rtl8192D_MAC_ArrayLength Rtl8192DEMAC_2T_ArrayLength ++ #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DEAGCTAB_5GArrayLength ++ #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DEAGCTAB_2GArrayLength ++ #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DEAGCTAB_2TArrayLength ++ #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DEAGCTAB_1TArrayLength ++ #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DEAGCTAB_ArrayLength ++ #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DEPHY_REG_2TArrayLength ++ #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DEPHY_REG_1TArrayLength ++ #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DEPHY_REG_Array_PGLength ++ #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DEPHY_REG_Array_MPLength ++ #define Rtl8192D_RadioA_2TArrayLength Rtl8192DERadioA_2TArrayLength ++ #define Rtl8192D_RadioB_2TArrayLength Rtl8192DERadioB_2TArrayLength ++ #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DERadioA_2T_intPAArrayLength ++ #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DERadioB_2T_intPAArrayLength ++ ++#elif defined(CONFIG_USB_HCI) ++ ++ #include "Hal8192DUHWImg.h" ++#ifdef CONFIG_WOWLAN ++ #include "Hal8192DUHWImg_wowlan.h" ++#endif //CONFIG_WOWLAN ++ #define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ ++//--------------------------------------------------------------------- ++// RTL8192DU From file ++//--------------------------------------------------------------------- ++ #define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin" ++ ++ #define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt" ++ #define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt" ++ #define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt" ++ ++ #define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt" ++ #define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt" ++ #define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt" ++ #define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt" ++ #define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt" ++ #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt" ++ #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt" ++ #define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192DU From header ++//--------------------------------------------------------------------- ++ ++ // Fw Array ++ #define Rtl8192D_FwImageArray Rtl8192DUFwImgArray ++#ifdef CONFIG_WOWLAN ++ #define Rtl8192D_FwWWImageArray Rtl8192DUFwWWImgArray ++#endif //CONFIG_WOWLAN ++ // MAC/BB/PHY Array ++ #define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array ++ #define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array ++ #define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray ++ #define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray ++ #define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray ++ #define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray ++ #define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray ++ #define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray ++ #define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG ++ #define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP ++ #define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray ++ #define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray ++ #define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray ++ #define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray ++ #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray ++ #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray ++ ++ // Array length ++ #define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength ++ #define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength ++ #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength ++ #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength ++ #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength ++ #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength ++ #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength ++ #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength ++ #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength ++ #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength ++ #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength ++ #define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength ++ #define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength ++ #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength ++ #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength ++ ++ // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. ++/* #define Rtl819XFwImageArray Rtl8192DUFwImgArray ++ #define Rtl819XMAC_Array Rtl8192DUMAC_2TArray ++ #define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array ++ #define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray ++ #define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray ++ #define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray ++ #define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray ++ #define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray ++ #define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP ++ ++ #define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray*/ ++ ++#endif ++ ++#define DRVINFO_SZ 4 // unit is 8bytes ++#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) ++ ++// ++// Check if FW header exists. We do not consider the lower 4 bits in this case. ++// By tynli. 2009.12.04. ++// ++#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 ) ++ ++#define FW_8192D_SIZE 0x8020 // Max FW len = 32k + 32(FW header length). ++#define FW_8192D_START_ADDRESS 0x1000 ++#define FW_8192D_END_ADDRESS 0x1FFF ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++typedef enum _FIRMWARE_SOURCE{ ++ FW_SOURCE_IMG_FILE = 0, ++ FW_SOURCE_HEADER_FILE = 1, //from header file ++}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; ++ ++typedef struct _RT_FIRMWARE{ ++ FIRMWARE_SOURCE eFWSource; ++ u8* szFwBuffer; ++ u32 ulFwLength; ++#ifdef CONFIG_WOWLAN ++ u8* szWoWLANFwBuffer; ++ u32 ulWoWLANFwLength; ++#endif //CONFIG_WOWLAN ++}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u8 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++ ++}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME 0x05 ++#define BCN_DMA_ATIME_INT_TIME 0x02 ++ ++typedef enum _BT_CoType{ ++ BT_2Wire = 0, ++ BT_ISSC_3Wire = 1, ++ BT_Accel = 2, ++ BT_CSR = 3, ++ BT_CSR_ENHAN = 4, ++ BT_RTL8756 = 5, ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_CurState{ ++ BT_OFF = 0, ++ BT_ON = 1, ++} BT_CurState, *PBT_CurState; ++ ++typedef enum _BT_ServiceType{ ++ BT_SCO = 0, ++ BT_A2DP = 1, ++ BT_HID = 2, ++ BT_HID_Idle = 3, ++ BT_Scan = 4, ++ BT_Idle = 5, ++ BT_OtherAction = 6, ++ BT_Busy = 7, ++ BT_OtherBusy = 8, ++} BT_ServiceType, *PBT_ServiceType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++typedef struct _BT_COEXIST_STR{ ++ u8 BluetoothCoexist; ++ u8 BT_Ant_Num; ++ u8 BT_CoexistType; ++ u8 BT_State; ++ u8 BT_CUR_State; //0:on, 1:off ++ u8 BT_Ant_isolation; //0:good, 1:bad ++ u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic ++ u8 BT_Service; ++ u8 BT_RadioSharedType; ++ u8 Ratio_Tx; ++ u8 Ratio_PRI; ++}BT_COEXIST_STR, *PBT_COEXIST_STR; ++ ++//Added for 92D IQK setting. ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++#if 1 ++ int Value[1][IQK_Matrix_REG_NUM]; ++#else ++ u32 Mark[IQK_Matrix_REG_NUM]; ++ u32 Value[IQK_Matrix_REG_NUM]; ++#endif ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ ++typedef enum _USB_RX_AGG_MODE{ ++ USB_RX_AGG_DISABLE, ++ USB_RX_AGG_DMA, ++ USB_RX_AGG_USB, ++ USB_RX_AGG_DMA_USB ++}USB_RX_AGG_MODE; ++ ++#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer ++ ++#endif ++ ++ ++#define TX_SELE_HQ BIT(0) // High Queue ++#define TX_SELE_LQ BIT(1) // Low Queue ++#define TX_SELE_NQ BIT(2) // Normal Queue ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++#define TX_TOTAL_PAGE_NUMBER 0xF8 ++#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_PUBQ 0x56 ++ ++ ++// For Test Chip Setting ++// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define TEST_PAGE_NUM_PUBQ_92DU 0x89 ++#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A ++#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A ++#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10 ++#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10 ++#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0 ++ ++#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1) ++ ++// For Test Chip Setting ++#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 ++#define WMM_TEST_PAGE_NUM_HPQ 0x29 ++#define WMM_TEST_PAGE_NUM_LPQ 0x29 ++ ++ ++//Note: For Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82 ++#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30 ++#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30 ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0X32 ++#define WMM_NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0X18 ++#define WMM_NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0X18 ++#define WMM_NORMAL_PAGE_NUM_NPQ_92D_DUAL_MAC 0X18 ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++ ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++// ++// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. ++// ++/* ++ | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | ++ |-------------+-----------+-----------+-------+-----------+-------| ++ | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | ++ | | | TSMC/UMC | | TEST/NORMAL| | ++*/ ++// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 ++// [7] Manufacturer: TSMC=0, UMC=1 ++// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 ++// [3] Chip type: TEST=0, NORMAL=1 ++// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 ++ ++#define CHIP_8723 BIT(0) ++#define CHIP_92D BIT(1) ++#define NORMAL_CHIP BIT(3) ++#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) ++#define RF_TYPE_1T2R BIT(4) ++#define RF_TYPE_2T2R BIT(5) ++#define CHIP_VENDOR_UMC BIT(7) ++#define B_CUT_VERSION BIT(12) ++#define C_CUT_VERSION BIT(13) ++#define D_CUT_VERSION ((BIT(12)|BIT(13))) ++#define E_CUT_VERSION BIT(14) ++ ++ ++// MASK ++#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) ++#define CHIP_TYPE_MASK BIT(3) ++#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) ++#define MANUFACTUER_MASK BIT(7) ++#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) ++#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) ++ ++// Get element ++#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) ++#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) ++#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) ++#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) ++#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) ++#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) ++ ++#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) ++#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) ++#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) ++#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) ++#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) ++#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) ++#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) ++ ++#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) ++#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. ++#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) ++#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) ++ ++#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_E_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_NORMAL_CHIP92D(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) ++ ++typedef enum _VERSION_8192D{ ++ VERSION_TEST_CHIP_88C = 0x0000, ++ VERSION_TEST_CHIP_92C = 0x0020, ++ VERSION_TEST_UMC_CHIP_8723 = 0x0081, ++ VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, ++ VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, ++ VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, ++ VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, ++ VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, ++ VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, ++ VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, ++ VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, ++ VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, ++ VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, ++ VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, ++ VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a, ++ VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a, ++}VERSION_8192D,*PVERSION_8192D; ++ ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++enum ChannelPlan{ ++ CHPL_FCC = 0, ++ CHPL_IC = 1, ++ CHPL_ETSI = 2, ++ CHPL_SPAIN = 3, ++ CHPL_FRANCE = 4, ++ CHPL_MKK = 5, ++ CHPL_MKK1 = 6, ++ CHPL_ISRAEL = 7, ++ CHPL_TELEC = 8, ++ CHPL_GLOBAL = 9, ++ CHPL_WORLD = 10, ++}; ++ ++typedef struct _TxPowerInfo{ ++ u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 TSSI_A[3]; ++ u8 TSSI_B[3]; ++ u8 TSSI_A_5G[3]; //5GL/5GM/5GH ++ u8 TSSI_B_5G[3]; ++}TxPowerInfo, *PTxPowerInfo; ++ ++#define EFUSE_REAL_CONTENT_LEN 1024 ++#define EFUSE_MAP_LEN 256 ++#define EFUSE_MAX_SECTION 32 ++#define EFUSE_MAX_SECTION_BASE 16 ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++ ++typedef enum _PA_MODE { ++ PA_MODE_EXTERNAL = 0x00, ++ PA_MODE_INTERNAL_SP3T = 0x01, ++ PA_MODE_INTERNAL_SPDT = 0x02 ++} PA_MODE; ++ ++/* Copy from rtl8192c */ ++enum c2h_id_8192d { ++ C2H_DBG = 0, ++ C2H_TSF = 1, ++ C2H_AP_RPT_RSP = 2, ++ C2H_CCX_TX_RPT = 3, ++ C2H_BT_RSSI = 4, ++ C2H_BT_OP_MODE = 5, ++ C2H_EXT_RA_RPT = 6, ++ C2H_HW_INFO_EXCH = 10, ++ C2H_C2H_H2C_TEST = 11, ++ C2H_BT_INFO = 12, ++ C2H_BT_MP_INFO = 15, ++ MAX_C2HEVENT ++}; ++ ++#ifdef CONFIG_PCI_HCI ++struct hal_data_8192de ++{ ++ VERSION_8192D VersionID; ++ ++ // add for 92D Phy mode/mac/Band mode ++ MACPHY_MODE_8192D MacPhyMode92D; ++ BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G ++ BAND_TYPE BandSet92D; ++ BOOLEAN bIsVS; ++ BOOLEAN bSupportRemoteWakeUp; ++ u8 AutoLoadStatusFor8192D; ++ ++ BOOLEAN bNOPG; ++ ++ BOOLEAN bMasterOfDMSP; ++ BOOLEAN bSlaveOfDMSP; ++ ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ u32 IntrMask[2]; ++ u32 IntrMaskToSet[2]; ++ ++ u32 DisabledFunctions; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ u32 TransmitConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMDID; ++ u16 EEPROMSVID; ++ u16 EEPROMSMID; ++ u16 EEPROMChannelPlan; ++ u16 EEPROMVersion; ++ ++ u8 EEPROMCustomerID; ++ u8 EEPROMBoardType; ++ u8 EEPROMRegulatory; ++ ++ u8 EEPROMThermalMeter; ++ ++ u8 EEPROMC9; ++ u8 EEPROMCC; ++ u8 PAMode; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ u8 CrystalCap; // CrystalCap. ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ u8 InternalPA5G[2]; //pathA / pathB ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ BOOLEAN bPhyValueInitReady; ++ ++ BOOLEAN bTXPowerDataReadFromEEPORM; ++ ++ BOOLEAN bInSetPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress ++ BOOLEAN bNeedIQK; ++ ++ BOOLEAN bLCKInProgress; ++ ++ BOOLEAN bEarlyModeEnable; ++ ++#if 1 ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++#else ++ //regc80regc94regc4cregc88regc9cregc14regca0regc1cregc78 ++ u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. ++#endif ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegTxPause; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 RegCR_1; ++ ++ struct dm_priv dmpriv; ++ ++ u8 bInterruptMigration; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u16 RegRRSR; ++ ++ u16 EfuseUsedBytes; ++ u8 RTSInitRate; // 2010.11.24.by tynli. ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++ ++// ++// Function disabled. ++// ++#define DF_TX_BIT BIT0 ++#define DF_RX_BIT BIT1 ++#define DF_IO_BIT BIT2 ++#define DF_IO_D3_BIT BIT3 ++ ++#define RT_DF_TYPE u32 ++#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) ++#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) ++#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++//should be renamed and moved to another file ++typedef enum _INTERFACE_SELECT_8192DUSB{ ++ INTF_SEL0_USB = 0, // USB ++ INTF_SEL1_MINICARD = 1, // Minicard ++ INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary ++ INTF_SEL3_PRO = 3, // Customized proprietary ++} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB; ++ ++typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB; ++ ++struct hal_data_8192du ++{ ++ VERSION_8192D VersionID; ++ ++ // add for 92D Phy mode/mac/Band mode ++ MACPHY_MODE_8192D MacPhyMode92D; ++ BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G ++ BAND_TYPE BandSet92D; ++ BOOLEAN bIsVS; ++ ++ BOOLEAN bNOPG; ++ ++ BOOLEAN bSupportRemoteWakeUp; ++ BOOLEAN bMasterOfDMSP; ++ BOOLEAN bSlaveOfDMSP; ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ BOOLEAN bInModeSwitchProcess; ++#endif ++ ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ u16 BasicRateSet; ++ ++ INTERFACE_SELECT_8192DUSB InterfaceSel; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ // ++ // EEPROM setting. ++ // ++ u8 EEPROMVersion; ++ u16 EEPROMVID; ++ u16 EEPROMPID; ++ u16 EEPROMSVID; ++ u16 EEPROMSDID; ++ u8 EEPROMCustomerID; ++ u8 EEPROMSubCustomerID; ++ u8 EEPROMRegulatory; ++ ++ u8 EEPROMThermalMeter; ++ ++ u8 EEPROMC9; ++ u8 EEPROMCC; ++ u8 PAMode; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ u8 CrystalCap; // CrystalCap. ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ u8 InternalPA5G[2]; //pathA / pathB ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ BOOLEAN bPhyValueInitReady; ++ ++ BOOLEAN bTXPowerDataReadFromEEPORM; ++ ++ BOOLEAN bInSetPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress ++ BOOLEAN bNeedIQK; ++ ++ BOOLEAN bLCKInProgress; ++ ++ BOOLEAN bEarlyModeEnable; ++ ++#if 1 ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++#else ++ //regc80regc94regc4cregc88regc9cregc14regca0regc1cregc78 ++ u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. ++#endif ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegTxPause; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 RegCR_1; ++ ++ struct dm_priv dmpriv; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ //Query RF by FW ++ BOOLEAN bReadRFbyFW; ++ ++ // For 92C USB endpoint setting ++ // ++ ++ u32 UsbBulkOutSize; ++ ++ int RtBulkOutPipe[3]; ++ int RtBulkInPipe; ++ int RtIntInPipe; ++ ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u8 OutEpQueueSel; ++ u8 OutEpNumber; ++ ++ u8 Queue2EPNum[8];//for out endpoint number mapping ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 UsbTxAggMode; ++ u8 UsbTxAggDescNum; ++#endif ++#ifdef CONFIG_USB_RX_AGGREGATION ++ u16 HwRxPageSize; // Hardware setting ++ u32 MaxUsbRxAggBlock; ++ ++ USB_RX_AGG_MODE UsbRxAggMode; ++ u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed ++ u8 UsbRxAggBlockTimeout; ++ u8 UsbRxAggPageCount; // 8192C DMA page count ++ u8 UsbRxAggPageTimeout; ++#endif ++ ++ u16 RegRRSR; ++ ++ u16 EfuseUsedBytes; ++ u8 RTSInitRate; // 2010.11.24.by tynli. ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++#endif ++ ++#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) ++#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) ++ ++int FirmwareDownload92D(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); ++VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter); ++void rtl8192d_ReadChipVersion(IN PADAPTER Adapter); ++VOID rtl8192d_EfuseParseChnlPlan(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); ++VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); ++VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter); ++u8 GetEEPROMSize8192D(PADAPTER Adapter); ++BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter); ++VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter); ++//void PHY_ConfigMacPhyMode92D(PADAPTER Adapter); ++void rtl8192d_free_hal_data(_adapter * padapter); ++void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc); ++ ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++ ++extern void Hal_SetAntenna(PADAPTER pAdapter); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetTxPower(PADAPTER pAdapter); ++extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); ++extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetDataRate(PADAPTER pAdapter); ++extern void Hal_SetChannel(PADAPTER pAdapter); ++extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); ++extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); ++extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); ++extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); ++extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++ ++ ++#endif //end CONFIG_MP_INCLUDED ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_led.h +@@ -0,0 +1,43 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192D_LED_H_ ++#define __RTL8192D_LED_H_ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192du_InitSwLeds(_adapter *padapter); ++void rtl8192du_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++void rtl8192de_gen_RefreshLedState(PADAPTER Adapter); ++void rtl8192de_InitSwLeds(_adapter *padapter); ++void rtl8192de_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_recv.h +@@ -0,0 +1,187 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192D_RECV_H_ ++#define _RTL8192D_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF 1024//512//128 ++ #else ++ #define NR_RECVBUFF (16) ++ #endif ++#elif defined(PLATFORM_OS_CE) ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF (128) ++ #else ++ #define NR_RECVBUFF (4) ++ #endif ++#else ++#ifdef CONFIG_SINGLE_RECV_BUF ++ #define NR_RECVBUFF (1) ++#else ++ #define NR_RECVBUFF (4) ++#endif //CONFIG_SINGLE_RECV_BUF ++ #define NR_PREALLOC_RECV_SKB (8) ++#endif ++ ++ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #ifdef CONFIG_PLATFORM_MSTAR ++ #define MAX_RECVBUF_SZ (8192) // 8K ++ #else ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #endif ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++#define RX_MPDU_QUEUE 0 ++#define RX_CMD_QUEUE 1 ++#define RX_MAX_QUEUE 2 ++#endif ++ ++#define RECV_BULK_IN_ADDR 0x80 ++#define RECV_INT_IN_ADDR 0x81 ++ ++#define PHY_RSSI_SLID_WIN_MAX 100 ++#define PHY_LINKQUALITY_SLID_WIN_MAX 20 ++ ++struct phy_stat ++{ ++ unsigned int phydw0; ++ ++ unsigned int phydw1; ++ ++ unsigned int phydw2; ++ ++ unsigned int phydw3; ++ ++ unsigned int phydw4; ++ ++ unsigned int phydw5; ++ ++ unsigned int phydw6; ++ ++ unsigned int phydw7; ++}; ++ ++typedef struct _Phy_OFDM_Rx_Status_Report_8192cd ++{ ++ unsigned char trsw_gain_X[4]; ++ unsigned char pwdb_all; ++ unsigned char cfosho_X[4]; ++ unsigned char cfotail_X[4]; ++ unsigned char rxevm_X[2]; ++ unsigned char rxsnr_X[4]; ++ unsigned char pdsnr_X[2]; ++ unsigned char csi_current_X[2]; ++ unsigned char csi_target_X[2]; ++ unsigned char sigevm; ++ unsigned char max_ex_pwr; ++//#ifdef RTL8192SE ++#ifdef CONFIG_LITTLE_ENDIAN ++ unsigned char ex_intf_flg:1; ++ unsigned char sgi_en:1; ++ unsigned char rxsc:2; ++ //unsigned char rsvd:4; ++ unsigned char idle_long:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char ANTSELB:1; ++ unsigned char ANTSEL:1; ++#else // _BIG_ENDIAN_ ++ //unsigned char rsvd:4; ++ unsigned char ANTSEL:1; ++ unsigned char ANTSELB:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char idle_long:1; ++ unsigned char rxsc:2; ++ unsigned char sgi_en:1; ++ unsigned char ex_intf_flg:1; ++#endif ++//#else // RTL8190, RTL8192E ++// unsigned char sgi_en; ++// unsigned char rxsc_sgien_exflg; ++//#endif ++}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; ++ ++typedef struct _Phy_CCK_Rx_Status_Report_8192cd ++{ ++ /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend ++ 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ ++ u8 adc_pwdb_X[4]; ++ u8 SQ_rpt; ++ u8 cck_agc_rpt; ++} PHY_STS_CCK_8192CD_T; ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _INTERRUPT_MSG_FORMAT_EX{ ++ unsigned int C2H_MSG0; ++ unsigned int C2H_MSG1; ++ unsigned int C2H_MSG2; ++ unsigned int C2H_MSG3; ++ unsigned int HISR; // from HISR Reg0x124, read to clear ++ unsigned int HISRE;// from HISRE Reg0x12c, read to clear ++ unsigned int MSG_EX; ++}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; ++ ++void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++int rtl8192du_init_recv_priv(_adapter * padapter); ++void rtl8192du_free_recv_priv(_adapter * padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++int rtl8192de_init_recv_priv(_adapter * padapter); ++void rtl8192de_free_recv_priv(_adapter * padapter); ++#endif ++ ++void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info); ++void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_rf.h +@@ -0,0 +1,97 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192d_rf.h ( Header File) ++ * ++ * Note: Collect every HAL RF type exter API or constant. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * ++ * ++******************************************************************************/ ++#ifndef _RTL8192D_RF_H_ ++#define _RTL8192D_RF_H_ ++/* Check to see if the file has been included already. */ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++// ++// For RF 6052 Series ++// ++#define RF6052_MAX_TX_PWR 0x3F ++#define RF6052_MAX_REG 0x3F ++#define RF6052_MAX_PATH 2 ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// RF RL6052 Series API ++// ++void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate); ++void rtl8192d_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth); ++VOID rtl8192d_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel); ++VOID rtl8192d_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel); ++int PHY_RF6052_Config8192D( IN PADAPTER Adapter ); ++ ++BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); ++ ++void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++ ++#endif/* End of HalRf.h */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_spec.h +@@ -0,0 +1,1841 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTL8192D_SPEC_H__ ++#define __RTL8192D_SPEC_H__ ++ ++#include ++ ++#ifndef BIT ++#define BIT(x) (1 << (x)) ++#endif ++ ++#define BIT0 0x00000001 ++#define BIT1 0x00000002 ++#define BIT2 0x00000004 ++#define BIT3 0x00000008 ++#define BIT4 0x00000010 ++#define BIT5 0x00000020 ++#define BIT6 0x00000040 ++#define BIT7 0x00000080 ++#define BIT8 0x00000100 ++#define BIT9 0x00000200 ++#define BIT10 0x00000400 ++#define BIT11 0x00000800 ++#define BIT12 0x00001000 ++#define BIT13 0x00002000 ++#define BIT14 0x00004000 ++#define BIT15 0x00008000 ++#define BIT16 0x00010000 ++#define BIT17 0x00020000 ++#define BIT18 0x00040000 ++#define BIT19 0x00080000 ++#define BIT20 0x00100000 ++#define BIT21 0x00200000 ++#define BIT22 0x00400000 ++#define BIT23 0x00800000 ++#define BIT24 0x01000000 ++#define BIT25 0x02000000 ++#define BIT26 0x04000000 ++#define BIT27 0x08000000 ++#define BIT28 0x10000000 ++#define BIT29 0x20000000 ++#define BIT30 0x40000000 ++#define BIT31 0x80000000 ++ ++ ++//============================================================ ++// 8192D Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL 0x0000 ++#define REG_SYS_FUNC_EN 0x0002 ++#define REG_APS_FSMCO 0x0004 ++#define REG_SYS_CLKR 0x0008 ++#define REG_9346CR 0x000A ++#define REG_EE_VPD 0x000C ++#define REG_AFE_MISC 0x0010 ++#define REG_SPS0_CTRL 0x0011 ++#define REG_POWER_OFF_IN_PROCESS 0x0017 ++#define REG_SPS_OCP_CFG 0x0018 ++#define REG_RSV_CTRL 0x001C ++#define REG_RF_CTRL 0x001F ++#define REG_LDOA15_CTRL 0x0020 ++#define REG_LDOV12D_CTRL 0x0021 ++#define REG_LDOHCI12_CTRL 0x0022 ++#define REG_LPLDO_CTRL 0x0023 ++#define REG_AFE_XTAL_CTRL 0x0024 ++#define REG_AFE_PLL_CTRL 0x0028 ++#define REG_MAC_PHY_CTRL 0x002c //for 92d, DMDP,SMSP,DMSP contrl ++#define REG_EFUSE_CTRL 0x0030 ++#define REG_EFUSE_TEST 0x0034 ++#define REG_PWR_DATA 0x0038 ++#define REG_CAL_TIMER 0x003C ++#define REG_ACLK_MON 0x003E ++#define REG_GPIO_MUXCFG 0x0040 ++//#define REG_GPIO_MUXCFG 0x0041 ++#define REG_GPIO_IO_SEL 0x0042 ++#define REG_MAC_PINMUX_CFG 0x0043 ++#define REG_GPIO_PIN_CTRL 0x0044 ++#define REG_GPIO_INTM 0x0048 ++#define REG_LEDCFG0 0x004C ++#define REG_LEDCFG1 0x004D ++#define REG_LEDCFG2 0x004E ++#define REG_LEDCFG3 0x004F ++#define REG_FSIMR 0x0050 ++#define REG_FSISR 0x0054 ++ ++#define REG_MCUFWDL 0x0080 ++#ifdef CONFIG_WOWLAN ++#define REG_WOWLAN_REASON 0x00FC ++#endif // CONFIG_WOWLAN ++#define REG_HMEBOX_EXT_0 0x0088 ++#define REG_HMEBOX_EXT_1 0x008A ++#define REG_HMEBOX_EXT_2 0x008C ++#define REG_HMEBOX_EXT_3 0x008E ++ ++#define REG_BIST_SCAN 0x00D0 ++#define REG_BIST_RPT 0x00D4 ++#define REG_BIST_ROM_RPT 0x00D8 ++#define REG_USB_SIE_INTF 0x00E0 ++#define REG_PCIE_MIO_INTF 0x00E4 ++#define REG_PCIE_MIO_INTD 0x00E8 ++#define REG_HPON_FSM 0x00EC ++#define REG_SYS_CFG 0x00F0 ++#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 ++ ++#define REG_MAC0 0x0081 ++#define REG_MAC1 0x0053 ++#define FW_MAC0_ready 0x18 ++#define FW_MAC1_ready 0x1A ++#define MAC0_ON BIT7 ++#define MAC1_ON BIT0 ++#define mac0_ready BIT0 ++#define mac1_ready BIT0 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR 0x0100 ++#define REG_PBP 0x0104 ++#define REG_TRXDMA_CTRL 0x010C ++#define REG_TRXFF_BNDY 0x0114 ++#define REG_TRXFF_STATUS 0x0118 ++#define REG_RXFF_PTR 0x011C ++#define REG_HIMR 0x0120 ++#define REG_HISR 0x0124 ++#define REG_HIMRE 0x0128 ++#define REG_HISRE 0x012C ++#define REG_CPWM 0x012F ++#define REG_FWIMR 0x0130 ++#define REG_FWISR 0x0134 ++#define REG_FTIMR 0x0138 ++#define REG_PKTBUF_DBG_CTRL 0x0140 ++#define REG_PKTBUF_DBG_DATA_L 0x0144 ++#define REG_PKTBUF_DBG_DATA_H 0x0148 ++ ++#define REG_TC0_CTRL 0x0150 ++#define REG_TC1_CTRL 0x0154 ++#define REG_TC2_CTRL 0x0158 ++#define REG_TC3_CTRL 0x015C ++#define REG_TC4_CTRL 0x0160 ++#define REG_TCUNIT_BASE 0x0164 ++#define REG_MBIST_START 0x0174 ++#define REG_MBIST_DONE 0x0178 ++#define REG_MBIST_FAIL 0x017C ++#define REG_C2HEVT_MSG_NORMAL 0x01A0 ++#define REG_C2HEVT_CLEAR 0x01AF ++#define REG_C2HEVT_MSG_TEST 0x01B8 ++#define REG_MCUTST_1 0x01c0 ++#define REG_FMETHR 0x01C8 ++#define REG_HMETFR 0x01CC ++#define REG_HMEBOX_0 0x01D0 ++#define REG_HMEBOX_1 0x01D4 ++#define REG_HMEBOX_2 0x01D8 ++#define REG_HMEBOX_3 0x01DC ++ ++#define REG_LLT_INIT 0x01E0 ++#define REG_BB_ACCEESS_CTRL 0x01E8 ++#define REG_BB_ACCESS_DATA 0x01EC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN 0x0200 ++#define REG_FIFOPAGE 0x0204 ++#define REG_TDECTRL 0x0208 ++#define REG_TXDMA_OFFSET_CHK 0x020C ++#define REG_TXDMA_STATUS 0x0210 ++#define REG_RQPN_NPQ 0x0214 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH 0x0280 ++#define REG_RXPKT_NUM 0x0284 ++#define REG_RXDMA_STATUS 0x0288 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG 0x0300 ++#define REG_INT_MIG 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address ++#define REG_DBI 0x0348 // Backdoor REG for Access Configuration ++//sherry added for DBI Read/Write 20091126 ++#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration ++#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration ++#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration ++#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_DBG_SEL 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM ++#define REG_UART_CTRL 0x0364 // UART Control ++#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address ++#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address ++ ++ ++// spec version 11 ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION 0x0400 ++#define REG_VIQ_INFORMATION 0x0404 ++#define REG_BEQ_INFORMATION 0x0408 ++#define REG_BKQ_INFORMATION 0x040C ++#define REG_MGQ_INFORMATION 0x0410 ++#define REG_HGQ_INFORMATION 0x0414 ++#define REG_BCNQ_INFORMATION 0x0418 ++ ++ ++#define REG_CPU_MGQ_INFORMATION 0x041C ++#define REG_FWHW_TXQ_CTRL 0x0420 ++#define REG_HWSEQ_CTRL 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY 0x0425 ++#define REG_LIFETIME_EN 0x0426 ++#define REG_MULTI_BCNQ_OFFSET 0x0427 ++#define REG_SPEC_SIFS 0x0428 ++#define REG_RL 0x042A ++#define REG_DARFRC 0x0430 ++#define REG_RARFRC 0x0438 ++#define REG_RRSR 0x0440 ++#define REG_ARFR0 0x0444 ++#define REG_ARFR1 0x0448 ++#define REG_ARFR2 0x044C ++#define REG_ARFR3 0x0450 ++#define REG_AGGLEN_LMT 0x0458 ++#define REG_AMPDU_MIN_SPACE 0x045C ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D ++#define REG_FAST_EDCA_CTRL 0x0460 ++#define REG_RD_RESP_PKT_TH 0x0463 ++#define REG_INIRTS_RATE_SEL 0x0480 ++#define REG_INIDATA_RATE_SEL 0x0484 ++ ++//#define REG_FW_TSF_SYNC_CNT 0x04A0 ++#define REG_FW_RESET_TSF_CNT_1 0x05FC ++#define REG_FW_RESET_TSF_CNT_0 0x05FD ++#define REG_FW_BCN_DIS_CNT 0x05FE ++ ++#define REG_POWER_STATUS 0x04A4 ++#define REG_POWER_STAGE1 0x04B4 ++#define REG_POWER_STAGE2 0x04B8 ++#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 ++#define REG_STBC_SETTING 0x04C4 ++#define REG_PROT_MODE_CTRL 0x04C8 ++#define REG_MAX_AGGR_NUM 0x04CA ++#define REG_RTS_MAX_AGGR_NUM 0x04CB ++#define REG_BAR_MODE_CTRL 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT 0x04CF ++#define REG_EARLY_MODE_CONTROL 0x04D0 ++#define REG_NQOS_SEQ 0x04DC ++#define REG_QOS_SEQ 0x04DE ++#define REG_NEED_CPU_HANDLE 0x04E0 ++#define REG_PKT_LOSE_RPT 0x04E1 ++#define REG_PTCL_ERR_STATUS 0x04E2 ++#define REG_DUMMY 0x04FC ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM 0x0500 ++#define REG_EDCA_VI_PARAM 0x0504 ++#define REG_EDCA_BE_PARAM 0x0508 ++#define REG_EDCA_BK_PARAM 0x050C ++#define REG_BCNTCFG 0x0510 ++#define REG_PIFS 0x0512 ++#define REG_RDG_PIFS 0x0513 ++#define REG_SIFS_CTX 0x0514 ++#define REG_SIFS_TRX 0x0516 ++#define REG_TSFTR_SYN_OFFSET 0x0518 ++#define REG_AGGR_BREAK_TIME 0x051A ++#define REG_SLOT 0x051B ++#define REG_TX_PTCL_CTRL 0x0520 ++#define REG_TXPAUSE 0x0522 ++#define REG_DIS_TXREQ_CLR 0x0523 ++#define REG_RD_CTRL 0x0524 ++#define REG_TBTT_PROHIBIT 0x0540 ++#define REG_RD_NAV_NXT 0x0544 ++#define REG_NAV_PROT_LEN 0x0546 ++#define REG_BCN_CTRL 0x0550 ++#define REG_BCN_CTRL_1 0x0551 ++#define REG_MBID_NUM 0x0552 ++#define REG_DUAL_TSF_RST 0x0553 ++#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE ++#define REG_MBSSID_BCN_SPACE 0x0554 ++#define REG_DRVERLYINT 0x0558 ++#define REG_BCNDMATIM 0x0559 ++#define REG_ATIMWND 0x055A ++#define REG_USTIME_TSF 0x055C ++#define REG_BCN_MAX_ERR 0x055D ++#define REG_RXTSF_OFFSET_CCK 0x055E ++#define REG_RXTSF_OFFSET_OFDM 0x055F ++#define REG_TSFTR 0x0560 ++#define REG_TSFTR1 0x0568 ++#define REG_INIT_TSFTR 0x0564 ++#define REG_ATIMWND_1 0x0570 ++#define REG_PSTIMER 0x0580 ++#define REG_TIMER0 0x0584 ++#define REG_TIMER1 0x0588 ++#define REG_ACMHWCTRL 0x05C0 ++#define REG_ACMRSTCTRL 0x05C1 ++#define REG_ACMAVG 0x05C2 ++#define REG_VO_ADMTIME 0x05C4 ++#define REG_VI_ADMTIME 0x05C6 ++#define REG_BE_ADMTIME 0x05C8 ++#define REG_EDCA_RANDOM_GEN 0x05CC ++#define REG_SCH_TXCMD 0x05D0 ++ ++#define REG_DMC 0x05F0 //Dual MAC Co-Existence Register ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_APSD_CTRL 0x0600 ++#define REG_BWOPMODE 0x0603 ++#define REG_TCR 0x0604 ++#define REG_RCR 0x0608 ++#define REG_RX_PKT_LIMIT 0x060C ++#define REG_RX_DLK_TIME 0x060D ++#define REG_RX_DRVINFO_SZ 0x060F ++ ++#define REG_MACID 0x0610 ++#define REG_BSSID 0x0618 ++#define REG_MAR 0x0620 ++#define REG_MBIDCAMCFG 0x0628 ++ ++#define REG_USTIME_EDCA 0x0638 ++#define REG_MAC_SPEC_SIFS 0x063A ++#define REG_RESP_SIFS_CCK 0x063C ++#define REG_RESP_SIFS_OFDM 0x063E ++#define REG_ACKTO 0x0640 ++#define REG_CTS2TO 0x0641 ++#define REG_EIFS 0x0642 ++ ++ ++//WMA, BA, CCX ++#define REG_NAV_CTRL 0x0650 ++#define REG_BACAMCMD 0x0654 ++#define REG_BACAMCONTENT 0x0658 ++#define REG_LBDLY 0x0660 ++#define REG_FWDLY 0x0661 ++#define REG_RXERR_RPT 0x0664 ++#define REG_WMAC_TRXPTCL_CTL 0x0668 ++ ++ ++// Security ++#define REG_CAMCMD 0x0670 ++#define REG_CAMWRITE 0x0674 ++#define REG_CAMREAD 0x0678 ++#define REG_CAMDBG 0x067C ++#define REG_SECCFG 0x0680 ++ ++// Power ++#define REG_WOW_CTRL 0x0690 ++#define REG_PSSTATUS 0x0691 ++#define REG_PS_RX_INFO 0x0692 ++#define REG_LPNAV_CTRL 0x0694 ++#define REG_WKFMCAM_CMD 0x0698 ++#define REG_WKFMCAM_RWD 0x069C ++#define REG_RXFLTMAP0 0x06A0 ++#define REG_RXFLTMAP1 0x06A2 ++#define REG_RXFLTMAP2 0x06A4 ++#define REG_BCN_PSR_RPT 0x06A8 ++#define REG_CALB32K_CTRL 0x06AC ++#define REG_PKT_MON_CTRL 0x06B4 ++#define REG_BT_COEX_TABLE 0x06C0 ++#define REG_WMAC_RESP_TXINFO 0x06D8 ++ ++#define REG_MACID1 0x0700 ++#define REG_BSSID1 0x0708 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++// for 92DU high_Queue low_Queue Normal_Queue select ++#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 ++//#define REG_USB_LOW_Queue_Select_MAC0 0xFE45 ++#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 ++//#define REG_USB_LOW_Queue_Select_MAC1 0xFE48 ++ ++// For test chip ++#define REG_TEST_USB_TXQS 0xFE48 ++#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_TEST_SIE_OPTIONAL 0xFE64 ++#define REG_TEST_SIE_CHIRP_K 0xFE65 ++#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B ++#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 ++ ++ ++// For normal chip ++#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_NORMAL_SIE_OPTIONAL 0xFE64 ++#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 ++#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B ++#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++ ++#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. ++#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. ++#define SYS_CLK REG_SYS_CLKR ++#define CR9346 REG_9346CR // 93C46/93C56 Command Register. ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. ++#define MSR (REG_CR + 2) // Media Status register ++#define ISR REG_HISR ++#define TSFR REG_TSFTR // Timing Sync Function Timer Register. ++ ++#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 ++#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++#define PBP REG_PBP ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0 MACIDR0 ++#define IDR4 MACIDR4 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI REG_CAMWRITE // Software write CAM input content ++#define RCAMO REG_CAMREAD // Software read/write CAM config ++#define CAMDBG REG_CAMDBG ++#define SECR REG_SECCFG //Security Configuration Register ++ ++// Unused register ++#define UnusedRegister 0x1BF ++#define DCAM UnusedRegister ++#define PSR UnusedRegister ++#define BBAddr UnusedRegister ++#define PhyDataR UnusedRegister ++ ++#define InvalidBBRFValue 0x12345678 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C Cmd9346CR bits (Offset 0xA, 16bit) ++//---------------------------------------------------------------------------- ++#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 ++#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 ++#define Cmd9346CR_9356SEL BIT4 ++#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) ++#define AutoLoadEFUSE CmdEEPROM_En ++ ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) ++//---------------------------------------------------------------------------- ++/* ++Network Type ++00: No link ++01: Link in ad hoc network ++10: Link in infrastructure network ++11: AP mode ++Default: 00b. ++*/ ++#define MSR_NOLINK 0x00 ++#define MSR_ADHOC 0x01 ++#define MSR_INFRA 0x02 ++#define MSR_AP 0x03 ++ ++// ++// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) ++// ++//---------------------------------------------------------------------------- ++// 8192C Response Rate Set Register (offset 0x181, 24bits) ++//---------------------------------------------------------------------------- ++#define RRSR_RSC_OFFSET 21 ++#define RRSR_SHORT_OFFSET 23 ++#define RRSR_RSC_BW_40M 0x600000 ++#define RRSR_RSC_UPSUBCHNL 0x400000 ++#define RRSR_RSC_LOWSUBCHNL 0x200000 ++#define RRSR_SHORT 0x800000 ++#define RRSR_1M BIT0 ++#define RRSR_2M BIT1 ++#define RRSR_5_5M BIT2 ++#define RRSR_11M BIT3 ++#define RRSR_6M BIT4 ++#define RRSR_9M BIT5 ++#define RRSR_12M BIT6 ++#define RRSR_18M BIT7 ++#define RRSR_24M BIT8 ++#define RRSR_36M BIT9 ++#define RRSR_48M BIT10 ++#define RRSR_54M BIT11 ++#define RRSR_MCS0 BIT12 ++#define RRSR_MCS1 BIT13 ++#define RRSR_MCS2 BIT14 ++#define RRSR_MCS3 BIT15 ++#define RRSR_MCS4 BIT16 ++#define RRSR_MCS5 BIT17 ++#define RRSR_MCS6 BIT18 ++#define RRSR_MCS7 BIT19 ++#define BRSR_AckShortPmb BIT23 ++// CCK ACK: use Short Preamble or not ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C Rate Definition ++//---------------------------------------------------------------------------- ++//CCK ++#define RATR_1M 0x00000001 ++#define RATR_2M 0x00000002 ++#define RATR_55M 0x00000004 ++#define RATR_11M 0x00000008 ++//OFDM ++#define RATR_6M 0x00000010 ++#define RATR_9M 0x00000020 ++#define RATR_12M 0x00000040 ++#define RATR_18M 0x00000080 ++#define RATR_24M 0x00000100 ++#define RATR_36M 0x00000200 ++#define RATR_48M 0x00000400 ++#define RATR_54M 0x00000800 ++//MCS 1 Spatial Stream ++#define RATR_MCS0 0x00001000 ++#define RATR_MCS1 0x00002000 ++#define RATR_MCS2 0x00004000 ++#define RATR_MCS3 0x00008000 ++#define RATR_MCS4 0x00010000 ++#define RATR_MCS5 0x00020000 ++#define RATR_MCS6 0x00040000 ++#define RATR_MCS7 0x00080000 ++//MCS 2 Spatial Stream ++#define RATR_MCS8 0x00100000 ++#define RATR_MCS9 0x00200000 ++#define RATR_MCS10 0x00400000 ++#define RATR_MCS11 0x00800000 ++#define RATR_MCS12 0x01000000 ++#define RATR_MCS13 0x02000000 ++#define RATR_MCS14 0x04000000 ++#define RATR_MCS15 0x08000000 ++ ++//---------------------------------------------------------------------------- ++// 8192C BW_OPMODE bits (Offset 0x203, 8bit) ++//---------------------------------------------------------------------------- ++#define BW_OPMODE_20MHZ BIT2 ++#define BW_OPMODE_5G BIT1 ++#define BW_OPMODE_11J BIT0 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C CAM Config Setting (offset 0x250, 1 byte) ++//---------------------------------------------------------------------------- ++#define CAM_VALID BIT15 ++#define CAM_NOTVALID 0x0000 ++#define CAM_USEDK BIT5 ++ ++#define CAM_CONTENT_COUNT 8 ++ ++#define CAM_NONE 0x0 ++#define CAM_WEP40 0x01 ++#define CAM_TKIP 0x02 ++#define CAM_AES 0x04 ++#define CAM_WEP104 0x05 ++#define CAM_SMS4 0x6 ++ ++ ++#define TOTAL_CAM_ENTRY 32 ++#define HALF_CAM_ENTRY 16 ++ ++#define CAM_CONFIG_USEDK _TRUE ++#define CAM_CONFIG_NO_USEDK _FALSE ++ ++#define CAM_WRITE BIT16 ++#define CAM_READ 0x00000000 ++#define CAM_POLLINIG BIT31 ++ ++#define SCR_UseDK 0x01 ++#define SCR_TxSecEnable 0x02 ++#define SCR_RxSecEnable 0x04 ++ ++ ++// ++// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) ++// ++//---------------------------------------------------------------------------- ++// 8190 IMR/ISR bits (offset 0xfd, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR8190_DISABLED 0x0 ++// IMR DW0 Bit 0-31 ++#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 ++#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 ++#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 ++#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 ++#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow ++#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt ++#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 ++#define IMR_RXFOVW BIT12 // Receive FIFO Overflow ++#define IMR_RDU BIT11 // Receive Descriptor Unavailable ++#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt ++#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup ++#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt ++#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup ++#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt ++#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt ++#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt ++#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt ++#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt ++#define IMR_VODOK BIT1 // AC_VO DMA Interrupt ++#define IMR_ROK BIT0 // Receive DMA OK Interrupt ++ ++// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) ++#define IMR_TXERR BIT11 ++#define IMR_RXERR BIT10 ++#define IMR_C2HCMD BIT9 ++#define IMR_CPWM BIT8 ++//RSVD [2-7] ++#define IMR_OCPINT BIT1 ++#define IMR_WLANOFF BIT0 ++ ++ ++ ++//---------------------------------------------------------------------------- ++// 8192D EFUSE ++//---------------------------------------------------------------------------- ++#define HWSET_MAX_SIZE 256 ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++// ++// Default Value for EEPROM or EFUSE!!! ++// ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_TxPowerDiff 0x0 ++#define EEPROM_Default_CrystalCap 0x0 //92D default 0x0 ++#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) ++#define EEPROM_Default_TxPower 0x1010 ++#define EEPROM_Default_HT2T_TxPwr 0x10 ++ ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 ++#define EEPROM_Default_ThermalMeter 0x12 ++ ++#define EEPROM_Default_AntTxPowerDiff 0x0 ++//#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 ++#define EEPROM_Default_TxPowerLevel_2G 0x2C ++#define EEPROM_Default_TxPowerLevel_5G 0x22 ++ ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 //OFDM Tx Power index diff ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++// For debug ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_Default_externalPA_C9 0x00 ++#define EEPROM_Default_externalPA_CC 0xFF ++#define EEPROM_Default_internalPA_SP3T_C9 0xAA ++#define EEPROM_Default_internalPA_SP3T_CC 0xAF ++#define EEPROM_Default_internalPA_SPDT_C9 0xAA ++#ifdef CONFIG_PCI_HCI ++#define EEPROM_Default_internalPA_SPDT_CC 0xA0 ++#else ++#define EEPROM_Default_internalPA_SPDT_CC 0xFA ++#endif ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC 0xB ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define RTL8192_EEPROM_ID 0x8129 ++#define EEPROM_WAPI_SUPPORT 0x78 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) ++#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) ++#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) ++ ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0x28 // SE Vendor ID.A-B ++#define EEPROM_DID 0x2A // SE Device ID. C-D ++#define EEPROM_SVID 0x2C // SE Vendor ID.E-F ++#define EEPROM_SMID 0x2E // SE PCI Subsystem ID. 10-11 ++ ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++#define EEPROM_MAC_ADDR_MAC0_92D 0x55 ++#define EEPROM_MAC_ADDR_MAC1_92D 0x5B ++//---------------------------------------------------------------- ++// 2.4G band Tx power index setting ++#define EEPROM_CCK_TX_PWR_INX_2G 0x61 ++#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D ++#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 ++#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 ++#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 ++ ++//5GL channel 32-64 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E ++ ++//5GM channel 100-140 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 ++ ++//5GH channel 149-165 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 ++ ++#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. ++#define EEPROM_IQK_DELTA 0xBC ++#define EEPROM_LCK_DELTA 0xBC ++#define EEPROM_XTAL_K 0xBD //[7:5] ++#define EEPROM_TSSI_A_5G 0xBE ++#define EEPROM_TSSI_B_5G 0xBF ++#define EEPROM_TSSI_AB_5G 0xC0 ++#define EEPROM_THERMAL_METER 0xC3 //[4:0] ++#define EEPROM_PATHDIV 0xC4 ++#define EEPROM_RF_OPT1 0xC4 ++#define EEPROM_RF_OPT2 0xC5 ++#define EEPROM_RF_OPT3 0xC6 ++#define EEPROM_RF_OPT4 0xC7 ++#define EEPROM_RF_OPT5 0xC8 ++#define EEPROM_RF_OPT6 0xC9 ++#define EEPROM_VERSION 0xCA ++#define EEPROM_CUSTOMER_ID 0xCB ++#define EEPROM_RF_OPT7 0xCC ++ ++#define EEPROM_WIDIPAIRING_ADDR 0xF0 ++#define EEPROM_WIDIPAIRING_KEY 0xF6 ++ ++#define EEPROM_DEF_PART_NO 0x3FD //Byte ++#define EEPROME_CHIP_VERSION_L 0x3FF ++#define EEPROME_CHIP_VERSION_H 0x3FE ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0xC // SE Vendor ID.A-B ++#define EEPROM_PID 0xE // SE Device ID. C-D ++#define EEPROM_ENDPOINT_SETTING 0x10 ++#ifdef CONFIG_WOWLAN ++#define EEPROM_Option_Setting 0x11 ++#endif // CONFIG_WOWLAN ++#define EEPROM_CHIRP_K 0x12 // Changed ++#define EEPROM_USB_PHY 0x13 // Changed ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++#define EEPROM_STRING 0x1F ++#define EEPROM_SUBCUSTOMER_ID 0x59 ++ ++#define EEPROM_MAC_ADDR_MAC0_92D 0x19 ++#define EEPROM_MAC_ADDR_MAC1_92D 0x5B ++//---------------------------------------------------------------- ++// 2.4G band Tx power index setting ++#define EEPROM_CCK_TX_PWR_INX_2G 0x61 ++#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D ++#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 ++#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 ++#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 ++ ++//5GL channel 32-64 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E ++ ++//5GM channel 100-140 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 ++ ++//5GH channel 149-165 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 ++ ++#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. ++#define EEPROM_TEST_CHANNEL_PLAN 0xBB ++#define EEPROM_IQK_DELTA 0xBC ++#define EEPROM_LCK_DELTA 0xBC ++#define EEPROM_XTAL_K 0xBD //[7:5] ++#define EEPROM_TSSI_A_5G 0xBE ++#define EEPROM_TSSI_B_5G 0xBF ++#define EEPROM_TSSI_AB_5G 0xC0 ++#define EEPROM_THERMAL_METER 0xC3 //[4:0] ++#define EEPROM_RF_OPT1 0xC4 ++#define EEPROM_RF_OPT2 0xC5 ++#define EEPROM_RF_OPT3 0xC6 ++#define EEPROM_RF_OPT4 0xC7 ++#define EEPROM_RF_OPT5 0xC8 ++#define EEPROM_RF_OPT6 0xC9 ++#define EEPROM_VERSION 0xCA ++#define EEPROM_CUSTOMER_ID 0xCB ++#define EEPROM_RF_OPT7 0xCC ++ ++#define EEPROM_DEF_PART_NO 0x3FD //Byte ++#define EEPROME_CHIP_VERSION_L 0x3FF ++#define EEPROME_CHIP_VERSION_H 0x3FE ++ ++//------------------------------------------------------------- ++// EEPROM content definitions ++//------------------------------------------------------------- ++#define OS_LINK_SPEED_NORMAL_MASK BIT3 | BIT2 ++#define OS_LINK_SPEED_TEST_MASK BIT3 | BIT4 ++ ++#define BOARD_TYPE_NORMAL_MASK 0xE0 ++#define BOARD_TYPE_TEST_MASK 0xF ++ ++#define BT_COEXISTENCE_TEST BIT4 ++#define BT_COEXISTENCE_NORMAL BIT5 ++ ++#define BT_CO_SHIFT_TEST 4 ++#define BT_CO_SHIFT_NORMAL 5 ++ ++#define EP_NUMBER_MASK_TEST 0x30 //bit 4:5 0Eh ++#define EP_NUMBER_SHIFT_TEST 4 ++ ++#define USB_PHY_PARA_SIZE_TEST 6 ++#define USB_PHY_PARA_SIZE_NORMAL 4 ++ ++//------------------------------------------------------------- ++// EEPROM default value definitions ++//------------------------------------------------------------- ++// Use 0xABCD instead of 0x8192 for debug ++#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 ++#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 ++ ++#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 ++#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 ++#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 ++ ++#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A ++#define EEPROM_DEF_VID_1 0x0B ++ ++#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C ++#define EEPROM_DEF_PID_1 0x81 ++ ++ ++#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E ++#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E ++ ++#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F ++ ++#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 ++#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 ++#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 ++#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 ++ ++#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 ++#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 ++ ++ ++#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A ++ ++ ++#define EEPROM_USB_SN BIT(0) ++#define EEPROM_USB_REMOTE_WAKEUP BIT(1) ++#define EEPROM_USB_DEVICE_PWR BIT(2) ++#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) ++ ++#if 0 ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define EEPROM_CID_DEFAULT 0x0 ++ ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++ ++#endif ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++/* ++Based on Datasheet V33---090401 ++Register Summary ++Current IOREG MAP ++0x0000h ~ 0x00FFh System Configuration (256 Bytes) ++0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) ++0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) ++0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) ++0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) ++0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) ++0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) ++0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) ++0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) ++*/ ++ ++//---------------------------------------------------------------------------- ++// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) ++//---------------------------------------------------------------------------- ++#define RCR_APPFCS BIT31 //WMAC append FCS after pauload ++#define RCR_APP_MIC BIT30 // ++#define RCR_APP_ICV BIT29 // ++#define RCR_APP_PHYST_RXFF BIT28 // ++#define RCR_APP_BA_SSN BIT27 //Accept BA SSN ++#define RCR_ENMBID BIT24 //Enable Multiple BssId. ++#define RCR_LSIGEN BIT23 ++#define RCR_MFBEN BIT22 ++#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 ++#define RCR_AMF BIT13 //Accept management type frame ++#define RCR_ACF BIT12 //Accept control type frame ++#define RCR_ADF BIT11 //Accept data type frame ++#define RCR_AICV BIT9 //Accept ICV error packet ++#define RCR_ACRC32 BIT8 //Accept CRC32 error packet ++#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) ++#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) ++#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet ++#define RCR_APWRMGT BIT5 //Accept power management packet ++#define RCR_ADD3 BIT4 //Accept address 3 match packet ++#define RCR_AB BIT3 //Accept broadcast packet ++#define RCR_AM BIT2 //Accept multicast packet ++#define RCR_APM BIT1 //Accept physical match packet ++#define RCR_AAP BIT0 //Accept all unicast packet ++#define RCR_MXDMA_OFFSET 8 ++#define RCR_FIFO_OFFSET 13 ++ ++ ++ ++//============================================================================ ++// 8192c USB specific Regsiter Offset and Content definition, ++// 2009.08.18, added by vivi. for merge 92c and 92C into one driver ++//============================================================================ ++//#define APS_FSMCO 0x0004 same with 92Ce ++#define RSV_CTRL 0x001C ++#define RD_CTRL 0x0524 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++#define REG_USB_VID 0xFE60 ++#define REG_USB_PID 0xFE62 ++#define REG_USB_OPTIONAL 0xFE64 ++#define REG_USB_CHIRP_K 0xFE65 ++#define REG_USB_PHY 0xFE66 ++#define REG_USB_MAC_ADDR 0xFE70 ++ ++#define REG_USB_HRPWM 0xFE58 ++#define REG_USB_HCPWM 0xFE57 ++ ++#define InvalidBBRFValue 0x12345678 ++ ++//============================================================================ ++// 8192C Regsiter Bit and Content definition ++//============================================================================ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++ ++//2 SPS0_CTRL ++#define SW18_FPWM BIT(3) ++ ++ ++//2 SYS_ISO_CTRL ++#define ISO_MD2PP BIT(0) ++#define ISO_UA2USB BIT(1) ++#define ISO_UD2CORE BIT(2) ++#define ISO_PA2PCIE BIT(3) ++#define ISO_PD2CORE BIT(4) ++#define ISO_IP2MAC BIT(5) ++#define ISO_DIOP BIT(6) ++#define ISO_DIOE BIT(7) ++#define ISO_EB2CORE BIT(8) ++#define ISO_DIOR BIT(9) ++ ++#define PWC_EV25V BIT(14) ++#define PWC_EV12V BIT(15) ++ ++ ++//2 SYS_FUNC_EN ++#define FEN_BBRSTB BIT(0) ++#define FEN_BB_GLB_RSTn BIT(1) ++#define FEN_USBA BIT(2) ++#define FEN_UPLL BIT(3) ++#define FEN_USBD BIT(4) ++#define FEN_DIO_PCIE BIT(5) ++#define FEN_PCIEA BIT(6) ++#define FEN_PPLL BIT(7) ++#define FEN_PCIED BIT(8) ++#define FEN_DIOE BIT(9) ++#define FEN_CPUEN BIT(10) ++#define FEN_DCORE BIT(11) ++#define FEN_ELDR BIT(12) ++#define FEN_DIO_RF BIT(13) ++#define FEN_HWPDN BIT(14) ++#define FEN_MREGEN BIT(15) ++ ++//2 APS_FSMCO ++#define PFM_LDALL BIT(0) ++#define PFM_ALDN BIT(1) ++#define PFM_LDKP BIT(2) ++#define PFM_WOWL BIT(3) ++#define EnPDN BIT(4) ++#define PDN_PL BIT(5) ++#define APFM_ONMAC BIT(8) ++#define APFM_OFF BIT(9) ++#define APFM_RSM BIT(10) ++#define AFSM_HSUS BIT(11) ++#define AFSM_PCIE BIT(12) ++#define APDM_MAC BIT(13) ++#define APDM_HOST BIT(14) ++#define APDM_HPDN BIT(15) ++#define RDY_MACON BIT(16) ++#define SUS_HOST BIT(17) ++#define ROP_ALD BIT(20) ++#define ROP_PWR BIT(21) ++#define ROP_SPS BIT(22) ++#define SOP_MRST BIT(25) ++#define SOP_FUSE BIT(26) ++#define SOP_ABG BIT(27) ++#define SOP_AMB BIT(28) ++#define SOP_RCK BIT(29) ++#define SOP_A8M BIT(30) ++#define XOP_BTCK BIT(31) ++ ++//2 SYS_CLKR ++#define ANAD16V_EN BIT(0) ++#define ANA8M BIT(1) ++#define MACSLP BIT(4) ++#define LOADER_CLK_EN BIT(5) ++#define _80M_SSC_DIS BIT(7) ++#define _80M_SSC_EN_HO BIT(8) ++#define PHY_SSC_RSTB BIT(9) ++#define SEC_CLK_EN BIT(10) ++#define MAC_CLK_EN BIT(11) ++#define SYS_CLK_EN BIT(12) ++#define RING_CLK_EN BIT(13) ++ ++ ++//2 9346CR ++ ++#define BOOT_FROM_EEPROM BIT(4) ++#define EEPROM_EN BIT(5) ++ ++ ++//2 AFE_MISC ++#define AFE_BGEN BIT(0) ++#define AFE_MBEN BIT(1) ++#define MAC_ID_EN BIT(7) ++ ++ ++//2 SPS0_CTRL ++ ++ ++//2 SPS_OCP_CFG ++ ++ ++//2 RSV_CTRL ++#define WLOCK_ALL BIT(0) ++#define WLOCK_00 BIT(1) ++#define WLOCK_04 BIT(2) ++#define WLOCK_08 BIT(3) ++#define WLOCK_40 BIT(4) ++#define R_DIS_PRST_0 BIT(5) ++#define R_DIS_PRST_1 BIT(6) ++#define LOCK_ALL_EN BIT(7) ++ ++//2 RF_CTRL ++#define RF_EN BIT(0) ++#define RF_RSTB BIT(1) ++#define RF_SDMRSTB BIT(2) ++ ++ ++ ++//2 LDOA15_CTRL ++#define LDA15_EN BIT(0) ++#define LDA15_STBY BIT(1) ++#define LDA15_OBUF BIT(2) ++#define LDA15_REG_VOS BIT(3) ++#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) ++ ++ ++ ++//2 LDOV12D_CTRL ++#define LDV12_EN BIT(0) ++#define LDV12_SDBY BIT(1) ++#define LPLDO_HSM BIT(2) ++#define LPLDO_LSM_DIS BIT(3) ++#define _LDV12_VADJ(x) (((x) & 0xF) << 4) ++ ++ ++//2 AFE_XTAL_CTRL ++#define XTAL_EN BIT(0) ++#define XTAL_BSEL BIT(1) ++#define _XTAL_BOSC(x) (((x) & 0x3) << 2) ++#define _XTAL_CADJ(x) (((x) & 0xF) << 4) ++#define XTAL_GATE_USB BIT(8) ++#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) ++#define XTAL_GATE_AFE BIT(11) ++#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) ++#define XTAL_RF_GATE BIT(14) ++#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) ++#define XTAL_GATE_DIG BIT(17) ++#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) ++#define XTAL_BT_GATE BIT(20) ++#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) ++#define _XTAL_GPIO(x) (((x) & 0x7) << 23) ++ ++ ++#define CKDLY_AFE BIT(26) ++#define CKDLY_USB BIT(27) ++#define CKDLY_DIG BIT(28) ++#define CKDLY_BT BIT(29) ++ ++ ++//2 AFE_PLL_CTRL ++#define APLL_EN BIT(0) ++#define APLL_320_EN BIT(1) ++#define APLL_FREF_SEL BIT(2) ++#define APLL_EDGE_SEL BIT(3) ++#define APLL_WDOGB BIT(4) ++#define APLL_LPFEN BIT(5) ++ ++#define APLL_REF_CLK_13MHZ 0x1 ++#define APLL_REF_CLK_19_2MHZ 0x2 ++#define APLL_REF_CLK_20MHZ 0x3 ++#define APLL_REF_CLK_25MHZ 0x4 ++#define APLL_REF_CLK_26MHZ 0x5 ++#define APLL_REF_CLK_38_4MHZ 0x6 ++#define APLL_REF_CLK_40MHZ 0x7 ++ ++#define APLL_320EN BIT(14) ++#define APLL_80EN BIT(15) ++#define APLL_1MEN BIT(24) ++ ++ ++//2 EFUSE_CTRL ++#define ALD_EN BIT(18) ++#define EF_PD BIT(19) ++#define EF_FLAG BIT(31) ++ ++//2 EFUSE_TEST ++#define EF_TRPT BIT(7) ++#define LDOE25_EN BIT(31) ++ ++//2 PWR_DATA ++ ++//2 CAL_TIMER ++ ++//2 ACLK_MON ++#define RSM_EN BIT(0) ++#define Timer_EN BIT(4) ++ ++ ++//2 GPIO_MUXCFG ++#define TRSW0EN BIT(2) ++#define TRSW1EN BIT(3) ++#define EROM_EN BIT(4) ++#define EnBT BIT(5) ++#define EnUart BIT(8) ++#define Uart_910 BIT(9) ++#define EnPMAC BIT(10) ++#define SIC_SWRST BIT(11) ++#define EnSIC BIT(12) ++#define SIC_23 BIT(13) ++#define EnHDP BIT(14) ++#define SIC_LBK BIT(15) ++ ++//2 GPIO_PIN_CTRL ++ ++ ++ ++//2 GPIO_INTM ++ ++//2 LEDCFG ++#define LED0PL BIT(4) ++#define LED1PL BIT(12) ++#define LED0DIS BIT(7) ++ ++#define SECCAM_CLR BIT(30) ++ ++//2 FSIMR ++ ++//2 FSISR ++ ++ ++//2 8051FWDL ++//2 MCUFWDL ++#define MCUFWDL_EN BIT(0) ++#define MCUFWDL_RDY BIT(1) ++#define FWDL_ChkSum_rpt BIT(2) ++#define MACINI_RDY BIT(3) ++#define BBINI_RDY BIT(4) ++#define RFINI_RDY BIT(5) ++#define WINTINI_RDY BIT(6) ++#define MAC1_WINTINI_RDY BIT(11)// 0X81 BIT3 ++#define CPRST BIT(23) ++ ++ ++ ++ ++//2 REG_SYS_CFG ++#define XCLK_VLD BIT(0) ++#define ACLK_VLD BIT(1) ++#define UCLK_VLD BIT(2) ++#define PCLK_VLD BIT(3) ++#define PCIRSTB BIT(4) ++#define V15_VLD BIT(5) ++#define TRP_B15V_EN BIT(7) ++#define SIC_IDLE BIT(8) ++#define BD_MAC2 BIT(9) ++#define BD_MAC1 BIT(10) ++#define IC_MACPHY_MODE BIT(11) ++#define PAD_HWPD_IDN BIT(22) ++#define TRP_VAUX_EN BIT(23) ++#define TRP_BT_EN BIT(24) ++#define BD_PKG_SEL BIT(25) ++#define BD_HCI_SEL BIT(26) ++#define TYPE_ID BIT(27) ++ ++#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 ++#define CHIP_VER_RTL_SHIFT 12 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++ ++ ++//2 Function Enable Registers ++//2 CR ++ ++#define REG_LBMODE (REG_CR + 3) ++ ++ ++#define HCI_TXDMA_EN BIT(0) ++#define HCI_RXDMA_EN BIT(1) ++#define TXDMA_EN BIT(2) ++#define RXDMA_EN BIT(3) ++#define PROTOCOL_EN BIT(4) ++#define SCHEDULE_EN BIT(5) ++#define MACTXEN BIT(6) ++#define MACRXEN BIT(7) ++#define ENSWBCN BIT(8) ++#define ENSEC BIT(9) ++ ++// Network type ++#define _NETTYPE(x) (((x) & 0x3) << 16) ++#define MASK_NETTYPE 0x30000 ++#define NT_NO_LINK 0x0 ++#define NT_LINK_AD_HOC 0x1 ++#define NT_LINK_AP 0x2 ++#define NT_AS_AP 0x3 ++ ++#define _LBMODE(x) (((x) & 0xF) << 24) ++#define MASK_LBMODE 0xF000000 ++#define LOOPBACK_NORMAL 0x0 ++#define LOOPBACK_IMMEDIATELY 0xB ++#define LOOPBACK_MAC_DELAY 0x3 ++#define LOOPBACK_PHY 0x1 ++#define LOOPBACK_DMA 0x7 ++ ++ ++//2 PBP - Page Size Register ++#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) ++#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) ++#define _PSRX_MASK 0xF ++#define _PSTX_MASK 0xF0 ++#define _PSRX(x) (x) ++#define _PSTX(x) ((x) << 4) ++ ++#define PBP_64 0x0 ++#define PBP_128 0x1 ++#define PBP_256 0x2 ++#define PBP_512 0x3 ++#define PBP_1024 0x4 ++ ++ ++//2 TX/RXDMA ++#define RXDMA_ARBBW_EN BIT(0) ++#define RXSHFT_EN BIT(1) ++#define RXDMA_AGG_EN BIT(2) ++#define QS_VO_QUEUE BIT(8) ++#define QS_VI_QUEUE BIT(9) ++#define QS_BE_QUEUE BIT(10) ++#define QS_BK_QUEUE BIT(11) ++#define QS_MANAGER_QUEUE BIT(12) ++#define QS_HIGH_QUEUE BIT(13) ++ ++#define HQSEL_VOQ BIT(0) ++#define HQSEL_VIQ BIT(1) ++#define HQSEL_BEQ BIT(2) ++#define HQSEL_BKQ BIT(3) ++#define HQSEL_MGTQ BIT(4) ++#define HQSEL_HIQ BIT(5) ++ ++// For normal driver, 0x10C ++#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) ++#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) ++#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) ++#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) ++#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) ++#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) ++ ++#define QUEUE_LOW 1 ++#define QUEUE_NORMAL 2 ++#define QUEUE_HIGH 3 ++ ++ ++ ++//2 TRXFF_BNDY ++ ++ ++//2 LLT_INIT ++#define _LLT_NO_ACTIVE 0x0 ++#define _LLT_WRITE_ACCESS 0x1 ++#define _LLT_READ_ACCESS 0x2 ++ ++#define _LLT_INIT_DATA(x) ((x) & 0xFF) ++#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) ++#define _LLT_OP(x) (((x) & 0x3) << 30) ++#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) ++ ++ ++//2 BB_ACCESS_CTRL ++#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) ++#define BB_WRITE_EN BIT(30) ++#define BB_READ_EN BIT(31) ++//#define BB_ADDR_MASK 0xFFF ++//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++//2 RQPN ++#define _HPQ(x) ((x) & 0xFF) ++#define _LPQ(x) (((x) & 0xFF) << 8) ++#define _PUBQ(x) (((x) & 0xFF) << 16) ++#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register ++ ++ ++#define HPQ_PUBLIC_DIS BIT(24) ++#define LPQ_PUBLIC_DIS BIT(25) ++#define LD_RQPN BIT(31) ++ ++ ++//2 TDECTRL ++#define BCN_VALID BIT(16) ++#define BCN_HEAD(x) (((x) & 0xFF) << 8) ++#define BCN_HEAD_MASK 0xFF00 ++ ++//2 TDECTL ++#define BLK_DESC_NUM_SHIFT 4 ++#define BLK_DESC_NUM_MASK 0xF ++ ++ ++//2 TXDMA_OFFSET_CHK ++#define DROP_DATA_EN BIT(9) ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++//2 FWHW_TXQ_CTRL ++#define EN_AMPDU_RTY_NEW BIT(7) ++ ++//2 INIRTSMCS_SEL ++#define _INIRTSMCS_SEL(x) ((x) & 0x3F) ++ ++ ++//2 SPEC SIFS ++#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) ++#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) ++ ++ ++//2 RRSR ++ ++#define RATE_REG_BITMAP_ALL 0xFFFFF ++ ++#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) ++ ++#define _RRSR_RSC(x) (((x) & 0x3) << 21) ++#define RRSR_RSC_RESERVED 0x0 ++#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 ++#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 ++#define RRSR_RSC_DUPLICATE_MODE 0x3 ++ ++ ++//2 ARFR ++#define USE_SHORT_G1 BIT(20) ++ ++//2 AGGLEN_LMT_L ++#define _AGGLMT_MCS0(x) ((x) & 0xF) ++#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) ++#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) ++#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) ++#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) ++#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) ++#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) ++#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) ++ ++ ++//2 RL ++#define RETRY_LIMIT_SHORT_SHIFT 8 ++#define RETRY_LIMIT_LONG_SHIFT 0 ++ ++ ++//2 DARFRC ++#define _DARF_RC1(x) ((x) & 0x1F) ++#define _DARF_RC2(x) (((x) & 0x1F) << 8) ++#define _DARF_RC3(x) (((x) & 0x1F) << 16) ++#define _DARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (DARFRC + 4) ++#define _DARF_RC5(x) ((x) & 0x1F) ++#define _DARF_RC6(x) (((x) & 0x1F) << 8) ++#define _DARF_RC7(x) (((x) & 0x1F) << 16) ++#define _DARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++//2 RARFRC ++#define _RARF_RC1(x) ((x) & 0x1F) ++#define _RARF_RC2(x) (((x) & 0x1F) << 8) ++#define _RARF_RC3(x) (((x) & 0x1F) << 16) ++#define _RARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (RARFRC + 4) ++#define _RARF_RC5(x) ((x) & 0x1F) ++#define _RARF_RC6(x) (((x) & 0x1F) << 8) ++#define _RARF_RC7(x) (((x) & 0x1F) << 16) ++#define _RARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++ ++ ++//2 EDCA setting ++#define AC_PARAM_TXOP_LIMIT_OFFSET 16 ++#define AC_PARAM_ECW_MAX_OFFSET 12 ++#define AC_PARAM_ECW_MIN_OFFSET 8 ++#define AC_PARAM_AIFS_OFFSET 0 ++ ++ ++//2 EDCA_VO_PARAM ++#define _AIFS(x) (x) ++#define _ECW_MAX_MIN(x) ((x) << 8) ++#define _TXOP_LIMIT(x) ((x) << 16) ++ ++ ++#define _BCNIFS(x) ((x) & 0xFF) ++#define _BCNECW(x) (((x) & 0xF))<< 8) ++ ++ ++#define _LRL(x) ((x) & 0x3F) ++#define _SRL(x) (((x) & 0x3F) << 8) ++ ++ ++//2 SIFS_CCK ++#define _SIFS_CCK_CTX(x) ((x) & 0xFF) ++#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 SIFS_OFDM ++#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) ++#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 TBTT PROHIBIT ++#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) ++ ++ ++//2 REG_RD_CTRL ++#define DIS_EDCA_CNT_DWN BIT(11) ++ ++ ++//2 BCN_CTRL ++#define EN_MBSSID BIT(1) ++#define EN_TXBCN_RPT BIT(2) ++#define EN_BCN_FUNCTION BIT(3) ++// The same function but different bit field. ++#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) ++#define DIS_TSF_UDT0_TEST_CHIP BIT(5) ++ ++//2 ACMHWCTRL ++#define AcmHw_HwEn BIT(0) ++#define AcmHw_BeqEn BIT(1) ++#define AcmHw_ViqEn BIT(2) ++#define AcmHw_VoqEn BIT(3) ++#define AcmHw_BeqStatus BIT(4) ++#define AcmHw_ViqStatus BIT(5) ++#define AcmHw_VoqStatus BIT(6) ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++//2 APSD_CTRL ++#define APSDOFF BIT(6) ++#define APSDOFF_STATUS BIT(7) ++ ++ ++//2 BWOPMODE ++#define BW_20MHZ BIT(2) ++//#define BW_OPMODE_20MHZ BIT(2) // For compability ++ ++ ++#define RATE_BITMAP_ALL 0xFFFFF ++ ++// Only use CCK 1M rate for ACK ++#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 ++#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 ++ ++//2 TCR ++#define TSFRST BIT(0) ++#define DIS_GCLK BIT(1) ++#define PAD_SEL BIT(2) ++#define PWR_ST BIT(6) ++#define PWRBIT_OW_EN BIT(7) ++#define ACRC BIT(8) ++#define CFENDFORM BIT(9) ++#define ICV BIT(10) ++ ++ ++ ++//2 RCR ++#define AAP BIT(0) ++#define APM BIT(1) ++#define AM BIT(2) ++#define AB BIT(3) ++#define ADD3 BIT(4) ++#define APWRMGT BIT(5) ++#define CBSSID BIT(6) ++#define CBSSID_BCN BIT(7) ++#define ACRC32 BIT(8) ++#define AICV BIT(9) ++#define ADF BIT(11) ++#define ACF BIT(12) ++#define AMF BIT(13) ++#define HTC_LOC_CTRL BIT(14) ++#define UC_DATA_EN BIT(16) ++#define BM_DATA_EN BIT(17) ++#define MFBEN BIT(22) ++#define LSIGEN BIT(23) ++#define EnMBID BIT(24) ++#define APP_BASSN BIT(27) ++#define APP_PHYSTS BIT(28) ++#define APP_ICV BIT(29) ++#define APP_MIC BIT(30) ++#define APP_FCS BIT(31) ++ ++//2 RX_PKT_LIMIT ++ ++//2 RX_DLK_TIME ++ ++//2 MBIDCAMCFG ++ ++ ++ ++//2 AMPDU_MIN_SPACE ++#define _MIN_SPACE(x) ((x) & 0x7) ++#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) ++ ++ ++//2 RXERR_RPT ++#define RXERR_TYPE_OFDM_PPDU 0 ++#define RXERR_TYPE_OFDM_FALSE_ALARM 1 ++#define RXERR_TYPE_OFDM_MPDU_OK 2 ++#define RXERR_TYPE_OFDM_MPDU_FAIL 3 ++#define RXERR_TYPE_CCK_PPDU 4 ++#define RXERR_TYPE_CCK_FALSE_ALARM 5 ++#define RXERR_TYPE_CCK_MPDU_OK 6 ++#define RXERR_TYPE_CCK_MPDU_FAIL 7 ++#define RXERR_TYPE_HT_PPDU 8 ++#define RXERR_TYPE_HT_FALSE_ALARM 9 ++#define RXERR_TYPE_HT_MPDU_TOTAL 10 ++#define RXERR_TYPE_HT_MPDU_OK 11 ++#define RXERR_TYPE_HT_MPDU_FAIL 12 ++#define RXERR_TYPE_RX_FULL_DROP 15 ++ ++#define RXERR_COUNTER_MASK 0xFFFFF ++#define RXERR_RPT_RST BIT(27) ++#define _RXERR_RPT_SEL(type) ((type) << 28) ++ ++ ++//2 SECCFG ++#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key ++#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key ++#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption ++#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption ++#define SCR_SKByA2 BIT(4) //Search kEY BY A2 ++#define SCR_NoSKMC BIT(5) //No Key Search Multicast ++#define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key ++#define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key ++ ++//vivi added for new cam search flow, 20091028 ++#ifdef HW_EN_DE_CRYPTION_FOR_NEW_CAM_SEARCH_FLOW ++#define SCR_TxUseBroadcastDK BIT6 //Force Tx Use Broadcast Default Key ++#define SCR_RxUseBroadcastDK BIT7 //Force Rx Use Broadcast Default Key ++#endif ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 USB Information (0xFE17) ++#define USB_IS_HIGH_SPEED 0 ++#define USB_IS_FULL_SPEED 1 ++#define USB_SPEED_MASK BIT(5) ++ ++#define USB_NORMAL_SIE_EP_MASK 0xF ++#define USB_NORMAL_SIE_EP_SHIFT 4 ++ ++#define USB_TEST_EP_MASK 0x30 ++#define USB_TEST_EP_SHIFT 4 ++ ++//2 Special Option ++#define USB_AGG_EN BIT(3) ++ ++ ++//2REG_C2HEVT_CLEAR ++#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message ++#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. ++ ++//2 8192D PartNo. ++#define PARTNO_92D_NIC (BIT7|BIT6) ++#define PARTNO_92D_NIC_REMARK (BIT5|BIT4) ++#define PARTNO_SINGLE_BAND_VS BIT3 ++#define PARTNO_SINGLE_BAND_VS_REMARK BIT1 ++#define PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2) ++#define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0) ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MAC_ADDR_LEN 6 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 ++ ++#define POLLING_LLT_THRESHOLD 20 ++#define POLLING_READY_TIMEOUT_COUNT 1000 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++// GPIO BIT ++#define HAL_8192C_HW_GPIO_WPS_BIT BIT2 ++ ++ ++#include "basic_types.h" ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtl8192d_xmit.h +@@ -0,0 +1,145 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192D_XMIT_H_ ++#define _RTL8192D_XMIT_H_ ++ ++// ++// Queue Select Value in TxDesc ++// ++#define QSLT_BK 0x2//0x01 ++#define QSLT_BE 0x0 ++#define QSLT_VI 0x5//0x4 ++#define QSLT_VO 0x7//0x6 ++#define QSLT_BEACON 0x10 ++#define QSLT_HIGH 0x11 ++#define QSLT_MGNT 0x12 ++#define QSLT_CMD 0x13 ++ ++//Because we open EM for normal case, we just always insert 2*8 bytes.by wl ++#define USB_92D_DUMMY_OFFSET 2 ++#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ) ++#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH) ++ ++//For 92D early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++/* Copy from rtl8192c */ ++struct txrpt_ccx_8192d { ++ /* offset 0 */ ++ u8 retry_cnt:6; ++ u8 rsvd_0:2; ++ ++ /* offset 1 */ ++ u8 rts_retry_cnt:6; ++ u8 rsvd_1:2; ++ ++ /* offset 2 */ ++ u8 ccx_qtime0; ++ u8 ccx_qtime1; ++ ++ /* offset 4 */ ++ u8 missed_pkt_num:5; ++ u8 rsvd_4:3; ++ ++ /* offset 5 */ ++ u8 mac_id:5; ++ u8 des1_fragssn:3; ++ ++ /* offset 6 */ ++ u8 rpt_pkt_num:5; ++ u8 pkt_drop:1; ++ u8 lifetime_over:1; ++ u8 retry_over:1; ++ ++ /* offset 7*/ ++ u8 edca_tx_queue:4; ++ u8 rsvd_7:1; ++ u8 bmc:1; ++ u8 pkt_ok:1; ++ u8 int_ccx:1; ++}; ++ ++#define txrpt_ccx_qtime_8192d(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) ++ ++#ifdef CONFIG_XMIT_ACK ++void dump_txrpt_ccx_8192d(void *buf); ++void handle_txrpt_ccx_8192d(_adapter *adapter, void *buf); ++#else ++#define dump_txrpt_ccx_8192d(buf) do {} while(0) ++#define handle_txrpt_ccx_8192d(adapter, buf) do {} while(0) ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++#define MAX_TX_AGG_PACKET_NUMBER 0xFF ++#endif ++ ++s32 rtl8192du_init_xmit_priv(_adapter * padapter); ++ ++void rtl8192du_free_xmit_priv(_adapter * padapter); ++ ++void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++s32 rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++s32 rtl8192du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192de_init_xmit_priv(_adapter * padapter); ++void rtl8192de_free_xmit_priv(_adapter * padapter); ++ ++s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); ++struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++ ++void rtl8192de_xmitframe_resume(_adapter *padapter); ++ ++s32 rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++s32 rtl8192de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_android.h +@@ -0,0 +1,90 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTW_ANDROID_H__ ++#define __RTW_ANDROID_H__ ++ ++#include ++#include ++ ++enum ANDROID_WIFI_CMD { ++ ANDROID_WIFI_CMD_START, ++ ANDROID_WIFI_CMD_STOP, ++ ANDROID_WIFI_CMD_SCAN_ACTIVE, ++ ANDROID_WIFI_CMD_SCAN_PASSIVE, ++ ANDROID_WIFI_CMD_RSSI, ++ ANDROID_WIFI_CMD_LINKSPEED, ++ ANDROID_WIFI_CMD_RXFILTER_START, ++ ANDROID_WIFI_CMD_RXFILTER_STOP, ++ ANDROID_WIFI_CMD_RXFILTER_ADD, ++ ANDROID_WIFI_CMD_RXFILTER_REMOVE, ++ ANDROID_WIFI_CMD_BTCOEXSCAN_START, ++ ANDROID_WIFI_CMD_BTCOEXSCAN_STOP, ++ ANDROID_WIFI_CMD_BTCOEXMODE, ++ ANDROID_WIFI_CMD_SETSUSPENDOPT, ++ ANDROID_WIFI_CMD_P2P_DEV_ADDR, ++ ANDROID_WIFI_CMD_SETFWPATH, ++ ANDROID_WIFI_CMD_SETBAND, ++ ANDROID_WIFI_CMD_GETBAND, ++ ANDROID_WIFI_CMD_COUNTRY, ++ ANDROID_WIFI_CMD_P2P_SET_NOA, ++ ANDROID_WIFI_CMD_P2P_GET_NOA, ++ ANDROID_WIFI_CMD_P2P_SET_PS, ++ ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE, ++#ifdef PNO_SUPPORT ++ ANDROID_WIFI_CMD_PNOSSIDCLR_SET, ++ ANDROID_WIFI_CMD_PNOSETUP_SET, ++ ANDROID_WIFI_CMD_PNOENABLE_SET, ++ ANDROID_WIFI_CMD_PNODEBUG_SET, ++#endif ++ ++ ANDROID_WIFI_CMD_MACADDR, ++ ++ ANDROID_WIFI_CMD_BLOCK, ++ ++ ANDROID_WIFI_CMD_WFD_ENABLE, ++ ANDROID_WIFI_CMD_WFD_DISABLE, ++ ++ ANDROID_WIFI_CMD_WFD_SET_TCPPORT, ++ ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT, ++ ANDROID_WIFI_CMD_WFD_SET_DEVTYPE, ++ ++ ANDROID_WIFI_CMD_MAX ++}; ++ ++int rtw_android_cmdstr_to_num(char *cmdstr); ++int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd); ++ ++#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) ++int rtw_android_wifictrl_func_add(void); ++void rtw_android_wifictrl_func_del(void); ++void* wl_android_prealloc(int section, unsigned long size); ++ ++int wifi_get_irq_number(unsigned long *irq_flags_ptr); ++int wifi_set_power(int on, unsigned long msec); ++int wifi_get_mac_addr(unsigned char *buf); ++void *wifi_get_country_code(char *ccode); ++#else ++static int rtw_android_wifictrl_func_add(void) { return 0; } ++static void rtw_android_wifictrl_func_del(void) {} ++#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ ++ ++#endif //__RTW_ANDROID_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ap.h +@@ -0,0 +1,64 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_AP_H_ ++#define __RTW_AP_H_ ++ ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++//external function ++extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); ++extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); ++ ++ ++void init_mlme_ap_info(_adapter *padapter); ++void free_mlme_ap_info(_adapter *padapter); ++//void update_BCNTIM(_adapter *padapter); ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len); ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index); ++void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx); ++void expire_timeout_chk(_adapter *padapter); ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); ++void rtw_ap_restore_network(_adapter *padapter); ++void rtw_set_macaddr_acl(_adapter *padapter, int mode); ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr); ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr); ++ ++#ifdef CONFIG_NATIVEAP_MLME ++void associated_clients_update(_adapter *padapter, u8 updated); ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta); ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta); ++void sta_info_update(_adapter *padapter, struct sta_info *psta); ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason); ++int rtw_sta_flush(_adapter *padapter); ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset); ++void start_ap_mode(_adapter *padapter); ++void stop_ap_mode(_adapter *padapter); ++#endif ++#endif //end of CONFIG_AP_MODE ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_br_ext.h +@@ -0,0 +1,76 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_BR_EXT_H_ ++#define _RTW_BR_EXT_H_ ++ ++#if 1 // rtw_wifi_driver ++#define CL_IPV6_PASS 1 ++#define MACADDRLEN 6 ++#define _DEBUG_ERR printk ++#define _DEBUG_INFO //printk ++#define DEBUG_WARN printk ++#define DEBUG_INFO //printk ++#define DEBUG_ERR printk ++//#define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) ++#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr) ++#endif // rtw_wifi_driver ++ ++#define NAT25_HASH_BITS 4 ++#define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS) ++#define NAT25_AGEING_TIME 300 ++ ++#ifdef CL_IPV6_PASS ++#define MAX_NETWORK_ADDR_LEN 17 ++#else ++#define MAX_NETWORK_ADDR_LEN 11 ++#endif ++ ++struct nat25_network_db_entry ++{ ++ struct nat25_network_db_entry *next_hash; ++ struct nat25_network_db_entry **pprev_hash; ++ atomic_t use_count; ++ unsigned char macAddr[6]; ++ unsigned long ageing_timer; ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++}; ++ ++enum NAT25_METHOD { ++ NAT25_MIN, ++ NAT25_CHECK, ++ NAT25_INSERT, ++ NAT25_LOOKUP, ++ NAT25_PARSE, ++ NAT25_MAX ++}; ++ ++struct br_ext_info { ++ unsigned int nat25_disable; ++ unsigned int macclone_enable; ++ unsigned int dhcp_bcst_disable; ++ int addPPPoETag; // 1: Add PPPoE relay-SID, 0: disable ++ unsigned char nat25_dmzMac[MACADDRLEN]; ++ unsigned int nat25sc_disable; ++}; ++ ++void nat25_db_cleanup(_adapter *priv); ++ ++#endif // _RTW_BR_EXT_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_byteorder.h +@@ -0,0 +1,40 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL871X_BYTEORDER_H_ ++#define _RTL871X_BYTEORDER_H_ ++ ++#include ++ ++#if defined (CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN) ++#error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n" ++#endif ++ ++#if defined (CONFIG_LITTLE_ENDIAN) ++#ifndef CONFIG_PLATFORM_MSTAR389 ++# include ++#endif ++#elif defined (CONFIG_BIG_ENDIAN) ++# include ++#else ++# error "Must be LITTLE/BIG Endian Host" ++#endif ++ ++#endif /* _RTL871X_BYTEORDER_H_ */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_cmd.h +@@ -0,0 +1,1167 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_CMD_H_ ++#define __RTW_CMD_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define C2H_MEM_SZ (16*1024) ++ ++#ifndef CONFIG_RTL8711FW ++ ++ #include ++ #include // ++ ++ ++ #define FREE_CMDOBJ_SZ 128 ++ ++ #define MAX_CMDSZ 1024 ++ #define MAX_RSPSZ 512 ++ #define MAX_EVTSZ 1024 ++ ++#ifdef PLATFORM_OS_CE ++ #define CMDBUFF_ALIGN_SZ 4 ++#else ++ #define CMDBUFF_ALIGN_SZ 512 ++#endif ++ ++ struct cmd_obj { ++ _adapter *padapter; ++ u16 cmdcode; ++ u8 res; ++ u8 *parmbuf; ++ u32 cmdsz; ++ u8 *rsp; ++ u32 rspsz; ++ //_sema cmd_sem; ++ _list list; ++ }; ++ ++ struct cmd_priv { ++ _sema cmd_queue_sema; ++ //_sema cmd_done_sema; ++ _sema terminate_cmdthread_sema; ++ _queue cmd_queue; ++ u8 cmd_seq; ++ u8 *cmd_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *cmd_allocated_buf; ++ u8 *rsp_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *rsp_allocated_buf; ++ u32 cmd_issued_cnt; ++ u32 cmd_done_cnt; ++ u32 rsp_cnt; ++ u8 cmdthd_running; ++ u8 stop_req; ++ _adapter *padapter; ++ }; ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ struct evt_obj { ++ u16 evtcode; ++ u8 res; ++ u8 *parmbuf; ++ u32 evtsz; ++ _list list; ++ }; ++#endif ++ ++ struct evt_priv { ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _sema evt_notify; ++ _sema terminate_evtthread_sema; ++ _queue evt_queue; ++#endif ++ ++//#define CONFIG_C2H_WK ++#ifdef CONFIG_C2H_WK ++ _workitem c2h_wk; ++ bool c2h_wk_alive; ++ struct rtw_cbuf *c2h_queue; ++ #define C2H_QUEUE_MAX_LEN 10 ++#endif ++ ++#ifdef CONFIG_H2CLBK ++ _sema lbkevt_done; ++ u8 lbkevt_limit; ++ u8 lbkevt_num; ++ u8 *cmdevt_parm; ++#endif ++ ATOMIC_T event_seq; ++ u8 *evt_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *evt_allocated_buf; ++ u32 evt_done_cnt; ++#ifdef CONFIG_SDIO_HCI ++ u8 *c2h_mem; ++ u8 *allocated_c2h_mem; ++#ifdef PLATFORM_OS_XP ++ PMDL pc2h_mdl; ++#endif ++#endif ++ ++ }; ++ ++#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \ ++do {\ ++ _rtw_init_listhead(&pcmd->list);\ ++ pcmd->cmdcode = code;\ ++ pcmd->parmbuf = (u8 *)(pparm);\ ++ pcmd->cmdsz = sizeof (*pparm);\ ++ pcmd->rsp = NULL;\ ++ pcmd->rspsz = 0;\ ++} while(0) ++ ++struct c2h_evt_hdr { ++ u8 id:4; ++ u8 plen:4; ++ u8 seq; ++ u8 payload[0]; ++}; ++ ++#define c2h_evt_exist(c2h_evt) ((c2h_evt)->id || (c2h_evt)->plen) ++ ++extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj); ++extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv); ++extern void rtw_free_cmd_obj(struct cmd_obj *pcmd); ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj); ++extern struct evt_obj *rtw_dequeue_evt(_queue *queue); ++extern void rtw_free_evt_obj(struct evt_obj *pcmd); ++#endif ++ ++void rtw_stop_cmd_thread(_adapter *adapter); ++thread_return rtw_cmd_thread(thread_context context); ++ ++extern u32 rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); ++extern void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); ++ ++extern u32 rtw_init_evt_priv (struct evt_priv *pevtpriv); ++extern void rtw_free_evt_priv (struct evt_priv *pevtpriv); ++extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv); ++extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv); ++#ifdef CONFIG_P2P ++u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ); ++#endif //CONFIG_P2P ++ ++#else ++ #include ++#endif /* CONFIG_RTL8711FW */ ++ ++enum rtw_drvextra_cmd_id ++{ ++ NONE_WK_CID, ++ DYNAMIC_CHK_WK_CID, ++ DM_CTRL_WK_CID, ++ PBC_POLLING_WK_CID, ++ POWER_SAVING_CTRL_WK_CID,//IPS,AUTOSuspend ++ LPS_CTRL_WK_CID, ++ ANT_SELECT_WK_CID, ++ P2P_PS_WK_CID, ++ P2P_PROTO_WK_CID, ++ CHECK_HIQ_WK_CID,//for softap mode, check hi queue if empty ++ INTEl_WIDI_WK_CID, ++ C2H_WK_CID, ++ RESET_SECURITYPRIV, // add for CONFIG_IEEE80211W, none 11w also can use ++ FREE_ASSOC_RESOURCES, // add for CONFIG_IEEE80211W, none 11w also can use ++ MAX_WK_CID ++}; ++ ++enum LPS_CTRL_TYPE ++{ ++ LPS_CTRL_SCAN=0, ++ LPS_CTRL_JOINBSS=1, ++ LPS_CTRL_CONNECT=2, ++ LPS_CTRL_DISCONNECT=3, ++ LPS_CTRL_SPECIAL_PACKET=4, ++}; ++ ++enum RFINTFS { ++ SWSI, ++ HWSI, ++ HWPI, ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC(C) ++ ++Notes: To enter USB suspend mode ++ ++Command Mode ++ ++*/ ++struct usb_suspend_parm { ++ u32 action;// 1: sleep, 0:resume ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC ++ ++Notes: To join a known BSS. ++ ++Command-Event Mode ++ ++*/ ++ ++/* ++Caller Mode: Infra, Ad-Hoc ++ ++Notes: To join the specified bss ++ ++Command Event Mode ++ ++*/ ++struct joinbss_parm { ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC(C) ++ ++Notes: To disconnect the current associated BSS ++ ++Command Mode ++ ++*/ ++struct disconnect_parm { ++ u32 deauth_timeout_ms; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC(M) ++ ++Notes: To create a BSS ++ ++Command Mode ++*/ ++struct createbss_parm { ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC, Infra ++ ++Notes: To set the NIC mode of RTL8711 ++ ++Command Mode ++ ++The definition of mode: ++ ++#define IW_MODE_AUTO 0 // Let the driver decides which AP to join ++#define IW_MODE_ADHOC 1 // Single cell network (Ad-Hoc Clients) ++#define IW_MODE_INFRA 2 // Multi cell network, roaming, .. ++#define IW_MODE_MASTER 3 // Synchronisation master or Access Point ++#define IW_MODE_REPEAT 4 // Wireless Repeater (forwarder) ++#define IW_MODE_SECOND 5 // Secondary master/repeater (backup) ++#define IW_MODE_MONITOR 6 // Passive monitor (listen only) ++ ++*/ ++struct setopmode_parm { ++ u8 mode; ++ u8 rsvd[3]; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC, Infra ++ ++Notes: To ask RTL8711 performing site-survey ++ ++Command-Event Mode ++ ++*/ ++ ++#define RTW_SSID_SCAN_AMOUNT 9 // for WEXT_CSCAN_AMOUNT 9 ++#define RTW_CHANNEL_SCAN_AMOUNT (14+37) ++struct sitesurvey_parm { ++ sint scan_mode; //active: 1, passive: 0 ++ /* sint bsslimit; // 1 ~ 48 */ ++ u8 ssid_num; ++ u8 ch_num; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To set the auth type of RTL8711. open/shared/802.1x ++ ++Command Mode ++ ++*/ ++struct setauth_parm { ++ u8 mode; //0: legacy open, 1: legacy shared 2: 802.1x ++ u8 _1x; //0: PSK, 1: TLS ++ u8 rsvd[2]; ++}; ++ ++/* ++Caller Mode: Infra ++ ++a. algorithm: wep40, wep104, tkip & aes ++b. keytype: grp key/unicast key ++c. key contents ++ ++when shared key ==> keyid is the camid ++when 802.1x ==> keyid [0:1] ==> grp key ++when 802.1x ==> keyid > 2 ==> unicast key ++ ++*/ ++struct setkey_parm { ++ u8 algorithm; // encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 ++ u8 keyid; ++ u8 grpkey; // 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x ++ u8 set_tx; // 1: main tx key for wep. 0: other key. ++ u8 key[16]; // this could be 40 or 104 ++}; ++ ++/* ++When in AP or Ad-Hoc mode, this is used to ++allocate an sw/hw entry for a newly associated sta. ++ ++Command ++ ++when shared key ==> algorithm/keyid ++ ++*/ ++struct set_stakey_parm { ++ u8 addr[ETH_ALEN]; ++ u8 algorithm; ++ u8 id;// currently for erasing cam entry if algorithm == _NO_PRIVACY_ ++ u8 key[16]; ++}; ++ ++struct set_stakey_rsp { ++ u8 addr[ETH_ALEN]; ++ u8 keyid; ++ u8 rsvd; ++}; ++ ++/* ++Caller Ad-Hoc/AP ++ ++Command -Rsp(AID == CAMID) mode ++ ++This is to force fw to add an sta_data entry per driver's request. ++ ++FW will write an cam entry associated with it. ++ ++*/ ++struct set_assocsta_parm { ++ u8 addr[ETH_ALEN]; ++}; ++ ++struct set_assocsta_rsp { ++ u8 cam_id; ++ u8 rsvd[3]; ++}; ++ ++/* ++ Caller Ad-Hoc/AP ++ ++ Command mode ++ ++ This is to force fw to del an sta_data entry per driver's request ++ ++ FW will invalidate the cam entry associated with it. ++ ++*/ ++struct del_assocsta_parm { ++ u8 addr[ETH_ALEN]; ++}; ++ ++/* ++Caller Mode: AP/Ad-HoC(M) ++ ++Notes: To notify fw that given staid has changed its power state ++ ++Command Mode ++ ++*/ ++struct setstapwrstate_parm { ++ u8 staid; ++ u8 status; ++ u8 hwaddr[6]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To setup the basic rate of RTL8711 ++ ++Command Mode ++ ++*/ ++struct setbasicrate_parm { ++ u8 basicrates[NumRates]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To read the current basic rate ++ ++Command-Rsp Mode ++ ++*/ ++struct getbasicrate_parm { ++ u32 rsvd; ++}; ++ ++struct getbasicrate_rsp { ++ u8 basicrates[NumRates]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To setup the data rate of RTL8711 ++ ++Command Mode ++ ++*/ ++struct setdatarate_parm { ++#ifdef MP_FIRMWARE_OFFLOAD ++ u32 curr_rateidx; ++#else ++ u8 mac_id; ++ u8 datarates[NumRates]; ++#endif ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To read the current data rate ++ ++Command-Rsp Mode ++ ++*/ ++struct getdatarate_parm { ++ u32 rsvd; ++ ++}; ++struct getdatarate_rsp { ++ u8 datarates[NumRates]; ++}; ++ ++ ++/* ++Caller Mode: Any ++AP: AP can use the info for the contents of beacon frame ++Infra: STA can use the info when sitesurveying ++Ad-HoC(M): Like AP ++Ad-HoC(C): Like STA ++ ++ ++Notes: To set the phy capability of the NIC ++ ++Command Mode ++ ++*/ ++ ++struct setphyinfo_parm { ++ struct regulatory_class class_sets[NUM_REGULATORYS]; ++ u8 status; ++}; ++ ++struct getphyinfo_parm { ++ u32 rsvd; ++}; ++ ++struct getphyinfo_rsp { ++ struct regulatory_class class_sets[NUM_REGULATORYS]; ++ u8 status; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To set the channel/modem/band ++This command will be used when channel/modem/band is changed. ++ ++Command Mode ++ ++*/ ++struct setphy_parm { ++ u8 rfchannel; ++ u8 modem; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To get the current setting of channel/modem/band ++ ++Command-Rsp Mode ++ ++*/ ++struct getphy_parm { ++ u32 rsvd; ++ ++}; ++struct getphy_rsp { ++ u8 rfchannel; ++ u8 modem; ++}; ++ ++struct readBB_parm { ++ u8 offset; ++}; ++struct readBB_rsp { ++ u8 value; ++}; ++ ++struct readTSSI_parm { ++ u8 offset; ++}; ++struct readTSSI_rsp { ++ u8 value; ++}; ++ ++struct writeBB_parm { ++ u8 offset; ++ u8 value; ++}; ++ ++struct readRF_parm { ++ u8 offset; ++}; ++struct readRF_rsp { ++ u32 value; ++}; ++ ++struct writeRF_parm { ++ u32 offset; ++ u32 value; ++}; ++ ++struct getrfintfs_parm { ++ u8 rfintfs; ++}; ++ ++ ++struct Tx_Beacon_param ++{ ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++ Notes: This command is used for H2C/C2H loopback testing ++ ++ mac[0] == 0 ++ ==> CMD mode, return H2C_SUCCESS. ++ The following condition must be ture under CMD mode ++ mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; ++ s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; ++ s2 == (b1 << 8 | b0); ++ ++ mac[0] == 1 ++ ==> CMD_RSP mode, return H2C_SUCCESS_RSP ++ ++ The rsp layout shall be: ++ rsp: parm: ++ mac[0] = mac[5]; ++ mac[1] = mac[4]; ++ mac[2] = mac[3]; ++ mac[3] = mac[2]; ++ mac[4] = mac[1]; ++ mac[5] = mac[0]; ++ s0 = s1; ++ s1 = swap16(s0); ++ w0 = swap32(w1); ++ b0 = b1 ++ s2 = s0 + s1 ++ b1 = b0 ++ w1 = w0 ++ ++ mac[0] == 2 ++ ==> CMD_EVENT mode, return H2C_SUCCESS ++ The event layout shall be: ++ event: parm: ++ mac[0] = mac[5]; ++ mac[1] = mac[4]; ++ mac[2] = event's sequence number, starting from 1 to parm's marc[3] ++ mac[3] = mac[2]; ++ mac[4] = mac[1]; ++ mac[5] = mac[0]; ++ s0 = swap16(s0) - event.mac[2]; ++ s1 = s1 + event.mac[2]; ++ w0 = swap32(w0); ++ b0 = b1 ++ s2 = s0 + event.mac[2] ++ b1 = b0 ++ w1 = swap32(w1) - event.mac[2]; ++ ++ parm->mac[3] is the total event counts that host requested. ++ ++ ++ event will be the same with the cmd's param. ++ ++*/ ++ ++#ifdef CONFIG_H2CLBK ++ ++struct seth2clbk_parm { ++ u8 mac[6]; ++ u16 s0; ++ u16 s1; ++ u32 w0; ++ u8 b0; ++ u16 s2; ++ u8 b1; ++ u32 w1; ++}; ++ ++struct geth2clbk_parm { ++ u32 rsv; ++}; ++ ++struct geth2clbk_rsp { ++ u8 mac[6]; ++ u16 s0; ++ u16 s1; ++ u32 w0; ++ u8 b0; ++ u16 s2; ++ u8 b1; ++ u32 w1; ++}; ++ ++#endif /* CONFIG_H2CLBK */ ++ ++// CMD param Formart for driver extra cmd handler ++struct drvextra_cmd_parm { ++ int ec_id; //extra cmd id ++ int type_size; // Can use this field as the type id or command size ++ unsigned char *pbuf; ++}; ++ ++/*------------------- Below are used for RF/BB tunning ---------------------*/ ++ ++struct setantenna_parm { ++ u8 tx_antset; ++ u8 rx_antset; ++ u8 tx_antenna; ++ u8 rx_antenna; ++}; ++ ++struct enrateadaptive_parm { ++ u32 en; ++}; ++ ++struct settxagctbl_parm { ++ u32 txagc[MAX_RATES_LENGTH]; ++}; ++ ++struct gettxagctbl_parm { ++ u32 rsvd; ++}; ++struct gettxagctbl_rsp { ++ u32 txagc[MAX_RATES_LENGTH]; ++}; ++ ++struct setagcctrl_parm { ++ u32 agcctrl; // 0: pure hw, 1: fw ++}; ++ ++ ++struct setssup_parm { ++ u32 ss_ForceUp[MAX_RATES_LENGTH]; ++}; ++ ++struct getssup_parm { ++ u32 rsvd; ++}; ++struct getssup_rsp { ++ u8 ss_ForceUp[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setssdlevel_parm { ++ u8 ss_DLevel[MAX_RATES_LENGTH]; ++}; ++ ++struct getssdlevel_parm { ++ u32 rsvd; ++}; ++struct getssdlevel_rsp { ++ u8 ss_DLevel[MAX_RATES_LENGTH]; ++}; ++ ++struct setssulevel_parm { ++ u8 ss_ULevel[MAX_RATES_LENGTH]; ++}; ++ ++struct getssulevel_parm { ++ u32 rsvd; ++}; ++struct getssulevel_rsp { ++ u8 ss_ULevel[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setcountjudge_parm { ++ u8 count_judge[MAX_RATES_LENGTH]; ++}; ++ ++struct getcountjudge_parm { ++ u32 rsvd; ++}; ++struct getcountjudge_rsp { ++ u8 count_judge[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setratable_parm { ++ u8 ss_ForceUp[NumRates]; ++ u8 ss_ULevel[NumRates]; ++ u8 ss_DLevel[NumRates]; ++ u8 count_judge[NumRates]; ++}; ++ ++struct getratable_parm { ++ uint rsvd; ++}; ++struct getratable_rsp { ++ u8 ss_ForceUp[NumRates]; ++ u8 ss_ULevel[NumRates]; ++ u8 ss_DLevel[NumRates]; ++ u8 count_judge[NumRates]; ++}; ++ ++ ++//to get TX,RX retry count ++struct gettxretrycnt_parm{ ++ unsigned int rsvd; ++}; ++struct gettxretrycnt_rsp{ ++ unsigned long tx_retrycnt; ++}; ++ ++struct getrxretrycnt_parm{ ++ unsigned int rsvd; ++}; ++struct getrxretrycnt_rsp{ ++ unsigned long rx_retrycnt; ++}; ++ ++//to get BCNOK,BCNERR count ++struct getbcnokcnt_parm{ ++ unsigned int rsvd; ++}; ++struct getbcnokcnt_rsp{ ++ unsigned long bcnokcnt; ++}; ++ ++struct getbcnerrcnt_parm{ ++ unsigned int rsvd; ++}; ++struct getbcnerrcnt_rsp{ ++ unsigned long bcnerrcnt; ++}; ++ ++// to get current TX power level ++struct getcurtxpwrlevel_parm{ ++ unsigned int rsvd; ++}; ++struct getcurtxpwrlevel_rsp{ ++ unsigned short tx_power; ++}; ++ ++struct setprobereqextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setassocreqextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setproberspextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setassocrspextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++ ++struct addBaReq_parm ++{ ++ unsigned int tid; ++ u8 addr[ETH_ALEN]; ++}; ++ ++/*H2C Handler index: 46 */ ++struct set_ch_parm { ++ u8 ch; ++ u8 bw; ++ u8 ch_offset; ++}; ++ ++#ifdef MP_FIRMWARE_OFFLOAD ++/*H2C Handler index: 47 */ ++struct SetTxPower_parm ++{ ++ u8 TxPower; ++}; ++ ++/*H2C Handler index: 48 */ ++struct SwitchAntenna_parm ++{ ++ u16 antenna_tx; ++ u16 antenna_rx; ++// R_ANTENNA_SELECT_CCK cck_txrx; ++ u8 cck_txrx; ++}; ++ ++/*H2C Handler index: 49 */ ++struct SetCrystalCap_parm ++{ ++ u32 curr_crystalcap; ++}; ++ ++/*H2C Handler index: 50 */ ++struct SetSingleCarrierTx_parm ++{ ++ u8 bStart; ++}; ++ ++/*H2C Handler index: 51 */ ++struct SetSingleToneTx_parm ++{ ++ u8 bStart; ++ u8 curr_rfpath; ++}; ++ ++/*H2C Handler index: 52 */ ++struct SetCarrierSuppressionTx_parm ++{ ++ u8 bStart; ++ u32 curr_rateidx; ++}; ++ ++/*H2C Handler index: 53 */ ++struct SetContinuousTx_parm ++{ ++ u8 bStart; ++ u8 CCK_flag; /*1:CCK 2:OFDM*/ ++ u32 curr_rateidx; ++}; ++ ++/*H2C Handler index: 54 */ ++struct SwitchBandwidth_parm ++{ ++ u8 curr_bandwidth; ++}; ++ ++#endif /* MP_FIRMWARE_OFFLOAD */ ++ ++/*H2C Handler index: 59 */ ++struct SetChannelPlan_param ++{ ++ u8 channel_plan; ++}; ++ ++/*H2C Handler index: 60 */ ++struct LedBlink_param ++{ ++ PLED_871x pLed; ++}; ++ ++/*H2C Handler index: 61 */ ++struct SetChannelSwitch_param ++{ ++ u8 new_ch_no; ++}; ++ ++/*H2C Handler index: 62 */ ++struct TDLSoption_param ++{ ++ u8 addr[ETH_ALEN]; ++ u8 option; ++}; ++ ++#define GEN_CMD_CODE(cmd) cmd ## _CMD_ ++ ++ ++/* ++ ++Result: ++0x00: success ++0x01: sucess, and check Response. ++0x02: cmd ignored due to duplicated sequcne number ++0x03: cmd dropped due to invalid cmd code ++0x04: reserved. ++ ++*/ ++ ++#define H2C_RSP_OFFSET 512 ++ ++#define H2C_SUCCESS 0x00 ++#define H2C_SUCCESS_RSP 0x01 ++#define H2C_DUPLICATED 0x02 ++#define H2C_DROPPED 0x03 ++#define H2C_PARAMETERS_ERROR 0x04 ++#define H2C_REJECTED 0x05 ++#define H2C_CMD_OVERFLOW 0x06 ++#define H2C_RESERVED 0x07 ++ ++extern u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr); ++extern u8 rtw_setstandby_cmd(_adapter *padapter, uint action); ++u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, struct rtw_ieee80211_channel *ch, int ch_num); ++extern u8 rtw_createbss_cmd(_adapter *padapter); ++extern u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz); ++extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); ++extern u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key); ++extern u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue); ++extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork); ++u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue); ++extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype); ++extern u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset); ++extern u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset); ++extern u8 rtw_setbbreg_cmd(_adapter * padapter, u8 offset, u8 val); ++extern u8 rtw_setrfreg_cmd(_adapter * padapter, u8 offset, u32 val); ++extern u8 rtw_getbbreg_cmd(_adapter * padapter, u8 offset, u8 * pval); ++extern u8 rtw_getrfreg_cmd(_adapter * padapter, u8 offset, u8 * pval); ++extern u8 rtw_setrfintfs_cmd(_adapter *padapter, u8 mode); ++extern u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table); ++extern u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval); ++ ++extern u8 rtw_gettssi_cmd(_adapter *padapter, u8 offset,u8 *pval); ++extern u8 rtw_setfwdig_cmd(_adapter*padapter, u8 type); ++extern u8 rtw_setfwra_cmd(_adapter*padapter, u8 type); ++ ++extern u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr); ++// add for CONFIG_IEEE80211W, none 11w also can use ++extern u8 rtw_reset_securitypriv_cmd(_adapter*padapter); ++extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter); ++extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter); ++ ++u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++extern u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue); ++#endif ++ ++extern u8 rtw_ps_cmd(_adapter*padapter); ++ ++ ++#ifdef CONFIG_AP_MODE ++u8 rtw_chk_hi_queue_cmd(_adapter*padapter); ++#endif ++ ++u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue); ++extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue); ++extern u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed); ++extern u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no); ++extern u8 rtw_tdls_cmd(_adapter*padapter, u8 *addr, u8 option); ++ ++extern u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt); ++ ++u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_getbbrfreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); ++ ++extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_setassocsta_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++ ++ ++struct _cmd_callback { ++ u32 cmd_code; ++ void (*callback)(_adapter *padapter, struct cmd_obj *cmd); ++}; ++ ++enum rtw_h2c_cmd ++{ ++ GEN_CMD_CODE(_Read_MACREG) , /*0*/ ++ GEN_CMD_CODE(_Write_MACREG) , ++ GEN_CMD_CODE(_Read_BBREG) , ++ GEN_CMD_CODE(_Write_BBREG) , ++ GEN_CMD_CODE(_Read_RFREG) , ++ GEN_CMD_CODE(_Write_RFREG) , /*5*/ ++ GEN_CMD_CODE(_Read_EEPROM) , ++ GEN_CMD_CODE(_Write_EEPROM) , ++ GEN_CMD_CODE(_Read_EFUSE) , ++ GEN_CMD_CODE(_Write_EFUSE) , ++ ++ GEN_CMD_CODE(_Read_CAM) , /*10*/ ++ GEN_CMD_CODE(_Write_CAM) , ++ GEN_CMD_CODE(_setBCNITV), ++ GEN_CMD_CODE(_setMBIDCFG), ++ GEN_CMD_CODE(_JoinBss), /*14*/ ++ GEN_CMD_CODE(_DisConnect) , /*15*/ ++ GEN_CMD_CODE(_CreateBss) , ++ GEN_CMD_CODE(_SetOpMode) , ++ GEN_CMD_CODE(_SiteSurvey), /*18*/ ++ GEN_CMD_CODE(_SetAuth) , ++ ++ GEN_CMD_CODE(_SetKey) , /*20*/ ++ GEN_CMD_CODE(_SetStaKey) , ++ GEN_CMD_CODE(_SetAssocSta) , ++ GEN_CMD_CODE(_DelAssocSta) , ++ GEN_CMD_CODE(_SetStaPwrState) , ++ GEN_CMD_CODE(_SetBasicRate) , /*25*/ ++ GEN_CMD_CODE(_GetBasicRate) , ++ GEN_CMD_CODE(_SetDataRate) , ++ GEN_CMD_CODE(_GetDataRate) , ++ GEN_CMD_CODE(_SetPhyInfo) , ++ ++ GEN_CMD_CODE(_GetPhyInfo) , /*30*/ ++ GEN_CMD_CODE(_SetPhy) , ++ GEN_CMD_CODE(_GetPhy) , ++ GEN_CMD_CODE(_readRssi) , ++ GEN_CMD_CODE(_readGain) , ++ GEN_CMD_CODE(_SetAtim) , /*35*/ ++ GEN_CMD_CODE(_SetPwrMode) , ++ GEN_CMD_CODE(_JoinbssRpt), ++ GEN_CMD_CODE(_SetRaTable) , ++ GEN_CMD_CODE(_GetRaTable) , ++ ++ GEN_CMD_CODE(_GetCCXReport), /*40*/ ++ GEN_CMD_CODE(_GetDTMReport), ++ GEN_CMD_CODE(_GetTXRateStatistics), ++ GEN_CMD_CODE(_SetUsbSuspend), ++ GEN_CMD_CODE(_SetH2cLbk), ++ GEN_CMD_CODE(_AddBAReq) , /*45*/ ++ GEN_CMD_CODE(_SetChannel), /*46*/ ++ GEN_CMD_CODE(_SetTxPower), ++ GEN_CMD_CODE(_SwitchAntenna), ++ GEN_CMD_CODE(_SetCrystalCap), ++ GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/ ++ ++ GEN_CMD_CODE(_SetSingleToneTx),/*51*/ ++ GEN_CMD_CODE(_SetCarrierSuppressionTx), ++ GEN_CMD_CODE(_SetContinuousTx), ++ GEN_CMD_CODE(_SwitchBandwidth), /*54*/ ++ GEN_CMD_CODE(_TX_Beacon), /*55*/ ++ ++ GEN_CMD_CODE(_Set_MLME_EVT), /*56*/ ++ GEN_CMD_CODE(_Set_Drv_Extra), /*57*/ ++ GEN_CMD_CODE(_Set_H2C_MSG), /*58*/ ++ ++ GEN_CMD_CODE(_SetChannelPlan), /*59*/ ++ GEN_CMD_CODE(_LedBlink), /*60*/ ++ ++ GEN_CMD_CODE(_SetChannelSwitch), /*61*/ ++ GEN_CMD_CODE(_TDLS), /*62*/ ++ ++ MAX_H2CCMD ++}; ++ ++#define _GetBBReg_CMD_ _Read_BBREG_CMD_ ++#define _SetBBReg_CMD_ _Write_BBREG_CMD_ ++#define _GetRFReg_CMD_ _Read_RFREG_CMD_ ++#define _SetRFReg_CMD_ _Write_RFREG_CMD_ ++ ++#ifdef _RTW_CMD_C_ ++struct _cmd_callback rtw_cmd_callback[] = ++{ ++ {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ ++ {GEN_CMD_CODE(_Write_MACREG), NULL}, ++ {GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback}, ++ {GEN_CMD_CODE(_Write_BBREG), NULL}, ++ {GEN_CMD_CODE(_Read_RFREG), &rtw_getbbrfreg_cmdrsp_callback}, ++ {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ ++ {GEN_CMD_CODE(_Read_EEPROM), NULL}, ++ {GEN_CMD_CODE(_Write_EEPROM), NULL}, ++ {GEN_CMD_CODE(_Read_EFUSE), NULL}, ++ {GEN_CMD_CODE(_Write_EFUSE), NULL}, ++ ++ {GEN_CMD_CODE(_Read_CAM), NULL}, /*10*/ ++ {GEN_CMD_CODE(_Write_CAM), NULL}, ++ {GEN_CMD_CODE(_setBCNITV), NULL}, ++ {GEN_CMD_CODE(_setMBIDCFG), NULL}, ++ {GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback}, /*14*/ ++ {GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/ ++ {GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback}, ++ {GEN_CMD_CODE(_SetOpMode), NULL}, ++ {GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/ ++ {GEN_CMD_CODE(_SetAuth), NULL}, ++ ++ {GEN_CMD_CODE(_SetKey), NULL}, /*20*/ ++ {GEN_CMD_CODE(_SetStaKey), &rtw_setstaKey_cmdrsp_callback}, ++ {GEN_CMD_CODE(_SetAssocSta), &rtw_setassocsta_cmdrsp_callback}, ++ {GEN_CMD_CODE(_DelAssocSta), NULL}, ++ {GEN_CMD_CODE(_SetStaPwrState), NULL}, ++ {GEN_CMD_CODE(_SetBasicRate), NULL}, /*25*/ ++ {GEN_CMD_CODE(_GetBasicRate), NULL}, ++ {GEN_CMD_CODE(_SetDataRate), NULL}, ++ {GEN_CMD_CODE(_GetDataRate), NULL}, ++ {GEN_CMD_CODE(_SetPhyInfo), NULL}, ++ ++ {GEN_CMD_CODE(_GetPhyInfo), NULL}, /*30*/ ++ {GEN_CMD_CODE(_SetPhy), NULL}, ++ {GEN_CMD_CODE(_GetPhy), NULL}, ++ {GEN_CMD_CODE(_readRssi), NULL}, ++ {GEN_CMD_CODE(_readGain), NULL}, ++ {GEN_CMD_CODE(_SetAtim), NULL}, /*35*/ ++ {GEN_CMD_CODE(_SetPwrMode), NULL}, ++ {GEN_CMD_CODE(_JoinbssRpt), NULL}, ++ {GEN_CMD_CODE(_SetRaTable), NULL}, ++ {GEN_CMD_CODE(_GetRaTable) , NULL}, ++ ++ {GEN_CMD_CODE(_GetCCXReport), NULL}, /*40*/ ++ {GEN_CMD_CODE(_GetDTMReport), NULL}, ++ {GEN_CMD_CODE(_GetTXRateStatistics), NULL}, ++ {GEN_CMD_CODE(_SetUsbSuspend), NULL}, ++ {GEN_CMD_CODE(_SetH2cLbk), NULL}, ++ {GEN_CMD_CODE(_AddBAReq), NULL}, /*45*/ ++ {GEN_CMD_CODE(_SetChannel), NULL}, /*46*/ ++ {GEN_CMD_CODE(_SetTxPower), NULL}, ++ {GEN_CMD_CODE(_SwitchAntenna), NULL}, ++ {GEN_CMD_CODE(_SetCrystalCap), NULL}, ++ {GEN_CMD_CODE(_SetSingleCarrierTx), NULL}, /*50*/ ++ ++ {GEN_CMD_CODE(_SetSingleToneTx), NULL}, /*51*/ ++ {GEN_CMD_CODE(_SetCarrierSuppressionTx), NULL}, ++ {GEN_CMD_CODE(_SetContinuousTx), NULL}, ++ {GEN_CMD_CODE(_SwitchBandwidth), NULL}, /*54*/ ++ {GEN_CMD_CODE(_TX_Beacon), NULL},/*55*/ ++ ++ {GEN_CMD_CODE(_Set_MLME_EVT), NULL},/*56*/ ++ {GEN_CMD_CODE(_Set_Drv_Extra), NULL},/*57*/ ++ {GEN_CMD_CODE(_Set_H2C_MSG), NULL},/*58*/ ++ {GEN_CMD_CODE(_SetChannelPlan), NULL},/*59*/ ++ {GEN_CMD_CODE(_LedBlink), NULL},/*60*/ ++ ++ {GEN_CMD_CODE(_SetChannelSwitch), NULL},/*61*/ ++ {GEN_CMD_CODE(_TDLS), NULL},/*62*/ ++}; ++#endif ++ ++#endif // _CMD_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_debug.h +@@ -0,0 +1,538 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_DEBUG_H__ ++#define __RTW_DEBUG_H__ ++ ++#include ++#include ++#include ++ ++ ++#define _no_debug_ 0 ++#define _drv_emerg_ 1 ++#define _drv_alert_ 2 ++#define _drv_crit_ 3 ++#define _drv_err_ 4 ++#define _drv_warning_ 5 ++#define _drv_notice_ 6 ++#define _drv_info_ 7 ++#define _drv_dump_ 8 ++#define _drv_debug_ 9 ++#define _drv_always_ _drv_emerg_ ++ ++#define _module_rtl871x_xmit_c_ BIT(0) ++#define _module_xmit_osdep_c_ BIT(1) ++#define _module_rtl871x_recv_c_ BIT(2) ++#define _module_recv_osdep_c_ BIT(3) ++#define _module_rtl871x_mlme_c_ BIT(4) ++#define _module_mlme_osdep_c_ BIT(5) ++#define _module_rtl871x_sta_mgt_c_ BIT(6) ++#define _module_rtl871x_cmd_c_ BIT(7) ++#define _module_cmd_osdep_c_ BIT(8) ++#define _module_rtl871x_io_c_ BIT(9) ++#define _module_io_osdep_c_ BIT(10) ++#define _module_os_intfs_c_ BIT(11) ++#define _module_rtl871x_security_c_ BIT(12) ++#define _module_rtl871x_eeprom_c_ BIT(13) ++#define _module_hal_init_c_ BIT(14) ++#define _module_hci_hal_init_c_ BIT(15) ++#define _module_rtl871x_ioctl_c_ BIT(16) ++#define _module_rtl871x_ioctl_set_c_ BIT(17) ++#define _module_rtl871x_ioctl_query_c_ BIT(18) ++#define _module_rtl871x_pwrctrl_c_ BIT(19) ++#define _module_hci_intfs_c_ BIT(20) ++#define _module_hci_ops_c_ BIT(21) ++#define _module_osdep_service_c_ BIT(22) ++#define _module_mp_ BIT(23) ++#define _module_hci_ops_os_c_ BIT(24) ++#define _module_rtl871x_ioctl_os_c BIT(25) ++#define _module_rtl8712_cmd_c_ BIT(26) ++//#define _module_efuse_ BIT(27) ++#define _module_rtl8192c_xmit_c_ BIT(28) ++#define _module_hal_xmit_c_ BIT(28) ++#define _module_efuse_ BIT(29) ++#define _module_rtl8712_recv_c_ BIT(30) ++#define _module_rtl8712_led_c_ BIT(31) ++ ++#undef _MODULE_DEFINE_ ++ ++#if defined _RTW_XMIT_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_xmit_c_ ++#elif defined _XMIT_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_xmit_osdep_c_ ++#elif defined _RTW_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_recv_c_ ++#elif defined _RECV_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_recv_osdep_c_ ++#elif defined _RTW_MLME_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_mlme_c_ ++#elif defined _MLME_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ ++#elif defined _RTW_MLME_EXT_C_ ++ #define _MODULE_DEFINE_ 1 ++#elif defined _RTW_STA_MGT_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_ ++#elif defined _RTW_CMD_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_cmd_c_ ++#elif defined _CMD_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_cmd_osdep_c_ ++#elif defined _RTW_IO_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_io_c_ ++#elif defined _IO_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_io_osdep_c_ ++#elif defined _OS_INTFS_C_ ++ #define _MODULE_DEFINE_ _module_os_intfs_c_ ++#elif defined _RTW_SECURITY_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_security_c_ ++#elif defined _RTW_EEPROM_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_ ++#elif defined _HAL_INTF_C_ ++ #define _MODULE_DEFINE_ _module_hal_init_c_ ++#elif defined _HCI_HAL_INIT_C_ ++ #define _MODULE_DEFINE_ _module_hci_hal_init_c_ ++#elif defined _RTL871X_IOCTL_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_ ++#elif defined _RTL871X_IOCTL_SET_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_ ++#elif defined _RTL871X_IOCTL_QUERY_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_ ++#elif defined _RTL871X_PWRCTRL_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_ ++#elif defined _RTW_PWRCTRL_C_ ++ #define _MODULE_DEFINE_ 1 ++#elif defined _HCI_INTF_C_ ++ #define _MODULE_DEFINE_ _module_hci_intfs_c_ ++#elif defined _HCI_OPS_C_ ++ #define _MODULE_DEFINE_ _module_hci_ops_c_ ++#elif defined _SDIO_OPS_C_ ++ #define _MODULE_DEFINE_ 1 ++#elif defined _OSDEP_HCI_INTF_C_ ++ #define _MODULE_DEFINE_ _module_hci_intfs_c_ ++#elif defined _OSDEP_SERVICE_C_ ++ #define _MODULE_DEFINE_ _module_osdep_service_c_ ++#elif defined _HCI_OPS_OS_C_ ++ #define _MODULE_DEFINE_ _module_hci_ops_os_c_ ++#elif defined _RTL871X_IOCTL_LINUX_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c ++#elif defined _RTL8712_CMD_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_cmd_c_ ++#elif defined _RTL8192C_XMIT_C_ ++ #define _MODULE_DEFINE_ 1 ++#elif defined _RTL8723AS_XMIT_C_ ++ #define _MODULE_DEFINE_ 1 ++#elif defined _RTL8712_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ ++#elif defined _RTL8192CU_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ ++#elif defined _RTL871X_MLME_EXT_C_ ++ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ ++#elif defined _RTW_MP_C_ ++ #define _MODULE_DEFINE_ _module_mp_ ++#elif defined _RTW_MP_IOCTL_C_ ++ #define _MODULE_DEFINE_ _module_mp_ ++#elif defined _RTW_EFUSE_C_ ++ #define _MODULE_DEFINE_ _module_efuse_ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++extern void rtl871x_cedbg(const char *fmt, ...); ++#endif ++ ++#define RT_TRACE(_Comp, _Level, Fmt) do{}while(0) ++#define _func_enter_ do{}while(0) ++#define _func_exit_ do{}while(0) ++#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0) ++ ++#undef _dbgdump ++ ++#ifdef CONFIG_DEBUG_RTL871X ++ ++#ifndef _RTL871X_DEBUG_C_ ++ extern u32 GlobalDebugLevel; ++ extern u64 GlobalDebugComponents; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ #ifdef PLATFORM_OS_XP ++ ++ #define _dbgdump DbgPrint ++ ++ #elif defined PLATFORM_OS_CE ++ ++ #define _dbgdump rtl871x_cedbg ++ ++ #endif ++ ++#elif defined PLATFORM_LINUX ++ ++ #define _dbgdump printk ++ ++#elif defined PLATFORM_FREEBSD ++ ++ #define _dbgdump printf ++ ++#endif ++ ++#endif /* CONFIG_DEBUG_RTL871X */ ++ ++ ++#if defined (_dbgdump) && defined (_MODULE_DEFINE_) ++ ++ #undef RT_TRACE ++ #define RT_TRACE(_Comp, _Level, Fmt)\ ++ do {\ ++ if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\ ++ _dbgdump("%s [0x%08x,%d]", RTL871X_MODULE_NAME, (unsigned int)_Comp, _Level);\ ++ _dbgdump Fmt;\ ++ }\ ++ }while(0) ++ ++#endif ++ ++ ++#if defined (_dbgdump) ++ ++ #undef _func_enter_ ++ #define _func_enter_ \ ++ do { \ ++ if (GlobalDebugLevel >= _drv_debug_) \ ++ { \ ++ _dbgdump("\n %s : %s enters at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__);\ ++ } \ ++ } while(0) ++ ++ #undef _func_exit_ ++ #define _func_exit_ \ ++ do { \ ++ if (GlobalDebugLevel >= _drv_debug_) \ ++ { \ ++ _dbgdump("\n %s : %s exits at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__); \ ++ } \ ++ } while(0) ++ ++ #undef RT_PRINT_DATA ++ #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \ ++ if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \ ++ { \ ++ int __i; \ ++ u8 *ptr = (u8 *)_HexData; \ ++ _dbgdump("Rtl871x: "); \ ++ _dbgdump(_TitleString); \ ++ for( __i=0; __i<(int)_HexDataLen; __i++ ) \ ++ { \ ++ _dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \ ++ if (((__i + 1) % 16) == 0) _dbgdump("\n"); \ ++ } \ ++ _dbgdump("\n"); \ ++ } ++#endif ++ ++ ++#ifdef CONFIG_DEBUG_RTL819X ++ ++#undef _dbgdump ++ ++#ifdef PLATFORM_WINDOWS ++ ++ #ifdef PLATFORM_OS_XP ++ ++ #define _dbgdump DbgPrint ++ ++ #elif defined PLATFORM_OS_CE ++ ++ #define _dbgdump rtl871x_cedbg ++ ++ #endif ++ ++#elif defined PLATFORM_LINUX ++ ++ #define _dbgdump printk ++ ++#elif defined PLATFORM_FREEBSD ++ ++ #define _dbgdump printf ++ ++#endif ++ ++#endif /* CONFIG_DEBUG_RTL819X */ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ #define DBG_871X do {} while(0) ++ #define MSG_8192C do {} while(0) ++ #define DBG_8192C do {} while(0) ++ #define WRN_8192C do {} while(0) ++ #define ERR_8192C do {} while(0) ++#endif ++ ++#ifdef PLATFORM_LINUX ++ #define DBG_871X(x, ...) do {} while(0) ++ #define MSG_8192C(x, ...) do {} while(0) ++ #define DBG_8192C(x,...) do {} while(0) ++ #define WRN_8192C(x,...) do {} while(0) ++ #define ERR_8192C(x,...) do {} while(0) ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ #define _dbgdump printf ++ #define DBG_871X(x, ...) do {} while(0) ++ #define MSG_8192C(x, ...) do {} while(0) ++ #define DBG_8192C(x,...) do {} while(0) ++ #define WRN_8192C(x,...) do {} while(0) ++ #define ERR_8192C(x,...) do {} while(0) ++#endif ++ ++extern u32 GlobalDebugLevel; ++#define LOG_LEVEL(level, ...)\ ++ do {\ ++ if(level <= GlobalDebugLevel) {\ ++ printk(__VA_ARGS__);\ ++ }\ ++ }while(0) ++ ++#define DBG_871X_LEVEL LOG_LEVEL ++ ++#if defined (_dbgdump) ++ #undef DBG_871X ++// #define DBG_871X _dbgdump ++ #define DBG_871X(...) LOG_LEVEL(_drv_debug_ , __VA_ARGS__) ++ ++ #undef MSG_8192C ++// #define MSG_8192C _dbgdump ++ #define MSG_8192C(...) LOG_LEVEL(_drv_info_ , __VA_ARGS__) ++ ++ #undef DBG_8192C ++// #define DBG_8192C _dbgdump ++ #define DBG_8192C(...) LOG_LEVEL(_drv_debug_ , __VA_ARGS__) ++ ++ ++ #undef WRN_8192C ++ #define WRN_8192C _dbgdump ++ ++ #undef ERR_8192C ++ #define ERR_8192C _dbgdump ++#endif ++ ++ ++#ifdef CONFIG_PROC_DEBUG ++ ++ int proc_get_drv_version(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_log_level(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_log_level(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++#ifdef DBG_MEM_ALLOC ++ int proc_get_mstat(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++#endif /* DBG_MEM_ALLOC */ ++ ++ int proc_get_write_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_write_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_read_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_read_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ ++ int proc_get_fwstate(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_sec_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_mlmext_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_qos_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_ht_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_ap_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_adapter_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_trx_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_mac_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_mac_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_mac_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_bb_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_bb_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_bb_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_reg_dump4(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++#ifdef CONFIG_AP_MODE ++ ++ int proc_get_all_sta_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ int proc_get_malloc_cnt(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ int proc_get_best_channel(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ int proc_set_best_channel(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++#endif ++ ++ int proc_get_rx_signal(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_rx_signal(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_ht_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_ht_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_cbw40_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_cbw40_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_ampdu_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_ampdu_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_two_path_rssi(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rx_stbc(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_rx_stbc(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ ++ int proc_get_vid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_pid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rssi_disp(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_rssi_disp(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++int proc_get_sreset(char *page, char **start, off_t offset, int count, int *eof, void *data); ++int proc_set_sreset(struct file *file, const char *buffer, unsigned long count, void *data); ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++int proc_get_dm_adaptivity(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++int proc_set_dm_adaptivity(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ ++#endif //CONFIG_PROC_DEBUG ++ ++#endif //__RTW_DEBUG_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_eeprom.h +@@ -0,0 +1,152 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_EEPROM_H__ ++#define __RTW_EEPROM_H__ ++ ++#include ++#include ++#include ++ ++#define RTL8712_EEPROM_ID 0x8712 ++#define EEPROM_MAX_SIZE 256 ++#define CLOCK_RATE 50 //100us ++ ++//- EEPROM opcodes ++#define EEPROM_READ_OPCODE 06 ++#define EEPROM_WRITE_OPCODE 05 ++#define EEPROM_ERASE_OPCODE 07 ++#define EEPROM_EWEN_OPCODE 19 // Erase/write enable ++#define EEPROM_EWDS_OPCODE 16 // Erase/write disable ++ ++//Country codes ++#define USA 0x555320 ++#define EUROPE 0x1 //temp, should be provided later ++#define JAPAN 0x2 //temp, should be provided later ++ ++#ifdef CONFIG_SDIO_HCI ++#define eeprom_cis0_sz 17 ++#define eeprom_cis1_sz 50 ++#endif ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_ALPHA 0x1 ++#define EEPROM_CID_Senao 0x3 ++#define EEPROM_CID_NetCore 0x5 ++#define EEPROM_CID_CAMEO 0X8 ++#define EEPROM_CID_SITECOM 0x9 ++#define EEPROM_CID_COREGA 0xB ++#define EEPROM_CID_EDIMAX_BELKIN 0xC ++#define EEPROM_CID_SERCOMM_BELKIN 0xE ++#define EEPROM_CID_CAMEO1 0xF ++#define EEPROM_CID_WNC_COREGA 0x12 ++#define EEPROM_CID_CLEVO 0x13 ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++// ++// Customer ID, note that: ++// This variable is initiailzed through EEPROM or registry, ++// however, its definition may be different with that in EEPROM for ++// EEPROM size consideration. So, we have to perform proper translation between them. ++// Besides, CustomerID of registry has precedence of that of EEPROM. ++// defined below. 060703, by rcnjko. ++// ++typedef enum _RT_CUSTOMER_ID ++{ ++ RT_CID_DEFAULT = 0, ++ RT_CID_8187_ALPHA0 = 1, ++ RT_CID_8187_SERCOMM_PS = 2, ++ RT_CID_8187_HW_LED = 3, ++ RT_CID_8187_NETGEAR = 4, ++ RT_CID_WHQL = 5, ++ RT_CID_819x_CAMEO = 6, ++ RT_CID_819x_RUNTOP = 7, ++ RT_CID_819x_Senao = 8, ++ RT_CID_TOSHIBA = 9, // Merge by Jacken, 2008/01/31. ++ RT_CID_819x_Netcore = 10, ++ RT_CID_Nettronix = 11, ++ RT_CID_DLINK = 12, ++ RT_CID_PRONET = 13, ++ RT_CID_COREGA = 14, ++ RT_CID_CHINA_MOBILE = 15, ++ RT_CID_819x_ALPHA = 16, ++ RT_CID_819x_Sitecom = 17, ++ RT_CID_CCX = 18, // It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. ++ RT_CID_819x_Lenovo = 19, ++ RT_CID_819x_QMI = 20, ++ RT_CID_819x_Edimax_Belkin = 21, ++ RT_CID_819x_Sercomm_Belkin = 22, ++ RT_CID_819x_CAMEO1 = 23, ++ RT_CID_819x_MSI = 24, ++ RT_CID_819x_Acer = 25, ++ RT_CID_819x_AzWave_ASUS = 26, ++ RT_CID_819x_AzWave = 27, // For AzWave in PCIe, The ID is AzWave use and not only Asus ++ RT_CID_819x_HP = 28, ++ RT_CID_819x_WNC_COREGA = 29, ++ RT_CID_819x_Arcadyan_Belkin = 30, ++ RT_CID_819x_SAMSUNG = 31, ++ RT_CID_819x_CLEVO = 32, ++ RT_CID_819x_DELL = 33, ++ RT_CID_819x_PRONETS = 34, ++ RT_CID_819x_Edimax_ASUS = 35, ++ RT_CID_819x_CAMEO_NETGEAR = 36, ++}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; ++ ++struct eeprom_priv ++{ ++ u8 bautoload_fail_flag; ++ //u8 bempty; ++ //u8 sys_config; ++ u8 mac_addr[6]; //PermanentAddress ++ //u8 config0; ++ u16 channel_plan; ++ //u8 country_string[3]; ++ //u8 tx_power_b[15]; ++ //u8 tx_power_g[15]; ++ //u8 tx_power_a[201]; ++ ++ u8 EepromOrEfuse; ++ ++ u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; ++ ++#ifdef CONFIG_SDIO_HCI ++ u8 sdio_setting; ++ u32 ocr; ++ u8 cis0[eeprom_cis0_sz]; ++ u8 cis1[eeprom_cis1_sz]; ++#endif ++}; ++ ++ ++extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data); ++extern u16 eeprom_read16(_adapter *padapter, u16 reg); ++extern void read_eeprom_content(_adapter *padapter); ++extern void eeprom_read_sz(_adapter * padapter, u16 reg,u8* data, u32 sz); ++ ++extern void read_eeprom_content_by_attrib(_adapter * padapter ); ++ ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++extern int isAdaptorInfoFileValid(void); ++extern int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); ++extern int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++#endif //PLATFORM_LINUX ++ ++#endif //__RTL871X_EEPROM_H__ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_efuse.h +@@ -0,0 +1,124 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_EFUSE_H__ ++#define __RTW_EFUSE_H__ ++ ++#include ++#include ++ ++#define EFUSE_ERROE_HANDLE 1 ++ ++#define PG_STATE_HEADER 0x01 ++#define PG_STATE_WORD_0 0x02 ++#define PG_STATE_WORD_1 0x04 ++#define PG_STATE_WORD_2 0x08 ++#define PG_STATE_WORD_3 0x10 ++#define PG_STATE_DATA 0x20 ++ ++#define PG_SWBYTE_H 0x01 ++#define PG_SWBYTE_L 0x02 ++ ++#define PGPKT_DATA_SIZE 8 ++ ++#define EFUSE_WIFI 0 ++#define EFUSE_BT 1 ++ ++enum _EFUSE_DEF_TYPE { ++ TYPE_EFUSE_MAX_SECTION = 0, ++ TYPE_EFUSE_REAL_CONTENT_LEN = 1, ++ TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2, ++ TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3, ++ TYPE_EFUSE_MAP_LEN = 4, ++ TYPE_EFUSE_PROTECT_BYTES_BANK = 5, ++}; ++ ++#define EFUSE_MAX_MAP_LEN 256 ++#define EFUSE_MAX_HW_SIZE 512 ++#define EFUSE_MAX_SECTION_BASE 16 ++ ++#define EXT_HEADER(header) ((header & 0x1F ) == 0x0F) ++#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F) ++#define GET_HDR_OFFSET_2_0(header) ( (header & 0xE0) >> 5) ++ ++#define EFUSE_REPEAT_THRESHOLD_ 3 ++ ++//============================================= ++// The following is for BT Efuse definition ++//============================================= ++#define EFUSE_BT_MAX_MAP_LEN 1024 ++#define EFUSE_MAX_BANK 4 ++#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1) ++//============================================= ++/*--------------------------Define Parameters-------------------------------*/ ++#define EFUSE_MAX_WORD_UNIT 4 ++ ++/*------------------------------Define structure----------------------------*/ ++typedef struct PG_PKT_STRUCT_A{ ++ u8 offset; ++ u8 word_en; ++ u8 data[8]; ++ u8 word_cnts; ++}PGPKT_STRUCT,*PPGPKT_STRUCT; ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++extern u8 fakeEfuseBank; ++extern u32 fakeEfuseUsedBytes; ++extern u8 fakeEfuseContent[]; ++extern u8 fakeEfuseInitMap[]; ++extern u8 fakeEfuseModifiedMap[]; ++ ++extern u32 BTEfuseUsedBytes; ++extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++extern u8 BTEfuseInitMap[]; ++extern u8 BTEfuseModifiedMap[]; ++ ++extern u32 fakeBTEfuseUsedBytes; ++extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++extern u8 fakeBTEfuseInitMap[]; ++extern u8 fakeBTEfuseModifiedMap[]; ++/*------------------------Export global variable----------------------------*/ ++ ++u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size); ++u16 efuse_GetMaxSize(PADAPTER padapter); ++u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data); ++u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); ++u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); ++ ++u16 Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++u8 Efuse_CalculateWordCnts(u8 word_en); ++void ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ; ++void EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest); ++u8 efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN bPseudoTest); ++u8 efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN bPseudoTest); ++ ++void Efuse_PowerSwitch(PADAPTER pAdapter,u8 bWrite,u8 PwrState); ++int Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); ++int Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); ++u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ ++u8 EFUSE_Read1Byte(PADAPTER pAdapter, u16 Address); ++void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_event.h +@@ -0,0 +1,154 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_EVENT_H_ ++#define _RTW_EVENT_H_ ++#include ++#include ++ ++#ifndef CONFIG_RTL8711FW ++#ifdef PLATFORM_LINUX ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++#include ++#else ++#include ++#endif ++#include ++#endif ++#else ++#include ++#endif//CONFIG_RTL8711FW ++ ++ ++ ++#ifdef CONFIG_H2CLBK ++#include ++#endif ++ ++/* ++Used to report a bss has been scanned ++ ++*/ ++struct survey_event { ++ WLAN_BSSID_EX bss; ++}; ++ ++/* ++Used to report that the requested site survey has been done. ++ ++bss_cnt indicates the number of bss that has been reported. ++ ++ ++*/ ++struct surveydone_event { ++ unsigned int bss_cnt; ++ ++}; ++ ++/* ++Used to report the link result of joinning the given bss ++ ++ ++join_res: ++-1: authentication fail ++-2: association fail ++> 0: TID ++ ++*/ ++struct joinbss_event { ++ struct wlan_network network; ++}; ++ ++/* ++Used to report a given STA has joinned the created BSS. ++It is used in AP/Ad-HoC(M) mode. ++ ++ ++*/ ++struct stassoc_event { ++ unsigned char macaddr[6]; ++ unsigned char rsvd[2]; ++ int cam_id; ++ ++}; ++ ++struct stadel_event { ++ unsigned char macaddr[6]; ++ unsigned char rsvd[2]; //for reason ++ int mac_id; ++}; ++ ++struct addba_event ++{ ++ unsigned int tid; ++}; ++ ++ ++#ifdef CONFIG_H2CLBK ++struct c2hlbk_event{ ++ unsigned char mac[6]; ++ unsigned short s0; ++ unsigned short s1; ++ unsigned int w0; ++ unsigned char b0; ++ unsigned short s2; ++ unsigned char b1; ++ unsigned int w1; ++}; ++#endif//CONFIG_H2CLBK ++ ++#define GEN_EVT_CODE(event) event ## _EVT_ ++ ++ ++ ++struct fwevent { ++ u32 parmsize; ++ void (*event_callback)(_adapter *dev, u8 *pbuf); ++}; ++ ++ ++#define C2HEVENT_SZ 32 ++ ++struct event_node{ ++ unsigned char *node; ++ unsigned char evt_code; ++ unsigned short evt_sz; ++ volatile int *caller_ff_tail; ++ int caller_ff_sz; ++}; ++ ++struct c2hevent_queue { ++ volatile int head; ++ volatile int tail; ++ struct event_node nodes[C2HEVENT_SZ]; ++ unsigned char seq; ++}; ++ ++#define NETWORK_QUEUE_SZ 4 ++ ++struct network_queue { ++ volatile int head; ++ volatile int tail; ++ WLAN_BSSID_EX networks[NETWORK_QUEUE_SZ]; ++}; ++ ++ ++#endif // _WLANEVENT_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ht.h +@@ -0,0 +1,50 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_HT_H_ ++#define _RTW_HT_H_ ++ ++#include ++#include ++#include "wifi.h" ++ ++struct ht_priv ++{ ++ u32 ht_option; ++ u32 ampdu_enable;//for enable Tx A-MPDU ++ //u8 baddbareq_issued[16]; ++ u32 tx_amsdu_enable;//for enable Tx A-MSDU ++ u32 tx_amdsu_maxlen; // 1: 8k, 0:4k ; default:8k, for tx ++ u32 rx_ampdu_maxlen; //for rx reordering ctrl win_sz, updated when join_callback. ++ ++ u8 bwmode;// ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ ++ //for processing Tx A-MPDU ++ u8 agg_enable_bitmap; ++ //u8 ADDBA_retry_count; ++ u8 candidate_tid_bitmap; ++ ++ struct rtw_ieee80211_ht_cap ht_cap; ++ ++}; ++ ++#endif //_RTL871X_HT_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_io.h +@@ -0,0 +1,504 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef _RTW_IO_H_ ++#define _RTW_IO_H_ ++ ++#include ++#include ++#include ++ ++#ifdef PLATFORM_LINUX ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++#include ++#else ++#include ++#endif ++#include ++//#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++#include ++#else ++#include ++#endif ++#endif //CONFIG_USB_HCI ++ ++#endif //PLATFORM_LINUX ++ ++ ++#define NUM_IOREQ 8 ++ ++#ifdef PLATFORM_WINDOWS ++#define MAX_PROT_SZ 64 ++#endif ++#ifdef PLATFORM_LINUX ++#define MAX_PROT_SZ (64-16) ++#endif ++ ++#define _IOREADY 0 ++#define _IO_WAIT_COMPLETE 1 ++#define _IO_WAIT_RSP 2 ++ ++// IO COMMAND TYPE ++#define _IOSZ_MASK_ (0x7F) ++#define _IO_WRITE_ BIT(7) ++#define _IO_FIXED_ BIT(8) ++#define _IO_BURST_ BIT(9) ++#define _IO_BYTE_ BIT(10) ++#define _IO_HW_ BIT(11) ++#define _IO_WORD_ BIT(12) ++#define _IO_SYNC_ BIT(13) ++#define _IO_CMDMASK_ (0x1F80) ++ ++ ++/* ++ For prompt mode accessing, caller shall free io_req ++ Otherwise, io_handler will free io_req ++*/ ++ ++ ++ ++// IO STATUS TYPE ++#define _IO_ERR_ BIT(2) ++#define _IO_SUCCESS_ BIT(1) ++#define _IO_DONE_ BIT(0) ++ ++ ++#define IO_RD32 (_IO_SYNC_ | _IO_WORD_) ++#define IO_RD16 (_IO_SYNC_ | _IO_HW_) ++#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) ++ ++#define IO_RD32_ASYNC (_IO_WORD_) ++#define IO_RD16_ASYNC (_IO_HW_) ++#define IO_RD8_ASYNC (_IO_BYTE_) ++ ++#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) ++#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) ++#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) ++ ++#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) ++#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) ++#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) ++ ++/* ++ ++ Only Sync. burst accessing is provided. ++ ++*/ ++ ++#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) ++#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) ++ ++ ++ ++//below is for the intf_option bit defition... ++ ++#define _INTF_ASYNC_ BIT(0) //support async io ++ ++struct intf_priv; ++struct intf_hdl; ++struct io_queue; ++ ++struct _io_ops ++{ ++ u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); ++ u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); ++ u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); ++ ++ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ ++ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); ++ ++ u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem); ++ ++ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); ++ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); ++ ++}; ++ ++struct io_req { ++ _list list; ++ u32 addr; ++ volatile u32 val; ++ u32 command; ++ u32 status; ++ u8 *pbuf; ++ _sema sema; ++ ++#ifdef PLATFORM_OS_CE ++#ifdef CONFIG_USB_HCI ++ // URB handler for rtw_write_mem ++ USB_TRANSFER usb_transfer_write_mem; ++#endif ++#endif ++ ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); ++ u8 *cnxt; ++ ++#ifdef PLATFORM_OS_XP ++ PMDL pmdl; ++ PIRP pirp; ++ ++#ifdef CONFIG_SDIO_HCI ++ PSDBUS_REQUEST_PACKET sdrp; ++#endif ++ ++#endif ++ ++ ++}; ++ ++struct intf_hdl { ++ ++/* ++ u32 intf_option; ++ u32 bus_status; ++ u32 do_flush; ++ u8 *adapter; ++ u8 *intf_dev; ++ struct intf_priv *pintfpriv; ++ u8 cnt; ++ void (*intf_hdl_init)(u8 *priv); ++ void (*intf_hdl_unload)(u8 *priv); ++ void (*intf_hdl_open)(u8 *priv); ++ void (*intf_hdl_close)(u8 *priv); ++ struct _io_ops io_ops; ++ //u8 intf_status;//moved to struct intf_priv ++ u16 len; ++ u16 done_len; ++*/ ++ _adapter *padapter; ++ struct dvobj_priv *pintf_dev;// pointer to &(padapter->dvobjpriv); ++ ++ struct _io_ops io_ops; ++ ++}; ++ ++struct reg_protocol_rd { ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ //DW1 ++ u32 NumOfTrans:4; ++ u32 Reserved1:4; ++ u32 Reserved2:24; ++ //DW2 ++ u32 ByteCount:7; ++ u32 WriteEnable:1; //0:read, 1:write ++ u32 FixOrContinuous:1; //0:continuous, 1: Fix ++ u32 BurstMode:1; ++ u32 Byte1Access:1; ++ u32 Byte2Access:1; ++ u32 Byte4Access:1; ++ u32 Reserved3:3; ++ u32 Reserved4:16; ++ //DW3 ++ u32 BusAddress; ++ //DW4 ++ //u32 Value; ++#else ++ ++ ++//DW1 ++ u32 Reserved1 :4; ++ u32 NumOfTrans :4; ++ ++ u32 Reserved2 :24; ++ ++ //DW2 ++ u32 WriteEnable : 1; ++ u32 ByteCount :7; ++ ++ ++ u32 Reserved3 : 3; ++ u32 Byte4Access : 1; ++ ++ u32 Byte2Access : 1; ++ u32 Byte1Access : 1; ++ u32 BurstMode :1 ; ++ u32 FixOrContinuous : 1; ++ ++ u32 Reserved4 : 16; ++ ++ //DW3 ++ u32 BusAddress; ++ ++ //DW4 ++ //u32 Value; ++ ++#endif ++ ++}; ++ ++ ++struct reg_protocol_wt { ++ ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ //DW1 ++ u32 NumOfTrans:4; ++ u32 Reserved1:4; ++ u32 Reserved2:24; ++ //DW2 ++ u32 ByteCount:7; ++ u32 WriteEnable:1; //0:read, 1:write ++ u32 FixOrContinuous:1; //0:continuous, 1: Fix ++ u32 BurstMode:1; ++ u32 Byte1Access:1; ++ u32 Byte2Access:1; ++ u32 Byte4Access:1; ++ u32 Reserved3:3; ++ u32 Reserved4:16; ++ //DW3 ++ u32 BusAddress; ++ //DW4 ++ u32 Value; ++ ++#else ++ //DW1 ++ u32 Reserved1 :4; ++ u32 NumOfTrans :4; ++ ++ u32 Reserved2 :24; ++ ++ //DW2 ++ u32 WriteEnable : 1; ++ u32 ByteCount :7; ++ ++ u32 Reserved3 : 3; ++ u32 Byte4Access : 1; ++ ++ u32 Byte2Access : 1; ++ u32 Byte1Access : 1; ++ u32 BurstMode :1 ; ++ u32 FixOrContinuous : 1; ++ ++ u32 Reserved4 : 16; ++ ++ //DW3 ++ u32 BusAddress; ++ ++ //DW4 ++ u32 Value; ++ ++#endif ++ ++}; ++ ++ ++ ++/* ++Below is the data structure used by _io_handler ++ ++*/ ++ ++struct io_queue { ++ _lock lock; ++ _list free_ioreqs; ++ _list pending; //The io_req list that will be served in the single protocol read/write. ++ _list processing; ++ u8 *free_ioreqs_buf; // 4-byte aligned ++ u8 *pallocated_free_ioreqs_buf; ++ struct intf_hdl intf; ++}; ++ ++struct io_priv{ ++ ++ _adapter *padapter; ++ ++ struct intf_hdl intf; ++ ++}; ++ ++extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); ++extern void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue); ++extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); ++ ++ ++extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); ++extern struct io_req *alloc_ioreq(struct io_queue *pio_q); ++ ++extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); ++extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); ++ ++extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++extern u8 _rtw_read8(_adapter *adapter, u32 addr); ++extern u16 _rtw_read16(_adapter *adapter, u32 addr); ++extern u32 _rtw_read32(_adapter *adapter, u32 addr); ++extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_read_port_cancel(_adapter *adapter); ++ ++ ++extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); ++extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); ++extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); ++extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); ++ ++extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); ++extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); ++extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); ++ ++extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms); ++extern void _rtw_write_port_cancel(_adapter *adapter); ++ ++#ifdef DBG_IO ++bool match_read_sniff_ranges(u16 addr, u16 len); ++bool match_write_sniff_ranges(u16 addr, u16 len); ++ ++extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line); ++extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line); ++extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line); ++ ++extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); ++extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); ++extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); ++extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); ++ ++#define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__) ++#define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__) ++#define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__) ++#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) ++ ++#define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) ++ ++#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) ++#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) ++#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) ++ ++#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) ++#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) ++#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) ++#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) ++#else //DBG_IO ++#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) ++#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) ++#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) ++#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) ++ ++#define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) ++#define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) ++#define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) ++#define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) ++ ++#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) ++#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) ++#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) ++ ++#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) ++#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) ++#endif //DBG_IO ++ ++extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); ++ ++//ioreq ++extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); ++extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); ++extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); ++extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); ++extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); ++extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); ++ ++ ++extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++ ++extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++extern void async_write8(_adapter *adapter, u32 addr, u8 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern void async_write16(_adapter *adapter, u32 addr, u16 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern void async_write32(_adapter *adapter, u32 addr, u32 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++ ++extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++ ++int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops)); ++ ++ ++extern uint alloc_io_queue(_adapter *adapter); ++extern void free_io_queue(_adapter *adapter); ++extern void async_bus_io(struct io_queue *pio_q); ++extern void bus_sync_io(struct io_queue *pio_q); ++extern u32 _ioreq2rwmem(struct io_queue *pio_q); ++extern void dev_power_down(_adapter * Adapter, u8 bpwrup); ++ ++/* ++#define RTL_R8(reg) rtw_read8(padapter, reg) ++#define RTL_R16(reg) rtw_read16(padapter, reg) ++#define RTL_R32(reg) rtw_read32(padapter, reg) ++#define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) ++#define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) ++#define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) ++*/ ++ ++/* ++#define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) ++#define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) ++#define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) ++ ++#define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) ++#define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) ++*/ ++ ++#endif //_RTL8711_IO_H_ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl.h +@@ -0,0 +1,269 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_IOCTL_H_ ++#define _RTW_IOCTL_H_ ++ ++#include ++#include ++#include ++ ++#ifndef OID_802_11_CAPABILITY ++ #define OID_802_11_CAPABILITY 0x0d010122 ++#endif ++ ++#ifndef OID_802_11_PMKID ++ #define OID_802_11_PMKID 0x0d010123 ++#endif ++ ++ ++// For DDK-defined OIDs ++#define OID_NDIS_SEG1 0x00010100 ++#define OID_NDIS_SEG2 0x00010200 ++#define OID_NDIS_SEG3 0x00020100 ++#define OID_NDIS_SEG4 0x01010100 ++#define OID_NDIS_SEG5 0x01020100 ++#define OID_NDIS_SEG6 0x01020200 ++#define OID_NDIS_SEG7 0xFD010100 ++#define OID_NDIS_SEG8 0x0D010100 ++#define OID_NDIS_SEG9 0x0D010200 ++#define OID_NDIS_SEG10 0x0D020200 ++ ++#define SZ_OID_NDIS_SEG1 23 ++#define SZ_OID_NDIS_SEG2 3 ++#define SZ_OID_NDIS_SEG3 6 ++#define SZ_OID_NDIS_SEG4 6 ++#define SZ_OID_NDIS_SEG5 4 ++#define SZ_OID_NDIS_SEG6 8 ++#define SZ_OID_NDIS_SEG7 7 ++#define SZ_OID_NDIS_SEG8 36 ++#define SZ_OID_NDIS_SEG9 24 ++#define SZ_OID_NDIS_SEG10 19 ++ ++// For Realtek-defined OIDs ++#define OID_MP_SEG1 0xFF871100 ++#define OID_MP_SEG2 0xFF818000 ++ ++#define OID_MP_SEG3 0xFF818700 ++#define OID_MP_SEG4 0xFF011100 ++ ++#define DEBUG_OID(dbg, str) \ ++ if((!dbg)) \ ++ { \ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_info_,("%s(%d): %s", __FUNCTION__, __LINE__, str)); \ ++ } ++ ++ ++enum oid_type ++{ ++ QUERY_OID, ++ SET_OID ++}; ++ ++struct oid_funs_node { ++ unsigned int oid_start; //the starting number for OID ++ unsigned int oid_end; //the ending number for OID ++ struct oid_obj_priv *node_array; ++ unsigned int array_sz; //the size of node_array ++ int query_counter; //count the number of query hits for this segment ++ int set_counter; //count the number of set hits for this segment ++}; ++ ++struct oid_par_priv ++{ ++ void *adapter_context; ++ NDIS_OID oid; ++ void *information_buf; ++ u32 information_buf_len; ++ u32 *bytes_rw; ++ u32 *bytes_needed; ++ enum oid_type type_of_oid; ++ u32 dbg; ++}; ++ ++struct oid_obj_priv { ++ unsigned char dbg; // 0: without OID debug message 1: with OID debug message ++ NDIS_STATUS (*oidfuns)(struct oid_par_priv *poid_par_priv); ++}; ++ ++#if (defined(CONFIG_MP_INCLUDED) && defined(_RTW_MP_IOCTL_C_)) || \ ++ (defined(PLATFORM_WINDOWS) && defined(_RTW_IOCTL_RTL_C_)) ++static NDIS_STATUS oid_null_function(struct oid_par_priv* poid_par_priv) ++{ ++ _func_enter_; ++ _func_exit_; ++ return NDIS_STATUS_SUCCESS; ++} ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE ndisPsMode); ++ ++//OID Handler for Segment 1 ++NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 2 ++NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv* poid_par_priv); ++ ++//OID Handler for Segment 3 ++NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 4 ++NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 5 ++NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 6 ++NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 7 ++NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 8 ++NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++ ++ ++//OID Handler for Segment 9 ++NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 10 ++NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment ED ++NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv* poid_par_priv); ++ ++void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast); ++ ++#endif// end of PLATFORM_WINDOWS ++ ++ ++#if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT) ++extern struct iw_handler_def rtw_handlers_def; ++#endif ++ ++extern NDIS_STATUS drv_query_info( ++ IN _nic_hdl MiniportAdapterContext, ++ IN NDIS_OID Oid, ++ IN void * InformationBuffer, ++ IN u32 InformationBufferLength, ++ OUT u32* BytesWritten, ++ OUT u32* BytesNeeded ++ ); ++ ++extern NDIS_STATUS drv_set_info( ++ IN _nic_hdl MiniportAdapterContext, ++ IN NDIS_OID Oid, ++ IN void * InformationBuffer, ++ IN u32 InformationBufferLength, ++ OUT u32* BytesRead, ++ OUT u32* BytesNeeded ++ ); ++ ++#endif // #ifndef __INC_CEINFO_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_query.h +@@ -0,0 +1,36 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_IOCTL_QUERY_H_ ++#define _RTW_IOCTL_QUERY_H_ ++ ++#include ++#include ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++u8 query_802_11_capability(_adapter* padapter,u8* pucBuf,u32 * pulOutLen); ++u8 query_802_11_association_information (_adapter * padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo); ++ ++#endif ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_rtl.h +@@ -0,0 +1,83 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_IOCTL_RTL_H_ ++#define _RTW_IOCTL_RTL_H_ ++ ++#include ++#include ++#include ++ ++//************** oid_rtl_seg_01_01 ************** ++NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv);//84 ++NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv); //8a ++NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv); //8b ++ ++NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv);//93 ++NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv); ++ ++//************** oid_rtl_seg_01_03 section start ************** ++NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv); ++ ++// oid_rtl_seg_01_11 ++NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv); ++ ++//************** oid_rtl_seg_03_00 section start ************** ++NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++ ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_ioctl_set.h +@@ -0,0 +1,79 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_IOCTL_SET_H_ ++#define __RTW_IOCTL_SET_H_ ++ ++#include ++#include ++ ++ ++typedef u8 NDIS_802_11_PMKID_VALUE[16]; ++ ++typedef struct _BSSIDInfo { ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ NDIS_802_11_PMKID_VALUE PMKID; ++} BSSIDInfo, *PBSSIDInfo; ++ ++ ++#ifdef PLATFORM_OS_XP ++typedef struct _NDIS_802_11_PMKID { ++ u32 Length; ++ u32 BSSIDInfoCount; ++ BSSIDInfo BSSIDInfo[1]; ++} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults); ++u8 rtw_set_802_11_test(_adapter * padapter, NDIS_802_11_TEST * test); ++u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid); ++ ++u8 rtw_pnp_set_power_sleep(_adapter* padapter); ++u8 rtw_pnp_set_power_wakeup(_adapter* padapter); ++ ++void rtw_pnp_resume_wk(void *context); ++void rtw_pnp_sleep_wk(void * context); ++ ++#endif ++ ++u8 rtw_set_802_11_add_key(_adapter * padapter, NDIS_802_11_KEY * key); ++u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); ++u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid); ++u8 rtw_set_802_11_add_wep(_adapter * padapter, NDIS_802_11_WEP * wep); ++u8 rtw_set_802_11_disassociate(_adapter * padapter); ++u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter, NDIS_802_11_SSID *pssid, int ssid_max_num); ++u8 rtw_set_802_11_infrastructure_mode(_adapter * padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype); ++u8 rtw_set_802_11_remove_wep(_adapter * padapter, u32 keyindex); ++u8 rtw_set_802_11_ssid(_adapter * padapter, NDIS_802_11_SSID * ssid); ++u8 rtw_set_802_11_connect(_adapter *padapter, const u8 *bssid, NDIS_802_11_SSID *ssid); ++u8 rtw_set_802_11_remove_key(_adapter * padapter, NDIS_802_11_REMOVE_KEY * key); ++ ++u8 rtw_validate_bssid(const u8 *bssid); ++u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid); ++ ++u16 rtw_get_cur_max_rate(_adapter *adapter); ++int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode); ++int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan); ++int rtw_set_country(_adapter *adapter, const char *country_code); ++int rtw_set_band(_adapter *adapter, enum _BAND band); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_iol.h +@@ -0,0 +1,89 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_IOL_H_ ++#define __RTW_IOL_H_ ++ ++#include ++#include ++#include ++ ++typedef struct _io_offload_cmd { ++ u8 rsvd0; ++ u8 cmd; ++ u16 address; ++ u32 value; ++} IO_OFFLOAD_CMD, IOL_CMD; ++ ++#define IOL_CMD_LLT 0x00 ++//#define IOL_CMD_R_EFUSE 0x01 ++#define IOL_CMD_WB_REG 0x02 ++#define IOL_CMD_WW_REG 0x03 ++#define IOL_CMD_WD_REG 0x04 ++//#define IOL_CMD_W_RF 0x05 ++#define IOL_CMD_DELAY_US 0x80 ++#define IOL_CMD_DELAY_MS 0x81 ++//#define IOL_CMD_DELAY_S 0x82 ++#define IOL_CMD_END 0x83 ++ ++/***************************************************** ++CMD Address Value ++(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) ++****************************************************** ++IOL_CMD_LLT - B7: PGBNDY ++//IOL_CMD_R_EFUSE - - ++IOL_CMD_WB_REG 0x0~0xFFFF B7 ++IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 ++IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 ++//IOL_CMD_W_RF RF Reg B5~B7 ++IOL_CMD_DELAY_US - B6~B7 ++IOL_CMD_DELAY_MS - B6~B7 ++//IOL_CMD_DELAY_S - B6~B7 ++IOL_CMD_END - - ++******************************************************/ ++ ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#else ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) ++#endif ++ ++bool rtw_IOL_applied(ADAPTER *adapter); ++ ++#endif //__RTW_IOL_H_ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_led.h +@@ -0,0 +1,217 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_LED_H_ ++#define __RTW_LED_H_ ++ ++#include ++#include ++#include ++ ++#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) ++ ++typedef enum _LED_CTL_MODE{ ++ LED_CTL_POWER_ON = 1, ++ LED_CTL_LINK = 2, ++ LED_CTL_NO_LINK = 3, ++ LED_CTL_TX = 4, ++ LED_CTL_RX = 5, ++ LED_CTL_SITE_SURVEY = 6, ++ LED_CTL_POWER_OFF = 7, ++ LED_CTL_START_TO_LINK = 8, ++ LED_CTL_START_WPS = 9, ++ LED_CTL_STOP_WPS = 10, ++ LED_CTL_START_WPS_BOTTON = 11, //added for runtop ++ LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA ++ LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN ++}LED_CTL_MODE; ++ ++ ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++typedef enum _LED_STATE_871x{ ++ LED_UNKNOWN = 0, ++ RTW_LED_ON = 1, ++ RTW_LED_OFF = 2, ++ LED_BLINK_NORMAL = 3, ++ LED_BLINK_SLOWLY = 4, ++ LED_POWER_ON_BLINK = 5, ++ LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. ++ LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. ++ LED_BLINK_StartToBlink = 8,// Customzied for Sercomm Printer Server case ++ LED_BLINK_WPS = 9, // LED is blinkg during WPS communication ++ LED_TXRX_BLINK = 10, ++ LED_BLINK_WPS_STOP = 11, //for ALPHA ++ LED_BLINK_WPS_STOP_OVERLAP = 12, //for BELKIN ++}LED_STATE_871x; ++ ++#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \ ++ || ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \ ++ || ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress) ++ ++#define IS_LED_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress \ ++ ||((PLED_871x)_LED_871x)->bLedScanBlinkInProgress) ++ ++typedef enum _LED_PIN_871x{ ++ LED_PIN_GPIO0, ++ LED_PIN_LED0, ++ LED_PIN_LED1 ++}LED_PIN_871x; ++ ++typedef struct _LED_871x{ ++ _adapter *padapter; ++ LED_PIN_871x LedPin; // Identify how to implement this SW led. ++ LED_STATE_871x CurrLedState; // Current LED state. ++ u8 bLedOn; // true if LED is ON, false if LED is OFF. ++ ++ u8 bSWLedCtrl; ++ ++ u8 bLedBlinkInProgress; // true if it is blinking, false o.w.. ++ // ALPHA, added by chiyoko, 20090106 ++ u8 bLedNoLinkBlinkInProgress; ++ u8 bLedLinkBlinkInProgress; ++ u8 bLedStartToLinkBlinkInProgress; ++ u8 bLedScanBlinkInProgress; ++ u8 bLedWPSBlinkInProgress; ++ ++ u32 BlinkTimes; // Number of times to toggle led state for blinking. ++ LED_STATE_871x BlinkingLedState; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. ++ ++ _timer BlinkTimer; // Timer object for led blinking. ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)|| defined PLATFORM_FREEBSD ++ _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. ++#endif ++} LED_871x, *PLED_871x; ++ ++ ++//================================================================================ ++// LED customization. ++//================================================================================ ++ ++typedef enum _LED_STRATEGY_871x{ ++ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. ++ SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. ++ SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. ++ SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. ++ SW_LED_MODE4, //for Edimax / Belkin ++ SW_LED_MODE5, //for Sercomm / Belkin ++ SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 ++ HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) ++}LED_STRATEGY_871x, *PLED_STRATEGY_871x; ++#endif //CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++typedef enum _LED_STATE_871x{ ++ LED_UNKNOWN = 0, ++ RTW_LED_ON = 1, ++ RTW_LED_OFF = 2, ++ LED_BLINK_NORMAL = 3, ++ LED_BLINK_SLOWLY = 4, ++ LED_POWER_ON_BLINK = 5, ++ LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. ++ LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. ++ LED_BLINK_StartToBlink = 8, ++ LED_BLINK_TXRX = 9, ++ LED_BLINK_RUNTOP = 10, // Customized for RunTop ++ LED_BLINK_CAMEO = 11, ++}LED_STATE_871x; ++ ++typedef enum _LED_PIN_871x{ ++ LED_PIN_GPIO0, ++ LED_PIN_LED0, ++ LED_PIN_LED1, ++ LED_PIN_LED2 ++}LED_PIN_871x; ++ ++typedef struct _LED_871x{ ++ _adapter *padapter; ++ ++ LED_PIN_871x LedPin; // Identify how to implement this SW led. ++ ++ LED_STATE_871x CurrLedState; // Current LED state. ++ u8 bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. ++ ++ u8 bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. ++ u8 bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. ++ ++ u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode ++ u32 BlinkTimes; // Number of times to toggle led state for blinking. ++ LED_STATE_871x BlinkingLedState; // Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. ++ ++ _timer BlinkTimer; // Timer object for led blinking. ++ ++ u8 bLedLinkBlinkInProgress; ++ u8 bLedNoLinkBlinkInProgress; ++ u8 bLedScanBlinkInProgress; ++} LED_871x, *PLED_871x; ++ ++ ++//================================================================================ ++// LED customization. ++//================================================================================ ++ ++typedef enum _LED_STRATEGY_871x{ ++ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. ++ SW_LED_MODE1, // SW control for PCI Express ++ SW_LED_MODE2, // SW control for Cameo. ++ SW_LED_MODE3, // SW contorl for RunTop. ++ SW_LED_MODE4, // SW control for Netcore ++ SW_LED_MODE5, //added by vivi, for led new mode, DLINK ++ SW_LED_MODE6, //added by vivi, for led new mode, PRONET ++ SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec ++ SW_LED_MODE8, //added by chiyokolin, for QMI ++ SW_LED_MODE9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1 ++ SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS ++ HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) ++}LED_STRATEGY_871x, *PLED_STRATEGY_871x; ++ ++#define LED_CM8_BLINK_INTERVAL 500 //for QMI ++#endif //CONFIG_PCI_HCI ++ ++struct led_priv{ ++ /* add for led controll */ ++ LED_871x SwLed0; ++ LED_871x SwLed1; ++ LED_STRATEGY_871x LedStrategy; ++ u8 bRegUseLed; ++ void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); ++ /* add for led controll */ ++}; ++ ++#ifdef CONFIG_SW_LED ++#define rtw_led_control(adapter, LedAction) \ ++ do { \ ++ if((adapter)->ledpriv.LedControlHandler) \ ++ (adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \ ++ } while(0) ++#else //CONFIG_SW_LED ++#define rtw_led_control(adapter, LedAction) ++#endif //CONFIG_SW_LED ++ ++extern void BlinkHandler(PLED_871x pLed); ++ ++#endif //__RTW_LED_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_mlme.h +@@ -0,0 +1,850 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_MLME_H_ ++#define __RTW_MLME_H_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_INTEL_WIDI ++#include ++#endif ++ ++#define MAX_BSS_CNT 128 ++//#define MAX_JOIN_TIMEOUT 2000 ++//#define MAX_JOIN_TIMEOUT 2500 ++#define MAX_JOIN_TIMEOUT 6500 ++ ++// Commented by Albert 20101105 ++// Increase the scanning timeout because of increasing the SURVEY_TO value. ++ ++#define SCANNING_TIMEOUT 8000 ++ ++#define SCAN_INTERVAL (30) // unit:2sec, 30*2=60sec ++ ++#ifdef PALTFORM_OS_WINCE ++#define SCANQUEUE_LIFETIME 12000000 // unit:us ++#else ++#define SCANQUEUE_LIFETIME 20 // unit:sec ++#endif ++ ++#define WIFI_NULL_STATE 0x00000000 ++ ++#define WIFI_ASOC_STATE 0x00000001 // Under Linked state... ++#define WIFI_REASOC_STATE 0x00000002 ++#define WIFI_SLEEP_STATE 0x00000004 ++#define WIFI_STATION_STATE 0x00000008 ++ ++#define WIFI_AP_STATE 0x00000010 ++#define WIFI_ADHOC_STATE 0x00000020 ++#define WIFI_ADHOC_MASTER_STATE 0x00000040 ++#define WIFI_UNDER_LINKING 0x00000080 ++ ++#define WIFI_UNDER_WPS 0x00000100 ++//#define WIFI_UNDER_CMD 0x00000200 ++//#define WIFI_UNDER_P2P 0x00000400 ++#define WIFI_STA_ALIVE_CHK_STATE 0x00000400 ++#define WIFI_SITE_MONITOR 0x00000800 //to indicate the station is under site surveying ++ ++#ifdef WDS ++#define WIFI_WDS 0x00001000 ++#define WIFI_WDS_RX_BEACON 0x00002000 // already rx WDS AP beacon ++#endif ++#ifdef AUTO_CONFIG ++#define WIFI_AUTOCONF 0x00004000 ++#define WIFI_AUTOCONF_IND 0x00008000 ++#endif ++ ++/* ++// ========== P2P Section Start =============== ++#define WIFI_P2P_LISTEN_STATE 0x00010000 ++#define WIFI_P2P_GROUP_FORMATION_STATE 0x00020000 ++// ========== P2P Section End =============== ++*/ ++ ++//#ifdef UNDER_MPTEST ++#define WIFI_MP_STATE 0x00010000 ++#define WIFI_MP_CTX_BACKGROUND 0x00020000 // in continous tx background ++#define WIFI_MP_CTX_ST 0x00040000 // in continous tx with single-tone ++#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 // pending in continous tx background due to out of skb ++#define WIFI_MP_CTX_CCK_HW 0x00100000 // in continous tx ++#define WIFI_MP_CTX_CCK_CS 0x00200000 // in continous tx with carrier suppression ++#define WIFI_MP_LPBK_STATE 0x00400000 ++//#endif ++ ++//#define _FW_UNDER_CMD WIFI_UNDER_CMD ++#define _FW_UNDER_LINKING WIFI_UNDER_LINKING ++#define _FW_LINKED WIFI_ASOC_STATE ++#define _FW_UNDER_SURVEY WIFI_SITE_MONITOR ++ ++ ++enum dot11AuthAlgrthmNum { ++ dot11AuthAlgrthm_Open = 0, ++ dot11AuthAlgrthm_Shared, ++ dot11AuthAlgrthm_8021X, ++ dot11AuthAlgrthm_Auto, ++ dot11AuthAlgrthm_MaxNum ++}; ++ ++// Scan type including active and passive scan. ++typedef enum _RT_SCAN_TYPE ++{ ++ SCAN_PASSIVE, ++ SCAN_ACTIVE, ++ SCAN_MIX, ++}RT_SCAN_TYPE, *PRT_SCAN_TYPE; ++ ++enum DriverInterface { ++ DRIVER_WEXT = 1, ++ DRIVER_CFG80211 = 2 ++}; ++ ++enum _BAND ++{ ++ GHZ24_50 = 0, ++ GHZ_50, ++ GHZ_24, ++ GHZ_MAX, ++}; ++ ++#define rtw_band_valid(band) ((band) >= GHZ24_50 && (band) < GHZ_MAX) ++ ++enum SCAN_RESULT_TYPE ++{ ++ SCAN_RESULT_P2P_ONLY = 0, // Will return all the P2P devices. ++ SCAN_RESULT_ALL = 1, // Will return all the scanned device, include AP. ++ SCAN_RESULT_WFD_TYPE = 2 // Will just return the correct WFD device. ++ // If this device is Miracast sink device, it will just return all the Miracast source devices. ++}; ++ ++/* ++ ++there are several "locks" in mlme_priv, ++since mlme_priv is a shared resource between many threads, ++like ISR/Call-Back functions, the OID handlers, and even timer functions. ++ ++ ++Each _queue has its own locks, already. ++Other items are protected by mlme_priv.lock. ++ ++To avoid possible dead lock, any thread trying to modifiying mlme_priv ++SHALL not lock up more than one locks at a time! ++ ++*/ ++ ++ ++#define traffic_threshold 10 ++#define traffic_scan_period 500 ++ ++struct sitesurvey_ctrl { ++ u64 last_tx_pkts; ++ uint last_rx_pkts; ++ sint traffic_busy; ++ _timer sitesurvey_ctrl_timer; ++}; ++ ++typedef struct _RT_LINK_DETECT_T{ ++ u32 NumTxOkInPeriod; ++ u32 NumRxOkInPeriod; ++ u32 NumRxUnicastOkInPeriod; ++ BOOLEAN bBusyTraffic; ++ BOOLEAN bTxBusyTraffic; ++ BOOLEAN bRxBusyTraffic; ++ BOOLEAN bHigherBusyTraffic; // For interrupt migration purpose. ++ BOOLEAN bHigherBusyRxTraffic; // We may disable Tx interrupt according as Rx traffic. ++ BOOLEAN bHigherBusyTxTraffic; // We may disable Tx interrupt according as Tx traffic. ++}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; ++ ++struct profile_info { ++ u8 ssidlen; ++ u8 ssid[ WLAN_SSID_MAXLEN ]; ++ u8 peermac[ ETH_ALEN ]; ++}; ++ ++struct tx_invite_req_info{ ++ u8 token; ++ u8 benable; ++ u8 go_ssid[ WLAN_SSID_MAXLEN ]; ++ u8 ssidlen; ++ u8 go_bssid[ ETH_ALEN ]; ++ u8 peer_macaddr[ ETH_ALEN ]; ++ u8 operating_ch; // This information will be set by using the p2p_set op_ch=x ++ u8 peer_ch; // The listen channel for peer P2P device ++ ++}; ++ ++struct tx_invite_resp_info{ ++ u8 token; // Used to record the dialog token of p2p invitation request frame. ++}; ++ ++#ifdef CONFIG_WFD ++ ++struct wifi_display_info{ ++ u16 wfd_enable; // Eanble/Disable the WFD function. ++ u16 rtsp_ctrlport; // TCP port number at which the this WFD device listens for RTSP messages ++ u16 peer_rtsp_ctrlport; // TCP port number at which the peer WFD device listens for RTSP messages ++ // This filed should be filled when receiving the gropu negotiation request ++ ++ u8 peer_session_avail; // WFD session is available or not for the peer wfd device. ++ // This variable will be set when sending the provisioning discovery request to peer WFD device. ++ // And this variable will be reset when it is read by using the iwpriv p2p_get wfd_sa command. ++ ++ u8 ip_address[4]; ++ u8 peer_ip_address[4]; ++ u8 wfd_pc; // WFD preferred connection ++ // 0 -> Prefer to use the P2P for WFD connection on peer side. ++ // 1 -> Prefer to use the TDLS for WFD connection on peer side. ++ ++ u8 wfd_device_type; // WFD Device Type ++ // 0 -> WFD Source Device ++ // 1 -> WFD Primary Sink Device ++ enum SCAN_RESULT_TYPE scan_result_type; // Used when P2P is enable. This parameter will impact the scan result. ++}; ++#endif //CONFIG_WFD ++ ++struct tx_provdisc_req_info{ ++ u16 wps_config_method_request; // Used when sending the provisioning request frame ++ u16 peer_channel_num[2]; // The channel number which the receiver stands. ++ NDIS_802_11_SSID ssid; ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 peerIFAddr[ ETH_ALEN ]; // Peer interface address ++ u8 benable; // This provision discovery request frame is trigger to send or not ++}; ++ ++struct rx_provdisc_req_info{ //When peer device issue prov_disc_req first, we should store the following informations ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 strconfig_method_desc_of_prov_disc_req[4]; // description for the config method located in the provisioning discovery request frame. ++ // The UI must know this information to know which config method the remote p2p device is requiring. ++}; ++ ++struct tx_nego_req_info{ ++ u16 peer_channel_num[2]; // The channel number which the receiver stands. ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 benable; // This negoitation request frame is trigger to send or not ++}; ++ ++struct group_id_info{ ++ u8 go_device_addr[ ETH_ALEN ]; // The GO's device address of this P2P group ++ u8 ssid[ WLAN_SSID_MAXLEN ]; // The SSID of this P2P group ++}; ++ ++struct scan_limit_info{ ++ u8 scan_op_ch_only; // When this flag is set, the driver should just scan the operation channel ++#ifndef P2P_OP_CHECK_SOCIAL_CH ++ u8 operation_ch[2]; // Store the operation channel of invitation request frame ++#else ++ u8 operation_ch[5]; // Store additional channel 1,6,11 for Android 4.2 IOT & Nexus 4 ++#endif //P2P_OP_CHECK_SOCIAL_CH ++}; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++struct cfg80211_wifidirect_info{ ++ _timer remain_on_ch_timer; ++ u8 restore_channel; ++ struct ieee80211_channel remain_on_ch_channel; ++ enum nl80211_channel_type remain_on_ch_type; ++ u64 remain_on_ch_cookie; ++ bool is_ro_ch; ++}; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++struct wifidirect_info{ ++ _adapter* padapter; ++ _timer find_phase_timer; ++ _timer restore_p2p_state_timer; ++ ++ // Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. ++ _timer pre_tx_scan_timer; ++ _timer reset_ch_sitesurvey; ++ _timer reset_ch_sitesurvey2; // Just for resetting the scan limit function by using p2p nego ++#ifdef CONFIG_CONCURRENT_MODE ++ // Used to switch the channel between legacy AP and listen state. ++ _timer ap_p2p_switch_timer; ++#endif ++ struct tx_provdisc_req_info tx_prov_disc_info; ++ struct rx_provdisc_req_info rx_prov_disc_info; ++ struct tx_invite_req_info invitereq_info; ++ struct profile_info profileinfo[ P2P_MAX_PERSISTENT_GROUP_NUM ]; // Store the profile information of persistent group ++ struct tx_invite_resp_info inviteresp_info; ++ struct tx_nego_req_info nego_req_info; ++ struct group_id_info groupid_info; // Store the group id information when doing the group negotiation handshake. ++ struct scan_limit_info rx_invitereq_info; // Used for get the limit scan channel from the Invitation procedure ++ struct scan_limit_info p2p_info; // Used for get the limit scan channel from the P2P negotiation handshake ++#ifdef CONFIG_WFD ++ struct wifi_display_info *wfd_info; ++#endif ++ enum P2P_ROLE role; ++ enum P2P_STATE pre_p2p_state; ++ enum P2P_STATE p2p_state; ++ u8 device_addr[ETH_ALEN]; // The device address should be the mac address of this device. ++ u8 interface_addr[ETH_ALEN]; ++ u8 social_chan[4]; ++ u8 listen_channel; ++ u8 operating_channel; ++ u8 listen_dwell; // This value should be between 1 and 3 ++ u8 support_rate[8]; ++ u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN]; ++ u8 intent; // should only include the intent value. ++ u8 p2p_peer_interface_addr[ ETH_ALEN ]; ++ u8 p2p_peer_device_addr[ ETH_ALEN ]; ++ u8 peer_intent; // Included the intent value and tie breaker value. ++ u8 device_name[ WPS_MAX_DEVICE_NAME_LEN ]; // Device name for displaying on searching device screen ++ u8 device_name_len; ++ u8 profileindex; // Used to point to the index of profileinfo array ++ u8 peer_operating_ch; ++ u8 find_phase_state_exchange_cnt; ++ u16 device_password_id_for_nego; // The device password ID for group negotation ++ u8 negotiation_dialog_token; ++ u8 nego_ssid[ WLAN_SSID_MAXLEN ]; // SSID information for group negotitation ++ u8 nego_ssidlen; ++ u8 p2p_group_ssid[WLAN_SSID_MAXLEN]; ++ u8 p2p_group_ssid_len; ++ u8 persistent_supported; // Flag to know the persistent function should be supported or not. ++ // In the Sigma test, the Sigma will provide this enable from the sta_set_p2p CAPI. ++ // 0: disable ++ // 1: enable ++ u8 session_available; // Flag to set the WFD session available to enable or disable "by Sigma" ++ // In the Sigma test, the Sigma will disable the session available by using the sta_preset CAPI. ++ // 0: disable ++ // 1: enable ++ u8 wfd_tdls_enable; // Flag to enable or disable the TDLS by WFD Sigma ++ // 0: disable ++ // 1: enable ++ u8 wfd_tdls_weaksec; // Flag to enable or disable the weak security function for TDLS by WFD Sigma ++ // 0: disable ++ // In this case, the driver can't issue the tdsl setup request frame. ++ // 1: enable ++ // In this case, the driver can issue the tdls setup request frame ++ // even the current security is weak security. ++ ++ enum P2P_WPSINFO ui_got_wps_info; // This field will store the WPS value (PIN value or PBC) that UI had got from the user. ++ u16 supported_wps_cm; // This field describes the WPS config method which this driver supported. ++ // The value should be the combination of config method defined in page104 of WPS v2.0 spec. ++ u8 external_uuid; // UUID flag ++ u8 uuid[16]; // UUID ++ uint channel_list_attr_len; // This field will contain the length of body of P2P Channel List attribute of group negotitation response frame. ++ u8 channel_list_attr[100]; // This field will contain the body of P2P Channel List attribute of group negotitation response frame. ++ // We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. ++ u8 driver_interface; // Indicate DRIVER_WEXT or DRIVER_CFG80211 ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ u16 ext_listen_interval; // The interval to be available with legacy AP (ms) ++ u16 ext_listen_period; // The time period to be available for P2P listen state (ms) ++#endif ++#ifdef CONFIG_P2P_PS ++ enum P2P_PS_MODE p2p_ps_mode; // indicate p2p ps mode ++ enum P2P_PS_STATE p2p_ps_state; // indicate p2p ps state ++ u8 noa_index; // Identifies and instance of Notice of Absence timing. ++ u8 ctwindow; // Client traffic window. A period of time in TU after TBTT. ++ u8 opp_ps; // opportunistic power save. ++ u8 noa_num; // number of NoA descriptor in P2P IE. ++ u8 noa_count[P2P_MAX_NOA_NUM]; // Count for owner, Type of client. ++ u32 noa_duration[P2P_MAX_NOA_NUM]; // Max duration for owner, preferred or min acceptable duration for client. ++ u32 noa_interval[P2P_MAX_NOA_NUM]; // Length of interval for owner, preferred or max acceptable interval of client. ++ u32 noa_start_time[P2P_MAX_NOA_NUM]; // schedule expressed in terms of the lower 4 bytes of the TSF timer. ++#endif // CONFIG_P2P_PS ++}; ++ ++struct tdls_ss_record{ //signal strength record; recording the tdls sta with lowerest ss ++ u8 macaddr[ETH_ALEN]; ++ u8 RxPWDBAll; ++ u8 is_tdls_sta; // _TRUE: direct link sta, _FALSE: else ++}; ++ ++struct tdls_info{ ++ u8 ap_prohibited; ++ uint setup_state; ++ u8 sta_cnt; ++ u8 sta_maximum; // 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; ++ struct tdls_ss_record ss_record; ++ u8 macid_index; //macid entry that is ready to write ++ u8 clear_cam; //cam entry that is trying to clear, using it in direct link teardown ++ u8 ch_sensing; ++ u8 cur_channel; ++ u8 candidate_ch; ++ u8 collect_pkt_num[MAX_CHANNEL_NUM]; ++ _lock cmd_lock; ++ _lock hdl_lock; ++ u8 watchdog_count; ++ u8 dev_discovered; //WFD_TDLS: for sigma test ++ u8 enable; ++#ifdef CONFIG_WFD ++ struct wifi_display_info *wfd_info; ++#endif ++}; ++ ++struct mlme_priv { ++ ++ _lock lock; ++ sint fw_state; //shall we protect this variable? maybe not necessarily... ++ ++ u8 to_join; //flag ++ #ifdef CONFIG_LAYER2_ROAMING ++ u8 to_roaming; // roaming trying times ++ #endif ++ ++ u8 *nic_hdl; ++ ++ u8 not_indic_disco; ++ _list *pscanned; ++ _queue free_bss_pool; ++ _queue scanned_queue; ++ u8 *free_bss_buf; ++ u32 num_of_scanned; ++ ++ NDIS_802_11_SSID assoc_ssid; ++ u8 assoc_bssid[6]; ++ ++ struct wlan_network cur_network; ++ ++ //uint wireless_mode; no used, remove it ++ ++ u32 scan_interval; ++ ++ _timer assoc_timer; ++ ++ uint assoc_by_bssid; ++ uint assoc_by_rssi; ++ ++ _timer scan_to_timer; // driver itself handles scan_timeout status. ++ u32 scan_start_time; // used to evaluate the time spent in scanning ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _timer set_scan_deny_timer; ++ ATOMIC_T set_scan_deny; //0: allowed, 1: deny ++ #endif ++ ++ struct qos_priv qospriv; ++ ++#ifdef CONFIG_80211N_HT ++ ++ /* Number of non-HT AP/stations */ ++ int num_sta_no_ht; ++ ++ /* Number of HT AP/stations 20 MHz */ ++ //int num_sta_ht_20mhz; ++ ++ ++ int num_FortyMHzIntolerant; ++ ++ struct ht_priv htpriv; ++ ++#endif ++ ++ RT_LINK_DETECT_T LinkDetectInfo; ++ _timer dynamic_chk_timer; //dynamic/periodic check timer ++ ++ u8 acm_mask; // for wmm acm mask ++ u8 ChannelPlan; ++ RT_SCAN_TYPE scan_mode; // active: 1, passive: 0 ++ ++ //u8 probereq_wpsie[MAX_WPS_IE_LEN];//added in probe req ++ //int probereq_wpsie_len; ++ u8 *wps_probe_req_ie; ++ u32 wps_probe_req_ie_len; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ /* Number of associated Non-ERP stations (i.e., stations using 802.11b ++ * in 802.11g BSS) */ ++ int num_sta_non_erp; ++ ++ /* Number of associated stations that do not support Short Slot Time */ ++ int num_sta_no_short_slot_time; ++ ++ /* Number of associated stations that do not support Short Preamble */ ++ int num_sta_no_short_preamble; ++ ++ int olbc; /* Overlapping Legacy BSS Condition */ ++ ++ /* Number of HT associated stations that do not support greenfield */ ++ int num_sta_ht_no_gf; ++ ++ /* Number of associated non-HT stations */ ++ //int num_sta_no_ht; ++ ++ /* Number of HT associated stations 20 MHz */ ++ int num_sta_ht_20mhz; ++ ++ /* Overlapping BSS information */ ++ int olbc_ht; ++ ++#ifdef CONFIG_80211N_HT ++ u16 ht_op_mode; ++#endif /* CONFIG_80211N_HT */ ++ ++ u8 *assoc_req; ++ u32 assoc_req_len; ++ u8 *assoc_rsp; ++ u32 assoc_rsp_len; ++ ++ u8 *wps_beacon_ie; ++ //u8 *wps_probe_req_ie; ++ u8 *wps_probe_resp_ie; ++ u8 *wps_assoc_resp_ie; // for CONFIG_IOCTL_CFG80211, this IE could include p2p ie / wfd ie ++ ++ u32 wps_beacon_ie_len; ++ //u32 wps_probe_req_ie_len; ++ u32 wps_probe_resp_ie_len; ++ u32 wps_assoc_resp_ie_len; // for CONFIG_IOCTL_CFG80211, this IE len could include p2p ie / wfd ie ++ ++ u8 *p2p_beacon_ie; ++ u8 *p2p_probe_req_ie; ++ u8 *p2p_probe_resp_ie; ++ u8 *p2p_go_probe_resp_ie; //for GO ++ u8 *p2p_assoc_req_ie; ++ ++ u32 p2p_beacon_ie_len; ++ u32 p2p_probe_req_ie_len; ++ u32 p2p_probe_resp_ie_len; ++ u32 p2p_go_probe_resp_ie_len; //for GO ++ u32 p2p_assoc_req_ie_len; ++/* ++#if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) ++ //u8 *wps_p2p_beacon_ie; ++ u8 *p2p_beacon_ie; ++ u8 *wps_p2p_probe_resp_ie; ++ u8 *wps_p2p_assoc_resp_ie; ++ //u32 wps_p2p_beacon_ie_len; ++ u32 p2p_beacon_ie_len; ++ u32 wps_p2p_probe_resp_ie_len; ++ u32 wps_p2p_assoc_resp_ie_len; ++#endif ++*/ ++ ++ _lock bcn_update_lock; ++ u8 update_bcn; ++ ++ ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ ++#if defined(CONFIG_WFD) && defined(CONFIG_IOCTL_CFG80211) ++ ++ u8 *wfd_beacon_ie; ++ u8 *wfd_probe_req_ie; ++ u8 *wfd_probe_resp_ie; ++ u8 *wfd_go_probe_resp_ie; //for GO ++ u8 *wfd_assoc_req_ie; ++ ++ u32 wfd_beacon_ie_len; ++ u32 wfd_probe_req_ie_len; ++ u32 wfd_probe_resp_ie_len; ++ u32 wfd_go_probe_resp_ie_len; //for GO ++ u32 wfd_assoc_req_ie_len; ++ ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ // DMP kobject_hotplug function signal need in passive level ++ _workitem Linkup_workitem; ++ _workitem Linkdown_workitem; ++#endif ++ ++#ifdef CONFIG_INTEL_WIDI ++ int widi_state; ++ int listen_state; ++ _timer listen_timer; ++ ATOMIC_T rx_probe_rsp; // 1:receive probe respone from RDS source. ++ u8 *l2sdTaBuffer; ++ u8 channel_idx; ++ s8 group_cnt; //For WiDi 3.5, they specified another scan algo. for WFD/RDS co-existed ++ u8 sa_ext[L2SDTA_SERVICE_VE_LEN]; ++ ++ u8 widi_enable; ++ /** ++ * For WiDi 4; upper layer would set ++ * p2p_primary_device_type_category_id ++ * p2p_primary_device_type_sub_category_id ++ * p2p_secondary_device_type_category_id ++ * p2p_secondary_device_type_sub_category_id ++ */ ++ u16 p2p_pdt_cid; ++ u16 p2p_pdt_scid; ++ u8 num_p2p_sdt; ++ u16 p2p_sdt_cid[MAX_NUM_P2P_SDT]; ++ u16 p2p_sdt_scid[MAX_NUM_P2P_SDT]; ++ u8 p2p_reject_disable; //When starting NL80211 wpa_supplicant/hostapd, it will call netdev_close ++ //such that it will cause p2p disabled. Use this flag to reject. ++#endif // CONFIG_INTEL_WIDI ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ u8 scanning_via_buddy_intf; ++#endif ++}; ++ ++#ifdef CONFIG_AP_MODE ++ ++struct hostapd_priv ++{ ++ _adapter *padapter; ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ struct net_device *pmgnt_netdev; ++ struct usb_anchor anchored; ++#endif ++ ++}; ++ ++extern int hostapd_mode_init(_adapter *padapter); ++extern void hostapd_mode_unload(_adapter *padapter); ++#endif ++ ++ ++extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf); ++extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_atimdone_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf); ++ ++#ifdef PLATFORM_WINDOWS ++extern thread_return event_thread(void *context); ++ ++extern void rtw_join_timeout_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++ ++extern void _rtw_scan_timeout_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++ ++#endif ++ ++#if defined (PLATFORM_LINUX)|| defined (PLATFORM_FREEBSD) ++extern int event_thread(void *context); ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++extern void rtw_join_timeout_handler(void *FunctionContext); ++extern void _rtw_scan_timeout_handler(void* FunctionContext); ++#else ++extern void rtw_join_timeout_handler(struct timer_list *t); ++extern void _rtw_scan_timeout_handler(struct timer_list *t); ++#endif ++#endif ++ ++extern void rtw_free_network_queue(_adapter *adapter,u8 isfreeall); ++extern int rtw_init_mlme_priv(_adapter *adapter);// (struct mlme_priv *pmlmepriv); ++ ++extern void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv); ++ ++ ++extern sint rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv); ++extern sint rtw_set_key(_adapter *adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx); ++extern sint rtw_set_auth(_adapter *adapter,struct security_priv *psecuritypriv); ++ ++__inline static u8 *get_bssid(struct mlme_priv *pmlmepriv) ++{ //if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid ++ // if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address ++ return pmlmepriv->cur_network.network.MacAddress; ++} ++ ++__inline static sint check_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ if (pmlmepriv->fw_state & state) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++__inline static sint get_fwstate(struct mlme_priv *pmlmepriv) ++{ ++ return pmlmepriv->fw_state; ++} ++ ++/* ++ * No Limit on the calling context, ++ * therefore set it to be the critical section... ++ * ++ * ### NOTE:#### (!!!!) ++ * MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock ++ */ ++__inline static void set_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ pmlmepriv->fw_state |= state; ++} ++ ++__inline static void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state) ++{ ++ pmlmepriv->fw_state &= ~state; ++} ++ ++/* ++ * No Limit on the calling context, ++ * therefore set it to be the critical section... ++ */ ++__inline static void clr_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if (check_fwstate(pmlmepriv, state) == _TRUE) ++ pmlmepriv->fw_state ^= state; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void clr_fwstate_ex(struct mlme_priv *pmlmepriv, sint state) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _clr_fwstate_(pmlmepriv, state); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void up_scanned_network(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned++; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++#ifdef CONFIG_CONCURRENT_MODE ++sint rtw_buddy_adapter_up(_adapter *padapter); ++sint check_buddy_fwstate(_adapter *padapter, sint state); ++#endif //CONFIG_CONCURRENT_MODE ++ ++__inline static void down_scanned_network(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned--; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void set_scanned_network_val(struct mlme_priv *pmlmepriv, sint val) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned = val; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++extern u16 rtw_get_capability(WLAN_BSSID_EX *bss); ++extern void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target); ++extern void rtw_disconnect_hdl_under_linked(_adapter* adapter, struct sta_info *psta, u8 free_assoc); ++extern void rtw_generate_random_ibss(u8 *pibss); ++extern struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr); ++extern struct wlan_network* rtw_get_oldest_wlan_network(_queue *scanned_queue); ++ ++extern void rtw_free_assoc_resources(_adapter* adapter, int lock_scanned_queue); ++extern void rtw_indicate_disconnect(_adapter* adapter); ++extern void rtw_indicate_connect(_adapter* adapter); ++void rtw_indicate_scan_done( _adapter *padapter, bool aborted); ++void rtw_scan_abort(_adapter *adapter); ++ ++extern int rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie,u8 *out_ie,uint in_len); ++extern int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len); ++extern void rtw_init_registrypriv_dev_network(_adapter *adapter); ++ ++extern void rtw_update_registrypriv_dev_network(_adapter *adapter); ++ ++extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter); ++ ++extern void _rtw_join_timeout_handler(_adapter *adapter); ++extern void rtw_scan_timeout_handler(_adapter *adapter); ++ ++extern void rtw_dynamic_check_timer_handlder(_adapter *adapter); ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++bool rtw_is_scan_deny(_adapter *adapter); ++void rtw_clear_scan_deny(_adapter *adapter); ++void rtw_set_scan_deny_timer_hdl(_adapter *adapter); ++void rtw_set_scan_deny(_adapter *adapter, u32 ms); ++#else ++#define rtw_is_scan_deny(adapter) _FALSE ++#define rtw_clear_scan_deny(adapter) do {} while (0) ++#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0) ++#define rtw_set_scan_deny(adapter, ms) do {} while (0) ++#endif ++ ++ ++extern int _rtw_init_mlme_priv(_adapter *padapter); ++ ++void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); ++ ++extern void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv); ++ ++extern int _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); ++ ++extern struct wlan_network* _rtw_dequeue_network(_queue *queue); ++ ++extern struct wlan_network* _rtw_alloc_network(struct mlme_priv *pmlmepriv); ++ ++ ++extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall); ++extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork); ++ ++ ++extern struct wlan_network* _rtw_find_network(_queue *scanned_queue, u8 *addr); ++ ++extern void _rtw_free_network_queue(_adapter* padapter, u8 isfreeall); ++ ++extern sint rtw_if_up(_adapter *padapter); ++ ++ ++u8 *rtw_get_capability_from_ie(u8 *ie); ++u8 *rtw_get_timestampe_from_ie(u8 *ie); ++u8 *rtw_get_beacon_interval_from_ie(u8 *ie); ++ ++ ++void rtw_joinbss_reset(_adapter *padapter); ++ ++#ifdef CONFIG_80211N_HT ++unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len, u8 channel); ++void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel); ++void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe); ++#endif ++ ++int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork); ++int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst); ++ ++#ifdef CONFIG_LAYER2_ROAMING ++void _rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); ++void rtw_roaming(_adapter *adapter, struct wlan_network *tgt_network); ++void rtw_set_roaming(_adapter *adapter, u8 to_roaming); ++u8 rtw_to_roaming(_adapter *adapter); ++#else ++#define _rtw_roaming(adapter, tgt_network) do {} while(0) ++#define rtw_roaming(adapter, tgt_network) do {} while(0) ++#define rtw_set_roaming(adapter, to_roaming) do {} while(0) ++#define rtw_to_roaming(adapter) 0 ++#endif ++ ++ ++#ifdef CONFIG_INTEL_PROXIM ++void rtw_proxim_enable(_adapter *padapter); ++void rtw_proxim_disable(_adapter *padapter); ++void rtw_proxim_send_packet(_adapter *padapter,u8 *pbuf,u16 len,u8 hw_rate); ++#endif //CONFIG_INTEL_PROXIM ++#endif //__RTL871X_MLME_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_mlme_ext.h +@@ -0,0 +1,963 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_MLME_EXT_H_ ++#define __RTW_MLME_EXT_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++// Commented by Albert 20101105 ++// Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) ++// The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. ++// So, this driver tried to extend the dwell time for each scanning channel. ++// This will increase the chance to receive the probe response from SoftAP. ++ ++#define SURVEY_TO (100) ++#define REAUTH_TO (300) //(50) ++#define REASSOC_TO (300) //(50) ++//#define DISCONNECT_TO (3000) ++#define ADDBA_TO (2000) ++ ++#define LINKED_TO (1) //unit:2 sec, 1x2=2 sec ++ ++#define REAUTH_LIMIT (4) ++#define REASSOC_LIMIT (4) ++#define READDBA_LIMIT (2) ++ ++//#define IOCMD_REG0 0x10250370 ++//#define IOCMD_REG1 0x10250374 ++//#define IOCMD_REG2 0x10250378 ++ ++//#define FW_DYNAMIC_FUN_SWITCH 0x10250364 ++ ++//#define WRITE_BB_CMD 0xF0000001 ++//#define SET_CHANNEL_CMD 0xF3000000 ++//#define UPDATE_RA_CMD 0xFD0000A2 ++ ++#define DYNAMIC_FUNC_DISABLE (0x0) ++#define DYNAMIC_FUNC_DIG BIT(0) ++#define DYNAMIC_FUNC_HP BIT(1) ++#define DYNAMIC_FUNC_SS BIT(2) //Tx Power Tracking ++#define DYNAMIC_FUNC_BT BIT(3) ++#define DYNAMIC_FUNC_ANT_DIV BIT(4) ++#define DYNAMIC_FUNC_ADAPTIVITY BIT(5) ++ ++#define _HW_STATE_NOLINK_ 0x00 ++#define _HW_STATE_ADHOC_ 0x01 ++#define _HW_STATE_STATION_ 0x02 ++#define _HW_STATE_AP_ 0x03 ++ ++ ++#define _1M_RATE_ 0 ++#define _2M_RATE_ 1 ++#define _5M_RATE_ 2 ++#define _11M_RATE_ 3 ++#define _6M_RATE_ 4 ++#define _9M_RATE_ 5 ++#define _12M_RATE_ 6 ++#define _18M_RATE_ 7 ++#define _24M_RATE_ 8 ++#define _36M_RATE_ 9 ++#define _48M_RATE_ 10 ++#define _54M_RATE_ 11 ++ ++ ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WMM_OUI[]; ++extern unsigned char WPS_OUI[]; ++extern unsigned char WFD_OUI[]; ++extern unsigned char P2P_OUI[]; ++ ++extern unsigned char WMM_INFO_OUI[]; ++extern unsigned char WMM_PARA_OUI[]; ++ ++ ++// ++// Channel Plan Type. ++// Note: ++// We just add new channel plan when the new channel plan is different from any of the following ++// channel plan. ++// If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan, ++// customize them in RT_CHANNEL_INFO in the RT_CHANNEL_LIST. ++// ++typedef enum _RT_CHANNEL_DOMAIN ++{ ++ //===== old channel plan mapping =====// ++ RT_CHANNEL_DOMAIN_FCC = 0x00, ++ RT_CHANNEL_DOMAIN_IC = 0x01, ++ RT_CHANNEL_DOMAIN_ETSI = 0x02, ++ RT_CHANNEL_DOMAIN_SPAIN = 0x03, ++ RT_CHANNEL_DOMAIN_FRANCE = 0x04, ++ RT_CHANNEL_DOMAIN_MKK = 0x05, ++ RT_CHANNEL_DOMAIN_MKK1 = 0x06, ++ RT_CHANNEL_DOMAIN_ISRAEL = 0x07, ++ RT_CHANNEL_DOMAIN_TELEC = 0x08, ++ RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09, ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A, ++ RT_CHANNEL_DOMAIN_TAIWAN = 0x0B, ++ RT_CHANNEL_DOMAIN_CHINA = 0x0C, ++ RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D, ++ RT_CHANNEL_DOMAIN_KOREA = 0x0E, ++ RT_CHANNEL_DOMAIN_TURKEY = 0x0F, ++ RT_CHANNEL_DOMAIN_JAPAN = 0x10, ++ RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11, ++ RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12, ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13, ++ RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14, ++ ++ //===== new channel plan mapping, (2GDOMAIN_5GDOMAIN) =====// ++ RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20, ++ RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21, ++ RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22, ++ RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23, ++ RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24, ++ RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26, ++ RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27, ++ RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28, ++ RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29, ++ RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30, ++ RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31, ++ RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32, ++ RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33, ++ RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36, ++ RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37, ++ RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38, ++ RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39, ++ RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40, ++ ++ //===== Add new channel plan above this line===============// ++ RT_CHANNEL_DOMAIN_MAX, ++ RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F, ++}RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN; ++ ++typedef enum _RT_CHANNEL_DOMAIN_2G ++{ ++ RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, //Worldwird 13 ++ RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, //Europe ++ RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, //US ++ RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, //Japan ++ RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, //France ++ RT_CHANNEL_DOMAIN_2G_NULL = 0x05, ++ //===== Add new channel plan above this line===============// ++ RT_CHANNEL_DOMAIN_2G_MAX, ++}RT_CHANNEL_DOMAIN_2G, *PRT_CHANNEL_DOMAIN_2G; ++ ++typedef enum _RT_CHANNEL_DOMAIN_5G ++{ ++ RT_CHANNEL_DOMAIN_5G_NULL = 0x00, ++ RT_CHANNEL_DOMAIN_5G_ETSI1 = 0x01, //Europe ++ RT_CHANNEL_DOMAIN_5G_ETSI2 = 0x02, //Australia, New Zealand ++ RT_CHANNEL_DOMAIN_5G_ETSI3 = 0x03, //Russia ++ RT_CHANNEL_DOMAIN_5G_FCC1 = 0x04, //US ++ RT_CHANNEL_DOMAIN_5G_FCC2 = 0x05, //FCC o/w DFS Channels ++ RT_CHANNEL_DOMAIN_5G_FCC3 = 0x06, //India, Mexico ++ RT_CHANNEL_DOMAIN_5G_FCC4 = 0x07, //Venezuela ++ RT_CHANNEL_DOMAIN_5G_FCC5 = 0x08, //China ++ RT_CHANNEL_DOMAIN_5G_FCC6 = 0x09, //Israel ++ RT_CHANNEL_DOMAIN_5G_FCC7_IC1 = 0x0A, //US, Canada ++ RT_CHANNEL_DOMAIN_5G_KCC1 = 0x0B, //Korea ++ RT_CHANNEL_DOMAIN_5G_MKK1 = 0x0C, //Japan ++ RT_CHANNEL_DOMAIN_5G_MKK2 = 0x0D, //Japan (W52, W53) ++ RT_CHANNEL_DOMAIN_5G_MKK3 = 0x0E, //Japan (W56) ++ RT_CHANNEL_DOMAIN_5G_NCC1 = 0x0F, //Taiwan ++ RT_CHANNEL_DOMAIN_5G_NCC2 = 0x10, //Taiwan o/w DFS ++ //===== Add new channel plan above this line===============// ++ //===== Driver Self Defined =====// ++ RT_CHANNEL_DOMAIN_5G_FCC = 0x11, ++ RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS = 0x12, ++ RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS = 0x13, ++ RT_CHANNEL_DOMAIN_5G_MAX, ++}RT_CHANNEL_DOMAIN_5G, *PRT_CHANNEL_DOMAIN_5G; ++ ++#define rtw_is_channel_plan_valid(chplan) (chplansurvey_timer, (ms)); \ ++ } while(0) ++ ++#define set_link_timer(mlmeext, ms) \ ++ do { \ ++ /*DBG_871X("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ ++ _set_timer(&(mlmeext)->link_timer, (ms)); \ ++ } while(0) ++#ifdef CONFIG_IEEE80211W ++#define set_sa_query_timer(mlmeext, ms) \ ++ do { \ ++ DBG_871X("%s set_sa_query_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms)); \ ++ _set_timer(&(mlmeext)->sa_query_timer, (ms)); \ ++ } while(0) ++#endif //CONFIG_IEEE80211W ++extern int cckrates_included(unsigned char *rate, int ratelen); ++extern int cckratesonly_included(unsigned char *rate, int ratelen); ++ ++extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr); ++ ++extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); ++extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext); ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state); ++void concurrent_chk_joinbss_done(_adapter *padapter, int join_res); ++#endif //CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++void dc_SelectChannel(_adapter *padapter, unsigned char channel); ++void dc_SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset); ++void dc_set_channel_bwmode_disconnect(_adapter *padapter); ++u8 dc_handle_join_request(_adapter *padapter); ++void dc_handle_join_done(_adapter *padapter, u8 join_res); ++sint dc_check_fwstate(_adapter *padapter, sint fw_state); ++u8 dc_handle_site_survey(_adapter *padapter); ++void dc_report_survey_event(_adapter *padapter, union recv_frame *precv_frame); ++void dc_set_channel_bwmode_survey_done(_adapter *padapter); ++void dc_set_ap_channel_bandwidth(_adapter *padapter, u8 channel, u8 channel_offset, u8 bwmode); ++void dc_resume_xmit(_adapter *padapter); ++u8 dc_check_xmit(_adapter *padapter); ++#endif ++ ++int rtw_chk_start_clnt_join(_adapter *padapter); ++int rtw_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset); ++ ++struct cmd_hdl { ++ uint parmsize; ++ u8 (*h2cfuns)(struct _ADAPTER *padapter, u8 *pbuf); ++}; ++ ++ ++u8 read_macreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_macreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 read_bbreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_bbreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 read_rfreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_rfreg_hdl(_adapter *padapter, u8 *pbuf); ++ ++ ++u8 NULL_hdl(_adapter *padapter, u8 *pbuf); ++u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf); ++u8 disconnect_hdl(_adapter *padapter, u8 *pbuf); ++u8 createbss_hdl(_adapter *padapter, u8 *pbuf); ++u8 setopmode_hdl(_adapter *padapter, u8 *pbuf); ++u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf); ++u8 setauth_hdl(_adapter *padapter, u8 *pbuf); ++u8 setkey_hdl(_adapter *padapter, u8 *pbuf); ++u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf); ++u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf); ++u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf); ++u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 set_ch_hdl(_adapter *padapter, u8 *pbuf); ++u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf); //Kurt: Handling DFS channel switch announcement ie. ++u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++ ++#define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl}, ++#define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd}, ++ ++#ifdef _RTW_CMD_C_ ++ ++struct cmd_hdl wlancmds[] = ++{ ++ GEN_DRV_CMD_HANDLER(0, NULL) /*0*/ ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*10*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct joinbss_parm), join_cmd_hdl) /*14*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct disconnect_parm), disconnect_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct createbss_parm), createbss_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setopmode_parm), setopmode_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct sitesurvey_parm), sitesurvey_cmd_hdl) /*18*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct setauth_parm), setauth_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setkey_parm), setkey_hdl) /*20*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct set_stakey_parm), set_stakey_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct set_assocsta_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct del_assocsta_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setstapwrstate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setbasicrate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getbasicrate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setdatarate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getdatarate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setphyinfo_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getphyinfo_parm), NULL) /*30*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct setphy_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getphy_parm), NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*40*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof(struct addBaReq_parm), add_ba_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof(struct set_ch_parm), set_ch_hdl) /* 46 */ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*50*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof(struct Tx_Beacon_param), tx_beacon_hdl) /*55*/ ++ ++ GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl) /*56*/ ++ GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl) /*57*/ ++ ++ GEN_MLME_EXT_HANDLER(0, h2c_msg_hdl) /*58*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/ ++}; ++ ++#endif ++ ++struct C2HEvent_Header ++{ ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ unsigned int len:16; ++ unsigned int ID:8; ++ unsigned int seq:8; ++ ++#elif defined(CONFIG_BIG_ENDIAN) ++ ++ unsigned int seq:8; ++ unsigned int ID:8; ++ unsigned int len:16; ++ ++#else ++ ++# error "Must be LITTLE or BIG Endian" ++ ++#endif ++ ++ unsigned int rsvd; ++ ++}; ++ ++void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf); ++void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf); ++ ++enum rtw_c2h_event ++{ ++ GEN_EVT_CODE(_Read_MACREG)=0, /*0*/ ++ GEN_EVT_CODE(_Read_BBREG), ++ GEN_EVT_CODE(_Read_RFREG), ++ GEN_EVT_CODE(_Read_EEPROM), ++ GEN_EVT_CODE(_Read_EFUSE), ++ GEN_EVT_CODE(_Read_CAM), /*5*/ ++ GEN_EVT_CODE(_Get_BasicRate), ++ GEN_EVT_CODE(_Get_DataRate), ++ GEN_EVT_CODE(_Survey), /*8*/ ++ GEN_EVT_CODE(_SurveyDone), /*9*/ ++ ++ GEN_EVT_CODE(_JoinBss) , /*10*/ ++ GEN_EVT_CODE(_AddSTA), ++ GEN_EVT_CODE(_DelSTA), ++ GEN_EVT_CODE(_AtimDone) , ++ GEN_EVT_CODE(_TX_Report), ++ GEN_EVT_CODE(_CCX_Report), /*15*/ ++ GEN_EVT_CODE(_DTM_Report), ++ GEN_EVT_CODE(_TX_Rate_Statistics), ++ GEN_EVT_CODE(_C2HLBK), ++ GEN_EVT_CODE(_FWDBG), ++ GEN_EVT_CODE(_C2HFEEDBACK), /*20*/ ++ GEN_EVT_CODE(_ADDBA), ++ GEN_EVT_CODE(_C2HBCN), ++ GEN_EVT_CODE(_ReportPwrState), //filen: only for PCIE, USB ++ GEN_EVT_CODE(_CloseRF), //filen: only for PCIE, work around ASPM ++ MAX_C2HEVT ++}; ++ ++ ++#ifdef _RTW_MLME_EXT_C_ ++ ++static struct fwevent wlanevents[] = ++{ ++ {0, rtw_dummy_event_callback}, /*0*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, &rtw_survey_event_callback}, /*8*/ ++ {sizeof (struct surveydone_event), &rtw_surveydone_event_callback}, /*9*/ ++ ++ {0, &rtw_joinbss_event_callback}, /*10*/ ++ {sizeof(struct stassoc_event), &rtw_stassoc_event_callback}, ++ {sizeof(struct stadel_event), &rtw_stadel_event_callback}, ++ {0, &rtw_atimdone_event_callback}, ++ {0, rtw_dummy_event_callback}, ++ {0, NULL}, /*15*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, rtw_fwdbg_event_callback}, ++ {0, NULL}, /*20*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, &rtw_cpwm_event_callback}, ++}; ++ ++#endif//_RTL8192C_CMD_C_ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp.h +@@ -0,0 +1,712 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_MP_H_ ++#define _RTW_MP_H_ ++ ++#ifndef PLATFORM_WINDOWS ++// 00 - Success ++// 11 - Error ++#define STATUS_SUCCESS (0x00000000L) ++#define STATUS_PENDING (0x00000103L) ++ ++#define STATUS_UNSUCCESSFUL (0xC0000001L) ++#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL) ++#define STATUS_NOT_SUPPORTED (0xC00000BBL) ++ ++#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS) ++#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING) ++#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L) ++#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L) ++#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L) ++#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L) ++ ++#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL) ++#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES) ++#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L) ++#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L) ++#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L) ++#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L) ++#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L) ++#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L) ++#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L) ++#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL) ++#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL) ++#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL) ++#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL) ++#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL) ++#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED) ++#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL) ++#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L) ++#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L) ++#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L) ++#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L) ++#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L) ++#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L) ++#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L) ++#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L) ++#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L) ++#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L) ++#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL) ++#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL) ++#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL) ++#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL) ++#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL) ++#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL) ++ ++#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L) ++#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L) ++#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L) ++#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L) ++#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27 ++#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45 ++#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37 ++#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49 ++#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93 ++#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3 ++#endif /* #ifndef PLATFORM_WINDOWS */ ++ ++#if 0 ++#define MPT_NOOP 0 ++#define MPT_READ_MAC_1BYTE 1 ++#define MPT_READ_MAC_2BYTE 2 ++#define MPT_READ_MAC_4BYTE 3 ++#define MPT_WRITE_MAC_1BYTE 4 ++#define MPT_WRITE_MAC_2BYTE 5 ++#define MPT_WRITE_MAC_4BYTE 6 ++#define MPT_READ_BB_CCK 7 ++#define MPT_WRITE_BB_CCK 8 ++#define MPT_READ_BB_OFDM 9 ++#define MPT_WRITE_BB_OFDM 10 ++#define MPT_READ_RF 11 ++#define MPT_WRITE_RF 12 ++#define MPT_READ_EEPROM_1BYTE 13 ++#define MPT_WRITE_EEPROM_1BYTE 14 ++#define MPT_READ_EEPROM_2BYTE 15 ++#define MPT_WRITE_EEPROM_2BYTE 16 ++#define MPT_SET_CSTHRESHOLD 21 ++#define MPT_SET_INITGAIN 22 ++#define MPT_SWITCH_BAND 23 ++#define MPT_SWITCH_CHANNEL 24 ++#define MPT_SET_DATARATE 25 ++#define MPT_SWITCH_ANTENNA 26 ++#define MPT_SET_TX_POWER 27 ++#define MPT_SET_CONT_TX 28 ++#define MPT_SET_SINGLE_CARRIER 29 ++#define MPT_SET_CARRIER_SUPPRESSION 30 ++#define MPT_GET_RATE_TABLE 31 ++#define MPT_READ_TSSI 32 ++#define MPT_GET_THERMAL_METER 33 ++#endif ++ ++#define MAX_MP_XMITBUF_SZ 2048 ++#define NR_MP_XMITFRAME 8 ++ ++struct mp_xmit_frame ++{ ++ _list list; ++ ++ struct pkt_attrib attrib; ++ ++ _pkt *pkt; ++ ++ int frame_tag; ++ ++ _adapter *padapter; ++ ++#ifdef CONFIG_USB_HCI ++ ++ //insert urb, irp, and irpcnt info below... ++ //max frag_cnt = 8 ++ ++ u8 *mem_addr; ++ u32 sz[8]; ++ ++#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) ++ PURB pxmit_urb[8]; ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PIRP pxmit_irp[8]; ++#endif ++ ++ u8 bpending[8]; ++ sint ac_tag[8]; ++ sint last[8]; ++ uint irpcnt; ++ uint fragcnt; ++#endif /* CONFIG_USB_HCI */ ++ ++ uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; ++}; ++ ++struct mp_wiparam ++{ ++ u32 bcompleted; ++ u32 act_type; ++ u32 io_offset; ++ u32 io_value; ++}; ++ ++typedef void(*wi_act_func)(void* padapter); ++ ++#ifdef PLATFORM_WINDOWS ++struct mp_wi_cntx ++{ ++ u8 bmpdrv_unload; ++ ++ // Work Item ++ NDIS_WORK_ITEM mp_wi; ++ NDIS_EVENT mp_wi_evt; ++ _lock mp_wi_lock; ++ u8 bmp_wi_progress; ++ wi_act_func curractfunc; ++ // Variable needed in each implementation of CurrActFunc. ++ struct mp_wiparam param; ++}; ++#endif ++ ++struct mp_tx ++{ ++ u8 stop; ++ u32 count, sended; ++ u8 payload; ++ struct pkt_attrib attrib; ++ struct tx_desc desc; ++ u8 *pallocated_buf; ++ u8 *buf; ++ u32 buf_size, write_size; ++ _thread_hdl_ PktTxThread; ++}; ++ ++//#if (MP_DRIVER == 1) ++#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++#ifdef CONFIG_RTL8723A ++#include ++#endif ++#ifdef CONFIG_RTL8188E ++#include ++#endif ++#define MP_MAX_LINES 1000 ++#define MP_MAX_LINES_BYTES 256 ++#define u1Byte u8 ++#define s1Byte s8 ++#define u4Byte u32 ++#define s4Byte s32 ++typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter); ++typedef struct _MPT_CONTEXT ++{ ++ // Indicate if we have started Mass Production Test. ++ BOOLEAN bMassProdTest; ++ ++ // Indicate if the driver is unloading or unloaded. ++ BOOLEAN bMptDrvUnload; ++ ++ /* 8190 PCI does not support NDIS_WORK_ITEM. */ ++ // Work Item for Mass Production Test. ++ //NDIS_WORK_ITEM MptWorkItem; ++// RT_WORK_ITEM MptWorkItem; ++ // Event used to sync the case unloading driver and MptWorkItem is still in progress. ++// NDIS_EVENT MptWorkItemEvent; ++ // To protect the following variables. ++// NDIS_SPIN_LOCK MptWorkItemSpinLock; ++ // Indicate a MptWorkItem is scheduled and not yet finished. ++ BOOLEAN bMptWorkItemInProgress; ++ // An instance which implements function and context of MptWorkItem. ++ MPT_WORK_ITEM_HANDLER CurrMptAct; ++ ++ // 1=Start, 0=Stop from UI. ++ ULONG MptTestStart; ++ // _TEST_MODE, defined in MPT_Req2.h ++ ULONG MptTestItem; ++ // Variable needed in each implementation of CurrMptAct. ++ ULONG MptActType; // Type of action performed in CurrMptAct. ++ // The Offset of IO operation is depend of MptActType. ++ ULONG MptIoOffset; ++ // The Value of IO operation is depend of MptActType. ++ ULONG MptIoValue; ++ // The RfPath of IO operation is depend of MptActType. ++ ULONG MptRfPath; ++ ++ WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch. ++ u8 MptChannelToSw; // Channel to switch. ++ u8 MptInitGainToSet; // Initial gain to set. ++ //ULONG bMptAntennaA; // TRUE if we want to use antenna A. ++ ULONG MptBandWidth; // bandwidth to switch. ++ ULONG MptRateIndex; // rate index. ++ // Register value kept for Single Carrier Tx test. ++ u8 btMpCckTxPower; ++ // Register value kept for Single Carrier Tx test. ++ u8 btMpOfdmTxPower; ++ // For MP Tx Power index ++ u8 TxPwrLevel[2]; // rf-A, rf-B ++ ++ // Content of RCR Regsiter for Mass Production Test. ++ ULONG MptRCR; ++ // TRUE if we only receive packets with specific pattern. ++ BOOLEAN bMptFilterPattern; ++ // Rx OK count, statistics used in Mass Production Test. ++ ULONG MptRxOkCnt; ++ // Rx CRC32 error count, statistics used in Mass Production Test. ++ ULONG MptRxCrcErrCnt; ++ ++ BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test. ++ BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test. ++ BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test. ++ // TRUE if we are in Single Carrier Tx test. ++ BOOLEAN bSingleCarrier; ++ // TRUE if we are in Carrier Suppression Tx Test. ++ BOOLEAN bCarrierSuppression; ++ //TRUE if we are in Single Tone Tx test. ++ BOOLEAN bSingleTone; ++ ++ // ACK counter asked by K.Y.. ++ BOOLEAN bMptEnableAckCounter; ++ ULONG MptAckCounter; ++ ++ // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! ++ //s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; ++ //s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; ++ //s4Byte RfReadLine[2]; ++ ++ u8 APK_bound[2]; //for APK path A/path B ++ BOOLEAN bMptIndexEven; ++ ++ u8 backup0xc50; ++ u8 backup0xc58; ++ u8 backup0xc30; ++}MPT_CONTEXT, *PMPT_CONTEXT; ++#endif ++//#endif ++ ++/* E-Fuse */ ++#ifdef CONFIG_RTL8192D ++#define EFUSE_MAP_SIZE 255 ++#endif ++#ifdef CONFIG_RTL8192C ++#define EFUSE_MAP_SIZE 128 ++#endif ++#ifdef CONFIG_RTL8723A ++#define EFUSE_MAP_SIZE 256 ++#endif ++#ifdef CONFIG_RTL8188E ++#define EFUSE_MAP_SIZE 256 ++#endif ++#define EFUSE_MAX_SIZE 512 ++ ++/* end of E-Fuse */ ++ ++//#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17) ++enum { ++ WRITE_REG = 1, ++ READ_REG, ++ WRITE_RF, ++ READ_RF, ++ MP_START, ++ MP_STOP, ++ MP_RATE, ++ MP_CHANNEL, ++ MP_BANDWIDTH, ++ MP_TXPOWER, ++ MP_ANT_TX, ++ MP_ANT_RX, ++ MP_CTX, ++ MP_QUERY, ++ MP_ARX, ++ MP_PSD, ++ MP_PWRTRK, ++ MP_THER, ++ MP_IOCTL, ++ EFUSE_GET, ++ EFUSE_SET, ++ MP_RESET_STATS, ++ MP_DUMP, ++ MP_PHYPARA, ++ MP_NULL, ++}; ++ ++struct mp_priv ++{ ++ _adapter *papdater; ++ ++ //Testing Flag ++ u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD) ++ ++ u32 prev_fw_state; ++ ++ //OID cmd handler ++ struct mp_wiparam workparam; ++// u8 act_in_progress; ++ ++ //Tx Section ++ u8 TID; ++ u32 tx_pktcount; ++ struct mp_tx tx; ++ ++ //Rx Section ++ u32 rx_pktcount; ++ u32 rx_crcerrpktcount; ++ u32 rx_pktloss; ++ ++ struct recv_stat rxstat; ++ ++ //RF/BB relative ++ u8 channel; ++ u8 bandwidth; ++ u8 prime_channel_offset; ++ u8 txpoweridx; ++ u8 txpoweridx_b; ++ u8 rateidx; ++ u32 preamble; ++// u8 modem; ++ u32 CrystalCap; ++// u32 curr_crystalcap; ++ ++ u16 antenna_tx; ++ u16 antenna_rx; ++// u8 curr_rfpath; ++ ++ u8 check_mp_pkt; ++ ++// uint ForcedDataRate; ++ ++ struct wlan_network mp_network; ++ NDIS_802_11_MAC_ADDRESS network_macaddr; ++ ++#ifdef PLATFORM_WINDOWS ++ u32 rx_testcnt; ++ u32 rx_testcnt1; ++ u32 rx_testcnt2; ++ u32 tx_testcnt; ++ u32 tx_testcnt1; ++ ++ struct mp_wi_cntx wi_cntx; ++ ++ u8 h2c_result; ++ u8 h2c_seqnum; ++ u16 h2c_cmdcode; ++ u8 h2c_resp_parambuf[512]; ++ _lock h2c_lock; ++ _lock wkitm_lock; ++ u32 h2c_cmdcnt; ++ NDIS_EVENT h2c_cmd_evt; ++ NDIS_EVENT c2h_set; ++ NDIS_EVENT h2c_clr; ++ NDIS_EVENT cpwm_int; ++ ++ NDIS_EVENT scsir_full_evt; ++ NDIS_EVENT scsiw_empty_evt; ++#endif ++ ++ u8 *pallocated_mp_xmitframe_buf; ++ u8 *pmp_xmtframe_buf; ++ _queue free_mp_xmitqueue; ++ u32 free_mp_xmitframe_cnt; ++ ++ MPT_CONTEXT MptCtx; ++}; ++ ++typedef struct _IOCMD_STRUCT_ { ++ u8 cmdclass; ++ u16 value; ++ u8 index; ++}IOCMD_STRUCT; ++ ++struct rf_reg_param { ++ u32 path; ++ u32 offset; ++ u32 value; ++}; ++ ++struct bb_reg_param { ++ u32 offset; ++ u32 value; ++}; ++//======================================================================= ++ ++#define LOWER _TRUE ++#define RAISE _FALSE ++ ++/* Hardware Registers */ ++#if 0 ++#if 0 ++#define IOCMD_CTRL_REG 0x102502C0 ++#define IOCMD_DATA_REG 0x102502C4 ++#else ++#define IOCMD_CTRL_REG 0x10250370 ++#define IOCMD_DATA_REG 0x10250374 ++#endif ++ ++#define IOCMD_GET_THERMAL_METER 0xFD000028 ++ ++#define IOCMD_CLASS_BB_RF 0xF0 ++#define IOCMD_BB_READ_IDX 0x00 ++#define IOCMD_BB_WRITE_IDX 0x01 ++#define IOCMD_RF_READ_IDX 0x02 ++#define IOCMD_RF_WRIT_IDX 0x03 ++#endif ++#define BB_REG_BASE_ADDR 0x800 ++ ++/* MP variables */ ++#if 0 ++#define _2MAC_MODE_ 0 ++#define _LOOPBOOK_MODE_ 1 ++#endif ++typedef enum _MP_MODE_ { ++ MP_OFF, ++ MP_ON, ++ MP_ERR, ++ MP_CONTINUOUS_TX, ++ MP_SINGLE_CARRIER_TX, ++ MP_CARRIER_SUPPRISSION_TX, ++ MP_SINGLE_TONE_TX, ++ MP_PACKET_TX, ++ MP_PACKET_RX ++} MP_MODE; ++ ++#ifdef CONFIG_RTL8192C ++#define RF_PATH_A RF_PATH_A ++#define RF_PATH_B RF_PATH_B ++#define RF_PATH_C RF_PATH_C ++#define RF_PATH_D RF_PATH_D ++ ++#define MAX_RF_PATH_NUMS RF_PATH_MAX ++#else ++#define RF_PATH_A 0 ++#define RF_PATH_B 1 ++#define RF_PATH_C 2 ++#define RF_PATH_D 3 ++ ++#define MAX_RF_PATH_NUMS 2 ++#endif ++ ++extern u8 mpdatarate[NumRates]; ++ ++/* MP set force data rate base on the definition. */ ++typedef enum _MPT_RATE_INDEX ++{ ++ /* CCK rate. */ ++ MPT_RATE_1M, /* 0 */ ++ MPT_RATE_2M, ++ MPT_RATE_55M, ++ MPT_RATE_11M, /* 3 */ ++ ++ /* OFDM rate. */ ++ MPT_RATE_6M, /* 4 */ ++ MPT_RATE_9M, ++ MPT_RATE_12M, ++ MPT_RATE_18M, ++ MPT_RATE_24M, ++ MPT_RATE_36M, ++ MPT_RATE_48M, ++ MPT_RATE_54M, /* 11 */ ++ ++ /* HT rate. */ ++ MPT_RATE_MCS0, /* 12 */ ++ MPT_RATE_MCS1, ++ MPT_RATE_MCS2, ++ MPT_RATE_MCS3, ++ MPT_RATE_MCS4, ++ MPT_RATE_MCS5, ++ MPT_RATE_MCS6, ++ MPT_RATE_MCS7, /* 19 */ ++ MPT_RATE_MCS8, ++ MPT_RATE_MCS9, ++ MPT_RATE_MCS10, ++ MPT_RATE_MCS11, ++ MPT_RATE_MCS12, ++ MPT_RATE_MCS13, ++ MPT_RATE_MCS14, ++ MPT_RATE_MCS15, /* 27 */ ++ MPT_RATE_LAST ++}MPT_RATE_E, *PMPT_RATE_E; ++ ++#if 0 ++// Represent Channel Width in HT Capabilities ++typedef enum _HT_CHANNEL_WIDTH { ++ HT_CHANNEL_WIDTH_20 = 0, ++ HT_CHANNEL_WIDTH_40 = 1, ++}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; ++#endif ++ ++#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F ++ ++typedef enum _POWER_MODE_ { ++ POWER_LOW = 0, ++ POWER_NORMAL ++}POWER_MODE; ++ ++ ++#define RX_PKT_BROADCAST 1 ++#define RX_PKT_DEST_ADDR 2 ++#define RX_PKT_PHY_MATCH 3 ++ ++#if 0 ++#define RPTMaxCount 0x000FFFFF; ++ ++// parameter 1 : BitMask ++// bit 0 : OFDM PPDU ++// bit 1 : OFDM False Alarm ++// bit 2 : OFDM MPDU OK ++// bit 3 : OFDM MPDU Fail ++// bit 4 : CCK PPDU ++// bit 5 : CCK False Alarm ++// bit 6 : CCK MPDU ok ++// bit 7 : CCK MPDU fail ++// bit 8 : HT PPDU counter ++// bit 9 : HT false alarm ++// bit 10 : HT MPDU total ++// bit 11 : HT MPDU OK ++// bit 12 : HT MPDU fail ++// bit 15 : RX full drop ++typedef enum _RXPHY_BITMASK_ ++{ ++ OFDM_PPDU_BIT = 0, ++ OFDM_FALSE_BIT, ++ OFDM_MPDU_OK_BIT, ++ OFDM_MPDU_FAIL_BIT, ++ CCK_PPDU_BIT, ++ CCK_FALSE_BIT, ++ CCK_MPDU_OK_BIT, ++ CCK_MPDU_FAIL_BIT, ++ HT_PPDU_BIT, ++ HT_FALSE_BIT, ++ HT_MPDU_BIT, ++ HT_MPDU_OK_BIT, ++ HT_MPDU_FAIL_BIT, ++} RXPHY_BITMASK; ++#endif ++ ++typedef enum _ENCRY_CTRL_STATE_ { ++ HW_CONTROL, //hw encryption& decryption ++ SW_CONTROL, //sw encryption& decryption ++ HW_ENCRY_SW_DECRY, //hw encryption & sw decryption ++ SW_ENCRY_HW_DECRY //sw encryption & hw decryption ++}ENCRY_CTRL_STATE; ++ ++typedef enum _OFDM_TX_MODE { ++ OFDM_ALL_OFF = 0, ++ OFDM_ContinuousTx = 1, ++ OFDM_SingleCarrier = 2, ++ OFDM_SingleTone = 4, ++} OFDM_TX_MODE; ++ ++//======================================================================= ++//extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); ++//extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); ++ ++extern s32 init_mp_priv(PADAPTER padapter); ++extern void free_mp_priv(struct mp_priv *pmp_priv); ++extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel); ++extern void MPT_DeInitAdapter(PADAPTER padapter); ++extern s32 mp_start_test(PADAPTER padapter); ++extern void mp_stop_test(PADAPTER padapter); ++ ++//======================================================================= ++//extern void IQCalibrateBcut(PADAPTER pAdapter); ++ ++//extern u32 bb_reg_read(PADAPTER Adapter, u16 offset); ++//extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value); ++//extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset); ++//extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value); ++ ++//extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask); ++//extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value); ++//extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask); ++//extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value); ++ ++extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask); ++extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val); ++ ++extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz); ++extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz); ++extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask); ++extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val); ++extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr); ++extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val); ++ ++extern void SetChannel(PADAPTER pAdapter); ++extern void SetBandwidth(PADAPTER pAdapter); ++extern void SetTxPower(PADAPTER pAdapter); ++extern void SetAntennaPathPower(PADAPTER pAdapter); ++//extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset); ++extern void SetDataRate(PADAPTER pAdapter); ++ ++extern void SetAntenna(PADAPTER pAdapter); ++ ++//extern void SetCrystalCap(PADAPTER pAdapter); ++ ++extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern void GetThermalMeter(PADAPTER pAdapter, u8 *value); ++ ++extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); ++extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); ++extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++ ++extern void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc); ++extern void SetPacketTx(PADAPTER padapter); ++extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx); ++ ++extern void ResetPhyRxPktCount(PADAPTER pAdapter); ++extern u32 GetPhyRxPktReceived(PADAPTER pAdapter); ++extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); ++ ++extern s32 SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void GetPowerTracking(PADAPTER padapter, u8 *enable); ++ ++extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data); ++ ++ ++extern void Hal_SetAntenna(PADAPTER pAdapter); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetTxPower(PADAPTER pAdapter); ++extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); ++extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetDataRate(PADAPTER pAdapter); ++extern void Hal_SetChannel(PADAPTER pAdapter); ++extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); ++extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); ++extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); ++extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); ++extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal); ++ ++#endif //_RTW_MP_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp_ioctl.h +@@ -0,0 +1,596 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_MP_IOCTL_H_ ++#define _RTW_MP_IOCTL_H_ ++ ++//#include ++//#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if 0 ++#define TESTFWCMDNUMBER 1000000 ++#define TEST_H2CINT_WAIT_TIME 500 ++#define TEST_C2HINT_WAIT_TIME 500 ++#define HCI_TEST_SYSCFG_HWMASK 1 ++#define _BUSCLK_40M (4 << 2) ++#endif ++//------------------------------------------------------------------------------ ++typedef struct CFG_DBG_MSG_STRUCT { ++ u32 DebugLevel; ++ u32 DebugComponent_H32; ++ u32 DebugComponent_L32; ++}CFG_DBG_MSG_STRUCT,*PCFG_DBG_MSG_STRUCT; ++ ++typedef struct _RW_REG { ++ u32 offset; ++ u32 width; ++ u32 value; ++}mp_rw_reg,RW_Reg, *pRW_Reg; ++ ++//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM ++typedef struct _EEPROM_RW_PARAM { ++ u32 offset; ++ u16 value; ++}eeprom_rw_param,EEPROM_RWParam, *pEEPROM_RWParam; ++ ++typedef struct _EFUSE_ACCESS_STRUCT_ { ++ u16 start_addr; ++ u16 cnts; ++ u8 data[0]; ++}EFUSE_ACCESS_STRUCT, *PEFUSE_ACCESS_STRUCT; ++ ++typedef struct _BURST_RW_REG { ++ u32 offset; ++ u32 len; ++ u8 Data[256]; ++}burst_rw_reg,Burst_RW_Reg, *pBurst_RW_Reg; ++ ++typedef struct _USB_VendorReq{ ++ u8 bRequest; ++ u16 wValue; ++ u16 wIndex; ++ u16 wLength; ++ u8 u8Dir;//0:OUT, 1:IN ++ u8 u8InData; ++}usb_vendor_req, USB_VendorReq, *pUSB_VendorReq; ++ ++typedef struct _DR_VARIABLE_STRUCT_ { ++ u8 offset; ++ u32 variable; ++}DR_VARIABLE_STRUCT; ++ ++//int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid); ++ ++//void _irqlevel_changed_(_irqL *irqlevel, /*BOOLEAN*/unsigned char bLower); ++#ifdef PLATFORM_OS_XP ++static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower) ++{ ++ ++ if (bLower == LOWER) { ++ *irqlevel = KeGetCurrentIrql(); ++ ++ if (*irqlevel > PASSIVE_LEVEL) { ++ KeLowerIrql(PASSIVE_LEVEL); ++ } ++ } else { ++ if (KeGetCurrentIrql() == PASSIVE_LEVEL) { ++ KeRaiseIrql(DISPATCH_LEVEL, irqlevel); ++ } ++ } ++ ++} ++#else ++#define _irqlevel_changed_(a,b) ++#endif ++ ++//oid_rtl_seg_81_80_00 ++NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_81_80_20 ++NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_81_87 ++NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_81_85 ++NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++// oid_rtl_seg_87_11_00 ++NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv* poid_par_priv); ++// oid_rtl_seg_87_11_20 ++NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_87_11_50 ++NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_87_11_F0 ++NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_87_12_00 ++NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv); ++ ++NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv); ++ ++#ifdef _RTW_MP_IOCTL_C_ ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_00[] = ++{ ++ {1, &oid_null_function}, //0x00 OID_RT_PRO_RESET_DUT ++ {1, &oid_rt_pro_set_data_rate_hdl}, //0x01 ++ {1, &oid_rt_pro_start_test_hdl}, //0x02 ++ {1, &oid_rt_pro_stop_test_hdl}, //0x03 ++ {1, &oid_null_function}, //0x04 OID_RT_PRO_SET_PREAMBLE ++ {1, &oid_null_function}, //0x05 OID_RT_PRO_SET_SCRAMBLER ++ {1, &oid_null_function}, //0x06 OID_RT_PRO_SET_FILTER_BB ++ {1, &oid_null_function}, //0x07 OID_RT_PRO_SET_MANUAL_DIVERSITY_BB ++ {1, &oid_rt_pro_set_channel_direct_call_hdl}, //0x08 ++ {1, &oid_null_function}, //0x09 OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL ++ {1, &oid_null_function}, //0x0A OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL ++ {1, &oid_rt_pro_set_continuous_tx_hdl}, //0x0B OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL ++ {1, &oid_rt_pro_set_single_carrier_tx_hdl}, //0x0C OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS ++ {1, &oid_null_function}, //0x0D OID_RT_PRO_SET_TX_ANTENNA_BB ++ {1, &oid_rt_pro_set_antenna_bb_hdl}, //0x0E ++ {1, &oid_null_function}, //0x0F OID_RT_PRO_SET_CR_SCRAMBLER ++ {1, &oid_null_function}, //0x10 OID_RT_PRO_SET_CR_NEW_FILTER ++ {1, &oid_rt_pro_set_tx_power_control_hdl}, //0x11 OID_RT_PRO_SET_TX_POWER_CONTROL ++ {1, &oid_null_function}, //0x12 OID_RT_PRO_SET_CR_TX_CONFIG ++ {1, &oid_null_function}, //0x13 OID_RT_PRO_GET_TX_POWER_CONTROL ++ {1, &oid_null_function}, //0x14 OID_RT_PRO_GET_CR_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x15 OID_RT_PRO_SET_CR_SETPOINT ++ {1, &oid_null_function}, //0x16 OID_RT_PRO_SET_INTEGRATOR ++ {1, &oid_null_function}, //0x17 OID_RT_PRO_SET_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x18 OID_RT_PRO_GET_INTEGRATOR ++ {1, &oid_null_function}, //0x19 OID_RT_PRO_GET_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x1A OID_RT_PRO_QUERY_EEPROM_TYPE ++ {1, &oid_null_function}, //0x1B OID_RT_PRO_WRITE_MAC_ADDRESS ++ {1, &oid_null_function}, //0x1C OID_RT_PRO_READ_MAC_ADDRESS ++ {1, &oid_null_function}, //0x1D OID_RT_PRO_WRITE_CIS_DATA ++ {1, &oid_null_function}, //0x1E OID_RT_PRO_READ_CIS_DATA ++ {1, &oid_null_function} //0x1F OID_RT_PRO_WRITE_POWER_CONTROL ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_20[] = ++{ ++ {1, &oid_null_function}, //0x20 OID_RT_PRO_READ_POWER_CONTROL ++ {1, &oid_null_function}, //0x21 OID_RT_PRO_WRITE_EEPROM ++ {1, &oid_null_function}, //0x22 OID_RT_PRO_READ_EEPROM ++ {1, &oid_rt_pro_reset_tx_packet_sent_hdl}, //0x23 ++ {1, &oid_rt_pro_query_tx_packet_sent_hdl}, //0x24 ++ {1, &oid_rt_pro_reset_rx_packet_received_hdl}, //0x25 ++ {1, &oid_rt_pro_query_rx_packet_received_hdl}, //0x26 ++ {1, &oid_rt_pro_query_rx_packet_crc32_error_hdl}, //0x27 ++ {1, &oid_null_function}, //0x28 OID_RT_PRO_QUERY_CURRENT_ADDRESS ++ {1, &oid_null_function}, //0x29 OID_RT_PRO_QUERY_PERMANENT_ADDRESS ++ {1, &oid_null_function}, //0x2A OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS ++ {1, &oid_rt_pro_set_carrier_suppression_tx_hdl},//0x2B OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX ++ {1, &oid_null_function}, //0x2C OID_RT_PRO_RECEIVE_PACKET ++ {1, &oid_null_function}, //0x2D OID_RT_PRO_WRITE_EEPROM_BYTE ++ {1, &oid_null_function}, //0x2E OID_RT_PRO_READ_EEPROM_BYTE ++ {1, &oid_rt_pro_set_modulation_hdl} //0x2F ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_40[] = ++{ ++ {1, &oid_null_function}, //0x40 ++ {1, &oid_null_function}, //0x41 ++ {1, &oid_null_function}, //0x42 ++ {1, &oid_rt_pro_set_single_tone_tx_hdl}, //0x43 ++ {1, &oid_null_function}, //0x44 ++ {1, &oid_null_function} //0x45 ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_80[] = ++{ ++ {1, &oid_null_function}, //0x80 OID_RT_DRIVER_OPTION ++ {1, &oid_null_function}, //0x81 OID_RT_RF_OFF ++ {1, &oid_null_function} //0x82 OID_RT_AUTH_STATUS ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_85[] = ++{ ++ {1, &oid_rt_wireless_mode_hdl} //0x00 OID_RT_WIRELESS_MODE ++}; ++ ++struct oid_obj_priv oid_rtl_seg_81_87[] = ++{ ++ {1, &oid_null_function}, //0x80 OID_RT_PRO8187_WI_POLL ++ {1, &oid_rt_pro_write_bb_reg_hdl}, //0x81 ++ {1, &oid_rt_pro_read_bb_reg_hdl}, //0x82 ++ {1, &oid_rt_pro_write_rf_reg_hdl}, //0x82 ++ {1, &oid_rt_pro_read_rf_reg_hdl} //0x83 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_00[] = ++{ ++ {1, &oid_rt_pro8711_join_bss_hdl}, //0x00 //S ++ {1, &oid_rt_pro_read_register_hdl}, //0x01 ++ {1, &oid_rt_pro_write_register_hdl}, //0x02 ++ {1, &oid_rt_pro_burst_read_register_hdl}, //0x03 ++ {1, &oid_rt_pro_burst_write_register_hdl}, //0x04 ++ {1, &oid_rt_pro_write_txcmd_hdl}, //0x05 ++ {1, &oid_rt_pro_read16_eeprom_hdl}, //0x06 ++ {1, &oid_rt_pro_write16_eeprom_hdl}, //0x07 ++ {1, &oid_null_function}, //0x08 OID_RT_PRO_H2C_SET_COMMAND ++ {1, &oid_null_function}, //0x09 OID_RT_PRO_H2C_QUERY_RESULT ++ {1, &oid_rt_pro8711_wi_poll_hdl}, //0x0A ++ {1, &oid_rt_pro8711_pkt_loss_hdl}, //0x0B ++ {1, &oid_rt_rd_attrib_mem_hdl}, //0x0C ++ {1, &oid_rt_wr_attrib_mem_hdl}, //0x0D ++ {1, &oid_null_function}, //0x0E ++ {1, &oid_null_function}, //0x0F ++ {1, &oid_null_function}, //0x10 OID_RT_PRO_H2C_CMD_MODE ++ {1, &oid_null_function}, //0x11 OID_RT_PRO_H2C_CMD_RSP_MODE ++ {1, &oid_null_function}, //0X12 OID_RT_PRO_WAIT_C2H_EVENT ++ {1, &oid_null_function}, //0X13 OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST ++ {1, &oid_null_function}, //0X14 OID_RT_PRO_SCSI_ACCESS_TEST ++ {1, &oid_null_function}, //0X15 OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT ++ {1, &oid_null_function}, //0X16 OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN ++ {1, &oid_null_function}, //0X17 OID_RT_RRO_RX_PKT_VIA_IOCTRL ++ {1, &oid_null_function}, //0X18 OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL ++ {1, &oid_null_function}, //0X19 OID_RT_RPO_SET_PWRMGT_TEST ++ {1, &oid_null_function}, //0X1A ++ {1, &oid_null_function}, //0X1B OID_RT_PRO_QRY_PWRMGT_TEST ++ {1, &oid_null_function}, //0X1C OID_RT_RPO_ASYNC_RWIO_TEST ++ {1, &oid_null_function}, //0X1D OID_RT_RPO_ASYNC_RWIO_POLL ++ {1, &oid_rt_pro_set_rf_intfs_hdl}, //0X1E ++ {1, &oid_rt_poll_rx_status_hdl} //0X1F ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_20[] = ++{ ++ {1, &oid_rt_pro_cfg_debug_message_hdl}, //0x20 ++ {1, &oid_rt_pro_set_data_rate_ex_hdl}, //0x21 ++ {1, &oid_rt_pro_set_basic_rate_hdl}, //0x22 ++ {1, &oid_rt_pro_read_tssi_hdl}, //0x23 ++ {1, &oid_rt_pro_set_power_tracking_hdl} //0x24 ++}; ++ ++ ++struct oid_obj_priv oid_rtl_seg_87_11_50[] = ++{ ++ {1, &oid_rt_pro_qry_pwrstate_hdl}, //0x50 ++ {1, &oid_rt_pro_set_pwrstate_hdl} //0x51 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_80[] = ++{ ++ {1, &oid_null_function} //0x80 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_B0[] = ++{ ++ {1, &oid_null_function} //0xB0 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_F0[] = ++{ ++ {1, &oid_null_function}, //0xF0 ++ {1, &oid_null_function}, //0xF1 ++ {1, &oid_null_function}, //0xF2 ++ {1, &oid_null_function}, //0xF3 ++ {1, &oid_null_function}, //0xF4 ++ {1, &oid_null_function}, //0xF5 ++ {1, &oid_null_function}, //0xF6 ++ {1, &oid_null_function}, //0xF7 ++ {1, &oid_null_function}, //0xF8 ++ {1, &oid_null_function}, //0xF9 ++ {1, &oid_null_function}, //0xFA ++ {1, &oid_rt_pro_h2c_set_rate_table_hdl}, //0xFB ++ {1, &oid_rt_pro_h2c_get_rate_table_hdl}, //0xFC ++ {1, &oid_null_function}, //0xFD ++ {1, &oid_null_function}, //0xFE OID_RT_PRO_H2C_C2H_LBK_TEST ++ {1, &oid_null_function} //0xFF ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_12_00[]= ++{ ++ {1, &oid_rt_pro_encryption_ctrl_hdl}, //0x00 Q&S ++ {1, &oid_rt_pro_add_sta_info_hdl}, //0x01 S ++ {1, &oid_rt_pro_dele_sta_info_hdl}, //0x02 S ++ {1, &oid_rt_pro_query_dr_variable_hdl}, //0x03 Q ++ {1, &oid_rt_pro_rx_packet_type_hdl}, //0x04 Q,S ++ {1, &oid_rt_pro_read_efuse_hdl}, //0x05 Q OID_RT_PRO_READ_EFUSE ++ {1, &oid_rt_pro_write_efuse_hdl}, //0x06 S OID_RT_PRO_WRITE_EFUSE ++ {1, &oid_rt_pro_rw_efuse_pgpkt_hdl}, //0x07 Q,S ++ {1, &oid_rt_get_efuse_current_size_hdl}, //0x08 Q ++ {1, &oid_rt_set_bandwidth_hdl}, //0x09 ++ {1, &oid_rt_set_crystal_cap_hdl}, //0x0a ++ {1, &oid_rt_set_rx_packet_type_hdl}, //0x0b S ++ {1, &oid_rt_get_efuse_max_size_hdl}, //0x0c ++ {1, &oid_rt_pro_set_tx_agc_offset_hdl}, //0x0d ++ {1, &oid_rt_pro_set_pkt_test_mode_hdl}, //0x0e ++ {1, &oid_null_function}, //0x0f OID_RT_PRO_FOR_EVM_TEST_SETTING ++ {1, &oid_rt_get_thermal_meter_hdl}, //0x10 Q OID_RT_PRO_GET_THERMAL_METER ++ {1, &oid_rt_reset_phy_rx_packet_count_hdl}, //0x11 S OID_RT_RESET_PHY_RX_PACKET_COUNT ++ {1, &oid_rt_get_phy_rx_packet_received_hdl}, //0x12 Q OID_RT_GET_PHY_RX_PACKET_RECEIVED ++ {1, &oid_rt_get_phy_rx_packet_crc32_error_hdl}, //0x13 Q OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR ++ {1, &oid_rt_set_power_down_hdl}, //0x14 Q OID_RT_SET_POWER_DOWN ++ {1, &oid_rt_get_power_mode_hdl} //0x15 Q OID_RT_GET_POWER_MODE ++}; ++ ++#else /* _RTL871X_MP_IOCTL_C_ */ ++ ++extern struct oid_obj_priv oid_rtl_seg_81_80_00[32]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_20[16]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_40[6]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_80[3]; ++ ++extern struct oid_obj_priv oid_rtl_seg_81_85[1]; ++extern struct oid_obj_priv oid_rtl_seg_81_87[5]; ++ ++extern struct oid_obj_priv oid_rtl_seg_87_11_00[32]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_20[5]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_50[2]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_80[1]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_B0[1]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_F0[16]; ++ ++extern struct oid_obj_priv oid_rtl_seg_87_12_00[32]; ++ ++#endif /* _RTL871X_MP_IOCTL_C_ */ ++ ++struct rwreg_param{ ++ u32 offset; ++ u32 width; ++ u32 value; ++}; ++ ++struct bbreg_param{ ++ u32 offset; ++ u32 phymask; ++ u32 value; ++}; ++/* ++struct rfchannel_param{ ++ u32 ch; ++ u32 modem; ++}; ++*/ ++struct txpower_param{ ++ u32 pwr_index; ++}; ++ ++ ++struct datarate_param{ ++ u32 rate_index; ++}; ++ ++ ++struct rfintfs_parm { ++ u32 rfintfs; ++}; ++ ++typedef struct _mp_xmit_parm_ { ++ u8 enable; ++ u32 count; ++ u16 length; ++ u8 payload_type; ++ u8 da[ETH_ALEN]; ++}MP_XMIT_PARM, *PMP_XMIT_PARM; ++ ++struct mp_xmit_packet { ++ u32 len; ++ u32 mem[MAX_MP_XMITBUF_SZ >> 2]; ++}; ++ ++struct psmode_param { ++ u32 ps_mode; ++ u32 smart_ps; ++}; ++ ++//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM ++struct eeprom_rw_param { ++ u32 offset; ++ u16 value; ++}; ++ ++struct mp_ioctl_handler { ++ u32 paramsize; ++ u32 (*handler)(struct oid_par_priv* poid_par_priv); ++ u32 oid; ++}; ++ ++struct mp_ioctl_param{ ++ u32 subcode; ++ u32 len; ++ u8 data[0]; ++}; ++ ++#define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_ ++ ++enum RTL871X_MP_IOCTL_SUBCODE { ++ GEN_MP_IOCTL_SUBCODE(MP_START), /*0*/ ++ GEN_MP_IOCTL_SUBCODE(MP_STOP), ++ GEN_MP_IOCTL_SUBCODE(READ_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_REG), ++ GEN_MP_IOCTL_SUBCODE(READ_BB_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG), /*5*/ ++ GEN_MP_IOCTL_SUBCODE(READ_RF_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG), ++ GEN_MP_IOCTL_SUBCODE(SET_CHANNEL), ++ GEN_MP_IOCTL_SUBCODE(SET_TXPOWER), ++ GEN_MP_IOCTL_SUBCODE(SET_DATARATE), /*10*/ ++ GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH), ++ GEN_MP_IOCTL_SUBCODE(SET_ANTENNA), ++ GEN_MP_IOCTL_SUBCODE(CNTU_TX), ++ GEN_MP_IOCTL_SUBCODE(SC_TX), ++ GEN_MP_IOCTL_SUBCODE(CS_TX), /*15*/ ++ GEN_MP_IOCTL_SUBCODE(ST_TX), ++ GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET), ++ GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE), ++ GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT), ++ GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV), /*20*/ ++ GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR), ++ GEN_MP_IOCTL_SUBCODE(READ16_EEPROM), ++ GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM), ++ GEN_MP_IOCTL_SUBCODE(EFUSE), ++ GEN_MP_IOCTL_SUBCODE(EFUSE_MAP), /*25*/ ++ GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE), ++ GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE), ++ GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER), ++ GEN_MP_IOCTL_SUBCODE(SET_PTM), ++ GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN), /*30*/ ++ GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO), ++ GEN_MP_IOCTL_SUBCODE(SET_DM_BT), /*35*/ ++ GEN_MP_IOCTL_SUBCODE(DEL_BA), /*36*/ ++ GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS), /*37*/ ++ MAX_MP_IOCTL_SUBCODE, ++}; ++ ++u32 mp_ioctl_xmit_packet_hdl(struct oid_par_priv* poid_par_priv); ++ ++#ifdef _RTW_MP_IOCTL_C_ ++ ++#define GEN_MP_IOCTL_HANDLER(sz, hdl, oid) {sz, hdl, oid}, ++ ++#define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) {sz, mp_ioctl_ ## subcode ## _hdl, oid}, ++ ++ ++struct mp_ioctl_handler mp_ioctl_hdl[] = { ++ ++/*0*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_start_test_hdl, OID_RT_PRO_START_TEST) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_stop_test_hdl, OID_RT_PRO_STOP_TEST) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_read_register_hdl, OID_RT_PRO_READ_REGISTER) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_write_register_hdl, OID_RT_PRO_WRITE_REGISTER) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_read_bb_reg_hdl, OID_RT_PRO_READ_BB_REG) ++/*5*/ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_write_bb_reg_hdl, OID_RT_PRO_WRITE_BB_REG) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_read_rf_reg_hdl, OID_RT_PRO_RF_READ_REGISTRY) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_write_rf_reg_hdl, OID_RT_PRO_RF_WRITE_REGISTRY) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_channel_direct_call_hdl, OID_RT_PRO_SET_CHANNEL_DIRECT_CALL) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct txpower_param), oid_rt_pro_set_tx_power_control_hdl, OID_RT_PRO_SET_TX_POWER_CONTROL) ++/*10*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_data_rate_hdl, OID_RT_PRO_SET_DATA_RATE) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_bandwidth_hdl, OID_RT_SET_BANDWIDTH) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_antenna_bb_hdl, OID_RT_PRO_SET_ANTENNA_BB) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_continuous_tx_hdl, OID_RT_PRO_SET_CONTINUOUS_TX) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_carrier_tx_hdl, OID_RT_PRO_SET_SINGLE_CARRIER_TX) ++/*15*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_carrier_suppression_tx_hdl, OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_tone_tx_hdl, OID_RT_PRO_SET_SINGLE_TONE_TX) ++ ++ EXT_MP_IOCTL_HANDLER(0, xmit_packet, 0) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_rx_packet_type_hdl, OID_RT_SET_RX_PACKET_TYPE) ++ GEN_MP_IOCTL_HANDLER(0, oid_rt_reset_phy_rx_packet_count_hdl, OID_RT_RESET_PHY_RX_PACKET_COUNT) ++/*20*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_received_hdl, OID_RT_GET_PHY_RX_PACKET_RECEIVED) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_crc32_error_hdl, OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) ++ GEN_MP_IOCTL_HANDLER(sizeof(EFUSE_ACCESS_STRUCT), oid_rt_pro_efuse_hdl, OID_RT_PRO_EFUSE) ++/*25*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_efuse_map_hdl, OID_RT_PRO_EFUSE_MAP) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_max_size_hdl, OID_RT_GET_EFUSE_MAX_SIZE) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_current_size_hdl, OID_RT_GET_EFUSE_CURRENT_SIZE) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_thermal_meter_hdl, OID_RT_PRO_GET_THERMAL_METER) ++ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_pro_set_power_tracking_hdl, OID_RT_PRO_SET_POWER_TRACKING) ++/*30*/ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_set_power_down_hdl, OID_RT_SET_POWER_DOWN) ++/*31*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_trigger_gpio_hdl, 0) ++ ++ ++}; ++ ++#else /* _RTW_MP_IOCTL_C_ */ ++ ++extern struct mp_ioctl_handler mp_ioctl_hdl[]; ++ ++#endif /* _RTW_MP_IOCTL_C_ */ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_mp_phy_regdef.h +@@ -0,0 +1,1097 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __RTW_MP_PHY_REGDEF_H_ ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __RTW_MP_PHY_REGDEF_H_ ++#define __RTW_MP_PHY_REGDEF_H_ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++//#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++//#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++//#define rFPGA0_XC_RFTiming 0x818 ++//#define rFPGA0_XD_RFTiming 0x81c ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rFPGA0_XC_HSSIParameter1 0x830 ++#define rFPGA0_XC_HSSIParameter2 0x834 ++#define rFPGA0_XD_HSSIParameter1 0x838 ++#define rFPGA0_XD_HSSIParameter2 0x83c ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++#define rFPGA0_XC_LSSIParameter 0x848 ++#define rFPGA0_XD_LSSIParameter 0x84c ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++#define rFPGA0_XC_RFInterfaceOE 0x868 ++#define rFPGA0_XD_RFInterfaceOE 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++#define rOFDM0_RxIQExtAnta 0xca0 ++ ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_Rate18_06 0xe00 ++#define rTxAGC_Rate54_24 0xe04 ++#define rTxAGC_CCK_Mcs32 0xe08 ++#define rTxAGC_Mcs03_Mcs00 0xe10 ++#define rTxAGC_Mcs07_Mcs04 0xe14 ++#define rTxAGC_Mcs11_Mcs08 0xe18 ++#define rTxAGC_Mcs15_Mcs12 0xe1c ++ ++// Analog- control in RX_WAIT_CCA : REG: EE0 [Analog- Power & Control Register] ++#define rRx_Wait_CCCA 0xe70 ++#define rAnapar_Ctrl_BB 0xee0 ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define RTL92SE_FPGA_VERIFY 0 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++//#if (RTL92SE_FPGA_VERIFY == 1) ++#define rZebra1_Channel 0x7 // RF channel switch ++//#else ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++#if (RTL92SE_FPGA_VERIFY == 1) ++#define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address // Reg 0x824 rFPGA0_XA_HSSIParameter2 ++#else ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++#endif ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++#if (RTL92SE_FPGA_VERIFY == 1) ++#define bLSSIReadBackData 0xfff // Reg 0x8a0 rFPGA0_XA_LSSIReadBack ++#else ++#define bLSSIReadBackData 0xfffff // T65 RF ++#endif ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++#define bTxAGCRate18_06 0x7f7f7f7f // Useless ++#define bTxAGCRate54_24 0x7f7f7f7f ++#define bTxAGCRateMCS32 0x7f ++#define bTxAGCRateCCK 0x7f00 ++#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f ++#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f ++#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f ++#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++#define bMask12Bits 0xfff ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++#if (RTL92SE_FPGA_VERIFY == 1) ++//#define bMask12Bits 0xfff // RF Reg mask bits ++//#define bMask20Bits 0xfff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfff ++#else ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++#endif ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#if 0 ++#define ANTENNA_A 0x1 // Useless ++#define ANTENNA_B 0x2 ++#define ANTENNA_AB 0x3 // ANTENNA_A|ANTENNA_B ++ ++#define ANTENNA_C 0x4 ++#define ANTENNA_D 0x8 ++#endif ++ ++#define RCR_AAP BIT(0) // accept all physical address ++#define RCR_APM BIT(1) // accept physical match ++#define RCR_AM BIT(2) // accept multicast ++#define RCR_AB BIT(3) // accept broadcast ++#define RCR_ACRC32 BIT(5) // accept error packet ++#define RCR_9356SEL BIT(6) ++#define RCR_AICV BIT(12) // Accept ICV error packet ++#define RCR_RXFTH0 (BIT(13)|BIT(14)|BIT(15)) // Rx FIFO threshold ++#define RCR_ADF BIT(18) // Accept Data(frame type) frame ++#define RCR_ACF BIT(19) // Accept control frame ++#define RCR_AMF BIT(20) // Accept management frame ++#define RCR_ADD3 BIT(21) ++#define RCR_APWRMGT BIT(22) // Accept power management packet ++#define RCR_CBSSID BIT(23) // Accept BSSID match packet ++#define RCR_ENMARP BIT(28) // enable mac auto reset phy ++#define RCR_EnCS1 BIT(29) // enable carrier sense method 1 ++#define RCR_EnCS2 BIT(30) // enable carrier sense method 2 ++#define RCR_OnlyErlPkt BIT(31) // Rx Early mode is performed for packet size greater than 1536 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_p2p.h +@@ -0,0 +1,161 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_P2P_H_ ++#define __RTW_P2P_H_ ++ ++#include ++ ++u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ); ++u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); ++u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++#ifdef CONFIG_WFD ++u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled); ++u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++#endif //CONFIG_WFD ++ ++u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); ++u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); ++u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++ ++void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); ++ ++#ifdef CONFIG_P2P_PS ++void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); ++void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); ++u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); ++#endif // CONFIG_P2P_PS ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); ++int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); ++void rtw_append_wfd_ie(_adapter *padapter, u8 *buf, u32 *len); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++void reset_global_wifidirect_info( _adapter* padapter ); ++int rtw_init_wifi_display_info(_adapter* padapter); ++void rtw_init_wifidirect_timers(_adapter* padapter); ++void rtw_init_wifidirect_addrs(_adapter* padapter, u8 *dev_addr, u8 *iface_addr); ++void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); ++int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); ++ ++static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ if(wdinfo->p2p_state != state) { ++ //wdinfo->pre_p2p_state = wdinfo->p2p_state; ++ wdinfo->p2p_state = state; ++ } ++} ++static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ if(wdinfo->pre_p2p_state != state) { ++ wdinfo->pre_p2p_state = state; ++ } ++} ++#if 0 ++static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) ++{ ++ if(wdinfo->pre_p2p_state != -1) { ++ wdinfo->p2p_state = wdinfo->pre_p2p_state; ++ wdinfo->pre_p2p_state = -1; ++ } ++} ++#endif ++static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) ++{ ++ if(wdinfo->role != role) { ++ wdinfo->role = role; ++ } ++} ++static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->p2p_state; ++} ++static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->pre_p2p_state; ++} ++static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->role; ++} ++static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ return wdinfo->p2p_state == state; ++} ++static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) ++{ ++ return wdinfo->role == role; ++} ++ ++#ifdef CONFIG_DBG_P2P ++void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); ++void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); ++//void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); ++void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); ++#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) ++#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) ++#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) ++//#define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) ++#else //CONFIG_DBG_P2P ++#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) ++#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) ++#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) ++//#define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) ++#endif //CONFIG_DBG_P2P ++ ++#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) ++#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) ++#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) ++#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) ++#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) ++ ++#define rtw_p2p_findphase_ex_set(wdinfo, value) \ ++ (wdinfo)->find_phase_state_exchange_cnt = (value) ++ ++//is this find phase exchange for social channel scan? ++#define rtw_p2p_findphase_ex_is_social(wdinfo) \ ++ (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST ++ ++//should we need find phase exchange anymore? ++#define rtw_p2p_findphase_ex_is_needed(wdinfo) \ ++ ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ ++ (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE) ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_pwrctrl.h +@@ -0,0 +1,362 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_PWRCTRL_H_ ++#define __RTW_PWRCTRL_H_ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++#include ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++ ++#define FW_PWR0 0 ++#define FW_PWR1 1 ++#define FW_PWR2 2 ++#define FW_PWR3 3 ++ ++ ++#define HW_PWR0 7 ++#define HW_PWR1 6 ++#define HW_PWR2 2 ++#define HW_PWR3 0 ++#define HW_PWR4 8 ++ ++#define FW_PWRMSK 0x7 ++ ++ ++#define XMIT_ALIVE BIT(0) ++#define RECV_ALIVE BIT(1) ++#define CMD_ALIVE BIT(2) ++#define EVT_ALIVE BIT(3) ++ ++ ++enum Power_Mgnt ++{ ++ PS_MODE_ACTIVE = 0 , ++ PS_MODE_MIN , ++ PS_MODE_MAX , ++ PS_MODE_DTIM , ++ PS_MODE_VOIP , ++ PS_MODE_UAPSD_WMM , ++ PS_MODE_UAPSD , ++ PS_MODE_IBSS , ++ PS_MODE_WWLAN , ++ PM_Radio_Off , ++ PM_Card_Disable , ++ PS_MODE_NUM ++}; ++ ++ ++/* ++ BIT[2:0] = HW state ++ BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state ++ BIT[4] = sub-state ++*/ ++ ++#define PS_DPS BIT(0) ++#define PS_LCLK (PS_DPS) ++#define PS_RF_OFF BIT(1) ++#define PS_ALL_ON BIT(2) ++#define PS_ST_ACTIVE BIT(3) ++ ++#define PS_ISR_ENABLE BIT(4) ++#define PS_IMR_ENABLE BIT(5) ++#define PS_ACK BIT(6) ++#define PS_TOGGLE BIT(7) ++ ++#define PS_STATE_MASK (0x0F) ++#define PS_STATE_HW_MASK (0x07) ++#define PS_SEQ_MASK (0xc0) ++ ++#define PS_STATE(x) (PS_STATE_MASK & (x)) ++#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) ++#define PS_SEQ(x) (PS_SEQ_MASK & (x)) ++ ++#define PS_STATE_S0 (PS_DPS) ++#define PS_STATE_S1 (PS_LCLK) ++#define PS_STATE_S2 (PS_RF_OFF) ++#define PS_STATE_S3 (PS_ALL_ON) ++#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) ++ ++ ++#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) ++#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) ++#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) ++ ++ ++struct reportpwrstate_parm { ++ unsigned char mode; ++ unsigned char state; //the CPWM value ++ unsigned short rsvd; ++}; ++ ++ ++typedef _sema _pwrlock; ++ ++ ++__inline static void _init_pwrlock(_pwrlock *plock) ++{ ++ _rtw_init_sema(plock, 1); ++} ++ ++__inline static void _free_pwrlock(_pwrlock *plock) ++{ ++ _rtw_free_sema(plock); ++} ++ ++ ++__inline static void _enter_pwrlock(_pwrlock *plock) ++{ ++ _rtw_down_sema(plock); ++} ++ ++ ++__inline static void _exit_pwrlock(_pwrlock *plock) ++{ ++ _rtw_up_sema(plock); ++} ++ ++#define LPS_DELAY_TIME 1*HZ // 1 sec ++ ++#define EXE_PWR_NONE 0x01 ++#define EXE_PWR_IPS 0x02 ++#define EXE_PWR_LPS 0x04 ++ ++// RF state. ++typedef enum _rt_rf_power_state ++{ ++ rf_on, // RF is on after RFSleep or RFOff ++ rf_sleep, // 802.11 Power Save mode ++ rf_off, // HW/SW Radio OFF or Inactive Power Save ++ //=====Add the new RF state above this line=====// ++ rf_max ++}rt_rf_power_state; ++ ++// RF Off Level for IPS or HW/SW radio off ++#define RT_RF_OFF_LEVL_ASPM BIT(0) // PCI ASPM ++#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) // PCI clock request ++#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) // PCI D3 mode ++#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) // NIC halt, re-initialize hw parameters ++#define RT_RF_OFF_LEVL_FREE_FW BIT(4) // FW free, re-download the FW ++#define RT_RF_OFF_LEVL_FW_32K BIT(5) // FW in 32k ++#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) // Always enable ASPM and Clock Req in initialization. ++#define RT_RF_LPS_DISALBE_2R BIT(30) // When LPS is on, disable 2R if no packet is received or transmittd. ++#define RT_RF_LPS_LEVEL_ASPM BIT(31) // LPS with ASPM ++ ++#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE) ++#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG))) ++#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG) ++ ++ ++enum _PS_BBRegBackup_ { ++ PSBBREG_RF0 = 0, ++ PSBBREG_RF1, ++ PSBBREG_RF2, ++ PSBBREG_AFE0, ++ PSBBREG_TOTALCNT ++}; ++ ++enum { // for ips_mode ++ IPS_NONE=0, ++ IPS_NORMAL, ++ IPS_LEVEL_2, ++}; ++ ++struct pwrctrl_priv ++{ ++ _pwrlock lock; ++ volatile u8 rpwm; // requested power state for fw ++ volatile u8 cpwm; // fw current power state. updated when 1. read from HCPWM 2. driver lowers power level ++ volatile u8 tog; // toggling ++ volatile u8 cpwm_tog; // toggling ++ u8 pwr_mode; ++ u8 smart_ps; ++ u32 alives; ++ ++ u8 b_hw_radio_off; ++ u8 reg_rfoff; ++ u8 reg_pdnmode; //powerdown mode ++ u32 rfoff_reason; ++ ++ //RF OFF Level ++ u32 cur_ps_level; ++ u32 reg_rfps_level; ++ ++ ++ ++#ifdef CONFIG_PCI_HCI ++ //just for PCIE ASPM ++ u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. ++ u8 b_support_backdoor; ++ ++ //just for PCIE ASPM ++ u8 const_amdpci_aspm; ++#endif ++ ++ uint ips_enter_cnts; ++ uint ips_leave_cnts; ++ ++ u8 ips_mode; ++ u8 ips_mode_req; // used to accept the mode setting request, will update to ipsmode later ++ uint bips_processing; ++ u32 ips_deny_time; /* will deny IPS when system time is smaller than this */ ++ u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */ ++ ++ u8 bLeisurePs; ++ u8 LpsIdleCount; ++ u8 power_mgnt; ++ u8 bFwCurrentInPSMode; ++ u32 DelayLPSLastTimeStamp; ++ ++ s32 pnp_current_pwr_state; ++ u8 pnp_bstop_trx; ++ ++ ++ u8 bInternalAutoSuspend; ++ u8 bInSuspend; ++ u8 bSupportRemoteWakeup; ++#ifdef CONFIG_WOWLAN ++ u8 wowlan_mode; ++ u8 wowlan_pattern; ++ u8 wowlan_magic; ++ u8 wowlan_unicast; ++ u8 wowlan_pattern_idx; ++ u32 wowlan_pattern_context[8][5]; ++#endif // CONFIG_WOWLAN ++ _timer pwr_state_check_timer; ++ int pwr_state_check_interval; ++ u8 pwr_state_check_cnts; ++ ++ int ps_flag; ++ ++ rt_rf_power_state rf_pwrstate;//cur power state ++ //rt_rf_power_state current_rfpwrstate; ++ rt_rf_power_state change_rfpwrstate; ++ ++ u8 bHWPowerdown;//if support hw power down ++ u8 bHWPwrPindetect; ++ u8 bkeepfwalive; ++ u8 brfoffbyhw; ++ unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ struct workqueue_struct *rtw_workqueue; ++ _workitem resume_work; ++ #endif ++ ++ #ifdef CONFIG_HAS_EARLYSUSPEND ++ struct early_suspend early_suspend; ++ u8 do_late_resume; ++ #endif //CONFIG_HAS_EARLYSUSPEND ++ ++ #ifdef CONFIG_ANDROID_POWER ++ android_early_suspend_t early_suspend; ++ u8 do_late_resume; ++ #endif ++ ++}; ++ ++#define rtw_get_ips_mode_req(pwrctrlpriv) \ ++ (pwrctrlpriv)->ips_mode_req ++ ++#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \ ++ (pwrctrlpriv)->ips_mode_req = (ips_mode) ++ ++#define RTW_PWR_STATE_CHK_INTERVAL 2000 ++ ++#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \ ++ do { \ ++ /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctrlpriv), (ms));*/ \ ++ _set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \ ++ } while(0) ++ ++#define rtw_set_pwr_state_check_timer(pwrctrlpriv) \ ++ _rtw_set_pwr_state_check_timer((pwrctrlpriv), (pwrctrlpriv)->pwr_state_check_interval) ++ ++extern void rtw_init_pwrctrl_priv(_adapter *adapter); ++extern void rtw_free_pwrctrl_priv(_adapter * adapter); ++ ++#ifdef CONFIG_LPS_LCLK ++extern s32 rtw_register_tx_alive(PADAPTER padapter); ++extern void rtw_unregister_tx_alive(PADAPTER padapter); ++extern s32 rtw_register_rx_alive(PADAPTER padapter); ++extern void rtw_unregister_rx_alive(PADAPTER padapter); ++extern s32 rtw_register_cmd_alive(PADAPTER padapter); ++extern void rtw_unregister_cmd_alive(PADAPTER padapter); ++extern s32 rtw_register_evt_alive(PADAPTER padapter); ++extern void rtw_unregister_evt_alive(PADAPTER padapter); ++extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate); ++#endif ++ ++extern void rtw_set_ps_mode(_adapter * padapter, u8 ps_mode, u8 smart_ps); ++extern void rtw_set_rpwm(_adapter * padapter, u8 val8); ++extern void LeaveAllPowerSaveMode(PADAPTER Adapter); ++#ifdef CONFIG_IPS ++void _ips_enter(_adapter * padapter); ++void ips_enter(_adapter * padapter); ++int _ips_leave(_adapter * padapter); ++int ips_leave(_adapter * padapter); ++#endif ++ ++void rtw_ps_processor(_adapter*padapter); ++ ++#ifdef CONFIG_AUTOSUSPEND ++int autoresume_enter(_adapter* padapter); ++#endif ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ); ++#endif ++ ++ ++#ifdef CONFIG_LPS ++void LPS_Enter(PADAPTER padapter); ++void LPS_Leave(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv); ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER) ++bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv); ++bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv); ++void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable); ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv); ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv); ++#else ++#define rtw_is_earlysuspend_registered(pwrpriv) _FALSE ++#define rtw_is_do_late_resume(pwrpriv) _FALSE ++#define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0) ++#define rtw_register_early_suspend(pwrpriv) do {} while (0) ++#define rtw_unregister_early_suspend(pwrpriv) do {} while (0) ++#endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */ ++ ++u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val); ++void rtw_set_ips_deny(_adapter *padapter, u32 ms); ++int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller); ++#define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__) ++#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__) ++int rtw_pm_set_ips(_adapter *padapter, u8 mode); ++int rtw_pm_set_lps(_adapter *padapter, u8 mode); ++ ++#endif //__RTL871X_PWRCTRL_H_ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_qos.h +@@ -0,0 +1,40 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef _RTW_QOS_H_ ++#define _RTW_QOS_H_ ++#include ++#include ++ ++ ++ ++ ++ ++ ++struct qos_priv { ++ ++ unsigned int qos_option; //bit mask option: u-apsd, s-apsd, ts, block ack... ++ ++}; ++ ++ ++#endif //_RTL871X_QOS_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_recv.h +@@ -0,0 +1,731 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_RECV_H_ ++#define _RTW_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#define NR_RECVFRAME 256 ++ ++#define RXFRAME_ALIGN 8 ++#define RXFRAME_ALIGN_SZ (1<signal_stat_timer, (recvpriv)->signal_stat_sampling_interval) ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++struct sta_recv_priv { ++ ++ _lock lock; ++ sint option; ++ ++ //_queue blk_strms[MAX_RX_NUMBLKS]; ++ _queue defrag_q; //keeping the fragment frame until defrag ++ ++ struct stainfo_rxcache rxcache; ++ ++ //uint sta_rx_bytes; ++ //uint sta_rx_pkts; ++ //uint sta_rx_fail; ++ ++}; ++ ++ ++struct recv_buf ++{ ++ _list list; ++ ++ _lock recvbuf_lock; ++ ++ u32 ref_cnt; ++ ++ PADAPTER adapter; ++ ++ u8 *pbuf; ++ u8 *pallocated_buf; ++ ++ u32 len; ++ u8 *phead; ++ u8 *pdata; ++ u8 *ptail; ++ u8 *pend; ++ ++#ifdef CONFIG_USB_HCI ++ ++ #if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX)||defined(PLATFORM_FREEBSD) ++ PURB purb; ++ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ ++ u32 alloc_sz; ++ #endif ++ ++ #ifdef PLATFORM_OS_XP ++ PIRP pirp; ++ #endif ++ ++ #ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_read_port; ++ #endif ++ ++ u8 irp_pending; ++ int transfer_len; ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++ _pkt *pskb; ++ u8 reuse; ++#endif ++#ifdef PLATFORM_FREEBSD //skb solution ++ struct sk_buff *pskb; ++ u8 reuse; ++#endif //PLATFORM_FREEBSD //skb solution ++}; ++ ++ ++/* ++ head -----> ++ ++ data -----> ++ ++ payload ++ ++ tail -----> ++ ++ ++ end -----> ++ ++ len = (unsigned int )(tail - data); ++ ++*/ ++struct recv_frame_hdr ++{ ++ _list list; ++#ifndef CONFIG_BSD_RX_USE_MBUF ++ struct sk_buff *pkt; ++ struct sk_buff *pkt_newalloc; ++#else // CONFIG_BSD_RX_USE_MBUF ++ _pkt *pkt; ++ _pkt *pkt_newalloc; ++#endif // CONFIG_BSD_RX_USE_MBUF ++ ++ _adapter *adapter; ++ ++ u8 fragcnt; ++ ++ int frame_tag; ++ ++ struct rx_pkt_attrib attrib; ++ ++ uint len; ++ u8 *rx_head; ++ u8 *rx_data; ++ u8 *rx_tail; ++ u8 *rx_end; ++ ++ void *precvbuf; ++ ++ ++ // ++ struct sta_info *psta; ++ ++ //for A-MPDU Rx reordering buffer control ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++}; ++ ++ ++union recv_frame{ ++ ++ union{ ++ _list list; ++ struct recv_frame_hdr hdr; ++ uint mem[RECVFRAME_HDR_ALIGN>>2]; ++ }u; ++ ++ //uint mem[MAX_RXSZ>>2]; ++ ++}; ++ ++ ++extern union recv_frame *_rtw_alloc_recvframe (_queue *pfree_recv_queue); //get a free recv_frame from pfree_recv_queue ++extern union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue); //get a free recv_frame from pfree_recv_queue ++extern void rtw_init_recvframe(union recv_frame *precvframe ,struct recv_priv *precvpriv); ++extern int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue); ++ ++#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue) ++extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); ++extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); ++ ++extern void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue); ++u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter); ++ ++sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue); ++sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue); ++struct recv_buf *rtw_dequeue_recvbuf (_queue *queue); ++ ++void rtw_reordering_ctrl_timeout_handler(void *pcontext); ++ ++__inline static u8 *get_rxmem(union recv_frame *precvframe) ++{ ++ //always return rx_head... ++ if(precvframe==NULL) ++ return NULL; ++ ++ return precvframe->u.hdr.rx_head; ++} ++ ++__inline static u8 *get_rx_status(union recv_frame *precvframe) ++{ ++ ++ return get_rxmem(precvframe); ++ ++} ++ ++__inline static u8 *get_recvframe_data(union recv_frame *precvframe) ++{ ++ ++ //alwasy return rx_data ++ if(precvframe==NULL) ++ return NULL; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++__inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz) ++{ ++ // append data before rx_data ++ ++ /* add data to the start of recv_frame ++ * ++ * This function extends the used data area of the recv_frame at the buffer ++ * start. rx_data must be still larger than rx_head, after pushing. ++ */ ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ ++ precvframe->u.hdr.rx_data -= sz ; ++ if( precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head ) ++ { ++ precvframe->u.hdr.rx_data += sz ; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len +=sz; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++ ++__inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz) ++{ ++ // rx_data += sz; move rx_data sz bytes hereafter ++ ++ //used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller ++ ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ ++ precvframe->u.hdr.rx_data += sz; ++ ++ if(precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) ++ { ++ precvframe->u.hdr.rx_data -= sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len -=sz; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++__inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz) ++{ ++ // rx_tai += sz; move rx_tail sz bytes hereafter ++ ++ //used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller ++ //after putting, rx_tail must be still larger than rx_end. ++ unsigned char * prev_rx_tail; ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ prev_rx_tail = precvframe->u.hdr.rx_tail; ++ ++ precvframe->u.hdr.rx_tail += sz; ++ ++ if(precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) ++ { ++ precvframe->u.hdr.rx_tail -= sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len +=sz; ++ ++ return precvframe->u.hdr.rx_tail; ++ ++} ++ ++ ++ ++__inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) ++{ ++ // rmv data from rx_tail (by yitsen) ++ ++ //used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller ++ //after pulling, rx_end must be still larger than rx_data. ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ precvframe->u.hdr.rx_tail -= sz; ++ ++ if(precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) ++ { ++ precvframe->u.hdr.rx_tail += sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len -=sz; ++ ++ return precvframe->u.hdr.rx_tail; ++ ++} ++ ++ ++ ++__inline static _buffer * get_rxbuf_desc(union recv_frame *precvframe) ++{ ++ _buffer * buf_desc; ++ ++ if(precvframe==NULL) ++ return NULL; ++#ifdef PLATFORM_WINDOWS ++ NdisQueryPacket(precvframe->u.hdr.pkt, NULL, NULL, &buf_desc, NULL); ++#endif ++ ++ return buf_desc; ++} ++ ++ ++__inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem) ++{ ++ //due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame ++ //from any given member of recv_frame. ++ // rxmem indicates the any member/address in recv_frame ++ ++ return (union recv_frame*)(((SIZE_PTR)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN); ++ ++} ++ ++__inline static union recv_frame *pkt_to_recvframe(_pkt *pkt) ++{ ++ ++ u8 * buf_star; ++ union recv_frame * precv_frame; ++#ifdef PLATFORM_WINDOWS ++ _buffer * buf_desc; ++ uint len; ++ ++ NdisQueryPacket(pkt, NULL, NULL, &buf_desc, &len); ++ NdisQueryBufferSafe(buf_desc, &buf_star, &len, HighPagePriority); ++#endif ++ precv_frame = rxmem_to_recvframe((unsigned char*)buf_star); ++ ++ return precv_frame; ++} ++ ++__inline static u8 *pkt_to_recvmem(_pkt *pkt) ++{ ++ // return the rx_head ++ ++ union recv_frame * precv_frame = pkt_to_recvframe(pkt); ++ ++ return precv_frame->u.hdr.rx_head; ++ ++} ++ ++__inline static u8 *pkt_to_recvdata(_pkt *pkt) ++{ ++ // return the rx_data ++ ++ union recv_frame * precv_frame =pkt_to_recvframe(pkt); ++ ++ return precv_frame->u.hdr.rx_data; ++ ++} ++ ++ ++__inline static sint get_recvframe_len(union recv_frame *precvframe) ++{ ++ return precvframe->u.hdr.len; ++} ++ ++__inline static u8 query_rx_pwr_percentage(s8 antpower ) ++{ ++ if ((antpower <= -100) || (antpower >= 20)) ++ { ++ return 0; ++ } ++ else if (antpower >= 0) ++ { ++ return 100; ++ } ++ else ++ { ++ return (100+antpower); ++ } ++} ++ ++__inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) ++{ ++ s32 SignalPower; // in dBm. ++ ++ // Translate to dBm (x=0.5y-95). ++ SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); ++ SignalPower -= 95; ++ ++ return SignalPower; ++} ++ ++ ++struct sta_info; ++ ++extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv); ++ ++extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_rf.h +@@ -0,0 +1,152 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_RF_H_ ++#define __RTW_RF_H_ ++ ++#include ++#include ++ ++#define OFDM_PHY 1 ++#define MIXED_PHY 2 ++#define CCK_PHY 3 ++ ++#define NumRates (13) ++ ++// slot time for 11g ++#define SHORT_SLOT_TIME 9 ++#define NON_SHORT_SLOT_TIME 20 ++ ++#define RTL8711_RF_MAX_SENS 6 ++#define RTL8711_RF_DEF_SENS 4 ++ ++// ++// We now define the following channels as the max channels in each channel plan. ++// 2G, total 14 chnls ++// {1,2,3,4,5,6,7,8,9,10,11,12,13,14} ++// 5G, total 24 chnls ++// {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165} ++#define MAX_CHANNEL_NUM_2G 14 ++#define MAX_CHANNEL_NUM_5G 24 ++#define MAX_CHANNEL_NUM 38//14+24 ++ ++//#define NUM_REGULATORYS 21 ++#define NUM_REGULATORYS 1 ++ ++//Country codes ++#define USA 0x555320 ++#define EUROPE 0x1 //temp, should be provided later ++#define JAPAN 0x2 //temp, should be provided later ++ ++struct regulatory_class { ++ u32 starting_freq; //MHz, ++ u8 channel_set[MAX_CHANNEL_NUM]; ++ u8 channel_cck_power[MAX_CHANNEL_NUM];//dbm ++ u8 channel_ofdm_power[MAX_CHANNEL_NUM];//dbm ++ u8 txpower_limit; //dbm ++ u8 channel_spacing; //MHz ++ u8 modem; ++}; ++ ++typedef enum _CAPABILITY{ ++ cESS = 0x0001, ++ cIBSS = 0x0002, ++ cPollable = 0x0004, ++ cPollReq = 0x0008, ++ cPrivacy = 0x0010, ++ cShortPreamble = 0x0020, ++ cPBCC = 0x0040, ++ cChannelAgility = 0x0080, ++ cSpectrumMgnt = 0x0100, ++ cQos = 0x0200, // For HCCA, use with CF-Pollable and CF-PollReq ++ cShortSlotTime = 0x0400, ++ cAPSD = 0x0800, ++ cRM = 0x1000, // RRM (Radio Request Measurement) ++ cDSSS_OFDM = 0x2000, ++ cDelayedBA = 0x4000, ++ cImmediateBA = 0x8000, ++}CAPABILITY, *PCAPABILITY; ++ ++enum _REG_PREAMBLE_MODE{ ++ PREAMBLE_LONG = 1, ++ PREAMBLE_AUTO = 2, ++ PREAMBLE_SHORT = 3, ++}; ++ ++ ++enum _RTL8712_RF_MIMO_CONFIG_{ ++ RTL8712_RFCONFIG_1T=0x10, ++ RTL8712_RFCONFIG_2T=0x20, ++ RTL8712_RFCONFIG_1R=0x01, ++ RTL8712_RFCONFIG_2R=0x02, ++ RTL8712_RFCONFIG_1T1R=0x11, ++ RTL8712_RFCONFIG_1T2R=0x12, ++ RTL8712_RFCONFIG_TURBO=0x92, ++ RTL8712_RFCONFIG_2T2R=0x22 ++}; ++ ++ ++// Bandwidth Offset ++#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 ++#define HAL_PRIME_CHNL_OFFSET_LOWER 1 ++#define HAL_PRIME_CHNL_OFFSET_UPPER 2 ++ ++// Represent Channel Width in HT Capabilities ++// ++typedef enum _HT_CHANNEL_WIDTH { ++ HT_CHANNEL_WIDTH_20 = 0, ++ HT_CHANNEL_WIDTH_40 = 1, ++}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; ++ ++// ++// Represent Extention Channel Offset in HT Capabilities ++// This is available only in 40Mhz mode. ++// ++typedef enum _HT_EXTCHNL_OFFSET{ ++ HT_EXTCHNL_OFFSET_NO_EXT = 0, ++ HT_EXTCHNL_OFFSET_UPPER = 1, ++ HT_EXTCHNL_OFFSET_NO_DEF = 2, ++ HT_EXTCHNL_OFFSET_LOWER = 3, ++}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; ++ ++/* 2007/11/15 MH Define different RF type. */ ++typedef enum _RT_RF_TYPE_DEFINITION ++{ ++ RF_1T2R = 0, ++ RF_2T4R = 1, ++ RF_2T2R = 2, ++ RF_1T1R = 3, ++ RF_2T2R_GREEN = 4, ++ RF_819X_MAX_TYPE = 5, ++}RT_RF_TYPE_DEF_E; ++ ++typedef enum _RF_RADIO_PATH{ ++ RF_PATH_A = 0, //Radio Path A ++ RF_PATH_B = 1, //Radio Path B ++ RF_PATH_C = 2, //Radio Path C ++ RF_PATH_D = 3, //Radio Path D ++ //RF_PATH_MAX //Max RF number 90 support ++}RF_RADIO_PATH_E, *PRF_RADIO_PATH_E; ++ ++u32 rtw_ch2freq(u32 ch); ++u32 rtw_freq2ch(u32 freq); ++ ++ ++#endif //_RTL8711_RF_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_security.h +@@ -0,0 +1,447 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_SECURITY_H_ ++#define __RTW_SECURITY_H_ ++ ++ ++#include ++#include ++#include ++ ++ ++#define _NO_PRIVACY_ 0x0 ++#define _WEP40_ 0x1 ++#define _TKIP_ 0x2 ++#define _TKIP_WTMIC_ 0x3 ++#define _AES_ 0x4 ++#define _WEP104_ 0x5 ++#ifdef CONFIG_IEEE80211W ++#define _BIP_ 0x8 ++#endif //CONFIG_IEEE80211W ++#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_)) ++ ++#define _WPA_IE_ID_ 0xdd ++#define _WPA2_IE_ID_ 0x30 ++ ++#define SHA256_MAC_LEN 32 ++#define AES_BLOCK_SIZE 16 ++#define AES_PRIV_SIZE (4 * 44) ++ ++#ifndef Ndis802_11AuthModeWPA2 ++#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1) ++#endif ++ ++#ifndef Ndis802_11AuthModeWPA2PSK ++#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2) ++#endif ++ ++union pn48 { ++ ++ u64 val; ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++struct { ++ u8 TSC0; ++ u8 TSC1; ++ u8 TSC2; ++ u8 TSC3; ++ u8 TSC4; ++ u8 TSC5; ++ u8 TSC6; ++ u8 TSC7; ++} _byte_; ++ ++#elif defined(CONFIG_BIG_ENDIAN) ++ ++struct { ++ u8 TSC7; ++ u8 TSC6; ++ u8 TSC5; ++ u8 TSC4; ++ u8 TSC3; ++ u8 TSC2; ++ u8 TSC1; ++ u8 TSC0; ++} _byte_; ++ ++#endif ++ ++}; ++ ++union Keytype { ++ u8 skey[16]; ++ u32 lkey[4]; ++}; ++ ++ ++typedef struct _RT_PMKID_LIST ++{ ++ u8 bUsed; ++ u8 Bssid[6]; ++ u8 PMKID[16]; ++ u8 SsidBuf[33]; ++ u8* ssid_octet; ++ u16 ssid_length; ++} RT_PMKID_LIST, *PRT_PMKID_LIST; ++ ++ ++struct security_priv ++{ ++ u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, 8021x and authswitch ++ u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. ++ ++ /* WEP */ ++ u32 dot11PrivacyKeyIndex; // this is only valid for legendary wep, 0~3 for key id. (tx key index) ++ union Keytype dot11DefKey[4]; // this is only valid for def. key ++ u32 dot11DefKeylen[4]; ++ u8 key_mask; /* use to restore wep key after hal_init */ ++ ++ u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key ++ u32 dot118021XGrpKeyid; // key id used for Grp Key ( tx key index) ++ union Keytype dot118021XGrpKey[4]; // 802.1x Group Key, for inx0 and inx1 ++ union Keytype dot118021XGrptxmickey[4]; ++ union Keytype dot118021XGrprxmickey[4]; ++ union pn48 dot11Grptxpn; // PN48 used for Grp Key xmit. ++ union pn48 dot11Grprxpn; // PN48 used for Grp Key recv. ++#ifdef CONFIG_IEEE80211W ++ u32 dot11wBIPKeyid; // key id used for BIP Key ( tx key index) ++ union Keytype dot11wBIPKey[6]; // BIP Key, for index4 and index5 ++ union pn48 dot11wBIPtxpn; // PN48 used for Grp Key xmit. ++ union pn48 dot11wBIPrxpn; // PN48 used for Grp Key recv. ++#endif //CONFIG_IEEE80211W ++#ifdef CONFIG_AP_MODE ++ //extend security capabilities for AP_MODE ++ unsigned int dot8021xalg;//0:disable, 1:psk, 2:802.1x ++ unsigned int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 ++ unsigned int wpa_group_cipher; ++ unsigned int wpa2_group_cipher; ++ unsigned int wpa_pairwise_cipher; ++ unsigned int wpa2_pairwise_cipher; ++#endif ++ ++ u8 wps_ie[MAX_WPS_IE_LEN];//added in assoc req ++ int wps_ie_len; ++ ++ ++ u8 binstallGrpkey; ++#ifdef CONFIG_IEEE80211W ++ u8 binstallBIPkey; ++#endif //CONFIG_IEEE80211W ++ u8 busetkipkey; ++ //_timer tkip_timer; ++ u8 bcheck_grpkey; ++ u8 bgrpkey_handshake; ++ ++ //u8 packet_cnt;//unused, removed ++ ++ s32 sw_encrypt;//from registry_priv ++ s32 sw_decrypt;//from registry_priv ++ ++ s32 hw_decrypted;//if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready. ++ ++ ++ //keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc) ++ u32 ndisauthtype; // NDIS_802_11_AUTHENTICATION_MODE ++ u32 ndisencryptstatus; // NDIS_802_11_ENCRYPTION_STATUS ++ ++ WLAN_BSSID_EX sec_bss; //for joinbss (h2c buffer) usage ++ ++ NDIS_802_11_WEP ndiswep; ++#ifdef PLATFORM_WINDOWS ++ u8 KeyMaterial[16];// variable length depending on above field. ++#endif ++ ++ u8 assoc_info[600]; ++ u8 szofcapability[256]; //for wpa2 usage ++ u8 oidassociation[512]; //for wpa/wpa2 usage ++ u8 authenticator_ie[256]; //store ap security information element ++ u8 supplicant_ie[256]; //store sta security information element ++ ++ ++ //for tkip countermeasure ++ u32 last_mic_err_time; ++ u8 btkip_countermeasure; ++ u8 btkip_wait_report; ++ u32 btkip_countermeasure_time; ++ ++ //--------------------------------------------------------------------------- ++ // For WPA2 Pre-Authentication. ++ //--------------------------------------------------------------------------- ++ //u8 RegEnablePreAuth; // Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01. ++ //u8 EnablePreAuthentication; // Current Value: Pre-Authentication enabled or not. ++ RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE]; // Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13. ++ u8 PMKIDIndex; ++ //u32 PMKIDCount; // Added by Annie, 2006-10-13. ++ //u8 szCapability[256]; // For WPA2-PSK using zero-config, by Annie, 2005-09-20. ++ ++ u8 bWepDefaultKeyIdxSet; ++}; ++ ++struct sha256_state { ++ u64 length; ++ u32 state[8], curlen; ++ u8 buf[64]; ++}; ++ ++#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ ++do{\ ++ switch(psecuritypriv->dot11AuthAlgrthm)\ ++ {\ ++ case dot11AuthAlgrthm_Open:\ ++ case dot11AuthAlgrthm_Shared:\ ++ case dot11AuthAlgrthm_Auto:\ ++ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ ++ break;\ ++ case dot11AuthAlgrthm_8021X:\ ++ if(bmcst)\ ++ encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\ ++ else\ ++ encry_algo =(u8) psta->dot118021XPrivacy;\ ++ break;\ ++ }\ ++}while(0) ++ ++ ++#define SET_ICE_IV_LEN( iv_len, icv_len, encrypt)\ ++do{\ ++ switch(encrypt)\ ++ {\ ++ case _WEP40_:\ ++ case _WEP104_:\ ++ iv_len = 4;\ ++ icv_len = 4;\ ++ break;\ ++ case _TKIP_:\ ++ iv_len = 8;\ ++ icv_len = 4;\ ++ break;\ ++ case _AES_:\ ++ iv_len = 8;\ ++ icv_len = 8;\ ++ break;\ ++ default:\ ++ iv_len = 0;\ ++ icv_len = 0;\ ++ break;\ ++ }\ ++}while(0) ++ ++ ++#define GET_TKIP_PN(iv,dot11txpn)\ ++do{\ ++ dot11txpn._byte_.TSC0=iv[2];\ ++ dot11txpn._byte_.TSC1=iv[0];\ ++ dot11txpn._byte_.TSC2=iv[4];\ ++ dot11txpn._byte_.TSC3=iv[5];\ ++ dot11txpn._byte_.TSC4=iv[6];\ ++ dot11txpn._byte_.TSC5=iv[7];\ ++}while(0) ++ ++ ++#define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) ) ++#define ROR32( A, n ) ROL32( (A), 32-(n) ) ++ ++struct mic_data ++{ ++ u32 K0, K1; // Key ++ u32 L, R; // Current state ++ u32 M; // Message accumulator (single word) ++ u32 nBytesInM; // # bytes in M ++}; ++ ++extern const u32 Te0[256]; ++extern const u32 Te1[256]; ++extern const u32 Te2[256]; ++extern const u32 Te3[256]; ++extern const u32 Te4[256]; ++extern const u32 Td0[256]; ++extern const u32 Td1[256]; ++extern const u32 Td2[256]; ++extern const u32 Td3[256]; ++extern const u32 Td4[256]; ++extern const u32 rcon[10]; ++extern const u8 Td4s[256]; ++extern const u8 rcons[10]; ++ ++#define RCON(i) (rcons[(i)] << 24) ++ ++static inline u32 rotr(u32 val, int bits) ++{ ++ return (val >> bits) | (val << (32 - bits)); ++} ++ ++#define TE0(i) Te0[((i) >> 24) & 0xff] ++#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8) ++#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16) ++#define TE3(i) rotr(Te0[(i) & 0xff], 24) ++#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000) ++#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000) ++#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00) ++#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff) ++#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000) ++#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000) ++#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00) ++#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff) ++#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff) ++ ++#define TD0(i) Td0[((i) >> 24) & 0xff] ++#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8) ++#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16) ++#define TD3(i) rotr(Td0[(i) & 0xff], 24) ++#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24) ++#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16) ++#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8) ++#define TD44(i) (Td4s[(i) & 0xff]) ++#define TD0_(i) Td0[(i) & 0xff] ++#define TD1_(i) rotr(Td0[(i) & 0xff], 8) ++#define TD2_(i) rotr(Td0[(i) & 0xff], 16) ++#define TD3_(i) rotr(Td0[(i) & 0xff], 24) ++ ++#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \ ++ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3])) ++ ++#define PUTU32(ct, st) { \ ++(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \ ++(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); } ++ ++#define WPA_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ ++ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_BE64(a, val) \ ++ do { \ ++ (a)[0] = (u8) (((u64) (val)) >> 56); \ ++ (a)[1] = (u8) (((u64) (val)) >> 48); \ ++ (a)[2] = (u8) (((u64) (val)) >> 40); \ ++ (a)[3] = (u8) (((u64) (val)) >> 32); \ ++ (a)[4] = (u8) (((u64) (val)) >> 24); \ ++ (a)[5] = (u8) (((u64) (val)) >> 16); \ ++ (a)[6] = (u8) (((u64) (val)) >> 8); \ ++ (a)[7] = (u8) (((u64) (val)) & 0xff); \ ++ } while (0) ++ ++/* ===== start - public domain SHA256 implementation ===== */ ++ ++/* This is based on SHA256 implementation in LibTomCrypt that was released into ++ * public domain by Tom St Denis. */ ++ ++/* the K array */ ++static const unsigned long K[64] = { ++ 0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL, ++ 0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL, ++ 0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL, ++ 0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL, ++ 0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL, ++ 0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL, ++ 0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL, ++ 0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL, ++ 0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL, ++ 0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL, ++ 0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL, ++ 0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL, ++ 0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL ++}; ++ ++ ++/* Various logical functions */ ++#define RORc(x, y) \ ++( ((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \ ++ ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL) ++#define Ch(x,y,z) (z ^ (x & (y ^ z))) ++#define Maj(x,y,z) (((x | y) & z) | (x & y)) ++#define S(x, n) RORc((x), (n)) ++#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) ++#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) ++#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) ++#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) ++#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) ++#ifndef MIN ++#define MIN(x, y) (((x) < (y)) ? (x) : (y)) ++#endif ++#ifdef CONFIG_IEEE80211W ++int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac); ++#endif //CONFIG_IEEE80211W ++void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ); ++void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ); ++void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nBytes ); ++void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ); ++ ++void rtw_seccalctkipmic( ++ u8 * key, ++ u8 *header, ++ u8 *data, ++ u32 data_len, ++ u8 *Miccode, ++ u8 priority); ++ ++u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe); ++u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe); ++void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe); ++ ++u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe); ++u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe); ++void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe); ++#ifdef CONFIG_IEEE80211W ++u32 rtw_BIP_verify(_adapter *padapter, u8 *precvframe); ++#endif //CONFIG_IEEE80211W ++#ifdef CONFIG_TDLS ++void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta); ++int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, ++ u8 *mic); ++int tdls_verify_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie); ++#endif //CONFIG_TDLS ++ ++#ifdef PLATFORM_WINDOWS ++void rtw_use_tkipkey_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++#endif ++#ifdef PLATFORM_LINUX ++void rtw_use_tkipkey_handler(void* FunctionContext); ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++void rtw_use_tkipkey_handler(void* FunctionContext); ++#endif //PLATFORM_FREEBSD ++ ++void rtw_sec_restore_wep_key(_adapter *adapter); ++u8 rtw_handle_tkip_countermeasure(_adapter* adapter, const char *caller); ++ ++#endif //__RTL871X_SECURITY_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_sreset.h +@@ -0,0 +1,74 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_SRESET_C_ ++#define _RTW_SRESET_C_ ++ ++#include ++#include ++#include ++ ++enum { ++ SRESET_TGP_NULL = 0, ++ SRESET_TGP_XMIT_STATUS = 1, ++ SRESET_TGP_LINK_STATUS = 2, ++}; ++ ++struct sreset_priv { ++ _mutex silentreset_mutex; ++ u8 silent_reset_inprogress; ++ u8 Wifi_Error_Status; ++ unsigned long last_tx_time; ++ unsigned long last_tx_complete_time; ++ ++ s32 dbg_trigger_point; ++}; ++ ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++#ifdef CONFIG_RTL8723A ++#include ++#endif ++#ifdef CONFIG_RTL8188E ++#include ++#endif ++ ++#define WIFI_STATUS_SUCCESS 0 ++#define USB_VEN_REQ_CMD_FAIL BIT0 ++#define USB_READ_PORT_FAIL BIT1 ++#define USB_WRITE_PORT_FAIL BIT2 ++#define WIFI_MAC_TXDMA_ERROR BIT3 ++#define WIFI_TX_HANG BIT4 ++#define WIFI_RX_HANG BIT5 ++#define WIFI_IF_NOT_EXIST BIT6 ++ ++void sreset_init_value(_adapter *padapter); ++void sreset_reset_value(_adapter *padapter); ++u8 sreset_get_wifi_status(_adapter *padapter); ++void sreset_set_wifi_error_status(_adapter *padapter, u32 status); ++void sreset_set_trigger_point(_adapter *padapter, s32 tgp); ++bool sreset_inprogress(_adapter *padapter); ++void sreset_reset(_adapter *padapter); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_tdls.h +@@ -0,0 +1,143 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_TDLS_H_ ++#define __RTW_TDLS_H_ ++ ++#include ++ ++#ifdef CONFIG_TDLS ++/* TDLS STA state */ ++#define TDLS_STATE_NONE 0x00000000 //default state ++#define TDLS_INITIATOR_STATE 0x10000000 ++#define TDLS_RESPONDER_STATE 0x20000000 ++#define TDLS_LINKED_STATE 0x40000000 ++#define TDLS_CH_SWITCH_ON_STATE 0x01000000 ++#define TDLS_PEER_AT_OFF_STATE 0x02000000 //could send pkt on target ch ++#define TDLS_AT_OFF_CH_STATE 0x04000000 ++#define TDLS_CH_SW_INITIATOR_STATE 0x08000000 //avoiding duplicated or unconditional ch. switch rsp. ++#define TDLS_APSD_CHSW_STATE 0x00100000 //in APSD and want to setup channel switch ++#define TDLS_PEER_SLEEP_STATE 0x00200000 //peer sta is sleeping ++#define TDLS_SW_OFF_STATE 0x00400000 //terminate channel swithcing ++#define TDLS_ALIVE_STATE 0x00010000 //Check if peer sta is alived. ++ ++#define TPK_RESEND_COUNT 301 ++#define CH_SWITCH_TIME 10 ++#define CH_SWITCH_TIMEOUT 30 ++#define TDLS_STAY_TIME 500 ++#define TDLS_SIGNAL_THRESH 0x20 ++#define TDLS_WATCHDOG_PERIOD 10 //Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec ++#define TDLS_ALIVE_TIMER_PH1 5000 ++#define TDLS_ALIVE_TIMER_PH2 2000 ++#define TDLS_STAY_TIME 500 ++#define TDLS_HANDSHAKE_TIME 2000 ++#define TDLS_ALIVE_COUNT 3 ++#define TDLS_INI_MACID_ENTRY 6 ++ ++/* TDLS */ ++#define TDLS_MIC_LEN 16 ++#define WPA_NONCE_LEN 32 ++#define TDLS_TIMEOUT_LEN 4 ++ ++struct wpa_tdls_ftie { ++ u8 ie_type; /* FTIE */ ++ u8 ie_len; ++ u8 mic_ctrl[2]; ++ u8 mic[TDLS_MIC_LEN]; ++ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ ++ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ ++ /* followed by optional elements */ ++} ; ++ ++struct wpa_tdls_lnkid { ++ u8 ie_type; /* Link Identifier IE */ ++ u8 ie_len; ++ u8 bssid[ETH_ALEN]; ++ u8 init_sta[ETH_ALEN]; ++ u8 resp_sta[ETH_ALEN]; ++} ; ++ ++static u8 TDLS_RSNIE[]={ 0x01, 0x00, //version shall be set to 1 ++ 0x00, 0x0f, 0xac, 0x07, //group sipher suite ++ 0x01, 0x00, //pairwise cipher suite count ++ 0x00, 0x0f, 0xac, 0x04, //pairwise cipher suite list; CCMP only ++ 0x01, 0x00, //AKM suite count ++ 0x00, 0x0f, 0xac, 0x07, //TPK Handshake ++ 0x00, 0x02, ++ //PMKID shall not be present ++ }; ++ ++static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; //Qos info all set zero ++ ++static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20}; //bit(28), bit(30), bit(37) ++ ++// SRC: Supported Regulatory Classes ++static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 }; ++ ++void rtw_reset_tdls_info(_adapter* padapter); ++int rtw_init_tdls_info(_adapter* padapter); ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo); ++void issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, struct sta_info *ptdls_sta, unsigned int power_mode); ++void init_TPK_timer(_adapter *padapter, struct sta_info *psta); ++void init_ch_switch_timer(_adapter *padapter, struct sta_info *psta); ++void init_base_ch_timer(_adapter *padapter, struct sta_info *psta); ++void init_off_ch_timer(_adapter *padapter, struct sta_info *psta); ++void init_tdls_alive_timer(_adapter *padapter, struct sta_info *psta); ++void init_handshake_timer(_adapter *padapter, struct sta_info *psta); ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta); ++#ifdef CONFIG_WFD ++void issue_tunneled_probe_req(_adapter *padapter); ++void issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame); ++#endif //CONFIG_WFD ++void issue_tdls_dis_req(_adapter *padapter, u8 *mac_addr); ++void issue_tdls_setup_req(_adapter *padapter, u8 *mac_addr); ++void issue_tdls_setup_rsp(_adapter *padapter, union recv_frame *precv_frame); ++void issue_tdls_setup_cfm(_adapter *padapter, union recv_frame *precv_frame); ++void issue_tdls_dis_rsp(_adapter * padapter, union recv_frame * precv_frame, u8 dialog); ++void issue_tdls_teardown(_adapter *padapter, u8 *mac_addr); ++void issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta); ++void issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr); ++void issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr); ++sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame); ++sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame); ++void rtw_build_tdls_setup_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_setup_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_setup_cfm_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_teardown_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_dis_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_dis_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog); ++void rtw_build_tdls_peer_traffic_indication_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_ch_switch_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tdls_ch_switch_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tunneled_probe_req_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++void rtw_build_tunneled_probe_rsp_ies(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe); ++ ++int update_sgi_tdls(_adapter *padapter, struct sta_info *psta); ++u32 update_mask_tdls(_adapter *padapter, struct sta_info *psta); ++#endif //CONFIG_TDLS ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_version.h +@@ -0,0 +1 @@ ++#define DRIVERVERSION "v4.0.2_9000.20130911" +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/rtw_xmit.h +@@ -0,0 +1,754 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_XMIT_H_ ++#define _RTW_XMIT_H_ ++ ++#include ++#include ++#include ++#ifdef PLATFORM_FREEBSD ++#include ++#endif //PLATFORM_FREEBSD ++ ++#ifdef CONFIG_SDIO_HCI ++//#define MAX_XMITBUF_SZ (30720)// (2048) ++#define MAX_XMITBUF_SZ (12288) ++#define NR_XMITBUFF (16) ++ ++#elif defined (CONFIG_USB_HCI) ++#ifdef CONFIG_USB_TX_AGGREGATION ++ #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) ++ #define MAX_XMITBUF_SZ (12288) //12k 1536*8 ++ #elif defined (CONFIG_PLATFORM_MSTAR) ++ #define MAX_XMITBUF_SZ 7680 // 7.5k ++ #else ++ #define MAX_XMITBUF_SZ (20480) // 20k ++ #endif ++#else ++#define MAX_XMITBUF_SZ (2048) ++#endif //CONFIG_USB_TX_AGGREGATION ++#ifdef CONFIG_SINGLE_XMIT_BUF ++#define NR_XMITBUFF (1) ++#else ++#define NR_XMITBUFF (4) ++#endif //CONFIG_SINGLE_XMIT_BUF ++ ++#elif defined (CONFIG_PCI_HCI) ++#define MAX_XMITBUF_SZ (1664) ++#define NR_XMITBUFF (128) ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#define XMITBUF_ALIGN_SZ 4 ++#else ++#ifdef CONFIG_PCI_HCI ++#define XMITBUF_ALIGN_SZ 4 ++#else ++#define XMITBUF_ALIGN_SZ 512 ++#endif ++#endif ++ ++// xmit extension buff defination ++#define MAX_XMIT_EXTBUF_SZ (1536) ++#ifdef CONFIG_SINGLE_XMIT_BUF ++#define NR_XMIT_EXTBUFF (1) ++#else ++#define NR_XMIT_EXTBUFF (32) ++#endif //CONFIG_SINGLE_XMIT_BUF ++ ++#define MAX_NUMBLKS (1) ++ ++#define XMIT_VO_QUEUE (0) ++#define XMIT_VI_QUEUE (1) ++#define XMIT_BE_QUEUE (2) ++#define XMIT_BK_QUEUE (3) ++ ++#define VO_QUEUE_INX 0 ++#define VI_QUEUE_INX 1 ++#define BE_QUEUE_INX 2 ++#define BK_QUEUE_INX 3 ++#define BCN_QUEUE_INX 4 ++#define MGT_QUEUE_INX 5 ++#define HIGH_QUEUE_INX 6 ++#define TXCMD_QUEUE_INX 7 ++ ++#define HW_QUEUE_ENTRY 8 ++ ++#ifdef CONFIG_PCI_HCI ++//#define TXDESC_NUM 64 ++#define TXDESC_NUM 128 ++#define TXDESC_NUM_BE_QUEUE 128 ++#endif ++ ++#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[2] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[3] = ((keyidx & 0x3)<<6);\ ++ dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++ ++#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ ++ pattrib_iv[2] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ ++ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ ++ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ ++ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ ++ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++#define AES_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[2] = 0;\ ++ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ ++ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ ++ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ ++ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ ++ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++ ++#define HWXMIT_ENTRY 4 ++ ++#define TXDESC_SIZE 32 ++ ++#ifdef CONFIG_SDIO_HCI ++#define TXDESC_OFFSET TXDESC_SIZE ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#define PACKET_OFFSET_SZ (8) ++#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#define TXDESC_OFFSET 0 ++#define TX_DESC_NEXT_DESC_OFFSET 40 ++#endif ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define BK BIT(6) ++#define QSEL_SHT 8 ++#define Rate_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define PKT_OFFSET_SHT 26 ++#define HWPC BIT(31) ++ ++//OFFSET 8 ++#define AGG_EN BIT(29) ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++ ++//OFFSET 16 ++#define QoS BIT(6) ++#define HW_SEQ_EN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define DATA_SHORT BIT(24) ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define SGI BIT(6) ++ ++struct tx_desc{ ++ ++ //DWORD 0 ++ unsigned int txdw0; ++ ++ unsigned int txdw1; ++ ++ unsigned int txdw2; ++ ++ unsigned int txdw3; ++ ++ unsigned int txdw4; ++ ++ unsigned int txdw5; ++ ++ unsigned int txdw6; ++ ++ unsigned int txdw7; ++#ifdef CONFIG_PCI_HCI ++ unsigned int txdw8; ++ ++ unsigned int txdw9; ++ ++ unsigned int txdw10; ++ ++ unsigned int txdw11; ++ ++ // 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor ++ // size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute ++ // memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor ++ // number or enlarge descriptor size as 64 bytes. ++ unsigned int txdw12; ++ ++ unsigned int txdw13; ++ ++ unsigned int txdw14; ++ ++ unsigned int txdw15; ++#endif ++}; ++ ++ ++union txdesc { ++ struct tx_desc txdesc; ++ unsigned int value[TXDESC_SIZE>>2]; ++}; ++ ++#ifdef CONFIG_PCI_HCI ++#define PCI_MAX_TX_QUEUE_COUNT 8 ++ ++struct rtw_tx_ring { ++ struct tx_desc *desc; ++ dma_addr_t dma; ++ unsigned int idx; ++ unsigned int entries; ++ _queue queue; ++ u32 qlen; ++}; ++#endif ++ ++struct hw_xmit { ++ //_lock xmit_lock; ++ //_list pending; ++ _queue *sta_queue; ++ //struct hw_txqueue *phwtxqueue; ++ //sint txcmdcnt; ++ int accnt; ++}; ++ ++#if 0 ++struct pkt_attrib ++{ ++ u8 type; ++ u8 subtype; ++ u8 bswenc; ++ u8 dhcp_pkt; ++ u16 ether_type; ++ int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) ++ int pkt_hdrlen; //the original 802.3 pkt header len ++ int hdrlen; //the WLAN Header Len ++ int nr_frags; ++ int last_txcmdsz; ++ int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith ++ u8 iv[8]; ++ int iv_len; ++ u8 icv[8]; ++ int icv_len; ++ int priority; ++ int ack_policy; ++ int mac_id; ++ int vcs_mode; //virtual carrier sense method ++ ++ u8 dst[ETH_ALEN]; ++ u8 src[ETH_ALEN]; ++ u8 ta[ETH_ALEN]; ++ u8 ra[ETH_ALEN]; ++ ++ u8 key_idx; ++ ++ u8 qos_en; ++ u8 ht_en; ++ u8 raid;//rate adpative id ++ u8 bwmode; ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ u8 ampdu_en;//tx ampdu enable ++ u8 mdata;//more data bit ++ u8 eosp; ++ ++ u8 pctrl;//per packet txdesc control enable ++ u8 triggered;//for ap mode handling Power Saving sta ++ ++ u32 qsel; ++ u16 seqnum; ++ ++ struct sta_info * psta; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ u8 hw_tcp_csum; ++#endif ++}; ++#else ++//reduce size ++struct pkt_attrib ++{ ++ u8 type; ++ u8 subtype; ++ u8 bswenc; ++ u8 dhcp_pkt; ++ u16 ether_type; ++ u16 seqnum; ++ u16 pkt_hdrlen; //the original 802.3 pkt header len ++ u16 hdrlen; //the WLAN Header Len ++ u32 pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) ++ u32 last_txcmdsz; ++ u8 nr_frags; ++ u8 encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith ++ u8 iv_len; ++ u8 icv_len; ++ u8 iv[8]; ++ u8 icv[8]; ++ u8 priority; ++ u8 ack_policy; ++ u8 mac_id; ++ u8 vcs_mode; //virtual carrier sense method ++ u8 dst[ETH_ALEN]; ++ u8 src[ETH_ALEN]; ++ u8 ta[ETH_ALEN]; ++ u8 ra[ETH_ALEN]; ++ u8 key_idx; ++ u8 qos_en; ++ u8 ht_en; ++ u8 raid;//rate adpative id ++ u8 bwmode; ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ u8 ampdu_en;//tx ampdu enable ++ u8 mdata;//more data bit ++ u8 pctrl;//per packet txdesc control enable ++ u8 triggered;//for ap mode handling Power Saving sta ++ u8 qsel; ++ u8 eosp; ++ u8 rate; ++ u8 intel_proxim; ++ u8 retry_ctrl; ++ struct sta_info * psta; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ u8 hw_tcp_csum; ++#endif ++ union Keytype dot11tkiptxmickey; ++ //union Keytype dot11tkiprxmickey; ++ union Keytype dot118021x_UncstKey; ++}; ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++#define ETH_ALEN 6 /* Octets in one ethernet addr */ ++#define ETH_HLEN 14 /* Total octets in header. */ ++#define ETH_P_IP 0x0800 /* Internet Protocol packet */ ++ ++/*struct rtw_ieee80211_hdr { ++ uint16_t frame_control; ++ uint16_t duration_id; ++ u8 addr1[6]; ++ u8 addr2[6]; ++ u8 addr3[6]; ++ uint16_t seq_ctrl; ++ u8 addr4[6]; ++} ;*/ ++#endif //PLATFORM_FREEBSD ++ ++#define WLANHDR_OFFSET 64 ++ ++#define NULL_FRAMETAG (0x0) ++#define DATA_FRAMETAG 0x01 ++#define L2_FRAMETAG 0x02 ++#define MGNT_FRAMETAG 0x03 ++#define AMSDU_FRAMETAG 0x04 ++ ++#define EII_FRAMETAG 0x05 ++#define IEEE8023_FRAMETAG 0x06 ++ ++#define MP_FRAMETAG 0x07 ++ ++#define TXAGG_FRAMETAG 0x08 ++ ++struct submit_ctx{ ++ u32 submit_time; /* */ ++ u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ ++ int status; /* status for operation */ ++#ifdef PLATFORM_LINUX ++ struct completion done; ++#endif ++}; ++ ++enum { ++ RTW_SCTX_SUBMITTED = -1, ++ RTW_SCTX_DONE_SUCCESS = 0, ++ RTW_SCTX_DONE_UNKNOWN, ++ RTW_SCTX_DONE_TIMEOUT, ++ RTW_SCTX_DONE_BUF_ALLOC, ++ RTW_SCTX_DONE_BUF_FREE, ++ RTW_SCTX_DONE_WRITE_PORT_ERR, ++ RTW_SCTX_DONE_TX_DESC_NA, ++ RTW_SCTX_DONE_TX_DENY, ++ RTW_SCTX_DONE_CCX_PKT_FAIL, ++ RTW_SCTX_DONE_DRV_STOP, ++ RTW_SCTX_DONE_DEV_REMOVE, ++}; ++ ++ ++void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); ++int rtw_sctx_wait(struct submit_ctx *sctx); ++void rtw_sctx_done_err(struct submit_ctx **sctx, int status); ++void rtw_sctx_done(struct submit_ctx **sctx); ++ ++struct xmit_buf ++{ ++ _list list; ++ ++ _adapter *padapter; ++ ++ u8 *pallocated_buf; ++ ++ u8 *pbuf; ++ ++ void *priv_data; ++ ++ u16 ext_tag; // 0: Normal xmitbuf, 1: extension xmitbuf. ++ u16 flags; ++ u32 alloc_sz; ++ ++ struct submit_ctx *sctx; ++ ++#ifdef CONFIG_USB_HCI ++ ++ u32 sz[8]; ++ ++#if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) ++ PURB pxmit_urb[8]; ++ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PIRP pxmit_irp[8]; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_write_port; ++#endif ++ ++ u8 bpending[8]; ++ ++ sint last[8]; ++ ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++ u32 len; ++ u8 *phead; ++ u8 *pdata; ++ u8 *ptail; ++ u8 *pend; ++ u32 ff_hwaddr; ++#ifdef PLATFORM_OS_XP ++ PMDL pxmitbuf_mdl; ++ PIRP pxmitbuf_irp; ++ PSDBUS_REQUEST_PACKET pxmitbuf_sdrp; ++#endif ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ u32 len; ++#endif ++ ++#ifdef DBG_XMIT_BUF ++ u8 no; ++#endif ++ ++}; ++ ++struct xmit_frame ++{ ++ _list list; ++ ++ struct pkt_attrib attrib; ++ ++ _pkt *pkt; ++ ++ int frame_tag; ++ ++ _adapter *padapter; ++ ++ u8 *buf_addr; ++ ++ struct xmit_buf *pxmitbuf; ++ ++#ifdef CONFIG_SDIO_HCI ++ u8 pg_num; ++ u8 agg_num; ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 agg_num; ++#endif ++ u8 pkt_offset; ++#ifdef CONFIG_RTL8192D ++ u8 EMPktNum; ++ u16 EMPktLen[5];//The max value by HW ++#endif ++#endif ++#ifdef CONFIG_XMIT_ACK ++ u8 ack_report; ++#endif ++ ++ u8 *alloc_addr; /* the actual address this xmitframe allocated */ ++ u8 ext_tag; /* 0:data, 1:mgmt */ ++ ++}; ++ ++struct tx_servq { ++ _list tx_pending; ++ _queue sta_pending; ++ int qcnt; ++}; ++ ++ ++ ++struct sta_xmit_priv ++{ ++ _lock lock; ++ sint option; ++ sint apsd_setting; //When bit mask is on, the associated edca queue supports APSD. ++ ++ ++ //struct tx_servq blk_q[MAX_NUMBLKS]; ++ struct tx_servq be_q; //priority == 0,3 ++ struct tx_servq bk_q; //priority == 1,2 ++ struct tx_servq vi_q; //priority == 4,5 ++ struct tx_servq vo_q; //priority == 6,7 ++ _list legacy_dz; ++ _list apsd; ++ ++ u16 txseq_tid[16]; ++ ++ //uint sta_tx_bytes; ++ //u64 sta_tx_pkts; ++ //uint sta_tx_fail; ++ ++}; ++ ++ ++struct hw_txqueue { ++ volatile sint head; ++ volatile sint tail; ++ volatile sint free_sz; //in units of 64 bytes ++ volatile sint free_cmdsz; ++ volatile sint txsz[8]; ++ uint ff_hwaddr; ++ uint cmd_hwaddr; ++ sint ac_tag; ++}; ++ ++ ++struct xmit_priv { ++ ++ _lock lock; ++ ++ _sema xmit_sema; ++ _sema terminate_xmitthread_sema; ++ ++ //_queue blk_strms[MAX_NUMBLKS]; ++ _queue be_pending; ++ _queue bk_pending; ++ _queue vi_pending; ++ _queue vo_pending; ++ _queue bm_pending; ++ ++ //_queue legacy_dz_queue; ++ //_queue apsd_queue; ++ ++ u8 *pallocated_frame_buf; ++ u8 *pxmit_frame_buf; ++ uint free_xmitframe_cnt; ++ _queue free_xmit_queue; ++ ++ //uint mapping_addr; ++ //uint pkt_sz; ++ ++ u8 *xframe_ext_alloc_addr; ++ u8 *xframe_ext; ++ uint free_xframe_ext_cnt; ++ _queue free_xframe_ext_queue; ++ ++ //struct hw_txqueue be_txqueue; ++ //struct hw_txqueue bk_txqueue; ++ //struct hw_txqueue vi_txqueue; ++ //struct hw_txqueue vo_txqueue; ++ //struct hw_txqueue bmc_txqueue; ++ ++ uint frag_len; ++ ++ _adapter *adapter; ++ ++ u8 vcs_setting; ++ u8 vcs; ++ u8 vcs_type; ++ //u16 rts_thresh; ++ ++ u64 tx_bytes; ++ u64 tx_pkts; ++ u64 tx_drop; ++ u64 last_tx_bytes; ++ u64 last_tx_pkts; ++ ++ struct hw_xmit *hwxmits; ++ u8 hwxmit_entry; ++ ++#ifdef CONFIG_USB_HCI ++ _sema tx_retevt;//all tx return event; ++ u8 txirp_cnt;// ++ ++#ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_write_port; ++// USB_TRANSFER usb_transfer_write_mem; ++#endif ++#ifdef PLATFORM_LINUX ++ struct tasklet_struct xmit_tasklet; ++#endif ++#ifdef PLATFORM_FREEBSD ++ struct task xmit_tasklet; ++#endif ++ //per AC pending irp ++ int beq_cnt; ++ int bkq_cnt; ++ int viq_cnt; ++ int voq_cnt; ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ // Tx ++ struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; ++ int txringcount[PCI_MAX_TX_QUEUE_COUNT]; ++#ifdef PLATFORM_LINUX ++ struct tasklet_struct xmit_tasklet; ++#endif ++#endif ++ ++ _queue free_xmitbuf_queue; ++ _queue pending_xmitbuf_queue; ++ u8 *pallocated_xmitbuf; ++ u8 *pxmitbuf; ++ uint free_xmitbuf_cnt; ++ ++ _queue free_xmit_extbuf_queue; ++ u8 *pallocated_xmit_extbuf; ++ u8 *pxmit_extbuf; ++ uint free_xmit_extbuf_cnt; ++ ++ u16 nqos_ssn; ++ ++#ifdef CONFIG_XMIT_ACK ++ int ack_tx; ++ _mutex ack_tx_mutex; ++ struct submit_ctx ack_tx_ops; ++#endif ++ _lock lock_sctx; ++}; ++ ++extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); ++extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); ++extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); ++extern s32 rtw_put_snap(u8 *data, u16 h_proto); ++ ++extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv); ++struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); ++struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); ++extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); ++struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); ++extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++extern struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); ++ ++extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); ++extern thread_return rtw_xmit_thread(thread_context context); ++extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); ++#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) ++extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); ++#ifdef CONFIG_IEEE80211W ++extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); ++#endif //CONFIG_IEEE80211W ++#ifdef CONFIG_TDLS ++s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, u8 action); ++#endif //CONFIG_TDLS ++s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag); ++void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); ++ ++ ++s32 rtw_txframes_pending(_adapter *padapter); ++s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); ++void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); ++ ++ ++s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); ++void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); ++ ++ ++void rtw_alloc_hwxmits(_adapter *padapter); ++void rtw_free_hwxmits(_adapter *padapter); ++ ++ ++s32 rtw_xmit(_adapter *padapter, _pkt **pkt); ++ ++#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) ++sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); ++void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); ++void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); ++void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); ++#endif ++ ++u8 qos_acm(u8 acm_mask, u8 priority); ++ ++#ifdef CONFIG_XMIT_ACK ++int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); ++void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); ++#endif //CONFIG_XMIT_ACK ++ ++ ++//include after declaring struct xmit_buf, in order to avoid warning ++#include ++ ++#endif //_RTL871X_XMIT_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/sta_info.h +@@ -0,0 +1,432 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __STA_INFO_H_ ++#define __STA_INFO_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define IBSS_START_MAC_ID 2 ++#define NUM_STA 32 ++#define NUM_ACL 16 ++ ++ ++//if mode ==0, then the sta is allowed once the addr is hit. ++//if mode ==1, then the sta is rejected once the addr is non-hit. ++struct rtw_wlan_acl_node { ++ _list list; ++ u8 addr[ETH_ALEN]; ++ u8 valid; ++}; ++ ++//mode=0, disable ++//mode=1, accept unless in deny list ++//mode=2, deny unless in accept list ++struct wlan_acl_pool { ++ int mode; ++ int num; ++ struct rtw_wlan_acl_node aclnode[NUM_ACL]; ++ _queue acl_node_q; ++}; ++ ++typedef struct _RSSI_STA{ ++ s32 UndecoratedSmoothedPWDB; ++ s32 UndecoratedSmoothedCCK; ++ s32 UndecoratedSmoothedOFDM; ++ u64 PacketMap; ++ u8 ValidBit; ++}RSSI_STA, *PRSSI_STA; ++ ++struct stainfo_stats { ++ ++ u64 rx_mgnt_pkts; ++ u64 rx_beacon_pkts; ++ u64 rx_probereq_pkts; ++ u64 rx_probersp_pkts; ++ u64 rx_probersp_bm_pkts; ++ u64 rx_probersp_uo_pkts; ++ u64 rx_ctrl_pkts; ++ u64 rx_data_pkts; ++ ++ u64 last_rx_mgnt_pkts; ++ u64 last_rx_beacon_pkts; ++ u64 last_rx_probereq_pkts; ++ u64 last_rx_probersp_pkts; ++ u64 last_rx_probersp_bm_pkts; ++ u64 last_rx_probersp_uo_pkts; ++ u64 last_rx_ctrl_pkts; ++ u64 last_rx_data_pkts; ++ ++ u64 rx_bytes; ++ u64 rx_drops; ++ ++ u64 tx_pkts; ++ u64 tx_bytes; ++ u64 tx_drops; ++ ++}; ++ ++#ifdef CONFIG_TDLS ++struct TDLS_PeerKey { ++ u8 kck[16]; /* TPK-KCK */ ++ u8 tk[16]; /* TPK-TK; only CCMP will be used */ ++} ; ++#endif //CONFIG_TDLS ++ ++struct sta_info { ++ ++ _lock lock; ++ _list list; //free_sta_queue ++ _list hash_list; //sta_hash ++ //_list asoc_list; //20061114 ++ //_list sleep_list;//sleep_q ++ //_list wakeup_list;//wakeup_q ++ ++ struct sta_xmit_priv sta_xmitpriv; ++ struct sta_recv_priv sta_recvpriv; ++ ++ _queue sleep_q; ++ unsigned int sleepq_len; ++ ++ uint state; ++ uint aid; ++ uint mac_id; ++ uint qos_option; ++ u8 hwaddr[ETH_ALEN]; ++ ++ uint ieee8021x_blocked; //0: allowed, 1:blocked ++ uint dot118021XPrivacy; //aes, tkip... ++ union Keytype dot11tkiptxmickey; ++ union Keytype dot11tkiprxmickey; ++ union Keytype dot118021x_UncstKey; ++ union pn48 dot11txpn; // PN48 used for Unicast xmit. ++#ifdef CONFIG_IEEE80211W ++ union pn48 dot11wtxpn; // PN48 used for Unicast mgmt xmit. ++#endif //CONFIG_IEEE80211W ++ union pn48 dot11rxpn; // PN48 used for Unicast recv. ++ ++ ++ u8 bssrateset[16]; ++ u32 bssratelen; ++ s32 rssi; ++ s32 signal_quality; ++ ++ u8 cts2self; ++ u8 rtsen; ++ ++ u8 raid; ++ u8 init_rate; ++ u32 ra_mask; ++ struct stainfo_stats sta_stats; ++ ++#ifdef CONFIG_TDLS ++ u32 tdls_sta_state; ++ u8 dialog; ++ u8 SNonce[32]; ++ u8 ANonce[32]; ++ u32 TDLS_PeerKey_Lifetime; ++ u16 TPK_count; ++ _timer TPK_timer; ++ struct TDLS_PeerKey tpk; ++ _adapter *padapter; ++ u16 stat_code; ++ u8 off_ch; ++ u16 ch_switch_time; ++ u16 ch_switch_timeout; ++ u8 option; ++ _timer option_timer; ++ _timer base_ch_timer; ++ _timer off_ch_timer; ++ ++ _timer handshake_timer; ++ _timer alive_timer1; ++ _timer alive_timer2; ++ u8 timer_flag; ++ u8 alive_count; ++#endif //CONFIG_TDLS ++ ++ //for A-MPDU TX, ADDBA timeout check ++ _timer addba_retry_timer; ++ ++ //for A-MPDU Rx reordering buffer control ++ struct recv_reorder_ctrl recvreorder_ctrl[16]; ++ ++ //for A-MPDU Tx ++ //unsigned char ampdu_txen_bitmap; ++ u16 BA_starting_seqctrl[16]; ++ ++ ++#ifdef CONFIG_80211N_HT ++ struct ht_priv htpriv; ++#endif ++ ++ //Notes: ++ //STA_Mode: ++ //curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO ++ //scan_q: AP CAP/INFO ++ ++ //AP_Mode: ++ //curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO ++ //sta_info: (AP & STA) CAP/INFO ++ ++#ifdef CONFIG_AP_MODE ++ ++ _list asoc_list; ++ _list auth_list; ++ ++ unsigned int expire_to; ++ unsigned int auth_seq; ++ unsigned int authalg; ++ unsigned char chg_txt[128]; ++ ++ u16 capability; ++ int flags; ++ ++ int dot8021xalg;//0:disable, 1:psk, 2:802.1x ++ int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 ++ int wpa_group_cipher; ++ int wpa2_group_cipher; ++ int wpa_pairwise_cipher; ++ int wpa2_pairwise_cipher; ++ ++ u8 bpairwise_key_installed; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ u8 wpa_ie[32]; ++ ++ u8 nonerp_set; ++ u8 no_short_slot_time_set; ++ u8 no_short_preamble_set; ++ u8 no_ht_gf_set; ++ u8 no_ht_set; ++ u8 ht_20mhz_set; ++#endif // CONFIG_NATIVEAP_MLME ++ ++ unsigned int tx_ra_bitmap; ++ u8 qos_info; ++ ++ u8 max_sp_len; ++ u8 uapsd_bk;//BIT(0): Delivery enabled, BIT(1): Trigger enabled ++ u8 uapsd_be; ++ u8 uapsd_vi; ++ u8 uapsd_vo; ++ ++ u8 has_legacy_ac; ++ unsigned int sleepq_ac_len; ++ ++#ifdef CONFIG_P2P ++ //p2p priv data ++ u8 is_p2p_device; ++ u8 p2p_status_code; ++ ++ //p2p client info ++ u8 dev_addr[ETH_ALEN]; ++ //u8 iface_addr[ETH_ALEN];//= hwaddr[ETH_ALEN] ++ u8 dev_cap; ++ u16 config_methods; ++ u8 primary_dev_type[8]; ++ u8 num_of_secdev_type; ++ u8 secdev_types_list[32];// 32/8 == 4; ++ u16 dev_name_len; ++ u8 dev_name[32]; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ u8 under_exist_checking; ++#endif // CONFIG_TX_MCAST2UNI ++ ++ u8 keep_alive_trycnt; ++ ++#endif // CONFIG_AP_MODE ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ u8 *passoc_req; ++ u32 assoc_req_len; ++#endif ++ ++ //for DM ++ RSSI_STA rssi_stat; ++ ++ /* To store the sequence number of received management frame */ ++ u16 RxMgmtFrameSeqNum; ++}; ++ ++#define sta_rx_pkts(sta) \ ++ (sta->sta_stats.rx_mgnt_pkts \ ++ + sta->sta_stats.rx_ctrl_pkts \ ++ + sta->sta_stats.rx_data_pkts) ++ ++#define sta_last_rx_pkts(sta) \ ++ (sta->sta_stats.last_rx_mgnt_pkts \ ++ + sta->sta_stats.last_rx_ctrl_pkts \ ++ + sta->sta_stats.last_rx_data_pkts) ++ ++#define sta_rx_data_pkts(sta) \ ++ (sta->sta_stats.rx_data_pkts) ++ ++#define sta_last_rx_data_pkts(sta) \ ++ (sta->sta_stats.last_rx_data_pkts) ++ ++#define sta_rx_mgnt_pkts(sta) \ ++ (sta->sta_stats.rx_mgnt_pkts) ++ ++#define sta_last_rx_mgnt_pkts(sta) \ ++ (sta->sta_stats.last_rx_mgnt_pkts) ++ ++#define sta_rx_beacon_pkts(sta) \ ++ (sta->sta_stats.rx_beacon_pkts) ++ ++#define sta_last_rx_beacon_pkts(sta) \ ++ (sta->sta_stats.last_rx_beacon_pkts) ++ ++#define sta_rx_probereq_pkts(sta) \ ++ (sta->sta_stats.rx_probereq_pkts) ++ ++#define sta_last_rx_probereq_pkts(sta) \ ++ (sta->sta_stats.last_rx_probereq_pkts) ++ ++#define sta_rx_probersp_pkts(sta) \ ++ (sta->sta_stats.rx_probersp_pkts) ++ ++#define sta_last_rx_probersp_pkts(sta) \ ++ (sta->sta_stats.last_rx_probersp_pkts) ++ ++#define sta_rx_probersp_bm_pkts(sta) \ ++ (sta->sta_stats.rx_probersp_bm_pkts) ++ ++#define sta_last_rx_probersp_bm_pkts(sta) \ ++ (sta->sta_stats.last_rx_probersp_bm_pkts) ++ ++#define sta_rx_probersp_uo_pkts(sta) \ ++ (sta->sta_stats.rx_probersp_uo_pkts) ++ ++#define sta_last_rx_probersp_uo_pkts(sta) \ ++ (sta->sta_stats.last_rx_probersp_uo_pkts) ++ ++#define sta_update_last_rx_pkts(sta) \ ++ do { \ ++ sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \ ++ sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \ ++ sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \ ++ sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \ ++ sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \ ++ sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \ ++ sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \ ++ sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \ ++ } while(0) ++ ++#define STA_RX_PKTS_ARG(sta) \ ++ sta->sta_stats.rx_mgnt_pkts \ ++ , sta->sta_stats.rx_ctrl_pkts \ ++ , sta->sta_stats.rx_data_pkts ++ ++#define STA_LAST_RX_PKTS_ARG(sta) \ ++ sta->sta_stats.last_rx_mgnt_pkts \ ++ , sta->sta_stats.last_rx_ctrl_pkts \ ++ , sta->sta_stats.last_rx_data_pkts ++ ++#define STA_RX_PKTS_DIFF_ARG(sta) \ ++ sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \ ++ , sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \ ++ , sta->sta_stats.rx_data_pkts -sta->sta_stats.last_rx_data_pkts ++ ++#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" ++ ++struct sta_priv { ++ ++ u8 *pallocated_stainfo_buf; ++ u8 *pstainfo_buf; ++ _queue free_sta_queue; ++ ++ _lock sta_hash_lock; ++ _list sta_hash[NUM_STA]; ++ int asoc_sta_count; ++ _queue sleep_q; ++ _queue wakeup_q; ++ ++ _adapter *padapter; ++ ++ ++#ifdef CONFIG_AP_MODE ++ _list asoc_list; ++ _list auth_list; ++ _lock asoc_list_lock; ++ _lock auth_list_lock; ++ u8 asoc_list_cnt; ++ u8 auth_list_cnt; ++ ++ unsigned int auth_to; //sec, time to expire in authenticating. ++ unsigned int assoc_to; //sec, time to expire before associating. ++ unsigned int expire_to; //sec , time to expire after associated. ++ ++ /* pointers to STA info; based on allocated AID or NULL if AID free ++ * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1 ++ * and so on ++ */ ++ struct sta_info *sta_aid[NUM_STA]; ++ ++ u16 sta_dz_bitmap;//only support 15 stations, staion aid bitmap for sleeping sta. ++ u16 tim_bitmap;//only support 15 stations, aid=0~15 mapping bit0~bit15 ++ ++ u16 max_num_sta; ++ ++ struct wlan_acl_pool acl_list; ++#endif ++ ++}; ++ ++ ++__inline static u32 wifi_mac_hash(const u8 *mac) ++{ ++ u32 x; ++ ++ x = mac[0]; ++ x = (x << 2) ^ mac[1]; ++ x = (x << 2) ^ mac[2]; ++ x = (x << 2) ^ mac[3]; ++ x = (x << 2) ^ mac[4]; ++ x = (x << 2) ^ mac[5]; ++ ++ x ^= x >> 8; ++ x = x & (NUM_STA - 1); ++ ++ return x; ++} ++ ++ ++extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv); ++extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv); ++ ++#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0) ++int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta); ++struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset); ++ ++extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); ++extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta); ++extern void rtw_free_all_stainfo(_adapter *padapter); ++extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr); ++extern u32 rtw_init_bcmc_stainfo(_adapter* padapter); ++extern struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter); ++extern u8 rtw_access_ctrl(_adapter *padapter, u8 *mac_addr); ++ ++#endif //_STA_INFO_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/usb_hal.h +@@ -0,0 +1,37 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __USB_HAL_H__ ++#define __USB_HAL_H__ ++ ++ ++void rtl8192cu_set_hal_ops(_adapter * padapter); ++ ++void rtl8192du_set_hal_ops(_adapter * padapter); ++#ifdef CONFIG_INTEL_PROXIM ++extern _adapter *rtw_usb_get_sw_pointer(void); ++#endif //CONFIG_INTEL_PROXIM ++#ifdef CONFIG_WOWLAN ++#ifdef CONFIG_WOWLAN_MANUAL ++extern int rtw_suspend_toshiba(PADAPTER Adapter); ++extern int rtw_resume_toshiba(PADAPTER Adapter); ++#endif // CONFIG_WOWLAN_MANUAL ++#endif //CONFIG_WOWLAN ++#endif //__USB_HAL_H__ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/usb_ops.h +@@ -0,0 +1,110 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __USB_OPS_H_ ++#define __USB_OPS_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define REALTEK_USB_VENQT_READ 0xC0 ++#define REALTEK_USB_VENQT_WRITE 0x40 ++#define REALTEK_USB_VENQT_CMD_REQ 0x05 ++#define REALTEK_USB_VENQT_CMD_IDX 0x00 ++ ++enum{ ++ VENDOR_WRITE = 0x00, ++ VENDOR_READ = 0x01, ++}; ++#define ALIGNMENT_UNIT 16 ++#define MAX_VENDOR_REQ_CMD_SIZE 254 //8188cu SIE Support ++#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE +ALIGNMENT_UNIT) ++ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) ++#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \ ++ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms)) ++#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ ++ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms)) ++#else ++#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size,timeout_ms) \ ++ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \ ++ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) ++#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ ++ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \ ++ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) ++#endif ++#include ++#endif //PLATFORM_LINUX ++ ++#ifdef CONFIG_RTL8192C ++void rtl8192cu_set_intf_ops(struct _io_ops *pops); ++#define usb_set_intf_ops rtl8192cu_set_intf_ops ++ ++void rtl8192cu_recv_tasklet(void *priv); ++ ++void rtl8192cu_xmit_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++void rtl8192du_set_intf_ops(struct _io_ops *pops); ++#define usb_set_intf_ops rtl8192du_set_intf_ops ++ ++#ifndef PLATFORM_FREEBSD ++void rtl8192du_recv_tasklet(void *priv); ++#else // PLATFORM_FREEBSD ++void rtl8192du_recv_tasklet(void *priv, int npending); ++#ifdef CONFIG_RX_INDICATE_QUEUE ++void rtw_rx_indicate_tasklet(void *priv, int npending); ++#endif // CONFIG_RX_INDICATE_QUEUE ++#endif // PLATFORM_FREEBSD ++ ++void rtl8192du_xmit_tasklet(void *priv); ++#endif ++ ++/* ++* Increase and check if the continual_urb_error of this @param dvobjprive is larger than MAX_CONTINUAL_URB_ERR ++* @return _TRUE: ++* @return _FALSE: ++*/ ++static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobj) ++{ ++ int ret = _FALSE; ++ int value; ++ if( (value=ATOMIC_INC_RETURN(&dvobj->continual_urb_error)) > MAX_CONTINUAL_URB_ERR) { ++ DBG_871X("[dvobj:%p][ERROR] continual_urb_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_URB_ERR); ++ ret = _TRUE; ++ } else { ++ //DBG_871X("[dvobj:%p] continual_urb_error:%d\n", dvobj, value); ++ } ++ return ret; ++} ++ ++/* ++* Set the continual_urb_error of this @param dvobjprive to 0 ++*/ ++static inline void rtw_reset_continual_urb_error(struct dvobj_priv *dvobj) ++{ ++ ATOMIC_SET(&dvobj->continual_urb_error, 0); ++} ++ ++#endif //__USB_OPS_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/usb_ops_linux.h +@@ -0,0 +1,63 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __USB_OPS_LINUX_H__ ++#define __USB_OPS_LINUX_H__ ++ ++#define VENDOR_CMD_MAX_DATA_LEN 254 ++ ++#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10//ms ++#define RTW_USB_CONTROL_MSG_TIMEOUT 500//ms ++ ++#if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++/* vendor req retry should be in the situation when each vendor req is atomically submitted from others */ ++#define MAX_USBCTRL_VENDORREQ_TIMES 10 ++#else ++#define MAX_USBCTRL_VENDORREQ_TIMES 1 ++#endif ++ ++#define RTW_USB_BULKOUT_TIMEOUT 5000//ms ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++#define _usbctrl_vendorreq_async_callback(urb, regs) _usbctrl_vendorreq_async_callback(urb) ++#define usb_bulkout_zero_complete(purb, regs) usb_bulkout_zero_complete(purb) ++#define usb_write_mem_complete(purb, regs) usb_write_mem_complete(purb) ++#define usb_write_port_complete(purb, regs) usb_write_port_complete(purb) ++#define usb_read_port_complete(purb, regs) usb_read_port_complete(purb) ++#define usb_read_interrupt_complete(purb, regs) usb_read_interrupt_complete(purb) ++#endif ++ ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ ++ ++unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr); ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); ++ ++void usb_read_port_cancel(struct intf_hdl *pintfhdl); ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); ++void usb_write_port_cancel(struct intf_hdl *pintfhdl); ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/usb_osintf.h +@@ -0,0 +1,38 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __USB_OSINTF_H ++#define __USB_OSINTF_H ++ ++#include ++#include ++#include ++#include ++ ++#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) ++ ++ ++//uint usb_dvobj_init(_adapter * adapter); ++//void usb_dvobj_deinit(_adapter * adapter); ++ ++u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void* data, u8 datalen, u8 isdirectionin); ++ ++ ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/usb_vendor_req.h +@@ -0,0 +1,59 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _USB_VENDOR_REQUEST_H_ ++#define _USB_VENDOR_REQUEST_H_ ++ ++//4 Set/Get Register related wIndex/Data ++#define RT_USB_RESET_MASK_OFF 0 ++#define RT_USB_RESET_MASK_ON 1 ++#define RT_USB_SLEEP_MASK_OFF 0 ++#define RT_USB_SLEEP_MASK_ON 1 ++#define RT_USB_LDO_ON 1 ++#define RT_USB_LDO_OFF 0 ++ ++//4 Set/Get SYSCLK related wValue or Data ++#define RT_USB_SYSCLK_32KHZ 0 ++#define RT_USB_SYSCLK_40MHZ 1 ++#define RT_USB_SYSCLK_60MHZ 2 ++ ++ ++typedef enum _RT_USB_BREQUEST { ++ RT_USB_SET_REGISTER = 1, ++ RT_USB_SET_SYSCLK = 2, ++ RT_USB_GET_SYSCLK = 3, ++ RT_USB_GET_REGISTER = 4 ++} RT_USB_BREQUEST; ++ ++ ++typedef enum _RT_USB_WVALUE { ++ RT_USB_RESET_MASK = 1, ++ RT_USB_SLEEP_MASK = 2, ++ RT_USB_USB_HRCPWM = 3, ++ RT_USB_LDO = 4, ++ RT_USB_BOOT_TYPE = 5 ++} RT_USB_WVALUE; ++ ++ ++//BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, UCHAR wIndex, PVOID Data, UCHAR DataLength, BOOLEAN isDirectionIn); ++//BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT Index, PVOID Data); ++//BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT FeatureSelector, IN USHORT Index); ++//BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, IN short urbLength, IN UCHAR DescriptorType, IN UCHAR Index, IN USHORT LanguageId, IN PVOID TransferBuffer, IN ULONG TransferBufferLength); ++ ++#endif +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/wifi.h +@@ -0,0 +1,1248 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _WIFI_H_ ++#define _WIFI_H_ ++ ++#include ++ ++#ifdef BIT ++//#error "BIT define occurred earlier elsewhere!\n" ++#undef BIT ++#endif ++#define BIT(x) (1 << (x)) ++ ++ ++#define WLAN_ETHHDR_LEN 14 ++#define WLAN_ETHADDR_LEN 6 ++#define WLAN_IEEE_OUI_LEN 3 ++#define WLAN_ADDR_LEN 6 ++#define WLAN_CRC_LEN 4 ++#define WLAN_BSSID_LEN 6 ++#define WLAN_BSS_TS_LEN 8 ++#define WLAN_HDR_A3_LEN 24 ++#define WLAN_HDR_A4_LEN 30 ++#define WLAN_HDR_A3_QOS_LEN 26 ++#define WLAN_HDR_A4_QOS_LEN 32 ++#define WLAN_SSID_MAXLEN 32 ++#define WLAN_DATA_MAXLEN 2312 ++ ++#define WLAN_A3_PN_OFFSET 24 ++#define WLAN_A4_PN_OFFSET 30 ++ ++#define WLAN_MIN_ETHFRM_LEN 60 ++#define WLAN_MAX_ETHFRM_LEN 1514 ++#define WLAN_ETHHDR_LEN 14 ++ ++#define P80211CAPTURE_VERSION 0x80211001 ++ ++#ifdef GREEN_HILL ++#pragma pack(1) ++#endif ++ ++enum WIFI_FRAME_TYPE { ++ WIFI_MGT_TYPE = (0), ++ WIFI_CTRL_TYPE = (BIT(2)), ++ WIFI_DATA_TYPE = (BIT(3)), ++ WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), //!< QoS Data ++}; ++ ++enum WIFI_FRAME_SUBTYPE { ++ ++ // below is for mgt frame ++ WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE), ++ WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE), ++ WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE), ++ WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE), ++ WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE), ++ WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE), ++ WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE), ++ WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE), ++ ++ // below is for control frame ++ WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE), ++ WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), ++ WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE), ++ WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE), ++ WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE), ++ WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), ++ ++ // below is for data frame ++ WIFI_DATA = (0 | WIFI_DATA_TYPE), ++ WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE), ++ WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE), ++ WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE), ++ WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE), ++ WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), ++}; ++ ++enum WIFI_REASON_CODE { ++ _RSON_RESERVED_ = 0, ++ _RSON_UNSPECIFIED_ = 1, ++ _RSON_AUTH_NO_LONGER_VALID_ = 2, ++ _RSON_DEAUTH_STA_LEAVING_ = 3, ++ _RSON_INACTIVITY_ = 4, ++ _RSON_UNABLE_HANDLE_ = 5, ++ _RSON_CLS2_ = 6, ++ _RSON_CLS3_ = 7, ++ _RSON_DISAOC_STA_LEAVING_ = 8, ++ _RSON_ASOC_NOT_AUTH_ = 9, ++ ++ // WPA reason ++ _RSON_INVALID_IE_ = 13, ++ _RSON_MIC_FAILURE_ = 14, ++ _RSON_4WAY_HNDSHK_TIMEOUT_ = 15, ++ _RSON_GROUP_KEY_UPDATE_TIMEOUT_ = 16, ++ _RSON_DIFF_IE_ = 17, ++ _RSON_MLTCST_CIPHER_NOT_VALID_ = 18, ++ _RSON_UNICST_CIPHER_NOT_VALID_ = 19, ++ _RSON_AKMP_NOT_VALID_ = 20, ++ _RSON_UNSUPPORT_RSNE_VER_ = 21, ++ _RSON_INVALID_RSNE_CAP_ = 22, ++ _RSON_IEEE_802DOT1X_AUTH_FAIL_ = 23, ++ ++ //belowing are Realtek definition ++ _RSON_PMK_NOT_AVAILABLE_ = 24, ++ _RSON_TDLS_TEAR_TOOFAR_ = 25, ++ _RSON_TDLS_TEAR_UN_RSN_ = 26, ++}; ++ ++/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */ ++#if 0 ++#define WLAN_REASON_UNSPECIFIED 1 ++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 ++#define WLAN_REASON_DEAUTH_LEAVING 3 ++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 ++#define WLAN_REASON_DISASSOC_AP_BUSY 5 ++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 ++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 ++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 ++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 ++#endif ++/* IEEE 802.11h */ ++#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10 ++#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11 ++#if 0 ++/* IEEE 802.11i */ ++#define WLAN_REASON_INVALID_IE 13 ++#define WLAN_REASON_MICHAEL_MIC_FAILURE 14 ++#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15 ++#define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16 ++#define WLAN_REASON_IE_IN_4WAY_DIFFERS 17 ++#define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18 ++#define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19 ++#define WLAN_REASON_AKMP_NOT_VALID 20 ++#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21 ++#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22 ++#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23 ++#define WLAN_REASON_CIPHER_SUITE_REJECTED 24 ++#endif ++ ++enum WIFI_STATUS_CODE { ++ _STATS_SUCCESSFUL_ = 0, ++ _STATS_FAILURE_ = 1, ++ _STATS_CAP_FAIL_ = 10, ++ _STATS_NO_ASOC_ = 11, ++ _STATS_OTHER_ = 12, ++ _STATS_NO_SUPP_ALG_ = 13, ++ _STATS_OUT_OF_AUTH_SEQ_ = 14, ++ _STATS_CHALLENGE_FAIL_ = 15, ++ _STATS_AUTH_TIMEOUT_ = 16, ++ _STATS_UNABLE_HANDLE_STA_ = 17, ++ _STATS_RATE_FAIL_ = 18, ++}; ++ ++/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */ ++#if 0 ++#define WLAN_STATUS_SUCCESS 0 ++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 ++#define WLAN_STATUS_CAPS_UNSUPPORTED 10 ++#define WLAN_STATUS_REASSOC_NO_ASSOC 11 ++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 ++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 ++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 ++#define WLAN_STATUS_CHALLENGE_FAIL 15 ++#define WLAN_STATUS_AUTH_TIMEOUT 16 ++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 ++#define WLAN_STATUS_ASSOC_DENIED_RATES 18 ++#endif ++//entended ++/* IEEE 802.11b */ ++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 ++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 ++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 ++/* IEEE 802.11h */ ++#define WLAN_STATUS_SPEC_MGMT_REQUIRED 22 ++#define WLAN_STATUS_PWR_CAPABILITY_NOT_VALID 23 ++#define WLAN_STATUS_SUPPORTED_CHANNEL_NOT_VALID 24 ++/* IEEE 802.11g */ ++#define WLAN_STATUS_ASSOC_DENIED_NO_SHORT_SLOT_TIME 25 ++#define WLAN_STATUS_ASSOC_DENIED_NO_ER_PBCC 26 ++#define WLAN_STATUS_ASSOC_DENIED_NO_DSSS_OFDM 27 ++/* IEEE 802.11w */ ++#define WLAN_STATUS_ASSOC_REJECTED_TEMPORARILY 30 ++#define WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION 31 ++/* IEEE 802.11i */ ++#define WLAN_STATUS_INVALID_IE 40 ++#define WLAN_STATUS_GROUP_CIPHER_NOT_VALID 41 ++#define WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID 42 ++#define WLAN_STATUS_AKMP_NOT_VALID 43 ++#define WLAN_STATUS_UNSUPPORTED_RSN_IE_VERSION 44 ++#define WLAN_STATUS_INVALID_RSN_IE_CAPAB 45 ++#define WLAN_STATUS_CIPHER_REJECTED_PER_POLICY 46 ++#define WLAN_STATUS_TS_NOT_CREATED 47 ++#define WLAN_STATUS_DIRECT_LINK_NOT_ALLOWED 48 ++#define WLAN_STATUS_DEST_STA_NOT_PRESENT 49 ++#define WLAN_STATUS_DEST_STA_NOT_QOS_STA 50 ++#define WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE 51 ++/* IEEE 802.11r */ ++#define WLAN_STATUS_INVALID_FT_ACTION_FRAME_COUNT 52 ++#define WLAN_STATUS_INVALID_PMKID 53 ++#define WLAN_STATUS_INVALID_MDIE 54 ++#define WLAN_STATUS_INVALID_FTIE 55 ++ ++ ++enum WIFI_REG_DOMAIN { ++ DOMAIN_FCC = 1, ++ DOMAIN_IC = 2, ++ DOMAIN_ETSI = 3, ++ DOMAIN_SPAIN = 4, ++ DOMAIN_FRANCE = 5, ++ DOMAIN_MKK = 6, ++ DOMAIN_ISRAEL = 7, ++ DOMAIN_MKK1 = 8, ++ DOMAIN_MKK2 = 9, ++ DOMAIN_MKK3 = 10, ++ DOMAIN_MAX ++}; ++ ++#define _TO_DS_ BIT(8) ++#define _FROM_DS_ BIT(9) ++#define _MORE_FRAG_ BIT(10) ++#define _RETRY_ BIT(11) ++#define _PWRMGT_ BIT(12) ++#define _MORE_DATA_ BIT(13) ++#define _PRIVACY_ BIT(14) ++#define _ORDER_ BIT(15) ++ ++#define SetToDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_TO_DS_); \ ++ } while(0) ++ ++#define GetToDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_TO_DS_)) != 0) ++ ++#define ClearToDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_TO_DS_)); \ ++ } while(0) ++ ++#define SetFrDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_FROM_DS_); \ ++ } while(0) ++ ++#define GetFrDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_FROM_DS_)) != 0) ++ ++#define ClearFrDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)); \ ++ } while(0) ++ ++#define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe)) ++ ++ ++#define SetMFrag(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_FRAG_); \ ++ } while(0) ++ ++#define GetMFrag(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_FRAG_)) != 0) ++ ++#define ClearMFrag(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)); \ ++ } while(0) ++ ++#define SetRetry(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_RETRY_); \ ++ } while(0) ++ ++#define GetRetry(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_RETRY_)) != 0) ++ ++#define ClearRetry(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_RETRY_)); \ ++ } while(0) ++ ++#define SetPwrMgt(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_PWRMGT_); \ ++ } while(0) ++ ++#define GetPwrMgt(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PWRMGT_)) != 0) ++ ++#define ClearPwrMgt(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)); \ ++ } while(0) ++ ++#define SetMData(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_DATA_); \ ++ } while(0) ++ ++#define GetMData(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_DATA_)) != 0) ++ ++#define ClearMData(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)); \ ++ } while(0) ++ ++#define SetPrivacy(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_PRIVACY_); \ ++ } while(0) ++ ++#define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PRIVACY_)) != 0) ++ ++#define ClearPrivacy(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \ ++ } while(0) ++ ++ ++#define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) ++ ++#define GetFrameType(pbuf) (le16_to_cpu(*(unsigned short *)(pbuf)) & (BIT(3) | BIT(2))) ++ ++#define SetFrameType(pbuf,type) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \ ++ *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \ ++ } while(0) ++ ++#define GetFrameSubType(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) ++ ++#define SetFrameSubType(pbuf,type) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \ ++ } while(0) ++ ++#define GetSequence(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) >> 4) ++ ++#define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & 0x0f) ++ ++#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22))) ++ ++#define SetFragNum(pbuf, num) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ++ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \ ++ cpu_to_le16(0x0f & (num)); \ ++ } while(0) ++ ++#define SetSeqNum(pbuf, num) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ++ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu((unsigned short)~0xfff0)) | \ ++ le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \ ++ } while(0) ++ ++#define SetDuration(pbuf, dur) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 2) = cpu_to_le16(0xffff & (dur)); \ ++ } while(0) ++ ++ ++#define SetPriority(pbuf, tid) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf); \ ++ } while(0) ++ ++#define GetPriority(pbuf) ((le16_to_cpu(*(unsigned short *)(pbuf))) & 0xf) ++ ++#define SetEOSP(pbuf, eosp) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (eosp & 1) << 4); \ ++ } while(0) ++ ++#define SetAckpolicy(pbuf, ack) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (ack & 3) << 5); \ ++ } while(0) ++ ++#define GetAckpolicy(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 5) & 0x3) ++ ++#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1) ++ ++#define SetAMsdu(pbuf, amsdu) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (amsdu & 1) << 7); \ ++ } while(0) ++ ++#define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff) ++ ++#define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + (((GetToDs(pbuf)<<1)|GetFrDs(pbuf))==3?30:24))) & 0x000f) ++ ++#define GetAddr1Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 4)) ++ ++#define GetAddr2Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 10)) ++ ++#define GetAddr3Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 16)) ++ ++#define GetAddr4Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 24)) ++ ++#define MacAddr_isBcst(addr) \ ++( \ ++ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ ++ (addr[2] == 0xff) && (addr[3] == 0xff) && \ ++ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ++) ++ ++__inline static int IS_MCAST(const unsigned char *da) ++{ ++ if ((*da) & 0x01) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++ ++__inline static unsigned char * get_da(unsigned char *pframe) ++{ ++ unsigned char *da; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ da = GetAddr1Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ da = GetAddr1Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ da = GetAddr3Ptr(pframe); ++ break; ++ default: // ToDs=1, FromDs=1 ++ da = GetAddr3Ptr(pframe); ++ break; ++ } ++ ++ return da; ++} ++ ++ ++__inline static unsigned char * get_sa(unsigned char *pframe) ++{ ++ unsigned char *sa; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ sa = GetAddr3Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ default: // ToDs=1, FromDs=1 ++ sa = GetAddr4Ptr(pframe); ++ break; ++ } ++ ++ return sa; ++} ++ ++__inline static unsigned char * get_hdr_bssid(unsigned char *pframe) ++{ ++ unsigned char *sa; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ sa = GetAddr3Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ sa = GetAddr1Ptr(pframe); ++ break; ++ case 0x03: // ToDs=1, FromDs=1 ++ sa = GetAddr1Ptr(pframe); ++ break; ++ default: ++ sa =NULL; //??????? ++ break; ++ } ++ ++ return sa; ++} ++ ++ ++__inline static int IsFrameTypeCtrl(unsigned char *pframe) ++{ ++ if(WIFI_CTRL_TYPE == GetFrameType(pframe)) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++/*----------------------------------------------------------------------------- ++ Below is for the security related definition ++------------------------------------------------------------------------------*/ ++#define _RESERVED_FRAME_TYPE_ 0 ++#define _SKB_FRAME_TYPE_ 2 ++#define _PRE_ALLOCMEM_ 1 ++#define _PRE_ALLOCHDR_ 3 ++#define _PRE_ALLOCLLCHDR_ 4 ++#define _PRE_ALLOCICVHDR_ 5 ++#define _PRE_ALLOCMICHDR_ 6 ++ ++#define _SIFSTIME_ ((priv->pmib->dot11BssType.net_work_type&WIRELESS_11A)?16:10) ++#define _ACKCTSLNG_ 14 //14 bytes long, including crclng ++#define _CRCLNG_ 4 ++ ++#define _ASOCREQ_IE_OFFSET_ 4 // excluding wlan_hdr ++#define _ASOCRSP_IE_OFFSET_ 6 ++#define _REASOCREQ_IE_OFFSET_ 10 ++#define _REASOCRSP_IE_OFFSET_ 6 ++#define _PROBEREQ_IE_OFFSET_ 0 ++#define _PROBERSP_IE_OFFSET_ 12 ++#define _AUTH_IE_OFFSET_ 6 ++#define _DEAUTH_IE_OFFSET_ 0 ++#define _BEACON_IE_OFFSET_ 12 ++#define _PUBLIC_ACTION_IE_OFFSET_ 8 ++ ++#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_ ++ ++#define _SSID_IE_ 0 ++#define _SUPPORTEDRATES_IE_ 1 ++#define _DSSET_IE_ 3 ++#define _TIM_IE_ 5 ++#define _IBSS_PARA_IE_ 6 ++#define _COUNTRY_IE_ 7 ++#define _CHLGETXT_IE_ 16 ++#define _POW_CAP_IE_ 33 ++#define _SUPPORTED_CH_IE_ 36 ++#define _CH_SWTICH_ANNOUNCE_ 37 //Secondary Channel Offset ++#define _RSN_IE_2_ 48 ++#define _SSN_IE_1_ 221 ++#define _ERPINFO_IE_ 42 ++#define _EXT_SUPPORTEDRATES_IE_ 50 ++ ++#define _HT_CAPABILITY_IE_ 45 ++#define _FTIE_ 55 ++#define _TIMEOUT_ITVL_IE_ 56 ++#define _SRC_IE_ 59 ++#define _HT_EXTRA_INFO_IE_ 61 ++#define _HT_ADD_INFO_IE_ 61 //_HT_EXTRA_INFO_IE_ ++ ++#define EID_BSSCoexistence 72 // 20/40 BSS Coexistence ++#define EID_BSSIntolerantChlReport 73 ++#define _RIC_Descriptor_IE_ 75 ++ ++#ifdef CONFIG_IEEE80211W ++#define _MME_IE_ 76 //802.11w Management MIC element ++#endif //CONFIG_IEEE80211W ++#define _LINK_ID_IE_ 101 ++#define _CH_SWITCH_TIMING_ 104 ++#define _PTI_BUFFER_STATUS_ 106 ++#define _EXT_CAP_IE_ 127 ++#define _VENDOR_SPECIFIC_IE_ 221 ++ ++#define _RESERVED47_ 47 ++ ++/* --------------------------------------------------------------------------- ++ Below is the fixed elements... ++-----------------------------------------------------------------------------*/ ++#define _AUTH_ALGM_NUM_ 2 ++#define _AUTH_SEQ_NUM_ 2 ++#define _BEACON_ITERVAL_ 2 ++#define _CAPABILITY_ 2 ++#define _CURRENT_APADDR_ 6 ++#define _LISTEN_INTERVAL_ 2 ++#define _RSON_CODE_ 2 ++#define _ASOC_ID_ 2 ++#define _STATUS_CODE_ 2 ++#define _TIMESTAMP_ 8 ++ ++#define AUTH_ODD_TO 0 ++#define AUTH_EVEN_TO 1 ++ ++#define WLAN_ETHCONV_ENCAP 1 ++#define WLAN_ETHCONV_RFC1042 2 ++#define WLAN_ETHCONV_8021h 3 ++ ++#define cap_ESS BIT(0) ++#define cap_IBSS BIT(1) ++#define cap_CFPollable BIT(2) ++#define cap_CFRequest BIT(3) ++#define cap_Privacy BIT(4) ++#define cap_ShortPremble BIT(5) ++#define cap_PBCC BIT(6) ++#define cap_ChAgility BIT(7) ++#define cap_SpecMgmt BIT(8) ++#define cap_QoS BIT(9) ++#define cap_ShortSlot BIT(10) ++ ++/*----------------------------------------------------------------------------- ++ Below is the definition for 802.11i / 802.1x ++------------------------------------------------------------------------------*/ ++#define _IEEE8021X_MGT_ 1 // WPA ++#define _IEEE8021X_PSK_ 2 // WPA with pre-shared key ++ ++/* ++#define _NO_PRIVACY_ 0 ++#define _WEP_40_PRIVACY_ 1 ++#define _TKIP_PRIVACY_ 2 ++#define _WRAP_PRIVACY_ 3 ++#define _CCMP_PRIVACY_ 4 ++#define _WEP_104_PRIVACY_ 5 ++#define _WEP_WPA_MIXED_PRIVACY_ 6 // WEP + WPA ++*/ ++ ++#ifdef CONFIG_IEEE80211W ++#define _MME_IE_LENGTH_ 18 ++#endif //CONFIG_IEEE80211W ++/*----------------------------------------------------------------------------- ++ Below is the definition for WMM ++------------------------------------------------------------------------------*/ ++#define _WMM_IE_Length_ 7 // for WMM STA ++#define _WMM_Para_Element_Length_ 24 ++ ++ ++/*----------------------------------------------------------------------------- ++ Below is the definition for 802.11n ++------------------------------------------------------------------------------*/ ++ ++/* block-ack parameters */ ++#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 ++#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C ++#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0 ++#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 ++#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 ++ ++//#ifdef CONFIG_80211N_HT ++ ++#define SetOrderBit(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \ ++ } while(0) ++ ++#define GetOrderBit(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) ++ ++ ++/** ++ * struct rtw_ieee80211_bar - HT Block Ack Request ++ * ++ * This structure refers to "HT BlockAckReq" as ++ * described in 802.11n draft section 7.2.1.7.1 ++ */ ++ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) ++struct rtw_ieee80211_bar { ++ unsigned short frame_control; ++ unsigned short duration; ++ unsigned char ra[6]; ++ unsigned char ta[6]; ++ unsigned short control; ++ unsigned short start_seq_num; ++} __attribute__((packed)); ++ #endif ++ ++/* 802.11 BAR control masks */ ++#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 ++#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 ++ ++ ++ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) || defined(PLATFORM_FREEBSD) ++ ++ ++ ++ /** ++ * struct rtw_ieee80211_ht_cap - HT capabilities ++ * ++ * This structure refers to "HT capabilities element" as ++ * described in 802.11n draft section 7.3.2.52 ++ */ ++ ++struct rtw_ieee80211_ht_cap { ++ unsigned short cap_info; ++ unsigned char ampdu_params_info; ++ unsigned char supp_mcs_set[16]; ++ unsigned short extended_ht_cap_info; ++ unsigned int tx_BF_cap_info; ++ unsigned char antenna_selection_info; ++} __attribute__ ((packed)); ++ ++/** ++ * struct rtw_ieee80211_ht_cap - HT additional information ++ * ++ * This structure refers to "HT information element" as ++ * described in 802.11n draft section 7.3.2.53 ++ */ ++struct ieee80211_ht_addt_info { ++ unsigned char control_chan; ++ unsigned char ht_param; ++ unsigned short operation_mode; ++ unsigned short stbc_param; ++ unsigned char basic_set[16]; ++} __attribute__ ((packed)); ++ ++ ++struct HT_caps_element ++{ ++ union ++ { ++ struct ++ { ++ unsigned short HT_caps_info; ++ unsigned char AMPDU_para; ++ unsigned char MCS_rate[16]; ++ unsigned short HT_ext_caps; ++ unsigned int Beamforming_caps; ++ unsigned char ASEL_caps; ++ } HT_cap_element; ++ unsigned char HT_cap[26]; ++ }u; ++} __attribute__ ((packed)); ++ ++struct HT_info_element ++{ ++ unsigned char primary_channel; ++ unsigned char infos[5]; ++ unsigned char MCS_rate[16]; ++} __attribute__ ((packed)); ++ ++struct AC_param ++{ ++ unsigned char ACI_AIFSN; ++ unsigned char CW; ++ unsigned short TXOP_limit; ++} __attribute__ ((packed)); ++ ++struct WMM_para_element ++{ ++ unsigned char QoS_info; ++ unsigned char reserved; ++ struct AC_param ac_param[4]; ++} __attribute__ ((packed)); ++ ++struct ADDBA_request ++{ ++ unsigned char dialog_token; ++ unsigned short BA_para_set; ++ unsigned short BA_timeout_value; ++ unsigned short BA_starting_seqctrl; ++} __attribute__ ((packed)); ++ ++ ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct rtw_ieee80211_ht_cap { ++ unsigned short cap_info; ++ unsigned char ampdu_params_info; ++ unsigned char supp_mcs_set[16]; ++ unsigned short extended_ht_cap_info; ++ unsigned int tx_BF_cap_info; ++ unsigned char antenna_selection_info; ++}; ++ ++ ++struct ieee80211_ht_addt_info { ++ unsigned char control_chan; ++ unsigned char ht_param; ++ unsigned short operation_mode; ++ unsigned short stbc_param; ++ unsigned char basic_set[16]; ++}; ++ ++struct HT_caps_element ++{ ++ union ++ { ++ struct ++ { ++ unsigned short HT_caps_info; ++ unsigned char AMPDU_para; ++ unsigned char MCS_rate[16]; ++ unsigned short HT_ext_caps; ++ unsigned int Beamforming_caps; ++ unsigned char ASEL_caps; ++ } HT_cap_element; ++ unsigned char HT_cap[26]; ++ }; ++}; ++ ++struct HT_info_element ++{ ++ unsigned char primary_channel; ++ unsigned char infos[5]; ++ unsigned char MCS_rate[16]; ++}; ++ ++struct AC_param ++{ ++ unsigned char ACI_AIFSN; ++ unsigned char CW; ++ unsigned short TXOP_limit; ++}; ++ ++struct WMM_para_element ++{ ++ unsigned char QoS_info; ++ unsigned char reserved; ++ struct AC_param ac_param[4]; ++}; ++ ++struct ADDBA_request ++{ ++ unsigned char dialog_token; ++ unsigned short BA_para_set; ++ unsigned short BA_timeout_value; ++ unsigned short BA_starting_seqctrl; ++}; ++ ++ ++#pragma pack() ++ ++#endif ++ ++ ++/* 802.11n HT capabilities masks */ ++#define IEEE80211_HT_CAP_SUP_WIDTH 0x0002 ++#define IEEE80211_HT_CAP_SM_PS 0x000C ++#define IEEE80211_HT_CAP_GRN_FLD 0x0010 ++#define IEEE80211_HT_CAP_SGI_20 0x0020 ++#define IEEE80211_HT_CAP_SGI_40 0x0040 ++#define IEEE80211_HT_CAP_TX_STBC 0x0080 ++#define IEEE80211_HT_CAP_RX_STBC 0x0300 ++#define IEEE80211_HT_CAP_DELAY_BA 0x0400 ++#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 ++#define IEEE80211_HT_CAP_DSSSCCK40 0x1000 ++/* 802.11n HT capability AMPDU settings */ ++#define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 ++#define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C ++/* 802.11n HT capability MSC set */ ++#define IEEE80211_SUPP_MCS_SET_UEQM 4 ++#define IEEE80211_HT_CAP_MAX_STREAMS 4 ++#define IEEE80211_SUPP_MCS_SET_LEN 10 ++/* maximum streams the spec allows */ ++#define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01 ++#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02 ++#define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C ++#define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10 ++/* 802.11n HT IE masks */ ++#define IEEE80211_HT_IE_CHA_SEC_OFFSET 0x03 ++#define IEEE80211_HT_IE_CHA_SEC_NONE 0x00 ++#define IEEE80211_HT_IE_CHA_SEC_ABOVE 0x01 ++#define IEEE80211_HT_IE_CHA_SEC_BELOW 0x03 ++#define IEEE80211_HT_IE_CHA_WIDTH 0x04 ++#define IEEE80211_HT_IE_HT_PROTECTION 0x0003 ++#define IEEE80211_HT_IE_NON_GF_STA_PRSNT 0x0004 ++#define IEEE80211_HT_IE_NON_HT_STA_PRSNT 0x0010 ++ ++/* block-ack parameters */ ++#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 ++#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C ++#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0 ++#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 ++#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 ++ ++/* ++ * A-PMDU buffer sizes ++ * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) ++ */ ++#define IEEE80211_MIN_AMPDU_BUF 0x8 ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,19,0)) ++#define IEEE80211_MAX_AMPDU_BUF 0x40 ++#endif ++ ++ ++/* Spatial Multiplexing Power Save Modes */ ++#define WLAN_HT_CAP_SM_PS_STATIC 0 ++#define WLAN_HT_CAP_SM_PS_DYNAMIC 1 ++#define WLAN_HT_CAP_SM_PS_INVALID 2 ++#define WLAN_HT_CAP_SM_PS_DISABLED 3 ++ ++ ++#define OP_MODE_PURE 0 ++#define OP_MODE_MAY_BE_LEGACY_STAS 1 ++#define OP_MODE_20MHZ_HT_STA_ASSOCED 2 ++#define OP_MODE_MIXED 3 ++ ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8) BIT(0) | BIT(1)) ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8) BIT(0)) ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8) BIT(0) | BIT(1)) ++#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8) BIT(2)) ++#define HT_INFO_HT_PARAM_RIFS_MODE ((u8) BIT(3)) ++#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8) BIT(4)) ++#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8) BIT(5)) ++ ++#define HT_INFO_OPERATION_MODE_OP_MODE_MASK \ ++ ((u16) (0x0001 | 0x0002)) ++#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0 ++#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8) BIT(2)) ++#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3)) ++#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4)) ++ ++#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6)) ++#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7)) ++#define HT_INFO_STBC_PARAM_SECONDARY_BCN ((u16) BIT(8)) ++#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9)) ++#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) ++#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) ++ ++ ++ ++//#endif ++ ++// ===============WPS Section=============== ++// For WPSv1.0 ++#define WPSOUI 0x0050f204 ++// WPS attribute ID ++#define WPS_ATTR_VER1 0x104A ++#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044 ++#define WPS_ATTR_RESP_TYPE 0x103B ++#define WPS_ATTR_UUID_E 0x1047 ++#define WPS_ATTR_MANUFACTURER 0x1021 ++#define WPS_ATTR_MODEL_NAME 0x1023 ++#define WPS_ATTR_MODEL_NUMBER 0x1024 ++#define WPS_ATTR_SERIAL_NUMBER 0x1042 ++#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054 ++#define WPS_ATTR_SEC_DEV_TYPE_LIST 0x1055 ++#define WPS_ATTR_DEVICE_NAME 0x1011 ++#define WPS_ATTR_CONF_METHOD 0x1008 ++#define WPS_ATTR_RF_BANDS 0x103C ++#define WPS_ATTR_DEVICE_PWID 0x1012 ++#define WPS_ATTR_REQUEST_TYPE 0x103A ++#define WPS_ATTR_ASSOCIATION_STATE 0x1002 ++#define WPS_ATTR_CONFIG_ERROR 0x1009 ++#define WPS_ATTR_VENDOR_EXT 0x1049 ++#define WPS_ATTR_SELECTED_REGISTRAR 0x1041 ++ ++// Value of WPS attribute "WPS_ATTR_DEVICE_NAME ++#define WPS_MAX_DEVICE_NAME_LEN 32 ++ ++// Value of WPS Request Type Attribute ++#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00 ++#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01 ++#define WPS_REQ_TYPE_REGISTRAR 0x02 ++#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03 ++ ++// Value of WPS Response Type Attribute ++#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00 ++#define WPS_RESPONSE_TYPE_8021X 0x01 ++#define WPS_RESPONSE_TYPE_REGISTRAR 0x02 ++#define WPS_RESPONSE_TYPE_AP 0x03 ++ ++// Value of WPS WiFi Simple Configuration State Attribute ++#define WPS_WSC_STATE_NOT_CONFIG 0x01 ++#define WPS_WSC_STATE_CONFIG 0x02 ++ ++// Value of WPS Version Attribute ++#define WPS_VERSION_1 0x10 ++ ++// Value of WPS Configuration Method Attribute ++#define WPS_CONFIG_METHOD_FLASH 0x0001 ++#define WPS_CONFIG_METHOD_ETHERNET 0x0002 ++#define WPS_CONFIG_METHOD_LABEL 0x0004 ++#define WPS_CONFIG_METHOD_DISPLAY 0x0008 ++#define WPS_CONFIG_METHOD_E_NFC 0x0010 ++#define WPS_CONFIG_METHOD_I_NFC 0x0020 ++#define WPS_CONFIG_METHOD_NFC 0x0040 ++#define WPS_CONFIG_METHOD_PBC 0x0080 ++#define WPS_CONFIG_METHOD_KEYPAD 0x0100 ++#define WPS_CONFIG_METHOD_VPBC 0x0280 ++#define WPS_CONFIG_METHOD_PPBC 0x0480 ++#define WPS_CONFIG_METHOD_VDISPLAY 0x2008 ++#define WPS_CONFIG_METHOD_PDISPLAY 0x4008 ++ ++// Value of Category ID of WPS Primary Device Type Attribute ++#define WPS_PDT_CID_DISPLAYS 0x0007 ++#define WPS_PDT_CID_MULIT_MEDIA 0x0008 ++#define WPS_PDT_CID_RTK_WIDI WPS_PDT_CID_MULIT_MEDIA ++ ++// Value of Sub Category ID of WPS Primary Device Type Attribute ++#define WPS_PDT_SCID_MEDIA_SERVER 0x0005 ++#define WPS_PDT_SCID_RTK_DMP WPS_PDT_SCID_MEDIA_SERVER ++ ++// Value of Device Password ID ++#define WPS_DPID_PIN 0x0000 ++#define WPS_DPID_USER_SPEC 0x0001 ++#define WPS_DPID_MACHINE_SPEC 0x0002 ++#define WPS_DPID_REKEY 0x0003 ++#define WPS_DPID_PBC 0x0004 ++#define WPS_DPID_REGISTRAR_SPEC 0x0005 ++ ++// Value of WPS RF Bands Attribute ++#define WPS_RF_BANDS_2_4_GHZ 0x01 ++#define WPS_RF_BANDS_5_GHZ 0x02 ++ ++// Value of WPS Association State Attribute ++#define WPS_ASSOC_STATE_NOT_ASSOCIATED 0x00 ++#define WPS_ASSOC_STATE_CONNECTION_SUCCESS 0x01 ++#define WPS_ASSOC_STATE_CONFIGURATION_FAILURE 0x02 ++#define WPS_ASSOC_STATE_ASSOCIATION_FAILURE 0x03 ++#define WPS_ASSOC_STATE_IP_FAILURE 0x04 ++ ++// =====================P2P Section===================== ++// For P2P ++#define P2POUI 0x506F9A09 ++ ++// P2P Attribute ID ++#define P2P_ATTR_STATUS 0x00 ++#define P2P_ATTR_MINOR_REASON_CODE 0x01 ++#define P2P_ATTR_CAPABILITY 0x02 ++#define P2P_ATTR_DEVICE_ID 0x03 ++#define P2P_ATTR_GO_INTENT 0x04 ++#define P2P_ATTR_CONF_TIMEOUT 0x05 ++#define P2P_ATTR_LISTEN_CH 0x06 ++#define P2P_ATTR_GROUP_BSSID 0x07 ++#define P2P_ATTR_EX_LISTEN_TIMING 0x08 ++#define P2P_ATTR_INTENTED_IF_ADDR 0x09 ++#define P2P_ATTR_MANAGEABILITY 0x0A ++#define P2P_ATTR_CH_LIST 0x0B ++#define P2P_ATTR_NOA 0x0C ++#define P2P_ATTR_DEVICE_INFO 0x0D ++#define P2P_ATTR_GROUP_INFO 0x0E ++#define P2P_ATTR_GROUP_ID 0x0F ++#define P2P_ATTR_INTERFACE 0x10 ++#define P2P_ATTR_OPERATING_CH 0x11 ++#define P2P_ATTR_INVITATION_FLAGS 0x12 ++ ++// Value of Status Attribute ++#define P2P_STATUS_SUCCESS 0x00 ++#define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01 ++#define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02 ++#define P2P_STATUS_FAIL_LIMIT_REACHED 0x03 ++#define P2P_STATUS_FAIL_INVALID_PARAM 0x04 ++#define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05 ++#define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06 ++#define P2P_STATUS_FAIL_NO_COMMON_CH 0x07 ++#define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08 ++#define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09 ++#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A ++#define P2P_STATUS_FAIL_USER_REJECT 0x0B ++ ++// Value of Inviation Flags Attribute ++#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0) ++ ++#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \ ++ P2P_DEVCAP_CLIENT_DISCOVERABILITY | \ ++ P2P_DEVCAP_CONCURRENT_OPERATION | \ ++ P2P_DEVCAP_INVITATION_PROC) ++ ++#define DMP_P2P_GRPCAP_SUPPORT (P2P_GRPCAP_INTRABSS) ++ ++// Value of Device Capability Bitmap ++#define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0) ++#define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1) ++#define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2) ++#define P2P_DEVCAP_INFRA_MANAGED BIT(3) ++#define P2P_DEVCAP_DEVICE_LIMIT BIT(4) ++#define P2P_DEVCAP_INVITATION_PROC BIT(5) ++ ++// Value of Group Capability Bitmap ++#define P2P_GRPCAP_GO BIT(0) ++#define P2P_GRPCAP_PERSISTENT_GROUP BIT(1) ++#define P2P_GRPCAP_GROUP_LIMIT BIT(2) ++#define P2P_GRPCAP_INTRABSS BIT(3) ++#define P2P_GRPCAP_CROSS_CONN BIT(4) ++#define P2P_GRPCAP_PERSISTENT_RECONN BIT(5) ++#define P2P_GRPCAP_GROUP_FORMATION BIT(6) ++ ++// P2P Public Action Frame ( Management Frame ) ++#define P2P_PUB_ACTION_ACTION 0x09 ++ ++// P2P Public Action Frame Type ++#define P2P_GO_NEGO_REQ 0 ++#define P2P_GO_NEGO_RESP 1 ++#define P2P_GO_NEGO_CONF 2 ++#define P2P_INVIT_REQ 3 ++#define P2P_INVIT_RESP 4 ++#define P2P_DEVDISC_REQ 5 ++#define P2P_DEVDISC_RESP 6 ++#define P2P_PROVISION_DISC_REQ 7 ++#define P2P_PROVISION_DISC_RESP 8 ++ ++// P2P Action Frame Type ++#define P2P_NOTICE_OF_ABSENCE 0 ++#define P2P_PRESENCE_REQUEST 1 ++#define P2P_PRESENCE_RESPONSE 2 ++#define P2P_GO_DISC_REQUEST 3 ++ ++ ++#define P2P_MAX_PERSISTENT_GROUP_NUM 10 ++ ++#define P2P_PROVISIONING_SCAN_CNT 3 ++ ++#define P2P_WILDCARD_SSID_LEN 7 ++ ++#define P2P_FINDPHASE_EX_NONE 0 // default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase ++#define P2P_FINDPHASE_EX_FULL 1 // used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase ++#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) ++#define P2P_FINDPHASE_EX_MAX 4 ++#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX ++ ++#define P2P_PROVISION_TIMEOUT 5000 // 5 seconds timeout for sending the provision discovery request ++#define P2P_CONCURRENT_PROVISION_TIMEOUT 3000 // 3 seconds timeout for sending the provision discovery request under concurrent mode ++#define P2P_GO_NEGO_TIMEOUT 5000 // 5 seconds timeout for receiving the group negotation response ++#define P2P_CONCURRENT_GO_NEGO_TIMEOUT 3000 // 3 seconds timeout for sending the negotiation request under concurrent mode ++#define P2P_TX_PRESCAN_TIMEOUT 100 // 100ms ++#define P2P_INVITE_TIMEOUT 5000 // 5 seconds timeout for sending the invitation request ++#define P2P_CONCURRENT_INVITE_TIMEOUT 3000 // 3 seconds timeout for sending the invitation request under concurrent mode ++#define P2P_RESET_SCAN_CH 15000 // 15 seconds timeout to reset the scan channel ( based on channel plan ) ++#define P2P_MAX_INTENT 15 ++ ++#define P2P_MAX_NOA_NUM 2 ++ ++// WPS Configuration Method ++#define WPS_CM_NONE 0x0000 ++#define WPS_CM_LABEL 0x0004 ++#define WPS_CM_DISPLYA 0x0008 ++#define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010 ++#define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020 ++#define WPS_CM_NFC_INTERFACE 0x0040 ++#define WPS_CM_PUSH_BUTTON 0x0080 ++#define WPS_CM_KEYPAD 0x0100 ++#define WPS_CM_SW_PUHS_BUTTON 0x0280 ++#define WPS_CM_HW_PUHS_BUTTON 0x0480 ++#define WPS_CM_SW_DISPLAY_PIN 0x2008 ++#define WPS_CM_LCD_DISPLAY_PIN 0x4008 ++ ++enum P2P_ROLE { ++ P2P_ROLE_DISABLE = 0, ++ P2P_ROLE_DEVICE = 1, ++ P2P_ROLE_CLIENT = 2, ++ P2P_ROLE_GO = 3 ++}; ++ ++enum P2P_STATE { ++ P2P_STATE_NONE = 0, // P2P disable ++ P2P_STATE_IDLE = 1, // P2P had enabled and do nothing ++ P2P_STATE_LISTEN = 2, // In pure listen state ++ P2P_STATE_SCAN = 3, // In scan phase ++ P2P_STATE_FIND_PHASE_LISTEN = 4, // In the listen state of find phase ++ P2P_STATE_FIND_PHASE_SEARCH = 5, // In the search state of find phase ++ P2P_STATE_TX_PROVISION_DIS_REQ = 6, // In P2P provisioning discovery ++ P2P_STATE_RX_PROVISION_DIS_RSP = 7, ++ P2P_STATE_RX_PROVISION_DIS_REQ = 8, ++ P2P_STATE_GONEGO_ING = 9, // Doing the group owner negoitation handshake ++ P2P_STATE_GONEGO_OK = 10, // finish the group negoitation handshake with success ++ P2P_STATE_GONEGO_FAIL = 11, // finish the group negoitation handshake with failure ++ P2P_STATE_RECV_INVITE_REQ_MATCH = 12, // receiving the P2P Inviation request and match with the profile. ++ P2P_STATE_PROVISIONING_ING = 13, // Doing the P2P WPS ++ P2P_STATE_PROVISIONING_DONE = 14, // Finish the P2P WPS ++ P2P_STATE_TX_INVITE_REQ = 15, // Transmit the P2P Invitation request ++ P2P_STATE_RX_INVITE_RESP_OK = 16, // Receiving the P2P Invitation response with sucess ++ P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17, // receiving the P2P Inviation request and dismatch with the profile. ++ P2P_STATE_RECV_INVITE_REQ_GO = 18, // receiving the P2P Inviation request and this wifi is GO. ++ P2P_STATE_RECV_INVITE_REQ_JOIN = 19, // receiving the P2P Inviation request to join an existing P2P Group. ++ P2P_STATE_RX_INVITE_RESP_FAIL = 20, // recveing the P2P Inviation response with failure ++ P2P_STATE_RX_INFOR_NOREADY = 21, // receiving p2p negoitation response with information is not available ++ P2P_STATE_TX_INFOR_NOREADY = 22, // sending p2p negoitation response with information is not available ++}; ++ ++enum P2P_WPSINFO { ++ P2P_NO_WPSINFO = 0, ++ P2P_GOT_WPSINFO_PEER_DISPLAY_PIN = 1, ++ P2P_GOT_WPSINFO_SELF_DISPLAY_PIN = 2, ++ P2P_GOT_WPSINFO_PBC = 3, ++}; ++ ++#define P2P_PRIVATE_IOCTL_SET_LEN 64 ++ ++enum P2P_PROTO_WK_ID ++{ ++ P2P_FIND_PHASE_WK = 0, ++ P2P_RESTORE_STATE_WK = 1, ++ P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, ++ P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, ++ P2P_PRE_TX_INVITEREQ_PROCESS_WK = 4, ++ P2P_AP_P2P_CH_SWITCH_PROCESS_WK =5, ++ P2P_RO_CH_WK = 6, ++}; ++ ++#ifdef CONFIG_P2P_PS ++enum P2P_PS_STATE ++{ ++ P2P_PS_DISABLE = 0, ++ P2P_PS_ENABLE = 1, ++ P2P_PS_SCAN = 2, ++ P2P_PS_SCAN_DONE = 3, ++ P2P_PS_ALLSTASLEEP = 4, // for P2P GO ++}; ++ ++enum P2P_PS_MODE ++{ ++ P2P_PS_NONE = 0, ++ P2P_PS_CTWINDOW = 1, ++ P2P_PS_NOA = 2, ++ P2P_PS_MIX = 3, // CTWindow and NoA ++}; ++#endif // CONFIG_P2P_PS ++ ++// =====================WFD Section===================== ++// For Wi-Fi Display ++#define WFD_ATTR_DEVICE_INFO 0x00 ++#define WFD_ATTR_ASSOC_BSSID 0x01 ++#define WFD_ATTR_COUPLED_SINK_INFO 0x06 ++#define WFD_ATTR_LOCAL_IP_ADDR 0x08 ++#define WFD_ATTR_SESSION_INFO 0x09 ++#define WFD_ATTR_ALTER_MAC 0x0a ++ ++// For WFD Device Information Attribute ++#define WFD_DEVINFO_SOURCE 0x0000 ++#define WFD_DEVINFO_PSINK 0x0001 ++#define WFD_DEVINFO_SSINK 0x0002 ++#define WFD_DEVINFO_DUAL 0x0003 ++ ++#define WFD_DEVINFO_SESSION_AVAIL 0x0010 ++#define WFD_DEVINFO_WSD 0x0040 ++#define WFD_DEVINFO_PC_TDLS 0x0080 ++#define WFD_DEVINFO_HDCP_SUPPORT 0x0100 ++ ++ ++#ifdef CONFIG_TX_MCAST2UNI ++#define IP_MCAST_MAC(mac) ((mac[0]==0x01)&&(mac[1]==0x00)&&(mac[2]==0x5e)) ++#define ICMPV6_MCAST_MAC(mac) ((mac[0]==0x33)&&(mac[1]==0x33)&&(mac[2]!=0xff)) ++#endif // CONFIG_TX_MCAST2UNI ++ ++ ++ ++#endif // _WIFI_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/wlan_bssdef.h +@@ -0,0 +1,703 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __WLAN_BSSDEF_H__ ++#define __WLAN_BSSDEF_H__ ++ ++ ++#define MAX_IE_SZ 768 ++ ++ ++#ifdef PLATFORM_LINUX ++ ++#define NDIS_802_11_LENGTH_SSID 32 ++#define NDIS_802_11_LENGTH_RATES 8 ++#define NDIS_802_11_LENGTH_RATES_EX 16 ++ ++typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; ++typedef long NDIS_802_11_RSSI; // in dBm ++typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates ++typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates ++ ++ ++typedef ULONG NDIS_802_11_KEY_INDEX; ++typedef unsigned long long NDIS_802_11_KEY_RSC; ++ ++ ++typedef struct _NDIS_802_11_SSID ++{ ++ ULONG SsidLength; ++ UCHAR Ssid[32]; ++} NDIS_802_11_SSID, *PNDIS_802_11_SSID; ++ ++typedef enum _NDIS_802_11_NETWORK_TYPE ++{ ++ Ndis802_11FH, ++ Ndis802_11DS, ++ Ndis802_11OFDM5, ++ Ndis802_11OFDM24, ++ Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; ++ ++typedef struct _NDIS_802_11_CONFIGURATION_FH ++{ ++ ULONG Length; // Length of structure ++ ULONG HopPattern; // As defined by 802.11, MSB set ++ ULONG HopSet; // to one if non-802.11 ++ ULONG DwellTime; // units are Kusec ++} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; ++ ++ ++/* ++ FW will only save the channel number in DSConfig. ++ ODI Handler will convert the channel number to freq. number. ++*/ ++typedef struct _NDIS_802_11_CONFIGURATION ++{ ++ ULONG Length; // Length of structure ++ ULONG BeaconPeriod; // units are Kusec ++ ULONG ATIMWindow; // units are Kusec ++ ULONG DSConfig; // Frequency, units are kHz ++ NDIS_802_11_CONFIGURATION_FH FHConfig; ++} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; ++ ++ ++ ++typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE ++{ ++ Ndis802_11IBSS, ++ Ndis802_11Infrastructure, ++ Ndis802_11AutoUnknown, ++ Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound ++ Ndis802_11APMode ++} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; ++ ++ ++ ++ ++ ++typedef struct _NDIS_802_11_FIXED_IEs ++{ ++ UCHAR Timestamp[8]; ++ USHORT BeaconInterval; ++ USHORT Capabilities; ++} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; ++ ++ ++ ++typedef struct _NDIS_802_11_VARIABLE_IEs ++{ ++ UCHAR ElementID; ++ UCHAR Length; ++ UCHAR data[1]; ++} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; ++ ++ ++ ++/* ++ ++ ++ ++Length is the 4 bytes multiples of the sume of ++ sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) +++ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) +++ sizeof (NDIS_802_11_RATES_EX) + IELength ++ ++Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the ++partial sum. ++ ++*/ ++#if 0 ++typedef struct _NDIS_WLAN_BSSID_EX ++{ ++ ULONG Length; ++ NDIS_802_11_MAC_ADDRESS MacAddress; ++ UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; ++ NDIS_802_11_SSID Ssid; ++ ULONG Privacy; ++ NDIS_802_11_RSSI Rssi; ++ NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; ++ NDIS_802_11_CONFIGURATION Configuration; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; ++ NDIS_802_11_RATES_EX SupportedRates; ++ ULONG IELength; ++ UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) ++} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; ++ ++ ++typedef struct _NDIS_802_11_BSSID_LIST_EX ++{ ++ ULONG NumberOfItems; ++ NDIS_WLAN_BSSID_EX Bssid[1]; ++} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; ++#endif ++ ++typedef enum _NDIS_802_11_AUTHENTICATION_MODE ++{ ++ Ndis802_11AuthModeOpen, ++ Ndis802_11AuthModeShared, ++ Ndis802_11AuthModeAutoSwitch, ++ Ndis802_11AuthModeWPA, ++ Ndis802_11AuthModeWPAPSK, ++ Ndis802_11AuthModeWPANone, ++ Ndis802_11AuthModeMax // Not a real mode, defined as upper bound ++} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; ++ ++typedef enum _NDIS_802_11_WEP_STATUS ++{ ++ Ndis802_11WEPEnabled, ++ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, ++ Ndis802_11WEPDisabled, ++ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, ++ Ndis802_11WEPKeyAbsent, ++ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, ++ Ndis802_11WEPNotSupported, ++ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, ++ Ndis802_11Encryption2Enabled, ++ Ndis802_11Encryption2KeyAbsent, ++ Ndis802_11Encryption3Enabled, ++ Ndis802_11Encryption3KeyAbsent ++} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, ++ NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; ++ ++ ++#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 ++#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 ++ ++#define NDIS_802_11_AI_RESFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_RESFI_STATUSCODE 2 ++#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 ++ ++typedef struct _NDIS_802_11_AI_REQFI ++{ ++ USHORT Capabilities; ++ USHORT ListenInterval; ++ NDIS_802_11_MAC_ADDRESS CurrentAPAddress; ++} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; ++ ++typedef struct _NDIS_802_11_AI_RESFI ++{ ++ USHORT Capabilities; ++ USHORT StatusCode; ++ USHORT AssociationId; ++} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; ++ ++typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION ++{ ++ ULONG Length; ++ USHORT AvailableRequestFixedIEs; ++ NDIS_802_11_AI_REQFI RequestFixedIEs; ++ ULONG RequestIELength; ++ ULONG OffsetRequestIEs; ++ USHORT AvailableResponseFixedIEs; ++ NDIS_802_11_AI_RESFI ResponseFixedIEs; ++ ULONG ResponseIELength; ++ ULONG OffsetResponseIEs; ++} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; ++ ++typedef enum _NDIS_802_11_RELOAD_DEFAULTS ++{ ++ Ndis802_11ReloadWEPKeys ++} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; ++ ++ ++// Key mapping keys require a BSSID ++typedef struct _NDIS_802_11_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ ULONG KeyLength; // length of key in bytes ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ NDIS_802_11_KEY_RSC KeyRSC; ++ UCHAR KeyMaterial[32]; // variable length depending on above field ++} NDIS_802_11_KEY, *PNDIS_802_11_KEY; ++ ++typedef struct _NDIS_802_11_REMOVE_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ NDIS_802_11_MAC_ADDRESS BSSID; ++} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; ++ ++typedef struct _NDIS_802_11_WEP ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; // 0 is the per-client key, 1-N are the global keys ++ ULONG KeyLength; // length of key in bytes ++ UCHAR KeyMaterial[16];// variable length depending on above field ++} NDIS_802_11_WEP, *PNDIS_802_11_WEP; ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST ++{ ++ ULONG Length; // Length of structure ++ NDIS_802_11_MAC_ADDRESS Bssid; ++ ULONG Flags; ++} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; ++ ++typedef enum _NDIS_802_11_STATUS_TYPE ++{ ++ Ndis802_11StatusType_Authentication, ++ Ndis802_11StatusType_MediaStreamMode, ++ Ndis802_11StatusType_PMKID_CandidateList, ++ Ndis802_11StatusTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; ++ ++typedef struct _NDIS_802_11_STATUS_INDICATION ++{ ++ NDIS_802_11_STATUS_TYPE StatusType; ++} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; ++ ++// mask for authentication/integrity fields ++#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f ++#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 ++#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 ++#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 ++#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E ++ ++// MIC check time, 60 seconds. ++#define MIC_CHECK_TIME 60000000 ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_EVENT ++{ ++ NDIS_802_11_STATUS_INDICATION Status; ++ NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; ++} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; ++ ++typedef struct _NDIS_802_11_TEST ++{ ++ ULONG Length; ++ ULONG Type; ++ union ++ { ++ NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; ++ NDIS_802_11_RSSI RssiTrigger; ++ }tt; ++} NDIS_802_11_TEST, *PNDIS_802_11_TEST; ++ ++ ++#endif //end of #ifdef PLATFORM_LINUX ++ ++#ifdef PLATFORM_FREEBSD ++ ++#define NDIS_802_11_LENGTH_SSID 32 ++#define NDIS_802_11_LENGTH_RATES 8 ++#define NDIS_802_11_LENGTH_RATES_EX 16 ++ ++typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; ++typedef long NDIS_802_11_RSSI; // in dBm ++typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates ++typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates ++ ++ ++typedef ULONG NDIS_802_11_KEY_INDEX; ++typedef unsigned long long NDIS_802_11_KEY_RSC; ++ ++ ++typedef struct _NDIS_802_11_SSID ++{ ++ ULONG SsidLength; ++ UCHAR Ssid[32]; ++} NDIS_802_11_SSID, *PNDIS_802_11_SSID; ++ ++typedef enum _NDIS_802_11_NETWORK_TYPE ++{ ++ Ndis802_11FH, ++ Ndis802_11DS, ++ Ndis802_11OFDM5, ++ Ndis802_11OFDM24, ++ Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; ++ ++typedef struct _NDIS_802_11_CONFIGURATION_FH ++{ ++ ULONG Length; // Length of structure ++ ULONG HopPattern; // As defined by 802.11, MSB set ++ ULONG HopSet; // to one if non-802.11 ++ ULONG DwellTime; // units are Kusec ++} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; ++ ++ ++/* ++ FW will only save the channel number in DSConfig. ++ ODI Handler will convert the channel number to freq. number. ++*/ ++typedef struct _NDIS_802_11_CONFIGURATION ++{ ++ ULONG Length; // Length of structure ++ ULONG BeaconPeriod; // units are Kusec ++ ULONG ATIMWindow; // units are Kusec ++ ULONG DSConfig; // Frequency, units are kHz ++ NDIS_802_11_CONFIGURATION_FH FHConfig; ++} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; ++ ++ ++ ++typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE ++{ ++ Ndis802_11IBSS, ++ Ndis802_11Infrastructure, ++ Ndis802_11AutoUnknown, ++ Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound ++ Ndis802_11APMode ++} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; ++ ++ ++ ++ ++ ++typedef struct _NDIS_802_11_FIXED_IEs ++{ ++ UCHAR Timestamp[8]; ++ USHORT BeaconInterval; ++ USHORT Capabilities; ++} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; ++ ++ ++ ++typedef struct _NDIS_802_11_VARIABLE_IEs ++{ ++ UCHAR ElementID; ++ UCHAR Length; ++ UCHAR data[1]; ++} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; ++ ++ ++ ++/* ++ ++ ++ ++Length is the 4 bytes multiples of the sume of ++ sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) +++ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) +++ sizeof (NDIS_802_11_RATES_EX) + IELength ++ ++Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the ++partial sum. ++ ++*/ ++#if 0 ++typedef struct _NDIS_WLAN_BSSID_EX ++{ ++ ULONG Length; ++ NDIS_802_11_MAC_ADDRESS MacAddress; ++ UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; ++ NDIS_802_11_SSID Ssid; ++ ULONG Privacy; ++ NDIS_802_11_RSSI Rssi; ++ NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; ++ NDIS_802_11_CONFIGURATION Configuration; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; ++ NDIS_802_11_RATES_EX SupportedRates; ++ ULONG IELength; ++ UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) ++} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; ++ ++ ++typedef struct _NDIS_802_11_BSSID_LIST_EX ++{ ++ ULONG NumberOfItems; ++ NDIS_WLAN_BSSID_EX Bssid[1]; ++} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; ++#endif ++ ++typedef enum _NDIS_802_11_AUTHENTICATION_MODE ++{ ++ Ndis802_11AuthModeOpen, ++ Ndis802_11AuthModeShared, ++ Ndis802_11AuthModeAutoSwitch, ++ Ndis802_11AuthModeWPA, ++ Ndis802_11AuthModeWPAPSK, ++ Ndis802_11AuthModeWPANone, ++ Ndis802_11AuthModeMax // Not a real mode, defined as upper bound ++} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; ++ ++typedef enum _NDIS_802_11_WEP_STATUS ++{ ++ Ndis802_11WEPEnabled, ++ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, ++ Ndis802_11WEPDisabled, ++ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, ++ Ndis802_11WEPKeyAbsent, ++ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, ++ Ndis802_11WEPNotSupported, ++ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, ++ Ndis802_11Encryption2Enabled, ++ Ndis802_11Encryption2KeyAbsent, ++ Ndis802_11Encryption3Enabled, ++ Ndis802_11Encryption3KeyAbsent ++} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, ++ NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; ++ ++ ++#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 ++#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 ++ ++#define NDIS_802_11_AI_RESFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_RESFI_STATUSCODE 2 ++#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 ++ ++typedef struct _NDIS_802_11_AI_REQFI ++{ ++ USHORT Capabilities; ++ USHORT ListenInterval; ++ NDIS_802_11_MAC_ADDRESS CurrentAPAddress; ++} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; ++ ++typedef struct _NDIS_802_11_AI_RESFI ++{ ++ USHORT Capabilities; ++ USHORT StatusCode; ++ USHORT AssociationId; ++} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; ++ ++typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION ++{ ++ ULONG Length; ++ USHORT AvailableRequestFixedIEs; ++ NDIS_802_11_AI_REQFI RequestFixedIEs; ++ ULONG RequestIELength; ++ ULONG OffsetRequestIEs; ++ USHORT AvailableResponseFixedIEs; ++ NDIS_802_11_AI_RESFI ResponseFixedIEs; ++ ULONG ResponseIELength; ++ ULONG OffsetResponseIEs; ++} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; ++ ++typedef enum _NDIS_802_11_RELOAD_DEFAULTS ++{ ++ Ndis802_11ReloadWEPKeys ++} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; ++ ++ ++// Key mapping keys require a BSSID ++typedef struct _NDIS_802_11_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ ULONG KeyLength; // length of key in bytes ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ NDIS_802_11_KEY_RSC KeyRSC; ++ UCHAR KeyMaterial[32]; // variable length depending on above field ++} NDIS_802_11_KEY, *PNDIS_802_11_KEY; ++ ++typedef struct _NDIS_802_11_REMOVE_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ NDIS_802_11_MAC_ADDRESS BSSID; ++} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; ++ ++typedef struct _NDIS_802_11_WEP ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; // 0 is the per-client key, 1-N are the global keys ++ ULONG KeyLength; // length of key in bytes ++ UCHAR KeyMaterial[16];// variable length depending on above field ++} NDIS_802_11_WEP, *PNDIS_802_11_WEP; ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST ++{ ++ ULONG Length; // Length of structure ++ NDIS_802_11_MAC_ADDRESS Bssid; ++ ULONG Flags; ++} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; ++ ++typedef enum _NDIS_802_11_STATUS_TYPE ++{ ++ Ndis802_11StatusType_Authentication, ++ Ndis802_11StatusType_MediaStreamMode, ++ Ndis802_11StatusType_PMKID_CandidateList, ++ Ndis802_11StatusTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; ++ ++typedef struct _NDIS_802_11_STATUS_INDICATION ++{ ++ NDIS_802_11_STATUS_TYPE StatusType; ++} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; ++ ++// mask for authentication/integrity fields ++#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f ++#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 ++#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 ++#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 ++#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E ++ ++// MIC check time, 60 seconds. ++#define MIC_CHECK_TIME 60000000 ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_EVENT ++{ ++ NDIS_802_11_STATUS_INDICATION Status; ++ NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; ++} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; ++ ++typedef struct _NDIS_802_11_TEST ++{ ++ ULONG Length; ++ ULONG Type; ++ union ++ { ++ NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; ++ NDIS_802_11_RSSI RssiTrigger; ++ }tt; ++} NDIS_802_11_TEST, *PNDIS_802_11_TEST; ++ ++ ++#endif //PLATFORM_FREEBSD ++#ifndef Ndis802_11APMode ++#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1) ++#endif ++ ++typedef struct _WLAN_PHY_INFO ++{ ++ u8 SignalStrength;//(in percentage) ++ u8 SignalQuality;//(in percentage) ++ u8 Optimum_antenna; //for Antenna diversity ++ u8 Reserved_0; ++}WLAN_PHY_INFO,*PWLAN_PHY_INFO; ++ ++/* temporally add #pragma pack for structure alignment issue of ++* WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() ++*/ ++#ifdef PLATFORM_WINDOWS ++#pragma pack(push) ++#pragma pack(1) ++#endif ++typedef struct _WLAN_BSSID_EX ++{ ++ ULONG Length; ++ NDIS_802_11_MAC_ADDRESS MacAddress; ++ UCHAR Reserved[2];//[0]: IS beacon frame ++ NDIS_802_11_SSID Ssid; ++ ULONG Privacy; ++ NDIS_802_11_RSSI Rssi;//(in dBM,raw data ,get from PHY) ++ NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; ++ NDIS_802_11_CONFIGURATION Configuration; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; ++ NDIS_802_11_RATES_EX SupportedRates; ++ WLAN_PHY_INFO PhyInfo; ++ ULONG IELength; ++ UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) ++} ++#ifndef PLATFORM_WINDOWS ++__attribute__((packed)) ++#endif ++WLAN_BSSID_EX, *PWLAN_BSSID_EX; ++#ifdef PLATFORM_WINDOWS ++#pragma pack(pop) ++#endif ++ ++__inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) ++{ ++ return (sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + bss->IELength); ++} ++ ++struct wlan_network { ++ _list list; ++ int network_type; //refer to ieee80211.h for WIRELESS_11A/B/G ++ int fixed; // set to fixed when not to be removed as site-surveying ++ unsigned long last_scanned; //timestamp for the network ++ int aid; //will only be valid when a BSS is joinned. ++ int join_res; ++ WLAN_BSSID_EX network; //must be the last item ++#ifdef PLATFORM_WINDOWS ++ unsigned char iebuf[MAX_IE_SZ]; ++#endif ++ ++}; ++ ++enum VRTL_CARRIER_SENSE ++{ ++ DISABLE_VCS, ++ ENABLE_VCS, ++ AUTO_VCS ++}; ++ ++enum VCS_TYPE ++{ ++ NONE_VCS, ++ RTS_CTS, ++ CTS_TO_SELF ++}; ++ ++ ++ ++ ++#define PWR_CAM 0 ++#define PWR_MINPS 1 ++#define PWR_MAXPS 2 ++#define PWR_UAPSD 3 ++#define PWR_VOIP 4 ++ ++ ++enum UAPSD_MAX_SP ++{ ++ NO_LIMIT, ++ TWO_MSDU, ++ FOUR_MSDU, ++ SIX_MSDU ++}; ++ ++ ++//john ++#define NUM_PRE_AUTH_KEY 16 ++#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY ++ ++/* ++* WPA2 ++*/ ++ ++#ifndef PLATFORM_OS_CE ++typedef struct _PMKID_CANDIDATE { ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ ULONG Flags; ++} PMKID_CANDIDATE, *PPMKID_CANDIDATE; ++ ++typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST ++{ ++ ULONG Version; // Version of the structure ++ ULONG NumCandidates; // No. of pmkid candidates ++ PMKID_CANDIDATE CandidateList[1]; ++} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; ++ ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION ++{ ++ NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; ++ NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; ++ ++} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; ++ ++typedef struct _NDIS_802_11_CAPABILITY ++{ ++ ULONG Length; ++ ULONG Version; ++ ULONG NoOfPMKIDs; ++ ULONG NoOfAuthEncryptPairsSupported; ++ NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; ++ ++} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; ++#endif ++ ++ ++#endif //#ifndef WLAN_BSSDEF_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/include/xmit_osdep.h +@@ -0,0 +1,95 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __XMIT_OSDEP_H_ ++#define __XMIT_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++struct pkt_file { ++ _pkt *pkt; ++ SIZE_T pkt_len; //the remainder length of the open_file ++ _buffer *cur_buffer; ++ u8 *buf_start; ++ u8 *cur_addr; ++ SIZE_T buf_len; ++}; ++ ++#ifdef PLATFORM_WINDOWS ++ ++#ifdef PLATFORM_OS_XP ++#ifdef CONFIG_USB_HCI ++#include ++#include ++#include ++#endif ++#endif ++ ++#define NR_XMITFRAME 128 ++ ++#define ETH_ALEN 6 ++ ++extern NDIS_STATUS rtw_xmit_entry( ++IN _nic_hdl cnxt, ++IN NDIS_PACKET *pkt, ++IN UINT flags ++); ++ ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++#define NR_XMITFRAME 256 ++extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); ++extern void rtw_xmit_entry_wrap (struct ifnet * pifp); ++#endif //PLATFORM_FREEBSD ++ ++#ifdef PLATFORM_LINUX ++ ++#define NR_XMITFRAME 256 ++ ++struct xmit_priv; ++struct pkt_attrib; ++struct sta_xmit_priv; ++struct xmit_frame; ++struct xmit_buf; ++ ++extern int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); ++extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); ++ ++#endif ++ ++void rtw_os_xmit_schedule(_adapter *padapter); ++ ++int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz); ++void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz); ++ ++extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib); ++ ++extern uint rtw_remainder_len(struct pkt_file *pfile); ++extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile); ++extern uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen); ++extern sint rtw_endofpktfile (struct pkt_file *pfile); ++ ++extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt); ++extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe); ++ ++#endif //__XMIT_OSDEP_H_ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/ioctl_cfg80211.c +@@ -0,0 +1,5589 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_CFG80211_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ ++#include "ioctl_cfg80211.h" ++ ++#define RTW_MAX_MGMT_TX_CNT (8) ++ ++#define RTW_SCAN_IE_LEN_MAX 2304 ++#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 65535 //ms ++#define RTW_MAX_NUM_PMKIDS 4 ++ ++#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ ++ ++static const u32 rtw_cipher_suites[] = { ++ WLAN_CIPHER_SUITE_WEP40, ++ WLAN_CIPHER_SUITE_WEP104, ++ WLAN_CIPHER_SUITE_TKIP, ++ WLAN_CIPHER_SUITE_CCMP, ++#ifdef CONFIG_IEEE80211W ++ WLAN_CIPHER_SUITE_AES_CMAC, ++#endif //CONFIG_IEEE80211W ++}; ++ ++#define RATETAB_ENT(_rate, _rateid, _flags) \ ++ { \ ++ .bitrate = (_rate), \ ++ .hw_value = (_rateid), \ ++ .flags = (_flags), \ ++ } ++ ++#define CHAN2G(_channel, _freq, _flags) { \ ++ .band = NL80211_BAND_2GHZ, \ ++ .center_freq = (_freq), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#define CHAN5G(_channel, _flags) { \ ++ .band = NL80211_BAND_5GHZ, \ ++ .center_freq = 5000 + (5 * (_channel)), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++static struct ieee80211_rate rtw_rates[] = { ++ RATETAB_ENT(10, 0x1, 0), ++ RATETAB_ENT(20, 0x2, 0), ++ RATETAB_ENT(55, 0x4, 0), ++ RATETAB_ENT(110, 0x8, 0), ++ RATETAB_ENT(60, 0x10, 0), ++ RATETAB_ENT(90, 0x20, 0), ++ RATETAB_ENT(120, 0x40, 0), ++ RATETAB_ENT(180, 0x80, 0), ++ RATETAB_ENT(240, 0x100, 0), ++ RATETAB_ENT(360, 0x200, 0), ++ RATETAB_ENT(480, 0x400, 0), ++ RATETAB_ENT(540, 0x800, 0), ++}; ++ ++#define rtw_a_rates (rtw_rates + 4) ++#define RTW_A_RATES_NUM 8 ++#define rtw_g_rates (rtw_rates + 0) ++#define RTW_G_RATES_NUM 12 ++ ++#define RTW_2G_CHANNELS_NUM 14 ++#define RTW_5G_CHANNELS_NUM 37 ++ ++static struct ieee80211_channel rtw_2ghz_channels[] = { ++ CHAN2G(1, 2412, 0), ++ CHAN2G(2, 2417, 0), ++ CHAN2G(3, 2422, 0), ++ CHAN2G(4, 2427, 0), ++ CHAN2G(5, 2432, 0), ++ CHAN2G(6, 2437, 0), ++ CHAN2G(7, 2442, 0), ++ CHAN2G(8, 2447, 0), ++ CHAN2G(9, 2452, 0), ++ CHAN2G(10, 2457, 0), ++ CHAN2G(11, 2462, 0), ++ CHAN2G(12, 2467, 0), ++ CHAN2G(13, 2472, 0), ++ CHAN2G(14, 2484, 0), ++}; ++ ++static struct ieee80211_channel rtw_5ghz_a_channels[] = { ++ CHAN5G(34, 0), CHAN5G(36, 0), ++ CHAN5G(38, 0), CHAN5G(40, 0), ++ CHAN5G(42, 0), CHAN5G(44, 0), ++ CHAN5G(46, 0), CHAN5G(48, 0), ++ CHAN5G(52, 0), CHAN5G(56, 0), ++ CHAN5G(60, 0), CHAN5G(64, 0), ++ CHAN5G(100, 0), CHAN5G(104, 0), ++ CHAN5G(108, 0), CHAN5G(112, 0), ++ CHAN5G(116, 0), CHAN5G(120, 0), ++ CHAN5G(124, 0), CHAN5G(128, 0), ++ CHAN5G(132, 0), CHAN5G(136, 0), ++ CHAN5G(140, 0), CHAN5G(149, 0), ++ CHAN5G(153, 0), CHAN5G(157, 0), ++ CHAN5G(161, 0), CHAN5G(165, 0), ++ CHAN5G(184, 0), CHAN5G(188, 0), ++ CHAN5G(192, 0), CHAN5G(196, 0), ++ CHAN5G(200, 0), CHAN5G(204, 0), ++ CHAN5G(208, 0), CHAN5G(212, 0), ++ CHAN5G(216, 0), ++}; ++ ++ ++void rtw_2g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_2ghz_channels, ++ sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_5g_channels_init(struct ieee80211_channel *channels) ++{ ++ _rtw_memcpy((void*)channels, (void*)rtw_5ghz_a_channels, ++ sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ ); ++} ++ ++void rtw_2g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_g_rates, ++ sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM ++ ); ++} ++ ++void rtw_5g_rates_init(struct ieee80211_rate *rates) ++{ ++ _rtw_memcpy(rates, rtw_a_rates, ++ sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM ++ ); ++} ++ ++struct ieee80211_supported_band *rtw_spt_band_alloc( ++ enum nl80211_band band ++ ) ++{ ++ struct ieee80211_supported_band *spt_band = NULL; ++ int n_channels, n_bitrates; ++ ++ if(band == NL80211_BAND_2GHZ) ++ { ++ n_channels = RTW_2G_CHANNELS_NUM; ++ n_bitrates = RTW_G_RATES_NUM; ++ } ++ else if(band == NL80211_BAND_5GHZ) ++ { ++ n_channels = RTW_5G_CHANNELS_NUM; ++ n_bitrates = RTW_A_RATES_NUM; ++ } ++ else ++ { ++ goto exit; ++ } ++ ++ spt_band = (struct ieee80211_supported_band *)rtw_zmalloc( ++ sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*n_channels ++ + sizeof(struct ieee80211_rate)*n_bitrates ++ ); ++ if(!spt_band) ++ goto exit; ++ ++ spt_band->channels = (struct ieee80211_channel*)(((u8*)spt_band)+sizeof(struct ieee80211_supported_band)); ++ spt_band->bitrates= (struct ieee80211_rate*)(((u8*)spt_band->channels)+sizeof(struct ieee80211_channel)*n_channels); ++ spt_band->band = band; ++ spt_band->n_channels = n_channels; ++ spt_band->n_bitrates = n_bitrates; ++ ++ if(band == NL80211_BAND_2GHZ) ++ { ++ rtw_2g_channels_init(spt_band->channels); ++ rtw_2g_rates_init(spt_band->bitrates); ++ } ++ else if(band == NL80211_BAND_5GHZ) ++ { ++ rtw_5g_channels_init(spt_band->channels); ++ rtw_5g_rates_init(spt_band->bitrates); ++ } ++ ++ //spt_band.ht_cap ++ ++exit: ++ ++ return spt_band; ++} ++ ++void rtw_spt_band_free(struct ieee80211_supported_band *spt_band) ++{ ++ u32 size = 0; ++ ++ if(!spt_band) ++ return; ++ ++ if(spt_band->band == NL80211_BAND_2GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_2G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_G_RATES_NUM; ++ } ++ else if(spt_band->band == NL80211_BAND_5GHZ) ++ { ++ size = sizeof(struct ieee80211_supported_band) ++ + sizeof(struct ieee80211_channel)*RTW_5G_CHANNELS_NUM ++ + sizeof(struct ieee80211_rate)*RTW_A_RATES_NUM; ++ } ++ else ++ { ++ ++ } ++ rtw_mfree((u8*)spt_band, size); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++static const struct ieee80211_txrx_stypes ++rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { ++ [NL80211_IFTYPE_ADHOC] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_STATION] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_AP] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_AP_VLAN] = { ++ /* copy AP */ ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_CLIENT] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_GO] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++}; ++#endif ++ ++static int rtw_ieee80211_channel_to_frequency(int chan, int band) ++{ ++ /* see 802.11 17.3.8.3.2 and Annex J ++ * there are overlapping channel numbers in 5GHz and 2GHz bands */ ++ ++ if (band == NL80211_BAND_5GHZ) { ++ if (chan >= 182 && chan <= 196) ++ return 4000 + chan * 5; ++ else ++ return 5000 + chan * 5; ++ } else { /* NL80211_BAND_2GHZ */ ++ if (chan == 14) ++ return 2484; ++ else if (chan < 14) ++ return 2407 + chan * 5; ++ else ++ return 0; /* not supported */ ++ } ++} ++ ++#define MAX_BSSINFO_LEN 1000 ++static int rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ int ret=0; ++ struct ieee80211_channel *notify_channel; ++ struct cfg80211_bss *bss; ++ //struct ieee80211_supported_band *band; ++ u16 channel; ++ u32 freq; ++ u64 notify_timestamp; ++ u16 notify_capability; ++ u16 notify_interval; ++ u8 *notify_ie; ++ size_t notify_ielen; ++ s32 notify_signal; ++ u8 *buf, *pbuf; ++ size_t len,bssinf_len=0; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = wdev->wiphy; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //DBG_8192C("%s\n", __func__); ++ ++ bssinf_len = pnetwork->network.IELength+sizeof (struct rtw_ieee80211_hdr_3addr); ++ if(bssinf_len > MAX_BSSINFO_LEN){ ++ DBG_871X("%s IE Length too long > %d byte \n",__FUNCTION__,MAX_BSSINFO_LEN); ++ goto exit; ++ } ++ ++ //To reduce PBC Overlap rate ++ //_enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if(wdev_to_priv(wdev)->scan_request != NULL) ++ { ++ u8 *psr=NULL, sr = 0; ++ NDIS_802_11_SSID *pssid = &pnetwork->network.Ssid; ++ struct cfg80211_scan_request *request = wdev_to_priv(wdev)->scan_request; ++ struct cfg80211_ssid *ssids = request->ssids; ++ u32 wpsielen=0; ++ u8 *wpsie=NULL; ++ ++ wpsie = rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); ++ ++ if(wpsie && wpsielen>0) ++ psr = rtw_get_wps_attr_content(wpsie, wpsielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ if(request->n_ssids == 1 && request->n_channels == 1) // it means under processing WPS ++ { ++ DBG_8192C("ssid=%s, len=%d\n", pssid->Ssid, pssid->SsidLength); ++ ++ if(pssid->SsidLength == ssids[0].ssid_len && ++ _rtw_memcmp(pssid->Ssid, ssids[0].ssid, ssids[0].ssid_len)) ++ { ++ DBG_871X("%s, got sr and ssid match!\n", __func__); ++ } ++ else ++ { ++ if(psr !=NULL) ++ *psr = 0; //clear sr ++ ++#if 0 ++ WLAN_BSSID_EX *pselect_network = &pnetwork->network; ++ struct cfg80211_bss *pselect_bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ DBG_871X("%s, got sr, but ssid mismatch, to remove this bss\n", __func__); ++ ++ if (pselect_network->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(pselect_network->Configuration.DSConfig, NL80211_BAND_5GHZ); ++ ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ pselect_bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, ++ pselect_network->MacAddress, pselect_network->Ssid.Ssid, ++ pselect_network->Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, ++ 0/*WLAN_CAPABILITY_ESS*/); ++ ++ if(pselect_bss) ++ { ++ DBG_871X("%s, got bss for cfg80211 for unlinking bss\n", __func__); ++ ++ cfg80211_unlink_bss(wiphy, pselect_bss); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, pselect_bss); ++#else ++ cfg80211_put_bss(pselect_bss); ++#endif ++ ++ } ++ ++ goto exit; ++#endif ++ } ++ } ++ } ++ } ++ //_exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ channel = pnetwork->network.Configuration.DSConfig; ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ ++ //rtw_get_timestampe_from_ie() ++ notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */ ++ ++ notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); ++ notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); ++ ++ ++ notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; ++ notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; ++ ++ //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) ++ if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && ++ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) { ++ notify_signal = 100*translate_percentage_to_dbm(padapter->recvpriv.signal_strength);//dbm ++ } else { ++ notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm ++ } ++ ++/* ++ DBG_8192C("bssid: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", ++ pnetwork->network.MacAddress[0], pnetwork->network.MacAddress[1], pnetwork->network.MacAddress[2], ++ pnetwork->network.MacAddress[3], pnetwork->network.MacAddress[4], pnetwork->network.MacAddress[5]); ++ DBG_8192C("Channel: %d(%d)\n", channel, freq); ++ DBG_8192C("Capability: %X\n", notify_capability); ++ DBG_8192C("Beacon interval: %d\n", notify_interval); ++ DBG_8192C("Signal: %d\n", notify_signal); ++ DBG_8192C("notify_timestamp: %#018llx\n", notify_timestamp); ++*/ ++ ++ buf = rtw_zmalloc(MAX_BSSINFO_LEN); ++ pbuf = buf; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_BEACON); ++ } else { ++ _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ SetFrameSubType(pbuf, WIFI_PROBERSP); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); ++ ++ ++ pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ _rtw_memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength); ++ len += pnetwork->network.IELength; ++ ++ rtw_mfree(buf, MAX_BSSINFO_LEN); ++ ++ //#ifdef CONFIG_P2P ++ //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) ++ //{ ++ // DBG_8192C("%s, got p2p_ie\n", __func__); ++ //} ++ //#endif ++ ++ ++#if 1 ++ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, ++ len, notify_signal, GFP_ATOMIC); ++#else ++ ++ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, ++ notify_timestamp, notify_capability, notify_interval, notify_ie, ++ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); ++#endif ++ ++ if (unlikely(!bss)) { ++ DBG_8192C("rtw_cfg80211_inform_bss error\n"); ++ return -EINVAL; ++ } ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38)) ++#ifndef COMPAT_KERNEL_RELEASE ++ //patch for cfg80211, update beacon ies to information_elements ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ ++ if(bss->len_information_elements != bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++#endif //COMPAT_KERNEL_RELEASE ++#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38) ++ ++/* ++ { ++ if( bss->information_elements == bss->proberesp_ies) ++ { ++ if( bss->len_information_elements != bss->len_proberesp_ies) ++ { ++ DBG_8192C("error!, len_information_elements != bss->len_proberesp_ies\n"); ++ } ++ ++ } ++ else if(bss->len_information_elements < bss->len_beacon_ies) ++ { ++ bss->information_elements = bss->beacon_ies; ++ bss->len_information_elements = bss->len_beacon_ies; ++ } ++ } ++*/ ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) ++ cfg80211_put_bss(wiphy, bss); ++#else ++ cfg80211_put_bss(bss); ++#endif ++ ++exit: ++ return ret; ++ ++} ++ ++/* ++ Check the given bss is valid by kernel API cfg80211_get_bss() ++ @padapter : the given adapter ++ ++ return _TRUE if bss is valid, _FALSE for not found. ++*/ ++int rtw_cfg80211_check_bss(_adapter *padapter) ++{ ++ WLAN_BSSID_EX *pnetwork = &(padapter->mlmeextpriv.mlmext_info.network); ++ struct cfg80211_bss *bss = NULL; ++ struct ieee80211_channel *notify_channel = NULL; ++ u32 freq; ++ ++ if (!(pnetwork) || !(padapter->rtw_wdev)) ++ return _FALSE; ++ ++ if (pnetwork->Configuration.DSConfig <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(pnetwork->Configuration.DSConfig, NL80211_BAND_5GHZ); ++ ++ notify_channel = ieee80211_get_channel(padapter->rtw_wdev->wiphy, freq); ++ bss = cfg80211_get_bss(padapter->rtw_wdev->wiphy, notify_channel, ++ pnetwork->MacAddress, pnetwork->Ssid.Ssid, ++ pnetwork->Ssid.SsidLength, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0) ++ WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); ++#else ++ IEEE80211_BSS_TYPE_ESS, IEEE80211_PRIVACY_ANY); ++#endif ++ ++ return (bss!=NULL); ++} ++ ++void rtw_cfg80211_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ struct cfg80211_bss *bss = NULL; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if (rtw_to_roaming(padapter) > 0) { ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) ++ struct wiphy *wiphy = pwdev->wiphy; ++ struct ieee80211_channel *notify_channel; ++ u32 freq; ++ u16 channel = cur_network->network.Configuration.DSConfig; ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ #endif ++ ++ DBG_871X("%s call cfg80211_roamed\n", __FUNCTION__); ++ #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) ++ { ++ struct cfg80211_roam_info roam_info = { ++ .channel = notify_channel, ++ .bssid = cur_network->network.MacAddress, ++ .req_ie = pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2, ++ .req_ie_len = pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2, ++ .resp_ie = pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6, ++ .resp_ie_len = pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6, ++ }; ++ cfg80211_roamed(padapter->pnetdev, &roam_info, GFP_ATOMIC); ++ } ++ #else ++ cfg80211_roamed(padapter->pnetdev ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) ++ , notify_channel ++ #endif ++ , cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , GFP_ATOMIC); ++ #endif ++ } ++ else ++ #endif ++ { ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress ++ , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 ++ , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 ++ , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 ++ , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 ++ , WLAN_STATUS_SUCCESS, GFP_ATOMIC); ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ } ++} ++ ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++#ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ if (!padapter->mlmepriv.not_indic_disco) { ++ DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); ++ ++ if (check_fwstate(pmlmepriv, WIFI_UNDER_LINKING)) { ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); ++ } else { ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4,2,0) ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); ++#else ++ cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, false, GFP_ATOMIC); ++#endif ++ } ++ ++ DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); ++ } ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ if (is_wep_enc(alg)) ++ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = 1; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ keylen = 16; ++ break; ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++ ++ ++} ++ ++static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ return set_group_key(padapter, key, alg, keyid); ++ ++} ++ ++static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(wep_key_len == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ set_wep_key(padapter, param->u.crypt.key, wep_key_len, wep_key_idx); ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ if(param->u.crypt.set_tx == 0) //group key ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) //pairwise key ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ psta->bpairwise_key_installed = _TRUE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++#endif ++ ++static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif //CONFIG_IEEE80211W ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ if ((wep_key_idx > WEP_KEYS) || (wep_key_len <= 0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (psecuritypriv->bWepDefaultKeyIdxSet == 0) ++ { ++ //wep default key has not been set, so use this key index as default key. ++ ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ ++ if(wep_key_len==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), param->u.crypt.key, wep_key_len); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = wep_key_len; ++ ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ //DBG_8192C("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ DBG_8192C("%s, : Obtain Sta_info fail \n", __func__); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ ++ DBG_8192C("%s, : param->u.crypt.set_tx ==1 \n", __func__); ++ ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ else//group key ++ { ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if(strcmp(param->u.crypt.alg, "BIP") == 0) ++ { ++ int no; ++ //DBG_871X("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); ++ //save the IGTK key, length 16 bytes ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ /*DBG_871X("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ DBG_871X("\n");*/ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ } ++#endif //CONFIG_IEEE80211W ++ ++#ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++exit: ++ ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ struct key_params *params) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ int ret=0; ++ struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" adding key for %pM\n", FUNC_NDEV_ARG(ndev), mac_addr); ++ DBG_871X("cipher=0x%x\n", params->cipher); ++ DBG_871X("key_len=0x%x\n", params->key_len); ++ DBG_871X("seq_len=0x%x\n", params->seq_len); ++ DBG_871X("key_index=%d\n", key_index); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ DBG_871X("pairwise=%d\n", pairwise); ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ ++ param_len = sizeof(struct ieee_param) + params->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ switch (params->cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ case WLAN_CIPHER_SUITE_WEP104: ++ alg_name = "WEP"; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ alg_name = "CCMP"; ++ break; ++#ifdef CONFIG_IEEE80211W ++ case WLAN_CIPHER_SUITE_AES_CMAC: ++ alg_name = "BIP"; ++ break; ++#endif //CONFIG_IEEE80211W ++ default: ++ return -ENOTSUPP; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if (!mac_addr || is_broadcast_ether_addr(mac_addr)) ++ { ++ param->u.crypt.set_tx = 0; //for wpa/wpa2 group key ++ } else { ++ param->u.crypt.set_tx = 1; //for wpa/wpa2 pairwise key ++ } ++ ++ ++ //param->u.crypt.idx = key_index - 1; ++ param->u.crypt.idx = key_index; ++ ++ if (params->seq_len && params->seq) ++ { ++ _rtw_memcpy(param->u.crypt.seq, params->seq, params->seq_len); ++ } ++ ++ if(params->key_len && params->key) ++ { ++ param->u.crypt.key_len = params->key_len; ++ _rtw_memcpy(param->u.crypt.key, params->key, params->key_len); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_AP_MODE ++ if(mac_addr) ++ _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ ++ ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); ++#endif ++ } ++ else ++ { ++ DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ++ } ++ ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ void *cookie, ++ void (*callback)(void *cookie, ++ struct key_params*)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ struct iwm_key *key = &iwm->keys[key_index]; ++ struct key_params params; ++ ++ IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); ++ ++ memset(¶ms, 0, sizeof(params)); ++ ++ params.cipher = key->cipher; ++ params.key_len = key->key_len; ++ params.seq_len = key->seq_len; ++ params.seq = key->seq; ++ params.key = key->key; ++ ++ callback(cookie, ¶ms); ++ ++ return key->key_len ? 0 : -ENOENT; ++#endif ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ u8 key_index, bool pairwise, const u8 *mac_addr) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" key_index=%d\n", FUNC_NDEV_ARG(ndev), key_index); ++ ++ if (key_index == psecuritypriv->dot11PrivacyKeyIndex) ++ { ++ //clear the flag of wep default key set. ++ psecuritypriv->bWepDefaultKeyIdxSet = 0; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, ++ struct net_device *ndev, u8 key_index ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ , bool unicast, bool multicast ++ #endif ++ ) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT" key_index=%d" ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ ", unicast=%d, multicast=%d" ++ #endif ++ ".\n", FUNC_NDEV_ARG(ndev), key_index ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ , unicast, multicast ++ #endif ++ ); ++ ++ if ((key_index < WEP_KEYS) && ((psecuritypriv->dot11PrivacyAlgrthm == _WEP40_) || (psecuritypriv->dot11PrivacyAlgrthm == _WEP104_))) //set wep default key ++ { ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ psecuritypriv->dot11PrivacyKeyIndex = key_index; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if (psecuritypriv->dot11DefKeylen[key_index] == 13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm = _WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ psecuritypriv->bWepDefaultKeyIdxSet = 1; //set the flag to represent that wep default key has been set ++ } ++ ++ return 0; ++ ++} ++ ++static int cfg80211_rtw_get_station(struct wiphy *wiphy, ++ struct net_device *ndev, ++ const u8 *mac, struct station_info *sinfo) ++{ ++ int ret = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sinfo->filled = 0; ++ ++ if (!mac) { ++ DBG_871X(FUNC_NDEV_FMT" mac==%p\n", FUNC_NDEV_ARG(ndev), mac); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, mac); ++ if (psta == NULL) { ++ DBG_8192C("%s, sta_info is null\n", __func__); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_NDEV_FMT" mac="MAC_FMT"\n", FUNC_NDEV_ARG(ndev), MAC_ARG(mac)); ++#endif ++ ++ //for infra./P2PClient mode ++ if( check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ if (_rtw_memcmp(mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { ++ DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); ++ ret = -ENOENT; ++ goto exit; ++ } ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0)) ++ sinfo->filled |= BIT(NL80211_STA_INFO_SIGNAL); ++#else ++ sinfo->filled |= STATION_INFO_SIGNAL; ++#endif ++ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0)) ++ sinfo->filled |= BIT(NL80211_STA_INFO_TX_BITRATE); ++#else ++ sinfo->filled |= STATION_INFO_TX_BITRATE; ++#endif ++ sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0)) ++ sinfo->filled |= BIT(NL80211_STA_INFO_RX_PACKETS); ++#else ++ sinfo->filled |= STATION_INFO_RX_PACKETS; ++#endif ++ sinfo->rx_packets = sta_rx_data_pkts(psta); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,0,0)) ++ sinfo->filled |= BIT(NL80211_STA_INFO_TX_PACKETS); ++#else ++ sinfo->filled |= STATION_INFO_TX_PACKETS; ++#endif ++ sinfo->tx_packets = psta->sta_stats.tx_pkts; ++ ++ } ++ ++ //for Ad-Hoc/AP mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ //TODO: should acquire station info... ++ } ++ ++exit: ++ return ret; ++} ++ ++extern int netdev_open(struct net_device *pnetdev); ++#ifdef CONFIG_CONCURRENT_MODE ++extern int netdev_if2_open(struct net_device *pnetdev); ++#endif ++ ++/* ++enum nl80211_iftype { ++ NL80211_IFTYPE_UNSPECIFIED, ++ NL80211_IFTYPE_ADHOC, //1 ++ NL80211_IFTYPE_STATION, //2 ++ NL80211_IFTYPE_AP, //3 ++ NL80211_IFTYPE_AP_VLAN, ++ NL80211_IFTYPE_WDS, ++ NL80211_IFTYPE_MONITOR, //6 ++ NL80211_IFTYPE_MESH_POINT, ++ NL80211_IFTYPE_P2P_CLIENT, //8 ++ NL80211_IFTYPE_P2P_GO, //9 ++ //keep last ++ NUM_NL80211_IFTYPES, ++ NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 ++}; ++*/ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0) ++static int cfg80211_rtw_change_iface(struct wiphy *wiphy, ++ struct net_device *ndev, ++ enum nl80211_iftype type, ++ struct vif_params *params) ++#else ++static int cfg80211_rtw_change_iface(struct wiphy *wiphy, ++ struct net_device *ndev, ++ enum nl80211_iftype type, u32 *flags, ++ struct vif_params *params) ++#endif ++{ ++ enum nl80211_iftype old_type; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _queue *queue = &pmlmepriv->scanned_queue; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ int ret = 0; ++ u8 change = _FALSE; ++ ++ if (adapter_to_dvobj(padapter)->processing_dev_remove == _TRUE) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type == SECONDARY_ADAPTER) ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_if2_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_if2_open(ndev) != 0) { ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ else if(padapter->adapter_type == PRIMARY_ADAPTER) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ DBG_871X(FUNC_NDEV_FMT" call netdev_open\n", FUNC_NDEV_ARG(ndev)); ++ if(netdev_open(ndev) != 0) { ++ ret= -EPERM; ++ goto exit; ++ } ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ old_type = rtw_wdev->iftype; ++ DBG_871X(FUNC_NDEV_FMT" old_iftype=%d, new_iftype=%d\n", ++ FUNC_NDEV_ARG(ndev), old_type, type); ++ ++ if(old_type != type) ++ { ++ change = _TRUE; ++ pmlmeext->action_public_rxseq = 0xffff; ++ pmlmeext->action_public_dialog_token = 0xff; ++ } ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ networkType = Ndis802_11Infrastructure; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ DBG_8192C("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ } ++ #endif //CONFIG_P2P ++ break; ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ networkType = Ndis802_11APMode; ++ #ifdef CONFIG_P2P ++ if(pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ #endif //CONFIG_P2P ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ rtw_wdev->iftype = type; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ goto exit; ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ rtw_setopmode_cmd(padapter, networkType); ++ ++exit: ++ ++ return ret; ++} ++ ++void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if(pwdev_priv->scan_request != NULL) ++ { ++ //struct cfg80211_scan_request *scan_request = pwdev_priv->scan_request; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s with scan req\n", __FUNCTION__); ++ #endif ++ ++ //avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); ++ //if(scan_request == wiphy_to_dev(scan_request->wiphy)->scan_req) ++ if(pwdev_priv->scan_request->wiphy != pwdev_priv->rtw_wdev->wiphy) ++ { ++ DBG_8192C("error wiphy compare\n"); ++ } ++ else ++ { ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0)) ++ cfg80211_scan_done(pwdev_priv->scan_request, aborted); ++#else ++ struct cfg80211_scan_info info = { ++ .aborted = aborted ++ }; ++ cfg80211_scan_done(pwdev_priv->scan_request, &info); ++#endif ++ } ++ ++ pwdev_priv->scan_request = NULL; ++ ++ } else { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s without scan req\n", __FUNCTION__); ++ #endif ++ } ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++} ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s\n", __func__); ++#endif ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ ) ++ { ++ //ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ rtw_cfg80211_inform_bss(padapter, pnetwork); ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ //call this after other things have been done ++ rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), _FALSE); ++} ++ ++static int rtw_cfg80211_set_probe_req_wpsp2pie(_adapter *padapter, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_req_ie_len = wps_ielen; ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ struct wifidirect_info *wdinfo = &padapter->wdinfo; ++ u32 attr_contentlen = 0; ++ u8 listen_ch_attr[5]; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; ++ pmlmepriv->p2p_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); ++ pmlmepriv->p2p_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; ++ ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_LISTEN_CH, (u8*)listen_ch_attr, (uint*) &attr_contentlen) ++ && attr_contentlen == 5) ++ { ++ if (wdinfo->listen_channel != listen_ch_attr[4]) { ++ DBG_871X(FUNC_ADPT_FMT" listen channel - country:%c%c%c, class:%u, ch:%u\n", ++ FUNC_ADPT_ARG(padapter), listen_ch_attr[0], listen_ch_attr[1], listen_ch_attr[2], ++ listen_ch_attr[3], listen_ch_attr[4]); ++ wdinfo->listen_channel = listen_ch_attr[4]; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ //buf += p2p_ielen; ++ //len -= p2p_ielen; ++ ++ #ifdef CONFIG_WFD ++ if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_req_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if(pmlmepriv->wfd_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wfd_probe_req_ie_len; ++ pmlmepriv->wfd_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wfd_probe_req_ie, free_len); ++ pmlmepriv->wfd_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wfd_probe_req_ie = rtw_malloc(wfd_ielen); ++ if ( pmlmepriv->wfd_probe_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_req_ie, &pmlmepriv->wfd_probe_req_ie_len); ++ } ++ #endif //CONFIG_WFD ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_scan(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ , struct net_device *ndev ++ #endif ++ , struct cfg80211_scan_request *request) ++{ ++ int i; ++ u8 _status = _FALSE; ++ int ret = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT]; ++ _irqL irqL; ++ u8 *wps_ie=NULL; ++ uint wps_ielen=0; ++ u8 *p2p_ie=NULL; ++ uint p2p_ielen=0; ++ u8 survey_times=3; ++ u8 survey_times_for_one_ch=6; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct cfg80211_ssid *ssids = request->ssids; ++ int social_channel = 0, j = 0; ++ bool need_indicate_scan_done = _FALSE; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = NULL; ++ struct mlme_priv *pbuddy_mlmepriv = NULL; ++#endif //CONFIG_CONCURRENT_MODE ++ ++//#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++//#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->pbuddy_adapter) { ++ pbuddy_adapter = padapter->pbuddy_adapter; ++ pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ret = -EPERM; ++ goto exit; ++ } ++#endif ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ pwdev_priv->scan_request = request; ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s under WIFI_AP_STATE\n", __FUNCTION__); ++#endif ++ ++ if (check_fwstate(pmlmepriv, WIFI_UNDER_WPS|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ DBG_8192C("AP mode process WPS \n"); ++ } ++ ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ #ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(ssids->ssid != NULL ++ && _rtw_memcmp(ssids->ssid, "DIRECT-", 7) ++ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) ++ ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ u32 initialgain = 0x30; ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)&(initialgain)); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)&(initialgain)); ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ if(request->n_channels == 3 && ++ request->channels[0]->hw_value == 1 && ++ request->channels[1]->hw_value == 6 && ++ request->channels[2]->hw_value == 11 ++ ) ++ { ++ social_channel = 1; ++ } ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ if(request->ie && request->ie_len>0) ++ { ++ rtw_cfg80211_set_probe_req_wpsp2pie(padapter, (u8 *)request->ie, request->ie_len ); ++ } ++ ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++ DBG_8192C("%s, bBusyTraffic == _TRUE\n", __func__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ if (rtw_is_scan_deny(padapter)){ ++ DBG_871X(FUNC_ADPT_FMT ": scan deny\n", FUNC_ADPT_ARG(padapter)); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pbuddy_mlmepriv && (pbuddy_mlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++ DBG_8192C("%s, bBusyTraffic == _TRUE at buddy_intf\n", __func__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++#endif //CONFIG_CONCURRENT_MODE ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_8192C("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, ++ _FW_UNDER_SURVEY|_FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ if(check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) ++ { ++ DBG_8192C("scanning_via_buddy_intf\n"); ++ pmlmepriv->scanning_via_buddy_intf = _TRUE; ++ } ++ ++ DBG_8192C("buddy_intf's mlme state:0x%x\n", pbuddy_mlmepriv->fw_state); ++ ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++#endif ++ ++ ++#ifdef CONFIG_P2P ++ if( pwdinfo->driver_interface == DRIVER_CFG80211 ) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ if(social_channel == 0) ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ else ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); ++ } ++ } ++#endif //CONFIG_P2P ++ ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ //parsing request ssids, n_ssids ++ for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); ++ #endif ++ _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); ++ ssid[i].SsidLength = ssids[i].ssid_len; ++ } ++ ++ ++ /* parsing channels, n_channels */ ++ _rtw_memset(ch, 0, sizeof(struct rtw_ieee80211_channel)*RTW_CHANNEL_SCAN_AMOUNT); ++ for (i=0;in_channels && ichannels[i])); ++ #endif ++ ch[i].hw_value = request->channels[i]->hw_value; ++ ch[i].flags = request->channels[i]->flags; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if (request->n_channels == 1) { ++ for(i=1;in_channels == 2) { ++ _rtw_memcpy(&ch[3], &ch[1], sizeof(struct rtw_ieee80211_channel)); ++ for(i=1;ilock, &irqL); ++ ++ ++ if(_status == _FALSE) ++ { ++ ret = -1; ++ } ++ ++check_need_indicate_scan_done: ++ if(need_indicate_scan_done) ++ rtw_cfg80211_surveydone_event_callback(padapter); ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (changed & WIPHY_PARAM_RTS_THRESHOLD && ++ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { ++ int ret; ++ ++ iwm->conf.rts_threshold = wiphy->rts_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_RTS_THRESHOLD, ++ iwm->conf.rts_threshold); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && ++ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { ++ int ret; ++ ++ iwm->conf.frag_threshold = wiphy->frag_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, ++ CFG_FRAG_THRESHOLD, ++ iwm->conf.frag_threshold); ++ if (ret < 0) ++ return ret; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ibss_params *params) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ struct ieee80211_channel *chan = params->channel; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return -EIO; ++ ++ /* UMAC doesn't support creating or joining an IBSS network ++ * with specified bssid. */ ++ if (params->bssid) ++ return -EOPNOTSUPP; ++ ++ iwm->channel = ieee80211_frequency_to_channel(chan->center_freq); ++ iwm->umac_profile->ibss.band = chan->band; ++ iwm->umac_profile->ibss.channel = iwm->channel; ++ iwm->umac_profile->ssid.ssid_len = params->ssid_len; ++ memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len); ++ ++ return iwm_send_mlme_profile(iwm); ++#endif ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *ndev) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (iwm->umac_profile_active) ++ return iwm_invalidate_mlme_profile(iwm); ++#endif ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) ++{ ++ DBG_8192C("%s, wpa_version=%d\n", __func__, wpa_version); ++ ++ if (!wpa_version) { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ return 0; ++ } ++ ++ ++ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; ++ } ++ ++/* ++ if (wpa_version & NL80211_WPA_VERSION_2) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++*/ ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, ++ enum nl80211_auth_type sme_auth_type) ++{ ++ DBG_8192C("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); ++ ++ ++ switch (sme_auth_type) { ++ case NL80211_AUTHTYPE_AUTOMATIC: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ ++ break; ++ case NL80211_AUTHTYPE_OPEN_SYSTEM: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ ++ if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ ++ break; ++ case NL80211_AUTHTYPE_SHARED_KEY: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ ++ break; ++ default: ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ //return -ENOTSUPP; ++ } ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) ++{ ++ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ ++ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : ++ &psecuritypriv->dot118021XGrpPrivacy; ++ ++ DBG_8192C("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); ++ ++ ++ if (!cipher) { ++ *profile_cipher = _NO_PRIVACY_; ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ return 0; ++ } ++ ++ switch (cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ *profile_cipher = _NO_PRIVACY_; ++ ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ *profile_cipher = _WEP40_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP104: ++ *profile_cipher = _WEP104_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ *profile_cipher = _TKIP_; ++ ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ *profile_cipher = _AES_; ++ ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ default: ++ DBG_8192C("Unsupported cipher: 0x%x\n", cipher); ++ return -ENOTSUPP; ++ } ++ ++ if(ucast) ++ { ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ ++ //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) ++ // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) ++{ ++ DBG_8192C("%s, key_mgt=0x%x\n", __func__, key_mgt); ++ ++ if (key_mgt == WLAN_AKM_SUITE_8021X) ++ //*auth_type = UMAC_AUTH_TYPE_8021X; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ else if (key_mgt == WLAN_AKM_SUITE_PSK) { ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ } else { ++ DBG_8192C("Invalid key mgt: 0x%x\n", key_mgt); ++ //return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, const u8 *pie, size_t ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++ int wpa_ielen=0; ++ int wpa2_ielen=0; ++ u8 *pwpa, *pwpa2; ++ u8 null_addr[]= {0,0,0,0,0,0}; ++ ++ if (pie == NULL || !ielen) { ++ /* Treat this as normal case, but need to clear WIFI_UNDER_WPS */ ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ goto exit; ++ } ++ ++ if (ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_8192C("set wpa_ie(length:%zu):\n", ielen); ++ for(i=0;i0) ++ { ++ if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); ++ ++ DBG_8192C("got wpa_ie, wpa_ielen:%u\n", wpa_ielen); ++ } ++ } ++ ++ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); ++ if(pwpa2 && wpa2_ielen>0) ++ { ++ if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); ++ ++ DBG_8192C("got wpa2_ie, wpa2_ielen:%u\n", wpa2_ielen); ++ } ++ } ++ ++ if (group_cipher == 0) ++ { ++ group_cipher = WPA_CIPHER_NONE; ++ } ++ if (pairwise_cipher == 0) ++ { ++ pairwise_cipher = WPA_CIPHER_NONE; ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ {/* handle wps_ie */ ++ uint wps_ielen; ++ u8 *wps_ie; ++ ++ wps_ie = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); ++ if (wps_ie && wps_ielen > 0) { ++ DBG_8192C("got wps_ie, wps_ielen:%u\n", wps_ielen); ++ padapter->securitypriv.wps_ie_len = wps_ielensecuritypriv.wps_ie, wps_ie, padapter->securitypriv.wps_ie_len); ++ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } else { ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ } ++ } ++ ++ #ifdef CONFIG_P2P ++ {//check p2p_ie for assoc req; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_assoc_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; ++ pmlmepriv->p2p_assoc_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); ++ pmlmepriv->p2p_assoc_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_assoc_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ goto exit; ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; ++ } ++ } ++ #endif //CONFIG_P2P ++ ++ #ifdef CONFIG_WFD ++ {//check wfd_ie for assoc req; ++ uint wfd_ielen=0; ++ u8 *wfd_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(rtw_get_wfd_ie(buf, ielen, NULL, &wfd_ielen)) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s wfd_assoc_req_ielen=%d\n", __FUNCTION__, wfd_ielen); ++ #endif ++ ++ if(pmlmepriv->wfd_assoc_req_ie) ++ { ++ u32 free_len = pmlmepriv->wfd_assoc_req_ie_len; ++ pmlmepriv->wfd_assoc_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wfd_assoc_req_ie, free_len); ++ pmlmepriv->wfd_assoc_req_ie = NULL; ++ } ++ ++ pmlmepriv->wfd_assoc_req_ie = rtw_malloc(wfd_ielen); ++ if ( pmlmepriv->wfd_assoc_req_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ goto exit; ++ } ++ rtw_get_wfd_ie(buf, ielen, pmlmepriv->wfd_assoc_req_ie, &pmlmepriv->wfd_assoc_req_ie_len); ++ } ++ } ++ #endif //CONFIG_WFD ++ ++ //TKIP and AES disallow multicast packets until installing group key ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) ++ //WPS open need to enable multicast ++ //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) ++ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ if (buf) ++ rtw_mfree(buf, ielen); ++ if (ret) ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ return ret; ++} ++ ++static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_connect_params *sme) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead; ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ u8 *dst_bssid, *src_bssid; ++ //u8 matched_by_bssid=_FALSE; ++ //u8 matched_by_ssid=_FALSE; ++ u8 matched=_FALSE; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++ DBG_871X("=>"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ DBG_871X("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", ++ sme->privacy, sme->key, sme->key_len, sme->key_idx); ++ ++ ++ if(wdev_to_priv(padapter->rtw_wdev)->block == _TRUE) ++ { ++ ret = -EBUSY; ++ DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); ++ goto exit; ++ } ++ ++#ifdef CONFIG_PLATFORM_MSTAR ++ printk("MStar Android!\n"); ++ if((wdev_to_priv(padapter->rtw_wdev))->bandroid_scan == _FALSE) ++ { ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++#endif //CONFIG_P2P ++ { ++ ret = -EBUSY; ++ printk("Android hasn't attached yet!\n"); ++ goto exit; ++ } ++ } ++#endif ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_LINKING) == _TRUE) { ++ DBG_8192C("%s, but buddy_intf is under linking\n", __FUNCTION__); ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ } ++#endif ++ ++ if (!sme->ssid || !sme->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (sme->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = sme->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, sme->ssid, sme->ssid_len); ++ ++ DBG_8192C("ssid=%s, len=%zu\n", ndis_ssid.Ssid, sme->ssid_len); ++ ++ ++ if (sme->bssid) ++ DBG_8192C("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); ++ ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ ret = -EBUSY; ++ DBG_8192C("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); ++ goto exit; ++ } ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ rtw_scan_abort(padapter); ++ } ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++ ++ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); ++ if (ret < 0) ++ goto exit; ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); ++ if (ret < 0) ++ goto exit; ++ ++ DBG_8192C("%s, ie_len=%zu\n", __func__, sme->ie_len); ++ ++ ret = rtw_cfg80211_set_wpa_ie(padapter, sme->ie, sme->ie_len); ++ if (ret < 0) ++ goto exit; ++ ++ if (sme->crypto.n_ciphers_pairwise) { ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ //For WEP Shared auth ++ if((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared ++ || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key ++ ) ++ { ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); ++ ++ wep_key_idx = sme->key_idx; ++ wep_key_len = sme->key_len; ++ ++ if (sme->key_idx > WEP_KEYS) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ if(ret < 0) ++ goto exit; ++ } ++ ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); ++ if (ret < 0) ++ return ret; ++ ++ if (sme->crypto.n_akm_suites) { ++ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ authmode = psecuritypriv->ndisauthtype; ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ ++ //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ ++ if (rtw_set_802_11_connect(padapter, sme->bssid, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++ DBG_8192C("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); ++ ++exit: ++ ++ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *ndev, ++ u16 reason_code) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ rtw_set_roaming(padapter, 0); ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_scan_abort(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ ++ DBG_871X("%s...call rtw_indicate_disconnect\n", __FUNCTION__); ++ ++ padapter->mlmepriv.not_indic_disco = _TRUE; ++ rtw_indicate_disconnect(padapter); ++ padapter->mlmepriv.not_indic_disco = _FALSE; ++ ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) ++ enum nl80211_tx_power_setting type, int mbm) ++#else ++ enum tx_power_setting type, int dbm) ++#endif ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ int ret; ++ ++ switch (type) { ++ case NL80211_TX_POWER_AUTOMATIC: ++ return 0; ++ case NL80211_TX_POWER_FIXED: ++ if (mbm < 0 || (mbm % 100)) ++ return -EOPNOTSUPP; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return 0; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_TX_PWR_LIMIT_USR, ++ MBM_TO_DBM(mbm) * 2); ++ if (ret < 0) ++ return ret; ++ ++ return iwm_tx_power_trigger(iwm); ++ default: ++ IWM_ERR(iwm, "Unsupported power type: %d\n", type); ++ return -EOPNOTSUPP; ++ } ++#endif ++ DBG_8192C("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) ++ struct wireless_dev *wdev, ++#endif ++ int *dbm) ++{ ++ //_adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ DBG_8192C("%s\n", __func__); ++ ++ *dbm = (12); ++ ++ return 0; ++} ++ ++inline bool rtw_cfg80211_pwr_mgmt(_adapter *adapter) ++{ ++ struct rtw_wdev_priv *rtw_wdev_priv = wdev_to_priv(adapter->rtw_wdev); ++ return rtw_wdev_priv->power_mgmt; ++} ++ ++static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, ++ struct net_device *ndev, ++ bool enabled, int timeout) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct rtw_wdev_priv *rtw_wdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ ++ DBG_871X(FUNC_NDEV_FMT" enabled:%u, timeout:%d\n", FUNC_NDEV_ARG(ndev), ++ enabled, timeout); ++ ++ rtw_wdev_priv->power_mgmt = enabled; ++ ++ #ifdef CONFIG_LPS ++ if (!enabled) ++ LPS_Leave(padapter); ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index,blInserted = _FALSE; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(netdev)); ++ ++ if ( _rtw_memcmp( pmksa->bssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) ++ { ++ return -EINVAL; ++ } ++ ++ blInserted = _FALSE; ++ ++ //overwrite PMKID ++ for(index=0 ; indexPMKIDList[index].Bssid, pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => rewrite with new PMKID. ++ DBG_871X(FUNC_NDEV_FMT" BSSID exists in the PMKList.\n", FUNC_NDEV_ARG(netdev)); ++ ++ _rtw_memcpy( psecuritypriv->PMKIDList[index].PMKID, pmksa->pmkid, WLAN_PMKID_LEN); ++ psecuritypriv->PMKIDList[index].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex = index+1; ++ blInserted = _TRUE; ++ break; ++ } ++ } ++ ++ if(!blInserted) ++ { ++ // Find a new entry ++ DBG_871X(FUNC_NDEV_FMT" Use the new entry index = %d for this PMKID.\n", ++ FUNC_NDEV_ARG(netdev), psecuritypriv->PMKIDIndex ); ++ ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, pmksa->bssid, ETH_ALEN); ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pmksa->pmkid, WLAN_PMKID_LEN); ++ ++ psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex++ ; ++ if(psecuritypriv->PMKIDIndex==16) ++ { ++ psecuritypriv->PMKIDIndex =0; ++ } ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ u8 index, bMatched = _FALSE; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(netdev)); ++ ++ for(index=0 ; indexPMKIDList[index].Bssid, pmksa->bssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. ++ _rtw_memset( psecuritypriv->PMKIDList[index].Bssid, 0x00, ETH_ALEN ); ++ _rtw_memset( psecuritypriv->PMKIDList[index].PMKID, 0x00, WLAN_PMKID_LEN ); ++ psecuritypriv->PMKIDList[index].bUsed = _FALSE; ++ bMatched = _TRUE; ++ break; ++ } ++ } ++ ++ if(_FALSE == bMatched) ++ { ++ DBG_871X(FUNC_NDEV_FMT" do not have matched BSSID\n" ++ , FUNC_NDEV_ARG(netdev)); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(netdev)); ++ ++ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ psecuritypriv->PMKIDIndex = 0; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ { ++ struct station_info sinfo; ++ u8 ie_offset; ++ if (GetFrameSubType(pmgmt_frame) == WIFI_ASSOCREQ) ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ else // WIFI_REASSOCREQ ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ ++ sinfo.filled = 0; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)) ++ sinfo.filled = STATION_INFO_ASSOC_REQ_IES; ++#endif ++ sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; ++ sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; ++ cfg80211_new_sta(ndev, GetAddr2Ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); ++ } ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ { ++ //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() ++ #ifndef CONFIG_PLATFORM_MSTAR ++ pwdev->iftype = NL80211_IFTYPE_STATION; ++ #endif //CONFIG_PLATFORM_MSTAR ++ DBG_8192C("iftype=%d before call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ rtw_cfg80211_send_rx_assoc(padapter, NULL, pmgmt_frame, frame_len); ++ DBG_8192C("iftype=%d after call cfg80211_send_rx_assoc()\n", pwdev->iftype); ++ pwdev->iftype = NL80211_IFTYPE_AP; ++ //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++ } ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ ++} ++ ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ s32 freq; ++ int channel; ++ u8 *pmgmt_frame; ++ uint frame_len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 mgmt_buf[128] = {0}; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct net_device *ndev = padapter->pnetdev; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++#if defined(RTW_USE_CFG80211_STA_EVENT) || defined(COMPAT_KERNEL_RELEASE) ++ cfg80211_del_sta(ndev, da, GFP_ATOMIC); ++#else /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++ channel = pmlmeext->cur_channel; ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++ pmgmt_frame = mgmt_buf; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); ++ ++ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); ++ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); ++ ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, mgmt_buf, frame_len, GFP_ATOMIC); ++ #else //COMPAT_KERNEL_RELEASE ++ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); ++ //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); ++ #endif //COMPAT_KERNEL_RELEASE ++#endif /* defined(RTW_USE_CFG80211_STA_EVENT) */ ++} ++ ++static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) ++{ ++ int ret = 0; ++ int rtap_len; ++ int qos_len = 0; ++ int dot11_hdr_len = 24; ++ int snap_len = 6; ++ unsigned char *pdata; ++ u16 frame_ctl; ++ unsigned char src_mac_addr[6]; ++ unsigned char dst_mac_addr[6]; ++ struct ieee80211_hdr *dot11_hdr; ++ struct ieee80211_radiotap_header *rtap_hdr; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ if (skb) ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); ++ ++ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) ++ goto fail; ++ ++ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; ++ if (unlikely(rtap_hdr->it_version)) ++ goto fail; ++ ++ rtap_len = ieee80211_get_radiotap_len(skb->data); ++ if (unlikely(skb->len < rtap_len)) ++ goto fail; ++ ++ if(rtap_len != 14) ++ { ++ DBG_8192C("radiotap len (should be 14): %d\n", rtap_len); ++ goto fail; ++ } ++ ++ /* Skip the ratio tap header */ ++ skb_pull(skb, rtap_len); ++ ++ dot11_hdr = (struct ieee80211_hdr *)skb->data; ++ frame_ctl = le16_to_cpu(dot11_hdr->frame_control); ++ /* Check if the QoS bit is set */ ++ if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { ++ /* Check if this ia a Wireless Distribution System (WDS) frame ++ * which has 4 MAC addresses ++ */ ++ if (dot11_hdr->frame_control & 0x0080) ++ qos_len = 2; ++ if ((dot11_hdr->frame_control & 0x0300) == 0x0300) ++ dot11_hdr_len += 6; ++ ++ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); ++ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); ++ ++ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for ++ * for two MAC addresses ++ */ ++ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); ++ pdata = (unsigned char*)skb->data; ++ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); ++ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); ++ ++ DBG_8192C("should be eapol packet\n"); ++ ++ /* Use the real net device to transmit the packet */ ++ ret = _rtw_xmit_entry(skb, padapter->pnetdev); ++ ++ return ret; ++ ++ } ++ else if ((frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)) ++ == (RTW_IEEE80211_FTYPE_MGMT|RTW_IEEE80211_STYPE_ACTION) ++ ) ++ { ++ //only for action frames ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ //u8 category, action, OUI_Subtype, dialogToken=0; ++ //unsigned char *frame_body; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ u8 category, action; ++ int type = -1; ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_NDEV_FMT" frame_control:0x%x\n", FUNC_NDEV_ARG(ndev), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto fail; ++ } ++ ++ DBG_8192C("RTW_Tx:da="MAC_FMT" via "FUNC_NDEV_FMT"\n", ++ MAC_ARG(GetAddr1Ptr(buf)), FUNC_NDEV_ARG(ndev)); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) ++ goto dump; ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto fail; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ #ifdef CONFIG_WFD ++ if (type >= 0) ++ { ++ struct wifi_display_info *pwfd_info; ++ ++ pwfd_info = padapter->wdinfo.wfd_info; ++ ++ if ( _TRUE == pwfd_info->wfd_enable ) ++ { ++ rtw_append_wfd_ie( padapter, pframe, &len ); ++ } ++ } ++ #endif // CONFIG_WFD ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ } ++ else ++ { ++ DBG_8192C("frame_ctl=0x%x\n", frame_ctl & (RTW_IEEE80211_FCTL_FTYPE|RTW_IEEE80211_FCTL_STYPE)); ++ } ++ ++ ++fail: ++ ++ dev_kfree_skb(skb); ++ ++ return 0; ++ ++} ++ ++static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) ++{ ++ DBG_8192C("%s\n", __func__); ++} ++ ++static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) ++{ ++ int ret = 0; ++ ++ DBG_8192C("%s\n", __func__); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { ++ .ndo_open = rtw_cfg80211_monitor_if_open, ++ .ndo_stop = rtw_cfg80211_monitor_if_close, ++ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)) ++ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, ++ #endif ++ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, ++}; ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,1,0)) ++static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, unsigned char name_assign_type, struct net_device **ndev) ++#else ++static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct net_device **ndev) ++#endif ++{ ++ int ret = 0; ++ struct net_device* mon_ndev = NULL; ++ struct wireless_dev* mon_wdev = NULL; ++ struct rtw_netdev_priv_indicator *pnpi; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ ++ if (!name ) { ++ DBG_871X(FUNC_ADPT_FMT" without specific name\n", FUNC_ADPT_ARG(padapter)); ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" monitor interface exist: "NDEV_FMT"\n", ++ FUNC_ADPT_ARG(padapter), NDEV_ARG(pwdev_priv->pmon_ndev)); ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ mon_ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!mon_ndev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate ndev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; ++ strncpy(mon_ndev->name, name, IFNAMSIZ); ++ mon_ndev->name[IFNAMSIZ - 1] = 0; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,1,0)) ++ mon_ndev->name_assign_type = name_assign_type; ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)) ++ mon_ndev->needs_free_netdev = true; ++ mon_ndev->priv_destructor = rtw_ndev_destructor; ++#else ++ mon_ndev->destructor = rtw_ndev_destructor; ++#endif ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; ++#else ++ mon_ndev->open = rtw_cfg80211_monitor_if_open; ++ mon_ndev->stop = rtw_cfg80211_monitor_if_close; ++ mon_ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; ++ mon_ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; ++#endif ++ ++ pnpi = netdev_priv(mon_ndev); ++ pnpi->priv = padapter; ++ pnpi->sizeof_priv = sizeof(_adapter); ++ ++ /* wdev */ ++ mon_wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!mon_wdev) { ++ DBG_871X(FUNC_ADPT_FMT" allocate mon_wdev fail\n", FUNC_ADPT_ARG(padapter)); ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ mon_wdev->wiphy = padapter->rtw_wdev->wiphy; ++ mon_wdev->netdev = mon_ndev; ++ mon_wdev->iftype = NL80211_IFTYPE_MONITOR; ++ mon_ndev->ieee80211_ptr = mon_wdev; ++ ++ ret = register_netdevice(mon_ndev); ++ if (ret) { ++ goto out; ++ } ++ ++ *ndev = pwdev_priv->pmon_ndev = mon_ndev; ++ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); ++ ++out: ++ if (ret && mon_wdev) { ++ rtw_mfree((u8*)mon_wdev, sizeof(struct wireless_dev)); ++ mon_wdev = NULL; ++ } ++ ++ if (ret && mon_ndev) { ++ free_netdev(mon_ndev); ++ *ndev = mon_ndev = NULL; ++ } ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++static struct wireless_dev * ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++static struct net_device * ++#else ++static int ++#endif ++ cfg80211_rtw_add_virtual_intf( ++ struct wiphy *wiphy, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) ++ const char *name, ++ #else ++ char *name, ++ #endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,1,0)) ++ unsigned char name_assign_type, ++#endif ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)) ++ enum nl80211_iftype type, struct vif_params *params) ++ #else ++ enum nl80211_iftype type, u32 *flags, struct vif_params *params) ++ #endif ++{ ++ int ret = 0; ++ struct net_device* ndev = NULL; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X(FUNC_ADPT_FMT " wiphy:%s, name:%s, type:%d\n", ++ FUNC_ADPT_ARG(padapter), wiphy_name(wiphy), name, type); ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_AP_VLAN: ++ case NL80211_IFTYPE_WDS: ++ case NL80211_IFTYPE_MESH_POINT: ++ ret = -ENODEV; ++ break; ++ case NL80211_IFTYPE_MONITOR: ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,1,0)) ++ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, name_assign_type, &ndev); ++#else ++ ret = rtw_cfg80211_add_monitor_if(padapter, (char *)name, &ndev); ++#endif ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ ret = -ENODEV; ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ ret = -ENODEV; ++ break; ++ default: ++ ret = -ENODEV; ++ DBG_871X("Unsupported interface type\n"); ++ break; ++ } ++ ++ DBG_871X(FUNC_ADPT_FMT" ndev:%p, ret:%d\n", FUNC_ADPT_ARG(padapter), ndev, ret); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ return ndev ? ndev->ieee80211_ptr : ERR_PTR(ret); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ return ndev ? ndev : ERR_PTR(ret); ++#else ++ return ret; ++#endif ++} ++ ++static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev ++#else ++ struct net_device *ndev ++#endif ++) ++{ ++ struct rtw_wdev_priv *pwdev_priv = (struct rtw_wdev_priv *)wiphy_priv(wiphy); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct net_device *ndev; ++ ndev = wdev ? wdev->netdev : NULL; ++#endif ++ ++ if (!ndev) ++ goto exit; ++ ++ unregister_netdevice(ndev); ++ ++ if (ndev == pwdev_priv->pmon_ndev) { ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ DBG_871X(FUNC_NDEV_FMT" remove monitor interface\n", FUNC_NDEV_ARG(ndev)); ++ } ++ ++exit: ++ return 0; ++} ++ ++static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, const u8 *tail, size_t tail_len) ++{ ++ int ret=0; ++ u8 *pbuf = NULL; ++ uint len, wps_ielen=0; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ u8 got_p2p_ie = _FALSE; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ DBG_8192C("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if(head_len<24) ++ return -EINVAL; ++ ++ ++ pbuf = rtw_zmalloc(head_len+tail_len); ++ if(!pbuf) ++ return -ENOMEM; ++ ++ ++ //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++ ++ //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ // pstapriv->max_num_sta = NUM_STA; ++ ++ ++ _rtw_memcpy(pbuf, (void *)head+24, head_len-24);// 24=beacon header len. ++ _rtw_memcpy(pbuf+head_len-24, (void *)tail, tail_len); ++ ++ len = head_len+tail_len-24; ++ ++ //check wps ie if inclued ++ if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) ++ DBG_8192C("add bcn, wps_ielen=%d\n", wps_ielen); ++ ++#ifdef CONFIG_P2P ++ //check p2p ie if inclued ++ if( adapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ //check p2p if enable ++ if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ ++ DBG_8192C("got p2p_ie, len=%d\n", p2p_ielen); ++ got_p2p_ie = _TRUE; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_8192C("Enable P2P function for the first time\n"); ++ rtw_p2p_enable(adapter, P2P_ROLE_GO); ++ wdev_to_priv(adapter->rtw_wdev)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ DBG_8192C("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); ++ ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ } ++ } ++ } ++#endif // CONFIG_P2P ++ ++ /* pbss_network->IEs will not include p2p_ie, wfd ie */ ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, P2P_OUI, 4); ++ rtw_ies_remove_ie(pbuf, &len, _BEACON_IE_OFFSET_, _VENDOR_SPECIFIC_IE_, WFD_OUI, 4); ++ ++ if (rtw_check_beacon_data(adapter, pbuf, len) == _SUCCESS) ++ { ++#ifdef CONFIG_P2P ++ //check p2p if enable ++ if(got_p2p_ie == _TRUE) ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(adapter->wdinfo); ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ } ++#endif //CONFIG_P2P ++ ret = 0; ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ ++ rtw_mfree(pbuf, head_len+tail_len); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) ++static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ int ret=0; ++ _adapter *adapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct beacon_parameters *info) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ cfg80211_rtw_add_beacon(wiphy, ndev, info); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#else ++static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_ap_settings *settings) ++{ ++ int ret = 0; ++ _adapter *adapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X(FUNC_NDEV_FMT" hidden_ssid:%d, auth_type:%d\n", FUNC_NDEV_ARG(ndev), ++ settings->hidden_ssid, settings->auth_type); ++ ++ ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, ++ settings->beacon.tail, settings->beacon.tail_len); ++ ++ adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; ++ ++ if (settings->ssid && settings->ssid_len) { ++ WLAN_BSSID_EX *pbss_network = &adapter->mlmepriv.cur_network.network; ++ WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ settings->ssid, settings->ssid_len, ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); ++ ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network->Ssid.SsidLength = settings->ssid_len; ++ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)settings->ssid, settings->ssid_len); ++ pbss_network_ext->Ssid.SsidLength = settings->ssid_len; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ } ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_beacon_data *info) ++{ ++ int ret = 0; ++ _adapter *adapter = wiphy_to_adapter(wiphy); ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_stop_ap(struct wiphy *wiphy, struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ return 0; ++} ++ ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) ++ ++static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *ndev, ++ const u8 *mac, struct station_parameters *params) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)) ++ u8 *mac) { ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(4,1,0)) ++ const u8 *mac) { ++#else ++ struct station_del_parameters *params) ++{ ++ const u8 *mac = params->mac; ++#endif ++ int ret=0; ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated = _FALSE; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("+"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ DBG_8192C("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); ++ return -EINVAL; ++ } ++ ++ ++ if(!mac) ++ { ++ DBG_8192C("flush all sta, and cam_entry\n"); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++ ret = rtw_sta_flush(padapter); ++ ++ return ret; ++ } ++ ++ ++ DBG_8192C("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); ++ ++ if (mac[0] == 0xff && mac[1] == 0xff && ++ mac[2] == 0xff && mac[3] == 0xff && ++ mac[4] == 0xff && mac[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(mac, psta->hwaddr, ETH_ALEN)) ++ { ++ if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) ++ { ++ DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ break; ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated); ++ ++ DBG_871X("-"FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *ndev, ++ const u8 *mac, struct station_parameters *params) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, ++ int idx, u8 *mac, struct station_info *sinfo) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ //TODO: dump scanned queue ++ ++ return -ENOENT; ++} ++ ++static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, ++ struct bss_parameters *params) ++{ ++ u8 i; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++/* ++ DBG_8192C("use_cts_prot=%d\n", params->use_cts_prot); ++ DBG_8192C("use_short_preamble=%d\n", params->use_short_preamble); ++ DBG_8192C("use_short_slot_time=%d\n", params->use_short_slot_time); ++ DBG_8192C("ap_isolate=%d\n", params->ap_isolate); ++ ++ DBG_8192C("basic_rates_len=%d\n", params->basic_rates_len); ++ for(i=0; ibasic_rates_len; i++) ++ { ++ DBG_8192C("basic_rates=%d\n", params->basic_rates[i]); ++ ++ } ++*/ ++ return 0; ++ ++} ++ ++static int cfg80211_rtw_set_channel(struct wiphy *wiphy ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ , struct net_device *ndev ++ #endif ++ , struct ieee80211_channel *chan, enum nl80211_channel_type channel_type) ++{ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ #endif ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_auth_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_assoc_request *req) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++ return 0; ++} ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) ++ goto indicate; ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ int type; ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(padapter); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ #ifdef CONFIG_P2P ++ type = rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ if (type >= 0) { ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ case P2P_PROVISION_DISC_RESP: ++ case P2P_INVIT_RESP: ++ rtw_set_scan_deny(padapter, 2000); ++ rtw_clear_scan_deny(padapter); ++ } ++ goto indicate; ++ } ++ #endif ++ rtw_action_frame_parse(pmgmt_frame, frame_len, &category, &action); ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++indicate: ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(padapter, freq, 0, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++} ++ ++void rtw_cfg80211_rx_action(_adapter *adapter, u8 *frame, uint frame_len, const char*msg) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(adapter->rtw_wdev); ++ u8 category, action; ++ ++ channel = rtw_get_oper_ch(adapter); ++ ++ rtw_action_frame_parse(frame, frame_len, &category, &action); ++ ++ DBG_8192C("RTW_Rx:cur_ch=%d\n", channel); ++ if (msg) ++ DBG_871X("RTW_Rx:%s\n", msg); ++ else ++ DBG_871X("RTW_Rx:category(%u), action(%u)\n", category, action); ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_2GHZ); ++ else ++ freq = rtw_ieee80211_channel_to_frequency(channel, NL80211_BAND_5GHZ); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_rx_mgmt(adapter, freq, 0, frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(adapter->pnetdev, freq, frame, frame_len, GFP_ATOMIC); ++#endif ++ ++} ++ ++#ifdef CONFIG_P2P ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) ++{ ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; ++ uint p2p_ielen = 0; ++ uint wpsielen = 0; ++ u32 devinfo_contentlen = 0; ++ u8 devinfo_content[64] = { 0x00 }; ++ u16 capability = 0; ++ uint capability_len = 0; ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ ++ //prepare for building provision_request frame ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ switch(wps_devicepassword_id) ++ { ++ case WPS_DPID_PIN: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ break; ++ case WPS_DPID_USER_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ break; ++ case WPS_DPID_MACHINE_SPEC: ++ break; ++ case WPS_DPID_REKEY: ++ break; ++ case WPS_DPID_PBC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ break; ++ case WPS_DPID_REGISTRAR_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) ++ { ++ ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); ++ ++ } ++ ++ ++ //start to build provision_request frame ++ _rtw_memset(wpsie, 0, sizeof(wpsie)); ++ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); ++ p2p_ielen = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerDevAddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //build_prov_disc_request_p2p_ie ++ // P2P OUI ++ p2pielen = 0; ++ p2p_ie[ p2pielen++ ] = 0x50; ++ p2p_ie[ p2pielen++ ] = 0x6F; ++ p2p_ie[ p2pielen++ ] = 0x9A; ++ p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Group Capability Bitmap, 1 byte ++ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); ++ p2pielen += 2; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); ++ p2pielen += devinfo_contentlen; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); ++ //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); ++ //pframe += p2pielen; ++ pattrib->pktlen += p2p_ielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //dump_mgntframe(padapter, pmgntframe); ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) ++ DBG_8192C("%s, ack to\n", __func__); ++ ++ //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) ++ //{ ++ // DBG_8192C("waiting for p2p peer key-in PIN CODE\n"); ++ // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. ++ //} ++ ++} ++ ++static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ struct ieee80211_channel * channel, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++#endif ++ unsigned int duration, u64 *cookie) ++{ ++ s32 err = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); ++ u8 ready_on_channel = _FALSE; ++ ++ DBG_871X(FUNC_ADPT_FMT" ch:%u duration:%d\n", FUNC_ADPT_ARG(padapter), remain_ch, duration); ++ ++ if(pcfg80211_wdinfo->is_ro_ch == _TRUE) ++ { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ pcfg80211_wdinfo->is_ro_ch = _TRUE; ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ pcfg80211_wdinfo->remain_on_ch_type= channel_type; ++ #endif ++ pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; ++ ++ rtw_scan_abort(padapter); ++#ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ ++ if(duration < 400) ++ duration = duration*3;//extend from exper. ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(check_buddy_fwstate(padapter, _FW_LINKED) && ++ (durationext_listen_interval)) ++ { ++ duration = duration + pwdinfo->ext_listen_interval; ++ } ++#endif ++ ++ pcfg80211_wdinfo->restore_channel = rtw_get_oper_ch(padapter); ++ ++ if(rtw_ch_set_search_ch(pmlmeext->channel_set, remain_ch) >= 0) { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ if(remain_ch != pbuddy_mlmeext->cur_channel) ++ { ++ if(ATOMIC_READ(&pwdev_priv->switch_ch_to)==1 || ++ (remain_ch != pmlmeext->cur_channel)) ++ { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ DBG_8192C("%s, set switch ch timer, duration=%d\n", __func__, duration-pwdinfo->ext_listen_interval); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, duration-pwdinfo->ext_listen_interval); ++ } ++ } ++ ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ if(remain_ch != pmlmeext->cur_channel ) ++ { ++ ready_on_channel = _TRUE; ++ //pmlmeext->cur_channel = remain_ch; ++ //set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ } else { ++ DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); ++ } ++ ++ ++ //call this after other things have been done ++#ifdef CONFIG_CONCURRENT_MODE ++ if(ATOMIC_READ(&pwdev_priv->ro_ch_to)==1 || ++ (remain_ch != pmlmeext->cur_channel)) ++ { ++ u8 co_channel = 0xff; ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 0); ++#endif ++ ++ if(ready_on_channel == _TRUE) ++ { ++ if ( !check_fwstate(&padapter->mlmepriv, _FW_LINKED ) ) ++ pmlmeext->cur_channel = remain_ch; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if(co_channel !=remain_ch) ++#endif ++ { ++ if (!padapter->mlmepriv.LinkDetectInfo.bBusyTraffic) ++ set_channel_bwmode(padapter, remain_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ } ++ DBG_8192C("%s, set ro ch timer, duration=%d\n", __func__, duration); ++ _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ } ++#endif ++ ++ rtw_cfg80211_ready_on_channel(padapter, *cookie, channel, channel_type, duration, GFP_KERNEL); ++ ++exit: ++ if (err) ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ ++ return err; ++} ++ ++static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u64 cookie) ++{ ++ s32 err = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); ++ ++ if (pcfg80211_wdinfo->is_ro_ch == _TRUE) { ++ DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ #ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++ #endif ++ p2p_protocol_wk_hdl(padapter, P2P_RO_CH_WK); ++ } ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); ++ } ++ } ++ else ++ #endif ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ pcfg80211_wdinfo->is_ro_ch = _FALSE; ++ ++ return err; ++} ++ ++#endif //CONFIG_P2P ++ ++static int _cfg80211_rtw_mgmt_tx(_adapter *padapter, u8 tx_ch, const u8 *buf, size_t len) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ int ret = _FAIL; ++ bool ack = _TRUE; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ //struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ rtw_set_scan_deny(padapter, 1000); ++ ++ rtw_scan_abort(padapter); ++ #ifdef CONFIG_CONCURRENT_MODE ++ if(rtw_buddy_adapter_up(padapter)) ++ rtw_scan_abort(padapter->pbuddy_adapter); ++ #endif /* CONFIG_CONCURRENT_MODE */ ++ ++ if (padapter->cfg80211_wdinfo.is_ro_ch == _TRUE) { ++ //DBG_8192C("%s, cancel ro ch timer\n", __func__); ++ //_cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ //padapter->cfg80211_wdinfo.is_ro_ch = _FALSE; ++ #ifdef CONFIG_CONCURRENT_MODE ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ DBG_8192C("%s, extend ro ch time\n", __func__); ++ _set_timer( &padapter->cfg80211_wdinfo.remain_on_ch_timer, pwdinfo->ext_listen_period); ++ } ++ #endif //CONFIG_CONCURRENT_MODE ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_LINKED )) { ++ u8 co_channel=0xff; ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ co_channel = rtw_get_oper_ch(padapter); ++ ++ if (tx_ch != pbuddy_mlmeext->cur_channel) { ++ ++ u16 ext_listen_period; ++ ++ if (ATOMIC_READ(&pwdev_priv->switch_ch_to)==1) { ++ DBG_8192C("%s, issue nulldata pwrbit=1\n", __func__); ++ issue_nulldata(padapter->pbuddy_adapter, NULL, 1, 3, 500); ++ ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 0); ++ ++ //DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, pwdinfo->ext_listen_period); ++ //_set_timer(&pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period); ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ { ++ ext_listen_period = 500;// 500ms ++ } ++ else ++ { ++ ext_listen_period = pwdinfo->ext_listen_period; ++ } ++ ++ DBG_8192C("%s, set switch ch timer, period=%d\n", __func__, ext_listen_period); ++ _set_timer(&pwdinfo->ap_p2p_switch_timer, ext_listen_period); ++ ++ } ++ ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ ++ if (tx_ch != co_channel) ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ }else ++#endif //CONFIG_CONCURRENT_MODE ++ //if (tx_ch != pmlmeext->cur_channel) { ++ if(tx_ch != rtw_get_oper_ch(padapter)) { ++ if (!check_fwstate(&padapter->mlmepriv, _FW_LINKED )) ++ pmlmeext->cur_channel = tx_ch; ++ set_channel_bwmode(padapter, tx_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ //ret = -ENOMEM; ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++#ifdef CONFIG_WFD ++ { ++ struct wifi_display_info *pwfd_info; ++ ++ pwfd_info = padapter->wdinfo.wfd_info; ++ ++ if ( _TRUE == pwfd_info->wfd_enable ) ++ { ++ rtw_append_wfd_ie( padapter, pframe, &pattrib->pktlen ); ++ } ++ } ++#endif // CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ if (dump_mgntframe_and_wait_ack(padapter, pmgntframe) != _SUCCESS) ++ { ++ ack = _FALSE; ++ ret = _FAIL; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack == _FAIL\n", __func__); ++ #endif ++ } ++ else ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ack=%d, ok!\n", __func__, ack); ++ #endif ++ ret = _SUCCESS; ++ } ++ ++exit: ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ret=%d\n", __func__, ret); ++ #endif ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) ++ struct cfg80211_mgmt_tx_params *params, ++#else ++ struct ieee80211_channel *chan, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ bool offchan, ++#endif ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ enum nl80211_channel_type channel_type, ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ bool channel_type_valid, ++ #endif ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ unsigned int wait, ++#endif ++ const u8 *buf, size_t len, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) ++ bool no_cck, ++#endif ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ bool dont_wait_for_ack, ++#endif ++#endif ++ u64 *cookie) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) ++ struct ieee80211_channel *chan = params->chan; ++ const u8 *buf = params->buf; ++ size_t len = params->len; ++#endif ++ ++ _adapter *padapter = (_adapter *)wiphy_to_adapter(wiphy); ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ int ret = 0; ++ int tx_ret; ++ u32 dump_limit = RTW_MAX_MGMT_TX_CNT; ++ u32 dump_cnt = 0; ++ bool ack = _TRUE; ++ u8 tx_ch = (u8)ieee80211_frequency_to_channel(chan->center_freq); ++ u8 category, action; ++ int type = (-1); ++ u32 start = rtw_get_current_time(); ++ ++ /* cookie generation */ ++ *cookie = (unsigned long) buf; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" len=%zu, ch=%d" ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ ", ch_type=%d" ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ ", channel_type_valid=%d" ++ #endif ++ #endif ++ "\n", FUNC_ADPT_ARG(padapter), ++ len, tx_ch ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) ++ , channel_type ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ , channel_type_valid ++ #endif ++ #endif ++ ); ++#endif /* CONFIG_DEBUG_CFG80211 */ ++ ++ /* indicate ack before issue frame to avoid racing with rsp frame */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ rtw_cfg80211_mgmt_tx_status(padapter, *cookie, buf, len, ack, GFP_KERNEL); ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ cfg80211_action_tx_status(ndev, *cookie, buf, len, ack, GFP_KERNEL); ++#endif ++ ++ if (rtw_action_frame_parse(buf, len, &category, &action) == _FALSE) { ++ DBG_8192C(FUNC_ADPT_FMT" frame_control:0x%x\n", FUNC_ADPT_ARG(padapter), ++ le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)buf)->frame_ctl)); ++ goto exit; ++ } ++ ++ DBG_8192C("RTW_Tx:tx_ch=%d, da="MAC_FMT"\n", tx_ch, MAC_ARG(GetAddr1Ptr(buf))); ++ #ifdef CONFIG_P2P ++ if((type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) >= 0) { ++ goto dump; ++ } ++ #endif ++ if (category == RTW_WLAN_CATEGORY_PUBLIC) ++ DBG_871X("RTW_Tx:%s\n", action_public_str(action)); ++ else ++ DBG_871X("RTW_Tx:category(%u), action(%u)\n", category, action); ++ ++dump: ++ do { ++ dump_cnt++; ++ tx_ret = _cfg80211_rtw_mgmt_tx(padapter, tx_ch, buf, len); ++ } while (dump_cnt < dump_limit && tx_ret != _SUCCESS); ++ ++ if (tx_ret != _SUCCESS || dump_cnt > 1) { ++ DBG_871X(FUNC_ADPT_FMT" %s (%d/%d) in %d ms\n", FUNC_ADPT_ARG(padapter), ++ tx_ret==_SUCCESS?"OK":"FAIL", dump_cnt, dump_limit, rtw_get_passing_time_ms(start)); ++ } ++ ++ switch (type) { ++ case P2P_GO_NEGO_CONF: ++ rtw_clear_scan_deny(padapter); ++ break; ++ case P2P_INVIT_RESP: ++ if (pwdev_priv->invit_info.flags & BIT(0) ++ && pwdev_priv->invit_info.status == 0) ++ { ++ DBG_871X(FUNC_ADPT_FMT" agree with invitation of persistent group\n", ++ FUNC_ADPT_ARG(padapter)); ++ rtw_set_scan_deny(padapter, 5000); ++ rtw_pwr_wakeup_ex(padapter, 5000); ++ rtw_clear_scan_deny(padapter); ++ } ++ break; ++ } ++ ++exit: ++ return ret; ++} ++ ++static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) ++ struct wireless_dev *wdev, ++#else ++ struct net_device *ndev, ++#endif ++ u16 frame_type, bool reg) ++{ ++ _adapter *adapter = wiphy_to_adapter(wiphy); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X(FUNC_ADPT_FMT" frame_type:%x, reg:%d\n", FUNC_ADPT_ARG(adapter), ++ frame_type, reg); ++#endif ++ ++ if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) ++ return; ++ ++ return; ++} ++ ++static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *ndev, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ DBG_871X(FUNC_NDEV_FMT" ielen=%d\n", FUNC_NDEV_ARG(ndev), len); ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->wps_beacon_ie_len; ++ pmlmepriv->wps_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_beacon_ie_len = wps_ielen; ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_beacon_ie_len; ++ pmlmepriv->p2p_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); ++ pmlmepriv->p2p_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; ++ ++ } ++ #endif //CONFIG_P2P ++ ++ //buf += p2p_ielen; ++ //len -= p2p_ielen; ++ ++ #ifdef CONFIG_WFD ++ if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("bcn_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if(pmlmepriv->wfd_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->wfd_beacon_ie_len; ++ pmlmepriv->wfd_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->wfd_beacon_ie, free_len); ++ pmlmepriv->wfd_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->wfd_beacon_ie = rtw_malloc(wfd_ielen); ++ if ( pmlmepriv->wfd_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_beacon_ie, &pmlmepriv->wfd_beacon_ie_len); ++ } ++ #endif //CONFIG_WFD ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ u32 wfd_ielen = 0; ++ u8 *wfd_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ uint attr_contentlen = 0; ++ u16 uconfig_method, *puconfig_method = NULL; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(check_fwstate(pmlmepriv, WIFI_UNDER_WPS)) ++ { ++ u8 sr = 0; ++ rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8*)(&sr), NULL); ++ ++ if (sr != 0) ++ { ++ DBG_871X("%s, got sr\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("GO mode process WPS under site-survey, sr no set\n"); ++ return ret; ++ } ++ } ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; ++ pmlmepriv->wps_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode ++ if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); ++ #endif ++ ++ uconfig_method = WPS_CM_PUSH_BUTTON; ++ uconfig_method = cpu_to_be16( uconfig_method ); ++ ++ *puconfig_method |= uconfig_method; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; ++ ++ } ++ ++ //buf += wps_ielen; ++ //len -= wps_ielen; ++ ++ #ifdef CONFIG_P2P ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ u8 is_GO = _FALSE; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ u8 grp_cap=0; ++ //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ grp_cap = (u8)((cap_attr >> 8)&0xff); ++ ++ is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; ++ ++ if(is_GO) ++ DBG_8192C("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); ++ } ++ ++ ++ if(is_GO == _FALSE) ++ { ++ if(pmlmepriv->p2p_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; ++ pmlmepriv->p2p_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; ++ } ++ else ++ { ++ if(pmlmepriv->p2p_go_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ pmlmepriv->p2p_go_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); ++ pmlmepriv->p2p_go_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; ++ } ++ ++ } ++ #endif //CONFIG_P2P ++ ++ //buf += p2p_ielen; ++ //len -= p2p_ielen; ++ ++ #ifdef CONFIG_WFD ++ if(rtw_get_wfd_ie(buf, len, NULL, &wfd_ielen)) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("probe_resp_wfd_ielen=%d\n", wfd_ielen); ++ #endif ++ ++ if(pmlmepriv->wfd_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wfd_probe_resp_ie_len; ++ pmlmepriv->wfd_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wfd_probe_resp_ie, free_len); ++ pmlmepriv->wfd_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wfd_probe_resp_ie = rtw_malloc(wfd_ielen); ++ if ( pmlmepriv->wfd_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ rtw_get_wfd_ie(buf, len, pmlmepriv->wfd_probe_resp_ie, &pmlmepriv->wfd_probe_resp_ie_len); ++ } ++ #endif //CONFIG_WFD ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++ ++ if(len>0) ++ { ++ if(pmlmepriv->wps_assoc_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; ++ pmlmepriv->wps_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); ++ if ( pmlmepriv->wps_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); ++ pmlmepriv->wps_assoc_resp_ie_len = len; ++ } ++ ++ return ret; ++ ++} ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, ++ int type) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u32 p2p_ielen = 0; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_8192C("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if( (rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) ++ #ifdef CONFIG_P2P ++ || (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ++ #endif ++ ) ++ { ++ if (net != NULL) ++ { ++ switch (type) ++ { ++ case 0x1: //BEACON ++ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); ++ break; ++ case 0x2: //PROBE_RESP ++ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); ++ break; ++ case 0x4: //ASSOC_RESP ++ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); ++ break; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static struct cfg80211_ops rtw_cfg80211_ops = { ++ .change_virtual_intf = cfg80211_rtw_change_iface, ++ .add_key = cfg80211_rtw_add_key, ++ .get_key = cfg80211_rtw_get_key, ++ .del_key = cfg80211_rtw_del_key, ++ .set_default_key = cfg80211_rtw_set_default_key, ++ .get_station = cfg80211_rtw_get_station, ++ .scan = cfg80211_rtw_scan, ++ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, ++ .connect = cfg80211_rtw_connect, ++ .disconnect = cfg80211_rtw_disconnect, ++ .join_ibss = cfg80211_rtw_join_ibss, ++ .leave_ibss = cfg80211_rtw_leave_ibss, ++ .set_tx_power = cfg80211_rtw_set_txpower, ++ .get_tx_power = cfg80211_rtw_get_txpower, ++ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, ++ .set_pmksa = cfg80211_rtw_set_pmksa, ++ .del_pmksa = cfg80211_rtw_del_pmksa, ++ .flush_pmksa = cfg80211_rtw_flush_pmksa, ++ ++#ifdef CONFIG_AP_MODE ++ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, ++ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, ++ ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 4, 0)) && !defined(COMPAT_KERNEL_RELEASE) ++ .add_beacon = cfg80211_rtw_add_beacon, ++ .set_beacon = cfg80211_rtw_set_beacon, ++ .del_beacon = cfg80211_rtw_del_beacon, ++ #else ++ .start_ap = cfg80211_rtw_start_ap, ++ .change_beacon = cfg80211_rtw_change_beacon, ++ .stop_ap = cfg80211_rtw_stop_ap, ++ #endif ++ ++ .add_station = cfg80211_rtw_add_station, ++ .del_station = cfg80211_rtw_del_station, ++ .change_station = cfg80211_rtw_change_station, ++ .dump_station = cfg80211_rtw_dump_station, ++ .change_bss = cfg80211_rtw_change_bss, ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 6, 0)) ++ .set_channel = cfg80211_rtw_set_channel, ++ #endif ++ //.auth = cfg80211_rtw_auth, ++ //.assoc = cfg80211_rtw_assoc, ++#endif //CONFIG_AP_MODE ++ ++#ifdef CONFIG_P2P ++ .remain_on_channel = cfg80211_rtw_remain_on_channel, ++ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++ .mgmt_tx = cfg80211_rtw_mgmt_tx, ++ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ .action = cfg80211_rtw_mgmt_tx, ++#endif ++}; ++ ++static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band, u8 rf_type) ++{ ++ ++#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ++ ++ ht_cap->ht_supported = _TRUE; ++ ++ ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | ++ IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; ++ ++ /* ++ *Maximum length of AMPDU that the STA can receive. ++ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) ++ */ ++ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; ++ ++ /*Minimum MPDU start spacing , */ ++ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; ++ ++ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; ++ ++ /* ++ *hw->wiphy->bands[NL80211_BAND_2GHZ] ++ *base on ant_num ++ *rx_mask: RX mask ++ *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 ++ *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 ++ *if rx_ant >=3 rx_mask[2]=0xff; ++ *if BW_40 rx_mask[4]=0x01; ++ *highest supported RX rate ++ */ ++ if(rf_type == RF_1T1R) ++ { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0x00; ++ ht_cap->mcs.rx_mask[4] = 0x01; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; ++ } ++ else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) ++ { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ht_cap->mcs.rx_mask[4] = 0x01; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; ++ } ++ else ++ { ++ DBG_8192C("%s, error rf_type=%d\n", __func__, rf_type); ++ } ++ ++} ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter) ++{ ++ u8 rf_type; ++ struct ieee80211_supported_band *bands; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_8192C("%s:rf_type=%d\n", __func__, rf_type); ++ ++ /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ ++ { ++ bands = wiphy->bands[NL80211_BAND_2GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(&bands->ht_cap, NL80211_BAND_2GHZ, rf_type); ++ } ++ ++ /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ ++ { ++ bands = wiphy->bands[NL80211_BAND_5GHZ]; ++ if(bands) ++ rtw_cfg80211_init_ht_capab(&bands->ht_cap, NL80211_BAND_5GHZ, rf_type); ++ } ++} ++ ++/* ++struct ieee80211_iface_limit rtw_limits[] = { ++ { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) ++ | BIT(NL80211_IFTYPE_ADHOC) ++#ifdef CONFIG_AP_MODE ++ | BIT(NL80211_IFTYPE_AP) ++#endif ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++#endif ++ }, ++ {.max = 1, .types = BIT(NL80211_IFTYPE_MONITOR)}, ++}; ++ ++struct ieee80211_iface_combination rtw_combinations = { ++ .limits = rtw_limits, ++ .n_limits = ARRAY_SIZE(rtw_limits), ++ .max_interfaces = 2, ++ .num_different_channels = 1, ++}; ++*/ ++ ++static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) ++{ ++ ++ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; ++ ++ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; ++ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; ++ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) ++ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; ++#endif ++ ++ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) ++ | BIT(NL80211_IFTYPE_ADHOC) ++#ifdef CONFIG_AP_MODE ++ | BIT(NL80211_IFTYPE_AP) ++ | BIT(NL80211_IFTYPE_MONITOR) ++#endif ++#if defined(CONFIG_P2P) && ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) ++ | BIT(NL80211_IFTYPE_P2P_GO) ++#endif ++ ; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) ++#ifdef CONFIG_AP_MODE ++ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; ++#endif //CONFIG_AP_MODE ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) ++ wiphy->software_iftypes |= BIT(NL80211_IFTYPE_MONITOR); ++#endif ++ ++ /* ++ wiphy->iface_combinations = &rtw_combinations; ++ wiphy->n_iface_combinations = 1; ++ */ ++ ++ wiphy->cipher_suites = rtw_cipher_suites; ++ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); ++ ++ /* if (padapter->registrypriv.wireless_mode & WIRELESS_11G) */ ++ wiphy->bands[NL80211_BAND_2GHZ] = rtw_spt_band_alloc(NL80211_BAND_2GHZ); ++ /* if (padapter->registrypriv.wireless_mode & WIRELESS_11A) */ ++ wiphy->bands[NL80211_BAND_5GHZ] = rtw_spt_band_alloc(NL80211_BAND_5GHZ); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) && LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)) ++ wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) ++ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL; ++ wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; ++#endif ++ ++ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) ++ wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT; ++ else ++ wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; ++} ++ ++int rtw_wdev_alloc(_adapter *padapter, struct device *dev) ++{ ++ int ret = 0; ++ struct wiphy *wiphy; ++ struct wireless_dev *wdev; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++ DBG_8192C("%s(padapter=%p)\n", __func__, padapter); ++ ++ /* wiphy */ ++ wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wdev_priv)); ++ if (!wiphy) { ++ DBG_8192C("Couldn't allocate wiphy device\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ set_wiphy_dev(wiphy, dev); ++ rtw_cfg80211_preinit_wiphy(padapter, wiphy); ++ ++ ret = wiphy_register(wiphy); ++ if (ret < 0) { ++ DBG_8192C("Couldn't register wiphy device\n"); ++ goto free_wiphy; ++ } ++ ++ /* wdev */ ++ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!wdev) { ++ DBG_8192C("Couldn't allocate wireless device\n"); ++ ret = -ENOMEM; ++ goto unregister_wiphy; ++ } ++ wdev->wiphy = wiphy; ++ wdev->netdev = pnetdev; ++ ++ wdev->iftype = NL80211_IFTYPE_STATION; // will be init in rtw_hal_init() ++ // Must sync with _rtw_init_mlme_priv() ++ // pmlmepriv->fw_state = WIFI_STATION_STATE ++ //wdev->iftype = NL80211_IFTYPE_MONITOR; // for rtw_setopmode_cmd() in cfg80211_rtw_change_iface() ++ padapter->rtw_wdev = wdev; ++ pnetdev->ieee80211_ptr = wdev; ++ ++ //init pwdev_priv ++ pwdev_priv = wdev_to_priv(wdev); ++ pwdev_priv->rtw_wdev = wdev; ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ pwdev_priv->padapter = padapter; ++ pwdev_priv->scan_request = NULL; ++ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); ++ ++ pwdev_priv->p2p_enabled = _FALSE; ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ rtw_wdev_invit_info_init(&pwdev_priv->invit_info); ++ rtw_wdev_nego_info_init(&pwdev_priv->nego_info); ++ ++ pwdev_priv->bandroid_scan = _FALSE; ++ ++ if(padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE) ++ pwdev_priv->power_mgmt = _TRUE; ++ else ++ pwdev_priv->power_mgmt = _FALSE; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ATOMIC_SET(&pwdev_priv->switch_ch_to, 1); ++ ATOMIC_SET(&pwdev_priv->ro_ch_to, 1); ++#endif ++ ++ return ret; ++ ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++unregister_wiphy: ++ wiphy_unregister(wiphy); ++ free_wiphy: ++ wiphy_free(wiphy); ++exit: ++ return ret; ++ ++} ++ ++void rtw_wdev_free(struct wireless_dev *wdev) ++{ ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ pwdev_priv = wdev_to_priv(wdev); ++ ++ rtw_spt_band_free(wdev->wiphy->bands[NL80211_BAND_2GHZ]); ++ rtw_spt_band_free(wdev->wiphy->bands[NL80211_BAND_5GHZ]); ++ ++ wiphy_free(wdev->wiphy); ++ ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++} ++ ++void rtw_wdev_unregister(struct wireless_dev *wdev) ++{ ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ DBG_8192C("%s(wdev=%p)\n", __func__, wdev); ++ ++ if (!wdev) ++ return; ++ ++ pwdev_priv = wdev_to_priv(wdev); ++ ++ rtw_cfg80211_indicate_scan_done(pwdev_priv, _TRUE); ++ ++ if (pwdev_priv->pmon_ndev) { ++ DBG_8192C("%s, unregister monitor interface\n", __func__); ++ unregister_netdev(pwdev_priv->pmon_ndev); ++ } ++ ++ wiphy_unregister(wdev->wiphy); ++} ++ ++#endif //CONFIG_IOCTL_CFG80211 ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/ioctl_linux.c +@@ -0,0 +1,11909 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_LINUX_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++//#ifdef CONFIG_MP_INCLUDED ++#include ++//#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif //CONFIG_USB_HCI ++#include ++ ++#ifdef CONFIG_MP_INCLUDED ++#include ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) ++#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) ++#define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) ++#endif ++ ++ ++#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 ++ ++#define SCAN_ITEM_SIZE 768 ++#define MAX_CUSTOM_LEN 64 ++#define RATE_COUNT 4 ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++extern int ui_pid[3]; ++#endif ++ ++// combo scan ++#define WEXT_CSCAN_AMOUNT 9 ++#define WEXT_CSCAN_BUF_LEN 360 ++#define WEXT_CSCAN_HEADER "CSCAN S\x01\x00\x00S\x00" ++#define WEXT_CSCAN_HEADER_SIZE 12 ++#define WEXT_CSCAN_SSID_SECTION 'S' ++#define WEXT_CSCAN_CHANNEL_SECTION 'C' ++#define WEXT_CSCAN_NPROBE_SECTION 'N' ++#define WEXT_CSCAN_ACTV_DWELL_SECTION 'A' ++#define WEXT_CSCAN_PASV_DWELL_SECTION 'P' ++#define WEXT_CSCAN_HOME_DWELL_SECTION 'H' ++#define WEXT_CSCAN_TYPE_SECTION 'T' ++ ++ ++extern u8 key_2char2num(u8 hch, u8 lch); ++extern u8 str_2char2num(u8 hch, u8 lch); ++extern u8 convert_ip_addr(u8 hch, u8 mch, u8 lch); ++ ++u32 rtw_rates[] = {1000000,2000000,5500000,11000000, ++ 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000}; ++ ++static const char * const iw_operation_mode[] = ++{ ++ "Auto", "Ad-Hoc", "Managed", "Master", "Repeater", "Secondary", "Monitor" ++}; ++ ++static int hex2num_i(char c) ++{ ++ if (c >= '0' && c <= '9') ++ return c - '0'; ++ if (c >= 'a' && c <= 'f') ++ return c - 'a' + 10; ++ if (c >= 'A' && c <= 'F') ++ return c - 'A' + 10; ++ return -1; ++} ++ ++static int hex2byte_i(const char *hex) ++{ ++ int a, b; ++ a = hex2num_i(*hex++); ++ if (a < 0) ++ return -1; ++ b = hex2num_i(*hex++); ++ if (b < 0) ++ return -1; ++ return (a << 4) | b; ++} ++ ++/** ++ * hwaddr_aton - Convert ASCII string to MAC address ++ * @txt: MAC address as a string (e.g., "00:11:22:33:44:55") ++ * @addr: Buffer for the MAC address (ETH_ALEN = 6 bytes) ++ * Returns: 0 on success, -1 on failure (e.g., string not a MAC address) ++ */ ++static int hwaddr_aton_i(const char *txt, u8 *addr) ++{ ++ int i; ++ ++ for (i = 0; i < 6; i++) { ++ int a, b; ++ ++ a = hex2num_i(*txt++); ++ if (a < 0) ++ return -1; ++ b = hex2num_i(*txt++); ++ if (b < 0) ++ return -1; ++ *addr++ = (a << 4) | b; ++ if (i < 5 && *txt++ != ':') ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static void indicate_wx_custom_event(_adapter *padapter, char *msg) ++{ ++#ifndef CONFIG_IOCTL_CFG80211 ++ u8 *buff, *p; ++ union iwreq_data wrqu; ++ ++ if ((u32)strlen(msg) > IW_CUSTOM_MAX) { ++ DBG_871X("%s strlen(msg):%u > IW_CUSTOM_MAX:%u\n", __FUNCTION__ ,(u32)strlen(msg), IW_CUSTOM_MAX); ++ return; ++ } ++ ++ buff = rtw_zmalloc(IW_CUSTOM_MAX+1); ++ if(!buff) ++ return; ++ ++ _rtw_memcpy(buff, msg, strlen(msg)); ++ ++ _rtw_memset(&wrqu,0,sizeof(wrqu)); ++ wrqu.data.length = strlen(msg); ++ ++ DBG_871X("%s %s\n", __FUNCTION__, buff); ++ wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); ++ ++ rtw_mfree(buff, IW_CUSTOM_MAX+1); ++#endif ++} ++ ++ ++static void request_wps_pbc_event(_adapter *padapter) ++{ ++#ifndef CONFIG_IOCTL_CFG80211 ++ u8 *buff, *p; ++ union iwreq_data wrqu; ++ ++ buff = rtw_malloc(IW_CUSTOM_MAX); ++ if(!buff) ++ return; ++ ++ _rtw_memset(buff, 0, IW_CUSTOM_MAX); ++ ++ p=buff; ++ ++ p+=sprintf(p, "WPS_PBC_START.request=TRUE"); ++ ++ _rtw_memset(&wrqu,0,sizeof(wrqu)); ++ ++ wrqu.data.length = p-buff; ++ ++ wrqu.data.length = (wrqu.data.lengthpnetdev, IWEVCUSTOM, &wrqu, buff); ++ ++ if(buff) ++ { ++ rtw_mfree(buff, IW_CUSTOM_MAX); ++ } ++#endif ++} ++ ++ ++void indicate_wx_scan_complete_event(_adapter *padapter) ++{ ++#ifndef CONFIG_IOCTL_CFG80211 ++ union iwreq_data wrqu; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ //DBG_871X("+rtw_indicate_wx_scan_complete_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWSCAN, &wrqu, NULL); ++#endif ++} ++ ++ ++void rtw_indicate_wx_assoc_event(_adapter *padapter) ++{ ++#ifndef CONFIG_IOCTL_CFG80211 ++ union iwreq_data wrqu; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ wrqu.ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN); ++ ++ //DBG_871X("+rtw_indicate_wx_assoc_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); ++#endif ++} ++ ++void rtw_indicate_wx_disassoc_event(_adapter *padapter) ++{ ++#ifndef CONFIG_IOCTL_CFG80211 ++ union iwreq_data wrqu; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ wrqu.ap_addr.sa_family = ARPHRD_ETHER; ++ _rtw_memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); ++ ++ //DBG_871X("+rtw_indicate_wx_disassoc_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); ++#endif ++} ++ ++/* ++uint rtw_is_cckrates_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ i++; ++ } ++ ++ return _FALSE; ++} ++ ++uint rtw_is_cckratesonly_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ return _FALSE; ++ i++; ++ } ++ ++ return _TRUE; ++} ++*/ ++ ++static char *translate_scan(_adapter *padapter, ++ struct iw_request_info* info, struct wlan_network *pnetwork, ++ char *start, char *stop) ++{ ++ struct iw_event iwe; ++ u16 cap; ++ u32 ht_ielen = 0; ++ char custom[MAX_CUSTOM_LEN]; ++ char *p; ++ u16 max_rate=0, rate, ht_cap=_FALSE; ++ u32 i = 0; ++ char *current_val; ++ long rssi; ++ u8 bw_40MHz=0, short_GI=0; ++ u16 mcs_rate=0; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_P2P ++#ifdef CONFIG_WFD ++ if ( SCAN_RESULT_ALL == pwdinfo->wfd_info->scan_result_type ) ++ { ++ ++ } ++ else if ( ( SCAN_RESULT_P2P_ONLY == pwdinfo->wfd_info->scan_result_type ) || ++ ( SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type ) ) ++#endif // CONFIG_WFD ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ u32 blnGotP2PIE = _FALSE; ++ ++ // User is doing the P2P device discovery ++ // The prefix of SSID should be "DIRECT-" and the IE should contains the P2P IE. ++ // If not, the driver should ignore this AP and go to the next AP. ++ ++ // Verifying the SSID ++ if ( _rtw_memcmp( pnetwork->network.Ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ) ) ++ { ++ u32 p2pielen = 0; ++ ++ // Verifying the P2P IE ++ if ( rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen) ) ++ { ++ blnGotP2PIE = _TRUE; ++ } ++ } ++ ++ if ( blnGotP2PIE == _FALSE ) ++ { ++ return start; ++ } ++ ++ } ++ } ++ ++#ifdef CONFIG_WFD ++ if ( SCAN_RESULT_WFD_TYPE == pwdinfo->wfd_info->scan_result_type ) ++ { ++ u32 blnGotWFD = _FALSE; ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ uint wfd_ielen = 0; ++ ++ if ( rtw_get_wfd_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 wfd_devinfo[ 6 ] = { 0x00 }; ++ uint wfd_devlen = 6; ++ ++ if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen) ) ++ { ++ if ( pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_PSINK ) ++ { ++ // the first two bits will indicate the WFD device type ++ if ( ( wfd_devinfo[ 1 ] & 0x03 ) == WFD_DEVINFO_SOURCE ) ++ { ++ // If this device is Miracast PSink device, the scan reuslt should just provide the Miracast source. ++ blnGotWFD = _TRUE; ++ } ++ } ++ else if ( pwdinfo->wfd_info->wfd_device_type == WFD_DEVINFO_SOURCE ) ++ { ++ // the first two bits will indicate the WFD device type ++ if ( ( wfd_devinfo[ 1 ] & 0x03 ) == WFD_DEVINFO_PSINK ) ++ { ++ // If this device is Miracast source device, the scan reuslt should just provide the Miracast PSink. ++ // Todo: How about the SSink?! ++ blnGotWFD = _TRUE; ++ } ++ } ++ } ++ } ++ ++ if ( blnGotWFD == _FALSE ) ++ { ++ return start; ++ } ++ } ++#endif // CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ /* AP MAC address */ ++ iwe.cmd = SIOCGIWAP; ++ iwe.u.ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN); ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN); ++ ++ /* Add the ESSID */ ++ iwe.cmd = SIOCGIWESSID; ++ iwe.u.data.flags = 1; ++ iwe.u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32); ++ start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); ++ ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-12); ++ ++ if(p && ht_ielen>0) ++ { ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ ht_cap = _TRUE; ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); ++ bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; ++ short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; ++ } ++ ++ /* Add the protocol name */ ++ iwe.cmd = SIOCGIWNAME; ++ if ((rtw_is_cckratesonly_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11b"); ++ } ++ else if ((rtw_is_cckrates_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bgn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bg"); ++ } ++ else ++ { ++ if(pnetwork->network.Configuration.DSConfig > 14) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11an"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11a"); ++ } ++ else ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11gn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11g"); ++ } ++ } ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN); ++ ++ /* Add mode */ ++ iwe.cmd = SIOCGIWMODE; ++ _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); ++ ++ ++ cap = le16_to_cpu(cap); ++ ++ if(cap & (WLAN_CAPABILITY_IBSS |WLAN_CAPABILITY_BSS)){ ++ if (cap & WLAN_CAPABILITY_BSS) ++ iwe.u.mode = IW_MODE_MASTER; ++ else ++ iwe.u.mode = IW_MODE_ADHOC; ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN); ++ } ++ ++ if(pnetwork->network.Configuration.DSConfig<1 /*|| pnetwork->network.Configuration.DSConfig>14*/) ++ pnetwork->network.Configuration.DSConfig = 1; ++ ++ /* Add frequency/channel */ ++ iwe.cmd = SIOCGIWFREQ; ++ iwe.u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000; ++ iwe.u.freq.e = 1; ++ iwe.u.freq.i = pnetwork->network.Configuration.DSConfig; ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN); ++ ++ /* Add encryption capability */ ++ iwe.cmd = SIOCGIWENCODE; ++ if (cap & WLAN_CAPABILITY_PRIVACY) ++ iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; ++ else ++ iwe.u.data.flags = IW_ENCODE_DISABLED; ++ iwe.u.data.length = 0; ++ start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); ++ ++ /*Add basic and extended rates */ ++ max_rate = 0; ++ p = custom; ++ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): "); ++ while(pnetwork->network.SupportedRates[i]!=0) ++ { ++ rate = pnetwork->network.SupportedRates[i]&0x7F; ++ if (rate > max_rate) ++ max_rate = rate; ++ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), ++ "%d%s ", rate >> 1, (rate & 1) ? ".5" : ""); ++ i++; ++ } ++ ++ if(ht_cap == _TRUE) ++ { ++ if(mcs_rate&0x8000)//MCS15 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); ++ ++ } ++ else if(mcs_rate&0x0080)//MCS7 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++ else//default MCS7 ++ { ++ DBG_871X("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate); ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++ ++ max_rate = max_rate*2;//Mbps/2; ++ } ++ ++ iwe.cmd = SIOCGIWRATE; ++ iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0; ++ iwe.u.bitrate.value = max_rate * 500000; ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN); ++ ++ //parsing WPA/WPA2 IE ++ { ++ u8 buf[MAX_WPA_IE_LEN]; ++ u8 wpa_ie[255],rsn_ie[255]; ++ u16 wpa_len=0,rsn_len=0; ++ u8 *p; ++ sint out_len=0; ++ out_len=rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,rsn_ie,&rsn_len,wpa_ie,&wpa_len); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); ++ ++ if (wpa_len > 0) ++ { ++ p=buf; ++ _rtw_memset(buf, 0, MAX_WPA_IE_LEN); ++ p += sprintf(p, "wpa_ie="); ++ for (i = 0; i < wpa_len; i++) { ++ p += sprintf(p, "%02x", wpa_ie[i]); ++ } ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = strlen(buf); ++ start = iwe_stream_add_point(info, start, stop, &iwe,buf); ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = wpa_len; ++ start = iwe_stream_add_point(info, start, stop, &iwe, wpa_ie); ++ } ++ if (rsn_len > 0) ++ { ++ p = buf; ++ _rtw_memset(buf, 0, MAX_WPA_IE_LEN); ++ p += sprintf(p, "rsn_ie="); ++ for (i = 0; i < rsn_len; i++) { ++ p += sprintf(p, "%02x", rsn_ie[i]); ++ } ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = strlen(buf); ++ start = iwe_stream_add_point(info, start, stop, &iwe,buf); ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = rsn_len; ++ start = iwe_stream_add_point(info, start, stop, &iwe, rsn_ie); ++ } ++ } ++ ++ { //parsing WPS IE ++ uint cnt = 0,total_ielen; ++ u8 *wpsie_ptr=NULL; ++ uint wps_ielen = 0; ++ ++ u8 *ie_ptr = pnetwork->network.IEs +_FIXED_IE_LENGTH_; ++ total_ielen= pnetwork->network.IELength - _FIXED_IE_LENGTH_; ++ ++ while(cnt < total_ielen) ++ { ++ if(rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen>2)) ++ { ++ wpsie_ptr = &ie_ptr[cnt]; ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = (u16)wps_ielen; ++ start = iwe_stream_add_point(info, start, stop, &iwe, wpsie_ptr); ++ } ++ cnt+=ie_ptr[cnt+1]+2; //goto next ++ } ++ } ++ ++ ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 ss, sq; ++ ++ /* Add quality statistics */ ++ iwe.cmd = IWEVQUAL; ++ iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_INVALID ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ | IW_QUAL_DBM ++ #endif ++ ; ++ ++ if ( check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE && ++ is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) { ++ ss = padapter->recvpriv.signal_strength; ++ sq = padapter->recvpriv.signal_qual; ++ } else { ++ ss = pnetwork->network.PhyInfo.SignalStrength; ++ sq = pnetwork->network.PhyInfo.SignalQuality; ++ } ++ ++ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm ++ #else ++ iwe.u.qual.level = (u8)ss;//% ++ #endif ++ ++ iwe.u.qual.qual = (u8)sq; // signal quality ++ ++ #ifdef CONFIG_PLATFORM_ROCKCHIPS ++ iwe.u.qual.noise = -100; // noise level suggest by zhf@rockchips ++ #else ++ iwe.u.qual.noise = 0; // noise level ++ #endif //CONFIG_PLATFORM_ROCKCHIPS ++ ++ //DBG_871X("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN); ++} ++ ++ return start; ++} ++ ++static int wpa_set_auth_algs(struct net_device *dev, u32 value) ++{ ++ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); ++ int ret = 0; ++ ++ if ((value & AUTH_ALG_SHARED_KEY)&&(value & AUTH_ALG_OPEN_SYSTEM)) ++ { ++ DBG_871X("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY and AUTH_ALG_OPEN_SYSTEM [value:0x%x]\n",value); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ } ++ else if (value & AUTH_ALG_SHARED_KEY) ++ { ++ DBG_871X("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY [value:0x%x]\n",value); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++#endif ++ } ++ else if(value & AUTH_ALG_OPEN_SYSTEM) ++ { ++ DBG_871X("wpa_set_auth_algs, AUTH_ALG_OPEN_SYSTEM\n"); ++ //padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ if(padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK) ++ { ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++#endif ++ } ++ ++ } ++ else if(value & AUTH_ALG_LEAP) ++ { ++ DBG_871X("wpa_set_auth_algs, AUTH_ALG_LEAP\n"); ++ } ++ else ++ { ++ DBG_871X("wpa_set_auth_algs, error!\n"); ++ ret = -EINVAL; ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ ++ if (param->u.crypt.idx >= WEP_KEYS ++#ifdef CONFIG_IEEE80211W ++ && param->u.crypt.idx > BIP_MAX_KEYID ++#endif //CONFIG_IEEE80211W ++ ) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_871X("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); ++ DBG_871X("(1)wep_key_idx=%d\n", wep_key_idx); ++ ++ if (wep_key_idx > WEP_KEYS) ++ return -EINVAL; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_871X("wep, set_tx=1\n"); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ } ++ else ++ { ++ DBG_871X("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam ++ ++ if (wep_key_idx >= WEP_KEYS) { ++ ret = -EOPNOTSUPP ; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); ++ } ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ ++ //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ //DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n")); ++ DBG_871X("\n ~~~~stastakey:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ else//group key ++ { ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0 || strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ //only TKIP group key need to install this ++ if(param->u.crypt.key_len > 16) ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ } ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR((" param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ DBG_871X(" ~~~~set sta key:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); ++ } ++#ifdef CONFIG_IEEE80211W ++ else if(strcmp(param->u.crypt.alg, "BIP") == 0) ++ { ++ int no; ++ //printk("BIP key_len=%d , index=%d @@@@@@@@@@@@@@@@@@\n", param->u.crypt.key_len, param->u.crypt.idx); ++ //save the IGTK key, length 16 bytes ++ _rtw_memcpy(padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ /*printk("IGTK key below:\n"); ++ for(no=0;no<16;no++) ++ printk(" %02x ", padapter->securitypriv.dot11wBIPKey[param->u.crypt.idx].skey[no]); ++ printk("\n");*/ ++ padapter->securitypriv.dot11wBIPKeyid = param->u.crypt.idx; ++ padapter->securitypriv.binstallBIPkey = _TRUE; ++ DBG_871X(" ~~~~set sta key:IGKT\n"); ++ } ++#endif //CONFIG_IEEE80211W ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++exit: ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep, wep_total_len); ++ } ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++ u8 null_addr[]= {0,0,0,0,0,0}; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++ if((ielen > MAX_WPA_IE_LEN) || (pie == NULL)){ ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ if(pie == NULL) ++ return ret; ++ else ++ return -EINVAL; ++ } ++ ++ if(ielen) ++ { ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_871X("\n wpa_ie(length:%d):\n", ielen); ++ for(i=0;i= RSN_SELECTOR_LEN){ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ } ++ else if (left > 0){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); ++ ret =-1; ++ goto exit; ++ } ++#endif ++ ++ if(rtw_parse_wpa_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); ++ } ++ ++ if(rtw_parse_wpa2_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); ++ } ++ ++ if (group_cipher == 0) ++ { ++ group_cipher = WPA_CIPHER_NONE; ++ } ++ if (pairwise_cipher == 0) ++ { ++ pairwise_cipher = WPA_CIPHER_NONE; ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ _clr_fwstate_(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ {//set wps_ie ++ u16 cnt = 0; ++ u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ while( cnt < ielen ) ++ { ++ eid = buf[cnt]; ++ ++ if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&buf[cnt+2], wps_oui, 4)==_TRUE)) ++ { ++ DBG_871X("SET WPS_IE\n"); ++ ++ padapter->securitypriv.wps_ie_len = ( (buf[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (buf[cnt+1]+2):(MAX_WPA_IE_LEN<<2); ++ ++ _rtw_memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); ++ ++ set_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS); ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); ++ } ++#endif //CONFIG_P2P ++ cnt += buf[cnt+1]+2; ++ ++ break; ++ } else { ++ cnt += buf[cnt+1]+2; //goto next ++ } ++ } ++ } ++ } ++ ++ //TKIP and AES disallow multicast packets until installing group key ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_WTMIC_ ++ || padapter->securitypriv.dot11PrivacyAlgrthm == _AES_) ++ //WPS open need to enable multicast ++ //|| check_fwstate(&padapter->mlmepriv, WIFI_UNDER_WPS) == _TRUE) ++ rtw_hal_set_hwreg(padapter, HW_VAR_OFF_RCR_AM, null_addr); ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ ++ if (buf) rtw_mfree(buf, ielen); ++ ++ return ret; ++} ++ ++static int rtw_wx_get_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 cap; ++ u32 ht_ielen = 0; ++ char *p; ++ u8 ht_cap=_FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ NDIS_802_11_RATES_EX* prates = NULL; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("cmd_code=%x\n", info->cmd)); ++ ++ _func_enter_; ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12); ++ if(p && ht_ielen>0) ++ { ++ ht_cap = _TRUE; ++ } ++ ++ prates = &pcur_bss->SupportedRates; ++ ++ if (rtw_is_cckratesonly_included((u8*)prates) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); ++ } ++ else if ((rtw_is_cckrates_included((u8*)prates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); ++ } ++ else ++ { ++ if(pcur_bss->Configuration.DSConfig > 14) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11an"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11a"); ++ } ++ else ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11gn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); ++ } ++ } ++ } ++ else ++ { ++ //prates = &padapter->registrypriv.dev_network.SupportedRates; ++ //snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); ++ snprintf(wrqu->name, IFNAMSIZ, "unassociated"); ++ } ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_freq(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_wx_set_freq\n")); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_get_freq(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ //wrqu->freq.m = ieee80211_wlan_frequencies[pcur_bss->Configuration.DSConfig-1] * 100000; ++ wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000; ++ wrqu->freq.e = 1; ++ wrqu->freq.i = pcur_bss->Configuration.DSConfig; ++ ++ } ++ else{ ++ wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000; ++ wrqu->freq.e = 1; ++ wrqu->freq.i = padapter->mlmeextpriv.cur_channel; ++ } ++ ++ return 0; ++} ++ ++static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; ++ int ret = 0; ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ _func_enter_; ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ switch(wrqu->mode) ++ { ++ case IW_MODE_AUTO: ++ networkType = Ndis802_11AutoUnknown; ++ DBG_871X("set_mode = IW_MODE_AUTO\n"); ++ break; ++ case IW_MODE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ DBG_871X("set_mode = IW_MODE_ADHOC\n"); ++ break; ++ case IW_MODE_MASTER: ++ networkType = Ndis802_11APMode; ++ DBG_871X("set_mode = IW_MODE_MASTER\n"); ++ //rtw_setopmode_cmd(padapter, networkType); ++ break; ++ case IW_MODE_INFRA: ++ networkType = Ndis802_11Infrastructure; ++ DBG_871X("set_mode = IW_MODE_INFRA\n"); ++ break; ++ ++ default : ++ ret = -EINVAL;; ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("\n Mode: %s is not supported \n", iw_operation_mode[wrqu->mode])); ++ goto exit; ++ } ++ ++/* ++ if(Ndis802_11APMode == networkType) ++ { ++ rtw_setopmode_cmd(padapter, networkType); ++ } ++ else ++ { ++ rtw_setopmode_cmd(padapter, Ndis802_11AutoUnknown); ++ } ++*/ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _enter_critical_bh(&queue->lock, &irqL); ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE){ ++ ++ ret = -EPERM; ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ goto exit; ++ ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ rtw_setopmode_cmd(padapter, networkType); ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_mode \n")); ++ ++ _func_enter_; ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ wrqu->mode = IW_MODE_INFRA; ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ ++ { ++ wrqu->mode = IW_MODE_ADHOC; ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ wrqu->mode = IW_MODE_MASTER; ++ } ++ else ++ { ++ wrqu->mode = IW_MODE_AUTO; ++ } ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++ ++static int rtw_wx_set_pmkid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 j,blInserted = _FALSE; ++ int intReturn = _FALSE; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct iw_pmksa* pPMK = ( struct iw_pmksa* ) extra; ++ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; ++ u8 strIssueBssid[ ETH_ALEN ] = { 0x00 }; ++ ++/* ++ struct iw_pmksa ++ { ++ __u32 cmd; ++ struct sockaddr bssid; ++ __u8 pmkid[IW_PMKID_LEN]; //IW_PMKID_LEN=16 ++ } ++ There are the BSSID information in the bssid.sa_data array. ++ If cmd is IW_PMKSA_FLUSH, it means the wpa_suppplicant wants to clear all the PMKID information. ++ If cmd is IW_PMKSA_ADD, it means the wpa_supplicant wants to add a PMKID/BSSID to driver. ++ If cmd is IW_PMKSA_REMOVE, it means the wpa_supplicant wants to remove a PMKID/BSSID from driver. ++ */ ++ ++ _rtw_memcpy( strIssueBssid, pPMK->bssid.sa_data, ETH_ALEN); ++ if ( pPMK->cmd == IW_PMKSA_ADD ) ++ { ++ DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_ADD!\n" ); ++ if ( _rtw_memcmp( strIssueBssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) ++ { ++ return( intReturn ); ++ } ++ else ++ { ++ intReturn = _TRUE; ++ } ++ blInserted = _FALSE; ++ ++ //overwrite PMKID ++ for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => rewrite with new PMKID. ++ ++ DBG_871X( "[rtw_wx_set_pmkid] BSSID exists in the PMKList.\n" ); ++ ++ _rtw_memcpy( psecuritypriv->PMKIDList[j].PMKID, pPMK->pmkid, IW_PMKID_LEN); ++ psecuritypriv->PMKIDList[ j ].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex = j+1; ++ blInserted = _TRUE; ++ break; ++ } ++ } ++ ++ if(!blInserted) ++ { ++ // Find a new entry ++ DBG_871X( "[rtw_wx_set_pmkid] Use the new entry index = %d for this PMKID.\n", ++ psecuritypriv->PMKIDIndex ); ++ ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, strIssueBssid, ETH_ALEN); ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pPMK->pmkid, IW_PMKID_LEN); ++ ++ psecuritypriv->PMKIDList[ psecuritypriv->PMKIDIndex ].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex++ ; ++ if(psecuritypriv->PMKIDIndex==16) ++ { ++ psecuritypriv->PMKIDIndex =0; ++ } ++ } ++ } ++ else if ( pPMK->cmd == IW_PMKSA_REMOVE ) ++ { ++ DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_REMOVE!\n" ); ++ intReturn = _TRUE; ++ for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. ++ _rtw_memset( psecuritypriv->PMKIDList[ j ].Bssid, 0x00, ETH_ALEN ); ++ psecuritypriv->PMKIDList[ j ].bUsed = _FALSE; ++ break; ++ } ++ } ++ } ++ else if ( pPMK->cmd == IW_PMKSA_FLUSH ) ++ { ++ DBG_871X( "[rtw_wx_set_pmkid] IW_PMKSA_FLUSH!\n" ); ++ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ psecuritypriv->PMKIDIndex = 0; ++ intReturn = _TRUE; ++ } ++ return( intReturn ); ++} ++ ++static int rtw_wx_get_sens(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ #ifdef CONFIG_PLATFORM_ROCKCHIPS ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ /* ++ * 20110311 Commented by Jeff ++ * For rockchip platform's wpa_driver_wext_get_rssi ++ */ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ //wrqu->sens.value=-padapter->recvpriv.signal_strength; ++ wrqu->sens.value=-padapter->recvpriv.rssi; ++ //DBG_871X("%s: %d\n", __FUNCTION__, wrqu->sens.value); ++ wrqu->sens.fixed = 0; /* no auto select */ ++ } else ++ #endif ++ { ++ wrqu->sens.value = 0; ++ wrqu->sens.fixed = 0; /* no auto select */ ++ wrqu->sens.disabled = 1; ++ } ++ return 0; ++} ++ ++static int rtw_wx_get_range(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ struct iw_range *range = (struct iw_range *)extra; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ u16 val; ++ int i; ++ ++ _func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_range. cmd_code=%x\n", info->cmd)); ++ ++ wrqu->data.length = sizeof(*range); ++ _rtw_memset(range, 0, sizeof(*range)); ++ ++ /* Let's try to keep this struct in the same order as in ++ * linux/include/wireless.h ++ */ ++ ++ /* TODO: See what values we can set, and remove the ones we can't ++ * set, or fill them with some default data. ++ */ ++ ++ /* ~5 Mb/s real (802.11b) */ ++ range->throughput = 5 * 1000 * 1000; ++ ++ // TODO: Not used in 802.11b? ++// range->min_nwid; /* Minimal NWID we are able to set */ ++ // TODO: Not used in 802.11b? ++// range->max_nwid; /* Maximal NWID we are able to set */ ++ ++ /* Old Frequency (backward compat - moved lower ) */ ++// range->old_num_channels; ++// range->old_num_frequency; ++// range->old_freq[6]; /* Filler to keep "version" at the same offset */ ++ ++ /* signal level threshold range */ ++ ++ //percent values between 0 and 100. ++ range->max_qual.qual = 100; ++ range->max_qual.level = 100; ++ range->max_qual.noise = 100; ++ range->max_qual.updated = 7; /* Updated all three */ ++ ++ ++ range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */ ++ /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ ++ range->avg_qual.level = 20 + -98; ++ range->avg_qual.noise = 0; ++ range->avg_qual.updated = 7; /* Updated all three */ ++ ++ range->num_bitrates = RATE_COUNT; ++ ++ for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) { ++ range->bitrate[i] = rtw_rates[i]; ++ } ++ ++ range->min_frag = MIN_FRAG_THRESHOLD; ++ range->max_frag = MAX_FRAG_THRESHOLD; ++ ++ range->pm_capa = 0; ++ ++ range->we_version_compiled = WIRELESS_EXT; ++ range->we_version_source = 16; ++ ++// range->retry_capa; /* What retry options are supported */ ++// range->retry_flags; /* How to decode max/min retry limit */ ++// range->r_time_flags; /* How to decode max/min retry life */ ++// range->min_retry; /* Minimal number of retries */ ++// range->max_retry; /* Maximal number of retries */ ++// range->min_r_time; /* Minimal retry lifetime */ ++// range->max_r_time; /* Maximal retry lifetime */ ++ ++ for (i = 0, val = 0; i < MAX_CHANNEL_NUM; i++) { ++ ++ // Include only legal frequencies for some countries ++ if(pmlmeext->channel_set[i].ChannelNum != 0) ++ { ++ range->freq[val].i = pmlmeext->channel_set[i].ChannelNum; ++ range->freq[val].m = rtw_ch2freq(pmlmeext->channel_set[i].ChannelNum) * 100000; ++ range->freq[val].e = 1; ++ val++; ++ } ++ ++ if (val == IW_MAX_FREQUENCIES) ++ break; ++ } ++ ++ range->num_channels = val; ++ range->num_frequency = val; ++ ++// Commented by Albert 2009/10/13 ++// The following code will proivde the security capability to network manager. ++// If the driver doesn't provide this capability to network manager, ++// the WPA/WPA2 routers can't be choosen in the network manager. ++ ++/* ++#define IW_SCAN_CAPA_NONE 0x00 ++#define IW_SCAN_CAPA_ESSID 0x01 ++#define IW_SCAN_CAPA_BSSID 0x02 ++#define IW_SCAN_CAPA_CHANNEL 0x04 ++#define IW_SCAN_CAPA_MODE 0x08 ++#define IW_SCAN_CAPA_RATE 0x10 ++#define IW_SCAN_CAPA_TYPE 0x20 ++#define IW_SCAN_CAPA_TIME 0x40 ++*/ ++ ++#if WIRELESS_EXT > 17 ++ range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2| ++ IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP; ++#endif ++ ++#ifdef IW_SCAN_CAPA_ESSID //WIRELESS_EXT > 21 ++ range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE |IW_SCAN_CAPA_BSSID| ++ IW_SCAN_CAPA_CHANNEL|IW_SCAN_CAPA_MODE|IW_SCAN_CAPA_RATE; ++#endif ++ ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++//set bssid flow ++//s1. rtw_set_802_11_infrastructure_mode() ++//s2. rtw_set_802_11_authentication_mode() ++//s3. set_802_11_encryption_mode() ++//s4. rtw_set_802_11_bssid() ++static int rtw_wx_set_wap(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *awrq, ++ char *extra) ++{ ++ _irqL irqL; ++ uint ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sockaddr *temp = (struct sockaddr *)awrq; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _list *phead; ++ u8 *dst_bssid, *src_bssid; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ ++ _func_enter_; ++/* ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type > PRIMARY_IFACE) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++*/ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ printk("set bssid, but buddy_intf is under scanning or linking\n"); ++ ++ ret = -EINVAL; ++ ++ goto exit; ++ } ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) ++ { ++ printk("set bssid, but buddy_intf is under scanning or linking\n"); ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) ++ { ++ ret= -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++ ++ if (temp->sa_family != ARPHRD_ETHER){ ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ authmode = padapter->securitypriv.ndisauthtype; ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ pmlmepriv->pscanned = get_next(phead); ++ ++ while (1) ++ { ++ ++ if ((rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) == _TRUE) ++ { ++#if 0 ++ ret = -EINVAL; ++ goto exit; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ rtw_set_802_11_bssid(padapter, temp->sa_data); ++ goto exit; ++ } ++ else ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ dst_bssid = pnetwork->network.MacAddress; ++ ++ src_bssid = temp->sa_data; ++ ++ if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) ++ { ++ if(!rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode)) ++ { ++ ret = -1; ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ goto exit; ++ } ++ ++ break; ++ } ++ ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_wap(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ wrqu->ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_wap\n")); ++ ++ _func_enter_; ++ ++ if ( ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) || ++ ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) || ++ ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE) ) ++ { ++ ++ _rtw_memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN); ++ } ++ else ++ { ++ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); ++ } ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_set_mlme(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++#if 0 ++/* SIOCSIWMLME data */ ++struct iw_mlme ++{ ++ __u16 cmd; /* IW_MLME_* */ ++ __u16 reason_code; ++ struct sockaddr addr; ++}; ++#endif ++ ++ int ret=0; ++ u16 reason; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_mlme *mlme = (struct iw_mlme *) extra; ++ ++ ++ if(mlme==NULL) ++ return -1; ++ ++ printk("%s\n", __FUNCTION__); ++ ++ reason = cpu_to_le16(mlme->reason_code); ++ ++ ++ printk("%s, cmd=%d, reason=%d\n", __FUNCTION__, mlme->cmd, reason); ++ ++ switch (mlme->cmd) ++ { ++ case IW_MLME_DEAUTH: ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ break; ++ ++ case IW_MLME_DISASSOC: ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ u8 _status = _FALSE; ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ _irqL irqL; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_set_scan\n")); ++ ++_func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++/* ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type > PRIMARY_IFACE) ++ { ++ ret = -1; ++ goto exit; ++ } ++#endif ++*/ ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ret = -1; ++ goto exit; ++ } ++#endif ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) ++ { ++ ret= -1; ++ goto exit; ++ } ++ ++ if(padapter->bDriverStopped){ ++ DBG_871X("bDriverStopped=%d\n", padapter->bDriverStopped); ++ ret= -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -1; ++ goto exit; ++ } ++ ++ // When Busy Traffic, driver do not site survey. So driver return success. ++ // wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. ++ // modify by thomas 2011-02-22. ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++ indicate_wx_scan_complete_event(padapter); ++ goto exit; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ indicate_wx_scan_complete_event(padapter); ++ goto exit; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, ++ _FW_UNDER_SURVEY|_FW_UNDER_LINKING|WIFI_UNDER_WPS) == _TRUE) ++ { ++ if(check_buddy_fwstate(padapter, _FW_UNDER_SURVEY)) ++ { ++ printk("scanning_via_buddy_intf\n"); ++ pmlmepriv->scanning_via_buddy_intf = _TRUE; ++ } ++ ++ indicate_wx_scan_complete_event(padapter); ++ ++ goto exit; ++ } ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) ++ { ++ indicate_wx_scan_complete_event(padapter); ++ goto exit; ++ } ++#endif ++ ++// Mareded by Albert 20101103 ++// For the DMP WiFi Display project, the driver won't to scan because ++// the pmlmepriv->scan_interval is always equal to 3. ++// So, the wpa_supplicant won't find out the WPS SoftAP. ++ ++/* ++ if(pmlmepriv->scan_interval>10) ++ pmlmepriv->scan_interval = 0; ++ ++ if(pmlmepriv->scan_interval > 0) ++ { ++ DBG_871X("scan done\n"); ++ ret = 0; ++ goto exit; ++ } ++ ++*/ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_pre_state( pwdinfo, rtw_p2p_state( pwdinfo ) ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_FULL); ++ rtw_free_network_queue(padapter, _TRUE); ++ } ++#endif //CONFIG_P2P ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ ++#if WIRELESS_EXT >= 17 ++ if (wrqu->data.length == sizeof(struct iw_scan_req)) ++ { ++ struct iw_scan_req *req = (struct iw_scan_req *)extra; ++ ++ if (wrqu->data.flags & IW_SCAN_THIS_ESSID) ++ { ++ int len = min((int)req->essid_len, IW_ESSID_MAX_SIZE); ++ ++ _rtw_memcpy(ssid[0].Ssid, req->essid, len); ++ ssid[0].SsidLength = len; ++ ++ DBG_871X("IW_SCAN_THIS_ESSID, ssid=%s, len=%d\n", req->essid, req->essid_len); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ _status = rtw_sitesurvey_cmd(padapter, ssid, 1, NULL, 0); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ } ++ else if (req->scan_type == IW_SCAN_TYPE_PASSIVE) ++ { ++ DBG_871X("rtw_wx_set_scan, req->scan_type == IW_SCAN_TYPE_PASSIVE\n"); ++ } ++ ++ } ++ else ++#endif ++ ++ if( wrqu->data.length >= WEXT_CSCAN_HEADER_SIZE ++ && _rtw_memcmp(extra, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ++ ) ++ { ++ int len = wrqu->data.length -WEXT_CSCAN_HEADER_SIZE; ++ char *pos = extra+WEXT_CSCAN_HEADER_SIZE; ++ char section; ++ char sec_len; ++ int ssid_index = 0; ++ ++ //DBG_871X("%s COMBO_SCAN header is recognized\n", __FUNCTION__); ++ ++ while(len >= 1) { ++ section = *(pos++); len-=1; ++ ++ switch(section) { ++ case WEXT_CSCAN_SSID_SECTION: ++ //DBG_871X("WEXT_CSCAN_SSID_SECTION\n"); ++ if(len < 1) { ++ len = 0; ++ break; ++ } ++ ++ sec_len = *(pos++); len-=1; ++ ++ if(sec_len>0 && sec_len<=len) { ++ ssid[ssid_index].SsidLength = sec_len; ++ _rtw_memcpy(ssid[ssid_index].Ssid, pos, ssid[ssid_index].SsidLength); ++ //DBG_871X("%s COMBO_SCAN with specific ssid:%s, %d\n", __FUNCTION__ ++ // , ssid[ssid_index].Ssid, ssid[ssid_index].SsidLength); ++ ssid_index++; ++ } ++ ++ pos+=sec_len; len-=sec_len; ++ break; ++ ++ ++ case WEXT_CSCAN_CHANNEL_SECTION: ++ //DBG_871X("WEXT_CSCAN_CHANNEL_SECTION\n"); ++ pos+=1; len-=1; ++ break; ++ case WEXT_CSCAN_ACTV_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_ACTV_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_PASV_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_PASV_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_HOME_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_HOME_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_TYPE_SECTION: ++ //DBG_871X("WEXT_CSCAN_TYPE_SECTION\n"); ++ pos+=1; len-=1; ++ break; ++ #if 0 ++ case WEXT_CSCAN_NPROBE_SECTION: ++ DBG_871X("WEXT_CSCAN_NPROBE_SECTION\n"); ++ break; ++ #endif ++ ++ default: ++ //DBG_871X("Unknown CSCAN section %c\n", section); ++ len = 0; // stop parsing ++ } ++ //DBG_871X("len:%d\n", len); ++ ++ } ++ ++ //jeff: it has still some scan paramater to parse, we only do this now... ++ _status = rtw_set_802_11_bssid_list_scan(padapter, ssid, RTW_SSID_SCAN_AMOUNT); ++ ++ } else ++ ++ { ++ _status = rtw_set_802_11_bssid_list_scan(padapter, NULL, 0); ++ } ++ ++ if(_status == _FALSE) ++ ret = -1; ++ ++exit: ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ char *ev = extra; ++ char *stop = ev + wrqu->data.length; ++ u32 ret = 0; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_CONCURRENT_MODE ++ //PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ //struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++#endif ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan\n")); ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_, (" Start of Query SIOCGIWSCAN .\n")); ++ ++ _func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++ ++/* ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type > PRIMARY_IFACE) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++*/ ++ if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ // P2P is enabled ++ if ( padapter->chip_type == RTL8192D ) ++ wait_for_surveydone = 300; // Because the 8192du supports more channels. ++ else ++ wait_for_surveydone = 200; ++ } ++ else ++ { ++ // P2P is disabled ++ wait_for_surveydone = 100; ++ } ++#else ++ { ++ wait_for_surveydone = 100; ++ } ++#endif //CONFIG_P2P ++ ++/* ++#ifdef CONFIG_CONCURRENT_MODE ++ if(pmlmepriv->scanning_via_buddy_intf == _TRUE) ++ { ++ pmlmepriv->scanning_via_buddy_intf = _FALSE;//reset ++ ++ // change pointers to buddy interface ++ padapter = pbuddy_adapter; ++ pmlmepriv = pbuddy_mlmepriv; ++ queue = &(pbuddy_mlmepriv->scanned_queue); ++ ++ } ++#endif // CONFIG_CONCURRENT_MODE ++*/ ++ ++ wait_status = _FW_UNDER_SURVEY ++ #ifndef CONFIG_ANDROID ++ |_FW_UNDER_LINKING ++ #endif ++ ; ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ while(dc_check_fwstate(padapter, wait_status)== _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > wait_for_surveydone ) ++ break; ++ } ++#endif // CONFIG_DUALMAC_CONCURRENT ++ ++ while(check_fwstate(pmlmepriv, wait_status) == _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > wait_for_surveydone ) ++ break; ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ if((stop - ev) < SCAN_ITEM_SIZE) { ++ ret = -E2BIG; ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if(rtw_ch_set_search_ch(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) >= 0 ++ && rtw_mlme_band_check(padapter, pnetwork->network.Configuration.DSConfig) == _TRUE ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ ) ++ { ++ ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ wrqu->data.length = ev-extra; ++ wrqu->data.flags = 0; ++ ++exit: ++ ++ _func_exit_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++ return ret ; ++ ++} ++ ++//set ssid flow ++//s1. rtw_set_802_11_infrastructure_mode() ++//s2. set_802_11_authenticaion_mode() ++//s3. set_802_11_encryption_mode() ++//s4. rtw_set_802_11_ssid() ++static int rtw_wx_set_essid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ _list *phead; ++ s8 status = _TRUE; ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ ++ uint ret = 0, len; ++ ++ _func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++ ++/* ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->iface_type > PRIMARY_IFACE) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++*/ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_buddy_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ printk("set ssid, but buddy_intf is under scanning or linking\n"); ++ ++ ret = -EINVAL; ++ ++ goto exit; ++ } ++#endif ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ if (dc_check_fwstate(padapter, _FW_UNDER_SURVEY|_FW_UNDER_LINKING)== _TRUE) ++ { ++ printk("set bssid, but buddy_intf is under scanning or linking\n"); ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("+rtw_wx_set_essid: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); ++ if(_FAIL == rtw_pwr_wakeup(padapter)) ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++#if WIRELESS_EXT <= 20 ++ if ((wrqu->essid.length-1) > IW_ESSID_MAX_SIZE){ ++#else ++ if (wrqu->essid.length > IW_ESSID_MAX_SIZE){ ++#endif ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -1; ++ goto exit; ++ } ++ ++ authmode = padapter->securitypriv.ndisauthtype; ++ DBG_871X("=>%s\n",__FUNCTION__); ++ if (wrqu->essid.flags && wrqu->essid.length) ++ { ++ // Commented by Albert 20100519 ++ // We got the codes in "set_info" function of iwconfig source code. ++ // ========================================= ++ // wrq.u.essid.length = strlen(essid) + 1; ++ // if(we_kernel_version > 20) ++ // wrq.u.essid.length--; ++ // ========================================= ++ // That means, if the WIRELESS_EXT less than or equal to 20, the correct ssid len should subtract 1. ++#if WIRELESS_EXT <= 20 ++ len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE; ++#else ++ len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE; ++#endif ++ ++ if( wrqu->essid.length != 33 ) ++ DBG_871X("ssid=%s, len=%d\n", extra, wrqu->essid.length); ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = len; ++ _rtw_memcpy(ndis_ssid.Ssid, extra, len); ++ src_ssid = ndis_ssid.Ssid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid=[%s]\n", src_ssid)); ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ pmlmepriv->pscanned = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) ++ { ++#if 0 ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ rtw_set_802_11_ssid(padapter, &ndis_ssid); ++ ++ goto exit; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("rtw_wx_set_ssid(): scanned_queue is empty\n")); ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_warning_, ++ ("rtw_wx_set_essid: scan_q is empty, set ssid to check if scanning again!\n")); ++ ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ dst_ssid = pnetwork->network.Ssid.Ssid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_wx_set_essid: dst_ssid=%s\n", ++ pnetwork->network.Ssid.Ssid)); ++ ++ if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && ++ (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_wx_set_essid: find match, set infra mode\n")); ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) ++ continue; ++ } ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) ++ { ++ ret = -1; ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ goto exit; ++ } ++ ++ break; ++ } ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("set ssid: set_802_11_auth. mode=%d\n", authmode)); ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++ DBG_871X("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_essid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ u32 len,ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_essid\n")); ++ ++ _func_enter_; ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ len = pcur_bss->Ssid.SsidLength; ++ ++ wrqu->essid.length = len; ++ ++ _rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len); ++ ++ wrqu->essid.flags = 1; ++ } ++ else ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_set_rate(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int i, ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 datarates[NumRates]; ++ u32 target_rate = wrqu->bitrate.value; ++ u32 fixed = wrqu->bitrate.fixed; ++ u32 ratevalue = 0; ++ u8 mpdatarate[NumRates]={11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_set_rate \n")); ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("target_rate = %d, fixed = %d\n",target_rate,fixed)); ++ ++ if(target_rate == -1){ ++ ratevalue = 11; ++ goto set_rate; ++ } ++ target_rate = target_rate/100000; ++ ++ switch(target_rate){ ++ case 10: ++ ratevalue = 0; ++ break; ++ case 20: ++ ratevalue = 1; ++ break; ++ case 55: ++ ratevalue = 2; ++ break; ++ case 60: ++ ratevalue = 3; ++ break; ++ case 90: ++ ratevalue = 4; ++ break; ++ case 110: ++ ratevalue = 5; ++ break; ++ case 120: ++ ratevalue = 6; ++ break; ++ case 180: ++ ratevalue = 7; ++ break; ++ case 240: ++ ratevalue = 8; ++ break; ++ case 360: ++ ratevalue = 9; ++ break; ++ case 480: ++ ratevalue = 10; ++ break; ++ case 540: ++ ratevalue = 11; ++ break; ++ default: ++ ratevalue = 11; ++ break; ++ } ++ ++set_rate: ++ ++ for(i=0; ibitrate.fixed = 0; /* no auto select */ ++ wrqu->bitrate.value = max_rate * 100000; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_rts(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ if (wrqu->rts.disabled) ++ padapter->registrypriv.rts_thresh = 2347; ++ else { ++ if (wrqu->rts.value < 0 || ++ wrqu->rts.value > 2347) ++ return -EINVAL; ++ ++ padapter->registrypriv.rts_thresh = wrqu->rts.value; ++ } ++ ++ DBG_871X("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_get_rts(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ DBG_871X("%s, rts_thresh=%d\n", __func__, padapter->registrypriv.rts_thresh); ++ ++ wrqu->rts.value = padapter->registrypriv.rts_thresh; ++ wrqu->rts.fixed = 0; /* no auto select */ ++ //wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_frag(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ if (wrqu->frag.disabled) ++ padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD; ++ else { ++ if (wrqu->frag.value < MIN_FRAG_THRESHOLD || ++ wrqu->frag.value > MAX_FRAG_THRESHOLD) ++ return -EINVAL; ++ ++ padapter->xmitpriv.frag_len = wrqu->frag.value & ~0x1; ++ } ++ ++ DBG_871X("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_get_frag(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ DBG_871X("%s, frag_len=%d\n", __func__, padapter->xmitpriv.frag_len); ++ ++ wrqu->frag.value = padapter->xmitpriv.frag_len; ++ wrqu->frag.fixed = 0; /* no auto select */ ++ //wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_get_retry(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ ++ wrqu->retry.value = 7; ++ wrqu->retry.fixed = 0; /* no auto select */ ++ wrqu->retry.disabled = 1; ++ ++ return 0; ++ ++} ++ ++#if 0 ++#define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */ ++#define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */ ++#define IW_ENCODE_MODE 0xF000 /* Modes defined below */ ++#define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */ ++#define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */ ++#define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */ ++#define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */ ++#define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */ ++#define IW_ENCODE_TEMP 0x0400 /* Temporary key */ ++/* ++iwconfig wlan0 key on -> flags = 0x6001 -> maybe it means auto ++iwconfig wlan0 key off -> flags = 0x8800 ++iwconfig wlan0 key open -> flags = 0x2800 ++iwconfig wlan0 key open 1234567890 -> flags = 0x2000 ++iwconfig wlan0 key restricted -> flags = 0x4800 ++iwconfig wlan0 key open [3] 1234567890 -> flags = 0x2003 ++iwconfig wlan0 key restricted [2] 1234567890 -> flags = 0x4002 ++iwconfig wlan0 key open [3] -> flags = 0x2803 ++iwconfig wlan0 key restricted [2] -> flags = 0x4802 ++*/ ++#endif ++ ++static int rtw_wx_set_enc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *keybuf) ++{ ++ u32 key, ret = 0; ++ u32 keyindex_provided; ++ NDIS_802_11_WEP wep; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ ++ struct iw_point *erq = &(wrqu->encoding); ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ DBG_871X("+rtw_wx_set_enc, flags=0x%x\n", erq->flags); ++ ++ _rtw_memset(&wep, 0, sizeof(NDIS_802_11_WEP)); ++ ++ key = erq->flags & IW_ENCODE_INDEX; ++ ++ _func_enter_; ++ ++ if (erq->flags & IW_ENCODE_DISABLED) ++ { ++ DBG_871X("EncryptionDisabled\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ ++ goto exit; ++ } ++ ++ if (key) { ++ if (key > WEP_KEYS) ++ return -EINVAL; ++ key--; ++ keyindex_provided = 1; ++ } ++ else ++ { ++ keyindex_provided = 0; ++ key = padapter->securitypriv.dot11PrivacyKeyIndex; ++ DBG_871X("rtw_wx_set_enc, key=%d\n", key); ++ } ++ ++ //set authentication mode ++ if(erq->flags & IW_ENCODE_OPEN) ++ { ++ DBG_871X("rtw_wx_set_enc():IW_ENCODE_OPEN\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; ++#endif ++ ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ else if(erq->flags & IW_ENCODE_RESTRICTED) ++ { ++ DBG_871X("rtw_wx_set_enc():IW_ENCODE_RESTRICTED\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Shared; ++#endif ++ ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ authmode = Ndis802_11AuthModeShared; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ else ++ { ++ DBG_871X("rtw_wx_set_enc():erq->flags=0x%x\n", erq->flags); ++ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ ++ wep.KeyIndex = key; ++ if (erq->length > 0) ++ { ++ wep.KeyLength = erq->length <= 5 ? 5 : 13; ++ ++ wep.Length = wep.KeyLength + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ } ++ else ++ { ++ wep.KeyLength = 0 ; ++ ++ if(keyindex_provided == 1)// set key_id only, no given KeyMaterial(erq->length==0). ++ { ++ padapter->securitypriv.dot11PrivacyKeyIndex = key; ++ ++ DBG_871X("(keyindex_provided == 1), keyid=%d, key_len=%d\n", key, padapter->securitypriv.dot11DefKeylen[key]); ++ ++ switch(padapter->securitypriv.dot11DefKeylen[key]) ++ { ++ case 5: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ break; ++ case 13: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ break; ++ default: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ break; ++ } ++ ++ goto exit; ++ ++ } ++ ++ } ++ ++ wep.KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(wep.KeyMaterial, keybuf, wep.KeyLength); ++ ++ if (rtw_set_802_11_add_wep(padapter, &wep) == _FALSE) { ++ if(rf_on == pwrpriv->rf_pwrstate ) ++ ret = -EOPNOTSUPP; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_enc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *keybuf) ++{ ++ uint key, ret =0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *erq = &(wrqu->encoding); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ _func_enter_; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) ++ { ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE) ++ { ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ return 0; ++ } ++ } ++ ++ ++ key = erq->flags & IW_ENCODE_INDEX; ++ ++ if (key) { ++ if (key > WEP_KEYS) ++ return -EINVAL; ++ key--; ++ } else ++ { ++ key = padapter->securitypriv.dot11PrivacyKeyIndex; ++ } ++ ++ erq->flags = key + 1; ++ ++ //if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) ++ //{ ++ // erq->flags |= IW_ENCODE_OPEN; ++ //} ++ ++ switch(padapter->securitypriv.ndisencryptstatus) ++ { ++ case Ndis802_11EncryptionNotSupported: ++ case Ndis802_11EncryptionDisabled: ++ ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ ++ break; ++ ++ case Ndis802_11Encryption1Enabled: ++ ++ erq->length = padapter->securitypriv.dot11DefKeylen[key]; ++ ++ if(erq->length) ++ { ++ _rtw_memcpy(keybuf, padapter->securitypriv.dot11DefKey[key].skey, padapter->securitypriv.dot11DefKeylen[key]); ++ ++ erq->flags |= IW_ENCODE_ENABLED; ++ ++ if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) ++ { ++ erq->flags |= IW_ENCODE_OPEN; ++ } ++ else if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeShared) ++ { ++ erq->flags |= IW_ENCODE_RESTRICTED; ++ } ++ } ++ else ++ { ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ } ++ ++ break; ++ ++ case Ndis802_11Encryption2Enabled: ++ case Ndis802_11Encryption3Enabled: ++ ++ erq->length = 16; ++ erq->flags |= (IW_ENCODE_ENABLED | IW_ENCODE_OPEN | IW_ENCODE_NOKEY); ++ ++ break; ++ ++ default: ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ ++ break; ++ ++ } ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_power(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ wrqu->power.value = 0; ++ wrqu->power.fixed = 0; /* no auto select */ ++ wrqu->power.disabled = 1; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_set_gen_ie(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length); ++ ++ return ret; ++} ++ ++static int rtw_wx_set_auth(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_param *param = (struct iw_param*)&(wrqu->param); ++ int ret = 0; ++ ++ switch (param->flags & IW_AUTH_INDEX) { ++ case IW_AUTH_WPA_VERSION: ++ break; ++ case IW_AUTH_CIPHER_PAIRWISE: ++ ++ break; ++ case IW_AUTH_CIPHER_GROUP: ++ ++ break; ++ case IW_AUTH_KEY_MGMT: ++ /* ++ * ??? does not use these parameters ++ */ ++ break; ++ ++ case IW_AUTH_TKIP_COUNTERMEASURES: ++ { ++ if ( param->value ) ++ { // wpa_supplicant is enabling the tkip countermeasure. ++ padapter->securitypriv.btkip_countermeasure = _TRUE; ++ } ++ else ++ { // wpa_supplicant is disabling the tkip countermeasure. ++ padapter->securitypriv.btkip_countermeasure = _FALSE; ++ } ++ break; ++ } ++ case IW_AUTH_DROP_UNENCRYPTED: ++ { ++ /* HACK: ++ * ++ * wpa_supplicant calls set_wpa_enabled when the driver ++ * is loaded and unloaded, regardless of if WPA is being ++ * used. No other calls are made which can be used to ++ * determine if encryption will be used or not prior to ++ * association being expected. If encryption is not being ++ * used, drop_unencrypted is set to false, else true -- we ++ * can use this to determine if the CAP_PRIVACY_ON bit should ++ * be set. ++ */ ++ ++ if(padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption1Enabled) ++ { ++ break;//it means init value, or using wep, ndisencryptstatus = Ndis802_11Encryption1Enabled, ++ // then it needn't reset it; ++ } ++ ++ if(param->value){ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeOpen; ++ } ++ ++ break; ++ } ++ ++ case IW_AUTH_80211_AUTH_ALG: ++ ++ #if defined(CONFIG_ANDROID) || 1 ++ /* ++ * It's the starting point of a link layer connection using wpa_supplicant ++ */ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { ++ LeaveAllPowerSaveMode(padapter); ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ DBG_871X("%s...call rtw_indicate_disconnect\n ",__FUNCTION__); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ #endif ++ ++ ++ ret = wpa_set_auth_algs(dev, (u32)param->value); ++ ++ break; ++ ++ case IW_AUTH_WPA_ENABLED: ++ ++ //if(param->value) ++ // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; //802.1x ++ //else ++ // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open;//open system ++ ++ //_disassociate(priv); ++ ++ break; ++ ++ case IW_AUTH_RX_UNENCRYPTED_EAPOL: ++ //ieee->ieee802_1x = param->value; ++ break; ++ ++ case IW_AUTH_PRIVACY_INVOKED: ++ //ieee->privacy_invoked = param->value; ++ break; ++ ++ default: ++ return -EOPNOTSUPP; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_set_enc_ext(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ struct iw_point *pencoding = &wrqu->encoding; ++ struct iw_encode_ext *pext = (struct iw_encode_ext *)extra; ++ int ret=0; ++ ++ param_len = sizeof(struct ieee_param) + pext->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ ++ switch (pext->alg) { ++ case IW_ENCODE_ALG_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case IW_ENCODE_ALG_WEP: ++ alg_name = "WEP"; ++ break; ++ case IW_ENCODE_ALG_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case IW_ENCODE_ALG_CCMP: ++ alg_name = "CCMP"; ++ break; ++#ifdef CONFIG_IEEE80211W ++ case IW_ENCODE_ALG_AES_CMAC: ++ alg_name = "BIP"; ++ break; ++#endif //CONFIG_IEEE80211W ++ default: ++ return -1; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if((pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY)//? ++#ifdef CONFIG_IEEE80211W ++ || (pext->ext_flags & IW_ENCODE_ALG_AES_CMAC) ++#endif //CONFIG_IEEE80211W ++ ) ++ { ++ param->u.crypt.set_tx = 0; ++ } ++ ++ if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)//? ++ { ++ param->u.crypt.set_tx = 1; ++ } ++ ++ param->u.crypt.idx = (pencoding->flags&0x00FF) -1 ; ++ ++ if (pext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) ++ { ++ _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 8); ++ } ++ ++ if(pext->key_len) ++ { ++ param->u.crypt.key_len = pext->key_len; ++ //_rtw_memcpy(param + 1, pext + 1, pext->key_len); ++ _rtw_memcpy(param->u.crypt.key, pext + 1, pext->key_len); ++ } ++ ++ ++ if (pencoding->flags & IW_ENCODE_DISABLED) ++ { ++ //todo: remove key ++ //remove = 1; ++ } ++ ++ ret = wpa_set_encryption(dev, param, param_len); ++ ++ ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_wx_get_nick(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ //struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ if(extra) ++ { ++ wrqu->data.length = 14; ++ wrqu->data.flags = 1; ++ _rtw_memcpy(extra, "", 14); ++ } ++ ++ //rtw_signal_process(pid, SIGUSR1); //for test ++ ++ //dump debug info here ++/* ++ u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, and 8021x ++ u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. ++ u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key ++ u32 ndisauthtype; ++ u32 ndisencryptstatus; ++*/ ++ ++ //DBG_871X("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", ++ // psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ // psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ ++ //DBG_871X("enc_alg=0x%x\n", psecuritypriv->dot11PrivacyAlgrthm); ++ //DBG_871X("auth_type=0x%x\n", psecuritypriv->ndisauthtype); ++ //DBG_871X("enc_type=0x%x\n", psecuritypriv->ndisencryptstatus); ++ ++#if 0 ++ DBG_871X("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); ++ DBG_871X("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); ++ DBG_871X("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); ++ DBG_871X("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); ++ DBG_871X("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); ++ ++ DBG_871X("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); ++ ++ ++ DBG_871X("\n"); ++ ++ DBG_871X("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); ++ DBG_871X("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); ++ ++ DBG_871X("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); ++ ++ DBG_871X("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); ++ ++ DBG_871X("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); ++ DBG_871X("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); ++ ++ DBG_871X("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); ++ DBG_871X("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); ++ DBG_871X("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); ++ DBG_871X("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); ++#endif ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_read32(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter; ++ struct iw_point *p; ++ u16 len; ++ u32 addr; ++ u32 data32; ++ u32 bytes; ++ u8 *ptmp; ++ ++ ++ padapter = (PADAPTER)rtw_netdev_priv(dev); ++ p = &wrqu->data; ++ len = p->length; ++ ptmp = (u8*)rtw_malloc(len); ++ if (NULL == ptmp) ++ return -ENOMEM; ++ ++ if (copy_from_user(ptmp, p->pointer, len)) { ++ rtw_mfree(ptmp, len); ++ return -EFAULT; ++ } ++ ++ bytes = 0; ++ addr = 0; ++ sscanf(ptmp, "%d,%x", &bytes, &addr); ++ ++ switch (bytes) { ++ case 1: ++ data32 = rtw_read8(padapter, addr); ++ sprintf(extra, "0x%02X", data32); ++ break; ++ case 2: ++ data32 = rtw_read16(padapter, addr); ++ sprintf(extra, "0x%04X", data32); ++ break; ++ case 4: ++ data32 = rtw_read32(padapter, addr); ++ sprintf(extra, "0x%08X", data32); ++ break; ++ default: ++ printk(KERN_INFO "%s: usage> read [bytes],[address(hex)]\n", __func__); ++ return -EINVAL; ++ } ++ printk(KERN_INFO "%s: addr=0x%08X data=%s\n", __func__, addr, extra); ++ ++ rtw_mfree(ptmp, len); ++ ++ return 0; ++} ++ ++static int rtw_wx_write32(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); ++ ++ u32 addr; ++ u32 data32; ++ u32 bytes; ++ ++ ++ bytes = 0; ++ addr = 0; ++ data32 = 0; ++ sscanf(extra, "%d,%x,%x", &bytes, &addr, &data32); ++ ++ switch (bytes) { ++ case 1: ++ rtw_write8(padapter, addr, (u8)data32); ++ printk(KERN_INFO "%s: addr=0x%08X data=0x%02X\n", __func__, addr, (u8)data32); ++ break; ++ case 2: ++ rtw_write16(padapter, addr, (u16)data32); ++ printk(KERN_INFO "%s: addr=0x%08X data=0x%04X\n", __func__, addr, (u16)data32); ++ break; ++ case 4: ++ rtw_write32(padapter, addr, data32); ++ printk(KERN_INFO "%s: addr=0x%08X data=0x%08X\n", __func__, addr, data32); ++ break; ++ default: ++ printk(KERN_INFO "%s: usage> write [bytes],[address(hex)],[data(hex)]\n", __func__); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rtw_wx_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u32 path, addr, data32; ++ ++ ++ path = *(u32*)extra; ++ addr = *((u32*)extra + 1); ++ data32 = rtw_hal_read_rfreg(padapter, path, addr, 0xFFFFF); ++// DBG_871X("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); ++ /* ++ * IMPORTANT!! ++ * Only when wireless private ioctl is at odd order, ++ * "extra" would be copied to user space. ++ */ ++ sprintf(extra, "0x%05x", data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u32 path, addr, data32; ++ ++ ++ path = *(u32*)extra; ++ addr = *((u32*)extra + 1); ++ data32 = *((u32*)extra + 2); ++// DBG_871X("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); ++ rtw_hal_write_rfreg(padapter, path, addr, 0xFFFFF, data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ return -1; ++} ++ ++static int dummy(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ //DBG_871X("cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv)); ++ ++ return -1; ++ ++} ++ ++static int rtw_wx_set_channel_plan(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ extern int rtw_channel_plan; ++ u8 channel_plan_req = (u8) (*((int *)wrqu)); ++ ++ #if 0 ++ rtw_channel_plan = (int)wrqu->data.pointer; ++ pregistrypriv->channel_plan = rtw_channel_plan; ++ pmlmepriv->ChannelPlan = pregistrypriv->channel_plan; ++ #endif ++ ++ if( _SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1) ) { ++ DBG_871X("%s set channel_plan = 0x%02X\n", __func__, pmlmepriv->ChannelPlan); ++ } else ++ return -EPERM; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ++ ("WLAN IOCTL: cmd_code=%x, fwstate=0x%x\n", ++ a->cmd, get_fwstate(pmlmepriv))); ++#endif ++ return 0; ++} ++ ++static int rtw_wx_get_sensitivity(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *buf) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ // Modified by Albert 20110914 ++ // This is in dbm format for MTK platform. ++ wrqu->qual.level = padapter->recvpriv.rssi; ++ DBG_871X(" level = %u\n", wrqu->qual.level ); ++#endif ++ return 0; ++} ++ ++static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ return rtw_set_wpa_ie(padapter, wrqu->data.pointer, wrqu->data.length); ++#else ++ return 0; ++#endif ++} ++ ++/* ++typedef int (*iw_handler)(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++*/ ++/* ++ * For all data larger than 16 octets, we need to use a ++ * pointer to memory allocated in user space. ++ */ ++static int rtw_drvext_hdl(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ #if 0 ++struct iw_point ++{ ++ void __user *pointer; /* Pointer to the data (in user space) */ ++ __u16 length; /* number of fields or size in bytes */ ++ __u16 flags; /* Optional params */ ++}; ++ #endif ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ u8 res; ++ struct drvext_handler *phandler; ++ struct drvext_oidparam *poidparam; ++ int ret; ++ u16 len; ++ u8 *pparmbuf, bset; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *p = &wrqu->data; ++ ++ if( (!p->length) || (!p->pointer)){ ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ bset = (u8)(p->flags&0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ if(bset)//set info ++ { ++ if (copy_from_user(pparmbuf, p->pointer,len)) { ++ rtw_mfree(pparmbuf, len); ++ ret = -EFAULT; ++ goto _rtw_drvext_hdl_exit; ++ } ++ } ++ else//query info ++ { ++ ++ } ++ ++ ++ // ++ poidparam = (struct drvext_oidparam *)pparmbuf; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("drvext set oid subcode [%d], len[%d], InformationBufferLength[%d]\r\n", ++ poidparam->subcode, poidparam->len, len)); ++ ++ ++ //check subcode ++ if ( poidparam->subcode >= MAX_DRVEXT_HANDLERS) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext handlers\r\n")); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ if ( poidparam->subcode >= MAX_DRVEXT_OID_SUBCODES) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext subcodes\r\n")); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ phandler = drvextoidhandlers + poidparam->subcode; ++ ++ if (poidparam->len != phandler->parmsize) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext param size %d vs %d\r\n", ++ poidparam->len , phandler->parmsize)); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ res = phandler->handler(&padapter->drvextpriv, bset, poidparam->data); ++ ++ if(res==0) ++ { ++ ret = 0; ++ ++ if (bset == 0x00) {//query info ++ //_rtw_memcpy(p->pointer, pparmbuf, len); ++ if (copy_to_user(p->pointer, pparmbuf, len)) ++ ret = -EFAULT; ++ } ++ } ++ else ++ ret = -EFAULT; ++ ++ ++_rtw_drvext_hdl_exit: ++ ++ return ret; ++ ++#endif ++ ++ return 0; ++ ++} ++ ++static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) ++{ ++ pRW_Reg RegRWStruct; ++ struct rf_reg_param *prfreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ switch(id) ++ { ++ case GEN_MP_IOCTL_SUBCODE(MP_START): ++ DBG_871X("871x_driver is only for normal mode, can't enter mp mode\n"); ++ break; ++ case GEN_MP_IOCTL_SUBCODE(READ_REG): ++ RegRWStruct = (pRW_Reg)pdata; ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset); ++ break; ++ case 2: ++ RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset); ++ break; ++ case 4: ++ RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset); ++ break; ++ default: ++ break; ++ } ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(WRITE_REG): ++ RegRWStruct = (pRW_Reg)pdata; ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value); ++ break; ++ case 2: ++ rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value); ++ break; ++ case 4: ++ rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value); ++ break; ++ default: ++ break; ++ } ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(READ_RF_REG): ++ ++ prfreg = (struct rf_reg_param *)pdata; ++ ++ path = (u8)prfreg->path; ++ offset = (u8)prfreg->offset; ++ ++ value = rtw_hal_read_rfreg(padapter, path, offset, 0xffffffff); ++ ++ prfreg->value = value; ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG): ++ ++ prfreg = (struct rf_reg_param *)pdata; ++ ++ path = (u8)prfreg->path; ++ offset = (u8)prfreg->offset; ++ value = prfreg->value; ++ ++ rtw_hal_write_rfreg(padapter, path, offset, 0xffffffff, value); ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO): ++ DBG_871X("==> trigger gpio 0\n"); ++ rtw_hal_set_hwreg(padapter, HW_VAR_TRIGGER_GPIO_0, 0); ++ break; ++#ifdef CONFIG_BT_COEXIST ++ case GEN_MP_IOCTL_SUBCODE(SET_DM_BT): ++ DBG_871X("==> set dm_bt_coexist:%x\n",*(u8 *)pdata); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BT_SET_COEXIST, pdata); ++ break; ++ case GEN_MP_IOCTL_SUBCODE(DEL_BA): ++ DBG_871X("==> delete ba:%x\n",*(u8 *)pdata); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BT_ISSUE_DELBA, pdata); ++ break; ++#endif ++#ifdef DBG_CONFIG_ERROR_DETECT ++ case GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS): ++ *pdata = rtw_hal_sreset_get_wifi_status(padapter); ++ break; ++#endif ++ ++ default: ++ break; ++ } ++ ++} ++ ++static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ u32 BytesRead, BytesWritten, BytesNeeded; ++ struct oid_par_priv oid_par; ++ struct mp_ioctl_handler *phandler; ++ struct mp_ioctl_param *poidparam; ++ uint status=0; ++ u16 len; ++ u8 *pparmbuf = NULL, bset; ++ PADAPTER padapter = (PADAPTER)rtw_netdev_priv(dev); ++ struct iw_point *p = &wrqu->data; ++ ++ //DBG_871X("+rtw_mp_ioctl_hdl\n"); ++ ++ //mutex_lock(&ioctl_mutex); ++ ++ if ((!p->length) || (!p->pointer)) { ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ pparmbuf = NULL; ++ bset = (u8)(p->flags & 0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ if (copy_from_user(pparmbuf, p->pointer, len)) { ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ poidparam = (struct mp_ioctl_param *)pparmbuf; ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_mp_ioctl_hdl: subcode [%d], len[%d], buffer_len[%d]\r\n", ++ poidparam->subcode, poidparam->len, len)); ++ ++ if (poidparam->subcode >= MAX_MP_IOCTL_SUBCODE) { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("no matching drvext subcodes\r\n")); ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ //DBG_871X("%s: %d\n", __func__, poidparam->subcode); ++ ++#ifdef CONFIG_MP_INCLUDED ++ phandler = mp_ioctl_hdl + poidparam->subcode; ++ ++ if ((phandler->paramsize != 0) && (poidparam->len < phandler->paramsize)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ++ ("no matching drvext param size %d vs %d\r\n", ++ poidparam->len, phandler->paramsize)); ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ if (phandler->handler) ++ { ++ oid_par.adapter_context = padapter; ++ oid_par.oid = phandler->oid; ++ oid_par.information_buf = poidparam->data; ++ oid_par.information_buf_len = poidparam->len; ++ oid_par.dbg = 0; ++ ++ BytesWritten = 0; ++ BytesNeeded = 0; ++ ++ if (bset) { ++ oid_par.bytes_rw = &BytesRead; ++ oid_par.bytes_needed = &BytesNeeded; ++ oid_par.type_of_oid = SET_OID; ++ } else { ++ oid_par.bytes_rw = &BytesWritten; ++ oid_par.bytes_needed = &BytesNeeded; ++ oid_par.type_of_oid = QUERY_OID; ++ } ++ ++ status = phandler->handler(&oid_par); ++ ++ //todo:check status, BytesNeeded, etc. ++ } ++ else { ++ DBG_871X("rtw_mp_ioctl_hdl(): err!, subcode=%d, oid=%d, handler=%p\n", ++ poidparam->subcode, phandler->oid, phandler->handler); ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++#else ++ ++ rtw_dbg_mode_hdl(padapter, poidparam->subcode, poidparam->data, poidparam->len); ++ ++#endif ++ ++ if (bset == 0x00) {//query info ++ if (copy_to_user(p->pointer, pparmbuf, len)) ++ ret = -EFAULT; ++ } ++ ++ if (status) { ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++_rtw_mp_ioctl_hdl_exit: ++ ++ if (pparmbuf) ++ rtw_mfree(pparmbuf, len); ++ ++ //mutex_unlock(&ioctl_mutex); ++ ++ return ret; ++} ++ ++static int rtw_get_ap_info(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int bssid_match, ret = 0; ++ u32 cnt=0, wpa_ielen; ++ _irqL irqL; ++ _list *plist, *phead; ++ unsigned char *pbuf; ++ u8 bssid[ETH_ALEN]; ++ char data[32]; ++ struct wlan_network *pnetwork = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct iw_point *pdata = &wrqu->data; ++ ++ DBG_871X("+rtw_get_aplist_info\n"); ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ while((check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))) == _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > 100) ++ break; ++ } ++ ++ ++ //pdata->length = 0;//? ++ pdata->flags = 0; ++ if(pdata->length>=32) ++ { ++ if(copy_from_user(data, pdata->pointer, 32)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //if(hwaddr_aton_i(pdata->pointer, bssid)) ++ if(hwaddr_aton_i(data, bssid)) ++ { ++ DBG_871X("Invalid BSSID '%s'.\n", (u8*)data); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return -EINVAL; ++ } ++ ++ ++ if(_rtw_memcmp(bssid, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)//BSSID match, then check if supporting wpa/wpa2 ++ { ++ DBG_871X("BSSID:" MAC_FMT "\n", MAC_ARG(bssid)); ++ ++ pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); ++ if(pbuf && (wpa_ielen>0)) ++ { ++ pdata->flags = 1; ++ break; ++ } ++ ++ pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); ++ if(pbuf && (wpa_ielen>0)) ++ { ++ pdata->flags = 2; ++ break; ++ } ++ ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if(pdata->length>=34) ++ { ++ if(copy_to_user((u8*)pdata->pointer+32, (u8*)&pdata->flags, 1)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_set_pid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ int *pdata = (int *)wrqu; ++ int selector; ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ selector = *pdata; ++ if(selector < 3 && selector >=0) { ++ padapter->pid[selector] = *(pdata+1); ++ #ifdef CONFIG_GLOBAL_UI_PID ++ ui_pid[selector] = *(pdata+1); ++ #endif ++ DBG_871X("%s set pid[%d]=%d\n", __FUNCTION__, selector ,padapter->pid[selector]); ++ } ++ else ++ DBG_871X("%s selector %d error\n", __FUNCTION__, selector); ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_wps_start(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ u32 u32wps_start = 0; ++ unsigned int uintRet = 0; ++ ++ uintRet = copy_from_user( ( void* ) &u32wps_start, pdata->pointer, 4 ); ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ if ( u32wps_start == 0 ) ++ { ++ u32wps_start = *extra; ++ } ++ ++ DBG_871X( "[%s] wps_start = %d\n", __FUNCTION__, u32wps_start ); ++ ++ if ( u32wps_start == 1 ) // WPS Start ++ { ++ rtw_led_control(padapter, LED_CTL_START_WPS); ++ } ++ else if ( u32wps_start == 2 ) // WPS Stop because of wps success ++ { ++ rtw_led_control(padapter, LED_CTL_STOP_WPS); ++ } ++ else if ( u32wps_start == 3 ) // WPS Stop because of wps fail ++ { ++ rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL); ++ } ++ ++#ifdef CONFIG_INTEL_WIDI ++ process_intel_widi_wps_status(padapter, u32wps_start); ++#endif //CONFIG_INTEL_WIDI ++ ++exit: ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_P2P ++static int rtw_wext_p2p_enable(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ enum P2P_ROLE init_role = P2P_ROLE_DISABLE; ++ ++ if(*extra == '0' ) ++ init_role = P2P_ROLE_DISABLE; ++ else if(*extra == '1') ++ init_role = P2P_ROLE_DEVICE; ++ else if(*extra == '2') ++ init_role = P2P_ROLE_CLIENT; ++ else if(*extra == '3') ++ init_role = P2P_ROLE_GO; ++ ++ if(_FAIL == rtw_p2p_enable(padapter, init_role)) ++ { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ //set channel/bandwidth ++ if(init_role != P2P_ROLE_DISABLE) ++ { ++ u8 channel, ch_offset; ++ u16 bwmode; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) ++ { ++ // Stay at the listen state and wait for discovery. ++ channel = pwdinfo->listen_channel; ++ pwdinfo->operating_channel = pwdinfo->listen_channel; ++ ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ bwmode = HT_CHANNEL_WIDTH_20; ++ } ++#ifdef CONFIG_CONCURRENT_MODE ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ //struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ _set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_interval ); ++ if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) ++ { ++ pwdinfo->operating_channel = pbuddy_mlmeext->cur_channel; ++ // How about the ch_offset and bwmode ?? ++ } ++ else ++ { ++ pwdinfo->operating_channel = pwdinfo->listen_channel; ++ } ++ ++ channel = pbuddy_mlmeext->cur_channel; ++ ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ bwmode = pbuddy_mlmeext->cur_bwmode; ++ } ++#endif ++ else ++ { ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ ++ channel = pwdinfo->operating_channel; ++ ch_offset = pmlmeext->cur_ch_offset; ++ bwmode = pmlmeext->cur_bwmode; ++ } ++ ++ set_channel_bwmode(padapter, channel, ch_offset, bwmode); ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_go_nego_ssid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ DBG_871X( "[%s] ssid = %s, len = %d\n", __FUNCTION__, extra, (u32)strlen( extra ) ); ++ _rtw_memcpy( pwdinfo->nego_ssid, extra, strlen( extra ) ); ++ pwdinfo->nego_ssidlen = strlen( extra ); ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_set_intent(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 intent = pwdinfo->intent; ++ ++ extra[ wrqu->data.length ] = 0x00; ++ ++ intent = rtw_atoi( extra ); ++ ++ if ( intent <= 15 ) ++ { ++ pwdinfo->intent= intent; ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_871X( "[%s] intent = %d\n", __FUNCTION__, intent); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_listen_ch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 listen_ch = pwdinfo->listen_channel; // Listen channel number ++ ++ extra[ wrqu->data.length ] = 0x00; ++ listen_ch = rtw_atoi( extra ); ++ ++ if ( ( listen_ch == 1 ) || ( listen_ch == 6 ) || ( listen_ch == 11 ) ) ++ { ++ pwdinfo->listen_channel = listen_ch; ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_871X( "[%s] listen_ch = %d\n", __FUNCTION__, pwdinfo->listen_channel ); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_op_ch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++// Commented by Albert 20110524 ++// This function is used to set the operating channel if the driver will become the group owner ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 op_ch = pwdinfo->operating_channel; // Operating channel number ++ ++ extra[ wrqu->data.length ] = 0x00; ++ ++ op_ch = ( u8 ) rtw_atoi( extra ); ++ if ( op_ch > 0 ) ++ { ++ pwdinfo->operating_channel = op_ch; ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_871X( "[%s] op_ch = %d\n", __FUNCTION__, pwdinfo->operating_channel ); ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_profilefound(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ // Comment by Albert 2010/10/13 ++ // Input data format: ++ // Ex: 0 ++ // Ex: 1XX:XX:XX:XX:XX:XXYYSSID ++ // 0 => Reflush the profile record list. ++ // 1 => Add the profile list ++ // XX:XX:XX:XX:XX:XX => peer's MAC Address ( ex: 00:E0:4C:00:00:01 ) ++ // YY => SSID Length ++ // SSID => SSID for persistence group ++ ++ DBG_871X( "[%s] In value = %s, len = %d \n", __FUNCTION__, extra, wrqu->data.length -1); ++ ++ ++ // The upper application should pass the SSID to driver by using this rtw_p2p_profilefound function. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ if ( extra[ 0 ] == '0' ) ++ { ++ // Remove all the profile information of wifidirect_info structure. ++ _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); ++ pwdinfo->profileindex = 0; ++ } ++ else ++ { ++ if ( pwdinfo->profileindex >= P2P_MAX_PERSISTENT_GROUP_NUM ) ++ { ++ ret = -1; ++ } ++ else ++ { ++ int jj, kk; ++ ++ // Add this profile information into pwdinfo->profileinfo ++ // Ex: 1XX:XX:XX:XX:XX:XXYYSSID ++ for( jj = 0, kk = 1; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ pwdinfo->profileinfo[ pwdinfo->profileindex ].peermac[ jj ] = key_2char2num(extra[ kk ], extra[ kk+ 1 ]); ++ } ++ ++ //pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen = ( extra[18] - '0' ) * 10 + ( extra[ 19 ] - '0' ); ++ //_rtw_memcpy( pwdinfo->profileinfo[ pwdinfo->profileindex ].ssid, &extra[ 20 ], pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen ); ++ pwdinfo->profileindex++; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_setDN(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); ++ _rtw_memcpy( pwdinfo->device_name, extra, wrqu->data.length - 1 ); ++ pwdinfo->device_name_len = wrqu->data.length - 1; ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_status(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ if ( padapter->bShowGetP2PState ) ++ { ++ DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ } ++ ++ // Commented by Albert 2010/10/12 ++ // Because of the output size limitation, I had removed the "Role" information. ++ // About the "Role" information, we will use the new private IOCTL to get the "Role" information. ++ sprintf( extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo) ); ++ wrqu->data.length = strlen( extra ); ++ ++ return ret; ++ ++} ++ ++// Commented by Albert 20110520 ++// This function will return the config method description ++// This config method description will show us which config method the remote P2P device is intented to use ++// by sending the provisioning discovery request frame. ++ ++static int rtw_p2p_get_req_cm(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_role(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ ++ sprintf( extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo) ); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_peer_ifaddr(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ ++ sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_peer_devaddr(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); ++ sprintf( extra, "\n%.2X%.2X%.2X%.2X%.2X%.2X", ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_peer_devaddr_by_invitation(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ DBG_871X( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_device_addr[ 0 ], pwdinfo->p2p_peer_device_addr[ 1 ], ++ pwdinfo->p2p_peer_device_addr[ 2 ], pwdinfo->p2p_peer_device_addr[ 3 ], ++ pwdinfo->p2p_peer_device_addr[ 4 ], pwdinfo->p2p_peer_device_addr[ 5 ]); ++ sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", ++ pwdinfo->p2p_peer_device_addr[ 0 ], pwdinfo->p2p_peer_device_addr[ 1 ], ++ pwdinfo->p2p_peer_device_addr[ 2 ], pwdinfo->p2p_peer_device_addr[ 3 ], ++ pwdinfo->p2p_peer_device_addr[ 4 ], pwdinfo->p2p_peer_device_addr[ 5 ]); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_groupid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X %s", ++ pwdinfo->groupid_info.go_device_addr[ 0 ], pwdinfo->groupid_info.go_device_addr[ 1 ], ++ pwdinfo->groupid_info.go_device_addr[ 2 ], pwdinfo->groupid_info.go_device_addr[ 3 ], ++ pwdinfo->groupid_info.go_device_addr[ 4 ], pwdinfo->groupid_info.go_device_addr[ 5 ], ++ pwdinfo->groupid_info.ssid); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_op_ch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X( "[%s] Op_ch = %02x\n", __FUNCTION__, pwdinfo->operating_channel); ++ ++ sprintf( extra, "\n\nOp_ch=%.2d\n", pwdinfo->operating_channel ); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++inline static void macstr2num(u8 *dst, u8 *src) ++{ ++ int jj, kk; ++ for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3) ++ { ++ dst[jj] = key_2char2num(src[kk], src[kk + 1]); ++ } ++} ++ ++static int rtw_p2p_get_wps_configmethod(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra, char *subcmd) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 peerMAC[ETH_ALEN] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list * plist,*phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u16 attr_content = 0; ++ uint attr_contentlen = 0; ++ u8 attr_content_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; ++ ++ // Commented by Albert 20110727 ++ // The input data is the MAC address which the application wants to know its WPS config method. ++ // After knowing its WPS config method, the application can decide the config method for provisioning discovery. ++ // Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05 ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); ++ ++ macstr2num(peerMAC, subcmd); ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) ++ { ++ u8 *wpsie; ++ uint wpsie_len = 0; ++ ++ // The mac address is matched. ++ ++ if ((wpsie = rtw_get_wps_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &wpsie_len))) ++ { ++ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, (u8 *)&attr_content, &attr_contentlen); ++ if (attr_contentlen) ++ { ++ attr_content = be16_to_cpu(attr_content); ++ sprintf(attr_content_str, "\n\nM=%.4d", attr_content); ++ blnMatch = 1; ++ } ++ } ++ ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if (!blnMatch) ++ { ++ sprintf(attr_content_str, "\n\nM=0000"); ++ } ++ ++ wrqu->data.length = strlen(attr_content_str); ++ _rtw_memcpy(extra, attr_content_str, wrqu->data.length); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_WFD ++static int rtw_p2p_get_peer_wfd_port(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ DBG_871X( "[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ ++ sprintf( extra, "\n\nPort=%d\n", pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ DBG_871X( "[%s] remote port = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_rtsp_ctrlport ); ++ ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_peer_wfd_preferred_connection(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n\nwfd_pc=%d\n", pwdinfo->wfd_info->wfd_pc ); ++ DBG_871X( "[%s] wfd_pc = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_pc ); ++ ++ wrqu->data.length = strlen( extra ); ++ pwdinfo->wfd_info->wfd_pc = _FALSE; // Reset the WFD preferred connection to P2P ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_peer_wfd_session_available(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n\nwfd_sa=%d\n", pwdinfo->wfd_info->peer_session_avail ); ++ DBG_871X( "[%s] wfd_sa = %d\n", __FUNCTION__, pwdinfo->wfd_info->peer_session_avail ); ++ ++ wrqu->data.length = strlen( extra ); ++ pwdinfo->wfd_info->peer_session_avail = _TRUE; // Reset the WFD session available ++ return ret; ++ ++} ++ ++#endif // CONFIG_WFD ++ ++static int rtw_p2p_get_go_device_address(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra, char *subcmd) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 peerMAC[ETH_ALEN] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ u8 attr_content[100] = { 0x00 }; ++ u8 go_devadd_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; ++ ++ // Commented by Albert 20121209 ++ // The input data is the GO's interface address which the application wants to know its device address. ++ // Format: iwpriv wlanx p2p_get2 go_devadd=00:E0:4C:00:00:05 ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); ++ ++ macstr2num(peerMAC, subcmd); ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) ++ { ++ // Commented by Albert 2011/05/18 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if ((p2pie = rtw_get_p2p_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen))) ++ { ++ while (p2pie) ++ { ++ // The P2P Device ID attribute is included in the Beacon frame. ++ // The P2P Device Info attribute is included in the probe response frame. ++ ++ _rtw_memset(attr_content, 0x00, 100); ++ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen)) ++ { ++ // Handle the P2P Device ID attribute of Beacon first ++ blnMatch = 1; ++ break; ++ ++ } else if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen)) ++ { ++ // Handle the P2P Device Info attribute of probe response ++ blnMatch = 1; ++ break; ++ } ++ ++ //Get the next P2P IE ++ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); ++ } ++ } ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if (!blnMatch) ++ { ++ sprintf(go_devadd_str, "\n\ndev_add=NULL"); ++ } else ++ { ++ sprintf(go_devadd_str, "\n\ndev_add=%.2X:%.2X:%.2X:%.2X:%.2X:%.2X", ++ attr_content[0], attr_content[1], attr_content[2], attr_content[3], attr_content[4], attr_content[5]); ++ } ++ ++ wrqu->data.length = strlen(go_devadd_str); ++ _rtw_memcpy(extra, go_devadd_str, wrqu->data.length); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_device_type(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra, char *subcmd) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 peerMAC[ETH_ALEN] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u8 dev_type[8] = { 0x00 }; ++ uint dev_type_len = 0; ++ u8 dev_type_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; // +9 is for the str "dev_type=", we have to clear it at wrqu->data.pointer ++ ++ // Commented by Albert 20121209 ++ // The input data is the MAC address which the application wants to know its device type. ++ // Such user interface could know the device type. ++ // Format: iwpriv wlanx p2p_get2 dev_type=00:E0:4C:00:00:05 ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); ++ ++ macstr2num(peerMAC, subcmd); ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) ++ { ++ u8 *wpsie; ++ uint wpsie_len = 0; ++ ++ // The mac address is matched. ++ ++ if ((wpsie = rtw_get_wps_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &wpsie_len))) ++ { ++ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_PRIMARY_DEV_TYPE, dev_type, &dev_type_len); ++ if (dev_type_len) ++ { ++ u16 type = 0; ++ ++ _rtw_memcpy(&type, dev_type, 2); ++ type = be16_to_cpu(type); ++ sprintf(dev_type_str, "\n\nN=%.2d", type); ++ blnMatch = 1; ++ } ++ } ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if (!blnMatch) ++ { ++ sprintf(dev_type_str, "\n\nN=00"); ++ } ++ ++ wrqu->data.length = strlen(dev_type_str); ++ _rtw_memcpy(extra, dev_type_str, wrqu->data.length); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_device_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra, char *subcmd) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 peerMAC[ETH_ALEN] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u8 dev_name[WPS_MAX_DEVICE_NAME_LEN] = { 0x00 }; ++ uint dev_len = 0; ++ u8 dev_name_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; ++ ++ // Commented by Albert 20121225 ++ // The input data is the MAC address which the application wants to know its device name. ++ // Such user interface could show peer device's device name instead of ssid. ++ // Format: iwpriv wlanx p2p_get2 devN=00:E0:4C:00:00:05 ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); ++ ++ macstr2num(peerMAC, subcmd); ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) ++ { ++ u8 *wpsie; ++ uint wpsie_len = 0; ++ ++ // The mac address is matched. ++ ++ if ((wpsie = rtw_get_wps_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &wpsie_len))) ++ { ++ rtw_get_wps_attr_content(wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len); ++ if (dev_len) ++ { ++ sprintf(dev_name_str, "\n\nN=%s", dev_name); ++ blnMatch = 1; ++ } ++ } ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if (!blnMatch) ++ { ++ sprintf(dev_name_str, "\n\nN=0000"); ++ } ++ ++ wrqu->data.length = strlen(dev_name_str); ++ _rtw_memcpy(extra, dev_name_str, wrqu->data.length); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_invitation_procedure(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra, char *subcmd) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 peerMAC[ETH_ALEN] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ u8 attr_content[2] = { 0x00 }; ++ u8 inv_proc_str[P2P_PRIVATE_IOCTL_SET_LEN] = { 0x00 }; ++ ++ // Commented by Ouden 20121226 ++ // The application wants to know P2P initation procedure is support or not. ++ // Format: iwpriv wlanx p2p_get2 InvProc=00:E0:4C:00:00:05 ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, subcmd); ++ ++ macstr2num(peerMAC, subcmd); ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, plist) == _TRUE) break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if (_rtw_memcmp(pnetwork->network.MacAddress, peerMAC, ETH_ALEN)) ++ { ++ // Commented by Albert 20121226 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if ((p2pie = rtw_get_p2p_ie(&pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen))) ++ { ++ while (p2pie) ++ { ++ //_rtw_memset( attr_content, 0x00, 2); ++ if (rtw_get_p2p_attr_content(p2pie, p2pielen, P2P_ATTR_CAPABILITY, attr_content, &attr_contentlen)) ++ { ++ // Handle the P2P capability attribute ++ blnMatch = 1; ++ break; ++ ++ } ++ ++ //Get the next P2P IE ++ p2pie = rtw_get_p2p_ie(p2pie + p2pielen, pnetwork->network.IELength - 12 - (p2pie - &pnetwork->network.IEs[12] + p2pielen), NULL, &p2pielen); ++ } ++ } ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if (!blnMatch) ++ { ++ sprintf(inv_proc_str, "\nIP=-1"); ++ } else ++ { ++ if (attr_content[0] && 0x20) ++ { ++ sprintf(inv_proc_str, "\nIP=1"); ++ } else ++ { ++ sprintf(inv_proc_str, "\nIP=0"); ++ } ++ } ++ ++ wrqu->data.length = strlen(inv_proc_str); ++ _rtw_memcpy(extra, inv_proc_str, wrqu->data.length); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_connect(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif // CONFIG_CONCURRENT_MODE ++ ++ ++ // Commented by Albert 20110304 ++ // The input data contains two informations. ++ // 1. First information is the MAC address which wants to formate with ++ // 2. Second information is the WPS PINCode or "pbc" string for push button method ++ // Format: 00:E0:4C:00:00:05 ++ // Format: 00:E0:4C:00:00:05 ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) ++ { ++ return -1; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( uintPeerChannel ) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++ ++ pwdinfo->nego_req_info.peer_channel_num[ 0 ] = uintPeerChannel; ++ _rtw_memcpy( pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN ); ++ pwdinfo->nego_req_info.benable = _TRUE; ++ ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ if ( rtw_p2p_state(pwdinfo) != P2P_STATE_GONEGO_OK ) ++ { ++ // Restore to the listen state if the current p2p state is not nego OK ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN ); ++ } ++ ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ // Have to enter the power saving with the AP ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ DBG_871X( "[%s] Start PreTx Procedure!\n", __FUNCTION__ ); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_GO_NEGO_TIMEOUT ); ++ } ++ else ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT ); ++ } ++#else ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT ); ++#endif // CONFIG_CONCURRENT_MODE ++ ++ } ++ else ++ { ++ DBG_871X( "[%s] Not Found in Scanning Queue~\n", __FUNCTION__ ); ++ ret = -1; ++ } ++exit: ++ return ret; ++} ++ ++static int rtw_p2p_invite_req(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++ u8 attr_content[50] = { 0x00 }, _status = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ _irqL irqL; ++ struct tx_invite_req_info* pinvite_req_info = &pwdinfo->invitereq_info; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif // CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_WFD ++ struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; ++#endif // CONFIG_WFD ++ ++ // Commented by Albert 20120321 ++ // The input data contains two informations. ++ // 1. First information is the P2P device address which you want to send to. ++ // 2. Second information is the group id which combines with GO's mac address, space and GO's ssid. ++ // Command line sample: iwpriv wlan0 p2p_set invite="00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy" ++ // Format: 00:11:22:33:44:55 00:E0:4C:00:00:05 DIRECT-xy ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if ( wrqu->data.length <= 37 ) ++ { ++ DBG_871X( "[%s] Wrong format!\n", __FUNCTION__ ); ++ return ret; ++ } ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ else ++ { ++ // Reset the content of struct tx_invite_req_info ++ pinvite_req_info->benable = _FALSE; ++ _rtw_memset( pinvite_req_info->go_bssid, 0x00, ETH_ALEN ); ++ _rtw_memset( pinvite_req_info->go_ssid, 0x00, WLAN_SSID_MAXLEN ); ++ pinvite_req_info->ssidlen = 0x00; ++ pinvite_req_info->operating_ch = pwdinfo->operating_channel; ++ _rtw_memset( pinvite_req_info->peer_macaddr, 0x00, ETH_ALEN ); ++ pinvite_req_info->token = 3; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ pinvite_req_info->peer_macaddr[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ // Commented by Albert 2011/05/18 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if ( (p2pie=rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen)) ) ++ { ++ // The P2P Device ID attribute is included in the Beacon frame. ++ // The P2P Device Info attribute is included in the probe response frame. ++ ++ if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device ID attribute of Beacon first ++ if ( _rtw_memcmp( attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device Info attribute of probe response ++ if ( _rtw_memcmp( attr_content, pinvite_req_info->peer_macaddr, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++#ifdef CONFIG_WFD ++ if ( uintPeerChannel ) ++ { ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ uint wfd_ielen = 0; ++ ++ if ( rtw_get_wfd_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 wfd_devinfo[ 6 ] = { 0x00 }; ++ uint wfd_devlen = 6; ++ ++ DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); ++ if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) ++ { ++ u16 wfd_devinfo_field = 0; ++ ++ // Commented by Albert 20120319 ++ // The first two bytes are the WFD device information field of WFD device information subelement. ++ // In big endian format. ++ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); ++ if ( wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL ) ++ { ++ pwfd_info->peer_session_avail = _TRUE; ++ } ++ else ++ { ++ pwfd_info->peer_session_avail = _FALSE; ++ } ++ } ++ } ++ ++ if ( _FALSE == pwfd_info->peer_session_avail ) ++ { ++ DBG_871X( "[%s] WFD Session not avaiable!\n", __FUNCTION__ ); ++ goto exit; ++ } ++ } ++#endif // CONFIG_WFD ++ ++ if ( uintPeerChannel ) ++ { ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) ++ { ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ ++ // Store the GO's bssid ++ for( jj = 0, kk = 18; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ pinvite_req_info->go_bssid[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ // Store the GO's ssid ++ pinvite_req_info->ssidlen = wrqu->data.length - 36; ++ _rtw_memcpy( pinvite_req_info->go_ssid, &extra[ 36 ], (u32) pinvite_req_info->ssidlen ); ++ pinvite_req_info->benable = _TRUE; ++ pinvite_req_info->peer_ch = uintPeerChannel; ++ ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_INVITE_REQ); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) ++ { ++ // Have to enter the power saving with the AP ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ else ++ { ++ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++#else ++ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++#endif ++ ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_fwstate( pbuddy_mlmepriv, _FW_LINKED ) ) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_INVITE_TIMEOUT ); ++ } ++ else ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT ); ++ } ++#else ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_INVITE_TIMEOUT ); ++#endif // CONFIG_CONCURRENT_MODE ++ ++ ++ } ++ else ++ { ++ DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); ++ } ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_persistent(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++ u8 attr_content[50] = { 0x00 }, _status = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ _irqL irqL; ++ struct tx_invite_req_info* pinvite_req_info = &pwdinfo->invitereq_info; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif // CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_WFD ++ struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; ++#endif // CONFIG_WFD ++ ++ // Commented by Albert 20120328 ++ // The input data is 0 or 1 ++ // 0: disable persistent group functionality ++ // 1: enable persistent group founctionality ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ else ++ { ++ if ( extra[ 0 ] == '0' ) // Disable the persistent group function. ++ { ++ pwdinfo->persistent_supported = _FALSE; ++ } ++ else if ( extra[ 0 ] == '1' ) // Enable the persistent group function. ++ { ++ pwdinfo->persistent_supported = _TRUE; ++ } ++ else ++ { ++ pwdinfo->persistent_supported = _FALSE; ++ } ++ } ++ printk( "[%s] persistent_supported = %d\n", __FUNCTION__, pwdinfo->persistent_supported ); ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int hexstr2bin(const char *hex, u8 *buf, size_t len) ++{ ++ size_t i; ++ int a; ++ const char *ipos = hex; ++ u8 *opos = buf; ++ ++ for (i = 0; i < len; i++) { ++ a = hex2byte_i(ipos); ++ if (a < 0) ++ return -1; ++ *opos++ = a; ++ ipos += 2; ++ } ++ return 0; ++} ++ ++static int uuid_str2bin(const char *str, u8 *bin) ++{ ++ const char *pos; ++ u8 *opos; ++ ++ pos = str; ++ opos = bin; ++ ++ if (hexstr2bin(pos, opos, 4)) ++ return -1; ++ pos += 8; ++ opos += 4; ++ ++ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) ++ return -1; ++ pos += 4; ++ opos += 2; ++ ++ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) ++ return -1; ++ pos += 4; ++ opos += 2; ++ ++ if (*pos++ != '-' || hexstr2bin(pos, opos, 2)) ++ return -1; ++ pos += 4; ++ opos += 2; ++ ++ if (*pos++ != '-' || hexstr2bin(pos, opos, 6)) ++ return -1; ++ ++ return 0; ++} ++ ++static int rtw_p2p_set_wps_uuid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ ++ DBG_871X("[%s] data = %s\n", __FUNCTION__, extra); ++ ++ if ((36 == strlen(extra)) && (uuid_str2bin(extra, pwdinfo->uuid) == 0)) ++ { ++ pwdinfo->external_uuid = 1; ++ } else { ++ pwdinfo->external_uuid = 0; ++ ret = -EINVAL; ++ } ++ ++ return ret; ++ ++} ++#ifdef CONFIG_WFD ++static int rtw_p2p_set_pc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 attr_content[50] = { 0x00 }, _status = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ _irqL irqL; ++ uint uintPeerChannel = 0; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif // CONFIG_CONCURRENT_MODE ++ struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; ++ ++ // Commented by Albert 20120512 ++ // 1. Input information is the MAC address which wants to know the Preferred Connection bit (PC bit) ++ // Format: 00:E0:4C:00:00:05 ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ // Commented by Albert 2011/05/18 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if ( (p2pie=rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen)) ) ++ { ++ // The P2P Device ID attribute is included in the Beacon frame. ++ // The P2P Device Info attribute is included in the probe response frame. ++ printk( "[%s] Got P2P IE\n", __FUNCTION__ ); ++ if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device ID attribute of Beacon first ++ printk( "[%s] P2P_ATTR_DEVICE_ID \n", __FUNCTION__ ); ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device Info attribute of probe response ++ printk( "[%s] P2P_ATTR_DEVICE_INFO \n", __FUNCTION__ ); ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ printk( "[%s] channel = %d\n", __FUNCTION__, uintPeerChannel ); ++ ++ if ( uintPeerChannel ) ++ { ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ uint wfd_ielen = 0; ++ ++ if ( rtw_get_wfd_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 wfd_devinfo[ 6 ] = { 0x00 }; ++ uint wfd_devlen = 6; ++ ++ DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); ++ if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) ++ { ++ u16 wfd_devinfo_field = 0; ++ ++ // Commented by Albert 20120319 ++ // The first two bytes are the WFD device information field of WFD device information subelement. ++ // In big endian format. ++ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); ++ if ( wfd_devinfo_field & WFD_DEVINFO_PC_TDLS ) ++ { ++ pwfd_info->wfd_pc = _TRUE; ++ } ++ else ++ { ++ pwfd_info->wfd_pc = _FALSE; ++ } ++ } ++ } ++ } ++ else ++ { ++ DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_wfd_device_type(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; ++ ++ // Commented by Albert 20120328 ++ // The input data is 0 or 1 ++ // 0: specify to Miracast source device ++ // 1 or others: specify to Miracast sink device (display device) ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if ( extra[ 0 ] == '0' ) // Set to Miracast source device. ++ { ++ pwfd_info->wfd_device_type = WFD_DEVINFO_SOURCE; ++ } ++ else // Set to Miracast sink device. ++ { ++ pwfd_info->wfd_device_type = WFD_DEVINFO_PSINK; ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_scan_result_type(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; ++ ++ // Commented by Albert 20120328 ++ // The input data is 0 , 1 , 2 ++ // 0: when the P2P is enabled, the scan result will return all the found P2P device. ++ // 1: when the P2P is enabled, the scan result will return all the found P2P device and AP. ++ // 2: when the P2P is enabled, the scan result will show up the found Miracast devices base on... ++ // It will show up all the Miracast source device if this device is sink. ++ // It will show up all the Miracast sink device if this device is source. ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if ( extra[ 0 ] == '0' ) ++ { ++ pwfd_info->scan_result_type = SCAN_RESULT_P2P_ONLY; ++ } ++ else if ( extra[ 0 ] == '1' ) ++ { ++ pwfd_info->scan_result_type = SCAN_RESULT_ALL; ++ } ++ else if ( extra[ 0 ] == '2' ) ++ { ++ pwfd_info->scan_result_type = SCAN_RESULT_WFD_TYPE; ++ } ++ else ++ { ++ pwfd_info->scan_result_type = SCAN_RESULT_P2P_ONLY; ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_wfd_enable(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++// Commented by Kurt 20121206 ++// This function is used to set wfd enabled ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ if(*extra == '0' ) ++ pwdinfo->wfd_info->wfd_enable = _FALSE; ++ else if(*extra == '1') ++ pwdinfo->wfd_info->wfd_enable = _TRUE; ++ ++ DBG_871X( "[%s] wfd_enable = %d\n", __FUNCTION__, pwdinfo->wfd_info->wfd_enable ); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_driver_iface(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++// Commented by Kurt 20121206 ++// This function is used to set driver iface is WEXT or CFG80211 ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ if(*extra == '1' ) ++ { ++ pwdinfo->driver_interface = DRIVER_WEXT; ++ DBG_871X( "[%s] driver_interface = WEXT\n", __FUNCTION__); ++ } ++ else if(*extra == '2') ++ { ++ pwdinfo->driver_interface = DRIVER_CFG80211; ++ DBG_871X( "[%s] driver_interface = CFG80211\n", __FUNCTION__); ++ } ++ ++ return ret; ++ ++} ++ ++// To set the WFD session available to enable or disable ++static int rtw_p2p_set_sa(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct wifi_display_info *pwfd_info = pwdinfo->wfd_info; ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if( 0 ) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ else ++ { ++ if ( extra[ 0 ] == '0' ) // Disable the session available. ++ { ++ pwdinfo->session_available = _FALSE; ++ } ++ else if ( extra[ 0 ] == '1' ) // Enable the session available. ++ { ++ pwdinfo->session_available = _TRUE; ++ } ++ else ++ { ++ pwdinfo->session_available = _FALSE; ++ } ++ } ++ printk( "[%s] session available = %d\n", __FUNCTION__, pwdinfo->session_available ); ++ ++exit: ++ ++ return ret; ++ ++} ++#endif //CONFIG_WFD ++ ++static int rtw_p2p_prov_disc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++ u8 attr_content[100] = { 0x00 }, _status = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ _irqL irqL; ++ u8 ie_offset; ++#ifdef CONFIG_CONCURRENT_MODE ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++#endif // CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_WFD ++ struct wifi_display_info* pwfd_info = pwdinfo->wfd_info; ++#endif // CONFIG_WFD ++ ++ // Commented by Albert 20110301 ++ // The input data contains two informations. ++ // 1. First information is the MAC address which wants to issue the provisioning discovery request frame. ++ // 2. Second information is the WPS configuration method which wants to discovery ++ // Format: 00:E0:4C:00:00:05_display ++ // Format: 00:E0:4C:00:00:05_keypad ++ // Format: 00:E0:4C:00:00:05_pbc ++ // Format: 00:E0:4C:00:00:05_label ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ else ++ { ++#ifdef CONFIG_INTEL_WIDI ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE){ ++ DBG_871X( "[%s] WiFi is under survey!\n", __FUNCTION__ ); ++ return ret; ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++ // Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. ++ _rtw_memset( pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN ); ++ _rtw_memset( pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN ); ++ _rtw_memset( &pwdinfo->tx_prov_disc_info.ssid, 0x00, sizeof( NDIS_802_11_SSID ) ); ++ pwdinfo->tx_prov_disc_info.peer_channel_num[ 0 ] = 0; ++ pwdinfo->tx_prov_disc_info.peer_channel_num[ 1 ] = 0; ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ if ( _rtw_memcmp( &extra[ 18 ], "display", 7 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "keypad", 7 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "pbc", 3 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "label", 5 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ } ++ else ++ { ++ DBG_871X( "[%s] Unknown WPS config methodn", __FUNCTION__ ); ++ return( ret ); ++ } ++ ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ if( uintPeerChannel != 0 ) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ // Commented by Albert 2011/05/18 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if (pnetwork->network.Reserved[0] == 2) { // Probe Request ++ ie_offset = 0; ++ } else { // Beacon or Probe Respones ++ ie_offset = 12; ++ } ++ if ( (p2pie=rtw_get_p2p_ie( &pnetwork->network.IEs[ie_offset], pnetwork->network.IELength - ie_offset, NULL, &p2pielen)) ) ++ { ++ while ( p2pie ) ++ { ++ // The P2P Device ID attribute is included in the Beacon frame. ++ // The P2P Device Info attribute is included in the probe response frame. ++ ++ if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device ID attribute of Beacon first ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device Info attribute of probe response ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ ++ //Get the next P2P IE ++ p2pie = rtw_get_p2p_ie(p2pie+p2pielen, pnetwork->network.IELength - ie_offset -(p2pie -&pnetwork->network.IEs[ie_offset] + p2pielen), NULL, &p2pielen); ++ } ++ } ++ ++#ifdef CONFIG_INTEL_WIDI ++ // Some Intel WiDi source may not provide P2P IE, ++ // so we could only compare mac addr by 802.11 Source Address ++ if( pmlmepriv->widi_state == INTEL_WIDI_STATE_WFD_CONNECTION ++ && uintPeerChannel == 0 ) ++ { ++ if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( uintPeerChannel ) ++ { ++#ifdef CONFIG_WFD ++ { ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ uint wfd_ielen = 0; ++ ++ if ( rtw_get_wfd_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 wfd_devinfo[ 6 ] = { 0x00 }; ++ uint wfd_devlen = 6; ++ ++ DBG_871X( "[%s] Found WFD IE!\n", __FUNCTION__ ); ++ if ( rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, wfd_devinfo, &wfd_devlen ) ) ++ { ++ u16 wfd_devinfo_field = 0; ++ ++ // Commented by Albert 20120319 ++ // The first two bytes are the WFD device information field of WFD device information subelement. ++ // In big endian format. ++ wfd_devinfo_field = RTW_GET_BE16(wfd_devinfo); ++ if ( wfd_devinfo_field & WFD_DEVINFO_SESSION_AVAIL ) ++ { ++ pwfd_info->peer_session_avail = _TRUE; ++ } ++ else ++ { ++ pwfd_info->peer_session_avail = _FALSE; ++ } ++ } ++ } ++ ++ if ( _FALSE == pwfd_info->peer_session_avail ) ++ { ++ DBG_871X( "[%s] WFD Session not avaiable!\n", __FUNCTION__ ); ++ goto exit; ++ } ++ } ++#endif // CONFIG_WFD ++ ++ DBG_871X( "[%s] peer channel: %d!\n", __FUNCTION__, uintPeerChannel ); ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); ++ } ++#endif // CONFIG_CONCURRENT_MODE ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN ); ++ pwdinfo->tx_prov_disc_info.peer_channel_num[0] = ( u16 ) uintPeerChannel; ++ pwdinfo->tx_prov_disc_info.benable = _TRUE; ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) ++ { ++ _rtw_memcpy( &pwdinfo->tx_prov_disc_info.ssid, &pnetwork->network.Ssid, sizeof( NDIS_802_11_SSID ) ); ++ } ++ else if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); ++ pwdinfo->tx_prov_disc_info.ssid.SsidLength= P2P_WILDCARD_SSID_LEN; ++ } ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ // Have to enter the power saving with the AP ++ set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode); ++ ++ issue_nulldata(pbuddy_adapter, NULL, 1, 3, 500); ++ } ++ else ++ { ++ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++#else ++ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++#endif ++ ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if ( check_buddy_fwstate(padapter, _FW_LINKED ) ) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_CONCURRENT_PROVISION_TIMEOUT ); ++ } ++ else ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++ } ++#else ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++#endif // CONFIG_CONCURRENT_MODE ++ ++ ++ } ++ else ++ { ++ DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); ++#ifdef CONFIG_INTEL_WIDI ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ rtw_free_network_queue(padapter, _TRUE); ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ rtw_sitesurvey_cmd(padapter, NULL, 0, NULL, 0); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++#endif //CONFIG_INTEL_WIDI ++ } ++exit: ++ ++ return ret; ++ ++} ++ ++// Added by Albert 20110328 ++// This function is used to inform the driver the user had specified the pin code value or pbc ++// to application. ++ ++static int rtw_p2p_got_wpsinfo(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X( "[%s] data = %s\n", __FUNCTION__, extra ); ++ // Added by Albert 20110328 ++ // if the input data is P2P_NO_WPSINFO -> reset the wpsinfo ++ // if the input data is P2P_GOT_WPSINFO_PEER_DISPLAY_PIN -> the utility just input the PIN code got from the peer P2P device. ++ // if the input data is P2P_GOT_WPSINFO_SELF_DISPLAY_PIN -> the utility just got the PIN code from itself. ++ // if the input data is P2P_GOT_WPSINFO_PBC -> the utility just determine to use the PBC ++ ++ if ( *extra == '0' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++ } ++ else if ( *extra == '1' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PEER_DISPLAY_PIN; ++ } ++ else if ( *extra == '2' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_SELF_DISPLAY_PIN; ++ } ++ else if ( *extra == '3' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PBC; ++ } ++ else ++ { ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++ } ++ ++ return ret; ++ ++} ++ ++#endif //CONFIG_P2P ++ ++static int rtw_p2p_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++#ifdef CONFIG_P2P ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ ++ if ( _rtw_memcmp( extra, "enable=", 7 ) ) ++ { ++ rtw_wext_p2p_enable( dev, info, wrqu, &extra[7] ); ++ } ++ else if ( _rtw_memcmp( extra, "setDN=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_p2p_setDN( dev, info, wrqu, &extra[6] ); ++ } ++ else if ( _rtw_memcmp( extra, "profilefound=", 13 ) ) ++ { ++ wrqu->data.length -= 13; ++ rtw_p2p_profilefound( dev, info, wrqu, &extra[13] ); ++ } ++ else if ( _rtw_memcmp( extra, "prov_disc=", 10 ) ) ++ { ++ wrqu->data.length -= 10; ++ rtw_p2p_prov_disc( dev, info, wrqu, &extra[10] ); ++ } ++ else if ( _rtw_memcmp( extra, "nego=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_p2p_connect( dev, info, wrqu, &extra[5] ); ++ } ++ else if ( _rtw_memcmp( extra, "intent=", 7 ) ) ++ { ++ // Commented by Albert 2011/03/23 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease 7 + 1 ++ wrqu->data.length -= 8; ++ rtw_p2p_set_intent( dev, info, wrqu, &extra[7] ); ++ } ++ else if ( _rtw_memcmp( extra, "ssid=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_p2p_set_go_nego_ssid( dev, info, wrqu, &extra[5] ); ++ } ++ else if ( _rtw_memcmp( extra, "got_wpsinfo=", 12 ) ) ++ { ++ wrqu->data.length -= 12; ++ rtw_p2p_got_wpsinfo( dev, info, wrqu, &extra[12] ); ++ } ++ else if ( _rtw_memcmp( extra, "listen_ch=", 10 ) ) ++ { ++ // Commented by Albert 2011/05/24 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease (10 + 1) ++ wrqu->data.length -= 11; ++ rtw_p2p_set_listen_ch( dev, info, wrqu, &extra[10] ); ++ } ++ else if ( _rtw_memcmp( extra, "op_ch=", 6 ) ) ++ { ++ // Commented by Albert 2011/05/24 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease (6 + 1) ++ wrqu->data.length -= 7; ++ rtw_p2p_set_op_ch( dev, info, wrqu, &extra[6] ); ++ } ++ else if ( _rtw_memcmp( extra, "invite=", 7 ) ) ++ { ++ wrqu->data.length -= 8; ++ rtw_p2p_invite_req( dev, info, wrqu, &extra[7] ); ++ } ++ else if ( _rtw_memcmp( extra, "persistent=", 11 ) ) ++ { ++ wrqu->data.length -= 11; ++ rtw_p2p_set_persistent( dev, info, wrqu, &extra[11] ); ++ } ++ else if ( _rtw_memcmp ( extra, "uuid=", 5) ) ++ { ++ wrqu->data.length -= 5; ++ ret = rtw_p2p_set_wps_uuid( dev, info, wrqu, &extra[5] ); ++ } ++#ifdef CONFIG_WFD ++ else if ( _rtw_memcmp( extra, "sa=", 3 ) ) ++ { ++ // sa: WFD Session Available information ++ wrqu->data.length -= 3; ++ rtw_p2p_set_sa( dev, info, wrqu, &extra[3] ); ++ } ++ else if ( _rtw_memcmp( extra, "pc=", 3 ) ) ++ { ++ // pc: WFD Preferred Connection ++ wrqu->data.length -= 3; ++ rtw_p2p_set_pc( dev, info, wrqu, &extra[3] ); ++ } ++ else if ( _rtw_memcmp( extra, "wfd_type=", 9 ) ) ++ { ++ // Specify this device is Mircast source or sink ++ wrqu->data.length -= 9; ++ rtw_p2p_set_wfd_device_type( dev, info, wrqu, &extra[9] ); ++ } ++ else if ( _rtw_memcmp( extra, "scan_type=", 10 ) ) ++ { ++ wrqu->data.length -= 10; ++ rtw_p2p_set_scan_result_type( dev, info, wrqu, &extra[10] ); ++ } ++ else if ( _rtw_memcmp( extra, "wfd_enable=", 11 ) ) ++ { ++ wrqu->data.length -= 11; ++ rtw_p2p_set_wfd_enable( dev, info, wrqu, &extra[11] ); ++ } ++ else if ( _rtw_memcmp( extra, "driver_iface=", 13 ) ) ++ { ++ wrqu->data.length -= 13; ++ rtw_p2p_set_driver_iface( dev, info, wrqu, &extra[13] ); ++ } ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_P2P ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if ( padapter->bShowGetP2PState ) ++ { ++ DBG_871X( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); ++ } ++ ++ if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) ++ { ++ rtw_p2p_get_status( dev, info, wrqu, extra ); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "role", 4 ) ) ++ { ++ rtw_p2p_get_role( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_ifa", 8 ) ) ++ { ++ rtw_p2p_get_peer_ifaddr( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "req_cm", 6 ) ) ++ { ++ rtw_p2p_get_req_cm( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_deva", 9 ) ) ++ { ++ // Get the P2P device address when receiving the provision discovery request frame. ++ rtw_p2p_get_peer_devaddr( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "group_id", 8 ) ) ++ { ++ rtw_p2p_get_groupid( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "inv_peer_deva", 13 ) ) ++ { ++ // Get the P2P device address when receiving the P2P Invitation request frame. ++ rtw_p2p_get_peer_devaddr_by_invitation( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "op_ch", 5 ) ) ++ { ++ rtw_p2p_get_op_ch( dev, info, wrqu, extra); ++ } ++#ifdef CONFIG_WFD ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_port", 9 ) ) ++ { ++ rtw_p2p_get_peer_wfd_port( dev, info, wrqu, extra ); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_sa", 6 ) ) ++ { ++ rtw_p2p_get_peer_wfd_session_available( dev, info, wrqu, extra ); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "wfd_pc", 6 ) ) ++ { ++ rtw_p2p_get_peer_wfd_preferred_connection( dev, info, wrqu, extra ); ++ } ++#endif // CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get2(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_P2P ++ ++ int length = wrqu->data.length; ++ char *buffer = (u8 *)rtw_malloc(length); ++ ++ if (buffer == NULL) ++ { ++ ret = -ENOMEM; ++ goto bad; ++ } ++ ++ if (copy_from_user(buffer, wrqu->data.pointer, wrqu->data.length)) ++ { ++ ret - EFAULT; ++ goto bad; ++ } ++ ++ DBG_871X("[%s] buffer = %s\n", __FUNCTION__, buffer); ++ ++ if (_rtw_memcmp(buffer, "wpsCM=", 6)) ++ { ++ ret = rtw_p2p_get_wps_configmethod(dev, info, wrqu, extra, &buffer[6]); ++ } else if (_rtw_memcmp(buffer, "devN=", 5)) ++ { ++ ret = rtw_p2p_get_device_name(dev, info, wrqu, extra, &buffer[5]); ++ } else if (_rtw_memcmp(buffer, "dev_type=", 9)) ++ { ++ ret = rtw_p2p_get_device_type(dev, info, wrqu, extra, &buffer[9]); ++ } else if (_rtw_memcmp(buffer, "go_devadd=", 10)) ++ { ++ ret = rtw_p2p_get_go_device_address(dev, info, wrqu, extra, &buffer[10]); ++ } else if (_rtw_memcmp(buffer, "InvProc=", 8)) ++ { ++ ret = rtw_p2p_get_invitation_procedure(dev, info, wrqu, extra, &buffer[8]); ++ } else ++ { ++ snprintf(extra, sizeof("Command not found."), "Command not found."); ++ wrqu->data.length = strlen(extra); ++ } ++ ++bad: ++ if (buffer) ++ { ++ rtw_mfree(buffer, length); ++ } ++ ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++extern int rtw_change_ifname(_adapter *padapter, const char *ifname); ++static int rtw_rereg_nd_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ struct rereg_nd_name_data *rereg_priv = &padapter->rereg_nd_name_priv; ++ char new_ifname[IFNAMSIZ]; ++ ++ if(rereg_priv->old_ifname[0] == 0) { ++ char *reg_ifname; ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->isprimary) ++ reg_ifname = padapter->registrypriv.ifname; ++ else ++#endif ++ reg_ifname = padapter->registrypriv.if2name; ++ ++ strncpy(rereg_priv->old_ifname, reg_ifname, IFNAMSIZ); ++ rereg_priv->old_ifname[IFNAMSIZ-1] = 0; ++ } ++ ++ //DBG_871X("%s wrqu->data.length:%d\n", __FUNCTION__, wrqu->data.length); ++ if(wrqu->data.length > IFNAMSIZ) ++ return -EFAULT; ++ ++ if ( copy_from_user(new_ifname, wrqu->data.pointer, IFNAMSIZ) ) { ++ return -EFAULT; ++ } ++ ++ if( 0 == strcmp(rereg_priv->old_ifname, new_ifname) ) { ++ return ret; ++ } ++ ++ DBG_871X("%s new_ifname:%s\n", __FUNCTION__, new_ifname); ++ if( 0 != (ret = rtw_change_ifname(padapter, new_ifname)) ) { ++ goto exit; ++ } ++ ++ if(_rtw_memcmp(rereg_priv->old_ifname, "disable%d", 9) == _TRUE) { ++ padapter->ledpriv.bRegUseLed= rereg_priv->old_bRegUseLed; ++ rtw_hal_sw_led_init(padapter); ++ rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode); ++ } ++ ++ strncpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ); ++ rereg_priv->old_ifname[IFNAMSIZ-1] = 0; ++ ++ if(_rtw_memcmp(new_ifname, "disable%d", 9) == _TRUE) { ++ ++ DBG_871X("%s disable\n", __FUNCTION__); ++ // free network queue for Android's timming issue ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ // close led ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ rereg_priv->old_bRegUseLed = padapter->ledpriv.bRegUseLed; ++ padapter->ledpriv.bRegUseLed= _FALSE; ++ rtw_hal_sw_led_deinit(padapter); ++ ++ // the interface is being "disabled", we can do deeper IPS ++ rereg_priv->old_ips_mode = rtw_get_ips_mode_req(&padapter->pwrctrlpriv); ++ rtw_ips_mode_req(&padapter->pwrctrlpriv, IPS_NORMAL); ++ } ++exit: ++ return ret; ++ ++} ++ ++#if 0 ++void mac_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_871X("\n======= MAC REG =======\n"); ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++ for(i=0x400;i<0x800;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++} ++void bb_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_871X("\n======= BB REG =======\n"); ++ for(i=0x800;i<0x1000;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++} ++void rf_reg_dump(_adapter *padapter) ++{ ++ int i,j=1,path; ++ u32 value; ++ DBG_871X("\n======= RF REG =======\n"); ++ for(path=0;path<2;path++) ++ { ++ DBG_871X("\nRF_Path(%x)\n",path); ++ for(i=0;i<0x100;i++) ++ { ++ value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ if(j%4==1) DBG_871X("0x%02x ",i); ++ DBG_871X(" 0x%08x ",value); ++ if((j++)%4==0) DBG_871X("\n"); ++ } ++ } ++} ++ ++#endif ++ ++void mac_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_871X("\n======= MAC REG =======\n"); ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++ for(i=0x400;i<0x800;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++} ++void bb_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_871X("\n======= BB REG =======\n"); ++ for(i=0x800;i<0x1000;i+=4) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++} ++void rf_reg_dump(_adapter *padapter) ++{ ++ int i,j=1,path; ++ u32 value; ++ u8 rf_type,path_nums = 0; ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_871X("\n======= RF REG =======\n"); ++ if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type )) ++ path_nums = 1; ++ else ++ path_nums = 2; ++ ++ for(path=0;path ++#endif ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include ++#endif ++static int rtw_dbg_port(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ int ret = 0; ++ u8 major_cmd, minor_cmd; ++ u16 arg; ++ u32 extra_arg, *pdata, val32; ++ struct sta_info *psta; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ pdata = (u32*)&wrqu->data; ++ ++ val32 = *pdata; ++ arg = (u16)(val32&0x0000ffff); ++ major_cmd = (u8)(val32>>24); ++ minor_cmd = (u8)((val32>>16)&0x00ff); ++ ++ extra_arg = *(pdata+1); ++ ++ switch(major_cmd) ++ { ++ case 0x70://read_reg ++ switch(minor_cmd) ++ { ++ case 1: ++ DBG_871X("rtw_read8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); ++ break; ++ case 2: ++ DBG_871X("rtw_read16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); ++ break; ++ case 4: ++ DBG_871X("rtw_read32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); ++ break; ++ } ++ break; ++ case 0x71://write_reg ++ switch(minor_cmd) ++ { ++ case 1: ++ rtw_write8(padapter, arg, extra_arg); ++ DBG_871X("rtw_write8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); ++ break; ++ case 2: ++ rtw_write16(padapter, arg, extra_arg); ++ DBG_871X("rtw_write16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); ++ break; ++ case 4: ++ rtw_write32(padapter, arg, extra_arg); ++ DBG_871X("rtw_write32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); ++ break; ++ } ++ break; ++ case 0x72://read_bb ++ DBG_871X("read_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); ++ break; ++ case 0x73://write_bb ++ rtw_hal_write_bbreg(padapter, arg, 0xffffffff, extra_arg); ++ DBG_871X("write_bbreg(0x%x)=0x%x\n", arg, rtw_hal_read_bbreg(padapter, arg, 0xffffffff)); ++ break; ++ case 0x74://read_rf ++ DBG_871X("read RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg,rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); ++ break; ++ case 0x75://write_rf ++ rtw_hal_write_rfreg(padapter, minor_cmd, arg, 0xffffffff, extra_arg); ++ DBG_871X("write RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg, rtw_hal_read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); ++ break; ++ ++ case 0x76: ++ switch(minor_cmd) ++ { ++ case 0x00: //normal mode, ++ padapter->recvpriv.is_signal_dbg = 0; ++ break; ++ case 0x01: //dbg mode ++ padapter->recvpriv.is_signal_dbg = 1; ++ extra_arg = extra_arg>100?100:extra_arg; ++ extra_arg = extra_arg<0?0:extra_arg; ++ padapter->recvpriv.signal_strength_dbg=extra_arg; ++ break; ++ } ++ break; ++ case 0x78: //IOL test ++ switch(minor_cmd) ++ { ++ #ifdef CONFIG_IOL ++ case 0x04: //LLT table initialization test ++ { ++ u8 page_boundary = 0xf9; ++ { ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary); ++ ++ ++ if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500) ) ++ ret = -EPERM; ++ } ++ } ++ break; ++ case 0x05: //blink LED test ++ { ++ u16 reg = 0x4c; ++ u32 blink_num = 50; ++ u32 blink_delay_ms = 200; ++ int i; ++ ++ { ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ for(i=0;inetwork.MacAddress ++ , WLAN_REASON_EXPIRATION_CHK); ++ break; ++ ++ case 0x7F: ++ switch(minor_cmd) ++ { ++ case 0x0: ++ DBG_871X("fwstate=0x%x\n", get_fwstate(pmlmepriv)); ++ break; ++ case 0x01: ++ DBG_871X("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", ++ psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ break; ++ case 0x02: ++ DBG_871X("pmlmeinfo->state=0x%x\n", pmlmeinfo->state); ++ break; ++ case 0x03: ++ DBG_871X("qos_option=%d\n", pmlmepriv->qospriv.qos_option); ++ DBG_871X("ht_option=%d\n", pmlmepriv->htpriv.ht_option); ++ break; ++ case 0x04: ++ DBG_871X("cur_ch=%d\n", pmlmeext->cur_channel); ++ DBG_871X("cur_bw=%d\n", pmlmeext->cur_bwmode); ++ DBG_871X("cur_ch_off=%d\n", pmlmeext->cur_ch_offset); ++ break; ++ case 0x05: ++ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(psta) ++ { ++ int i; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++ DBG_871X("SSID=%s\n", cur_network->network.Ssid.Ssid); ++ DBG_871X("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ DBG_871X("cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ DBG_871X("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ DBG_871X("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ DBG_871X("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ DBG_871X("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ DBG_871X("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ DBG_871X("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ ++ for(i=0;i<16;i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ if(preorder_ctrl->enable) ++ { ++ DBG_871X("tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ else ++ { ++ DBG_871X("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); ++ } ++ break; ++ case 0x06: ++ { ++ u8 DMFlag; ++ rtw_hal_get_hwreg(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag)); ++ DBG_871X("(B)DMFlag=0x%x, arg=0x%x\n", DMFlag, arg); ++ DMFlag = (u8)(0x0f&arg); ++ DBG_871X("(A)DMFlag=0x%x\n", DMFlag); ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag)); ++ } ++ break; ++ case 0x07: ++ DBG_871X("bSurpriseRemoved=%d, bDriverStopped=%d\n", ++ padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ break; ++ case 0x08: ++ { ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ DBG_871X("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d" ++ ", free_xmit_extbuf_cnt=%d, free_xframe_ext_cnt=%d" ++ ", free_recvframe_cnt=%d\n", ++ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, ++ pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt, ++ precvpriv->free_recvframe_cnt); ++ #ifdef CONFIG_USB_HCI ++ DBG_871X("rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt); ++ #endif ++ } ++ break; ++ case 0x09: ++ { ++ int i, j; ++ _list *plist, *phead; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++#ifdef CONFIG_AP_MODE ++ DBG_871X("sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); ++#endif ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ if(extra_arg == psta->aid) ++ { ++ DBG_871X("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ DBG_871X("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ DBG_871X("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ DBG_871X("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ DBG_871X("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ DBG_871X("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ DBG_871X("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++#ifdef CONFIG_AP_MODE ++ DBG_871X("capability=0x%x\n", psta->capability); ++ DBG_871X("flags=0x%x\n", psta->flags); ++ DBG_871X("wpa_psk=0x%x\n", psta->wpa_psk); ++ DBG_871X("wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); ++ DBG_871X("wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); ++ DBG_871X("qos_info=0x%x\n", psta->qos_info); ++#endif ++ DBG_871X("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); ++ ++ ++ ++ for(j=0;j<16;j++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[j]; ++ if(preorder_ctrl->enable) ++ { ++ DBG_871X("tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ } ++ break; ++ ++ case 0x0c://dump rx packet ++ { ++ DBG_871X("dump rx packet (%d)\n",extra_arg); ++ //pHalData->bDumpRxPkt =extra_arg; ++ rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DUMP_RXPKT, &(extra_arg)); ++ } ++ break; ++#if 0 ++ case 0x0d://dump cam ++ { ++ //u8 entry = (u8) extra_arg; ++ u8 entry=0; ++ //dump cam ++ for(entry=0;entry<32;entry++) ++ read_cam(padapter,entry); ++ } ++ break; ++#endif ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ case 0x0f: ++ { ++ if(extra_arg == 0){ ++ DBG_871X("###### silent reset test.......#####\n"); ++ rtw_hal_sreset_reset(padapter); ++ } else { ++ sreset_set_trigger_point(padapter, extra_arg); ++ } ++ ++ } ++ break; ++ case 0x15: ++ { ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ DBG_871X("==>silent resete cnts:%d\n",pwrpriv->ips_enter_cnts); ++ } ++ break; ++ ++ #endif ++ ++ case 0x10:// driver version display ++ DBG_871X("rtw driver version=%s\n", DRIVERVERSION); ++ break; ++ case 0x11: ++ { ++ DBG_871X("turn %s Rx RSSI display function\n",(extra_arg==1)?"on":"off"); ++ padapter->bRxRSSIDisplay = extra_arg ; ++ } ++ break; ++ case 0x12: //set rx_stbc ++ { ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ // 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g ++ //default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ ++ if( pregpriv && (extra_arg == 0 || extra_arg == 1|| extra_arg == 2 || extra_arg == 3)) ++ { ++ pregpriv->rx_stbc= extra_arg; ++ DBG_871X("set rx_stbc=%d\n",pregpriv->rx_stbc); ++ } ++ else ++ DBG_871X("get rx_stbc=%d\n",pregpriv->rx_stbc); ++ ++ } ++ break; ++ case 0x13: //set ampdu_enable ++ { ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ // 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) ++ if( pregpriv && extra_arg >= 0 && extra_arg < 3 ) ++ { ++ pregpriv->ampdu_enable= extra_arg; ++ DBG_871X("set ampdu_enable=%d\n",pregpriv->ampdu_enable); ++ } ++ else ++ DBG_871X("get ampdu_enable=%d\n",pregpriv->ampdu_enable); ++ ++ } ++ break; ++ case 0x14: //get wifi_spec ++ { ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ DBG_871X("get wifi_spec=%d\n",pregpriv->wifi_spec); ++ ++ } ++ break; ++ case 0x22: ++ { ++ DBG_871X("turn %s the ForceWriteInitGain Variable\n",(extra_arg==1)?"on":"off"); ++ padapter->bForceWriteInitGain = extra_arg; ++ break; ++ } ++ case 0x23: ++ { ++ DBG_871X("turn %s the bNotifyChannelChange Variable\n",(extra_arg==1)?"on":"off"); ++ padapter->bNotifyChannelChange = extra_arg; ++ break; ++ } ++ case 0x24: ++ { ++#ifdef CONFIG_P2P ++ DBG_871X("turn %s the bShowGetP2PState Variable\n",(extra_arg==1)?"on":"off"); ++ padapter->bShowGetP2PState = extra_arg; ++#endif // CONFIG_P2P ++ break; ++ } ++#if 1 ++ case 0xdd://registers dump , 0 for mac reg,1 for bb reg, 2 for rf reg ++ { ++ if(extra_arg==0){ ++ mac_reg_dump(padapter); ++ } ++ else if(extra_arg==1){ ++ bb_reg_dump(padapter); ++ } ++ else if(extra_arg==2){ ++ rf_reg_dump(padapter); ++ } ++ ++ } ++ break; ++#endif ++ case 0xee://turn on/off dynamic funcs ++ { ++ u8 dm_flag; ++ ++ if(0xf==extra_arg){ ++ rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag); ++ DBG_871X(" === DMFlag(0x%02x) === \n",dm_flag); ++ DBG_871X("extra_arg = 0 - disable all dynamic func \n"); ++ DBG_871X("extra_arg = 1 - disable DIG- BIT(0)\n"); ++ DBG_871X("extra_arg = 2 - disable High power - BIT(1)\n"); ++ DBG_871X("extra_arg = 3 - disable tx power tracking - BIT(2)\n"); ++ DBG_871X("extra_arg = 4 - disable BT coexistence - BIT(3)\n"); ++ DBG_871X("extra_arg = 5 - disable antenna diversity - BIT(4)\n"); ++ DBG_871X("extra_arg = 6 - enable all dynamic func \n"); ++ } ++ else{ ++ /* extra_arg = 0 - disable all dynamic func ++ extra_arg = 1 - disable DIG ++ extra_arg = 2 - disable tx power tracking ++ extra_arg = 3 - turn on all dynamic func ++ */ ++ rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DM_FUNC, &(extra_arg)); ++ rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag); ++ DBG_871X(" === DMFlag(0x%02x) === \n",dm_flag); ++ } ++ } ++ break; ++ ++ case 0xfd: ++ rtw_write8(padapter, 0xc50, arg); ++ DBG_871X("wr(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); ++ rtw_write8(padapter, 0xc58, arg); ++ DBG_871X("wr(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); ++ break; ++ case 0xfe: ++ DBG_871X("rd(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); ++ DBG_871X("rd(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); ++ break; ++ case 0xff: ++ { ++ DBG_871X("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); ++ DBG_871X("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); ++ DBG_871X("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); ++ DBG_871X("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); ++ DBG_871X("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); ++ ++ DBG_871X("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); ++ ++ ++ DBG_871X("\n"); ++ ++ DBG_871X("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); ++ DBG_871X("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); ++ ++ DBG_871X("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); ++ ++ DBG_871X("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); ++ ++ DBG_871X("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); ++ DBG_871X("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); ++ ++ DBG_871X("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); ++ DBG_871X("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); ++ DBG_871X("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); ++ DBG_871X("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); ++ } ++ break; ++ } ++ break; ++ default: ++ DBG_871X("error dbg cmd!\n"); ++ break; ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int wpa_set_param(struct net_device *dev, u8 name, u32 value) ++{ ++ uint ret=0; ++ u32 flags; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ switch (name){ ++ case IEEE_PARAM_WPA_ENABLED: ++ ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; //802.1x ++ ++ //ret = ieee80211_wpa_enable(ieee, value); ++ ++ switch((value)&0xff) ++ { ++ case 1 : //WPA ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; //WPA_PSK ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case 2: //WPA2 ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; //WPA2_PSK ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("wpa_set_param:padapter->securitypriv.ndisauthtype=%d\n", padapter->securitypriv.ndisauthtype)); ++ ++ break; ++ ++ case IEEE_PARAM_TKIP_COUNTERMEASURES: ++ //ieee->tkip_countermeasures=value; ++ break; ++ ++ case IEEE_PARAM_DROP_UNENCRYPTED: ++ { ++ /* HACK: ++ * ++ * wpa_supplicant calls set_wpa_enabled when the driver ++ * is loaded and unloaded, regardless of if WPA is being ++ * used. No other calls are made which can be used to ++ * determine if encryption will be used or not prior to ++ * association being expected. If encryption is not being ++ * used, drop_unencrypted is set to false, else true -- we ++ * can use this to determine if the CAP_PRIVACY_ON bit should ++ * be set. ++ */ ++ ++#if 0 ++ struct ieee80211_security sec = { ++ .flags = SEC_ENABLED, ++ .enabled = value, ++ }; ++ ieee->drop_unencrypted = value; ++ /* We only change SEC_LEVEL for open mode. Others ++ * are set by ipw_wpa_set_encryption. ++ */ ++ if (!value) { ++ sec.flags |= SEC_LEVEL; ++ sec.level = SEC_LEVEL_0; ++ } ++ else { ++ sec.flags |= SEC_LEVEL; ++ sec.level = SEC_LEVEL_1; ++ } ++ if (ieee->set_security) ++ ieee->set_security(ieee->dev, &sec); ++#endif ++ break; ++ ++ } ++ case IEEE_PARAM_PRIVACY_INVOKED: ++ ++ //ieee->privacy_invoked=value; ++ ++ break; ++ ++ case IEEE_PARAM_AUTH_ALGS: ++ ++ ret = wpa_set_auth_algs(dev, value); ++ ++ break; ++ ++ case IEEE_PARAM_IEEE_802_1X: ++ ++ //ieee->ieee802_1x=value; ++ ++ break; ++ ++ case IEEE_PARAM_WPAX_SELECT: ++ ++ // added for WPA2 mixed mode ++ //DBG_871X(KERN_WARNING "------------------------>wpax value = %x\n", value); ++ /* ++ spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags); ++ ieee->wpax_type_set = 1; ++ ieee->wpax_type_notify = value; ++ spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags); ++ */ ++ ++ break; ++ ++ default: ++ ++ ++ ++ ret = -EOPNOTSUPP; ++ ++ ++ break; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ switch (command) ++ { ++ case IEEE_MLME_STA_DEAUTH: ++ ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ case IEEE_MLME_STA_DISASSOC: ++ ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ default: ++ ret = -EOPNOTSUPP; ++ break; ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) ++{ ++ struct ieee_param *param; ++ uint ret=0; ++ ++ //down(&ieee->wx_sem); ++ ++ if (p->length < sizeof(struct ieee_param) || !p->pointer){ ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ param = (struct ieee_param *)rtw_malloc(p->length); ++ if (param == NULL) ++ { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (copy_from_user(param, p->pointer, p->length)) ++ { ++ rtw_mfree((u8*)param, p->length); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ switch (param->cmd) { ++ ++ case IEEE_CMD_SET_WPA_PARAM: ++ ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value); ++ break; ++ ++ case IEEE_CMD_SET_WPA_IE: ++ //ret = wpa_set_wpa_ie(dev, param, p->length); ++ ret = rtw_set_wpa_ie((_adapter *)rtw_netdev_priv(dev), (char*)param->u.wpa_ie.data, (u16)param->u.wpa_ie.len); ++ break; ++ ++ case IEEE_CMD_SET_ENCRYPTION: ++ ret = wpa_set_encryption(dev, param, p->length); ++ break; ++ ++ case IEEE_CMD_MLME: ++ ret = wpa_mlme(dev, param->u.mlme.command, param->u.mlme.reason_code); ++ break; ++ ++ default: ++ DBG_871X("Unknown WPA supplicant request: %d\n", param->cmd); ++ ret = -EOPNOTSUPP; ++ break; ++ ++ } ++ ++ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ++ ret = -EFAULT; ++ ++ rtw_mfree((u8 *)param, p->length); ++ ++out: ++ ++ //up(&ieee->wx_sem); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_AP_MODE ++static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ if (is_wep_enc(alg)) ++ padapter->securitypriv.key_mask |= BIT(psetkeyparm->keyid); ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = 1; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ keylen = 16; ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++ ++ ++} ++ ++static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ return set_group_key(padapter, key, alg, keyid); ++ ++} ++ ++ ++static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_871X("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_871X("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_871X("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_871X("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_871X(" r871x_set_encryption: pwep allocate fail !!!\n"); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_871X("wep, set_tx=1\n"); ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(pwep->KeyLength==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ ++ } ++ else ++ { ++ DBG_871X("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ if(param->u.crypt.set_tx ==1) ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_871X("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_871X("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_871X("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ DBG_871X("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_871X("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_871X("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_871X("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_871X("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ if(pwep) ++ { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ unsigned char *pbuf = param->u.bcn_ie.buf; ++ ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++ ++ if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ pstapriv->max_num_sta = NUM_STA; ++ ++ ++ if(rtw_check_beacon_data(padapter, pbuf, (len-12-2)) == _SUCCESS)// 12 = param header, 2:no packed ++ ret = 0; ++ else ++ ret = -EINVAL; ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_hostapd_sta_flush(struct net_device *dev) ++{ ++ //_irqL irqL; ++ //_list *phead, *plist; ++ int ret=0; ++ //struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++ ret = rtw_sta_flush(padapter); ++ ++ return ret; ++ ++} ++ ++static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) ++{ ++ _irqL irqL; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("rtw_add_sta(aid=%d)=" MAC_FMT "\n", param->u.add_sta.aid, MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++/* ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ DBG_871X("rtw_add_sta(), free has been added psta=%p\n", psta); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ psta = NULL; ++ } ++*/ ++ //psta = rtw_alloc_stainfo(pstapriv, param->sta_addr); ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ int flags = param->u.add_sta.flags; ++ ++ //DBG_871X("rtw_add_sta(), init sta's variables, psta=%p\n", psta); ++ ++ psta->aid = param->u.add_sta.aid;//aid=1~2007 ++ ++ _rtw_memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16); ++ ++ ++ //check wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //chec 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ _rtw_memcpy((void*)&psta->htpriv.ht_cap, (void*)¶m->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++ } ++ else ++ { ++ ret = -ENOMEM; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) ++{ ++ _irqL irqL; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("rtw_del_sta=" MAC_FMT "\n", MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ u8 updated=_FALSE; ++ ++ //DBG_871X("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ associated_clients_update(padapter, updated); ++ ++ psta = NULL; ++ ++ } ++ else ++ { ++ DBG_871X("rtw_del_sta(), sta has already been removed or never been added\n"); ++ ++ //ret = -1; ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_ioctl_get_sta_data(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct ieee_param_ex *param_ex = (struct ieee_param_ex *)param; ++ struct sta_data *psta_data = (struct sta_data *)param_ex->data; ++ ++ DBG_871X("rtw_ioctl_get_sta_info, sta_addr: " MAC_FMT "\n", MAC_ARG(param_ex->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param_ex->sta_addr[0] == 0xff && param_ex->sta_addr[1] == 0xff && ++ param_ex->sta_addr[2] == 0xff && param_ex->sta_addr[3] == 0xff && ++ param_ex->sta_addr[4] == 0xff && param_ex->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, param_ex->sta_addr); ++ if(psta) ++ { ++#if 0 ++ struct { ++ u16 aid; ++ u16 capability; ++ int flags; ++ u32 sta_set; ++ u8 tx_supp_rates[16]; ++ u32 tx_supp_rates_len; ++ struct rtw_ieee80211_ht_cap ht_cap; ++ u64 rx_pkts; ++ u64 rx_bytes; ++ u64 rx_drops; ++ u64 tx_pkts; ++ u64 tx_bytes; ++ u64 tx_drops; ++ } get_sta; ++#endif ++ psta_data->aid = (u16)psta->aid; ++ psta_data->capability = psta->capability; ++ psta_data->flags = psta->flags; ++ ++/* ++ nonerp_set : BIT(0) ++ no_short_slot_time_set : BIT(1) ++ no_short_preamble_set : BIT(2) ++ no_ht_gf_set : BIT(3) ++ no_ht_set : BIT(4) ++ ht_20mhz_set : BIT(5) ++*/ ++ ++ psta_data->sta_set =((psta->nonerp_set) | ++ (psta->no_short_slot_time_set <<1) | ++ (psta->no_short_preamble_set <<2) | ++ (psta->no_ht_gf_set <<3) | ++ (psta->no_ht_set <<4) | ++ (psta->ht_20mhz_set <<5)); ++ ++ psta_data->tx_supp_rates_len = psta->bssratelen; ++ _rtw_memcpy(psta_data->tx_supp_rates, psta->bssrateset, psta->bssratelen); ++ ++ _rtw_memcpy(&psta_data->ht_cap, &psta->htpriv.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ psta_data->rx_pkts = psta->sta_stats.rx_data_pkts; ++ psta_data->rx_bytes = psta->sta_stats.rx_bytes; ++ psta_data->rx_drops = psta->sta_stats.rx_drops; ++ ++ psta_data->tx_pkts = psta->sta_stats.tx_pkts; ++ psta_data->tx_bytes = psta->sta_stats.tx_bytes; ++ psta_data->tx_drops = psta->sta_stats.tx_drops; ++ ++ ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) ++{ ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("rtw_get_sta_wpaie, sta_addr: " MAC_FMT "\n", MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ if((psta->wpa_ie[0] == WLAN_EID_RSN) || (psta->wpa_ie[0] == WLAN_EID_GENERIC)) ++ { ++ int wpa_ie_len; ++ int copy_len; ++ ++ wpa_ie_len = psta->wpa_ie[1]; ++ ++ copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)):(wpa_ie_len+2); ++ ++ param->u.wpa_ie.len = copy_len; ++ ++ _rtw_memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len); ++ } ++ else ++ { ++ //ret = -1; ++ DBG_871X("sta's wpa_ie is NONE\n"); ++ } ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ unsigned char wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int ie_len; ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_beacon_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_beacon_ie_len = ie_len; ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, param->u.bcn_ie.buf, ie_len); ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int ie_len; ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_probe_resp_ie_len = ie_len; ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int ie_len; ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_assoc_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_assoc_resp_ie_len = ie_len; ++ if ( pmlmepriv->wps_assoc_resp_ie == NULL) { ++ DBG_871X("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *mlmepriv = &(adapter->mlmepriv); ++ struct mlme_ext_priv *mlmeext = &(adapter->mlmeextpriv); ++ struct mlme_ext_info *mlmeinfo = &(mlmeext->mlmext_info); ++ int ie_len; ++ u8 *ssid_ie; ++ char ssid[NDIS_802_11_LENGTH_SSID + 1]; ++ sint ssid_len; ++ u8 ignore_broadcast_ssid; ++ ++ if(check_fwstate(mlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EPERM; ++ ++ if (param->u.bcn_ie.reserved[0] != 0xea) ++ return -EINVAL; ++ ++ mlmeinfo->hidden_ssid_mode = ignore_broadcast_ssid = param->u.bcn_ie.reserved[1]; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ssid_ie = rtw_get_ie(param->u.bcn_ie.buf, WLAN_EID_SSID, &ssid_len, ie_len); ++ ++ if (ssid_ie && ssid_len) { ++ WLAN_BSSID_EX *pbss_network = &mlmepriv->cur_network.network; ++ WLAN_BSSID_EX *pbss_network_ext = &mlmeinfo->network; ++ ++ _rtw_memcpy(ssid, ssid_ie+2, ssid_len); ++ ssid[ssid_len>NDIS_802_11_LENGTH_SSID?NDIS_802_11_LENGTH_SSID:ssid_len] = 0x0; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ ssid, ssid_len, ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (void *)ssid, ssid_len); ++ pbss_network->Ssid.SsidLength = ssid_len; ++ _rtw_memcpy(pbss_network_ext->Ssid.Ssid, (void *)ssid, ssid_len); ++ pbss_network_ext->Ssid.SsidLength = ssid_len; ++ ++ if(0) ++ DBG_871X(FUNC_ADPT_FMT" after ssid:(%s,%d), (%s,%d)\n", FUNC_ADPT_ARG(adapter), ++ pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength, ++ pbss_network_ext->Ssid.Ssid, pbss_network_ext->Ssid.SsidLength); ++ } ++ ++ DBG_871X(FUNC_ADPT_FMT" ignore_broadcast_ssid:%d, %s,%d\n", FUNC_ADPT_ARG(adapter), ++ ignore_broadcast_ssid, ssid, ssid_len); ++ ++ return ret; ++} ++ ++static int rtw_ioctl_acl_remove_sta(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ret = rtw_acl_remove_sta(padapter, param->sta_addr); ++ ++ return ret; ++ ++} ++ ++static int rtw_ioctl_acl_add_sta(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ret = rtw_acl_add_sta(padapter, param->sta_addr); ++ ++ return ret; ++ ++} ++ ++static int rtw_ioctl_set_macaddr_acl(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ rtw_set_macaddr_acl(padapter, param->u.mlme.command); ++ ++ return ret; ++} ++ ++static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) ++{ ++ struct ieee_param *param; ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ /* ++ * this function is expect to call in master mode, which allows no power saving ++ * so, we just check hw_init_completed instead of call rfpwrstate_check() ++ */ ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -EPERM; ++ goto out; ++ } ++ ++ ++ //if (p->length < sizeof(struct ieee_param) || !p->pointer){ ++ if(!p->pointer){ ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ param = (struct ieee_param *)rtw_malloc(p->length); ++ if (param == NULL) ++ { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (copy_from_user(param, p->pointer, p->length)) ++ { ++ rtw_mfree((u8*)param, p->length); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ //DBG_871X("%s, cmd=%d\n", __FUNCTION__, param->cmd); ++ ++ switch (param->cmd) ++ { ++ case RTL871X_HOSTAPD_FLUSH: ++ ++ ret = rtw_hostapd_sta_flush(dev); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_ADD_STA: ++ ++ ret = rtw_add_sta(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_REMOVE_STA: ++ ++ ret = rtw_del_sta(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_BEACON: ++ ++ ret = rtw_set_beacon(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_SET_ENCRYPTION: ++ ++ ret = rtw_set_encryption(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_GET_WPAIE_STA: ++ ++ ret = rtw_get_sta_wpaie(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_BEACON: ++ ++ ret = rtw_set_wps_beacon(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_PROBE_RESP: ++ ++ ret = rtw_set_wps_probe_resp(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP: ++ ++ ret = rtw_set_wps_assoc_resp(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_HIDDEN_SSID: ++ ++ ret = rtw_set_hidden_ssid(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_GET_INFO_STA: ++ ++ ret = rtw_ioctl_get_sta_data(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_MACADDR_ACL: ++ ++ ret = rtw_ioctl_set_macaddr_acl(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_ACL_ADD_STA: ++ ++ ret = rtw_ioctl_acl_add_sta(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_ACL_REMOVE_STA: ++ ++ ret = rtw_ioctl_acl_remove_sta(dev, param, p->length); ++ ++ break; ++ ++ default: ++ DBG_871X("Unknown hostapd request: %d\n", param->cmd); ++ ret = -EOPNOTSUPP; ++ break; ++ ++ } ++ ++ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ++ ret = -EFAULT; ++ ++ ++ rtw_mfree((u8 *)param, p->length); ++ ++out: ++ ++ return ret; ++ ++} ++#endif ++ ++#include ++static int rtw_wx_set_priv(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *awrq, ++ char *extra) ++{ ++ ++#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ char *ext_dbg; ++#endif ++ ++ int ret = 0; ++ int len = 0; ++ char *ext; ++ int i; ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *dwrq = (struct iw_point*)awrq; ++ ++ //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ("+rtw_wx_set_priv\n")); ++ if(dwrq->length == 0) ++ return -EFAULT; ++ len = dwrq->length; ++ if (!(ext = rtw_vmalloc(len))) ++ return -ENOMEM; ++ ++ if (copy_from_user(ext, dwrq->pointer, len)) { ++ rtw_vmfree(ext, len); ++ return -EFAULT; ++ } ++ ++ ++ //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ++ // ("rtw_wx_set_priv: %s req=%s\n", ++ // dev->name, ext)); ++ ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ if (!(ext_dbg = rtw_vmalloc(len))) ++ { ++ rtw_vmfree(ext, len); ++ return -ENOMEM; ++ } ++ ++ _rtw_memcpy(ext_dbg, ext, len); ++ #endif ++ ++ //added for wps2.0 @20110524 ++ if(dwrq->flags == 0x8766 && len > 8) ++ { ++ u32 cp_sz; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *probereq_wpsie = ext; ++ int probereq_wpsie_len = len; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ if((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && ++ (_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) ==_TRUE)) ++ { ++ cp_sz = probereq_wpsie_len>MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN:probereq_wpsie_len; ++ ++ //_rtw_memcpy(pmlmepriv->probereq_wpsie, probereq_wpsie, cp_sz); ++ //pmlmepriv->probereq_wpsie_len = cp_sz; ++ ++ printk("probe_req_wps_ielen=%d\n", cp_sz); ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(cp_sz); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ ret = -EINVAL; ++ goto FREE_EXT; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, probereq_wpsie, cp_sz); ++ pmlmepriv->wps_probe_req_ie_len = cp_sz; ++ ++ } ++ ++ goto FREE_EXT; ++ ++ } ++ ++ if( len >= WEXT_CSCAN_HEADER_SIZE ++ && _rtw_memcmp(ext, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ++ ){ ++ ret = rtw_wx_set_scan(dev, info, awrq, ext); ++ goto FREE_EXT; ++ } ++ ++#ifdef CONFIG_ANDROID ++ //DBG_871X("rtw_wx_set_priv: %s req=%s\n", dev->name, ext); ++ ++ i = rtw_android_cmdstr_to_num(ext); ++ ++ switch(i) { ++ case ANDROID_WIFI_CMD_START : ++ indicate_wx_custom_event(padapter, "START"); ++ break; ++ case ANDROID_WIFI_CMD_STOP : ++ indicate_wx_custom_event(padapter, "STOP"); ++ break; ++ case ANDROID_WIFI_CMD_RSSI : ++ { ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ sprintf(ext, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); ++ } else { ++ sprintf(ext, "OK"); ++ } ++ } ++ break; ++ case ANDROID_WIFI_CMD_LINKSPEED : ++ { ++ u16 mbps = rtw_get_cur_max_rate(padapter)/10; ++ sprintf(ext, "LINKSPEED %d", mbps); ++ } ++ break; ++ case ANDROID_WIFI_CMD_MACADDR : ++ sprintf(ext, "MACADDR = " MAC_FMT, MAC_ARG(dev->dev_addr)); ++ break; ++ case ANDROID_WIFI_CMD_SCAN_ACTIVE : ++ { ++ //rtw_set_scan_mode(padapter, SCAN_ACTIVE); ++ sprintf(ext, "OK"); ++ } ++ break; ++ case ANDROID_WIFI_CMD_SCAN_PASSIVE : ++ { ++ //rtw_set_scan_mode(padapter, SCAN_PASSIVE); ++ sprintf(ext, "OK"); ++ } ++ break; ++ ++ case ANDROID_WIFI_CMD_COUNTRY : ++ { ++ char country_code[10]; ++ sscanf(ext, "%*s %s", country_code); ++ rtw_set_country(padapter, country_code); ++ sprintf(ext, "OK"); ++ } ++ break; ++ default : ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ DBG_871X("%s: %s unknowned req=%s\n", __FUNCTION__, ++ dev->name, ext_dbg); ++ #endif ++ ++ sprintf(ext, "OK"); ++ ++ } ++ ++ if (copy_to_user(dwrq->pointer, ext, min(dwrq->length, (u16)(strlen(ext)+1)) ) ) ++ ret = -EFAULT; ++ ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ DBG_871X("%s: %s req=%s rep=%s dwrq->length=%d, strlen(ext)+1=%d\n", __FUNCTION__, ++ dev->name, ext_dbg ,ext, dwrq->length, (u16)(strlen(ext)+1)); ++ #endif ++#endif //end of CONFIG_ANDROID ++ ++ ++FREE_EXT: ++ ++ rtw_vmfree(ext, len); ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ rtw_vmfree(ext_dbg, len); ++ #endif ++ ++ //DBG_871X("rtw_wx_set_priv: (SIOCSIWPRIV) %s ret=%d\n", ++ // dev->name, ret); ++ ++ return ret; ++ ++} ++ ++static int rtw_mp_efuse_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct mp_priv *pmp_priv; ++ ++ int i,j =0; ++ u8 data[EFUSE_MAP_SIZE]; ++ u8 rawdata[EFUSE_MAX_SIZE]; ++ u16 mapLen=0; ++ char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; ++ u16 addr = 0, cnts = 0, max_available_size = 0,raw_cursize = 0 ,raw_maxsize = 0; ++ ++ _rtw_memset(data, '\0', sizeof(data)); ++ _rtw_memset(rawdata, '\0', sizeof(rawdata)); ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ pch = extra; ++ DBG_871X("%s: in=%s\n", __func__, extra); ++ ++ i=0; ++ //mac 16 "00e04c871200" rmap,00,2 ++ while ( (token = strsep (&pch,",") )!=NULL ) ++ { ++ if(i>2) break; ++ tmp[i] = token; ++ i++; ++ } ++ ++ if ( strcmp(tmp[0],"realmap") == 0 ) { ++ ++ DBG_871X("strcmp OK = %s \n" ,tmp[0]); ++ ++ mapLen = EFUSE_MAP_SIZE; ++ ++ if (rtw_efuse_map_read(padapter, 0, mapLen, data) == _SUCCESS){ ++ DBG_871X("\t rtw_efuse_map_read \n"); ++ }else { ++ DBG_871X("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ DBG_871X("\tOFFSET\tVALUE(hex)\n"); ++ sprintf(extra, "%s \n", extra); ++ for ( i = 0; i < EFUSE_MAP_SIZE; i += 16 ) ++ { ++ DBG_871X("\t0x%02x\t", i); ++ sprintf(extra, "%s \t0x%02x\t", extra,i); ++ for (j = 0; j < 8; j++) ++ { ++ DBG_871X("%02X ", data[i+j]); ++ sprintf(extra, "%s %02X", extra, data[i+j]); ++ } ++ DBG_871X("\t"); ++ sprintf(extra,"%s\t",extra); ++ for (; j < 16; j++){ ++ DBG_871X("%02X ", data[i+j]); ++ sprintf(extra, "%s %02X", extra, data[i+j]); ++ } ++ DBG_871X("\n"); ++ sprintf(extra,"%s\n",extra); ++ } ++ DBG_871X("\n"); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"rmap") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ // rmap addr cnts ++ addr = simple_strtoul(tmp[1], &ptmp, 16); ++ ++ DBG_871X("addr = %x \n" ,addr); ++ ++ cnts=simple_strtoul(tmp[2], &ptmp,10); ++ if(cnts==0) return -EINVAL; ++ ++ DBG_871X("cnts = %d \n" ,cnts); ++ //_rtw_memset(extra, '\0', wrqu->data.length); ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + cnts) > max_available_size) { ++ DBG_871X("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_871X("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_871X("rtw_efuse_access ok \n"); ++ } ++ ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_871X("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i]); ++ DBG_871X(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ ++ wrqu->length = strlen(extra)+1; ++ ++ DBG_871X("extra = %s ", extra); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"realraw") == 0 ) { ++ addr=0; ++ mapLen = EFUSE_MAX_SIZE; ++ ++ if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) ++ { ++ DBG_871X("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } else ++ { ++ DBG_871X("\t rtw_efuse_access raw ok \n"); ++ } ++ ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i=0; ilength = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"mac") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ #ifdef CONFIG_RTL8192C ++ addr = 0x16; ++ cnts = 6; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x19; ++ cnts = 6; ++ #endif ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + mapLen) > max_available_size) { ++ DBG_871X("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_871X("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_871X("rtw_efuse_access ok \n"); ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_871X("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i+j]); ++ DBG_871X(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"vidpid") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ #ifdef CONFIG_RTL8192C ++ addr=0x0a; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x0c; ++ #endif ++ cnts = 4; ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + mapLen) > max_available_size) { ++ DBG_871X("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_871X("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_871X("rtw_efuse_access ok \n"); ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_871X("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i+j]); ++ DBG_871X(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"ableraw") == 0 ) { ++ efuse_GetCurrentSize(padapter,&raw_cursize); ++ raw_maxsize = efuse_GetMaxSize(padapter); ++ sprintf(extra, "%s : [ available raw size] = %d",extra,raw_maxsize-raw_cursize); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++ }else ++ { ++ sprintf(extra, "%s : Command not found\n",extra); ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static int rtw_mp_efuse_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ u8 buffer[40]; ++ u32 i,jj,kk; ++ u8 setdata[EFUSE_MAP_SIZE]; ++ u8 setrawdata[EFUSE_MAX_SIZE]; ++ char *pch, *ptmp, *token, *edata,*tmp[3]={0x00,0x00,0x00}; ++ ++ u16 addr = 0, max_available_size = 0; ++ u32 cnts = 0; ++ ++ pch = extra; ++ DBG_871X("%s: in=%s\n", __func__, extra); ++ ++ i=0; ++ while ( (token = strsep (&pch,",") )!=NULL ) ++ { ++ if(i>2) break; ++ tmp[i] = token; ++ i++; ++ } ++ ++ // tmp[0],[1],[2] ++ // wmap,addr,00e04c871200 ++ if ( strcmp(tmp[0],"wmap") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT; ++ ++ addr = simple_strtoul( tmp[1], &ptmp, 16 ); ++ addr = addr & 0xFF; ++ DBG_871X("addr = %x \n" ,addr); ++ ++ cnts = strlen( tmp[2] )/2; ++ if ( cnts == 0) return -EFAULT; ++ ++ DBG_871X("cnts = %d \n" ,cnts); ++ DBG_871X("target data = %s \n" ,tmp[2]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] ); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_871X("parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { ++ DBG_871X("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_871X("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"wraw") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT; ++ addr = simple_strtoul( tmp[1], &ptmp, 16 ); ++ addr = addr & 0xFF; ++ DBG_871X("addr = %x \n" ,addr); ++ ++ cnts=strlen( tmp[2] )/2; ++ if ( cnts == 0) return -EFAULT; ++ ++ DBG_871X(" cnts = %d \n" ,cnts ); ++ DBG_871X("target data = %s \n" ,tmp[2] ); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setrawdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] ); ++ } ++ ++ if ( rtw_efuse_access( padapter, _TRUE, addr, cnts, setrawdata ) == _FAIL ){ ++ DBG_871X("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } else ++ DBG_871X("\t rtw_efuse_access raw ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"mac") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ //mac,00e04c871200 ++ #ifdef CONFIG_RTL8192C ++ addr = 0x16; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x19; ++ #endif ++ cnts = strlen( tmp[1] )/2; ++ if ( cnts == 0) return -EFAULT; ++ if ( cnts > 6 ){ ++ DBG_871X("error data for mac addr = %s \n" ,tmp[1]); ++ return -EFAULT; ++ } ++ ++ DBG_871X("target data = %s \n" ,tmp[1]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_871X("parameter error \n"); ++ return -EFAULT; ++ } ++ if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) { ++ DBG_871X("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_871X("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"vidpid") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ // pidvid,da0b7881 ++ #ifdef CONFIG_RTL8192C ++ addr=0x0a; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x0c; ++ #endif ++ ++ cnts=strlen( tmp[1] )/2; ++ if ( cnts == 0) return -EFAULT; ++ DBG_871X("target data = %s \n" ,tmp[1]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_871X("parameter error \n"); ++ return -EFAULT; ++ } ++ ++ if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) { ++ DBG_871X("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_871X("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else{ ++ DBG_871X("Command not found\n"); ++ return 0; ++ } ++ ++ return 0; ++} ++ ++ ++ ++#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++/* ++ * Input Format: %s,%d,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * 1st %d is address(offset) ++ * 2st %d is data to write ++ */ ++static int rtw_mp_write_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width; ++ u32 addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ pch = extra; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ addr = simple_strtoul(pch, &ptmp, 16); ++ if (addr > 0x3FFF) return -EINVAL; ++ ++ pch = pnext + 1; ++ if ((pch - extra) >= wrqu->length) return -EINVAL; ++ data = simple_strtoul(pch, &ptmp, 16); ++ ++ ret = 0; ++ width = width_str[0]; ++ switch (width) { ++ case 'b': ++ // 1 byte ++ if (data > 0xFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write8(padapter, addr, data); ++ break; ++ case 'w': ++ // 2 bytes ++ if (data > 0xFFFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write16(padapter, addr, data); ++ break; ++ case 'd': ++ // 4 bytes ++ rtw_write32(padapter, addr, data); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* ++ * Input Format: %s,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * %d is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++static int rtw_mp_read_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width; ++ char data[20],tmp[20]; ++ u32 addr; ++ //u32 *data = (u32*)extra; ++ u32 ret, i=0, j=0, strtout=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (wrqu->length > 128) return -EFAULT; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ _rtw_memset(data, 0, 20); ++ _rtw_memset(tmp, 0, 20); ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ pch = input; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ if ((pch - input) >= wrqu->length) return -EINVAL; ++ ++ addr = simple_strtoul(pch, &ptmp, 16); ++ if (addr > 0x3FFF) return -EINVAL; ++ ++ ret = 0; ++ width = width_str[0]; ++ switch (width) { ++ case 'b': ++ // 1 byte ++ // *(u8*)data = rtw_read8(padapter, addr); ++ sprintf(extra, "%d\n", rtw_read8(padapter, addr)); ++ wrqu->length = strlen(extra); ++ break; ++ case 'w': ++ // 2 bytes ++ //*(u16*)data = rtw_read16(padapter, addr); ++ sprintf(data, "%04d\n", rtw_read16(padapter, addr)); ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ if ( data[i] != '\0' ) ++ tmp[j] = data[i]; ++ ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtout = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtout ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = 6; ++ break; ++ case 'd': ++ // 4 bytes ++ //*data = rtw_read32(padapter, addr); ++ sprintf(data, "%08x", rtw_read32(padapter, addr)); ++ //add read data format blank ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ tmp[j] = data[i]; ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtout = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtout ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = strlen(extra); ++ break; ++ ++ default: ++ wrqu->length = 0; ++ ret = -EINVAL; ++ break; ++ ++ } ++ ++ return ret; ++} ++ ++/* ++ * Input Format: %d,%x,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * 1st %x is address(offset) ++ * 2st %x is data to write ++ */ ++ static int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++/*static int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++*/ ++ u32 path, addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ ret = sscanf(extra, "%d,%x,%x", &path, &addr, &data); ++ if (ret < 3) return -EINVAL; ++ ++ if (path >= MAX_RF_PATH_NUMS) return -EINVAL; ++ if (addr > 0xFF) return -EINVAL; ++ if (data > 0xFFFFF) return -EINVAL; ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ write_rfreg(padapter, path, addr, data); ++ ++ sprintf(extra, "write_rf completed \n"); ++ ++ return 0; ++} ++ ++/* ++ * Input Format: %d,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * %x is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++static int rtw_mp_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char data[20],tmp[20]; ++ //u32 *data = (u32*)extra; ++ u32 path, addr; ++ u32 ret,i=0 ,j=0,strtou=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (wrqu->length > 128) return -EFAULT; ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ ret = sscanf(input, "%d,%x", &path, &addr); ++ if (ret < 2) return -EINVAL; ++ ++ if (path >= MAX_RF_PATH_NUMS) return -EINVAL; ++ if (addr > 0xFF) return -EINVAL; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ //*data = read_rfreg(padapter, path, addr); ++ sprintf(data, "%08x", read_rfreg(padapter, path, addr)); ++ //add read data format blank ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ tmp[j] = data[i]; ++ j++; ++ } ++ pch = tmp; ++ DBG_871X("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtou = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtou ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_start(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val8; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (padapter->registrypriv.mp_mode == 0) ++ return -EPERM; ++ ++ if (padapter->mppriv.mode == MP_OFF) { ++ if (mp_start_test(padapter) == _FAIL) ++ return -EPERM; ++ padapter->mppriv.mode = MP_ON; ++ } ++ ++ return 0; ++} ++ ++static int rtw_mp_stop(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (padapter->mppriv.mode != MP_OFF) { ++ mp_stop_test(padapter); ++ padapter->mppriv.mode = MP_OFF; ++ } ++ ++ return 0; ++} ++ ++extern int wifirate2_ratetbl_inx(unsigned char rate); ++ ++static int rtw_mp_rate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 rate = MPT_RATE_1M; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ rate = rtw_atoi(input); ++ sprintf( extra, "Set data rate to %d" , rate ); ++ ++ if(rate <= 0x7f) ++ rate = wifirate2_ratetbl_inx( (u8)rate); ++ else ++ rate =(rate-0x80+MPT_RATE_MCS0); ++ ++ //DBG_871X("%s: rate=%d\n", __func__, rate); ++ ++ if (rate >= MPT_RATE_LAST ) ++ return -EINVAL; ++ ++ padapter->mppriv.rateidx = rate; ++ Hal_SetDataRate(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_channel(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ u32 channel = 1; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ channel = rtw_atoi(input); ++ //DBG_871X("%s: channel=%d\n", __func__, channel); ++ sprintf( extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel ); ++ ++ padapter->mppriv.channel = channel; ++ Hal_SetChannel(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_bandwidth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 bandwidth=0, sg=0; ++ //u8 buffer[40]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ //if (copy_from_user(buffer, (void*)wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ //DBG_871X("%s:iwpriv in=%s\n", __func__, extra); ++ ++ sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg); ++ ++ if (bandwidth != HT_CHANNEL_WIDTH_40) ++ bandwidth = HT_CHANNEL_WIDTH_20; ++ ++ //DBG_871X("%s: bw=%d sg=%d \n", __func__, bandwidth , sg); ++ ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.preamble = sg; ++ ++ SetBandwidth(padapter); ++ ++ return 0; ++} ++ ++static int rtw_mp_txpower(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 idx_a=0,idx_b=0; ++ u8 input[wrqu->length]; ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b); ++ //DBG_871X("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b); ++ ++ sprintf( extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b ); ++ padapter->mppriv.txpoweridx = (u8)idx_a; ++ padapter->mppriv.txpoweridx_b = (u8)idx_b; ++ ++ Hal_SetAntennaPathPower(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_ant_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u8 input[wrqu->length]; ++ u16 antenna = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ //DBG_871X("%s: input=%s\n", __func__, input); ++ ++ sprintf( extra, "switch Tx antenna to %s", input ); ++ ++ for (i=0; i < strlen(input); i++) ++ { ++ switch(input[i]) ++ { ++ case 'a' : ++ antenna|=ANTENNA_A; ++ break; ++ case 'b': ++ antenna|=ANTENNA_B; ++ break; ++ } ++ } ++ //antenna |= BIT(extra[i]-'a'); ++ //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx); ++ ++ Hal_SetAntenna(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_ant_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u16 antenna = 0; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ //DBG_871X("%s: input=%s\n", __func__, input); ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ sprintf( extra, "switch Rx antenna to %s", input ); ++ ++ for (i=0; i < strlen(input); i++) { ++ ++ switch( input[i] ) ++ { ++ case 'a' : ++ antenna|=ANTENNA_A; ++ break; ++ case 'b': ++ antenna|=ANTENNA_B; ++ break; ++ } ++ } ++ ++ //DBG_871X("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_rx = antenna; ++ //DBG_871X("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx); ++ Hal_SetAntenna(padapter); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_ctx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 pkTx = 1, countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1; ++ u32 bStartTest = 1; ++ u32 count = 0; ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ pmp_priv = &padapter->mppriv; ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s: in=%s\n", __func__, extra); ++ ++ countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0 ++ cotuTx = strncmp(extra, "background", 20); ++ CarrSprTx = strncmp(extra, "background,cs", 20); ++ scTx = strncmp(extra, "background,sc", 20); ++ sgleTx = strncmp(extra, "background,stone", 20); ++ pkTx = strncmp(extra, "background,pkt", 20); ++ stop = strncmp(extra, "stop", 5); ++ sscanf(extra, "count=%d,pkt", &count); ++ ++ //DBG_871X("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop); ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ ++ if (stop == 0) { ++ bStartTest = 0; // To set Stop ++ pmp_priv->tx.stop = 1; ++ sprintf( extra, "Stop continuous Tx"); ++ } else { ++ bStartTest = 1; ++ if (pmp_priv->mode != MP_ON) { ++ if (pmp_priv->tx.stop != 1) { ++ DBG_871X("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); ++ return -EFAULT; ++ } ++ } ++ } ++ ++ if (pkTx == 0 || countPkTx == 0) ++ pmp_priv->mode = MP_PACKET_TX; ++ if (sgleTx == 0) ++ pmp_priv->mode = MP_SINGLE_TONE_TX; ++ if (cotuTx == 0) ++ pmp_priv->mode = MP_CONTINUOUS_TX; ++ if (CarrSprTx == 0) ++ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; ++ if (scTx == 0) ++ pmp_priv->mode = MP_SINGLE_CARRIER_TX; ++ ++ switch (pmp_priv->mode) ++ { ++ case MP_PACKET_TX: ++ ++ //DBG_871X("%s:pkTx %d\n", __func__,bStartTest); ++ if (bStartTest == 0) ++ { ++ pmp_priv->tx.stop = 1; ++ pmp_priv->mode = MP_ON; ++ sprintf( extra, "Stop continuous Tx"); ++ } ++ else if (pmp_priv->tx.stop == 1) ++ { ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 count=%u,\n",count); ++ //DBG_871X("%s:countPkTx %d\n", __func__,count); ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = count; ++ pmp_priv->tx.payload = 2; ++ pattrib = &pmp_priv->tx.attrib; ++ pattrib->pktlen = 1460; ++ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); ++ SetPacketTx(padapter); ++ } ++ else { ++ //DBG_871X("%s: pkTx not stop\n", __func__); ++ return -EFAULT; ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ ++ case MP_SINGLE_TONE_TX: ++ //DBG_871X("%s: sgleTx %d \n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ ++ } ++ Hal_SetSingleToneTx(padapter, (u8)bStartTest); ++ break; ++ ++ case MP_CONTINUOUS_TX: ++ DBG_871X("%s: cotuTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ } ++ Hal_SetContinuousTx(padapter, (u8)bStartTest); ++ break; ++ ++ case MP_CARRIER_SUPPRISSION_TX: ++ //DBG_871X("%s: CarrSprTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ if( pmp_priv->rateidx <= MPT_RATE_11M ) ++ { ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ }else ++ sprintf( extra, "Specify carrier suppression but not CCK rate"); ++ } ++ Hal_SetCarrierSuppressionTx(padapter, (u8)bStartTest); ++ break; ++ ++ case MP_SINGLE_CARRIER_TX: ++ //DBG_871X("%s: scTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ } ++ Hal_SetSingleCarrierTx(padapter, (u8)bStartTest); ++ break; ++ ++ default: ++ //DBG_871X("%s:No Match MP_MODE\n", __func__); ++ sprintf( extra, "Error! Continuous-Tx is not on-going."); ++ return -EFAULT; ++ } ++ ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ //DBG_871X("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(padapter); ++ } else { ++ pmp_priv->mode = MP_ON; ++ } ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++static int rtw_mp_arx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 bStartRx=0,bStopRx=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s: %s\n", __func__, input); ++ ++ bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0 ++ bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0 ++ SetPacketRx(padapter, bStartRx); ++ ++ if(bStartRx) ++ { ++ sprintf( extra, "start"); ++ wrqu->length = strlen(extra) + 1; ++ } ++ else if(bStopRx) ++ { ++ sprintf( extra, "Received packet OK:%d CRC error:%d",padapter->mppriv.rx_pktcount, ++ padapter->mppriv.rx_crcerrpktcount); ++ wrqu->length = strlen(extra) + 1; ++ } ++ ++ ++ return 0; ++} ++ ++static int rtw_mp_trx_query(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 txok,txfail,rxok,rxfail; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ txok=padapter->mppriv.tx.sended; ++ txfail=0; ++ rxok = padapter->mppriv.rx_pktcount; ++ rxfail = padapter->mppriv.rx_crcerrpktcount; ++ ++ _rtw_memset(extra, '\0', 128); ++ ++ sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ", txok, txfail,rxok,rxfail); ++ ++ wrqu->length=strlen(extra)+1; ++ ++ return 0; ++} ++ ++static int rtw_mp_pwrtrk(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 enable; ++ u32 thermal; ++ s32 ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ _rtw_memset(extra, 0, wrqu->length); ++ ++ enable = 1; ++ if (wrqu->length > 1) { // not empty string ++ if (strncmp(input, "stop", 4) == 0) ++ { ++ enable = 0; ++ sprintf(extra, "mp tx power tracking stop"); ++ } ++ else if (sscanf(input, "ther=%d", &thermal)) { ++ ret = Hal_SetThermalMeter(padapter, (u8)thermal); ++ if (ret == _FAIL) return -EPERM; ++ sprintf(extra, "mp tx power tracking start,target value=%d ok ",thermal); ++ }else { ++ return -EINVAL; ++ } ++ } ++ ++ ret = Hal_SetPowerTracking(padapter, enable); ++ if (ret == _FAIL) return -EPERM; ++ ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_psd(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ strcpy(extra,input); ++ ++ wrqu->length = mp_query_psd(padapter, extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_thermal(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val; ++ u16 bwrite=1; ++ #ifdef CONFIG_RTL8192C ++ u16 addr=0x78; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ u16 addr=0xc3; ++ #endif ++ u16 cnt=1; ++ u16 max_available_size=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ //DBG_871X("print extra %s \n",extra); ++ ++ bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0 ++ ++ Hal_GetThermalMeter(padapter, &val); ++ ++ if( bwrite == 0 ) ++ { ++ //DBG_871X("to write val:%d",val); ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if( 2 > max_available_size ) ++ { ++ DBG_871X("no available efuse!\n"); ++ return -EFAULT; ++ } ++ if ( rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL ) ++ { ++ DBG_871X("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } ++ else ++ { ++ sprintf(extra, " efuse write ok :%d", val); ++ } ++ } ++ else ++ { ++ sprintf(extra, "%d", val); ++ } ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_reset_stats(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ pmp_priv->tx.sended = 0; ++ padapter->mppriv.rx_pktcount = 0; ++ padapter->mppriv.rx_crcerrpktcount = 0; ++ ++ return 0; ++} ++ ++static int rtw_mp_dump(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ u32 value; ++ u8 rf_type,path_nums = 0; ++ u32 i,j=1,path; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ ++ //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ if ( strncmp(extra, "all", 4)==0 ) ++ { ++ DBG_871X("\n======= MAC REG =======\n"); ++ for ( i=0x0;i<0x300;i+=4 ) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++ for( i=0x400;i<0x800;i+=4 ) ++ { ++ if(j%4==1) DBG_871X("0x%02x",i); ++ DBG_871X(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_871X("\n"); ++ } ++ ++ i,j=1; ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_871X("\n======= RF REG =======\n"); ++ if(( RF_1T2R == rf_type ) ||( RF_1T1R ==rf_type )) ++ path_nums = 1; ++ else ++ path_nums = 2; ++ ++ for(path=0;pathlength]; ++ u32 valxcap; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_871X("%s:iwpriv in=%s\n", __func__, input); ++ ++ sscanf(input, "xcap=%d", &valxcap); ++ ++ if (!IS_HARDWARE_TYPE_8192D(padapter)) ++ return 0; ++#ifdef CONFIG_RTL8192D ++ Hal_ProSetCrystalCap( padapter , valxcap ); ++#endif ++ ++ sprintf( extra, "Set xcap=%d",valxcap ); ++ wrqu->length = strlen(extra) + 1; ++ ++return 0; ++ ++} ++ ++ ++/* update Tx AGC offset */ ++static int rtw_mp_antBdiff(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ ++ // MPT_ProSetTxAGCOffset ++ return 0; ++} ++ ++ ++static int rtw_mp_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ u32 subcmd = wrqu->flags; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (padapter == NULL) ++ { ++ return -ENETDOWN; ++ } ++ ++ //_rtw_memset(extra, 0x00, IW_PRIV_SIZE_MASK); ++ ++ if (extra == NULL) ++ { ++ wrqu->length = 0; ++ return -EIO; ++ } ++ ++ switch(subcmd) ++ { ++ case WRITE_REG : ++ rtw_mp_write_reg (dev,info,wrqu,extra); ++ break; ++ ++ case WRITE_RF: ++ rtw_mp_write_rf (dev,info,wrqu,extra); ++ break; ++ ++ case MP_START: ++ DBG_871X("set case mp_start \n"); ++ rtw_mp_start (dev,info,wrqu,extra); ++ break; ++ ++ case MP_STOP: ++ DBG_871X("set case mp_stop \n"); ++ rtw_mp_stop (dev,info,wrqu,extra); ++ break; ++ ++ case MP_BANDWIDTH: ++ DBG_871X("set case mp_bandwidth \n"); ++ rtw_mp_bandwidth (dev,info,wrqu,extra); ++ break; ++ ++ case MP_RESET_STATS: ++ DBG_871X("set case MP_RESET_STATS \n"); ++ rtw_mp_reset_stats (dev,info,wrqu,extra); ++ break; ++ ++ case EFUSE_SET: ++ DBG_871X("efuse set \n"); ++ rtw_mp_efuse_set (dev,info,wdata,extra); ++ break; ++ ++ } ++ ++ ++ return 0; ++} ++ ++ ++static int rtw_mp_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ u32 subcmd = wrqu->flags; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ //DBG_871X("in mp_get extra= %s \n",extra); ++ ++ if (padapter == NULL) ++ { ++ return -ENETDOWN; ++ } ++ if (extra == NULL) ++ { ++ wrqu->length = 0; ++ return -EIO; ++ } ++ ++ switch(subcmd) ++ { ++ case MP_PHYPARA: ++ DBG_871X("mp_get MP_PHYPARA \n"); ++ rtw_mp_phypara(dev,info,wrqu,extra); ++ break; ++ ++ case MP_CHANNEL: ++ DBG_871X("set case mp_channel \n"); ++ rtw_mp_channel (dev,info,wrqu,extra); ++ break; ++ ++ case READ_REG: ++ DBG_871X("mp_get READ_REG \n"); ++ rtw_mp_read_reg (dev,info,wrqu,extra); ++ break; ++ case READ_RF: ++ DBG_871X("mp_get READ_RF \n"); ++ rtw_mp_read_rf (dev,info,wrqu,extra); ++ break; ++ ++ case MP_RATE: ++ DBG_871X("set case mp_rate \n"); ++ rtw_mp_rate (dev,info,wrqu,extra); ++ break; ++ ++ case MP_TXPOWER: ++ DBG_871X("set case MP_TXPOWER \n"); ++ rtw_mp_txpower (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ANT_TX: ++ DBG_871X("set case MP_ANT_TX \n"); ++ rtw_mp_ant_tx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ANT_RX: ++ DBG_871X("set case MP_ANT_RX \n"); ++ rtw_mp_ant_rx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_QUERY: ++ DBG_871X("mp_get mp_query MP_QUERY \n"); ++ rtw_mp_trx_query(dev,info,wrqu,extra); ++ break; ++ ++ case MP_CTX: ++ DBG_871X("set case MP_CTX \n"); ++ rtw_mp_ctx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ARX: ++ DBG_871X("set case MP_ARX \n"); ++ rtw_mp_arx (dev,info,wrqu,extra); ++ break; ++ ++ case EFUSE_GET: ++ DBG_871X("efuse get EFUSE_GET \n"); ++ rtw_mp_efuse_get(dev,info,wdata,extra); ++ break; ++ ++ case MP_DUMP: ++ DBG_871X("set case MP_DUMP \n"); ++ rtw_mp_dump (dev,info,wrqu,extra); ++ break; ++ case MP_PSD: ++ DBG_871X("set case MP_PSD \n"); ++ rtw_mp_psd (dev,info,wrqu,extra); ++ break; ++ ++ case MP_THER: ++ DBG_871X("set case MP_THER \n"); ++ rtw_mp_thermal (dev,info,wrqu,extra); ++ break; ++ ++ case MP_PWRTRK: ++ DBG_871X("set case MP_PWRTRK \n"); ++ rtw_mp_pwrtrk (dev,info,wrqu,extra); ++ break; ++ } ++ ++return 0; ++} ++ ++#endif //#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++static int rtw_wfd_tdls_enable(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ if ( extra[ 0 ] == '0' ) ++ { ++ padapter->wdinfo.wfd_tdls_enable = 0; ++ } ++ else ++ { ++ padapter->wdinfo.wfd_tdls_enable = 1; ++ } ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_weaksec(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i, j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ if ( extra[ 0 ] == '0' ) ++ { ++ padapter->wdinfo.wfd_tdls_weaksec = 0; ++ } ++ else ++ { ++ padapter->wdinfo.wfd_tdls_weaksec = 1; ++ } ++#endif ++ ++ return ret; ++} ++ ++ ++static int rtw_tdls_enable(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ _irqL irqL; ++ _list *plist, *phead; ++ s32 index; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 tdls_sta[NUM_STA][ETH_ALEN]; ++ u8 empty_hwaddr[ETH_ALEN] = { 0x00 }; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ _rtw_memset(tdls_sta, 0x00, sizeof(tdls_sta)); ++ ++ if ( extra[ 0 ] == '0' ) ++ { ++ ptdlsinfo->enable = 0; ++ ++ if(pstapriv->asoc_sta_count==1) ++ return ret; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ for(index=0; index< NUM_STA; index++) ++ { ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); ++ ++ plist = get_next(plist); ++ ++ if(psta->tdls_sta_state != TDLS_STATE_NONE) ++ { ++ _rtw_memcpy(tdls_sta[index], psta->hwaddr, ETH_ALEN); ++ } ++ } ++ } ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(index=0; index< NUM_STA; index++) ++ { ++ if( !_rtw_memcmp(tdls_sta[index], empty_hwaddr, ETH_ALEN) ) ++ { ++ printk("issue tear down to "MAC_FMT"\n", MAC_ARG(tdls_sta[index])); ++ issue_tdls_teardown(padapter, tdls_sta[index]); ++ } ++ } ++ rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); ++ rtw_reset_tdls_info(padapter); ++ } ++ else if ( extra[ 0 ] == '1' ) ++ { ++ ptdlsinfo->enable = 1; ++ } ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_setup(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i, j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 mac_addr[ETH_ALEN]; ++ ++#ifdef CONFIG_WFD ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif // CONFIG_WFD ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++#ifdef CONFIG_WFD ++ if ( _AES_ != padapter->securitypriv.dot11PrivacyAlgrthm ) ++ { ++ // Weak Security situation with AP. ++ if ( 0 == pwdinfo->wfd_tdls_weaksec ) ++ { ++ // Can't send the tdls setup request out!! ++ DBG_871X( "[%s] Current link is not AES, SKIP sending the tdls setup request!!\n", __FUNCTION__ ); ++ } ++ else ++ { ++ issue_tdls_setup_req(padapter, mac_addr); ++ } ++ } ++ else ++#endif // CONFIG_WFD ++ { ++ issue_tdls_setup_req(padapter, mac_addr); ++ } ++#endif ++ ++ return ret; ++} ++ ++static int rtw_tdls_teardown(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i,j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_info *ptdls_sta = NULL; ++ u8 mac_addr[ETH_ALEN]; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), mac_addr); ++ ++ if(ptdls_sta != NULL) ++ { ++ ptdls_sta->stat_code = _RSON_TDLS_TEAR_UN_RSN_; ++ issue_tdls_teardown(padapter, mac_addr); ++ } ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_discovery(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ issue_tdls_dis_req(padapter, NULL); ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_ch_switch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ if( ptdls_sta == NULL ) ++ return ret; ++ ptdlsinfo->ch_sensing=1; ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_INIT_CH_SEN); ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_pson(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 1); ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_psoff(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0); ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_setip(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; ++ u8 i=0, j=0, k=0, tag=0, ip[3] = { 0xff }, *ptr = extra; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length - 1 ); ++ ++ ++ while( i < 4 ) ++ { ++ for( j=0; j < 4; j++) ++ { ++ if( *( extra + j + tag ) == '.' || *( extra + j + tag ) == '\0' ) ++ { ++ if( j == 1 ) ++ pwfd_info->ip_address[i]=convert_ip_addr( '0', '0', *(extra+(j-1)+tag)); ++ if( j == 2 ) ++ pwfd_info->ip_address[i]=convert_ip_addr( '0', *(extra+(j-2)+tag), *(extra+(j-1)+tag)); ++ if( j == 3 ) ++ pwfd_info->ip_address[i]=convert_ip_addr( *(extra+(j-3)+tag), *(extra+(j-2)+tag), *(extra+(j-1)+tag)); ++ ++ tag += j + 1; ++ break; ++ } ++ } ++ i++; ++ } ++ ++ printk( "[%s] Set IP = %u.%u.%u.%u \n", __FUNCTION__, ++ ptdlsinfo->wfd_info->ip_address[0], ptdlsinfo->wfd_info->ip_address[1], ++ ptdlsinfo->wfd_info->ip_address[2], ptdlsinfo->wfd_info->ip_address[3] ++ ); ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_getip(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; ++ ++ printk( "[%s]\n", __FUNCTION__); ++ ++ sprintf( extra, "\n\n%u.%u.%u.%u\n", ++ pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], ++ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] ++ ); ++ ++ printk( "[%s] IP=%u.%u.%u.%u\n", __FUNCTION__, ++ pwfd_info->peer_ip_address[0], pwfd_info->peer_ip_address[1], ++ pwfd_info->peer_ip_address[2], pwfd_info->peer_ip_address[3] ++ ); ++ ++ wrqu->data.length = strlen( extra ); ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls_getport(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; ++ ++ printk( "[%s]\n", __FUNCTION__); ++ ++ sprintf( extra, "\n\n%d\n", pwfd_info->peer_rtsp_ctrlport ); ++ printk( "[%s] remote port = %d\n", __FUNCTION__, pwfd_info->peer_rtsp_ctrlport ); ++ ++ wrqu->data.length = strlen( extra ); ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++ ++} ++ ++//WFDTDLS, for sigma test ++static int rtw_tdls_dis_result(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; ++ ++ printk( "[%s]\n", __FUNCTION__); ++ ++ if(ptdlsinfo->dev_discovered == 1 ) ++ { ++ sprintf( extra, "\n\nDis=1\n" ); ++ ptdlsinfo->dev_discovered = 0; ++ } ++ ++ wrqu->data.length = strlen( extra ); ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++ ++} ++ ++//WFDTDLS, for sigma test ++static int rtw_wfd_tdls_status(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_WFD ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct wifi_display_info *pwfd_info = ptdlsinfo->wfd_info; ++ ++ printk( "[%s]\n", __FUNCTION__); ++ ++ if(ptdlsinfo->setup_state == TDLS_LINKED_STATE ) ++ { ++ sprintf( extra, "\n\nStatus=1\n" ); ++ } ++ else ++ { ++ sprintf( extra, "\n\nStatus=0\n" ); ++ } ++ ++ wrqu->data.length = strlen( extra ); ++ ++#endif //CONFIG_WFD ++#endif //CONFIG_TDLS ++ ++ return ret; ++ ++} ++ ++static int rtw_tdls_ch_switch_off(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ printk( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ ptdls_sta->tdls_sta_state |= TDLS_SW_OFF_STATE; ++/* ++ if((ptdls_sta->tdls_sta_state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE)){ ++ pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel; ++ issue_tdls_ch_switch_req(padapter, mac_addr); ++ DBG_871X("issue tdls ch switch req back to base channel\n"); ++ } ++*/ ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++static int rtw_tdls(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ printk( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ // WFD Sigma will use the tdls enable command to let the driver know we want to test the tdls now! ++ if ( _rtw_memcmp( extra, "wfdenable=", 10 ) ) ++ { ++ wrqu->data.length -=10; ++ rtw_wfd_tdls_enable( dev, info, wrqu, &extra[10] ); ++ return ret; ++ } ++ else if ( _rtw_memcmp( extra, "weaksec=", 8 ) ) ++ { ++ wrqu->data.length -=8; ++ rtw_tdls_weaksec( dev, info, wrqu, &extra[8] ); ++ return ret; ++ } ++ else if ( _rtw_memcmp( extra, "tdlsenable=", 11 ) ) ++ { ++ wrqu->data.length -=11; ++ rtw_tdls_enable( dev, info, wrqu, &extra[11] ); ++ return ret; ++ } ++ ++ if( padapter->tdlsinfo.enable == 0 ) ++ { ++ printk("tdls haven't enabled\n"); ++ return 0; ++ } ++ ++ if ( _rtw_memcmp( extra, "setup=", 6 ) ) ++ { ++ wrqu->data.length -=6; ++ rtw_tdls_setup( dev, info, wrqu, &extra[6] ); ++ } ++ else if (_rtw_memcmp( extra, "tear=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_tdls_teardown( dev, info, wrqu, &extra[5] ); ++ } ++ else if (_rtw_memcmp( extra, "dis=", 4 ) ) ++ { ++ wrqu->data.length -= 4; ++ rtw_tdls_discovery( dev, info, wrqu, &extra[4] ); ++ } ++ else if (_rtw_memcmp( extra, "sw=", 3 ) ) ++ { ++ wrqu->data.length -= 3; ++ rtw_tdls_ch_switch( dev, info, wrqu, &extra[3] ); ++ } ++ else if (_rtw_memcmp( extra, "swoff=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_tdls_ch_switch_off( dev, info, wrqu, &extra[6] ); ++ } ++ else if (_rtw_memcmp( extra, "pson=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_tdls_pson( dev, info, wrqu, &extra[5] ); ++ } ++ else if (_rtw_memcmp( extra, "psoff=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_tdls_psoff( dev, info, wrqu, &extra[6] ); ++ } ++#ifdef CONFIG_WFD ++ else if (_rtw_memcmp( extra, "setip=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_tdls_setip( dev, info, wrqu, &extra[6] ); ++ } ++ else if (_rtw_memcmp( extra, "tprobe=", 6 ) ) ++ { ++ issue_tunneled_probe_req((_adapter *)rtw_netdev_priv(dev)); ++ } ++#endif //CONFIG_WFD ++ ++#endif //CONFIG_TDLS ++ ++ return ret; ++} ++ ++ ++static int rtw_tdls_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_WFD ++ ++ DBG_871X( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); ++ ++ if ( _rtw_memcmp( wrqu->data.pointer, "ip", 2 ) ) ++ { ++ rtw_tdls_getip( dev, info, wrqu, extra ); ++ } ++ if ( _rtw_memcmp( wrqu->data.pointer, "port", 4 ) ) ++ { ++ rtw_tdls_getport( dev, info, wrqu, extra ); ++ } ++ ++ //WFDTDLS, for sigma test ++ if ( _rtw_memcmp( wrqu->data.pointer, "dis", 3 ) ) ++ { ++ rtw_tdls_dis_result( dev, info, wrqu, extra ); ++ } ++ if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) ++ { ++ rtw_wfd_tdls_status( dev, info, wrqu, extra ); ++ } ++ ++#endif //CONFIG_WFD ++ ++ return ret; ++} ++ ++static int rtw_pm_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ unsigned mode = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_871X( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ ++ if ( _rtw_memcmp( extra, "lps=", 4 ) ) ++ { ++ sscanf(extra+4, "%u", &mode); ++ ret = rtw_pm_set_lps(padapter,mode); ++ } ++ else if ( _rtw_memcmp( extra, "ips=", 4 ) ) ++ { ++ sscanf(extra+4, "%u", &mode); ++ ret = rtw_pm_set_ips(padapter,mode); ++ } ++ else{ ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++#ifdef CONFIG_WOWLAN ++static int rtw_wowlan_ctrl(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ struct oid_par_priv oid_par; ++ struct wowlan_ioctl_param *poidparam; ++ uint status=0; ++ u16 len; ++ u8 *pparmbuf = NULL, bset; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ struct iw_point *p = &wrqu->data; ++ ++ //DBG_871X("+rtw_wowlan_ctrl\n"); ++ ++ //mutex_lock(&ioctl_mutex); ++ ++ if ((!p->length) || (!p->pointer)) { ++ ret = -EINVAL; ++ goto _rtw_wowlan_ctrl_exit; ++ } ++ ++ pparmbuf = NULL; ++ bset = (u8)(p->flags & 0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_wowlan_ctrl_exit; ++ } ++ ++ if (copy_from_user(pparmbuf, p->pointer, len)) { ++ ret = -EFAULT; ++ goto _rtw_wowlan_ctrl_exit_free; ++ } ++ poidparam = (struct wowlan_ioctl_param *)pparmbuf; ++ ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup==_FALSE){ ++ ret = -EPERM; ++ DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); ++ goto _rtw_wowlan_ctrl_exit_free; ++ } ++ rtw_hal_set_hwreg(padapter,HW_VAR_WOWLAN,(u8 *)poidparam); ++ ++ DBG_871X("rtw_wowlan_ctrl: subcode [%d], len[%d], buffer_len[%d]\r\n", ++ poidparam->subcode, poidparam->len, len); ++ ++ if (copy_to_user(p->pointer, pparmbuf, len)) { ++ ret = -EFAULT; ++ } ++ ++ ++_rtw_wowlan_ctrl_exit_free: ++ //DBG_871X("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam->subcode); ++ rtw_mfree(pparmbuf, len); ++_rtw_wowlan_ctrl_exit: ++ ++ ++ return ret; ++} ++#endif //CONFIG_WOWLAN ++ ++#ifdef CONFIG_INTEL_WIDI ++static int rtw_widi_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ process_intel_widi_cmd(padapter, extra); ++ ++ return ret; ++} ++ ++static int rtw_widi_set_probe_request(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ u8 *pbuf = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ pbuf = rtw_malloc(sizeof(l2_msg_t)); ++ if(pbuf) ++ { ++ copy_from_user(pbuf, wrqu->data.pointer, wrqu->data.length); ++ //_rtw_memcpy(pbuf, wrqu->data.pointer, wrqu->data.length); ++ ++ if( wrqu->data.flags == 0 ) ++ intel_widi_wk_cmd(padapter, INTEL_WIDI_ISSUE_PROB_WK, pbuf); ++ else if( wrqu->data.flags == 1 ) ++ rtw_set_wfd_rds_sink_info( padapter, (l2_msg_t *)pbuf ); ++ } ++ return ret; ++} ++ ++#endif // CONFIG_INTEL_WIDI ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++#include ++ ++static s32 initLoopback(PADAPTER padapter) ++{ ++ PLOOPBACKDATA ploopback; ++ ++ ++ if (padapter->ploopback == NULL) { ++ ploopback = (PLOOPBACKDATA)rtw_zmalloc(sizeof(LOOPBACKDATA)); ++ if (ploopback == NULL) return -ENOMEM; ++ ++ _rtw_init_sema(&ploopback->sema, 0); ++ ++ ploopback->bstop = _TRUE; ++ ploopback->cnt = 0; ++ ploopback->size = 300; ++ _rtw_memset(ploopback->msg, 0, sizeof(ploopback->msg)); ++ ++ padapter->ploopback = ploopback; ++ } ++ ++ return 0; ++} ++ ++static void freeLoopback(PADAPTER padapter) ++{ ++ PLOOPBACKDATA ploopback; ++ ++ ++ ploopback = padapter->ploopback; ++ if (ploopback) { ++ rtw_mfree((u8*)ploopback, sizeof(LOOPBACKDATA)); ++ padapter->ploopback = NULL; ++ } ++} ++ ++static s32 initpseudoadhoc(PADAPTER padapter) ++{ ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType; ++ s32 err; ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++ networkType = Ndis802_11IBSS; ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _enter_critical_bh(&queue->lock, &irqL); ++ err = rtw_set_802_11_infrastructure_mode(padapter, networkType); ++ _exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ if (err == _FALSE) return _FAIL; ++ ++ err = rtw_setopmode_cmd(padapter, networkType); ++ if (err == _FAIL) return _FAIL; ++ ++ return _SUCCESS; ++} ++ ++static s32 createpseudoadhoc(PADAPTER padapter) ++{ ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ struct mlme_priv *pmlmepriv; ++ NDIS_802_11_SSID *passoc_ssid; ++ WLAN_BSSID_EX *pdev_network; ++ u8 *pibss; ++ u8 ssid[] = "pseduo_ad-hoc"; ++ s32 err; ++ _irqL irqL; ++ ++ ++ pmlmepriv = &padapter->mlmepriv; ++ ++ authmode = Ndis802_11AuthModeOpen; ++ err = rtw_set_802_11_authentication_mode(padapter, authmode); ++ if (err == _FALSE) return _FAIL; ++ ++ passoc_ssid = &pmlmepriv->assoc_ssid; ++ _rtw_memset(passoc_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ passoc_ssid->SsidLength = sizeof(ssid) - 1; ++ _rtw_memcpy(passoc_ssid->Ssid, ssid, passoc_ssid->SsidLength); ++ ++ pdev_network = &padapter->registrypriv.dev_network; ++ pibss = padapter->registrypriv.dev_network.MacAddress; ++ _rtw_memcpy(&pdev_network->Ssid, passoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(padapter); ++ rtw_generate_random_ibss(pibss); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++#if 0 ++ err = rtw_createbss_cmd(padapter); ++ if (err == _FAIL) return _FAIL; ++#else ++{ ++ struct wlan_network *pcur_network; ++ struct sta_info *psta; ++ ++ //3 create a new psta ++ pcur_network = &pmlmepriv->cur_network; ++ ++ //clear psta in the cur_network, if any ++ psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); ++ if (psta) rtw_free_stainfo(padapter, psta); ++ ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pibss); ++ if (psta == NULL) return _FAIL; ++ ++ //3 join psudo AdHoc ++ pcur_network->join_res = 1; ++ pcur_network->aid = psta->aid = 1; ++ _rtw_memcpy(&pcur_network->network, pdev_network, get_WLAN_BSSID_EX_sz(pdev_network)); ++ ++ // set msr to WIFI_FW_ADHOC_STATE ++#if 0 ++ Set_NETYPE0_MSR(padapter, WIFI_FW_ADHOC_STATE); ++#else ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(padapter, MSR); ++ val8 &= 0xFC; // clear NETYPE0 ++ val8 |= WIFI_FW_ADHOC_STATE & 0x3; ++ rtw_write8(padapter, MSR, val8); ++ } ++#endif ++} ++#endif ++ ++ return _SUCCESS; ++} ++ ++extern void rtl8723a_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++extern void rtl8723a_fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf); ++ ++static struct xmit_frame* createloopbackpkt(PADAPTER padapter, u32 size) ++{ ++ struct xmit_priv *pxmitpriv; ++ struct xmit_frame *pframe; ++ struct xmit_buf *pxmitbuf; ++ struct pkt_attrib *pattrib; ++ struct tx_desc *desc; ++ u8 *pkt_start, *pkt_end, *ptr; ++ struct rtw_ieee80211_hdr *hdr; ++ s32 bmcast; ++ _irqL irqL; ++ ++ ++ if ((TXDESC_SIZE + WLANHDR_OFFSET + size) > MAX_XMITBUF_SZ) return NULL; ++ ++ pxmitpriv = &padapter->xmitpriv; ++ pframe = NULL; ++ ++ //2 1. allocate xmit frame ++ pframe = rtw_alloc_xmitframe(pxmitpriv); ++ if (pframe == NULL) return NULL; ++ pframe->padapter = padapter; ++ ++ //2 2. allocate xmit buffer ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ if (pxmitbuf == NULL) { ++ rtw_free_xmitframe(pxmitpriv, pframe); ++ return NULL; ++ } ++ ++ pframe->pxmitbuf = pxmitbuf; ++ pframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pframe; ++ ++ //2 3. update_attrib() ++ pattrib = &pframe->attrib; ++ ++ // init xmitframe attribute ++ _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); ++ ++ pattrib->ether_type = 0x8723; ++ _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++// pattrib->pctrl = 0; ++// pattrib->dhcp_pkt = 0; ++// pattrib->pktlen = 0; ++ pattrib->ack_policy = 0; ++// pattrib->pkt_hdrlen = ETH_HLEN; ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA; ++ pattrib->priority = 0; ++ pattrib->qsel = pattrib->priority; ++// do_queue_select(padapter, pattrib); ++ pattrib->nr_frags = 1; ++ pattrib->encrypt = 0; ++ pattrib->bswenc = _FALSE; ++ pattrib->qos_en = _FALSE; ++ ++ bmcast = IS_MCAST(pattrib->ra); ++ if (bmcast) { ++ pattrib->mac_id = 1; ++ pattrib->psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ pattrib->mac_id = 0; ++ pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); ++ } ++ ++ pattrib->pktlen = size; ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; ++ ++ //2 4. fill TX descriptor ++ desc = (struct tx_desc*)pframe->buf_addr; ++ _rtw_memset(desc, 0, TXDESC_SIZE); ++ ++ rtl8723a_fill_default_txdesc(pframe, (u8*)desc); ++ ++ // Hw set sequence number ++ ((PTXDESC)desc)->hwseq_en = 0; // HWSEQ_EN, 0:disable, 1:enable ++// ((PTXDESC)desc)->hwseq_sel = 0; // HWSEQ_SEL ++ ++ ((PTXDESC)desc)->disdatafb = 1; ++ ++ // convert to little endian ++ desc->txdw0 = cpu_to_le32(desc->txdw0); ++ desc->txdw1 = cpu_to_le32(desc->txdw1); ++ desc->txdw2 = cpu_to_le32(desc->txdw2); ++ desc->txdw3 = cpu_to_le32(desc->txdw3); ++ desc->txdw4 = cpu_to_le32(desc->txdw4); ++ desc->txdw5 = cpu_to_le32(desc->txdw5); ++ desc->txdw6 = cpu_to_le32(desc->txdw6); ++ desc->txdw7 = cpu_to_le32(desc->txdw7); ++#ifdef CONFIG_PCI_HCI ++ desc->txdw8 = cpu_to_le32(desc->txdw8); ++ desc->txdw9 = cpu_to_le32(desc->txdw9); ++ desc->txdw10 = cpu_to_le32(desc->txdw10); ++ desc->txdw11 = cpu_to_le32(desc->txdw11); ++ desc->txdw12 = cpu_to_le32(desc->txdw12); ++ desc->txdw13 = cpu_to_le32(desc->txdw13); ++ desc->txdw14 = cpu_to_le32(desc->txdw14); ++ desc->txdw15 = cpu_to_le32(desc->txdw15); ++#endif ++ ++ rtl8723a_cal_txdesc_chksum(desc); ++ ++ //2 5. coalesce ++ pkt_start = pframe->buf_addr + TXDESC_SIZE; ++ pkt_end = pkt_start + pattrib->last_txcmdsz; ++ ++ //3 5.1. make wlan header, make_wlanhdr() ++ hdr = (struct rtw_ieee80211_hdr *)pkt_start; ++ SetFrameSubType(&hdr->frame_ctl, pattrib->subtype); ++ _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA ++ _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA ++ _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID ++ ++ //3 5.2. make payload ++ ptr = pkt_start + pattrib->hdrlen; ++ get_random_bytes(ptr, pkt_end - ptr); ++ ++ pxmitbuf->len = TXDESC_SIZE + pattrib->last_txcmdsz; ++ pxmitbuf->ptail += pxmitbuf->len; ++ ++ return pframe; ++} ++ ++static void freeloopbackpkt(PADAPTER padapter, struct xmit_frame *pframe) ++{ ++ struct xmit_priv *pxmitpriv; ++ struct xmit_buf *pxmitbuf; ++ ++ ++ pxmitpriv = &padapter->xmitpriv; ++ pxmitbuf = pframe->pxmitbuf; ++ ++ rtw_free_xmitframe(pxmitpriv, pframe); ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++} ++ ++extern u32 get_txfifo_hwaddr(struct xmit_frame *pxmitframe); ++ ++thread_return lbk_thread(thread_context context) ++{ ++ s32 err; ++ PADAPTER padapter; ++ PLOOPBACKDATA ploopback; ++ struct xmit_frame *pxmitframe; ++ u32 cnt, ok, fail, i, headerlen; ++ u32 pktsize; ++ u32 ff_hwaddr; ++ ++ ++ padapter = (PADAPTER)context; ++ ploopback = padapter->ploopback; ++ if (ploopback == NULL) return -1; ++ cnt = 0; ++ ok = 0; ++ fail = 0; ++ ++ daemonize("%s", "RTW_LBK_THREAD"); ++ allow_signal(SIGTERM); ++ ++ do { ++ if (ploopback->size == 0) { ++ get_random_bytes(&pktsize, 4); ++ pktsize = (pktsize % 1535) + 1; // 1~1535 ++ } else ++ pktsize = ploopback->size; ++ ++ pxmitframe = createloopbackpkt(padapter, pktsize); ++ if (pxmitframe == NULL) { ++ sprintf(ploopback->msg, "loopback FAIL! 3. create Packet FAIL!"); ++ break; ++ } ++ ++ ploopback->txsize = TXDESC_SIZE + pxmitframe->attrib.last_txcmdsz; ++ _rtw_memcpy(ploopback->txbuf, pxmitframe->buf_addr, ploopback->txsize); ++ ++ ff_hwaddr = get_txfifo_hwaddr(pxmitframe); ++ rtw_write_port(padapter, ff_hwaddr, ploopback->txsize, ploopback->txbuf); ++ cnt++; ++ ++ _rtw_down_sema(&ploopback->sema); ++ ++{ ++ PHAL_DATA_TYPE phal; ++ struct recv_stat *prxstat; ++ struct recv_stat report; ++ PRXREPORT prxreport; ++ u32 drvinfosize; ++ u32 rxpktsize; ++ u8 fcssize; ++ ++ prxstat = (struct recv_stat*)ploopback->rxbuf; ++ report.rxdw0 = le32_to_cpu(prxstat->rxdw0); ++ report.rxdw1 = le32_to_cpu(prxstat->rxdw1); ++ report.rxdw2 = le32_to_cpu(prxstat->rxdw2); ++ report.rxdw3 = le32_to_cpu(prxstat->rxdw3); ++ report.rxdw4 = le32_to_cpu(prxstat->rxdw4); ++ report.rxdw5 = le32_to_cpu(prxstat->rxdw5); ++ ++ prxreport = (PRXREPORT)&report; ++ drvinfosize = prxreport->drvinfosize << 3; ++ rxpktsize = prxreport->pktlen; ++ ++ phal = GET_HAL_DATA(padapter); ++ if (phal->ReceiveConfig & RCR_APPFCS) fcssize = IEEE80211_FCS_LEN; ++ else fcssize = 0; ++ ++ if ((ploopback->txsize - TXDESC_SIZE) != (rxpktsize - fcssize)) { ++ printk("%s: cnt=%d, size not match! tx=%d rx=%d\n", ++ __func__, i, ploopback->txsize - TXDESC_SIZE, ++ rxpktsize - fcssize); ++ err = _FALSE; ++ } else { ++ err = _rtw_memcmp(ploopback->txbuf + TXDESC_SIZE,\ ++ ploopback->rxbuf + RXDESC_SIZE + drvinfosize,\ ++ ploopback->txsize - TXDESC_SIZE); ++ } ++} ++ ++ if (err == _TRUE) ++ ok++; ++ else ++ fail++; ++ ++ ploopback->txsize = 0; ++ _rtw_memset(ploopback->txbuf, 0, 0x8000); ++ ploopback->rxsize = 0; ++ _rtw_memset(ploopback->rxbuf, 0, 0x8000); ++ ++ freeloopbackpkt(padapter, pxmitframe); ++ pxmitframe = NULL; ++ ++ if (signal_pending(current)) { ++ flush_signals(current); ++ } ++ ++ if ((ploopback->bstop == _TRUE) || ++ ((ploopback->cnt != 0) && (ploopback->cnt == cnt))) ++ { ++ u32 ok_rate, fail_rate; ++ ok_rate = (ok*100)/cnt; ++ fail_rate = (fail*100)/cnt; ++ sprintf(ploopback->msg, "loopback result: ok=%d%%(%d/%d),error=%d%%(%d/%d)", ok_rate, ok, cnt, fail_rate, fail, cnt); ++ break; ++ } ++ } while (1); ++ ++ ploopback->bstop = _TRUE; ++ ++ thread_exit(); ++} ++ ++static void loopbackTest(PADAPTER padapter, u32 cnt, u32 size, u8* pmsg) ++{ ++ PLOOPBACKDATA ploopback; ++ u32 len; ++ s32 err; ++ ++ ++ ploopback = padapter->ploopback; ++ ++ if (ploopback) ++ { ++ ploopback->bstop = _TRUE; ++ len = 0; ++ do { ++ len = strlen(ploopback->msg); ++ if (len) break; ++ rtw_msleep_os(1); ++ } while (1); ++ _rtw_memcpy(pmsg, ploopback->msg, len+1); ++ freeLoopback(padapter); ++ return; ++ } ++ ++ // create pseudo ad-hoc connection ++ err = initpseudoadhoc(padapter); ++ if (err == _FAIL) { ++ sprintf(pmsg, "loopback FAIL! 1.1 init ad-hoc FAIL!"); ++ return; ++ } ++ ++ err = createpseudoadhoc(padapter); ++ if (err == _FAIL) { ++ sprintf(pmsg, "loopback FAIL! 1.2 create ad-hoc master FAIL!"); ++ return; ++ } ++ ++ err = initLoopback(padapter); ++ if (err) { ++ sprintf(pmsg, "loopback FAIL! 2. init FAIL! error code=%d", err); ++ return; ++ } ++ ++ ploopback = padapter->ploopback; ++ ++ ploopback->bstop = _FALSE; ++ ploopback->cnt = cnt; ++ ploopback->size = size; ++ ploopback->lbkthread = kthread_run(lbk_thread, padapter, "RTW_LBK_THREAD"); ++ if (IS_ERR(padapter->lbkthread)) ++ { ++ freeLoopback(padapter); ++ sprintf(pmsg, "loopback start FAIL! cnt=%d", cnt); ++ return; ++ } ++ ++ sprintf(pmsg, "loopback start! cnt=%d", cnt); ++} ++ ++extern u8 _InitPowerOn(PADAPTER padapter); ++extern s32 rtl8723a_FirmwareDownload(PADAPTER padapter); ++ ++static int rtw_test( ++ struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ u32 len; ++ u8 *pbuf, *pch; ++ char *ptmp; ++ u8 *delim = ","; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ printk("+%s\n", __func__); ++ len = wrqu->data.length; ++ ++ pbuf = (u8*)rtw_zmalloc(len); ++ if (pbuf == NULL) { ++ printk("%s: no memory!\n", __func__); ++ return -ENOMEM; ++ } ++ ++ if (copy_from_user(pbuf, wrqu->data.pointer, len)) { ++ rtw_mfree(pbuf, len); ++ printk("%s: copy from user fail!\n", __func__); ++ return -EFAULT; ++ } ++ printk("%s: string=\"%s\"\n", __func__, pbuf); ++ ++ ptmp = (char*)pbuf; ++ pch = strsep(&ptmp, delim); ++ if ((pch == NULL) || (strlen(pch) == 0)) { ++ rtw_mfree(pbuf, len); ++ printk("%s: parameter error(level 1)!\n", __func__); ++ return -EFAULT; ++ } ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++ if (strcmp(pch, "loopback") == 0) ++ { ++ s32 cnt = 0; ++ u32 size = 64; ++ ++ pch = strsep(&ptmp, delim); ++ if ((pch == NULL) || (strlen(pch) == 0)) { ++ rtw_mfree(pbuf, len); ++ printk("%s: parameter error(level 2)!\n", __func__); ++ return -EFAULT; ++ } ++ ++ sscanf(pch, "%d", &cnt); ++ printk("%s: loopback cnt=%d\n", __func__, cnt); ++ ++ pch = strsep(&ptmp, delim); ++ if ((pch == NULL) || (strlen(pch) == 0)) { ++ rtw_mfree(pbuf, len); ++ printk("%s: parameter error(level 2)!\n", __func__); ++ return -EFAULT; ++ } ++ ++ sscanf(pch, "%d", &size); ++ printk("%s: loopback size=%d\n", __func__, size); ++ ++ loopbackTest(padapter, cnt, size, extra); ++ wrqu->data.length = strlen(extra) + 1; ++ ++ rtw_mfree(pbuf, len); ++ return 0; ++ } ++#endif ++ ++ if (strcmp(pch, "poweron") == 0) ++ { ++ s32 ret; ++ ++ ret = _InitPowerOn(padapter); ++ if (_FAIL == ret) ++ printk("%s: power on FAIL!\n", __func__); ++ else ++ printk("%s: power on OK.\n", __func__); ++ ++ rtw_mfree(pbuf, len); ++ return 0; ++ } ++ ++ if (strcmp(pch, "dlfw") == 0) ++ { ++ s32 ret; ++ ++ ret = rtl8723a_FirmwareDownload(padapter); ++ if (_FAIL == ret) ++ printk("%s: download FW FAIL!\n", __func__); ++ else ++ printk("%s: download FW OK.\n", __func__); ++ ++ rtw_mfree(pbuf, len); ++ return 0; ++ } ++ ++ rtw_mfree(pbuf, len); ++ return 0; ++} ++#else ++static int rtw_test( ++ struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ printk("%s\n", __func__); ++ return 0; ++} ++#endif //RTL8723A_SDIO_LOOPBACK ++ ++#include ++int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ++{ ++ struct iwreq *wrq = (struct iwreq *)rq; ++ int ret=0; ++ ++ switch (cmd) ++ { ++ case RTL_IOCTL_WPA_SUPPLICANT: ++ ret = wpa_supplicant_ioctl(dev, &wrq->u.data); ++ break; ++#ifdef CONFIG_AP_MODE ++ case RTL_IOCTL_HOSTAPD: ++ ret = rtw_hostapd_ioctl(dev, &wrq->u.data); ++ break; ++#ifdef CONFIG_NO_WIRELESS_HANDLERS ++ case SIOCSIWMODE: ++ ret = rtw_wx_set_mode(dev, NULL, &wrq->u, NULL); ++ break; ++#endif ++#endif ++ case (SIOCDEVPRIVATE+1): ++ ret = rtw_android_priv_cmd(dev, rq, cmd); ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ break; ++ } ++ ++ return ret; ++} ++ ++static iw_handler rtw_handlers[] = ++{ ++ NULL, /* SIOCSIWCOMMIT */ ++ rtw_wx_get_name, /* SIOCGIWNAME */ ++ dummy, /* SIOCSIWNWID */ ++ dummy, /* SIOCGIWNWID */ ++ rtw_wx_set_freq, /* SIOCSIWFREQ */ ++ rtw_wx_get_freq, /* SIOCGIWFREQ */ ++ rtw_wx_set_mode, /* SIOCSIWMODE */ ++ rtw_wx_get_mode, /* SIOCGIWMODE */ ++ dummy, /* SIOCSIWSENS */ ++ rtw_wx_get_sens, /* SIOCGIWSENS */ ++ NULL, /* SIOCSIWRANGE */ ++ rtw_wx_get_range, /* SIOCGIWRANGE */ ++ rtw_wx_set_priv, /* SIOCSIWPRIV */ ++ NULL, /* SIOCGIWPRIV */ ++ NULL, /* SIOCSIWSTATS */ ++ NULL, /* SIOCGIWSTATS */ ++ dummy, /* SIOCSIWSPY */ ++ dummy, /* SIOCGIWSPY */ ++ NULL, /* SIOCGIWTHRSPY */ ++ NULL, /* SIOCWIWTHRSPY */ ++ rtw_wx_set_wap, /* SIOCSIWAP */ ++ rtw_wx_get_wap, /* SIOCGIWAP */ ++ rtw_wx_set_mlme, /* request MLME operation; uses struct iw_mlme */ ++ dummy, /* SIOCGIWAPLIST -- depricated */ ++ rtw_wx_set_scan, /* SIOCSIWSCAN */ ++ rtw_wx_get_scan, /* SIOCGIWSCAN */ ++ rtw_wx_set_essid, /* SIOCSIWESSID */ ++ rtw_wx_get_essid, /* SIOCGIWESSID */ ++ dummy, /* SIOCSIWNICKN */ ++ rtw_wx_get_nick, /* SIOCGIWNICKN */ ++ NULL, /* -- hole -- */ ++ NULL, /* -- hole -- */ ++ rtw_wx_set_rate, /* SIOCSIWRATE */ ++ rtw_wx_get_rate, /* SIOCGIWRATE */ ++ rtw_wx_set_rts, /* SIOCSIWRTS */ ++ rtw_wx_get_rts, /* SIOCGIWRTS */ ++ rtw_wx_set_frag, /* SIOCSIWFRAG */ ++ rtw_wx_get_frag, /* SIOCGIWFRAG */ ++ dummy, /* SIOCSIWTXPOW */ ++ dummy, /* SIOCGIWTXPOW */ ++ dummy, /* SIOCSIWRETRY */ ++ rtw_wx_get_retry, /* SIOCGIWRETRY */ ++ rtw_wx_set_enc, /* SIOCSIWENCODE */ ++ rtw_wx_get_enc, /* SIOCGIWENCODE */ ++ dummy, /* SIOCSIWPOWER */ ++ rtw_wx_get_power, /* SIOCGIWPOWER */ ++ NULL, /*---hole---*/ ++ NULL, /*---hole---*/ ++ rtw_wx_set_gen_ie, /* SIOCSIWGENIE */ ++ NULL, /* SIOCGWGENIE */ ++ rtw_wx_set_auth, /* SIOCSIWAUTH */ ++ NULL, /* SIOCGIWAUTH */ ++ rtw_wx_set_enc_ext, /* SIOCSIWENCODEEXT */ ++ NULL, /* SIOCGIWENCODEEXT */ ++ rtw_wx_set_pmkid, /* SIOCSIWPMKSA */ ++ NULL, /*---hole---*/ ++}; ++ ++#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++static const struct iw_priv_args rtw_private_args[] = ++{ ++ { SIOCIWFIRSTPRIV + 0x00, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, //set ++ { SIOCIWFIRSTPRIV + 0x01, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},//get ++/* --- sub-ioctls definitions --- */ ++ { MP_START , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_start" }, //set ++ { MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },//get ++ { MP_STOP , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_stop" }, //set ++ { MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },//get ++ { MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_bandwidth"}, //set ++ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },//get ++ { MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_reset_stats"}, ++ { MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, //get ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { WRITE_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_reg" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { WRITE_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_rf" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"}, ++ { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ant_rx"}, ++ { MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"}, ++ { EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, 0, "efuse_set" }, ++ { EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" }, ++ { MP_NULL , IW_PRIV_TYPE_CHAR | 1024, 0, "NULL"}, ++ { MP_PWRTRK, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_pwrtrk" }, ++ { MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, // mp_ioctl ++ ++ ++ { SIOCIWFIRSTPRIV + 0x02, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "test"},//set ++}; ++ ++ ++static iw_handler rtw_private_handler[] = ++{ ++ rtw_mp_set, ++ rtw_mp_get, ++}; ++ ++#else // not inlucde MP ++ ++static const struct iw_priv_args rtw_private_args[] = { ++ { ++ SIOCIWFIRSTPRIV + 0x0, ++ IW_PRIV_TYPE_CHAR | 0x7FF, 0, "write" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x1, ++ IW_PRIV_TYPE_CHAR | 0x7FF, ++ IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "read" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x3, 0, 0, "mp_ioctl" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x4, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x5, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setpid" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x6, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start" ++ }, ++//for PLATFORM_MT53XX ++ { ++ SIOCIWFIRSTPRIV + 0x7, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x8, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x9, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie" ++ }, ++ ++//for RTK_DMP_PLATFORM ++ { ++ SIOCIWFIRSTPRIV + 0xA, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan" ++ }, ++ ++ { ++ SIOCIWFIRSTPRIV + 0xB, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "dbg" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0xC, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "rfw" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0xD, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rfr" ++ }, ++#ifdef CONFIG_WOWLAN ++ { ++ SIOCIWFIRSTPRIV + 0xE,0,0, "wowlan_ctrl" ++ }, ++#endif // CONFIG_WOWLAN ++ { ++ SIOCIWFIRSTPRIV + 0x10, ++ IW_PRIV_TYPE_CHAR | 1024, 0, "p2p_set" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x11, ++ IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "p2p_get" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x12, 0, 0, "NULL" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x13, ++ IW_PRIV_TYPE_CHAR | 64, IW_PRIV_TYPE_CHAR | 64 , "p2p_get2" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x14, ++ IW_PRIV_TYPE_CHAR | 64, 0, "tdls" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x15, ++ IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | P2P_PRIVATE_IOCTL_SET_LEN , "tdls_get" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x16, ++ IW_PRIV_TYPE_CHAR | 64, 0, "pm_set" ++ }, ++ ++ {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ , 0 , "rereg_nd_name"}, ++ ++ {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 128, 0, "efuse_set"}, ++ {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR |IW_PRIV_SIZE_FIXED |0x700 ,"efuse_get"}, ++ { ++ SIOCIWFIRSTPRIV + 0x1D, ++ IW_PRIV_TYPE_CHAR | 40, IW_PRIV_TYPE_CHAR | 0x7FF, "test" ++ }, ++#ifdef CONFIG_INTEL_WIDI ++ { ++ SIOCIWFIRSTPRIV + 0x1E, ++ IW_PRIV_TYPE_CHAR | 1024, 0, "widi_set" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x1F, ++ IW_PRIV_TYPE_CHAR | 128, 0, "widi_prob_req" ++ }, ++#endif // CONFIG_INTEL_WIDI ++}; ++ ++static iw_handler rtw_private_handler[] = ++{ ++ rtw_wx_write32, //0x00 ++ rtw_wx_read32, //0x01 ++ rtw_drvext_hdl, //0x02 ++ rtw_mp_ioctl_hdl, //0x03 ++ ++// for MM DTV platform ++ rtw_get_ap_info, //0x04 ++ ++ rtw_set_pid, //0x05 ++ rtw_wps_start, //0x06 ++ ++// for PLATFORM_MT53XX ++ rtw_wx_get_sensitivity, //0x07 ++ rtw_wx_set_mtk_wps_probe_ie, //0x08 ++ rtw_wx_set_mtk_wps_ie, //0x09 ++ ++// for RTK_DMP_PLATFORM ++// Set Channel depend on the country code ++ rtw_wx_set_channel_plan, //0x0A ++ ++ rtw_dbg_port, //0x0B ++ rtw_wx_write_rf, //0x0C ++ rtw_wx_read_rf, //0x0D ++ ++#ifdef CONFIG_WOWLAN ++ rtw_wowlan_ctrl, //0x0E ++#else ++ rtw_wx_priv_null, //0x0E ++#endif //CONFIG_WOWLAN ++ rtw_wx_priv_null, //0x0F ++ ++ rtw_p2p_set, //0x10 ++ rtw_p2p_get, //0x11 ++ NULL, //0x12 ++ rtw_p2p_get2, //0x13 ++ ++ rtw_tdls, //0x14 ++ rtw_tdls_get, //0x15 ++ ++ rtw_pm_set, //0x16 ++ rtw_wx_priv_null, //0x17 ++ rtw_rereg_nd_name, //0x18 ++ rtw_wx_priv_null, //0x19 ++ ++ rtw_mp_efuse_set, //0x1A ++ rtw_mp_efuse_get, //0x1B ++ NULL, // 0x1C is reserved for hostapd ++ rtw_test , // 0x1D ++#ifdef CONFIG_INTEL_WIDI ++ rtw_widi_set, //0x1E ++ rtw_widi_set_probe_request, //0x1F ++#endif // CONFIG_INTEL_WIDI ++}; ++ ++#endif // #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++#if WIRELESS_EXT >= 17 ++static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_statistics *piwstats=&padapter->iwstats; ++ int tmp_level = 0; ++ int tmp_qual = 0; ++ int tmp_noise = 0; ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) != _TRUE) ++ { ++ piwstats->qual.qual = 0; ++ piwstats->qual.level = 0; ++ piwstats->qual.noise = 0; ++ //DBG_871X("No link level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise); ++ } ++ else{ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ #else ++ tmp_level = padapter->recvpriv.signal_strength; ++ #endif ++ ++ tmp_qual = padapter->recvpriv.signal_qual; ++ tmp_noise =padapter->recvpriv.noise; ++ //DBG_871X("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); ++ ++ piwstats->qual.level = tmp_level; ++ piwstats->qual.qual = tmp_qual; ++ piwstats->qual.noise = tmp_noise; ++ } ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)) ++ piwstats->qual.updated = IW_QUAL_ALL_UPDATED ;//|IW_QUAL_DBM; ++#else ++#ifdef RTK_DMP_PLATFORM ++ //IW_QUAL_DBM= 0x8, if driver use this flag, wireless extension will show value of dbm. ++ //remove this flag for show percentage 0~100 ++ piwstats->qual.updated = 0x07; ++#else ++ piwstats->qual.updated = 0x0f; ++#endif ++#endif ++ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ piwstats->qual.updated = piwstats->qual.updated | IW_QUAL_DBM; ++ #endif ++ ++ return &padapter->iwstats; ++} ++#endif ++ ++#ifdef CONFIG_WIRELESS_EXT ++struct iw_handler_def rtw_handlers_def = ++{ ++ .standard = rtw_handlers, ++ .num_standard = sizeof(rtw_handlers) / sizeof(iw_handler), ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)) || defined(CONFIG_WEXT_PRIV) ++ .private = rtw_private_handler, ++ .private_args = (struct iw_priv_args *)rtw_private_args, ++ .num_private = sizeof(rtw_private_handler) / sizeof(iw_handler), ++ .num_private_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args), ++#endif ++#if WIRELESS_EXT >= 17 ++ .get_wireless_stats = rtw_get_wireless_stats, ++#endif ++}; ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/mlme_linux.c +@@ -0,0 +1,653 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _MLME_OSDEP_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef RTK_DMP_PLATFORM ++void Linkup_workitem_callback(struct work_struct *work) ++{ ++ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkup_workitem); ++ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkup_workitem_callback\n")); ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKUP); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKUP); ++#endif ++ ++_func_exit_; ++} ++ ++void Linkdown_workitem_callback(struct work_struct *work) ++{ ++ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkdown_workitem); ++ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkdown_workitem_callback\n")); ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKDOWN); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKDOWN); ++#endif ++ ++_func_exit_; ++} ++#endif ++ ++ ++/* ++void sitesurvey_ctrl_handler(void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ ++ _sitesurvey_ctrl_handler(adapter); ++ ++ _set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer, 3000); ++} ++*/ ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void rtw_join_timeout_handler(void *FunctionContext) ++#else ++void rtw_join_timeout_handler(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, mlmepriv.assoc_timer); ++#endif ++ ++ _rtw_join_timeout_handler(adapter); ++} ++ ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void _rtw_scan_timeout_handler(void *FunctionContext) ++#else ++void _rtw_scan_timeout_handler(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, mlmepriv.scan_to_timer); ++#endif ++ rtw_scan_timeout_handler(adapter); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void _dynamic_check_timer_handlder(void *FunctionContext) ++#else ++static void _dynamic_check_timer_handlder(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, mlmepriv.dynamic_chk_timer); ++#endif ++ rtw_dynamic_check_timer_handlder(adapter); ++ ++ _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000); ++} ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void _rtw_set_scan_deny_timer_hdl(void *FunctionContext) ++#else ++void _rtw_set_scan_deny_timer_hdl(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *adapter = (_adapter *)FunctionContext; ++#else ++ _adapter *adapter = from_timer(adapter, t, mlmepriv.set_scan_deny_timer); ++#endif ++ rtw_set_scan_deny_timer_hdl(adapter); ++} ++#endif ++ ++ ++void rtw_init_mlme_timer(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, rtw_join_timeout_handler, padapter); ++ _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter); ++ _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, _dynamic_check_timer_handlder, padapter); ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _init_timer(&(pmlmepriv->set_scan_deny_timer), padapter->pnetdev, _rtw_set_scan_deny_timer_hdl, padapter); ++ #endif ++#else ++ timer_setup(&pmlmepriv->assoc_timer, rtw_join_timeout_handler, 0); ++ timer_setup(&pmlmepriv->scan_to_timer, _rtw_scan_timeout_handler, 0); ++ timer_setup(&pmlmepriv->dynamic_chk_timer, _dynamic_check_timer_handlder, 0); ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ timer_setup(&pmlmepriv->set_scan_deny_timer, _rtw_set_scan_deny_timer_hdl, 0); ++ #endif ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ _init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter); ++ _init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter); ++#endif ++ ++} ++ ++extern void rtw_indicate_wx_assoc_event(_adapter *padapter); ++extern void rtw_indicate_wx_disassoc_event(_adapter *padapter); ++ ++void rtw_os_indicate_connect(_adapter *adapter) ++{ ++ ++_func_enter_; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_connect(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_indicate_wx_assoc_event(adapter); ++ netif_carrier_on(adapter->pnetdev); ++ ++ if(adapter->pid[2] !=0) ++ rtw_signal_process(adapter->pid[2], SIGALRM); ++ ++#ifdef RTK_DMP_PLATFORM ++ _set_workitem(&adapter->mlmepriv.Linkup_workitem); ++#endif ++ ++_func_exit_; ++ ++} ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted) ++{ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), aborted); ++#endif ++ indicate_wx_scan_complete_event(padapter); ++} ++ ++static RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; ++void rtw_reset_securitypriv( _adapter *adapter ) ++{ ++ u8 backupPMKIDIndex = 0; ++ u8 backupTKIPCountermeasure = 0x00; ++ u32 backupTKIPcountermeasure_time = 0; ++ // add for CONFIG_IEEE80211W, none 11w also can use ++ _irqL irqL; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ _enter_critical_bh(&adapter->security_key_mutex, &irqL); ++ ++ if(adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)//802.1x ++ { ++ // Added by Albert 2009/02/18 ++ // We have to backup the PMK information for WiFi PMK Caching test item. ++ // ++ // Backup the btkip_countermeasure information. ++ // When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. ++ ++ _rtw_memset( &backupPMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ ++ _rtw_memcpy( &backupPMKIDList[ 0 ], &adapter->securitypriv.PMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ backupPMKIDIndex = adapter->securitypriv.PMKIDIndex; ++ backupTKIPCountermeasure = adapter->securitypriv.btkip_countermeasure; ++ backupTKIPcountermeasure_time = adapter->securitypriv.btkip_countermeasure_time; ++#ifdef CONFIG_IEEE80211W ++ //reset RX BIP packet number ++ pmlmeext->mgnt_80211w_IPN_rx = 0; ++#endif //CONFIG_IEEE80211W ++ _rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof (struct security_priv)); ++ //_init_timer(&(adapter->securitypriv.tkip_timer),adapter->pnetdev, rtw_use_tkipkey_handler, adapter); ++ ++ // Added by Albert 2009/02/18 ++ // Restore the PMK information to securitypriv structure for the following connection. ++ _rtw_memcpy( &adapter->securitypriv.PMKIDList[ 0 ], &backupPMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ adapter->securitypriv.PMKIDIndex = backupPMKIDIndex; ++ adapter->securitypriv.btkip_countermeasure = backupTKIPCountermeasure; ++ adapter->securitypriv.btkip_countermeasure_time = backupTKIPcountermeasure_time; ++ ++ adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ } ++ else //reset values in securitypriv ++ { ++ //if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE) ++ //{ ++ struct security_priv *psec_priv=&adapter->securitypriv; ++ ++ psec_priv->dot11AuthAlgrthm =dot11AuthAlgrthm_Open; //open system ++ psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psec_priv->dot11PrivacyKeyIndex = 0; ++ ++ psec_priv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psec_priv->dot118021XGrpKeyid = 1; ++ ++ psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; ++ psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; ++ //} ++ } ++ // add for CONFIG_IEEE80211W, none 11w also can use ++ _exit_critical_bh(&adapter->security_key_mutex, &irqL); ++} ++ ++void rtw_os_indicate_disconnect( _adapter *adapter ) ++{ ++ //RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; ++ ++_func_enter_; ++ ++ netif_carrier_off(adapter->pnetdev); // Do it first for tx broadcast pkt after disconnection issue! ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_disconnect(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_indicate_wx_disassoc_event(adapter); ++ ++#ifdef RTK_DMP_PLATFORM ++ _set_workitem(&adapter->mlmepriv.Linkdown_workitem); ++#endif ++ //modify for CONFIG_IEEE80211W, none 11w also can use the same command ++ rtw_reset_securitypriv_cmd(adapter); ++ ++_func_exit_; ++ ++} ++ ++void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie) ++{ ++ uint len; ++ u8 *buff,*p,i; ++ union iwreq_data wrqu; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+rtw_report_sec_ie, authmode=%d\n", authmode)); ++ ++ buff = NULL; ++ if(authmode==_WPA_IE_ID_) ++ { ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("rtw_report_sec_ie, authmode=%d\n", authmode)); ++ ++ buff = rtw_malloc(IW_CUSTOM_MAX); ++ ++ _rtw_memset(buff,0,IW_CUSTOM_MAX); ++ ++ p=buff; ++ ++ p+=sprintf(p,"ASSOCINFO(ReqIEs="); ++ ++ len = sec_ie[1]+2; ++ len = (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX; ++ ++ for(i=0;ipnetdev,IWEVCUSTOM,&wrqu,buff); ++ ++ if(buff) ++ rtw_mfree(buff, IW_CUSTOM_MAX); ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void _survey_timer_hdl(void *FunctionContext) ++#else ++static void _survey_timer_hdl(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *padapter = (_adapter *)FunctionContext; ++#else ++ _adapter *padapter = from_timer(padapter, t, mlmeextpriv.survey_timer); ++#endif ++ survey_timer_hdl(padapter); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void _link_timer_hdl (void *FunctionContext) ++#else ++static void _link_timer_hdl(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *padapter = (_adapter *)FunctionContext; ++#else ++ _adapter *padapter = from_timer(padapter, t, mlmeextpriv.link_timer); ++#endif ++ link_timer_hdl(padapter); ++} ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++static void _addba_timer_hdl(void *FunctionContext) ++#else ++static void _addba_timer_hdl(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ struct sta_info *psta = (struct sta_info *)FunctionContext; ++#else ++ struct sta_info *psta = from_timer(psta, t, addba_retry_timer); ++#endif ++ addba_timer_hdl(psta); ++} ++ ++#ifdef CONFIG_IEEE80211W ++void _sa_query_timer_hdl (void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ sa_query_timer_hdl(padapter); ++} ++#endif //CONFIG_IEEE80211W ++ ++void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta) ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&psta->addba_retry_timer, padapter->pnetdev, _addba_timer_hdl, psta); ++#else ++ timer_setup(&psta->addba_retry_timer, _addba_timer_hdl, 0); ++#endif ++} ++ ++/* ++void _reauth_timer_hdl(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ reauth_timer_hdl(padapter); ++} ++ ++void _reassoc_timer_hdl(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ reassoc_timer_hdl(padapter); ++} ++*/ ++ ++void init_mlme_ext_timer(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter); ++ _init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter); ++#else ++ timer_setup(&pmlmeext->survey_timer, _survey_timer_hdl, 0); ++ timer_setup(&pmlmeext->link_timer, _link_timer_hdl, 0); ++#endif ++#ifdef CONFIG_IEEE80211W ++ _init_timer(&pmlmeext->sa_query_timer, padapter->pnetdev, _sa_query_timer_hdl, padapter); ++#endif //CONFIG_IEEE80211W ++ //_init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter); ++ ++ //_init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter); ++ //_init_timer(&pmlmeext->reassoc_timer, padapter->pnetdev, _reassoc_timer_hdl, padapter); ++} ++ ++#ifdef CONFIG_AP_MODE ++ ++void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta) ++{ ++ union iwreq_data wrqu; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(psta==NULL) ++ return; ++ ++ if(psta->aid > NUM_STA) ++ return; ++ ++ if(pstapriv->sta_aid[psta->aid - 1] != psta) ++ return; ++ ++ ++ wrqu.addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); ++ ++ DBG_871X("+rtw_indicate_sta_assoc_event\n"); ++ ++ wireless_send_event(padapter->pnetdev, IWEVREGISTERED, &wrqu, NULL); ++ ++} ++ ++void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta) ++{ ++ union iwreq_data wrqu; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(psta==NULL) ++ return; ++ ++ if(psta->aid > NUM_STA) ++ return; ++ ++ if(pstapriv->sta_aid[psta->aid - 1] != psta) ++ return; ++ ++ ++ wrqu.addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); ++ ++ DBG_871X("+rtw_indicate_sta_disassoc_event\n"); ++ ++ wireless_send_event(padapter->pnetdev, IWEVEXPIRED, &wrqu, NULL); ++ ++} ++ ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ ++static int mgnt_xmit_entry(struct sk_buff *skb, struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ _adapter *padapter = (_adapter *)phostapdpriv->padapter; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ return rtw_hal_hostap_mgnt_xmit_entry(padapter, skb); ++} ++ ++static int mgnt_netdev_open(struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ ++ DBG_871X("mgnt_netdev_open: MAC Address:" MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ init_usb_anchor(&phostapdpriv->anchored); ++ ++ if(!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_start_queue(pnetdev); ++ else ++ rtw_netif_wake_queue(pnetdev); ++ ++ ++ netif_carrier_on(pnetdev); ++ ++ //rtw_write16(phostapdpriv->padapter, 0x0116, 0x0100);//only excluding beacon ++ ++ return 0; ++} ++static int mgnt_netdev_close(struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ usb_kill_anchored_urbs(&phostapdpriv->anchored); ++ ++ netif_carrier_off(pnetdev); ++ ++ if (!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_stop_queue(pnetdev); ++ ++ //rtw_write16(phostapdpriv->padapter, 0x0116, 0x3f3f); ++ ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtl871x_mgnt_netdev_ops = { ++ .ndo_open = mgnt_netdev_open, ++ .ndo_stop = mgnt_netdev_close, ++ .ndo_start_xmit = mgnt_xmit_entry, ++ //.ndo_set_mac_address = r871x_net_set_mac_address, ++ //.ndo_get_stats = r871x_net_get_stats, ++ //.ndo_do_ioctl = r871x_mp_ioctl, ++}; ++#endif ++ ++int hostapd_mode_init(_adapter *padapter) ++{ ++ unsigned char mac[ETH_ALEN]; ++ struct hostapd_priv *phostapdpriv; ++ struct net_device *pnetdev; ++ ++ pnetdev = rtw_alloc_etherdev(sizeof(struct hostapd_priv)); ++ if (!pnetdev) ++ return -ENOMEM; ++ ++ //SET_MODULE_OWNER(pnetdev); ++ ether_setup(pnetdev); ++ ++ //pnetdev->type = ARPHRD_IEEE80211; ++ ++ phostapdpriv = rtw_netdev_priv(pnetdev); ++ phostapdpriv->pmgnt_netdev = pnetdev; ++ phostapdpriv->padapter= padapter; ++ padapter->phostapdpriv = phostapdpriv; ++ ++ //pnetdev->init = NULL; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ ++ DBG_871X("register rtl871x_mgnt_netdev_ops to netdev_ops\n"); ++ ++ pnetdev->netdev_ops = &rtl871x_mgnt_netdev_ops; ++ ++#else ++ ++ pnetdev->open = mgnt_netdev_open; ++ ++ pnetdev->stop = mgnt_netdev_close; ++ ++ pnetdev->hard_start_xmit = mgnt_xmit_entry; ++ ++ //pnetdev->set_mac_address = r871x_net_set_mac_address; ++ ++ //pnetdev->get_stats = r871x_net_get_stats; ++ ++ //pnetdev->do_ioctl = r871x_mp_ioctl; ++ ++#endif ++ ++ pnetdev->watchdog_timeo = HZ; /* 1 second timeout */ ++ ++ //pnetdev->wireless_handlers = NULL; ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ pnetdev->features |= NETIF_F_IP_CSUM; ++#endif ++ ++ ++ ++ if(dev_alloc_name(pnetdev,"mgnt.wlan%d") < 0) ++ { ++ DBG_871X("hostapd_mode_init(): dev_alloc_name, fail! \n"); ++ } ++ ++ ++ //SET_NETDEV_DEV(pnetdev, pintfpriv->udev); ++ ++ ++ mac[0]=0x00; ++ mac[1]=0xe0; ++ mac[2]=0x4c; ++ mac[3]=0x87; ++ mac[4]=0x11; ++ mac[5]=0x12; ++ ++ _rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN); ++ ++ ++ netif_carrier_off(pnetdev); ++ ++ ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) ++ { ++ DBG_871X("hostapd_mode_init(): register_netdev fail!\n"); ++ ++ if(pnetdev) ++ { ++ rtw_free_netdev(pnetdev); ++ } ++ } ++ ++ return 0; ++ ++} ++ ++void hostapd_mode_unload(_adapter *padapter) ++{ ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pnetdev = phostapdpriv->pmgnt_netdev; ++ ++ unregister_netdev(pnetdev); ++ rtw_free_netdev(pnetdev); ++ ++} ++ ++#endif ++#endif ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/os_intfs.c +@@ -0,0 +1,2768 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _OS_INTFS_C_ ++ ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++#ifdef CONFIG_BR_EXT ++#include ++#endif //CONFIG_BR_EXT ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); ++MODULE_AUTHOR("Realtek Semiconductor Corp."); ++MODULE_VERSION(DRIVERVERSION); ++ ++/* module param defaults */ ++int rtw_chip_version = 0x00; ++int rtw_rfintfs = HWPI; ++int rtw_lbkmode = 0;//RTL8712_AIR_TRX; ++ ++ ++int rtw_network_mode = Ndis802_11IBSS;//Ndis802_11Infrastructure;//infra, ad-hoc, auto ++//NDIS_802_11_SSID ssid; ++int rtw_channel = 1;//ad-hoc support requirement ++int rtw_wireless_mode = WIRELESS_11BG_24N; ++int rtw_vrtl_carrier_sense = AUTO_VCS; ++int rtw_vcs_type = RTS_CTS;//* ++int rtw_rts_thresh = 2347;//* ++int rtw_frag_thresh = 2346;//* ++int rtw_preamble = PREAMBLE_LONG;//long, short, auto ++int rtw_scan_mode = 1;//active, passive ++int rtw_adhoc_tx_pwr = 1; ++int rtw_soft_ap = 0; ++//int smart_ps = 1; ++#ifdef CONFIG_POWER_SAVING ++int rtw_power_mgnt = 1; ++#ifdef CONFIG_IPS_LEVEL_2 ++int rtw_ips_mode = IPS_LEVEL_2; ++#else ++int rtw_ips_mode = IPS_NORMAL; ++#endif ++#else ++int rtw_power_mgnt = PS_MODE_ACTIVE; ++int rtw_ips_mode = IPS_NONE; ++#endif ++module_param(rtw_ips_mode, int, 0644); ++MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode"); ++ ++int rtw_radio_enable = 1; ++int rtw_long_retry_lmt = 7; ++int rtw_short_retry_lmt = 7; ++int rtw_busy_thresh = 40; ++//int qos_enable = 0; //* ++int rtw_ack_policy = NORMAL_ACK; ++#ifdef CONFIG_MP_INCLUDED ++int rtw_mp_mode = 1; ++#else ++int rtw_mp_mode = 0; ++#endif ++int rtw_software_encrypt = 0; ++int rtw_software_decrypt = 0; ++ ++int rtw_acm_method = 0;// 0:By SW 1:By HW. ++ ++int rtw_wmm_enable = 1;// default is set to enable the wmm. ++int rtw_uapsd_enable = 0; ++int rtw_uapsd_max_sp = NO_LIMIT; ++int rtw_uapsd_acbk_en = 0; ++int rtw_uapsd_acbe_en = 0; ++int rtw_uapsd_acvi_en = 0; ++int rtw_uapsd_acvo_en = 0; ++ ++#ifdef CONFIG_80211N_HT ++int rtw_ht_enable = 1; ++int rtw_cbw40_enable = 3; // 0 :diable, bit(0): enable 2.4g, bit(1): enable 5g ++int rtw_ampdu_enable = 1;//for enable tx_ampdu ++int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ ++int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto ++#endif ++ ++int rtw_lowrate_two_xmit = 1;//Use 2 path Tx to transmit MCS0~7 and legacy mode ++ ++//int rf_config = RF_1T2R; // 1T2R ++int rtw_rf_config = RF_819X_MAX_TYPE; //auto ++int rtw_low_power = 0; ++#ifdef CONFIG_WIFI_TEST ++int rtw_wifi_spec = 1;//for wifi test ++#else ++int rtw_wifi_spec = 0; ++#endif ++ ++int rtw_special_rf_path = 0; //0: 2T2R ,1: only turn on path A 1T1R, 2: only turn on path B 1T1R ++ ++int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; ++ ++#ifdef CONFIG_BT_COEXIST ++int rtw_bt_iso = 2;// 0:Low, 1:High, 2:From Efuse ++int rtw_bt_sco = 3;// 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy ++int rtw_bt_ampdu =1 ;// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++#endif ++int rtw_AcceptAddbaReq = _TRUE;// 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. ++ ++int rtw_antdiv_cfg = 2; // 0:OFF , 1:ON, 2:decide by Efuse config ++ ++#ifdef CONFIG_USB_AUTOSUSPEND ++int rtw_enusbss = 1;//0:disable,1:enable ++#else ++int rtw_enusbss = 0;//0:disable,1:enable ++#endif ++ ++int rtw_hwpdn_mode=2;//0:disable,1:enable,2: by EFUSE config ++ ++#ifdef CONFIG_HW_PWRP_DETECTION ++int rtw_hwpwrp_detect = 1; ++#else ++int rtw_hwpwrp_detect = 0; //HW power ping detect 0:disable , 1:enable ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtw_hw_wps_pbc = 1; ++#else ++int rtw_hw_wps_pbc = 0; ++#endif ++ ++#ifdef CONFIG_TX_MCAST2UNI ++int rtw_mc2u_disable = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++int rtw_mac_phy_mode = 0; //0:by efuse, 1:smsp, 2:dmdp, 3:dmsp. ++ ++#ifdef CONFIG_80211D ++int rtw_80211d = 0; ++#endif ++ ++char* ifname = "wlan%d"; ++module_param(ifname, charp, 0644); ++MODULE_PARM_DESC(ifname, "The default name to allocate for first interface"); ++ ++char* if2name = "wlan%d"; ++module_param(if2name, charp, 0644); ++MODULE_PARM_DESC(if2name, "The default name to allocate for second interface"); ++ ++char* rtw_initmac = 0; // temp mac address if users want to use instead of the mac address in Efuse ++ ++#ifdef CONFIG_MULTI_VIR_IFACES ++int rtw_ext_iface_num = 1;//primary/secondary iface is excluded ++module_param(rtw_ext_iface_num, int, 0644); ++#endif //CONFIG_MULTI_VIR_IFACES ++ ++module_param(rtw_initmac, charp, 0644); ++module_param(rtw_channel_plan, int, 0644); ++module_param(rtw_chip_version, int, 0644); ++module_param(rtw_rfintfs, int, 0644); ++module_param(rtw_lbkmode, int, 0644); ++module_param(rtw_network_mode, int, 0644); ++module_param(rtw_channel, int, 0644); ++module_param(rtw_mp_mode, int, 0644); ++module_param(rtw_wmm_enable, int, 0644); ++module_param(rtw_vrtl_carrier_sense, int, 0644); ++module_param(rtw_vcs_type, int, 0644); ++module_param(rtw_busy_thresh, int, 0644); ++#ifdef CONFIG_80211N_HT ++module_param(rtw_ht_enable, int, 0644); ++module_param(rtw_cbw40_enable, int, 0644); ++module_param(rtw_ampdu_enable, int, 0644); ++module_param(rtw_rx_stbc, int, 0644); ++module_param(rtw_ampdu_amsdu, int, 0644); ++#endif ++ ++module_param(rtw_lowrate_two_xmit, int, 0644); ++ ++module_param(rtw_rf_config, int, 0644); ++module_param(rtw_power_mgnt, int, 0644); ++module_param(rtw_low_power, int, 0644); ++module_param(rtw_wifi_spec, int, 0644); ++ ++module_param(rtw_special_rf_path, int, 0644); ++ ++module_param(rtw_antdiv_cfg, int, 0644); ++ ++ ++module_param(rtw_enusbss, int, 0644); ++module_param(rtw_hwpdn_mode, int, 0644); ++module_param(rtw_hwpwrp_detect, int, 0644); ++ ++module_param(rtw_hw_wps_pbc, int, 0644); ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache"; ++module_param(rtw_adaptor_info_caching_file_path, charp, 0644); ++MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file"); ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++ ++#ifdef CONFIG_LAYER2_ROAMING ++uint rtw_max_roaming_times=2; ++module_param(rtw_max_roaming_times, uint, 0644); ++MODULE_PARM_DESC(rtw_max_roaming_times,"The max roaming times to try"); ++#endif //CONFIG_LAYER2_ROAMING ++ ++#ifdef CONFIG_IOL ++bool rtw_force_iol=_FALSE; ++module_param(rtw_force_iol, bool, 0644); ++MODULE_PARM_DESC(rtw_force_iol,"Force to enable IOL"); ++#endif //CONFIG_IOL ++ ++#ifdef CONFIG_FILE_FWIMG ++char *rtw_fw_file_path= ""; ++module_param(rtw_fw_file_path, charp, 0644); ++MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image"); ++#endif //CONFIG_FILE_FWIMG ++ ++#ifdef CONFIG_TX_MCAST2UNI ++module_param(rtw_mc2u_disable, int, 0644); ++#endif // CONFIG_TX_MCAST2UNI ++ ++module_param(rtw_mac_phy_mode, int, 0644); ++ ++#ifdef CONFIG_80211D ++module_param(rtw_80211d, int, 0644); ++#endif ++ ++uint rtw_notch_filter = RTW_NOTCH_FILTER; ++module_param(rtw_notch_filter, uint, 0644); ++MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P"); ++ ++static uint loadparam( _adapter *padapter, _nic_hdl pnetdev); ++int _netdev_open(struct net_device *pnetdev); ++int netdev_open (struct net_device *pnetdev); ++static int netdev_close (struct net_device *pnetdev); ++ ++//#ifdef RTK_DMP_PLATFORM ++#ifdef CONFIG_PROC_DEBUG ++#define RTL8192C_PROC_NAME "rtl819xC" ++#define RTL8192D_PROC_NAME "rtl819xD" ++static char rtw_proc_name[IFNAMSIZ]; ++static struct proc_dir_entry *rtw_proc = NULL; ++static int rtw_proc_cnt = 0; ++ ++#define RTW_PROC_NAME DRV_NAME ++ ++void rtw_proc_init_one(struct net_device *dev) ++{ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)) ++ struct proc_dir_entry *dir_dev = NULL; ++ struct proc_dir_entry *entry=NULL; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ u8 rf_type; ++ ++ if(rtw_proc == NULL) ++ { ++ if(padapter->chip_type == RTL8188C_8192C) ++ { ++ _rtw_memcpy(rtw_proc_name, RTL8192C_PROC_NAME, sizeof(RTL8192C_PROC_NAME)); ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++ _rtw_memcpy(rtw_proc_name, RTL8192D_PROC_NAME, sizeof(RTL8192D_PROC_NAME)); ++ } ++ else if(padapter->chip_type == RTL8723A) ++ { ++ _rtw_memcpy(rtw_proc_name, RTW_PROC_NAME, sizeof(RTW_PROC_NAME)); ++ } ++ else if(padapter->chip_type == RTL8188E) ++ { ++ _rtw_memcpy(rtw_proc_name, RTW_PROC_NAME, sizeof(RTW_PROC_NAME)); ++ } ++ else ++ { ++ _rtw_memcpy(rtw_proc_name, RTW_PROC_NAME, sizeof(RTW_PROC_NAME)); ++ } ++ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, proc_net); ++#else ++ rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, init_net.proc_net); ++#endif ++ if (rtw_proc == NULL) { ++ DBG_871X(KERN_ERR "Unable to create rtw_proc directory\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ver_info", S_IFREG | S_IRUGO, rtw_proc, proc_get_drv_version, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("log_level", S_IFREG | S_IRUGO, ++ rtw_proc, proc_get_log_level, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_log_level; ++ ++#ifdef DBG_MEM_ALLOC ++ entry = create_proc_read_entry("mstat", S_IFREG | S_IRUGO, ++ rtw_proc, proc_get_mstat, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif /* DBG_MEM_ALLOC */ ++ } ++ ++ ++ ++ if(padapter->dir_dev == NULL) ++ { ++ padapter->dir_dev = create_proc_entry(dev->name, ++ S_IFDIR | S_IRUGO | S_IXUGO, ++ rtw_proc); ++ ++ dir_dev = padapter->dir_dev; ++ ++ if(dir_dev==NULL) ++ { ++ if(rtw_proc_cnt == 0) ++ { ++ if(rtw_proc){ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ remove_proc_entry(rtw_proc_name, proc_net); ++#else ++ remove_proc_entry(rtw_proc_name, init_net.proc_net); ++#endif ++ rtw_proc = NULL; ++ } ++ } ++ ++ DBG_871X("Unable to create dir_dev directory\n"); ++ return; ++ } ++ } ++ else ++ { ++ return; ++ } ++ ++ rtw_proc_cnt++; ++ ++ entry = create_proc_read_entry("write_reg", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_write_reg, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_write_reg; ++ ++ entry = create_proc_read_entry("read_reg", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_read_reg, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_read_reg; ++ ++ ++ entry = create_proc_read_entry("fwstate", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_fwstate, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("sec_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_sec_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("mlmext_state", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_mlmext_state, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("qos_option", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_qos_option, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ht_option", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ht_option, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rf_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ap_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ap_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("adapter_state", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_adapter_state, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("trx_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_trx_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("mac_reg_dump1", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_mac_reg_dump1, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("mac_reg_dump2", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_mac_reg_dump2, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("mac_reg_dump3", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_mac_reg_dump3, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("bb_reg_dump1", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_bb_reg_dump1, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("bb_reg_dump2", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_bb_reg_dump2, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("bb_reg_dump3", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_bb_reg_dump3, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rf_reg_dump1", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_reg_dump1, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rf_reg_dump2", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_reg_dump2, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type )) { ++ entry = create_proc_read_entry("rf_reg_dump3", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_reg_dump3, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rf_reg_dump4", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_reg_dump4, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ } ++ ++#ifdef CONFIG_AP_MODE ++ ++ entry = create_proc_read_entry("all_sta_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_all_sta_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ entry = create_proc_read_entry("_malloc_cnt", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_malloc_cnt, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ entry = create_proc_read_entry("best_channel", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_best_channel, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_best_channel; ++#endif ++ ++ entry = create_proc_read_entry("rx_signal", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rx_signal, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_rx_signal; ++ ++ entry = create_proc_read_entry("ht_enable", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ht_enable, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_ht_enable; ++ ++ entry = create_proc_read_entry("cbw40_enable", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_cbw40_enable, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_cbw40_enable; ++ ++ entry = create_proc_read_entry("ampdu_enable", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ampdu_enable, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_ampdu_enable; ++ ++ entry = create_proc_read_entry("rx_stbc", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rx_stbc, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_rx_stbc; ++ ++ ++ entry = create_proc_read_entry("path_rssi", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_two_path_rssi, dev); ++ ++ entry = create_proc_read_entry("vid", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_vid, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("pid", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_pid, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rssi_disp", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rssi_disp, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_rssi_disp; ++ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ entry = create_proc_read_entry("sreset", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_sreset, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_sreset; ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ entry = create_proc_read_entry("dm_adaptivity", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_dm_adaptivity, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_dm_adaptivity; ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ ++#else /* kernel version < 3.10 */ ++ DBG_871X(KERN_ERR "Unable to create /proc entry in this kernel version\n"); ++#endif ++} ++ ++void rtw_proc_remove_one(struct net_device *dev) ++{ ++ struct proc_dir_entry *dir_dev = NULL; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ u8 rf_type; ++ ++ dir_dev = padapter->dir_dev; ++ padapter->dir_dev = NULL; ++ ++ if (dir_dev) { ++ ++ remove_proc_entry("write_reg", dir_dev); ++ remove_proc_entry("read_reg", dir_dev); ++ remove_proc_entry("fwstate", dir_dev); ++ remove_proc_entry("sec_info", dir_dev); ++ remove_proc_entry("mlmext_state", dir_dev); ++ remove_proc_entry("qos_option", dir_dev); ++ remove_proc_entry("ht_option", dir_dev); ++ remove_proc_entry("rf_info", dir_dev); ++ remove_proc_entry("ap_info", dir_dev); ++ remove_proc_entry("adapter_state", dir_dev); ++ remove_proc_entry("trx_info", dir_dev); ++ ++ remove_proc_entry("mac_reg_dump1", dir_dev); ++ remove_proc_entry("mac_reg_dump2", dir_dev); ++ remove_proc_entry("mac_reg_dump3", dir_dev); ++ remove_proc_entry("bb_reg_dump1", dir_dev); ++ remove_proc_entry("bb_reg_dump2", dir_dev); ++ remove_proc_entry("bb_reg_dump3", dir_dev); ++ remove_proc_entry("rf_reg_dump1", dir_dev); ++ remove_proc_entry("rf_reg_dump2", dir_dev); ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type )) { ++ remove_proc_entry("rf_reg_dump3", dir_dev); ++ remove_proc_entry("rf_reg_dump4", dir_dev); ++ } ++#ifdef CONFIG_AP_MODE ++ remove_proc_entry("all_sta_info", dir_dev); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ remove_proc_entry("_malloc_cnt", dir_dev); ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ remove_proc_entry("best_channel", dir_dev); ++#endif ++ remove_proc_entry("rx_signal", dir_dev); ++ ++ remove_proc_entry("cbw40_enable", dir_dev); ++ ++ remove_proc_entry("ht_enable", dir_dev); ++ ++ remove_proc_entry("ampdu_enable", dir_dev); ++ ++ remove_proc_entry("rx_stbc", dir_dev); ++ ++ remove_proc_entry("path_rssi", dir_dev); ++ ++ remove_proc_entry("vid", dir_dev); ++ ++ remove_proc_entry("pid", dir_dev); ++ ++ remove_proc_entry("rssi_disp", dir_dev); ++ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++ remove_proc_entry("sreset", dir_dev); ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++ remove_proc_entry("dm_adaptivity", dir_dev); ++#endif ++ ++ remove_proc_entry(dev->name, rtw_proc); ++ dir_dev = NULL; ++ ++ } ++ else ++ { ++ return; ++ } ++ ++ rtw_proc_cnt--; ++ ++ if(rtw_proc_cnt == 0) ++ { ++ if(rtw_proc){ ++ remove_proc_entry("ver_info", rtw_proc); ++ ++ remove_proc_entry("log_level", rtw_proc); ++ #ifdef DBG_MEM_ALLOC ++ remove_proc_entry("mstat", rtw_proc); ++ #endif /* DBG_MEM_ALLOC */ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ remove_proc_entry(rtw_proc_name, proc_net); ++#else ++ remove_proc_entry(rtw_proc_name, init_net.proc_net); ++#endif ++ rtw_proc = NULL; ++ } ++ } ++} ++#endif ++ ++uint loadparam( _adapter *padapter, _nic_hdl pnetdev); ++uint loadparam( _adapter *padapter, _nic_hdl pnetdev) ++{ ++ ++ uint status = _SUCCESS; ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ ++_func_enter_; ++ ++ registry_par->chip_version = (u8)rtw_chip_version; ++ registry_par->rfintfs = (u8)rtw_rfintfs; ++ registry_par->lbkmode = (u8)rtw_lbkmode; ++ //registry_par->hci = (u8)hci; ++ registry_par->network_mode = (u8)rtw_network_mode; ++ ++ _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3); ++ registry_par->ssid.SsidLength = 3; ++ ++ registry_par->channel = (u8)rtw_channel; ++ registry_par->wireless_mode = (u8)rtw_wireless_mode; ++ registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ; ++ registry_par->vcs_type = (u8)rtw_vcs_type; ++ registry_par->rts_thresh=(u16)rtw_rts_thresh; ++ registry_par->frag_thresh=(u16)rtw_frag_thresh; ++ registry_par->preamble = (u8)rtw_preamble; ++ registry_par->scan_mode = (u8)rtw_scan_mode; ++ registry_par->adhoc_tx_pwr = (u8)rtw_adhoc_tx_pwr; ++ registry_par->soft_ap= (u8)rtw_soft_ap; ++ //registry_par->smart_ps = (u8)rtw_smart_ps; ++ registry_par->power_mgnt = (u8)rtw_power_mgnt; ++ registry_par->ips_mode = (u8)rtw_ips_mode; ++ registry_par->radio_enable = (u8)rtw_radio_enable; ++ registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt; ++ registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt; ++ registry_par->busy_thresh = (u16)rtw_busy_thresh; ++ //registry_par->qos_enable = (u8)rtw_qos_enable; ++ registry_par->ack_policy = (u8)rtw_ack_policy; ++ registry_par->mp_mode = (u8)rtw_mp_mode; ++ registry_par->software_encrypt = (u8)rtw_software_encrypt; ++ registry_par->software_decrypt = (u8)rtw_software_decrypt; ++ ++ registry_par->acm_method = (u8)rtw_acm_method; ++ ++ //UAPSD ++ registry_par->wmm_enable = (u8)rtw_wmm_enable; ++ registry_par->uapsd_enable = (u8)rtw_uapsd_enable; ++ registry_par->uapsd_max_sp = (u8)rtw_uapsd_max_sp; ++ registry_par->uapsd_acbk_en = (u8)rtw_uapsd_acbk_en; ++ registry_par->uapsd_acbe_en = (u8)rtw_uapsd_acbe_en; ++ registry_par->uapsd_acvi_en = (u8)rtw_uapsd_acvi_en; ++ registry_par->uapsd_acvo_en = (u8)rtw_uapsd_acvo_en; ++ ++#ifdef CONFIG_80211N_HT ++ registry_par->ht_enable = (u8)rtw_ht_enable; ++ registry_par->cbw40_enable = (u8)rtw_cbw40_enable; ++ registry_par->ampdu_enable = (u8)rtw_ampdu_enable; ++ registry_par->rx_stbc = (u8)rtw_rx_stbc; ++ registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu; ++#endif ++ ++ registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; ++ registry_par->rf_config = (u8)rtw_rf_config; ++ registry_par->low_power = (u8)rtw_low_power; ++ ++ ++ registry_par->wifi_spec = (u8)rtw_wifi_spec; ++ registry_par->special_rf_path = (u8)rtw_special_rf_path; ++ registry_par->channel_plan = (u8)rtw_channel_plan; ++ ++#ifdef CONFIG_BT_COEXIST ++ registry_par->bt_iso = (u8)rtw_bt_iso; ++ registry_par->bt_sco = (u8)rtw_bt_sco; ++ registry_par->bt_ampdu = (u8)rtw_bt_ampdu; ++#endif ++ registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq; ++ ++ registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg; ++ ++#ifdef CONFIG_AUTOSUSPEND ++ registry_par->usbss_enable = (u8)rtw_enusbss;//0:disable,1:enable ++#endif ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ registry_par->hwpdn_mode = (u8)rtw_hwpdn_mode;//0:disable,1:enable,2:by EFUSE config ++ registry_par->hwpwrp_detect = (u8)rtw_hwpwrp_detect;//0:disable,1:enable ++#endif ++ ++ registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc; ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s", rtw_adaptor_info_caching_file_path); ++ registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX-1]=0; ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ registry_par->max_roaming_times = (u8)rtw_max_roaming_times; ++#ifdef CONFIG_INTEL_WIDI ++ registry_par->max_roaming_times = (u8)rtw_max_roaming_times + 2; ++#endif // CONFIG_INTEL_WIDI ++#endif ++ ++#ifdef CONFIG_IOL ++ registry_par->force_iol = rtw_force_iol; ++#endif ++ ++ registry_par->mac_phy_mode = rtw_mac_phy_mode; ++ ++#ifdef CONFIG_80211D ++ registry_par->enable80211d = (u8)rtw_80211d; ++#endif ++ ++ snprintf(registry_par->ifname, 16, "%s", ifname); ++ snprintf(registry_par->if2name, 16, "%s", if2name); ++ ++ registry_par->notch_filter = (u8)rtw_notch_filter; ++ ++#ifdef CONFIG_MULTI_VIR_IFACES ++ registry_par->ext_iface_num = (u8)rtw_ext_iface_num; ++#endif //CONFIG_MULTI_VIR_IFACES ++ ++_func_exit_; ++ ++ return status; ++} ++ ++static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct sockaddr *addr = p; ++ ++ if(padapter->bup == _FALSE) ++ { ++ //DBG_871X("r8711_net_set_mac_address(), MAC=%x:%x:%x:%x:%x:%x\n", addr->sa_data[0], addr->sa_data[1], addr->sa_data[2], addr->sa_data[3], ++ //addr->sa_data[4], addr->sa_data[5]); ++ _rtw_memcpy(padapter->eeprompriv.mac_addr, addr->sa_data, ETH_ALEN); ++ //_rtw_memcpy(pnetdev->dev_addr, addr->sa_data, ETH_ALEN); ++ //padapter->bset_hwaddr = _TRUE; ++ } ++ ++ return 0; ++} ++ ++static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ ++ padapter->stats.tx_packets = pxmitpriv->tx_pkts;//pxmitpriv->tx_pkts++; ++ padapter->stats.rx_packets = precvpriv->rx_pkts;//precvpriv->rx_pkts++; ++ padapter->stats.tx_dropped = pxmitpriv->tx_drop; ++ padapter->stats.rx_dropped = precvpriv->rx_drop; ++ padapter->stats.tx_bytes = pxmitpriv->tx_bytes; ++ padapter->stats.rx_bytes = precvpriv->rx_bytes; ++ ++ return &padapter->stats; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++/* ++ * AC to queue mapping ++ * ++ * AC_VO -> queue 0 ++ * AC_VI -> queue 1 ++ * AC_BE -> queue 2 ++ * AC_BK -> queue 3 ++ */ ++static const u16 rtw_1d_to_queue[8] = { 2, 3, 3, 2, 1, 1, 0, 0 }; ++ ++/* Given a data frame determine the 802.1p/1d tag to use. */ ++unsigned int rtw_classify8021d(struct sk_buff *skb) ++{ ++ unsigned int dscp; ++ ++ /* skb->priority values from 256->263 are magic values to ++ * directly indicate a specific 802.1d priority. This is used ++ * to allow 802.1d priority to be passed directly in from VLAN ++ * tags, etc. ++ */ ++ if (skb->priority >= 256 && skb->priority <= 263) ++ return skb->priority - 256; ++ ++ switch (skb->protocol) { ++ case htons(ETH_P_IP): ++ dscp = ip_hdr(skb)->tos & 0xfc; ++ break; ++ default: ++ return 0; ++ } ++ ++ return dscp >> 5; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(4,19,0)) ++static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb, ++ struct net_device *sb_dev, ++ select_queue_fallback_t fallback) ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(3,14,0)) ++static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb, ++ void *accel_priv, ++ select_queue_fallback_t fallback) ++#else ++static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb) ++#endif ++{ ++ _adapter *padapter = rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ skb->priority = rtw_classify8021d(skb); ++ ++ if(pmlmepriv->acm_mask != 0) ++ { ++ skb->priority = qos_acm(pmlmepriv->acm_mask, skb->priority); ++ } ++ ++ return rtw_1d_to_queue[skb->priority]; ++} ++ ++u16 rtw_recv_select_queue(struct sk_buff *skb) ++{ ++ struct iphdr *piphdr; ++ unsigned int dscp; ++ u16 eth_type; ++ u32 priority; ++ u8 *pdata = skb->data; ++ ++ _rtw_memcpy(ð_type, pdata+(ETH_ALEN<<1), 2); ++ ++ switch (eth_type) { ++ case htons(ETH_P_IP): ++ ++ piphdr = (struct iphdr *)(pdata+ETH_HLEN); ++ ++ dscp = piphdr->tos & 0xfc; ++ ++ priority = dscp >> 5; ++ ++ break; ++ default: ++ priority = 0; ++ } ++ ++ return rtw_1d_to_queue[priority]; ++ ++} ++ ++#endif ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_netdev_ops = { ++ .ndo_open = netdev_open, ++ .ndo_stop = netdev_close, ++ .ndo_start_xmit = rtw_xmit_entry, ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ .ndo_select_queue = rtw_select_queue, ++#endif ++ .ndo_set_mac_address = rtw_net_set_mac_address, ++ .ndo_get_stats = rtw_net_get_stats, ++ .ndo_do_ioctl = rtw_ioctl, ++}; ++#endif ++ ++int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) ++{ ++ _adapter *padapter = rtw_netdev_priv(pnetdev); ++ ++#ifdef CONFIG_EASY_REPLACEMENT ++ struct net_device *TargetNetdev = NULL; ++ _adapter *TargetAdapter = NULL; ++ struct net *devnet = NULL; ++ ++ if(padapter->bDongle == 1) ++ { ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ TargetNetdev = dev_get_by_name("wlan0"); ++#else ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = pnetdev->nd_net; ++ #else ++ devnet = dev_net(pnetdev); ++ #endif ++ TargetNetdev = dev_get_by_name(devnet, "wlan0"); ++#endif ++ if(TargetNetdev) { ++ DBG_871X("Force onboard module driver disappear !!!\n"); ++ TargetAdapter = rtw_netdev_priv(TargetNetdev); ++ TargetAdapter->DriverState = DRIVER_DISAPPEAR; ++ ++ padapter->pid[0] = TargetAdapter->pid[0]; ++ padapter->pid[1] = TargetAdapter->pid[1]; ++ padapter->pid[2] = TargetAdapter->pid[2]; ++ ++ dev_put(TargetNetdev); ++ unregister_netdev(TargetNetdev); ++ ++ if(TargetAdapter->chip_type == padapter->chip_type) ++ rtw_proc_remove_one(TargetNetdev); ++ ++ padapter->DriverState = DRIVER_REPLACE_DONGLE; ++ } ++ } ++#endif //CONFIG_EASY_REPLACEMENT ++ ++ if(dev_alloc_name(pnetdev, ifname) < 0) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("dev_alloc_name, fail! \n")); ++ } ++ ++ netif_carrier_off(pnetdev); ++ //rtw_netif_stop_queue(pnetdev); ++ ++ return 0; ++} ++ ++static const struct device_type wlan_type = { ++ .name = "wlan", ++}; ++ ++struct net_device *rtw_init_netdev(_adapter *old_padapter) ++{ ++ _adapter *padapter; ++ struct net_device *pnetdev; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+init_net_dev\n")); ++ ++ if(old_padapter != NULL) ++ pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter); ++ else ++ pnetdev = rtw_alloc_etherdev(sizeof(_adapter)); ++ ++ if (!pnetdev) ++ return NULL; ++ ++ pnetdev->dev.type = &wlan_type; ++ padapter = rtw_netdev_priv(pnetdev); ++ padapter->pnetdev = pnetdev; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ++ SET_MODULE_OWNER(pnetdev); ++#endif ++ ++ //pnetdev->init = NULL; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ DBG_871X("register rtw_netdev_ops to netdev_ops\n"); ++ pnetdev->netdev_ops = &rtw_netdev_ops; ++#else ++ pnetdev->open = netdev_open; ++ pnetdev->stop = netdev_close; ++ pnetdev->hard_start_xmit = rtw_xmit_entry; ++ pnetdev->set_mac_address = rtw_net_set_mac_address; ++ pnetdev->get_stats = rtw_net_get_stats; ++ pnetdev->do_ioctl = rtw_ioctl; ++#endif ++ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ pnetdev->features |= NETIF_F_IP_CSUM; ++#endif ++ //pnetdev->tx_timeout = NULL; ++ pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */ ++#ifdef CONFIG_WIRELESS_EXT ++ pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; ++#endif ++ ++#ifdef WIRELESS_SPY ++ //priv->wireless_data.spy_data = &priv->spy_data; ++ //pnetdev->wireless_data = &priv->wireless_data; ++#endif ++ ++ //step 2. ++ loadparam(padapter, pnetdev); ++ ++ return pnetdev; ++ ++} ++ ++void rtw_unregister_netdevs(struct dvobj_priv *dvobj) ++{ ++ int i; ++ _adapter *padapter = NULL; ++ ++ for (i=0;iiface_nums;i++) { ++ struct net_device *pnetdev = NULL; ++ ++ padapter = dvobj->padapters[i]; ++ ++ if (padapter == NULL) ++ continue; ++ ++ pnetdev = padapter->pnetdev; ++ ++ if((padapter->DriverState != DRIVER_DISAPPEAR) && pnetdev) { ++ unregister_netdev(pnetdev); //will call netdev_close() ++ rtw_proc_remove_one(pnetdev); ++ } ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_unregister(padapter->rtw_wdev); ++ #endif ++ } ++ ++} ++ ++u32 rtw_start_drv_threads(_adapter *padapter) ++{ ++ ++ u32 _status = _SUCCESS; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_start_drv_threads\n")); ++#ifdef CONFIG_XMIT_THREAD_MODE ++ padapter->xmitThread = kthread_run(rtw_xmit_thread, padapter, "RTW_XMIT_THREAD"); ++ if(IS_ERR(padapter->xmitThread)) ++ _status = _FAIL; ++#endif ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ padapter->recvThread = kthread_run(rtw_recv_thread, padapter, "RTW_RECV_THREAD"); ++ if(IS_ERR(padapter->recvThread)) ++ _status = _FAIL; ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->isprimary == _TRUE) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ padapter->cmdThread = kthread_run(rtw_cmd_thread, padapter, "RTW_CMD_THREAD"); ++ if(IS_ERR(padapter->cmdThread)) ++ _status = _FAIL; ++ else ++ _rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); //wait for cmd_thread to run ++ } ++ ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ padapter->evtThread = kthread_run(event_thread, padapter, "RTW_EVENT_THREAD"); ++ if(IS_ERR(padapter->evtThread)) ++ _status = _FAIL; ++#endif ++ ++ return _status; ++ ++} ++ ++void rtw_stop_drv_threads (_adapter *padapter) ++{ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n")); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->isprimary == _TRUE) ++#endif //CONFIG_CONCURRENT_MODE ++ { ++ rtw_stop_cmd_thread(padapter); ++ } ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _rtw_up_sema(&padapter->evtpriv.evt_notify); ++ if(padapter->evtThread){ ++ _rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema); ++ } ++#endif ++ ++#ifdef CONFIG_XMIT_THREAD_MODE ++ // Below is to termindate tx_thread... ++ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); ++ _rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n")); ++#endif ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ // Below is to termindate rx_thread... ++ _rtw_up_sema(&padapter->recvpriv.recv_sema); ++ _rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt:recv_thread can be terminated! \n")); ++#endif ++ ++ ++} ++ ++u8 rtw_init_default_value(_adapter *padapter); ++u8 rtw_init_default_value(_adapter *padapter) ++{ ++ u8 ret = _SUCCESS; ++ struct registry_priv* pregistrypriv = &padapter->registrypriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ //xmit_priv ++ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; ++ pxmitpriv->vcs = pregistrypriv->vcs_type; ++ pxmitpriv->vcs_type = pregistrypriv->vcs_type; ++ //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; ++ pxmitpriv->frag_len = pregistrypriv->frag_thresh; ++ ++ ++ ++ //recv_priv ++ ++ ++ //mlme_priv ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ pmlmepriv->scan_mode = SCAN_ACTIVE; ++ ++ //qos_priv ++ //pmlmepriv->qospriv.qos_option = pregistrypriv->wmm_enable; ++ ++ //ht_priv ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->htpriv.ampdu_enable = _FALSE;//set to disabled ++#endif ++ ++ //security_priv ++ //rtw_get_encrypt_decrypt_from_registrypriv(padapter); ++ psecuritypriv->binstallGrpkey = _FAIL; ++ psecuritypriv->sw_encrypt=pregistrypriv->software_encrypt; ++ psecuritypriv->sw_decrypt=pregistrypriv->software_decrypt; ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ ++ psecuritypriv->dot11PrivacyKeyIndex = 0; ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpKeyid = 1; ++ ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ psecuritypriv->ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ ++ //pwrctrl_priv ++ ++ ++ //registry_priv ++ rtw_init_registrypriv_dev_network(padapter); ++ rtw_update_registrypriv_dev_network(padapter); ++ ++ ++ //hal_priv ++ rtw_hal_def_value_init(padapter); ++ ++ //misc. ++ padapter->bReadPortCancel = _FALSE; ++ padapter->bWritePortCancel = _FALSE; ++ padapter->bRxRSSIDisplay = 0; ++ padapter->bForceWriteInitGain = 1; ++ padapter->bNotifyChannelChange = 0; ++#ifdef CONFIG_P2P ++ padapter->bShowGetP2PState = 1; ++#endif ++ return ret; ++} ++ ++struct dvobj_priv *devobj_init(void) ++{ ++ struct dvobj_priv *pdvobj = NULL; ++ ++ if ((pdvobj = (struct dvobj_priv*)rtw_zmalloc(sizeof(*pdvobj))) == NULL) ++ return NULL; ++ ++ _rtw_mutex_init(&pdvobj->hw_init_mutex); ++ _rtw_mutex_init(&pdvobj->h2c_fwcmd_mutex); ++ _rtw_mutex_init(&pdvobj->setch_mutex); ++ _rtw_mutex_init(&pdvobj->setbw_mutex); ++ ++ pdvobj->processing_dev_remove = _FALSE; ++ ++ return pdvobj; ++} ++ ++void devobj_deinit(struct dvobj_priv *pdvobj) ++{ ++ if(!pdvobj) ++ return; ++ ++ _rtw_mutex_free(&pdvobj->hw_init_mutex); ++ _rtw_mutex_free(&pdvobj->h2c_fwcmd_mutex); ++ _rtw_mutex_free(&pdvobj->setch_mutex); ++ _rtw_mutex_free(&pdvobj->setbw_mutex); ++ ++ rtw_mfree((u8*)pdvobj, sizeof(*pdvobj)); ++} ++ ++u8 rtw_reset_drv_sw(_adapter *padapter) ++{ ++ u8 ret8=_SUCCESS; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ //hal_priv ++ rtw_hal_def_value_init(padapter); ++ padapter->bReadPortCancel = _FALSE; ++ padapter->bWritePortCancel = _FALSE; ++ padapter->bRxRSSIDisplay = 0; ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ ++ pwrctrlpriv->bips_processing = _FALSE; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ ++ padapter->xmitpriv.tx_pkts = 0; ++ padapter->recvpriv.rx_pkts = 0; ++ ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY |_FW_UNDER_LINKING); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ adapter_to_dvobj(padapter)->pusbdev->autosuspend_disabled = 1;//autosuspend disabled by the user ++ #endif ++#endif ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ rtw_hal_sreset_reset_value(padapter); ++#endif ++ pwrctrlpriv->pwr_state_check_cnts = 0; ++ ++ //mlmeextpriv ++ padapter->mlmeextpriv.sitesurvey_res.state= SCAN_DISABLE; ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ ++ return ret8; ++} ++ ++ ++u8 rtw_init_drv_sw(_adapter *padapter) ++{ ++ ++ u8 ret8=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_init_drv_sw\n")); ++ ++ if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init cmd_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ padapter->cmdpriv.padapter=padapter; ++ ++ if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init evt_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ ++ if (rtw_init_mlme_priv(padapter) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_P2P ++ rtw_init_wifidirect_timers(padapter); ++ init_wifidirect_info(padapter, P2P_ROLE_DISABLE); ++ reset_global_wifidirect_info(padapter); ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_init_cfg80211_wifidirect_info(padapter); ++ #endif ++#ifdef CONFIG_WFD ++ if(rtw_init_wifi_display_info(padapter) == _FAIL) ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init init_wifi_display_info\n")); ++#endif ++#endif /* CONFIG_P2P */ ++ ++ if(init_mlme_ext_priv(padapter) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_ext_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_TDLS ++ if(rtw_init_tdls_info(padapter) == _FAIL) ++ { ++ DBG_871X("Can't rtw_init_tdls_info\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++#endif //CONFIG_TDLS ++ ++ if(_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_xmit_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ if(_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_recv_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ // add for CONFIG_IEEE80211W, none 11w also can use ++ _rtw_spinlock_init(&padapter->security_key_mutex); ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ ++ //_init_timer(&(padapter->securitypriv.tkip_timer), padapter->pifp, rtw_use_tkipkey_handler, padapter); ++ ++ if(_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_sta_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ padapter->stapriv.padapter = padapter; ++ padapter->setband = GHZ24_50; ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_init_pwrctrl_priv(padapter); ++ ++ //_rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv));//move to mlme_priv ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (init_mp_priv(padapter) == _FAIL) { ++ DBG_871X("%s: initialize MP private data Fail!\n", __func__); ++ } ++#endif ++ ++ ret8 = rtw_init_default_value(padapter); ++ ++ rtw_hal_dm_init(padapter); ++ rtw_hal_sw_led_init(padapter); ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ rtw_hal_sreset_init(padapter); ++#endif ++ ++#ifdef CONFIG_INTEL_WIDI ++ if(rtw_init_intel_widi(padapter) == _FAIL) ++ { ++ DBG_871X("Can't rtw_init_intel_widi\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++#endif //CONFIG_INTEL_WIDI ++ ++#ifdef CONFIG_BR_EXT ++ _rtw_spinlock_init(&padapter->br_ext_lock); ++#endif // CONFIG_BR_EXT ++ ++exit: ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_init_drv_sw\n")); ++ ++ _func_exit_; ++ ++ return ret8; ++ ++} ++ ++void rtw_cancel_all_timer(_adapter *padapter) ++{ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_cancel_all_timer\n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel association timer complete! \n")); ++ ++ //_cancel_timer_ex(&padapter->securitypriv.tkip_timer); ++ //RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel tkip_timer! \n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel scan_to_timer! \n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n")); ++ ++ // cancel sw led timer ++ rtw_hal_sw_led_deinit(padapter); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel DeInitSwLeds! \n")); ++ ++ _cancel_timer_ex(&padapter->pwrctrlpriv.pwr_state_check_timer); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef CONFIG_P2P ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++#endif //CONFIG_P2P ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _cancel_timer_ex(&padapter->mlmepriv.set_scan_deny_timer); ++ rtw_clear_scan_deny(padapter); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel set_scan_deny_timer! \n")); ++#endif ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ _cancel_timer_ex(&padapter->recvpriv.signal_stat_timer); ++#endif ++ ++ // cancel dm timer ++ rtw_hal_dm_deinit(padapter); ++ ++#ifdef CONFIG_PLATFORM_FS_MX61 ++ msleep(50); ++#endif ++} ++ ++u8 rtw_free_drv_sw(_adapter *padapter) ++{ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("==>rtw_free_drv_sw")); ++ ++ ++ //we can call rtw_p2p_enable here, but: ++ // 1. rtw_p2p_enable may have IO operation ++ // 2. rtw_p2p_enable is bundled with wext interface ++ #ifdef CONFIG_P2P ++ { ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++#ifdef CONFIG_CONCURRENT_MODE ++ _cancel_timer_ex( &pwdinfo->ap_p2p_switch_timer ); ++#endif // CONFIG_CONCURRENT_MODE ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ } ++ } ++ #endif ++ // add for CONFIG_IEEE80211W, none 11w also can use ++ _rtw_spinlock_free(&padapter->security_key_mutex); ++ ++#ifdef CONFIG_BR_EXT ++ _rtw_spinlock_free(&padapter->br_ext_lock); ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_INTEL_WIDI ++ rtw_free_intel_widi(padapter); ++#endif //CONFIG_INTEL_WIDI ++ ++ free_mlme_ext_priv(&padapter->mlmeextpriv); ++ ++#ifdef CONFIG_TDLS ++ //rtw_free_tdls_info(&padapter->tdlsinfo); ++#endif //CONFIG_TDLS ++ ++ rtw_free_cmd_priv(&padapter->cmdpriv); ++ ++ rtw_free_evt_priv(&padapter->evtpriv); ++ ++ rtw_free_mlme_priv(&padapter->mlmepriv); ++ ++ //free_io_queue(padapter); ++ ++ _rtw_free_xmit_priv(&padapter->xmitpriv); ++ ++ _rtw_free_sta_priv(&padapter->stapriv); //will free bcmc_stainfo here ++ ++ _rtw_free_recv_priv(&padapter->recvpriv); ++ ++ rtw_free_pwrctrl_priv(padapter); ++ ++ //rtw_mfree((void *)padapter, sizeof (padapter)); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ free_drvext(&padapter->drvextpriv); ++#endif ++ ++ rtw_hal_free_data(padapter); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("<==rtw_free_drv_sw\n")); ++ ++ //free the old_pnetdev ++ if(padapter->rereg_nd_name_priv.old_pnetdev) { ++ free_netdev(padapter->rereg_nd_name_priv.old_pnetdev); ++ padapter->rereg_nd_name_priv.old_pnetdev = NULL; ++ } ++ ++ // clear pbuddy_adapter to avoid access wrong pointer. ++ if(padapter->pbuddy_adapter != NULL) ++ { ++ padapter->pbuddy_adapter->pbuddy_adapter = NULL; ++ } ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_free_drv_sw\n")); ++ ++ return _SUCCESS; ++ ++} ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_USB_HCI ++ #include ++#endif ++ ++#ifdef CONFIG_MULTI_VIR_IFACES ++int _netdev_vir_if_open(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ _adapter *primary_padapter = GET_PRIMARY_ADAPTER(padapter); ++ ++ DBG_871X(FUNC_NDEV_FMT" enter\n", FUNC_NDEV_ARG(pnetdev)); ++ ++ if(!primary_padapter) ++ goto _netdev_virtual_iface_open_error; ++ ++ if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) ++ { ++ _netdev_open(primary_padapter->pnetdev); ++ } ++ ++ if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && ++ primary_padapter->hw_init_completed == _TRUE) ++ { ++ int i; ++ ++ padapter->bDriverStopped = _FALSE; ++ padapter->bSurpriseRemoved = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ ++ _rtw_memcpy(padapter->HalData, primary_padapter->HalData, padapter->hal_data_sz); ++ ++ padapter->bFWReady = primary_padapter->bFWReady; ++ ++ if(rtw_start_drv_threads(padapter) == _FAIL) ++ { ++ goto _netdev_virtual_iface_open_error; ++ } ++ ++ padapter->dir_dev = NULL; ++ rtw_proc_init_one(pnetdev); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_init_wiphy(padapter); ++#endif ++ ++ padapter->bup = _TRUE; ++ padapter->hw_init_completed = _TRUE; ++ ++ rtw_start_mbssid_cam(padapter);//start mbssid_cam after bup = _TRUE & hw_init_completed = _TRUE ++ ++ } ++ ++ padapter->net_closed = _FALSE; ++ ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ if(!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_start_queue(pnetdev); ++ else ++ rtw_netif_wake_queue(pnetdev); ++ ++ ++ DBG_871X(FUNC_NDEV_FMT" exit\n", FUNC_NDEV_ARG(pnetdev)); ++ return 0; ++ ++_netdev_virtual_iface_open_error: ++ ++ padapter->bup = _FALSE; ++ ++ netif_carrier_off(pnetdev); ++ rtw_netif_stop_queue(pnetdev); ++ ++ return (-1); ++ ++} ++ ++int netdev_vir_if_open(struct net_device *pnetdev) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ ret = _netdev_vir_if_open(pnetdev); ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ return ret; ++} ++ ++static int netdev_vir_if_close(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ padapter->net_closed = _TRUE; ++ ++ if(pnetdev) ++ { ++ if (!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_stop_queue(pnetdev); ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_scan_abort(padapter); ++ wdev_to_priv(padapter->rtw_wdev)->bandroid_scan = _FALSE; ++#endif ++ ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_netdev_vir_if_ops = { ++ .ndo_open = netdev_vir_if_open, ++ .ndo_stop = netdev_vir_if_close, ++ .ndo_start_xmit = rtw_xmit_entry, ++ .ndo_set_mac_address = rtw_net_set_mac_address, ++ .ndo_get_stats = rtw_net_get_stats, ++ .ndo_do_ioctl = rtw_ioctl, ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ .ndo_select_queue = rtw_select_queue, ++#endif ++}; ++#endif ++ ++_adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops)) ++{ ++ ++ int res = _FAIL; ++ struct net_device *pnetdev=NULL; ++ _adapter *padapter = NULL; ++ struct dvobj_priv *pdvobjpriv; ++ u8 mac[ETH_ALEN]; ++ ++/* ++ if((primary_padapter->bup == _FALSE) || ++ (rtw_buddy_adapter_up(primary_padapter) == _FALSE)) ++ { ++ goto error_rtw_drv_add_iface; ++ } ++ ++*/ ++ /****** init netdev ******/ ++ pnetdev = rtw_init_netdev(NULL); ++ if (!pnetdev) ++ goto error_rtw_drv_add_iface; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ DBG_871X("register rtw_netdev_virtual_iface_ops to netdev_ops\n"); ++ pnetdev->netdev_ops = &rtw_netdev_vir_if_ops; ++#else ++ pnetdev->open = netdev_vir_if_open; ++ pnetdev->stop = netdev_vir_if_close; ++#endif ++ ++#ifdef CONFIG_NO_WIRELESS_HANDLERS ++ pnetdev->wireless_handlers = NULL; ++#endif ++ ++ /****** init adapter ******/ ++ padapter = rtw_netdev_priv(pnetdev); ++ _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); ++ ++ // ++ padapter->bup = _FALSE; ++ padapter->net_closed = _TRUE; ++ padapter->hw_init_completed = _FALSE; ++ ++ ++ //set adapter_type/iface type ++ padapter->isprimary = _FALSE; ++ padapter->adapter_type = MAX_ADAPTER; ++ padapter->pbuddy_adapter = primary_padapter; ++#if 0 ++#ifndef CONFIG_HWPORT_SWAP //Port0 -> Pri , Port1 -> Sec ++ padapter->iface_type = IFACE_PORT1; ++#else ++ padapter->iface_type = IFACE_PORT0; ++#endif //CONFIG_HWPORT_SWAP ++#else ++ //extended virtual interfaces always are set to port0 ++ padapter->iface_type = IFACE_PORT0; ++#endif ++ // ++ padapter->pnetdev = pnetdev; ++ ++ /****** setup dvobj ******/ ++ pdvobjpriv = adapter_to_dvobj(padapter); ++ padapter->iface_id = pdvobjpriv->iface_nums; ++ pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; ++ ++ SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ //set interface_type/chip_type/HardwareType ++ padapter->interface_type = primary_padapter->interface_type; ++ padapter->chip_type = primary_padapter->chip_type; ++ padapter->HardwareType = primary_padapter->HardwareType; ++ ++ //set hal data & hal ops ++#if defined(CONFIG_RTL8192C) ++ #if defined(CONFIG_PCI_HCI) ++ rtl8192ce_set_hal_ops(padapter); ++ #elif defined(CONFIG_USB_HCI) ++ rtl8192cu_set_hal_ops(padapter); ++ #endif ++#elif defined(CONFIG_RTL8192D) ++ #if defined(CONFIG_PCI_HCI) ++ rtl8192de_set_hal_ops(padapter); ++ #elif defined(CONFIG_USB_HCI) ++ rtl8192du_set_hal_ops(padapter); ++ #endif ++#endif ++ ++ padapter->HalFunc.inirp_init = NULL; ++ padapter->HalFunc.inirp_deinit = NULL; ++ padapter->intf_start = NULL; ++ padapter->intf_stop = NULL; ++ ++ //step init_io_priv ++ if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ } ++ ++ //step read_chip_version ++ rtw_hal_read_chip_version(padapter); ++ ++ //step usb endpoint mapping ++ rtw_hal_chip_configure(padapter); ++ ++ ++ //init drv data ++ if(rtw_init_drv_sw(padapter)!= _SUCCESS) ++ goto error_rtw_drv_add_iface; ++ ++ ++ //get mac address from primary_padapter ++ _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); ++ ++ if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && ++ (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ++ ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && ++ (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) ++ { ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ mac[3] = 0x87; ++ mac[4] = 0x11; ++ mac[5] = 0x22; ++ } ++ else ++ { ++ //If the BIT1 is 0, the address is universally administered. ++ //If it is 1, the address is locally administered ++#if 1 //needs enable MBSSID CAM ++ mac[0] |= BIT(1); // locally administered ++ mac[0] |= (padapter->iface_id-1)<<4; ++#endif ++ } ++ ++ _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); ++ ++ padapter->dir_dev = NULL; ++ ++ res = _SUCCESS; ++ ++ return padapter; ++ ++ ++error_rtw_drv_add_iface: ++ ++ if(padapter) ++ rtw_free_drv_sw(padapter); ++ ++ if (pnetdev) ++ rtw_free_netdev(pnetdev); ++ ++ return NULL; ++ ++} ++ ++void rtw_drv_stop_vir_if(_adapter *padapter) ++{ ++ struct net_device *pnetdev=NULL; ++ ++ if (padapter == NULL) ++ return; ++ ++ pnetdev = padapter->pnetdev; ++ ++ rtw_cancel_all_timer(padapter); ++ ++ if(padapter->bup == _TRUE) ++ { ++ padapter->bDriverStopped = _TRUE; ++ ++ #ifdef CONFIG_XMIT_ACK ++ if (padapter->xmitpriv.ack_tx) ++ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); ++ #endif ++ ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ rtw_stop_drv_threads(padapter); ++ ++ padapter->bup = _FALSE; ++ } ++} ++ ++void rtw_drv_free_vir_if(_adapter *padapter) ++{ ++ struct net_device *pnetdev=NULL; ++ ++ if (padapter == NULL) ++ return; ++ ++ padapter->pbuddy_adapter = NULL; ++ ++ pnetdev = padapter->pnetdev; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_free(padapter->rtw_wdev); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_free_drv_sw(padapter); ++ ++ rtw_free_netdev(pnetdev); ++} ++ ++void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj) ++{ ++ int i; ++ //struct dvobj_priv *dvobj = primary_padapter->dvobj; ++ ++ for(i=2;iiface_nums;i++) ++ { ++ rtw_drv_stop_vir_if(dvobj->padapters[i]); ++ } ++} ++ ++void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj) ++{ ++ int i; ++ //struct dvobj_priv *dvobj = primary_padapter->dvobj; ++ ++ for(i=2;iiface_nums;i++) ++ { ++ rtw_drv_free_vir_if(dvobj->padapters[i]); ++ } ++} ++ ++void rtw_drv_del_vir_if(_adapter *padapter) ++{ ++ rtw_drv_stop_vir_if(padapter); ++ rtw_drv_free_vir_if(padapter); ++} ++ ++void rtw_drv_del_vir_ifaces(_adapter *primary_padapter) ++{ ++ int i; ++ struct dvobj_priv *dvobj = primary_padapter->dvobj; ++ ++ for(i=2;iiface_nums;i++) ++ { ++ rtw_drv_del_vir_if(dvobj->padapters[i]); ++ } ++} ++#endif //CONFIG_MULTI_VIR_IFACES ++ ++int _netdev_if2_open(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ _adapter *primary_padapter = padapter->pbuddy_adapter; ++ ++ DBG_871X("+871x_drv - if2_open, bup=%d\n", padapter->bup); ++ ++ if(primary_padapter->bup == _FALSE || primary_padapter->hw_init_completed == _FALSE) ++ { ++ _netdev_open(primary_padapter->pnetdev); ++ } ++ ++ if(padapter->bup == _FALSE && primary_padapter->bup == _TRUE && ++ primary_padapter->hw_init_completed == _TRUE) ++ { ++ int i; ++ ++ padapter->bDriverStopped = _FALSE; ++ padapter->bSurpriseRemoved = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ ++ _rtw_memcpy(padapter->HalData, primary_padapter->HalData, padapter->hal_data_sz); ++ ++ padapter->bFWReady = primary_padapter->bFWReady; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_DM_INIT_PWDB, NULL); ++ ++ //if (init_mlme_ext_priv(padapter) == _FAIL) ++ // goto netdev_if2_open_error; ++ ++ ++ if(rtw_start_drv_threads(padapter) == _FAIL) ++ { ++ goto netdev_if2_open_error; ++ } ++ ++ ++ if(padapter->intf_start) ++ { ++ padapter->intf_start(padapter); ++ } ++ ++ ++ padapter->hw_init_completed = _TRUE; ++ ++ padapter->dir_dev = NULL; ++ rtw_proc_init_one(pnetdev); ++ ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_init_wiphy(padapter); ++#endif ++ ++ padapter->bup = _TRUE; ++ ++ } ++ ++ padapter->net_closed = _FALSE; ++ ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ if(!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_start_queue(pnetdev); ++ else ++ rtw_netif_wake_queue(pnetdev); ++ ++ DBG_871X("-871x_drv - if2_open, bup=%d\n", padapter->bup); ++ return 0; ++ ++netdev_if2_open_error: ++ ++ padapter->bup = _FALSE; ++ ++ netif_carrier_off(pnetdev); ++ rtw_netif_stop_queue(pnetdev); ++ ++ return (-1); ++ ++} ++ ++int netdev_if2_open(struct net_device *pnetdev) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ ret = _netdev_if2_open(pnetdev); ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ return ret; ++} ++ ++static int netdev_if2_close(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ padapter->net_closed = _TRUE; ++ ++ if(pnetdev) ++ { ++ if (!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_stop_queue(pnetdev); ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_scan_abort(padapter); ++ wdev_to_priv(padapter->rtw_wdev)->bandroid_scan = _FALSE; ++#endif ++ ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_netdev_if2_ops = { ++ .ndo_open = netdev_if2_open, ++ .ndo_stop = netdev_if2_close, ++ .ndo_start_xmit = rtw_xmit_entry, ++ .ndo_set_mac_address = rtw_net_set_mac_address, ++ .ndo_get_stats = rtw_net_get_stats, ++ .ndo_do_ioctl = rtw_ioctl, ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ .ndo_select_queue = rtw_select_queue, ++#endif ++}; ++#endif ++ ++_adapter *rtw_drv_if2_init(_adapter *primary_padapter, void (*set_intf_ops)(struct _io_ops *pops)) ++{ ++ int res = _FAIL; ++ struct net_device *pnetdev = NULL; ++ _adapter *padapter = NULL; ++ struct dvobj_priv *pdvobjpriv; ++ u8 mac[ETH_ALEN]; ++ ++ /****** init netdev ******/ ++ pnetdev = rtw_init_netdev(NULL); ++ if (!pnetdev) ++ goto error_rtw_drv_if2_init; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ DBG_871X("register rtw_netdev_if2_ops to netdev_ops\n"); ++ pnetdev->netdev_ops = &rtw_netdev_if2_ops; ++#else ++ pnetdev->open = netdev_if2_open; ++ pnetdev->stop = netdev_if2_close; ++#endif ++ ++#ifdef CONFIG_NO_WIRELESS_HANDLERS ++ pnetdev->wireless_handlers = NULL; ++#endif ++ ++ /****** init adapter ******/ ++ padapter = rtw_netdev_priv(pnetdev); ++ _rtw_memcpy(padapter, primary_padapter, sizeof(_adapter)); ++ ++ // ++ padapter->bup = _FALSE; ++ padapter->net_closed = _TRUE; ++ padapter->hw_init_completed = _FALSE; ++ ++ //set adapter_type/iface type ++ padapter->isprimary = _FALSE; ++ padapter->adapter_type = SECONDARY_ADAPTER; ++ padapter->pbuddy_adapter = primary_padapter; ++ padapter->iface_id = IFACE_ID1; ++#ifndef CONFIG_HWPORT_SWAP //Port0 -> Pri , Port1 -> Sec ++ padapter->iface_type = IFACE_PORT1; ++#else ++ padapter->iface_type = IFACE_PORT0; ++#endif //CONFIG_HWPORT_SWAP ++ // ++ padapter->pnetdev = pnetdev; ++ ++ /****** setup dvobj ******/ ++ pdvobjpriv = adapter_to_dvobj(padapter); ++ pdvobjpriv->if2 = padapter; ++ pdvobjpriv->padapters[pdvobjpriv->iface_nums++] = padapter; ++ ++ SET_NETDEV_DEV(pnetdev, dvobj_to_dev(pdvobjpriv)); ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_alloc(padapter, dvobj_to_dev(pdvobjpriv)); ++ #endif //CONFIG_IOCTL_CFG80211 ++ ++ //set interface_type/chip_type/HardwareType ++ padapter->interface_type = primary_padapter->interface_type; ++ padapter->chip_type = primary_padapter->chip_type; ++ padapter->HardwareType = primary_padapter->HardwareType; ++ ++ //set hal data & hal ops ++#if defined(CONFIG_RTL8192C) ++ #if defined(CONFIG_PCI_HCI) ++ rtl8192ce_set_hal_ops(padapter); ++ #elif defined(CONFIG_USB_HCI) ++ rtl8192cu_set_hal_ops(padapter); ++ #endif ++#elif defined(CONFIG_RTL8192D) ++ #if defined(CONFIG_PCI_HCI) ++ rtl8192de_set_hal_ops(padapter); ++ #elif defined(CONFIG_USB_HCI) ++ rtl8192du_set_hal_ops(padapter); ++ #endif ++#endif ++ ++ padapter->HalFunc.inirp_init = NULL; ++ padapter->HalFunc.inirp_deinit = NULL; ++ ++ // ++ padapter->intf_start = primary_padapter->intf_start; ++ padapter->intf_stop = primary_padapter->intf_stop; ++ ++ //step init_io_priv ++ if ((rtw_init_io_priv(padapter, set_intf_ops)) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ } ++ ++ //step read_chip_version ++ rtw_hal_read_chip_version(padapter); ++ ++ //step usb endpoint mapping ++ rtw_hal_chip_configure(padapter); ++ ++ ++ //init drv data ++ if(rtw_init_drv_sw(padapter)!= _SUCCESS) ++ goto error_rtw_drv_if2_init; ++ ++ //get mac address from primary_padapter ++ _rtw_memcpy(mac, primary_padapter->eeprompriv.mac_addr, ETH_ALEN); ++ ++ if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && ++ (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ++ ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && ++ (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) ++ { ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ mac[3] = 0x87; ++ mac[4] = 0x11; ++ mac[5] = 0x22; ++ } ++ else ++ { ++ //If the BIT1 is 0, the address is universally administered. ++ //If it is 1, the address is locally administered ++ mac[0] |= BIT(1); // locally administered ++ ++ } ++ ++ _rtw_memcpy(padapter->eeprompriv.mac_addr, mac, ETH_ALEN); ++ rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); ++ ++ primary_padapter->pbuddy_adapter = padapter; ++ ++ padapter->dir_dev = NULL; ++ ++ res = _SUCCESS; ++ ++ return padapter; ++ ++ ++error_rtw_drv_if2_init: ++ ++ if(padapter) ++ rtw_free_drv_sw(padapter); ++ ++ if (pnetdev) ++ rtw_free_netdev(pnetdev); ++ ++ return NULL; ++ ++} ++ ++void rtw_drv_if2_free(_adapter *if2) ++{ ++ _adapter *padapter = if2; ++ struct net_device *pnetdev = NULL; ++ ++ if (padapter == NULL) ++ return; ++ ++ pnetdev = padapter->pnetdev; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_free(padapter->rtw_wdev); ++#endif /* CONFIG_IOCTL_CFG80211 */ ++ ++ ++ rtw_free_drv_sw(padapter); ++ ++ rtw_free_netdev(pnetdev); ++ ++} ++ ++void rtw_drv_if2_stop(_adapter *if2) ++{ ++ _adapter *padapter = if2; ++ ++ if (padapter == NULL) ++ return; ++ ++ rtw_cancel_all_timer(padapter); ++ ++ if (padapter->bup == _TRUE) { ++ padapter->bDriverStopped = _TRUE; ++ #ifdef CONFIG_XMIT_ACK ++ if (padapter->xmitpriv.ack_tx) ++ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); ++ #endif ++ ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ rtw_stop_drv_threads(padapter); ++ ++ padapter->bup = _FALSE; ++ } ++} ++#endif //end of CONFIG_CONCURRENT_MODE ++ ++#ifdef CONFIG_BR_EXT ++void netdev_br_init(struct net_device *netdev) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++ //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ //struct net_bridge *br = netdev->br_port->br;//->dev->dev_addr; ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if (netdev->br_port) ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if (rcu_dereference(adapter->pnetdev->rx_handler_data)) ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ { ++ struct net_device *br_netdev; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ br_netdev = dev_get_by_name(CONFIG_BR_EXT_BRNAME); ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ struct net *devnet = NULL; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = netdev->nd_net; ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = dev_net(netdev); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ ++ br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ ++ if (br_netdev) { ++ memcpy(adapter->br_mac, br_netdev->dev_addr, ETH_ALEN); ++ dev_put(br_netdev); ++ } else ++ printk("%s()-%d: dev_get_by_name(%s) failed!", __FUNCTION__, __LINE__, CONFIG_BR_EXT_BRNAME); ++ } ++ ++ adapter->ethBrExtInfo.addPPPoETag = 1; ++ } ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++} ++#endif //CONFIG_BR_EXT ++ ++static int _rtw_drv_register_netdev(_adapter *padapter, char *name) ++{ ++ int ret = _SUCCESS; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++ /* alloc netdev name */ ++ rtw_init_netdev_name(pnetdev, name); ++ ++ _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) { ++ DBG_871X(FUNC_NDEV_FMT "Failed!\n", FUNC_NDEV_ARG(pnetdev)); ++ ret = _FAIL; ++ goto error_register_netdev; ++ } ++ ++ DBG_871X("%s, MAC Address (if%d) = " MAC_FMT "\n", __FUNCTION__, (padapter->iface_id+1), MAC_ARG(pnetdev->dev_addr)); ++ ++ return ret; ++ ++error_register_netdev: ++ ++ if(padapter->iface_id > IFACE_ID0) ++ { ++ rtw_free_drv_sw(padapter); ++ ++ rtw_free_netdev(pnetdev); ++ } ++ ++ return ret; ++} ++ ++int rtw_drv_register_netdev(_adapter *if1) ++{ ++ int i, status = _SUCCESS; ++ struct dvobj_priv *dvobj = if1->dvobj; ++ ++ if(dvobj->iface_nums < IFACE_ID_MAX) ++ { ++ for(i=0; iiface_nums; i++) ++ { ++ _adapter *padapter = dvobj->padapters[i]; ++ ++ if(padapter) ++ { ++ char *name; ++ ++ if(padapter->iface_id == IFACE_ID0) ++ name = if1->registrypriv.ifname; ++ else if(padapter->iface_id == IFACE_ID1) ++ name = if1->registrypriv.if2name; ++ else ++ name = "wlan%d"; ++ ++ if((status = _rtw_drv_register_netdev(padapter, name)) != _SUCCESS) { ++ break; ++ } ++ } ++ } ++ } ++ ++ return status; ++} ++ ++int _netdev_open(struct net_device *pnetdev) ++{ ++ uint status; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - dev_open\n")); ++ DBG_871X("+871x_drv - drv_open, bup=%d\n", padapter->bup); ++ ++ if(pwrctrlpriv->ps_flag == _TRUE){ ++ padapter->net_closed = _FALSE; ++ goto netdev_open_normal_process; ++ } ++ ++ if(padapter->bup == _FALSE) ++ { ++ padapter->bDriverStopped = _FALSE; ++ padapter->bSurpriseRemoved = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ ++ status = rtw_hal_init(padapter); ++ if (status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("rtl871x_hal_init(): Can't init h/w!\n")); ++ goto netdev_open_error; ++ } ++ ++ DBG_871X("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ status=rtw_start_drv_threads(padapter); ++ if(status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto netdev_open_error; ++ } ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ init_drvext(padapter); ++#endif ++ ++ if(padapter->intf_start) ++ { ++ padapter->intf_start(padapter); ++ } ++ ++#ifndef RTK_DMP_PLATFORM ++ rtw_proc_init_one(pnetdev); ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_init_wiphy(padapter); ++#endif ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ padapter->bup = _TRUE; ++ } ++ padapter->net_closed = _FALSE; ++ ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ padapter->pwrctrlpriv.bips_processing = _FALSE; ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ ++ //netif_carrier_on(pnetdev);//call this func when rtw_joinbss_event_callback return success ++ if(!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_start_queue(pnetdev); ++ else ++ rtw_netif_wake_queue(pnetdev); ++ ++#ifdef CONFIG_BR_EXT ++ netdev_br_init(pnetdev); ++#endif // CONFIG_BR_EXT ++ ++netdev_open_normal_process: ++ ++ #ifdef CONFIG_CONCURRENT_MODE ++ { ++ _adapter *sec_adapter = padapter->pbuddy_adapter; ++ if(sec_adapter && (sec_adapter->bup == _FALSE || sec_adapter->hw_init_completed == _FALSE)) ++ _netdev_if2_open(sec_adapter->pnetdev); ++ } ++ #endif ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - dev_open\n")); ++ DBG_871X("-871x_drv - drv_open, bup=%d\n", padapter->bup); ++ ++ return 0; ++ ++netdev_open_error: ++ ++ padapter->bup = _FALSE; ++ ++ netif_carrier_off(pnetdev); ++ rtw_netif_stop_queue(pnetdev); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("-871x_drv - dev_open, fail!\n")); ++ DBG_871X("-871x_drv - drv_open fail, bup=%d\n", padapter->bup); ++ ++ return (-1); ++ ++} ++ ++int netdev_open(struct net_device *pnetdev) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ ret = _netdev_open(pnetdev); ++ _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ++ ++ return ret; ++} ++ ++#ifdef CONFIG_IPS ++int ips_netdrv_open(_adapter *padapter) ++{ ++ int status = _SUCCESS; ++ padapter->net_closed = _FALSE; ++ DBG_871X("===> %s.........\n",__FUNCTION__); ++ ++ ++ padapter->bDriverStopped = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ //padapter->bup = _TRUE; ++ ++ status = rtw_hal_init(padapter); ++ if (status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("ips_netdrv_open(): Can't init h/w!\n")); ++ goto netdev_open_error; ++ } ++ ++ if(padapter->intf_start) ++ { ++ padapter->intf_start(padapter); ++ } ++ ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer,5000); ++ ++ return _SUCCESS; ++ ++netdev_open_error: ++ //padapter->bup = _FALSE; ++ DBG_871X("-ips_netdrv_open - drv_open failure, bup=%d\n", padapter->bup); ++ ++ return _FAIL; ++} ++ ++ ++int rtw_ips_pwr_up(_adapter *padapter) ++{ ++ int result; ++ u32 start_time = rtw_get_current_time(); ++ DBG_871X("===> rtw_ips_pwr_up..............\n"); ++ rtw_reset_drv_sw(padapter); ++ ++ result = ips_netdrv_open(padapter); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ DBG_871X("<=== rtw_ips_pwr_up.............. in %dms\n", rtw_get_passing_time_ms(start_time)); ++ return result; ++ ++} ++ ++void rtw_ips_pwr_down(_adapter *padapter) ++{ ++ u32 start_time = rtw_get_current_time(); ++ DBG_871X("===> rtw_ips_pwr_down...................\n"); ++ ++ padapter->bCardDisableWOHSM = _TRUE; ++ padapter->net_closed = _TRUE; ++ ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ ++ rtw_ips_dev_unload(padapter); ++ padapter->bCardDisableWOHSM = _FALSE; ++ DBG_871X("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time)); ++} ++#endif ++void rtw_ips_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ DBG_871X("====> %s...\n",__FUNCTION__); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_FIFO_CLEARN_UP, 0); ++ ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ rtw_hal_deinit(padapter); ++ } ++ ++} ++ ++int pm_netdev_open(struct net_device *pnetdev,u8 bnormal) ++{ ++ int status; ++ if(bnormal) ++ status = netdev_open(pnetdev); ++#ifdef CONFIG_IPS ++ else ++ status = (_SUCCESS == ips_netdrv_open((_adapter *)rtw_netdev_priv(pnetdev)))?(0):(-1); ++#endif ++ ++ return status; ++} ++ ++static int netdev_close(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - drv_close\n")); ++ ++ if(padapter->pwrctrlpriv.bInternalAutoSuspend == _TRUE) ++ { ++ //rtw_pwr_wakeup(padapter); ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_off) ++ padapter->pwrctrlpriv.ps_flag = _TRUE; ++ } ++ padapter->net_closed = _TRUE; ++ ++/* if(!padapter->hw_init_completed) ++ { ++ DBG_871X("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++ ++ padapter->bDriverStopped = _TRUE; ++ ++ rtw_dev_unload(padapter); ++ } ++ else*/ ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_on){ ++ DBG_871X("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++ ++ //s1. ++ if(pnetdev) ++ { ++ if (!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_stop_queue(pnetdev); ++ } ++ ++#ifndef CONFIG_ANDROID ++ //s2. ++ LeaveAllPowerSaveMode(padapter); ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ //s2-2. indicate disconnect to os ++ rtw_indicate_disconnect(padapter); ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++ //s2-4. ++ rtw_free_network_queue(padapter,_TRUE); ++#endif ++ // Close LED ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ } ++ ++#ifdef CONFIG_BR_EXT ++ //if (OPMODE & (WIFI_STATION_STATE | WIFI_ADHOC_STATE)) ++ { ++ //void nat25_db_cleanup(_adapter *priv); ++ nat25_db_cleanup(padapter); ++ } ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_P2P ++#ifdef CONFIG_IOCTL_CFG80211 ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled == _TRUE) ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _FALSE; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_scan_abort(padapter); ++ wdev_to_priv(padapter->rtw_wdev)->bandroid_scan = _FALSE; ++ padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; //set this at the end ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - drv_close\n")); ++ DBG_871X("-871x_drv - drv_close, bup=%d\n", padapter->bup); ++ ++ return 0; ++} ++ ++void rtw_ndev_destructor(struct net_device *ndev) ++{ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (ndev->ieee80211_ptr) ++ rtw_mfree((u8 *)ndev->ieee80211_ptr, sizeof(struct wireless_dev)); ++#endif ++ free_netdev(ndev); ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/pci_intf.c +@@ -0,0 +1,1997 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_INTF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifndef CONFIG_PCI_HCI ++ ++#error "CONFIG_PCI_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifdef CONFIG_80211N_HT ++extern int rtw_ht_enable; ++extern int rtw_cbw40_enable; ++extern int rtw_ampdu_enable;//for enable tx_ampdu ++#endif ++ ++#ifdef CONFIG_PM ++extern int pm_netdev_open(struct net_device *pnetdev); ++static int rtw_suspend(struct pci_dev *pdev, pm_message_t state); ++static int rtw_resume(struct pci_dev *pdev); ++#endif ++ ++ ++static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *pdid); ++static void rtw_dev_remove(struct pci_dev *pdev); ++ ++static struct specific_device_id specific_device_id_tbl[] = { ++ {.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {} ++}; ++ ++struct pci_device_id rtw_pci_id_tbl[] = { ++#ifdef CONFIG_RTL8192C ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8191)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8178)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8177)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8176)}, ++#endif ++#ifdef CONFIG_RTL8192D ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8193)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x002B)}, ++#endif ++ {}, ++}; ++ ++struct pci_drv_priv { ++ struct pci_driver rtw_pci_drv; ++ int drv_registered; ++}; ++ ++ ++static struct pci_drv_priv pci_drvpriv = { ++ .rtw_pci_drv.name = (char*)DRV_NAME, ++ .rtw_pci_drv.probe = rtw_drv_init, ++ .rtw_pci_drv.remove = rtw_dev_remove, ++ .rtw_pci_drv.id_table = rtw_pci_id_tbl, ++#ifdef CONFIG_PM ++ .rtw_pci_drv.suspend = rtw_suspend, ++ .rtw_pci_drv.resume = rtw_resume, ++#else ++ .rtw_pci_drv.suspend = NULL, ++ .rtw_pci_drv.resume = NULL, ++#endif ++}; ++ ++ ++MODULE_DEVICE_TABLE(pci, rtw_pci_id_tbl); ++ ++ ++static u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = { ++ INTEL_VENDOR_ID, ++ ATI_VENDOR_ID, ++ AMD_VENDOR_ID, ++ SIS_VENDOR_ID ++}; ++ ++static u8 rtw_pci_platform_switch_device_pci_aspm(_adapter *padapter, u8 value) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ u8 bresult = _SUCCESS; ++ int error; ++ ++ value |= 0x40; ++ ++ error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x80, value); ++ ++ if(error != 0) ++ { ++ bresult = _FALSE; ++ DBG_871X("rtw_pci_platform_switch_device_pci_aspm error (%d)\n",error); ++ } ++ ++ return bresult; ++} ++ ++// ++// When we set 0x01 to enable clk request. Set 0x0 to disable clk req. ++// ++static u8 rtw_pci_switch_clk_req(_adapter *padapter, u8 value) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ u8 buffer, bresult = _SUCCESS; ++ int error; ++ ++ buffer = value; ++ ++ if(!padapter->hw_init_completed) ++ return bresult; ++ ++ error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x81, value); ++ ++ if(error != 0) ++ { ++ bresult = _FALSE; ++ DBG_871X("rtw_pci_switch_clk_req error (%d)\n",error); ++ } ++ ++ return bresult; ++} ++ ++#if 0 ++//Description: ++//Disable RTL8192SE ASPM & Disable Pci Bridge ASPM ++void rtw_pci_disable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u32 pcicfg_addrport = 0; ++ u8 num4bytes; ++ u8 linkctrl_reg; ++ u16 pcibridge_linkctrlreg, aspmlevel = 0; ++ ++ // When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ // if it is not intel bus then don't enable ASPM. ++ if ((pcipriv->busnumber == 0xff ++ && pcipriv->devnumber == 0xff ++ && pcipriv->funcnumber == 0xff) ++ || (pcipriv->pcibridge_busnum == 0xff ++ && pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ DBG_871X("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { ++ DBG_871X("%s(): Disable ASPM. Recognize the Bus of PCI(Bridge) as UNKNOWN.\n", __func__); ++ } ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ rtw_pci_switch_clk_req(padapter, 0x0); ++ } ++ ++ { ++ // Suggested by SD1 for promising device will in L0 state after an I/O. ++ u8 tmp_u1b; ++ ++ pci_read_config_byte(pdvobjpriv->ppcidev, 0x80, &tmp_u1b); ++ } ++ ++ // Retrieve original configuration settings. ++ linkctrl_reg = pcipriv->linkctrl_reg; ++ pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg; ++ ++ // Set corresponding value. ++ aspmlevel |= BIT(0) | BIT(1); ++ linkctrl_reg &= ~aspmlevel; ++ pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1)); ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg); ++ rtw_udelay_os(50); ++ ++ //When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ if ((pcipriv->busnumber == 0xff && ++ pcipriv->devnumber == 0xff && ++ pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && ++ pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ //Do Nothing!! ++ } ++ else ++ { ++ //4 //Disable Pci Bridge ASPM ++ pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) | ++ (pcipriv->pcibridge_devnum << 11) | ++ (pcipriv->pcibridge_funcnum << 8) | (1 << 31); ++ num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4; ++ ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg); ++ ++ DBG_871X("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg); ++ ++ rtw_udelay_os(50); ++ } ++} ++ ++//[ASPM] ++//Description: ++// Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for power saving ++// We should follow the sequence to enable RTL8192SE first then enable Pci Bridge ASPM ++// or the system will show bluescreen. ++void rtw_pci_enable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u16 aspmlevel = 0; ++ u32 pcicfg_addrport = 0; ++ u8 num4bytes; ++ u8 u_pcibridge_aspmsetting = 0; ++ u8 u_device_aspmsetting = 0; ++ ++ // When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ // if it is not intel bus then don't enable ASPM. ++ ++ if ((pcipriv->busnumber == 0xff ++ && pcipriv->devnumber == 0xff ++ && pcipriv->funcnumber == 0xff) ++ || (pcipriv->pcibridge_busnum == 0xff ++ && pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ DBG_871X("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++ //4 Enable Pci Bridge ASPM ++ pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) ++ | (pcipriv->pcibridge_devnum << 11) ++ | (pcipriv->pcibridge_funcnum << 8) | (1 << 31); ++ num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4; ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ ++ u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg | pdvobjpriv->const_hostpci_aspm_setting; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL || ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS) ++ u_pcibridge_aspmsetting &= ~BIT(0); ++ ++ NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting); ++ ++ DBG_871X("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), ++ u_pcibridge_aspmsetting); ++ ++ rtw_udelay_os(50); ++ ++ // Get ASPM level (with/without Clock Req) ++ aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting; ++ u_device_aspmsetting = pcipriv->linkctrl_reg; ++ u_device_aspmsetting |= aspmlevel; ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting); //(priv->linkctrl_reg | ASPMLevel)); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ } ++ ++ rtw_udelay_os(50); ++} ++ ++// ++//Description: ++//To get link control field by searching from PCIe capability lists. ++// ++static u8 ++rtw_get_link_control_field(_adapter *padapter, u8 busnum, u8 devnum, ++ u8 funcnum) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct rt_pci_capabilities_header capability_hdr; ++ u8 capability_offset, num4bytes; ++ u32 pcicfg_addrport = 0; ++ u8 linkctrl_reg; ++ u8 status = _FALSE; ++ ++ //If busnum, devnum, funcnum are set to 0xff. ++ if (busnum == 0xff && devnum == 0xff && funcnum == 0xff) { ++ DBG_871X("GetLinkControlField(): Fail to find PCIe Capability\n"); ++ return _FALSE; ++ } ++ ++ pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31); ++ ++ //2PCIeCap ++ ++ // The device supports capability lists. Find the capabilities. ++ num4bytes = 0x34 / 4; ++ //get capability_offset ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUchar(PCI_CONF_DATA, &capability_offset); ++ ++ // Loop through the capabilities in search of the power management capability. ++ // The list is NULL-terminated, so the last offset will always be zero. ++ ++ while (capability_offset != 0) { ++ // First find the number of 4 Byte. ++ num4bytes = capability_offset / 4; ++ ++ // Read the header of the capability at this offset. If the retrieved capability is not ++ // the power management capability that we are looking for, follow the link to the ++ // next capability and continue looping. ++ ++ //4 get capability_hdr ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUshort(PCI_CONF_DATA, (u16 *) & capability_hdr); ++ ++ // Found the PCI express capability ++ if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS) ++ { ++ break; ++ } ++ else ++ { ++ // This is some other capability. Keep looking for the PCI express capability. ++ capability_offset = capability_hdr.next; ++ } ++ } ++ ++ if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS) // ++ { ++ num4bytes = (capability_offset + 0x10) / 4; ++ ++ //4 Read Link Control Register ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUchar(PCI_CONF_DATA, &linkctrl_reg); ++ ++ pcipriv->pcibridge_pciehdr_offset = capability_offset; ++ pcipriv->pcibridge_linkctrlreg = linkctrl_reg; ++ ++ status = _TRUE; ++ } ++ else ++ { ++ // We didn't find a PCIe capability. ++ DBG_871X("GetLinkControlField(): Cannot Find PCIe Capability\n"); ++ } ++ ++ return status; ++} ++ ++// ++//Description: ++//To get PCI bus infomation and return busnum, devnum, and funcnum about ++//the bus(bridge) which the device binds. ++// ++static u8 ++rtw_get_pci_bus_info(_adapter *padapter, ++ u16 vendorid, ++ u16 deviceid, ++ u8 irql, u8 basecode, u8 subclass, u8 filed19val, ++ u8 * busnum, u8 * devnum, u8 * funcnum) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ u8 busnum_idx, devicenum_idx, functionnum_idx; ++ u32 pcicfg_addrport = 0; ++ u32 dev_venid = 0, classcode, field19, headertype; ++ u16 venId, devId; ++ u8 basec, subc, irqline; ++ u16 regoffset; ++ u8 b_singlefunc = _FALSE; ++ u8 b_bridgechk = _FALSE; ++ ++ *busnum = 0xFF; ++ *devnum = 0xFF; ++ *funcnum = 0xFF; ++ ++ //DBG_871X("==============>vendorid:%x,deviceid:%x,irql:%x\n", vendorid,deviceid,irql); ++ if ((basecode == PCI_CLASS_BRIDGE_DEV) && ++ (subclass == PCI_SUBCLASS_BR_PCI_TO_PCI) ++ && (filed19val == U1DONTCARE)) ++ b_bridgechk = _TRUE; ++ ++ // perform a complete pci bus scan operation ++ for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++) //255 ++ { ++ for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++) //32 ++ { ++ b_singlefunc = _FALSE; ++ for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++) //8 ++ { ++ // ++ // We have to skip redundant Bus scan to prevent unexpected system hang ++ // if single function is present in this device. ++ // 2009.02.26. ++ // ++ if (functionnum_idx == 0) { ++ //4 get header type (DWORD #3) ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &headertype); ++ headertype = ((headertype >> 16) & 0x0080) >> 7; // address 0x0e[7]. ++ if (headertype == 0) //Single function ++ b_singlefunc = _TRUE; ++ } ++ else ++ {//By pass the following scan process. ++ if (b_singlefunc == _TRUE) ++ break; ++ } ++ ++ // Set access enable control. ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ ++ //4 // Get vendorid/ deviceid ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid); ++ ++ // if data port is full of 1s, no device is present ++ // some broken boards return 0 if a slot is empty: ++ if (dev_venid == 0xFFFFFFFF || dev_venid == 0) ++ continue; //PCI_INVALID_VENDORID ++ ++ // 4 // Get irql ++ regoffset = 0x3C; ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ NdisRawReadPortUchar((PCI_CONF_DATA +(regoffset & 0x3)), &irqline); ++ ++ venId = (u16) (dev_venid >> 0) & 0xFFFF; ++ devId = (u16) (dev_venid >> 16) & 0xFFFF; ++ ++ // Check Vendor ID ++ if (!b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE)) ++ continue; ++ ++ // Check Device ID ++ if (!b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE)) ++ continue; ++ ++ // Check irql ++ if (!b_bridgechk && (irqline != irql) && (irql != U1DONTCARE)) ++ continue; ++ ++ //4 get Class Code ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &classcode); ++ classcode = classcode >> 8; ++ ++ basec = (u8) (classcode >> 16) & 0xFF; ++ subc = (u8) (classcode >> 8) & 0xFF; ++ if (b_bridgechk && (venId != vendorid) && (basec == basecode) && (subc == subclass)) ++ return _TRUE; ++ ++ // Check Vendor ID ++ if (b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE)) ++ continue; ++ ++ // Check Device ID ++ if (b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE)) ++ continue; ++ ++ // Check irql ++ if (b_bridgechk && (irqline != irql) && (irql != U1DONTCARE)) ++ continue; ++ ++ //4 get field 0x19 value (DWORD #6) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &field19); ++ field19 = (field19 >> 8) & 0xFF; ++ ++ //4 Matching Class Code and filed19. ++ if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) { ++ *busnum = busnum_idx; ++ *devnum = devicenum_idx; ++ *funcnum = functionnum_idx; ++ ++ DBG_871X("GetPciBusInfo(): Find Device(%X:%X) bus=%d dev=%d, func=%d\n", ++ vendorid, deviceid, busnum_idx, devicenum_idx, functionnum_idx); ++ return _TRUE; ++ } ++ } ++ } ++ } ++ ++ DBG_871X("GetPciBusInfo(): Cannot Find Device(%X:%X:%X)\n", vendorid, deviceid, dev_venid); ++ ++ return _FALSE; ++} ++ ++static u8 ++rtw_get_pci_brideg_info(_adapter *padapter, ++ u8 basecode, ++ u8 subclass, ++ u8 filed19val, u8 * busnum, u8 * devnum, ++ u8 * funcnum, u16 * vendorid, u16 * deviceid) ++{ ++ u8 busnum_idx, devicenum_idx, functionnum_idx; ++ u32 pcicfg_addrport = 0; ++ u32 dev_venid, classcode, field19, headertype; ++ u16 venId, devId; ++ u8 basec, subc, irqline; ++ u16 regoffset; ++ u8 b_singlefunc = _FALSE; ++ ++ *busnum = 0xFF; ++ *devnum = 0xFF; ++ *funcnum = 0xFF; ++ ++ // perform a complete pci bus scan operation ++ for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++) //255 ++ { ++ for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++) //32 ++ { ++ b_singlefunc = _FALSE; ++ for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++) //8 ++ { ++ // ++ // We have to skip redundant Bus scan to prevent unexpected system hang ++ // if single function is present in this device. ++ // 2009.02.26. ++ // ++ if (functionnum_idx == 0) ++ { ++ //4 get header type (DWORD #3) ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ //NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS , pcicfg_addrport + (3 << 2)); ++ //NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA, &headertype); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &headertype); ++ headertype = ((headertype >> 16) & 0x0080) >> 7; // address 0x0e[7]. ++ if (headertype == 0) //Single function ++ b_singlefunc = _TRUE; ++ } ++ else ++ {//By pass the following scan process. ++ if (b_singlefunc == _TRUE) ++ break; ++ } ++ ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ ++ //4 // Get vendorid/ deviceid ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid); ++ ++ //4 Get irql ++ regoffset = 0x3C; ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ NdisRawReadPortUchar((PCI_CONF_DATA + (regoffset & 0x3)), &irqline); ++ ++ venId = (u16) (dev_venid >> 0) & 0xFFFF; ++ devId = (u16) (dev_venid >> 16) & 0xFFFF; ++ ++ //4 get Class Code ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &classcode); ++ classcode = classcode >> 8; ++ ++ basec = (u8) (classcode >> 16) & 0xFF; ++ subc = (u8) (classcode >> 8) & 0xFF; ++ ++ //4 get field 0x19 value (DWORD #6) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &field19); ++ field19 = (field19 >> 8) & 0xFF; ++ ++ //4 Matching Class Code and filed19. ++ if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) { ++ *busnum = busnum_idx; ++ *devnum = devicenum_idx; ++ *funcnum = functionnum_idx; ++ *vendorid = venId; ++ *deviceid = devId; ++ ++ DBG_871X("GetPciBridegInfo : Find Device(%X:%X) bus=%d dev=%d, func=%d\n", ++ venId, devId, busnum_idx, devicenum_idx, functionnum_idx); ++ ++ return _TRUE; ++ } ++ } ++ } ++ } ++ ++ DBG_871X("GetPciBridegInfo(): Cannot Find PciBridge for Device\n"); ++ ++ return _FALSE; ++} // end of GetPciBridegInfo ++ ++// ++//Description: ++//To find specific bridge information. ++// ++static void rtw_find_bridge_info(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u8 pcibridge_busnum = 0xff; ++ u8 pcibridge_devnum = 0xff; ++ u8 pcibridge_funcnum = 0xff; ++ u16 pcibridge_vendorid = 0xff; ++ u16 pcibridge_deviceid = 0xff; ++ u8 tmp = 0; ++ ++ rtw_get_pci_brideg_info(padapter, ++ PCI_CLASS_BRIDGE_DEV, ++ PCI_SUBCLASS_BR_PCI_TO_PCI, ++ pcipriv->busnumber, ++ &pcibridge_busnum, ++ &pcibridge_devnum, &pcibridge_funcnum, ++ &pcibridge_vendorid, &pcibridge_deviceid); ++ ++ // match the array of vendor id and regonize which chipset is used. ++ pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN; ++ ++ for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) { ++ if (pcibridge_vendorid == pcibridge_vendors[tmp]) { ++ pcipriv->pcibridge_vendor = tmp; ++ DBG_871X("Pci Bridge Vendor is found index: %d\n", tmp); ++ break; ++ } ++ } ++ DBG_871X("Pci Bridge Vendor is %x\n", pcibridge_vendors[tmp]); ++ ++ // Update corresponding PCI bus info. ++ pcipriv->pcibridge_busnum = pcibridge_busnum; ++ pcipriv->pcibridge_devnum = pcibridge_devnum; ++ pcipriv->pcibridge_funcnum = pcibridge_funcnum; ++ pcipriv->pcibridge_vendorid = pcibridge_vendorid; ++ pcipriv->pcibridge_deviceid = pcibridge_deviceid; ++ ++} ++ ++static u8 ++rtw_get_amd_l1_patch(_adapter *padapter, u8 busnum, u8 devnum, ++ u8 funcnum) ++{ ++ u8 status = _FALSE; ++ u8 offset_e0; ++ unsigned offset_e4; ++ u32 pcicfg_addrport = 0; ++ ++ pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31); ++ ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0); ++ NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0); ++ ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0); ++ NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0); ++ ++ if (offset_e0 == 0xA0) ++ { ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4); ++ //DbgPrint("Offset E4 %x\n", offset_e4); ++ if (offset_e4 & BIT(23)) ++ status = _TRUE; ++ } ++ ++ return status; ++} ++#else ++/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/ ++void rtw_pci_disable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u8 linkctrl_reg; ++ u16 pcibridge_linkctrlreg; ++ u16 aspmlevel = 0; ++ ++ // We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM. ++ // Advertised by SD1 victorh. Added by tynli. 2009.11.23. ++ if(pdvobjpriv->const_pci_aspm == 0) ++ return; ++ ++ if(!padapter->hw_init_completed) ++ return; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s(): PCI(Bridge) UNKNOWN.\n", __FUNCTION__)); ++ return; ++ } ++ ++ linkctrl_reg = pcipriv->linkctrl_reg; ++ pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg; ++ ++ // Set corresponding value. ++ aspmlevel |= BIT(0) | BIT(1); ++ linkctrl_reg &=~aspmlevel; ++ pcibridge_linkctrlreg &=~aspmlevel; ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ rtw_pci_switch_clk_req(padapter, 0x0); ++ } ++ ++ { ++ /*for promising device will in L0 state after an I/O.*/ ++ u8 tmp_u1b; ++ pci_read_config_byte(pdev, 0x80, &tmp_u1b); ++ } ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg); ++ rtw_udelay_os(50); ++ ++ //When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, ++ // we do not execute any action and return. Added by tynli. ++ if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) ) ++ { ++ // Do Nothing!! ++ } ++ else ++ { ++ /*Disable Pci Bridge ASPM*/ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ //NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg); ++ pci_write_config_byte(bridge_pdev, pcipriv->pcibridge_pciehdr_offset + 0x10, pcibridge_linkctrlreg); ++ ++ DBG_871X("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg); ++ ++ rtw_udelay_os(50); ++ } ++ ++} ++ ++/*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for ++power saving We should follow the sequence to enable ++RTL8192SE first then enable Pci Bridge ASPM ++or the system will show bluescreen.*/ ++void rtw_pci_enable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u16 aspmlevel = 0; ++ u8 u_pcibridge_aspmsetting = 0; ++ u8 u_device_aspmsetting = 0; ++ u32 u_device_aspmsupportsetting = 0; ++ ++ // We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM. ++ // Advertised by SD1 victorh. Added by tynli. 2009.11.23. ++ if(pdvobjpriv->const_pci_aspm == 0) ++ return; ++ ++ //When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, ++ // we do not execute any action and return. Added by tynli. ++ if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) ) ++ { ++ DBG_871X("rtw_pci_enable_aspm(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++//Get Bridge ASPM Support ++//not to enable bridge aspm if bridge does not support ++//Added by sherry 20100803 ++ if (IS_HARDWARE_TYPE_8192DE(padapter)) ++ { ++ //PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11)|(pcipriv->pcibridge_funcnum << 8)|(1 << 31); ++ //Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x0C)/4; ++ //NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2)); ++ //NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA,&uDeviceASPMSupportSetting); ++ pci_read_config_dword(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x0C), &u_device_aspmsupportsetting); ++ DBG_871X("rtw_pci_enable_aspm(): Bridge ASPM support %x \n",u_device_aspmsupportsetting); ++ if(((u_device_aspmsupportsetting & BIT(11)) != BIT(11)) || ((u_device_aspmsupportsetting & BIT(10)) != BIT(10))) ++ { ++ if(pdvobjpriv->const_devicepci_aspm_setting == 3) ++ { ++ DBG_871X("rtw_pci_enable_aspm(): Bridge not support L0S or L1\n"); ++ return; ++ } ++ else if(pdvobjpriv->const_devicepci_aspm_setting == 2) ++ { ++ if((u_device_aspmsupportsetting & BIT(11)) != BIT(11)) ++ { ++ DBG_871X("rtw_pci_enable_aspm(): Bridge not support L1 \n"); ++ return; ++ } ++ } ++ else if(pdvobjpriv->const_devicepci_aspm_setting == 1) ++ { ++ if((u_device_aspmsupportsetting & BIT(10)) != BIT(10)) ++ { ++ DBG_871X("rtw_pci_enable_aspm(): Bridge not support L0s \n"); ++ return; ++ } ++ ++ } ++ } ++ else ++ { ++ DBG_871X("rtw_pci_enable_aspm(): Bridge support L0s and L1 \n"); ++ } ++ } ++ ++ ++ /*Enable Pci Bridge ASPM*/ ++ //PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11) |(pcipriv->pcibridge_funcnum << 8)|(1 << 31); ++ //Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x10)/4; ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, PciCfgAddrPort + (Num4Bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ ++ u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg; ++ u_pcibridge_aspmsetting |= pdvobjpriv->const_hostpci_aspm_setting; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL || ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS ) ++ u_pcibridge_aspmsetting &= ~BIT(0); // for intel host 42 device 43 ++ ++ //NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting); ++ pci_write_config_byte(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x10), u_pcibridge_aspmsetting); ++ ++ DBG_871X("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), ++ u_pcibridge_aspmsetting); ++ ++ rtw_udelay_os(50); ++ ++ /*Get ASPM level (with/without Clock Req)*/ ++ aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting; ++ u_device_aspmsetting = pcipriv->linkctrl_reg; ++ u_device_aspmsetting |= aspmlevel; // device 43 ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ } ++ ++ rtw_udelay_os(50); ++} ++ ++static u8 rtw_pci_get_amd_l1_patch(struct dvobj_priv *dvobj) ++{ ++ struct pci_dev *pdev = dvobj->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ u8 status = _FALSE; ++ u8 offset_e0; ++ u32 offset_e4; ++ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0); ++ //NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0); ++ pci_write_config_byte(bridge_pdev, 0xE0, 0xA0); ++ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0); ++ //NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0); ++ pci_read_config_byte(bridge_pdev, 0xE0, &offset_e0); ++ ++ if (offset_e0 == 0xA0) { ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4); ++ //NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4); ++ pci_read_config_dword(bridge_pdev, 0xE4, &offset_e4); ++ if (offset_e4 & BIT(23)) ++ status = _TRUE; ++ } ++ ++ return status; ++} ++ ++static void rtw_pci_get_linkcontrol_field(struct dvobj_priv *dvobj) ++{ ++ struct pci_priv *pcipriv = &(dvobj->pcipriv); ++ struct pci_dev *pdev = dvobj->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ u8 capabilityoffset = pcipriv->pcibridge_pciehdr_offset; ++ u8 linkctrl_reg; ++ ++ /*Read Link Control Register*/ ++ pci_read_config_byte(bridge_pdev, capabilityoffset + PCI_EXP_LNKCTL, &linkctrl_reg); ++ ++ pcipriv->pcibridge_linkctrlreg = linkctrl_reg; ++} ++#endif ++ ++static void rtw_pci_parse_configuration(struct dvobj_priv *dvobj) ++{ ++ struct pci_dev *pdev = dvobj->ppcidev; ++ struct pci_priv *pcipriv = &(dvobj->pcipriv); ++ u8 tmp; ++ int pos; ++ u8 linkctrl_reg; ++ ++ //Link Control Register ++ pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); ++ pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg); ++ pcipriv->linkctrl_reg = linkctrl_reg; ++ ++ //DBG_871X("Link Control Register = %x\n", pcipriv->linkctrl_reg); ++ ++ pci_read_config_byte(pdev, 0x98, &tmp); ++ tmp |= BIT(4); ++ pci_write_config_byte(pdev, 0x98, tmp); ++ ++ //tmp = 0x17; ++ //pci_write_config_byte(pdev, 0x70f, tmp); ++} ++ ++// ++// Update PCI dependent default settings. ++// ++static void rtw_pci_update_default_setting(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ //reset pPSC->reg_rfps_level & priv->b_support_aspm ++ pwrpriv->reg_rfps_level = 0; ++ pwrpriv->b_support_aspm = 0; ++ ++ // Dynamic Mechanism, ++ //rtw_hal_set_def_var(pAdapter, HAL_DEF_INIT_GAIN, &(pDevice->InitGainState)); ++ ++ // Update PCI ASPM setting ++ pwrpriv->const_amdpci_aspm = pdvobjpriv->const_amdpci_aspm; ++ switch (pdvobjpriv->const_pci_aspm) { ++ case 0: // No ASPM ++ break; ++ ++ case 1: // ASPM dynamically enabled/disable. ++ pwrpriv->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM; ++ break; ++ ++ case 2: // ASPM with Clock Req dynamically enabled/disable. ++ pwrpriv->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ break; ++ ++ case 3: // Always enable ASPM and Clock Req from initialization to halt. ++ pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM); ++ pwrpriv->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ break; ++ ++ case 4: // Always enable ASPM without Clock Req from initialization to halt. ++ pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ pwrpriv->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM; ++ break; ++ } ++ ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC; ++ ++ // Update Radio OFF setting ++ switch (pdvobjpriv->const_hwsw_rfoff_d3) { ++ case 1: ++ if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM) ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM; ++ break; ++ ++ case 2: ++ if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM) ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM; ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC; ++ break; ++ ++ case 3: ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3; ++ break; ++ } ++ ++ // Update Rx 2R setting ++ //pPSC->reg_rfps_level |= ((pDevice->RegLPS2RDisable) ? RT_RF_LPS_DISALBE_2R : 0); ++ ++ // ++ // Set HW definition to determine if it supports ASPM. ++ // ++ switch (pdvobjpriv->const_support_pciaspm) { ++ case 0: // Not support ASPM. ++ { ++ u8 b_support_aspm = _FALSE; ++ pwrpriv->b_support_aspm = b_support_aspm; ++ } ++ break; ++ ++ case 1: // Support ASPM. ++ { ++ u8 b_support_aspm = _TRUE; ++ u8 b_support_backdoor = _TRUE; ++ ++ pwrpriv->b_support_aspm = b_support_aspm; ++ ++ /*if(pAdapter->MgntInfo.CustomerID == RT_CID_TOSHIBA && ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD && ++ !pcipriv->amd_l1_patch) ++ b_support_backdoor = _FALSE;*/ ++ ++ pwrpriv->b_support_backdoor = b_support_backdoor; ++ } ++ break; ++ ++ case 2: // Set by Chipset. ++ // ASPM value set by chipset. ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) { ++ u8 b_support_aspm = _TRUE; ++ pwrpriv->b_support_aspm = b_support_aspm; ++ } ++ break; ++ ++ default: ++ // Do nothing. Set when finding the chipset. ++ break; ++ } ++} ++ ++static void rtw_pci_initialize_adapter_common(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ rtw_pci_update_default_setting(padapter); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) { ++ // Always enable ASPM & Clock Req. ++ rtw_pci_enable_aspm(padapter); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_PS_LEVEL_ALWAYS_ASPM); ++ } ++ ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++#define rtw_pci_interrupt(x,y,z) rtw_pci_interrupt(x,y) ++#endif ++ ++static irqreturn_t rtw_pci_interrupt(int irq, void *priv, struct pt_regs *regs) ++{ ++ struct dvobj_priv *dvobj = (struct dvobj_priv *)priv; ++ _adapter *adapter = dvobj->if1; ++ ++ if (dvobj->irq_enabled == 0) { ++ return IRQ_HANDLED; ++ } ++ ++ if(rtw_hal_interrupt_handler(adapter) == _FAIL) ++ return IRQ_HANDLED; ++ //return IRQ_NONE; ++ ++ return IRQ_HANDLED; ++} ++ ++#ifdef RTK_DMP_PLATFORM ++#define pci_iounmap(x,y) iounmap(y) ++#endif ++ ++int pci_alloc_irq(struct dvobj_priv *dvobj) ++{ ++ int err; ++ struct pci_dev *pdev = dvobj->ppcidev; ++ ++#if defined(IRQF_SHARED) ++ err = request_irq(pdev->irq, &rtw_pci_interrupt, IRQF_SHARED, DRV_NAME, dvobj); ++#else ++ err = request_irq(pdev->irq, &rtw_pci_interrupt, SA_SHIRQ, DRV_NAME, dvobj); ++#endif ++ if (err) { ++ DBG_871X("Error allocating IRQ %d",pdev->irq); ++ } else { ++ dvobj->irq_alloc = 1; ++ DBG_871X("Request_irq OK, IRQ %d\n",pdev->irq); ++ } ++ ++ return err?_FAIL:_SUCCESS; ++} ++ ++static struct dvobj_priv *pci_dvobj_init(struct pci_dev *pdev) ++{ ++ int err; ++ u32 status = _FAIL; ++ struct dvobj_priv *dvobj = NULL; ++ struct pci_priv *pcipriv = NULL; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ unsigned long pmem_start, pmem_len, pmem_flags; ++ u8 tmp; ++ ++_func_enter_; ++ ++ if ((dvobj = devobj_init()) == NULL) { ++ goto exit; ++ } ++ dvobj->ppcidev = pdev; ++ pcipriv = &(dvobj->pcipriv); ++ pci_set_drvdata(pdev, dvobj); ++ ++ if ( (err = pci_enable_device(pdev)) != 0) { ++ DBG_871X(KERN_ERR "%s : Cannot enable new PCI device\n", pci_name(pdev)); ++ goto free_dvobj; ++ } ++ ++#ifdef CONFIG_64BIT_DMA ++ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { ++ DBG_871X("RTL819xCE: Using 64bit DMA\n"); ++ if ((err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) != 0) { ++ DBG_871X(KERN_ERR "Unable to obtain 64bit DMA for consistent allocations\n"); ++ goto disable_picdev; ++ } ++ dvobj->bdma64 = _TRUE; ++ } else ++#endif ++ { ++ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { ++ if ((err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) { ++ DBG_871X(KERN_ERR "Unable to obtain 32bit DMA for consistent allocations\n"); ++ goto disable_picdev; ++ } ++ } ++ } ++ ++ pci_set_master(pdev); ++ ++ if ((err = pci_request_regions(pdev, DRV_NAME)) != 0) { ++ DBG_871X(KERN_ERR "Can't obtain PCI resources\n"); ++ goto disable_picdev; ++ } ++ //MEM map ++ pmem_start = pci_resource_start(pdev, 2); ++ pmem_len = pci_resource_len(pdev, 2); ++ pmem_flags = pci_resource_flags(pdev, 2); ++ ++#ifdef RTK_DMP_PLATFORM ++ dvobj->pci_mem_start = (unsigned long)ioremap_nocache(pmem_start, pmem_len); ++#else ++ dvobj->pci_mem_start = (unsigned long)pci_iomap(pdev, 2, pmem_len); /* shared mem start */ ++#endif ++ if (dvobj->pci_mem_start == 0) { ++ DBG_871X(KERN_ERR "Can't map PCI mem\n"); ++ goto release_regions; ++ } ++ ++ DBG_871X("Memory mapped space start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n", ++ pmem_start, pmem_len, pmem_flags, dvobj->pci_mem_start); ++ ++ // Disable Clk Request */ ++ pci_write_config_byte(pdev, 0x81, 0); ++ // leave D3 mode */ ++ pci_write_config_byte(pdev, 0x44, 0); ++ pci_write_config_byte(pdev, 0x04, 0x06); ++ pci_write_config_byte(pdev, 0x04, 0x07); ++ ++ ++#if 1 ++ /*find bus info*/ ++ pcipriv->busnumber = pdev->bus->number; ++ pcipriv->devnumber = PCI_SLOT(pdev->devfn); ++ pcipriv->funcnumber = PCI_FUNC(pdev->devfn); ++ ++ /*find bridge info*/ ++ pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN; ++ if(bridge_pdev){ ++ pcipriv->pcibridge_vendorid = bridge_pdev->vendor; ++ for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) { ++ if (bridge_pdev->vendor == pcibridge_vendors[tmp]) { ++ pcipriv->pcibridge_vendor = tmp; ++ DBG_871X("Pci Bridge Vendor is found index: %d, %x\n", tmp, pcibridge_vendors[tmp]); ++ break; ++ } ++ } ++ } ++ ++ //if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) { ++ if(bridge_pdev){ ++ pcipriv->pcibridge_busnum = bridge_pdev->bus->number; ++ pcipriv->pcibridge_devnum = PCI_SLOT(bridge_pdev->devfn); ++ pcipriv->pcibridge_funcnum = PCI_FUNC(bridge_pdev->devfn); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) ++ pcipriv->pcibridge_pciehdr_offset = pci_find_capability(bridge_pdev, PCI_CAP_ID_EXP); ++#else ++ pcipriv->pcibridge_pciehdr_offset = bridge_pdev->pcie_cap; ++#endif ++ ++ rtw_pci_get_linkcontrol_field(dvobj); ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) { ++ pcipriv->amd_l1_patch = rtw_pci_get_amd_l1_patch(dvobj); ++ } ++ } ++#else ++ // ++ // Find bridge related info. ++ // ++ rtw_get_pci_bus_info(padapter, ++ pdev->vendor, ++ pdev->device, ++ (u8) pdvobjpriv->irqline, ++ 0x02, 0x80, U1DONTCARE, ++ &pcipriv->busnumber, ++ &pcipriv->devnumber, ++ &pcipriv->funcnumber); ++ ++ rtw_find_bridge_info(padapter); ++ ++ if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) { ++ rtw_get_link_control_field(padapter, ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum); ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) { ++ pcipriv->amd_l1_patch = ++ rtw_get_amd_l1_patch(padapter, ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum); ++ } ++ } ++#endif ++ ++ // ++ // Allow the hardware to look at PCI config information. ++ // ++ rtw_pci_parse_configuration(dvobj); ++ ++ DBG_871X("pcidev busnumber:devnumber:funcnumber:" ++ "vendor:link_ctl %d:%d:%d:%x:%x\n", ++ pcipriv->busnumber, ++ pcipriv->devnumber, ++ pcipriv->funcnumber, ++ pdev->vendor, ++ pcipriv->linkctrl_reg); ++ ++ DBG_871X("pci_bridge busnumber:devnumber:funcnumber:vendor:" ++ "pcie_cap:link_ctl_reg: %d:%d:%d:%x:%x:%x:%x\n", ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ pcibridge_vendors[pcipriv->pcibridge_vendor], ++ pcipriv->pcibridge_pciehdr_offset, ++ pcipriv->pcibridge_linkctrlreg, ++ pcipriv->amd_l1_patch); ++ ++ status = _SUCCESS; ++ ++iounmap: ++ if (status != _SUCCESS && dvobj->pci_mem_start != 0) { ++ pci_iounmap(pdev, (void *)dvobj->pci_mem_start); ++ dvobj->pci_mem_start = 0; ++ } ++release_regions: ++ if (status != _SUCCESS) ++ pci_release_regions(pdev); ++disable_picdev: ++ if (status != _SUCCESS) ++ pci_disable_device(pdev); ++free_dvobj: ++ if (status != _SUCCESS && dvobj) { ++ pci_set_drvdata(pdev, NULL); ++ devobj_deinit(dvobj); ++ dvobj = NULL; ++ } ++exit: ++_func_exit_; ++ return dvobj; ++} ++ ++static void pci_dvobj_deinit(struct pci_dev *pdev) ++{ ++ struct dvobj_priv *dvobj = pci_get_drvdata(pdev); ++_func_enter_; ++ ++ pci_set_drvdata(pdev, NULL); ++ if (dvobj) { ++ if (dvobj->irq_alloc) { ++ free_irq(pdev->irq, dvobj); ++ dvobj->irq_alloc = 0; ++ } ++ ++ if (dvobj->pci_mem_start != 0) { ++ pci_iounmap(pdev, (void *)dvobj->pci_mem_start); ++ dvobj->pci_mem_start = 0; ++ } ++ ++ devobj_deinit(dvobj); ++ } ++ ++ pci_release_regions(pdev); ++ pci_disable_device(pdev); ++ ++_func_exit_; ++} ++ ++static void decide_chip_type_by_pci_device_id(_adapter *padapter, struct pci_dev *pdev) ++{ ++ u16 venderid, deviceid, irqline; ++ u8 revisionid; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ ++ ++ venderid = pdev->vendor; ++ deviceid = pdev->device; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) ++ pci_read_config_byte(pdev, PCI_REVISION_ID, &revisionid); // PCI_REVISION_ID 0x08 ++#else ++ revisionid = pdev->revision; ++#endif ++ pci_read_config_word(pdev, PCI_INTERRUPT_LINE, &irqline); // PCI_INTERRUPT_LINE 0x3c ++ pdvobjpriv->irqline = irqline; ++ ++ ++ // ++ // Decide hardware type here. ++ // ++ if( deviceid == HAL_HW_PCI_8185_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8188_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8198_DEVICE_ID) ++ { ++ DBG_871X("Adapter (8185/8185B) is found- VendorID/DeviceID=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType=HARDWARE_TYPE_RTL8185; ++ } ++ else if (deviceid == HAL_HW_PCI_8190_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0045_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0046_DEVICE_ID || ++ deviceid == HAL_HW_PCI_DLINK_DEVICE_ID) ++ { ++ DBG_871X("Adapter(8190 PCI) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8190P; ++ } ++ else if (deviceid == HAL_HW_PCI_8192_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0044_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0047_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8192SE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8174_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8173_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8172_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8171_DEVICE_ID) ++ { ++ // 8192e and and 8192se may have the same device ID 8192. However, their Revision ++ // ID is different ++ // Added for 92DE. We deferentiate it from SVID,SDID. ++ if( pdev->subsystem_vendor == 0x10EC && pdev->subsystem_device == 0xE020){ ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++ DBG_871X("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid); ++ }else{ ++ switch (revisionid) { ++ case HAL_HW_PCI_REVISION_ID_8192PCIE: ++ DBG_871X("Adapter(8192 PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192E; ++ break; ++ case HAL_HW_PCI_REVISION_ID_8192SE: ++ DBG_871X("Adapter(8192SE) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192SE; ++ break; ++ default: ++ DBG_871X("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192SE; ++ break; ++ } ++ } ++ } ++ else if(deviceid==HAL_HW_PCI_8723E_DEVICE_ID ) ++ {//RTL8723E may have the same device ID with RTL8192CET ++ padapter->HardwareType = HARDWARE_TYPE_RTL8723AE; ++ DBG_871X("Adapter(8723 PCI-E) is found - VendorID/DeviceID=%x/%x\n", venderid, deviceid); ++ } ++ else if (deviceid == HAL_HW_PCI_8192CET_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8192CE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8191CE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8188CE_DEVICE_ID) ++ { ++ DBG_871X("Adapter(8192C PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CE; ++ } ++ else if (deviceid == HAL_HW_PCI_8192DE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_002B_DEVICE_ID ){ ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++ DBG_871X("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid); ++ } ++ else ++ { ++ DBG_871X("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ //padapter->HardwareType = HAL_DEFAULT_HARDWARE_TYPE; ++ } ++ ++ ++ padapter->chip_type = NULL_CHIP_TYPE; ++ ++ //TODO: ++#ifdef CONFIG_RTL8192C ++ padapter->chip_type = RTL8188C_8192C; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CE; ++#endif ++#ifdef CONFIG_RTL8192D ++ pdvobjpriv->InterfaceNumber = revisionid; ++ ++ padapter->chip_type = RTL8192D; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++#endif ++ ++} ++ ++static void pci_intf_start(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_start\n")); ++ DBG_871X("+pci_intf_start\n"); ++ ++#ifdef CONFIG_PCILED_BLINK ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++#endif ++ //Enable hw interrupt ++ rtw_hal_enable_interrupt(padapter); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_start\n")); ++ DBG_871X("-pci_intf_start\n"); ++} ++ ++static void pci_intf_stop(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_stop\n")); ++ ++ //Disable hw interrupt ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //device still exists, so driver can do i/o operation ++ rtw_hal_disable_interrupt(padapter); ++ tasklet_disable(&(padapter->recvpriv.recv_tasklet)); ++ tasklet_disable(&(padapter->recvpriv.irq_prepare_beacon_tasklet)); ++ tasklet_disable(&(padapter->xmitpriv.xmit_tasklet)); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ /* This function only be called at driver removing. disable buddy_adapter too ++ don't disable interrupt of buddy_adapter because it is same as primary. ++ */ ++ if (padapter->pbuddy_adapter){ ++ tasklet_disable(&(padapter->pbuddy_adapter->recvpriv.recv_tasklet)); ++ tasklet_disable(&(padapter->pbuddy_adapter->recvpriv.irq_prepare_beacon_tasklet)); ++ tasklet_disable(&(padapter->pbuddy_adapter->xmitpriv.xmit_tasklet)); ++ } ++#endif ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("pci_intf_stop: SurpriseRemoved==_FALSE\n")); ++ } ++ else ++ { ++ // Clear irq_enabled to prevent handle interrupt function. ++ adapter_to_dvobj(padapter)->irq_enabled = 0; ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_stop\n")); ++ ++} ++ ++ ++static void rtw_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n")); ++ ++ if(padapter->bup == _TRUE) ++ { ++ DBG_871X("+rtw_dev_unload\n"); ++ ++ padapter->bDriverStopped = _TRUE; ++ #ifdef CONFIG_XMIT_ACK ++ if (padapter->xmitpriv.ack_tx) ++ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); ++ #endif ++ ++ //s3. ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s4. ++ rtw_stop_drv_threads(padapter); ++ ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ DBG_871X("r871x_dev_unload()->rtl871x_hal_deinit()\n"); ++ rtw_hal_deinit(padapter); ++ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ padapter->bup = _FALSE; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" )); ++ } ++ ++ DBG_871X("-rtw_dev_unload\n"); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n")); ++ ++} ++ ++static void disable_ht_for_spec_devid(const struct pci_device_id *pdid) ++{ ++#ifdef CONFIG_80211N_HT ++ u16 vid, pid; ++ u32 flags; ++ int i; ++ int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id); ++ ++ for(i=0; ivendor==vid) && (pdid->device==pid) && (flags&SPEC_DEV_ID_DISABLE_HT)) ++ { ++ rtw_ht_enable = 0; ++ rtw_cbw40_enable = 0; ++ rtw_ampdu_enable = 0; ++ } ++ ++ } ++#endif ++} ++ ++#ifdef CONFIG_PM ++static int rtw_suspend(struct pci_dev *pdev, pm_message_t state) ++{ ++ _func_enter_; ++ ++ ++ _func_exit_; ++ return 0; ++} ++ ++static int rtw_resume(struct pci_dev *pdev) ++{ ++ _func_enter_; ++ ++ ++ _func_exit_; ++ ++ return 0; ++} ++#endif ++ ++_adapter *rtw_pci_if1_init(struct dvobj_priv * dvobj, struct pci_dev *pdev, ++ const struct pci_device_id *pdid) ++{ ++ _adapter *padapter = NULL; ++ struct net_device *pnetdev = NULL; ++ int status = _FAIL; ++ ++ if ((padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter))) == NULL) { ++ goto exit; ++ } ++ padapter->dvobj = dvobj; ++ dvobj->if1 = padapter; ++ ++ padapter->bDriverStopped=_TRUE; ++ ++ dvobj->padapters[dvobj->iface_nums++] = padapter; ++ padapter->iface_id = IFACE_ID0; ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++ //set adapter_type/iface type for primary padapter ++ padapter->isprimary = _TRUE; ++ padapter->adapter_type = PRIMARY_ADAPTER; ++ #ifndef CONFIG_HWPORT_SWAP ++ padapter->iface_type = IFACE_PORT0; ++ #else ++ padapter->iface_type = IFACE_PORT1; ++ #endif ++#endif ++ ++ //step 1-1., decide the chip_type via vid/pid ++ padapter->interface_type = RTW_PCIE; ++ decide_chip_type_by_pci_device_id(padapter, pdev); ++ ++ if((pnetdev = rtw_init_netdev(padapter)) == NULL) { ++ goto free_adapter; ++ } ++ if (dvobj->bdma64) ++ pnetdev->features |= NETIF_F_HIGHDMA; ++ pnetdev->irq = pdev->irq; ++ SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); ++ padapter = rtw_netdev_priv(pnetdev); ++ ++ //step 2. hook HalFunc, allocate HalData ++ if (padapter->chip_type == RTL8188C_8192C) { ++ #ifdef CONFIG_RTL8192C ++ rtl8192ce_set_hal_ops(padapter); ++ #endif ++ } else if (padapter->chip_type == RTL8192D) { ++ #ifdef CONFIG_RTL8192D ++ rtl8192de_set_hal_ops(padapter); ++ #endif ++ } else { ++ DBG_871X("Detect NULL_CHIP_TYPE\n"); ++ goto free_hal_data; ++ } ++ ++ //step 3. initialize the dvobj_priv ++ padapter->intf_start=&pci_intf_start; ++ padapter->intf_stop=&pci_intf_stop; ++ ++ ++ //.2 ++ if ((rtw_init_io_priv(padapter, pci_set_intf_ops)) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ goto free_hal_data; ++ } ++ ++ //.3 ++ rtw_hal_read_chip_version(padapter); ++ ++ //.4 ++ rtw_hal_chip_configure(padapter); ++ ++ //step 4. read efuse/eeprom data and get mac_addr ++ rtw_hal_read_chip_info(padapter); ++ ++ if (rtw_handle_dualmac(padapter, 1) != _SUCCESS) ++ goto free_hal_data; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)) != 0) { ++ goto handle_dualmac; ++ } ++#endif ++ ++ //step 5. ++ if (rtw_init_drv_sw(padapter) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto free_wdev; ++ } ++ ++ status = rtw_hal_inirp_init(padapter); ++ if(status ==_FAIL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize PCI desc ring Failed!\n")); ++ goto free_drv_sw; ++ } ++ ++ rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); ++ rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); ++ ++ ++ rtw_hal_disable_interrupt(padapter); ++ ++ //step 6. Init pci related configuration ++ rtw_pci_initialize_adapter_common(padapter); ++ ++ DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" ++ ,padapter->bDriverStopped ++ ,padapter->bSurpriseRemoved ++ ,padapter->bup ++ ,padapter->hw_init_completed ++ ); ++ ++ status = _SUCCESS; ++ ++inirp_deinit: ++ if (status != _SUCCESS) ++ rtw_hal_inirp_deinit(padapter); ++free_drv_sw: ++ if (status != _SUCCESS) ++ rtw_free_drv_sw(padapter); ++free_wdev: ++ if (status != _SUCCESS) { ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_unregister(padapter->rtw_wdev); ++ rtw_wdev_free(padapter->rtw_wdev); ++ #endif ++ } ++handle_dualmac: ++ if (status != _SUCCESS) ++ rtw_handle_dualmac(padapter, 0); ++free_hal_data: ++ if (status != _SUCCESS && padapter->HalData) ++ rtw_mfree(padapter->HalData, sizeof(*(padapter->HalData))); ++free_adapter: ++ if (status != _SUCCESS) { ++ if (pnetdev) ++ rtw_free_netdev(pnetdev); ++ else if (padapter) ++ rtw_vmfree((u8*)padapter, sizeof(*padapter)); ++ padapter = NULL; ++ } ++exit: ++ return padapter; ++} ++ ++static void rtw_pci_if1_deinit(_adapter *if1) ++{ ++ struct net_device *pnetdev = if1->pnetdev; ++ struct mlme_priv *pmlmepriv= &if1->mlmepriv; ++ ++ // padapter->intf_stop(padapter); ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED)) ++ rtw_disassoc_cmd(if1, 0, _FALSE); ++ ++#ifdef CONFIG_AP_MODE ++ free_mlme_ap_info(if1); ++ #ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_unload(if1); ++ #endif ++#endif ++ ++ rtw_cancel_all_timer(if1); ++#ifdef CONFIG_WOWLAN ++ if1->pwrctrlpriv.wowlan_mode=_FALSE; ++#endif //CONFIG_WOWLAN ++ rtw_dev_unload(if1); ++ ++ DBG_871X("%s, hw_init_completed=%d\n", __func__, if1->hw_init_completed); ++ ++ //s6. ++ rtw_handle_dualmac(if1, 0); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (if1->rtw_wdev) ++ rtw_wdev_free(if1->rtw_wdev); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_hal_inirp_deinit(if1); ++ rtw_free_drv_sw(if1); ++ ++ if(pnetdev) ++ rtw_free_netdev(pnetdev); ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_871X("wlan link down\n"); ++ rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); ++#endif ++} ++ ++/* ++ * drv_init() - a device potentially for us ++ * ++ * notes: drv_init() is called when the bus driver has located a card for us to support. ++ * We accept the new device by returning 0. ++*/ ++static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *did) ++{ ++ int i, err = -ENODEV; ++ ++ int status; ++ _adapter *if1 = NULL, *if2 = NULL; ++ struct dvobj_priv *dvobj; ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n")); ++ ++ //step 0. ++ disable_ht_for_spec_devid(did); ++ ++ /* Initialize dvobj_priv */ ++ if ((dvobj = pci_dvobj_init(pdev)) == NULL) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); ++ goto exit; ++ } ++ ++ /* Initialize if1 */ ++ if ((if1 = rtw_pci_if1_init(dvobj, pdev, did)) == NULL) { ++ DBG_871X("rtw_pci_if1_init Failed!\n"); ++ goto free_dvobj; ++ } ++ ++ /* Initialize if2 */ ++#ifdef CONFIG_CONCURRENT_MODE ++ if((if2 = rtw_drv_if2_init(if1, pci_set_intf_ops)) == NULL) { ++ goto free_if1; ++ } ++#endif ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++ if (ui_pid[1]!=0) { ++ DBG_871X("ui_pid[1]:%d\n",ui_pid[1]); ++ rtw_signal_process(ui_pid[1], SIGUSR2); ++ } ++#endif ++ ++ //dev_alloc_name && register_netdev ++ if((status = rtw_drv_register_netdev(if1)) != _SUCCESS) { ++ goto free_if1; ++ } ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_init(if1); ++#endif ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_871X("wlan link up\n"); ++ rtd2885_wlan_netlink_sendMsg("linkup", "8712"); ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ rtw_proc_init_one(if1->pnetdev); ++#endif ++ ++ ++ /* alloc irq */ ++ if (pci_alloc_irq(dvobj) != _SUCCESS) ++ goto free_if2; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n")); ++ //DBG_871X("-871x_drv - drv_init, success!\n"); ++ ++ status = _SUCCESS; ++ ++free_if2: ++ if(status != _SUCCESS && if2) { ++ #ifdef CONFIG_CONCURRENT_MODE ++ rtw_drv_if2_stop(if2); ++ rtw_drv_if2_free(if2); ++ #endif ++ } ++free_if1: ++ if (status != _SUCCESS && if1) { ++ rtw_pci_if1_deinit(if1); ++ } ++free_dvobj: ++ if (status != _SUCCESS) ++ pci_dvobj_deinit(pdev); ++exit: ++ return status == _SUCCESS?0:-ENODEV; ++} ++ ++/* ++ * dev_remove() - our device is being removed ++*/ ++//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both ++static void rtw_dev_remove(struct pci_dev *pdev) ++{ ++ struct dvobj_priv *pdvobjpriv = pci_get_drvdata(pdev); ++ _adapter *padapter = pdvobjpriv->if1; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++_func_exit_; ++ ++ DBG_871X("+rtw_dev_remove\n"); ++ ++ pdvobjpriv->processing_dev_remove = _TRUE; ++ ++ if (unlikely(!padapter)) { ++ return; ++ } ++ ++ rtw_unregister_netdevs(pdvobjpriv); ++ ++ #if 0 ++#ifdef RTK_DMP_PLATFORM ++ padapter->bSurpriseRemoved = _FALSE; // always trate as device exists ++ // this will let the driver to disable it's interrupt ++#else ++ if(pci_drvpriv.drv_registered == _TRUE) ++ { ++ //DBG_871X("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n"); ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ /*else ++ { ++ //DBG_871X("r871xu_dev_remove():module removed\n"); ++ padapter->hw_init_completed = _FALSE; ++ }*/ ++#endif ++ #endif ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(&padapter->pwrctrlpriv); ++#endif ++ ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); ++ ++ LeaveAllPowerSaveMode(padapter); ++ ++ rtw_hal_disable_interrupt(padapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ rtw_drv_if2_stop(pdvobjpriv->if2); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ rtw_pci_if1_deinit(padapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ rtw_drv_if2_free(pdvobjpriv->if2); ++#endif ++ ++ pci_dvobj_deinit(pdev); ++ ++ DBG_871X("-r871xu_dev_remove, done\n"); ++ ++_func_exit_; ++ return; ++} ++ ++ ++static int __init rtw_drv_entry(void) ++{ ++ int ret = 0; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n")); ++ DBG_871X("rtw driver version=%s\n", DRIVERVERSION); ++ DBG_871X("Build at: %s %s\n", __DATE__, __TIME__); ++ pci_drvpriv.drv_registered = _TRUE; ++ ++ rtw_suspend_lock_init(); ++ ++ ret = pci_register_driver(&pci_drvpriv.rtw_pci_drv); ++ if (ret) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, (": No device found\n")); ++ } ++ ++ return ret; ++} ++ ++static void __exit rtw_drv_halt(void) ++{ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n")); ++ DBG_871X("+rtw_drv_halt\n"); ++ ++ pci_drvpriv.drv_registered = _FALSE; ++ ++ pci_unregister_driver(&pci_drvpriv.rtw_pci_drv); ++ ++ rtw_suspend_lock_uninit(); ++ DBG_871X("-rtw_drv_halt\n"); ++ ++ rtw_mstat_dump(); ++} ++ ++ ++module_init(rtw_drv_entry); ++module_exit(rtw_drv_halt); ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/pci_ops_linux.c +@@ -0,0 +1,24 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#define _PCI_OPS_LINUX_C_ ++ ++#include ++ ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/recv_linux.c +@@ -0,0 +1,461 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RECV_OSDEP_C_ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++//init os related resource in struct recv_priv ++int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter) ++{ ++ int res=_SUCCESS; ++ ++ return res; ++} ++ ++//alloc os related resource in union recv_frame ++int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe) ++{ ++ int res=_SUCCESS; ++ ++ precvframe->u.hdr.pkt_newalloc = precvframe->u.hdr.pkt = NULL; ++ ++ return res; ++ ++} ++ ++//free os related resource in union recv_frame ++void rtw_os_recv_resource_free(struct recv_priv *precvpriv) ++{ ++ ++} ++ ++ ++//alloc os related resource in struct recv_buf ++int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ int res=_SUCCESS; ++ ++#ifdef CONFIG_USB_HCI ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ precvbuf->irp_pending = _FALSE; ++ precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); ++ if(precvbuf->purb == NULL){ ++ res = _FAIL; ++ } ++ ++ precvbuf->pskb = NULL; ++ ++ precvbuf->reuse = _FALSE; ++ ++ precvbuf->pallocated_buf = precvbuf->pbuf = NULL; ++ ++ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; ++ ++ precvbuf->transfer_len = 0; ++ ++ precvbuf->len = 0; ++ ++ #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ precvbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)precvbuf->alloc_sz, &precvbuf->dma_transfer_addr); ++ precvbuf->pbuf = precvbuf->pallocated_buf; ++ if(precvbuf->pallocated_buf == NULL) ++ return _FAIL; ++ #endif //CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++#endif //CONFIG_USB_HCI ++ ++ return res; ++} ++ ++//free os related resource in struct recv_buf ++int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ int ret = _SUCCESS; ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ rtw_usb_buffer_free(pusbd, (size_t)precvbuf->alloc_sz, precvbuf->pallocated_buf, precvbuf->dma_transfer_addr); ++ precvbuf->pallocated_buf = NULL; ++ precvbuf->dma_transfer_addr = 0; ++ ++#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ if(precvbuf->purb) ++ { ++ //usb_kill_urb(precvbuf->purb); ++ usb_free_urb(precvbuf->purb); ++ } ++ ++#endif //CONFIG_USB_HCI ++ ++ ++ if(precvbuf->pskb) ++ rtw_skb_free(precvbuf->pskb); ++ ++ ++ return ret; ++ ++} ++ ++void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) ++{ ++#ifdef CONFIG_IOCTL_CFG80211 ++ enum nl80211_key_type key_type = 0; ++#endif ++ union iwreq_data wrqu; ++ struct iw_michaelmicfailure ev; ++ struct mlme_priv* pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u32 cur_time = 0; ++ ++ if( psecuritypriv->last_mic_err_time == 0 ) ++ { ++ psecuritypriv->last_mic_err_time = rtw_get_current_time(); ++ } ++ else ++ { ++ cur_time = rtw_get_current_time(); ++ ++ if( cur_time - psecuritypriv->last_mic_err_time < 60*HZ ) ++ { ++ psecuritypriv->btkip_countermeasure = _TRUE; ++ psecuritypriv->last_mic_err_time = 0; ++ psecuritypriv->btkip_countermeasure_time = cur_time; ++ } ++ else ++ { ++ psecuritypriv->last_mic_err_time = rtw_get_current_time(); ++ } ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ( bgroup ) ++ { ++ key_type |= NL80211_KEYTYPE_GROUP; ++ } ++ else ++ { ++ key_type |= NL80211_KEYTYPE_PAIRWISE; ++ } ++ ++ cfg80211_michael_mic_failure(padapter->pnetdev, (u8 *)&pmlmepriv->assoc_bssid[ 0 ], key_type, -1, ++ NULL, GFP_ATOMIC); ++#endif ++ ++ _rtw_memset( &ev, 0x00, sizeof( ev ) ); ++ if ( bgroup ) ++ { ++ ev.flags |= IW_MICFAILURE_GROUP; ++ } ++ else ++ { ++ ev.flags |= IW_MICFAILURE_PAIRWISE; ++ } ++ ++ ev.src_addr.sa_family = ARPHRD_ETHER; ++ _rtw_memcpy( ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ ++ _rtw_memset( &wrqu, 0x00, sizeof( wrqu ) ); ++ wrqu.data.length = sizeof( ev ); ++ ++ wireless_send_event( padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu, (char*) &ev ); ++} ++ ++void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_HOSTAPD_MLME ++ _pkt *skb; ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pmgnt_netdev = phostapdpriv->pmgnt_netdev; ++ ++ RT_TRACE(_module_recv_osdep_c_, _drv_info_, ("+rtw_hostapd_mlme_rx\n")); ++ ++ skb = precv_frame->u.hdr.pkt; ++ ++ if (skb == NULL) ++ return; ++ ++ skb->data = precv_frame->u.hdr.rx_data; ++ skb->tail = precv_frame->u.hdr.rx_tail; ++ skb->len = precv_frame->u.hdr.len; ++ ++ //pskb_copy = rtw_skb_copy(skb); ++// if(skb == NULL) goto _exit; ++ ++ skb->dev = pmgnt_netdev; ++ skb->ip_summed = CHECKSUM_NONE; ++ skb->pkt_type = PACKET_OTHERHOST; ++ //skb->protocol = __constant_htons(0x0019); /*ETH_P_80211_RAW*/ ++ skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/ ++ ++ //DBG_871X("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len); ++ ++ //skb->mac.raw = skb->data; ++ skb_reset_mac_header(skb); ++ ++ //skb_pull(skb, 24); ++ _rtw_memset(skb->cb, 0, sizeof(skb->cb)); ++ ++ rtw_netif_rx(pmgnt_netdev, skb); ++ ++ precv_frame->u.hdr.pkt = NULL; // set pointer to NULL before rtw_free_recvframe() if call rtw_netif_rx() ++#endif ++} ++ ++int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct recv_priv *precvpriv; ++ _queue *pfree_recv_queue; ++ _pkt *skb; ++ struct mlme_priv*pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ void *br_port = NULL; ++#endif ++ ++_func_enter_; ++ ++ precvpriv = &(padapter->recvpriv); ++ pfree_recv_queue = &(precvpriv->free_recv_queue); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ if (drvext_rx_handler(padapter, precv_frame->u.hdr.rx_data, precv_frame->u.hdr.len) == _SUCCESS) ++ { ++ goto _recv_indicatepkt_drop; ++ } ++#endif ++ ++ skb = precv_frame->u.hdr.pkt; ++ if(skb == NULL) ++ { ++ RT_TRACE(_module_recv_osdep_c_,_drv_err_,("rtw_recv_indicatepkt():skb==NULL something wrong!!!!\n")); ++ goto _recv_indicatepkt_drop; ++ } ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():skb != NULL !!!\n")); ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():precv_frame->u.hdr.rx_head=%p precv_frame->hdr.rx_data=%p\n", precv_frame->u.hdr.rx_head, precv_frame->u.hdr.rx_data)); ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("precv_frame->hdr.rx_tail=%p precv_frame->u.hdr.rx_end=%p precv_frame->hdr.len=%d \n", precv_frame->u.hdr.rx_tail, precv_frame->u.hdr.rx_end, precv_frame->u.hdr.len)); ++ ++ skb->data = precv_frame->u.hdr.rx_data; ++ ++ skb_set_tail_pointer(skb, precv_frame->u.hdr.len); ++ ++ skb->len = precv_frame->u.hdr.len; ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n skb->head=%p skb->data=%p skb->tail=%p skb->end=%p skb->len=%d\n", skb->head, skb->data, skb->tail, skb->end, skb->len)); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _pkt *pskb2=NULL; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ int bmcast = IS_MCAST(pattrib->dst); ++ ++ //DBG_871X("bmcast=%d\n", bmcast); ++ ++ if(_rtw_memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)==_FALSE) ++ { ++ //DBG_871X("not ap psta=%p, addr=%pM\n", psta, pattrib->dst); ++ ++ if(bmcast) ++ { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ pskb2 = rtw_skb_clone(skb); ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ } ++ ++ if(psta) ++ { ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ ++ //DBG_871X("directly forwarding to the rtw_xmit_entry\n"); ++ ++ //skb->ip_summed = CHECKSUM_NONE; ++ skb->dev = pnetdev; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ skb_set_queue_mapping(skb, rtw_recv_select_queue(skb)); ++#endif //LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35) ++ ++ _rtw_xmit_entry(skb, pnetdev); ++ ++ if(bmcast) ++ skb = pskb2; ++ else ++ goto _recv_indicatepkt_end; ++ } ++ ++ ++ } ++ else// to APself ++ { ++ //DBG_871X("to APSelf\n"); ++ } ++ } ++ ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); ++ if (nat25_handle_frame(padapter, skb) == -1) { ++ //priv->ext_stats.rx_data_drops++; ++ //DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); ++ //return FAIL; ++#if 1 ++ // bypass this frame to upper layer!! ++#else ++ goto _recv_indicatepkt_drop; ++#endif ++ } ++ } ++ ++#endif // CONFIG_BR_EXT ++ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ //DBG_871X("CHECKSUM_UNNECESSARY \n"); ++ } else { ++ skb->ip_summed = CHECKSUM_NONE; ++ //DBG_871X("CHECKSUM_NONE(%d, %d) \n", pattrib->tcpchk_valid, pattrib->tcp_chkrpt); ++ } ++#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ ++ ++ skb->ip_summed = CHECKSUM_NONE; ++ ++#endif ++ ++ skb->dev = padapter->pnetdev; ++ skb->protocol = eth_type_trans(skb, padapter->pnetdev); ++ ++ rtw_netif_rx(padapter->pnetdev, skb); ++ ++_recv_indicatepkt_end: ++ ++ precv_frame->u.hdr.pkt = NULL; // pointers to NULL before rtw_free_recvframe() ++ ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n rtw_recv_indicatepkt :after rtw_netif_rx!!!!\n")); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++_recv_indicatepkt_drop: ++ ++ //enqueue back to free_recv_queue ++ if(precv_frame) ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ ++ return _FAIL; ++ ++_func_exit_; ++ ++} ++ ++void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++#ifdef CONFIG_USB_HCI ++ ++ precvbuf->ref_cnt--; ++ ++ //free skb in recv_buf ++ rtw_skb_free(precvbuf->pskb); ++ ++ precvbuf->pskb = NULL; ++ precvbuf->reuse = _FALSE; ++ ++ if(precvbuf->irp_pending == _FALSE) ++ { ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ ++ ++#endif ++#ifdef CONFIG_SDIO_HCI ++ precvbuf->pskb = NULL; ++#endif ++ ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++void _rtw_reordering_ctrl_timeout_handler(void *FunctionContext); ++void _rtw_reordering_ctrl_timeout_handler(void *FunctionContext) ++#else ++void _rtw_reordering_ctrl_timeout_handler(struct timer_list *t); ++void _rtw_reordering_ctrl_timeout_handler(struct timer_list *t) ++#endif ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext; ++#else ++ struct recv_reorder_ctrl *preorder_ctrl = from_timer(preorder_ctrl, t, reordering_ctrl_timer); ++#endif ++ rtw_reordering_ctrl_timeout_handler(preorder_ctrl); ++} ++ ++void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl) ++{ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) ++ _adapter *padapter = preorder_ctrl->padapter; ++ ++ _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, _rtw_reordering_ctrl_timeout_handler, preorder_ctrl); ++#else ++ timer_setup(&preorder_ctrl->reordering_ctrl_timer, _rtw_reordering_ctrl_timeout_handler, 0); ++#endif ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/rtw_android.c +@@ -0,0 +1,839 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) ++#include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) ++#include ++#else ++#include ++#endif ++#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ ++ ++const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { ++ "START", ++ "STOP", ++ "SCAN-ACTIVE", ++ "SCAN-PASSIVE", ++ "RSSI", ++ "LINKSPEED", ++ "RXFILTER-START", ++ "RXFILTER-STOP", ++ "RXFILTER-ADD", ++ "RXFILTER-REMOVE", ++ "BTCOEXSCAN-START", ++ "BTCOEXSCAN-STOP", ++ "BTCOEXMODE", ++ "SETSUSPENDOPT", ++ "P2P_DEV_ADDR", ++ "SETFWPATH", ++ "SETBAND", ++ "GETBAND", ++ "COUNTRY", ++ "P2P_SET_NOA", ++ "P2P_GET_NOA", ++ "P2P_SET_PS", ++ "SET_AP_WPS_P2P_IE", ++#ifdef PNO_SUPPORT ++ "PNOSSIDCLR", ++ "PNOSETUP ", ++ "PNOFORCE", ++ "PNODEBUG", ++#endif ++ ++ "MACADDR", ++ ++ "BLOCK", ++ "WFD-ENABLE", ++ "WFD-DISABLE", ++ "WFD-SET-TCPPORT", ++ "WFD-SET-MAXTPUT", ++ "WFD-SET-DEVTYPE", ++}; ++ ++#ifdef PNO_SUPPORT ++#define PNO_TLV_PREFIX 'S' ++#define PNO_TLV_VERSION '1' ++#define PNO_TLV_SUBVERSION '2' ++#define PNO_TLV_RESERVED '0' ++#define PNO_TLV_TYPE_SSID_IE 'S' ++#define PNO_TLV_TYPE_TIME 'T' ++#define PNO_TLV_FREQ_REPEAT 'R' ++#define PNO_TLV_FREQ_EXPO_MAX 'M' ++ ++typedef struct cmd_tlv { ++ char prefix; ++ char version; ++ char subver; ++ char reserved; ++} cmd_tlv_t; ++#endif /* PNO_SUPPORT */ ++ ++typedef struct android_wifi_priv_cmd { ++ ++#ifdef CONFIG_COMPAT ++ compat_uptr_t buf; ++#else ++ char *buf; ++#endif ++ ++ int used_len; ++ int total_len; ++} android_wifi_priv_cmd; ++ ++/** ++ * Local (static) functions and variables ++ */ ++ ++/* Initialize g_wifi_on to 1 so dhd_bus_start will be called for the first ++ * time (only) in dhd_open, subsequential wifi on will be handled by ++ * wl_android_wifi_on ++ */ ++static int g_wifi_on = _TRUE; ++ ++ ++#ifdef PNO_SUPPORT ++static int wl_android_set_pno_setup(struct net_device *dev, char *command, int total_len) ++{ ++ wlc_ssid_t ssids_local[MAX_PFN_LIST_COUNT]; ++ int res = -1; ++ int nssid = 0; ++ cmd_tlv_t *cmd_tlv_temp; ++ char *str_ptr; ++ int tlv_size_left; ++ int pno_time = 0; ++ int pno_repeat = 0; ++ int pno_freq_expo_max = 0; ++ ++#ifdef PNO_SET_DEBUG ++ int i; ++ char pno_in_example[] = { ++ 'P', 'N', 'O', 'S', 'E', 'T', 'U', 'P', ' ', ++ 'S', '1', '2', '0', ++ 'S', ++ 0x05, ++ 'd', 'l', 'i', 'n', 'k', ++ 'S', ++ 0x04, ++ 'G', 'O', 'O', 'G', ++ 'T', ++ '0', 'B', ++ 'R', ++ '2', ++ 'M', ++ '2', ++ 0x00 ++ }; ++#endif /* PNO_SET_DEBUG */ ++ ++ DHD_INFO(("%s: command=%s, len=%d\n", __FUNCTION__, command, total_len)); ++ ++ if (total_len < (strlen(CMD_PNOSETUP_SET) + sizeof(cmd_tlv_t))) { ++ DBG_871X("%s argument=%d less min size\n", __FUNCTION__, total_len); ++ goto exit_proc; ++ } ++ ++#ifdef PNO_SET_DEBUG ++ memcpy(command, pno_in_example, sizeof(pno_in_example)); ++ for (i = 0; i < sizeof(pno_in_example); i++) ++ printf("%02X ", command[i]); ++ printf("\n"); ++ total_len = sizeof(pno_in_example); ++#endif ++ ++ str_ptr = command + strlen(CMD_PNOSETUP_SET); ++ tlv_size_left = total_len - strlen(CMD_PNOSETUP_SET); ++ ++ cmd_tlv_temp = (cmd_tlv_t *)str_ptr; ++ memset(ssids_local, 0, sizeof(ssids_local)); ++ ++ if ((cmd_tlv_temp->prefix == PNO_TLV_PREFIX) && ++ (cmd_tlv_temp->version == PNO_TLV_VERSION) && ++ (cmd_tlv_temp->subver == PNO_TLV_SUBVERSION)) { ++ ++ str_ptr += sizeof(cmd_tlv_t); ++ tlv_size_left -= sizeof(cmd_tlv_t); ++ ++ if ((nssid = wl_iw_parse_ssid_list_tlv(&str_ptr, ssids_local, ++ MAX_PFN_LIST_COUNT, &tlv_size_left)) <= 0) { ++ DBG_871X("SSID is not presented or corrupted ret=%d\n", nssid); ++ goto exit_proc; ++ } else { ++ if ((str_ptr[0] != PNO_TLV_TYPE_TIME) || (tlv_size_left <= 1)) { ++ DBG_871X("%s scan duration corrupted field size %d\n", ++ __FUNCTION__, tlv_size_left); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_time = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s: pno_time=%d\n", __FUNCTION__, pno_time)); ++ ++ if (str_ptr[0] != 0) { ++ if ((str_ptr[0] != PNO_TLV_FREQ_REPEAT)) { ++ DBG_871X("%s pno repeat : corrupted field\n", ++ __FUNCTION__); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_repeat = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s :got pno_repeat=%d\n", __FUNCTION__, pno_repeat)); ++ if (str_ptr[0] != PNO_TLV_FREQ_EXPO_MAX) { ++ DBG_871X("%s FREQ_EXPO_MAX corrupted field size\n", ++ __FUNCTION__); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_freq_expo_max = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s: pno_freq_expo_max=%d\n", ++ __FUNCTION__, pno_freq_expo_max)); ++ } ++ } ++ } else { ++ DBG_871X("%s get wrong TLV command\n", __FUNCTION__); ++ goto exit_proc; ++ } ++ ++ res = dhd_dev_pno_set(dev, ssids_local, nssid, pno_time, pno_repeat, pno_freq_expo_max); ++ ++exit_proc: ++ return res; ++} ++#endif /* PNO_SUPPORT */ ++ ++int rtw_android_cmdstr_to_num(char *cmdstr) ++{ ++ int cmd_num; ++ for(cmd_num=0 ; cmd_nummlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ int bytes_written = 0; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ bytes_written += snprintf(&command[bytes_written], total_len, "%s rssi %d", ++ pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); ++ } ++ ++ return bytes_written; ++} ++ ++int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ int bytes_written = 0; ++ u16 link_speed = 0; ++ ++ link_speed = rtw_get_cur_max_rate(padapter)/10; ++ bytes_written = snprintf(command, total_len, "LinkSpeed %d", link_speed); ++ ++ return bytes_written; ++} ++ ++int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ int bytes_written = 0; ++ ++ bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr)); ++ return bytes_written; ++} ++ ++int rtw_android_set_country(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *country_code = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_COUNTRY]) + 1; ++ int ret = _FAIL; ++ ++ ret = rtw_set_country(adapter, country_code); ++ ++ return (ret==_SUCCESS)?0:-1; ++} ++ ++int rtw_android_get_p2p_dev_addr(struct net_device *net, char *command, int total_len) ++{ ++ int bytes_written = 0; ++ ++ //We use the same address as our HW MAC address ++ _rtw_memcpy(command, net->dev_addr, ETH_ALEN); ++ ++ bytes_written = ETH_ALEN; ++ return bytes_written; ++} ++ ++int rtw_android_set_block(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK]) + 1; ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ wdev_to_priv(adapter->rtw_wdev)->block = (*block_value=='0')?_FALSE:_TRUE; ++ #endif ++ ++ return 0; ++} ++ ++int rtw_android_setband(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SETBAND]) + 1; ++ u32 band = GHZ_MAX; ++ int ret = _FAIL; ++ ++ sscanf(arg, "%u", &band); ++ ret = rtw_set_band(adapter, band); ++ ++ return (ret==_SUCCESS)?0:-1; ++} ++ ++int rtw_android_getband(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ int bytes_written = 0; ++ ++ bytes_written = snprintf(command, total_len, "%u", adapter->setband); ++ ++ return bytes_written; ++} ++ ++int get_int_from_command( char* pcmd ) ++{ ++ int i = 0; ++ ++ for( i = 0; i < strlen( pcmd ); i++ ) ++ { ++ if ( pcmd[ i ] == '=' ) ++ { ++ // Skip the '=' and space characters. ++ i += 2; ++ break; ++ } ++ } ++ return ( rtw_atoi( pcmd + i ) ); ++} ++ ++int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) ++{ ++ int ret = 0; ++ char *command = NULL; ++ int cmd_num; ++ int bytes_written = 0; ++ android_wifi_priv_cmd priv_cmd; ++ ++ rtw_lock_suspend(); ++ ++ if (!ifr->ifr_data) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (copy_from_user(&priv_cmd, ifr->ifr_data, sizeof(android_wifi_priv_cmd))) { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ command = rtw_zmalloc(priv_cmd.total_len); ++ if (!command) ++ { ++ DBG_871X("%s: failed to allocate memory\n", __FUNCTION__); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)){ ++ DBG_871X("%s: failed to access memory\n", __FUNCTION__); ++ ret = -EFAULT; ++ goto exit; ++ } ++ if (copy_from_user(command, (void *)priv_cmd.buf, priv_cmd.total_len)) { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ DBG_871X("%s: Android private cmd \"%s\" on %s\n" ++ , __FUNCTION__, command, ifr->ifr_name); ++ ++ cmd_num = rtw_android_cmdstr_to_num(command); ++ ++ switch(cmd_num) { ++ case ANDROID_WIFI_CMD_START: ++ //bytes_written = wl_android_wifi_on(net); ++ goto response; ++ case ANDROID_WIFI_CMD_SETFWPATH: ++ goto response; ++ } ++ ++ if (!g_wifi_on) { ++ DBG_871X("%s: Ignore private cmd \"%s\" - iface %s is down\n" ++ ,__FUNCTION__, command, ifr->ifr_name); ++ ret = 0; ++ goto exit; ++ } ++ ++ switch(cmd_num) { ++ ++ case ANDROID_WIFI_CMD_STOP: ++ //bytes_written = wl_android_wifi_off(net); ++ break; ++ ++ case ANDROID_WIFI_CMD_SCAN_ACTIVE: ++ //rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_ACTIVE); ++#ifdef CONFIG_PLATFORM_MSTAR ++#ifdef CONFIG_IOCTL_CFG80211 ++ (wdev_to_priv(net->ieee80211_ptr))->bandroid_scan = _TRUE; ++#endif //CONFIG_IOCTL_CFG80211 ++#endif //CONFIG_PLATFORM_MSTAR ++ break; ++ case ANDROID_WIFI_CMD_SCAN_PASSIVE: ++ //rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_PASSIVE); ++ break; ++ ++ case ANDROID_WIFI_CMD_RSSI: ++ bytes_written = rtw_android_get_rssi(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_LINKSPEED: ++ bytes_written = rtw_android_get_link_speed(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_MACADDR: ++ bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_BLOCK: ++ bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_RXFILTER_START: ++ //bytes_written = net_os_set_packet_filter(net, 1); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_STOP: ++ //bytes_written = net_os_set_packet_filter(net, 0); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_ADD: ++ //int filter_num = *(command + strlen(CMD_RXFILTER_ADD) + 1) - '0'; ++ //bytes_written = net_os_rxfilter_add_remove(net, TRUE, filter_num); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_REMOVE: ++ //int filter_num = *(command + strlen(CMD_RXFILTER_REMOVE) + 1) - '0'; ++ //bytes_written = net_os_rxfilter_add_remove(net, FALSE, filter_num); ++ break; ++ ++ case ANDROID_WIFI_CMD_BTCOEXSCAN_START: ++ /* TBD: BTCOEXSCAN-START */ ++ break; ++ case ANDROID_WIFI_CMD_BTCOEXSCAN_STOP: ++ /* TBD: BTCOEXSCAN-STOP */ ++ break; ++ case ANDROID_WIFI_CMD_BTCOEXMODE: ++ #if 0 ++ uint mode = *(command + strlen(CMD_BTCOEXMODE) + 1) - '0'; ++ if (mode == 1) ++ net_os_set_packet_filter(net, 0); /* DHCP starts */ ++ else ++ net_os_set_packet_filter(net, 1); /* DHCP ends */ ++#ifdef WL_CFG80211 ++ bytes_written = wl_cfg80211_set_btcoex_dhcp(net, command); ++#endif ++ #endif ++ break; ++ ++ case ANDROID_WIFI_CMD_SETSUSPENDOPT: ++ //bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_SETBAND: ++ bytes_written = rtw_android_setband(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_GETBAND: ++ bytes_written = rtw_android_getband(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_COUNTRY: ++ bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); ++ break; ++ ++#ifdef PNO_SUPPORT ++ case ANDROID_WIFI_CMD_PNOSSIDCLR_SET: ++ //bytes_written = dhd_dev_pno_reset(net); ++ break; ++ case ANDROID_WIFI_CMD_PNOSETUP_SET: ++ //bytes_written = wl_android_set_pno_setup(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_PNOENABLE_SET: ++ //uint pfn_enabled = *(command + strlen(CMD_PNOENABLE_SET) + 1) - '0'; ++ //bytes_written = dhd_dev_pno_enable(net, pfn_enabled); ++ break; ++#endif ++ ++ case ANDROID_WIFI_CMD_P2P_DEV_ADDR: ++ bytes_written = rtw_android_get_p2p_dev_addr(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_P2P_SET_NOA: ++ //int skip = strlen(CMD_P2P_SET_NOA) + 1; ++ //bytes_written = wl_cfg80211_set_p2p_noa(net, command + skip, priv_cmd.total_len - skip); ++ break; ++ case ANDROID_WIFI_CMD_P2P_GET_NOA: ++ //bytes_written = wl_cfg80211_get_p2p_noa(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_P2P_SET_PS: ++ //int skip = strlen(CMD_P2P_SET_PS) + 1; ++ //bytes_written = wl_cfg80211_set_p2p_ps(net, command + skip, priv_cmd.total_len - skip); ++ break; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ case ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE: ++ { ++ int skip = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE]) + 3; ++ bytes_written = rtw_cfg80211_set_mgnt_wpsp2pie(net, command + skip, priv_cmd.total_len - skip, *(command + skip - 2) - '0'); ++ break; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_WFD ++ case ANDROID_WIFI_CMD_WFD_ENABLE: ++ { ++ // Commented by Albert 2012/07/24 ++ // We can enable the WFD function by using the following command: ++ // wpa_cli driver wfd-enable ++ ++ struct wifi_display_info *pwfd_info; ++ _adapter* padapter = ( _adapter * ) rtw_netdev_priv(net); ++ ++ pwfd_info = &padapter->wfd_info; ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ pwfd_info->wfd_enable = _TRUE; ++ break; ++ } ++ ++ case ANDROID_WIFI_CMD_WFD_DISABLE: ++ { ++ // Commented by Albert 2012/07/24 ++ // We can disable the WFD function by using the following command: ++ // wpa_cli driver wfd-disable ++ ++ struct wifi_display_info *pwfd_info; ++ _adapter* padapter = ( _adapter * ) rtw_netdev_priv(net); ++ ++ pwfd_info = &padapter->wfd_info; ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ pwfd_info->wfd_enable = _FALSE; ++ break; ++ } ++ case ANDROID_WIFI_CMD_WFD_SET_TCPPORT: ++ { ++ // Commented by Albert 2012/07/24 ++ // We can set the tcp port number by using the following command: ++ // wpa_cli driver wfd-set-tcpport = 554 ++ ++ struct wifi_display_info *pwfd_info; ++ _adapter* padapter = ( _adapter * ) rtw_netdev_priv(net); ++ ++ pwfd_info = &padapter->wfd_info; ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ pwfd_info->rtsp_ctrlport = ( u16 ) get_int_from_command( priv_cmd.buf ); ++ break; ++ } ++ case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: ++ { ++ ++ ++ break; ++ } ++ case ANDROID_WIFI_CMD_WFD_SET_DEVTYPE: ++ { ++ // Commented by Albert 2012/08/28 ++ // Specify the WFD device type ( WFD source/primary sink ) ++ ++ struct wifi_display_info *pwfd_info; ++ _adapter* padapter = ( _adapter * ) rtw_netdev_priv(net); ++ ++ pwfd_info = &padapter->wfd_info; ++ if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) ++ { ++ pwfd_info->wfd_device_type = ( u8 ) get_int_from_command( priv_cmd.buf ); ++ ++ pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL; ++ } ++ break; ++ } ++#endif ++ default: ++ DBG_871X("Unknown PRIVATE command %s - ignored\n", command); ++ snprintf(command, 3, "OK"); ++ bytes_written = strlen("OK"); ++ } ++ ++response: ++ if (bytes_written >= 0) { ++ if ((bytes_written == 0) && (priv_cmd.total_len > 0)) ++ command[0] = '\0'; ++ if (bytes_written >= priv_cmd.total_len) { ++ DBG_871X("%s: bytes_written = %d\n", __FUNCTION__, bytes_written); ++ bytes_written = priv_cmd.total_len; ++ } else { ++ bytes_written++; ++ } ++ priv_cmd.used_len = bytes_written; ++ if (copy_to_user((void *)priv_cmd.buf, command, bytes_written)) { ++ DBG_871X("%s: failed to copy data to user buffer\n", __FUNCTION__); ++ ret = -EFAULT; ++ } ++ } ++ else { ++ ret = bytes_written; ++ } ++ ++exit: ++ rtw_unlock_suspend(); ++ if (command) { ++ rtw_mfree(command, priv_cmd.total_len); ++ } ++ ++ return ret; ++} ++ ++ ++/** ++ * Functions for Android WiFi card detection ++ */ ++#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) ++ ++static int g_wifidev_registered = 0; ++static struct semaphore wifi_control_sem; ++static struct wifi_platform_data *wifi_control_data = NULL; ++static struct resource *wifi_irqres = NULL; ++ ++static int wifi_add_dev(void); ++static void wifi_del_dev(void); ++ ++int rtw_android_wifictrl_func_add(void) ++{ ++ int ret = 0; ++ sema_init(&wifi_control_sem, 0); ++ ++ ret = wifi_add_dev(); ++ if (ret) { ++ DBG_871X("%s: platform_driver_register failed\n", __FUNCTION__); ++ return ret; ++ } ++ g_wifidev_registered = 1; ++ ++ /* Waiting callback after platform_driver_register is done or exit with error */ ++ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) { ++ ret = -EINVAL; ++ DBG_871X("%s: platform_driver_register timeout\n", __FUNCTION__); ++ } ++ ++ return ret; ++} ++ ++void rtw_android_wifictrl_func_del(void) ++{ ++ if (g_wifidev_registered) ++ { ++ wifi_del_dev(); ++ g_wifidev_registered = 0; ++ } ++} ++ ++void *wl_android_prealloc(int section, unsigned long size) ++{ ++ void *alloc_ptr = NULL; ++ if (wifi_control_data && wifi_control_data->mem_prealloc) { ++ alloc_ptr = wifi_control_data->mem_prealloc(section, size); ++ if (alloc_ptr) { ++ DBG_871X("success alloc section %d\n", section); ++ if (size != 0L) ++ memset(alloc_ptr, 0, size); ++ return alloc_ptr; ++ } ++ } ++ ++ DBG_871X("can't alloc section %d\n", section); ++ return NULL; ++} ++ ++int wifi_get_irq_number(unsigned long *irq_flags_ptr) ++{ ++ if (wifi_irqres) { ++ *irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK; ++ return (int)wifi_irqres->start; ++ } ++#ifdef CUSTOM_OOB_GPIO_NUM ++ return CUSTOM_OOB_GPIO_NUM; ++#else ++ return -1; ++#endif ++} ++ ++int wifi_set_power(int on, unsigned long msec) ++{ ++ DBG_871X("%s = %d\n", __FUNCTION__, on); ++ if (wifi_control_data && wifi_control_data->set_power) { ++ wifi_control_data->set_power(on); ++ } ++ if (msec) ++ msleep(msec); ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) ++int wifi_get_mac_addr(unsigned char *buf) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ if (!buf) ++ return -EINVAL; ++ if (wifi_control_data && wifi_control_data->get_mac_addr) { ++ return wifi_control_data->get_mac_addr(buf); ++ } ++ return -EOPNOTSUPP; ++} ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) */ ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) || defined(COMPAT_KERNEL_RELEASE) ++void *wifi_get_country_code(char *ccode) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ if (!ccode) ++ return NULL; ++ if (wifi_control_data && wifi_control_data->get_country_code) { ++ return wifi_control_data->get_country_code(ccode); ++ } ++ return NULL; ++} ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) */ ++ ++static int wifi_set_carddetect(int on) ++{ ++ DBG_871X("%s = %d\n", __FUNCTION__, on); ++ if (wifi_control_data && wifi_control_data->set_carddetect) { ++ wifi_control_data->set_carddetect(on); ++ } ++ return 0; ++} ++ ++static int wifi_probe(struct platform_device *pdev) ++{ ++ struct wifi_platform_data *wifi_ctrl = ++ (struct wifi_platform_data *)(pdev->dev.platform_data); ++ ++ DBG_871X("## %s\n", __FUNCTION__); ++ wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "bcmdhd_wlan_irq"); ++ if (wifi_irqres == NULL) ++ wifi_irqres = platform_get_resource_byname(pdev, ++ IORESOURCE_IRQ, "bcm4329_wlan_irq"); ++ wifi_control_data = wifi_ctrl; ++ ++ wifi_set_power(1, 0); /* Power On */ ++ wifi_set_carddetect(1); /* CardDetect (0->1) */ ++ ++ up(&wifi_control_sem); ++ return 0; ++} ++ ++static int wifi_remove(struct platform_device *pdev) ++{ ++ struct wifi_platform_data *wifi_ctrl = ++ (struct wifi_platform_data *)(pdev->dev.platform_data); ++ ++ DBG_871X("## %s\n", __FUNCTION__); ++ wifi_control_data = wifi_ctrl; ++ ++ wifi_set_power(0, 0); /* Power Off */ ++ wifi_set_carddetect(0); /* CardDetect (1->0) */ ++ ++ up(&wifi_control_sem); ++ return 0; ++} ++ ++static int wifi_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ DBG_871X("##> %s\n", __FUNCTION__); ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) ++ bcmsdh_oob_intr_set(0); ++#endif ++ return 0; ++} ++ ++static int wifi_resume(struct platform_device *pdev) ++{ ++ DBG_871X("##> %s\n", __FUNCTION__); ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) ++ if (dhd_os_check_if_up(bcmsdh_get_drvdata())) ++ bcmsdh_oob_intr_set(1); ++#endif ++ return 0; ++} ++ ++/* temporarily use these two */ ++static struct platform_driver wifi_device = { ++ .probe = wifi_probe, ++ .remove = wifi_remove, ++ .suspend = wifi_suspend, ++ .resume = wifi_resume, ++ .driver = { ++ .name = "bcmdhd_wlan", ++ } ++}; ++ ++static struct platform_driver wifi_device_legacy = { ++ .probe = wifi_probe, ++ .remove = wifi_remove, ++ .suspend = wifi_suspend, ++ .resume = wifi_resume, ++ .driver = { ++ .name = "bcm4329_wlan", ++ } ++}; ++ ++static int wifi_add_dev(void) ++{ ++ DBG_871X("## Calling platform_driver_register\n"); ++ platform_driver_register(&wifi_device); ++ platform_driver_register(&wifi_device_legacy); ++ return 0; ++} ++ ++static void wifi_del_dev(void) ++{ ++ DBG_871X("## Unregister platform_driver_register\n"); ++ platform_driver_unregister(&wifi_device); ++ platform_driver_unregister(&wifi_device_legacy); ++} ++#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/usb_intf.c +@@ -0,0 +1,1662 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_INTF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifndef CONFIG_USB_HCI ++ ++#error "CONFIG_USB_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++#include ++#ifdef CONFIG_PLATFORM_RTK_DMP ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifdef CONFIG_80211N_HT ++extern int rtw_ht_enable; ++extern int rtw_cbw40_enable; ++extern int rtw_ampdu_enable;//for enable tx_ampdu ++#endif ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++int ui_pid[3] = {0, 0, 0}; ++#endif ++ ++ ++extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal); ++static int rtw_suspend(struct usb_interface *intf, pm_message_t message); ++static int rtw_resume(struct usb_interface *intf); ++int rtw_resume_process(_adapter *padapter); ++ ++ ++static int rtw_drv_init(struct usb_interface *pusb_intf,const struct usb_device_id *pdid); ++static void rtw_dev_remove(struct usb_interface *pusb_intf); ++ ++#define USB_VENDER_ID_REALTEK 0x0BDA ++ ++/* DID_USB_v915_20121224 */ ++#define RTL8192C_USB_IDS \ ++ /*=== Realtek demoboard ===*/ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8191)},/* Default ID */ \ ++ /****** 8188CUS ********/ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8176)},/* 8188cu 1*1 dongole */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170)},/* 8188CE-VAU USB minCard */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817E)},/* 8188CE-VAU USB minCard */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817A)},/* 8188cu Slim Solo */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817B)},/* 8188cu Slim Combo */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817D)},/* 8188RU High-power USB Dongle */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754)},/* 8188 Combo for BC4 */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817F)},/* 8188RU */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x818A)},/* RTL8188CUS-VL */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x018A)},/* RTL8188CTV */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x17C0)}, /* RTK demoboard - USB-N10E */ \ ++ /****** 8192CUS ********/ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177)},/* 8191cu 1*2 */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8178)},/* 8192cu 2*2 */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817C)},/* 8192CE-VAU USB minCard */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8191)},/* 8192CU 2*2 */ \ ++ {USB_DEVICE(0x1058, 0x0631)},/* Alpha, 8192CU */ \ ++ /*=== Customer ID ===*/ \ ++ /****** 8188CUS Dongle ********/ \ ++ {USB_DEVICE(0x2019, 0xED17)},/* PCI - Edimax */ \ ++ {USB_DEVICE(0x0DF6, 0x0052)},/* Sitecom - Edimax */ \ ++ {USB_DEVICE(0x7392, 0x7811)},/* Edimax - Edimax */ \ ++ {USB_DEVICE(0x07B8, 0x8188)},/* Abocom - Abocom */ \ ++ {USB_DEVICE(0x07B8, 0x8189)},/* Abocom - Abocom */ \ ++ {USB_DEVICE(0x0EB0, 0x9071)},/* NO Brand - Etop */ \ ++ {USB_DEVICE(0x06F8, 0xE033)},/* Hercules - Edimax */ \ ++ {USB_DEVICE(0x103C, 0x1629)},/* HP - Lite-On ,8188CUS Slim Combo */ \ ++ {USB_DEVICE(0x2001, 0x3308)},/* D-Link - Alpha */ \ ++ {USB_DEVICE(0x050D, 0x1102)},/* Belkin - Edimax */ \ ++ {USB_DEVICE(0x050D, 0x11F2)},/* ISY - Edimax */ \ ++ {USB_DEVICE(0x2019, 0xAB2A)},/* Planex - Abocom */ \ ++ {USB_DEVICE(0x20F4, 0x648B)},/* TRENDnet - Cameo */ \ ++ {USB_DEVICE(0x4855, 0x0090)},/* - Feixun */ \ ++ {USB_DEVICE(0x13D3, 0x3357)},/* - AzureWave */ \ ++ {USB_DEVICE(0x0DF6, 0x005C)},/* Sitecom - Edimax */ \ ++ {USB_DEVICE(0x0BDA, 0x5088)},/* Thinkware - CC&C */ \ ++ {USB_DEVICE(0x4856, 0x0091)},/* NetweeN - Feixun */ \ ++ {USB_DEVICE(0x0846, 0x9041)}, /* Netgear - Cameo */ \ ++ {USB_DEVICE(0x0846, 0x9042)}, /* On Networks - N150MA */ \ ++ {USB_DEVICE(0x0846, 0x9043)}, /* Netgear N150 -WNA1000M */ \ ++ {USB_DEVICE(0x2019, 0x4902)},/* Planex - Etop */ \ ++ {USB_DEVICE(0x2019, 0xAB2E)},/* SW-WF02-AD15 -Abocom */ \ ++ {USB_DEVICE(0x2001, 0x330B)}, /* D-LINK - T&W */ \ ++ {USB_DEVICE(0xCDAB, 0x8010)}, /* - - compare */ \ ++ {USB_DEVICE(0x0B05, 0x17BA)}, /* ASUS - Edimax */ \ ++ {USB_DEVICE(0x0BDA, 0x1E1E)}, /* Intel - - */ \ ++ {USB_DEVICE(0x04BB, 0x094c)}, /* I-O DATA - Edimax */ \ ++ /****** 8188CTV ********/ \ ++ {USB_DEVICE(0xCDAB, 0x8011)}, /* - - compare */ \ ++ {USB_DEVICE(0x0BDA, 0x0A8A)}, /* Sony - Foxconn */ \ ++ /****** 8188 RU ********/ \ ++ {USB_DEVICE(0x0BDA, 0x317F)},/* Netcore,Netcore */ \ ++ /****** 8188CE-VAU ********/ \ ++ {USB_DEVICE(0x13D3, 0x3359)},/* - Azwave */ \ ++ {USB_DEVICE(0x13D3, 0x3358)},/* - Azwave */ \ ++ /****** 8188CUS Slim Solo********/ \ ++ {USB_DEVICE(0x04F2, 0xAFF7)},/* XAVI - XAVI */ \ ++ {USB_DEVICE(0x04F2, 0xAFF9)},/* XAVI - XAVI */ \ ++ {USB_DEVICE(0x04F2, 0xAFFA)},/* XAVI - XAVI */ \ ++ /****** 8188CUS Slim Combo ********/ \ ++ {USB_DEVICE(0x04F2, 0xAFF8)},/* XAVI - XAVI */ \ ++ {USB_DEVICE(0x04F2, 0xAFFB)},/* XAVI - XAVI */ \ ++ {USB_DEVICE(0x04F2, 0xAFFC)},/* XAVI - XAVI */ \ ++ {USB_DEVICE(0x2019, 0x1201)},/* Planex - Vencer */ \ ++ /****** 8192CUS Dongle ********/ \ ++ {USB_DEVICE(0x2001, 0x3307)},/* D-Link - Cameo */ \ ++ {USB_DEVICE(0x2001, 0x330A)},/* D-Link - Alpha */ \ ++ {USB_DEVICE(0x2001, 0x3309)},/* D-Link - Alpha */ \ ++ {USB_DEVICE(0x2001, 0x330D)},/* D-Link DWA-131 (H/W Ver. B1) */ \ ++ {USB_DEVICE(0x0586, 0x341F)},/* Zyxel - Abocom */ \ ++ {USB_DEVICE(0x7392, 0x7822)},/* Edimax - Edimax */ \ ++ {USB_DEVICE(0x2019, 0xAB2B)},/* Planex - Abocom */ \ ++ {USB_DEVICE(0x07B8, 0x8178)},/* Abocom - Abocom */ \ ++ {USB_DEVICE(0x07AA, 0x0056)},/* ATKK - Gemtek */ \ ++ {USB_DEVICE(0x4855, 0x0091)},/* - Feixun */ \ ++ {USB_DEVICE(0x050D, 0x2102)},/* Belkin - Sercomm */ \ ++ {USB_DEVICE(0x050D, 0x2103)},/* Belkin - Edimax */ \ ++ {USB_DEVICE(0x050D, 0x21F2)},/* Belkin - Edimax */ \ ++ {USB_DEVICE(0x20F4, 0x624D)},/* TRENDnet */ \ ++ {USB_DEVICE(0x0DF6, 0x0061)},/* Sitecom - Edimax */ \ ++ {USB_DEVICE(0x0B05, 0x17AB)},/* ASUS - Edimax */ \ ++ {USB_DEVICE(0x0846, 0x9021)},/* Netgear - Sercomm */ \ ++ {USB_DEVICE(0x0846, 0xF001)}, /* Netgear - Sercomm */ \ ++ {USB_DEVICE(0x0E66, 0x0019)},/* Hawking,Edimax */ \ ++ {USB_DEVICE(0x0E66, 0x0020)}, /* Hawking - Edimax */ \ ++ {USB_DEVICE(0x050D, 0x1004)}, /* Belkin - Edimax */ \ ++ {USB_DEVICE(0x0BDA, 0x2E2E)}, /* Intel - - */ \ ++ {USB_DEVICE(0x2357, 0x0100)}, /* TP-Link - TP-Link */ \ ++ {USB_DEVICE(0x06F8, 0xE035)}, /* Hercules - Edimax */ \ ++ {USB_DEVICE(0x04BB, 0x0950)}, /* IO-DATA - Edimax */ \ ++ {USB_DEVICE(0x0DF6, 0x0070)}, /* Sitecom - Edimax */ \ ++ {USB_DEVICE(0x0789, 0x016D)}, /* LOGITEC - Edimax */ \ ++ /****** 8192CE-VAU ********/ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8186)},/* Intel-Xavi( Azwave) */ ++ ++#define RTL8192D_USB_IDS \ ++ /*=== Realtek demoboard ===*/ \ ++ /****** 8192DU ********/ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8193)},/* 8192DU-VC */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8194)},/* 8192DU-VS */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8111)},/* Realtek 5G dongle for WiFi Display */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0193)},/* 8192DE-VAU */ \ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8171)},/* 8192DU-VC */ \ ++ /*=== Customer ID ===*/ \ ++ /****** 8192DU-VC ********/ \ ++ {USB_DEVICE(0x2019, 0xAB2C)},/* PCI - Abocm */ \ ++ {USB_DEVICE(0x2019, 0x4903)},/* PCI - ETOP */ \ ++ {USB_DEVICE(0x2019, 0x4904)},/* PCI - ETOP */ \ ++ {USB_DEVICE(0x07B8, 0x8193)},/* Abocom - Abocom */ \ ++ /****** 8192DU-VS ********/ \ ++ {USB_DEVICE(0x20F4, 0x664B)}, /* TRENDnet - Cameo */ \ ++ {USB_DEVICE(0x04DD, 0x954F)}, /* Sharp */ \ ++ {USB_DEVICE(0x04DD, 0x96A6)}, /* Sharp */ \ ++ {USB_DEVICE(0x050D, 0x110A)}, /* Belkin - Edimax */ \ ++ {USB_DEVICE(0x050D, 0x1105)}, /* Belkin - Edimax */ \ ++ {USB_DEVICE(0x050D, 0x120A)}, /* Belkin - Edimax */ \ ++ {USB_DEVICE(0x1668, 0x8102)}, /* - */ \ ++ {USB_DEVICE(0x0BDA, 0xE194)}, /* - Edimax */ \ ++ /****** 8192DU-WiFi Display Dongle ********/ \ ++ {USB_DEVICE(0x2019, 0xAB2D)},/* Planex - Abocom ,5G dongle for WiFi Display */ ++ ++#ifndef CONFIG_RTL8192C ++ #undef RTL8192C_USB_IDS ++ #define RTL8192C_USB_IDS ++#endif ++#ifndef CONFIG_RTL8192D ++ #undef RTL8192D_USB_IDS ++ #define RTL8192D_USB_IDS ++#endif ++ ++ ++static struct usb_device_id rtw_usb_id_tbl[] ={ ++ RTL8192C_USB_IDS ++ RTL8192D_USB_IDS ++ {} /* Terminating entry */ ++}; ++MODULE_DEVICE_TABLE(usb, rtw_usb_id_tbl); ++ ++int const rtw_usb_id_len = sizeof(rtw_usb_id_tbl) / sizeof(struct usb_device_id); ++ ++static struct specific_device_id specific_device_id_tbl[] = { ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8177, .flags=SPEC_DEV_ID_DISABLE_HT},//8188cu 1*1 dongole, (b/g mode only) ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x817E, .flags=SPEC_DEV_ID_DISABLE_HT},//8188CE-VAU USB minCard (b/g mode only) ++ {.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3359, .flags=SPEC_DEV_ID_DISABLE_HT},//Russian customer -Azwave (8188CE-VAU g mode) ++#ifdef RTK_DMP_PLATFORM ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8111, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // Realtek 5G dongle for WiFi Display ++ {.idVendor=0x2019, .idProduct=0xAB2D, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // PCI-Abocom 5G dongle for WiFi Display ++#endif /* RTK_DMP_PLATFORM */ ++ {} ++}; ++ ++struct rtw_usb_drv { ++ struct usb_driver usbdrv; ++ int drv_registered; ++}; ++ ++static void rtw_dev_shutdown(struct device *dev) ++{ ++ struct usb_interface *usb_intf = container_of(dev, struct usb_interface, dev); ++ struct dvobj_priv *dvobj = usb_get_intfdata(usb_intf); ++ _adapter *adapter = dvobj->if1; ++ int i; ++ ++ DBG_871X("%s\n", __func__); ++ ++ for (i = 0; iiface_nums; i++) { ++ adapter = dvobj->padapters[i]; ++ adapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ ATOMIC_SET(&dvobj->continual_urb_error, MAX_CONTINUAL_URB_ERR+1); ++} ++ ++#ifdef CONFIG_RTL8192C ++static struct usb_device_id rtl8192c_usb_id_tbl[] ={ ++ RTL8192C_USB_IDS ++ {} /* Terminating entry */ ++}; ++ ++struct rtw_usb_drv rtl8192c_usb_drv = { ++ .usbdrv.name = (char*)"rtl8192cu", ++ .usbdrv.probe = rtw_drv_init, ++ .usbdrv.disconnect = rtw_dev_remove, ++ .usbdrv.id_table = rtl8192c_usb_id_tbl, ++ .usbdrv.suspend = rtw_suspend, ++ .usbdrv.resume = rtw_resume, ++ #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22)) ++ .usbdrv.reset_resume = rtw_resume, ++ #endif ++ #ifdef CONFIG_AUTOSUSPEND ++ .usbdrv.supports_autosuspend = 1, ++ #endif ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) ++ .usbdrv.drvwrap.driver.shutdown = rtw_dev_shutdown, ++ #else ++ .usbdrv.driver.shutdown = rtw_dev_shutdown, ++ #endif ++}; ++ ++static struct rtw_usb_drv *usb_drv = &rtl8192c_usb_drv; ++#endif /* CONFIG_RTL8192C */ ++ ++#ifdef CONFIG_RTL8192D ++static struct usb_device_id rtl8192d_usb_id_tbl[] ={ ++ RTL8192D_USB_IDS ++ {} /* Terminating entry */ ++}; ++ ++struct rtw_usb_drv rtl8192d_usb_drv = { ++ .usbdrv.name = (char*)"rtl8192du", ++ .usbdrv.probe = rtw_drv_init, ++ .usbdrv.disconnect = rtw_dev_remove, ++ .usbdrv.id_table = rtl8192d_usb_id_tbl, ++ .usbdrv.suspend = rtw_suspend, ++ .usbdrv.resume = rtw_resume, ++ #if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22)) ++ .usbdrv.reset_resume = rtw_resume, ++ #endif ++ #ifdef CONFIG_AUTOSUSPEND ++ .usbdrv.supports_autosuspend = 1, ++ #endif ++ ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) ++ .usbdrv.drvwrap.driver.shutdown = rtw_dev_shutdown, ++ #else ++ .usbdrv.driver.shutdown = rtw_dev_shutdown, ++ #endif ++}; ++static struct rtw_usb_drv *usb_drv = &rtl8192d_usb_drv; ++#endif /* CONFIG_RTL8192D */ ++ ++static inline int RT_usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); ++} ++ ++static inline int RT_usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); ++} ++ ++static inline int RT_usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT); ++} ++ ++static inline int RT_usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK); ++} ++ ++static inline int RT_usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_in(epd)); ++} ++ ++static inline int RT_usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_out(epd)); ++} ++ ++static inline int RT_usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_int(epd) && RT_usb_endpoint_dir_in(epd)); ++} ++ ++static inline int RT_usb_endpoint_num(const struct usb_endpoint_descriptor *epd) ++{ ++ return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; ++} ++ ++static u8 rtw_init_intf_priv(struct dvobj_priv *dvobj) ++{ ++ u8 rst = _SUCCESS; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _rtw_mutex_init(&dvobj->usb_vendor_req_mutex); ++ #endif ++ ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ dvobj->usb_alloc_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE); ++ if (dvobj->usb_alloc_vendor_req_buf == NULL) { ++ DBG_871X("alloc usb_vendor_req_buf failed... /n"); ++ rst = _FAIL; ++ goto exit; ++ } ++ dvobj->usb_vendor_req_buf = ++ (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(dvobj->usb_alloc_vendor_req_buf ), ALIGNMENT_UNIT); ++exit: ++ #endif ++ ++ return rst; ++ ++} ++ ++static u8 rtw_deinit_intf_priv(struct dvobj_priv *dvobj) ++{ ++ u8 rst = _SUCCESS; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ if(dvobj->usb_vendor_req_buf) ++ rtw_mfree(dvobj->usb_alloc_vendor_req_buf, MAX_USB_IO_CTL_SIZE); ++ #endif ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _rtw_mutex_free(&dvobj->usb_vendor_req_mutex); ++ #endif ++ ++ return rst; ++} ++ ++static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) ++{ ++ int i; ++ u8 val8; ++ int status = _FAIL; ++ struct dvobj_priv *pdvobjpriv = NULL; ++ struct usb_device *pusbd; ++ struct usb_device_descriptor *pdev_desc; ++ struct usb_host_config *phost_conf; ++ struct usb_config_descriptor *pconf_desc; ++ struct usb_host_interface *phost_iface; ++ struct usb_interface_descriptor *piface_desc; ++ struct usb_host_endpoint *phost_endp; ++ struct usb_endpoint_descriptor *pendp_desc; ++ ++_func_enter_; ++ ++ if((pdvobjpriv = devobj_init()) == NULL) { ++ goto exit; ++ } ++ ++ pdvobjpriv->pusbintf = usb_intf ; ++ pusbd = pdvobjpriv->pusbdev = interface_to_usbdev(usb_intf); ++ usb_set_intfdata(usb_intf, pdvobjpriv); ++ ++ pdvobjpriv->RtNumInPipes = 0; ++ pdvobjpriv->RtNumOutPipes = 0; ++ ++ ++ pdev_desc = &pusbd->descriptor; ++#if 0 ++ DBG_871X("\n8712_usb_device_descriptor:\n"); ++ DBG_871X("bLength=%x\n", pdev_desc->bLength); ++ DBG_871X("bDescriptorType=%x\n", pdev_desc->bDescriptorType); ++ DBG_871X("bcdUSB=%x\n", pdev_desc->bcdUSB); ++ DBG_871X("bDeviceClass=%x\n", pdev_desc->bDeviceClass); ++ DBG_871X("bDeviceSubClass=%x\n", pdev_desc->bDeviceSubClass); ++ DBG_871X("bDeviceProtocol=%x\n", pdev_desc->bDeviceProtocol); ++ DBG_871X("bMaxPacketSize0=%x\n", pdev_desc->bMaxPacketSize0); ++ DBG_871X("idVendor=%x\n", pdev_desc->idVendor); ++ DBG_871X("idProduct=%x\n", pdev_desc->idProduct); ++ DBG_871X("bcdDevice=%x\n", pdev_desc->bcdDevice); ++ DBG_871X("iManufacturer=%x\n", pdev_desc->iManufacturer); ++ DBG_871X("iProduct=%x\n", pdev_desc->iProduct); ++ DBG_871X("iSerialNumber=%x\n", pdev_desc->iSerialNumber); ++ DBG_871X("bNumConfigurations=%x\n", pdev_desc->bNumConfigurations); ++#endif ++ ++ phost_conf = pusbd->actconfig; ++ pconf_desc = &phost_conf->desc; ++ ++#if 0 ++ DBG_871X("\n8712_usb_configuration_descriptor:\n"); ++ DBG_871X("bLength=%x\n", pconf_desc->bLength); ++ DBG_871X("bDescriptorType=%x\n", pconf_desc->bDescriptorType); ++ DBG_871X("wTotalLength=%x\n", pconf_desc->wTotalLength); ++ DBG_871X("bNumInterfaces=%x\n", pconf_desc->bNumInterfaces); ++ DBG_871X("bConfigurationValue=%x\n", pconf_desc->bConfigurationValue); ++ DBG_871X("iConfiguration=%x\n", pconf_desc->iConfiguration); ++ DBG_871X("bmAttributes=%x\n", pconf_desc->bmAttributes); ++ DBG_871X("bMaxPower=%x\n", pconf_desc->bMaxPower); ++#endif ++ ++ //DBG_871X("\n/****** num of altsetting = (%d) ******/\n", usb_intf->num_altsetting); ++ ++ phost_iface = &usb_intf->altsetting[0]; ++ piface_desc = &phost_iface->desc; ++ ++#if 0 ++ DBG_871X("\n8712_usb_interface_descriptor:\n"); ++ DBG_871X("bLength=%x\n", piface_desc->bLength); ++ DBG_871X("bDescriptorType=%x\n", piface_desc->bDescriptorType); ++ DBG_871X("bInterfaceNumber=%x\n", piface_desc->bInterfaceNumber); ++ DBG_871X("bAlternateSetting=%x\n", piface_desc->bAlternateSetting); ++ DBG_871X("bNumEndpoints=%x\n", piface_desc->bNumEndpoints); ++ DBG_871X("bInterfaceClass=%x\n", piface_desc->bInterfaceClass); ++ DBG_871X("bInterfaceSubClass=%x\n", piface_desc->bInterfaceSubClass); ++ DBG_871X("bInterfaceProtocol=%x\n", piface_desc->bInterfaceProtocol); ++ DBG_871X("iInterface=%x\n", piface_desc->iInterface); ++#endif ++ ++ pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces; ++ pdvobjpriv->InterfaceNumber = piface_desc->bInterfaceNumber; ++ pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; ++ ++ //DBG_871X("\ndump usb_endpoint_descriptor:\n"); ++ ++ for (i = 0; i < pdvobjpriv->nr_endpoint; i++) ++ { ++ phost_endp = phost_iface->endpoint + i; ++ if (phost_endp) ++ { ++ pendp_desc = &phost_endp->desc; ++ ++ DBG_871X("\nusb_endpoint_descriptor(%d):\n", i); ++ DBG_871X("bLength=%x\n",pendp_desc->bLength); ++ DBG_871X("bDescriptorType=%x\n",pendp_desc->bDescriptorType); ++ DBG_871X("bEndpointAddress=%x\n",pendp_desc->bEndpointAddress); ++ //DBG_871X("bmAttributes=%x\n",pendp_desc->bmAttributes); ++ //DBG_871X("wMaxPacketSize=%x\n",pendp_desc->wMaxPacketSize); ++ DBG_871X("wMaxPacketSize=%x\n",le16_to_cpu(pendp_desc->wMaxPacketSize)); ++ DBG_871X("bInterval=%x\n",pendp_desc->bInterval); ++ //DBG_871X("bRefresh=%x\n",pendp_desc->bRefresh); ++ //DBG_871X("bSynchAddress=%x\n",pendp_desc->bSynchAddress); ++ ++ if (RT_usb_endpoint_is_bulk_in(pendp_desc)) ++ { ++ DBG_871X("RT_usb_endpoint_is_bulk_in = %x\n", RT_usb_endpoint_num(pendp_desc)); ++ pdvobjpriv->RtNumInPipes++; ++ } ++ else if (RT_usb_endpoint_is_int_in(pendp_desc)) ++ { ++ DBG_871X("RT_usb_endpoint_is_int_in = %x, Interval = %x\n", RT_usb_endpoint_num(pendp_desc),pendp_desc->bInterval); ++ pdvobjpriv->RtNumInPipes++; ++ } ++ else if (RT_usb_endpoint_is_bulk_out(pendp_desc)) ++ { ++ DBG_871X("RT_usb_endpoint_is_bulk_out = %x\n", RT_usb_endpoint_num(pendp_desc)); ++ pdvobjpriv->RtNumOutPipes++; ++ } ++ pdvobjpriv->ep_num[i] = RT_usb_endpoint_num(pendp_desc); ++ } ++ } ++ ++ DBG_871X("nr_endpoint=%d, in_num=%d, out_num=%d\n\n", pdvobjpriv->nr_endpoint, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); ++ ++ if (pusbd->speed == USB_SPEED_HIGH) { ++ pdvobjpriv->ishighspeed = _TRUE; ++ DBG_871X("USB_SPEED_HIGH\n"); ++ } else { ++ pdvobjpriv->ishighspeed = _FALSE; ++ DBG_871X("NON USB_SPEED_HIGH\n"); ++ } ++ ++ if (rtw_init_intf_priv(pdvobjpriv) == _FAIL) { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't INIT rtw_init_intf_priv\n")); ++ goto free_dvobj; ++ } ++ ++ //.3 misc ++ _rtw_init_sema(&(pdvobjpriv->usb_suspend_sema), 0); ++ ++ rtw_reset_continual_urb_error(pdvobjpriv); ++ ++ usb_get_dev(pusbd); ++ ++ //DBG_871X("%s %d\n", __func__, ATOMIC_READ(&usb_intf->dev.kobj.kref.refcount)); ++ ++ status = _SUCCESS; ++ ++free_dvobj: ++ if (status != _SUCCESS && pdvobjpriv) { ++ usb_set_intfdata(usb_intf, NULL); ++ devobj_deinit(pdvobjpriv); ++ pdvobjpriv = NULL; ++ } ++exit: ++_func_exit_; ++ return pdvobjpriv; ++} ++ ++static void usb_dvobj_deinit(struct usb_interface *usb_intf) ++{ ++ struct dvobj_priv *dvobj = usb_get_intfdata(usb_intf); ++ ++_func_enter_; ++ ++ usb_set_intfdata(usb_intf, NULL); ++ if (dvobj) { ++ //Modify condition for 92DU DMDP 2010.11.18, by Thomas ++ /*if ((dvobj->NumInterfaces == 1) ++ || ((dvobj->InterfaceNumber == 1) && (dvobj->DualMacMode == _TRUE))) { ++ if (interface_to_usbdev(usb_intf)->state != USB_STATE_NOTATTACHED) { ++ //If we didn't unplug usb dongle and remove/insert modlue, driver fails on sitesurvey for the first time when device is up . ++ //Reset usb port for sitesurvey fail issue. 2009.8.13, by Thomas ++ DBG_871X("usb attached..., try to reset usb device\n"); ++ usb_reset_device(interface_to_usbdev(usb_intf)); ++ } ++ }*/ ++ rtw_deinit_intf_priv(dvobj); ++ devobj_deinit(dvobj); ++ } ++ ++ //DBG_871X("%s %d\n", __func__, ATOMIC_READ(&usb_intf->dev.kobj.kref.refcount)); ++ usb_put_dev(interface_to_usbdev(usb_intf)); ++ ++_func_exit_; ++} ++ ++static void decide_chip_type_by_usb_device_id(_adapter *padapter, const struct usb_device_id *pdid) ++{ ++ padapter->chip_type = NULL_CHIP_TYPE; ++#ifdef CONFIG_RTL8192C ++ padapter->chip_type = RTL8188C_8192C; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CU; ++ DBG_871X("CHIP TYPE: RTL8188C_8192C\n"); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++ padapter->chip_type = RTL8192D; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DU; ++ DBG_871X("CHIP TYPE: RTL8192D\n"); ++#endif ++} ++ ++static void usb_intf_start(_adapter *padapter) ++{ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_start\n")); ++ rtw_hal_inirp_init(padapter); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_start\n")); ++} ++ ++static void usb_intf_stop(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_stop\n")); ++ ++ //disabel_hw_interrupt ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //device still exists, so driver can do i/o operation ++ //TODO: ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("SurpriseRemoved==_FALSE\n")); ++ } ++ ++ //cancel in irp ++ rtw_hal_inirp_deinit(padapter); ++ ++ //cancel out irp ++ rtw_write_port_cancel(padapter); ++ ++ //todo:cancel other irps ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_stop\n")); ++ ++} ++ ++static void rtw_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ u8 val8; ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n")); ++ ++ if(padapter->bup == _TRUE) ++ { ++ DBG_871X("===> rtw_dev_unload\n"); ++ ++ padapter->bDriverStopped = _TRUE; ++ #ifdef CONFIG_XMIT_ACK ++ if (padapter->xmitpriv.ack_tx) ++ rtw_ack_tx_done(&padapter->xmitpriv, RTW_SCTX_DONE_DRV_STOP); ++ #endif ++ ++ //s3. ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s4. ++ if(!padapter->pwrctrlpriv.bInternalAutoSuspend ) ++ rtw_stop_drv_threads(padapter); ++ ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //DBG_871X("r871x_dev_unload()->rtl871x_hal_deinit()\n"); ++#ifdef CONFIG_WOWLAN ++ if((padapter->pwrctrlpriv.bSupportRemoteWakeup==_TRUE)&&(padapter->pwrctrlpriv.wowlan_mode==_TRUE)){ ++ DBG_871X("%s bSupportWakeOnWlan==_TRUE do not run rtw_hal_deinit()\n",__FUNCTION__); ++ } ++ else ++#endif //CONFIG_WOWLAN ++ { ++ rtw_hal_deinit(padapter); ++ } ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ padapter->bup = _FALSE; ++#ifdef CONFIG_WOWLAN ++ padapter->hw_init_completed=_FALSE; ++#endif //CONFIG_WOWLAN ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" )); ++ } ++ ++ DBG_871X("<=== rtw_dev_unload\n"); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n")); ++ ++} ++ ++static void process_spec_devid(const struct usb_device_id *pdid) ++{ ++ u16 vid, pid; ++ u32 flags; ++ int i; ++ int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id); ++ ++ for(i=0; iidVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_DISABLE_HT)) ++ { ++ rtw_ht_enable = 0; ++ rtw_cbw40_enable = 0; ++ rtw_ampdu_enable = 0; ++ } ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ // Change the ifname to wlan10 when PC side WFD dongle plugin on DMP platform. ++ // It is used to distinguish between normal and PC-side wifi dongle/module. ++ if((pdid->idVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_ASSIGN_IFNAME)) ++ { ++ extern char* ifname; ++ strncpy(ifname, "wlan10", 6); ++ //DBG_871X("%s()-%d: ifname=%s, vid=%04X, pid=%04X\n", __FUNCTION__, __LINE__, ifname, vid, pid); ++ } ++#endif /* RTK_DMP_PLATFORM */ ++ ++ } ++} ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++int rtw_hw_suspend(_adapter *padapter ) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_interface *pusb_intf = adapter_to_dvobj(padapter)->pusbintf; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++ _func_enter_; ++ ++ if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) ++ { ++ DBG_871X("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", ++ padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); ++ goto error_exit; ++ } ++ ++ if(padapter)//system suspend ++ { ++ LeaveAllPowerSaveMode(padapter); ++ ++ DBG_871X("==> rtw_hw_suspend\n"); ++ _enter_pwrlock(&pwrpriv->lock); ++ pwrpriv->bips_processing = _TRUE; ++ //padapter->net_closed = _TRUE; ++ //s1. ++ if(pnetdev) ++ { ++ netif_carrier_off(pnetdev); ++ rtw_netif_stop_queue(pnetdev); ++ } ++ ++ //s2. ++ rtw_disassoc_cmd(padapter, 500, _FALSE); ++ ++ //s2-2. indicate disconnect to os ++ //rtw_indicate_disconnect(padapter); ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED)) ++ { ++ _clr_fwstate_(pmlmepriv, _FW_LINKED); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ rtw_os_indicate_disconnect(padapter); ++ ++ #ifdef CONFIG_LPS ++ //donnot enqueue cmd ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); ++ #endif ++ } ++ ++ } ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++ ++ //s2-4. ++ rtw_free_network_queue(padapter,_TRUE); ++ #ifdef CONFIG_IPS ++ rtw_ips_dev_unload(padapter); ++ #endif ++ pwrpriv->rf_pwrstate = rf_off; ++ pwrpriv->bips_processing = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ } ++ else ++ goto error_exit; ++ ++ _func_exit_; ++ return 0; ++ ++error_exit: ++ DBG_871X("%s, failed \n",__FUNCTION__); ++ return (-1); ++ ++} ++ ++int rtw_hw_resume(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_interface *pusb_intf = adapter_to_dvobj(padapter)->pusbintf; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++ _func_enter_; ++ ++ if(padapter)//system resume ++ { ++ DBG_871X("==> rtw_hw_resume\n"); ++ _enter_pwrlock(&pwrpriv->lock); ++ pwrpriv->bips_processing = _TRUE; ++ rtw_reset_drv_sw(padapter); ++ ++ if(pm_netdev_open(pnetdev,_FALSE) != 0) ++ { ++ _exit_pwrlock(&pwrpriv->lock); ++ goto error_exit; ++ } ++ ++ netif_device_attach(pnetdev); ++ netif_carrier_on(pnetdev); ++ ++ if(!rtw_netif_queue_stopped(pnetdev)) ++ rtw_netif_start_queue(pnetdev); ++ else ++ rtw_netif_wake_queue(pnetdev); ++ ++ pwrpriv->bkeepfwalive = _FALSE; ++ pwrpriv->brfoffbyhw = _FALSE; ++ ++ pwrpriv->rf_pwrstate = rf_on; ++ pwrpriv->bips_processing = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ } ++ else ++ { ++ goto error_exit; ++ } ++ ++ _func_exit_; ++ ++ return 0; ++error_exit: ++ DBG_871X("%s, Open net dev failed \n",__FUNCTION__); ++ return (-1); ++} ++#endif ++ ++static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) ++{ ++ struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); ++ _adapter *padapter = dvobj->if1; ++ struct net_device *pnetdev = padapter->pnetdev; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_device *usb_dev = interface_to_usbdev(pusb_intf); ++#ifdef CONFIG_WOWLAN ++ struct wowlan_ioctl_param poidparam; ++#endif // CONFIG_WOWLAN ++ int ret = 0; ++ u32 start_time = rtw_get_current_time(); ++ _func_enter_; ++ ++ DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ ++ if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) ++ { ++ DBG_871X("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", ++ padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); ++ goto exit; ++ } ++ ++ if(pwrpriv->bInternalAutoSuspend ) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ // The FW command register update must after MAC and FW init ready. ++ if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) ++ { ++ u8 bOpen = _TRUE; ++ rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); ++ //rtl8192c_set_FwSelectSuspend_cmd(padapter,_TRUE ,500);//note fw to support hw power down ping detect ++ } ++ #endif ++ #endif ++ } ++ pwrpriv->bInSuspend = _TRUE; ++ rtw_cancel_all_timer(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ ++ rtw_stop_cmd_thread(padapter); ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ //padapter->net_closed = _TRUE; ++ //s1. ++ if(pnetdev) ++ { ++ netif_carrier_off(pnetdev); ++ rtw_netif_stop_queue(pnetdev); ++ } ++#ifdef CONFIG_WOWLAN ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup==_TRUE&&padapter->pwrctrlpriv.wowlan_mode==_TRUE){ ++ u8 ps_mode=PS_MODE_MIN; ++ //set H2C command ++ poidparam.subcode=WOWLAN_ENABLE; ++ rtw_hal_set_hwreg(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); ++ //rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, &ps_mode); ++ //rtw_set_rpwm(padapter, PS_STATE_S2); ++ } ++ else ++#endif //CONFIG_WOWLAN ++ { ++ //s2. ++ rtw_disassoc_cmd(padapter, 0, _FALSE); ++ } ++ ++#ifdef CONFIG_LAYER2_ROAMING_RESUME ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) ) ++ { ++ //printk("%s:%d assoc_ssid:%s\n", __FUNCTION__, __LINE__, pmlmepriv->assoc_ssid.Ssid); ++ DBG_871X("%s:%d %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, __LINE__, ++ pmlmepriv->cur_network.network.Ssid.Ssid, ++ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), ++ pmlmepriv->cur_network.network.Ssid.SsidLength, ++ pmlmepriv->assoc_ssid.SsidLength); ++ rtw_set_roaming(padapter, 1); ++ } ++#endif ++ //s2-2. indicate disconnect to os ++ rtw_indicate_disconnect(padapter); ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++#ifdef CONFIG_AUTOSUSPEND ++ if(!pwrpriv->bInternalAutoSuspend ) ++#endif ++ //s2-4. ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ rtw_dev_unload(padapter); ++#ifdef CONFIG_AUTOSUSPEND ++ pwrpriv->rf_pwrstate = rf_off; ++ pwrpriv->bips_processing = _FALSE; ++#endif ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_indicate_scan_done(padapter, 1); ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) ++ rtw_indicate_disconnect(padapter); ++ ++exit: ++ DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__ ++ , ret, rtw_get_passing_time_ms(start_time)); ++ ++ _func_exit_; ++ return ret; ++} ++ ++static int rtw_resume(struct usb_interface *pusb_intf) ++{ ++ struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); ++ _adapter *padapter = dvobj->if1; ++ struct net_device *pnetdev = padapter->pnetdev; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ int ret = 0; ++ ++ if(pwrpriv->bInternalAutoSuspend ){ ++ ret = rtw_resume_process(padapter); ++ } else { ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++ rtw_resume_in_workqueue(pwrpriv); ++#else ++ if (rtw_is_earlysuspend_registered(pwrpriv) ++ #ifdef CONFIG_WOWLAN ++ && !padapter->pwrctrlpriv.wowlan_mode ++ #endif /* CONFIG_WOWLAN */ ++ ) { ++ /* jeff: bypass resume here, do in late_resume */ ++ rtw_set_do_late_resume(pwrpriv, _TRUE); ++ } else { ++ ret = rtw_resume_process(padapter); ++ } ++#endif /* CONFIG_RESUME_IN_WORKQUEUE */ ++ } ++ ++ return ret; ++ ++} ++ ++int rtw_resume_process(_adapter *padapter) ++{ ++ struct net_device *pnetdev; ++ struct pwrctrl_priv *pwrpriv=NULL; ++ int ret = -1; ++ u32 start_time = rtw_get_current_time(); ++ _func_enter_; ++ ++ DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ ++ if(padapter) { ++ pnetdev= padapter->pnetdev; ++ pwrpriv = &padapter->pwrctrlpriv; ++ } else { ++ goto exit; ++ } ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ rtw_reset_drv_sw(padapter); ++ pwrpriv->bkeepfwalive = _FALSE; ++ ++ DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive); ++ if(pm_netdev_open(pnetdev,_TRUE) != 0) { ++ _exit_pwrlock(&pwrpriv->lock); ++ goto exit; ++ } ++ ++ netif_device_attach(pnetdev); ++ netif_carrier_on(pnetdev); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ if(pwrpriv->bInternalAutoSuspend ) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ // The FW command register update must after MAC and FW init ready. ++ if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) ++ { ++ //rtl8192c_set_FwSelectSuspend_cmd(padapter,_FALSE ,500);//note fw to support hw power down ping detect ++ u8 bOpen = _FALSE; ++ rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); ++ } ++ #endif ++ #endif ++ ++ pwrpriv->bInternalAutoSuspend = _FALSE; ++ pwrpriv->brfoffbyhw = _FALSE; ++ } ++#endif ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ if( padapter->pid[1]!=0) { ++ DBG_871X("pid[1]:%d\n",padapter->pid[1]); ++ rtw_signal_process(padapter->pid[1], SIGUSR2); ++ } ++ ++ #ifdef CONFIG_LAYER2_ROAMING_RESUME ++ rtw_roaming(padapter, NULL); ++ #endif ++ ++ ret = 0; ++exit: ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ rtw_unlock_suspend(); ++ #endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++ if (pwrpriv) ++ pwrpriv->bInSuspend = _FALSE; ++ DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__ ++ , ret, rtw_get_passing_time_ms(start_time)); ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++#ifdef CONFIG_AUTOSUSPEND ++void autosuspend_enter(_adapter* padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ ++ pwrpriv->bInternalAutoSuspend = _TRUE; ++ pwrpriv->bips_processing = _TRUE; ++ ++ DBG_871X("==>autosuspend_enter...........\n"); ++ ++ if(rf_off == pwrpriv->change_rfpwrstate ) ++ { ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_enable_autosuspend(dvobj->pusbdev); ++ #else ++ dvobj->pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) ++ usb_autopm_put_interface(dvobj->pusbintf); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) ++ usb_autopm_enable(dvobj->pusbintf); ++ #else ++ usb_autosuspend_device(dvobj->pusbdev, 1); ++ #endif ++ } ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_871X("...pm_usage_cnt(%d).....\n", atomic_read(&(dvobj->pusbintf->pm_usage_cnt))); ++ #else ++ DBG_871X("...pm_usage_cnt(%d).....\n", dvobj->pusbintf->pm_usage_cnt); ++ #endif ++ ++} ++int autoresume_enter(_adapter* padapter) ++{ ++ int result = _SUCCESS; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); ++ ++ ++ DBG_871X("====> autoresume_enter \n"); ++ ++ if(rf_off == pwrpriv->rf_pwrstate ) ++ { ++ pwrpriv->ps_flag = _FALSE; ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) ++ if (usb_autopm_get_interface(dvobj->pusbintf) < 0) ++ { ++ DBG_871X( "can't get autopm: %d\n", result); ++ result = _FAIL; ++ goto error_exit; ++ } ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) ++ usb_autopm_disable(dvobj->pusbintf); ++ #else ++ usb_autoresume_device(dvobj->pusbdev, 1); ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_871X("...pm_usage_cnt(%d).....\n", atomic_read(&(dvobj->pusbintf->pm_usage_cnt))); ++ #else ++ DBG_871X("...pm_usage_cnt(%d).....\n", dvobj->pusbintf->pm_usage_cnt); ++ #endif ++ } ++ DBG_871X("<==== autoresume_enter \n"); ++error_exit: ++ ++ return result; ++} ++#endif ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++extern void rtd2885_wlan_netlink_sendMsg(char *action_string, char *name); ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#include ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++static int usb_wifi_host = 2; ++#endif ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN6I ++#include ++extern int sw_usb_disable_hcd(__u32 usbc_no); ++extern int sw_usb_enable_hcd(__u32 usbc_no); ++extern void wifi_pm_power(int on); ++static script_item_u item; ++#endif ++ ++_adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, ++ struct usb_interface *pusb_intf, const struct usb_device_id *pdid) ++{ ++ _adapter *padapter = NULL; ++ struct net_device *pnetdev = NULL; ++ int status = _FAIL; ++ ++ if ((padapter = (_adapter *)rtw_zvmalloc(sizeof(*padapter))) == NULL) { ++ goto exit; ++ } ++ padapter->dvobj = dvobj; ++ dvobj->if1 = padapter; ++ ++ padapter->bDriverStopped=_TRUE; ++ ++ dvobj->padapters[dvobj->iface_nums++] = padapter; ++ padapter->iface_id = IFACE_ID0; ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_DUALMAC_CONCURRENT) ++ //set adapter_type/iface type for primary padapter ++ padapter->isprimary = _TRUE; ++ padapter->adapter_type = PRIMARY_ADAPTER; ++ #ifndef CONFIG_HWPORT_SWAP ++ padapter->iface_type = IFACE_PORT0; ++ #else ++ padapter->iface_type = IFACE_PORT1; ++ #endif ++#endif ++ ++ #ifndef RTW_DVOBJ_CHIP_HW_TYPE ++ //step 1-1., decide the chip_type via vid/pid ++ padapter->interface_type = RTW_USB; ++ decide_chip_type_by_usb_device_id(padapter, pdid); ++ #endif ++ ++ if((pnetdev = rtw_init_netdev(padapter)) == NULL) { ++ goto free_adapter; ++ } ++ SET_NETDEV_DEV(pnetdev, dvobj_to_dev(dvobj)); ++ padapter = rtw_netdev_priv(pnetdev); ++ ++ //step 2. hook HalFunc, allocate HalData ++ if(padapter->chip_type == RTL8188C_8192C) { ++ #ifdef CONFIG_RTL8192C ++ rtl8192cu_set_hal_ops(padapter); ++ #endif ++ } else if(padapter->chip_type == RTL8192D) { ++ #ifdef CONFIG_RTL8192D ++ rtl8192du_set_hal_ops(padapter); ++ #endif ++ } else { ++ DBG_871X("Detect NULL_CHIP_TYPE\n"); ++ goto free_hal_data; ++ } ++ ++ //step 3. ++ padapter->intf_start=&usb_intf_start; ++ padapter->intf_stop=&usb_intf_stop; ++ ++ //.2 ++ if ((rtw_init_io_priv(padapter, usb_set_intf_ops)) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ goto free_hal_data; ++ } ++ ++ rtw_hal_read_chip_version(padapter); ++ ++ //.4 usb endpoint mapping ++ rtw_hal_chip_configure(padapter); ++ ++ //step 4. read efuse/eeprom data and get mac_addr ++ rtw_hal_read_chip_info(padapter); ++ ++ if (rtw_handle_dualmac(padapter, 1) != _SUCCESS) ++ goto free_hal_data; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(rtw_wdev_alloc(padapter, dvobj_to_dev(dvobj)) != 0) { ++ goto handle_dualmac; ++ } ++#endif ++ ++ //step 5. ++ if (rtw_init_drv_sw(padapter) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto free_wdev; ++ } ++ ++#ifdef CONFIG_PM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup) ++ { ++ dvobj->pusbdev->do_remote_wakeup=1; ++ pusb_intf->needs_remote_wakeup = 1; ++ device_init_wakeup(&pusb_intf->dev, 1); ++ DBG_871X("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~~~~\n"); ++ DBG_871X("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~[%d]~~~\n",device_may_wakeup(&pusb_intf->dev)); ++ } ++#endif ++#endif ++ ++#ifdef CONFIG_AUTOSUSPEND ++ if( padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE ) ++ { ++ if(padapter->registrypriv.usbss_enable ){ /* autosuspend (2s delay) */ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,38)) ++ dvobj->pusbdev->dev.power.autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time ++ #else ++ dvobj->pusbdev->autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_enable_autosuspend(dvobj->pusbdev); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ padapter->bDisableAutosuspend = dvobj->pusbdev->autosuspend_disabled ; ++ dvobj->pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user ++ #endif ++ ++ usb_autopm_get_interface(dvobj->pusbintf );//init pm_usage_cnt ,let it start from 1 ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_871X("%s...pm_usage_cnt(%d).....\n",__FUNCTION__, atomic_read(&(dvobj->pusbintf ->pm_usage_cnt))); ++ #else ++ DBG_871X("%s...pm_usage_cnt(%d).....\n",__FUNCTION__, dvobj->pusbintf ->pm_usage_cnt); ++ #endif ++ } ++ } ++#endif ++ ++ // set mac addr ++ rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); ++ rtw_init_wifidirect_addrs(padapter, padapter->eeprompriv.mac_addr, padapter->eeprompriv.mac_addr); ++ ++ DBG_871X("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" ++ ,padapter->bDriverStopped ++ ,padapter->bSurpriseRemoved ++ ,padapter->bup ++ ,padapter->hw_init_completed ++ ); ++ ++ status = _SUCCESS; ++ ++free_wdev: ++ if(status != _SUCCESS) { ++ #ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_unregister(padapter->rtw_wdev); ++ rtw_wdev_free(padapter->rtw_wdev); ++ #endif ++ } ++handle_dualmac: ++ if (status != _SUCCESS) ++ rtw_handle_dualmac(padapter, 0); ++free_hal_data: ++ if(status != _SUCCESS && padapter->HalData) ++ rtw_mfree(padapter->HalData, sizeof(*(padapter->HalData))); ++free_adapter: ++ if (status != _SUCCESS) { ++ if (pnetdev) ++ rtw_free_netdev(pnetdev); ++ else if (padapter) ++ rtw_vmfree((u8*)padapter, sizeof(*padapter)); ++ padapter = NULL; ++ } ++exit: ++ return padapter; ++} ++ ++static void rtw_usb_if1_deinit(_adapter *if1) ++{ ++ struct net_device *pnetdev = if1->pnetdev; ++ struct mlme_priv *pmlmepriv= &if1->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED)) ++ rtw_disassoc_cmd(if1, 0, _FALSE); ++ ++#ifdef CONFIG_AP_MODE ++ free_mlme_ap_info(if1); ++ #ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_unload(if1); ++ #endif ++#endif ++ ++ rtw_cancel_all_timer(if1); ++#ifdef CONFIG_WOWLAN ++ if1->pwrctrlpriv.wowlan_mode=_FALSE; ++#endif //CONFIG_WOWLAN ++ rtw_dev_unload(if1); ++ ++ DBG_871X("%s, hw_init_completed=%d\n", __func__, if1->hw_init_completed); ++ ++ //s6. ++ rtw_handle_dualmac(if1, 0); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if (if1->rtw_wdev) ++ rtw_wdev_free(if1->rtw_wdev); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_free_drv_sw(if1); ++ ++ if(pnetdev) ++ rtw_free_netdev(pnetdev); ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_871X("wlan link down\n"); ++ rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); ++#endif ++ ++} ++ ++/* ++ * drv_init() - a device potentially for us ++ * ++ * notes: drv_init() is called when the bus driver has located a card for us to support. ++ * We accept the new device by returning 0. ++*/ ++ ++_adapter *rtw_sw_export = NULL; ++ ++static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *did) ++{ ++ int i; ++ uint status = _FAIL; ++ _adapter *if1 = NULL, *if2 = NULL; ++ struct dvobj_priv *dvobj = NULL; ++ ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n")); ++ ++ ++ //step 0. ++ process_spec_devid(did); ++ ++ /* Initialize dvobj_priv */ ++ if ((dvobj = usb_dvobj_init(pusb_intf)) == NULL) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); ++ goto exit; ++ } ++ ++ /* Initialize if1 */ ++ if ((if1 = rtw_usb_if1_init(dvobj, pusb_intf, did)) == NULL) { ++ DBG_871X("rtw_usb_if1_init Failed!\n"); ++ goto free_dvobj; ++ } ++ ++ /* Initialize if2 */ ++#ifdef CONFIG_CONCURRENT_MODE ++ if((if2 = rtw_drv_if2_init(if1, usb_set_intf_ops)) == NULL) { ++ goto free_if1; ++ } ++#ifdef CONFIG_MULTI_VIR_IFACES ++ for(i=0; iregistrypriv.ext_iface_num;i++) ++ { ++ if(rtw_drv_add_vir_if(if1, usb_set_intf_ops) == NULL) ++ { ++ DBG_871X("rtw_drv_add_iface failed! (%d)\n", i); ++ goto free_if1; ++ } ++ } ++#endif //CONFIG_MULTI_VIR_IFACES ++#endif ++ ++#ifdef CONFIG_INTEL_PROXIM ++ rtw_sw_export=if1; ++#endif ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++ if (ui_pid[1]!=0) { ++ DBG_871X("ui_pid[1]:%d\n",ui_pid[1]); ++ rtw_signal_process(ui_pid[1], SIGUSR2); ++ } ++#endif ++ ++ //dev_alloc_name && register_netdev ++ if((status = rtw_drv_register_netdev(if1)) != _SUCCESS) { ++ goto free_if1; ++ } ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_init(if1); ++#endif ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_871X("wlan link up\n"); ++ rtd2885_wlan_netlink_sendMsg("linkup", "8712"); ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ rtw_proc_init_one(if1->pnetdev); ++#endif ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n")); ++ ++ status = _SUCCESS; ++ ++free_if1: ++ if (status != _SUCCESS && if1) { ++ rtw_usb_if1_deinit(if1); ++ } ++free_dvobj: ++ if (status != _SUCCESS) ++ usb_dvobj_deinit(pusb_intf); ++exit: ++ return status == _SUCCESS?0:-ENODEV; ++} ++ ++/* ++ * dev_remove() - our device is being removed ++*/ ++//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both ++static void rtw_dev_remove(struct usb_interface *pusb_intf) ++{ ++ struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); ++ _adapter *padapter = dvobj->if1; ++ ++_func_exit_; ++ ++ DBG_871X("+rtw_dev_remove\n"); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+dev_remove()\n")); ++ ++ dvobj->processing_dev_remove = _TRUE; ++ ++ rtw_unregister_netdevs(dvobj); ++ ++ if(usb_drv->drv_registered == _TRUE) ++ { ++ //DBG_871X("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n"); ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ /*else ++ { ++ //DBG_871X("r871xu_dev_remove():module removed\n"); ++ padapter->hw_init_completed = _FALSE; ++ }*/ ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(&padapter->pwrctrlpriv); ++#endif ++ ++ rtw_pm_set_ips(padapter, IPS_NONE); ++ rtw_pm_set_lps(padapter, PS_MODE_ACTIVE); ++ ++ LeaveAllPowerSaveMode(padapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_MULTI_VIR_IFACES ++ rtw_drv_stop_vir_ifaces(dvobj); ++#endif //CONFIG_MULTI_VIR_IFACES ++ rtw_drv_if2_stop(dvobj->if2); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ rtw_usb_if1_deinit(padapter); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++#ifdef CONFIG_MULTI_VIR_IFACES ++ rtw_drv_free_vir_ifaces(dvobj); ++#endif //CONFIG_MULTI_VIR_IFACES ++ rtw_drv_if2_free(dvobj->if2); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ usb_dvobj_deinit(pusb_intf); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n")); ++ DBG_871X("-r871xu_dev_remove, done\n"); ++ ++ ++#ifdef CONFIG_INTEL_PROXIM ++ rtw_sw_export=NULL; ++#endif ++ ++_func_exit_; ++ ++ return; ++ ++} ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) ++extern int console_suspend_enabled; ++#endif ++ ++static int __init rtw_drv_entry(void) ++{ ++#ifdef CONFIG_PLATFORM_RTK_DMP ++ u32 tmp; ++ tmp=readl((volatile unsigned int*)0xb801a608); ++ tmp &= 0xffffff00; ++ tmp |= 0x55; ++ writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 ++#endif ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ int ret = 0; ++ /* ----------get usb_wifi_usbc_num------------- */ ++ ret = script_parser_fetch("usb_wifi_para", "usb_wifi_usbc_num", (int *)&usb_wifi_host, 64); ++ if(ret != 0){ ++ printk("ERR: script_parser_fetch usb_wifi_usbc_num failed\n"); ++ ret = -ENOMEM; ++ return ret; ++ } ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_enable_hcd(usb_wifi_host); ++#endif //CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++ ++#ifdef CONFIG_PLATFORM_ARM_SUN6I ++ script_item_value_type_e type; ++ ++ type = script_get_item("wifi_para", "wifi_usbc_id", &item); ++ if(SCIRPT_ITEM_VALUE_TYPE_INT != type){ ++ printk("ERR: script_get_item wifi_usbc_id failed\n"); ++ return -ENOMEM; ++ } ++ ++ printk("sw_usb_enable_hcd: usbc_num = %d\n", item.val); ++ wifi_pm_power(1); ++ mdelay(10); ++ sw_usb_enable_hcd(item.val); ++#endif //CONFIG_PLATFORM_ARM_SUN6I ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n")); ++ ++ DBG_871X(DRV_NAME " driver version=%s\n", DRIVERVERSION); ++ DBG_871X("build time: %s %s\n", __DATE__, __TIME__); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) ++ //console_suspend_enabled=0; ++#endif ++ ++ rtw_suspend_lock_init(); ++ ++ usb_drv->drv_registered = _TRUE; ++ return usb_register(&usb_drv->usbdrv); ++} ++ ++static void __exit rtw_drv_halt(void) ++{ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n")); ++ DBG_871X("+rtw_drv_halt\n"); ++ ++ usb_drv->drv_registered = _FALSE; ++ usb_deregister(&usb_drv->usbdrv); ++ ++#ifdef CONFIG_PLATFORM_ARM_SUNxI ++#ifndef CONFIG_RTL8723A ++ printk("sw_usb_disable_hcd: usbc_num = %d\n", usb_wifi_host); ++ sw_usb_disable_hcd(usb_wifi_host); ++#endif //ifndef CONFIG_RTL8723A ++#endif //CONFIG_PLATFORM_ARM_SUNxI ++#ifdef CONFIG_PLATFORM_ARM_SUN6I ++ sw_usb_disable_hcd(item.val); ++ wifi_pm_power(0); ++#endif ++ ++ rtw_suspend_lock_uninit(); ++ DBG_871X("-rtw_drv_halt\n"); ++ ++ rtw_mstat_dump(); ++} ++ ++ ++module_init(rtw_drv_entry); ++module_exit(rtw_drv_halt); ++ ++#ifdef CONFIG_WOWLAN ++#ifdef CONFIG_WOWLAN_MANUAL ++ ++int rtw_resume_toshiba(PADAPTER Adapter) ++{ ++ struct dvobj_priv *pdvobjpriv; ++ pdvobjpriv = adapter_to_dvobj(Adapter); ++ ++ rtw_resume(pdvobjpriv->pusbintf); ++ return 0; ++} ++ ++int rtw_suspend_toshiba(PADAPTER Adapter) ++{ ++ pm_message_t msg; ++ struct dvobj_priv *pdvobjpriv; ++ pdvobjpriv = adapter_to_dvobj(Adapter); ++ msg.event=0; ++ //for Toshiba only, they should call rtw_suspend before suspend ++ rtw_suspend(pdvobjpriv->pusbintf, msg); ++ return 0; ++} ++EXPORT_SYMBOL(rtw_suspend_toshiba); ++EXPORT_SYMBOL(rtw_resume_toshiba); ++#endif //CONFIG_WOWLAN_MANUAL ++#endif //CONFIG_WOWLAN ++ ++#ifdef CONFIG_INTEL_PROXIM ++_adapter *rtw_usb_get_sw_pointer(void) ++{ ++ return rtw_sw_export; ++} ++EXPORT_SYMBOL(rtw_usb_get_sw_pointer); ++#endif //CONFIG_INTEL_PROXIM ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/usb_ops_linux.c +@@ -0,0 +1,649 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ *******************************************************************************/ ++#define _USB_OPS_LINUX_C_ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++static void _usbctrl_vendorreq_async_callback(struct urb *urb, struct pt_regs *regs) ++{ ++ if (urb) { ++ if (urb->context) { ++ rtw_mfree(urb->context); ++ } ++ usb_free_urb(urb); ++ } ++} ++ ++static int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, ++ u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ int rc; ++ unsigned int pipe; ++ u8 reqtype; ++ struct usb_ctrlrequest *dr; ++ struct urb *urb; ++ struct rtl819x_async_write_data { ++ u8 data[VENDOR_CMD_MAX_DATA_LEN]; ++ struct usb_ctrlrequest dr; ++ } *buf; ++ ++ ++ if (requesttype == VENDOR_READ) { ++ pipe = usb_rcvctrlpipe(udev, 0);//read_in ++ reqtype = REALTEK_USB_VENQT_READ; ++ } ++ else { ++ pipe = usb_sndctrlpipe(udev, 0);//write_out ++ reqtype = REALTEK_USB_VENQT_WRITE; ++ } ++ ++ buf = (struct rtl819x_async_write_data *)rtw_zmalloc(sizeof(*buf)); ++ if (!buf) { ++ rc = -ENOMEM; ++ goto exit; ++ } ++ ++ urb = usb_alloc_urb(0, GFP_ATOMIC); ++ if (!urb) { ++ rtw_mfree((u8*)buf, sizeof(*buf)); ++ rc = -ENOMEM; ++ goto exit; ++ } ++ ++ dr = &buf->dr; ++ ++ dr->bRequestType = reqtype; ++ dr->bRequest = request; ++ dr->wValue = cpu_to_le16(value); ++ dr->wIndex = cpu_to_le16(index); ++ dr->wLength = cpu_to_le16(len); ++ ++ _rtw_memcpy(buf, pdata, len); ++ ++ usb_fill_control_urb(urb, udev, pipe, (unsigned char *)dr, buf, len, ++ _usbctrl_vendorreq_async_callback, buf); ++ ++ rc = usb_submit_urb(urb, GFP_ATOMIC); ++ if (rc < 0) { ++ rtw_mfree((u8*)buf, sizeof(*buf)); ++ usb_free_urb(urb); ++ } ++ ++exit: ++ return rc; ++} ++ ++int usb_write_async(struct usb_device *udev, u32 addr, void *pdata, u16 len) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ ++ int ret; ++ ++ requesttype = VENDOR_WRITE;//write_out ++ request = REALTEK_USB_VENQT_CMD_REQ; ++ index = REALTEK_USB_VENQT_CMD_IDX;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ ++ ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, pdata, len, requesttype); ++ ++ return ret; ++} ++ ++int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) ++{ ++ u8 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = val; ++ ret = usb_write_async(udev, addr, &data, 1); ++ _func_exit_; ++ ++ return ret; ++} ++ ++int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) ++{ ++ u16 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = val; ++ ret = usb_write_async(udev, addr, &data, 2); ++ _func_exit_; ++ ++ return ret; ++} ++ ++int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) ++{ ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = val; ++ ret = usb_write_async(udev, addr, &data, 4); ++ _func_exit_; ++ ++ return ret; ++} ++#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ ++ ++unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) ++{ ++ unsigned int pipe=0; ++ int ep_num=0; ++ _adapter *padapter = pdvobj->if1; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if (addr == RECV_BULK_IN_ADDR) { ++ pipe=usb_rcvbulkpipe(pusbd, pHalData->RtBulkInPipe); ++ ++ } else if (addr == RECV_INT_IN_ADDR) { ++ pipe=usb_rcvbulkpipe(pusbd, pHalData->RtIntInPipe); ++ ++ } else if (addr < HW_QUEUE_ENTRY) { ++ ep_num = pHalData->Queue2EPNum[addr]; ++ pipe = usb_sndbulkpipe(pusbd, ep_num); ++ } ++ ++ return pipe; ++} ++ ++struct zero_bulkout_context{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context; ++ ++ //DBG_8192C("+usb_bulkout_zero_complete\n"); ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ rtw_mfree(pcontext->pbuf, sizeof(int)); ++ } ++ ++ if(pcontext->purb && (pcontext->purb==purb)) ++ { ++ usb_free_urb(pcontext->purb); ++ } ++ ++ ++ rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context)); ++ } ++ ++ ++} ++ ++static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ int pipe, status, len; ++ u32 ret; ++ unsigned char *pbuf; ++ struct zero_bulkout_context *pcontext; ++ PURB purb = NULL; ++ _adapter *padapter = (_adapter *)pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++ //DBG_871X("%s\n", __func__); ++ ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ ++ pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context)); ++ ++ pbuf = (unsigned char *)rtw_zmalloc(sizeof(int)); ++ purb = usb_alloc_urb(0, GFP_ATOMIC); ++ ++ len = 0; ++ pcontext->pbuf = pbuf; ++ pcontext->purb = purb; ++ pcontext->pirp = NULL; ++ pcontext->padapter = padapter; ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ //pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ pbuf, ++ len, ++ usb_bulkout_zero_complete, ++ pcontext);//context is pcontext ++ ++ status = usb_submit_urb(purb, GFP_ATOMIC); ++ ++ if (!status) ++ { ++ ret= _SUCCESS; ++ } ++ else ++ { ++ ret= _FAIL; ++ } ++ ++ ++ return _SUCCESS; ++ ++} ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ ++} ++ ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++} ++ ++ ++void usb_read_port_cancel(struct intf_hdl *pintfhdl) ++{ ++ int i; ++ struct recv_buf *precvbuf; ++ _adapter *padapter = pintfhdl->padapter; ++ precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf; ++ ++ DBG_871X("%s\n", __func__); ++ ++ padapter->bReadPortCancel = _TRUE; ++ ++ for (i=0; i < NR_RECVBUFF ; i++) { ++ ++ precvbuf->reuse = _TRUE; ++ if (precvbuf->purb) { ++ //DBG_8192C("usb_read_port_cancel : usb_kill_urb \n"); ++ usb_kill_urb(precvbuf->purb); ++ } ++ precvbuf++; ++ } ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ usb_kill_urb(padapter->recvpriv.int_in_urb); ++#endif ++} ++ ++static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ _irqL irqL; ++ int i; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; ++ //struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; ++ //_adapter *padapter = pxmitframe->padapter; ++ _adapter *padapter = pxmitbuf->padapter; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ //struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++_func_enter_; ++ ++ switch(pxmitbuf->flags) ++ { ++ case VO_QUEUE_INX: ++ pxmitpriv->voq_cnt--; ++ break; ++ case VI_QUEUE_INX: ++ pxmitpriv->viq_cnt--; ++ break; ++ case BE_QUEUE_INX: ++ pxmitpriv->beq_cnt--; ++ break; ++ case BK_QUEUE_INX: ++ pxmitpriv->bkq_cnt--; ++ break; ++ case HIGH_QUEUE_INX: ++#ifdef CONFIG_AP_MODE ++ rtw_chk_hi_queue_cmd(padapter); ++#endif ++ break; ++ default: ++ break; ++ } ++ ++ ++/* ++ _enter_critical(&pxmitpriv->lock, &irqL); ++ ++ pxmitpriv->txirp_cnt--; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ pxmitpriv->bkq_cnt--; ++ //DBG_8192C("pxmitpriv->bkq_cnt=%d\n", pxmitpriv->bkq_cnt); ++ break; ++ case 4: ++ case 5: ++ pxmitpriv->viq_cnt--; ++ //DBG_8192C("pxmitpriv->viq_cnt=%d\n", pxmitpriv->viq_cnt); ++ break; ++ case 6: ++ case 7: ++ pxmitpriv->voq_cnt--; ++ //DBG_8192C("pxmitpriv->voq_cnt=%d\n", pxmitpriv->voq_cnt); ++ break; ++ case 0: ++ case 3: ++ default: ++ pxmitpriv->beq_cnt--; ++ //DBG_8192C("pxmitpriv->beq_cnt=%d\n", pxmitpriv->beq_cnt); ++ break; ++ ++ } ++ ++ _exit_critical(&pxmitpriv->lock, &irqL); ++ ++ ++ if(pxmitpriv->txirp_cnt==0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++*/ ++ //rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped ||padapter->bWritePortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ DBG_8192C("%s(): TX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bWritePortCancel(%d) pxmitbuf->ext_tag(%x) \n", ++ __FUNCTION__,padapter->bDriverStopped, padapter->bSurpriseRemoved,padapter->bReadPortCancel,pxmitbuf->ext_tag); ++ ++ goto check_completion; ++ } ++ ++ ++ if (purb->status==0) { ++ ++ } else { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ DBG_871X("###=> urb_write_port_complete status(%d)\n",purb->status); ++ if((purb->status==-EPIPE)||(purb->status==-EPROTO)) ++ { ++ //usb_clear_halt(pusbdev, purb->pipe); ++ //msleep(10); ++ sreset_set_wifi_error_status(padapter, USB_WRITE_PORT_FAIL); ++ } else if (purb->status == -EINPROGRESS) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: EINPROGESS\n")); ++ goto check_completion; ++ ++ } else if (purb->status == -ENOENT) { ++ DBG_871X("%s: -ENOENT\n", __func__); ++ goto check_completion; ++ ++ } else if (purb->status == -ECONNRESET) { ++ DBG_871X("%s: -ECONNRESET\n", __func__); ++ goto check_completion; ++ ++ } else if (purb->status == -ESHUTDOWN) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n")); ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n")); ++ ++ goto check_completion; ++ } ++ else ++ { ++ padapter->bSurpriseRemoved=_TRUE; ++ DBG_8192C("bSurpriseRemoved=TRUE\n"); ++ //rtl8192cu_trigger_gpio_0(padapter); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n")); ++ ++ goto check_completion; ++ } ++ } ++ ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.last_tx_complete_time = rtw_get_current_time(); ++ } ++ #endif ++ ++check_completion: ++ _enter_critical(&pxmitpriv->lock_sctx, &irqL); ++ rtw_sctx_done_err(&pxmitbuf->sctx, ++ purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); ++ _exit_critical(&pxmitpriv->lock_sctx, &irqL); ++ ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ //if(rtw_txframes_pending(padapter)) ++ { ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ } ++ ++_func_exit_; ++ ++} ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ _irqL irqL; ++ unsigned int pipe; ++ int status; ++ u32 ret = _FAIL, bwritezero = _FALSE; ++ PURB purb = NULL; ++ _adapter *padapter = (_adapter *)pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port\n")); ++ ++ if ((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) { ++ #ifdef DBG_TX ++ DBG_871X(" DBG_TX %s:%d bDriverStopped%d, bSurpriseRemoved:%d, pnp_bstop_trx:%d\n",__FUNCTION__, __LINE__ ++ ,padapter->bDriverStopped, padapter->bSurpriseRemoved, padapter->pwrctrlpriv.pnp_bstop_trx ); ++ #endif ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_TX_DENY); ++ goto exit; ++ } ++ ++ _enter_critical(&pxmitpriv->lock, &irqL); ++ ++ switch(addr) ++ { ++ case VO_QUEUE_INX: ++ pxmitpriv->voq_cnt++; ++ pxmitbuf->flags = VO_QUEUE_INX; ++ break; ++ case VI_QUEUE_INX: ++ pxmitpriv->viq_cnt++; ++ pxmitbuf->flags = VI_QUEUE_INX; ++ break; ++ case BE_QUEUE_INX: ++ pxmitpriv->beq_cnt++; ++ pxmitbuf->flags = BE_QUEUE_INX; ++ break; ++ case BK_QUEUE_INX: ++ pxmitpriv->bkq_cnt++; ++ pxmitbuf->flags = BK_QUEUE_INX; ++ break; ++ case HIGH_QUEUE_INX: ++ pxmitbuf->flags = HIGH_QUEUE_INX; ++ break; ++ default: ++ pxmitbuf->flags = MGT_QUEUE_INX; ++ break; ++ } ++ ++ _exit_critical(&pxmitpriv->lock, &irqL); ++ ++ purb = pxmitbuf->pxmit_urb[0]; ++ ++#if 0 ++ if(pdvobj->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ //DBG_8192C("ishighspeed, cnt=%d\n", cnt); ++ bwritezero = _TRUE; ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ //DBG_8192C("cnt=%d\n", cnt); ++ bwritezero = _TRUE; ++ } ++ } ++#endif ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++#ifdef CONFIG_REDUCE_USB_TX_INT ++ if ( (pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0) ++ || (pxmitbuf->ext_tag == _TRUE) ) ++ { ++ purb->transfer_flags &= (~URB_NO_INTERRUPT); ++ } else { ++ purb->transfer_flags |= URB_NO_INTERRUPT; ++ //DBG_8192C("URB_NO_INTERRUPT "); ++ } ++#endif ++ ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ pxmitframe->buf_addr, //= pxmitbuf->pbuf ++ cnt, ++ usb_write_port_complete, ++ pxmitbuf);//context is pxmitbuf ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ purb->transfer_dma = pxmitbuf->dma_transfer_addr; ++ purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; ++ purb->transfer_flags |= URB_ZERO_PACKET; ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++#if 0 ++ if (bwritezero) ++ { ++ purb->transfer_flags |= URB_ZERO_PACKET; ++ } ++#endif ++ ++ status = usb_submit_urb(purb, GFP_ATOMIC); ++ if (!status) { ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.last_tx_time = rtw_get_current_time(); ++ } ++ #endif ++ } else { ++ rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_WRITE_PORT_ERR); ++ DBG_871X("usb_write_port, status=%d\n", status); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port(): usb_submit_urb, status=%x\n", status)); ++ ++ switch (status) { ++ case -ENODEV: ++ padapter->bDriverStopped=_TRUE; ++ break; ++ default: ++ break; ++ } ++ goto exit; ++ } ++ ++ ret= _SUCCESS; ++ ++// Commented by Albert 2009/10/13 ++// We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically. ++/* ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++*/ ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port\n")); ++ ++exit: ++ if (ret != _SUCCESS) ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++_func_exit_; ++ return ret; ++ ++} ++ ++void usb_write_port_cancel(struct intf_hdl *pintfhdl) ++{ ++ int i, j; ++ _adapter *padapter = pintfhdl->padapter; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf; ++ ++ DBG_871X("%s \n", __func__); ++ ++ padapter->bWritePortCancel = _TRUE; ++ ++ for (i=0; ipxmit_urb[j]) { ++ usb_kill_urb(pxmitbuf->pxmit_urb[j]); ++ } ++ } ++ pxmitbuf++; ++ } ++ ++ pxmitbuf = (struct xmit_buf*)padapter->xmitpriv.pxmit_extbuf; ++ for (i = 0; i < NR_XMIT_EXTBUFF; i++) { ++ for (j=0; j<8; j++) { ++ if(pxmitbuf->pxmit_urb[j]) { ++ usb_kill_urb(pxmitbuf->pxmit_urb[j]); ++ } ++ } ++ pxmitbuf++; ++ } ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/linux/xmit_linux.c +@@ -0,0 +1,421 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _XMIT_OSDEP_C_ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++uint rtw_remainder_len(struct pkt_file *pfile) ++{ ++ return (pfile->buf_len - ((SIZE_PTR)(pfile->cur_addr) - (SIZE_PTR)(pfile->buf_start))); ++} ++ ++void _rtw_open_pktfile (_pkt *pktptr, struct pkt_file *pfile) ++{ ++_func_enter_; ++ ++ pfile->pkt = pktptr; ++ pfile->cur_addr = pfile->buf_start = pktptr->data; ++ pfile->pkt_len = pfile->buf_len = pktptr->len; ++ ++ pfile->cur_buffer = pfile->buf_start ; ++ ++_func_exit_; ++} ++ ++uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen) ++{ ++ uint len = 0; ++ ++_func_enter_; ++ ++ len = rtw_remainder_len(pfile); ++ len = (rlen > len)? len: rlen; ++ ++ if(rmem) ++ skb_copy_bits(pfile->pkt, pfile->buf_len-pfile->pkt_len, rmem, len); ++ ++ pfile->cur_addr += len; ++ pfile->pkt_len -= len; ++ ++_func_exit_; ++ ++ return len; ++} ++ ++sint rtw_endofpktfile(struct pkt_file *pfile) ++{ ++_func_enter_; ++ ++ if (pfile->pkt_len == 0) { ++_func_exit_; ++ return _TRUE; ++ } ++ ++_func_exit_; ++ ++ return _FALSE; ++} ++ ++void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) ++{ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ struct sk_buff *skb = (struct sk_buff *)pkt; ++ pattrib->hw_tcp_csum = 0; ++ ++ if (skb->ip_summed == CHECKSUM_PARTIAL) { ++ if (skb_shinfo(skb)->nr_frags == 0) ++ { ++ const struct iphdr *ip = ip_hdr(skb); ++ if (ip->protocol == IPPROTO_TCP) { ++ // TCP checksum offload by HW ++ DBG_871X("CHECKSUM_PARTIAL TCP\n"); ++ pattrib->hw_tcp_csum = 1; ++ //skb_checksum_help(skb); ++ } else if (ip->protocol == IPPROTO_UDP) { ++ //DBG_871X("CHECKSUM_PARTIAL UDP\n"); ++#if 1 ++ skb_checksum_help(skb); ++#else ++ // Set UDP checksum = 0 to skip checksum check ++ struct udphdr *udp = skb_transport_header(skb); ++ udp->check = 0; ++#endif ++ } else { ++ DBG_871X("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__); ++ WARN_ON(1); /* we need a WARN() */ ++ } ++ } ++ else { // IP fragmentation case ++ DBG_871X("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__); ++ skb_checksum_help(skb); ++ } ++ } ++#endif ++ ++} ++ ++int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz) ++{ ++#ifdef CONFIG_USB_HCI ++ int i; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ pxmitbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)alloc_sz, &pxmitbuf->dma_transfer_addr); ++ pxmitbuf->pbuf = pxmitbuf->pallocated_buf; ++ if(pxmitbuf->pallocated_buf == NULL) ++ return _FAIL; ++#else // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ return _FAIL; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++ pxmitbuf->dma_transfer_addr = 0; ++ ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ for(i=0; i<8; i++) ++ { ++ pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); ++ if(pxmitbuf->pxmit_urb[i] == NULL) ++ { ++ DBG_871X("pxmitbuf->pxmit_urb[i]==NULL"); ++ return _FAIL; ++ } ++ ++ } ++#endif ++#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) ++ pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ return _FAIL; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++#endif ++ ++ return _SUCCESS; ++} ++ ++void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz) ++{ ++#ifdef CONFIG_USB_HCI ++ int i; ++ struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitbuf->pxmit_urb[i]) ++ { ++ //usb_kill_urb(pxmitbuf->pxmit_urb[i]); ++ usb_free_urb(pxmitbuf->pxmit_urb[i]); ++ } ++ } ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ rtw_usb_buffer_free(pusbd, (size_t)free_sz, pxmitbuf->pallocated_buf, pxmitbuf->dma_transfer_addr); ++ pxmitbuf->pallocated_buf = NULL; ++ pxmitbuf->dma_transfer_addr = 0; ++#else // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ if(pxmitbuf->pallocated_buf) ++ rtw_mfree(pxmitbuf->pallocated_buf, free_sz); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++#endif ++#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) ++ if(pxmitbuf->pallocated_buf) ++ rtw_mfree(pxmitbuf->pallocated_buf, free_sz); ++#endif ++} ++ ++void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ u16 queue; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ queue = skb_get_queue_mapping(pkt); ++ if(__netif_subqueue_stopped(padapter->pnetdev, queue) && ++ (pxmitpriv->hwxmits[queue].accnt < NR_XMITFRAME/2)) ++ { ++ netif_wake_subqueue(padapter->pnetdev, queue); ++ } ++#else ++ if (netif_queue_stopped(padapter->pnetdev)) ++ netif_wake_queue(padapter->pnetdev); ++#endif ++ ++ rtw_skb_free(pkt); ++} ++ ++void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe) ++{ ++ if(pxframe->pkt) ++ rtw_os_pkt_complete(padapter, pxframe->pkt); ++ ++ pxframe->pkt = NULL; ++} ++ ++void rtw_os_xmit_schedule(_adapter *padapter) ++{ ++#ifdef CONFIG_SDIO_HCI ++ if(!padapter) ++ return; ++ ++ if (rtw_txframes_pending(padapter)) ++ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); ++#else ++ _irqL irqL; ++ struct xmit_priv *pxmitpriv; ++ ++ if(!padapter) ++ return; ++ ++ pxmitpriv = &padapter->xmitpriv; ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if(rtw_txframes_pending(padapter)) ++ { ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ } ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++#endif ++} ++ ++ ++ ++#ifdef CONFIG_TX_MCAST2UNI ++int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sk_buff *newskb; ++ struct sta_info *psta = NULL; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ u8 bc_addr[6]={0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ u8 null_addr[6]={0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ ++ int i; ++ s32 res; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //free sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ++ /* avoid come from STA1 and send back STA1 */ ++ if (_rtw_memcmp(psta->hwaddr, &skb->data[6], 6) == _TRUE ++ || _rtw_memcmp(psta->hwaddr, null_addr, 6) == _TRUE ++ || _rtw_memcmp(psta->hwaddr, bc_addr, 6) == _TRUE ++ ) ++ continue; ++ ++ newskb = rtw_skb_copy(skb); ++ ++ if (newskb) { ++ _rtw_memcpy(newskb->data, psta->hwaddr, 6); ++ res = rtw_xmit(padapter, &newskb); ++ if (res < 0) { ++ DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__); ++ pxmitpriv->tx_drop++; ++ rtw_skb_free(newskb); ++ } else ++ pxmitpriv->tx_pkts++; ++ } else { ++ DBG_871X("%s-%d: rtw_skb_copy() failed!\n", __FUNCTION__, __LINE__); ++ pxmitpriv->tx_drop++; ++ //rtw_skb_free(skb); ++ return _FALSE; // Caller shall tx this multicast frame via normal way. ++ } ++ } ++ ++ rtw_skb_free(skb); ++ return _TRUE; ++} ++#endif // CONFIG_TX_MCAST2UNI ++ ++ ++int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++#ifdef CONFIG_TX_MCAST2UNI ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ extern int rtw_mc2u_disable; ++#endif // CONFIG_TX_MCAST2UNI ++ s32 res = 0; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ u16 queue; ++#endif ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n")); ++ ++ if (rtw_if_up(padapter) == _FALSE) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n")); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__); ++ #endif ++ goto drop_packet; ++ } ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ queue = skb_get_queue_mapping(pkt); ++ /* No free space for Tx, tx_worker is too slow */ ++ if (pxmitpriv->hwxmits[queue].accnt > NR_XMITFRAME/2) { ++ //DBG_871X("%s(): stop netif_subqueue[%d]\n", __FUNCTION__, queue); ++ netif_stop_subqueue(padapter->pnetdev, queue); ++ return NETDEV_TX_BUSY; ++ } ++#endif ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( !rtw_mc2u_disable ++ && check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE ++ && ( IP_MCAST_MAC(pkt->data) ++ || ICMPV6_MCAST_MAC(pkt->data) ) ++ && (padapter->registrypriv.wifi_spec == 0) ++ ) ++ { ++ if ( pxmitpriv->free_xmitframe_cnt > (NR_XMITFRAME/4) ) { ++ res = rtw_mlcst2unicst(padapter, pkt); ++ if (res == _TRUE) { ++ goto exit; ++ } ++ } else { ++ //DBG_871X("Stop M2U(%d, %d)! ", pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmitbuf_cnt); ++ //DBG_871X("!m2u ); ++ } ++ } ++#endif // CONFIG_TX_MCAST2UNI ++ ++ res = rtw_xmit(padapter, &pkt); ++ if (res < 0) { ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); ++ #endif ++ goto drop_packet; ++ } ++ ++ pxmitpriv->tx_pkts++; ++ RT_TRACE(_module_xmit_osdep_c_, _drv_info_, ("rtw_xmit_entry: tx_pkts=%d\n", (u32)pxmitpriv->tx_pkts)); ++ goto exit; ++ ++drop_packet: ++ pxmitpriv->tx_drop++; ++ rtw_skb_free(pkt); ++ RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, ("rtw_xmit_entry: drop, tx_drop=%d\n", (u32)pxmitpriv->tx_drop)); ++ ++exit: ++ ++_func_exit_; ++ ++ return 0; ++} ++ ++int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) ++{ ++ if (pkt) ++ rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, pkt->truesize); ++ return _rtw_xmit_entry(pkt, pnetdev); ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/os_dep/osdep_service.c +@@ -0,0 +1,2300 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _OSDEP_SERVICE_C_ ++ ++#include ++#include ++#include ++#include ++#ifdef PLATFORM_LINUX ++#include ++#endif ++#ifdef PLATFORM_FREEBSD ++#include ++#include ++#endif /* PLATFORM_FREEBSD */ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++#include ++#endif ++#endif ++ ++#define RT_TAG '1178' ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++#include ++atomic_t _malloc_cnt = ATOMIC_INIT(0); ++atomic_t _malloc_size = ATOMIC_INIT(0); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ ++#if defined(PLATFORM_LINUX) ++/* ++* Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE ++* @return: one of RTW_STATUS_CODE ++*/ ++inline int RTW_STATUS_CODE(int error_code){ ++ if(error_code >=0) ++ return _SUCCESS; ++ ++ switch(error_code) { ++ //case -ETIMEDOUT: ++ // return RTW_STATUS_TIMEDOUT; ++ default: ++ return _FAIL; ++ } ++} ++#else ++inline int RTW_STATUS_CODE(int error_code){ ++ return error_code; ++} ++#endif ++ ++u32 rtw_atoi(u8* s) ++{ ++ ++ int num=0,flag=0; ++ int i; ++ for(i=0;i<=strlen(s);i++) ++ { ++ if(s[i] >= '0' && s[i] <= '9') ++ num = num * 10 + s[i] -'0'; ++ else if(s[0] == '-' && i==0) ++ flag =1; ++ else ++ break; ++ } ++ ++ if(flag == 1) ++ num = num * -1; ++ ++ return(num); ++ ++} ++ ++inline u8* _rtw_vmalloc(u32 sz) ++{ ++ u8 *pbuf; ++#ifdef PLATFORM_LINUX ++ pbuf = vmalloc(sz); ++#endif ++#ifdef PLATFORM_FREEBSD ++ pbuf = malloc(sz,M_DEVBUF,M_NOWAIT); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ if ( pbuf != NULL) { ++ atomic_inc(&_malloc_cnt); ++ atomic_add(sz, &_malloc_size); ++ } ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ return pbuf; ++} ++ ++inline u8* _rtw_zvmalloc(u32 sz) ++{ ++ u8 *pbuf; ++#ifdef PLATFORM_LINUX ++ pbuf = _rtw_vmalloc(sz); ++ if (pbuf != NULL) ++ memset(pbuf, 0, sz); ++#endif ++#ifdef PLATFORM_FREEBSD ++ pbuf = malloc(sz,M_DEVBUF,M_ZERO|M_NOWAIT); ++#endif ++#ifdef PLATFORM_WINDOWS ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++ if (pbuf != NULL) ++ NdisFillMemory(pbuf, sz, 0); ++#endif ++ ++ return pbuf; ++} ++ ++inline void _rtw_vmfree(u8 *pbuf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ vfree(pbuf); ++#endif ++#ifdef PLATFORM_FREEBSD ++ free(pbuf,M_DEVBUF); ++#endif ++#ifdef PLATFORM_WINDOWS ++ NdisFreeMemory(pbuf,sz, 0); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ atomic_dec(&_malloc_cnt); ++ atomic_sub(sz, &_malloc_size); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++} ++ ++u8* _rtw_malloc(u32 sz) ++{ ++ ++ u8 *pbuf=NULL; ++ ++#ifdef PLATFORM_LINUX ++#ifdef RTK_DMP_PLATFORM ++ if(sz > 0x4000) ++ pbuf = (u8 *)dvr_malloc(sz); ++ else ++#endif ++ pbuf = kmalloc(sz,in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ pbuf = malloc(sz,M_DEVBUF,M_NOWAIT); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ if ( pbuf != NULL) { ++ atomic_inc(&_malloc_cnt); ++ atomic_add(sz, &_malloc_size); ++ } ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ return pbuf; ++ ++} ++ ++ ++u8* _rtw_zmalloc(u32 sz) ++{ ++#ifdef PLATFORM_FREEBSD ++ return malloc(sz,M_DEVBUF,M_ZERO|M_NOWAIT); ++#else // PLATFORM_FREEBSD ++ u8 *pbuf = _rtw_malloc(sz); ++ ++ if (pbuf != NULL) { ++ ++#ifdef PLATFORM_LINUX ++ memset(pbuf, 0, sz); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisFillMemory(pbuf, sz, 0); ++#endif ++ ++ } ++ ++ return pbuf; ++#endif // PLATFORM_FREEBSD ++} ++ ++void _rtw_mfree(u8 *pbuf, u32 sz) ++{ ++ ++#ifdef PLATFORM_LINUX ++#ifdef RTK_DMP_PLATFORM ++ if(sz > 0x4000) ++ dvr_free(pbuf); ++ else ++#endif ++ kfree(pbuf); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ free(pbuf,M_DEVBUF); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisFreeMemory(pbuf,sz, 0); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ atomic_dec(&_malloc_cnt); ++ atomic_sub(sz, &_malloc_size); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++} ++ ++#ifdef PLATFORM_FREEBSD ++//review again ++struct sk_buff * dev_alloc_skb(unsigned int size) ++{ ++ struct sk_buff *skb=NULL; ++ u8 *data=NULL; ++ ++ //skb = (struct sk_buff *)_rtw_zmalloc(sizeof(struct sk_buff)); // for skb->len, etc. ++ skb = (struct sk_buff *)_rtw_malloc(sizeof(struct sk_buff)); ++ if(!skb) ++ goto out; ++ data = _rtw_malloc(size); ++ if(!data) ++ goto nodata; ++ ++ skb->head = (unsigned char*)data; ++ skb->data = (unsigned char*)data; ++ skb->tail = (unsigned char*)data; ++ skb->end = (unsigned char*)data + size; ++ skb->len = 0; ++ //printf("%s()-%d: skb=%p, skb->head = %p\n", __FUNCTION__, __LINE__, skb, skb->head); ++ ++out: ++ return skb; ++nodata: ++ _rtw_mfree((u8 *)skb, sizeof(struct sk_buff)); ++ skb = NULL; ++goto out; ++ ++} ++ ++void dev_kfree_skb_any(struct sk_buff *skb) ++{ ++ //printf("%s()-%d: skb->head = %p\n", __FUNCTION__, __LINE__, skb->head); ++ if(skb->head) ++ _rtw_mfree(skb->head, 0); ++ //printf("%s()-%d: skb = %p\n", __FUNCTION__, __LINE__, skb); ++ if(skb) ++ _rtw_mfree((u8 *)skb, 0); ++} ++struct sk_buff *skb_clone(const struct sk_buff *skb) ++{ ++ return NULL; ++} ++ ++#endif /* PLATFORM_FREEBSD */ ++ ++inline struct sk_buff *_rtw_skb_alloc(u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ return __dev_alloc_skb(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ return dev_alloc_skb(sz); ++#endif /* PLATFORM_FREEBSD */ ++} ++ ++inline void _rtw_skb_free(struct sk_buff *skb) ++{ ++ dev_kfree_skb_any(skb); ++} ++ ++inline struct sk_buff *_rtw_skb_copy(const struct sk_buff *skb) ++{ ++#ifdef PLATFORM_LINUX ++ return skb_copy(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ return NULL; ++#endif /* PLATFORM_FREEBSD */ ++} ++ ++inline struct sk_buff *_rtw_skb_clone(struct sk_buff *skb) ++{ ++#ifdef PLATFORM_LINUX ++ return skb_clone(skb, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ return skb_clone(skb); ++#endif /* PLATFORM_FREEBSD */ ++} ++ ++inline int _rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb) ++{ ++#ifdef PLATFORM_LINUX ++ skb->dev = ndev; ++ return netif_rx(skb); ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ return (*ndev->if_input)(ndev, skb); ++#endif /* PLATFORM_FREEBSD */ ++} ++ ++void _rtw_skb_queue_purge(struct sk_buff_head *list) ++{ ++ struct sk_buff *skb; ++ ++ while ((skb = skb_dequeue(list)) != NULL) ++ _rtw_skb_free(skb); ++} ++ ++#ifdef CONFIG_USB_HCI ++inline void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma) ++{ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ return usb_alloc_coherent(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); ++#else ++ return usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma); ++#endif ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ return (malloc(size, M_USBDEV, M_NOWAIT | M_ZERO)); ++#endif /* PLATFORM_FREEBSD */ ++} ++inline void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma) ++{ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ usb_free_coherent(dev, size, addr, dma); ++#else ++ usb_buffer_free(dev, size, addr, dma); ++#endif ++#endif /* PLATFORM_LINUX */ ++ ++#ifdef PLATFORM_FREEBSD ++ free(addr, M_USBDEV); ++#endif /* PLATFORM_FREEBSD */ ++} ++#endif /* CONFIG_USB_HCI */ ++ ++#ifdef DBG_MEM_ALLOC ++ ++struct rtw_mem_stat { ++ ATOMIC_T alloc; // the memory bytes we allocate currently ++ ATOMIC_T peak; // the peak memory bytes we allocate ++ ATOMIC_T alloc_cnt; // the alloc count for alloc currently ++ ATOMIC_T alloc_err_cnt; // the error times we fail to allocate memory ++}; ++ ++struct rtw_mem_stat rtw_mem_type_stat[mstat_tf_idx(MSTAT_TYPE_MAX)]; ++struct rtw_mem_stat rtw_mem_func_stat[mstat_ff_idx(MSTAT_FUNC_MAX)]; ++ ++char *MSTAT_TYPE_str[] = { ++ "VIR", ++ "PHY", ++ "SKB", ++ "USB", ++}; ++ ++char *MSTAT_FUNC_str[] = { ++ "UNSP", ++ "IO", ++ "TXIO", ++ "RXIO", ++ "TX", ++ "RX", ++}; ++ ++int _rtw_mstat_dump(char *buf, int len) ++{ ++ int cnt = 0; ++ int i; ++ int value_t[4][mstat_tf_idx(MSTAT_TYPE_MAX)]; ++ int value_f[4][mstat_ff_idx(MSTAT_FUNC_MAX)]; ++ ++ int vir_alloc, vir_peak, vir_alloc_err, phy_alloc, phy_peak, phy_alloc_err; ++ int tx_alloc, tx_peak, tx_alloc_err, rx_alloc, rx_peak, rx_alloc_err; ++ ++ for(i=0;i 5000) { ++ // rtw_mstat_dump(); ++ update_time=rtw_get_current_time(); ++ //} ++} ++ ++ ++ ++inline u8* dbg_rtw_vmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ u8 *p; ++ //DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_vmalloc((sz)); ++ ++ rtw_mstat_update( ++ flags ++ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline u8* dbg_rtw_zvmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ u8 *p; ++ //DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_zvmalloc((sz)); ++ ++ rtw_mstat_update( ++ flags ++ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ //DBG_871X("DBG_MEM_ALLOC %s:%d %s(%p,%d)\n", func, line, __FUNCTION__, (pbuf), (sz)); ++ ++ _rtw_vmfree((pbuf), (sz)); ++ ++ rtw_mstat_update( ++ flags ++ , MSTAT_FREE ++ , sz ++ ); ++} ++ ++inline u8* dbg_rtw_malloc(u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ u8 *p; ++ ++ //if(sz>=153 && sz<=306) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ //if((sz)>4096) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_malloc((sz)); ++ ++ rtw_mstat_update( ++ flags ++ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline u8* dbg_rtw_zmalloc(u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ u8 *p; ++ ++ //if(sz>=153 && sz<=306) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ //if((sz)>4096) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p = _rtw_zmalloc((sz)); ++ ++ rtw_mstat_update( ++ flags ++ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline void dbg_rtw_mfree(u8 *pbuf, u32 sz, const enum mstat_f flags, const char *func, const int line) ++{ ++ //if(sz>=153 && sz<=306) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ //if((sz)>4096) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s(%p,%d)\n", func, line, __FUNCTION__, (pbuf), (sz)); ++ ++ _rtw_mfree((pbuf), (sz)); ++ ++ rtw_mstat_update( ++ flags ++ , MSTAT_FREE ++ , sz ++ ); ++} ++ ++inline struct sk_buff * dbg_rtw_skb_alloc(unsigned int size, const enum mstat_f flags, const char *func, int line) ++{ ++ struct sk_buff *skb; ++ unsigned int truesize = 0; ++ ++ skb = _rtw_skb_alloc(size); ++ ++ if(skb) ++ truesize = skb->truesize; ++ ++ if(!skb || truesize < size /*|| size > 4096*/) ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, size, skb, truesize); ++ ++ rtw_mstat_update( ++ flags ++ , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , truesize ++ ); ++ ++ return skb; ++} ++ ++inline void dbg_rtw_skb_free(struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) ++{ ++ unsigned int truesize = skb->truesize; ++ ++ //if(truesize > 4096) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); ++ ++ _rtw_skb_free(skb); ++ ++ rtw_mstat_update( ++ flags ++ , MSTAT_FREE ++ , truesize ++ ); ++} ++ ++inline struct sk_buff *dbg_rtw_skb_copy(const struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) ++{ ++ struct sk_buff *skb_cp; ++ unsigned int truesize = skb->truesize; ++ unsigned int cp_truesize = 0; ++ ++ skb_cp = _rtw_skb_copy(skb); ++ if(skb_cp) ++ cp_truesize = skb_cp->truesize; ++ ++ if(!skb_cp || cp_truesize != truesize /*||cp_truesize > 4096*/) ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%u), skb_cp:%p, cp_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cp, cp_truesize); ++ ++ rtw_mstat_update( ++ flags ++ , skb_cp ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , truesize ++ ); ++ ++ return skb_cp; ++} ++ ++inline struct sk_buff *dbg_rtw_skb_clone(struct sk_buff *skb, const enum mstat_f flags, const char *func, const int line) ++{ ++ struct sk_buff *skb_cl; ++ unsigned int truesize = skb->truesize; ++ unsigned int cl_truesize = 0; ++ ++ skb_cl = _rtw_skb_clone(skb); ++ if(skb_cl) ++ cl_truesize = skb_cl->truesize; ++ ++ if(!skb_cl || cl_truesize != truesize /*|| cl_truesize > 4096*/) ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%u), skb_cl:%p, cl_truesize=%u\n", func, line, __FUNCTION__, truesize, skb_cl, cl_truesize); ++ ++ rtw_mstat_update( ++ flags ++ , skb_cl ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , truesize ++ ); ++ ++ return skb_cl; ++} ++ ++inline int dbg_rtw_netif_rx(_nic_hdl ndev, struct sk_buff *skb, const enum mstat_f flags, const char *func, int line) ++{ ++ int ret; ++ unsigned int truesize = skb->truesize; ++ ++ //if(truesize > 4096) ++ // DBG_871X("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); ++ ++ ret = _rtw_netif_rx(ndev, skb); ++ ++ rtw_mstat_update( ++ flags ++ , MSTAT_FREE ++ , truesize ++ ); ++ ++ return ret; ++} ++ ++inline void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line) ++{ ++ struct sk_buff *skb; ++ ++ while ((skb = skb_dequeue(list)) != NULL) ++ dbg_rtw_skb_free(skb, flags, func, line); ++} ++ ++#ifdef CONFIG_USB_HCI ++inline void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, int line) ++{ ++ void *p; ++ //DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, size); ++ ++ p = _rtw_usb_buffer_alloc(dev, size, dma); ++ ++ rtw_mstat_update( ++ flags ++ , p ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL ++ , size ++ ); ++ ++ return p; ++} ++ ++inline void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, int line) ++{ ++ //DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, size); ++ ++ _rtw_usb_buffer_free(dev, size, addr, dma); ++ ++ rtw_mstat_update( ++ flags ++ , MSTAT_FREE ++ , size ++ ); ++} ++#endif /* CONFIG_USB_HCI */ ++#endif /* DBG_MEM_ALLOC */ ++ ++void* rtw_malloc2d(int h, int w, int size) ++{ ++ int j; ++ ++ void **a = (void **) rtw_zmalloc( h*sizeof(void *) + h*w*size ); ++ if(a == NULL) ++ { ++ DBG_871X("%s: alloc memory fail!\n", __FUNCTION__); ++ return NULL; ++ } ++ ++ for( j=0; jprev = pnew; ++ pnew->next = pnext; ++ pnew->prev = pprev; ++ pprev->next = pnew; ++} ++#endif /* PLATFORM_FREEBSD */ ++ ++void _rtw_init_listhead(_list *list) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ INIT_LIST_HEAD(list); ++ ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ list->next = list; ++ list->prev = list; ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisInitializeListHead(list); ++ ++#endif ++ ++} ++ ++ ++/* ++For the following list_xxx operations, ++caller must guarantee the atomic context. ++Otherwise, there will be racing condition. ++*/ ++u32 rtw_is_list_empty(_list *phead) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ if (list_empty(phead)) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ ++ if (phead->next == phead) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++ if (IsListEmpty(phead)) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++ ++ ++} ++ ++void rtw_list_insert_head(_list *plist, _list *phead) ++{ ++ ++#ifdef PLATFORM_LINUX ++ list_add(plist, phead); ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ __list_add(plist, phead, phead->next); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ InsertHeadList(phead, plist); ++#endif ++} ++ ++void rtw_list_insert_tail(_list *plist, _list *phead) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ list_add_tail(plist, phead); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ ++ __list_add(plist, phead->prev, phead); ++ ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ InsertTailList(phead, plist); ++ ++#endif ++ ++} ++ ++ ++/* ++ ++Caller must check if the list is empty before calling rtw_list_delete ++ ++*/ ++ ++ ++void _rtw_init_sema(_sema *sema, int init_val) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ sema_init(sema, init_val); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ sema_init(sema, init_val, "rtw_drv"); ++#endif ++#ifdef PLATFORM_OS_XP ++ ++ KeInitializeSemaphore(sema, init_val, SEMA_UPBND); // count=0; ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ if(*sema == NULL) ++ *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); ++#endif ++ ++} ++ ++void _rtw_free_sema(_sema *sema) ++{ ++#ifdef PLATFORM_FREEBSD ++ sema_destroy(sema); ++#endif ++#ifdef PLATFORM_OS_CE ++ CloseHandle(*sema); ++#endif ++ ++} ++ ++void _rtw_up_sema(_sema *sema) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ up(sema); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ sema_post(sema); ++#endif ++#ifdef PLATFORM_OS_XP ++ ++ KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1, FALSE ); ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ ReleaseSemaphore(*sema, 1, NULL ); ++#endif ++} ++ ++u32 _rtw_down_sema(_sema *sema) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ if (down_interruptible(sema)) ++ return _FAIL; ++ else ++ return _SUCCESS; ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ sema_wait(sema); ++ return _SUCCESS; ++#endif ++#ifdef PLATFORM_OS_XP ++ ++ if(STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL)) ++ return _SUCCESS; ++ else ++ return _FAIL; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ if(WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE )) ++ return _SUCCESS; ++ else ++ return _FAIL; ++#endif ++} ++ ++ ++ ++void _rtw_mutex_init(_mutex *pmutex) ++{ ++#ifdef PLATFORM_LINUX ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_init(pmutex); ++#else ++ init_MUTEX(pmutex); ++#endif ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_init(pmutex, "", NULL, MTX_DEF|MTX_RECURSE); ++#endif ++#ifdef PLATFORM_OS_XP ++ ++ KeInitializeMutex(pmutex, 0); ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ *pmutex = CreateMutex( NULL, _FALSE, NULL); ++#endif ++} ++ ++void _rtw_mutex_free(_mutex *pmutex); ++void _rtw_mutex_free(_mutex *pmutex) ++{ ++#ifdef PLATFORM_LINUX ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_destroy(pmutex); ++#else ++#endif ++ ++#ifdef PLATFORM_FREEBSD ++ sema_destroy(pmutex); ++#endif ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ ++#endif ++} ++ ++void _rtw_spinlock_init(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock_init(plock); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_init(plock, "", NULL, MTX_DEF|MTX_RECURSE); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAllocateSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinlock_free(_lock *plock) ++{ ++#ifdef PLATFORM_FREEBSD ++ mtx_destroy(plock); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisFreeSpinLock(plock); ++ ++#endif ++ ++} ++#ifdef PLATFORM_FREEBSD ++extern PADAPTER prtw_lock; ++ ++void rtw_mtx_lock(_lock *plock){ ++ if(prtw_lock){ ++ mtx_lock(&prtw_lock->glock); ++ } ++ else{ ++ printf("%s prtw_lock==NULL",__FUNCTION__); ++ } ++} ++void rtw_mtx_unlock(_lock *plock){ ++ if(prtw_lock){ ++ mtx_unlock(&prtw_lock->glock); ++ } ++ else{ ++ printf("%s prtw_lock==NULL",__FUNCTION__); ++ } ++ ++} ++#endif //PLATFORM_FREEBSD ++ ++ ++void _rtw_spinlock(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock(plock); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_lock(plock); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAcquireSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinunlock(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_unlock(plock); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_unlock(plock); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisReleaseSpinLock(plock); ++ ++#endif ++} ++ ++ ++void _rtw_spinlock_ex(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock(plock); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_lock(plock); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisDprAcquireSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinunlock_ex(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_unlock(plock); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ mtx_unlock(plock); ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisDprReleaseSpinLock(plock); ++ ++#endif ++} ++ ++ ++ ++void _rtw_init_queue(_queue *pqueue) ++{ ++ ++ _rtw_init_listhead(&(pqueue->queue)); ++ ++ _rtw_spinlock_init(&(pqueue->lock)); ++ ++} ++ ++u32 _rtw_queue_empty(_queue *pqueue) ++{ ++ return (rtw_is_list_empty(&(pqueue->queue))); ++} ++ ++ ++u32 rtw_end_of_queue_search(_list *head, _list *plist) ++{ ++ if (head == plist) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++ ++u32 rtw_get_current_time(void) ++{ ++ ++#ifdef PLATFORM_LINUX ++ return jiffies; ++#endif ++#ifdef PLATFORM_FREEBSD ++ struct timeval tvp; ++ getmicrotime(&tvp); ++ return tvp.tv_sec; ++#endif ++#ifdef PLATFORM_WINDOWS ++ LARGE_INTEGER SystemTime; ++ NdisGetCurrentSystemTime(&SystemTime); ++ return (u32)(SystemTime.LowPart);// count of 100-nanosecond intervals ++#endif ++} ++ ++inline u32 rtw_systime_to_ms(u32 systime) ++{ ++#ifdef PLATFORM_LINUX ++ return systime * 1000 / HZ; ++#endif ++#ifdef PLATFORM_FREEBSD ++ return systime * 1000; ++#endif ++#ifdef PLATFORM_WINDOWS ++ return systime / 10000 ; ++#endif ++} ++ ++inline u32 rtw_ms_to_systime(u32 ms) ++{ ++#ifdef PLATFORM_LINUX ++ return ms * HZ / 1000; ++#endif ++#ifdef PLATFORM_FREEBSD ++ return ms /1000; ++#endif ++#ifdef PLATFORM_WINDOWS ++ return ms * 10000 ; ++#endif ++} ++ ++// the input parameter start use the same unit as returned by rtw_get_current_time ++inline s32 rtw_get_passing_time_ms(u32 start) ++{ ++#ifdef PLATFORM_LINUX ++ return rtw_systime_to_ms(jiffies-start); ++#endif ++#ifdef PLATFORM_FREEBSD ++ return rtw_systime_to_ms(rtw_get_current_time()); ++#endif ++#ifdef PLATFORM_WINDOWS ++ LARGE_INTEGER SystemTime; ++ NdisGetCurrentSystemTime(&SystemTime); ++ return rtw_systime_to_ms((u32)(SystemTime.LowPart) - start) ; ++#endif ++} ++ ++inline s32 rtw_get_time_interval_ms(u32 start, u32 end) ++{ ++#ifdef PLATFORM_LINUX ++ return rtw_systime_to_ms(end-start); ++#endif ++#ifdef PLATFORM_FREEBSD ++ return rtw_systime_to_ms(rtw_get_current_time()); ++#endif ++#ifdef PLATFORM_WINDOWS ++ return rtw_systime_to_ms(end-start); ++#endif ++} ++ ++ ++void rtw_sleep_schedulable(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ u32 delta; ++ ++ delta = (ms * HZ)/1000;//(ms) ++ if (delta == 0) { ++ delta = 1;// 1 ms ++ } ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (schedule_timeout(delta) != 0) { ++ return ; ++ } ++ return; ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ DELAY(ms*1000); ++ return ; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++} ++ ++ ++void rtw_msleep_os(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ msleep((unsigned int)ms); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ //Delay for delay microseconds ++ DELAY(ms*1000); ++ return ; ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void rtw_usleep_os(int us) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ // msleep((unsigned int)us); ++ if ( 1 < (us/1000) ) ++ msleep(1); ++ else ++ msleep( (us/1000) + 1); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ //Delay for delay microseconds ++ DELAY(us); ++ ++ return ; ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(us); //(us) ++ ++#endif ++ ++ ++} ++ ++ ++#ifdef DBG_DELAY_OS ++void _rtw_mdelay_os(int ms, const char *func, const int line) ++{ ++ #if 0 ++ if(ms>10) ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); ++ rtw_msleep_os(ms); ++ return; ++ #endif ++ ++ ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); ++ ++#if defined(PLATFORM_LINUX) ++ ++ mdelay((unsigned long)ms); ++ ++#elif defined(PLATFORM_WINDOWS) ++ ++ NdisStallExecution(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void _rtw_udelay_os(int us, const char *func, const int line) ++{ ++ ++ #if 0 ++ if(us > 1000) { ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); ++ rtw_usleep_os(us); ++ return; ++ } ++ #endif ++ ++ ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); ++ ++ ++#if defined(PLATFORM_LINUX) ++ ++ udelay((unsigned long)us); ++ ++#elif defined(PLATFORM_WINDOWS) ++ ++ NdisStallExecution(us); //(us) ++ ++#endif ++ ++} ++#else ++void rtw_mdelay_os(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ mdelay((unsigned long)ms); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ DELAY(ms*1000); ++ return ; ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisStallExecution(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void rtw_udelay_os(int us) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ udelay((unsigned long)us); ++ ++#endif ++#ifdef PLATFORM_FREEBSD ++ //Delay for delay microseconds ++ DELAY(us); ++ return ; ++#endif ++#ifdef PLATFORM_WINDOWS ++ ++ NdisStallExecution(us); //(us) ++ ++#endif ++ ++} ++#endif ++ ++void rtw_yield_os() ++{ ++#ifdef PLATFORM_LINUX ++ yield(); ++#endif ++#ifdef PLATFORM_FREEBSD ++ yield(); ++#endif ++#ifdef PLATFORM_WINDOWS ++ SwitchToThread(); ++#endif ++} ++ ++#define RTW_SUSPEND_LOCK_NAME "rtw_wifi" ++ ++#ifdef CONFIG_WAKELOCK ++static struct wake_lock rtw_suspend_lock; ++#elif defined(CONFIG_ANDROID_POWER) ++static android_suspend_lock_t rtw_suspend_lock ={ ++ .name = RTW_SUSPEND_LOCK_NAME ++}; ++#endif ++ ++inline void rtw_suspend_lock_init() ++{ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_init_suspend_lock(&rtw_suspend_lock); ++ #endif ++} ++ ++inline void rtw_suspend_lock_uninit() ++{ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock_destroy(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_uninit_suspend_lock(&rtw_suspend_lock); ++ #endif ++} ++ ++inline void rtw_lock_suspend() ++{ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_lock_suspend(&rtw_suspend_lock); ++ #endif ++} ++ ++inline void rtw_unlock_suspend() ++{ ++ #ifdef CONFIG_WAKELOCK ++ wake_unlock(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_unlock_suspend(&rtw_suspend_lock); ++ #endif ++} ++ ++inline void rtw_lock_suspend_timeout(u32 timeout_ms) ++{ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock_timeout(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_lock_suspend_auto_expire(&rtw_suspend_lock, rtw_ms_to_systime(timeout_ms)); ++ #endif ++} ++ ++inline void ATOMIC_SET(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_set(v,i); ++ #elif defined(PLATFORM_WINDOWS) ++ *v=i;// other choice???? ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_set_int(v,i); ++ #endif ++} ++ ++inline int ATOMIC_READ(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_read(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return *v; // other choice???? ++ #elif defined(PLATFORM_FREEBSD) ++ return atomic_load_acq_32(v); ++ #endif ++} ++ ++inline void ATOMIC_ADD(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_add(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedAdd(v,i); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_add_int(v,i); ++ #endif ++} ++inline void ATOMIC_SUB(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_sub(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedAdd(v,-i); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_subtract_int(v,i); ++ #endif ++} ++ ++inline void ATOMIC_INC(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_inc(v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedIncrement(v); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_add_int(v,1); ++ #endif ++} ++ ++inline void ATOMIC_DEC(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_dec(v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedDecrement(v); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_subtract_int(v,1); ++ #endif ++} ++ ++inline int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_add_return(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedAdd(v,i); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_add_int(v,i); ++ return atomic_load_acq_32(v); ++ #endif ++} ++ ++inline int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_sub_return(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedAdd(v,-i); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_subtract_int(v,i); ++ return atomic_load_acq_32(v); ++ #endif ++} ++ ++inline int ATOMIC_INC_RETURN(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_inc_return(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedIncrement(v); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_add_int(v,1); ++ return atomic_load_acq_32(v); ++ #endif ++} ++ ++inline int ATOMIC_DEC_RETURN(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_dec_return(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedDecrement(v); ++ #elif defined(PLATFORM_FREEBSD) ++ atomic_subtract_int(v,1); ++ return atomic_load_acq_32(v); ++ #endif ++} ++ ++ ++#ifdef PLATFORM_LINUX ++/* ++* Open a file with the specific @param path, @param flag, @param mode ++* @param fpp the pointer of struct file pointer to get struct file pointer while file opening is success ++* @param path the path of the file to open ++* @param flag file operation flags, please refer to linux document ++* @param mode please refer to linux document ++* @return Linux specific error code ++*/ ++static int openFile(struct file **fpp, char *path, int flag, int mode) ++{ ++ struct file *fp; ++ ++ fp=filp_open(path, flag, mode); ++ if(IS_ERR(fp)) { ++ *fpp=NULL; ++ return PTR_ERR(fp); ++ } ++ else { ++ *fpp=fp; ++ return 0; ++ } ++} ++ ++/* ++* Close the file with the specific @param fp ++* @param fp the pointer of struct file to close ++* @return always 0 ++*/ ++static int closeFile(struct file *fp) ++{ ++ filp_close(fp,NULL); ++ return 0; ++} ++ ++static int readFile(struct file *fp,char *buf,int len) ++{ ++ int rlen=0, sum=0; ++ ++ if (!fp->f_op || !fp->f_op->read) ++ return -EPERM; ++ ++ while(sumf_op->read(fp,buf+sum,len-sum, &fp->f_pos); ++ if(rlen>0) ++ sum+=rlen; ++ else if(0 != rlen) ++ return rlen; ++ else ++ break; ++ } ++ ++ return sum; ++ ++} ++ ++static int writeFile(struct file *fp,char *buf,int len) ++{ ++ int wlen=0, sum=0; ++ ++ if (!fp->f_op || !fp->f_op->write) ++ return -EPERM; ++ ++ while(sumf_op->write(fp,buf+sum,len-sum, &fp->f_pos); ++ if(wlen>0) ++ sum+=wlen; ++ else if(0 != wlen) ++ return wlen; ++ else ++ break; ++ } ++ ++ return sum; ++ ++} ++ ++/* ++* Test if the specifi @param path is a file and readable ++* @param path the path of the file to test ++* @return Linux specific error code ++*/ ++static int isFileReadable(char *path) ++{ ++ struct file *fp; ++ int ret = 0; ++ mm_segment_t oldfs; ++ char buf; ++ ++ fp=filp_open(path, O_RDONLY, 0); ++ if(IS_ERR(fp)) { ++ ret = PTR_ERR(fp); ++ } ++ else { ++ oldfs = get_fs(); set_fs(get_ds()); ++ ++ if(1!=readFile(fp, &buf, 1)) ++ ret = PTR_ERR(fp); ++ ++ set_fs(oldfs); ++ filp_close(fp,NULL); ++ } ++ return ret; ++} ++ ++/* ++* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most ++* @param path the path of the file to open and read ++* @param buf the starting address of the buffer to store file content ++* @param sz how many bytes to read at most ++* @return the byte we've read, or Linux specific error code ++*/ ++static int retriveFromFile(char *path, u8* buf, u32 sz) ++{ ++ int ret =-1; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && buf) { ++ if( 0 == (ret=openFile(&fp,path, O_RDONLY, 0)) ){ ++ DBG_871X("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); ++ ++ oldfs = get_fs(); set_fs(get_ds()); ++ ret=readFile(fp, buf, sz); ++ set_fs(oldfs); ++ closeFile(fp); ++ ++ DBG_871X("%s readFile, ret:%d\n",__FUNCTION__, ret); ++ ++ } else { ++ DBG_871X("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); ++ } ++ } else { ++ DBG_871X("%s NULL pointer\n",__FUNCTION__); ++ ret = -EINVAL; ++ } ++ return ret; ++} ++ ++/* ++* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file ++* @param path the path of the file to open and write ++* @param buf the starting address of the data to write into file ++* @param sz how many bytes to write at most ++* @return the byte we've written, or Linux specific error code ++*/ ++static int storeToFile(char *path, u8* buf, u32 sz) ++{ ++ int ret =0; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && buf) { ++ if( 0 == (ret=openFile(&fp, path, O_CREAT|O_WRONLY, 0666)) ) { ++ DBG_871X("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); ++ ++ oldfs = get_fs(); set_fs(get_ds()); ++ ret=writeFile(fp, buf, sz); ++ set_fs(oldfs); ++ closeFile(fp); ++ ++ DBG_871X("%s writeFile, ret:%d\n",__FUNCTION__, ret); ++ ++ } else { ++ DBG_871X("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); ++ } ++ } else { ++ DBG_871X("%s NULL pointer\n",__FUNCTION__); ++ ret = -EINVAL; ++ } ++ return ret; ++} ++#endif //PLATFORM_LINUX ++ ++/* ++* Test if the specifi @param path is a file and readable ++* @param path the path of the file to test ++* @return _TRUE or _FALSE ++*/ ++int rtw_is_file_readable(char *path) ++{ ++#ifdef PLATFORM_LINUX ++ if(isFileReadable(path) == 0) ++ return _TRUE; ++ else ++ return _FALSE; ++#else ++ //Todo... ++ return _FALSE; ++#endif ++} ++ ++/* ++* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most ++* @param path the path of the file to open and read ++* @param buf the starting address of the buffer to store file content ++* @param sz how many bytes to read at most ++* @return the byte we've read ++*/ ++int rtw_retrive_from_file(char *path, u8* buf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ int ret =retriveFromFile(path, buf, sz); ++ return ret>=0?ret:0; ++#else ++ //Todo... ++ return 0; ++#endif ++} ++ ++/* ++* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file ++* @param path the path of the file to open and write ++* @param buf the starting address of the data to write into file ++* @param sz how many bytes to write at most ++* @return the byte we've written ++*/ ++int rtw_store_to_file(char *path, u8* buf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ int ret =storeToFile(path, buf, sz); ++ return ret>=0?ret:0; ++#else ++ //Todo... ++ return 0; ++#endif ++} ++ ++#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR ++#ifdef PLATFORM_LINUX ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv) ++{ ++ struct net_device *pnetdev; ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); ++#else ++ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++#endif ++ if (!pnetdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(pnetdev); ++ pnpi->priv=old_priv; ++ pnpi->sizeof_priv=sizeof_priv; ++ ++RETURN: ++ return pnetdev; ++} ++ ++struct net_device *rtw_alloc_etherdev(int sizeof_priv) ++{ ++ struct net_device *pnetdev; ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++ pnetdev = alloc_etherdev_mq(sizeof(struct rtw_netdev_priv_indicator), 4); ++#else ++ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++#endif ++ if (!pnetdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(pnetdev); ++ ++ pnpi->priv = rtw_zvmalloc(sizeof_priv); ++ if (!pnpi->priv) { ++ free_netdev(pnetdev); ++ pnetdev = NULL; ++ goto RETURN; ++ } ++ ++ pnpi->sizeof_priv=sizeof_priv; ++RETURN: ++ return pnetdev; ++} ++ ++void rtw_free_netdev(struct net_device * netdev) ++{ ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++ if(!netdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(netdev); ++ ++ if(!pnpi->priv) ++ goto RETURN; ++ ++ rtw_vmfree(pnpi->priv, pnpi->sizeof_priv); ++ free_netdev(netdev); ++ ++RETURN: ++ return; ++} ++ ++/* ++* Jeff: this function should be called under ioctl (rtnl_lock is accquired) while ++* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) ++*/ ++int rtw_change_ifname(_adapter *padapter, const char *ifname) ++{ ++ struct net_device *pnetdev; ++ struct net_device *cur_pnetdev = padapter->pnetdev; ++ struct rereg_nd_name_data *rereg_priv; ++ int ret; ++ ++ if(!padapter) ++ goto error; ++ ++ rereg_priv = &padapter->rereg_nd_name_priv; ++ ++ //free the old_pnetdev ++ if(rereg_priv->old_pnetdev) { ++ free_netdev(rereg_priv->old_pnetdev); ++ rereg_priv->old_pnetdev = NULL; ++ } ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) ++ if(!rtnl_is_locked()) ++ unregister_netdev(cur_pnetdev); ++ else ++#endif ++ unregister_netdevice(cur_pnetdev); ++ ++ rtw_proc_remove_one(cur_pnetdev); ++ ++ rereg_priv->old_pnetdev=cur_pnetdev; ++ ++ pnetdev = rtw_init_netdev(padapter); ++ if (!pnetdev) { ++ ret = -1; ++ goto error; ++ } ++ ++ SET_NETDEV_DEV(pnetdev, dvobj_to_dev(adapter_to_dvobj(padapter))); ++ ++ rtw_init_netdev_name(pnetdev, ifname); ++ ++ _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) ++ if(!rtnl_is_locked()) ++ ret = register_netdev(pnetdev); ++ else ++#endif ++ ret = register_netdevice(pnetdev); ++ ++ if ( ret != 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); ++ goto error; ++ } ++ ++ rtw_proc_init_one(pnetdev); ++ ++ return 0; ++ ++error: ++ ++ return -1; ++ ++} ++#endif ++#endif //MEM_ALLOC_REFINE_ADAPTOR ++ ++#ifdef PLATFORM_FREEBSD ++/* ++ * Copy a buffer from userspace and write into kernel address ++ * space. ++ * ++ * This emulation just calls the FreeBSD copyin function (to ++ * copy data from user space buffer into a kernel space buffer) ++ * and is designed to be used with the above io_write_wrapper. ++ * ++ * This function should return the number of bytes not copied. ++ * I.e. success results in a zero value. ++ * Negative error values are not returned. ++ */ ++unsigned long ++copy_from_user(void *to, const void *from, unsigned long n) ++{ ++ if ( copyin(from, to, n) != 0 ) { ++ /* Any errors will be treated as a failure ++ to copy any of the requested bytes */ ++ return n; ++ } ++ ++ return 0; ++} ++ ++unsigned long ++copy_to_user(void *to, const void *from, unsigned long n) ++{ ++ if ( copyout(from, to, n) != 0 ) { ++ /* Any errors will be treated as a failure ++ to copy any of the requested bytes */ ++ return n; ++ } ++ ++ return 0; ++} ++ ++ ++/* ++ * The usb_register and usb_deregister functions are used to register ++ * usb drivers with the usb subsystem. In this compatibility layer ++ * emulation a list of drivers (struct usb_driver) is maintained ++ * and is used for probing/attaching etc. ++ * ++ * usb_register and usb_deregister simply call these functions. ++ */ ++int ++usb_register(struct usb_driver *driver) ++{ ++ rtw_usb_linux_register(driver); ++ return 0; ++} ++ ++ ++int ++usb_deregister(struct usb_driver *driver) ++{ ++ rtw_usb_linux_deregister(driver); ++ return 0; ++} ++ ++void module_init_exit_wrapper(void *arg) ++{ ++ int (*func)(void) = arg; ++ func(); ++ return; ++} ++ ++#endif //PLATFORM_FREEBSD ++u64 rtw_modular64(u64 x, u64 y) ++{ ++#ifdef PLATFORM_LINUX ++ return do_div(x, y); ++#elif defined(PLATFORM_WINDOWS) ++ return (x % y); ++#elif defined(PLATFORM_FREEBSD) ++ return (x %y); ++#endif ++} ++ ++u64 rtw_division64(u64 x, u64 y) ++{ ++#ifdef PLATFORM_LINUX ++ do_div(x, y); ++ return x; ++#elif defined(PLATFORM_WINDOWS) ++ return (x / y); ++#elif defined(PLATFORM_FREEBSD) ++ return (x / y); ++#endif ++} ++ ++void rtw_buf_free(u8 **buf, u32 *buf_len) ++{ ++ u32 ori_len; ++ ++ if (!buf || !buf_len) ++ return; ++ ++ ori_len = *buf_len; ++ ++ if (*buf) { ++ u32 tmp_buf_len = *buf_len; ++ *buf_len = 0; ++ rtw_mfree(*buf, tmp_buf_len); ++ *buf = NULL; ++ } ++} ++ ++void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len) ++{ ++ u32 ori_len = 0, dup_len = 0; ++ u8 *ori = NULL; ++ u8 *dup = NULL; ++ ++ if (!buf || !buf_len) ++ return; ++ ++ if (!src || !src_len) ++ goto keep_ori; ++ ++ /* duplicate src */ ++ dup = rtw_malloc(src_len); ++ if (dup) { ++ dup_len = src_len; ++ _rtw_memcpy(dup, src, dup_len); ++ } ++ ++keep_ori: ++ ori = *buf; ++ ori_len = *buf_len; ++ ++ /* replace buf with dup */ ++ *buf_len = 0; ++ *buf = dup; ++ *buf_len = dup_len; ++ ++ /* free ori */ ++ if (ori && ori_len > 0) ++ rtw_mfree(ori, ori_len); ++} ++ ++ ++/** ++ * rtw_cbuf_full - test if cbuf is full ++ * @cbuf: pointer of struct rtw_cbuf ++ * ++ * Returns: _TRUE if cbuf is full ++ */ ++inline bool rtw_cbuf_full(struct rtw_cbuf *cbuf) ++{ ++ return (cbuf->write == cbuf->read-1)? _TRUE : _FALSE; ++} ++ ++/** ++ * rtw_cbuf_empty - test if cbuf is empty ++ * @cbuf: pointer of struct rtw_cbuf ++ * ++ * Returns: _TRUE if cbuf is empty ++ */ ++inline bool rtw_cbuf_empty(struct rtw_cbuf *cbuf) ++{ ++ return (cbuf->write == cbuf->read)? _TRUE : _FALSE; ++} ++ ++/** ++ * rtw_cbuf_push - push a pointer into cbuf ++ * @cbuf: pointer of struct rtw_cbuf ++ * @buf: pointer to push in ++ * ++ * Lock free operation, be careful of the use scheme ++ * Returns: _TRUE push success ++ */ ++bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf) ++{ ++ if (rtw_cbuf_full(cbuf)) ++ return _FAIL; ++ ++ if (0) ++ DBG_871X("%s on %u\n", __func__, cbuf->write); ++ cbuf->bufs[cbuf->write] = buf; ++ cbuf->write = (cbuf->write+1)%cbuf->size; ++ ++ return _SUCCESS; ++} ++ ++/** ++ * rtw_cbuf_pop - pop a pointer from cbuf ++ * @cbuf: pointer of struct rtw_cbuf ++ * ++ * Lock free operation, be careful of the use scheme ++ * Returns: pointer popped out ++ */ ++void *rtw_cbuf_pop(struct rtw_cbuf *cbuf) ++{ ++ void *buf; ++ if (rtw_cbuf_empty(cbuf)) ++ return NULL; ++ ++ if (0) ++ DBG_871X("%s on %u\n", __func__, cbuf->read); ++ buf = cbuf->bufs[cbuf->read]; ++ cbuf->read = (cbuf->read+1)%cbuf->size; ++ ++ return buf; ++} ++ ++/** ++ * rtw_cbuf_alloc - allocte a rtw_cbuf with given size and do initialization ++ * @size: size of pointer ++ * ++ * Returns: pointer of srtuct rtw_cbuf, NULL for allocation failure ++ */ ++struct rtw_cbuf *rtw_cbuf_alloc(u32 size) ++{ ++ struct rtw_cbuf *cbuf; ++ ++ cbuf = (struct rtw_cbuf *)rtw_malloc(sizeof(*cbuf) + sizeof(void*)*size); ++ ++ if (cbuf) { ++ cbuf->write = cbuf->read = 0; ++ cbuf->size = size; ++ } ++ ++ return cbuf; ++} ++ ++/** ++ * rtw_cbuf_free - free the given rtw_cbuf ++ * @cbuf: pointer of struct rtw_cbuf to free ++ */ ++void rtw_cbuf_free(struct rtw_cbuf *cbuf) ++{ ++ rtw_mfree((u8*)cbuf, sizeof(*cbuf) + sizeof(void*)*cbuf->size); ++} ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/runwpa +@@ -0,0 +1,20 @@ ++#!/bin/bash ++ ++if [ "`which iwconfig`" = "" ] ; then ++ echo "WARNING:Wireless tool not exist!" ++ echo " Please install it!" ++ exit ++else ++ if [ `uname -r | cut -d. -f2` -eq 4 ]; then ++ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 ++ else ++ if [ `iwconfig -v |awk '{print $4}' | head -n 1` -lt 18 ] ; then ++ wpa_supplicant -D ipw -c wpa1.conf -i wlan0 ++ else ++ wpa_supplicant -D wext -c wpa1.conf -i wlan0 ++ fi ++ ++ fi ++fi ++ ++ +--- /dev/null ++++ b/drivers/net/wireless/realtek/rtl8192cu/wlan0dhcp +@@ -0,0 +1,15 @@ ++#!/bin/bash ++ ++var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'` ++ ++kill $var0 ++cp ifcfg-wlan0 /etc/sysconfig/network-scripts/ ++ ++dhclient wlan0 ++ ++var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'` ++ ++ ++rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0 ++ ++echo "get ip: $var1" diff --git a/target/linux/brcm2708/patches-4.9/950-0090-OF-DT-Overlay-configfs-interface.patch b/target/linux/brcm2708/patches-4.19/950-0092-OF-DT-Overlay-configfs-interface.patch similarity index 93% rename from target/linux/brcm2708/patches-4.9/950-0090-OF-DT-Overlay-configfs-interface.patch rename to target/linux/brcm2708/patches-4.19/950-0092-OF-DT-Overlay-configfs-interface.patch index 941047adc..fcde0daa8 100644 --- a/target/linux/brcm2708/patches-4.9/950-0090-OF-DT-Overlay-configfs-interface.patch +++ b/target/linux/brcm2708/patches-4.19/950-0092-OF-DT-Overlay-configfs-interface.patch @@ -1,7 +1,7 @@ -From ef4a8376af32bb6722e1ea933a9e1a83ebc8f175 Mon Sep 17 00:00:00 2001 +From 1889a5e0d20a7f58b95cb41c682bf1a09a37d4f6 Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Wed, 3 Dec 2014 13:23:28 +0200 -Subject: [PATCH] OF: DT-Overlay configfs interface +Subject: [PATCH 092/703] OF: DT-Overlay configfs interface This is a port of Pantelis Antoniou's v3 port that makes use of the new upstreamed configfs support for binary attributes. @@ -43,12 +43,14 @@ The .default_groups is linked list since commit This commit uses configfs_add_default_group to fix this problem. Signed-off-by: Slawomir Stepien + +configfs: New of_overlay API --- - Documentation/devicetree/configfs-overlays.txt | 31 +++ - drivers/of/Kconfig | 7 + - drivers/of/Makefile | 1 + - drivers/of/configfs.c | 311 +++++++++++++++++++++++++ - 4 files changed, 350 insertions(+) + .../devicetree/configfs-overlays.txt | 31 ++ + drivers/of/Kconfig | 7 + + drivers/of/Makefile | 1 + + drivers/of/configfs.c | 310 ++++++++++++++++++ + 4 files changed, 349 insertions(+) create mode 100644 Documentation/devicetree/configfs-overlays.txt create mode 100644 drivers/of/configfs.c @@ -88,7 +90,7 @@ Signed-off-by: Slawomir Stepien +make sense for developers (since it avoids problems with namespaces). --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig -@@ -112,4 +112,11 @@ config OF_OVERLAY +@@ -104,4 +104,11 @@ config OF_OVERLAY config OF_NUMA bool @@ -102,15 +104,17 @@ Signed-off-by: Slawomir Stepien endif # OF --- a/drivers/of/Makefile +++ b/drivers/of/Makefile -@@ -1,4 +1,5 @@ - obj-y = base.o device.o platform.o +@@ -1,6 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + obj-y = base.o device.o platform.o property.o + obj-$(CONFIG_OF_KOBJ) += kobj.o +obj-$(CONFIG_OF_CONFIGFS) += configfs.o obj-$(CONFIG_OF_DYNAMIC) += dynamic.o obj-$(CONFIG_OF_FLATTREE) += fdt.o obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o --- /dev/null +++ b/drivers/of/configfs.c -@@ -0,0 +1,311 @@ +@@ -0,0 +1,310 @@ +/* + * Configfs entries for device-tree + * @@ -177,13 +181,12 @@ Signed-off-by: Slawomir Stepien + } + pr_debug("%s: resolved OK\n", __func__); + -+ err = of_overlay_create(overlay->overlay); ++ err = of_overlay_apply(overlay->overlay, &overlay->ov_id); + if (err < 0) { + pr_err("%s: Failed to create overlay (err=%d)\n", + __func__, err); + goto out_err; + } -+ overlay->ov_id = err; + +out_err: + return err; @@ -328,7 +331,7 @@ Signed-off-by: Slawomir Stepien + struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); + + if (overlay->ov_id >= 0) -+ of_overlay_destroy(overlay->ov_id); ++ of_overlay_remove(&overlay->ov_id); + if (overlay->fw) + release_firmware(overlay->fw); + /* kfree with NULL is safe */ diff --git a/target/linux/brcm2708/patches-4.19/950-0093-brcm-adds-support-for-BCM43341-wifi.patch b/target/linux/brcm2708/patches-4.19/950-0093-brcm-adds-support-for-BCM43341-wifi.patch new file mode 100644 index 000000000..6efde5f1f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0093-brcm-adds-support-for-BCM43341-wifi.patch @@ -0,0 +1,128 @@ +From fe1028f8aa31decab2a006c977598bd75eb42b40 Mon Sep 17 00:00:00 2001 +From: Cheong2K +Date: Fri, 26 Feb 2016 18:20:10 +0800 +Subject: [PATCH 093/703] brcm: adds support for BCM43341 wifi + +brcmfmac: Disable power management + +Disable wireless power saving in the brcmfmac WLAN driver. This is a +temporary measure until the connectivity loss resulting from power +saving is resolved. + +Signed-off-by: Phil Elwell + +brcmfmac: Use original country code as a fallback + +Commit 73345fd212980d2e28a5c6d83801c903bd773680: + + brcmfmac: Configure country code using device specific settings + +prevents region codes from working on devices that lack a region code +translation table. In the event of an absent table, preserve the old +behaviour of using the provided code as-is. + +Signed-off-by: Phil Elwell + +brcmfmac: Plug memory leak in brcmf_fill_bss_param + +See: https://github.com/raspberrypi/linux/issues/1471 + +Signed-off-by: Phil Elwell + +brcmfmac: do not use internal roaming engine by default + +Some evidence of curing disconnects with this disabled, so make it a default. +Can be overridden with module parameter roamoff=0 +See: http://projectable.me/optimize-my-pi-wi-fi/ + +brcmfmac: Change stop_ap sequence + +Patch from Broadcom/Cypress to resolve a customer error + +Signed-off-by: Phil Elwell +--- + .../broadcom/brcm80211/brcmfmac/cfg80211.c | 22 ++++++++++++++----- + .../broadcom/brcm80211/brcmfmac/common.c | 2 +- + .../broadcom/brcm80211/brcmfmac/sdio.c | 3 ++- + 3 files changed, 20 insertions(+), 7 deletions(-) + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c +@@ -2697,6 +2697,8 @@ brcmf_cfg80211_set_power_mgmt(struct wip + * preference in cfg struct to apply this to + * FW later while initializing the dongle + */ ++ pr_info("power management disabled\n"); ++ enabled = false; + cfg->pwr_save = enabled; + if (!check_vif_up(ifp->vif)) { + +@@ -6776,12 +6778,18 @@ static s32 brcmf_translate_country_code( + struct brcmfmac_pd_cc *country_codes; + struct brcmfmac_pd_cc_entry *cc; + s32 found_index; ++ char ccode[BRCMF_COUNTRY_BUF_SZ]; ++ int rev; + int i; + ++ memcpy(ccode, alpha2, sizeof(ccode)); ++ rev = -1; ++ + country_codes = drvr->settings->country_codes; + if (!country_codes) { +- brcmf_dbg(TRACE, "No country codes configured for device\n"); +- return -EINVAL; ++ brcmf_dbg(TRACE, "No country codes configured for device" ++ " - use requested value\n"); ++ goto use_input_value; + } + + if ((alpha2[0] == ccreq->country_abbrev[0]) && +@@ -6805,10 +6813,14 @@ static s32 brcmf_translate_country_code( + brcmf_dbg(TRACE, "No country code match found\n"); + return -EINVAL; + } +- memset(ccreq, 0, sizeof(*ccreq)); +- ccreq->rev = cpu_to_le32(country_codes->table[found_index].rev); +- memcpy(ccreq->ccode, country_codes->table[found_index].cc, ++ rev = country_codes->table[found_index].rev; ++ memcpy(ccode, country_codes->table[found_index].cc, + BRCMF_COUNTRY_BUF_SZ); ++ ++use_input_value: ++ memset(ccreq, 0, sizeof(*ccreq)); ++ ccreq->rev = cpu_to_le32(rev); ++ memcpy(ccreq->ccode, ccode, sizeof(ccode)); + ccreq->country_abbrev[0] = alpha2[0]; + ccreq->country_abbrev[1] = alpha2[1]; + ccreq->country_abbrev[2] = 0; +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c +@@ -70,7 +70,7 @@ static int brcmf_fcmode; + module_param_named(fcmode, brcmf_fcmode, int, 0); + MODULE_PARM_DESC(fcmode, "Mode of firmware signalled flow control"); + +-static int brcmf_roamoff; ++static int brcmf_roamoff = 1; + module_param_named(roamoff, brcmf_roamoff, int, 0400); + MODULE_PARM_DESC(roamoff, "Do not use internal roaming engine"); + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +@@ -608,6 +608,7 @@ BRCMF_FW_DEF(4329, "brcmfmac4329-sdio"); + BRCMF_FW_DEF(4330, "brcmfmac4330-sdio"); + BRCMF_FW_DEF(4334, "brcmfmac4334-sdio"); + BRCMF_FW_DEF(43340, "brcmfmac43340-sdio"); ++BRCMF_FW_DEF(43341, "brcmfmac43341-sdio"); + BRCMF_FW_DEF(4335, "brcmfmac4335-sdio"); + BRCMF_FW_DEF(43362, "brcmfmac43362-sdio"); + BRCMF_FW_DEF(4339, "brcmfmac4339-sdio"); +@@ -628,7 +629,7 @@ static const struct brcmf_firmware_mappi + BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330), + BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334), + BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340), +- BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340), ++ BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43341), + BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335), + BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362), + BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339), diff --git a/target/linux/brcm2708/patches-4.19/950-0094-brcmfmac-Mute-expected-startup-errors.patch b/target/linux/brcm2708/patches-4.19/950-0094-brcmfmac-Mute-expected-startup-errors.patch new file mode 100644 index 000000000..f92381ef8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0094-brcmfmac-Mute-expected-startup-errors.patch @@ -0,0 +1,24 @@ +From 06ec5a8827bec5fc4b7f2b322088c47963a782e4 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 17 Feb 2017 15:26:13 +0000 +Subject: [PATCH 094/703] brcmfmac: Mute expected startup 'errors' + +The brcmfmac WiFi driver always complains about the '00' country code. +Modify the driver to ignore '00' silently. + +Signed-off-by: Phil Elwell +--- + drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c +@@ -6844,6 +6844,8 @@ static void brcmf_cfg80211_reg_notifier( + /* ignore non-ISO3166 country codes */ + for (i = 0; i < 2; i++) + if (req->alpha2[i] < 'A' || req->alpha2[i] > 'Z') { ++ if (req->alpha2[0] == '0' && req->alpha2[1] == '0') ++ return; + brcmf_err("not an ISO3166 code (0x%02x 0x%02x)\n", + req->alpha2[0], req->alpha2[1]); + return; diff --git a/target/linux/brcm2708/patches-4.9/950-0092-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch b/target/linux/brcm2708/patches-4.19/950-0095-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch similarity index 79% rename from target/linux/brcm2708/patches-4.9/950-0092-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch rename to target/linux/brcm2708/patches-4.19/950-0095-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch index 780a211c8..e222700bc 100644 --- a/target/linux/brcm2708/patches-4.9/950-0092-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch +++ b/target/linux/brcm2708/patches-4.19/950-0095-hci_h5-Don-t-send-conf_req-when-ACTIVE.patch @@ -1,7 +1,7 @@ -From 0224b0469a7f5c2ee6420aac66e89e3206029633 Mon Sep 17 00:00:00 2001 +From 04398740be915fbbbc794b3b34aa36d11a85a0ab Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Thu, 17 Dec 2015 13:37:07 +0000 -Subject: [PATCH] hci_h5: Don't send conf_req when ACTIVE +Subject: [PATCH 095/703] hci_h5: Don't send conf_req when ACTIVE Without this patch, a modem and kernel can continuously bombard each other with conf_req and conf_rsp messages, in a demented game of tag. @@ -11,7 +11,7 @@ other with conf_req and conf_rsp messages, in a demented game of tag. --- a/drivers/bluetooth/hci_h5.c +++ b/drivers/bluetooth/hci_h5.c -@@ -310,7 +310,8 @@ static void h5_handle_internal_rx(struct +@@ -352,7 +352,8 @@ static void h5_handle_internal_rx(struct h5_link_control(hu, conf_req, 3); } else if (memcmp(data, conf_req, 2) == 0) { h5_link_control(hu, conf_rsp, 2); diff --git a/target/linux/brcm2708/patches-4.9/950-0093-config-Add-default-configs.patch b/target/linux/brcm2708/patches-4.19/950-0096-config-Add-default-configs.patch similarity index 91% rename from target/linux/brcm2708/patches-4.9/950-0093-config-Add-default-configs.patch rename to target/linux/brcm2708/patches-4.19/950-0096-config-Add-default-configs.patch index da92f04b4..25f25ee7e 100644 --- a/target/linux/brcm2708/patches-4.9/950-0093-config-Add-default-configs.patch +++ b/target/linux/brcm2708/patches-4.19/950-0096-config-Add-default-configs.patch @@ -1,24 +1,26 @@ -From 9455097dbb0c961edb6a47b451e18a985f5d9a3f Mon Sep 17 00:00:00 2001 +From 0c0a0d6d576db08b15281aa7263ebb4f26344d9f Mon Sep 17 00:00:00 2001 From: popcornmix Date: Mon, 13 Apr 2015 17:16:29 +0100 -Subject: [PATCH] config: Add default configs +Subject: [PATCH 096/703] config: Add default configs --- - arch/arm/configs/bcm2709_defconfig | 1297 +++++++++++++++++++++++++++++++++++ - arch/arm/configs/bcmrpi_defconfig | 1308 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 2605 insertions(+) + arch/arm/configs/bcm2709_defconfig | 1360 ++++++++++++++++++++++++++++ + arch/arm/configs/bcmrpi_defconfig | 1353 +++++++++++++++++++++++++++ + 2 files changed, 2713 insertions(+) create mode 100644 arch/arm/configs/bcm2709_defconfig create mode 100644 arch/arm/configs/bcmrpi_defconfig --- /dev/null +++ b/arch/arm/configs/bcm2709_defconfig -@@ -0,0 +1,1297 @@ +@@ -0,0 +1,1360 @@ +CONFIG_LOCALVERSION="-v7" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y ++CONFIG_GENERIC_IRQ_DEBUGFS=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y @@ -27,7 +29,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y -+CONFIG_NMI_LOG_BUF_SHIFT=12 +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_FREEZER=y @@ -41,30 +42,12 @@ Subject: [PATCH] config: Add default configs +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y -+CONFIG_OPROFILE=m -+CONFIG_KPROBES=y -+CONFIG_JUMP_LABEL=y -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+CONFIG_MODVERSIONS=y -+CONFIG_MODULE_SRCVERSION_ALL=y -+CONFIG_BLK_DEV_THROTTLING=y -+CONFIG_PARTITION_ADVANCED=y -+CONFIG_MAC_PARTITION=y -+CONFIG_CFQ_GROUP_IOSCHED=y +CONFIG_ARCH_BCM=y +CONFIG_ARCH_BCM2835=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_SMP=y +CONFIG_VMSPLIT_2G=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_AEABI=y +# CONFIG_CPU_SW_DOMAIN_PAN is not set -+CONFIG_CLEANCACHE=y -+CONFIG_FRONTSWAP=y -+CONFIG_CMA=y -+CONFIG_ZSMALLOC=m -+CONFIG_PGTABLE_MAPPING=y +CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y +# CONFIG_ATAGS is not set @@ -82,1264 +65,13 @@ Subject: [PATCH] config: Add default configs +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_KERNEL_MODE_NEON=y -+CONFIG_BINFMT_MISC=m +# CONFIG_SUSPEND is not set +CONFIG_PM=y -+CONFIG_NET=y -+CONFIG_PACKET=y -+CONFIG_UNIX=y -+CONFIG_XFRM_USER=y -+CONFIG_NET_KEY=m -+CONFIG_INET=y -+CONFIG_IP_MULTICAST=y -+CONFIG_IP_ADVANCED_ROUTER=y -+CONFIG_IP_MULTIPLE_TABLES=y -+CONFIG_IP_ROUTE_MULTIPATH=y -+CONFIG_IP_ROUTE_VERBOSE=y -+CONFIG_IP_PNP=y -+CONFIG_IP_PNP_DHCP=y -+CONFIG_IP_PNP_RARP=y -+CONFIG_NET_IPIP=m -+CONFIG_NET_IPGRE_DEMUX=m -+CONFIG_NET_IPGRE=m -+CONFIG_IP_MROUTE=y -+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y -+CONFIG_IP_PIMSM_V1=y -+CONFIG_IP_PIMSM_V2=y -+CONFIG_SYN_COOKIES=y -+CONFIG_INET_AH=m -+CONFIG_INET_ESP=m -+CONFIG_INET_IPCOMP=m -+CONFIG_INET_XFRM_MODE_TRANSPORT=m -+CONFIG_INET_XFRM_MODE_TUNNEL=m -+CONFIG_INET_XFRM_MODE_BEET=m -+CONFIG_INET_DIAG=m -+CONFIG_IPV6=m -+CONFIG_IPV6_ROUTER_PREF=y -+CONFIG_INET6_AH=m -+CONFIG_INET6_ESP=m -+CONFIG_INET6_IPCOMP=m -+CONFIG_IPV6_TUNNEL=m -+CONFIG_IPV6_MULTIPLE_TABLES=y -+CONFIG_IPV6_SUBTREES=y -+CONFIG_IPV6_MROUTE=y -+CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y -+CONFIG_IPV6_PIMSM_V2=y -+CONFIG_NETFILTER=y -+CONFIG_NF_CONNTRACK=m -+CONFIG_NF_CONNTRACK_ZONES=y -+CONFIG_NF_CONNTRACK_EVENTS=y -+CONFIG_NF_CONNTRACK_TIMESTAMP=y -+CONFIG_NF_CT_PROTO_DCCP=m -+CONFIG_NF_CT_PROTO_UDPLITE=m -+CONFIG_NF_CONNTRACK_AMANDA=m -+CONFIG_NF_CONNTRACK_FTP=m -+CONFIG_NF_CONNTRACK_H323=m -+CONFIG_NF_CONNTRACK_IRC=m -+CONFIG_NF_CONNTRACK_NETBIOS_NS=m -+CONFIG_NF_CONNTRACK_SNMP=m -+CONFIG_NF_CONNTRACK_PPTP=m -+CONFIG_NF_CONNTRACK_SANE=m -+CONFIG_NF_CONNTRACK_SIP=m -+CONFIG_NF_CONNTRACK_TFTP=m -+CONFIG_NF_CT_NETLINK=m -+CONFIG_NETFILTER_XT_SET=m -+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m -+CONFIG_NETFILTER_XT_TARGET_DSCP=m -+CONFIG_NETFILTER_XT_TARGET_HMARK=m -+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m -+CONFIG_NETFILTER_XT_TARGET_LED=m -+CONFIG_NETFILTER_XT_TARGET_LOG=m -+CONFIG_NETFILTER_XT_TARGET_MARK=m -+CONFIG_NETFILTER_XT_TARGET_NFLOG=m -+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m -+CONFIG_NETFILTER_XT_TARGET_TEE=m -+CONFIG_NETFILTER_XT_TARGET_TPROXY=m -+CONFIG_NETFILTER_XT_TARGET_TRACE=m -+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -+CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m -+CONFIG_NETFILTER_XT_MATCH_BPF=m -+CONFIG_NETFILTER_XT_MATCH_CLUSTER=m -+CONFIG_NETFILTER_XT_MATCH_COMMENT=m -+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m -+CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m -+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -+CONFIG_NETFILTER_XT_MATCH_CPU=m -+CONFIG_NETFILTER_XT_MATCH_DCCP=m -+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m -+CONFIG_NETFILTER_XT_MATCH_DSCP=m -+CONFIG_NETFILTER_XT_MATCH_ESP=m -+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -+CONFIG_NETFILTER_XT_MATCH_HELPER=m -+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -+CONFIG_NETFILTER_XT_MATCH_IPVS=m -+CONFIG_NETFILTER_XT_MATCH_LENGTH=m -+CONFIG_NETFILTER_XT_MATCH_LIMIT=m -+CONFIG_NETFILTER_XT_MATCH_MAC=m -+CONFIG_NETFILTER_XT_MATCH_MARK=m -+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+CONFIG_NETFILTER_XT_MATCH_NFACCT=m -+CONFIG_NETFILTER_XT_MATCH_OSF=m -+CONFIG_NETFILTER_XT_MATCH_OWNER=m -+CONFIG_NETFILTER_XT_MATCH_POLICY=m -+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m -+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -+CONFIG_NETFILTER_XT_MATCH_QUOTA=m -+CONFIG_NETFILTER_XT_MATCH_RATEEST=m -+CONFIG_NETFILTER_XT_MATCH_REALM=m -+CONFIG_NETFILTER_XT_MATCH_RECENT=m -+CONFIG_NETFILTER_XT_MATCH_SOCKET=m -+CONFIG_NETFILTER_XT_MATCH_STATE=m -+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -+CONFIG_NETFILTER_XT_MATCH_STRING=m -+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m -+CONFIG_NETFILTER_XT_MATCH_TIME=m -+CONFIG_NETFILTER_XT_MATCH_U32=m -+CONFIG_IP_SET=m -+CONFIG_IP_SET_BITMAP_IP=m -+CONFIG_IP_SET_BITMAP_IPMAC=m -+CONFIG_IP_SET_BITMAP_PORT=m -+CONFIG_IP_SET_HASH_IP=m -+CONFIG_IP_SET_HASH_IPPORT=m -+CONFIG_IP_SET_HASH_IPPORTIP=m -+CONFIG_IP_SET_HASH_IPPORTNET=m -+CONFIG_IP_SET_HASH_NET=m -+CONFIG_IP_SET_HASH_NETPORT=m -+CONFIG_IP_SET_HASH_NETIFACE=m -+CONFIG_IP_SET_LIST_SET=m -+CONFIG_IP_VS=m -+CONFIG_IP_VS_PROTO_TCP=y -+CONFIG_IP_VS_PROTO_UDP=y -+CONFIG_IP_VS_PROTO_ESP=y -+CONFIG_IP_VS_PROTO_AH=y -+CONFIG_IP_VS_PROTO_SCTP=y -+CONFIG_IP_VS_RR=m -+CONFIG_IP_VS_WRR=m -+CONFIG_IP_VS_LC=m -+CONFIG_IP_VS_WLC=m -+CONFIG_IP_VS_LBLC=m -+CONFIG_IP_VS_LBLCR=m -+CONFIG_IP_VS_DH=m -+CONFIG_IP_VS_SH=m -+CONFIG_IP_VS_SED=m -+CONFIG_IP_VS_NQ=m -+CONFIG_IP_VS_FTP=m -+CONFIG_IP_VS_PE_SIP=m -+CONFIG_NF_CONNTRACK_IPV4=m -+CONFIG_IP_NF_IPTABLES=m -+CONFIG_IP_NF_MATCH_AH=m -+CONFIG_IP_NF_MATCH_ECN=m -+CONFIG_IP_NF_MATCH_RPFILTER=m -+CONFIG_IP_NF_MATCH_TTL=m -+CONFIG_IP_NF_FILTER=m -+CONFIG_IP_NF_TARGET_REJECT=m -+CONFIG_IP_NF_NAT=m -+CONFIG_IP_NF_TARGET_MASQUERADE=m -+CONFIG_IP_NF_TARGET_NETMAP=m -+CONFIG_IP_NF_TARGET_REDIRECT=m -+CONFIG_IP_NF_MANGLE=m -+CONFIG_IP_NF_TARGET_CLUSTERIP=m -+CONFIG_IP_NF_TARGET_ECN=m -+CONFIG_IP_NF_TARGET_TTL=m -+CONFIG_IP_NF_RAW=m -+CONFIG_IP_NF_ARPTABLES=m -+CONFIG_IP_NF_ARPFILTER=m -+CONFIG_IP_NF_ARP_MANGLE=m -+CONFIG_NF_CONNTRACK_IPV6=m -+CONFIG_IP6_NF_IPTABLES=m -+CONFIG_IP6_NF_MATCH_AH=m -+CONFIG_IP6_NF_MATCH_EUI64=m -+CONFIG_IP6_NF_MATCH_FRAG=m -+CONFIG_IP6_NF_MATCH_OPTS=m -+CONFIG_IP6_NF_MATCH_HL=m -+CONFIG_IP6_NF_MATCH_IPV6HEADER=m -+CONFIG_IP6_NF_MATCH_MH=m -+CONFIG_IP6_NF_MATCH_RPFILTER=m -+CONFIG_IP6_NF_MATCH_RT=m -+CONFIG_IP6_NF_TARGET_HL=m -+CONFIG_IP6_NF_FILTER=m -+CONFIG_IP6_NF_TARGET_REJECT=m -+CONFIG_IP6_NF_MANGLE=m -+CONFIG_IP6_NF_RAW=m -+CONFIG_IP6_NF_NAT=m -+CONFIG_IP6_NF_TARGET_MASQUERADE=m -+CONFIG_IP6_NF_TARGET_NPT=m -+CONFIG_BRIDGE_NF_EBTABLES=m -+CONFIG_BRIDGE_EBT_BROUTE=m -+CONFIG_BRIDGE_EBT_T_FILTER=m -+CONFIG_BRIDGE_EBT_T_NAT=m -+CONFIG_BRIDGE_EBT_802_3=m -+CONFIG_BRIDGE_EBT_AMONG=m -+CONFIG_BRIDGE_EBT_ARP=m -+CONFIG_BRIDGE_EBT_IP=m -+CONFIG_BRIDGE_EBT_IP6=m -+CONFIG_BRIDGE_EBT_LIMIT=m -+CONFIG_BRIDGE_EBT_MARK=m -+CONFIG_BRIDGE_EBT_PKTTYPE=m -+CONFIG_BRIDGE_EBT_STP=m -+CONFIG_BRIDGE_EBT_VLAN=m -+CONFIG_BRIDGE_EBT_ARPREPLY=m -+CONFIG_BRIDGE_EBT_DNAT=m -+CONFIG_BRIDGE_EBT_MARK_T=m -+CONFIG_BRIDGE_EBT_REDIRECT=m -+CONFIG_BRIDGE_EBT_SNAT=m -+CONFIG_BRIDGE_EBT_LOG=m -+CONFIG_BRIDGE_EBT_NFLOG=m -+CONFIG_SCTP_COOKIE_HMAC_SHA1=y -+CONFIG_ATM=m -+CONFIG_L2TP=m -+CONFIG_L2TP_V3=y -+CONFIG_L2TP_IP=m -+CONFIG_L2TP_ETH=m -+CONFIG_BRIDGE=m -+CONFIG_VLAN_8021Q=m -+CONFIG_VLAN_8021Q_GVRP=y -+CONFIG_ATALK=m -+CONFIG_6LOWPAN=m -+CONFIG_IEEE802154=m -+CONFIG_IEEE802154_6LOWPAN=m -+CONFIG_MAC802154=m -+CONFIG_NET_SCHED=y -+CONFIG_NET_SCH_CBQ=m -+CONFIG_NET_SCH_HTB=m -+CONFIG_NET_SCH_HFSC=m -+CONFIG_NET_SCH_PRIO=m -+CONFIG_NET_SCH_MULTIQ=m -+CONFIG_NET_SCH_RED=m -+CONFIG_NET_SCH_SFB=m -+CONFIG_NET_SCH_SFQ=m -+CONFIG_NET_SCH_TEQL=m -+CONFIG_NET_SCH_TBF=m -+CONFIG_NET_SCH_GRED=m -+CONFIG_NET_SCH_DSMARK=m -+CONFIG_NET_SCH_NETEM=m -+CONFIG_NET_SCH_DRR=m -+CONFIG_NET_SCH_MQPRIO=m -+CONFIG_NET_SCH_CHOKE=m -+CONFIG_NET_SCH_QFQ=m -+CONFIG_NET_SCH_CODEL=m -+CONFIG_NET_SCH_FQ_CODEL=m -+CONFIG_NET_SCH_INGRESS=m -+CONFIG_NET_SCH_PLUG=m -+CONFIG_NET_CLS_BASIC=m -+CONFIG_NET_CLS_TCINDEX=m -+CONFIG_NET_CLS_ROUTE4=m -+CONFIG_NET_CLS_FW=m -+CONFIG_NET_CLS_U32=m -+CONFIG_CLS_U32_MARK=y -+CONFIG_NET_CLS_RSVP=m -+CONFIG_NET_CLS_RSVP6=m -+CONFIG_NET_CLS_FLOW=m -+CONFIG_NET_CLS_CGROUP=m -+CONFIG_NET_EMATCH=y -+CONFIG_NET_EMATCH_CMP=m -+CONFIG_NET_EMATCH_NBYTE=m -+CONFIG_NET_EMATCH_U32=m -+CONFIG_NET_EMATCH_META=m -+CONFIG_NET_EMATCH_TEXT=m -+CONFIG_NET_EMATCH_IPSET=m -+CONFIG_NET_CLS_ACT=y -+CONFIG_NET_ACT_POLICE=m -+CONFIG_NET_ACT_GACT=m -+CONFIG_GACT_PROB=y -+CONFIG_NET_ACT_MIRRED=m -+CONFIG_NET_ACT_IPT=m -+CONFIG_NET_ACT_NAT=m -+CONFIG_NET_ACT_PEDIT=m -+CONFIG_NET_ACT_SIMP=m -+CONFIG_NET_ACT_SKBEDIT=m -+CONFIG_NET_ACT_CSUM=m -+CONFIG_BATMAN_ADV=m -+CONFIG_OPENVSWITCH=m -+CONFIG_NET_PKTGEN=m -+CONFIG_HAMRADIO=y -+CONFIG_AX25=m -+CONFIG_NETROM=m -+CONFIG_ROSE=m -+CONFIG_MKISS=m -+CONFIG_6PACK=m -+CONFIG_BPQETHER=m -+CONFIG_BAYCOM_SER_FDX=m -+CONFIG_BAYCOM_SER_HDX=m -+CONFIG_YAM=m -+CONFIG_CAN=m -+CONFIG_CAN_VCAN=m -+CONFIG_CAN_MCP251X=m -+CONFIG_IRDA=m -+CONFIG_IRLAN=m -+CONFIG_IRNET=m -+CONFIG_IRCOMM=m -+CONFIG_IRDA_ULTRA=y -+CONFIG_IRDA_CACHE_LAST_LSAP=y -+CONFIG_IRDA_FAST_RR=y -+CONFIG_IRTTY_SIR=m -+CONFIG_KINGSUN_DONGLE=m -+CONFIG_KSDAZZLE_DONGLE=m -+CONFIG_KS959_DONGLE=m -+CONFIG_USB_IRDA=m -+CONFIG_SIGMATEL_FIR=m -+CONFIG_MCS_FIR=m -+CONFIG_BT=m -+CONFIG_BT_RFCOMM=m -+CONFIG_BT_RFCOMM_TTY=y -+CONFIG_BT_BNEP=m -+CONFIG_BT_BNEP_MC_FILTER=y -+CONFIG_BT_BNEP_PROTO_FILTER=y -+CONFIG_BT_HIDP=m -+CONFIG_BT_6LOWPAN=m -+CONFIG_BT_HCIBTUSB=m -+CONFIG_BT_HCIUART=m -+CONFIG_BT_HCIUART_3WIRE=y -+CONFIG_BT_HCIUART_BCM=y -+CONFIG_BT_HCIBCM203X=m -+CONFIG_BT_HCIBPA10X=m -+CONFIG_BT_HCIBFUSB=m -+CONFIG_BT_HCIVHCI=m -+CONFIG_BT_MRVL=m -+CONFIG_BT_MRVL_SDIO=m -+CONFIG_BT_ATH3K=m -+CONFIG_BT_WILINK=m -+CONFIG_CFG80211=m -+CONFIG_MAC80211=m -+CONFIG_MAC80211_MESH=y -+CONFIG_WIMAX=m -+CONFIG_RFKILL=m -+CONFIG_RFKILL_INPUT=y -+CONFIG_NET_9P=m -+CONFIG_NFC=m -+CONFIG_DEVTMPFS=y -+CONFIG_DEVTMPFS_MOUNT=y -+CONFIG_DMA_CMA=y -+CONFIG_CMA_SIZE_MBYTES=5 -+CONFIG_MTD=m -+CONFIG_MTD_BLOCK=m -+CONFIG_MTD_NAND=m -+CONFIG_MTD_UBI=m -+CONFIG_OF_CONFIGFS=y -+CONFIG_ZRAM=m -+CONFIG_BLK_DEV_LOOP=y -+CONFIG_BLK_DEV_CRYPTOLOOP=m -+CONFIG_BLK_DEV_DRBD=m -+CONFIG_BLK_DEV_NBD=m -+CONFIG_BLK_DEV_RAM=y -+CONFIG_CDROM_PKTCDVD=m -+CONFIG_ATA_OVER_ETH=m -+CONFIG_EEPROM_AT24=m -+CONFIG_TI_ST=m -+CONFIG_SCSI=y -+# CONFIG_SCSI_PROC_FS is not set -+CONFIG_BLK_DEV_SD=y -+CONFIG_CHR_DEV_ST=m -+CONFIG_CHR_DEV_OSST=m -+CONFIG_BLK_DEV_SR=m -+CONFIG_CHR_DEV_SG=m -+CONFIG_SCSI_ISCSI_ATTRS=y -+CONFIG_ISCSI_TCP=m -+CONFIG_ISCSI_BOOT_SYSFS=m -+CONFIG_MD=y -+CONFIG_MD_LINEAR=m -+CONFIG_MD_RAID0=m -+CONFIG_BLK_DEV_DM=m -+CONFIG_DM_CRYPT=m -+CONFIG_DM_SNAPSHOT=m -+CONFIG_DM_THIN_PROVISIONING=m -+CONFIG_DM_MIRROR=m -+CONFIG_DM_LOG_USERSPACE=m -+CONFIG_DM_RAID=m -+CONFIG_DM_ZERO=m -+CONFIG_DM_DELAY=m -+CONFIG_NETDEVICES=y -+CONFIG_BONDING=m -+CONFIG_DUMMY=m -+CONFIG_IFB=m -+CONFIG_MACVLAN=m -+CONFIG_VXLAN=m -+CONFIG_NETCONSOLE=m -+CONFIG_TUN=m -+CONFIG_VETH=m -+CONFIG_ENC28J60=m -+CONFIG_QCA7000=m -+CONFIG_MDIO_BITBANG=m -+CONFIG_PPP=m -+CONFIG_PPP_BSDCOMP=m -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_FILTER=y -+CONFIG_PPP_MPPE=m -+CONFIG_PPP_MULTILINK=y -+CONFIG_PPPOATM=m -+CONFIG_PPPOE=m -+CONFIG_PPPOL2TP=m -+CONFIG_PPP_ASYNC=m -+CONFIG_PPP_SYNC_TTY=m -+CONFIG_SLIP=m -+CONFIG_SLIP_COMPRESSED=y -+CONFIG_SLIP_SMART=y -+CONFIG_USB_CATC=m -+CONFIG_USB_KAWETH=m -+CONFIG_USB_PEGASUS=m -+CONFIG_USB_RTL8150=m -+CONFIG_USB_RTL8152=m -+CONFIG_USB_USBNET=y -+CONFIG_USB_NET_AX8817X=m -+CONFIG_USB_NET_AX88179_178A=m -+CONFIG_USB_NET_CDCETHER=m -+CONFIG_USB_NET_CDC_EEM=m -+CONFIG_USB_NET_CDC_NCM=m -+CONFIG_USB_NET_HUAWEI_CDC_NCM=m -+CONFIG_USB_NET_CDC_MBIM=m -+CONFIG_USB_NET_DM9601=m -+CONFIG_USB_NET_SR9700=m -+CONFIG_USB_NET_SR9800=m -+CONFIG_USB_NET_SMSC75XX=m -+CONFIG_USB_NET_SMSC95XX=y -+CONFIG_USB_NET_GL620A=m -+CONFIG_USB_NET_NET1080=m -+CONFIG_USB_NET_PLUSB=m -+CONFIG_USB_NET_MCS7830=m -+CONFIG_USB_NET_CDC_SUBSET=m -+CONFIG_USB_ALI_M5632=y -+CONFIG_USB_AN2720=y -+CONFIG_USB_EPSON2888=y -+CONFIG_USB_KC2190=y -+CONFIG_USB_NET_ZAURUS=m -+CONFIG_USB_NET_CX82310_ETH=m -+CONFIG_USB_NET_KALMIA=m -+CONFIG_USB_NET_QMI_WWAN=m -+CONFIG_USB_HSO=m -+CONFIG_USB_NET_INT51X1=m -+CONFIG_USB_IPHETH=m -+CONFIG_USB_SIERRA_NET=m -+CONFIG_USB_VL600=m -+CONFIG_ATH9K=m -+CONFIG_ATH9K_HTC=m -+CONFIG_CARL9170=m -+CONFIG_ATH6KL=m -+CONFIG_ATH6KL_USB=m -+CONFIG_AR5523=m -+CONFIG_AT76C50X_USB=m -+CONFIG_B43=m -+# CONFIG_B43_PHY_N is not set -+CONFIG_B43LEGACY=m -+CONFIG_BRCMFMAC=m -+CONFIG_BRCMFMAC_USB=y -+CONFIG_HOSTAP=m -+CONFIG_P54_COMMON=m -+CONFIG_P54_USB=m -+CONFIG_LIBERTAS=m -+CONFIG_LIBERTAS_USB=m -+CONFIG_LIBERTAS_SDIO=m -+CONFIG_LIBERTAS_THINFIRM=m -+CONFIG_LIBERTAS_THINFIRM_USB=m -+CONFIG_MWIFIEX=m -+CONFIG_MWIFIEX_SDIO=m -+CONFIG_MT7601U=m -+CONFIG_RT2X00=m -+CONFIG_RT2500USB=m -+CONFIG_RT73USB=m -+CONFIG_RT2800USB=m -+CONFIG_RT2800USB_RT3573=y -+CONFIG_RT2800USB_RT53XX=y -+CONFIG_RT2800USB_RT55XX=y -+CONFIG_RT2800USB_UNKNOWN=y -+CONFIG_RTL8187=m -+CONFIG_RTL8192CU=m -+CONFIG_USB_ZD1201=m -+CONFIG_ZD1211RW=m -+CONFIG_MAC80211_HWSIM=m -+CONFIG_USB_NET_RNDIS_WLAN=m -+CONFIG_WIMAX_I2400M_USB=m -+CONFIG_IEEE802154_AT86RF230=m -+CONFIG_IEEE802154_MRF24J40=m -+CONFIG_IEEE802154_CC2520=m -+CONFIG_INPUT_POLLDEV=m -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -+CONFIG_INPUT_JOYDEV=m -+CONFIG_INPUT_EVDEV=m -+# CONFIG_KEYBOARD_ATKBD is not set -+CONFIG_KEYBOARD_GPIO=m -+# CONFIG_INPUT_MOUSE is not set -+CONFIG_INPUT_JOYSTICK=y -+CONFIG_JOYSTICK_IFORCE=m -+CONFIG_JOYSTICK_IFORCE_USB=y -+CONFIG_JOYSTICK_XPAD=m -+CONFIG_JOYSTICK_XPAD_FF=y -+CONFIG_JOYSTICK_XPAD_LEDS=y -+CONFIG_JOYSTICK_RPISENSE=m -+CONFIG_INPUT_TOUCHSCREEN=y -+CONFIG_TOUCHSCREEN_ADS7846=m -+CONFIG_TOUCHSCREEN_EGALAX=m -+CONFIG_TOUCHSCREEN_EKTF2127=m -+CONFIG_TOUCHSCREEN_RPI_FT5406=m -+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m -+CONFIG_TOUCHSCREEN_STMPE=m -+CONFIG_INPUT_MISC=y -+CONFIG_INPUT_AD714X=m -+CONFIG_INPUT_ATI_REMOTE2=m -+CONFIG_INPUT_KEYSPAN_REMOTE=m -+CONFIG_INPUT_POWERMATE=m -+CONFIG_INPUT_YEALINK=m -+CONFIG_INPUT_CM109=m -+CONFIG_INPUT_UINPUT=m -+CONFIG_INPUT_GPIO_ROTARY_ENCODER=m -+CONFIG_INPUT_ADXL34X=m -+CONFIG_INPUT_CMA3000=m -+CONFIG_SERIO=m -+CONFIG_SERIO_RAW=m -+CONFIG_GAMEPORT=m -+CONFIG_GAMEPORT_NS558=m -+CONFIG_GAMEPORT_L4=m -+CONFIG_BRCM_CHAR_DRIVERS=y -+CONFIG_BCM_VC_CMA=y -+CONFIG_BCM_VCIO=y -+CONFIG_BCM_VC_SM=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_DEVKMEM is not set -+CONFIG_SERIAL_8250=y -+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -+CONFIG_SERIAL_8250_CONSOLE=y -+# CONFIG_SERIAL_8250_DMA is not set -+CONFIG_SERIAL_8250_NR_UARTS=1 -+CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -+CONFIG_SERIAL_8250_EXTENDED=y -+CONFIG_SERIAL_8250_SHARE_IRQ=y -+CONFIG_SERIAL_8250_BCM2835AUX=y -+CONFIG_SERIAL_OF_PLATFORM=y -+CONFIG_SERIAL_AMBA_PL011=y -+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -+CONFIG_SERIAL_SC16IS7XX=m -+CONFIG_SERIAL_SC16IS7XX_SPI=y -+CONFIG_TTY_PRINTK=y -+CONFIG_HW_RANDOM=y -+CONFIG_RAW_DRIVER=y -+CONFIG_I2C=y -+CONFIG_I2C_CHARDEV=m -+CONFIG_I2C_MUX_PCA954x=m -+CONFIG_I2C_BCM2708=m -+CONFIG_I2C_BCM2835=m -+CONFIG_I2C_GPIO=m -+CONFIG_SPI=y -+CONFIG_SPI_BCM2835=m -+CONFIG_SPI_BCM2835AUX=m -+CONFIG_SPI_SPIDEV=y -+CONFIG_PPS=m -+CONFIG_PPS_CLIENT_LDISC=m -+CONFIG_PPS_CLIENT_GPIO=m -+CONFIG_GPIO_SYSFS=y -+CONFIG_GPIO_BCM_VIRT=y -+CONFIG_GPIO_ARIZONA=m -+CONFIG_GPIO_STMPE=y -+CONFIG_GPIO_MCP23S08=m -+CONFIG_W1=m -+CONFIG_W1_MASTER_DS2490=m -+CONFIG_W1_MASTER_DS2482=m -+CONFIG_W1_MASTER_DS1WM=m -+CONFIG_W1_MASTER_GPIO=m -+CONFIG_W1_SLAVE_THERM=m -+CONFIG_W1_SLAVE_SMEM=m -+CONFIG_W1_SLAVE_DS2408=m -+CONFIG_W1_SLAVE_DS2413=m -+CONFIG_W1_SLAVE_DS2406=m -+CONFIG_W1_SLAVE_DS2423=m -+CONFIG_W1_SLAVE_DS2431=m -+CONFIG_W1_SLAVE_DS2433=m -+CONFIG_W1_SLAVE_DS2760=m -+CONFIG_W1_SLAVE_DS2780=m -+CONFIG_W1_SLAVE_DS2781=m -+CONFIG_W1_SLAVE_DS28E04=m -+CONFIG_W1_SLAVE_BQ27000=m -+CONFIG_POWER_RESET=y -+CONFIG_POWER_RESET_GPIO=y -+CONFIG_BATTERY_DS2760=m -+CONFIG_HWMON=m -+CONFIG_SENSORS_LM75=m -+CONFIG_SENSORS_SHT21=m -+CONFIG_SENSORS_SHTC1=m -+CONFIG_SENSORS_INA2XX=m -+CONFIG_THERMAL=y -+CONFIG_THERMAL_BCM2835=y -+CONFIG_WATCHDOG=y -+CONFIG_BCM2835_WDT=y -+CONFIG_UCB1400_CORE=m -+CONFIG_MFD_STMPE=y -+CONFIG_STMPE_SPI=y -+CONFIG_MFD_ARIZONA_I2C=m -+CONFIG_MFD_ARIZONA_SPI=m -+CONFIG_MFD_WM5102=y -+CONFIG_MEDIA_SUPPORT=m -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -+CONFIG_MEDIA_RADIO_SUPPORT=y -+CONFIG_MEDIA_RC_SUPPORT=y -+CONFIG_MEDIA_CONTROLLER=y -+CONFIG_LIRC=m -+CONFIG_RC_DEVICES=y -+CONFIG_RC_ATI_REMOTE=m -+CONFIG_IR_IMON=m -+CONFIG_IR_MCEUSB=m -+CONFIG_IR_REDRAT3=m -+CONFIG_IR_STREAMZAP=m -+CONFIG_IR_IGUANA=m -+CONFIG_IR_TTUSBIR=m -+CONFIG_RC_LOOPBACK=m -+CONFIG_IR_GPIO_CIR=m -+CONFIG_MEDIA_USB_SUPPORT=y -+CONFIG_USB_VIDEO_CLASS=m -+CONFIG_USB_M5602=m -+CONFIG_USB_STV06XX=m -+CONFIG_USB_GL860=m -+CONFIG_USB_GSPCA_BENQ=m -+CONFIG_USB_GSPCA_CONEX=m -+CONFIG_USB_GSPCA_CPIA1=m -+CONFIG_USB_GSPCA_DTCS033=m -+CONFIG_USB_GSPCA_ETOMS=m -+CONFIG_USB_GSPCA_FINEPIX=m -+CONFIG_USB_GSPCA_JEILINJ=m -+CONFIG_USB_GSPCA_JL2005BCD=m -+CONFIG_USB_GSPCA_KINECT=m -+CONFIG_USB_GSPCA_KONICA=m -+CONFIG_USB_GSPCA_MARS=m -+CONFIG_USB_GSPCA_MR97310A=m -+CONFIG_USB_GSPCA_NW80X=m -+CONFIG_USB_GSPCA_OV519=m -+CONFIG_USB_GSPCA_OV534=m -+CONFIG_USB_GSPCA_OV534_9=m -+CONFIG_USB_GSPCA_PAC207=m -+CONFIG_USB_GSPCA_PAC7302=m -+CONFIG_USB_GSPCA_PAC7311=m -+CONFIG_USB_GSPCA_SE401=m -+CONFIG_USB_GSPCA_SN9C2028=m -+CONFIG_USB_GSPCA_SN9C20X=m -+CONFIG_USB_GSPCA_SONIXB=m -+CONFIG_USB_GSPCA_SONIXJ=m -+CONFIG_USB_GSPCA_SPCA500=m -+CONFIG_USB_GSPCA_SPCA501=m -+CONFIG_USB_GSPCA_SPCA505=m -+CONFIG_USB_GSPCA_SPCA506=m -+CONFIG_USB_GSPCA_SPCA508=m -+CONFIG_USB_GSPCA_SPCA561=m -+CONFIG_USB_GSPCA_SPCA1528=m -+CONFIG_USB_GSPCA_SQ905=m -+CONFIG_USB_GSPCA_SQ905C=m -+CONFIG_USB_GSPCA_SQ930X=m -+CONFIG_USB_GSPCA_STK014=m -+CONFIG_USB_GSPCA_STK1135=m -+CONFIG_USB_GSPCA_STV0680=m -+CONFIG_USB_GSPCA_SUNPLUS=m -+CONFIG_USB_GSPCA_T613=m -+CONFIG_USB_GSPCA_TOPRO=m -+CONFIG_USB_GSPCA_TV8532=m -+CONFIG_USB_GSPCA_VC032X=m -+CONFIG_USB_GSPCA_VICAM=m -+CONFIG_USB_GSPCA_XIRLINK_CIT=m -+CONFIG_USB_GSPCA_ZC3XX=m -+CONFIG_USB_PWC=m -+CONFIG_VIDEO_CPIA2=m -+CONFIG_USB_ZR364XX=m -+CONFIG_USB_STKWEBCAM=m -+CONFIG_USB_S2255=m -+CONFIG_VIDEO_USBTV=m -+CONFIG_VIDEO_PVRUSB2=m -+CONFIG_VIDEO_HDPVR=m -+CONFIG_VIDEO_USBVISION=m -+CONFIG_VIDEO_STK1160_COMMON=m -+CONFIG_VIDEO_STK1160_AC97=y -+CONFIG_VIDEO_GO7007=m -+CONFIG_VIDEO_GO7007_USB=m -+CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m -+CONFIG_VIDEO_AU0828=m -+CONFIG_VIDEO_AU0828_RC=y -+CONFIG_VIDEO_CX231XX=m -+CONFIG_VIDEO_CX231XX_ALSA=m -+CONFIG_VIDEO_CX231XX_DVB=m -+CONFIG_VIDEO_TM6000=m -+CONFIG_VIDEO_TM6000_ALSA=m -+CONFIG_VIDEO_TM6000_DVB=m -+CONFIG_DVB_USB=m -+CONFIG_DVB_USB_A800=m -+CONFIG_DVB_USB_DIBUSB_MB=m -+CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y -+CONFIG_DVB_USB_DIBUSB_MC=m -+CONFIG_DVB_USB_DIB0700=m -+CONFIG_DVB_USB_UMT_010=m -+CONFIG_DVB_USB_CXUSB=m -+CONFIG_DVB_USB_M920X=m -+CONFIG_DVB_USB_DIGITV=m -+CONFIG_DVB_USB_VP7045=m -+CONFIG_DVB_USB_VP702X=m -+CONFIG_DVB_USB_GP8PSK=m -+CONFIG_DVB_USB_NOVA_T_USB2=m -+CONFIG_DVB_USB_TTUSB2=m -+CONFIG_DVB_USB_DTT200U=m -+CONFIG_DVB_USB_OPERA1=m -+CONFIG_DVB_USB_AF9005=m -+CONFIG_DVB_USB_AF9005_REMOTE=m -+CONFIG_DVB_USB_PCTV452E=m -+CONFIG_DVB_USB_DW2102=m -+CONFIG_DVB_USB_CINERGY_T2=m -+CONFIG_DVB_USB_DTV5100=m -+CONFIG_DVB_USB_FRIIO=m -+CONFIG_DVB_USB_AZ6027=m -+CONFIG_DVB_USB_TECHNISAT_USB2=m -+CONFIG_DVB_USB_V2=m -+CONFIG_DVB_USB_AF9015=m -+CONFIG_DVB_USB_AF9035=m -+CONFIG_DVB_USB_ANYSEE=m -+CONFIG_DVB_USB_AU6610=m -+CONFIG_DVB_USB_AZ6007=m -+CONFIG_DVB_USB_CE6230=m -+CONFIG_DVB_USB_EC168=m -+CONFIG_DVB_USB_GL861=m -+CONFIG_DVB_USB_LME2510=m -+CONFIG_DVB_USB_MXL111SF=m -+CONFIG_DVB_USB_RTL28XXU=m -+CONFIG_DVB_USB_DVBSKY=m -+CONFIG_SMS_USB_DRV=m -+CONFIG_DVB_B2C2_FLEXCOP_USB=m -+CONFIG_DVB_AS102=m -+CONFIG_VIDEO_EM28XX=m -+CONFIG_VIDEO_EM28XX_V4L2=m -+CONFIG_VIDEO_EM28XX_ALSA=m -+CONFIG_VIDEO_EM28XX_DVB=m -+CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_BCM2835=y -+CONFIG_VIDEO_BCM2835_MMAL=m -+CONFIG_RADIO_SI470X=y -+CONFIG_USB_SI470X=m -+CONFIG_I2C_SI470X=m -+CONFIG_RADIO_SI4713=m -+CONFIG_I2C_SI4713=m -+CONFIG_USB_MR800=m -+CONFIG_USB_DSBR=m -+CONFIG_RADIO_SHARK=m -+CONFIG_RADIO_SHARK2=m -+CONFIG_USB_KEENE=m -+CONFIG_USB_MA901=m -+CONFIG_RADIO_TEA5764=m -+CONFIG_RADIO_SAA7706H=m -+CONFIG_RADIO_TEF6862=m -+CONFIG_RADIO_WL1273=m -+CONFIG_RADIO_WL128X=m -+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -+CONFIG_VIDEO_UDA1342=m -+CONFIG_VIDEO_SONY_BTF_MPX=m -+CONFIG_VIDEO_TVP5150=m -+CONFIG_VIDEO_TW2804=m -+CONFIG_VIDEO_TW9903=m -+CONFIG_VIDEO_TW9906=m -+CONFIG_VIDEO_OV7640=m -+CONFIG_VIDEO_MT9V011=m -+CONFIG_DRM=m -+CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_UDL=m -+CONFIG_DRM_VC4=m -+CONFIG_FB=y -+CONFIG_FB_BCM2708=y -+CONFIG_FB_UDL=m -+CONFIG_FB_SSD1307=m -+CONFIG_FB_RPISENSE=m -+# CONFIG_BACKLIGHT_GENERIC is not set -+CONFIG_BACKLIGHT_RPI=m -+CONFIG_BACKLIGHT_GPIO=m -+CONFIG_FRAMEBUFFER_CONSOLE=y -+CONFIG_LOGO=y -+# CONFIG_LOGO_LINUX_MONO is not set -+# CONFIG_LOGO_LINUX_VGA16 is not set -+CONFIG_SOUND=y -+CONFIG_SND=m -+CONFIG_SND_SEQUENCER=m -+CONFIG_SND_SEQ_DUMMY=m -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_HRTIMER=m -+CONFIG_SND_DUMMY=m -+CONFIG_SND_ALOOP=m -+CONFIG_SND_VIRMIDI=m -+CONFIG_SND_MTPAV=m -+CONFIG_SND_SERIAL_U16550=m -+CONFIG_SND_MPU401=m -+CONFIG_SND_BCM2835=m -+CONFIG_SND_USB_AUDIO=m -+CONFIG_SND_USB_UA101=m -+CONFIG_SND_USB_CAIAQ=m -+CONFIG_SND_USB_CAIAQ_INPUT=y -+CONFIG_SND_USB_6FIRE=m -+CONFIG_SND_SOC=m -+CONFIG_SND_BCM2835_SOC_I2S=m -+CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m -+CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m -+CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m -+CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m -+CONFIG_SND_BCM2708_SOC_RPI_DAC=m -+CONFIG_SND_BCM2708_SOC_RPI_PROTO=m -+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m -+CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m -+CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m -+CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m -+CONFIG_SND_BCM2708_SOC_RASPIDAC3=m -+CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m -+CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m -+CONFIG_SND_DIGIDAC1_SOUNDCARD=m -+CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m -+CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m -+CONFIG_SND_PISOUND=m -+CONFIG_SND_SOC_ADAU1701=m -+CONFIG_SND_SOC_AK4554=m -+CONFIG_SND_SOC_WM8804_I2C=m -+CONFIG_SND_SIMPLE_CARD=m -+CONFIG_SOUND_PRIME=m -+CONFIG_HIDRAW=y -+CONFIG_UHID=m -+CONFIG_HID_A4TECH=m -+CONFIG_HID_ACRUX=m -+CONFIG_HID_APPLE=m -+CONFIG_HID_BELKIN=m -+CONFIG_HID_BETOP_FF=m -+CONFIG_HID_CHERRY=m -+CONFIG_HID_CHICONY=m -+CONFIG_HID_CYPRESS=m -+CONFIG_HID_DRAGONRISE=m -+CONFIG_HID_EMS_FF=m -+CONFIG_HID_ELECOM=m -+CONFIG_HID_ELO=m -+CONFIG_HID_EZKEY=m -+CONFIG_HID_GEMBIRD=m -+CONFIG_HID_HOLTEK=m -+CONFIG_HID_KEYTOUCH=m -+CONFIG_HID_KYE=m -+CONFIG_HID_UCLOGIC=m -+CONFIG_HID_WALTOP=m -+CONFIG_HID_GYRATION=m -+CONFIG_HID_TWINHAN=m -+CONFIG_HID_KENSINGTON=m -+CONFIG_HID_LCPOWER=m -+CONFIG_HID_LOGITECH=m -+CONFIG_HID_LOGITECH_DJ=m -+CONFIG_LOGITECH_FF=y -+CONFIG_LOGIRUMBLEPAD2_FF=y -+CONFIG_LOGIG940_FF=y -+CONFIG_HID_MAGICMOUSE=m -+CONFIG_HID_MICROSOFT=m -+CONFIG_HID_MONTEREY=m -+CONFIG_HID_MULTITOUCH=m -+CONFIG_HID_NTRIG=m -+CONFIG_HID_ORTEK=m -+CONFIG_HID_PANTHERLORD=m -+CONFIG_HID_PETALYNX=m -+CONFIG_HID_PICOLCD=m -+CONFIG_HID_ROCCAT=m -+CONFIG_HID_SAMSUNG=m -+CONFIG_HID_SONY=m -+CONFIG_HID_SPEEDLINK=m -+CONFIG_HID_SUNPLUS=m -+CONFIG_HID_GREENASIA=m -+CONFIG_HID_SMARTJOYPLUS=m -+CONFIG_HID_TOPSEED=m -+CONFIG_HID_THINGM=m -+CONFIG_HID_THRUSTMASTER=m -+CONFIG_HID_WACOM=m -+CONFIG_HID_WIIMOTE=m -+CONFIG_HID_XINMO=m -+CONFIG_HID_ZEROPLUS=m -+CONFIG_HID_ZYDACRON=m -+CONFIG_HID_PID=y -+CONFIG_USB_HIDDEV=y -+CONFIG_USB=y -+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -+CONFIG_USB_MON=m -+CONFIG_USB_DWCOTG=y -+CONFIG_USB_PRINTER=m -+CONFIG_USB_STORAGE=y -+CONFIG_USB_STORAGE_REALTEK=m -+CONFIG_USB_STORAGE_DATAFAB=m -+CONFIG_USB_STORAGE_FREECOM=m -+CONFIG_USB_STORAGE_ISD200=m -+CONFIG_USB_STORAGE_USBAT=m -+CONFIG_USB_STORAGE_SDDR09=m -+CONFIG_USB_STORAGE_SDDR55=m -+CONFIG_USB_STORAGE_JUMPSHOT=m -+CONFIG_USB_STORAGE_ALAUDA=m -+CONFIG_USB_STORAGE_ONETOUCH=m -+CONFIG_USB_STORAGE_KARMA=m -+CONFIG_USB_STORAGE_CYPRESS_ATACB=m -+CONFIG_USB_STORAGE_ENE_UB6250=m -+CONFIG_USB_MDC800=m -+CONFIG_USB_MICROTEK=m -+CONFIG_USBIP_CORE=m -+CONFIG_USBIP_VHCI_HCD=m -+CONFIG_USBIP_HOST=m -+CONFIG_USB_SERIAL=m -+CONFIG_USB_SERIAL_GENERIC=y -+CONFIG_USB_SERIAL_AIRCABLE=m -+CONFIG_USB_SERIAL_ARK3116=m -+CONFIG_USB_SERIAL_BELKIN=m -+CONFIG_USB_SERIAL_CH341=m -+CONFIG_USB_SERIAL_WHITEHEAT=m -+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m -+CONFIG_USB_SERIAL_CP210X=m -+CONFIG_USB_SERIAL_CYPRESS_M8=m -+CONFIG_USB_SERIAL_EMPEG=m -+CONFIG_USB_SERIAL_FTDI_SIO=m -+CONFIG_USB_SERIAL_VISOR=m -+CONFIG_USB_SERIAL_IPAQ=m -+CONFIG_USB_SERIAL_IR=m -+CONFIG_USB_SERIAL_EDGEPORT=m -+CONFIG_USB_SERIAL_EDGEPORT_TI=m -+CONFIG_USB_SERIAL_F81232=m -+CONFIG_USB_SERIAL_GARMIN=m -+CONFIG_USB_SERIAL_IPW=m -+CONFIG_USB_SERIAL_IUU=m -+CONFIG_USB_SERIAL_KEYSPAN_PDA=m -+CONFIG_USB_SERIAL_KEYSPAN=m -+CONFIG_USB_SERIAL_KLSI=m -+CONFIG_USB_SERIAL_KOBIL_SCT=m -+CONFIG_USB_SERIAL_MCT_U232=m -+CONFIG_USB_SERIAL_METRO=m -+CONFIG_USB_SERIAL_MOS7720=m -+CONFIG_USB_SERIAL_MOS7840=m -+CONFIG_USB_SERIAL_NAVMAN=m -+CONFIG_USB_SERIAL_PL2303=m -+CONFIG_USB_SERIAL_OTI6858=m -+CONFIG_USB_SERIAL_QCAUX=m -+CONFIG_USB_SERIAL_QUALCOMM=m -+CONFIG_USB_SERIAL_SPCP8X5=m -+CONFIG_USB_SERIAL_SAFE=m -+CONFIG_USB_SERIAL_SIERRAWIRELESS=m -+CONFIG_USB_SERIAL_SYMBOL=m -+CONFIG_USB_SERIAL_TI=m -+CONFIG_USB_SERIAL_CYBERJACK=m -+CONFIG_USB_SERIAL_XIRCOM=m -+CONFIG_USB_SERIAL_OPTION=m -+CONFIG_USB_SERIAL_OMNINET=m -+CONFIG_USB_SERIAL_OPTICON=m -+CONFIG_USB_SERIAL_XSENS_MT=m -+CONFIG_USB_SERIAL_WISHBONE=m -+CONFIG_USB_SERIAL_SSU100=m -+CONFIG_USB_SERIAL_QT2=m -+CONFIG_USB_SERIAL_DEBUG=m -+CONFIG_USB_EMI62=m -+CONFIG_USB_EMI26=m -+CONFIG_USB_ADUTUX=m -+CONFIG_USB_SEVSEG=m -+CONFIG_USB_RIO500=m -+CONFIG_USB_LEGOTOWER=m -+CONFIG_USB_LCD=m -+CONFIG_USB_CYPRESS_CY7C63=m -+CONFIG_USB_CYTHERM=m -+CONFIG_USB_IDMOUSE=m -+CONFIG_USB_FTDI_ELAN=m -+CONFIG_USB_APPLEDISPLAY=m -+CONFIG_USB_LD=m -+CONFIG_USB_TRANCEVIBRATOR=m -+CONFIG_USB_IOWARRIOR=m -+CONFIG_USB_TEST=m -+CONFIG_USB_ISIGHTFW=m -+CONFIG_USB_YUREX=m -+CONFIG_USB_ATM=m -+CONFIG_USB_SPEEDTOUCH=m -+CONFIG_USB_CXACRU=m -+CONFIG_USB_UEAGLEATM=m -+CONFIG_USB_XUSBATM=m -+CONFIG_MMC=y -+CONFIG_MMC_BLOCK_MINORS=32 -+CONFIG_MMC_BCM2835=y -+CONFIG_MMC_BCM2835_DMA=y -+CONFIG_MMC_BCM2835_SDHOST=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_PLTFM=y -+CONFIG_MMC_SPI=m -+CONFIG_LEDS_CLASS=y -+CONFIG_LEDS_GPIO=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_ONESHOT=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_LEDS_TRIGGER_BACKLIGHT=y -+CONFIG_LEDS_TRIGGER_CPU=y -+CONFIG_LEDS_TRIGGER_GPIO=y -+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y -+CONFIG_LEDS_TRIGGER_TRANSIENT=m -+CONFIG_LEDS_TRIGGER_CAMERA=m -+CONFIG_LEDS_TRIGGER_INPUT=y -+CONFIG_LEDS_TRIGGER_PANIC=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_HCTOSYS is not set -+CONFIG_RTC_DRV_ABX80X=m -+CONFIG_RTC_DRV_DS1307=m -+CONFIG_RTC_DRV_DS1374=m -+CONFIG_RTC_DRV_DS1672=m -+CONFIG_RTC_DRV_MAX6900=m -+CONFIG_RTC_DRV_RS5C372=m -+CONFIG_RTC_DRV_ISL1208=m -+CONFIG_RTC_DRV_ISL12022=m -+CONFIG_RTC_DRV_X1205=m -+CONFIG_RTC_DRV_PCF8523=m -+CONFIG_RTC_DRV_PCF8563=m -+CONFIG_RTC_DRV_PCF8583=m -+CONFIG_RTC_DRV_M41T80=m -+CONFIG_RTC_DRV_BQ32K=m -+CONFIG_RTC_DRV_S35390A=m -+CONFIG_RTC_DRV_FM3130=m -+CONFIG_RTC_DRV_RX8581=m -+CONFIG_RTC_DRV_RX8025=m -+CONFIG_RTC_DRV_EM3027=m -+CONFIG_RTC_DRV_M41T93=m -+CONFIG_RTC_DRV_M41T94=m -+CONFIG_RTC_DRV_DS1302=m -+CONFIG_RTC_DRV_DS1305=m -+CONFIG_RTC_DRV_DS1390=m -+CONFIG_RTC_DRV_R9701=m -+CONFIG_RTC_DRV_RX4581=m -+CONFIG_RTC_DRV_RS5C348=m -+CONFIG_RTC_DRV_MAX6902=m -+CONFIG_RTC_DRV_PCF2123=m -+CONFIG_RTC_DRV_DS3232=m -+CONFIG_RTC_DRV_PCF2127=m -+CONFIG_RTC_DRV_RV3029C2=m -+CONFIG_DMADEVICES=y -+CONFIG_DMA_BCM2835=y -+CONFIG_DMA_BCM2708=y -+CONFIG_UIO=m -+CONFIG_UIO_PDRV_GENIRQ=m -+CONFIG_STAGING=y -+CONFIG_PRISM2_USB=m -+CONFIG_R8712U=m -+CONFIG_R8188EU=m -+CONFIG_VT6656=m -+CONFIG_SPEAKUP=m -+CONFIG_SPEAKUP_SYNTH_SOFT=m -+CONFIG_STAGING_MEDIA=y -+CONFIG_LIRC_STAGING=y -+CONFIG_LIRC_IMON=m -+CONFIG_LIRC_RPI=m -+CONFIG_LIRC_SASEM=m -+CONFIG_LIRC_SERIAL=m -+CONFIG_FB_TFT=m -+CONFIG_FB_TFT_AGM1264K_FL=m -+CONFIG_FB_TFT_BD663474=m -+CONFIG_FB_TFT_HX8340BN=m -+CONFIG_FB_TFT_HX8347D=m -+CONFIG_FB_TFT_HX8353D=m -+CONFIG_FB_TFT_HX8357D=m -+CONFIG_FB_TFT_ILI9163=m -+CONFIG_FB_TFT_ILI9320=m -+CONFIG_FB_TFT_ILI9325=m -+CONFIG_FB_TFT_ILI9340=m -+CONFIG_FB_TFT_ILI9341=m -+CONFIG_FB_TFT_ILI9481=m -+CONFIG_FB_TFT_ILI9486=m -+CONFIG_FB_TFT_PCD8544=m -+CONFIG_FB_TFT_RA8875=m -+CONFIG_FB_TFT_S6D02A1=m -+CONFIG_FB_TFT_S6D1121=m -+CONFIG_FB_TFT_SSD1289=m -+CONFIG_FB_TFT_SSD1306=m -+CONFIG_FB_TFT_SSD1331=m -+CONFIG_FB_TFT_SSD1351=m -+CONFIG_FB_TFT_ST7735R=m -+CONFIG_FB_TFT_TINYLCD=m -+CONFIG_FB_TFT_TLS8204=m -+CONFIG_FB_TFT_UC1701=m -+CONFIG_FB_TFT_UPD161704=m -+CONFIG_FB_TFT_WATTEROTT=m -+CONFIG_FB_FLEX=m -+CONFIG_FB_TFT_FBTFT_DEVICE=m -+CONFIG_MAILBOX=y -+CONFIG_BCM2835_MBOX=y -+# CONFIG_IOMMU_SUPPORT is not set -+CONFIG_RASPBERRYPI_POWER=y -+CONFIG_EXTCON=m -+CONFIG_EXTCON_ARIZONA=m -+CONFIG_IIO=m -+CONFIG_IIO_BUFFER=y -+CONFIG_IIO_BUFFER_CB=m -+CONFIG_IIO_KFIFO_BUF=m -+CONFIG_MCP320X=m -+CONFIG_MCP3422=m -+CONFIG_DHT11=m -+CONFIG_HTU21=m -+CONFIG_PWM_BCM2835=m -+CONFIG_PWM_PCA9685=m +CONFIG_RASPBERRYPI_FIRMWARE=y -+CONFIG_EXT4_FS=y -+CONFIG_EXT4_FS_POSIX_ACL=y -+CONFIG_EXT4_FS_SECURITY=y -+CONFIG_REISERFS_FS=m -+CONFIG_REISERFS_FS_XATTR=y -+CONFIG_REISERFS_FS_POSIX_ACL=y -+CONFIG_REISERFS_FS_SECURITY=y -+CONFIG_JFS_FS=m -+CONFIG_JFS_POSIX_ACL=y -+CONFIG_JFS_SECURITY=y -+CONFIG_JFS_STATISTICS=y -+CONFIG_XFS_FS=m -+CONFIG_XFS_QUOTA=y -+CONFIG_XFS_POSIX_ACL=y -+CONFIG_XFS_RT=y -+CONFIG_GFS2_FS=m -+CONFIG_OCFS2_FS=m -+CONFIG_BTRFS_FS=m -+CONFIG_BTRFS_FS_POSIX_ACL=y -+CONFIG_NILFS2_FS=m -+CONFIG_F2FS_FS=y -+CONFIG_FANOTIFY=y -+CONFIG_QFMT_V1=m -+CONFIG_QFMT_V2=m -+CONFIG_AUTOFS4_FS=y -+CONFIG_FUSE_FS=m -+CONFIG_CUSE=m -+CONFIG_OVERLAY_FS=m -+CONFIG_FSCACHE=y -+CONFIG_FSCACHE_STATS=y -+CONFIG_FSCACHE_HISTOGRAM=y -+CONFIG_CACHEFILES=y -+CONFIG_ISO9660_FS=m -+CONFIG_JOLIET=y -+CONFIG_ZISOFS=y -+CONFIG_UDF_FS=m -+CONFIG_MSDOS_FS=y -+CONFIG_VFAT_FS=y -+CONFIG_FAT_DEFAULT_IOCHARSET="ascii" -+CONFIG_NTFS_FS=m -+CONFIG_NTFS_RW=y -+CONFIG_TMPFS=y -+CONFIG_TMPFS_POSIX_ACL=y -+CONFIG_ECRYPT_FS=m -+CONFIG_HFS_FS=m -+CONFIG_HFSPLUS_FS=m -+CONFIG_JFFS2_FS=m -+CONFIG_JFFS2_SUMMARY=y -+CONFIG_UBIFS_FS=m -+CONFIG_SQUASHFS=m -+CONFIG_SQUASHFS_XATTR=y -+CONFIG_SQUASHFS_LZO=y -+CONFIG_SQUASHFS_XZ=y -+CONFIG_NFS_FS=y -+CONFIG_NFS_V3_ACL=y -+CONFIG_NFS_V4=y -+CONFIG_NFS_SWAP=y -+CONFIG_ROOT_NFS=y -+CONFIG_NFS_FSCACHE=y -+CONFIG_NFSD=m -+CONFIG_NFSD_V3_ACL=y -+CONFIG_NFSD_V4=y -+CONFIG_CIFS=m -+CONFIG_CIFS_WEAK_PW_HASH=y -+CONFIG_CIFS_UPCALL=y -+CONFIG_CIFS_XATTR=y -+CONFIG_CIFS_POSIX=y -+CONFIG_CIFS_ACL=y -+CONFIG_CIFS_DFS_UPCALL=y -+CONFIG_CIFS_SMB2=y -+CONFIG_CIFS_FSCACHE=y -+CONFIG_9P_FS=m -+CONFIG_9P_FS_POSIX_ACL=y -+CONFIG_NLS_DEFAULT="utf8" -+CONFIG_NLS_CODEPAGE_437=y -+CONFIG_NLS_CODEPAGE_737=m -+CONFIG_NLS_CODEPAGE_775=m -+CONFIG_NLS_CODEPAGE_850=m -+CONFIG_NLS_CODEPAGE_852=m -+CONFIG_NLS_CODEPAGE_855=m -+CONFIG_NLS_CODEPAGE_857=m -+CONFIG_NLS_CODEPAGE_860=m -+CONFIG_NLS_CODEPAGE_861=m -+CONFIG_NLS_CODEPAGE_862=m -+CONFIG_NLS_CODEPAGE_863=m -+CONFIG_NLS_CODEPAGE_864=m -+CONFIG_NLS_CODEPAGE_865=m -+CONFIG_NLS_CODEPAGE_866=m -+CONFIG_NLS_CODEPAGE_869=m -+CONFIG_NLS_CODEPAGE_936=m -+CONFIG_NLS_CODEPAGE_950=m -+CONFIG_NLS_CODEPAGE_932=m -+CONFIG_NLS_CODEPAGE_949=m -+CONFIG_NLS_CODEPAGE_874=m -+CONFIG_NLS_ISO8859_8=m -+CONFIG_NLS_CODEPAGE_1250=m -+CONFIG_NLS_CODEPAGE_1251=m -+CONFIG_NLS_ASCII=y -+CONFIG_NLS_ISO8859_1=m -+CONFIG_NLS_ISO8859_2=m -+CONFIG_NLS_ISO8859_3=m -+CONFIG_NLS_ISO8859_4=m -+CONFIG_NLS_ISO8859_5=m -+CONFIG_NLS_ISO8859_6=m -+CONFIG_NLS_ISO8859_7=m -+CONFIG_NLS_ISO8859_9=m -+CONFIG_NLS_ISO8859_13=m -+CONFIG_NLS_ISO8859_14=m -+CONFIG_NLS_ISO8859_15=m -+CONFIG_NLS_KOI8_R=m -+CONFIG_NLS_KOI8_U=m -+CONFIG_DLM=m -+CONFIG_PRINTK_TIME=y -+CONFIG_BOOT_PRINTK_DELAY=y -+CONFIG_DEBUG_MEMORY_INIT=y -+CONFIG_DETECT_HUNG_TASK=y -+CONFIG_TIMER_STATS=y -+CONFIG_LATENCYTOP=y -+CONFIG_IRQSOFF_TRACER=y -+CONFIG_SCHED_TRACER=y -+CONFIG_STACK_TRACER=y -+CONFIG_BLK_DEV_IO_TRACE=y -+# CONFIG_KPROBE_EVENT is not set -+CONFIG_FUNCTION_PROFILER=y -+CONFIG_KGDB=y -+CONFIG_KGDB_KDB=y -+CONFIG_KDB_KEYBOARD=y -+CONFIG_CRYPTO_USER=m -+CONFIG_CRYPTO_CBC=y -+CONFIG_CRYPTO_CTS=m -+CONFIG_CRYPTO_XTS=m -+CONFIG_CRYPTO_XCBC=m -+CONFIG_CRYPTO_TGR192=m -+CONFIG_CRYPTO_WP512=m -+CONFIG_CRYPTO_CAST5=m -+CONFIG_CRYPTO_DES=y -+CONFIG_CRYPTO_USER_API_SKCIPHER=m -+# CONFIG_CRYPTO_HW is not set +CONFIG_ARM_CRYPTO=y +CONFIG_CRYPTO_SHA1_ARM_NEON=m ++CONFIG_CRYPTO_AES_ARM=m +CONFIG_CRYPTO_AES_ARM_BS=m -+CONFIG_CRC_ITU_T=y -+CONFIG_LIBCRC32C=y ---- /dev/null -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -0,0 +1,1308 @@ -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SYSVIPC=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_NO_HZ=y -+CONFIG_HIGH_RES_TIMERS=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+CONFIG_TASK_XACCT=y -+CONFIG_TASK_IO_ACCOUNTING=y -+CONFIG_IKCONFIG=m -+CONFIG_IKCONFIG_PROC=y -+CONFIG_NMI_LOG_BUF_SHIFT=12 -+CONFIG_MEMCG=y -+CONFIG_BLK_CGROUP=y -+CONFIG_CGROUP_FREEZER=y -+CONFIG_CPUSETS=y -+CONFIG_CGROUP_DEVICE=y -+CONFIG_CGROUP_CPUACCT=y -+CONFIG_NAMESPACES=y -+CONFIG_USER_NS=y -+CONFIG_SCHED_AUTOGROUP=y -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_EMBEDDED=y -+# CONFIG_COMPAT_BRK is not set -+CONFIG_PROFILING=y +CONFIG_OPROFILE=m +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y @@ -1351,36 +83,12 @@ Subject: [PATCH] config: Add default configs +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_CFQ_GROUP_IOSCHED=y -+CONFIG_ARCH_MULTI_V6=y -+# CONFIG_ARCH_MULTI_V7 is not set -+CONFIG_ARCH_BCM=y -+CONFIG_ARCH_BCM2835=y -+# CONFIG_CACHE_L2X0 is not set -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_AEABI=y -+# CONFIG_CPU_SW_DOMAIN_PAN is not set ++CONFIG_BINFMT_MISC=m +CONFIG_CLEANCACHE=y +CONFIG_FRONTSWAP=y +CONFIG_CMA=y +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y -+CONFIG_UACCESS_WITH_MEMCPY=y -+CONFIG_SECCOMP=y -+# CONFIG_ATAGS is not set -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y -+CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -+CONFIG_VFP=y -+CONFIG_BINFMT_MISC=m -+# CONFIG_SUSPEND is not set -+CONFIG_PM=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y @@ -1403,6 +111,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_SYN_COOKIES=y ++CONFIG_NET_IPVTI=m +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m @@ -1410,11 +119,15 @@ Subject: [PATCH] config: Add default configs +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m +CONFIG_IPV6=m +CONFIG_IPV6_ROUTER_PREF=y ++CONFIG_IPV6_ROUTE_INFO=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y @@ -1426,8 +139,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y -+CONFIG_NF_CT_PROTO_DCCP=m -+CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m @@ -1490,7 +201,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m -+CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m @@ -1527,7 +237,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_PE_SIP=m -+CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m @@ -1547,7 +256,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m -+CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m @@ -1605,6 +313,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m @@ -1621,6 +330,9 @@ Subject: [PATCH] config: Add default configs +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_FQ=m ++CONFIG_NET_SCH_HHF=m ++CONFIG_NET_SCH_PIE=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m +CONFIG_NET_CLS_BASIC=m @@ -1666,21 +378,9 @@ Subject: [PATCH] config: Add default configs +CONFIG_YAM=m +CONFIG_CAN=m +CONFIG_CAN_VCAN=m ++CONFIG_CAN_SLCAN=m +CONFIG_CAN_MCP251X=m -+CONFIG_IRDA=m -+CONFIG_IRLAN=m -+CONFIG_IRNET=m -+CONFIG_IRCOMM=m -+CONFIG_IRDA_ULTRA=y -+CONFIG_IRDA_CACHE_LAST_LSAP=y -+CONFIG_IRDA_FAST_RR=y -+CONFIG_IRTTY_SIR=m -+CONFIG_KINGSUN_DONGLE=m -+CONFIG_KSDAZZLE_DONGLE=m -+CONFIG_KS959_DONGLE=m -+CONFIG_USB_IRDA=m -+CONFIG_SIGMATEL_FIR=m -+CONFIG_MCS_FIR=m ++CONFIG_CAN_GS_USB=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y @@ -1715,7 +415,10 @@ Subject: [PATCH] config: Add default configs +CONFIG_CMA_SIZE_MBYTES=5 +CONFIG_MTD=m +CONFIG_MTD_BLOCK=m ++CONFIG_MTD_M25P80=m ++CONFIG_MTD_BLOCK2MTD=m +CONFIG_MTD_NAND=m ++CONFIG_MTD_SPI_NOR=m +CONFIG_MTD_UBI=m +CONFIG_OF_CONFIGFS=y +CONFIG_ZRAM=m @@ -1740,11 +443,11 @@ Subject: [PATCH] config: Add default configs +CONFIG_ISCSI_BOOT_SYSFS=m +CONFIG_MD=y +CONFIG_MD_LINEAR=m -+CONFIG_MD_RAID0=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m @@ -1755,12 +458,13 @@ Subject: [PATCH] config: Add default configs +CONFIG_DUMMY=m +CONFIG_IFB=m +CONFIG_MACVLAN=m ++CONFIG_IPVLAN=m +CONFIG_VXLAN=m +CONFIG_NETCONSOLE=m +CONFIG_TUN=m +CONFIG_VETH=m +CONFIG_ENC28J60=m -+CONFIG_QCA7000=m ++CONFIG_QCA7000_SPI=m +CONFIG_MDIO_BITBANG=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m @@ -1781,6 +485,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m ++CONFIG_USB_LAN78XX=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m @@ -1824,6 +529,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_B43LEGACY=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_USB=y ++CONFIG_BRCMDBG=y +CONFIG_HOSTAP=m +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m @@ -1845,6 +551,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RTL8187=m +CONFIG_RTL8192CU=m ++CONFIG_RTL8XXXU=m +CONFIG_USB_ZD1201=m +CONFIG_ZD1211RW=m +CONFIG_MAC80211_HWSIM=m @@ -1853,12 +560,12 @@ Subject: [PATCH] config: Add default configs +CONFIG_IEEE802154_AT86RF230=m +CONFIG_IEEE802154_MRF24J40=m +CONFIG_IEEE802154_CC2520=m -+CONFIG_INPUT_POLLDEV=m -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=m +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_MATRIX=m +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_IFORCE=m @@ -1866,10 +573,15 @@ Subject: [PATCH] config: Add default configs +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y ++CONFIG_JOYSTICK_PSXPAD_SPI=m ++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y +CONFIG_JOYSTICK_RPISENSE=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_EGALAX=m ++CONFIG_TOUCHSCREEN_EXC3000=m ++CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_EDT_FT5X06=m +CONFIG_TOUCHSCREEN_RPI_FT5406=m +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_STMPE=m @@ -1890,11 +602,10 @@ Subject: [PATCH] config: Add default configs +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m +CONFIG_BRCM_CHAR_DRIVERS=y -+CONFIG_BCM_VC_CMA=y +CONFIG_BCM_VCIO=y +CONFIG_BCM_VC_SM=y ++CONFIG_BCM2835_DEVGPIOMEM=y +# CONFIG_LEGACY_PTYS is not set -+# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_CONSOLE=y @@ -1909,26 +620,35 @@ Subject: [PATCH] config: Add default configs +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_SC16IS7XX=m +CONFIG_SERIAL_SC16IS7XX_SPI=y ++CONFIG_SERIAL_DEV_BUS=m +CONFIG_TTY_PRINTK=y +CONFIG_HW_RANDOM=y +CONFIG_RAW_DRIVER=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_MUX=m ++CONFIG_I2C_MUX_GPMUX=m +CONFIG_I2C_MUX_PCA954x=m +CONFIG_I2C_BCM2708=m +CONFIG_I2C_BCM2835=m +CONFIG_I2C_GPIO=m ++CONFIG_I2C_ROBOTFUZZ_OSIF=m ++CONFIG_I2C_TINY_USB=m +CONFIG_SPI=y +CONFIG_SPI_BCM2835=m +CONFIG_SPI_BCM2835AUX=m -+CONFIG_SPI_SPIDEV=y ++CONFIG_SPI_GPIO=m ++CONFIG_SPI_SPIDEV=m ++CONFIG_SPI_SLAVE=y +CONFIG_PPS=m +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_GPIO=m -+CONFIG_GPIO_SYSFS=y ++CONFIG_PINCTRL_MCP23S08=m ++CONFIG_GPIO_BCM_VIRT=y ++CONFIG_GPIO_MOCKUP=m ++CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_ARIZONA=m +CONFIG_GPIO_STMPE=y -+CONFIG_GPIO_MCP23S08=m +CONFIG_W1=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m @@ -1942,37 +662,51 @@ Subject: [PATCH] config: Add default configs +CONFIG_W1_SLAVE_DS2423=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m -+CONFIG_W1_SLAVE_DS2760=m ++CONFIG_W1_SLAVE_DS2438=m +CONFIG_W1_SLAVE_DS2780=m +CONFIG_W1_SLAVE_DS2781=m +CONFIG_W1_SLAVE_DS28E04=m -+CONFIG_W1_SLAVE_BQ27000=m +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_GAUGE_LTC2941=m +CONFIG_HWMON=m ++CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_JC42=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_SHT21=m ++CONFIG_SENSORS_SHT3x=m +CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_ADS1015=m +CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_TMP102=m +CONFIG_THERMAL=y -+CONFIG_THERMAL_BCM2835=y ++CONFIG_BCM2835_THERMAL=y +CONFIG_WATCHDOG=y ++CONFIG_GPIO_WATCHDOG=m +CONFIG_BCM2835_WDT=y -+CONFIG_UCB1400_CORE=m +CONFIG_MFD_STMPE=y +CONFIG_STMPE_SPI=y +CONFIG_MFD_ARIZONA_I2C=m +CONFIG_MFD_ARIZONA_SPI=m +CONFIG_MFD_WM5102=y -+CONFIG_MEDIA_SUPPORT=m -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -+CONFIG_MEDIA_RADIO_SUPPORT=y -+CONFIG_MEDIA_RC_SUPPORT=y -+CONFIG_MEDIA_CONTROLLER=y -+CONFIG_LIRC=m ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=m ++CONFIG_REGULATOR_ARIZONA_LDO1=m ++CONFIG_REGULATOR_ARIZONA_MICSUPP=m ++CONFIG_RC_CORE=y ++CONFIG_LIRC=y ++CONFIG_RC_DECODERS=y ++CONFIG_IR_NEC_DECODER=m ++CONFIG_IR_RC5_DECODER=m ++CONFIG_IR_RC6_DECODER=m ++CONFIG_IR_JVC_DECODER=m ++CONFIG_IR_SONY_DECODER=m ++CONFIG_IR_SANYO_DECODER=m ++CONFIG_IR_SHARP_DECODER=m ++CONFIG_IR_MCE_KBD_DECODER=m ++CONFIG_IR_XMP_DECODER=m ++CONFIG_IR_IMON_DECODER=m +CONFIG_RC_DEVICES=y +CONFIG_RC_ATI_REMOTE=m +CONFIG_IR_IMON=m @@ -1983,6 +717,14 @@ Subject: [PATCH] config: Add default configs +CONFIG_IR_TTUSBIR=m +CONFIG_RC_LOOPBACK=m +CONFIG_IR_GPIO_CIR=m ++CONFIG_IR_GPIO_TX=m ++CONFIG_IR_PWM_TX=m ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_M5602=m @@ -2043,7 +785,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_STK1160_COMMON=m -+CONFIG_VIDEO_STK1160_AC97=y +CONFIG_VIDEO_GO7007=m +CONFIG_VIDEO_GO7007_USB=m +CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m @@ -2078,7 +819,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_DTV5100=m -+CONFIG_DVB_USB_FRIIO=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_V2=m @@ -2102,9 +842,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_BCM2835=y -+CONFIG_VIDEO_BCM2835_MMAL=m -+CONFIG_RADIO_SI470X=y ++CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_RADIO_SI4713=m @@ -2132,7 +870,12 @@ Subject: [PATCH] config: Add default configs +CONFIG_DRM=m +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_UDL=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m +CONFIG_DRM_VC4=m ++CONFIG_DRM_TINYDRM=m ++CONFIG_TINYDRM_MI0283QT=m ++CONFIG_TINYDRM_REPAPER=m +CONFIG_FB=y +CONFIG_FB_BCM2708=y +CONFIG_FB_UDL=m @@ -2147,53 +890,62 @@ Subject: [PATCH] config: Add default configs +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=m ++CONFIG_SND_HRTIMER=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_HRTIMER=m +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m -+CONFIG_SND_BCM2835=m +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_UA101=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_6FIRE=m ++CONFIG_SND_USB_HIFACE=m +CONFIG_SND_SOC=m +CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m +CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m +CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m +CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m +CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m ++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m +CONFIG_SND_BCM2708_SOC_RPI_DAC=m +CONFIG_SND_BCM2708_SOC_RPI_PROTO=m +CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m +CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m +CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m +CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m -+CONFIG_SND_BCM2708_SOC_RASPIDAC3=m +CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m +CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m ++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m +CONFIG_SND_DIGIDAC1_SOUNDCARD=m +CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m +CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m ++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m ++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m ++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m +CONFIG_SND_PISOUND=m +CONFIG_SND_SOC_ADAU1701=m ++CONFIG_SND_SOC_ADAU7002=m +CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_WM8804_I2C=m +CONFIG_SND_SIMPLE_CARD=m -+CONFIG_SOUND_PRIME=m ++CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_A4TECH=m +CONFIG_HID_ACRUX=m +CONFIG_HID_APPLE=m ++CONFIG_HID_ASUS=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BETOP_FF=m +CONFIG_HID_CHERRY=m @@ -2231,6 +983,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_HID_ROCCAT=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SONY=m ++CONFIG_SONY_FF=y +CONFIG_HID_SPEEDLINK=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_GREENASIA=m @@ -2358,7 +1111,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_USB_G_WEBCAM=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 -+CONFIG_MMC_BCM2835=y ++CONFIG_MMC_BCM2835_MMC=y +CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_SDHOST=y +CONFIG_MMC_SDHCI=y @@ -2424,11 +1177,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_SPEAKUP=m +CONFIG_SPEAKUP_SYNTH_SOFT=m +CONFIG_STAGING_MEDIA=y -+CONFIG_LIRC_STAGING=y -+CONFIG_LIRC_IMON=m -+CONFIG_LIRC_RPI=m -+CONFIG_LIRC_SASEM=m -+CONFIG_LIRC_SERIAL=m +CONFIG_FB_TFT=m +CONFIG_FB_TFT_AGM1264K_FL=m +CONFIG_FB_TFT_BD663474=m @@ -2452,6 +1200,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_FB_TFT_SSD1331=m +CONFIG_FB_TFT_SSD1351=m +CONFIG_FB_TFT_ST7735R=m ++CONFIG_FB_TFT_ST7789V=m +CONFIG_FB_TFT_TINYLCD=m +CONFIG_FB_TFT_TLS8204=m +CONFIG_FB_TFT_UC1701=m @@ -2459,6 +1208,9 @@ Subject: [PATCH] config: Add default configs +CONFIG_FB_TFT_WATTEROTT=m +CONFIG_FB_FLEX=m +CONFIG_FB_TFT_FBTFT_DEVICE=m ++CONFIG_BCM2835_VCHIQ=y ++CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m +CONFIG_MAILBOX=y +CONFIG_BCM2835_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set @@ -2466,16 +1218,19 @@ Subject: [PATCH] config: Add default configs +CONFIG_EXTCON=m +CONFIG_EXTCON_ARIZONA=m +CONFIG_IIO=m -+CONFIG_IIO_BUFFER=y +CONFIG_IIO_BUFFER_CB=m -+CONFIG_IIO_KFIFO_BUF=m +CONFIG_MCP320X=m +CONFIG_MCP3422=m +CONFIG_DHT11=m ++CONFIG_HDC100X=m +CONFIG_HTU21=m ++CONFIG_INV_MPU6050_I2C=m ++CONFIG_TSL4531=m ++CONFIG_VEML6070=m ++CONFIG_BMP280=m +CONFIG_PWM_BCM2835=m +CONFIG_PWM_PCA9685=m -+CONFIG_RASPBERRYPI_FIRMWARE=y ++CONFIG_RPI_AXIPERF=m +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y @@ -2533,6 +1288,7 @@ Subject: [PATCH] config: Add default configs +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_SWAP=y ++CONFIG_NFS_V4_1=y +CONFIG_ROOT_NFS=y +CONFIG_NFS_FSCACHE=y +CONFIG_NFSD=m @@ -2545,7 +1301,6 @@ Subject: [PATCH] config: Add default configs +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_ACL=y +CONFIG_CIFS_DFS_UPCALL=y -+CONFIG_CIFS_SMB2=y +CONFIG_CIFS_FSCACHE=y +CONFIG_9P_FS=m +CONFIG_9P_FS_POSIX_ACL=y @@ -2588,21 +1343,1362 @@ Subject: [PATCH] config: Add default configs +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_DLM=m ++CONFIG_CRYPTO_USER=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_CTS=m ++CONFIG_CRYPTO_XTS=m ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_LZ4=m ++CONFIG_CRYPTO_USER_API_SKCIPHER=m ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y +CONFIG_PRINTK_TIME=y +CONFIG_BOOT_PRINTK_DELAY=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DETECT_HUNG_TASK=y -+CONFIG_TIMER_STATS=y ++# CONFIG_RCU_TRACE is not set +CONFIG_LATENCYTOP=y +CONFIG_IRQSOFF_TRACER=y +CONFIG_SCHED_TRACER=y +CONFIG_STACK_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y -+# CONFIG_KPROBE_EVENT is not set ++# CONFIG_UPROBE_EVENTS is not set +CONFIG_FUNCTION_PROFILER=y +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y +CONFIG_KDB_KEYBOARD=y +--- /dev/null ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -0,0 +1,1353 @@ ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_GENERIC_IRQ_DEBUGFS=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT_VOLUNTARY=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y ++CONFIG_IKCONFIG=m ++CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EMBEDDED=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_PROFILING=y ++CONFIG_ARCH_MULTI_V6=y ++# CONFIG_ARCH_MULTI_V7 is not set ++CONFIG_ARCH_BCM=y ++CONFIG_ARCH_BCM2835=y ++# CONFIG_CACHE_L2X0 is not set ++# CONFIG_CPU_SW_DOMAIN_PAN is not set ++CONFIG_UACCESS_WITH_MEMCPY=y ++CONFIG_SECCOMP=y ++# CONFIG_ATAGS is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_VFP=y ++# CONFIG_SUSPEND is not set ++CONFIG_PM=y ++CONFIG_RASPBERRYPI_FIRMWARE=y ++CONFIG_ARM_CRYPTO=y ++CONFIG_CRYPTO_SHA1_ARM=m ++CONFIG_CRYPTO_AES_ARM=m ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y ++CONFIG_BINFMT_MISC=m ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_CMA=y ++CONFIG_ZSMALLOC=m ++CONFIG_PGTABLE_MAPPING=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_MULTIPLE_TABLES=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_IP_ROUTE_VERBOSE=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE_DEMUX=m ++CONFIG_NET_IPGRE=m ++CONFIG_IP_MROUTE=y ++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IP_PIMSM_V1=y ++CONFIG_IP_PIMSM_V2=y ++CONFIG_SYN_COOKIES=y ++CONFIG_NET_IPVTI=m ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++CONFIG_INET_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m ++CONFIG_IPV6=m ++CONFIG_IPV6_ROUTER_PREF=y ++CONFIG_IPV6_ROUTE_INFO=y ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_SIT_6RD=y ++CONFIG_IPV6_TUNNEL=m ++CONFIG_IPV6_MULTIPLE_TABLES=y ++CONFIG_IPV6_SUBTREES=y ++CONFIG_IPV6_MROUTE=y ++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IPV6_PIMSM_V2=y ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_ZONES=y ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_TIMESTAMP=y ++CONFIG_NF_CONNTRACK_AMANDA=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NETFILTER_XT_SET=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TPROXY=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_SET=m ++CONFIG_IP_SET_BITMAP_IP=m ++CONFIG_IP_SET_BITMAP_IPMAC=m ++CONFIG_IP_SET_BITMAP_PORT=m ++CONFIG_IP_SET_HASH_IP=m ++CONFIG_IP_SET_HASH_IPPORT=m ++CONFIG_IP_SET_HASH_IPPORTIP=m ++CONFIG_IP_SET_HASH_IPPORTNET=m ++CONFIG_IP_SET_HASH_NET=m ++CONFIG_IP_SET_HASH_NETPORT=m ++CONFIG_IP_SET_HASH_NETIFACE=m ++CONFIG_IP_SET_LIST_SET=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_PROTO_ESP=y ++CONFIG_IP_VS_PROTO_AH=y ++CONFIG_IP_VS_PROTO_SCTP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_WRR=m ++CONFIG_IP_VS_LC=m ++CONFIG_IP_VS_WLC=m ++CONFIG_IP_VS_LBLC=m ++CONFIG_IP_VS_LBLCR=m ++CONFIG_IP_VS_DH=m ++CONFIG_IP_VS_SH=m ++CONFIG_IP_VS_SED=m ++CONFIG_IP_VS_NQ=m ++CONFIG_IP_VS_FTP=m ++CONFIG_IP_VS_PE_SIP=m ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_NAT=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RPFILTER=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_HL=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m ++CONFIG_IP6_NF_NAT=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++CONFIG_BRIDGE_EBT_IP6=m ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_NFLOG=m ++CONFIG_SCTP_COOKIE_HMAC_SHA1=y ++CONFIG_ATM=m ++CONFIG_L2TP=m ++CONFIG_L2TP_V3=y ++CONFIG_L2TP_IP=m ++CONFIG_L2TP_ETH=m ++CONFIG_BRIDGE=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_ATALK=m ++CONFIG_6LOWPAN=m ++CONFIG_IEEE802154=m ++CONFIG_IEEE802154_6LOWPAN=m ++CONFIG_MAC802154=m ++CONFIG_NET_SCHED=y ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_ATM=m ++CONFIG_NET_SCH_PRIO=m ++CONFIG_NET_SCH_MULTIQ=m ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFB=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++CONFIG_NET_SCH_DRR=m ++CONFIG_NET_SCH_MQPRIO=m ++CONFIG_NET_SCH_CHOKE=m ++CONFIG_NET_SCH_QFQ=m ++CONFIG_NET_SCH_CODEL=m ++CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_FQ=m ++CONFIG_NET_SCH_HHF=m ++CONFIG_NET_SCH_PIE=m ++CONFIG_NET_SCH_INGRESS=m ++CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++CONFIG_NET_CLS_FLOW=m ++CONFIG_NET_CLS_CGROUP=m ++CONFIG_NET_EMATCH=y ++CONFIG_NET_EMATCH_CMP=m ++CONFIG_NET_EMATCH_NBYTE=m ++CONFIG_NET_EMATCH_U32=m ++CONFIG_NET_EMATCH_META=m ++CONFIG_NET_EMATCH_TEXT=m ++CONFIG_NET_EMATCH_IPSET=m ++CONFIG_NET_CLS_ACT=y ++CONFIG_NET_ACT_POLICE=m ++CONFIG_NET_ACT_GACT=m ++CONFIG_GACT_PROB=y ++CONFIG_NET_ACT_MIRRED=m ++CONFIG_NET_ACT_IPT=m ++CONFIG_NET_ACT_NAT=m ++CONFIG_NET_ACT_PEDIT=m ++CONFIG_NET_ACT_SIMP=m ++CONFIG_NET_ACT_SKBEDIT=m ++CONFIG_NET_ACT_CSUM=m ++CONFIG_BATMAN_ADV=m ++CONFIG_OPENVSWITCH=m ++CONFIG_NET_PKTGEN=m ++CONFIG_HAMRADIO=y ++CONFIG_AX25=m ++CONFIG_NETROM=m ++CONFIG_ROSE=m ++CONFIG_MKISS=m ++CONFIG_6PACK=m ++CONFIG_BPQETHER=m ++CONFIG_BAYCOM_SER_FDX=m ++CONFIG_BAYCOM_SER_HDX=m ++CONFIG_YAM=m ++CONFIG_CAN=m ++CONFIG_CAN_VCAN=m ++CONFIG_CAN_SLCAN=m ++CONFIG_CAN_MCP251X=m ++CONFIG_CAN_GS_USB=m ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_6LOWPAN=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIUART=m ++CONFIG_BT_HCIUART_3WIRE=y ++CONFIG_BT_HCIUART_BCM=y ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_BT_WILINK=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_RFKILL=m ++CONFIG_RFKILL_INPUT=y ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_DMA_CMA=y ++CONFIG_CMA_SIZE_MBYTES=5 ++CONFIG_MTD=m ++CONFIG_MTD_BLOCK=m ++CONFIG_MTD_M25P80=m ++CONFIG_MTD_BLOCK2MTD=m ++CONFIG_MTD_NAND=m ++CONFIG_MTD_SPI_NOR=m ++CONFIG_MTD_UBI=m ++CONFIG_OF_CONFIGFS=y ++CONFIG_ZRAM=m ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_DRBD=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_ATA_OVER_ETH=m ++CONFIG_EEPROM_AT24=m ++CONFIG_TI_ST=m ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_CHR_DEV_ST=m ++CONFIG_CHR_DEV_OSST=m ++CONFIG_BLK_DEV_SR=m ++CONFIG_CHR_DEV_SG=m ++CONFIG_SCSI_ISCSI_ATTRS=y ++CONFIG_ISCSI_TCP=m ++CONFIG_ISCSI_BOOT_SYSFS=m ++CONFIG_MD=y ++CONFIG_MD_LINEAR=m ++CONFIG_BLK_DEV_DM=m ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m ++CONFIG_DM_MIRROR=m ++CONFIG_DM_LOG_USERSPACE=m ++CONFIG_DM_RAID=m ++CONFIG_DM_ZERO=m ++CONFIG_DM_DELAY=m ++CONFIG_NETDEVICES=y ++CONFIG_BONDING=m ++CONFIG_DUMMY=m ++CONFIG_IFB=m ++CONFIG_MACVLAN=m ++CONFIG_IPVLAN=m ++CONFIG_VXLAN=m ++CONFIG_NETCONSOLE=m ++CONFIG_TUN=m ++CONFIG_VETH=m ++CONFIG_ENC28J60=m ++CONFIG_QCA7000_SPI=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOATM=m ++CONFIG_PPPOE=m ++CONFIG_PPPOL2TP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_SLIP_SMART=y ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=m ++CONFIG_USB_LAN78XX=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_AX88179_178A=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_CDC_NCM=m ++CONFIG_USB_NET_HUAWEI_CDC_NCM=m ++CONFIG_USB_NET_CDC_MBIM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SR9700=m ++CONFIG_USB_NET_SR9800=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_USB_HSO=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_USB=m ++CONFIG_AR5523=m ++CONFIG_AT76C50X_USB=m ++CONFIG_B43=m ++# CONFIG_B43_PHY_N is not set ++CONFIG_B43LEGACY=m ++CONFIG_BRCMFMAC=m ++CONFIG_BRCMFMAC_USB=y ++CONFIG_BRCMDBG=y ++CONFIG_HOSTAP=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_MT7601U=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT3573=y ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RT2800USB_RT55XX=y ++CONFIG_RT2800USB_UNKNOWN=y ++CONFIG_RTL8187=m ++CONFIG_RTL8192CU=m ++CONFIG_RTL8XXXU=m ++CONFIG_USB_ZD1201=m ++CONFIG_ZD1211RW=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_IEEE802154_AT86RF230=m ++CONFIG_IEEE802154_MRF24J40=m ++CONFIG_IEEE802154_CC2520=m ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_KEYBOARD_ATKBD is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_MATRIX=m ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_JOYSTICK=y ++CONFIG_JOYSTICK_IFORCE=m ++CONFIG_JOYSTICK_IFORCE_USB=y ++CONFIG_JOYSTICK_XPAD=m ++CONFIG_JOYSTICK_XPAD_FF=y ++CONFIG_JOYSTICK_XPAD_LEDS=y ++CONFIG_JOYSTICK_PSXPAD_SPI=m ++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y ++CONFIG_JOYSTICK_RPISENSE=m ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_ADS7846=m ++CONFIG_TOUCHSCREEN_EGALAX=m ++CONFIG_TOUCHSCREEN_EXC3000=m ++CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_EDT_FT5X06=m ++CONFIG_TOUCHSCREEN_RPI_FT5406=m ++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m ++CONFIG_TOUCHSCREEN_STMPE=m ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_BRCM_CHAR_DRIVERS=y ++CONFIG_BCM_VCIO=y ++CONFIG_BCM_VC_SM=y ++CONFIG_BCM2835_DEVGPIOMEM=y ++# CONFIG_LEGACY_PTYS is not set ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++# CONFIG_SERIAL_8250_DMA is not set ++CONFIG_SERIAL_8250_NR_UARTS=1 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=0 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_BCM2835AUX=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_SERIAL_SC16IS7XX=m ++CONFIG_SERIAL_SC16IS7XX_SPI=y ++CONFIG_SERIAL_DEV_BUS=m ++CONFIG_TTY_PRINTK=y ++CONFIG_HW_RANDOM=y ++CONFIG_RAW_DRIVER=y ++CONFIG_I2C=y ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_MUX=m ++CONFIG_I2C_MUX_GPMUX=m ++CONFIG_I2C_MUX_PCA954x=m ++CONFIG_I2C_BCM2708=m ++CONFIG_I2C_BCM2835=m ++CONFIG_I2C_GPIO=m ++CONFIG_I2C_ROBOTFUZZ_OSIF=m ++CONFIG_I2C_TINY_USB=m ++CONFIG_SPI=y ++CONFIG_SPI_BCM2835=m ++CONFIG_SPI_BCM2835AUX=m ++CONFIG_SPI_GPIO=m ++CONFIG_SPI_SPIDEV=m ++CONFIG_SPI_SLAVE=y ++CONFIG_PPS=m ++CONFIG_PPS_CLIENT_LDISC=m ++CONFIG_PPS_CLIENT_GPIO=m ++CONFIG_PINCTRL_MCP23S08=m ++CONFIG_GPIO_MOCKUP=m ++CONFIG_GPIO_PCF857X=m ++CONFIG_GPIO_ARIZONA=m ++CONFIG_GPIO_STMPE=y ++CONFIG_W1=m ++CONFIG_W1_MASTER_DS2490=m ++CONFIG_W1_MASTER_DS2482=m ++CONFIG_W1_MASTER_DS1WM=m ++CONFIG_W1_MASTER_GPIO=m ++CONFIG_W1_SLAVE_THERM=m ++CONFIG_W1_SLAVE_SMEM=m ++CONFIG_W1_SLAVE_DS2408=m ++CONFIG_W1_SLAVE_DS2413=m ++CONFIG_W1_SLAVE_DS2406=m ++CONFIG_W1_SLAVE_DS2423=m ++CONFIG_W1_SLAVE_DS2431=m ++CONFIG_W1_SLAVE_DS2433=m ++CONFIG_W1_SLAVE_DS2438=m ++CONFIG_W1_SLAVE_DS2780=m ++CONFIG_W1_SLAVE_DS2781=m ++CONFIG_W1_SLAVE_DS28E04=m ++CONFIG_POWER_RESET=y ++CONFIG_POWER_RESET_GPIO=y ++CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_GAUGE_LTC2941=m ++CONFIG_HWMON=m ++CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_JC42=m ++CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_SHT21=m ++CONFIG_SENSORS_SHT3x=m ++CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_ADS1015=m ++CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_TMP102=m ++CONFIG_THERMAL=y ++CONFIG_BCM2835_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_GPIO_WATCHDOG=m ++CONFIG_BCM2835_WDT=y ++CONFIG_MFD_STMPE=y ++CONFIG_STMPE_SPI=y ++CONFIG_MFD_ARIZONA_I2C=m ++CONFIG_MFD_ARIZONA_SPI=m ++CONFIG_MFD_WM5102=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=m ++CONFIG_REGULATOR_ARIZONA_LDO1=m ++CONFIG_REGULATOR_ARIZONA_MICSUPP=m ++CONFIG_RC_CORE=y ++CONFIG_LIRC=y ++CONFIG_RC_DECODERS=y ++CONFIG_IR_NEC_DECODER=m ++CONFIG_IR_RC5_DECODER=m ++CONFIG_IR_RC6_DECODER=m ++CONFIG_IR_JVC_DECODER=m ++CONFIG_IR_SONY_DECODER=m ++CONFIG_IR_SANYO_DECODER=m ++CONFIG_IR_SHARP_DECODER=m ++CONFIG_IR_MCE_KBD_DECODER=m ++CONFIG_IR_XMP_DECODER=m ++CONFIG_IR_IMON_DECODER=m ++CONFIG_RC_DEVICES=y ++CONFIG_RC_ATI_REMOTE=m ++CONFIG_IR_IMON=m ++CONFIG_IR_MCEUSB=m ++CONFIG_IR_REDRAT3=m ++CONFIG_IR_STREAMZAP=m ++CONFIG_IR_IGUANA=m ++CONFIG_IR_TTUSBIR=m ++CONFIG_RC_LOOPBACK=m ++CONFIG_IR_GPIO_CIR=m ++CONFIG_IR_GPIO_TX=m ++CONFIG_IR_PWM_TX=m ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_M5602=m ++CONFIG_USB_STV06XX=m ++CONFIG_USB_GL860=m ++CONFIG_USB_GSPCA_BENQ=m ++CONFIG_USB_GSPCA_CONEX=m ++CONFIG_USB_GSPCA_CPIA1=m ++CONFIG_USB_GSPCA_DTCS033=m ++CONFIG_USB_GSPCA_ETOMS=m ++CONFIG_USB_GSPCA_FINEPIX=m ++CONFIG_USB_GSPCA_JEILINJ=m ++CONFIG_USB_GSPCA_JL2005BCD=m ++CONFIG_USB_GSPCA_KINECT=m ++CONFIG_USB_GSPCA_KONICA=m ++CONFIG_USB_GSPCA_MARS=m ++CONFIG_USB_GSPCA_MR97310A=m ++CONFIG_USB_GSPCA_NW80X=m ++CONFIG_USB_GSPCA_OV519=m ++CONFIG_USB_GSPCA_OV534=m ++CONFIG_USB_GSPCA_OV534_9=m ++CONFIG_USB_GSPCA_PAC207=m ++CONFIG_USB_GSPCA_PAC7302=m ++CONFIG_USB_GSPCA_PAC7311=m ++CONFIG_USB_GSPCA_SE401=m ++CONFIG_USB_GSPCA_SN9C2028=m ++CONFIG_USB_GSPCA_SN9C20X=m ++CONFIG_USB_GSPCA_SONIXB=m ++CONFIG_USB_GSPCA_SONIXJ=m ++CONFIG_USB_GSPCA_SPCA500=m ++CONFIG_USB_GSPCA_SPCA501=m ++CONFIG_USB_GSPCA_SPCA505=m ++CONFIG_USB_GSPCA_SPCA506=m ++CONFIG_USB_GSPCA_SPCA508=m ++CONFIG_USB_GSPCA_SPCA561=m ++CONFIG_USB_GSPCA_SPCA1528=m ++CONFIG_USB_GSPCA_SQ905=m ++CONFIG_USB_GSPCA_SQ905C=m ++CONFIG_USB_GSPCA_SQ930X=m ++CONFIG_USB_GSPCA_STK014=m ++CONFIG_USB_GSPCA_STK1135=m ++CONFIG_USB_GSPCA_STV0680=m ++CONFIG_USB_GSPCA_SUNPLUS=m ++CONFIG_USB_GSPCA_T613=m ++CONFIG_USB_GSPCA_TOPRO=m ++CONFIG_USB_GSPCA_TV8532=m ++CONFIG_USB_GSPCA_VC032X=m ++CONFIG_USB_GSPCA_VICAM=m ++CONFIG_USB_GSPCA_XIRLINK_CIT=m ++CONFIG_USB_GSPCA_ZC3XX=m ++CONFIG_USB_PWC=m ++CONFIG_VIDEO_CPIA2=m ++CONFIG_USB_ZR364XX=m ++CONFIG_USB_STKWEBCAM=m ++CONFIG_USB_S2255=m ++CONFIG_VIDEO_USBTV=m ++CONFIG_VIDEO_PVRUSB2=m ++CONFIG_VIDEO_HDPVR=m ++CONFIG_VIDEO_USBVISION=m ++CONFIG_VIDEO_STK1160_COMMON=m ++CONFIG_VIDEO_GO7007=m ++CONFIG_VIDEO_GO7007_USB=m ++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m ++CONFIG_VIDEO_AU0828=m ++CONFIG_VIDEO_AU0828_RC=y ++CONFIG_VIDEO_CX231XX=m ++CONFIG_VIDEO_CX231XX_ALSA=m ++CONFIG_VIDEO_CX231XX_DVB=m ++CONFIG_VIDEO_TM6000=m ++CONFIG_VIDEO_TM6000_ALSA=m ++CONFIG_VIDEO_TM6000_DVB=m ++CONFIG_DVB_USB=m ++CONFIG_DVB_USB_A800=m ++CONFIG_DVB_USB_DIBUSB_MB=m ++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y ++CONFIG_DVB_USB_DIBUSB_MC=m ++CONFIG_DVB_USB_DIB0700=m ++CONFIG_DVB_USB_UMT_010=m ++CONFIG_DVB_USB_CXUSB=m ++CONFIG_DVB_USB_M920X=m ++CONFIG_DVB_USB_DIGITV=m ++CONFIG_DVB_USB_VP7045=m ++CONFIG_DVB_USB_VP702X=m ++CONFIG_DVB_USB_GP8PSK=m ++CONFIG_DVB_USB_NOVA_T_USB2=m ++CONFIG_DVB_USB_TTUSB2=m ++CONFIG_DVB_USB_DTT200U=m ++CONFIG_DVB_USB_OPERA1=m ++CONFIG_DVB_USB_AF9005=m ++CONFIG_DVB_USB_AF9005_REMOTE=m ++CONFIG_DVB_USB_PCTV452E=m ++CONFIG_DVB_USB_DW2102=m ++CONFIG_DVB_USB_CINERGY_T2=m ++CONFIG_DVB_USB_DTV5100=m ++CONFIG_DVB_USB_AZ6027=m ++CONFIG_DVB_USB_TECHNISAT_USB2=m ++CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9015=m ++CONFIG_DVB_USB_AF9035=m ++CONFIG_DVB_USB_ANYSEE=m ++CONFIG_DVB_USB_AU6610=m ++CONFIG_DVB_USB_AZ6007=m ++CONFIG_DVB_USB_CE6230=m ++CONFIG_DVB_USB_EC168=m ++CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_LME2510=m ++CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_RTL28XXU=m ++CONFIG_DVB_USB_DVBSKY=m ++CONFIG_SMS_USB_DRV=m ++CONFIG_DVB_B2C2_FLEXCOP_USB=m ++CONFIG_DVB_AS102=m ++CONFIG_VIDEO_EM28XX=m ++CONFIG_VIDEO_EM28XX_V4L2=m ++CONFIG_VIDEO_EM28XX_ALSA=m ++CONFIG_VIDEO_EM28XX_DVB=m ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_RADIO_SI470X=m ++CONFIG_USB_SI470X=m ++CONFIG_I2C_SI470X=m ++CONFIG_RADIO_SI4713=m ++CONFIG_I2C_SI4713=m ++CONFIG_USB_MR800=m ++CONFIG_USB_DSBR=m ++CONFIG_RADIO_SHARK=m ++CONFIG_RADIO_SHARK2=m ++CONFIG_USB_KEENE=m ++CONFIG_USB_MA901=m ++CONFIG_RADIO_TEA5764=m ++CONFIG_RADIO_SAA7706H=m ++CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL1273=m ++CONFIG_RADIO_WL128X=m ++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set ++CONFIG_VIDEO_UDA1342=m ++CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_TVP5150=m ++CONFIG_VIDEO_TW2804=m ++CONFIG_VIDEO_TW9903=m ++CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV7640=m ++CONFIG_VIDEO_MT9V011=m ++CONFIG_DRM=m ++CONFIG_DRM_LOAD_EDID_FIRMWARE=y ++CONFIG_DRM_UDL=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m ++CONFIG_DRM_VC4=m ++CONFIG_DRM_TINYDRM=m ++CONFIG_TINYDRM_MI0283QT=m ++CONFIG_TINYDRM_REPAPER=m ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FB_UDL=m ++CONFIG_FB_SSD1307=m ++CONFIG_FB_RPISENSE=m ++# CONFIG_BACKLIGHT_GENERIC is not set ++CONFIG_BACKLIGHT_RPI=m ++CONFIG_BACKLIGHT_GPIO=m ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_CAIAQ_INPUT=y ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SND_USB_HIFACE=m ++CONFIG_SND_SOC=m ++CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m ++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m ++CONFIG_SND_BCM2708_SOC_RPI_DAC=m ++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m ++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m ++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_DIGIDAC1_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m ++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m ++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m ++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m ++CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_ADAU1701=m ++CONFIG_SND_SOC_ADAU7002=m ++CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_SPDIF=m ++CONFIG_SND_SOC_WM8804_I2C=m ++CONFIG_SND_SIMPLE_CARD=m ++CONFIG_HID_BATTERY_STRENGTH=y ++CONFIG_HIDRAW=y ++CONFIG_UHID=m ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_ASUS=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_BETOP_FF=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_ELO=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_GEMBIRD=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_LOGITECH_DJ=m ++CONFIG_LOGITECH_FF=y ++CONFIG_LOGIRUMBLEPAD2_FF=y ++CONFIG_LOGIG940_FF=y ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_SONY_FF=y ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THINGM=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_XINMO=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_PRINTER=m ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USBIP_CORE=m ++CONFIG_USBIP_VHCI_HCD=m ++CONFIG_USBIP_HOST=m ++CONFIG_USB_DWC2=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_F81232=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_METRO=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_XSENS_MT=m ++CONFIG_USB_SERIAL_WISHBONE=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_QT2=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_USB_ATM=m ++CONFIG_USB_SPEEDTOUCH=m ++CONFIG_USB_CXACRU=m ++CONFIG_USB_UEAGLEATM=m ++CONFIG_USB_XUSBATM=m ++CONFIG_USB_GADGET=m ++CONFIG_USB_ZERO=m ++CONFIG_USB_AUDIO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_USB_MIDI_GADGET=m ++CONFIG_USB_G_PRINTER=m ++CONFIG_USB_CDC_COMPOSITE=m ++CONFIG_USB_G_ACM_MS=m ++CONFIG_USB_G_MULTI=m ++CONFIG_USB_G_HID=m ++CONFIG_USB_G_WEBCAM=m ++CONFIG_MMC=y ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_BCM2835_MMC=y ++CONFIG_MMC_BCM2835_DMA=y ++CONFIG_MMC_BCM2835_SDHOST=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SPI=m ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_ONESHOT=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_TRANSIENT=m ++CONFIG_LEDS_TRIGGER_CAMERA=m ++CONFIG_LEDS_TRIGGER_INPUT=y ++CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_RTC_CLASS=y ++# CONFIG_RTC_HCTOSYS is not set ++CONFIG_RTC_DRV_ABX80X=m ++CONFIG_RTC_DRV_DS1307=m ++CONFIG_RTC_DRV_DS1374=m ++CONFIG_RTC_DRV_DS1672=m ++CONFIG_RTC_DRV_MAX6900=m ++CONFIG_RTC_DRV_RS5C372=m ++CONFIG_RTC_DRV_ISL1208=m ++CONFIG_RTC_DRV_ISL12022=m ++CONFIG_RTC_DRV_X1205=m ++CONFIG_RTC_DRV_PCF8523=m ++CONFIG_RTC_DRV_PCF8563=m ++CONFIG_RTC_DRV_PCF8583=m ++CONFIG_RTC_DRV_M41T80=m ++CONFIG_RTC_DRV_BQ32K=m ++CONFIG_RTC_DRV_S35390A=m ++CONFIG_RTC_DRV_FM3130=m ++CONFIG_RTC_DRV_RX8581=m ++CONFIG_RTC_DRV_RX8025=m ++CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_M41T93=m ++CONFIG_RTC_DRV_M41T94=m ++CONFIG_RTC_DRV_DS1302=m ++CONFIG_RTC_DRV_DS1305=m ++CONFIG_RTC_DRV_DS1390=m ++CONFIG_RTC_DRV_R9701=m ++CONFIG_RTC_DRV_RX4581=m ++CONFIG_RTC_DRV_RS5C348=m ++CONFIG_RTC_DRV_MAX6902=m ++CONFIG_RTC_DRV_PCF2123=m ++CONFIG_RTC_DRV_DS3232=m ++CONFIG_RTC_DRV_PCF2127=m ++CONFIG_RTC_DRV_RV3029C2=m ++CONFIG_DMADEVICES=y ++CONFIG_DMA_BCM2835=y ++CONFIG_DMA_BCM2708=y ++CONFIG_UIO=m ++CONFIG_UIO_PDRV_GENIRQ=m ++CONFIG_STAGING=y ++CONFIG_PRISM2_USB=m ++CONFIG_R8712U=m ++CONFIG_R8188EU=m ++CONFIG_VT6656=m ++CONFIG_SPEAKUP=m ++CONFIG_SPEAKUP_SYNTH_SOFT=m ++CONFIG_STAGING_MEDIA=y ++CONFIG_FB_TFT=m ++CONFIG_FB_TFT_AGM1264K_FL=m ++CONFIG_FB_TFT_BD663474=m ++CONFIG_FB_TFT_HX8340BN=m ++CONFIG_FB_TFT_HX8347D=m ++CONFIG_FB_TFT_HX8353D=m ++CONFIG_FB_TFT_HX8357D=m ++CONFIG_FB_TFT_ILI9163=m ++CONFIG_FB_TFT_ILI9320=m ++CONFIG_FB_TFT_ILI9325=m ++CONFIG_FB_TFT_ILI9340=m ++CONFIG_FB_TFT_ILI9341=m ++CONFIG_FB_TFT_ILI9481=m ++CONFIG_FB_TFT_ILI9486=m ++CONFIG_FB_TFT_PCD8544=m ++CONFIG_FB_TFT_RA8875=m ++CONFIG_FB_TFT_S6D02A1=m ++CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SSD1289=m ++CONFIG_FB_TFT_SSD1306=m ++CONFIG_FB_TFT_SSD1331=m ++CONFIG_FB_TFT_SSD1351=m ++CONFIG_FB_TFT_ST7735R=m ++CONFIG_FB_TFT_ST7789V=m ++CONFIG_FB_TFT_TINYLCD=m ++CONFIG_FB_TFT_TLS8204=m ++CONFIG_FB_TFT_UC1701=m ++CONFIG_FB_TFT_UPD161704=m ++CONFIG_FB_TFT_WATTEROTT=m ++CONFIG_FB_FLEX=m ++CONFIG_FB_TFT_FBTFT_DEVICE=m ++CONFIG_BCM2835_VCHIQ=y ++CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m ++CONFIG_MAILBOX=y ++CONFIG_BCM2835_MBOX=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_RASPBERRYPI_POWER=y ++CONFIG_EXTCON=m ++CONFIG_EXTCON_ARIZONA=m ++CONFIG_IIO=m ++CONFIG_IIO_BUFFER_CB=m ++CONFIG_MCP320X=m ++CONFIG_MCP3422=m ++CONFIG_DHT11=m ++CONFIG_HDC100X=m ++CONFIG_HTU21=m ++CONFIG_INV_MPU6050_I2C=m ++CONFIG_TSL4531=m ++CONFIG_VEML6070=m ++CONFIG_BMP280=m ++CONFIG_PWM_BCM2835=m ++CONFIG_PWM_PCA9685=m ++CONFIG_RPI_AXIPERF=m ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_F2FS_FS=y ++CONFIG_FANOTIFY=y ++CONFIG_QFMT_V1=m ++CONFIG_QFMT_V2=m ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_OVERLAY_FS=m ++CONFIG_FSCACHE=y ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_HISTOGRAM=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_NTFS_RW=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_ECRYPT_FS=m ++CONFIG_HFS_FS=m ++CONFIG_HFSPLUS_FS=m ++CONFIG_JFFS2_FS=m ++CONFIG_JFFS2_SUMMARY=y ++CONFIG_UBIFS_FS=m ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_SWAP=y ++CONFIG_NFS_V4_1=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_NFSD=m ++CONFIG_NFSD_V3_ACL=y ++CONFIG_NFSD_V4=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_UPCALL=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_CIFS_ACL=y ++CONFIG_CIFS_DFS_UPCALL=y ++CONFIG_CIFS_FSCACHE=y ++CONFIG_9P_FS=m ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_DLM=m +CONFIG_CRYPTO_USER=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_CBC=y @@ -2614,10 +2710,22 @@ Subject: [PATCH] config: Add default configs +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +# CONFIG_CRYPTO_HW is not set -+CONFIG_ARM_CRYPTO=y -+CONFIG_CRYPTO_SHA1_ARM=m -+CONFIG_CRYPTO_AES_ARM=m +CONFIG_CRC_ITU_T=y +CONFIG_LIBCRC32C=y ++CONFIG_PRINTK_TIME=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_LATENCYTOP=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++# CONFIG_UPROBE_EVENTS is not set ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y diff --git a/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch b/target/linux/brcm2708/patches-4.19/950-0097-Add-arm64-configuration-and-device-tree-differences..patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch rename to target/linux/brcm2708/patches-4.19/950-0097-Add-arm64-configuration-and-device-tree-differences..patch index d2bfb1695..4ece04a21 100644 --- a/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch +++ b/target/linux/brcm2708/patches-4.19/950-0097-Add-arm64-configuration-and-device-tree-differences..patch @@ -1,9 +1,9 @@ -From 64d1c392baa391243d0a7963379ab957d5d9b8b1 Mon Sep 17 00:00:00 2001 +From 8a3aa5b6a470f7c89025e51d5fc2f2827e8efc00 Mon Sep 17 00:00:00 2001 From: Michael Zoran Date: Wed, 24 Aug 2016 03:35:56 -0700 -Subject: [PATCH] Add arm64 configuration and device tree differences. Disable - MMC_BCM2835_SDHOST and MMC_BCM2835 since these drivers are crashing at the - moment. +Subject: [PATCH 097/703] Add arm64 configuration and device tree differences. + Disable MMC_BCM2835_SDHOST and MMC_BCM2835 since these drivers are crashing + at the moment. ARM64: Modify default config to get raspbian to boot (#1686) @@ -13,113 +13,128 @@ ARM64: Modify default config to get raspbian to boot (#1686) 4. Include the watchdog timer driver in the kernel image rather then a module. Tested with raspbian-jessie 2016-09-23. + +ARM64: Make it work again on 4.9 (#1790) + +* Invoke the dtc compiler with the same options used in arm mode. +* ARM64 now uses the bcm2835 platform just like ARM32. +* ARM64: Update bcmrpi3_defconfig + +Signed-off-by: Michael Zoran + +Update arm64 Makefile to compile bcm2710 dtb file + +The line 'dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb' has been copied from previous rpi-4.14.y version into rpi-4.15.y arch/arm64/boot/dts/broadcom/Makefile to restore compilation of bcm2710-rpi-3-b.dtb device tree blob under 'make ARCH=arm64 dtbs' command. + +arm64: enable thermal / enable mmc (#2425) + +This commit adds support for RP3-B-Plus in in arch arm64 (#2464) + +Enable AES, AES bit slice, and AES NEON engines on arm64 + +Enable bbr module for arm64 --- - arch/arm64/Kconfig.platforms | 22 + - arch/arm64/boot/dts/broadcom/Makefile | 1 + - arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts | 3 + - arch/arm64/configs/bcmrpi3_defconfig | 1334 ++++++++++++++++++++++ - 4 files changed, 1360 insertions(+) + arch/arm64/Kconfig.platforms | 6 - + arch/arm64/boot/dts/Makefile | 2 + + arch/arm64/boot/dts/broadcom/Makefile | 3 + + .../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 3 + + .../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 3 + + .../dts/broadcom/bcm283x-rpi-lan7515.dtsi | 1 + + arch/arm64/boot/dts/overlays | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1289 +++++++++++++++++ + 8 files changed, 1302 insertions(+), 6 deletions(-) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts + create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi + create mode 120000 arch/arm64/boot/dts/overlays create mode 100644 arch/arm64/configs/bcmrpi3_defconfig +diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms +index 393d2b524284..e9bdec0ead72 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms -@@ -1,5 +1,27 @@ +@@ -1,11 +1,5 @@ menu "Platform selection" -+config MACH_BCM2709 -+ bool -+ -+config ARCH_BCM2709 -+ bool "Broadcom BCM2709 family" -+ select MACH_BCM2709 -+ select HAVE_SMP -+ select ARM_AMBA -+ select COMMON_CLK -+ select ARCH_HAS_CPUFREQ -+ select GENERIC_CLOCKEVENTS -+ select MULTI_IRQ_HANDLER -+ select SPARSE_IRQ -+ select MFD_SYSCON -+ select VC4 -+ select USE_OF -+ select ARCH_REQUIRE_GPIOLIB -+ select PINCTRL -+ select PINCTRL_BCM2835 -+ help -+ This enables support for Broadcom BCM2709 boards. -+ +-config ARCH_ACTIONS +- bool "Actions Semi Platforms" +- select OWL_TIMER +- help +- This enables support for the Actions Semiconductor S900 SoC family. +- config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" select ARCH_HAS_RESET_CONTROLLER +diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile +index 4690364d584b..cd9c79566ebe 100644 +--- a/arch/arm64/boot/dts/Makefile ++++ b/arch/arm64/boot/dts/Makefile +@@ -26,3 +26,5 @@ subdir-y += synaptics + subdir-y += ti + subdir-y += xilinx + subdir-y += zte ++ ++subdir-y += overlays +diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile +index 1193a9e34bbb..78d23305bc31 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -1,6 +1,7 @@ - dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb - dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb - dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb +@@ -1,6 +1,9 @@ + # SPDX-License-Identifier: GPL-2.0 + dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb \ + bcm2837-rpi-3-b-plus.dtb +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb ++dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb ++dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb - always := $(dtb-y) - subdir-y := $(dts-dirs) + subdir-y += northstar2 + subdir-y += stingray +diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts +new file mode 100644 +index 000000000000..d9242ff77079 +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts +@@ -0,0 +1,3 @@ ++#define RPI364 ++ ++#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts" +diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts +new file mode 100644 +index 000000000000..deb33441da95 --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts @@ -0,0 +1,3 @@ +#define RPI364 + +#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts" +diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi +new file mode 120000 +index 000000000000..fc4c05bbe7fd +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi +@@ -0,0 +1 @@ ++../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi +\ No newline at end of file +diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays +new file mode 120000 +index 000000000000..ded08646b6f6 +--- /dev/null ++++ b/arch/arm64/boot/dts/overlays +@@ -0,0 +1 @@ ++../../../arm/boot/dts/overlays +\ No newline at end of file +diff --git a/arch/arm64/configs/bcmrpi3_defconfig b/arch/arm64/configs/bcmrpi3_defconfig +new file mode 100644 +index 000000000000..ffd9d4cbb4c1 --- /dev/null +++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -0,0 +1,1334 @@ -+# CONFIG_ARM_PATCH_PHYS_VIRT is not set -+CONFIG_PHYS_OFFSET=0 +@@ -0,0 +1,1289 @@ +CONFIG_LOCALVERSION="-v8" +# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_64BIT=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y -+ -+# -+# ARM errata workarounds via the alternatives framework -+# -+CONFIG_ARM64_ERRATUM_826319=n -+CONFIG_ARM64_ERRATUM_827319=n -+CONFIG_ARM64_ERRATUM_824069=n -+CONFIG_ARM64_ERRATUM_819472=n -+CONFIG_ARM64_ERRATUM_832075=n -+CONFIG_ARM64_ERRATUM_845719=n -+CONFIG_ARM64_ERRATUM_843419=n -+CONFIG_CAVIUM_ERRATUM_22375=n -+CONFIG_CAVIUM_ERRATUM_23154=n -+CONFIG_CAVIUM_ERRATUM_27456=n -+CONFIG_ARM64_4K_PAGES=y -+CONFIG_ARM64_VA_BITS_39=y -+CONFIG_ARM64_VA_BITS=39 -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=4 -+CONFIG_HOTPLUG_CPU=y -+CONFIG_ARMV8_DEPRECATED=y -+CONFIG_SWP_EMULATION=y -+CONFIG_CP15_BARRIER_EMULATION=y -+CONFIG_SETEND_EMULATION=y -+ -+# -+# ARMv8.1 architectural features -+# -+CONFIG_ARM64_HW_AFDBM=y -+CONFIG_ARM64_PAN=y -+CONFIG_ARM64_LSE_ATOMICS=y -+CONFIG_ARM64_VHE=y -+ -+# -+# ARMv8.2 architectural features -+# -+CONFIG_ARM64_UAO=y -+CONFIG_ARM64_MODULE_CMODEL_LARGE=n -+CONFIG_RANDOMIZE_BASE=n -+ +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y @@ -128,7 +143,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y -+CONFIG_NMI_LOG_BUF_SHIFT=12 +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_FREEZER=y @@ -142,54 +156,50 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_EMBEDDED=y +# CONFIG_COMPAT_BRK is not set +CONFIG_PROFILING=y -+CONFIG_OPROFILE=m +CONFIG_KPROBES=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y -+CONFIG_TRIM_UNUSED_KSYMS=y +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_MAC_PARTITION=y +CONFIG_CFQ_GROUP_IOSCHED=y -+CONFIG_ARCH_BCM2709=y -+# CONFIG_CACHE_L2X0 is not set -+CONFIG_SMP=y -+CONFIG_HAVE_ARM_ARCH_TIMER=y -+CONFIG_VMSPLIT_2G=y -+CONFIG_PREEMPT_VOLUNTARY=y -+CONFIG_AEABI=y -+CONFIG_OABI_COMPAT=y -+# CONFIG_CPU_SW_DOMAIN_PAN is not set ++CONFIG_ARCH_BCM2835=y ++# CONFIG_CAVIUM_ERRATUM_22375 is not set ++# CONFIG_CAVIUM_ERRATUM_23154 is not set ++# CONFIG_CAVIUM_ERRATUM_27456 is not set ++CONFIG_SCHED_MC=y ++CONFIG_NR_CPUS=4 ++CONFIG_PREEMPT=y ++CONFIG_HZ_1000=y +CONFIG_CLEANCACHE=y +CONFIG_FRONTSWAP=y +CONFIG_CMA=y +CONFIG_ZSMALLOC=m +CONFIG_PGTABLE_MAPPING=y -+CONFIG_UACCESS_WITH_MEMCPY=y +CONFIG_SECCOMP=y -+# CONFIG_ATAGS is not set -+CONFIG_ZBOOT_ROM_TEXT=0x0 -+CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_ARMV8_DEPRECATED=y ++CONFIG_SWP_EMULATION=y ++CONFIG_CP15_BARRIER_EMULATION=y ++CONFIG_SETEND_EMULATION=y ++CONFIG_RANDOMIZE_BASE=y +CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" ++CONFIG_BINFMT_MISC=y ++CONFIG_COMPAT=y ++# CONFIG_SUSPEND is not set ++CONFIG_PM=y ++CONFIG_CPU_IDLE=y ++CONFIG_ARM_CPUIDLE=y +CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -+CONFIG_VFP=y -+CONFIG_NEON=y -+CONFIG_KERNEL_MODE_NEON=y -+CONFIG_BINFMT_MISC=m -+CONFIG_COMPAT=y -+CONFIG_SYSVIPC_COMPAT=y -+ -+# CONFIG_SUSPEND is not set -+CONFIG_PM=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y @@ -235,8 +245,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y -+CONFIG_NF_CT_PROTO_DCCP=m -+CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m @@ -299,7 +307,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m -+CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m @@ -432,6 +439,9 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_NET_SCH_FQ_CODEL=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_SCH_FQ=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m @@ -476,20 +486,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_CAN=m +CONFIG_CAN_VCAN=m +CONFIG_CAN_MCP251X=m -+CONFIG_IRDA=m -+CONFIG_IRLAN=m -+CONFIG_IRNET=m -+CONFIG_IRCOMM=m -+CONFIG_IRDA_ULTRA=y -+CONFIG_IRDA_CACHE_LAST_LSAP=y -+CONFIG_IRDA_FAST_RR=y -+CONFIG_IRTTY_SIR=m -+CONFIG_KINGSUN_DONGLE=m -+CONFIG_KSDAZZLE_DONGLE=m -+CONFIG_KS959_DONGLE=m -+CONFIG_USB_IRDA=m -+CONFIG_SIGMATEL_FIR=m -+CONFIG_MCS_FIR=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y @@ -510,6 +506,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_BT_MRVL_SDIO=m +CONFIG_BT_ATH3K=m +CONFIG_BT_WILINK=m ++CONFIG_CFG80211=m +CONFIG_MAC80211=m +CONFIG_MAC80211_MESH=y +CONFIG_WIMAX=m @@ -548,11 +545,11 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_ISCSI_BOOT_SYSFS=m +CONFIG_MD=y +CONFIG_MD_LINEAR=m -+CONFIG_MD_RAID0=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m @@ -563,13 +560,12 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_DUMMY=m +CONFIG_IFB=m +CONFIG_MACVLAN=m -+CONFIG_IPVLAN=m +CONFIG_VXLAN=m +CONFIG_NETCONSOLE=m +CONFIG_TUN=m +CONFIG_VETH=m +CONFIG_ENC28J60=m -+CONFIG_QCA7000=m ++CONFIG_QCA7000_SPI=m +CONFIG_MDIO_BITBANG=m +CONFIG_PPP=m +CONFIG_PPP_BSDCOMP=m @@ -590,6 +586,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m ++CONFIG_USB_LAN78XX=y +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_AX88179_178A=m @@ -603,6 +600,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_LAN78XX=y +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m @@ -653,7 +651,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RTL8187=m -+CONFIG_RTL8192CU=n ++CONFIG_RTL8192CU=m +CONFIG_USB_ZD1201=m +CONFIG_ZD1211RW=m +CONFIG_MAC80211_HWSIM=m @@ -663,11 +661,11 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_IEEE802154_MRF24J40=m +CONFIG_IEEE802154_CC2520=m +CONFIG_INPUT_POLLDEV=m -+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=m +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_MATRIX=m +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_IFORCE=m @@ -679,7 +677,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_EGALAX=m -+CONFIG_TOUCHSCREEN_FT6236=m ++CONFIG_TOUCHSCREEN_EKTF2127=m +CONFIG_TOUCHSCREEN_RPI_FT5406=m +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_STMPE=m @@ -699,23 +697,26 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m -+CONFIG_BRCM_CHAR_DRIVERS=n -+CONFIG_BCM_VC_CMA=n -+CONFIG_BCM_VCIO=n -+CONFIG_BCM_VC_SM=n ++CONFIG_BRCM_CHAR_DRIVERS=y ++CONFIG_BCM_VCIO=y ++CONFIG_BCM2835_DEVGPIOMEM=y ++# CONFIG_BCM2835_SMI_DEV is not set +# CONFIG_LEGACY_PTYS is not set -+# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_DMA is not set +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=0 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_BCM2835AUX=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_SC16IS7XX=m +CONFIG_SERIAL_SC16IS7XX_SPI=y ++CONFIG_SERIAL_DEV_BUS=m +CONFIG_TTY_PRINTK=y +CONFIG_HW_RANDOM=y +CONFIG_RAW_DRIVER=y @@ -723,6 +724,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_MUX_PCA954x=m +CONFIG_I2C_BCM2708=m ++CONFIG_I2C_BCM2835=m +CONFIG_I2C_GPIO=m +CONFIG_SPI=y +CONFIG_SPI_BCM2835=m @@ -732,10 +734,10 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_GPIO=m +CONFIG_GPIO_SYSFS=y ++CONFIG_GPIO_BCM_EXP=y +CONFIG_GPIO_BCM_VIRT=y +CONFIG_GPIO_ARIZONA=m +CONFIG_GPIO_STMPE=y -+CONFIG_GPIO_MCP23S08=m +CONFIG_W1=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m @@ -753,31 +755,22 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_W1_SLAVE_DS2780=m +CONFIG_W1_SLAVE_DS2781=m +CONFIG_W1_SLAVE_DS28E04=m -+CONFIG_W1_SLAVE_BQ27000=m -+CONFIG_BATTERY_DS2760=m -+CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y ++CONFIG_BATTERY_DS2760=m +CONFIG_HWMON=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_SHT21=m +CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_INA2XX=m +CONFIG_THERMAL=y -+CONFIG_THERMAL_BCM2835=y ++CONFIG_BCM2835_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_BCM2835_WDT=y -+CONFIG_UCB1400_CORE=m +CONFIG_MFD_STMPE=y +CONFIG_STMPE_SPI=y +CONFIG_MFD_ARIZONA_I2C=m +CONFIG_MFD_ARIZONA_SPI=m +CONFIG_MFD_WM5102=y -+CONFIG_MEDIA_SUPPORT=m -+CONFIG_MEDIA_CAMERA_SUPPORT=y -+CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -+CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -+CONFIG_MEDIA_RADIO_SUPPORT=y -+CONFIG_MEDIA_RC_SUPPORT=y -+CONFIG_MEDIA_CONTROLLER=y +CONFIG_LIRC=m +CONFIG_RC_DEVICES=y +CONFIG_RC_ATI_REMOTE=m @@ -789,6 +782,12 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_IR_TTUSBIR=m +CONFIG_RC_LOOPBACK=m +CONFIG_IR_GPIO_CIR=m ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_M5602=m @@ -849,7 +848,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_STK1160_COMMON=m -+CONFIG_VIDEO_STK1160_AC97=y +CONFIG_VIDEO_GO7007=m +CONFIG_VIDEO_GO7007_USB=m +CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m @@ -908,8 +906,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_V4L_PLATFORM_DRIVERS=y -+CONFIG_VIDEO_BCM2835=n -+CONFIG_VIDEO_BCM2835_MMAL=n +CONFIG_RADIO_SI470X=y +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m @@ -938,6 +934,8 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_DRM=m +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_UDL=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m +CONFIG_DRM_VC4=m +CONFIG_FB=y +CONFIG_FB_BCM2708=y @@ -953,20 +951,15 @@ Tested with raspbian-jessie 2016-09-23. +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=m ++CONFIG_SND_HRTIMER=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_SEQUENCER_OSS=y -+CONFIG_SND_HRTIMER=m +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m -+CONFIG_SND_ARM=n -+CONFIG_SND_BCM2835=n +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_UA101=m +CONFIG_SND_USB_CAIAQ=m @@ -984,15 +977,17 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m +CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m +CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m -+CONFIG_SND_BCM2708_SOC_RASPIDAC3=m +CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m +CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m +CONFIG_SND_DIGIDAC1_SOUNDCARD=m +CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m ++CONFIG_SND_PISOUND=m +CONFIG_SND_SOC_ADAU1701=m ++CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4271_I2C=m +CONFIG_SND_SOC_WM8804_I2C=m +CONFIG_SND_SIMPLE_CARD=m -+CONFIG_SOUND_PRIME=m +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_A4TECH=m @@ -1052,8 +1047,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_MON=m -+CONFIG_USB_DWCOTG=n -+CONFIG_USB_DWC2=y ++CONFIG_USB_DWCOTG=y +CONFIG_USB_PRINTER=m +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=m @@ -1074,6 +1068,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_USBIP_CORE=m +CONFIG_USBIP_VHCI_HCD=m +CONFIG_USBIP_HOST=m ++CONFIG_USB_DWC2=y +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_AIRCABLE=m @@ -1148,12 +1143,14 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_USB_XUSBATM=m +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 -+CONFIG_MMC_BCM2835=y ++CONFIG_MMC_BCM2835_MMC=y +CONFIG_MMC_BCM2835_DMA=y +CONFIG_MMC_BCM2835_SDHOST=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_IPROC=m +CONFIG_MMC_SPI=m ++CONFIG_MMC_BCM2835=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_TRIGGER_TIMER=y @@ -1169,6 +1166,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set ++CONFIG_RTC_DRV_ABX80X=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1672=m @@ -1176,7 +1174,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_ISL12022=m -+CONFIG_RTC_DRV_ISL12057=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8523=m +CONFIG_RTC_DRV_PCF8563=m @@ -1207,25 +1204,36 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_UIO=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_STAGING=y ++CONFIG_IRDA=m ++CONFIG_IRLAN=m ++CONFIG_IRNET=m ++CONFIG_IRCOMM=m ++CONFIG_IRDA_ULTRA=y ++CONFIG_IRDA_CACHE_LAST_LSAP=y ++CONFIG_IRDA_FAST_RR=y ++CONFIG_IRTTY_SIR=m ++CONFIG_KINGSUN_DONGLE=m ++CONFIG_KSDAZZLE_DONGLE=m ++CONFIG_KS959_DONGLE=m ++CONFIG_USB_IRDA=m ++CONFIG_SIGMATEL_FIR=m ++CONFIG_MCS_FIR=m +CONFIG_PRISM2_USB=m +CONFIG_R8712U=m +CONFIG_R8188EU=m -+CONFIG_R8723AU=m +CONFIG_VT6656=m +CONFIG_SPEAKUP=m +CONFIG_SPEAKUP_SYNTH_SOFT=m +CONFIG_STAGING_MEDIA=y +CONFIG_LIRC_STAGING=y -+CONFIG_LIRC_IMON=m +CONFIG_LIRC_RPI=m -+CONFIG_LIRC_SASEM=m -+CONFIG_LIRC_SERIAL=m +CONFIG_FB_TFT=m +CONFIG_FB_TFT_AGM1264K_FL=m +CONFIG_FB_TFT_BD663474=m +CONFIG_FB_TFT_HX8340BN=m +CONFIG_FB_TFT_HX8347D=m +CONFIG_FB_TFT_HX8353D=m ++CONFIG_FB_TFT_HX8357D=m +CONFIG_FB_TFT_ILI9163=m +CONFIG_FB_TFT_ILI9320=m +CONFIG_FB_TFT_ILI9325=m @@ -1249,6 +1257,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_FB_TFT_WATTEROTT=m +CONFIG_FB_FLEX=m +CONFIG_FB_TFT_FBTFT_DEVICE=m ++CONFIG_SND_BCM2835=m +CONFIG_MAILBOX=y +CONFIG_BCM2835_MBOX=y +# CONFIG_IOMMU_SUPPORT is not set @@ -1262,6 +1271,7 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_MCP320X=m +CONFIG_MCP3422=m +CONFIG_DHT11=m ++CONFIG_HTU21=m +CONFIG_PWM_BCM2835=m +CONFIG_PWM_PCA9685=m +CONFIG_RASPBERRYPI_FIRMWARE=y @@ -1334,7 +1344,6 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_ACL=y +CONFIG_CIFS_DFS_UPCALL=y -+CONFIG_CIFS_SMB2=y +CONFIG_CIFS_FSCACHE=y +CONFIG_9P_FS=m +CONFIG_9P_FS_POSIX_ACL=y @@ -1381,12 +1390,11 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_BOOT_PRINTK_DELAY=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DETECT_HUNG_TASK=y -+CONFIG_TIMER_STATS=y ++CONFIG_LATENCYTOP=y +CONFIG_IRQSOFF_TRACER=y +CONFIG_SCHED_TRACER=y +CONFIG_STACK_TRACER=y +CONFIG_BLK_DEV_IO_TRACE=y -+# CONFIG_KPROBE_EVENT is not set +CONFIG_FUNCTION_PROFILER=y +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y @@ -1400,8 +1408,16 @@ Tested with raspbian-jessie 2016-09-23. +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_ARM64_CRYPTO=y ++CONFIG_CRYPTO_AES_ARM64=m ++CONFIG_CRYPTO_AES_ARM64_BS=m ++CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m +CONFIG_CRC_ITU_T=y +CONFIG_LIBCRC32C=y -+CONFIG_BCM2708_VCHIQ=n ++CONFIG_MMC_BCM2835_MMC=y ++CONFIG_MMC_SDHCI_IPROC=m +-- +2.20.1 + diff --git a/target/linux/brcm2708/patches-4.9/950-0130-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch b/target/linux/brcm2708/patches-4.19/950-0098-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch similarity index 89% rename from target/linux/brcm2708/patches-4.9/950-0130-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch rename to target/linux/brcm2708/patches-4.19/950-0098-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch index a94fee469..054fa6930 100644 --- a/target/linux/brcm2708/patches-4.9/950-0130-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch +++ b/target/linux/brcm2708/patches-4.19/950-0098-ARM64-DWC_OTG-Port-dwc_otg-driver-to-ARM64.patch @@ -1,7 +1,7 @@ -From 99c33b6e418cefebb461fee0ad3a927a0c4127f1 Mon Sep 17 00:00:00 2001 +From 3d6c0c835d5e1b2983a0e4dec0dc779cd67db922 Mon Sep 17 00:00:00 2001 From: Michael Zoran Date: Sat, 14 Jan 2017 21:33:51 -0800 -Subject: [PATCH] ARM64/DWC_OTG: Port dwc_otg driver to ARM64 +Subject: [PATCH 098/703] ARM64/DWC_OTG: Port dwc_otg driver to ARM64 In ARM64, the FIQ mechanism used by this driver is not current implemented. As a workaround, reqular IRQ is used instead @@ -32,13 +32,13 @@ play quite well. Signed-off-by: Michael Zoran --- - drivers/usb/host/dwc_otg/Makefile | 3 ++ - drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 17 +++++++ - drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 24 ++++++++++ + drivers/usb/host/dwc_otg/Makefile | 3 + + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 17 +++++ + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 24 +++++++ drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4 ++ drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h | 4 ++ drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 3 +- - drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 72 ++++++++++++++++++++++++++++ + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 72 ++++++++++++++++++++ drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 2 + 8 files changed, 128 insertions(+), 1 deletion(-) @@ -79,7 +79,7 @@ Signed-off-by: Michael Zoran /** * fiq_fsm_spin_lock() - ARMv6+ bare bones spinlock * Must be called with local interrupts and FIQ disabled. -@@ -122,6 +137,8 @@ inline void fiq_fsm_spin_unlock(fiq_lock +@@ -121,6 +136,8 @@ inline void fiq_fsm_spin_unlock(fiq_lock inline void fiq_fsm_spin_unlock(fiq_lock_t *lock) { } #endif @@ -112,7 +112,7 @@ Signed-off-by: Michael Zoran struct fiq_state; extern void _fiq_print (enum fiq_debug_level dbg_lvl, volatile struct fiq_state *state, char *fmt, ...); -@@ -355,6 +363,22 @@ struct fiq_state { +@@ -357,6 +365,22 @@ struct fiq_state { struct fiq_channel_state channel[0]; }; @@ -137,7 +137,7 @@ Signed-off-by: Michael Zoran extern void fiq_fsm_spin_unlock(fiq_lock_t *lock); --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -@@ -1021,6 +1021,10 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd +@@ -1014,6 +1014,10 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd } DWC_MEMSET(hcd->fiq_state, 0, (sizeof(struct fiq_state) + (sizeof(struct fiq_channel_state) * num_channels))); @@ -201,7 +201,7 @@ Signed-off-by: Michael Zoran extern unsigned char _dwc_otg_fiq_stub, _dwc_otg_fiq_stub_end; /** -@@ -393,14 +402,49 @@ static struct dwc_otg_hcd_function_ops h +@@ -395,14 +404,49 @@ static struct dwc_otg_hcd_function_ops h .get_b_hnp_enable = _get_b_hnp_enable, }; @@ -251,7 +251,7 @@ Signed-off-by: Michael Zoran struct pt_regs regs; int irq; -@@ -428,6 +472,7 @@ static void hcd_init_fiq(void *cookie) +@@ -430,6 +474,7 @@ static void hcd_init_fiq(void *cookie) // __show_regs(®s); set_fiq_regs(®s); @@ -259,7 +259,7 @@ Signed-off-by: Michael Zoran //Set the mphi periph to the required registers dwc_otg_hcd->fiq_state->mphi_regs.base = otg_dev->os_dep.mphi_base; -@@ -446,6 +491,23 @@ static void hcd_init_fiq(void *cookie) +@@ -448,6 +493,23 @@ static void hcd_init_fiq(void *cookie) DWC_WARN("MPHI periph has NOT been enabled"); #endif // Enable FIQ interrupt from USB peripheral @@ -280,11 +280,11 @@ Signed-off-by: Michael Zoran + + simfiq_irq = irq; +#else - #ifdef CONFIG_MULTI_IRQ_HANDLER + #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER irq = platform_get_irq(otg_dev->os_dep.platformdev, 1); #else -@@ -457,6 +519,8 @@ static void hcd_init_fiq(void *cookie) - } +@@ -464,6 +526,8 @@ static void hcd_init_fiq(void *cookie) + smp_mb(); enable_fiq(irq); local_fiq_enable(); +#endif @@ -292,7 +292,7 @@ Signed-off-by: Michael Zoran } /** -@@ -519,6 +583,13 @@ int hcd_init(dwc_bus_dev_t *_dev) +@@ -526,6 +590,13 @@ int hcd_init(dwc_bus_dev_t *_dev) otg_dev->hcd = dwc_otg_hcd; otg_dev->hcd->otg_dev = otg_dev; @@ -306,7 +306,7 @@ Signed-off-by: Michael Zoran if (dwc_otg_hcd_init(dwc_otg_hcd, otg_dev->core_if)) { goto error2; } -@@ -531,6 +602,7 @@ int hcd_init(dwc_bus_dev_t *_dev) +@@ -542,6 +613,7 @@ int hcd_init(dwc_bus_dev_t *_dev) smp_call_function_single(0, hcd_init_fiq, otg_dev, 1); } } diff --git a/target/linux/brcm2708/patches-4.9/950-0131-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch b/target/linux/brcm2708/patches-4.19/950-0099-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch similarity index 86% rename from target/linux/brcm2708/patches-4.9/950-0131-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch rename to target/linux/brcm2708/patches-4.19/950-0099-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch index d11ca6bff..74e670c76 100644 --- a/target/linux/brcm2708/patches-4.9/950-0131-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch +++ b/target/linux/brcm2708/patches-4.19/950-0099-ARM64-Round-Robin-dispatch-IRQs-between-CPUs.patch @@ -1,7 +1,7 @@ -From 3a9b48156c6681e846d1a7dbe4ecbb3ae14c2f3c Mon Sep 17 00:00:00 2001 +From 67ba0d1572d1ca3874cbe8ebd57f5141178eb55c Mon Sep 17 00:00:00 2001 From: Michael Zoran Date: Sat, 14 Jan 2017 21:43:57 -0800 -Subject: [PATCH] ARM64: Round-Robin dispatch IRQs between CPUs. +Subject: [PATCH 099/703] ARM64: Round-Robin dispatch IRQs between CPUs. IRQ-CPU mapping is round robined on ARM64 to increase concurrency and allow multiple interrupts to be serviced @@ -15,7 +15,7 @@ Signed-off-by: Michael Zoran --- a/drivers/irqchip/irq-bcm2835.c +++ b/drivers/irqchip/irq-bcm2835.c -@@ -168,10 +168,23 @@ static void armctrl_unmask_irq(struct ir +@@ -162,10 +162,23 @@ static void armctrl_unmask_irq(struct ir } } @@ -42,7 +42,7 @@ Signed-off-by: Michael Zoran static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr, --- a/drivers/irqchip/irq-bcm2836.c +++ b/drivers/irqchip/irq-bcm2836.c -@@ -145,6 +145,27 @@ static void bcm2836_arm_irqchip_unmask_g +@@ -95,6 +95,27 @@ static void bcm2836_arm_irqchip_unmask_g { } diff --git a/target/linux/brcm2708/patches-4.19/950-0100-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch b/target/linux/brcm2708/patches-4.19/950-0100-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch new file mode 100644 index 000000000..b8d783885 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0100-ARM64-Force-hardware-emulation-of-deprecated-instruc.patch @@ -0,0 +1,28 @@ +From 303b20724f8691db1c6b575f127d47d5953359f2 Mon Sep 17 00:00:00 2001 +From: Michael Zoran +Date: Sat, 11 Feb 2017 01:18:31 -0800 +Subject: [PATCH 100/703] ARM64: Force hardware emulation of deprecated + instructions. + +--- + arch/arm64/kernel/armv8_deprecated.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm64/kernel/armv8_deprecated.c ++++ b/arch/arm64/kernel/armv8_deprecated.c +@@ -182,10 +182,15 @@ static void __init register_insn_emulati + + switch (ops->status) { + case INSN_DEPRECATED: ++#if 0 + insn->current_mode = INSN_EMULATE; + /* Disable the HW mode if it was turned on at early boot time */ + run_all_cpu_set_hw_mode(insn, false); ++#else ++ insn->current_mode = INSN_HW; ++ run_all_cpu_set_hw_mode(insn, true); + insn->max = INSN_HW; ++#endif + break; + case INSN_OBSOLETE: + insn->current_mode = INSN_UNDEF; diff --git a/target/linux/brcm2708/patches-4.19/950-0101-build-arm64-Add-rules-for-.dtbo-files-for-dts-overla.patch b/target/linux/brcm2708/patches-4.19/950-0101-build-arm64-Add-rules-for-.dtbo-files-for-dts-overla.patch new file mode 100644 index 000000000..12304c50c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0101-build-arm64-Add-rules-for-.dtbo-files-for-dts-overla.patch @@ -0,0 +1,25 @@ +From ab40577b4601c0eeeedb5c3688cf0719b2bc582e Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Fri, 10 Feb 2017 17:57:08 -0800 +Subject: [PATCH 101/703] build/arm64: Add rules for .dtbo files for dts + overlays + +We now create overlays as .dtbo files. + +Signed-off-by: Khem Raj +--- + arch/arm64/Makefile | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/arm64/Makefile ++++ b/arch/arm64/Makefile +@@ -131,6 +131,9 @@ zinstall install: + %.dtb: scripts + $(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@ + ++%.dtbo: | scripts ++ $(Q)$(MAKE) $(build)=$(boot)/dts MACHINE=$(MACHINE) $(boot)/dts/$@ ++ + PHONY += dtbs dtbs_install + + dtbs: prepare scripts diff --git a/target/linux/brcm2708/patches-4.19/950-0102-cache-export-clean-and-invalidate.patch b/target/linux/brcm2708/patches-4.19/950-0102-cache-export-clean-and-invalidate.patch new file mode 100644 index 000000000..81d0d4909 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0102-cache-export-clean-and-invalidate.patch @@ -0,0 +1,50 @@ +From e8cf1886f2434ec0e5a672d9b94a96f7fea80789 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Fri, 25 Aug 2017 19:18:13 +0100 +Subject: [PATCH 102/703] cache: export clean and invalidate + +--- + arch/arm/mm/cache-v6.S | 4 ++-- + arch/arm/mm/cache-v7.S | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm/mm/cache-v6.S ++++ b/arch/arm/mm/cache-v6.S +@@ -201,7 +201,7 @@ ENTRY(v6_flush_kern_dcache_area) + * - start - virtual start address of region + * - end - virtual end address of region + */ +-v6_dma_inv_range: ++ENTRY(v6_dma_inv_range) + #ifdef CONFIG_DMA_CACHE_RWFO + ldrb r2, [r0] @ read for ownership + strb r2, [r0] @ write for ownership +@@ -246,7 +246,7 @@ v6_dma_inv_range: + * - start - virtual start address of region + * - end - virtual end address of region + */ +-v6_dma_clean_range: ++ENTRY(v6_dma_clean_range) + bic r0, r0, #D_CACHE_LINE_SIZE - 1 + 1: + #ifdef CONFIG_DMA_CACHE_RWFO +--- a/arch/arm/mm/cache-v7.S ++++ b/arch/arm/mm/cache-v7.S +@@ -350,7 +350,7 @@ ENDPROC(v7_flush_kern_dcache_area) + * - start - virtual start address of region + * - end - virtual end address of region + */ +-v7_dma_inv_range: ++ENTRY(v7_dma_inv_range) + dcache_line_size r2, r3 + sub r3, r2, #1 + tst r0, r3 +@@ -380,7 +380,7 @@ ENDPROC(v7_dma_inv_range) + * - start - virtual start address of region + * - end - virtual end address of region + */ +-v7_dma_clean_range: ++ENTRY(v7_dma_clean_range) + dcache_line_size r2, r3 + sub r3, r2, #1 + bic r0, r0, r3 diff --git a/target/linux/brcm2708/patches-4.19/950-0103-AXI-performance-monitor-driver-2222.patch b/target/linux/brcm2708/patches-4.19/950-0103-AXI-performance-monitor-driver-2222.patch new file mode 100644 index 000000000..0fb4a67ed --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0103-AXI-performance-monitor-driver-2222.patch @@ -0,0 +1,681 @@ +From 93664cd3cee57e93c1d354c3263773a6b832db22 Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Tue, 14 Nov 2017 15:13:15 +0000 +Subject: [PATCH 103/703] AXI performance monitor driver (#2222) + +Uses the debugfs I/F to provide access to the AXI +bus performance monitors. + +Requires the new mailbox peripheral access for access +to the VPU performance registers, system bus access +is done using direct register reads. + +Signed-off-by: James Hughes +--- + drivers/perf/Kconfig | 7 + + drivers/perf/Makefile | 1 + + drivers/perf/raspberrypi_axi_monitor.c | 637 +++++++++++++++++++++++++ + 3 files changed, 645 insertions(+) + create mode 100644 drivers/perf/raspberrypi_axi_monitor.c + +--- a/drivers/perf/Kconfig ++++ b/drivers/perf/Kconfig +@@ -102,4 +102,11 @@ config ARM_SPE_PMU + Extension, which provides periodic sampling of operations in + the CPU pipeline and reports this via the perf AUX interface. + ++config RPI_AXIPERF ++ depends on ARCH_BCM2835 ++ tristate "RaspberryPi AXI Performance monitors" ++ default n ++ help ++ Say y if you want to use Raspberry Pi AXI performance monitors, m if ++ you want to build it as a module. + endmenu +--- a/drivers/perf/Makefile ++++ b/drivers/perf/Makefile +@@ -9,3 +9,4 @@ obj-$(CONFIG_QCOM_L2_PMU) += qcom_l2_pmu + obj-$(CONFIG_QCOM_L3_PMU) += qcom_l3_pmu.o + obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o + obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o ++obj-$(CONFIG_RPI_AXIPERF) += raspberrypi_axi_monitor.o +--- /dev/null ++++ b/drivers/perf/raspberrypi_axi_monitor.c +@@ -0,0 +1,637 @@ ++/* ++ * raspberrypi_axi_monitor.c ++ * ++ * Author: james.hughes@raspberrypi.org ++ * ++ * Raspberry Pi AXI performance counters. ++ * ++ * Copyright (C) 2017 Raspberry Pi Trading Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define NUM_MONITORS 2 ++#define NUM_BUS_WATCHERS_PER_MONITOR 3 ++ ++#define SYSTEM_MONITOR 0 ++#define VPU_MONITOR 1 ++ ++#define MAX_BUSES 16 ++#define DEFAULT_SAMPLE_TIME 100 ++ ++#define NUM_BUS_WATCHER_RESULTS 9 ++ ++struct bus_watcher_data { ++ union { ++ u32 results[NUM_BUS_WATCHER_RESULTS]; ++ struct { ++ u32 atrans; ++ u32 atwait; ++ u32 amax; ++ u32 wtrans; ++ u32 wtwait; ++ u32 wmax; ++ u32 rtrans; ++ u32 rtwait; ++ u32 rmax; ++ }; ++ }; ++}; ++ ++ ++struct rpi_axiperf { ++ struct platform_device *dev; ++ struct dentry *root_folder; ++ ++ struct task_struct *monitor_thread; ++ struct mutex lock; ++ ++ struct rpi_firmware *firmware; ++ ++ /* Sample time spent on for each bus */ ++ int sample_time; ++ ++ /* Now storage for the per monitor settings and the resulting ++ * performance figures ++ */ ++ struct { ++ /* Bit field of buses we want to monitor */ ++ int bus_enabled; ++ /* Bit field of buses to filter by */ ++ int bus_filter; ++ /* The current buses being monitored on this monitor */ ++ int current_bus[NUM_BUS_WATCHERS_PER_MONITOR]; ++ /* The last bus monitored on this monitor */ ++ int last_monitored; ++ ++ /* Set true if this mailbox must use the mailbox interface ++ * rather than access registers directly. ++ */ ++ int use_mailbox_interface; ++ ++ /* Current result values */ ++ struct bus_watcher_data results[MAX_BUSES]; ++ ++ struct dentry *debugfs_entry; ++ void __iomem *base_address; ++ ++ } monitor[NUM_MONITORS]; ++ ++}; ++ ++static struct rpi_axiperf *state; ++ ++/* Two monitors, System and VPU, each with the following register sets. ++ * Each monitor can only monitor one bus at a time, so we time share them, ++ * giving each bus 100ms (default, settable via debugfs) of time on its ++ * associated monitor ++ * Record results from the three Bus watchers per monitor and push to the sysfs ++ */ ++ ++/* general registers */ ++const int GEN_CTRL; ++ ++const int GEN_CTL_ENABLE_BIT = BIT(0); ++const int GEN_CTL_RESET_BIT = BIT(1); ++ ++/* Bus watcher registers */ ++const int BW_PITCH = 0x40; ++ ++const int BW0_CTRL = 0x40; ++const int BW1_CTRL = 0x80; ++const int BW2_CTRL = 0xc0; ++ ++const int BW_ATRANS_OFFSET = 0x04; ++const int BW_ATWAIT_OFFSET = 0x08; ++const int BW_AMAX_OFFSET = 0x0c; ++const int BW_WTRANS_OFFSET = 0x10; ++const int BW_WTWAIT_OFFSET = 0x14; ++const int BW_WMAX_OFFSET = 0x18; ++const int BW_RTRANS_OFFSET = 0x1c; ++const int BW_RTWAIT_OFFSET = 0x20; ++const int BW_RMAX_OFFSET = 0x24; ++ ++const int BW_CTRL_RESET_BIT = BIT(31); ++const int BW_CTRL_ENABLE_BIT = BIT(30); ++const int BW_CTRL_ENABLE_ID_FILTER_BIT = BIT(29); ++const int BW_CTRL_LIMIT_HALT_BIT = BIT(28); ++ ++const int BW_CTRL_SOURCE_SHIFT = 8; ++const int BW_CTRL_SOURCE_MASK = GENMASK(12, 8); // 5 bits ++const int BW_CTRL_BUS_WATCH_SHIFT; ++const int BW_CTRL_BUS_WATCH_MASK = GENMASK(5, 0); // 6 bits ++const int BW_CTRL_BUS_FILTER_SHIFT = 8; ++ ++const static char *bus_filter_strings[] = { ++ "", ++ "CORE0_V", ++ "ICACHE0", ++ "DCACHE0", ++ "CORE1_V", ++ "ICACHE1", ++ "DCACHE1", ++ "L2_MAIN", ++ "HOST_PORT", ++ "HOST_PORT2", ++ "HVS", ++ "ISP", ++ "VIDEO_DCT", ++ "VIDEO_SD2AXI", ++ "CAM0", ++ "CAM1", ++ "DMA0", ++ "DMA1", ++ "DMA2_VPU", ++ "JPEG", ++ "VIDEO_CME", ++ "TRANSPOSER", ++ "VIDEO_FME", ++ "CCP2TX", ++ "USB", ++ "V3D0", ++ "V3D1", ++ "V3D2", ++ "AVE", ++ "DEBUG", ++ "CPU", ++ "M30" ++}; ++ ++const int num_bus_filters = ARRAY_SIZE(bus_filter_strings); ++ ++const static char *system_bus_string[] = { ++ "DMA_L2", ++ "TRANS", ++ "JPEG", ++ "SYSTEM_UC", ++ "DMA_UC", ++ "SYSTEM_L2", ++ "CCP2TX", ++ "MPHI_RX", ++ "MPHI_TX", ++ "HVS", ++ "H264", ++ "ISP", ++ "V3D", ++ "PERIPHERAL", ++ "CPU_UC", ++ "CPU_L2" ++}; ++ ++const int num_system_buses = ARRAY_SIZE(system_bus_string); ++ ++const static char *vpu_bus_string[] = { ++ "VPU1_D_L2", ++ "VPU0_D_L2", ++ "VPU1_I_L2", ++ "VPU0_I_L2", ++ "SYSTEM_L2", ++ "L2_FLUSH", ++ "DMA_L2", ++ "VPU1_D_UC", ++ "VPU0_D_UC", ++ "VPU1_I_UC", ++ "VPU0_I_UC", ++ "SYSTEM_UC", ++ "L2_OUT", ++ "DMA_UC", ++ "SDRAM", ++ "L2_IN" ++}; ++ ++const int num_vpu_buses = ARRAY_SIZE(vpu_bus_string); ++ ++const static char *monitor_name[] = { ++ "System", ++ "VPU" ++}; ++ ++static inline void write_reg(int monitor, int reg, u32 value) ++{ ++ writel(value, state->monitor[monitor].base_address + reg); ++} ++ ++static inline u32 read_reg(int monitor, u32 reg) ++{ ++ return readl(state->monitor[monitor].base_address + reg); ++} ++ ++static void read_bus_watcher(int monitor, int watcher, u32 *results) ++{ ++ if (state->monitor[monitor].use_mailbox_interface) { ++ /* We have 9 results, plus the overheads of start address and ++ * length So 11 u32 to define ++ */ ++ u32 tmp[11]; ++ int err; ++ ++ tmp[0] = (u32)(state->monitor[monitor].base_address + watcher ++ + BW_ATRANS_OFFSET); ++ tmp[1] = NUM_BUS_WATCHER_RESULTS; ++ ++ err = rpi_firmware_property(state->firmware, ++ RPI_FIRMWARE_GET_PERIPH_REG, ++ tmp, sizeof(tmp)); ++ ++ if (err < 0 || tmp[1] != NUM_BUS_WATCHER_RESULTS) ++ dev_err_once(&state->dev->dev, ++ "Failed to read bus watcher"); ++ else ++ memcpy(results, &tmp[2], ++ NUM_BUS_WATCHER_RESULTS * sizeof(u32)); ++ } else { ++ int i; ++ void __iomem *addr = state->monitor[monitor].base_address ++ + watcher + BW_ATRANS_OFFSET; ++ for (i = 0; i < NUM_BUS_WATCHER_RESULTS; i++, addr += 4) ++ *results++ = readl(addr); ++ } ++} ++ ++static void set_monitor_control(int monitor, u32 set) ++{ ++ if (state->monitor[monitor].use_mailbox_interface) { ++ u32 tmp[3] = {(u32)(state->monitor[monitor].base_address + ++ GEN_CTRL), 1, set}; ++ int err = rpi_firmware_property(state->firmware, ++ RPI_FIRMWARE_SET_PERIPH_REG, ++ tmp, sizeof(tmp)); ++ ++ if (err < 0 || tmp[1] != 1) ++ dev_err_once(&state->dev->dev, ++ "Failed to set monitor control"); ++ } else ++ write_reg(monitor, GEN_CTRL, set); ++} ++ ++static void set_bus_watcher_control(int monitor, int watcher, u32 set) ++{ ++ if (state->monitor[monitor].use_mailbox_interface) { ++ u32 tmp[3] = {(u32)(state->monitor[monitor].base_address + ++ watcher), 1, set}; ++ int err = rpi_firmware_property(state->firmware, ++ RPI_FIRMWARE_SET_PERIPH_REG, ++ tmp, sizeof(tmp)); ++ if (err < 0 || tmp[1] != 1) ++ dev_err_once(&state->dev->dev, ++ "Failed to set bus watcher control"); ++ } else ++ write_reg(monitor, watcher, set); ++} ++ ++static void monitor(struct rpi_axiperf *state) ++{ ++ int monitor, num_buses[NUM_MONITORS]; ++ ++ mutex_lock(&state->lock); ++ ++ for (monitor = 0; monitor < NUM_MONITORS; monitor++) { ++ typeof(state->monitor[0]) *mon = &(state->monitor[monitor]); ++ ++ /* Anything enabled? */ ++ if (mon->bus_enabled == 0) { ++ /* No, disable all monitoring for this monitor */ ++ set_monitor_control(monitor, GEN_CTL_RESET_BIT); ++ } else { ++ int i; ++ ++ /* Find out how many busses we want to monitor, and ++ * spread our 3 actual monitors over them ++ */ ++ num_buses[monitor] = hweight32(mon->bus_enabled); ++ num_buses[monitor] = min(num_buses[monitor], ++ NUM_BUS_WATCHERS_PER_MONITOR); ++ ++ for (i = 0; i < num_buses[monitor]; i++) { ++ int bus_control; ++ ++ do { ++ mon->last_monitored++; ++ mon->last_monitored &= 0xf; ++ } while ((mon->bus_enabled & ++ (1 << mon->last_monitored)) == 0); ++ ++ mon->current_bus[i] = mon->last_monitored; ++ ++ /* Reset the counters */ ++ set_bus_watcher_control(monitor, ++ BW0_CTRL + ++ i*BW_PITCH, ++ BW_CTRL_RESET_BIT); ++ ++ bus_control = BW_CTRL_ENABLE_BIT | ++ mon->current_bus[i]; ++ ++ if (mon->bus_filter) { ++ bus_control |= ++ BW_CTRL_ENABLE_ID_FILTER_BIT; ++ bus_control |= ++ ((mon->bus_filter & 0x1f) ++ << BW_CTRL_BUS_FILTER_SHIFT); ++ } ++ ++ // Start capture ++ set_bus_watcher_control(monitor, ++ BW0_CTRL + i*BW_PITCH, ++ bus_control); ++ } ++ } ++ ++ /* start monitoring */ ++ set_monitor_control(monitor, GEN_CTL_ENABLE_BIT); ++ } ++ ++ mutex_unlock(&state->lock); ++ ++ msleep(state->sample_time); ++ ++ /* Now read the results */ ++ ++ mutex_lock(&state->lock); ++ for (monitor = 0; monitor < NUM_MONITORS; monitor++) { ++ typeof(state->monitor[0]) *mon = &(state->monitor[monitor]); ++ ++ /* Anything enabled? */ ++ if (mon->bus_enabled == 0) { ++ /* No, disable all monitoring for this monitor */ ++ set_monitor_control(monitor, 0); ++ } else { ++ int i; ++ ++ for (i = 0; i < num_buses[monitor]; i++) { ++ int bus = mon->current_bus[i]; ++ ++ read_bus_watcher(monitor, ++ BW0_CTRL + i*BW_PITCH, ++ (u32 *)&mon->results[bus].results); ++ } ++ } ++ } ++ mutex_unlock(&state->lock); ++} ++ ++static int monitor_thread(void *data) ++{ ++ struct rpi_axiperf *state = data; ++ ++ while (1) { ++ monitor(state); ++ ++ if (kthread_should_stop()) ++ return 0; ++ } ++ return 0; ++} ++ ++static ssize_t myreader(struct file *fp, char __user *user_buffer, ++ size_t count, loff_t *position) ++{ ++#define INIT_BUFF_SIZE 2048 ++ ++ int i; ++ int idx = (int)(fp->private_data); ++ int num_buses, cnt; ++ char *string_buffer; ++ int buff_size = INIT_BUFF_SIZE; ++ char *p; ++ typeof(state->monitor[0]) *mon = &(state->monitor[idx]); ++ ++ if (idx < 0 || idx > NUM_MONITORS) ++ idx = 0; ++ ++ num_buses = idx == SYSTEM_MONITOR ? num_system_buses : num_vpu_buses; ++ ++ string_buffer = kmalloc(buff_size, GFP_KERNEL); ++ ++ if (!string_buffer) { ++ dev_err(&state->dev->dev, ++ "Failed temporary string allocation\n"); ++ return 0; ++ } ++ ++ p = string_buffer; ++ ++ mutex_lock(&state->lock); ++ ++ if (mon->bus_filter) { ++ int filt = min(mon->bus_filter & 0x1f, num_bus_filters); ++ ++ cnt = snprintf(p, buff_size, ++ "\nMonitoring transactions from %s only\n", ++ bus_filter_strings[filt]); ++ p += cnt; ++ buff_size -= cnt; ++ } ++ ++ cnt = snprintf(p, buff_size, " Bus | Atrans Atwait AMax Wtrans Wtwait WMax Rtrans Rtwait RMax\n" ++ "======================================================================================================\n"); ++ ++ if (cnt >= buff_size) ++ goto done; ++ ++ p += cnt; ++ buff_size -= cnt; ++ ++ for (i = 0; i < num_buses; i++) { ++ if (mon->bus_enabled & (1 << i)) { ++#define DIVIDER (1024) ++ typeof(mon->results[0]) *res = &(mon->results[i]); ++ ++ cnt = snprintf(p, buff_size, ++ "%10s | %8uK %8uK %8uK %8uK %8uK %8uK %8uK %8uK %8uK\n", ++ idx == SYSTEM_MONITOR ? ++ system_bus_string[i] : ++ vpu_bus_string[i], ++ res->atrans/DIVIDER, ++ res->atwait/DIVIDER, ++ res->amax/DIVIDER, ++ res->wtrans/DIVIDER, ++ res->wtwait/DIVIDER, ++ res->wmax/DIVIDER, ++ res->rtrans/DIVIDER, ++ res->rtwait/DIVIDER, ++ res->rmax/DIVIDER ++ ); ++ if (cnt >= buff_size) ++ goto done; ++ ++ p += cnt; ++ buff_size -= cnt; ++ } ++ } ++ ++ mutex_unlock(&state->lock); ++ ++done: ++ ++ /* did the last string entry exceeed our buffer size? ie out of string ++ * buffer space. Null terminate, use what we have. ++ */ ++ if (cnt >= buff_size) { ++ buff_size = 0; ++ string_buffer[INIT_BUFF_SIZE] = 0; ++ } ++ ++ cnt = simple_read_from_buffer(user_buffer, count, position, ++ string_buffer, ++ INIT_BUFF_SIZE - buff_size); ++ ++ kfree(string_buffer); ++ ++ return cnt; ++} ++ ++static ssize_t mywriter(struct file *fp, const char __user *user_buffer, ++ size_t count, loff_t *position) ++{ ++ int idx = (int)(fp->private_data); ++ ++ if (idx < 0 || idx > NUM_MONITORS) ++ idx = 0; ++ ++ /* At the moment, this does nothing, but in the future it could be ++ * used to reset counters etc ++ */ ++ return count; ++} ++ ++static const struct file_operations fops_debug = { ++ .read = myreader, ++ .write = mywriter, ++ .open = simple_open ++}; ++ ++static int rpi_axiperf_probe(struct platform_device *pdev) ++{ ++ int ret = 0, i; ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; ++ struct device_node *fw_node; ++ ++ state = kzalloc(sizeof(struct rpi_axiperf), GFP_KERNEL); ++ if (!state) ++ return -ENOMEM; ++ ++ /* Get the firmware handle for future rpi-firmware-xxx calls */ ++ fw_node = of_parse_phandle(np, "firmware", 0); ++ if (!fw_node) { ++ dev_err(dev, "Missing firmware node\n"); ++ return -ENOENT; ++ } ++ ++ state->firmware = rpi_firmware_get(fw_node); ++ if (!state->firmware) ++ return -EPROBE_DEFER; ++ ++ /* Special case for the VPU monitor, we must use the mailbox interface ++ * as it is not accessible from the ARM address space. ++ */ ++ state->monitor[VPU_MONITOR].use_mailbox_interface = 1; ++ state->monitor[SYSTEM_MONITOR].use_mailbox_interface = 0; ++ ++ for (i = 0; i < NUM_MONITORS; i++) { ++ if (state->monitor[i].use_mailbox_interface) { ++ of_property_read_u32_index(np, "reg", i*2, ++ (u32 *)(&state->monitor[i].base_address)); ++ } else { ++ struct resource *resource = ++ platform_get_resource(pdev, IORESOURCE_MEM, i); ++ ++ state->monitor[i].base_address = ++ devm_ioremap_resource(&pdev->dev, resource); ++ } ++ ++ if (IS_ERR(state->monitor[i].base_address)) ++ return PTR_ERR(state->monitor[i].base_address); ++ ++ /* Enable all buses by default */ ++ state->monitor[i].bus_enabled = 0xffff; ++ } ++ ++ state->dev = pdev; ++ platform_set_drvdata(pdev, state); ++ ++ state->sample_time = DEFAULT_SAMPLE_TIME; ++ ++ /* Set up all the debugfs stuff */ ++ state->root_folder = debugfs_create_dir(KBUILD_MODNAME, NULL); ++ ++ for (i = 0; i < NUM_MONITORS; i++) { ++ state->monitor[i].debugfs_entry = ++ debugfs_create_dir(monitor_name[i], state->root_folder); ++ if (IS_ERR(state->monitor[i].debugfs_entry)) ++ state->monitor[i].debugfs_entry = NULL; ++ ++ debugfs_create_file("data", 0444, ++ state->monitor[i].debugfs_entry, ++ (void *)i, &fops_debug); ++ debugfs_create_u32("enable", 0644, ++ state->monitor[i].debugfs_entry, ++ &state->monitor[i].bus_enabled); ++ debugfs_create_u32("filter", 0644, ++ state->monitor[i].debugfs_entry, ++ &state->monitor[i].bus_filter); ++ debugfs_create_u32("sample_time", 0644, ++ state->monitor[i].debugfs_entry, ++ &state->sample_time); ++ } ++ ++ mutex_init(&state->lock); ++ ++ state->monitor_thread = kthread_run(monitor_thread, state, ++ "rpi-axiperfmon"); ++ ++ return ret; ++ ++} ++ ++static int rpi_axiperf_remove(struct platform_device *dev) ++{ ++ int ret = 0; ++ ++ kthread_stop(state->monitor_thread); ++ ++ debugfs_remove_recursive(state->root_folder); ++ state->root_folder = NULL; ++ ++ return ret; ++} ++ ++static const struct of_device_id rpi_axiperf_match[] = { ++ { ++ .compatible = "brcm,bcm2835-axiperf", ++ }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, rpi_axiperf_match); ++ ++static struct platform_driver rpi_axiperf_driver = { ++ .probe = rpi_axiperf_probe, ++ .remove = rpi_axiperf_remove, ++ .driver = { ++ .name = "rpi-bcm2835-axiperf", ++ .of_match_table = of_match_ptr(rpi_axiperf_match), ++ }, ++}; ++ ++module_platform_driver(rpi_axiperf_driver); ++ ++/* Module information */ ++MODULE_AUTHOR("James Hughes "); ++MODULE_DESCRIPTION("RPI AXI Performance monitor driver"); ++MODULE_LICENSE("GPL"); ++ diff --git a/target/linux/brcm2708/patches-4.19/950-0104-mcp2515-Use-DT-supplied-interrupt-flags.patch b/target/linux/brcm2708/patches-4.19/950-0104-mcp2515-Use-DT-supplied-interrupt-flags.patch new file mode 100644 index 000000000..14fe56797 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0104-mcp2515-Use-DT-supplied-interrupt-flags.patch @@ -0,0 +1,36 @@ +From a3ba7e3519d3dce17a0224b552fb88b7728f7061 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 14 Nov 2017 11:03:22 +0000 +Subject: [PATCH 104/703] mcp2515: Use DT-supplied interrupt flags + +The MCP2515 datasheet clearly describes a level-triggered interrupt +pin. Therefore the receiving interrupt controller must also be +configured for level-triggered operation otherwise there is a danger +of a missed interrupt condition blocking all subsequent interrupts. +The ONESHOT flag ensures that the interrupt is masked until the +threaded interrupt handler exits. + +Rather than change the flags globally (they must have worked for at +least one user), allow the flags to be overridden from Device Tree +in the event that the device has a DT node. + +See: https://github.com/raspberrypi/linux/issues/2175 + https://github.com/raspberrypi/linux/issues/2263 + +Signed-off-by: Phil Elwell +--- + drivers/net/can/spi/mcp251x.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/net/can/spi/mcp251x.c ++++ b/drivers/net/can/spi/mcp251x.c +@@ -951,6 +951,9 @@ static int mcp251x_open(struct net_devic + priv->tx_skb = NULL; + priv->tx_len = 0; + ++ if (spi->dev.of_node) ++ flags = 0; ++ + ret = request_threaded_irq(spi->irq, NULL, mcp251x_can_ist, + flags | IRQF_ONESHOT, DEVICE_NAME, priv); + if (ret) { diff --git a/target/linux/brcm2708/patches-4.19/950-0105-Tidy-up-of-the-ft5406-driver-to-use-DT-2189.patch b/target/linux/brcm2708/patches-4.19/950-0105-Tidy-up-of-the-ft5406-driver-to-use-DT-2189.patch new file mode 100644 index 000000000..45ed143c8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0105-Tidy-up-of-the-ft5406-driver-to-use-DT-2189.patch @@ -0,0 +1,382 @@ +From c391ccaadd8928a79986e67ebc23cd6670b83d85 Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Thu, 16 Nov 2017 15:56:17 +0000 +Subject: [PATCH 105/703] Tidy up of the ft5406 driver to use DT (#2189) + +Driver was using a fixed resolution, this commit +adds touchscreen size, and coordinate flip and swap +features via device tree overlays. + +Adds overrides so the VC4 can adjust the DT parameters +appropriately; there is a newer version of the VC4 side +driver that can now set up the appropriate DT values +if required. + +Signed-off-by: James Hughes +--- + drivers/input/touchscreen/rpi-ft5406.c | 218 ++++++++++++++++--------- + 1 file changed, 145 insertions(+), 73 deletions(-) + +--- a/drivers/input/touchscreen/rpi-ft5406.c ++++ b/drivers/input/touchscreen/rpi-ft5406.c +@@ -1,7 +1,7 @@ + /* + * Driver for memory based ft5406 touchscreen + * +- * Copyright (C) 2015 Raspberry Pi ++ * Copyright (C) 2015, 2017 Raspberry Pi + * + * + * This program is free software; you can redistribute it and/or modify +@@ -9,7 +9,6 @@ + * published by the Free Software Foundation. + */ + +- + #include + #include + #include +@@ -21,11 +20,15 @@ + #include + #include + #include +-#include ++#include + #include + #include + + #define MAXIMUM_SUPPORTED_POINTS 10 ++#define FTS_TOUCH_DOWN 0 ++#define FTS_TOUCH_UP 1 ++#define FTS_TOUCH_CONTACT 2 ++ + struct ft5406_regs { + uint8_t device_mode; + uint8_t gesture_id; +@@ -35,85 +38,125 @@ struct ft5406_regs { + uint8_t xl; + uint8_t yh; + uint8_t yl; +- uint8_t res1; +- uint8_t res2; ++ uint8_t pressure; /* Not supported */ ++ uint8_t area; /* Not supported */ + } point[MAXIMUM_SUPPORTED_POINTS]; + }; + +-#define SCREEN_WIDTH 800 +-#define SCREEN_HEIGHT 480 ++/* These are defaults if the DT entries are missing */ ++#define DEFAULT_SCREEN_WIDTH 800 ++#define DEFAULT_SCREEN_HEIGHT 480 + + struct ft5406 { +- struct platform_device * pdev; +- struct input_dev * input_dev; +- void __iomem * ts_base; +- dma_addr_t bus_addr; +- struct task_struct * thread; ++ struct platform_device *pdev; ++ struct input_dev *input_dev; ++ void __iomem *ts_base; ++ dma_addr_t bus_addr; ++ struct task_struct *thread; ++ ++ uint16_t max_x; ++ uint16_t max_y; ++ uint8_t hflip; ++ uint8_t vflip; ++ uint8_t xyswap; + }; + + /* Thread to poll for touchscreen events +- * ++ * + * This thread polls the memory based register copy of the ft5406 registers + * using the number of points register to know whether the copy has been +- * updated (we write 99 to the memory copy, the GPU will write between ++ * updated (we write 99 to the memory copy, the GPU will write between + * 0 - 10 points) + */ ++#define ID_TO_BIT(a) (1 << a) ++ + static int ft5406_thread(void *arg) + { + struct ft5406 *ts = (struct ft5406 *) arg; + struct ft5406_regs regs; + int known_ids = 0; +- +- while(!kthread_should_stop()) +- { +- // 60fps polling ++ ++ while (!kthread_should_stop()) { ++ /* 60fps polling */ + msleep_interruptible(17); + memcpy_fromio(®s, ts->ts_base, sizeof(struct ft5406_regs)); +- iowrite8(99, ts->ts_base + offsetof(struct ft5406_regs, num_points)); +- // Do not output if theres no new information (num_points is 99) +- // or we have no touch points and don't need to release any +- if(!(regs.num_points == 99 || (regs.num_points == 0 && known_ids == 0))) +- { ++ iowrite8(99, ++ ts->ts_base + ++ offsetof(struct ft5406_regs, num_points)); ++ ++ /* ++ * Do not output if theres no new information (num_points is 99) ++ * or we have no touch points and don't need to release any ++ */ ++ if (!(regs.num_points == 99 || ++ (regs.num_points == 0 && known_ids == 0))) { + int i; + int modified_ids = 0, released_ids; +- for(i = 0; i < regs.num_points; i++) +- { +- int x = (((int) regs.point[i].xh & 0xf) << 8) + regs.point[i].xl; +- int y = (((int) regs.point[i].yh & 0xf) << 8) + regs.point[i].yl; +- int touchid = (regs.point[i].yh >> 4) & 0xf; +- +- modified_ids |= 1 << touchid; + +- if(!((1 << touchid) & known_ids)) +- dev_dbg(&ts->pdev->dev, "x = %d, y = %d, touchid = %d\n", x, y, touchid); +- +- input_mt_slot(ts->input_dev, touchid); +- input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, 1); ++ for (i = 0; i < regs.num_points; i++) { ++ int x = (((int) regs.point[i].xh & 0xf) << 8) + ++ regs.point[i].xl; ++ int y = (((int) regs.point[i].yh & 0xf) << 8) + ++ regs.point[i].yl; ++ int touchid = (regs.point[i].yh >> 4) & 0xf; ++ int event_type = (regs.point[i].xh >> 6) & 0x03; + +- input_report_abs(ts->input_dev, ABS_MT_POSITION_X, x); +- input_report_abs(ts->input_dev, ABS_MT_POSITION_Y, y); ++ modified_ids |= ID_TO_BIT(touchid); + ++ if (event_type == FTS_TOUCH_DOWN || ++ event_type == FTS_TOUCH_CONTACT) { ++ if (ts->hflip) ++ x = ts->max_x - 1 - x; ++ ++ if (ts->vflip) ++ y = ts->max_y - 1 - y; ++ ++ if (ts->xyswap) ++ swap(x, y); ++ ++ if (!((ID_TO_BIT(touchid)) & known_ids)) ++ dev_dbg(&ts->pdev->dev, ++ "x = %d, y = %d, press = %d, touchid = %d\n", ++ x, y, ++ regs.point[i].pressure, ++ touchid); ++ ++ input_mt_slot(ts->input_dev, touchid); ++ input_mt_report_slot_state( ++ ts->input_dev, ++ MT_TOOL_FINGER, ++ 1); ++ ++ input_report_abs(ts->input_dev, ++ ABS_MT_POSITION_X, x); ++ input_report_abs(ts->input_dev, ++ ABS_MT_POSITION_Y, y); ++ } + } + + released_ids = known_ids & ~modified_ids; +- for(i = 0; released_ids && i < MAXIMUM_SUPPORTED_POINTS; i++) +- { +- if(released_ids & (1<pdev->dev, "Released %d, known = %x modified = %x\n", i, known_ids, modified_ids); ++ for (i = 0; ++ released_ids && i < MAXIMUM_SUPPORTED_POINTS; ++ i++) { ++ if (released_ids & (1<pdev->dev, ++ "Released %d, known = %x, modified = %x\n", ++ i, known_ids, modified_ids); + input_mt_slot(ts->input_dev, i); +- input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, 0); +- modified_ids &= ~(1 << i); ++ input_mt_report_slot_state( ++ ts->input_dev, ++ MT_TOOL_FINGER, ++ 0); ++ modified_ids &= ~(ID_TO_BIT(i)); + } + } + known_ids = modified_ids; +- ++ + input_mt_report_pointer_emulation(ts->input_dev, true); + input_sync(ts->input_dev); + } +- + } +- ++ + return 0; + } + +@@ -122,13 +165,14 @@ static int ft5406_probe(struct platform_ + int err = 0; + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; +- struct ft5406 * ts; ++ struct ft5406 *ts; + struct device_node *fw_node; + struct rpi_firmware *fw; + u32 touchbuf; +- ++ u32 val; ++ + dev_info(dev, "Probing device\n"); +- ++ + fw_node = of_parse_phandle(np, "firmware", 0); + if (!fw_node) { + dev_err(dev, "Missing firmware node\n"); +@@ -151,7 +195,8 @@ static int ft5406_probe(struct platform_ + return -ENOMEM; + } + +- ts->ts_base = dma_zalloc_coherent(dev, PAGE_SIZE, &ts->bus_addr, GFP_KERNEL); ++ ts->ts_base = dma_zalloc_coherent(dev, PAGE_SIZE, &ts->bus_addr, ++ GFP_KERNEL); + if (!ts->ts_base) { + pr_err("[%s]: failed to dma_alloc_coherent(%ld)\n", + __func__, PAGE_SIZE); +@@ -164,17 +209,22 @@ static int ft5406_probe(struct platform_ + &touchbuf, sizeof(touchbuf)); + + if (err || touchbuf != 0) { +- dev_warn(dev, "Failed to set touchbuf, trying to get err:%x\n", err); ++ dev_warn(dev, "Failed to set touchbuf, trying to get err:%x\n", ++ err); + dma_free_coherent(dev, PAGE_SIZE, ts->ts_base, ts->bus_addr); + ts->ts_base = 0; + ts->bus_addr = 0; + } + + if (!ts->ts_base) { +- dev_warn(dev, "set failed, trying get (err:%d touchbuf:%x virt:%p bus:%x)\n", err, touchbuf, ts->ts_base, ts->bus_addr); +- +- err = rpi_firmware_property(fw, RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF, +- &touchbuf, sizeof(touchbuf)); ++ dev_warn(dev, ++ "set failed, trying get (err:%d touchbuf:%x virt:%p bus:%x)\n", ++ err, touchbuf, ts->ts_base, ts->bus_addr); ++ ++ err = rpi_firmware_property( ++ fw, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF, ++ &touchbuf, sizeof(touchbuf)); + if (err) { + dev_err(dev, "Failed to get touch buffer\n"); + goto out; +@@ -188,11 +238,10 @@ static int ft5406_probe(struct platform_ + + dev_dbg(dev, "Got TS buffer 0x%x\n", touchbuf); + +- // mmap the physical memory ++ /* mmap the physical memory */ + touchbuf &= ~0xc0000000; + ts->ts_base = ioremap(touchbuf, sizeof(struct ft5406_regs)); +- if (ts->ts_base == NULL) +- { ++ if (ts->ts_base == NULL) { + dev_err(dev, "Failed to map physical address\n"); + err = -ENOMEM; + goto out; +@@ -200,22 +249,46 @@ static int ft5406_probe(struct platform_ + } + platform_set_drvdata(pdev, ts); + ts->pdev = pdev; +- ++ + ts->input_dev->name = "FT5406 memory based driver"; +- ++ ++ if (of_property_read_u32(np, "touchscreen-size-x", &val) >= 0) ++ ts->max_x = val; ++ else ++ ts->max_x = DEFAULT_SCREEN_WIDTH; ++ ++ if (of_property_read_u32(np, "touchscreen-size-y", &val) >= 0) ++ ts->max_y = val; ++ else ++ ts->max_y = DEFAULT_SCREEN_HEIGHT; ++ ++ if (of_property_read_u32(np, "touchscreen-inverted-x", &val) >= 0) ++ ts->hflip = val; ++ ++ if (of_property_read_u32(np, "touchscreen-inverted-y", &val) >= 0) ++ ts->vflip = val; ++ ++ if (of_property_read_u32(np, "touchscreen-swapped-x-y", &val) >= 0) ++ ts->xyswap = val; ++ ++ dev_dbg(dev, ++ "Touchscreen parameters (%d,%d), hflip=%d, vflip=%d, xyswap=%d", ++ ts->max_x, ts->max_y, ts->hflip, ts->vflip, ts->xyswap); ++ + __set_bit(EV_KEY, ts->input_dev->evbit); + __set_bit(EV_SYN, ts->input_dev->evbit); + __set_bit(EV_ABS, ts->input_dev->evbit); + + input_set_abs_params(ts->input_dev, ABS_MT_POSITION_X, 0, +- SCREEN_WIDTH, 0, 0); ++ ts->xyswap ? ts->max_y : ts->max_x, 0, 0); + input_set_abs_params(ts->input_dev, ABS_MT_POSITION_Y, 0, +- SCREEN_HEIGHT, 0, 0); ++ ts->xyswap ? ts->max_x : ts->max_y, 0, 0); + +- input_mt_init_slots(ts->input_dev, MAXIMUM_SUPPORTED_POINTS, INPUT_MT_DIRECT); ++ input_mt_init_slots(ts->input_dev, ++ MAXIMUM_SUPPORTED_POINTS, INPUT_MT_DIRECT); + + input_set_drvdata(ts->input_dev, ts); +- ++ + err = input_register_device(ts->input_dev); + if (err) { + dev_err(dev, "could not register input device, %d\n", +@@ -223,10 +296,9 @@ static int ft5406_probe(struct platform_ + goto out; + } + +- // create thread to poll the touch events ++ /* create thread that polls the touch events */ + ts->thread = kthread_run(ft5406_thread, ts, "ft5406"); +- if(ts->thread == NULL) +- { ++ if (ts->thread == NULL) { + dev_err(dev, "Failed to create kernel thread"); + err = -ENOMEM; + goto out; +@@ -254,9 +326,9 @@ static int ft5406_remove(struct platform + { + struct device *dev = &pdev->dev; + struct ft5406 *ts = (struct ft5406 *) platform_get_drvdata(pdev); +- ++ + dev_info(dev, "Removing rpi-ft5406\n"); +- ++ + kthread_stop(ts->thread); + + if (ts->bus_addr) +@@ -265,7 +337,7 @@ static int ft5406_remove(struct platform + iounmap(ts->ts_base); + if (ts->input_dev) + input_unregister_device(ts->input_dev); +- ++ + return 0; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0106-cgroup-Disable-cgroup-memory-by-default.patch b/target/linux/brcm2708/patches-4.19/950-0106-cgroup-Disable-cgroup-memory-by-default.patch new file mode 100644 index 000000000..6bb72a24f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0106-cgroup-Disable-cgroup-memory-by-default.patch @@ -0,0 +1,70 @@ +From db9b15f3d930b045998c276c68f32645f7bade9f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 27 Nov 2017 17:14:54 +0000 +Subject: [PATCH 106/703] cgroup: Disable cgroup "memory" by default + +Some Raspberry Pis have limited RAM and most users won't use the +cgroup memory support so it is disabled by default. Enable with: + + cgroup_enable=memory + +See: https://github.com/raspberrypi/linux/issues/1950 + +Signed-off-by: Phil Elwell +--- + kernel/cgroup/cgroup.c | 30 ++++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +--- a/kernel/cgroup/cgroup.c ++++ b/kernel/cgroup/cgroup.c +@@ -5296,6 +5296,8 @@ int __init cgroup_init_early(void) + } + + static u16 cgroup_disable_mask __initdata; ++static u16 cgroup_enable_mask __initdata; ++static int __init cgroup_disable(char *str); + + /** + * cgroup_init - cgroup initialization +@@ -5336,6 +5338,12 @@ int __init cgroup_init(void) + + mutex_unlock(&cgroup_mutex); + ++ /* Apply an implicit disable... */ ++ cgroup_disable("memory"); ++ ++ /* ...knowing that an explicit enable will override it. */ ++ cgroup_disable_mask &= ~cgroup_enable_mask; ++ + for_each_subsys(ss, ssid) { + if (ss->early_init) { + struct cgroup_subsys_state *css = +@@ -5719,6 +5727,28 @@ static int __init cgroup_disable(char *s + } + __setup("cgroup_disable=", cgroup_disable); + ++static int __init cgroup_enable(char *str) ++{ ++ struct cgroup_subsys *ss; ++ char *token; ++ int i; ++ ++ while ((token = strsep(&str, ",")) != NULL) { ++ if (!*token) ++ continue; ++ ++ for_each_subsys(ss, i) { ++ if (strcmp(token, ss->name) && ++ strcmp(token, ss->legacy_name)) ++ continue; ++ ++ cgroup_enable_mask |= 1 << i; ++ } ++ } ++ return 1; ++} ++__setup("cgroup_enable=", cgroup_enable); ++ + /** + * css_tryget_online_from_dir - get corresponding css from a cgroup dentry + * @dentry: directory dentry of interest diff --git a/target/linux/brcm2708/patches-4.9/950-0018-ARM-bcm2835-Set-Serial-number-and-Revision.patch b/target/linux/brcm2708/patches-4.19/950-0107-ARM-bcm2835-Set-Serial-number-and-Revision.patch similarity index 68% rename from target/linux/brcm2708/patches-4.9/950-0018-ARM-bcm2835-Set-Serial-number-and-Revision.patch rename to target/linux/brcm2708/patches-4.19/950-0107-ARM-bcm2835-Set-Serial-number-and-Revision.patch index cd14dcc18..0593d7a9a 100644 --- a/target/linux/brcm2708/patches-4.9/950-0018-ARM-bcm2835-Set-Serial-number-and-Revision.patch +++ b/target/linux/brcm2708/patches-4.19/950-0107-ARM-bcm2835-Set-Serial-number-and-Revision.patch @@ -1,7 +1,7 @@ -From 78678f8e9f7fbbafadfecd54a5fb166a94d8d84f Mon Sep 17 00:00:00 2001 +From 6ddffcf9c288513943680b958307b3bb267ea939 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Wed, 3 Jun 2015 12:26:13 +0200 -Subject: [PATCH] ARM: bcm2835: Set Serial number and Revision +Subject: [PATCH 107/703] ARM: bcm2835: Set Serial number and Revision MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -22,32 +22,42 @@ didn't get in: Signed-off-by: Noralf Trønnes --- - arch/arm/mach-bcm/board_bcm2835.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) + arch/arm/mach-bcm/board_bcm2835.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) --- a/arch/arm/mach-bcm/board_bcm2835.c +++ b/arch/arm/mach-bcm/board_bcm2835.c -@@ -16,13 +16,23 @@ +@@ -15,12 +15,25 @@ + #include #include #include - #include +#include #include #include - static void __init bcm2835_init(void) - { + #include "platsmp.h" + ++static void __init bcm2835_init(void) ++{ + struct device_node *np = of_find_node_by_path("/system"); + u32 val; + u64 val64; -+ - bcm2835_init_clocks(); + + if (!of_property_read_u32(np, "linux,revision", &val)) + system_rev = val; + if (!of_property_read_u64(np, "linux,serial", &val64)) + system_serial_low = val64; - } - ++} ++ static const char * const bcm2835_compat[] = { + #ifdef CONFIG_ARCH_MULTI_V6 + "brcm,bcm2835", +@@ -33,6 +46,7 @@ static const char * const bcm2835_compat + }; + + DT_MACHINE_START(BCM2835, "BCM2835") ++ .init_machine = bcm2835_init, + .dt_compat = bcm2835_compat, + .smp = smp_ops(bcm2836_smp_ops), + MACHINE_END diff --git a/target/linux/brcm2708/patches-4.19/950-0108-ARM-Activate-FIQs-to-avoid-__irq_startup-warnings.patch b/target/linux/brcm2708/patches-4.19/950-0108-ARM-Activate-FIQs-to-avoid-__irq_startup-warnings.patch new file mode 100644 index 000000000..cedc6bdf3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0108-ARM-Activate-FIQs-to-avoid-__irq_startup-warnings.patch @@ -0,0 +1,36 @@ +From 84ae50c70c296998d39b819d1d5f3e2e4a355098 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 11 Dec 2017 09:18:32 +0000 +Subject: [PATCH 108/703] ARM: Activate FIQs to avoid __irq_startup warnings + +There is a new test in __irq_startup that the IRQ is activated, which +hasn't been the case for FIQs since they bypass some of the usual setup. + +Augment enable_fiq to include a call to irq_activate to avoid the +warning. + +Signed-off-by: Phil Elwell +--- + arch/arm/kernel/fiq.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/kernel/fiq.c ++++ b/arch/arm/kernel/fiq.c +@@ -56,6 +56,8 @@ + static unsigned long dfl_fiq_insn; + static struct pt_regs dfl_fiq_regs; + ++extern int irq_activate(struct irq_desc *desc); ++ + /* Default reacquire function + * - we always relinquish FIQ control + * - we always reacquire FIQ control +@@ -140,6 +142,8 @@ static int fiq_start; + + void enable_fiq(int fiq) + { ++ struct irq_desc *desc = irq_to_desc(fiq + fiq_start); ++ irq_activate(desc); + enable_irq(fiq + fiq_start); + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0109-serial-8250-bcm2835aux-suppress-EPROBE_DEFER.patch b/target/linux/brcm2708/patches-4.19/950-0109-serial-8250-bcm2835aux-suppress-EPROBE_DEFER.patch new file mode 100644 index 000000000..b3102c2ff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0109-serial-8250-bcm2835aux-suppress-EPROBE_DEFER.patch @@ -0,0 +1,22 @@ +From 2f7074d8ae9b0867535fcfc56b4332073aee07f7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 22 Jan 2018 17:26:38 +0000 +Subject: [PATCH 109/703] serial: 8250: bcm2835aux - suppress EPROBE_DEFER + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/8250/8250_bcm2835aux.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/tty/serial/8250/8250_bcm2835aux.c ++++ b/drivers/tty/serial/8250/8250_bcm2835aux.c +@@ -50,7 +50,8 @@ static int bcm2835aux_serial_probe(struc + data->clk = devm_clk_get(&pdev->dev, NULL); + ret = PTR_ERR_OR_ZERO(data->clk); + if (ret) { +- dev_err(&pdev->dev, "could not get clk: %d\n", ret); ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "could not get clk: %d\n", ret); + return ret; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0110-raspberrypi-firmware-Export-the-general-transaction-.patch b/target/linux/brcm2708/patches-4.19/950-0110-raspberrypi-firmware-Export-the-general-transaction-.patch new file mode 100644 index 000000000..70ec90da6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0110-raspberrypi-firmware-Export-the-general-transaction-.patch @@ -0,0 +1,32 @@ +From 48ce2d8a89c63f31a63b636b119a98c3ddbc66e1 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 14 Sep 2016 09:16:19 +0100 +Subject: [PATCH 110/703] raspberrypi-firmware: Export the general transaction + function. + +The vc4-firmware-kms module is going to be doing the MBOX FB call. + +Signed-off-by: Eric Anholt +--- + drivers/firmware/raspberrypi.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -46,7 +46,7 @@ static void response_callback(struct mbo + * Sends a request to the firmware through the BCM2835 mailbox driver, + * and synchronously waits for the reply. + */ +-static int ++int + rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data) + { + u32 message = MBOX_MSG(chan, data); +@@ -67,6 +67,7 @@ rpi_firmware_transaction(struct rpi_firm + + return ret; + } ++EXPORT_SYMBOL_GPL(rpi_firmware_transaction); + + /** + * rpi_firmware_property_list - Submit firmware property list diff --git a/target/linux/brcm2708/patches-4.9/950-0105-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch b/target/linux/brcm2708/patches-4.19/950-0111-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch similarity index 92% rename from target/linux/brcm2708/patches-4.9/950-0105-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch rename to target/linux/brcm2708/patches-4.19/950-0111-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch index f95d5aab1..270864f4d 100644 --- a/target/linux/brcm2708/patches-4.9/950-0105-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch +++ b/target/linux/brcm2708/patches-4.19/950-0111-drm-vc4-Add-a-mode-for-using-the-closed-firmware-for.patch @@ -1,34 +1,34 @@ -From ffd9952ec22321af8e891aa4cf9d79d90c4b23b6 Mon Sep 17 00:00:00 2001 +From cf4d9b0e5f081408edf3340b3f46171f5b56dbff Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 14 Sep 2016 08:39:33 +0100 -Subject: [PATCH] drm/vc4: Add a mode for using the closed firmware for +Subject: [PATCH 111/703] drm/vc4: Add a mode for using the closed firmware for display. Signed-off-by: Eric Anholt --- drivers/gpu/drm/vc4/Makefile | 1 + - drivers/gpu/drm/vc4/vc4_crtc.c | 13 + + drivers/gpu/drm/vc4/vc4_crtc.c | 17 + drivers/gpu/drm/vc4/vc4_drv.c | 1 + drivers/gpu/drm/vc4/vc4_drv.h | 7 + - drivers/gpu/drm/vc4/vc4_firmware_kms.c | 660 +++++++++++++++++++++++++++++++++ + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 656 +++++++++++++++++++++++++ 5 files changed, 682 insertions(+) create mode 100644 drivers/gpu/drm/vc4/vc4_firmware_kms.c --- a/drivers/gpu/drm/vc4/Makefile +++ b/drivers/gpu/drm/vc4/Makefile -@@ -8,6 +8,7 @@ vc4-y := \ - vc4_crtc.o \ - vc4_drv.o \ +@@ -9,6 +9,7 @@ vc4-y := \ vc4_dpi.o \ + vc4_dsi.o \ + vc4_fence.o \ + vc4_firmware_kms.o \ vc4_kms.o \ vc4_gem.o \ vc4_hdmi.o \ --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -162,6 +162,9 @@ int vc4_crtc_get_scanoutpos(struct drm_d +@@ -133,6 +133,9 @@ bool vc4_crtc_get_scanoutpos(struct drm_ int vblank_lines; - int ret = 0; + bool ret = false; + if (vc4->firmware_kms) + return 0; @@ -36,9 +36,13 @@ Signed-off-by: Eric Anholt /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ /* Get optional system timestamp before query. */ -@@ -655,6 +658,11 @@ int vc4_enable_vblank(struct drm_device - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id]; +@@ -761,8 +764,15 @@ static void vc4_crtc_atomic_flush(struct + + static int vc4_enable_vblank(struct drm_crtc *crtc) + { ++ struct drm_device *dev = crtc->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + if (vc4->firmware_kms) { + /* XXX: Can we mask the SMI interrupt? */ @@ -48,9 +52,13 @@ Signed-off-by: Eric Anholt CRTC_WRITE(PV_INTEN, PV_INT_VFP_START); return 0; -@@ -665,6 +673,11 @@ void vc4_disable_vblank(struct drm_devic - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct vc4_crtc *vc4_crtc = vc4->crtc[crtc_id]; +@@ -770,8 +780,15 @@ static int vc4_enable_vblank(struct drm_ + + static void vc4_disable_vblank(struct drm_crtc *crtc) + { ++ struct drm_device *dev = crtc->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + if (vc4->firmware_kms) { + /* XXX: Can we mask the SMI interrupt? */ @@ -62,8 +70,8 @@ Signed-off-by: Eric Anholt --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -295,6 +295,7 @@ static struct platform_driver *const com - &vc4_dpi_driver, +@@ -347,6 +347,7 @@ static struct platform_driver *const com + &vc4_txp_driver, &vc4_hvs_driver, &vc4_crtc_driver, + &vc4_firmware_kms_driver, @@ -72,7 +80,7 @@ Signed-off-by: Eric Anholt --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -12,6 +12,9 @@ +@@ -67,6 +67,9 @@ struct vc4_perfmon { struct vc4_dev { struct drm_device *dev; @@ -81,10 +89,10 @@ Signed-off-by: Eric Anholt + struct vc4_hdmi *hdmi; struct vc4_hvs *hvs; - struct vc4_crtc *crtc[3]; -@@ -462,6 +465,10 @@ void __iomem *vc4_ioremap_regs(struct pl - extern struct platform_driver vc4_dpi_driver; - int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused); + struct vc4_v3d *v3d; +@@ -719,6 +722,10 @@ int vc4_dsi_debugfs_regs(struct seq_file + /* vc4_fence.c */ + extern const struct dma_fence_ops vc4_fence_ops; +/* vc4_firmware_kms.c */ +extern struct platform_driver vc4_firmware_kms_driver; @@ -95,7 +103,7 @@ Signed-off-by: Eric Anholt void vc4_gem_destroy(struct drm_device *dev); --- /dev/null +++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c -@@ -0,0 +1,660 @@ +@@ -0,0 +1,656 @@ +/* + * Copyright (C) 2016 Broadcom + * @@ -112,13 +120,12 @@ Signed-off-by: Eric Anholt + * Pi's firmware display stack. + */ + -+#include "drm_atomic.h" -+#include "drm_atomic_helper.h" -+#include "drm_plane_helper.h" -+#include "drm_crtc_helper.h" ++#include "drm/drm_atomic_helper.h" ++#include "drm/drm_plane_helper.h" ++#include "drm/drm_crtc_helper.h" +#include "linux/clk.h" +#include "linux/debugfs.h" -+#include "drm_fb_cma_helper.h" ++#include "drm/drm_fb_cma_helper.h" +#include "linux/component.h" +#include "linux/of_device.h" +#include "vc4_drv.h" @@ -274,7 +281,6 @@ Signed-off-by: Eric Anholt + bo->paddr + fb->offsets[0], + 0, 0, /* hotx, hoty */}; + WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4); -+ WARN_ON_ONCE(fb->bits_per_pixel != 32); + + ret = rpi_firmware_property(vc4->firmware, + RPI_FIRMWARE_SET_CURSOR_STATE, @@ -364,7 +370,7 @@ Signed-off-by: Eric Anholt + plane = &vc4_plane->base; + ret = drm_universal_plane_init(dev, plane, 0xff, + &vc4_plane_funcs, -+ primary ? &xrgb8888 : &argb8888, 1, ++ primary ? &xrgb8888 : &argb8888, 1, NULL, + type, NULL); + + if (type == DRM_PLANE_TYPE_PRIMARY) { @@ -393,11 +399,11 @@ Signed-off-by: Eric Anholt + /* Everyting is handled in the planes. */ +} + -+static void vc4_crtc_disable(struct drm_crtc *crtc) ++static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) +{ +} + -+static void vc4_crtc_enable(struct drm_crtc *crtc) ++static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) +{ +} + @@ -446,14 +452,14 @@ Signed-off-by: Eric Anholt +static int vc4_page_flip(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + struct drm_pending_vblank_event *event, -+ uint32_t flags) ++ uint32_t flags, struct drm_modeset_acquire_ctx *ctx) +{ + if (flags & DRM_MODE_PAGE_FLIP_ASYNC) { + DRM_ERROR("Async flips aren't allowed\n"); + return -EINVAL; + } + -+ return drm_atomic_helper_page_flip(crtc, fb, event, flags); ++ return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx); +} + +static const struct drm_crtc_funcs vc4_crtc_funcs = { @@ -470,8 +476,8 @@ Signed-off-by: Eric Anholt + +static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { + .mode_set_nofb = vc4_crtc_mode_set_nofb, -+ .disable = vc4_crtc_disable, -+ .enable = vc4_crtc_enable, ++ .atomic_disable = vc4_crtc_disable, ++ .atomic_enable = vc4_crtc_enable, + .atomic_check = vc4_crtc_atomic_check, + .atomic_flush = vc4_crtc_atomic_flush, +}; @@ -546,7 +552,6 @@ Signed-off-by: Eric Anholt +} + +static const struct drm_connector_funcs vc4_fkms_connector_funcs = { -+ .dpms = drm_atomic_helper_connector_dpms, + .detect = vc4_fkms_connector_detect, + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = vc4_fkms_connector_destroy, @@ -677,7 +682,6 @@ Signed-off-by: Eric Anholt + drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs); + primary_plane->crtc = crtc; + cursor_plane->crtc = crtc; -+ vc4->crtc[drm_crtc_index(crtc)] = vc4_crtc; + + vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL); + if (!vc4_encoder) diff --git a/target/linux/brcm2708/patches-4.9/950-0177-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch b/target/linux/brcm2708/patches-4.19/950-0112-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch similarity index 70% rename from target/linux/brcm2708/patches-4.9/950-0177-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch rename to target/linux/brcm2708/patches-4.19/950-0112-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch index 208ff58ef..ad596fc5e 100644 --- a/target/linux/brcm2708/patches-4.9/950-0177-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch +++ b/target/linux/brcm2708/patches-4.19/950-0112-drm-vc4-Name-the-primary-and-cursor-planes-in-fkms.patch @@ -1,7 +1,7 @@ -From 789e1599cc6589b2a5c05c0f0bcd57fdaeb1b474 Mon Sep 17 00:00:00 2001 +From 9d538f69eca5ed335235fe89ba56966fdf07334d Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 1 Feb 2017 17:09:18 -0800 -Subject: [PATCH] drm/vc4: Name the primary and cursor planes in fkms. +Subject: [PATCH 112/703] drm/vc4: Name the primary and cursor planes in fkms. This makes debugging nicer, compared to trying to remember what the IDs are. @@ -13,10 +13,10 @@ Signed-off-by: Eric Anholt --- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c +++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c -@@ -267,7 +267,7 @@ static struct drm_plane *vc4_fkms_plane_ +@@ -265,7 +265,7 @@ static struct drm_plane *vc4_fkms_plane_ ret = drm_universal_plane_init(dev, plane, 0xff, &vc4_plane_funcs, - primary ? &xrgb8888 : &argb8888, 1, + primary ? &xrgb8888 : &argb8888, 1, NULL, - type, NULL); + type, primary ? "primary" : "cursor"); diff --git a/target/linux/brcm2708/patches-4.9/950-0178-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch b/target/linux/brcm2708/patches-4.19/950-0113-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch similarity index 81% rename from target/linux/brcm2708/patches-4.9/950-0178-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch rename to target/linux/brcm2708/patches-4.19/950-0113-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch index f3f141097..c45a21a08 100644 --- a/target/linux/brcm2708/patches-4.9/950-0178-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch +++ b/target/linux/brcm2708/patches-4.19/950-0113-drm-vc4-Add-DRM_DEBUG_ATOMIC-for-the-insides-of-fkms.patch @@ -1,7 +1,8 @@ -From ac45ecdcbc38c6ec6b477980d0cd0760267f6057 Mon Sep 17 00:00:00 2001 +From 94f9a45df23146c709d7a08191e97ee31d6dd8e9 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 1 Feb 2017 17:10:09 -0800 -Subject: [PATCH] drm/vc4: Add DRM_DEBUG_ATOMIC for the insides of fkms. +Subject: [PATCH 113/703] drm/vc4: Add DRM_DEBUG_ATOMIC for the insides of + fkms. Trying to debug weston on fkms involved figuring out what calls I was making to the firmware. @@ -13,7 +14,7 @@ Signed-off-by: Eric Anholt --- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c +++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c -@@ -102,6 +102,11 @@ static int vc4_plane_set_primary_blank(s +@@ -101,6 +101,11 @@ static int vc4_plane_set_primary_blank(s struct vc4_dev *vc4 = to_vc4_dev(plane->dev); u32 packet = blank; @@ -25,7 +26,7 @@ Signed-off-by: Eric Anholt return rpi_firmware_property(vc4->firmware, RPI_FIRMWARE_FRAMEBUFFER_BLANK, &packet, sizeof(packet)); -@@ -149,6 +154,16 @@ static void vc4_primary_plane_atomic_upd +@@ -148,6 +153,16 @@ static void vc4_primary_plane_atomic_upd WARN_ON_ONCE(vc4_plane->pitch != fb->pitches[0]); } @@ -42,9 +43,9 @@ Signed-off-by: Eric Anholt ret = rpi_firmware_transaction(vc4->firmware, RPI_FIRMWARE_CHAN_FB, vc4_plane->fbinfo_bus_addr); -@@ -178,6 +193,15 @@ static void vc4_cursor_plane_atomic_upda +@@ -176,6 +191,15 @@ static void vc4_cursor_plane_atomic_upda + 0, 0, /* hotx, hoty */}; WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4); - WARN_ON_ONCE(fb->bits_per_pixel != 32); + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] update %dx%d cursor at %d,%d (0x%08x/%d)", + plane->base.id, plane->name, @@ -58,7 +59,7 @@ Signed-off-by: Eric Anholt ret = rpi_firmware_property(vc4->firmware, RPI_FIRMWARE_SET_CURSOR_STATE, &packet_state, -@@ -200,6 +224,8 @@ static void vc4_cursor_plane_atomic_disa +@@ -198,6 +222,8 @@ static void vc4_cursor_plane_atomic_disa u32 packet_state[] = { false, 0, 0, 0 }; int ret; diff --git a/target/linux/brcm2708/patches-4.9/950-0179-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch b/target/linux/brcm2708/patches-4.19/950-0114-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch similarity index 85% rename from target/linux/brcm2708/patches-4.9/950-0179-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch rename to target/linux/brcm2708/patches-4.19/950-0114-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch index 73fbf2bc9..50fcf11f0 100644 --- a/target/linux/brcm2708/patches-4.9/950-0179-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch +++ b/target/linux/brcm2708/patches-4.19/950-0114-drm-vc4-Fix-sending-of-page-flip-completion-events-i.patch @@ -1,8 +1,8 @@ -From bc93583742c7ba9c84462664d4c798ba43bef26f Mon Sep 17 00:00:00 2001 +From 96cfb9903f60e98d964c3547ac0cf5b920083c04 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 2 Feb 2017 09:42:18 -0800 -Subject: [PATCH] drm/vc4: Fix sending of page flip completion events in FKMS - mode. +Subject: [PATCH 114/703] drm/vc4: Fix sending of page flip completion events + in FKMS mode. In the rewrite of vc4_crtc.c for fkms, I dropped the part of the CRTC's atomic flush handler that moved the completion event from the @@ -18,7 +18,7 @@ Signed-off-by: Eric Anholt --- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c +++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c -@@ -338,6 +338,21 @@ static int vc4_crtc_atomic_check(struct +@@ -336,6 +336,21 @@ static int vc4_crtc_atomic_check(struct static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_state) { diff --git a/target/linux/brcm2708/patches-4.19/950-0115-drm-vc4-Add-support-for-setting-DPMS-in-firmwarekms.patch b/target/linux/brcm2708/patches-4.19/950-0115-drm-vc4-Add-support-for-setting-DPMS-in-firmwarekms.patch new file mode 100644 index 000000000..b2e8a8d73 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0115-drm-vc4-Add-support-for-setting-DPMS-in-firmwarekms.patch @@ -0,0 +1,103 @@ +From 9f05f9c3a564cedbb3c5f3dd0d5b95f247b63c71 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 6 Jul 2017 11:45:48 -0700 +Subject: [PATCH 115/703] drm/vc4: Add support for setting DPMS in firmwarekms. + +This ensures that the screen goes blank during DPMS (screensaver), +including the cursor. Planes don't necessarily get disabled during +CRTC disable, so we need to be careful to not leave them on or turn +them back on early. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 40 ++++++++++++++++++++++++-- + 1 file changed, 37 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -36,6 +36,8 @@ struct vc4_crtc { + struct drm_crtc base; + struct drm_encoder *encoder; + struct drm_connector *connector; ++ struct drm_plane *primary; ++ struct drm_plane *cursor; + void __iomem *regs; + + struct drm_pending_vblank_event *event; +@@ -123,8 +125,6 @@ static void vc4_primary_plane_atomic_upd + u32 bpp = 32; + int ret; + +- vc4_plane_set_primary_blank(plane, false); +- + fbinfo->xres = state->crtc_w; + fbinfo->yres = state->crtc_h; + fbinfo->xres_virtual = state->crtc_w; +@@ -168,6 +168,12 @@ static void vc4_primary_plane_atomic_upd + vc4_plane->fbinfo_bus_addr); + WARN_ON_ONCE(fbinfo->pitch != fb->pitches[0]); + WARN_ON_ONCE(fbinfo->base != bo->paddr + fb->offsets[0]); ++ ++ /* If the CRTC is on (or going to be on) and we're enabled, ++ * then unblank. Otherwise, stay blank until CRTC enable. ++ */ ++ if (state->crtc->state->active) ++ vc4_plane_set_primary_blank(plane, false); + } + + static void vc4_primary_plane_atomic_disable(struct drm_plane *plane, +@@ -184,7 +190,12 @@ static void vc4_cursor_plane_atomic_upda + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); + int ret; +- u32 packet_state[] = { true, state->crtc_x, state->crtc_y, 0 }; ++ u32 packet_state[] = { ++ state->crtc->state->active, ++ state->crtc_x, ++ state->crtc_y, ++ 0 ++ }; + u32 packet_info[] = { state->crtc_w, state->crtc_h, + 0, /* unused */ + bo->paddr + fb->offsets[0], +@@ -321,10 +332,30 @@ static void vc4_crtc_mode_set_nofb(struc + + static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ ++ /* Always turn the planes off on CRTC disable. In DRM, planes ++ * are enabled/disabled through the update/disable hooks ++ * above, and the CRTC enable/disable independently controls ++ * whether anything scans out at all, but the firmware doesn't ++ * give us a CRTC-level control for that. ++ */ ++ vc4_cursor_plane_atomic_disable(vc4_crtc->cursor, ++ vc4_crtc->cursor->state); ++ vc4_plane_set_primary_blank(vc4_crtc->primary, true); + } + + static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ ++ /* Unblank the planes (if they're supposed to be displayed). */ ++ if (vc4_crtc->primary->state->fb) ++ vc4_plane_set_primary_blank(vc4_crtc->primary, false); ++ if (vc4_crtc->cursor->state->fb) { ++ vc4_cursor_plane_atomic_update(vc4_crtc->cursor, ++ vc4_crtc->cursor->state); ++ } + } + + static int vc4_crtc_atomic_check(struct drm_crtc *crtc, +@@ -618,6 +649,9 @@ static int vc4_fkms_bind(struct device * + primary_plane->crtc = crtc; + cursor_plane->crtc = crtc; + ++ vc4_crtc->primary = primary_plane; ++ vc4_crtc->cursor = cursor_plane; ++ + vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL); + if (!vc4_encoder) + return -ENOMEM; diff --git a/target/linux/brcm2708/patches-4.19/950-0116-drm-vc4-Add-FB-modifier-support-to-firmwarekms.patch b/target/linux/brcm2708/patches-4.19/950-0116-drm-vc4-Add-FB-modifier-support-to-firmwarekms.patch new file mode 100644 index 000000000..28845940b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0116-drm-vc4-Add-FB-modifier-support-to-firmwarekms.patch @@ -0,0 +1,32 @@ +From ac5599d66654d69497945cb29e183824d9988e29 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 7 Jun 2017 14:39:49 -0700 +Subject: [PATCH 116/703] drm/vc4: Add FB modifier support to firmwarekms. + +Signed-off-by: Eric Anholt +(cherry picked from commit 11752d73488e08aaeb65fe8289a9c016acde26c2) +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -17,6 +17,7 @@ + #include "drm/drm_atomic_helper.h" + #include "drm/drm_plane_helper.h" + #include "drm/drm_crtc_helper.h" ++#include "drm/drm_fourcc.h" + #include "linux/clk.h" + #include "linux/debugfs.h" + #include "drm/drm_fb_cma_helper.h" +@@ -134,6 +135,10 @@ static void vc4_primary_plane_atomic_upd + fbinfo->yoffset = state->crtc_y; + fbinfo->base = bo->paddr + fb->offsets[0]; + fbinfo->pitch = fb->pitches[0]; ++ ++ if (fb->modifier == DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED) ++ fbinfo->bpp |= BIT(31); ++ + /* A bug in the firmware makes it so that if the fb->base is + * set to nonzero, the configured pitch gets overwritten with + * the previous pitch. So, to get the configured pitch diff --git a/target/linux/brcm2708/patches-4.19/950-0117-drm-vc4-Add-missing-enable-disable-vblank-handlers-i.patch b/target/linux/brcm2708/patches-4.19/950-0117-drm-vc4-Add-missing-enable-disable-vblank-handlers-i.patch new file mode 100644 index 000000000..a2bd18065 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0117-drm-vc4-Add-missing-enable-disable-vblank-handlers-i.patch @@ -0,0 +1,79 @@ +From 7815410d46ef8c5462eadbeff59d8c7e43639b03 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 30 Jan 2018 14:21:02 -0800 +Subject: [PATCH 117/703] drm/vc4: Add missing enable/disable vblank handlers + in fkms. + +Fixes hang at boot in 4.14. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 14 -------------- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 15 +++++++++++++++ + 2 files changed, 15 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -764,15 +764,8 @@ static void vc4_crtc_atomic_flush(struct + + static int vc4_enable_vblank(struct drm_crtc *crtc) + { +- struct drm_device *dev = crtc->dev; +- struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + +- if (vc4->firmware_kms) { +- /* XXX: Can we mask the SMI interrupt? */ +- return 0; +- } +- + CRTC_WRITE(PV_INTEN, PV_INT_VFP_START); + + return 0; +@@ -780,15 +773,8 @@ static int vc4_enable_vblank(struct drm_ + + static void vc4_disable_vblank(struct drm_crtc *crtc) + { +- struct drm_device *dev = crtc->dev; +- struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + +- if (vc4->firmware_kms) { +- /* XXX: Can we mask the SMI interrupt? */ +- return; +- } +- + CRTC_WRITE(PV_INTEN, 0); + } + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -433,6 +433,19 @@ static int vc4_page_flip(struct drm_crtc + return drm_atomic_helper_page_flip(crtc, fb, event, flags, ctx); + } + ++static int vc4_fkms_enable_vblank(struct drm_crtc *crtc) ++{ ++ /* XXX: Need a way to enable/disable the interrupt, to avoid ++ * DRM warnings at boot time. ++ */ ++ ++ return 0; ++} ++ ++static void vc4_fkms_disable_vblank(struct drm_crtc *crtc) ++{ ++} ++ + static const struct drm_crtc_funcs vc4_crtc_funcs = { + .set_config = drm_atomic_helper_set_config, + .destroy = drm_crtc_cleanup, +@@ -443,6 +456,8 @@ static const struct drm_crtc_funcs vc4_c + .reset = drm_atomic_helper_crtc_reset, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, ++ .enable_vblank = vc4_fkms_enable_vblank, ++ .disable_vblank = vc4_fkms_disable_vblank, + }; + + static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { diff --git a/target/linux/brcm2708/patches-4.19/950-0118-vc4_fkms-Apply-firmware-overscan-offset-to-hardware-.patch b/target/linux/brcm2708/patches-4.19/950-0118-vc4_fkms-Apply-firmware-overscan-offset-to-hardware-.patch new file mode 100644 index 000000000..7907d026e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0118-vc4_fkms-Apply-firmware-overscan-offset-to-hardware-.patch @@ -0,0 +1,57 @@ +From 7c7cf2b1b7ea7189b18eb042e6a04ca90e07e658 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 18 Apr 2017 21:43:46 +0100 +Subject: [PATCH 118/703] vc4_fkms: Apply firmware overscan offset to hardware + cursor + +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -42,6 +42,7 @@ struct vc4_crtc { + void __iomem *regs; + + struct drm_pending_vblank_event *event; ++ u32 overscan[4]; + }; + + static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc) +@@ -191,6 +192,7 @@ static void vc4_cursor_plane_atomic_upda + struct drm_plane_state *old_state) + { + struct vc4_dev *vc4 = to_vc4_dev(plane->dev); ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(plane->crtc); + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); +@@ -216,6 +218,12 @@ static void vc4_cursor_plane_atomic_upda + bo->paddr + fb->offsets[0], + fb->pitches[0]); + ++ /* add on the top/left offsets when overscan is active */ ++ if (vc4_crtc) { ++ packet_state[1] += vc4_crtc->overscan[0]; ++ packet_state[2] += vc4_crtc->overscan[1]; ++ } ++ + ret = rpi_firmware_property(vc4->firmware, + RPI_FIRMWARE_SET_CURSOR_STATE, + &packet_state, +@@ -695,6 +703,15 @@ static int vc4_fkms_bind(struct device * + if (ret) + goto err_destroy_connector; + ++ ret = rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN, ++ &vc4_crtc->overscan, ++ sizeof(vc4_crtc->overscan)); ++ if (ret) { ++ DRM_ERROR("Failed to get overscan state: 0x%08x\n", vc4_crtc->overscan[0]); ++ memset(&vc4_crtc->overscan, 0, sizeof(vc4_crtc->overscan)); ++ } ++ + platform_set_drvdata(pdev, vc4_crtc); + + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0119-drm-vc4-Fix-warning-about-vblank-interrupts-before-D.patch b/target/linux/brcm2708/patches-4.19/950-0119-drm-vc4-Fix-warning-about-vblank-interrupts-before-D.patch new file mode 100644 index 000000000..ec50f3bae --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0119-drm-vc4-Fix-warning-about-vblank-interrupts-before-D.patch @@ -0,0 +1,50 @@ +From b69ecf0b7259675e57be13836713946f1329f20c Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 5 Feb 2018 18:01:02 +0000 +Subject: [PATCH 119/703] drm/vc4: Fix warning about vblank interrupts before + DRM core is ready. + +The SMICS interrupt fires continuously, but since it's 1/100 the rate +of the USB interrupts, we don't really need a way to turn it off. We +do need to make sure that we don't tell DRM about it until DRM has +asked for the interrupt at least once, because otherwise it will throw +a warning at boot time. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -43,6 +43,7 @@ struct vc4_crtc { + + struct drm_pending_vblank_event *event; + u32 overscan[4]; ++ bool vblank_enabled; + }; + + static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc) +@@ -420,7 +421,8 @@ static irqreturn_t vc4_crtc_irq_handler( + + if (stat & SMICS_INTERRUPTS) { + writel(0, vc4_crtc->regs + SMICS); +- drm_crtc_handle_vblank(&vc4_crtc->base); ++ if (vc4_crtc->vblank_enabled) ++ drm_crtc_handle_vblank(&vc4_crtc->base); + vc4_crtc_handle_page_flip(vc4_crtc); + ret = IRQ_HANDLED; + } +@@ -443,9 +445,9 @@ static int vc4_page_flip(struct drm_crtc + + static int vc4_fkms_enable_vblank(struct drm_crtc *crtc) + { +- /* XXX: Need a way to enable/disable the interrupt, to avoid +- * DRM warnings at boot time. +- */ ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ ++ vc4_crtc->vblank_enabled = true; + + return 0; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0120-drm-vc4-Skip-SET_CURSOR_INFO-when-the-cursor-content.patch b/target/linux/brcm2708/patches-4.19/950-0120-drm-vc4-Skip-SET_CURSOR_INFO-when-the-cursor-content.patch new file mode 100644 index 000000000..3b734aa94 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0120-drm-vc4-Skip-SET_CURSOR_INFO-when-the-cursor-content.patch @@ -0,0 +1,57 @@ +From b77d51293dce1ff08da64c4bb95c13d2cb4c3ee7 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 5 Feb 2018 18:02:30 +0000 +Subject: [PATCH 120/703] drm/vc4: Skip SET_CURSOR_INFO when the cursor + contents didn't change. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 30 +++++++++++++++++--------- + 1 file changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -204,10 +204,6 @@ static void vc4_cursor_plane_atomic_upda + state->crtc_y, + 0 + }; +- u32 packet_info[] = { state->crtc_w, state->crtc_h, +- 0, /* unused */ +- bo->paddr + fb->offsets[0], +- 0, 0, /* hotx, hoty */}; + WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4); + + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] update %dx%d cursor at %d,%d (0x%08x/%d)", +@@ -232,12 +228,26 @@ static void vc4_cursor_plane_atomic_upda + if (ret || packet_state[0] != 0) + DRM_ERROR("Failed to set cursor state: 0x%08x\n", packet_state[0]); + +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_SET_CURSOR_INFO, +- &packet_info, +- sizeof(packet_info)); +- if (ret || packet_info[0] != 0) +- DRM_ERROR("Failed to set cursor info: 0x%08x\n", packet_info[0]); ++ /* Note: When the cursor contents change, the modesetting ++ * driver calls drm_mode_cursor_univeral() with ++ * DRM_MODE_CURSOR_BO, which means a new fb will be allocated. ++ */ ++ if (!old_state || ++ state->crtc_w != old_state->crtc_w || ++ state->crtc_h != old_state->crtc_h || ++ fb != old_state->fb) { ++ u32 packet_info[] = { state->crtc_w, state->crtc_h, ++ 0, /* unused */ ++ bo->paddr + fb->offsets[0], ++ 0, 0, /* hotx, hoty */}; ++ ++ ret = rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_SET_CURSOR_INFO, ++ &packet_info, ++ sizeof(packet_info)); ++ if (ret || packet_info[0] != 0) ++ DRM_ERROR("Failed to set cursor info: 0x%08x\n", packet_info[0]); ++ } + } + + static void vc4_cursor_plane_atomic_disable(struct drm_plane *plane, diff --git a/target/linux/brcm2708/patches-4.19/950-0121-drm-vc4-Remove-duplicate-primary-cursor-fields-from-.patch b/target/linux/brcm2708/patches-4.19/950-0121-drm-vc4-Remove-duplicate-primary-cursor-fields-from-.patch new file mode 100644 index 000000000..f84a42e4b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0121-drm-vc4-Remove-duplicate-primary-cursor-fields-from-.patch @@ -0,0 +1,71 @@ +From be3a851fe4c6f2e91a7d7b0738ad1873074eab43 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 5 Feb 2018 18:22:03 +0000 +Subject: [PATCH 121/703] drm/vc4: Remove duplicate primary/cursor fields from + FKMS driver. + +The CRTC has those fields and we can just use them. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 24 +++++++----------------- + 1 file changed, 7 insertions(+), 17 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -37,8 +37,6 @@ struct vc4_crtc { + struct drm_crtc base; + struct drm_encoder *encoder; + struct drm_connector *connector; +- struct drm_plane *primary; +- struct drm_plane *cursor; + void __iomem *regs; + + struct drm_pending_vblank_event *event; +@@ -356,29 +354,24 @@ static void vc4_crtc_mode_set_nofb(struc + + static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); +- + /* Always turn the planes off on CRTC disable. In DRM, planes + * are enabled/disabled through the update/disable hooks + * above, and the CRTC enable/disable independently controls + * whether anything scans out at all, but the firmware doesn't + * give us a CRTC-level control for that. + */ +- vc4_cursor_plane_atomic_disable(vc4_crtc->cursor, +- vc4_crtc->cursor->state); +- vc4_plane_set_primary_blank(vc4_crtc->primary, true); ++ vc4_cursor_plane_atomic_disable(crtc->cursor, crtc->cursor->state); ++ vc4_plane_set_primary_blank(crtc->primary, true); + } + + static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); +- + /* Unblank the planes (if they're supposed to be displayed). */ +- if (vc4_crtc->primary->state->fb) +- vc4_plane_set_primary_blank(vc4_crtc->primary, false); +- if (vc4_crtc->cursor->state->fb) { +- vc4_cursor_plane_atomic_update(vc4_crtc->cursor, +- vc4_crtc->cursor->state); ++ if (crtc->primary->state->fb) ++ vc4_plane_set_primary_blank(crtc->primary, false); ++ if (crtc->cursor->state->fb) { ++ vc4_cursor_plane_atomic_update(crtc->cursor, ++ crtc->cursor->state); + } + } + +@@ -689,9 +682,6 @@ static int vc4_fkms_bind(struct device * + primary_plane->crtc = crtc; + cursor_plane->crtc = crtc; + +- vc4_crtc->primary = primary_plane; +- vc4_crtc->cursor = cursor_plane; +- + vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL); + if (!vc4_encoder) + return -ENOMEM; diff --git a/target/linux/brcm2708/patches-4.19/950-0122-vc4_firmware_kms-fix-build.patch b/target/linux/brcm2708/patches-4.19/950-0122-vc4_firmware_kms-fix-build.patch new file mode 100644 index 000000000..3fe27d275 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0122-vc4_firmware_kms-fix-build.patch @@ -0,0 +1,38 @@ +From 0f628b54b7f10997437a0e3f34eea2a0b2827250 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Sun, 17 Jun 2018 13:22:07 +0100 +Subject: [PATCH 122/703] vc4_firmware_kms: fix build + +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -33,6 +33,8 @@ + #define SMICS 0x0 + #define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11)) + ++#define vc4_crtc vc4_kms_crtc ++#define to_vc4_crtc to_vc4_kms_crtc + struct vc4_crtc { + struct drm_crtc base; + struct drm_encoder *encoder; +@@ -273,7 +275,7 @@ static int vc4_plane_atomic_check(struct + + static void vc4_plane_destroy(struct drm_plane *plane) + { +- drm_plane_helper_disable(plane); ++ drm_plane_helper_disable(plane, NULL); + drm_plane_cleanup(plane); + } + +@@ -591,7 +593,7 @@ static struct drm_connector *vc4_fkms_co + connector->interlace_allowed = 0; + connector->doublescan_allowed = 0; + +- drm_mode_connector_attach_encoder(connector, encoder); ++ drm_connector_attach_encoder(connector, encoder); + + return connector; + diff --git a/target/linux/brcm2708/patches-4.19/950-0123-hack-cache-Fix-linker-error.patch b/target/linux/brcm2708/patches-4.19/950-0123-hack-cache-Fix-linker-error.patch new file mode 100644 index 000000000..cd8731d5c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0123-hack-cache-Fix-linker-error.patch @@ -0,0 +1,27 @@ +From 708821a5d04805bf61b036e869663d8650ca578c Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 20 Feb 2018 20:53:46 +0000 +Subject: [PATCH 123/703] hack: cache: Fix linker error + +--- + arch/arm/mm/cache-v7.S | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm/mm/cache-v7.S ++++ b/arch/arm/mm/cache-v7.S +@@ -350,6 +350,7 @@ ENDPROC(v7_flush_kern_dcache_area) + * - start - virtual start address of region + * - end - virtual end address of region + */ ++ENTRY(b15_dma_inv_range) + ENTRY(v7_dma_inv_range) + dcache_line_size r2, r3 + sub r3, r2, #1 +@@ -380,6 +381,7 @@ ENDPROC(v7_dma_inv_range) + * - start - virtual start address of region + * - end - virtual end address of region + */ ++ENTRY(b15_dma_clean_range) + ENTRY(v7_dma_clean_range) + dcache_line_size r2, r3 + sub r3, r2, #1 diff --git a/target/linux/brcm2708/patches-4.19/950-0124-i2c-gpio-Also-set-bus-numbers-from-reg-property.patch b/target/linux/brcm2708/patches-4.19/950-0124-i2c-gpio-Also-set-bus-numbers-from-reg-property.patch new file mode 100644 index 000000000..67dfd8fad --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0124-i2c-gpio-Also-set-bus-numbers-from-reg-property.patch @@ -0,0 +1,35 @@ +From ec510c1562ff8326e032a9f0d9ae26ff0e54dd1c Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 20 Feb 2018 10:07:27 +0000 +Subject: [PATCH 124/703] i2c-gpio: Also set bus numbers from reg property + +I2C busses can be assigned specific bus numbers using aliases in +Device Tree - string properties where the name is the alias and the +value is the path to the node. The current DT parameter mechanism +does not allow property names to be derived from a parameter value +in any way, so it isn't possible to generate unique or matching +aliases for nodes from an overlay that can generate multiple +instances, e.g. i2c-gpio. + +Work around this limitation (at least temporarily) by allowing +the i2c adapter number to be initialised from the "reg" property +if present. + +Signed-off-by: Phil Elwell +--- + drivers/i2c/busses/i2c-gpio.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-gpio.c ++++ b/drivers/i2c/busses/i2c-gpio.c +@@ -350,7 +350,9 @@ static int i2c_gpio_probe(struct platfor + adap->dev.parent = dev; + adap->dev.of_node = np; + +- adap->nr = pdev->id; ++ if (pdev->id != PLATFORM_DEVID_NONE || !pdev->dev.of_node || ++ of_property_read_u32(pdev->dev.of_node, "reg", &adap->nr)) ++ adap->nr = pdev->id; + ret = i2c_bit_add_numbered_bus(adap); + if (ret) + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0125-sound-bcm-Fix-memset-dereference-warning.patch b/target/linux/brcm2708/patches-4.19/950-0125-sound-bcm-Fix-memset-dereference-warning.patch new file mode 100644 index 000000000..3daea03bb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0125-sound-bcm-Fix-memset-dereference-warning.patch @@ -0,0 +1,36 @@ +From 943530f05c0bb81679b1413c4a545e4600f61f71 Mon Sep 17 00:00:00 2001 +From: Nathan Chancellor +Date: Sun, 4 Mar 2018 17:20:25 -0700 +Subject: [PATCH 125/703] sound: bcm: Fix memset dereference warning +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This warning appears with GCC 6.4.0 from toolchains.bootlin.com: + +../sound/soc/bcm/allo-piano-dac-plus.c: In function ‘snd_allo_piano_dac_init’: +../sound/soc/bcm/allo-piano-dac-plus.c:711:30: warning: argument to ‘sizeof’ in ‘memset’ call is the same expression as the destination; did you mean to dereference it? [-Wsizeof-pointer-memaccess] + memset(glb_ptr, 0x00, sizeof(glb_ptr)); + ^ + +Suggested-by: Phil Elwell +Signed-off-by: Nathan Chancellor +--- + sound/soc/bcm/allo-piano-dac-plus.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/sound/soc/bcm/allo-piano-dac-plus.c ++++ b/sound/soc/bcm/allo-piano-dac-plus.c +@@ -706,11 +706,10 @@ static int snd_allo_piano_dac_init(struc + struct snd_soc_card *card = rtd->card; + struct glb_pool *glb_ptr; + +- glb_ptr = kmalloc(sizeof(struct glb_pool), GFP_KERNEL); ++ glb_ptr = kzalloc(sizeof(struct glb_pool), GFP_KERNEL); + if (!glb_ptr) + return -ENOMEM; + +- memset(glb_ptr, 0x00, sizeof(glb_ptr)); + card->drvdata = glb_ptr; + glb_ptr->dual_mode = 2; + glb_ptr->set_mode = 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0126-added-capture_clear-option-to-pps-gpio-via-dtoverlay.patch b/target/linux/brcm2708/patches-4.19/950-0126-added-capture_clear-option-to-pps-gpio-via-dtoverlay.patch new file mode 100644 index 000000000..ba8657860 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0126-added-capture_clear-option-to-pps-gpio-via-dtoverlay.patch @@ -0,0 +1,22 @@ +From ba23c2430362ba947a69c946b8b7bbe5c2eda914 Mon Sep 17 00:00:00 2001 +From: hdoverobinson +Date: Tue, 13 Mar 2018 06:58:39 -0400 +Subject: [PATCH 126/703] added capture_clear option to pps-gpio via dtoverlay + (#2433) + +--- + drivers/pps/clients/pps-gpio.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/pps/clients/pps-gpio.c ++++ b/drivers/pps/clients/pps-gpio.c +@@ -119,6 +119,9 @@ static int pps_gpio_probe(struct platfor + + if (of_get_property(np, "assert-falling-edge", NULL)) + data->assert_falling_edge = true; ++ ++ if (of_get_property(np, "capture-clear", NULL)) ++ data->capture_clear = true; + } + + /* GPIO setup */ diff --git a/target/linux/brcm2708/patches-4.19/950-0127-lan78xx-Read-initial-EEE-status-from-DT.patch b/target/linux/brcm2708/patches-4.19/950-0127-lan78xx-Read-initial-EEE-status-from-DT.patch new file mode 100644 index 000000000..6102129b2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0127-lan78xx-Read-initial-EEE-status-from-DT.patch @@ -0,0 +1,40 @@ +From 73b2c9d517072023cdc4e8331694b1e62234b09d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 9 Mar 2018 12:01:00 +0000 +Subject: [PATCH 127/703] lan78xx: Read initial EEE status from DT + +Add two new DT properties: +* microchip,eee-enabled - a boolean to enable EEE +* microchip,tx-lpi-timer - time in microseconds to wait before entering + low power state + +Signed-off-by: Phil Elwell +--- + drivers/net/usb/lan78xx.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -2654,6 +2654,22 @@ static int lan78xx_open(struct net_devic + + netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); + ++ if (of_property_read_bool(dev->udev->dev.of_node, ++ "microchip,eee-enabled")) { ++ struct ethtool_eee edata; ++ memset(&edata, 0, sizeof(edata)); ++ edata.cmd = ETHTOOL_SEEE; ++ edata.advertised = ADVERTISED_1000baseT_Full | ++ ADVERTISED_100baseT_Full; ++ edata.eee_enabled = true; ++ edata.tx_lpi_enabled = true; ++ if (of_property_read_u32(dev->udev->dev.of_node, ++ "microchip,tx-lpi-timer", ++ &edata.tx_lpi_timer)) ++ edata.tx_lpi_timer = 600; /* non-aggressive */ ++ (void)lan78xx_set_eee(net, &edata); ++ } ++ + /* for Link Check */ + if (dev->urb_intr) { + ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); diff --git a/target/linux/brcm2708/patches-4.19/950-0128-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch b/target/linux/brcm2708/patches-4.19/950-0128-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch new file mode 100644 index 000000000..be3c7b31c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0128-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch @@ -0,0 +1,32 @@ +From e5af3fc88a539cabf03c3e676689282f662d1a08 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 14 Jul 2014 22:02:09 +0100 +Subject: [PATCH 128/703] hid: Reduce default mouse polling interval to 60Hz + +Reduces overhead when using X +--- + drivers/hid/usbhid/hid-core.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/hid/usbhid/hid-core.c ++++ b/drivers/hid/usbhid/hid-core.c +@@ -48,7 +48,7 @@ + * Module parameters. + */ + +-static unsigned int hid_mousepoll_interval; ++static unsigned int hid_mousepoll_interval = ~0; + module_param_named(mousepoll, hid_mousepoll_interval, uint, 0644); + MODULE_PARM_DESC(mousepoll, "Polling interval of mice"); + +@@ -1104,7 +1104,9 @@ static int usbhid_start(struct hid_devic + */ + switch (hid->collection->usage) { + case HID_GD_MOUSE: +- if (hid_mousepoll_interval > 0) ++ if (hid_mousepoll_interval == ~0 && interval < 16) ++ interval = 16; ++ else if (hid_mousepoll_interval != ~0 && hid_mousepoll_interval != 0) + interval = hid_mousepoll_interval; + break; + case HID_GD_JOYSTICK: diff --git a/target/linux/brcm2708/patches-4.19/950-0129-gpiolib-Don-t-prevent-IRQ-usage-of-output-GPIOs.patch b/target/linux/brcm2708/patches-4.19/950-0129-gpiolib-Don-t-prevent-IRQ-usage-of-output-GPIOs.patch new file mode 100644 index 000000000..56d83405a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0129-gpiolib-Don-t-prevent-IRQ-usage-of-output-GPIOs.patch @@ -0,0 +1,46 @@ +From 4535e6abd37c89a7f21623497b9e656845aad4c0 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 24 Apr 2018 14:42:27 +0100 +Subject: [PATCH 129/703] gpiolib: Don't prevent IRQ usage of output GPIOs + +Upstream Linux deems using output GPIOs to generate IRQs as a bogus +use case, even though the BCM2835 GPIO controller is capable of doing +so. A number of users would like to make use of this facility, so +disable the checks. + +See: https://github.com/raspberrypi/linux/issues/2527 + +Signed-off-by: Phil Elwell +--- + drivers/gpio/gpiolib.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpio/gpiolib.c ++++ b/drivers/gpio/gpiolib.c +@@ -53,6 +53,8 @@ + #define extra_checks 0 + #endif + ++#define dont_test_bit(b,d) (0) ++ + /* Device and char device-related information */ + static DEFINE_IDA(gpio_ida); + static dev_t gpio_devt; +@@ -2624,7 +2626,7 @@ int gpiod_direction_output(struct gpio_d + value = !!value; + + /* GPIOs used for IRQs shall not be set as output */ +- if (test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { ++ if (dont_test_bit(FLAG_USED_AS_IRQ, &desc->flags)) { + gpiod_err(desc, + "%s: tried to set a GPIO tied to an IRQ as output\n", + __func__); +@@ -3311,7 +3313,7 @@ int gpiochip_lock_as_irq(struct gpio_chi + } + } + +- if (test_bit(FLAG_IS_OUT, &desc->flags)) { ++ if (dont_test_bit(FLAG_IS_OUT, &desc->flags)) { + chip_err(chip, + "%s: tried to flag a GPIO set as output for IRQ\n", + __func__); diff --git a/target/linux/brcm2708/patches-4.19/950-0130-Add-ability-to-export-gpio-used-by-gpio-poweroff.patch b/target/linux/brcm2708/patches-4.19/950-0130-Add-ability-to-export-gpio-used-by-gpio-poweroff.patch new file mode 100644 index 000000000..bcc104aaa --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0130-Add-ability-to-export-gpio-used-by-gpio-poweroff.patch @@ -0,0 +1,57 @@ +From cacdfc573c523a3e7e7e6ed708f459781228ccd1 Mon Sep 17 00:00:00 2001 +From: Nick Bulleid +Date: Thu, 10 May 2018 21:57:02 +0100 +Subject: [PATCH 130/703] Add ability to export gpio used by gpio-poweroff + +Signed-off-by: Nick Bulleid + +Added export feature to gpio-poweroff documentation + +Signed-off-by: Nick Bulleid +--- + .../devicetree/bindings/power/reset/gpio-poweroff.txt | 1 + + drivers/power/reset/gpio-poweroff.c | 9 +++++++++ + 2 files changed, 10 insertions(+) + +--- a/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt ++++ b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt +@@ -29,6 +29,7 @@ Optional properties: + inactive state. + - timeout-ms: Time to wait before asserting a WARN_ON(1). If nothing is + specified, 3000 ms is used. ++- export : Export the GPIO line to the sysfs system + + Examples: + +--- a/drivers/power/reset/gpio-poweroff.c ++++ b/drivers/power/reset/gpio-poweroff.c +@@ -52,6 +52,7 @@ static int gpio_poweroff_probe(struct pl + bool input = false; + enum gpiod_flags flags; + bool force = false; ++ bool export = false; + + /* If a pm_power_off function has already been added, leave it alone */ + force = of_property_read_bool(pdev->dev.of_node, "force"); +@@ -74,6 +75,12 @@ static int gpio_poweroff_probe(struct pl + if (IS_ERR(reset_gpio)) + return PTR_ERR(reset_gpio); + ++ export = of_property_read_bool(pdev->dev.of_node, "export"); ++ if (export) { ++ gpiod_export(reset_gpio, false); ++ gpiod_export_link(&pdev->dev, "poweroff-gpio", reset_gpio); ++ } ++ + pm_power_off = &gpio_poweroff_do_poweroff; + return 0; + } +@@ -83,6 +90,8 @@ static int gpio_poweroff_remove(struct p + if (pm_power_off == &gpio_poweroff_do_poweroff) + pm_power_off = NULL; + ++ gpiod_unexport(reset_gpio); ++ + return 0; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0131-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch b/target/linux/brcm2708/patches-4.19/950-0131-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch new file mode 100644 index 000000000..154aa1ecf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0131-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch @@ -0,0 +1,84 @@ +From 8e3109c37fc00a087aba08b92da9a416eb2cd37a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Sat, 12 May 2018 21:35:43 +0100 +Subject: [PATCH 131/703] firmware/raspberrypi: Notify firmware of a reboot + +Register for reboot notifications, sending RPI_FIRMWARE_NOTIFY_REBOOT +over the mailbox interface on reception. + +Signed-off-by: Phil Elwell +--- + drivers/firmware/raspberrypi.c | 40 +++++++++++++++++++++++++++++++++- + 1 file changed, 39 insertions(+), 1 deletion(-) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + + #define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf)) +@@ -174,6 +175,26 @@ int rpi_firmware_property(struct rpi_fir + } + EXPORT_SYMBOL_GPL(rpi_firmware_property); + ++static int rpi_firmware_notify_reboot(struct notifier_block *nb, ++ unsigned long action, ++ void *data) ++{ ++ struct rpi_firmware *fw; ++ struct platform_device *pdev = g_pdev; ++ ++ if (!pdev) ++ return 0; ++ ++ fw = platform_get_drvdata(pdev); ++ if (!fw) ++ return 0; ++ ++ (void)rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_REBOOT, ++ 0, 0); ++ ++ return 0; ++} ++ + static void + rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) + { +@@ -284,15 +305,32 @@ static struct platform_driver rpi_firmwa + .remove = rpi_firmware_remove, + }; + ++static struct notifier_block rpi_firmware_reboot_notifier = { ++ .notifier_call = rpi_firmware_notify_reboot, ++}; ++ + static int __init rpi_firmware_init(void) + { +- return platform_driver_register(&rpi_firmware_driver); ++ int ret = register_reboot_notifier(&rpi_firmware_reboot_notifier); ++ if (ret) ++ goto out1; ++ ret = platform_driver_register(&rpi_firmware_driver); ++ if (ret) ++ goto out2; ++ ++ return 0; ++ ++out2: ++ unregister_reboot_notifier(&rpi_firmware_reboot_notifier); ++out1: ++ return ret; + } + subsys_initcall(rpi_firmware_init); + + static void __init rpi_firmware_exit(void) + { + platform_driver_unregister(&rpi_firmware_driver); ++ unregister_reboot_notifier(&rpi_firmware_reboot_notifier); + } + module_exit(rpi_firmware_exit); + diff --git a/target/linux/brcm2708/patches-4.19/950-0132-irqchip-irq-bcm2835-Calc.-FIQ_START-at-boot-time.patch b/target/linux/brcm2708/patches-4.19/950-0132-irqchip-irq-bcm2835-Calc.-FIQ_START-at-boot-time.patch new file mode 100644 index 000000000..c269210a6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0132-irqchip-irq-bcm2835-Calc.-FIQ_START-at-boot-time.patch @@ -0,0 +1,66 @@ +From 73a2cd01254c251fe07c1a124b47105c1d1a7730 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 14 Jun 2018 11:21:04 +0100 +Subject: [PATCH 132/703] irqchip: irq-bcm2835: Calc. FIQ_START at boot-time + +ad83c7cb2f37 ("irqchip/irq-bcm2836: Add support for DT interrupt polarity") +changed the way that the BCM2836/7 local interrupts are mapped; instead +of being pre-mapped they are now mapped on-demand. A side effect of this +change is that the call to irq_of_parse_and_map from armctrl_of_init +creates a new mapping, forming a gap between the IRQs and the FIQs. This + gap breaks the FIQ<->IRQ mapping which up to now has been done by assuming: + +1) that the value of FIQ_START is the same as the number of normal IRQs +that will be mapped (still true), and + +2) that this value is also the offset between an IRQ and its equivalent +FIQ (which is no longer the case). + +Remove both assumptions by measuring the interval between the last IRQ +and the last FIQ, passing it as the parameter to init_FIQ(). + +Fixes: https://github.com/raspberrypi/linux/issues/2432 + +Signed-off-by: Phil Elwell +--- + drivers/irqchip/irq-bcm2835.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/irqchip/irq-bcm2835.c ++++ b/drivers/irqchip/irq-bcm2835.c +@@ -82,8 +82,6 @@ + #define NR_BANKS 3 + #define IRQS_PER_BANK 32 + #define NUMBER_IRQS MAKE_HWIRQ(NR_BANKS, 0) +-#undef FIQ_START +-#define FIQ_START (NR_IRQS_BANK0 + MAKE_HWIRQ(NR_BANKS - 1, 0)) + + static const int reg_pending[] __initconst = { 0x00, 0x04, 0x08 }; + static const int reg_enable[] __initconst = { 0x18, 0x10, 0x14 }; +@@ -211,7 +209,7 @@ static int __init armctrl_of_init(struct + bool is_2836) + { + void __iomem *base; +- int irq, b, i; ++ int irq = 0, last_irq, b, i; + + base = of_iomap(node, 0); + if (!base) +@@ -237,6 +235,8 @@ static int __init armctrl_of_init(struct + } + } + ++ last_irq = irq; ++ + if (is_2836) { + int parent_irq = irq_of_parse_and_map(node, 0); + +@@ -267,7 +267,7 @@ static int __init armctrl_of_init(struct + } + } + #ifndef CONFIG_ARM64 +- init_FIQ(FIQ_START); ++ init_FIQ(irq - last_irq); + #endif + + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0133-of-configfs-Use-of_overlay_fdt_apply-API-call.patch b/target/linux/brcm2708/patches-4.19/950-0133-of-configfs-Use-of_overlay_fdt_apply-API-call.patch new file mode 100644 index 000000000..78e2934bb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0133-of-configfs-Use-of_overlay_fdt_apply-API-call.patch @@ -0,0 +1,114 @@ +From 8d90ea3c51ab934802afe45eba16800f6c620cee Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 14 Jun 2018 15:07:26 +0100 +Subject: [PATCH 133/703] of: configfs: Use of_overlay_fdt_apply API call + +The published API to the dynamic overlay application mechanism now +takes a Flattened Device Tree blob as input so that it can manage the +lifetime of the unflattened tree. Conveniently, the new API call - +of_overlay_fdt_apply - is virtually a drop-in replacement for +create_overlay, which can now be deleted. + +Signed-off-by: Phil Elwell +--- + drivers/of/configfs.c | 47 +++++++------------------------------------ + 1 file changed, 7 insertions(+), 40 deletions(-) + +--- a/drivers/of/configfs.c ++++ b/drivers/of/configfs.c +@@ -40,41 +40,6 @@ struct cfs_overlay_item { + int dtbo_size; + }; + +-static int create_overlay(struct cfs_overlay_item *overlay, void *blob) +-{ +- int err; +- +- /* unflatten the tree */ +- of_fdt_unflatten_tree(blob, NULL, &overlay->overlay); +- if (overlay->overlay == NULL) { +- pr_err("%s: failed to unflatten tree\n", __func__); +- err = -EINVAL; +- goto out_err; +- } +- pr_debug("%s: unflattened OK\n", __func__); +- +- /* mark it as detached */ +- of_node_set_flag(overlay->overlay, OF_DETACHED); +- +- /* perform resolution */ +- err = of_resolve_phandles(overlay->overlay); +- if (err != 0) { +- pr_err("%s: Failed to resolve tree\n", __func__); +- goto out_err; +- } +- pr_debug("%s: resolved OK\n", __func__); +- +- err = of_overlay_apply(overlay->overlay, &overlay->ov_id); +- if (err < 0) { +- pr_err("%s: Failed to create overlay (err=%d)\n", +- __func__, err); +- goto out_err; +- } +- +-out_err: +- return err; +-} +- + static inline struct cfs_overlay_item *to_cfs_overlay_item( + struct config_item *item) + { +@@ -115,7 +80,8 @@ static ssize_t cfs_overlay_item_path_sto + if (err != 0) + goto out_err; + +- err = create_overlay(overlay, (void *)overlay->fw->data); ++ err = of_overlay_fdt_apply((void *)overlay->fw->data, ++ (u32)overlay->fw->size, &overlay->ov_id); + if (err != 0) + goto out_err; + +@@ -136,7 +102,7 @@ static ssize_t cfs_overlay_item_status_s + struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); + + return sprintf(page, "%s\n", +- overlay->ov_id >= 0 ? "applied" : "unapplied"); ++ overlay->ov_id > 0 ? "applied" : "unapplied"); + } + + CONFIGFS_ATTR(cfs_overlay_item_, path); +@@ -188,7 +154,8 @@ ssize_t cfs_overlay_item_dtbo_write(stru + + overlay->dtbo_size = count; + +- err = create_overlay(overlay, overlay->dtbo); ++ err = of_overlay_fdt_apply(overlay->dtbo, overlay->dtbo_size, ++ &overlay->ov_id); + if (err != 0) + goto out_err; + +@@ -198,6 +165,7 @@ out_err: + kfree(overlay->dtbo); + overlay->dtbo = NULL; + overlay->dtbo_size = 0; ++ overlay->ov_id = 0; + + return err; + } +@@ -213,7 +181,7 @@ static void cfs_overlay_release(struct c + { + struct cfs_overlay_item *overlay = to_cfs_overlay_item(item); + +- if (overlay->ov_id >= 0) ++ if (overlay->ov_id > 0) + of_overlay_remove(&overlay->ov_id); + if (overlay->fw) + release_firmware(overlay->fw); +@@ -241,7 +209,6 @@ static struct config_item *cfs_overlay_g + overlay = kzalloc(sizeof(*overlay), GFP_KERNEL); + if (!overlay) + return ERR_PTR(-ENOMEM); +- overlay->ov_id = -1; + + config_item_init_type_name(&overlay->item, name, &cfs_overlay_type); + return &overlay->item; diff --git a/target/linux/brcm2708/patches-4.19/950-0134-net-lan78xx-Disable-TCP-Segmentation-Offload-TSO.patch b/target/linux/brcm2708/patches-4.19/950-0134-net-lan78xx-Disable-TCP-Segmentation-Offload-TSO.patch new file mode 100644 index 000000000..6f31bd4f0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0134-net-lan78xx-Disable-TCP-Segmentation-Offload-TSO.patch @@ -0,0 +1,56 @@ +From 48c17759c12fead4c4643e895582fb44b9b8ec15 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Jun 2018 15:21:10 +0100 +Subject: [PATCH 134/703] net: lan78xx: Disable TCP Segmentation Offload (TSO) + +TSO seems to be having issues when packets are dropped and the +remote end uses Selective Acknowledge (SACK) to denote that +data is missing. The missing data is never resent, so the +connection eventually stalls. + +There is a module parameter of enable_tso added to allow +further debugging without forcing a rebuild of the kernel. + +https://github.com/raspberrypi/linux/issues/2449 +https://github.com/raspberrypi/linux/issues/2482 + +Signed-off-by: Dave Stevenson +--- + drivers/net/usb/lan78xx.c | 19 +++++++++++++++++-- + 1 file changed, 17 insertions(+), 2 deletions(-) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -439,6 +439,15 @@ static int msg_level = -1; + module_param(msg_level, int, 0); + MODULE_PARM_DESC(msg_level, "Override default message level"); + ++/* TSO seems to be having some issue with Selective Acknowledge (SACK) that ++ * results in lost data never being retransmitted. ++ * Disable it by default now, but adds a module parameter to enable it for ++ * debug purposes (the full cause is not currently understood). ++ */ ++static bool enable_tso; ++module_param(enable_tso, bool, 0644); ++MODULE_PARM_DESC(enable_tso, "Enables TCP segmentation offload"); ++ + static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) + { + u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL); +@@ -3003,8 +3012,14 @@ static int lan78xx_bind(struct lan78xx_n + if (DEFAULT_RX_CSUM_ENABLE) + dev->net->features |= NETIF_F_RXCSUM; + +- if (DEFAULT_TSO_CSUM_ENABLE) +- dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG; ++ if (DEFAULT_TSO_CSUM_ENABLE) { ++ dev->net->features |= NETIF_F_SG; ++ /* Use module parameter to control TCP segmentation offload as ++ * it appears to cause issues. ++ */ ++ if (enable_tso) ++ dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6; ++ } + + if (DEFAULT_VLAN_RX_OFFLOAD) + dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX; diff --git a/target/linux/brcm2708/patches-4.19/950-0135-brcmfmac-Re-enable-firmware-roaming-support.patch b/target/linux/brcm2708/patches-4.19/950-0135-brcmfmac-Re-enable-firmware-roaming-support.patch new file mode 100644 index 000000000..a90777256 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0135-brcmfmac-Re-enable-firmware-roaming-support.patch @@ -0,0 +1,29 @@ +From 8bb29ed53937d3608e68f75d269d648ca0b22dcf Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 20 Jun 2018 12:20:01 +0100 +Subject: [PATCH 135/703] brcmfmac: Re-enable firmware roaming support + +As of 4.18, a firmware that implements the update_connect_params +method but doesn't claim to support roaming causes an error. We +disabled firmware roaming in 4.4 [1] because it appeared to +prevent disconnects, but let's try with the current firmware to see +if things have improved. + +[1] https://github.com/raspberrypi/linux/commit/dd9188011786fb62a7960922f31e8e086fb2009b + +Signed-off-by: Phil Elwell +--- + drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c +@@ -70,7 +70,7 @@ static int brcmf_fcmode; + module_param_named(fcmode, brcmf_fcmode, int, 0); + MODULE_PARM_DESC(fcmode, "Mode of firmware signalled flow control"); + +-static int brcmf_roamoff = 1; ++static int brcmf_roamoff; + module_param_named(roamoff, brcmf_roamoff, int, 0400); + MODULE_PARM_DESC(roamoff, "Do not use internal roaming engine"); + diff --git a/target/linux/brcm2708/patches-4.19/950-0136-lan78xx-Move-enabling-of-EEE-into-PHY-init-code.patch b/target/linux/brcm2708/patches-4.19/950-0136-lan78xx-Move-enabling-of-EEE-into-PHY-init-code.patch new file mode 100644 index 000000000..642919b21 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0136-lan78xx-Move-enabling-of-EEE-into-PHY-init-code.patch @@ -0,0 +1,64 @@ +From 16ca74df16214e51080a6102388fbbaaae713c5e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 5 Apr 2018 14:46:11 +0100 +Subject: [PATCH 136/703] lan78xx: Move enabling of EEE into PHY init code + +Enable EEE mode as soon as possible after connecting to the PHY, and +before phy_start. This avoids a second link negotiation, which speeds +up booting and stops the interface failing to become ready. + +See: https://github.com/raspberrypi/linux/issues/2437 + +Signed-off-by: Phil Elwell +--- + drivers/net/usb/lan78xx.c | 32 ++++++++++++++++---------------- + 1 file changed, 16 insertions(+), 16 deletions(-) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -2186,6 +2186,22 @@ static int lan78xx_phy_init(struct lan78 + mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control); + phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv); + ++ if (of_property_read_bool(dev->udev->dev.of_node, ++ "microchip,eee-enabled")) { ++ struct ethtool_eee edata; ++ memset(&edata, 0, sizeof(edata)); ++ edata.cmd = ETHTOOL_SEEE; ++ edata.advertised = ADVERTISED_1000baseT_Full | ++ ADVERTISED_100baseT_Full; ++ edata.eee_enabled = true; ++ edata.tx_lpi_enabled = true; ++ if (of_property_read_u32(dev->udev->dev.of_node, ++ "microchip,tx-lpi-timer", ++ &edata.tx_lpi_timer)) ++ edata.tx_lpi_timer = 600; /* non-aggressive */ ++ (void)lan78xx_set_eee(dev->net, &edata); ++ } ++ + if (phydev->mdio.dev.of_node) { + u32 reg; + int len; +@@ -2663,22 +2679,6 @@ static int lan78xx_open(struct net_devic + + netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); + +- if (of_property_read_bool(dev->udev->dev.of_node, +- "microchip,eee-enabled")) { +- struct ethtool_eee edata; +- memset(&edata, 0, sizeof(edata)); +- edata.cmd = ETHTOOL_SEEE; +- edata.advertised = ADVERTISED_1000baseT_Full | +- ADVERTISED_100baseT_Full; +- edata.eee_enabled = true; +- edata.tx_lpi_enabled = true; +- if (of_property_read_u32(dev->udev->dev.of_node, +- "microchip,tx-lpi-timer", +- &edata.tx_lpi_timer)) +- edata.tx_lpi_timer = 600; /* non-aggressive */ +- (void)lan78xx_set_eee(net, &edata); +- } +- + /* for Link Check */ + if (dev->urb_intr) { + ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); diff --git a/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch new file mode 100644 index 000000000..5894aca1c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch @@ -0,0 +1,64 @@ +From 3e89900d7dd7c851400e0afeea326f94bba1cd84 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 28 Aug 2018 10:40:40 +0100 +Subject: [PATCH 137/703] staging/vc04_services: Derive g_cache_line_size + +The ARM coprocessor registers include dcache line size, but there is no +function to expose this value. Rather than create a new one, use the +read_cpuid_id function to derive the correct value, which is 32 for +BCM2835 and 64 for BCM2836/7. + +Signed-off-by: Phil Elwell +--- + .../interface/vchiq_arm/vchiq_2835_arm.c | 24 +++++++++++++++---- + 1 file changed, 19 insertions(+), 5 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +@@ -42,6 +42,7 @@ + #include + #include + #include ++#include + #include + + #define TOTAL_SLOTS (VCHIQ_SLOT_ZERO_SLOTS + 2 * 32) +@@ -81,13 +82,15 @@ static void __iomem *g_regs; + * VPU firmware, which determines the required alignment of the + * offsets/sizes in pagelists. + * +- * Modern VPU firmware looks for a DT "cache-line-size" property in +- * the VCHIQ node and will overwrite it with the actual L2 cache size, ++ * Previous VPU firmware looked for a DT "cache-line-size" property in ++ * the VCHIQ node and would overwrite it with the actual L2 cache size, + * which the kernel must then respect. That property was rejected +- * upstream, so we have to use the VPU firmware's compatibility value +- * of 32. ++ * upstream, so we now rely on both sides to "do the right thing" independently ++ * of the other. To improve backwards compatibility, this new behaviour is ++ * signalled to the firmware by the use of a corrected "reg" property on the ++ * relevant Device Tree node. + */ +-static unsigned int g_cache_line_size = 32; ++static unsigned int g_cache_line_size; + static unsigned int g_fragments_size; + static char *g_fragments_base; + static char *g_free_fragments; +@@ -127,6 +130,17 @@ int vchiq_platform_init(struct platform_ + if (err < 0) + return err; + ++ /* ++ * The tempting L1_CACHE_BYTES macro doesn't work in the case of ++ * a kernel built with bcm2835_defconfig running on a BCM2836/7 ++ * processor, hence the need for a runtime check. The dcache line size ++ * is encoded in one of the coprocessor registers, but there is no ++ * convenient way to access it short of embedded assembler, hence ++ * the use of read_cpuid_id(). The following test evaluates to true ++ * on a BCM2835 showing that it is ARMv6-ish, whereas ++ * cpu_architecture() will indicate that it is an ARMv7. ++ */ ++ g_cache_line_size = ((read_cpuid_id() & 0x7f000) == 0x7b000) ? 32 : 64; + g_fragments_size = 2 * g_cache_line_size; + + /* Allocate space for the channels in coherent memory */ diff --git a/target/linux/brcm2708/patches-4.19/950-0138-Add-rpi-poe-fan-driver.patch b/target/linux/brcm2708/patches-4.19/950-0138-Add-rpi-poe-fan-driver.patch new file mode 100644 index 000000000..659a2b4e0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0138-Add-rpi-poe-fan-driver.patch @@ -0,0 +1,704 @@ +From ae762f7cc705c20c8320613425a7179c3e6f47f3 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Mon, 9 Jul 2018 12:54:25 +0100 +Subject: [PATCH 138/703] Add rpi-poe-fan driver + +Signed-off-by: Serge Schneider + +PoE HAT driver cleanup + +* Fix undeclared variable in rpi_poe_fan_suspend +* Add SPDX-License-Identifier +* Expand PoE acronym in Kconfig help +* Give clearer error message on of_property_count_u32_elems fail +* Add documentation +* Add vendor to of_device_id compatible string. +* Rename m_data_s struct to fw_data_s +* Fix typos + +Fixes: #2665 + +Signed-off-by: Serge Schneider +--- + .../devicetree/bindings/hwmon/rpi-poe-fan.txt | 55 +++ + Documentation/hwmon/rpi-poe-fan | 15 + + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 61 +++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + drivers/hwmon/Kconfig | 11 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/rpi-poe-fan.c | 436 ++++++++++++++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 2 + + 11 files changed, 590 insertions(+) + create mode 100644 Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt + create mode 100644 Documentation/hwmon/rpi-poe-fan + create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts + create mode 100644 drivers/hwmon/rpi-poe-fan.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/hwmon/rpi-poe-fan.txt +@@ -0,0 +1,55 @@ ++Bindings for the Raspberry Pi PoE HAT fan ++ ++Required properties: ++- compatible : "raspberrypi,rpi-poe-fan" ++- firmware : Reference to the RPi firmware device node ++- pwms : the PWM that is used to control the PWM fan ++- cooling-levels : PWM duty cycle values in a range from 0 to 255 ++ which correspond to thermal cooling states ++ ++Example: ++ fan0: rpi-poe-fan@0 { ++ compatible = "raspberrypi,rpi-poe-fan"; ++ firmware = <&firmware>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <0 50 150 255>; ++ status = "okay"; ++ }; ++ ++ thermal-zones { ++ cpu_thermal: cpu-thermal { ++ trips { ++ threshold: trip-point@0 { ++ temperature = <45000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ target: trip-point@1 { ++ temperature = <50000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ cpu_hot: cpu_hot@0 { ++ temperature = <55000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&threshold>; ++ cooling-device = <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&target>; ++ cooling-device = <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_hot>; ++ cooling-device = <&fan0 2 3>; ++ }; ++ }; ++ }; ++ }; +--- /dev/null ++++ b/Documentation/hwmon/rpi-poe-fan +@@ -0,0 +1,15 @@ ++Kernel driver rpi-poe-fan ++===================== ++ ++This driver enables the use of the Raspberry Pi PoE HAT fan. ++ ++Author: Serge Schneider ++ ++Description ++----------- ++ ++The driver implements a simple interface for driving the Raspberry Pi PoE ++(Power over Ethernet) HAT fan. The driver passes commands to the Raspberry Pi ++firmware through the mailbox property interface. The firmware then forwards ++the commands to the board over I2C on the ID_EEPROM pins. The driver exposes ++the fan to the user space through the hwmon sysfs interface. +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -100,6 +100,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + rpi-dac.dtbo \ + rpi-display.dtbo \ + rpi-ft5406.dtbo \ ++ rpi-poe.dtbo \ + rpi-proto.dtbo \ + rpi-sense.dtbo \ + rpi-tv.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1515,6 +1515,12 @@ Params: touchscreen-size-x Touchscr + touchscreen-swapped-x-y Swap X and Y cordinates (default 0); + + ++Name: rpi-poe ++Info: Raspberry Pi POE HAT ++Load: dtoverlay=rpi-poe ++Params: ++ ++ + Name: rpi-proto + Info: Configures the RPi Proto audio card + Load: dtoverlay=rpi-proto +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -0,0 +1,61 @@ ++/* ++ * Overlay for the Raspberry Pi POE HAT. ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ fan0: rpi-poe-fan@0 { ++ compatible = "raspberrypi,rpi-poe-fan"; ++ firmware = <&firmware>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ #cooling-cells = <2>; ++ cooling-levels = <0 50 150 255>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&cpu_thermal>; ++ __overlay__ { ++ trips { ++ threshold: trip-point@0 { ++ temperature = <45000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ target: trip-point@1 { ++ temperature = <50000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ cpu_hot: cpu_hot@0 { ++ temperature = <55000>; ++ hysteresis = <2000>; ++ type = "active"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&threshold>; ++ cooling-device = <&fan0 0 1>; ++ }; ++ map1 { ++ trip = <&target>; ++ cooling-device = <&fan0 1 2>; ++ }; ++ map2 { ++ trip = <&cpu_hot>; ++ cooling-device = <&fan0 2 3>; ++ }; ++ }; ++ }; ++ }; ++}; +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -659,6 +659,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m + CONFIG_SENSORS_SHTC1=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -652,6 +652,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m + CONFIG_SENSORS_SHTC1=m +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1330,6 +1330,17 @@ config SENSORS_RASPBERRYPI_HWMON + This driver can also be built as a module. If so, the module + will be called raspberrypi-hwmon. + ++config SENSORS_RPI_POE_FAN ++ tristate "Raspberry Pi PoE HAT fan" ++ depends on RASPBERRYPI_FIRMWARE ++ depends on THERMAL || THERMAL=n ++ help ++ If you say yes here you get support for Raspberry Pi PoE (Power over ++ Ethernet) HAT fan. ++ ++ This driver can also be built as a module. If so, the module ++ will be called rpi-poe-fan. ++ + config SENSORS_SHT15 + tristate "Sensiron humidity and temperature sensors. SHT15 and compat." + depends on GPIOLIB || COMPILE_TEST +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -144,6 +144,7 @@ obj-$(CONFIG_SENSORS_PCF8591) += pcf8591 + obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o + obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o + obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o ++obj-$(CONFIG_SENSORS_RPI_POE_FAN) += rpi-poe-fan.o + obj-$(CONFIG_SENSORS_S3C) += s3c-hwmon.o + obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o + obj-$(CONFIG_SENSORS_SCH5627) += sch5627.o +--- /dev/null ++++ b/drivers/hwmon/rpi-poe-fan.c +@@ -0,0 +1,436 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * rpi-poe-fan.c - Hwmon driver for Raspberry Pi PoE HAT fan. ++ * ++ * Copyright (C) 2018 Raspberry Pi (Trading) Ltd. ++ * Based on pwm-fan.c by Kamil Debski ++ * ++ * Author: Serge Schneider ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_PWM 255 ++ ++#define POE_CUR_PWM 0x0 ++#define POE_DEF_PWM 0x1 ++ ++struct rpi_poe_fan_ctx { ++ struct mutex lock; ++ struct rpi_firmware *fw; ++ unsigned int pwm_value; ++ unsigned int def_pwm_value; ++ unsigned int rpi_poe_fan_state; ++ unsigned int rpi_poe_fan_max_state; ++ unsigned int *rpi_poe_fan_cooling_levels; ++ struct thermal_cooling_device *cdev; ++ struct notifier_block nb; ++}; ++ ++struct fw_tag_data_s{ ++ u32 reg; ++ u32 val; ++ u32 ret; ++}; ++ ++static int write_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ ++ struct fw_tag_data_s fw_tag_data = { ++ .reg = reg, ++ .val = *val ++ }; ++ int ret; ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_SET_POE_HAT_VAL, ++ &fw_tag_data, sizeof(fw_tag_data)); ++ if (ret) { ++ return ret; ++ } else if (fw_tag_data.ret) { ++ return -EIO; ++ } ++ return 0; ++} ++ ++static int read_reg(struct rpi_firmware *fw, u32 reg, u32 *val){ ++ struct fw_tag_data_s fw_tag_data = { ++ .reg = reg, ++ }; ++ int ret; ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_POE_HAT_VAL, ++ &fw_tag_data, sizeof(fw_tag_data)); ++ if (ret) { ++ return ret; ++ } else if (fw_tag_data.ret) { ++ return -EIO; ++ } ++ *val = fw_tag_data.val; ++ return 0; ++} ++ ++static int rpi_poe_reboot(struct notifier_block *nb, unsigned long code, ++ void *unused) ++{ ++ struct rpi_poe_fan_ctx *ctx = container_of(nb, struct rpi_poe_fan_ctx, ++ nb); ++ ++ if (ctx->pwm_value != ctx->def_pwm_value) ++ write_reg(ctx->fw, POE_CUR_PWM, &ctx->def_pwm_value); ++ ++ return NOTIFY_DONE; ++} ++ ++static int __set_pwm(struct rpi_poe_fan_ctx *ctx, u32 pwm) ++{ ++ int ret = 0; ++ ++ mutex_lock(&ctx->lock); ++ if (ctx->pwm_value == pwm) ++ goto exit_set_pwm_err; ++ ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &pwm); ++ if (!ret) ++ ctx->pwm_value = pwm; ++exit_set_pwm_err: ++ mutex_unlock(&ctx->lock); ++ return ret; ++} ++ ++static int __set_def_pwm(struct rpi_poe_fan_ctx *ctx, u32 def_pwm) ++{ ++ int ret = 0; ++ mutex_lock(&ctx->lock); ++ if (ctx->def_pwm_value == def_pwm) ++ goto exit_set_def_pwm_err; ++ ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &def_pwm); ++ if (!ret) ++ ctx->def_pwm_value = def_pwm; ++exit_set_def_pwm_err: ++ mutex_unlock(&ctx->lock); ++ return ret; ++} ++ ++static void rpi_poe_fan_update_state(struct rpi_poe_fan_ctx *ctx, ++ unsigned long pwm) ++{ ++ int i; ++ ++ for (i = 0; i < ctx->rpi_poe_fan_max_state; ++i) ++ if (pwm < ctx->rpi_poe_fan_cooling_levels[i + 1]) ++ break; ++ ++ ctx->rpi_poe_fan_state = i; ++} ++ ++static ssize_t set_pwm(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ unsigned long pwm; ++ int ret; ++ ++ if (kstrtoul(buf, 10, &pwm) || pwm > MAX_PWM) ++ return -EINVAL; ++ ++ ret = __set_pwm(ctx, pwm); ++ if (ret) ++ return ret; ++ ++ rpi_poe_fan_update_state(ctx, pwm); ++ return count; ++} ++ ++static ssize_t set_def_pwm(struct device *dev, struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ unsigned long def_pwm; ++ int ret; ++ ++ if (kstrtoul(buf, 10, &def_pwm) || def_pwm > MAX_PWM) ++ return -EINVAL; ++ ++ ret = __set_def_pwm(ctx, def_pwm); ++ if (ret) ++ return ret; ++ return count; ++} ++ ++static ssize_t show_pwm(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ ++ return sprintf(buf, "%u\n", ctx->pwm_value); ++} ++ ++static ssize_t show_def_pwm(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ ++ return sprintf(buf, "%u\n", ctx->def_pwm_value); ++} ++ ++ ++static SENSOR_DEVICE_ATTR(pwm1, 0644, show_pwm, set_pwm, 0); ++static SENSOR_DEVICE_ATTR(def_pwm1, 0644, show_def_pwm, set_def_pwm, 1); ++ ++static struct attribute *rpi_poe_fan_attrs[] = { ++ &sensor_dev_attr_pwm1.dev_attr.attr, ++ &sensor_dev_attr_def_pwm1.dev_attr.attr, ++ NULL, ++}; ++ ++ATTRIBUTE_GROUPS(rpi_poe_fan); ++ ++/* thermal cooling device callbacks */ ++static int rpi_poe_fan_get_max_state(struct thermal_cooling_device *cdev, ++ unsigned long *state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ ++ if (!ctx) ++ return -EINVAL; ++ ++ *state = ctx->rpi_poe_fan_max_state; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_get_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long *state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ ++ if (!ctx) ++ return -EINVAL; ++ ++ *state = ctx->rpi_poe_fan_state; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_set_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long state) ++{ ++ struct rpi_poe_fan_ctx *ctx = cdev->devdata; ++ int ret; ++ ++ if (!ctx || (state > ctx->rpi_poe_fan_max_state)) ++ return -EINVAL; ++ ++ if (state == ctx->rpi_poe_fan_state) ++ return 0; ++ ++ ret = __set_pwm(ctx, ctx->rpi_poe_fan_cooling_levels[state]); ++ if (ret) { ++ dev_err(&cdev->device, "Cannot set pwm!\n"); ++ return ret; ++ } ++ ++ ctx->rpi_poe_fan_state = state; ++ ++ return ret; ++} ++ ++static const struct thermal_cooling_device_ops rpi_poe_fan_cooling_ops = { ++ .get_max_state = rpi_poe_fan_get_max_state, ++ .get_cur_state = rpi_poe_fan_get_cur_state, ++ .set_cur_state = rpi_poe_fan_set_cur_state, ++}; ++ ++static int rpi_poe_fan_of_get_cooling_data(struct device *dev, ++ struct rpi_poe_fan_ctx *ctx) ++{ ++ struct device_node *np = dev->of_node; ++ int num, i, ret; ++ ++ if (!of_find_property(np, "cooling-levels", NULL)) ++ return 0; ++ ++ ret = of_property_count_u32_elems(np, "cooling-levels"); ++ if (ret <= 0) { ++ dev_err(dev, "cooling-levels property missing or invalid: %d\n", ++ ret); ++ return ret ? : -EINVAL; ++ } ++ ++ num = ret; ++ ctx->rpi_poe_fan_cooling_levels = devm_kzalloc(dev, num * sizeof(u32), ++ GFP_KERNEL); ++ if (!ctx->rpi_poe_fan_cooling_levels) ++ return -ENOMEM; ++ ++ ret = of_property_read_u32_array(np, "cooling-levels", ++ ctx->rpi_poe_fan_cooling_levels, num); ++ if (ret) { ++ dev_err(dev, "Property 'cooling-levels' cannot be read!\n"); ++ return ret; ++ } ++ ++ for (i = 0; i < num; i++) { ++ if (ctx->rpi_poe_fan_cooling_levels[i] > MAX_PWM) { ++ dev_err(dev, "PWM fan state[%d]:%d > %d\n", i, ++ ctx->rpi_poe_fan_cooling_levels[i], MAX_PWM); ++ return -EINVAL; ++ } ++ } ++ ++ ctx->rpi_poe_fan_max_state = num - 1; ++ ++ return 0; ++} ++ ++static int rpi_poe_fan_probe(struct platform_device *pdev) ++{ ++ struct thermal_cooling_device *cdev; ++ struct rpi_poe_fan_ctx *ctx; ++ struct device *hwmon; ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *fw_node; ++ int ret; ++ ++ fw_node = of_parse_phandle(np, "firmware", 0); ++ if (!fw_node) { ++ dev_err(&pdev->dev, "Missing firmware node\n"); ++ return -ENOENT; ++ } ++ ++ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); ++ if (!ctx) ++ return -ENOMEM; ++ ++ mutex_init(&ctx->lock); ++ ++ ctx->fw = rpi_firmware_get(fw_node); ++ if (!ctx->fw) ++ return -EPROBE_DEFER; ++ ++ platform_set_drvdata(pdev, ctx); ++ ++ ctx->nb.notifier_call = rpi_poe_reboot; ++ ret = register_reboot_notifier(&ctx->nb); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register reboot notifier: %i\n", ++ ret); ++ return ret; ++ } ++ ret = read_reg(ctx->fw, POE_DEF_PWM, &ctx->def_pwm_value); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to get default PWM value: %i\n", ++ ret); ++ goto err; ++ } ++ ret = read_reg(ctx->fw, POE_CUR_PWM, &ctx->pwm_value); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to get current PWM value: %i\n", ++ ret); ++ goto err; ++ } ++ ++ hwmon = devm_hwmon_device_register_with_groups(&pdev->dev, "rpipoefan", ++ ctx, rpi_poe_fan_groups); ++ if (IS_ERR(hwmon)) { ++ dev_err(&pdev->dev, "Failed to register hwmon device\n"); ++ ret = PTR_ERR(hwmon); ++ goto err; ++ } ++ ++ ret = rpi_poe_fan_of_get_cooling_data(&pdev->dev, ctx); ++ if (ret) ++ return ret; ++ ++ rpi_poe_fan_update_state(ctx, ctx->pwm_value); ++ if (!IS_ENABLED(CONFIG_THERMAL)) ++ return 0; ++ ++ cdev = thermal_of_cooling_device_register(np, ++ "rpi-poe-fan", ctx, ++ &rpi_poe_fan_cooling_ops); ++ if (IS_ERR(cdev)) { ++ dev_err(&pdev->dev, ++ "Failed to register rpi-poe-fan as cooling device"); ++ ret = PTR_ERR(cdev); ++ goto err; ++ } ++ ctx->cdev = cdev; ++ thermal_cdev_update(cdev); ++ ++ return 0; ++err: ++ unregister_reboot_notifier(&ctx->nb); ++ return ret; ++} ++ ++static int rpi_poe_fan_remove(struct platform_device *pdev) ++{ ++ struct rpi_poe_fan_ctx *ctx = platform_get_drvdata(pdev); ++ u32 value = ctx->def_pwm_value; ++ ++ unregister_reboot_notifier(&ctx->nb); ++ thermal_cooling_device_unregister(ctx->cdev); ++ if (ctx->pwm_value != value) { ++ write_reg(ctx->fw, POE_CUR_PWM, &value); ++ } ++ return 0; ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static int rpi_poe_fan_suspend(struct device *dev) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ u32 value = 0; ++ int ret = 0; ++ ++ if (ctx->pwm_value != value) ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); ++ return ret; ++} ++ ++static int rpi_poe_fan_resume(struct device *dev) ++{ ++ struct rpi_poe_fan_ctx *ctx = dev_get_drvdata(dev); ++ u32 value = ctx->pwm_value; ++ int ret = 0; ++ ++ if (value != 0) ++ ret = write_reg(ctx->fw, POE_CUR_PWM, &value); ++ ++ return ret; ++} ++#endif ++ ++static SIMPLE_DEV_PM_OPS(rpi_poe_fan_pm, rpi_poe_fan_suspend, ++ rpi_poe_fan_resume); ++ ++static const struct of_device_id of_rpi_poe_fan_match[] = { ++ { .compatible = "raspberrypi,rpi-poe-fan", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, of_rpi_poe_fan_match); ++ ++static struct platform_driver rpi_poe_fan_driver = { ++ .probe = rpi_poe_fan_probe, ++ .remove = rpi_poe_fan_remove, ++ .driver = { ++ .name = "rpi-poe-fan", ++ .pm = &rpi_poe_fan_pm, ++ .of_match_table = of_rpi_poe_fan_match, ++ }, ++}; ++ ++module_platform_driver(rpi_poe_fan_driver); ++ ++MODULE_AUTHOR("Serge Schneider "); ++MODULE_ALIAS("platform:rpi-poe-fan"); ++MODULE_DESCRIPTION("Raspberry Pi PoE HAT fan driver"); ++MODULE_LICENSE("GPL"); +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -93,6 +93,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043, + RPI_FIRMWARE_GET_PERIPH_REG = 0x00030045, + RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, ++ RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, ++ RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, + + + /* Dispmanx TAGS */ diff --git a/target/linux/brcm2708/patches-4.19/950-0139-cxd2880-CXD2880_SPI_DRV-should-select-DVB_CXD2880-wi.patch b/target/linux/brcm2708/patches-4.19/950-0139-cxd2880-CXD2880_SPI_DRV-should-select-DVB_CXD2880-wi.patch new file mode 100644 index 000000000..ec97f6ffd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0139-cxd2880-CXD2880_SPI_DRV-should-select-DVB_CXD2880-wi.patch @@ -0,0 +1,20 @@ +From 6b7588fb541726ea05baf7f553deafa907263a6e Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 17 Sep 2018 17:31:18 +0100 +Subject: [PATCH 139/703] cxd2880: CXD2880_SPI_DRV should select DVB_CXD2880 + with MEDIA_SUBDRV_AUTOSELECT + +--- + drivers/media/spi/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/media/spi/Kconfig ++++ b/drivers/media/spi/Kconfig +@@ -19,6 +19,7 @@ menu "Media SPI Adapters" + config CXD2880_SPI_DRV + tristate "Sony CXD2880 SPI support" + depends on DVB_CORE && SPI ++ select DVB_CXD2880 if MEDIA_SUBDRV_AUTOSELECT + default m if !MEDIA_SUBDRV_AUTOSELECT + help + Choose if you would like to have SPI interface support for Sony CXD2880. diff --git a/target/linux/brcm2708/patches-4.19/950-0140-bcm2835-interpolate-audio-delay.patch b/target/linux/brcm2708/patches-4.19/950-0140-bcm2835-interpolate-audio-delay.patch new file mode 100644 index 000000000..61b4f50ca --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0140-bcm2835-interpolate-audio-delay.patch @@ -0,0 +1,89 @@ +From 7de09525583f90004ba236345bae3ad3274d23da Mon Sep 17 00:00:00 2001 +From: wm4 +Date: Wed, 13 Jan 2016 19:44:47 +0100 +Subject: [PATCH 140/703] bcm2835: interpolate audio delay + +It appears the GPU only sends us a message all 10ms to update +the playback progress. Other than this, the playback position +(what SNDRV_PCM_IOCTL_DELAY will return) is not updated at all. +Userspace will see jitter up to 10ms in the audio position. + +Make this a bit nicer for userspace by interpolating the +position using the CPU clock. + +I'm not sure if setting snd_pcm_runtime.delay is the right +approach for this. Or if there is maybe an already existing +mechanism for position interpolation in the ALSA core. + +I only set SNDRV_PCM_INFO_BATCH because this appears to remove +at least one situation snd_pcm_runtime.delay is used, so I have +to worry less in which place I have to update this field, or +how it interacts with the rest of ALSA. + +In the future, it might be nice to use VC_AUDIO_MSG_TYPE_LATENCY. +One problem is that it requires sending a videocore message, and +waiting for a reply, which could make the implementation much +harder due to locking and synchronization requirements. +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 12 +++++++++++- + .../staging/vc04_services/bcm2835-audio/bcm2835.h | 1 + + 2 files changed, 12 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -11,7 +11,7 @@ + /* hardware definition */ + static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | +- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), ++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, +@@ -81,6 +81,8 @@ void bcm2835_playback_fifo(struct bcm283 + alsa_stream->pos %= alsa_stream->buffer_size; + } + ++ alsa_stream->interpolate_start = ktime_get_ns(); ++ + if (alsa_stream->substream) { + if (new_period) + snd_pcm_period_elapsed(alsa_stream->substream); +@@ -306,6 +308,7 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); + alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); + alsa_stream->pos = 0; ++ alsa_stream->interpolate_start = ktime_get_ns(); + + audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", + alsa_stream->buffer_size, alsa_stream->period_size, +@@ -397,12 +400,19 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s + { + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; ++ u64 now = ktime_get_ns(); + + audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, + frames_to_bytes(runtime, runtime->status->hw_ptr), + frames_to_bytes(runtime, runtime->control->appl_ptr), + alsa_stream->pos); + ++ /* Give userspace better delay reporting by interpolating between GPU ++ * notifications, assuming audio speed is close enough to the clock ++ * used for ktime */ ++ if (alsa_stream->interpolate_start && alsa_stream->interpolate_start < now) ++ runtime->delay = -(int)div_u64((now - alsa_stream->interpolate_start) * runtime->rate, 1000000000); ++ + return snd_pcm_indirect_playback_pointer(substream, + &alsa_stream->pcm_indirect, + alsa_stream->pos); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -133,6 +133,7 @@ struct bcm2835_alsa_stream { + unsigned int pos; + unsigned int buffer_size; + unsigned int period_size; ++ u64 interpolate_start; + + atomic_t retrieved; + struct bcm2835_audio_instance *instance; diff --git a/target/linux/brcm2708/patches-4.19/950-0141-vchiq_2835_arm-Implement-a-DMA-pool-for-small-bulk-t.patch b/target/linux/brcm2708/patches-4.19/950-0141-vchiq_2835_arm-Implement-a-DMA-pool-for-small-bulk-t.patch new file mode 100644 index 000000000..b246b826e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0141-vchiq_2835_arm-Implement-a-DMA-pool-for-small-bulk-t.patch @@ -0,0 +1,126 @@ +From 8a9e2054d3ecf11044136daa5644d803db486dd4 Mon Sep 17 00:00:00 2001 +From: detule +Date: Tue, 2 Oct 2018 04:10:08 -0400 +Subject: [PATCH 141/703] vchiq_2835_arm: Implement a DMA pool for small bulk + transfers (#2699) + +During a bulk transfer we request a DMA allocation to hold the +scatter-gather list. Most of the time, this allocation is small +(<< PAGE_SIZE), however it can be requested at a high enough frequency +to cause fragmentation and/or stress the CMA allocator (think time +spent in compaction here, or during allocations elsewhere). + +Implement a pool to serve up small DMA allocations, falling back +to a coherent allocation if the request is greater than +VCHIQ_DMA_POOL_SIZE. + +Signed-off-by: Oliver Gjoneski +--- + .../interface/vchiq_arm/vchiq_2835_arm.c | 40 +++++++++++++++---- + 1 file changed, 33 insertions(+), 7 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +@@ -37,6 +37,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -60,6 +61,8 @@ + #define BELL0 0x00 + #define BELL2 0x08 + ++#define VCHIQ_DMA_POOL_SIZE PAGE_SIZE ++ + struct vchiq_2835_state { + int inited; + VCHIQ_ARM_STATE_T arm_state; +@@ -69,6 +72,7 @@ struct vchiq_pagelist_info { + PAGELIST_T *pagelist; + size_t pagelist_buffer_size; + dma_addr_t dma_addr; ++ bool is_from_pool; + enum dma_data_direction dma_dir; + unsigned int num_pages; + unsigned int pages_need_release; +@@ -91,6 +95,7 @@ static void __iomem *g_regs; + * relevant Device Tree node. + */ + static unsigned int g_cache_line_size; ++static struct dma_pool *g_dma_pool; + static unsigned int g_fragments_size; + static char *g_fragments_base; + static char *g_free_fragments; +@@ -206,6 +211,14 @@ int vchiq_platform_init(struct platform_ + } + + g_dev = dev; ++ g_dma_pool = dmam_pool_create("vchiq_scatter_pool", dev, ++ VCHIQ_DMA_POOL_SIZE, g_cache_line_size, ++ 0); ++ if (!g_dma_pool) { ++ dev_err(dev, "failed to create dma pool"); ++ return -ENOMEM; ++ } ++ + vchiq_log_info(vchiq_arm_log_level, + "vchiq_init - done (slots %pK, phys %pad)", + vchiq_slot_zero, &slot_phys); +@@ -397,9 +410,14 @@ cleanup_pagelistinfo(struct vchiq_pageli + for (i = 0; i < pagelistinfo->num_pages; i++) + put_page(pagelistinfo->pages[i]); + } +- +- dma_free_coherent(g_dev, pagelistinfo->pagelist_buffer_size, +- pagelistinfo->pagelist, pagelistinfo->dma_addr); ++ if (pagelistinfo->is_from_pool) { ++ dma_pool_free(g_dma_pool, pagelistinfo->pagelist, ++ pagelistinfo->dma_addr); ++ } else { ++ dma_free_coherent(g_dev, pagelistinfo->pagelist_buffer_size, ++ pagelistinfo->pagelist, ++ pagelistinfo->dma_addr); ++ } + } + + /* There is a potential problem with partial cache lines (pages?) +@@ -419,6 +437,7 @@ create_pagelist(char __user *buf, size_t + u32 *addrs; + unsigned int num_pages, offset, i, k; + int actual_pages; ++ bool is_from_pool; + size_t pagelist_size; + struct scatterlist *scatterlist, *sg; + int dma_buffers; +@@ -445,10 +464,16 @@ create_pagelist(char __user *buf, size_t + /* Allocate enough storage to hold the page pointers and the page + * list + */ +- pagelist = dma_zalloc_coherent(g_dev, +- pagelist_size, +- &dma_addr, +- GFP_KERNEL); ++ if (pagelist_size > VCHIQ_DMA_POOL_SIZE) { ++ pagelist = dma_zalloc_coherent(g_dev, ++ pagelist_size, ++ &dma_addr, ++ GFP_KERNEL); ++ is_from_pool = false; ++ } else { ++ pagelist = dma_pool_zalloc(g_dma_pool, GFP_KERNEL, &dma_addr); ++ is_from_pool = true; ++ } + + vchiq_log_trace(vchiq_arm_log_level, "%s - %pK", __func__, pagelist); + +@@ -469,6 +494,7 @@ create_pagelist(char __user *buf, size_t + pagelistinfo->pagelist = pagelist; + pagelistinfo->pagelist_buffer_size = pagelist_size; + pagelistinfo->dma_addr = dma_addr; ++ pagelistinfo->is_from_pool = is_from_pool; + pagelistinfo->dma_dir = (type == PAGELIST_WRITE) ? + DMA_TO_DEVICE : DMA_FROM_DEVICE; + pagelistinfo->num_pages = num_pages; diff --git a/target/linux/brcm2708/patches-4.19/950-0142-BCM2708_DT-Use-upstreamed-GPIO-expander-driver.patch b/target/linux/brcm2708/patches-4.19/950-0142-BCM2708_DT-Use-upstreamed-GPIO-expander-driver.patch new file mode 100644 index 000000000..4da560fa8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0142-BCM2708_DT-Use-upstreamed-GPIO-expander-driver.patch @@ -0,0 +1,50 @@ +From e40969b6e1a0818b016646c449d3fbc7e5c8b608 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 8 Oct 2018 12:20:36 +0100 +Subject: [PATCH 142/703] BCM2708_DT: Use upstreamed GPIO expander driver + +The upstreamed driver for the GPIO expander has a different compatible +string. Change the relevant Device Tree files to match. + +See: https://github.com/raspberrypi/linux/issues/2704 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 2 +- + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 2 +- + arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -84,7 +84,7 @@ + + &soc { + expgpio: expgpio { +- compatible = "brcm,bcm2835-expgpio"; ++ compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -92,7 +92,7 @@ + }; + + expgpio: expgpio { +- compatible = "brcm,bcm2835-expgpio"; ++ compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; +--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts +@@ -52,7 +52,7 @@ + }; + + expgpio: expgpio { +- compatible = "brcm,bcm2835-expgpio"; ++ compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; + firmware = <&firmware>; diff --git a/target/linux/brcm2708/patches-4.19/950-0143-overlays-Fix-a-few-dtc-warnings.patch b/target/linux/brcm2708/patches-4.19/950-0143-overlays-Fix-a-few-dtc-warnings.patch new file mode 100644 index 000000000..155ad28c5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0143-overlays-Fix-a-few-dtc-warnings.patch @@ -0,0 +1,179 @@ +From 17ded7b344a73b5a590ca8dc4599ac1ad3c1edb7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 8 Oct 2018 17:16:28 +0100 +Subject: [PATCH 143/703] overlays: Fix a few dtc warnings + +Signed-off-by: Phil Elwell +--- + .../overlays/pitft28-resistive-overlay.dts | 2 -- + .../overlays/pitft35-resistive-overlay.dts | 2 -- + .../arm/boot/dts/overlays/qca7000-overlay.dts | 13 ++++++---- + .../overlays/rpi-cirrus-wm5102-overlay.dts | 26 ++++++++++++------- + arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 11 +++++--- + .../boot/dts/overlays/smi-nand-overlay.dts | 3 --- + .../boot/dts/overlays/tinylcd35-overlay.dts | 2 -- + 7 files changed, 31 insertions(+), 28 deletions(-) + +--- a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts +@@ -64,8 +64,6 @@ + }; + + pitft_ts@1 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stmpe610"; + reg = <1>; + +--- a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts +@@ -64,8 +64,6 @@ + }; + + pitft_ts@1 { +- #address-cells = <1>; +- #size-cells = <0>; + compatible = "st,stmpe610"; + reg = <1>; + +--- a/arch/arm/boot/dts/overlays/qca7000-overlay.dts ++++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts +@@ -8,6 +8,13 @@ + compatible = "brcm,bcm2708"; + + fragment@0 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ +@@ -16,10 +23,6 @@ + + status = "okay"; + +- spidev@0 { +- status = "disabled"; +- }; +- + eth1: qca7000@0 { + compatible = "qca,qca7000"; + reg = <0>; /* CE0 */ +@@ -33,7 +36,7 @@ + }; + }; + +- fragment@1 { ++ fragment@2 { + target = <&gpio>; + __overlay__ { + eth1_pins: eth1_pins { +--- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts +@@ -44,20 +44,26 @@ + }; + + fragment@3 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@5 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + +- spidev@0{ +- status = "disabled"; +- }; +- +- spidev@1{ +- status = "disabled"; +- }; +- + wm5102@1{ + compatible = "wlf,wm5102"; + reg = <1>; +@@ -117,7 +123,7 @@ + }; + }; + +- fragment@4 { ++ fragment@6 { + target = <&i2c1>; + __overlay__ { + status = "okay"; +@@ -135,7 +141,7 @@ + }; + }; + +- fragment@5 { ++ fragment@7 { + target = <&sound>; + __overlay__ { + compatible = "wlf,rpi-cirrus"; +--- a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts +@@ -7,6 +7,13 @@ + compatible = "brcm,bcm2708", "brcm,bcm2709"; + + fragment@0 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { + target = <&spi0>; + __overlay__ { + /* needed to avoid dtc warning */ +@@ -15,10 +22,6 @@ + + status = "okay"; + +- spidev@0 { +- status = "disabled"; +- }; +- + cxd2880@0 { + compatible = "sony,cxd2880"; + reg = <0>; /* CE0 */ +--- a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts ++++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts +@@ -20,9 +20,6 @@ + fragment@1 { + target = <&soc>; + __overlay__ { +- #address-cells = <1>; +- #size-cells = <1>; +- + nand: flash@0 { + compatible = "brcm,bcm2835-smi-nand"; + smi_handle = <&smi>; +--- a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts +@@ -171,8 +171,6 @@ + __overlay__ { + keypad: keypad { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&keypad_pins>; + status = "disabled"; diff --git a/target/linux/brcm2708/patches-4.9/950-0176-BCM270X-Disable-VEC-unless-vc4-kms-v3d-is-present.patch b/target/linux/brcm2708/patches-4.19/950-0144-bcm2708-rpi-Disable-txp-interrupt-unless-using-vc4-k.patch similarity index 51% rename from target/linux/brcm2708/patches-4.9/950-0176-BCM270X-Disable-VEC-unless-vc4-kms-v3d-is-present.patch rename to target/linux/brcm2708/patches-4.19/950-0144-bcm2708-rpi-Disable-txp-interrupt-unless-using-vc4-k.patch index 42c39650e..562be8afd 100644 --- a/target/linux/brcm2708/patches-4.9/950-0176-BCM270X-Disable-VEC-unless-vc4-kms-v3d-is-present.patch +++ b/target/linux/brcm2708/patches-4.19/950-0144-bcm2708-rpi-Disable-txp-interrupt-unless-using-vc4-k.patch @@ -1,9 +1,10 @@ -From 323d84f926d907f424c3e55bec55ec84a9d04657 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 23 Jan 2017 11:41:54 -0800 -Subject: [PATCH] BCM270X: Disable VEC unless vc4-kms-v3d is present. +From 158c6b75bd52edff52b9499313935c9d0f154eb2 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Wed, 17 Oct 2018 16:32:52 +0100 +Subject: [PATCH 144/703] bcm2708-rpi: Disable txp interrupt unless using + vc4-kms-v3d overlay -Signed-off-by: Eric Anholt +Signed-off-by: popcornmix --- arch/arm/boot/dts/bcm2708-rpi.dtsi | 4 ++++ arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 7 +++++++ @@ -11,22 +12,25 @@ Signed-off-by: Eric Anholt --- a/arch/arm/boot/dts/bcm2708-rpi.dtsi +++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi -@@ -107,3 +107,7 @@ - &usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; - }; +@@ -89,6 +89,10 @@ + sound: sound { + status = "disabled"; + }; + -+&vec { -+ status = "disabled"; -+}; ++ txp: txp@7e004000 { ++ status = "disabled"; ++ }; + }; + + __overrides__ { --- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts +++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -@@ -148,6 +148,13 @@ +@@ -141,6 +141,13 @@ }; }; -+ fragment@18 { -+ target = <&vec>; ++ fragment@17 { ++ target = <&txp>; + __overlay__ { + status = "okay"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0145-config-Enable-Raspberry-Pi-voltage-monitor.patch b/target/linux/brcm2708/patches-4.19/950-0145-config-Enable-Raspberry-Pi-voltage-monitor.patch new file mode 100644 index 000000000..2edec9381 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0145-config-Enable-Raspberry-Pi-voltage-monitor.patch @@ -0,0 +1,34 @@ +From 3af123f416cbd52069f8479ece21e0564317cbb3 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 6 Oct 2018 16:45:41 +0200 +Subject: [PATCH 145/703] config: Enable Raspberry Pi voltage monitor + +This enables the Raspberry Pi voltage monitor as a replacement +for the get_trottled sysfs approach in the firmware driver. + +Signed-off-by: Stefan Wahren +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -659,6 +659,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RASPBERRYPI_HWMON=m + CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -652,6 +652,7 @@ CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RASPBERRYPI_HWMON=m + CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m diff --git a/target/linux/brcm2708/patches-4.19/950-0146-hwmon-raspberrypi-Prevent-voltage-low-warnings-from-.patch b/target/linux/brcm2708/patches-4.19/950-0146-hwmon-raspberrypi-Prevent-voltage-low-warnings-from-.patch new file mode 100644 index 000000000..992ef62c2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0146-hwmon-raspberrypi-Prevent-voltage-low-warnings-from-.patch @@ -0,0 +1,75 @@ +From 639d584d74593084469286e33cbf8c6b2be9d1a5 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 6 Oct 2018 16:46:18 +0200 +Subject: [PATCH 146/703] hwmon: raspberrypi: Prevent voltage low warnings from + filling log + +Although the correct fix for low voltage warnings is to +improve the power supply, the current implementation +of the detection can fill the log if the warning +happens freqently. This replaces the logging with +slightly custom ratelimited logging. + +Signed-off-by: James Hughes +Signed-off-by: Stefan Wahren +--- + drivers/hwmon/raspberrypi-hwmon.c | 41 ++++++++++++++++++++++++++++--- + 1 file changed, 37 insertions(+), 4 deletions(-) + +--- a/drivers/hwmon/raspberrypi-hwmon.c ++++ b/drivers/hwmon/raspberrypi-hwmon.c +@@ -15,6 +15,36 @@ + #include + #include + ++/* ++ * This section defines some rate limited logging that prevent ++ * repeated messages at much lower Hz than the default kernel settings. ++ * It's usually 5s, this is 5 minutes. ++ * Burst 3 means you may get three messages 'quickly', before ++ * the ratelimiting kicks in. ++ */ ++#define LOCAL_RATELIMIT_INTERVAL (5 * 60 * HZ) ++#define LOCAL_RATELIMIT_BURST 3 ++ ++#ifdef CONFIG_PRINTK ++#define printk_ratelimited_local(fmt, ...) \ ++({ \ ++ static DEFINE_RATELIMIT_STATE(_rs, \ ++ LOCAL_RATELIMIT_INTERVAL, \ ++ LOCAL_RATELIMIT_BURST); \ ++ \ ++ if (__ratelimit(&_rs)) \ ++ printk(fmt, ##__VA_ARGS__); \ ++}) ++#else ++#define printk_ratelimited_local(fmt, ...) \ ++ no_printk(fmt, ##__VA_ARGS__) ++#endif ++ ++#define pr_crit_ratelimited_local(fmt, ...) \ ++ printk_ratelimited_local(KERN_CRIT pr_fmt(fmt), ##__VA_ARGS__) ++#define pr_info_ratelimited_local(fmt, ...) \ ++printk_ratelimited_local(KERN_INFO pr_fmt(fmt), ##__VA_ARGS__) ++ + #define UNDERVOLTAGE_STICKY_BIT BIT(16) + + struct rpi_hwmon_data { +@@ -47,10 +77,13 @@ static void rpi_firmware_get_throttled(s + if (new_uv == old_uv) + return; + +- if (new_uv) +- dev_crit(data->hwmon_dev, "Undervoltage detected!\n"); +- else +- dev_info(data->hwmon_dev, "Voltage normalised\n"); ++ if (new_uv) { ++ pr_crit_ratelimited_local("Under-voltage detected! (0x%08x)\n", ++ value); ++ } else { ++ pr_info_ratelimited_local("Voltage normalised (0x%08x)\n", ++ value); ++ } + + sysfs_notify(&data->hwmon_dev->kobj, NULL, "in0_lcrit_alarm"); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0147-firmware-raspberrypi-Add-backward-compatible-get_thr.patch b/target/linux/brcm2708/patches-4.19/950-0147-firmware-raspberrypi-Add-backward-compatible-get_thr.patch new file mode 100644 index 000000000..7df7780b4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0147-firmware-raspberrypi-Add-backward-compatible-get_thr.patch @@ -0,0 +1,79 @@ +From 2f40de9f47b7bcf5677a110d4207bbf65e02049c Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 13 Oct 2018 13:31:21 +0200 +Subject: [PATCH 147/703] firmware: raspberrypi: Add backward compatible + get_throttled + +Avoid a hard userspace ABI change by adding a compatible get_throttled +sysfs entry. Its value is now feed by the GET_THROTTLED requests of the +new hwmon driver. The first access to get_throttled will generate +a warning. + +Signed-off-by: Stefan Wahren +--- + drivers/firmware/raspberrypi.c | 33 +++++++++++++++++++++++++++++++++ + 1 file changed, 33 insertions(+) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -31,6 +31,7 @@ struct rpi_firmware { + struct mbox_chan *chan; /* The property channel. */ + struct completion c; + u32 enabled; ++ u32 get_throttled; + }; + + static struct platform_device *g_pdev; +@@ -171,6 +172,12 @@ int rpi_firmware_property(struct rpi_fir + data + sizeof(struct rpi_firmware_property_tag_header), + buf_size); + ++ if ((tag == RPI_FIRMWARE_GET_THROTTLED) && ++ memcmp(&fw->get_throttled, tag_data, sizeof(fw->get_throttled))) { ++ memcpy(&fw->get_throttled, tag_data, sizeof(fw->get_throttled)); ++ sysfs_notify(&fw->cl.dev->kobj, NULL, "get_throttled"); ++ } ++ + return ret; + } + EXPORT_SYMBOL_GPL(rpi_firmware_property); +@@ -195,6 +202,27 @@ static int rpi_firmware_notify_reboot(st + return 0; + } + ++static ssize_t get_throttled_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rpi_firmware *fw = dev_get_drvdata(dev); ++ ++ WARN_ONCE(1, "deprecated, use hwmon sysfs instead\n"); ++ ++ return sprintf(buf, "%x\n", fw->get_throttled); ++} ++ ++static DEVICE_ATTR_RO(get_throttled); ++ ++static struct attribute *rpi_firmware_dev_attrs[] = { ++ &dev_attr_get_throttled.attr, ++ NULL, ++}; ++ ++static const struct attribute_group rpi_firmware_dev_group = { ++ .attrs = rpi_firmware_dev_attrs, ++}; ++ + static void + rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) + { +@@ -227,6 +255,11 @@ rpi_register_hwmon_driver(struct device + + rpi_hwmon = platform_device_register_data(dev, "raspberrypi-hwmon", + -1, NULL, 0); ++ ++ if (!IS_ERR_OR_NULL(rpi_hwmon)) { ++ if (devm_device_add_group(dev, &rpi_firmware_dev_group)) ++ dev_err(dev, "Failed to create get_trottled attr\n"); ++ } + } + + static int rpi_firmware_probe(struct platform_device *pdev) diff --git a/target/linux/brcm2708/patches-4.19/950-0148-Increase-firmware-call-buffer-size-to-48-bytes.patch b/target/linux/brcm2708/patches-4.19/950-0148-Increase-firmware-call-buffer-size-to-48-bytes.patch new file mode 100644 index 000000000..49c7864cf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0148-Increase-firmware-call-buffer-size-to-48-bytes.patch @@ -0,0 +1,28 @@ +From bee18e4688b1ac325f91dd4aee8672f6201d0a8d Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Wed, 31 Oct 2018 13:00:46 +0000 +Subject: [PATCH 148/703] Increase firmware call buffer size to 48 bytes + +An assumption was made in commit a1547e0bc that 32 bytes +would be enough data buffer size for all firmware calls. However, +the axi performance monitor driver uses a call with 44 bytes +(RPI_FIRMWARE_GET_PERIPH_REG) to get the VC registers values. + +Increase value to 48 to take this in to account. + +Signed-off-by: James Hughes +--- + drivers/firmware/raspberrypi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -22,7 +22,7 @@ + #define MBOX_DATA28(msg) ((msg) & ~0xf) + #define MBOX_CHAN_PROPERTY 8 + +-#define MAX_RPI_FW_PROP_BUF_SIZE 32 ++#define MAX_RPI_FW_PROP_BUF_SIZE 48 + + static struct platform_device *rpi_hwmon; + diff --git a/target/linux/brcm2708/patches-4.19/950-0149-sc16is7xx-Don-t-spin-if-no-data-received.patch b/target/linux/brcm2708/patches-4.19/950-0149-sc16is7xx-Don-t-spin-if-no-data-received.patch new file mode 100644 index 000000000..7d6947ef9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0149-sc16is7xx-Don-t-spin-if-no-data-received.patch @@ -0,0 +1,23 @@ +From 6a47065f2c10f857ec32786d0c4f2e1c46aed98b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 6 Nov 2018 12:57:48 +0000 +Subject: [PATCH 149/703] sc16is7xx: Don't spin if no data received + +See: https://github.com/raspberrypi/linux/issues/2676 + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/sc16is7xx.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/tty/serial/sc16is7xx.c ++++ b/drivers/tty/serial/sc16is7xx.c +@@ -678,6 +678,8 @@ static bool sc16is7xx_port_irq(struct sc + rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG); + if (rxlen) + sc16is7xx_handle_rx(port, rxlen, iir); ++ else ++ return false; + break; + case SC16IS7XX_IIR_THRI_SRC: + sc16is7xx_handle_tx(port); diff --git a/target/linux/brcm2708/patches-4.19/950-0150-configs-Rebuild-bcmrpi3_defconfig-to-fix-warnings.patch b/target/linux/brcm2708/patches-4.19/950-0150-configs-Rebuild-bcmrpi3_defconfig-to-fix-warnings.patch new file mode 100644 index 000000000..bb45972cd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0150-configs-Rebuild-bcmrpi3_defconfig-to-fix-warnings.patch @@ -0,0 +1,326 @@ +From 00fd230b49fe86d0458b3fbd92b9c556c1433fe4 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 12 Nov 2018 21:42:00 +0000 +Subject: [PATCH 150/703] configs: Rebuild bcmrpi3_defconfig to fix warnings + +Also disable CONFIG_MMC_BCM2835 to avoid a runtime conflict. + +Signed-off-by: Phil Elwell +--- + arch/arm64/configs/bcmrpi3_defconfig | 148 +++++++-------------------- + 1 file changed, 37 insertions(+), 111 deletions(-) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -4,6 +4,7 @@ CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y + CONFIG_NO_HZ=y + CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT=y + CONFIG_BSD_PROCESS_ACCT=y + CONFIG_BSD_PROCESS_ACCT_V3=y + CONFIG_TASKSTATS=y +@@ -25,29 +26,13 @@ CONFIG_BLK_DEV_INITRD=y + CONFIG_EMBEDDED=y + # CONFIG_COMPAT_BRK is not set + CONFIG_PROFILING=y +-CONFIG_KPROBES=y +-CONFIG_JUMP_LABEL=y +-CONFIG_MODULES=y +-CONFIG_MODULE_UNLOAD=y +-CONFIG_MODVERSIONS=y +-CONFIG_MODULE_SRCVERSION_ALL=y +-CONFIG_BLK_DEV_THROTTLING=y +-CONFIG_PARTITION_ADVANCED=y +-CONFIG_MAC_PARTITION=y +-CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_ARCH_BCM2835=y + # CONFIG_CAVIUM_ERRATUM_22375 is not set + # CONFIG_CAVIUM_ERRATUM_23154 is not set + # CONFIG_CAVIUM_ERRATUM_27456 is not set + CONFIG_SCHED_MC=y + CONFIG_NR_CPUS=4 +-CONFIG_PREEMPT=y + CONFIG_HZ_1000=y +-CONFIG_CLEANCACHE=y +-CONFIG_FRONTSWAP=y +-CONFIG_CMA=y +-CONFIG_ZSMALLOC=m +-CONFIG_PGTABLE_MAPPING=y + CONFIG_SECCOMP=y + CONFIG_ARMV8_DEPRECATED=y + CONFIG_SWP_EMULATION=y +@@ -55,7 +40,6 @@ CONFIG_CP15_BARRIER_EMULATION=y + CONFIG_SETEND_EMULATION=y + CONFIG_RANDOMIZE_BASE=y + CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" +-CONFIG_BINFMT_MISC=y + CONFIG_COMPAT=y + # CONFIG_SUSPEND is not set + CONFIG_PM=y +@@ -69,6 +53,25 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y + CONFIG_CPU_FREQ_GOV_ONDEMAND=y + CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y + CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_RASPBERRYPI_FIRMWARE=y ++CONFIG_ARM64_CRYPTO=y ++CONFIG_CRYPTO_AES_ARM64_BS=m ++CONFIG_KPROBES=y ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y ++CONFIG_BINFMT_MISC=y ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_CMA=y ++CONFIG_ZSMALLOC=m ++CONFIG_PGTABLE_MAPPING=y + CONFIG_NET=y + CONFIG_PACKET=y + CONFIG_UNIX=y +@@ -98,6 +101,8 @@ CONFIG_INET_XFRM_MODE_TRANSPORT=m + CONFIG_INET_XFRM_MODE_TUNNEL=m + CONFIG_INET_XFRM_MODE_BEET=m + CONFIG_INET_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m + CONFIG_IPV6=m + CONFIG_IPV6_ROUTER_PREF=y + CONFIG_INET6_AH=m +@@ -212,7 +217,6 @@ CONFIG_IP_VS_SED=m + CONFIG_IP_VS_NQ=m + CONFIG_IP_VS_FTP=m + CONFIG_IP_VS_PE_SIP=m +-CONFIG_NF_CONNTRACK_IPV4=m + CONFIG_IP_NF_IPTABLES=m + CONFIG_IP_NF_MATCH_AH=m + CONFIG_IP_NF_MATCH_ECN=m +@@ -232,7 +236,6 @@ CONFIG_IP_NF_RAW=m + CONFIG_IP_NF_ARPTABLES=m + CONFIG_IP_NF_ARPFILTER=m + CONFIG_IP_NF_ARP_MANGLE=m +-CONFIG_NF_CONNTRACK_IPV6=m + CONFIG_IP6_NF_IPTABLES=m + CONFIG_IP6_NF_MATCH_AH=m + CONFIG_IP6_NF_MATCH_EUI64=m +@@ -306,11 +309,9 @@ CONFIG_NET_SCH_CHOKE=m + CONFIG_NET_SCH_QFQ=m + CONFIG_NET_SCH_CODEL=m + CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_FQ=m + CONFIG_NET_SCH_INGRESS=m + CONFIG_NET_SCH_PLUG=m +-CONFIG_NET_SCH_FQ=m +-CONFIG_TCP_CONG_ADVANCED=y +-CONFIG_TCP_CONG_BBR=m + CONFIG_NET_CLS_BASIC=m + CONFIG_NET_CLS_TCINDEX=m + CONFIG_NET_CLS_ROUTE4=m +@@ -469,7 +470,6 @@ CONFIG_USB_NET_SR9700=m + CONFIG_USB_NET_SR9800=m + CONFIG_USB_NET_SMSC75XX=m + CONFIG_USB_NET_SMSC95XX=y +-CONFIG_USB_LAN78XX=y + CONFIG_USB_NET_GL620A=m + CONFIG_USB_NET_NET1080=m + CONFIG_USB_NET_PLUSB=m +@@ -591,7 +591,6 @@ CONFIG_HW_RANDOM=y + CONFIG_RAW_DRIVER=y + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m +-CONFIG_I2C_MUX_PCA954x=m + CONFIG_I2C_BCM2708=m + CONFIG_I2C_BCM2835=m + CONFIG_I2C_GPIO=m +@@ -603,7 +602,6 @@ CONFIG_PPS=m + CONFIG_PPS_CLIENT_LDISC=m + CONFIG_PPS_CLIENT_GPIO=m + CONFIG_GPIO_SYSFS=y +-CONFIG_GPIO_BCM_EXP=y + CONFIG_GPIO_BCM_VIRT=y + CONFIG_GPIO_ARIZONA=m + CONFIG_GPIO_STMPE=y +@@ -620,7 +618,6 @@ CONFIG_W1_SLAVE_DS2406=m + CONFIG_W1_SLAVE_DS2423=m + CONFIG_W1_SLAVE_DS2431=m + CONFIG_W1_SLAVE_DS2433=m +-CONFIG_W1_SLAVE_DS2760=m + CONFIG_W1_SLAVE_DS2780=m + CONFIG_W1_SLAVE_DS2781=m + CONFIG_W1_SLAVE_DS28E04=m +@@ -640,17 +637,6 @@ CONFIG_STMPE_SPI=y + CONFIG_MFD_ARIZONA_I2C=m + CONFIG_MFD_ARIZONA_SPI=m + CONFIG_MFD_WM5102=y +-CONFIG_LIRC=m +-CONFIG_RC_DEVICES=y +-CONFIG_RC_ATI_REMOTE=m +-CONFIG_IR_IMON=m +-CONFIG_IR_MCEUSB=m +-CONFIG_IR_REDRAT3=m +-CONFIG_IR_STREAMZAP=m +-CONFIG_IR_IGUANA=m +-CONFIG_IR_TTUSBIR=m +-CONFIG_RC_LOOPBACK=m +-CONFIG_IR_GPIO_CIR=m + CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +@@ -721,41 +707,7 @@ CONFIG_VIDEO_GO7007=m + CONFIG_VIDEO_GO7007_USB=m + CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m + CONFIG_VIDEO_AU0828=m +-CONFIG_VIDEO_AU0828_RC=y +-CONFIG_VIDEO_CX231XX=m +-CONFIG_VIDEO_CX231XX_ALSA=m +-CONFIG_VIDEO_CX231XX_DVB=m +-CONFIG_VIDEO_TM6000=m +-CONFIG_VIDEO_TM6000_ALSA=m +-CONFIG_VIDEO_TM6000_DVB=m +-CONFIG_DVB_USB=m +-CONFIG_DVB_USB_A800=m +-CONFIG_DVB_USB_DIBUSB_MB=m +-CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y +-CONFIG_DVB_USB_DIBUSB_MC=m +-CONFIG_DVB_USB_DIB0700=m +-CONFIG_DVB_USB_UMT_010=m +-CONFIG_DVB_USB_CXUSB=m +-CONFIG_DVB_USB_M920X=m +-CONFIG_DVB_USB_DIGITV=m +-CONFIG_DVB_USB_VP7045=m +-CONFIG_DVB_USB_VP702X=m +-CONFIG_DVB_USB_GP8PSK=m +-CONFIG_DVB_USB_NOVA_T_USB2=m +-CONFIG_DVB_USB_TTUSB2=m +-CONFIG_DVB_USB_DTT200U=m +-CONFIG_DVB_USB_OPERA1=m +-CONFIG_DVB_USB_AF9005=m +-CONFIG_DVB_USB_AF9005_REMOTE=m +-CONFIG_DVB_USB_PCTV452E=m +-CONFIG_DVB_USB_DW2102=m +-CONFIG_DVB_USB_CINERGY_T2=m +-CONFIG_DVB_USB_DTV5100=m +-CONFIG_DVB_USB_FRIIO=m +-CONFIG_DVB_USB_AZ6027=m +-CONFIG_DVB_USB_TECHNISAT_USB2=m + CONFIG_DVB_USB_V2=m +-CONFIG_DVB_USB_AF9015=m + CONFIG_DVB_USB_AF9035=m + CONFIG_DVB_USB_ANYSEE=m + CONFIG_DVB_USB_AU6610=m +@@ -763,9 +715,7 @@ CONFIG_DVB_USB_AZ6007=m + CONFIG_DVB_USB_CE6230=m + CONFIG_DVB_USB_EC168=m + CONFIG_DVB_USB_GL861=m +-CONFIG_DVB_USB_LME2510=m + CONFIG_DVB_USB_MXL111SF=m +-CONFIG_DVB_USB_RTL28XXU=m + CONFIG_DVB_USB_DVBSKY=m + CONFIG_SMS_USB_DRV=m + CONFIG_DVB_B2C2_FLEXCOP_USB=m +@@ -775,7 +725,7 @@ CONFIG_VIDEO_EM28XX_V4L2=m + CONFIG_VIDEO_EM28XX_ALSA=m + CONFIG_VIDEO_EM28XX_DVB=m + CONFIG_V4L_PLATFORM_DRIVERS=y +-CONFIG_RADIO_SI470X=y ++CONFIG_RADIO_SI470X=m + CONFIG_USB_SI470X=m + CONFIG_I2C_SI470X=m + CONFIG_RADIO_SI4713=m +@@ -1019,7 +969,6 @@ CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SDHCI_IPROC=m + CONFIG_MMC_SPI=m +-CONFIG_MMC_BCM2835=y + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y + CONFIG_LEDS_TRIGGER_TIMER=y +@@ -1073,20 +1022,6 @@ CONFIG_DMA_BCM2708=y + CONFIG_UIO=m + CONFIG_UIO_PDRV_GENIRQ=m + CONFIG_STAGING=y +-CONFIG_IRDA=m +-CONFIG_IRLAN=m +-CONFIG_IRNET=m +-CONFIG_IRCOMM=m +-CONFIG_IRDA_ULTRA=y +-CONFIG_IRDA_CACHE_LAST_LSAP=y +-CONFIG_IRDA_FAST_RR=y +-CONFIG_IRTTY_SIR=m +-CONFIG_KINGSUN_DONGLE=m +-CONFIG_KSDAZZLE_DONGLE=m +-CONFIG_KS959_DONGLE=m +-CONFIG_USB_IRDA=m +-CONFIG_SIGMATEL_FIR=m +-CONFIG_MCS_FIR=m + CONFIG_PRISM2_USB=m + CONFIG_R8712U=m + CONFIG_R8188EU=m +@@ -1094,8 +1029,6 @@ CONFIG_VT6656=m + CONFIG_SPEAKUP=m + CONFIG_SPEAKUP_SYNTH_SOFT=m + CONFIG_STAGING_MEDIA=y +-CONFIG_LIRC_STAGING=y +-CONFIG_LIRC_RPI=m + CONFIG_FB_TFT=m + CONFIG_FB_TFT_AGM1264K_FL=m + CONFIG_FB_TFT_BD663474=m +@@ -1143,7 +1076,6 @@ CONFIG_DHT11=m + CONFIG_HTU21=m + CONFIG_PWM_BCM2835=m + CONFIG_PWM_PCA9685=m +-CONFIG_RASPBERRYPI_FIRMWARE=y + CONFIG_EXT4_FS=y + CONFIG_EXT4_FS_POSIX_ACL=y + CONFIG_EXT4_FS_SECURITY=y +@@ -1255,19 +1187,6 @@ CONFIG_NLS_ISO8859_15=m + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m + CONFIG_DLM=m +-CONFIG_PRINTK_TIME=y +-CONFIG_BOOT_PRINTK_DELAY=y +-CONFIG_DEBUG_MEMORY_INIT=y +-CONFIG_DETECT_HUNG_TASK=y +-CONFIG_LATENCYTOP=y +-CONFIG_IRQSOFF_TRACER=y +-CONFIG_SCHED_TRACER=y +-CONFIG_STACK_TRACER=y +-CONFIG_BLK_DEV_IO_TRACE=y +-CONFIG_FUNCTION_PROFILER=y +-CONFIG_KGDB=y +-CONFIG_KGDB_KDB=y +-CONFIG_KDB_KEYBOARD=y + CONFIG_CRYPTO_USER=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_CTS=m +@@ -1279,11 +1198,18 @@ CONFIG_CRYPTO_CAST5=m + CONFIG_CRYPTO_DES=y + CONFIG_CRYPTO_LZ4=m + CONFIG_CRYPTO_USER_API_SKCIPHER=m +-CONFIG_ARM64_CRYPTO=y +-CONFIG_CRYPTO_AES_ARM64=m +-CONFIG_CRYPTO_AES_ARM64_BS=m +-CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m + CONFIG_CRC_ITU_T=y + CONFIG_LIBCRC32C=y +-CONFIG_MMC_BCM2835_MMC=y +-CONFIG_MMC_SDHCI_IPROC=m ++CONFIG_PRINTK_TIME=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_LATENCYTOP=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y diff --git a/target/linux/brcm2708/patches-4.19/950-0151-brcmfmac-Disable-ARP-offloading-when-promiscuous.patch b/target/linux/brcm2708/patches-4.19/950-0151-brcmfmac-Disable-ARP-offloading-when-promiscuous.patch new file mode 100644 index 000000000..27f889482 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0151-brcmfmac-Disable-ARP-offloading-when-promiscuous.patch @@ -0,0 +1,68 @@ +From 80cebfc3a14a2645e99baa0a72587e25961e178f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 24 Aug 2017 16:16:16 +0100 +Subject: [PATCH 151/703] brcmfmac: Disable ARP offloading when promiscuous + +This is a test patch for brcmfmac from Franky Lin at Broadcom to disable +ARP offloading when in promiscuous mode, re-enabling the ability to +sniff ARP packets over WiFi. + +See: https://github.com/raspberrypi/linux/issues/2171 + +Signed-off-by: Phil Elwell +--- + .../net/wireless/broadcom/brcm80211/brcmfmac/core.c | 11 ++++++----- + .../net/wireless/broadcom/brcm80211/brcmfmac/core.h | 1 + + 2 files changed, 7 insertions(+), 5 deletions(-) + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c +@@ -88,25 +88,25 @@ void brcmf_configure_arp_nd_offload(stru + if (err) { + brcmf_dbg(TRACE, "failed to set ARP offload mode to 0x%x, err = %d\n", + mode, err); ++ err = 0; + } else { + err = brcmf_fil_iovar_int_set(ifp, "arpoe", enable); + if (err) { + brcmf_dbg(TRACE, "failed to configure (%d) ARP offload err = %d\n", + enable, err); +- } else { ++ err = 0; ++ } else + brcmf_dbg(TRACE, "successfully configured (%d) ARP offload to 0x%x\n", + enable, mode); +- } + } + + err = brcmf_fil_iovar_int_set(ifp, "ndoe", enable); +- if (err) { ++ if (err) + brcmf_dbg(TRACE, "failed to configure (%d) ND offload err = %d\n", + enable, err); +- } else { ++ else + brcmf_dbg(TRACE, "successfully configured (%d) ND offload to 0x%x\n", + enable, mode); +- } + } + + static void _brcmf_set_multicast_list(struct work_struct *work) +@@ -172,6 +172,7 @@ static void _brcmf_set_multicast_list(st + if (err < 0) + brcmf_err("Setting BRCMF_C_SET_PROMISC failed, %d\n", + err); ++ + brcmf_configure_arp_nd_offload(ifp, !cmd_value); + } + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h +@@ -210,6 +210,7 @@ char *brcmf_ifname(struct brcmf_if *ifp) + struct brcmf_if *brcmf_get_ifp(struct brcmf_pub *drvr, int ifidx); + void brcmf_configure_arp_nd_offload(struct brcmf_if *ifp, bool enable); + int brcmf_net_attach(struct brcmf_if *ifp, bool rtnl_locked); ++void brcmf_configure_arp_nd_offload(struct brcmf_if *ifp, bool enable); + struct brcmf_if *brcmf_add_if(struct brcmf_pub *drvr, s32 bsscfgidx, s32 ifidx, + bool is_p2pdev, const char *name, u8 *mac_addr); + void brcmf_remove_interface(struct brcmf_if *ifp, bool rtnl_locked); diff --git a/target/linux/brcm2708/patches-4.19/950-0152-config-enable-Audio-Graph-Card-module.patch b/target/linux/brcm2708/patches-4.19/950-0152-config-enable-Audio-Graph-Card-module.patch new file mode 100644 index 000000000..9722e2aaf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0152-config-enable-Audio-Graph-Card-module.patch @@ -0,0 +1,31 @@ +From 3267c6df89133ad70bd8bb1e55a5754be716df0e Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Tue, 6 Feb 2018 15:37:22 +0100 +Subject: [PATCH 152/703] config: enable Audio Graph Card module + +Signed-off-by: Matthias Reichl +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -926,6 +926,7 @@ CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m ++CONFIG_SND_AUDIO_GRAPH_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y + CONFIG_UHID=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -919,6 +919,7 @@ CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m ++CONFIG_SND_AUDIO_GRAPH_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y + CONFIG_UHID=m diff --git a/target/linux/brcm2708/patches-4.19/950-0153-config-Add-IPVLAN-module.patch b/target/linux/brcm2708/patches-4.19/950-0153-config-Add-IPVLAN-module.patch new file mode 100644 index 000000000..8bdd1cd37 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0153-config-Add-IPVLAN-module.patch @@ -0,0 +1,30 @@ +From 0de1fec9e76eabe6079fb9984a012cbdee9164a6 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Thu, 29 Mar 2018 16:05:28 +0100 +Subject: [PATCH 153/703] config: Add IPVLAN module + +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -350,6 +350,7 @@ CONFIG_NET_ACT_SKBEDIT=m + CONFIG_NET_ACT_CSUM=m + CONFIG_BATMAN_ADV=m + CONFIG_OPENVSWITCH=m ++CONFIG_NET_L3_MASTER_DEV=y + CONFIG_NET_PKTGEN=m + CONFIG_HAMRADIO=y + CONFIG_AX25=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -344,6 +344,7 @@ CONFIG_NET_ACT_SKBEDIT=m + CONFIG_NET_ACT_CSUM=m + CONFIG_BATMAN_ADV=m + CONFIG_OPENVSWITCH=m ++CONFIG_NET_L3_MASTER_DEV=y + CONFIG_NET_PKTGEN=m + CONFIG_HAMRADIO=y + CONFIG_AX25=m diff --git a/target/linux/brcm2708/patches-4.19/950-0154-config-Add-I2C_TINY_USB-m.patch b/target/linux/brcm2708/patches-4.19/950-0154-config-Add-I2C_TINY_USB-m.patch new file mode 100644 index 000000000..1a88009d5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0154-config-Add-I2C_TINY_USB-m.patch @@ -0,0 +1,35 @@ +From 61df97bfcb573b2361fdbbe0282ba1c5671988dc Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 27 Apr 2018 16:21:33 +0100 +Subject: [PATCH 154/703] config: Add I2C_TINY_USB=m + +Enable the I2C Tiny USB module. + +See: https://github.com/raspberrypi/linux/issues/2535 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 - + arch/arm/configs/bcmrpi_defconfig | 1 - + 2 files changed, 2 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -927,7 +927,6 @@ CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m +-CONFIG_SND_AUDIO_GRAPH_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y + CONFIG_UHID=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -920,7 +920,6 @@ CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m +-CONFIG_SND_AUDIO_GRAPH_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y + CONFIG_UHID=m diff --git a/target/linux/brcm2708/patches-4.19/950-0155-Add-device-tree-overlay-for-HD44780.patch b/target/linux/brcm2708/patches-4.19/950-0155-Add-device-tree-overlay-for-HD44780.patch new file mode 100644 index 000000000..b6aa76b41 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0155-Add-device-tree-overlay-for-HD44780.patch @@ -0,0 +1,105 @@ +From 0950d997c40aa9428b886d7e1af46730b0366513 Mon Sep 17 00:00:00 2001 +From: Jasper Boomer +Date: Sun, 24 Jun 2018 12:20:27 -0400 +Subject: [PATCH 155/703] Add device tree overlay for HD44780 + +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 25 ++++++++++ + .../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 +++++++++++++++++++ + 3 files changed, 72 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -38,6 +38,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + gpio-no-irq.dtbo \ + gpio-poweroff.dtbo \ + gpio-shutdown.dtbo \ ++ hd44780-lcd.dtbo \ + hifiberry-amp.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dacplus.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -639,6 +639,31 @@ Params: gpio_pin GPIO pin + external pullup. + + ++Name: hd44780-lcd ++Info: Configures an HD44780 compatible LCD display. Uses 4 gpio pins for ++ data, 2 gpio pins for enable and register select and 1 optional pin ++ for enabling/disabling the backlight display. ++Load: dtoverlay=hd44780-lcd,= ++Params: pin_d4 GPIO pin for data pin D4 (default 6) ++ ++ pin_d5 GPIO pin for data pin D5 (default 13) ++ ++ pin_d6 GPIO pin for data pin D6 (default 19) ++ ++ pin_d7 GPIO pin for data pin D7 (default 26) ++ ++ pin_en GPIO pin for "Enable" (default 21) ++ ++ pin_rs GPIO pin for "Register Select" (default 20) ++ ++ pin_bl Optional pin for enabling/disabling the ++ display backlight. (default disabled) ++ ++ display_height Height of the display in characters ++ ++ display_width Width of the display in characters ++ ++ + Name: hifiberry-amp + Info: Configures the HifiBerry Amp and Amp+ audio cards + Load: dtoverlay=hifiberry-amp +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts +@@ -0,0 +1,46 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ lcd_screen: auxdisplay { ++ compatible = "hit,hd44780"; ++ ++ data-gpios = <&gpio 6 0>, ++ <&gpio 13 0>, ++ <&gpio 19 0>, ++ <&gpio 26 0>; ++ enable-gpios = <&gpio 21 0>; ++ rs-gpios = <&gpio 20 0>; ++ ++ display-height-chars = <2>; ++ display-width-chars = <16>; ++ }; ++ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&lcd_screen>; ++ __dormant__ { ++ backlight-gpios = <&gpio 12 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ pin_d4 = <&lcd_screen>,"data-gpios:4"; ++ pin_d5 = <&lcd_screen>,"data-gpios:16"; ++ pin_d6 = <&lcd_screen>,"data-gpios:28"; ++ pin_d7 = <&lcd_screen>,"data-gpios:40"; ++ pin_en = <&lcd_screen>,"enable-gpios:4"; ++ pin_rs = <&lcd_screen>,"rs-gpios:4"; ++ pin_bl = <0>,"+1", <&lcd_screen>,"backlight-gpios:4"; ++ display_height = <&lcd_screen>,"display-height-chars:0"; ++ display_width = <&lcd_screen>,"display-width-chars:0"; ++ }; ++ ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0156-Add-hd44780-module-to-defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0156-Add-hd44780-module-to-defconfig.patch new file mode 100644 index 000000000..5c5a2e018 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0156-Add-hd44780-module-to-defconfig.patch @@ -0,0 +1,32 @@ +From 3b04201f52d7a717828ab10a92610edbb99abd23 Mon Sep 17 00:00:00 2001 +From: Jasper Boomer +Date: Mon, 2 Jul 2018 13:16:22 -0400 +Subject: [PATCH 156/703] Add hd44780 module to defconfig + +--- + arch/arm/configs/bcm2709_defconfig | 2 ++ + arch/arm/configs/bcmrpi_defconfig | 2 ++ + 2 files changed, 4 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1155,6 +1155,8 @@ CONFIG_RTC_DRV_RV3029C2=m + CONFIG_DMADEVICES=y + CONFIG_DMA_BCM2835=y + CONFIG_DMA_BCM2708=y ++CONFIG_AUXDISPLAY=y ++CONFIG_HD44780=m + CONFIG_UIO=m + CONFIG_UIO_PDRV_GENIRQ=m + CONFIG_STAGING=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1148,6 +1148,8 @@ CONFIG_RTC_DRV_RV3029C2=m + CONFIG_DMADEVICES=y + CONFIG_DMA_BCM2835=y + CONFIG_DMA_BCM2708=y ++CONFIG_AUXDISPLAY=y ++CONFIG_HD44780=m + CONFIG_UIO=m + CONFIG_UIO_PDRV_GENIRQ=m + CONFIG_STAGING=y diff --git a/target/linux/brcm2708/patches-4.19/950-0157-overlays-Add-addr-parameter-to-i2c-rtc-gpio.patch b/target/linux/brcm2708/patches-4.19/950-0157-overlays-Add-addr-parameter-to-i2c-rtc-gpio.patch new file mode 100644 index 000000000..e20f87c30 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0157-overlays-Add-addr-parameter-to-i2c-rtc-gpio.patch @@ -0,0 +1,111 @@ +From ac46f67a7cd528da77a0483989ad41a71af1d9e5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 9 Jul 2018 21:11:32 +0100 +Subject: [PATCH 157/703] overlays: Add addr parameter to i2c-rtc (& -gpio) + +See: https://github.com/raspberrypi/linux/issues/2611 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 10 +++++++ + .../dts/overlays/i2c-rtc-gpio-overlay.dts | 28 +++++++++++++++++++ + .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 11 ++++++++ + 3 files changed, 49 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -817,6 +817,10 @@ Params: abx80x Select o + + pcf8563 Select the PCF8563 device + ++ addr Sets the address for the RTC. Note that the ++ device must be configured to use the specified ++ address. ++ + trickle-diode-type Diode type for trickle charge - "standard" or + "schottky" (ABx80x only) + +@@ -841,6 +845,8 @@ Params: abx80x Select o + + ds3231 Select the DS3231 device + ++ m41t62 Select the M41T62 device ++ + mcp7940x Select the MCP7940x device + + mcp7941x Select the MCP7941x device +@@ -851,6 +857,10 @@ Params: abx80x Select o + + pcf8563 Select the PCF8563 device + ++ addr Sets the address for the RTC. Note that the ++ device must be configured to use the specified ++ address. ++ + trickle-diode-type Diode type for trickle charge - "standard" or + "schottky" (ABx80x only) + +--- a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts +@@ -159,6 +159,21 @@ + }; + }; + ++ fragment@10 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ m41t62: m41t62@68 { ++ compatible = "st,m41t62"; ++ reg = <0x68>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ + __overrides__ { + abx80x = <0>,"+1"; + ds1307 = <0>,"+2"; +@@ -169,6 +184,19 @@ + pcf2127 = <0>,"+7"; + pcf8523 = <0>,"+8"; + pcf8563 = <0>,"+9"; ++ m41t62 = <0>,"+10"; ++ ++ addr = <&abx80x>, "reg:0", ++ <&ds1307>, "reg:0", ++ <&ds1339>, "reg:0", ++ <&ds3231>, "reg:0", ++ <&mcp7940x>, "reg:0", ++ <&mcp7941x>, "reg:0", ++ <&pcf2127>, "reg:0", ++ <&pcf8523>, "reg:0", ++ <&pcf8563>, "reg:0", ++ <&m41t62>, "reg:0"; ++ + trickle-diode-type = <&abx80x>,"abracon,tc-diode"; + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", + <&abx80x>,"abracon,tc-resistor"; +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -169,6 +169,17 @@ + pcf8523 = <0>,"+7"; + pcf8563 = <0>,"+8"; + m41t62 = <0>,"+9"; ++ ++ addr = <&abx80x>, "reg:0", ++ <&ds1307>, "reg:0", ++ <&ds1339>, "reg:0", ++ <&ds3231>, "reg:0", ++ <&mcp7940x>, "reg:0", ++ <&mcp7941x>, "reg:0", ++ <&pcf2127>, "reg:0", ++ <&pcf8523>, "reg:0", ++ <&pcf8563>, "reg:0", ++ <&m41t62>, "reg:0"; + trickle-diode-type = <&abx80x>,"abracon,tc-diode"; + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", + <&abx80x>,"abracon,tc-resistor"; diff --git a/target/linux/brcm2708/patches-4.19/950-0158-ARM-BCM270X-Add-the-18-bit-DPI-pinmux-to-the-RPI-DTs.patch b/target/linux/brcm2708/patches-4.19/950-0158-ARM-BCM270X-Add-the-18-bit-DPI-pinmux-to-the-RPI-DTs.patch new file mode 100644 index 000000000..77d52eadc --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0158-ARM-BCM270X-Add-the-18-bit-DPI-pinmux-to-the-RPI-DTs.patch @@ -0,0 +1,30 @@ +From 74cbdede7a4a3eed31d508c02503ce06a1d0e7b2 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 9 Mar 2018 14:24:05 -0800 +Subject: [PATCH 158/703] ARM: BCM270X: Add the 18-bit DPI pinmux to the RPI + DTs. + +This doesn't do anything by default, but trying to put the node in an +overlay failed for me. + +Signed-off-by: Eric Anholt +--- + arch/arm/boot/dts/bcm270x.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -19,6 +19,13 @@ + + gpio@7e200000 { /* gpio */ + interrupts = <2 17>, <2 18>; ++ ++ dpi_18bit_gpio0: dpi_18bit_gpio0 { ++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 ++ 12 13 14 15 16 17 18 19 ++ 20 21>; ++ brcm,function = ; ++ }; + }; + + serial@7e201000 { /* uart0 */ diff --git a/target/linux/brcm2708/patches-4.19/950-0159-overlays-Add-an-overlay-for-the-Adafruit-Kippah-with.patch b/target/linux/brcm2708/patches-4.19/950-0159-overlays-Add-an-overlay-for-the-Adafruit-Kippah-with.patch new file mode 100644 index 000000000..5b02eebab --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0159-overlays-Add-an-overlay-for-the-Adafruit-Kippah-with.patch @@ -0,0 +1,86 @@ +From 7c8ccff2dfef1f42ac9e1592a4750b4d9b78ad62 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 9 Mar 2018 13:20:21 -0800 +Subject: [PATCH 159/703] overlays: Add an overlay for the Adafruit Kippah with + their 7" panel + +Signed-off-by: Eric Anholt +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 7 +++ + .../overlays/vc4-kms-kippah-7inch-overlay.dts | 43 +++++++++++++++++++ + 3 files changed, 51 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -134,6 +134,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + upstream.dtbo \ + upstream-aux-interrupt.dtbo \ + vc4-fkms-v3d.dtbo \ ++ vc4-kms-kippah-7inch.dtbo \ + vc4-kms-v3d.dtbo \ + vga666.dtbo \ + w1-gpio.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1920,6 +1920,13 @@ Params: cma-256 CMA is 2 + cma-64 CMA is 64MB, 64MB-aligned + + ++Name: vc4-kms-kippah-7inch ++Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached. ++ Requires vc4-kms-v3d to be loaded. ++Load: dtoverlay=vc4-kms-kippah-7inch ++Params: ++ ++ + Name: vc4-kms-v3d + Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver. Running startx or + booting to GUI while this overlay is in use will cause interesting +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts +@@ -0,0 +1,43 @@ ++/* ++ * vc4-kms-v3d-overlay.dts ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++#include ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ panel: panel { ++ compatible = "ontat,yx700wv03", "simple-panel"; ++ ++ port { ++ panel_in: endpoint { ++ remote-endpoint = <&dpi_out>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&dpi>; ++ __overlay__ { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dpi_18bit_gpio0>; ++ ++ port { ++ dpi_out: endpoint@0 { ++ remote-endpoint = <&panel_in>; ++ }; ++ }; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0160-overlays-Remove-stale-notes-about-vc4-s-CMA-alignmen.patch b/target/linux/brcm2708/patches-4.19/950-0160-overlays-Remove-stale-notes-about-vc4-s-CMA-alignmen.patch new file mode 100644 index 000000000..cb95ac326 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0160-overlays-Remove-stale-notes-about-vc4-s-CMA-alignmen.patch @@ -0,0 +1,51 @@ +From 27d6a0828bacfd0f1d3e0b64176be91a55d2f3ae Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 9 Mar 2018 13:26:33 -0800 +Subject: [PATCH 160/703] overlays: Remove stale notes about vc4's CMA + alignment in the README. + +We haven't needed alignment since +553c942f8b2cbc7394b4d4fa2f848b23a8f07451, and the current overlays +don't specify any. + +Signed-off-by: Eric Anholt +--- + arch/arm/boot/dts/overlays/README | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1913,11 +1913,11 @@ Name: vc4-fkms-v3d + Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx + display stack. + Load: dtoverlay=vc4-fkms-v3d, +-Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB) +- cma-192 CMA is 192MB, 256MB-aligned (needs 1GB) +- cma-128 CMA is 128MB, 128MB-aligned +- cma-96 CMA is 96MB, 128MB-aligned +- cma-64 CMA is 64MB, 64MB-aligned ++Params: cma-256 CMA is 256MB (needs 1GB) ++ cma-192 CMA is 192MB (needs 1GB) ++ cma-128 CMA is 128MB ++ cma-96 CMA is 96MB ++ cma-64 CMA is 64MB + + + Name: vc4-kms-kippah-7inch +@@ -1932,11 +1932,11 @@ Info: Enable Eric Anholt's DRM VC4 HDM + booting to GUI while this overlay is in use will cause interesting + lockups. + Load: dtoverlay=vc4-kms-v3d, +-Params: cma-256 CMA is 256MB, 256MB-aligned (needs 1GB) +- cma-192 CMA is 192MB, 256MB-aligned (needs 1GB) +- cma-128 CMA is 128MB, 128MB-aligned +- cma-96 CMA is 96MB, 128MB-aligned +- cma-64 CMA is 64MB, 64MB-aligned ++Params: cma-256 CMA is 256MB (needs 1GB) ++ cma-192 CMA is 192MB (needs 1GB) ++ cma-128 CMA is 128MB ++ cma-96 CMA is 96MB ++ cma-64 CMA is 64MB + + + Name: vga666 diff --git a/target/linux/brcm2708/patches-4.19/950-0161-spi-Make-GPIO-CSs-honour-the-SPI_NO_CS-flag.patch b/target/linux/brcm2708/patches-4.19/950-0161-spi-Make-GPIO-CSs-honour-the-SPI_NO_CS-flag.patch new file mode 100644 index 000000000..85584d654 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0161-spi-Make-GPIO-CSs-honour-the-SPI_NO_CS-flag.patch @@ -0,0 +1,32 @@ +From ac1bfbc3e45d83d617ce9fbae7522bbd0be3a075 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 3 Jul 2018 14:23:47 +0100 +Subject: [PATCH 161/703] spi: Make GPIO CSs honour the SPI_NO_CS flag + +The SPI configuration state includes an SPI_NO_CS flag that disables +all CS line manipulation, for applications that want to manage their +own chip selects. However, this flag is ignored by the GPIO CS code +in the SPI framework. + +Correct this omission with a trivial patch. + +See: https://github.com/raspberrypi/linux/issues/2169 + +Signed-off-by: Phil Elwell +--- + drivers/spi/spi.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/spi/spi.c ++++ b/drivers/spi/spi.c +@@ -733,7 +733,9 @@ static void spi_set_cs(struct spi_device + enable = !enable; + + if (gpio_is_valid(spi->cs_gpio)) { +- gpio_set_value_cansleep(spi->cs_gpio, !enable); ++ /* Honour the SPI_NO_CS flag */ ++ if (!(spi->mode & SPI_NO_CS)) ++ gpio_set_value_cansleep(spi->cs_gpio, !enable); + /* Some SPI masters need both GPIO CS & slave_select */ + if ((spi->controller->flags & SPI_MASTER_GPIO_SS) && + spi->controller->set_cs) diff --git a/target/linux/brcm2708/patches-4.19/950-0162-devicetree-add-RPi-CM3-dts-to-arm64-mimic-the-RPi-3B.patch b/target/linux/brcm2708/patches-4.19/950-0162-devicetree-add-RPi-CM3-dts-to-arm64-mimic-the-RPi-3B.patch new file mode 100644 index 000000000..06a718ed4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0162-devicetree-add-RPi-CM3-dts-to-arm64-mimic-the-RPi-3B.patch @@ -0,0 +1,30 @@ +From 90e4534cb3d7b7f1810c160734b11adc79dd6422 Mon Sep 17 00:00:00 2001 +From: Steve Pavao +Date: Fri, 10 Aug 2018 17:09:50 -0400 +Subject: [PATCH 162/703] devicetree: add RPi CM3 dts to arm64; mimic the RPi + 3B arm64 dts implementation, by referring to the actual dts file in the arm + directory + +--- + arch/arm64/boot/dts/broadcom/Makefile | 2 ++ + arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts | 3 +++ + 2 files changed, 5 insertions(+) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts + +--- a/arch/arm64/boot/dts/broadcom/Makefile ++++ b/arch/arm64/boot/dts/broadcom/Makefile +@@ -4,6 +4,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp + dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb ++dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb ++dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb + + subdir-y += northstar2 + subdir-y += stingray +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts +@@ -0,0 +1,3 @@ ++#define RPI364 ++ ++#include "../../../../arm/boot/dts/bcm2710-rpi-cm3.dts" diff --git a/target/linux/brcm2708/patches-4.19/950-0163-Add-support-for-audioinjector.net-ultra-soundcard.-2.patch b/target/linux/brcm2708/patches-4.19/950-0163-Add-support-for-audioinjector.net-ultra-soundcard.-2.patch new file mode 100644 index 000000000..63ae9b181 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0163-Add-support-for-audioinjector.net-ultra-soundcard.-2.patch @@ -0,0 +1,141 @@ +From 5565106f860262bde33a49e866090bec4d2602e0 Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Tue, 28 Aug 2018 18:42:13 +1000 +Subject: [PATCH 163/703] Add support for audioinjector.net ultra soundcard. + (#2664) + +Uses the simple-audio-card ALSA machine driver. Sets up the machine +driver in the device tree overlay file. The overlays/Makefile is +altered to add the audioinjector-ultra.dtbo dtb overlay. + +Adds CONFIG_SND_SOC_CS4265 to the defconfig files. + +Signed-off-by: Matt Flax +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 ++ + .../overlays/audioinjector-ultra-overlay.dts | 71 +++++++++++++++++++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 5 files changed, 80 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -15,6 +15,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + applepi-dac.dtbo \ + at86rf233.dtbo \ + audioinjector-addons.dtbo \ ++ audioinjector-ultra.dtbo \ + audioinjector-wm8731-audio.dtbo \ + audremap.dtbo \ + balena-fin.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -389,6 +389,12 @@ Params: non-stop-clocks Keeps th + is paused or stopped (default off) + + ++Name: audioinjector-ultra ++Info: Configures the audioinjector.net ultra soundcard ++Load: dtoverlay=audioinjector-ultra ++Params: ++ ++ + Name: audioinjector-wm8731-audio + Info: Configures the audioinjector.net audio add on soundcard + Load: dtoverlay=audioinjector-wm8731-audio +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts +@@ -0,0 +1,71 @@ ++// Definitions for audioinjector.net audio add on soundcard ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ cs4265: cs4265@4e { ++ #sound-dai-cells = <0>; ++ compatible = "cirrus,cs4265"; ++ reg = <0x4e>; ++ reset-gpios = <&gpio 5 0>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "simple-audio-card"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ ++ simple-audio-card,name = "audioinjector-ultra"; ++ ++ simple-audio-card,widgets = ++ "Line", "OUTPUTS", ++ "Line", "INPUTS"; ++ ++ simple-audio-card,routing = ++ "OUTPUTS","LINEOUTL", ++ "OUTPUTS","LINEOUTR", ++ "OUTPUTS","SPDIFOUT", ++ "LINEINL","INPUTS", ++ "LINEINR","INPUTS", ++ "MICL","INPUTS", ++ "MICR","INPUTS"; ++ ++ simple-audio-card,format = "i2s"; ++ ++ simple-audio-card,bitclock-master = <&sound_master>; ++ simple-audio-card,frame-master = <&sound_master>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++ }; ++ ++ sound_master: simple-audio-card,codec { ++ sound-dai = <&cs4265>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++ }; ++}; +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -926,6 +926,7 @@ CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m ++CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -919,6 +919,7 @@ CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m ++CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y diff --git a/target/linux/brcm2708/patches-4.19/950-0164-ASoC-cs4265-Add-a-S-PDIF-enable-switch.patch b/target/linux/brcm2708/patches-4.19/950-0164-ASoC-cs4265-Add-a-S-PDIF-enable-switch.patch new file mode 100644 index 000000000..608ab2b5f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0164-ASoC-cs4265-Add-a-S-PDIF-enable-switch.patch @@ -0,0 +1,26 @@ +From 42d8389b1b8b22be93aefd995f8a1b818bf1dac5 Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Thu, 30 Aug 2018 09:38:02 +1000 +Subject: [PATCH 164/703] ASoC: cs4265: Add a S/PDIF enable switch + +commit f853d6b3ba345297974d877d8ed0f4a91eaca739 upstream. + +This patch adds a S/PDIF enable switch as a SOC_SINGLE. + +Signed-off-by: Matt Flax +Reviewed-by: Charles Keepax +Signed-off-by: Mark Brown +--- + sound/soc/codecs/cs4265.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/soc/codecs/cs4265.c ++++ b/sound/soc/codecs/cs4265.c +@@ -154,6 +154,7 @@ static const struct snd_kcontrol_new cs4 + SOC_SINGLE("E to F Buffer Disable Switch", CS4265_SPDIF_CTL1, + 6, 1, 0), + SOC_ENUM("C Data Access", cam_mode_enum), ++ SOC_SINGLE("SPDIF Switch", CS4265_SPDIF_CTL2, 5, 1, 1), + SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2, + 3, 1, 0), + SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum), diff --git a/target/linux/brcm2708/patches-4.19/950-0165-ASoC-cs4265-Add-native-32bit-I2S-transport.patch b/target/linux/brcm2708/patches-4.19/950-0165-ASoC-cs4265-Add-native-32bit-I2S-transport.patch new file mode 100644 index 000000000..619b75944 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0165-ASoC-cs4265-Add-native-32bit-I2S-transport.patch @@ -0,0 +1,29 @@ +From acee6587af4d29f9c95fa79f2bbf9cab3a96842e Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Thu, 30 Aug 2018 09:38:01 +1000 +Subject: [PATCH 165/703] ASoC: cs4265: Add native 32bit I2S transport + +commit be47e75eb1419ffc1d9c26230963fd5fa3055097 upstream. + +The cs4265 uses 32 bit transport on the I2S bus. This patch enables native +32 bit mode for machine drivers which use this sound card driver. + +Signed-off-by: Matt Flax +Reviewed-by: Charles Keepax +Signed-off-by: Mark Brown +--- + sound/soc/codecs/cs4265.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/sound/soc/codecs/cs4265.c ++++ b/sound/soc/codecs/cs4265.c +@@ -497,7 +497,8 @@ static int cs4265_set_bias_level(struct + SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) + + #define CS4265_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \ +- SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE) ++ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE | \ ++ SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE) + + static const struct snd_soc_dai_ops cs4265_ops = { + .hw_params = cs4265_pcm_hw_params, diff --git a/target/linux/brcm2708/patches-4.19/950-0166-configs-Add-SENSOR_GPIO_FAN-m.patch b/target/linux/brcm2708/patches-4.19/950-0166-configs-Add-SENSOR_GPIO_FAN-m.patch new file mode 100644 index 000000000..4b1ab9ebf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0166-configs-Add-SENSOR_GPIO_FAN-m.patch @@ -0,0 +1,55 @@ +From b505a24b00c20ca89877ed20599dd4846a7dea83 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 18 Sep 2018 11:03:20 +0100 +Subject: [PATCH 166/703] configs: Add SENSOR_GPIO_FAN=m + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 3 ++- + arch/arm/configs/bcmrpi_defconfig | 3 ++- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -658,6 +658,7 @@ CONFIG_BATTERY_DS2760=m + CONFIG_BATTERY_GAUGE_LTC2941=m + CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_GPIO_FAN=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m + CONFIG_SENSORS_RASPBERRYPI_HWMON=m +@@ -923,10 +924,10 @@ CONFIG_SND_PISOUND=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m +-CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -651,6 +651,7 @@ CONFIG_BATTERY_DS2760=m + CONFIG_BATTERY_GAUGE_LTC2941=m + CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_GPIO_FAN=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m + CONFIG_SENSORS_RASPBERRYPI_HWMON=m +@@ -916,10 +917,10 @@ CONFIG_SND_PISOUND=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SOC_CS4271_I2C=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m +-CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_HID_BATTERY_STRENGTH=y + CONFIG_HIDRAW=y diff --git a/target/linux/brcm2708/patches-4.19/950-0167-BCM270X_DT-Add-gpio-fan-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0167-BCM270X_DT-Add-gpio-fan-overlay.patch new file mode 100644 index 000000000..b4c93c0f7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0167-BCM270X_DT-Add-gpio-fan-overlay.patch @@ -0,0 +1,114 @@ +From 0bcb443fca933a3b5e3c16065696a1949ea8f5eb Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 18 Sep 2018 11:08:07 +0100 +Subject: [PATCH 167/703] BCM270X_DT: Add gpio-fan overlay + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 8 +++ + .../boot/dts/overlays/gpio-fan-overlay.dts | 71 +++++++++++++++++++ + 3 files changed, 80 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -33,6 +33,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + fe-pi-audio.dtbo \ + goodix.dtbo \ + googlevoicehat-soundcard.dtbo \ ++ gpio-fan.dtbo \ + gpio-ir.dtbo \ + gpio-ir-tx.dtbo \ + gpio-key.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -541,6 +541,14 @@ Load: dtoverlay=googlevoicehat-soundca + Params: + + ++Name: gpio-fan ++Info: Configure a GPIO pin to control a cooling fan. ++Load: dtoverlay=gpio-fan,= ++Params: gpiopin GPIO used to control the fan (default 12) ++ temp Temperature at which the fan switches on, in ++ millicelcius (default 55000) ++ ++ + Name: gpio-ir + Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- + based gpio_ir_recv driver maps received keys directly to a +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts +@@ -0,0 +1,71 @@ ++/* ++ * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12. ++ * Optional parameters: ++ * - "gpiopin" - default GPIO12 ++ * - "temp" - default 55000 ++ * Requires: ++ * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m and CONFIG_SENSORS_PWM_FAN=m; ++ * - kernel rebuid; ++ * - DC Fan connected to GPIO via a N-MOSFET (2N7002) ++ * ++ * ┌─────────────────────┐ ++ * │Fan negative terminal│ ++ * └┬────────────────────┘ ++ * │ ++ * │──┘ ++ * [GPIO12]──────┤ │<─┐ 2N7002 ++ * │──┤ ++ * │ ++ * ─┴─ ++ * GND ++ * ++ * sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan.dts ++ * sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000" ++ * or ++ * sudo sh -c "echo '\n# Enable PI GPIO-Fan\ndtoverlay=gpio-fan\n' >> /boot/config.txt" ++ * sudo sh -c "echo '\n# Enable PI GPIO-Fan\ndtoverlay=gpio-fan,gpiopin=12\n' >> /boot/config.txt" ++ * ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/"; ++ __overlay__ { ++ fan0: gpio-fan@0 { ++ compatible = "gpio-fan"; ++ gpios = <&gpio 12 1>; ++ gpio-fan,speed-map = <0 0>, ++ <5000 1>; ++ #cooling-cells = <2>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&cpu_thermal>; ++ polling-delay = <2000>; /* milliseconds */ ++ __overlay__ { ++ trips { ++ cpu_hot: trip-point@0 { ++ temperature = <55000>; /* (millicelsius) Fan started at 55°C */ ++ hysteresis = <5000>; /* (millicelsius) Fan stopped at 50°C */ ++ type = "active"; ++ }; ++ }; ++ cooling-maps { ++ map0 { ++ trip = <&cpu_hot>; ++ cooling-device = <&fan0 1 1>; ++ }; ++ }; ++ }; ++ }; ++ __overrides__ { ++ gpiopin = <&fan0>,"gpios:4", <&fan0>,"brcm,pins:0"; ++ temp = <&cpu_hot>,"temperature:0"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0168-HID-hid-bigbenff-driver-for-BigBen-Interactive-PS3OF.patch b/target/linux/brcm2708/patches-4.19/950-0168-HID-hid-bigbenff-driver-for-BigBen-Interactive-PS3OF.patch new file mode 100644 index 000000000..f24990970 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0168-HID-hid-bigbenff-driver-for-BigBen-Interactive-PS3OF.patch @@ -0,0 +1,484 @@ +From acb48e74935371e095b98d5d8d4c97a577e46b63 Mon Sep 17 00:00:00 2001 +From: Hanno Zulla +Date: Thu, 23 Aug 2018 17:03:38 +0200 +Subject: [PATCH 168/703] HID: hid-bigbenff: driver for BigBen Interactive + PS3OFMINIPAD gamepad + +commit 256a90ed9e46b270bbc4e15ef05216ff049c3721 upstream. + +This is a driver to fix input mapping and add LED & force feedback +support for the "BigBen Interactive Kid-friendly Wired Controller +PS3OFMINIPAD SONY" gamepad with USB id 146b:0902. It was originally +sold as a PS3 accessory and makes a very nice gamepad for Retropie. + +Signed-off-by: Hanno Zulla +Signed-off-by: Jiri Kosina +--- + drivers/hid/Kconfig | 13 ++ + drivers/hid/Makefile | 1 + + drivers/hid/hid-bigbenff.c | 414 +++++++++++++++++++++++++++++++++++++ + drivers/hid/hid-ids.h | 3 + + 4 files changed, 431 insertions(+) + create mode 100644 drivers/hid/hid-bigbenff.c + +--- a/drivers/hid/Kconfig ++++ b/drivers/hid/Kconfig +@@ -182,6 +182,19 @@ config HID_BETOP_FF + Currently the following devices are known to be supported: + - BETOP 2185 PC & BFM MODE + ++config HID_BIGBEN_FF ++ tristate "BigBen Interactive Kids' gamepad support" ++ depends on USB_HID ++ depends on NEW_LEDS ++ depends on LEDS_CLASS ++ select INPUT_FF_MEMLESS ++ default !EXPERT ++ help ++ Support for the "Kid-friendly Wired Controller" PS3OFMINIPAD ++ gamepad made by BigBen Interactive, originally sold as a PS3 ++ accessory. This driver fixes input mapping and adds support for ++ force feedback effects and LEDs on the device. ++ + config HID_CHERRY + tristate "Cherry Cymotion keyboard" + depends on HID +--- a/drivers/hid/Makefile ++++ b/drivers/hid/Makefile +@@ -31,6 +31,7 @@ obj-$(CONFIG_HID_ASUS) += hid-asus.o + obj-$(CONFIG_HID_AUREAL) += hid-aureal.o + obj-$(CONFIG_HID_BELKIN) += hid-belkin.o + obj-$(CONFIG_HID_BETOP_FF) += hid-betopff.o ++obj-$(CONFIG_HID_BIGBEN_FF) += hid-bigbenff.o + obj-$(CONFIG_HID_CHERRY) += hid-cherry.o + obj-$(CONFIG_HID_CHICONY) += hid-chicony.o + obj-$(CONFIG_HID_CMEDIA) += hid-cmedia.o +--- /dev/null ++++ b/drivers/hid/hid-bigbenff.c +@@ -0,0 +1,414 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++ ++/* ++ * LED & force feedback support for BigBen Interactive ++ * ++ * 0x146b:0x0902 "Bigben Interactive Bigben Game Pad" ++ * "Kid-friendly Wired Controller" PS3OFMINIPAD SONY ++ * sold for use with the PS3 ++ * ++ * Copyright (c) 2018 Hanno Zulla ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "hid-ids.h" ++ ++ ++/* ++ * The original descriptor for 0x146b:0x0902 ++ * ++ * 0x05, 0x01, // Usage Page (Generic Desktop Ctrls) ++ * 0x09, 0x05, // Usage (Game Pad) ++ * 0xA1, 0x01, // Collection (Application) ++ * 0x15, 0x00, // Logical Minimum (0) ++ * 0x25, 0x01, // Logical Maximum (1) ++ * 0x35, 0x00, // Physical Minimum (0) ++ * 0x45, 0x01, // Physical Maximum (1) ++ * 0x75, 0x01, // Report Size (1) ++ * 0x95, 0x0D, // Report Count (13) ++ * 0x05, 0x09, // Usage Page (Button) ++ * 0x19, 0x01, // Usage Minimum (0x01) ++ * 0x29, 0x0D, // Usage Maximum (0x0D) ++ * 0x81, 0x02, // Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0x95, 0x03, // Report Count (3) ++ * 0x81, 0x01, // Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0x05, 0x01, // Usage Page (Generic Desktop Ctrls) ++ * 0x25, 0x07, // Logical Maximum (7) ++ * 0x46, 0x3B, 0x01, // Physical Maximum (315) ++ * 0x75, 0x04, // Report Size (4) ++ * 0x95, 0x01, // Report Count (1) ++ * 0x65, 0x14, // Unit (System: English Rotation, Length: Centimeter) ++ * 0x09, 0x39, // Usage (Hat switch) ++ * 0x81, 0x42, // Input (Data,Var,Abs,No Wrap,Linear,Preferred State,Null State) ++ * 0x65, 0x00, // Unit (None) ++ * 0x95, 0x01, // Report Count (1) ++ * 0x81, 0x01, // Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0x26, 0xFF, 0x00, // Logical Maximum (255) ++ * 0x46, 0xFF, 0x00, // Physical Maximum (255) ++ * 0x09, 0x30, // Usage (X) ++ * 0x09, 0x31, // Usage (Y) ++ * 0x09, 0x32, // Usage (Z) ++ * 0x09, 0x35, // Usage (Rz) ++ * 0x75, 0x08, // Report Size (8) ++ * 0x95, 0x04, // Report Count (4) ++ * 0x81, 0x02, // Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0x06, 0x00, 0xFF, // Usage Page (Vendor Defined 0xFF00) ++ * 0x09, 0x20, // Usage (0x20) ++ * 0x09, 0x21, // Usage (0x21) ++ * 0x09, 0x22, // Usage (0x22) ++ * 0x09, 0x23, // Usage (0x23) ++ * 0x09, 0x24, // Usage (0x24) ++ * 0x09, 0x25, // Usage (0x25) ++ * 0x09, 0x26, // Usage (0x26) ++ * 0x09, 0x27, // Usage (0x27) ++ * 0x09, 0x28, // Usage (0x28) ++ * 0x09, 0x29, // Usage (0x29) ++ * 0x09, 0x2A, // Usage (0x2A) ++ * 0x09, 0x2B, // Usage (0x2B) ++ * 0x95, 0x0C, // Report Count (12) ++ * 0x81, 0x02, // Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0x0A, 0x21, 0x26, // Usage (0x2621) ++ * 0x95, 0x08, // Report Count (8) ++ * 0xB1, 0x02, // Feature (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position,Non-volatile) ++ * 0x0A, 0x21, 0x26, // Usage (0x2621) ++ * 0x91, 0x02, // Output (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position,Non-volatile) ++ * 0x26, 0xFF, 0x03, // Logical Maximum (1023) ++ * 0x46, 0xFF, 0x03, // Physical Maximum (1023) ++ * 0x09, 0x2C, // Usage (0x2C) ++ * 0x09, 0x2D, // Usage (0x2D) ++ * 0x09, 0x2E, // Usage (0x2E) ++ * 0x09, 0x2F, // Usage (0x2F) ++ * 0x75, 0x10, // Report Size (16) ++ * 0x95, 0x04, // Report Count (4) ++ * 0x81, 0x02, // Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) ++ * 0xC0, // End Collection ++ */ ++ ++#define PID0902_RDESC_ORIG_SIZE 137 ++ ++/* ++ * The fixed descriptor for 0x146b:0x0902 ++ * ++ * - map buttons according to gamepad.rst ++ * - assign right stick from Z/Rz to Rx/Ry ++ * - map previously unused analog trigger data to Z/RZ ++ * - simplify feature and output descriptor ++ */ ++static __u8 pid0902_rdesc_fixed[] = { ++ 0x05, 0x01, /* Usage Page (Generic Desktop Ctrls) */ ++ 0x09, 0x05, /* Usage (Game Pad) */ ++ 0xA1, 0x01, /* Collection (Application) */ ++ 0x15, 0x00, /* Logical Minimum (0) */ ++ 0x25, 0x01, /* Logical Maximum (1) */ ++ 0x35, 0x00, /* Physical Minimum (0) */ ++ 0x45, 0x01, /* Physical Maximum (1) */ ++ 0x75, 0x01, /* Report Size (1) */ ++ 0x95, 0x0D, /* Report Count (13) */ ++ 0x05, 0x09, /* Usage Page (Button) */ ++ 0x09, 0x05, /* Usage (BTN_WEST) */ ++ 0x09, 0x01, /* Usage (BTN_SOUTH) */ ++ 0x09, 0x02, /* Usage (BTN_EAST) */ ++ 0x09, 0x04, /* Usage (BTN_NORTH) */ ++ 0x09, 0x07, /* Usage (BTN_TL) */ ++ 0x09, 0x08, /* Usage (BTN_TR) */ ++ 0x09, 0x09, /* Usage (BTN_TL2) */ ++ 0x09, 0x0A, /* Usage (BTN_TR2) */ ++ 0x09, 0x0B, /* Usage (BTN_SELECT) */ ++ 0x09, 0x0C, /* Usage (BTN_START) */ ++ 0x09, 0x0E, /* Usage (BTN_THUMBL) */ ++ 0x09, 0x0F, /* Usage (BTN_THUMBR) */ ++ 0x09, 0x0D, /* Usage (BTN_MODE) */ ++ 0x81, 0x02, /* Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x75, 0x01, /* Report Size (1) */ ++ 0x95, 0x03, /* Report Count (3) */ ++ 0x81, 0x01, /* Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x05, 0x01, /* Usage Page (Generic Desktop Ctrls) */ ++ 0x25, 0x07, /* Logical Maximum (7) */ ++ 0x46, 0x3B, 0x01, /* Physical Maximum (315) */ ++ 0x75, 0x04, /* Report Size (4) */ ++ 0x95, 0x01, /* Report Count (1) */ ++ 0x65, 0x14, /* Unit (System: English Rotation, Length: Centimeter) */ ++ 0x09, 0x39, /* Usage (Hat switch) */ ++ 0x81, 0x42, /* Input (Data,Var,Abs,No Wrap,Linear,Preferred State,Null State) */ ++ 0x65, 0x00, /* Unit (None) */ ++ 0x95, 0x01, /* Report Count (1) */ ++ 0x81, 0x01, /* Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x26, 0xFF, 0x00, /* Logical Maximum (255) */ ++ 0x46, 0xFF, 0x00, /* Physical Maximum (255) */ ++ 0x09, 0x30, /* Usage (X) */ ++ 0x09, 0x31, /* Usage (Y) */ ++ 0x09, 0x33, /* Usage (Rx) */ ++ 0x09, 0x34, /* Usage (Ry) */ ++ 0x75, 0x08, /* Report Size (8) */ ++ 0x95, 0x04, /* Report Count (4) */ ++ 0x81, 0x02, /* Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x95, 0x0A, /* Report Count (10) */ ++ 0x81, 0x01, /* Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x05, 0x01, /* Usage Page (Generic Desktop Ctrls) */ ++ 0x26, 0xFF, 0x00, /* Logical Maximum (255) */ ++ 0x46, 0xFF, 0x00, /* Physical Maximum (255) */ ++ 0x09, 0x32, /* Usage (Z) */ ++ 0x09, 0x35, /* Usage (Rz) */ ++ 0x95, 0x02, /* Report Count (2) */ ++ 0x81, 0x02, /* Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x95, 0x08, /* Report Count (8) */ ++ 0x81, 0x01, /* Input (Const,Array,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0x06, 0x00, 0xFF, /* Usage Page (Vendor Defined 0xFF00) */ ++ 0xB1, 0x02, /* Feature (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position,Non-volatile) */ ++ 0x0A, 0x21, 0x26, /* Usage (0x2621) */ ++ 0x95, 0x08, /* Report Count (8) */ ++ 0x91, 0x02, /* Output (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position,Non-volatile) */ ++ 0x0A, 0x21, 0x26, /* Usage (0x2621) */ ++ 0x95, 0x08, /* Report Count (8) */ ++ 0x81, 0x02, /* Input (Data,Var,Abs,No Wrap,Linear,Preferred State,No Null Position) */ ++ 0xC0, /* End Collection */ ++}; ++ ++#define NUM_LEDS 4 ++ ++struct bigben_device { ++ struct hid_device *hid; ++ struct hid_report *report; ++ u8 led_state; /* LED1 = 1 .. LED4 = 8 */ ++ u8 right_motor_on; /* right motor off/on 0/1 */ ++ u8 left_motor_force; /* left motor force 0-255 */ ++ struct led_classdev *leds[NUM_LEDS]; ++ bool work_led; ++ bool work_ff; ++ struct work_struct worker; ++}; ++ ++ ++static void bigben_worker(struct work_struct *work) ++{ ++ struct bigben_device *bigben = container_of(work, ++ struct bigben_device, worker); ++ struct hid_field *report_field = bigben->report->field[0]; ++ ++ if (bigben->work_led) { ++ bigben->work_led = false; ++ report_field->value[0] = 0x01; /* 1 = led message */ ++ report_field->value[1] = 0x08; /* reserved value, always 8 */ ++ report_field->value[2] = bigben->led_state; ++ report_field->value[3] = 0x00; /* padding */ ++ report_field->value[4] = 0x00; /* padding */ ++ report_field->value[5] = 0x00; /* padding */ ++ report_field->value[6] = 0x00; /* padding */ ++ report_field->value[7] = 0x00; /* padding */ ++ hid_hw_request(bigben->hid, bigben->report, HID_REQ_SET_REPORT); ++ } ++ ++ if (bigben->work_ff) { ++ bigben->work_ff = false; ++ report_field->value[0] = 0x02; /* 2 = rumble effect message */ ++ report_field->value[1] = 0x08; /* reserved value, always 8 */ ++ report_field->value[2] = bigben->right_motor_on; ++ report_field->value[3] = bigben->left_motor_force; ++ report_field->value[4] = 0xff; /* duration 0-254 (255 = nonstop) */ ++ report_field->value[5] = 0x00; /* padding */ ++ report_field->value[6] = 0x00; /* padding */ ++ report_field->value[7] = 0x00; /* padding */ ++ hid_hw_request(bigben->hid, bigben->report, HID_REQ_SET_REPORT); ++ } ++} ++ ++static int hid_bigben_play_effect(struct input_dev *dev, void *data, ++ struct ff_effect *effect) ++{ ++ struct bigben_device *bigben = data; ++ u8 right_motor_on; ++ u8 left_motor_force; ++ ++ if (effect->type != FF_RUMBLE) ++ return 0; ++ ++ right_motor_on = effect->u.rumble.weak_magnitude ? 1 : 0; ++ left_motor_force = effect->u.rumble.strong_magnitude / 256; ++ ++ if (right_motor_on != bigben->right_motor_on || ++ left_motor_force != bigben->left_motor_force) { ++ bigben->right_motor_on = right_motor_on; ++ bigben->left_motor_force = left_motor_force; ++ bigben->work_ff = true; ++ schedule_work(&bigben->worker); ++ } ++ ++ return 0; ++} ++ ++static void bigben_set_led(struct led_classdev *led, ++ enum led_brightness value) ++{ ++ struct device *dev = led->dev->parent; ++ struct hid_device *hid = to_hid_device(dev); ++ struct bigben_device *bigben = hid_get_drvdata(hid); ++ int n; ++ bool work; ++ ++ if (!bigben) { ++ hid_err(hid, "no device data\n"); ++ return; ++ } ++ ++ for (n = 0; n < NUM_LEDS; n++) { ++ if (led == bigben->leds[n]) { ++ if (value == LED_OFF) { ++ work = (bigben->led_state & BIT(n)); ++ bigben->led_state &= ~BIT(n); ++ } else { ++ work = !(bigben->led_state & BIT(n)); ++ bigben->led_state |= BIT(n); ++ } ++ ++ if (work) { ++ bigben->work_led = true; ++ schedule_work(&bigben->worker); ++ } ++ return; ++ } ++ } ++} ++ ++static enum led_brightness bigben_get_led(struct led_classdev *led) ++{ ++ struct device *dev = led->dev->parent; ++ struct hid_device *hid = to_hid_device(dev); ++ struct bigben_device *bigben = hid_get_drvdata(hid); ++ int n; ++ ++ if (!bigben) { ++ hid_err(hid, "no device data\n"); ++ return LED_OFF; ++ } ++ ++ for (n = 0; n < NUM_LEDS; n++) { ++ if (led == bigben->leds[n]) ++ return (bigben->led_state & BIT(n)) ? LED_ON : LED_OFF; ++ } ++ ++ return LED_OFF; ++} ++ ++static void bigben_remove(struct hid_device *hid) ++{ ++ struct bigben_device *bigben = hid_get_drvdata(hid); ++ ++ cancel_work_sync(&bigben->worker); ++ hid_hw_close(hid); ++ hid_hw_stop(hid); ++} ++ ++static int bigben_probe(struct hid_device *hid, ++ const struct hid_device_id *id) ++{ ++ struct bigben_device *bigben; ++ struct hid_input *hidinput; ++ struct list_head *report_list; ++ struct led_classdev *led; ++ char *name; ++ size_t name_sz; ++ int n, error; ++ ++ bigben = devm_kzalloc(&hid->dev, sizeof(*bigben), GFP_KERNEL); ++ if (!bigben) ++ return -ENOMEM; ++ hid_set_drvdata(hid, bigben); ++ bigben->hid = hid; ++ ++ error = hid_parse(hid); ++ if (error) { ++ hid_err(hid, "parse failed\n"); ++ return error; ++ } ++ ++ error = hid_hw_start(hid, HID_CONNECT_DEFAULT & ~HID_CONNECT_FF); ++ if (error) { ++ hid_err(hid, "hw start failed\n"); ++ return error; ++ } ++ ++ report_list = &hid->report_enum[HID_OUTPUT_REPORT].report_list; ++ bigben->report = list_entry(report_list->next, ++ struct hid_report, list); ++ ++ hidinput = list_first_entry(&hid->inputs, struct hid_input, list); ++ set_bit(FF_RUMBLE, hidinput->input->ffbit); ++ ++ INIT_WORK(&bigben->worker, bigben_worker); ++ ++ error = input_ff_create_memless(hidinput->input, bigben, ++ hid_bigben_play_effect); ++ if (error) ++ return error; ++ ++ name_sz = strlen(dev_name(&hid->dev)) + strlen(":red:bigben#") + 1; ++ ++ for (n = 0; n < NUM_LEDS; n++) { ++ led = devm_kzalloc( ++ &hid->dev, ++ sizeof(struct led_classdev) + name_sz, ++ GFP_KERNEL ++ ); ++ if (!led) ++ return -ENOMEM; ++ name = (void *)(&led[1]); ++ snprintf(name, name_sz, ++ "%s:red:bigben%d", ++ dev_name(&hid->dev), n + 1 ++ ); ++ led->name = name; ++ led->brightness = (n == 0) ? LED_ON : LED_OFF; ++ led->max_brightness = 1; ++ led->brightness_get = bigben_get_led; ++ led->brightness_set = bigben_set_led; ++ bigben->leds[n] = led; ++ error = devm_led_classdev_register(&hid->dev, led); ++ if (error) ++ return error; ++ } ++ ++ /* initial state: LED1 is on, no rumble effect */ ++ bigben->led_state = BIT(0); ++ bigben->right_motor_on = 0; ++ bigben->left_motor_force = 0; ++ bigben->work_led = true; ++ bigben->work_ff = true; ++ schedule_work(&bigben->worker); ++ ++ hid_info(hid, "LED and force feedback support for BigBen gamepad\n"); ++ ++ return 0; ++} ++ ++static __u8 *bigben_report_fixup(struct hid_device *hid, __u8 *rdesc, ++ unsigned int *rsize) ++{ ++ if (*rsize == PID0902_RDESC_ORIG_SIZE) { ++ rdesc = pid0902_rdesc_fixed; ++ *rsize = sizeof(pid0902_rdesc_fixed); ++ } else ++ hid_warn(hid, "unexpected rdesc, please submit for review\n"); ++ return rdesc; ++} ++ ++static const struct hid_device_id bigben_devices[] = { ++ { HID_USB_DEVICE(USB_VENDOR_ID_BIGBEN, USB_DEVICE_ID_BIGBEN_PS3OFMINIPAD) }, ++ { } ++}; ++MODULE_DEVICE_TABLE(hid, bigben_devices); ++ ++static struct hid_driver bigben_driver = { ++ .name = "bigben", ++ .id_table = bigben_devices, ++ .probe = bigben_probe, ++ .report_fixup = bigben_report_fixup, ++ .remove = bigben_remove, ++}; ++module_hid_driver(bigben_driver); ++ ++MODULE_LICENSE("GPL"); +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -232,6 +232,9 @@ + #define USB_VENDOR_ID_BETOP_2185V2PC 0x8380 + #define USB_VENDOR_ID_BETOP_2185V2BFM 0x20bc + ++#define USB_VENDOR_ID_BIGBEN 0x146b ++#define USB_DEVICE_ID_BIGBEN_PS3OFMINIPAD 0x0902 ++ + #define USB_VENDOR_ID_BTC 0x046e + #define USB_DEVICE_ID_BTC_EMPREX_REMOTE 0x5578 + #define USB_DEVICE_ID_BTC_EMPREX_REMOTE_2 0x5577 diff --git a/target/linux/brcm2708/patches-4.19/950-0169-configs-Add-CONFIG_HID_BIGBEN_FF-m.patch b/target/linux/brcm2708/patches-4.19/950-0169-configs-Add-CONFIG_HID_BIGBEN_FF-m.patch new file mode 100644 index 000000000..ca53ab3a5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0169-configs-Add-CONFIG_HID_BIGBEN_FF-m.patch @@ -0,0 +1,33 @@ +From 8bf8320c86fd8601dccb0ea6dc677a6d2256a50e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 24 Sep 2018 14:56:58 +0100 +Subject: [PATCH 169/703] configs: Add CONFIG_HID_BIGBEN_FF=m + +See: https://github.com/raspberrypi/linux/issues/2690 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -938,6 +938,7 @@ CONFIG_HID_APPLE=m + CONFIG_HID_ASUS=m + CONFIG_HID_BELKIN=m + CONFIG_HID_BETOP_FF=m ++CONFIG_HID_BIGBEN_FF=m + CONFIG_HID_CHERRY=m + CONFIG_HID_CHICONY=m + CONFIG_HID_CYPRESS=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -931,6 +931,7 @@ CONFIG_HID_APPLE=m + CONFIG_HID_ASUS=m + CONFIG_HID_BELKIN=m + CONFIG_HID_BETOP_FF=m ++CONFIG_HID_BIGBEN_FF=m + CONFIG_HID_CHERRY=m + CONFIG_HID_CHICONY=m + CONFIG_HID_CYPRESS=m diff --git a/target/linux/brcm2708/patches-4.19/950-0170-ASoC-cs4265-Add-a-MIC-pre.-route-2696.patch b/target/linux/brcm2708/patches-4.19/950-0170-ASoC-cs4265-Add-a-MIC-pre.-route-2696.patch new file mode 100644 index 000000000..60824e871 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0170-ASoC-cs4265-Add-a-MIC-pre.-route-2696.patch @@ -0,0 +1,34 @@ +From 42808db6f458ddfca3367ed1167550241d2feb57 Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Fri, 28 Sep 2018 15:13:28 +1000 +Subject: [PATCH 170/703] ASoC: cs4265: Add a MIC pre. route (#2696) + +Commit b0ef5011b981ece1fde8063243a56d3038b87adb upstream. + +The cs4265 driver is missing a microphone preamp enable. +This patch enables/disables the microphone preamp when mic +selection is made using the kcontrol. + +Signed-off-by: Matt Flax +Reviewed-by: Charles Keepax +Signed-off-by: Mark Brown +--- + sound/soc/codecs/cs4265.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/sound/soc/codecs/cs4265.c ++++ b/sound/soc/codecs/cs4265.c +@@ -222,10 +222,11 @@ static const struct snd_soc_dapm_route c + {"LINEOUTR", NULL, "DAC"}, + {"SPDIFOUT", NULL, "SPDIF"}, + ++ {"Pre-amp MIC", NULL, "MICL"}, ++ {"Pre-amp MIC", NULL, "MICR"}, ++ {"ADC Mux", "MIC", "Pre-amp MIC"}, + {"ADC Mux", "LINEIN", "LINEINL"}, + {"ADC Mux", "LINEIN", "LINEINR"}, +- {"ADC Mux", "MIC", "MICL"}, +- {"ADC Mux", "MIC", "MICR"}, + {"ADC", NULL, "ADC Mux"}, + {"DOUT", NULL, "ADC"}, + {"DAI1 Capture", NULL, "DOUT"}, diff --git a/target/linux/brcm2708/patches-4.19/950-0171-Update-gpio-fan-overlay.dts-2711.patch b/target/linux/brcm2708/patches-4.19/950-0171-Update-gpio-fan-overlay.dts-2711.patch new file mode 100644 index 000000000..3aa967dc4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0171-Update-gpio-fan-overlay.dts-2711.patch @@ -0,0 +1,72 @@ +From 45466299c8b39d5d37b3a84c2db74834539ddc4b Mon Sep 17 00:00:00 2001 +From: Paul +Date: Thu, 11 Oct 2018 12:17:20 +0300 +Subject: [PATCH 171/703] Update gpio-fan-overlay.dts (#2711) + +Add references, links, clear details, some typo correction. +--- + .../boot/dts/overlays/gpio-fan-overlay.dts | 36 +++++++++++-------- + 1 file changed, 22 insertions(+), 14 deletions(-) + +--- a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts +@@ -1,29 +1,37 @@ + /* + * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12. ++ * References: ++ * - https://www.raspberrypi.org/forums/viewtopic.php?f=107&p=1367135#p1365084 ++ * + * Optional parameters: +- * - "gpiopin" - default GPIO12 +- * - "temp" - default 55000 ++ * - "gpiopin" - BCM number of the pin driving the fan, default 12 (GPIO12); ++ * - "temp" - CPU temperature at which fan is started in millicelsius, default 55000; ++ * + * Requires: +- * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m and CONFIG_SENSORS_PWM_FAN=m; +- * - kernel rebuid; +- * - DC Fan connected to GPIO via a N-MOSFET (2N7002) ++ * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m; ++ * - kernel rebuild; ++ * - N-MOSFET connected to gpiopin, 2N7002-[https://en.wikipedia.org/wiki/2N7000]; ++ * - DC Fan connected to N-MOSFET Drain terminal, a 12V fan is working fine and quite silently; ++ * [https://www.tme.eu/en/details/ee40101s1-999-a/dc12v-fans/sunon/ee40101s1-1000u-999/] + * + * ┌─────────────────────┐ + * │Fan negative terminal│ + * └┬────────────────────┘ +- * │ +- * │──┘ ++ * │D ++ * G │──┘ + * [GPIO12]──────┤ │<─┐ 2N7002 + * │──┤ +- * │ ++ * │S + * ─┴─ + * GND + * +- * sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan.dts +- * sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000" +- * or +- * sudo sh -c "echo '\n# Enable PI GPIO-Fan\ndtoverlay=gpio-fan\n' >> /boot/config.txt" +- * sudo sh -c "echo '\n# Enable PI GPIO-Fan\ndtoverlay=gpio-fan,gpiopin=12\n' >> /boot/config.txt" ++ * Build: ++ * - `sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan-overlay.dts` ++ * Activate: ++ * - sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000" ++ * or ++ * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Default\ndtoverlay=gpio-fan\n" >> /boot/config.txt' ++ * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Custom\ntoverlay=gpio-fan,gpiopin=12,temp=45000\n" >> /boot/config.txt' + * + */ + /dts-v1/; +@@ -52,7 +60,7 @@ + trips { + cpu_hot: trip-point@0 { + temperature = <55000>; /* (millicelsius) Fan started at 55°C */ +- hysteresis = <5000>; /* (millicelsius) Fan stopped at 50°C */ ++ hysteresis = <10000>; /* (millicelsius) Fan stopped at 45°C */ + type = "active"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0172-drivers-thermal-step_wise-add-support-for-hysteresis.patch b/target/linux/brcm2708/patches-4.19/950-0172-drivers-thermal-step_wise-add-support-for-hysteresis.patch new file mode 100644 index 000000000..77f0d9610 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0172-drivers-thermal-step_wise-add-support-for-hysteresis.patch @@ -0,0 +1,96 @@ +From 5d58e2d4e99f2ad2107b3aaca93fda6e758dc1ba Mon Sep 17 00:00:00 2001 +From: Ram Chandrasekar +Date: Mon, 7 May 2018 11:54:08 -0600 +Subject: [PATCH 172/703] drivers: thermal: step_wise: add support for + hysteresis + +From: Ram Chandrasekar + +Step wise governor increases the mitigation level when the temperature +goes above a threshold and will decrease the mitigation when the +temperature falls below the threshold. If it were a case, where the +temperature hovers around a threshold, the mitigation will be applied +and removed at every iteration. This reaction to the temperature is +inefficient for performance. + +The use of hysteresis temperature could avoid this ping-pong of +mitigation by relaxing the mitigation to happen only when the +temperature goes below this lower hysteresis value. + +Signed-off-by: Ram Chandrasekar +Signed-off-by: Lina Iyer +--- + drivers/thermal/step_wise.c | 33 +++++++++++++++++++++++---------- + 1 file changed, 23 insertions(+), 10 deletions(-) + +--- a/drivers/thermal/step_wise.c ++++ b/drivers/thermal/step_wise.c +@@ -36,7 +36,7 @@ + * for this trip point + * d. if the trend is THERMAL_TREND_DROP_FULL, use lower limit + * for this trip point +- * If the temperature is lower than a trip point, ++ * If the temperature is lower than a hysteresis temperature, + * a. if the trend is THERMAL_TREND_RAISING, do nothing + * b. if the trend is THERMAL_TREND_DROPPING, use lower cooling + * state for this trip point, if the cooling state already +@@ -127,7 +127,7 @@ static void update_passive_instance(stru + + static void thermal_zone_trip_update(struct thermal_zone_device *tz, int trip) + { +- int trip_temp; ++ int trip_temp, hyst_temp; + enum thermal_trip_type trip_type; + enum thermal_trend trend; + struct thermal_instance *instance; +@@ -135,22 +135,23 @@ static void thermal_zone_trip_update(str + int old_target; + + if (trip == THERMAL_TRIPS_NONE) { +- trip_temp = tz->forced_passive; ++ hyst_temp = trip_temp = tz->forced_passive; + trip_type = THERMAL_TRIPS_NONE; + } else { + tz->ops->get_trip_temp(tz, trip, &trip_temp); ++ hyst_temp = trip_temp; ++ if (tz->ops->get_trip_hyst) { ++ tz->ops->get_trip_hyst(tz, trip, &hyst_temp); ++ hyst_temp = trip_temp - hyst_temp; ++ } + tz->ops->get_trip_type(tz, trip, &trip_type); + } + + trend = get_tz_trend(tz, trip); + +- if (tz->temperature >= trip_temp) { +- throttle = true; +- trace_thermal_zone_trip(tz, trip, trip_type); +- } +- +- dev_dbg(&tz->device, "Trip%d[type=%d,temp=%d]:trend=%d,throttle=%d\n", +- trip, trip_type, trip_temp, trend, throttle); ++ dev_dbg(&tz->device, ++ "Trip%d[type=%d,temp=%d,hyst=%d]:trend=%d,throttle=%d\n", ++ trip, trip_type, trip_temp, hyst_temp, trend, throttle); + + mutex_lock(&tz->lock); + +@@ -159,6 +160,18 @@ static void thermal_zone_trip_update(str + continue; + + old_target = instance->target; ++ throttle = false; ++ /* ++ * Lower the mitigation only if the temperature ++ * goes below the hysteresis temperature. ++ */ ++ if (tz->temperature >= trip_temp || ++ (tz->temperature >= hyst_temp && ++ old_target != THERMAL_NO_TARGET)) { ++ throttle = true; ++ trace_thermal_zone_trip(tz, trip, trip_type); ++ } ++ + instance->target = get_target_state(instance, trend, throttle); + dev_dbg(&instance->cdev->device, "old_target=%d, target=%d\n", + old_target, (int)instance->target); diff --git a/target/linux/brcm2708/patches-4.19/950-0173-drivers-thermal-step_wise-avoid-throttling-at-hyster.patch b/target/linux/brcm2708/patches-4.19/950-0173-drivers-thermal-step_wise-avoid-throttling-at-hyster.patch new file mode 100644 index 000000000..55da2a0ee --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0173-drivers-thermal-step_wise-avoid-throttling-at-hyster.patch @@ -0,0 +1,22 @@ +From 71eb84af0905c95ae67e957f8af81e131e534ea9 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 2 Oct 2018 11:14:15 +0100 +Subject: [PATCH 173/703] drivers: thermal: step_wise: avoid throttling at + hysteresis temperature after dropping below it + +Signed-off-by: Serge Schneider +--- + drivers/thermal/step_wise.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/thermal/step_wise.c ++++ b/drivers/thermal/step_wise.c +@@ -167,7 +167,7 @@ static void thermal_zone_trip_update(str + */ + if (tz->temperature >= trip_temp || + (tz->temperature >= hyst_temp && +- old_target != THERMAL_NO_TARGET)) { ++ old_target == instance->upper)) { + throttle = true; + trace_thermal_zone_trip(tz, trip, trip_type); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0174-hwmon-adjust-rpi-poe-fan-overlay-trip-points.patch b/target/linux/brcm2708/patches-4.19/950-0174-hwmon-adjust-rpi-poe-fan-overlay-trip-points.patch new file mode 100644 index 000000000..e26cff416 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0174-hwmon-adjust-rpi-poe-fan-overlay-trip-points.patch @@ -0,0 +1,67 @@ +From 981040d773878289ce9cd7bb15a78f4205317ab1 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Wed, 26 Sep 2018 19:44:59 +0100 +Subject: [PATCH 174/703] hwmon: adjust rpi-poe-fan overlay trip points + +Signed-off-by: Serge Schneider +--- + .../arm/boot/dts/overlays/rpi-poe-overlay.dts | 26 +++++++------------ + 1 file changed, 9 insertions(+), 17 deletions(-) + +--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -14,9 +14,9 @@ + compatible = "raspberrypi,rpi-poe-fan"; + firmware = <&firmware>; + cooling-min-state = <0>; +- cooling-max-state = <3>; ++ cooling-max-state = <2>; + #cooling-cells = <2>; +- cooling-levels = <0 50 150 255>; ++ cooling-levels = <0 150 255>; + status = "okay"; + }; + }; +@@ -26,35 +26,27 @@ + target = <&cpu_thermal>; + __overlay__ { + trips { +- threshold: trip-point@0 { +- temperature = <45000>; +- hysteresis = <5000>; +- type = "active"; +- }; +- target: trip-point@1 { ++ trip0: trip0 { + temperature = <50000>; +- hysteresis = <2000>; ++ hysteresis = <5000>; + type = "active"; + }; +- cpu_hot: cpu_hot@0 { ++ trip1: trip1 { ++ + temperature = <55000>; +- hysteresis = <2000>; ++ hysteresis = <5000>; + type = "active"; + }; + }; + cooling-maps { + map0 { +- trip = <&threshold>; ++ trip = <&trip0>; + cooling-device = <&fan0 0 1>; + }; + map1 { +- trip = <&target>; ++ trip = <&trip1>; + cooling-device = <&fan0 1 2>; + }; +- map2 { +- trip = <&cpu_hot>; +- cooling-device = <&fan0 2 3>; +- }; + }; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0175-overlays-add-overrides-for-PoE-HAT-fan-control.patch b/target/linux/brcm2708/patches-4.19/950-0175-overlays-add-overrides-for-PoE-HAT-fan-control.patch new file mode 100644 index 000000000..d840ed7da --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0175-overlays-add-overrides-for-PoE-HAT-fan-control.patch @@ -0,0 +1,50 @@ +From ca2ef312a9bb95596a2f69186f4ca210a8160c1a Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 2 Oct 2018 17:13:48 +0100 +Subject: [PATCH 175/703] overlays: add overrides for PoE HAT fan control + +Signed-off-by: Serge Schneider +--- + arch/arm/boot/dts/overlays/README | 13 ++++++++++--- + arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 10 ++++++++++ + 2 files changed, 20 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1565,9 +1565,16 @@ Params: touchscreen-size-x Touchscr + + + Name: rpi-poe +-Info: Raspberry Pi POE HAT +-Load: dtoverlay=rpi-poe +-Params: ++Info: Raspberry Pi PoE HAT fan ++Load: dtoverlay=rpi-poe,[=] ++Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan ++ turns on (default 50000) ++ poe_fan_temp0_hyst Temperature delta (in millicelcius) at which ++ the fan turns off (default 5000) ++ poe_fan_temp1 Temperature (in millicelcius) at which the fan ++ speeds up (default 55000) ++ poe_fan_temp1_hyst Temperature delta (in millicelcius) at which ++ the fan slows down (default 5000) + + + Name: rpi-proto +--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -50,4 +50,14 @@ + }; + }; + }; ++ ++ fragment@2 { ++ target-path = "/__overrides__"; ++ __overlay__ { ++ poe_fan_temp0 = <&trip0>,"temperature:0"; ++ poe_fan_temp0_hyst = <&trip0>,"hysteresis:0"; ++ poe_fan_temp1 = <&trip1>,"temperature:0"; ++ poe_fan_temp1_hyst = <&trip1>,"hysteresis:0"; ++ }; ++ }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0176-overlays-Add-gpio-no-bank0-irq-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0176-overlays-Add-gpio-no-bank0-irq-overlay.patch new file mode 100644 index 000000000..0689e854a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0176-overlays-Add-gpio-no-bank0-irq-overlay.patch @@ -0,0 +1,60 @@ +From deb8928a66ab048325b52a00c36bd8a69cd63bea Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 18 Jul 2018 17:25:00 +0100 +Subject: [PATCH 176/703] overlays: Add gpio-no-bank0-irq overlay + +See: https://github.com/raspberrypi/linux/issues/2590 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 9 +++++++++ + .../dts/overlays/gpio-no-bank0-irq-overlay.dts | 14 ++++++++++++++ + 3 files changed, 24 insertions(+) + create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -37,6 +37,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + gpio-ir.dtbo \ + gpio-ir-tx.dtbo \ + gpio-key.dtbo \ ++ gpio-no-bank0-irq.dtbo \ + gpio-no-irq.dtbo \ + gpio-poweroff.dtbo \ + gpio-shutdown.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -597,6 +597,15 @@ Params: gpio GPIO pin + keycode Set the key code for the button + + ++Name: gpio-no-bank0-irq ++Info: Use this overlay to disable GPIO interrupts for GPIOs in bank 0 (0-27), ++ which can be useful for UIO drivers. ++ N.B. Using this overlay will trigger a kernel WARN during booting, but ++ this can safely be ignored - the system should work as expected. ++Load: dtoverlay=gpio-no-bank0-irq ++Params: ++ ++ + Name: gpio-no-irq + Info: Use this overlay to disable all GPIO interrupts, which can be useful + for user-space GPIO edge detection systems. +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts +@@ -0,0 +1,14 @@ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ // Configure the gpio pin controller ++ target = <&gpio>; ++ __overlay__ { ++ interrupts = <255 255>, <2 18>; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0177-Add-hy28b-2017-model-device-tree-overlay-2721.patch b/target/linux/brcm2708/patches-4.19/950-0177-Add-hy28b-2017-model-device-tree-overlay-2721.patch new file mode 100644 index 000000000..97d21c9f6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0177-Add-hy28b-2017-model-device-tree-overlay-2721.patch @@ -0,0 +1,209 @@ +From e296ac154f037f09fd100150d8eb113942661f58 Mon Sep 17 00:00:00 2001 +From: Hans-Wilhelm Warlo <5417271+hanswilw@users.noreply.github.com> +Date: Tue, 16 Oct 2018 18:20:48 +0200 +Subject: [PATCH 177/703] Add hy28b 2017 model device tree overlay (#2721) + +The 2017 version of the hy28b display requires a different +initialisation sequence. + +Signed-off-by: Hans-Wilhelm Warlo +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 19 +++ + .../boot/dts/overlays/hy28b-2017-overlay.dts | 152 ++++++++++++++++++ + 3 files changed, 172 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -49,6 +49,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + hifiberry-digi-pro.dtbo \ + hy28a.dtbo \ + hy28b.dtbo \ ++ hy28b-2017.dtbo \ + i2c-bcm2708.dtbo \ + i2c-gpio.dtbo \ + i2c-mux.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -770,6 +770,25 @@ Params: speed Display + ledgpio GPIO used to control backlight + + ++Name: hy28b-2017 ++Info: HY28B 2017 version - 2.8" TFT LCD Display Module by HAOYU Electronics ++ Default values match Texy's display shield ++Load: dtoverlay=hy28b-2017,= ++Params: speed Display SPI bus speed ++ ++ rotate Display rotation {0,90,180,270} ++ ++ fps Delay between frame updates ++ ++ debug Debug output level {0-7} ++ ++ xohms Touchpanel sensitivity (X-plate resistance) ++ ++ resetgpio GPIO used to reset controller ++ ++ ledgpio GPIO used to control backlight ++ ++ + Name: i2c-bcm2708 + Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus. + Load: dtoverlay=i2c-bcm2708 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts +@@ -0,0 +1,152 @@ ++/* ++ * Device Tree overlay for HY28b display shield by Texy. ++ * Modified for 2017 version with ILI9325 D chip ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&gpio>; ++ __overlay__ { ++ hy28b_pins: hy28b_pins { ++ brcm,pins = <17 25 18>; ++ brcm,function = <0 1 1>; /* in out out */ ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ hy28b: hy28b@0{ ++ compatible = "ilitek,ili9325"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hy28b_pins>; ++ ++ spi-max-frequency = <48000000>; ++ spi-cpol; ++ spi-cpha; ++ rotate = <270>; ++ bgr; ++ fps = <50>; ++ buswidth = <8>; ++ startbyte = <0x70>; ++ reset-gpios = <&gpio 25 0>; ++ led-gpios = <&gpio 18 1>; ++ ++ init = <0x10000e5 0x78F0 ++ 0x1000001 0x0100 ++ 0x1000002 0x0700 ++ 0x1000003 0x1030 ++ 0x1000004 0x0000 ++ 0x1000008 0x0207 ++ 0x1000009 0x0000 ++ 0x100000a 0x0000 ++ 0x100000c 0x0000 ++ 0x100000d 0x0000 ++ 0x100000f 0x0000 ++ 0x1000010 0x0000 ++ 0x1000011 0x0007 ++ 0x1000012 0x0000 ++ 0x1000013 0x0000 ++ 0x1000007 0x0001 ++ 0x2000032 ++ 0x2000032 ++ 0x2000032 ++ 0x2000032 ++ 0x1000010 0x1090 ++ 0x1000011 0x0227 ++ 0x2000032 ++ 0x1000012 0x001f ++ 0x2000032 ++ 0x1000013 0x1500 ++ 0x1000029 0x0027 ++ 0x100002b 0x000d ++ 0x2000032 ++ 0x1000020 0x0000 ++ 0x1000021 0x0000 ++ 0x2000032 ++ 0x1000030 0x0000 ++ 0x1000031 0x0707 ++ 0x1000032 0x0307 ++ 0x1000035 0x0200 ++ 0x1000036 0x0008 ++ 0x1000037 0x0004 ++ 0x1000038 0x0000 ++ 0x1000039 0x0707 ++ 0x100003c 0x0002 ++ 0x100003d 0x1d04 ++ 0x1000050 0x0000 ++ 0x1000051 0x00ef ++ 0x1000052 0x0000 ++ 0x1000053 0x013f ++ 0x1000060 0xa700 ++ 0x1000061 0x0001 ++ 0x100006a 0x0000 ++ 0x1000080 0x0000 ++ 0x1000081 0x0000 ++ 0x1000082 0x0000 ++ 0x1000083 0x0000 ++ 0x1000084 0x0000 ++ 0x1000085 0x0000 ++ 0x1000090 0x0010 ++ 0x1000092 0x0600 ++ 0x1000007 0x0133>; ++ debug = <0>; ++ }; ++ ++ hy28b_ts: hy28b-ts@1 { ++ compatible = "ti,ads7846"; ++ reg = <1>; ++ ++ spi-max-frequency = <2000000>; ++ interrupts = <17 2>; /* high-to-low edge triggered */ ++ interrupt-parent = <&gpio>; ++ pendown-gpio = <&gpio 17 0>; ++ ti,x-plate-ohms = /bits/ 16 <100>; ++ ti,pressure-max = /bits/ 16 <255>; ++ }; ++ }; ++ }; ++ __overrides__ { ++ speed = <&hy28b>,"spi-max-frequency:0"; ++ rotate = <&hy28b>,"rotate:0"; ++ fps = <&hy28b>,"fps:0"; ++ debug = <&hy28b>,"debug:0"; ++ xohms = <&hy28b_ts>,"ti,x-plate-ohms;0"; ++ resetgpio = <&hy28b>,"reset-gpios:4", ++ <&hy28b_pins>, "brcm,pins:4"; ++ ledgpio = <&hy28b>,"led-gpios:4", ++ <&hy28b_pins>, "brcm,pins:8"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0178-config-Add-CONFIG_USBIP_VUDC.patch b/target/linux/brcm2708/patches-4.19/950-0178-config-Add-CONFIG_USBIP_VUDC.patch new file mode 100644 index 000000000..f5d6b7f92 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0178-config-Add-CONFIG_USBIP_VUDC.patch @@ -0,0 +1,31 @@ +From b457a3f171ce59b613250751775c56b390995c71 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Thu, 25 Oct 2018 14:08:43 +0100 +Subject: [PATCH 178/703] config: Add CONFIG_USBIP_VUDC + +See: https://github.com/raspberrypi/firmware/issues/353 +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1013,6 +1013,7 @@ CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m + CONFIG_USBIP_VHCI_HCD=m + CONFIG_USBIP_HOST=m ++CONFIG_USBIP_VUDC=m + CONFIG_USB_DWC2=m + CONFIG_USB_SERIAL=m + CONFIG_USB_SERIAL_GENERIC=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1006,6 +1006,7 @@ CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m + CONFIG_USBIP_VHCI_HCD=m + CONFIG_USBIP_HOST=m ++CONFIG_USBIP_VUDC=m + CONFIG_USB_DWC2=m + CONFIG_USB_SERIAL=m + CONFIG_USB_SERIAL_GENERIC=y diff --git a/target/linux/brcm2708/patches-4.19/950-0179-mmc-bcm2835-sdhost-Recover-from-MMC_SEND_EXT_CSD.patch b/target/linux/brcm2708/patches-4.19/950-0179-mmc-bcm2835-sdhost-Recover-from-MMC_SEND_EXT_CSD.patch new file mode 100644 index 000000000..1dd16f7a3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0179-mmc-bcm2835-sdhost-Recover-from-MMC_SEND_EXT_CSD.patch @@ -0,0 +1,50 @@ +From 999a38346e7d54c6d8323965e91e2218d0e6d716 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 26 Oct 2018 17:29:51 +0100 +Subject: [PATCH 179/703] mmc/bcm2835-sdhost: Recover from MMC_SEND_EXT_CSD + +If the user issues an "mmc extcsd read", the SD controller receives +what it thinks is a SEND_IF_COND command with an unexpected data block. +The resulting operations leave the FSM stuck in READWAIT, a state which +persists until the MMC framework resets the controller, by which point +the root filesystem is likely to have been unmounted. + +A less heavyweight solution is to detect the condition and nudge the +FSM by asserting the (self-clearing) FORCE_DATA_MODE bit. + +N.B. This workaround was essentially discovered by accident and without +a full understanding the inner workings of the controller, so it is +fortunate that the "fix" only modifies error paths. + +See: https://github.com/raspberrypi/linux/issues/2728 + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/bcm2835-sdhost.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/mmc/host/bcm2835-sdhost.c ++++ b/drivers/mmc/host/bcm2835-sdhost.c +@@ -1244,6 +1244,8 @@ static void bcm2835_sdhost_finish_comman + pr_info("%s: ignoring CRC7 error for CMD1\n", + mmc_hostname(host->mmc)); + } else { ++ u32 edm, fsm; ++ + if (sdhsts & SDHSTS_CMD_TIME_OUT) { + if (host->debug) + pr_warn("%s: command %d timeout\n", +@@ -1256,6 +1258,13 @@ static void bcm2835_sdhost_finish_comman + host->cmd->opcode); + host->cmd->error = -EILSEQ; + } ++ ++ edm = readl(host->ioaddr + SDEDM); ++ fsm = edm & SDEDM_FSM_MASK; ++ if (fsm == SDEDM_FSM_READWAIT || ++ fsm == SDEDM_FSM_WRITESTART1) ++ writel(edm | SDEDM_FORCE_DATA_MODE, ++ host->ioaddr + SDEDM); + tasklet_schedule(&host->finish_tasklet); + return; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0180-overlays-pi3-disable-bt-Clear-out-bt_pins-node.patch b/target/linux/brcm2708/patches-4.19/950-0180-overlays-pi3-disable-bt-Clear-out-bt_pins-node.patch new file mode 100644 index 000000000..f712da8f7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0180-overlays-pi3-disable-bt-Clear-out-bt_pins-node.patch @@ -0,0 +1,33 @@ +From 3bbbf9c1d2e2459c9a74adf0e7b771ac2b9f7451 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 29 Oct 2018 10:38:31 +0000 +Subject: [PATCH 180/703] overlays: pi3-disable-bt: Clear out bt_pins node + +The pi3-disable-bt overlay does not (and cannot) delete the bt_pins +node, but emptying its properties (including brcm,pins) is a way of +signalling to the hciuart systemd service that Bluetooth has been +disabled. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts +@@ -37,6 +37,15 @@ + }; + + fragment@3 { ++ target = <&bt_pins>; ++ __overlay__ { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ }; ++ ++ fragment@4 { + target-path = "/aliases"; + __overlay__ { + serial0 = "/soc/serial@7e201000"; diff --git a/target/linux/brcm2708/patches-4.19/950-0181-Revert-rtc-pcf8523-properly-handle-oscillator-stop-b.patch b/target/linux/brcm2708/patches-4.19/950-0181-Revert-rtc-pcf8523-properly-handle-oscillator-stop-b.patch new file mode 100644 index 000000000..2ecca9178 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0181-Revert-rtc-pcf8523-properly-handle-oscillator-stop-b.patch @@ -0,0 +1,56 @@ +From 5e3cd6eeb1af7da0424290cb77e355755e17729c Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 29 Oct 2018 14:45:45 +0000 +Subject: [PATCH 181/703] Revert "rtc: pcf8523: properly handle oscillator stop + bit" + +This reverts commit ede44c908d44b166a5b6bd7caacd105c2ff5a70f. + +See: https://github.com/raspberrypi/firmware/issues/1065 + +Signed-off-by: Phil Elwell +--- + drivers/rtc/rtc-pcf8523.c | 25 ++++++++++++++++++++++--- + 1 file changed, 22 insertions(+), 3 deletions(-) + +--- a/drivers/rtc/rtc-pcf8523.c ++++ b/drivers/rtc/rtc-pcf8523.c +@@ -201,8 +201,28 @@ static int pcf8523_rtc_read_time(struct + if (err < 0) + return err; + +- if (regs[0] & REG_SECONDS_OS) +- return -EINVAL; ++ if (regs[0] & REG_SECONDS_OS) { ++ /* ++ * If the oscillator was stopped, try to clear the flag. Upon ++ * power-up the flag is always set, but if we cannot clear it ++ * the oscillator isn't running properly for some reason. The ++ * sensible thing therefore is to return an error, signalling ++ * that the clock cannot be assumed to be correct. ++ */ ++ ++ regs[0] &= ~REG_SECONDS_OS; ++ ++ err = pcf8523_write(client, REG_SECONDS, regs[0]); ++ if (err < 0) ++ return err; ++ ++ err = pcf8523_read(client, REG_SECONDS, ®s[0]); ++ if (err < 0) ++ return err; ++ ++ if (regs[0] & REG_SECONDS_OS) ++ return -EAGAIN; ++ } + + tm->tm_sec = bcd2bin(regs[0] & 0x7f); + tm->tm_min = bcd2bin(regs[1] & 0x7f); +@@ -238,7 +258,6 @@ static int pcf8523_rtc_set_time(struct d + return err; + + regs[0] = REG_SECONDS; +- /* This will purposely overwrite REG_SECONDS_OS */ + regs[1] = bin2bcd(tm->tm_sec); + regs[2] = bin2bcd(tm->tm_min); + regs[3] = bin2bcd(tm->tm_hour); diff --git a/target/linux/brcm2708/patches-4.19/950-0182-Update-issue-templates-2736.patch b/target/linux/brcm2708/patches-4.19/950-0182-Update-issue-templates-2736.patch new file mode 100644 index 000000000..8d560acb3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0182-Update-issue-templates-2736.patch @@ -0,0 +1,47 @@ +From f77461fb11af8f37a15832032c58a256e21ff311 Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Fri, 2 Nov 2018 11:55:49 +0000 +Subject: [PATCH 182/703] Update issue templates (#2736) + +--- + .github/ISSUE_TEMPLATE/bug_report.md | 34 ++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + create mode 100644 .github/ISSUE_TEMPLATE/bug_report.md + +--- /dev/null ++++ b/.github/ISSUE_TEMPLATE/bug_report.md +@@ -0,0 +1,34 @@ ++--- ++name: Bug report ++about: Create a report to help us fix your issue ++ ++--- ++ ++**Is this the right place for my bug report?** ++This repository contains the Linux kernel used on the Raspberry Pi. If you believe that the issue you are seeing is kernel-related, this is the right place. If not, we have other repositories for the GPU firmware at [github.com/raspberrypi/firmware](https://github.com/raspberrypi/firmware) and Raspberry Pi userland applications at [github.com/raspberrypi/userland](https://github.com/raspberrypi/userland). If you have problems with the Raspbian distribution packages, report them in the [github.com/RPi-Distro/repo](https://github.com/RPi-Distro/repo). If you simply have a question, then [the Raspberry Pi forums](https://www.raspberrypi.org/forums) are the best place to ask it. ++ ++**Describe the bug** ++Add a clear and concise description of what you think the bug is. ++ ++**To reproduce** ++List the steps required to reproduce the issue. ++ ++**Expected behaviour** ++Add a clear and concise description of what you expected to happen. ++ ++**Actual behaviour** ++Add a clear and concise description of what actually happened. ++ ++**System** ++ Copy and paste the results of the raspinfo command in to this section. Alternatively, copy and paste a pastebin link, or add answers to the following questions: ++ ++* Which model of Raspberry Pi? e.g. Pi3B+, PiZeroW ++* Which OS and version (`cat /etc/rpi-issue`)? ++* Which firmware version (`vcgencmd version`)? ++* Which kernel version (`uname -a`)? ++ ++**Logs** ++If applicable, add the relevant output from `dmesg` or similar. ++ ++**Additional context** ++Add any other relevant context for the problem. diff --git a/target/linux/brcm2708/patches-4.19/950-0183-overlays-uart0-return-GPIOs-14-and-15-to-inputs.patch b/target/linux/brcm2708/patches-4.19/950-0183-overlays-uart0-return-GPIOs-14-and-15-to-inputs.patch new file mode 100644 index 000000000..dd1f84547 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0183-overlays-uart0-return-GPIOs-14-and-15-to-inputs.patch @@ -0,0 +1,42 @@ +From bd2af9087e825313f2c2d2cf4ff74c7421a705d2 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 7 Nov 2018 17:43:10 +0000 +Subject: [PATCH 183/703] overlays: uart0 - return GPIOs 14 and 15 to inputs + +In the event that alternate pins are used (only useful on Compute +Modules), return the standard pins to inputs to avoid double-mapping +them. + +See: https://www.raspberrypi.org/forums/viewtopic.php?p=1388713#p1316977 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/uart0-overlay.dts | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +--- a/arch/arm/boot/dts/overlays/uart0-overlay.dts ++++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts +@@ -17,16 +17,17 @@ + target = <&gpio>; + __overlay__ { + uart0_pins: uart0_pins { +- brcm,pins = <14 15>; +- brcm,function = <4>; /* alt0 */ +- brcm,pull = <0 2>; ++ brcm,pins = <14 15 14 15>; ++ brcm,function = <0 0 4 4>; /* alt0 */ ++ brcm,pull = <0 0 0 2>; + }; + }; + }; + + __overrides__ { +- txd0_pin = <&uart0_pins>,"brcm,pins:0"; +- rxd0_pin = <&uart0_pins>,"brcm,pins:4"; +- pin_func = <&uart0_pins>,"brcm,function:0"; ++ txd0_pin = <&uart0_pins>,"brcm,pins:8"; ++ rxd0_pin = <&uart0_pins>,"brcm,pins:12"; ++ pin_func = <&uart0_pins>,"brcm,function:8", ++ <&uart0_pins>,"brcm,function:12"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0184-mmc-bcm2835-sdhost-Fix-warnings-on-arm64.patch b/target/linux/brcm2708/patches-4.19/950-0184-mmc-bcm2835-sdhost-Fix-warnings-on-arm64.patch new file mode 100644 index 000000000..1e4e4a220 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0184-mmc-bcm2835-sdhost-Fix-warnings-on-arm64.patch @@ -0,0 +1,252 @@ +From 59782472a3e41e591492ef219abb3f0fc082d08f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 12 Nov 2018 22:54:40 +0000 +Subject: [PATCH 184/703] mmc: bcm2835-sdhost: Fix warnings on arm64 + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/bcm2835-sdhost.c | 56 +++++++++++++++---------------- + 1 file changed, 28 insertions(+), 28 deletions(-) + +--- a/drivers/mmc/host/bcm2835-sdhost.c ++++ b/drivers/mmc/host/bcm2835-sdhost.c +@@ -247,7 +247,7 @@ static void log_init(struct device *dev, + GFP_KERNEL); + if (sdhost_log_buf) { + pr_info("sdhost: log_buf @ %p (%x)\n", +- sdhost_log_buf, sdhost_log_addr); ++ sdhost_log_buf, (u32)sdhost_log_addr); + timer_base = ioremap_nocache(bus_to_phys + 0x7e003000, SZ_4K); + if (!timer_base) + pr_err("sdhost: failed to remap timer\n"); +@@ -301,7 +301,7 @@ static void log_dump(void) + } + } + +-#define log_event(event, param1, param2) log_event_impl(event, param1, param2) ++#define log_event(event, param1, param2) log_event_impl(event, (u32)(uintptr_t)param1, (u32)(uintptr_t)param2) + + #else + +@@ -527,7 +527,7 @@ static void bcm2835_sdhost_dma_complete( + unsigned long flags; + + spin_lock_irqsave(&host->lock, flags); +- log_event("DMA<", (u32)host->data, bcm2835_sdhost_read(host, SDHSTS)); ++ log_event("DMA<", host->data, bcm2835_sdhost_read(host, SDHSTS)); + log_event("DMA ", bcm2835_sdhost_read(host, SDCMD), + bcm2835_sdhost_read(host, SDEDM)); + +@@ -559,7 +559,7 @@ static void bcm2835_sdhost_dma_complete( + + bcm2835_sdhost_finish_data(host); + +- log_event("DMA>", (u32)host->data, 0); ++ log_event("DMA>", host->data, 0); + spin_unlock_irqrestore(&host->lock, flags); + } + +@@ -748,7 +748,7 @@ static void bcm2835_sdhost_transfer_pio( + u32 sdhsts; + bool is_read; + BUG_ON(!host->data); +- log_event("XFP<", (u32)host->data, host->blocks); ++ log_event("XFP<", host->data, host->blocks); + + is_read = (host->data->flags & MMC_DATA_READ) != 0; + if (is_read) +@@ -773,7 +773,7 @@ static void bcm2835_sdhost_transfer_pio( + sdhsts); + host->data->error = -ETIMEDOUT; + } +- log_event("XFP>", (u32)host->data, host->blocks); ++ log_event("XFP>", host->data, host->blocks); + } + + static void bcm2835_sdhost_prepare_dma(struct bcm2835_host *host, +@@ -783,7 +783,7 @@ static void bcm2835_sdhost_prepare_dma(s + struct dma_async_tx_descriptor *desc = NULL; + struct dma_chan *dma_chan; + +- log_event("PRD<", (u32)data, 0); ++ log_event("PRD<", data, 0); + pr_debug("bcm2835_sdhost_prepare_dma()\n"); + + dma_chan = host->dma_chan_rxtx; +@@ -794,7 +794,7 @@ static void bcm2835_sdhost_prepare_dma(s + dir_data = DMA_TO_DEVICE; + dir_slave = DMA_MEM_TO_DEV; + } +- log_event("PRD1", (u32)dma_chan, 0); ++ log_event("PRD1", dma_chan, 0); + + BUG_ON(!dma_chan->device); + BUG_ON(!dma_chan->device->dev); +@@ -841,7 +841,7 @@ static void bcm2835_sdhost_prepare_dma(s + desc = dmaengine_prep_slave_sg(dma_chan, data->sg, + len, dir_slave, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); +- log_event("PRD3", (u32)desc, 0); ++ log_event("PRD3", desc, 0); + + if (desc) { + desc->callback = bcm2835_sdhost_dma_complete; +@@ -850,12 +850,12 @@ static void bcm2835_sdhost_prepare_dma(s + host->dma_chan = dma_chan; + host->dma_dir = dir_data; + } +- log_event("PDM>", (u32)data, 0); ++ log_event("PDM>", data, 0); + } + + static void bcm2835_sdhost_start_dma(struct bcm2835_host *host) + { +- log_event("SDMA", (u32)host->data, (u32)host->dma_chan); ++ log_event("SDMA", host->data, host->dma_chan); + dmaengine_submit(host->dma_desc); + dma_async_issue_pending(host->dma_chan); + } +@@ -1079,7 +1079,7 @@ static void bcm2835_sdhost_finish_data(s + data = host->data; + BUG_ON(!data); + +- log_event("FDA<", (u32)host->mrq, (u32)host->cmd); ++ log_event("FDA<", host->mrq, host->cmd); + pr_debug("finish_data(error %d, stop %d, sbc %d)\n", + data->error, data->stop ? 1 : 0, + host->mrq->sbc ? 1 : 0); +@@ -1102,7 +1102,7 @@ static void bcm2835_sdhost_finish_data(s + } + else + bcm2835_sdhost_transfer_complete(host); +- log_event("FDA>", (u32)host->mrq, (u32)host->cmd); ++ log_event("FDA>", host->mrq, host->cmd); + } + + static void bcm2835_sdhost_transfer_complete(struct bcm2835_host *host) +@@ -1116,7 +1116,7 @@ static void bcm2835_sdhost_transfer_comp + data = host->data; + host->data = NULL; + +- log_event("TCM<", (u32)data, data->error); ++ log_event("TCM<", data, data->error); + pr_debug("transfer_complete(error %d, stop %d)\n", + data->error, data->stop ? 1 : 0); + +@@ -1138,7 +1138,7 @@ static void bcm2835_sdhost_transfer_comp + bcm2835_sdhost_wait_transfer_complete(host); + tasklet_schedule(&host->finish_tasklet); + } +- log_event("TCM>", (u32)data, 0); ++ log_event("TCM>", data, 0); + } + + /* If irq_flags is valid, the caller is in a thread context and is allowed +@@ -1153,7 +1153,7 @@ static void bcm2835_sdhost_finish_comman + int timediff = 0; + #endif + +- log_event("FCM<", (u32)host->mrq, (u32)host->cmd); ++ log_event("FCM<", host->mrq, host->cmd); + pr_debug("finish_command(%x)\n", bcm2835_sdhost_read(host, SDCMD)); + + BUG_ON(!host->cmd || !host->mrq); +@@ -1310,7 +1310,7 @@ static void bcm2835_sdhost_finish_comman + else if (host->data_complete) + bcm2835_sdhost_transfer_complete(host); + } +- log_event("FCM>", (u32)host->mrq, (u32)host->cmd); ++ log_event("FCM>", host->mrq, host->cmd); + } + + static void bcm2835_sdhost_timeout(struct timer_list *t) +@@ -1347,7 +1347,7 @@ static void bcm2835_sdhost_timeout(struc + + static void bcm2835_sdhost_busy_irq(struct bcm2835_host *host, u32 intmask) + { +- log_event("IRQB", (u32)host->cmd, intmask); ++ log_event("IRQB", host->cmd, intmask); + if (!host->cmd) { + pr_err("%s: got command busy interrupt 0x%08x even " + "though no command operation was in progress.\n", +@@ -1400,7 +1400,7 @@ static void bcm2835_sdhost_data_irq(stru + data/space available FIFO status bits. It is therefore not + an error to get here when there is no data transfer in + progress. */ +- log_event("IRQD", (u32)host->data, intmask); ++ log_event("IRQD", host->data, intmask); + if (!host->data) + return; + +@@ -1437,7 +1437,7 @@ static void bcm2835_sdhost_data_irq(stru + + static void bcm2835_sdhost_block_irq(struct bcm2835_host *host, u32 intmask) + { +- log_event("IRQK", (u32)host->data, intmask); ++ log_event("IRQK", host->data, intmask); + if (!host->data) { + pr_err("%s: got block interrupt 0x%08x even " + "though no data operation was in progress.\n", +@@ -1695,10 +1695,10 @@ static void bcm2835_sdhost_request(struc + edm = bcm2835_sdhost_read(host, SDEDM); + fsm = edm & SDEDM_FSM_MASK; + +- log_event("REQ<", (u32)mrq, edm); ++ log_event("REQ<", mrq, edm); + if ((fsm != SDEDM_FSM_IDENTMODE) && + (fsm != SDEDM_FSM_DATAMODE)) { +- log_event("REQ!", (u32)mrq, edm); ++ log_event("REQ!", mrq, edm); + if (host->debug) { + pr_warn("%s: previous command (%d) not complete (EDM %x)\n", + mmc_hostname(host->mmc), +@@ -1730,11 +1730,11 @@ static void bcm2835_sdhost_request(struc + bcm2835_sdhost_finish_command(host, &flags); + } + +- log_event("CMD ", (u32)mrq->cmd->opcode, ++ log_event("CMD ", mrq->cmd->opcode, + mrq->data ? (u32)mrq->data->blksz : 0); + mmiowb(); + +- log_event("REQ>", (u32)mrq, 0); ++ log_event("REQ>", mrq, 0); + spin_unlock_irqrestore(&host->lock, flags); + } + +@@ -1790,7 +1790,7 @@ static void bcm2835_sdhost_cmd_wait_work + + spin_lock_irqsave(&host->lock, flags); + +- log_event("CWK<", (u32)host->cmd, (u32)host->mrq); ++ log_event("CWK<", host->cmd, host->mrq); + + /* + * If this tasklet gets rescheduled while running, it will +@@ -1805,7 +1805,7 @@ static void bcm2835_sdhost_cmd_wait_work + + mmiowb(); + +- log_event("CWK>", (u32)host->cmd, 0); ++ log_event("CWK>", host->cmd, 0); + + spin_unlock_irqrestore(&host->lock, flags); + } +@@ -1821,7 +1821,7 @@ static void bcm2835_sdhost_tasklet_finis + + spin_lock_irqsave(&host->lock, flags); + +- log_event("TSK<", (u32)host->mrq, 0); ++ log_event("TSK<", host->mrq, 0); + /* + * If this tasklet gets rescheduled while running, it will + * be run again afterwards but without any active request. +@@ -1889,7 +1889,7 @@ static void bcm2835_sdhost_tasklet_finis + } + + mmc_request_done(host->mmc, mrq); +- log_event("TSK>", (u32)mrq, 0); ++ log_event("TSK>", mrq, 0); + } + + int bcm2835_sdhost_add_host(struct bcm2835_host *host) diff --git a/target/linux/brcm2708/patches-4.19/950-0185-Fix-warning-in-bcm2835-smi-nand.patch b/target/linux/brcm2708/patches-4.19/950-0185-Fix-warning-in-bcm2835-smi-nand.patch new file mode 100644 index 000000000..4382571f5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0185-Fix-warning-in-bcm2835-smi-nand.patch @@ -0,0 +1,23 @@ +From bb7479c2adc27bd21e5fae14df21d4f9e89a8aac Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 12 Nov 2018 22:56:35 +0000 +Subject: [PATCH 185/703] Fix warning in bcm2835-smi-nand + +Signed-off-by: Phil Elwell +--- + drivers/mtd/nand/raw/bcm2835_smi_nand.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/mtd/nand/raw/bcm2835_smi_nand.c ++++ b/drivers/mtd/nand/raw/bcm2835_smi_nand.c +@@ -135,10 +135,8 @@ static int bcm2835_smi_nand_probe(struct + struct mtd_info *mtd; + struct device *dev = &pdev->dev; + struct device_node *node = dev->of_node, *smi_node; +- struct mtd_part_parser_data ppdata; + struct smi_settings *smi_settings; + struct bcm2835_smi_instance *smi_inst; +- int ret = -ENXIO; + + if (!node) { + dev_err(dev, "No device tree node supplied!"); diff --git a/target/linux/brcm2708/patches-4.19/950-0186-media-ov5647-Add-set_fmt-and-get_fmt-calls.patch b/target/linux/brcm2708/patches-4.19/950-0186-media-ov5647-Add-set_fmt-and-get_fmt-calls.patch new file mode 100644 index 000000000..4308d62bb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0186-media-ov5647-Add-set_fmt-and-get_fmt-calls.patch @@ -0,0 +1,47 @@ +From 7ee204d064e56592409ea3ff7ba930a00fe51a0f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:55:37 +0000 +Subject: [PATCH 186/703] media: ov5647: Add set_fmt and get_fmt calls. + +There's no way to query the subdevice for the supported +resolutions. +Add set_fmt and get_fmt implementations. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/ov5647.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/drivers/media/i2c/ov5647.c ++++ b/drivers/media/i2c/ov5647.c +@@ -463,8 +463,30 @@ static int ov5647_enum_mbus_code(struct + return 0; + } + ++static int ov5647_set_get_fmt(struct v4l2_subdev *sd, ++ struct v4l2_subdev_pad_config *cfg, ++ struct v4l2_subdev_format *format) ++{ ++ struct v4l2_mbus_framefmt *fmt = &format->format; ++ ++ if (format->pad != 0) ++ return -EINVAL; ++ ++ /* Only one format is supported, so return that */ ++ memset(fmt, 0, sizeof(*fmt)); ++ fmt->code = MEDIA_BUS_FMT_SBGGR8_1X8; ++ fmt->colorspace = V4L2_COLORSPACE_SRGB; ++ fmt->field = V4L2_FIELD_NONE; ++ fmt->width = 640; ++ fmt->height = 480; ++ ++ return 0; ++} ++ + static const struct v4l2_subdev_pad_ops ov5647_subdev_pad_ops = { + .enum_mbus_code = ov5647_enum_mbus_code, ++ .set_fmt = ov5647_set_get_fmt, ++ .get_fmt = ov5647_set_get_fmt, + }; + + static const struct v4l2_subdev_ops ov5647_subdev_ops = { diff --git a/target/linux/brcm2708/patches-4.19/950-0187-media-Documentation-DT-add-device-tree-for-PWDN-cont.patch b/target/linux/brcm2708/patches-4.19/950-0187-media-Documentation-DT-add-device-tree-for-PWDN-cont.patch new file mode 100644 index 000000000..83fcb1cc9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0187-media-Documentation-DT-add-device-tree-for-PWDN-cont.patch @@ -0,0 +1,33 @@ +From 3a40a450f896c003be6b4fc7ce020f64716c2e2b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:55:59 +0000 +Subject: [PATCH 187/703] [media] Documentation: DT: add device tree for PWDN + control + +Add optional GPIO pwdn to connect to the PWDN line on the sensor. + +Signed-off-by: Dave Stevenson +--- + Documentation/devicetree/bindings/media/i2c/ov5647.txt | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/Documentation/devicetree/bindings/media/i2c/ov5647.txt ++++ b/Documentation/devicetree/bindings/media/i2c/ov5647.txt +@@ -10,6 +10,9 @@ Required properties: + - reg : I2C slave address of the sensor. + - clocks : Reference to the xclk clock. + ++Optional Properties: ++- pwdn-gpios: reference to the GPIO connected to the pwdn pin, if any. ++ + The common video interfaces bindings (see video-interfaces.txt) should be + used to specify link to the image data receiver. The OV5647 device + node should contain one 'port' child node with an 'endpoint' subnode. +@@ -26,6 +29,7 @@ Example: + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&camera_clk>; ++ pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; + port { + camera_1: endpoint { + remote-endpoint = <&csi1_ep1>; diff --git a/target/linux/brcm2708/patches-4.19/950-0188-media-ov5647-Add-support-for-PWDN-GPIO.patch b/target/linux/brcm2708/patches-4.19/950-0188-media-ov5647-Add-support-for-PWDN-GPIO.patch new file mode 100644 index 000000000..0383fd444 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0188-media-ov5647-Add-support-for-PWDN-GPIO.patch @@ -0,0 +1,92 @@ +From 7c6fef835e14a484f24a41f5095bbef492aa433c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:56:33 +0000 +Subject: [PATCH 188/703] media: ov5647: Add support for PWDN GPIO. + +Add support for an optional GPIO connected to PWDN on the sensor. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/ov5647.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/media/i2c/ov5647.c ++++ b/drivers/media/i2c/ov5647.c +@@ -21,6 +21,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -35,6 +36,13 @@ + + #define SENSOR_NAME "ov5647" + ++/* ++ * From the datasheet, "20ms after PWDN goes low or 20ms after RESETB goes ++ * high if reset is inserted after PWDN goes high, host can access sensor's ++ * SCCB to initialize sensor." ++ */ ++#define PWDN_ACTIVE_DELAY_MS 20 ++ + #define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5) + #define MIPI_CTRL00_BUS_IDLE BIT(2) + #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0) +@@ -86,6 +94,7 @@ struct ov5647 { + unsigned int height; + int power_count; + struct clk *xclk; ++ struct gpio_desc *pwdn; + }; + + static inline struct ov5647 *to_state(struct v4l2_subdev *sd) +@@ -355,6 +364,11 @@ static int ov5647_sensor_power(struct v4 + if (on && !ov5647->power_count) { + dev_dbg(&client->dev, "OV5647 power on\n"); + ++ if (ov5647->pwdn) { ++ gpiod_set_value(ov5647->pwdn, 0); ++ msleep(PWDN_ACTIVE_DELAY_MS); ++ } ++ + ret = clk_prepare_enable(ov5647->xclk); + if (ret < 0) { + dev_err(&client->dev, "clk prepare enable failed\n"); +@@ -392,6 +406,8 @@ static int ov5647_sensor_power(struct v4 + dev_dbg(&client->dev, "soft stby failed\n"); + + clk_disable_unprepare(ov5647->xclk); ++ ++ gpiod_set_value(ov5647->pwdn, 1); + } + + /* Update the power count. */ +@@ -604,6 +620,10 @@ static int ov5647_probe(struct i2c_clien + return -EINVAL; + } + ++ /* Request the power down GPIO asserted */ ++ sensor->pwdn = devm_gpiod_get_optional(&client->dev, "pwdn", ++ GPIOD_OUT_HIGH); ++ + mutex_init(&sensor->lock); + + sd = &sensor->sd; +@@ -617,7 +637,15 @@ static int ov5647_probe(struct i2c_clien + if (ret < 0) + goto mutex_remove; + ++ if (sensor->pwdn) { ++ gpiod_set_value(sensor->pwdn, 0); ++ msleep(PWDN_ACTIVE_DELAY_MS); ++ } ++ + ret = ov5647_detect(sd); ++ ++ gpiod_set_value(sensor->pwdn, 1); ++ + if (ret < 0) + goto error; + diff --git a/target/linux/brcm2708/patches-4.19/950-0189-media-ov5647-Add-support-for-non-continuous-clock-mo.patch b/target/linux/brcm2708/patches-4.19/950-0189-media-ov5647-Add-support-for-non-continuous-clock-mo.patch new file mode 100644 index 000000000..e7c976b58 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0189-media-ov5647-Add-support-for-non-continuous-clock-mo.patch @@ -0,0 +1,79 @@ +From d8eb44c8aa81de883c154c46b3323895e6a70a35 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:56:47 +0000 +Subject: [PATCH 189/703] media: ov5647: Add support for non-continuous clock + mode + +The driver was only supporting continuous clock mode +although this was not stated anywhere. +Non-continuous clock saves a small amount of power and +on some SoCs is easier to interface with. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/ov5647.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/media/i2c/ov5647.c ++++ b/drivers/media/i2c/ov5647.c +@@ -44,6 +44,7 @@ + #define PWDN_ACTIVE_DELAY_MS 20 + + #define MIPI_CTRL00_CLOCK_LANE_GATE BIT(5) ++#define MIPI_CTRL00_LINE_SYNC_ENABLE BIT(4) + #define MIPI_CTRL00_BUS_IDLE BIT(2) + #define MIPI_CTRL00_CLOCK_LANE_DISABLE BIT(0) + +@@ -95,6 +96,7 @@ struct ov5647 { + int power_count; + struct clk *xclk; + struct gpio_desc *pwdn; ++ unsigned int flags; + }; + + static inline struct ov5647 *to_state(struct v4l2_subdev *sd) +@@ -269,9 +271,15 @@ static int ov5647_set_virtual_channel(st + + static int ov5647_stream_on(struct v4l2_subdev *sd) + { ++ struct ov5647 *ov5647 = to_state(sd); ++ u8 val = MIPI_CTRL00_BUS_IDLE; + int ret; + +- ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_BUS_IDLE); ++ if (ov5647->flags & V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK) ++ val |= MIPI_CTRL00_CLOCK_LANE_GATE | ++ MIPI_CTRL00_LINE_SYNC_ENABLE; ++ ++ ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, val); + if (ret < 0) + return ret; + +@@ -568,7 +576,7 @@ static const struct v4l2_subdev_internal + .open = ov5647_open, + }; + +-static int ov5647_parse_dt(struct device_node *np) ++static int ov5647_parse_dt(struct device_node *np, struct ov5647 *sensor) + { + struct v4l2_fwnode_endpoint bus_cfg; + struct device_node *ep; +@@ -581,6 +589,9 @@ static int ov5647_parse_dt(struct device + + ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg); + ++ if (!ret) ++ sensor->flags = bus_cfg.bus.mipi_csi2.flags; ++ + of_node_put(ep); + return ret; + } +@@ -600,7 +611,7 @@ static int ov5647_probe(struct i2c_clien + return -ENOMEM; + + if (IS_ENABLED(CONFIG_OF) && np) { +- ret = ov5647_parse_dt(np); ++ ret = ov5647_parse_dt(np, sensor); + if (ret) { + dev_err(dev, "DT parsing error: %d\n", ret); + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0190-media-tc358743-Increase-FIFO-level-to-374.patch b/target/linux/brcm2708/patches-4.19/950-0190-media-tc358743-Increase-FIFO-level-to-374.patch new file mode 100644 index 000000000..6dac072ff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0190-media-tc358743-Increase-FIFO-level-to-374.patch @@ -0,0 +1,31 @@ +From 74cfa3689511a7befa86ab18ff4d4d9662472c08 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:56:59 +0000 +Subject: [PATCH 190/703] media: tc358743: Increase FIFO level to 374. + +The existing fixed value of 16 worked for UYVY 720P60 over +2 lanes at 594MHz, or UYVY 1080P60 over 4 lanes. (RGB888 +1080P60 needs 6 lanes at 594MHz). +It doesn't allow for lower resolutions to work as the FIFO +underflows. + +374 is required for 1080P24-30 UYVY over 2 lanes @ 972Mbit/s, but +>374 means that the FIFO underflows on 1080P50 UYVY over 2 lanes +@ 972Mbit/s. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/tc358743.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/media/i2c/tc358743.c ++++ b/drivers/media/i2c/tc358743.c +@@ -1946,7 +1946,7 @@ static int tc358743_probe_of(struct tc35 + state->pdata.ddc5v_delay = DDC5V_DELAY_100_MS; + state->pdata.enable_hdcp = false; + /* A FIFO level of 16 should be enough for 2-lane 720p60 at 594 MHz. */ +- state->pdata.fifo_level = 16; ++ state->pdata.fifo_level = 374; + /* + * The PLL input clock is obtained by dividing refclk by pll_prd. + * It must be between 6 MHz and 40 MHz, lower frequency is better. diff --git a/target/linux/brcm2708/patches-4.19/950-0191-media-tc358743-fix-connected-active-CSI-2-lane-repor.patch b/target/linux/brcm2708/patches-4.19/950-0191-media-tc358743-fix-connected-active-CSI-2-lane-repor.patch new file mode 100644 index 000000000..48c012109 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0191-media-tc358743-fix-connected-active-CSI-2-lane-repor.patch @@ -0,0 +1,95 @@ +From 5223be7b3a1ee9849730657ade5767bd3f6cf3bd Mon Sep 17 00:00:00 2001 +From: Philipp Zabel +Date: Thu, 21 Sep 2017 17:30:24 +0200 +Subject: [PATCH 191/703] media: tc358743: fix connected/active CSI-2 lane + reporting + +g_mbus_config was supposed to indicate all supported lane numbers, not +only the number of those currently in active use. Since the TC358743 +can dynamically reduce the number of active lanes if the required +bandwidth allows for it, report all lane numbers up to the connected +number of lanes as supported in pdata mode. +In device tree mode, do not report lane count and clock mode at all, as +the receiver driver can determine these from the device tree. + +To allow communicating the number of currently active lanes, add a new +bitfield to the v4l2_mbus_config flags. This is a temporary fix, to be +used only until a better solution is found. + +Signed-off-by: Philipp Zabel +--- + drivers/media/i2c/tc358743.c | 30 ++++++++++++++++-------------- + include/media/v4l2-mediabus.h | 8 ++++++++ + 2 files changed, 24 insertions(+), 14 deletions(-) + +--- a/drivers/media/i2c/tc358743.c ++++ b/drivers/media/i2c/tc358743.c +@@ -1606,28 +1606,29 @@ static int tc358743_g_mbus_config(struct + struct v4l2_mbus_config *cfg) + { + struct tc358743_state *state = to_state(sd); ++ const u32 mask = V4L2_MBUS_CSI2_LANE_MASK; ++ ++ if (state->csi_lanes_in_use > state->bus.num_data_lanes) ++ return -EINVAL; + + cfg->type = V4L2_MBUS_CSI2; ++ cfg->flags = (state->csi_lanes_in_use << __ffs(mask)) & mask; ++ ++ /* In DT mode, only report the number of active lanes */ ++ if (sd->dev->of_node) ++ return 0; + +- /* Support for non-continuous CSI-2 clock is missing in the driver */ +- cfg->flags = V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; ++ /* Support for non-continuous CSI-2 clock is missing in pdata mode */ ++ cfg->flags |= V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; + +- switch (state->csi_lanes_in_use) { +- case 1: ++ if (state->bus.num_data_lanes > 0) + cfg->flags |= V4L2_MBUS_CSI2_1_LANE; +- break; +- case 2: ++ if (state->bus.num_data_lanes > 1) + cfg->flags |= V4L2_MBUS_CSI2_2_LANE; +- break; +- case 3: ++ if (state->bus.num_data_lanes > 2) + cfg->flags |= V4L2_MBUS_CSI2_3_LANE; +- break; +- case 4: ++ if (state->bus.num_data_lanes > 3) + cfg->flags |= V4L2_MBUS_CSI2_4_LANE; +- break; +- default: +- return -EINVAL; +- } + + return 0; + } +@@ -2052,6 +2053,7 @@ static int tc358743_probe(struct i2c_cli + if (pdata) { + state->pdata = *pdata; + state->bus.flags = V4L2_MBUS_CSI2_CONTINUOUS_CLOCK; ++ state->bus.num_data_lanes = 4; + } else { + err = tc358743_probe_of(state); + if (err == -ENODEV) +--- a/include/media/v4l2-mediabus.h ++++ b/include/media/v4l2-mediabus.h +@@ -67,6 +67,14 @@ + V4L2_MBUS_CSI2_3_LANE | V4L2_MBUS_CSI2_4_LANE) + #define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | V4L2_MBUS_CSI2_CHANNEL_1 | \ + V4L2_MBUS_CSI2_CHANNEL_2 | V4L2_MBUS_CSI2_CHANNEL_3) ++/* ++ * Number of lanes in use, 0 == use all available lanes (default) ++ * ++ * This is a temporary fix for devices that need to reduce the number of active ++ * lanes for certain modes, until g_mbus_config() can be replaced with a better ++ * solution. ++ */ ++#define V4L2_MBUS_CSI2_LANE_MASK (0xf << 10) + + /** + * enum v4l2_mbus_type - media bus type diff --git a/target/linux/brcm2708/patches-4.19/950-0192-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch b/target/linux/brcm2708/patches-4.19/950-0192-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch new file mode 100644 index 000000000..41e82c46a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0192-media-tc358743-Add-support-for-972Mbit-s-link-freq.patch @@ -0,0 +1,79 @@ +From 518faafd6f8b692a3448b6ca6e5e473f55d5360e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:57:21 +0000 +Subject: [PATCH 192/703] media: tc358743: Add support for 972Mbit/s link freq. + +Adds register setups for running the CSI lanes at 972Mbit/s, +which allows 1080P50 UYVY down 2 lanes. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/tc358743.c | 47 +++++++++++++++++++++++++----------- + 1 file changed, 33 insertions(+), 14 deletions(-) + +--- a/drivers/media/i2c/tc358743.c ++++ b/drivers/media/i2c/tc358743.c +@@ -1967,6 +1967,7 @@ static int tc358743_probe_of(struct tc35 + /* + * The CSI bps per lane must be between 62.5 Mbps and 1 Gbps. + * The default is 594 Mbps for 4-lane 1080p60 or 2-lane 720p60. ++ * 972 Mbps allows 1080P50 UYVY over 2-lane. + */ + bps_pr_lane = 2 * endpoint->link_frequencies[0]; + if (bps_pr_lane < 62500000U || bps_pr_lane > 1000000000U) { +@@ -1979,23 +1980,41 @@ static int tc358743_probe_of(struct tc35 + state->pdata.refclk_hz * state->pdata.pll_prd; + + /* +- * FIXME: These timings are from REF_02 for 594 Mbps per lane (297 MHz +- * link frequency). In principle it should be possible to calculate ++ * FIXME: These timings are from REF_02 for 594 or 972 Mbps per lane ++ * (297 MHz or 486 MHz link frequency). ++ * In principle it should be possible to calculate + * them based on link frequency and resolution. + */ +- if (bps_pr_lane != 594000000U) ++ switch (bps_pr_lane) { ++ default: + dev_warn(dev, "untested bps per lane: %u bps\n", bps_pr_lane); +- state->pdata.lineinitcnt = 0xe80; +- state->pdata.lptxtimecnt = 0x003; +- /* tclk-preparecnt: 3, tclk-zerocnt: 20 */ +- state->pdata.tclk_headercnt = 0x1403; +- state->pdata.tclk_trailcnt = 0x00; +- /* ths-preparecnt: 3, ths-zerocnt: 1 */ +- state->pdata.ths_headercnt = 0x0103; +- state->pdata.twakeup = 0x4882; +- state->pdata.tclk_postcnt = 0x008; +- state->pdata.ths_trailcnt = 0x2; +- state->pdata.hstxvregcnt = 0; ++ case 594000000U: ++ state->pdata.lineinitcnt = 0xe80; ++ state->pdata.lptxtimecnt = 0x003; ++ /* tclk-preparecnt: 3, tclk-zerocnt: 20 */ ++ state->pdata.tclk_headercnt = 0x1403; ++ state->pdata.tclk_trailcnt = 0x00; ++ /* ths-preparecnt: 3, ths-zerocnt: 1 */ ++ state->pdata.ths_headercnt = 0x0103; ++ state->pdata.twakeup = 0x4882; ++ state->pdata.tclk_postcnt = 0x008; ++ state->pdata.ths_trailcnt = 0x2; ++ state->pdata.hstxvregcnt = 0; ++ break; ++ case 972000000U: ++ state->pdata.lineinitcnt = 0x1b58; ++ state->pdata.lptxtimecnt = 0x007; ++ /* tclk-preparecnt: 6, tclk-zerocnt: 40 */ ++ state->pdata.tclk_headercnt = 0x2806; ++ state->pdata.tclk_trailcnt = 0x00; ++ /* ths-preparecnt: 6, ths-zerocnt: 8 */ ++ state->pdata.ths_headercnt = 0x0806; ++ state->pdata.twakeup = 0x4268; ++ state->pdata.tclk_postcnt = 0x008; ++ state->pdata.ths_trailcnt = 0x5; ++ state->pdata.hstxvregcnt = 0; ++ break; ++ } + + state->reset_gpio = devm_gpiod_get_optional(dev, "reset", + GPIOD_OUT_LOW); diff --git a/target/linux/brcm2708/patches-4.19/950-0193-media-tc358743-Check-I2C-succeeded-during-probe.patch b/target/linux/brcm2708/patches-4.19/950-0193-media-tc358743-Check-I2C-succeeded-during-probe.patch new file mode 100644 index 000000000..96c55a1d8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0193-media-tc358743-Check-I2C-succeeded-during-probe.patch @@ -0,0 +1,98 @@ +From 0b01e856bf06b8cd40e0edd37b4f3d47935fe09c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:57:34 +0000 +Subject: [PATCH 193/703] media: tc358743: Check I2C succeeded during probe. + +The probe for the TC358743 reads the CHIPID register from +the device and compares it to the expected value of 0. +If the I2C request fails then that also returns 0, so +the driver loads thinking that the device is there. + +Generally I2C communications are reliable so there is +limited need to check the return value on every transfer, +therefore only amend the one read during probe to check +for I2C errors. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/tc358743.c | 27 +++++++++++++++++++++++---- + 1 file changed, 23 insertions(+), 4 deletions(-) + +--- a/drivers/media/i2c/tc358743.c ++++ b/drivers/media/i2c/tc358743.c +@@ -110,7 +110,7 @@ static inline struct tc358743_state *to_ + + /* --------------- I2C --------------- */ + +-static void i2c_rd(struct v4l2_subdev *sd, u16 reg, u8 *values, u32 n) ++static int i2c_rd(struct v4l2_subdev *sd, u16 reg, u8 *values, u32 n) + { + struct tc358743_state *state = to_state(sd); + struct i2c_client *client = state->i2c_client; +@@ -136,6 +136,7 @@ static void i2c_rd(struct v4l2_subdev *s + v4l2_err(sd, "%s: reading register 0x%x from 0x%x failed\n", + __func__, reg, client->addr); + } ++ return err != ARRAY_SIZE(msgs); + } + + static void i2c_wr(struct v4l2_subdev *sd, u16 reg, u8 *values, u32 n) +@@ -192,15 +193,24 @@ static void i2c_wr(struct v4l2_subdev *s + } + } + +-static noinline u32 i2c_rdreg(struct v4l2_subdev *sd, u16 reg, u32 n) ++static noinline u32 i2c_rdreg_err(struct v4l2_subdev *sd, u16 reg, u32 n, ++ int *err) + { ++ int error; + __le32 val = 0; + +- i2c_rd(sd, reg, (u8 __force *)&val, n); ++ error = i2c_rd(sd, reg, (u8 __force *)&val, n); ++ if (err) ++ *err = error; + + return le32_to_cpu(val); + } + ++static inline u32 i2c_rdreg(struct v4l2_subdev *sd, u16 reg, u32 n) ++{ ++ return i2c_rdreg_err(sd, reg, n, NULL); ++} ++ + static noinline void i2c_wrreg(struct v4l2_subdev *sd, u16 reg, u32 val, u32 n) + { + __le32 raw = cpu_to_le32(val); +@@ -229,6 +239,13 @@ static u16 i2c_rd16(struct v4l2_subdev * + return i2c_rdreg(sd, reg, 2); + } + ++static int i2c_rd16_err(struct v4l2_subdev *sd, u16 reg, u16 *value) ++{ ++ int err; ++ *value = i2c_rdreg_err(sd, reg, 2, &err); ++ return err; ++} ++ + static void i2c_wr16(struct v4l2_subdev *sd, u16 reg, u16 val) + { + i2c_wrreg(sd, reg, val, 2); +@@ -2054,6 +2071,7 @@ static int tc358743_probe(struct i2c_cli + struct tc358743_platform_data *pdata = client->dev.platform_data; + struct v4l2_subdev *sd; + u16 irq_mask = MASK_HDMI_MSK | MASK_CSI_MSK; ++ u16 chipid; + int err; + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) +@@ -2086,7 +2104,8 @@ static int tc358743_probe(struct i2c_cli + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; + + /* i2c access */ +- if ((i2c_rd16(sd, CHIPID) & MASK_CHIPID) != 0) { ++ if (i2c_rd16_err(sd, CHIPID, &chipid) || ++ (chipid & MASK_CHIPID) != 0) { + v4l2_info(sd, "not a TC358743 on address 0x%x\n", + client->addr << 1); + return -ENODEV; diff --git a/target/linux/brcm2708/patches-4.19/950-0194-media-adv7180-Default-to-the-first-valid-input.patch b/target/linux/brcm2708/patches-4.19/950-0194-media-adv7180-Default-to-the-first-valid-input.patch new file mode 100644 index 000000000..0797cdc92 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0194-media-adv7180-Default-to-the-first-valid-input.patch @@ -0,0 +1,45 @@ +From cb7c2b320a18a8129092e6b452e72716fa083878 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:57:46 +0000 +Subject: [PATCH 194/703] media: adv7180: Default to the first valid input + +The hardware default is differential CVBS on AIN1 & 2, which +isn't very useful. + +Select the first input that is defined as valid for the +chip variant (typically CVBS_AIN1). + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/adv7180.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/media/i2c/adv7180.c ++++ b/drivers/media/i2c/adv7180.c +@@ -1240,6 +1240,7 @@ static const struct adv7180_chip_info ad + static int init_device(struct adv7180_state *state) + { + int ret; ++ int i; + + mutex_lock(&state->mutex); + +@@ -1286,6 +1287,18 @@ static int init_device(struct adv7180_st + goto out_unlock; + } + ++ /* Select first valid input */ ++ for (i = 0; i < 32; i++) { ++ if (BIT(i) & state->chip_info->valid_input_mask) { ++ ret = state->chip_info->select_input(state, i); ++ ++ if (ret == 0) { ++ state->input = i; ++ break; ++ } ++ } ++ } ++ + out_unlock: + mutex_unlock(&state->mutex); + diff --git a/target/linux/brcm2708/patches-4.19/950-0195-media-adv7180-Add-YPrPb-support-for-ADV7282M.patch b/target/linux/brcm2708/patches-4.19/950-0195-media-adv7180-Add-YPrPb-support-for-ADV7282M.patch new file mode 100644 index 000000000..f4a7e6d29 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0195-media-adv7180-Add-YPrPb-support-for-ADV7282M.patch @@ -0,0 +1,24 @@ +From 17310ae3261766d68d778d353b13970fb6c25810 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:57:56 +0000 +Subject: [PATCH 195/703] media: adv7180: Add YPrPb support for ADV7282M + +The ADV7282M can support YPbPr on AIN1-3, but this was +not selectable from the driver. Add it to the list of +supported input modes. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/adv7180.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/media/i2c/adv7180.c ++++ b/drivers/media/i2c/adv7180.c +@@ -1229,6 +1229,7 @@ static const struct adv7180_chip_info ad + BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) | + BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) | + BIT(ADV7182_INPUT_SVIDEO_AIN7_AIN8) | ++ BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) | + BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) | + BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4) | + BIT(ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8), diff --git a/target/linux/brcm2708/patches-4.19/950-0196-media-videodev2-Add-helper-defines-for-printing-FOUR.patch b/target/linux/brcm2708/patches-4.19/950-0196-media-videodev2-Add-helper-defines-for-printing-FOUR.patch new file mode 100644 index 000000000..00f394387 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0196-media-videodev2-Add-helper-defines-for-printing-FOUR.patch @@ -0,0 +1,28 @@ +From f776604fdd061358ccdc420ba8babcc6fbe76baa Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:58:08 +0000 +Subject: [PATCH 196/703] media: videodev2: Add helper defines for printing + FOURCCs + +New helper defines that allow printing of a FOURCC using +printf(V4L2_FOURCC_CONV, V4L2_FOURCC_CONV_ARGS(fourcc)); + +Signed-off-by: Dave Stevenson +--- + include/uapi/linux/videodev2.h | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -82,6 +82,11 @@ + ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) + #define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1 << 31)) + ++#define V4L2_FOURCC_CONV "%c%c%c%c%s" ++#define V4L2_FOURCC_CONV_ARGS(fourcc) \ ++ (fourcc) & 0x7f, ((fourcc) >> 8) & 0x7f, ((fourcc) >> 16) & 0x7f, \ ++ ((fourcc) >> 24) & 0x7f, (fourcc) & BIT(31) ? "-BE" : "" ++ + /* + * E N U M S + */ diff --git a/target/linux/brcm2708/patches-4.19/950-0197-dt-bindings-Document-BCM283x-CSI2-CCP2-receiver.patch b/target/linux/brcm2708/patches-4.19/950-0197-dt-bindings-Document-BCM283x-CSI2-CCP2-receiver.patch new file mode 100644 index 000000000..0194d83ec --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0197-dt-bindings-Document-BCM283x-CSI2-CCP2-receiver.patch @@ -0,0 +1,103 @@ +From 1adfe2e2d3e1cd6a13e32763e347284c08f6707b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:59:06 +0000 +Subject: [PATCH 197/703] dt-bindings: Document BCM283x CSI2/CCP2 receiver + +Document the DT bindings for the CSI2/CCP2 receiver peripheral +(known as Unicam) on BCM283x SoCs. + +Signed-off-by: Dave Stevenson +Acked-by: Rob Herring +--- + .../bindings/media/bcm2835-unicam.txt | 85 +++++++++++++++++++ + 1 file changed, 85 insertions(+) + create mode 100644 Documentation/devicetree/bindings/media/bcm2835-unicam.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/media/bcm2835-unicam.txt +@@ -0,0 +1,85 @@ ++Broadcom BCM283x Camera Interface (Unicam) ++------------------------------------------ ++ ++The Unicam block on BCM283x SoCs is the receiver for either ++CSI-2 or CCP2 data from image sensors or similar devices. ++ ++The main platform using this SoC is the Raspberry Pi family of boards. ++On the Pi the VideoCore firmware can also control this hardware block, ++and driving it from two different processors will cause issues. ++To avoid this, the firmware checks the device tree configuration ++during boot. If it finds device tree nodes called csi0 or csi1 then ++it will stop the firmware accessing the block, and it can then ++safely be used via the device tree binding. ++ ++Required properties: ++=================== ++- compatible : must be "brcm,bcm2835-unicam". ++- reg : physical base address and length of the register sets for the ++ device. ++- interrupts : should contain the IRQ line for this Unicam instance. ++- clocks : list of clock specifiers, corresponding to entries in ++ clock-names property. ++- clock-names : must contain an "lp" entry, matching entries in the ++ clocks property. ++ ++Unicam supports a single port node. It should contain one 'port' child node ++with child 'endpoint' node. Please refer to the bindings defined in ++Documentation/devicetree/bindings/media/video-interfaces.txt. ++ ++Within the endpoint node the "remote-endpoint" and "data-lanes" properties ++are mandatory. ++Data lane reordering is not supported so the data lanes must be in order, ++starting at 1. The number of data lanes should represent the number of ++usable lanes for the hardware block. That may be limited by either the SoC or ++how the platform presents the interface, and the lower value must be used. ++ ++Lane reordering is not supported on the clock lane either, so the optional ++property "clock-lane" will implicitly be <0>. ++Similarly lane inversion is not supported, therefore "lane-polarities" will ++implicitly be <0 0 0 0 0>. ++Neither of these values will be checked. ++ ++Example: ++ csi1: csi1@7e801000 { ++ compatible = "brcm,bcm2835-unicam"; ++ reg = <0x7e801000 0x800>, ++ <0x7e802004 0x4>; ++ interrupts = <2 7>; ++ clocks = <&clocks BCM2835_CLOCK_CAM1>; ++ clock-names = "lp"; ++ ++ port { ++ csi1_ep: endpoint { ++ remote-endpoint = <&tc358743_0>; ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++ ++ i2c0: i2c@7e205000 { ++ tc358743: csi-hdmi-bridge@0f { ++ compatible = "toshiba,tc358743"; ++ reg = <0x0f>; ++ ++ clocks = <&tc358743_clk>; ++ clock-names = "refclk"; ++ ++ tc358743_clk: bridge-clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <27000000>; ++ }; ++ ++ port { ++ tc358743_0: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ clock-noncontinuous; ++ link-frequencies = ++ /bits/ 64 <297000000>; ++ }; ++ }; ++ }; ++ }; diff --git a/target/linux/brcm2708/patches-4.19/950-0198-media-bcm2835-unicam-Driver-for-CCP2-CSI2-camera-int.patch b/target/linux/brcm2708/patches-4.19/950-0198-media-bcm2835-unicam-Driver-for-CCP2-CSI2-camera-int.patch new file mode 100644 index 000000000..74db12dc4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0198-media-bcm2835-unicam-Driver-for-CCP2-CSI2-camera-int.patch @@ -0,0 +1,2437 @@ +From f37e8a66e3cd8eafc8b233ae250e2ac159b6870b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:59:22 +0000 +Subject: [PATCH 198/703] media: bcm2835-unicam: Driver for CCP2/CSI2 camera + interface + +Add driver for the Unicam camera receiver block on +BCM283x processors. + +Signed-off-by: Dave Stevenson +--- + drivers/media/platform/Kconfig | 1 + + drivers/media/platform/Makefile | 2 + + drivers/media/platform/bcm2835/Kconfig | 14 + + drivers/media/platform/bcm2835/Makefile | 3 + + .../media/platform/bcm2835/bcm2835-unicam.c | 2101 +++++++++++++++++ + .../media/platform/bcm2835/vc4-regs-unicam.h | 266 +++ + 6 files changed, 2387 insertions(+) + create mode 100644 drivers/media/platform/bcm2835/Kconfig + create mode 100644 drivers/media/platform/bcm2835/Makefile + create mode 100644 drivers/media/platform/bcm2835/bcm2835-unicam.c + create mode 100644 drivers/media/platform/bcm2835/vc4-regs-unicam.h + +--- a/drivers/media/platform/Kconfig ++++ b/drivers/media/platform/Kconfig +@@ -137,6 +137,7 @@ source "drivers/media/platform/am437x/Kc + source "drivers/media/platform/xilinx/Kconfig" + source "drivers/media/platform/rcar-vin/Kconfig" + source "drivers/media/platform/atmel/Kconfig" ++source "drivers/media/platform/bcm2835/Kconfig" + + config VIDEO_TI_CAL + tristate "TI CAL (Camera Adaptation Layer) driver" +--- a/drivers/media/platform/Makefile ++++ b/drivers/media/platform/Makefile +@@ -96,3 +96,5 @@ obj-$(CONFIG_VIDEO_QCOM_VENUS) += qcom/ + obj-y += meson/ + + obj-y += cros-ec-cec/ ++ ++obj-y += bcm2835/ +--- /dev/null ++++ b/drivers/media/platform/bcm2835/Kconfig +@@ -0,0 +1,14 @@ ++# Broadcom VideoCore4 V4L2 camera support ++ ++config VIDEO_BCM2835_UNICAM ++ tristate "Broadcom BCM2835 Unicam video capture driver" ++ depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API ++ depends on ARCH_BCM2835 || COMPILE_TEST ++ select VIDEOBUF2_DMA_CONTIG ++ select V4L2_FWNODE ++ help ++ Say Y here to enable V4L2 subdevice for CSI2 receiver. ++ This is a V4L2 subdevice that interfaces directly to the VC4 peripheral. ++ ++ To compile this driver as a module, choose M here. The module ++ will be called bcm2835-unicam. +--- /dev/null ++++ b/drivers/media/platform/bcm2835/Makefile +@@ -0,0 +1,3 @@ ++# Makefile for BCM2835 Unicam driver ++ ++obj-$(CONFIG_VIDEO_BCM2835_UNICAM) += bcm2835-unicam.o +--- /dev/null ++++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c +@@ -0,0 +1,2101 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* ++ * BCM2835 Unicam capture Driver ++ * ++ * Copyright (C) 2017 - Raspberry Pi (Trading) Ltd. ++ * ++ * Dave Stevenson ++ * ++ * Based on TI am437x driver by Benoit Parrot and Lad, Prabhakar and ++ * TI CAL camera interface driver by Benoit Parrot. ++ * ++ * ++ * There are two camera drivers in the kernel for BCM283x - this one ++ * and bcm2835-camera (currently in staging). ++ * ++ * This driver directly controls the Unicam peripheral - there is no ++ * involvement with the VideoCore firmware. Unicam receives CSI-2 or ++ * CCP2 data and writes it into SDRAM. The only potential processing options are ++ * to repack Bayer data into an alternate format, and applying windowing. ++ * The repacking does not shift the data, so could repack V4L2_PIX_FMT_Sxxxx10P ++ * to V4L2_PIX_FMT_Sxxxx10, or V4L2_PIX_FMT_Sxxxx12P to V4L2_PIX_FMT_Sxxxx12, ++ * but not generically up to V4L2_PIX_FMT_Sxxxx16. ++ * Adding support for repacking and windowing may be added later. ++ * ++ * It should be possible to connect this driver to any sensor with a ++ * suitable output interface and V4L2 subdevice driver. ++ * ++ * bcm2835-camera uses the VideoCore firmware to control the sensor, ++ * Unicam, ISP, and all tuner control loops. Fully processed frames are ++ * delivered to the driver by the firmware. It only has sensor drivers ++ * for Omnivision OV5647, and Sony IMX219 sensors. ++ * ++ * The two drivers are mutually exclusive for the same Unicam instance. ++ * The VideoCore firmware checks the device tree configuration during boot. ++ * If it finds device tree nodes called csi0 or csi1 it will block the ++ * firmware from accessing the peripheral, and bcm2835-camera will ++ * not be able to stream data. ++ * ++ * ++ * This program is free software; you may redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; version 2 of the License. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS ++ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ++ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ++ * SOFTWARE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vc4-regs-unicam.h" ++ ++#define UNICAM_MODULE_NAME "unicam" ++#define UNICAM_VERSION "0.1.0" ++ ++static int debug; ++module_param(debug, int, 0644); ++MODULE_PARM_DESC(debug, "Debug level 0-3"); ++ ++#define unicam_dbg(level, dev, fmt, arg...) \ ++ v4l2_dbg(level, debug, &(dev)->v4l2_dev, fmt, ##arg) ++#define unicam_info(dev, fmt, arg...) \ ++ v4l2_info(&(dev)->v4l2_dev, fmt, ##arg) ++#define unicam_err(dev, fmt, arg...) \ ++ v4l2_err(&(dev)->v4l2_dev, fmt, ##arg) ++ ++/* ++ * Stride is a 16 bit register, but also has to be a multiple of 16. ++ */ ++#define BPL_ALIGNMENT 16 ++#define MAX_BYTESPERLINE ((1 << 16) - BPL_ALIGNMENT) ++/* ++ * Max width is therefore determined by the max stride divided by ++ * the number of bits per pixel. Take 32bpp as a ++ * worst case. ++ * No imposed limit on the height, so adopt a square image for want ++ * of anything better. ++ */ ++#define MAX_WIDTH (MAX_BYTESPERLINE / 4) ++#define MAX_HEIGHT MAX_WIDTH ++/* Define a nominal minimum image size */ ++#define MIN_WIDTH 16 ++#define MIN_HEIGHT 16 ++/* ++ * Whilst Unicam doesn't require any additional padding on the image ++ * height, various other parts of the BCM283x frameworks require a multiple ++ * of 16. ++ * Seeing as image buffers are significantly larger than this extra ++ * padding, add it in order to simplify integration. ++ */ ++#define HEIGHT_ALIGNMENT 16 ++ ++/* ++ * struct unicam_fmt - Unicam media bus format information ++ * @pixelformat: V4L2 pixel format FCC identifier. ++ * @code: V4L2 media bus format code. ++ * @depth: Bits per pixel (when stored in memory). ++ * @csi_dt: CSI data type. ++ */ ++struct unicam_fmt { ++ u32 fourcc; ++ u32 code; ++ u8 depth; ++ u8 csi_dt; ++}; ++ ++static const struct unicam_fmt formats[] = { ++ /* YUV Formats */ ++ { ++ .fourcc = V4L2_PIX_FMT_YUYV, ++ .code = MEDIA_BUS_FMT_YUYV8_2X8, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_UYVY, ++ .code = MEDIA_BUS_FMT_UYVY8_2X8, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YVYU, ++ .code = MEDIA_BUS_FMT_YVYU8_2X8, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_VYUY, ++ .code = MEDIA_BUS_FMT_VYUY8_2X8, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YUYV, ++ .code = MEDIA_BUS_FMT_YUYV8_1X16, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_UYVY, ++ .code = MEDIA_BUS_FMT_UYVY8_1X16, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YVYU, ++ .code = MEDIA_BUS_FMT_YVYU8_1X16, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ .fourcc = V4L2_PIX_FMT_VYUY, ++ .code = MEDIA_BUS_FMT_VYUY8_1X16, ++ .depth = 16, ++ .csi_dt = 0x1e, ++ }, { ++ /* RGB Formats */ ++ .fourcc = V4L2_PIX_FMT_RGB565, /* gggbbbbb rrrrrggg */ ++ .code = MEDIA_BUS_FMT_RGB565_2X8_LE, ++ .depth = 16, ++ .csi_dt = 0x22, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB565X, /* rrrrrggg gggbbbbb */ ++ .code = MEDIA_BUS_FMT_RGB565_2X8_BE, ++ .depth = 16, ++ .csi_dt = 0x22 ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB555, /* gggbbbbb arrrrrgg */ ++ .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, ++ .depth = 16, ++ .csi_dt = 0x21, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB555X, /* arrrrrgg gggbbbbb */ ++ .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, ++ .depth = 16, ++ .csi_dt = 0x21, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB24, /* rgb */ ++ .code = MEDIA_BUS_FMT_RGB888_1X24, ++ .depth = 24, ++ .csi_dt = 0x24, ++ }, { ++ .fourcc = V4L2_PIX_FMT_BGR24, /* bgr */ ++ .code = MEDIA_BUS_FMT_BGR888_1X24, ++ .depth = 24, ++ .csi_dt = 0x24, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB32, /* argb */ ++ .code = MEDIA_BUS_FMT_ARGB8888_1X32, ++ .depth = 32, ++ .csi_dt = 0x0, ++ }, { ++ /* Bayer Formats */ ++ .fourcc = V4L2_PIX_FMT_SBGGR8, ++ .code = MEDIA_BUS_FMT_SBGGR8_1X8, ++ .depth = 8, ++ .csi_dt = 0x2a, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG8, ++ .code = MEDIA_BUS_FMT_SGBRG8_1X8, ++ .depth = 8, ++ .csi_dt = 0x2a, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG8, ++ .code = MEDIA_BUS_FMT_SGRBG8_1X8, ++ .depth = 8, ++ .csi_dt = 0x2a, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SRGGB8, ++ .code = MEDIA_BUS_FMT_SRGGB8_1X8, ++ .depth = 8, ++ .csi_dt = 0x2a, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR10P, ++ .code = MEDIA_BUS_FMT_SBGGR10_1X10, ++ .depth = 10, ++ .csi_dt = 0x2b, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG10P, ++ .code = MEDIA_BUS_FMT_SGBRG10_1X10, ++ .depth = 10, ++ .csi_dt = 0x2b, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG10P, ++ .code = MEDIA_BUS_FMT_SGRBG10_1X10, ++ .depth = 10, ++ .csi_dt = 0x2b, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SRGGB10P, ++ .code = MEDIA_BUS_FMT_SRGGB10_1X10, ++ .depth = 10, ++ .csi_dt = 0x2b, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR12P, ++ .code = MEDIA_BUS_FMT_SBGGR12_1X12, ++ .depth = 12, ++ .csi_dt = 0x2c, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG12P, ++ .code = MEDIA_BUS_FMT_SGBRG12_1X12, ++ .depth = 12, ++ .csi_dt = 0x2c, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG12P, ++ .code = MEDIA_BUS_FMT_SGRBG12_1X12, ++ .depth = 12, ++ .csi_dt = 0x2c, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SRGGB12P, ++ .code = MEDIA_BUS_FMT_SRGGB12_1X12, ++ .depth = 12, ++ .csi_dt = 0x2c, ++ }, ++ /* ++ * 14 and 16 bit Bayer formats could be supported, but there are no V4L2 ++ * defines for 14bit packed Bayer, and no CSI2 data_type for raw 16. ++ */ ++}; ++ ++struct unicam_dmaqueue { ++ struct list_head active; ++}; ++ ++struct unicam_buffer { ++ struct vb2_v4l2_buffer vb; ++ struct list_head list; ++}; ++ ++struct unicam_cfg { ++ /* peripheral base address */ ++ void __iomem *base; ++ /* clock gating base address */ ++ void __iomem *clk_gate_base; ++}; ++ ++#define MAX_POSSIBLE_PIX_FMTS (ARRAY_SIZE(formats)) ++ ++struct unicam_device { ++ /* V4l2 specific parameters */ ++ /* Identifies video device for this channel */ ++ struct video_device video_dev; ++ struct v4l2_ctrl_handler ctrl_handler; ++ ++ struct v4l2_fwnode_endpoint endpoint; ++ ++ struct v4l2_async_subdev asd; ++ ++ /* unicam cfg */ ++ struct unicam_cfg cfg; ++ /* clock handle */ ++ struct clk *clock; ++ /* V4l2 device */ ++ struct v4l2_device v4l2_dev; ++ /* parent device */ ++ struct platform_device *pdev; ++ /* subdevice async Notifier */ ++ struct v4l2_async_notifier notifier; ++ unsigned int sequence; ++ ++ /* ptr to sub device */ ++ struct v4l2_subdev *sensor; ++ /* Pad config for the sensor */ ++ struct v4l2_subdev_pad_config *sensor_config; ++ /* current input at the sub device */ ++ int current_input; ++ ++ /* Pointer pointing to current v4l2_buffer */ ++ struct unicam_buffer *cur_frm; ++ /* Pointer pointing to next v4l2_buffer */ ++ struct unicam_buffer *next_frm; ++ ++ /* video capture */ ++ const struct unicam_fmt *fmt; ++ /* Used to store current pixel format */ ++ struct v4l2_format v_fmt; ++ /* Used to store current mbus frame format */ ++ struct v4l2_mbus_framefmt m_fmt; ++ ++ struct unicam_fmt active_fmts[MAX_POSSIBLE_PIX_FMTS]; ++ int num_active_fmt; ++ unsigned int virtual_channel; ++ enum v4l2_mbus_type bus_type; ++ /* ++ * Stores bus.mipi_csi2.flags for CSI2 sensors, or ++ * bus.mipi_csi1.strobe for CCP2. ++ */ ++ unsigned int bus_flags; ++ unsigned int max_data_lanes; ++ unsigned int active_data_lanes; ++ ++ struct v4l2_rect crop; ++ ++ /* Currently selected input on subdev */ ++ int input; ++ ++ /* Buffer queue used in video-buf */ ++ struct vb2_queue buffer_queue; ++ /* Queue of filled frames */ ++ struct unicam_dmaqueue dma_queue; ++ /* IRQ lock for DMA queue */ ++ spinlock_t dma_queue_lock; ++ /* lock used to access this structure */ ++ struct mutex lock; ++ /* Flag to denote that we are processing buffers */ ++ int streaming; ++}; ++ ++/* Hardware access */ ++#define clk_write(dev, val) writel((val) | 0x5a000000, (dev)->clk_gate_base) ++#define clk_read(dev) readl((dev)->clk_gate_base) ++ ++#define reg_read(dev, offset) readl((dev)->base + (offset)) ++#define reg_write(dev, offset, val) writel(val, (dev)->base + (offset)) ++ ++#define reg_read_field(dev, offset, mask) get_field(reg_read((dev), (offset), \ ++ mask)) ++ ++static inline int get_field(u32 value, u32 mask) ++{ ++ return (value & mask) >> __ffs(mask); ++} ++ ++static inline void set_field(u32 *valp, u32 field, u32 mask) ++{ ++ u32 val = *valp; ++ ++ val &= ~mask; ++ val |= (field << __ffs(mask)) & mask; ++ *valp = val; ++} ++ ++static inline void reg_write_field(struct unicam_cfg *dev, u32 offset, ++ u32 field, u32 mask) ++{ ++ u32 val = reg_read((dev), (offset)); ++ ++ set_field(&val, field, mask); ++ reg_write((dev), (offset), val); ++} ++ ++/* Power management functions */ ++static inline int unicam_runtime_get(struct unicam_device *dev) ++{ ++ int r; ++ ++ r = pm_runtime_get_sync(&dev->pdev->dev); ++ ++ return r; ++} ++ ++static inline void unicam_runtime_put(struct unicam_device *dev) ++{ ++ pm_runtime_put_sync(&dev->pdev->dev); ++} ++ ++/* Format setup functions */ ++static int find_mbus_depth_by_code(u32 code) ++{ ++ const struct unicam_fmt *fmt; ++ unsigned int k; ++ ++ for (k = 0; k < ARRAY_SIZE(formats); k++) { ++ fmt = &formats[k]; ++ if (fmt->code == code) ++ return fmt->depth; ++ } ++ ++ return 0; ++} ++ ++static const struct unicam_fmt *find_format_by_code(struct unicam_device *dev, ++ u32 code) ++{ ++ const struct unicam_fmt *fmt; ++ unsigned int k; ++ ++ for (k = 0; k < dev->num_active_fmt; k++) { ++ fmt = &dev->active_fmts[k]; ++ if (fmt->code == code) ++ return fmt; ++ } ++ ++ return NULL; ++} ++ ++static const struct unicam_fmt *find_format_by_pix(struct unicam_device *dev, ++ u32 pixelformat) ++{ ++ const struct unicam_fmt *fmt; ++ unsigned int k; ++ ++ for (k = 0; k < dev->num_active_fmt; k++) { ++ fmt = &dev->active_fmts[k]; ++ if (fmt->fourcc == pixelformat) ++ return fmt; ++ } ++ ++ return NULL; ++} ++ ++static void dump_active_formats(struct unicam_device *dev) ++{ ++ int i; ++ ++ for (i = 0; i < dev->num_active_fmt; i++) { ++ unicam_dbg(3, dev, "active_fmt[%d] (%p) is code %04x, fourcc " V4L2_FOURCC_CONV ", depth %d\n", ++ i, &dev->active_fmts[i], dev->active_fmts[i].code, ++ V4L2_FOURCC_CONV_ARGS(dev->active_fmts[i].fourcc), ++ dev->active_fmts[i].depth); ++ } ++} ++ ++static inline unsigned int bytes_per_line(u32 width, ++ const struct unicam_fmt *fmt) ++{ ++ return ALIGN((width * fmt->depth) >> 3, BPL_ALIGNMENT); ++} ++ ++static int __subdev_get_format(struct unicam_device *dev, ++ struct v4l2_mbus_framefmt *fmt) ++{ ++ struct v4l2_subdev_format sd_fmt = {0}; ++ struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format; ++ int ret; ++ ++ sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; ++ sd_fmt.pad = 0; ++ ++ ret = v4l2_subdev_call(dev->sensor, pad, get_fmt, dev->sensor_config, ++ &sd_fmt); ++ if (ret < 0) ++ return ret; ++ ++ *fmt = *mbus_fmt; ++ ++ unicam_dbg(1, dev, "%s %dx%d code:%04x\n", __func__, ++ fmt->width, fmt->height, fmt->code); ++ ++ return 0; ++} ++ ++static int __subdev_set_format(struct unicam_device *dev, ++ struct v4l2_mbus_framefmt *fmt) ++{ ++ struct v4l2_subdev_format sd_fmt = { ++ .which = V4L2_SUBDEV_FORMAT_ACTIVE, ++ }; ++ struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format; ++ int ret; ++ ++ *mbus_fmt = *fmt; ++ ++ ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_config, ++ &sd_fmt); ++ if (ret < 0) ++ return ret; ++ ++ unicam_dbg(1, dev, "%s %dx%d code:%04x\n", __func__, ++ fmt->width, fmt->height, fmt->code); ++ ++ return 0; ++} ++ ++static int unicam_calc_format_size_bpl(struct unicam_device *dev, ++ const struct unicam_fmt *fmt, ++ struct v4l2_format *f) ++{ ++ unsigned int min_bytesperline; ++ ++ v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, MAX_WIDTH, 2, ++ &f->fmt.pix.height, MIN_HEIGHT, MAX_HEIGHT, 0, ++ 0); ++ ++ min_bytesperline = bytes_per_line(f->fmt.pix.width, fmt); ++ ++ if (f->fmt.pix.bytesperline > min_bytesperline && ++ f->fmt.pix.bytesperline <= MAX_BYTESPERLINE) ++ f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.bytesperline, ++ BPL_ALIGNMENT); ++ else ++ f->fmt.pix.bytesperline = min_bytesperline; ++ ++ /* Align height up for compatibility with other hardware blocks */ ++ f->fmt.pix.sizeimage = ALIGN(f->fmt.pix.height, HEIGHT_ALIGNMENT) * ++ f->fmt.pix.bytesperline; ++ ++ unicam_dbg(3, dev, "%s: fourcc: " V4L2_FOURCC_CONV " size: %dx%d bpl:%d img_size:%d\n", ++ __func__, ++ V4L2_FOURCC_CONV_ARGS(f->fmt.pix.pixelformat), ++ f->fmt.pix.width, f->fmt.pix.height, ++ f->fmt.pix.bytesperline, f->fmt.pix.sizeimage); ++ ++ return 0; ++} ++ ++static int unicam_reset_format(struct unicam_device *dev) ++{ ++ struct v4l2_mbus_framefmt mbus_fmt; ++ int ret; ++ ++ ret = __subdev_get_format(dev, &mbus_fmt); ++ if (ret) { ++ unicam_err(dev, "Failed to get_format - ret %d\n", ret); ++ return ret; ++ } ++ ++ if (mbus_fmt.code != dev->fmt->code) { ++ unicam_err(dev, "code mismatch - fmt->code %08x, mbus_fmt.code %08x\n", ++ dev->fmt->code, mbus_fmt.code); ++ return ret; ++ } ++ ++ v4l2_fill_pix_format(&dev->v_fmt.fmt.pix, &mbus_fmt); ++ dev->v_fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ ++ unicam_calc_format_size_bpl(dev, dev->fmt, &dev->v_fmt); ++ ++ dev->m_fmt = mbus_fmt; ++ ++ return 0; ++} ++ ++static void unicam_wr_dma_addr(struct unicam_device *dev, unsigned int dmaaddr) ++{ ++ unicam_dbg(1, dev, "wr_dma_addr %08x-%08x\n", ++ dmaaddr, dmaaddr + dev->v_fmt.fmt.pix.sizeimage); ++ reg_write(&dev->cfg, UNICAM_IBSA0, dmaaddr); ++ reg_write(&dev->cfg, UNICAM_IBEA0, ++ dmaaddr + dev->v_fmt.fmt.pix.sizeimage); ++} ++ ++static inline void unicam_schedule_next_buffer(struct unicam_device *dev) ++{ ++ struct unicam_dmaqueue *dma_q = &dev->dma_queue; ++ struct unicam_buffer *buf; ++ dma_addr_t addr; ++ ++ buf = list_entry(dma_q->active.next, struct unicam_buffer, list); ++ dev->next_frm = buf; ++ list_del(&buf->list); ++ ++ addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0); ++ unicam_wr_dma_addr(dev, addr); ++} ++ ++static inline void unicam_process_buffer_complete(struct unicam_device *dev) ++{ ++ dev->cur_frm->vb.field = dev->m_fmt.field; ++ dev->cur_frm->vb.sequence = dev->sequence++; ++ ++ vb2_buffer_done(&dev->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE); ++ dev->cur_frm = dev->next_frm; ++} ++ ++/* ++ * unicam_isr : ISR handler for unicam capture ++ * @irq: irq number ++ * @dev_id: dev_id ptr ++ * ++ * It changes status of the captured buffer, takes next buffer from the queue ++ * and sets its address in unicam registers ++ */ ++static irqreturn_t unicam_isr(int irq, void *dev) ++{ ++ struct unicam_device *unicam = (struct unicam_device *)dev; ++ struct unicam_cfg *cfg = &unicam->cfg; ++ struct unicam_dmaqueue *dma_q = &unicam->dma_queue; ++ int ista, sta; ++ ++ /* ++ * Don't service interrupts if not streaming. ++ * Avoids issues if the VPU should enable the ++ * peripheral without the kernel knowing (that ++ * shouldn't happen, but causes issues if it does). ++ */ ++ if (!unicam->streaming) ++ return IRQ_HANDLED; ++ ++ sta = reg_read(cfg, UNICAM_STA); ++ /* Write value back to clear the interrupts */ ++ reg_write(cfg, UNICAM_STA, sta); ++ ++ ista = reg_read(cfg, UNICAM_ISTA); ++ /* Write value back to clear the interrupts */ ++ reg_write(cfg, UNICAM_ISTA, ista); ++ ++ if (!(sta && (UNICAM_IS | UNICAM_PI0))) ++ return IRQ_HANDLED; ++ ++ if (ista & UNICAM_FSI) { ++ /* ++ * Timestamp is to be when the first data byte was captured, ++ * aka frame start. ++ */ ++ if (unicam->cur_frm) ++ unicam->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns(); ++ } ++ if (ista & UNICAM_FEI || sta & UNICAM_PI0) { ++ /* ++ * Ensure we have swapped buffers already as we can't ++ * stop the peripheral. Overwrite the frame we've just ++ * captured instead. ++ */ ++ if (unicam->cur_frm && unicam->cur_frm != unicam->next_frm) ++ unicam_process_buffer_complete(unicam); ++ } ++ ++ if (ista & (UNICAM_FSI | UNICAM_LCI)) { ++ spin_lock(&unicam->dma_queue_lock); ++ if (!list_empty(&dma_q->active) && ++ unicam->cur_frm == unicam->next_frm) ++ unicam_schedule_next_buffer(unicam); ++ spin_unlock(&unicam->dma_queue_lock); ++ } ++ ++ if (reg_read(&unicam->cfg, UNICAM_ICTL) & UNICAM_FCM) { ++ /* Switch out of trigger mode if selected */ ++ reg_write_field(&unicam->cfg, UNICAM_ICTL, 1, UNICAM_TFC); ++ reg_write_field(&unicam->cfg, UNICAM_ICTL, 0, UNICAM_FCM); ++ } ++ return IRQ_HANDLED; ++} ++ ++static int unicam_querycap(struct file *file, void *priv, ++ struct v4l2_capability *cap) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ strlcpy(cap->driver, UNICAM_MODULE_NAME, sizeof(cap->driver)); ++ strlcpy(cap->card, UNICAM_MODULE_NAME, sizeof(cap->card)); ++ ++ snprintf(cap->bus_info, sizeof(cap->bus_info), ++ "platform:%s", dev->v4l2_dev.name); ++ ++ return 0; ++} ++ ++static int unicam_enum_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_fmtdesc *f) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ const struct unicam_fmt *fmt = NULL; ++ ++ if (f->index >= dev->num_active_fmt) ++ return -EINVAL; ++ ++ fmt = &dev->active_fmts[f->index]; ++ ++ f->pixelformat = fmt->fourcc; ++ ++ return 0; ++} ++ ++static int unicam_g_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ *f = dev->v_fmt; ++ ++ return 0; ++} ++ ++static int unicam_try_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ const struct unicam_fmt *fmt; ++ struct v4l2_subdev_format sd_fmt = { ++ .which = V4L2_SUBDEV_FORMAT_TRY, ++ }; ++ struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format; ++ int ret; ++ ++ fmt = find_format_by_pix(dev, f->fmt.pix.pixelformat); ++ if (!fmt) { ++ unicam_dbg(3, dev, "Fourcc format (0x%08x) not found. Use default of %08X\n", ++ f->fmt.pix.pixelformat, dev->active_fmts[0].fourcc); ++ ++ /* Just get the first one enumerated */ ++ fmt = &dev->active_fmts[0]; ++ f->fmt.pix.pixelformat = fmt->fourcc; ++ } ++ ++ v4l2_fill_mbus_format(mbus_fmt, &f->fmt.pix, fmt->code); ++ /* ++ * No support for receiving interlaced video, so never ++ * request it from the sensor subdev. ++ */ ++ mbus_fmt->field = V4L2_FIELD_NONE; ++ ++ ret = v4l2_subdev_call(dev->sensor, pad, set_fmt, dev->sensor_config, ++ &sd_fmt); ++ if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV) ++ return ret; ++ ++ if (mbus_fmt->field != V4L2_FIELD_NONE) ++ unicam_info(dev, "Sensor trying to send interlaced video - results may be unpredictable\n"); ++ ++ v4l2_fill_pix_format(&f->fmt.pix, &sd_fmt.format); ++ /* ++ * Use current colorspace for now, it will get ++ * updated properly during s_fmt ++ */ ++ f->fmt.pix.colorspace = dev->v_fmt.fmt.pix.colorspace; ++ return unicam_calc_format_size_bpl(dev, fmt, f); ++} ++ ++static int unicam_s_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ struct vb2_queue *q = &dev->buffer_queue; ++ const struct unicam_fmt *fmt; ++ struct v4l2_mbus_framefmt mbus_fmt = {0}; ++ int ret; ++ ++ if (vb2_is_busy(q)) ++ return -EBUSY; ++ ++ ret = unicam_try_fmt_vid_cap(file, priv, f); ++ if (ret < 0) ++ return ret; ++ ++ fmt = find_format_by_pix(dev, f->fmt.pix.pixelformat); ++ if (!fmt) { ++ /* Unknown pixel format - adopt a default */ ++ fmt = &dev->active_fmts[0]; ++ f->fmt.pix.pixelformat = fmt->fourcc; ++ return -EINVAL; ++ } ++ ++ v4l2_fill_mbus_format(&mbus_fmt, &f->fmt.pix, fmt->code); ++ ++ ret = __subdev_set_format(dev, &mbus_fmt); ++ if (ret) { ++ unicam_dbg(3, dev, "%s __subdev_set_format failed %d\n", ++ __func__, ret); ++ return ret; ++ } ++ ++ /* Just double check nothing has gone wrong */ ++ if (mbus_fmt.code != fmt->code) { ++ unicam_dbg(3, dev, ++ "%s subdev changed format on us, this should not happen\n", ++ __func__); ++ return -EINVAL; ++ } ++ ++ dev->fmt = fmt; ++ dev->v_fmt.fmt.pix.pixelformat = f->fmt.pix.pixelformat; ++ dev->v_fmt.fmt.pix.bytesperline = f->fmt.pix.bytesperline; ++ unicam_reset_format(dev); ++ ++ unicam_dbg(3, dev, "%s %dx%d, mbus_fmt %08X, V4L2 pix " V4L2_FOURCC_CONV ".\n", ++ __func__, dev->v_fmt.fmt.pix.width, ++ dev->v_fmt.fmt.pix.height, mbus_fmt.code, ++ V4L2_FOURCC_CONV_ARGS(dev->v_fmt.fmt.pix.pixelformat)); ++ ++ *f = dev->v_fmt; ++ ++ return 0; ++} ++ ++static int unicam_queue_setup(struct vb2_queue *vq, ++ unsigned int *nbuffers, ++ unsigned int *nplanes, ++ unsigned int sizes[], ++ struct device *alloc_devs[]) ++{ ++ struct unicam_device *dev = vb2_get_drv_priv(vq); ++ unsigned int size = dev->v_fmt.fmt.pix.sizeimage; ++ ++ if (vq->num_buffers + *nbuffers < 3) ++ *nbuffers = 3 - vq->num_buffers; ++ ++ if (*nplanes) { ++ if (sizes[0] < size) { ++ unicam_err(dev, "sizes[0] %i < size %u\n", sizes[0], ++ size); ++ return -EINVAL; ++ } ++ size = sizes[0]; ++ } ++ ++ *nplanes = 1; ++ sizes[0] = size; ++ ++ return 0; ++} ++ ++static int unicam_buffer_prepare(struct vb2_buffer *vb) ++{ ++ struct unicam_device *dev = vb2_get_drv_priv(vb->vb2_queue); ++ struct unicam_buffer *buf = container_of(vb, struct unicam_buffer, ++ vb.vb2_buf); ++ unsigned long size; ++ ++ if (WARN_ON(!dev->fmt)) ++ return -EINVAL; ++ ++ size = dev->v_fmt.fmt.pix.sizeimage; ++ if (vb2_plane_size(vb, 0) < size) { ++ unicam_err(dev, "data will not fit into plane (%lu < %lu)\n", ++ vb2_plane_size(vb, 0), size); ++ return -EINVAL; ++ } ++ ++ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, size); ++ return 0; ++} ++ ++static void unicam_buffer_queue(struct vb2_buffer *vb) ++{ ++ struct unicam_device *dev = vb2_get_drv_priv(vb->vb2_queue); ++ struct unicam_buffer *buf = container_of(vb, struct unicam_buffer, ++ vb.vb2_buf); ++ struct unicam_dmaqueue *dma_queue = &dev->dma_queue; ++ unsigned long flags = 0; ++ ++ /* recheck locking */ ++ spin_lock_irqsave(&dev->dma_queue_lock, flags); ++ list_add_tail(&buf->list, &dma_queue->active); ++ spin_unlock_irqrestore(&dev->dma_queue_lock, flags); ++} ++ ++static void unicam_wr_dma_config(struct unicam_device *dev, ++ unsigned int stride) ++{ ++ reg_write(&dev->cfg, UNICAM_IBLS, stride); ++} ++ ++static void unicam_set_packing_config(struct unicam_device *dev) ++{ ++ int mbus_depth = find_mbus_depth_by_code(dev->fmt->code); ++ int v4l2_depth = dev->fmt->depth; ++ int pack, unpack; ++ u32 val; ++ ++ if (mbus_depth == v4l2_depth) { ++ unpack = UNICAM_PUM_NONE; ++ pack = UNICAM_PPM_NONE; ++ } else { ++ switch (mbus_depth) { ++ case 8: ++ unpack = UNICAM_PUM_UNPACK8; ++ break; ++ case 10: ++ unpack = UNICAM_PUM_UNPACK10; ++ break; ++ case 12: ++ unpack = UNICAM_PUM_UNPACK12; ++ break; ++ case 14: ++ unpack = UNICAM_PUM_UNPACK14; ++ break; ++ case 16: ++ unpack = UNICAM_PUM_UNPACK16; ++ break; ++ default: ++ unpack = UNICAM_PUM_NONE; ++ break; ++ } ++ switch (v4l2_depth) { ++ case 8: ++ pack = UNICAM_PPM_PACK8; ++ break; ++ case 10: ++ pack = UNICAM_PPM_PACK10; ++ break; ++ case 12: ++ pack = UNICAM_PPM_PACK12; ++ break; ++ case 14: ++ pack = UNICAM_PPM_PACK14; ++ break; ++ case 16: ++ pack = UNICAM_PPM_PACK16; ++ break; ++ default: ++ pack = UNICAM_PPM_NONE; ++ break; ++ } ++ } ++ ++ val = 0; ++ set_field(&val, 2, UNICAM_DEBL_MASK); ++ set_field(&val, unpack, UNICAM_PUM_MASK); ++ set_field(&val, pack, UNICAM_PPM_MASK); ++ reg_write(&dev->cfg, UNICAM_IPIPE, val); ++} ++ ++static void unicam_cfg_image_id(struct unicam_device *dev) ++{ ++ struct unicam_cfg *cfg = &dev->cfg; ++ ++ if (dev->bus_type == V4L2_MBUS_CSI2) { ++ /* CSI2 mode */ ++ reg_write(cfg, UNICAM_IDI0, ++ (dev->virtual_channel << 6) | dev->fmt->csi_dt); ++ } else { ++ /* CCP2 mode */ ++ reg_write(cfg, UNICAM_IDI0, (0x80 | dev->fmt->csi_dt)); ++ } ++} ++ ++void unicam_start_rx(struct unicam_device *dev, unsigned long addr) ++{ ++ struct unicam_cfg *cfg = &dev->cfg; ++ int line_int_freq = dev->v_fmt.fmt.pix.height >> 2; ++ unsigned int i; ++ u32 val; ++ ++ if (line_int_freq < 128) ++ line_int_freq = 128; ++ ++ /* Enable lane clocks */ ++ val = 1; ++ for (i = 0; i < dev->active_data_lanes; i++) ++ val = val << 2 | 1; ++ clk_write(cfg, val); ++ ++ /* Basic init */ ++ reg_write(cfg, UNICAM_CTRL, UNICAM_MEM); ++ ++ /* Enable analogue control, and leave in reset. */ ++ val = UNICAM_AR; ++ set_field(&val, 7, UNICAM_CTATADJ_MASK); ++ set_field(&val, 7, UNICAM_PTATADJ_MASK); ++ reg_write(cfg, UNICAM_ANA, val); ++ usleep_range(1000, 2000); ++ ++ /* Come out of reset */ ++ reg_write_field(cfg, UNICAM_ANA, 0, UNICAM_AR); ++ ++ /* Peripheral reset */ ++ reg_write_field(cfg, UNICAM_CTRL, 1, UNICAM_CPR); ++ reg_write_field(cfg, UNICAM_CTRL, 0, UNICAM_CPR); ++ ++ reg_write_field(cfg, UNICAM_CTRL, 0, UNICAM_CPE); ++ ++ /* Enable Rx control. */ ++ val = reg_read(cfg, UNICAM_CTRL); ++ if (dev->bus_type == V4L2_MBUS_CSI2) { ++ set_field(&val, UNICAM_CPM_CSI2, UNICAM_CPM_MASK); ++ set_field(&val, UNICAM_DCM_STROBE, UNICAM_DCM_MASK); ++ } else { ++ set_field(&val, UNICAM_CPM_CCP2, UNICAM_CPM_MASK); ++ set_field(&val, dev->bus_flags, UNICAM_DCM_MASK); ++ } ++ /* Packet framer timeout */ ++ set_field(&val, 0xf, UNICAM_PFT_MASK); ++ set_field(&val, 128, UNICAM_OET_MASK); ++ reg_write(cfg, UNICAM_CTRL, val); ++ ++ reg_write(cfg, UNICAM_IHWIN, 0); ++ reg_write(cfg, UNICAM_IVWIN, 0); ++ ++ /* AXI bus access QoS setup */ ++ val = reg_read(&dev->cfg, UNICAM_PRI); ++ set_field(&val, 0, UNICAM_BL_MASK); ++ set_field(&val, 0, UNICAM_BS_MASK); ++ set_field(&val, 0xe, UNICAM_PP_MASK); ++ set_field(&val, 8, UNICAM_NP_MASK); ++ set_field(&val, 2, UNICAM_PT_MASK); ++ set_field(&val, 1, UNICAM_PE); ++ reg_write(cfg, UNICAM_PRI, val); ++ ++ reg_write_field(cfg, UNICAM_ANA, 0, UNICAM_DDL); ++ ++ /* Always start in trigger frame capture mode (UNICAM_FCM set) */ ++ val = UNICAM_FSIE | UNICAM_FEIE | UNICAM_FCM; ++ set_field(&val, line_int_freq, UNICAM_LCIE_MASK); ++ reg_write(cfg, UNICAM_ICTL, val); ++ reg_write(cfg, UNICAM_STA, UNICAM_STA_MASK_ALL); ++ reg_write(cfg, UNICAM_ISTA, UNICAM_ISTA_MASK_ALL); ++ ++ /* tclk_term_en */ ++ reg_write_field(cfg, UNICAM_CLT, 2, UNICAM_CLT1_MASK); ++ /* tclk_settle */ ++ reg_write_field(cfg, UNICAM_CLT, 6, UNICAM_CLT2_MASK); ++ /* td_term_en */ ++ reg_write_field(cfg, UNICAM_DLT, 2, UNICAM_DLT1_MASK); ++ /* ths_settle */ ++ reg_write_field(cfg, UNICAM_DLT, 6, UNICAM_DLT2_MASK); ++ /* trx_enable */ ++ reg_write_field(cfg, UNICAM_DLT, 0, UNICAM_DLT3_MASK); ++ ++ reg_write_field(cfg, UNICAM_CTRL, 0, UNICAM_SOE); ++ ++ /* Packet compare setup - required to avoid missing frame ends */ ++ val = 0; ++ set_field(&val, 1, UNICAM_PCE); ++ set_field(&val, 1, UNICAM_GI); ++ set_field(&val, 1, UNICAM_CPH); ++ set_field(&val, 0, UNICAM_PCVC_MASK); ++ set_field(&val, 1, UNICAM_PCDT_MASK); ++ reg_write(cfg, UNICAM_CMP0, val); ++ ++ /* Enable clock lane and set up terminations */ ++ val = 0; ++ if (dev->bus_type == V4L2_MBUS_CSI2) { ++ /* CSI2 */ ++ set_field(&val, 1, UNICAM_CLE); ++ set_field(&val, 1, UNICAM_CLLPE); ++ if (dev->bus_flags & V4L2_MBUS_CSI2_CONTINUOUS_CLOCK) { ++ set_field(&val, 1, UNICAM_CLTRE); ++ set_field(&val, 1, UNICAM_CLHSE); ++ } ++ } else { ++ /* CCP2 */ ++ set_field(&val, 1, UNICAM_CLE); ++ set_field(&val, 1, UNICAM_CLHSE); ++ set_field(&val, 1, UNICAM_CLTRE); ++ } ++ reg_write(cfg, UNICAM_CLK, val); ++ ++ /* ++ * Enable required data lanes with appropriate terminations. ++ * The same value needs to be written to UNICAM_DATn registers for ++ * the active lanes, and 0 for inactive ones. ++ */ ++ val = 0; ++ if (dev->bus_type == V4L2_MBUS_CSI2) { ++ /* CSI2 */ ++ set_field(&val, 1, UNICAM_DLE); ++ set_field(&val, 1, UNICAM_DLLPE); ++ if (dev->bus_flags & V4L2_MBUS_CSI2_CONTINUOUS_CLOCK) { ++ set_field(&val, 1, UNICAM_DLTRE); ++ set_field(&val, 1, UNICAM_DLHSE); ++ } ++ } else { ++ /* CCP2 */ ++ set_field(&val, 1, UNICAM_DLE); ++ set_field(&val, 1, UNICAM_DLHSE); ++ set_field(&val, 1, UNICAM_DLTRE); ++ } ++ reg_write(cfg, UNICAM_DAT0, val); ++ ++ if (dev->active_data_lanes == 1) ++ val = 0; ++ reg_write(cfg, UNICAM_DAT1, val); ++ ++ if (dev->max_data_lanes > 2) { ++ /* ++ * Registers UNICAM_DAT2 and UNICAM_DAT3 only valid if the ++ * instance supports more than 2 data lanes. ++ */ ++ if (dev->active_data_lanes == 2) ++ val = 0; ++ reg_write(cfg, UNICAM_DAT2, val); ++ ++ if (dev->active_data_lanes == 3) ++ val = 0; ++ reg_write(cfg, UNICAM_DAT3, val); ++ } ++ ++ unicam_wr_dma_config(dev, dev->v_fmt.fmt.pix.bytesperline); ++ unicam_wr_dma_addr(dev, addr); ++ unicam_set_packing_config(dev); ++ unicam_cfg_image_id(dev); ++ ++ /* Disabled embedded data */ ++ val = 0; ++ set_field(&val, 0, UNICAM_EDL_MASK); ++ reg_write(cfg, UNICAM_DCS, val); ++ ++ val = reg_read(cfg, UNICAM_MISC); ++ set_field(&val, 1, UNICAM_FL0); ++ set_field(&val, 1, UNICAM_FL1); ++ reg_write(cfg, UNICAM_MISC, val); ++ ++ /* Enable peripheral */ ++ reg_write_field(cfg, UNICAM_CTRL, 1, UNICAM_CPE); ++ ++ /* Load image pointers */ ++ reg_write_field(cfg, UNICAM_ICTL, 1, UNICAM_LIP_MASK); ++ ++ /* ++ * Enable trigger only for the first frame to ++ * sync correctly to the FS from the source. ++ */ ++ reg_write_field(cfg, UNICAM_ICTL, 1, UNICAM_TFC); ++} ++ ++static void unicam_disable(struct unicam_device *dev) ++{ ++ struct unicam_cfg *cfg = &dev->cfg; ++ ++ /* Analogue lane control disable */ ++ reg_write_field(cfg, UNICAM_ANA, 1, UNICAM_DDL); ++ ++ /* Stop the output engine */ ++ reg_write_field(cfg, UNICAM_CTRL, 1, UNICAM_SOE); ++ ++ /* Disable the data lanes. */ ++ reg_write(cfg, UNICAM_DAT0, 0); ++ reg_write(cfg, UNICAM_DAT1, 0); ++ ++ if (dev->max_data_lanes > 2) { ++ reg_write(cfg, UNICAM_DAT2, 0); ++ reg_write(cfg, UNICAM_DAT3, 0); ++ } ++ ++ /* Peripheral reset */ ++ reg_write_field(cfg, UNICAM_CTRL, 1, UNICAM_CPR); ++ usleep_range(50, 100); ++ reg_write_field(cfg, UNICAM_CTRL, 0, UNICAM_CPR); ++ ++ /* Disable peripheral */ ++ reg_write_field(cfg, UNICAM_CTRL, 0, UNICAM_CPE); ++ ++ /* Disable all lane clocks */ ++ clk_write(cfg, 0); ++} ++ ++static int unicam_start_streaming(struct vb2_queue *vq, unsigned int count) ++{ ++ struct unicam_device *dev = vb2_get_drv_priv(vq); ++ struct unicam_dmaqueue *dma_q = &dev->dma_queue; ++ struct unicam_buffer *buf, *tmp; ++ unsigned long addr = 0; ++ unsigned long flags; ++ int ret; ++ ++ spin_lock_irqsave(&dev->dma_queue_lock, flags); ++ buf = list_entry(dma_q->active.next, struct unicam_buffer, list); ++ dev->cur_frm = buf; ++ dev->next_frm = buf; ++ list_del(&buf->list); ++ spin_unlock_irqrestore(&dev->dma_queue_lock, flags); ++ ++ addr = vb2_dma_contig_plane_dma_addr(&dev->cur_frm->vb.vb2_buf, 0); ++ dev->sequence = 0; ++ ++ ret = unicam_runtime_get(dev); ++ if (ret < 0) { ++ unicam_dbg(3, dev, "unicam_runtime_get failed\n"); ++ goto err_release_buffers; ++ } ++ ++ dev->active_data_lanes = dev->max_data_lanes; ++ if (dev->bus_type == V4L2_MBUS_CSI2 && ++ v4l2_subdev_has_op(dev->sensor, video, g_mbus_config)) { ++ struct v4l2_mbus_config mbus_config; ++ ++ ret = v4l2_subdev_call(dev->sensor, video, g_mbus_config, ++ &mbus_config); ++ if (ret < 0) { ++ unicam_dbg(3, dev, "g_mbus_config failed\n"); ++ goto err_pm_put; ++ } ++ ++ dev->active_data_lanes = ++ (mbus_config.flags & V4L2_MBUS_CSI2_LANE_MASK) >> ++ __ffs(V4L2_MBUS_CSI2_LANE_MASK); ++ if (!dev->active_data_lanes) ++ dev->active_data_lanes = dev->max_data_lanes; ++ } ++ if (dev->active_data_lanes > dev->max_data_lanes) { ++ unicam_err(dev, "Device has requested %u data lanes, which is >%u configured in DT\n", ++ dev->active_data_lanes, dev->max_data_lanes); ++ ret = -EINVAL; ++ goto err_pm_put; ++ } ++ ++ unicam_dbg(1, dev, "Running with %u data lanes\n", ++ dev->active_data_lanes); ++ ++ ret = clk_set_rate(dev->clock, 100 * 1000 * 1000); ++ if (ret) { ++ unicam_err(dev, "failed to set up clock\n"); ++ goto err_pm_put; ++ } ++ ++ ret = clk_prepare_enable(dev->clock); ++ if (ret) { ++ unicam_err(dev, "Failed to enable CSI clock: %d\n", ret); ++ goto err_pm_put; ++ } ++ ret = v4l2_subdev_call(dev->sensor, core, s_power, 1); ++ if (ret < 0 && ret != -ENOIOCTLCMD) { ++ unicam_err(dev, "power on failed in subdev\n"); ++ goto err_clock_unprepare; ++ } ++ dev->streaming = 1; ++ ++ unicam_start_rx(dev, addr); ++ ++ ret = v4l2_subdev_call(dev->sensor, video, s_stream, 1); ++ if (ret < 0) { ++ unicam_err(dev, "stream on failed in subdev\n"); ++ goto err_disable_unicam; ++ } ++ ++ return 0; ++ ++err_disable_unicam: ++ unicam_disable(dev); ++ v4l2_subdev_call(dev->sensor, core, s_power, 0); ++err_clock_unprepare: ++ clk_disable_unprepare(dev->clock); ++err_pm_put: ++ unicam_runtime_put(dev); ++err_release_buffers: ++ list_for_each_entry_safe(buf, tmp, &dma_q->active, list) { ++ list_del(&buf->list); ++ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); ++ } ++ if (dev->cur_frm != dev->next_frm) ++ vb2_buffer_done(&dev->next_frm->vb.vb2_buf, ++ VB2_BUF_STATE_QUEUED); ++ vb2_buffer_done(&dev->cur_frm->vb.vb2_buf, VB2_BUF_STATE_QUEUED); ++ dev->next_frm = NULL; ++ dev->cur_frm = NULL; ++ ++ return ret; ++} ++ ++static void unicam_stop_streaming(struct vb2_queue *vq) ++{ ++ struct unicam_device *dev = vb2_get_drv_priv(vq); ++ struct unicam_dmaqueue *dma_q = &dev->dma_queue; ++ struct unicam_buffer *buf, *tmp; ++ unsigned long flags; ++ ++ if (v4l2_subdev_call(dev->sensor, video, s_stream, 0) < 0) ++ unicam_err(dev, "stream off failed in subdev\n"); ++ ++ unicam_disable(dev); ++ ++ /* Release all active buffers */ ++ spin_lock_irqsave(&dev->dma_queue_lock, flags); ++ list_for_each_entry_safe(buf, tmp, &dma_q->active, list) { ++ list_del(&buf->list); ++ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); ++ } ++ ++ if (dev->cur_frm == dev->next_frm) { ++ vb2_buffer_done(&dev->cur_frm->vb.vb2_buf, VB2_BUF_STATE_ERROR); ++ } else { ++ vb2_buffer_done(&dev->cur_frm->vb.vb2_buf, VB2_BUF_STATE_ERROR); ++ vb2_buffer_done(&dev->next_frm->vb.vb2_buf, ++ VB2_BUF_STATE_ERROR); ++ } ++ dev->cur_frm = NULL; ++ dev->next_frm = NULL; ++ spin_unlock_irqrestore(&dev->dma_queue_lock, flags); ++ ++ if (v4l2_subdev_has_op(dev->sensor, core, s_power)) { ++ if (v4l2_subdev_call(dev->sensor, core, s_power, 0) < 0) ++ unicam_err(dev, "power off failed in subdev\n"); ++ } ++ ++ clk_disable_unprepare(dev->clock); ++ unicam_runtime_put(dev); ++} ++ ++static int unicam_enum_input(struct file *file, void *priv, ++ struct v4l2_input *inp) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ if (inp->index != 0) ++ return -EINVAL; ++ ++ inp->type = V4L2_INPUT_TYPE_CAMERA; ++ if (v4l2_subdev_has_op(dev->sensor, video, s_dv_timings)) { ++ inp->capabilities = V4L2_IN_CAP_DV_TIMINGS; ++ inp->std = 0; ++ } else if (v4l2_subdev_has_op(dev->sensor, video, s_std)) { ++ inp->capabilities = V4L2_IN_CAP_STD; ++ if (v4l2_subdev_call(dev->sensor, video, g_tvnorms, &inp->std) ++ < 0) ++ inp->std = V4L2_STD_ALL; ++ } else { ++ inp->capabilities = 0; ++ inp->std = 0; ++ } ++ sprintf(inp->name, "Camera 0"); ++ return 0; ++} ++ ++static int unicam_g_input(struct file *file, void *priv, unsigned int *i) ++{ ++ *i = 0; ++ ++ return 0; ++} ++ ++static int unicam_s_input(struct file *file, void *priv, unsigned int i) ++{ ++ /* ++ * FIXME: Ideally we would like to be able to query the source ++ * subdevice for information over the input connectors it supports, ++ * and map that through in to a call to video_ops->s_routing. ++ * There is no infrastructure support for defining that within ++ * devicetree at present. Until that is implemented we can't ++ * map a user physical connector number to s_routing input number. ++ */ ++ if (i > 0) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int unicam_querystd(struct file *file, void *priv, ++ v4l2_std_id *std) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, video, querystd, std); ++} ++ ++static int unicam_g_std(struct file *file, void *priv, v4l2_std_id *std) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, video, g_std, std); ++} ++ ++static int unicam_s_std(struct file *file, void *priv, v4l2_std_id std) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ int ret; ++ v4l2_std_id current_std; ++ ++ ret = v4l2_subdev_call(dev->sensor, video, g_std, ¤t_std); ++ if (ret) ++ return ret; ++ ++ if (std == current_std) ++ return 0; ++ ++ if (vb2_is_busy(&dev->buffer_queue)) ++ return -EBUSY; ++ ++ ret = v4l2_subdev_call(dev->sensor, video, s_std, std); ++ ++ /* Force recomputation of bytesperline */ ++ dev->v_fmt.fmt.pix.bytesperline = 0; ++ ++ unicam_reset_format(dev); ++ ++ return ret; ++} ++ ++static int unicam_s_edid(struct file *file, void *priv, struct v4l2_edid *edid) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, pad, set_edid, edid); ++} ++ ++static int unicam_g_edid(struct file *file, void *priv, struct v4l2_edid *edid) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, pad, get_edid, edid); ++} ++ ++static int unicam_g_dv_timings(struct file *file, void *priv, ++ struct v4l2_dv_timings *timings) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, video, g_dv_timings, timings); ++} ++ ++static int unicam_s_dv_timings(struct file *file, void *priv, ++ struct v4l2_dv_timings *timings) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ struct v4l2_dv_timings current_timings; ++ int ret; ++ ++ ret = v4l2_subdev_call(dev->sensor, video, g_dv_timings, ++ ¤t_timings); ++ ++ if (v4l2_match_dv_timings(timings, ¤t_timings, 0, false)) ++ return 0; ++ ++ if (vb2_is_busy(&dev->buffer_queue)) ++ return -EBUSY; ++ ++ ret = v4l2_subdev_call(dev->sensor, video, s_dv_timings, timings); ++ ++ /* Force recomputation of bytesperline */ ++ dev->v_fmt.fmt.pix.bytesperline = 0; ++ ++ unicam_reset_format(dev); ++ ++ return ret; ++} ++ ++static int unicam_query_dv_timings(struct file *file, void *priv, ++ struct v4l2_dv_timings *timings) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, video, query_dv_timings, timings); ++} ++ ++static int unicam_enum_dv_timings(struct file *file, void *priv, ++ struct v4l2_enum_dv_timings *timings) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, pad, enum_dv_timings, timings); ++} ++ ++static int unicam_dv_timings_cap(struct file *file, void *priv, ++ struct v4l2_dv_timings_cap *cap) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_subdev_call(dev->sensor, pad, dv_timings_cap, cap); ++} ++ ++static int unicam_subscribe_event(struct v4l2_fh *fh, ++ const struct v4l2_event_subscription *sub) ++{ ++ switch (sub->type) { ++ case V4L2_EVENT_SOURCE_CHANGE: ++ return v4l2_event_subscribe(fh, sub, 4, NULL); ++ } ++ ++ return v4l2_ctrl_subscribe_event(fh, sub); ++} ++ ++static int unicam_log_status(struct file *file, void *fh) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ struct unicam_cfg *cfg = &dev->cfg; ++ u32 reg; ++ ++ /* status for sub devices */ ++ v4l2_device_call_all(&dev->v4l2_dev, 0, core, log_status); ++ ++ unicam_info(dev, "-----Receiver status-----\n"); ++ unicam_info(dev, "V4L2 width/height: %ux%u\n", ++ dev->v_fmt.fmt.pix.width, dev->v_fmt.fmt.pix.height); ++ unicam_info(dev, "Mediabus format: %08x\n", dev->fmt->code); ++ unicam_info(dev, "V4L2 format: " V4L2_FOURCC_CONV "\n", ++ V4L2_FOURCC_CONV_ARGS(dev->v_fmt.fmt.pix.pixelformat)); ++ reg = reg_read(&dev->cfg, UNICAM_IPIPE); ++ unicam_info(dev, "Unpacking/packing: %u / %u\n", ++ get_field(reg, UNICAM_PUM_MASK), ++ get_field(reg, UNICAM_PPM_MASK)); ++ unicam_info(dev, "----Live data----\n"); ++ unicam_info(dev, "Programmed stride: %4u\n", ++ reg_read(cfg, UNICAM_IBLS)); ++ unicam_info(dev, "Detected resolution: %ux%u\n", ++ reg_read(cfg, UNICAM_IHSTA), ++ reg_read(cfg, UNICAM_IVSTA)); ++ unicam_info(dev, "Write pointer: %08x\n", ++ reg_read(cfg, UNICAM_IBWP)); ++ ++ return 0; ++} ++ ++static void unicam_notify(struct v4l2_subdev *sd, ++ unsigned int notification, void *arg) ++{ ++ struct unicam_device *dev = ++ container_of(sd->v4l2_dev, struct unicam_device, v4l2_dev); ++ ++ switch (notification) { ++ case V4L2_DEVICE_NOTIFY_EVENT: ++ v4l2_event_queue(&dev->video_dev, arg); ++ break; ++ default: ++ break; ++ } ++} ++ ++static const struct vb2_ops unicam_video_qops = { ++ .wait_prepare = vb2_ops_wait_prepare, ++ .wait_finish = vb2_ops_wait_finish, ++ .queue_setup = unicam_queue_setup, ++ .buf_prepare = unicam_buffer_prepare, ++ .buf_queue = unicam_buffer_queue, ++ .start_streaming = unicam_start_streaming, ++ .stop_streaming = unicam_stop_streaming, ++}; ++ ++/* unicam capture driver file operations */ ++static const struct v4l2_file_operations unicam_fops = { ++ .owner = THIS_MODULE, ++ .open = v4l2_fh_open, ++ .release = vb2_fop_release, ++ .read = vb2_fop_read, ++ .poll = vb2_fop_poll, ++ .unlocked_ioctl = video_ioctl2, ++ .mmap = vb2_fop_mmap, ++}; ++ ++/* unicam capture ioctl operations */ ++static const struct v4l2_ioctl_ops unicam_ioctl_ops = { ++ .vidioc_querycap = unicam_querycap, ++ .vidioc_enum_fmt_vid_cap = unicam_enum_fmt_vid_cap, ++ .vidioc_g_fmt_vid_cap = unicam_g_fmt_vid_cap, ++ .vidioc_s_fmt_vid_cap = unicam_s_fmt_vid_cap, ++ .vidioc_try_fmt_vid_cap = unicam_try_fmt_vid_cap, ++ ++ .vidioc_enum_input = unicam_enum_input, ++ .vidioc_g_input = unicam_g_input, ++ .vidioc_s_input = unicam_s_input, ++ ++ .vidioc_querystd = unicam_querystd, ++ .vidioc_s_std = unicam_s_std, ++ .vidioc_g_std = unicam_g_std, ++ ++ .vidioc_g_edid = unicam_g_edid, ++ .vidioc_s_edid = unicam_s_edid, ++ ++ .vidioc_s_dv_timings = unicam_s_dv_timings, ++ .vidioc_g_dv_timings = unicam_g_dv_timings, ++ .vidioc_query_dv_timings = unicam_query_dv_timings, ++ .vidioc_enum_dv_timings = unicam_enum_dv_timings, ++ .vidioc_dv_timings_cap = unicam_dv_timings_cap, ++ ++ .vidioc_reqbufs = vb2_ioctl_reqbufs, ++ .vidioc_create_bufs = vb2_ioctl_create_bufs, ++ .vidioc_prepare_buf = vb2_ioctl_prepare_buf, ++ .vidioc_querybuf = vb2_ioctl_querybuf, ++ .vidioc_qbuf = vb2_ioctl_qbuf, ++ .vidioc_dqbuf = vb2_ioctl_dqbuf, ++ .vidioc_expbuf = vb2_ioctl_expbuf, ++ .vidioc_streamon = vb2_ioctl_streamon, ++ .vidioc_streamoff = vb2_ioctl_streamoff, ++ ++ .vidioc_log_status = unicam_log_status, ++ .vidioc_subscribe_event = unicam_subscribe_event, ++ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, ++}; ++ ++/* ++ * Adds an entry to the active_fmts array ++ * Returns non-zero if attempting to write off the end of the array. ++ */ ++static int unicam_add_active_format(struct unicam_device *unicam, ++ const struct unicam_fmt *fmt) ++{ ++ //Ensure we don't run off the end of the array. ++ if (unicam->num_active_fmt >= MAX_POSSIBLE_PIX_FMTS) ++ return 1; ++ ++ unicam->active_fmts[unicam->num_active_fmt] = *fmt; ++ unicam_dbg(2, unicam, ++ "matched fourcc: " V4L2_FOURCC_CONV ": code: %04x idx: %d\n", ++ V4L2_FOURCC_CONV_ARGS(fmt->fourcc), ++ fmt->code, unicam->num_active_fmt); ++ unicam->num_active_fmt++; ++ ++ return 0; ++} ++ ++static int ++unicam_async_bound(struct v4l2_async_notifier *notifier, ++ struct v4l2_subdev *subdev, ++ struct v4l2_async_subdev *asd) ++{ ++ struct unicam_device *unicam = container_of(notifier->v4l2_dev, ++ struct unicam_device, v4l2_dev); ++ struct v4l2_subdev_mbus_code_enum mbus_code; ++ int ret = 0; ++ int j; ++ ++ if (unicam->sensor) { ++ unicam_info(unicam, "Rejecting subdev %s (Already set!!)", ++ subdev->name); ++ return 0; ++ } ++ ++ unicam->sensor = subdev; ++ unicam_dbg(1, unicam, "Using sensor %s for capture\n", subdev->name); ++ ++ /* Enumerate sub device formats and enable all matching local formats */ ++ unicam->num_active_fmt = 0; ++ unicam_dbg(2, unicam, "Get supported formats...\n"); ++ for (j = 0; ret != -EINVAL && ret != -ENOIOCTLCMD; ++j) { ++ const struct unicam_fmt *fmt = NULL; ++ int k; ++ ++ memset(&mbus_code, 0, sizeof(mbus_code)); ++ mbus_code.index = j; ++ ret = v4l2_subdev_call(subdev, pad, enum_mbus_code, ++ NULL, &mbus_code); ++ if (ret < 0) { ++ unicam_dbg(2, unicam, ++ "subdev->enum_mbus_code idx %d returned %d - continue\n", ++ j, ret); ++ continue; ++ } ++ ++ unicam_dbg(2, unicam, "subdev %s: code: %04x idx: %d\n", ++ subdev->name, mbus_code.code, j); ++ ++ for (k = 0; k < ARRAY_SIZE(formats); k++) { ++ if (mbus_code.code == formats[k].code) { ++ fmt = &formats[k]; ++ break; ++ } ++ } ++ unicam_dbg(2, unicam, "fmt %04x returned as %p, V4L2 FOURCC %04x, csi_dt %02X\n", ++ mbus_code.code, fmt, fmt ? fmt->fourcc : 0, ++ fmt ? fmt->csi_dt : 0); ++ if (fmt) { ++ if (unicam_add_active_format(unicam, fmt)) { ++ unicam_dbg(1, unicam, "Active fmt list truncated\n"); ++ break; ++ } ++ } ++ } ++ unicam_dbg(2, unicam, ++ "Done all formats\n"); ++ dump_active_formats(unicam); ++ ++ return 0; ++} ++ ++static int unicam_probe_complete(struct unicam_device *unicam) ++{ ++ struct video_device *vdev; ++ struct vb2_queue *q; ++ struct v4l2_mbus_framefmt mbus_fmt = {0}; ++ const struct unicam_fmt *fmt; ++ int ret; ++ ++ v4l2_set_subdev_hostdata(unicam->sensor, unicam); ++ ++ unicam->v4l2_dev.notify = unicam_notify; ++ ++ unicam->sensor_config = v4l2_subdev_alloc_pad_config(unicam->sensor); ++ if (!unicam->sensor_config) ++ return -ENOMEM; ++ ++ ret = __subdev_get_format(unicam, &mbus_fmt); ++ if (ret) { ++ unicam_err(unicam, "Failed to get_format - ret %d\n", ret); ++ return ret; ++ } ++ ++ fmt = find_format_by_code(unicam, mbus_fmt.code); ++ if (!fmt) { ++ /* Default image format not valid. Choose first active fmt. */ ++ fmt = &unicam->active_fmts[0]; ++ mbus_fmt.code = fmt->code; ++ ret = __subdev_set_format(unicam, &mbus_fmt); ++ if (ret) ++ return -EINVAL; ++ } ++ if (mbus_fmt.field != V4L2_FIELD_NONE) { ++ /* Interlaced not supported - disable it now. */ ++ mbus_fmt.field = V4L2_FIELD_NONE; ++ ret = __subdev_set_format(unicam, &mbus_fmt); ++ if (ret) ++ return -EINVAL; ++ } ++ ++ unicam->fmt = fmt; ++ unicam->v_fmt.fmt.pix.pixelformat = fmt->fourcc; ++ ++ /* Read current subdev format */ ++ unicam_reset_format(unicam); ++ ++ if (v4l2_subdev_has_op(unicam->sensor, video, s_std)) { ++ v4l2_std_id tvnorms; ++ ++ if (WARN_ON(!v4l2_subdev_has_op(unicam->sensor, video, ++ g_tvnorms))) ++ /* ++ * Subdevice should not advertise s_std but not ++ * g_tvnorms ++ */ ++ return -EINVAL; ++ ++ ret = v4l2_subdev_call(unicam->sensor, video, ++ g_tvnorms, &tvnorms); ++ if (WARN_ON(ret)) ++ return -EINVAL; ++ unicam->video_dev.tvnorms |= tvnorms; ++ } ++ ++ spin_lock_init(&unicam->dma_queue_lock); ++ mutex_init(&unicam->lock); ++ ++ /* Add controls from the subdevice */ ++ ret = v4l2_ctrl_add_handler(&unicam->ctrl_handler, ++ unicam->sensor->ctrl_handler, NULL); ++ if (ret < 0) ++ return ret; ++ ++ q = &unicam->buffer_queue; ++ q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; ++ q->drv_priv = unicam; ++ q->ops = &unicam_video_qops; ++ q->mem_ops = &vb2_dma_contig_memops; ++ q->buf_struct_size = sizeof(struct unicam_buffer); ++ q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; ++ q->lock = &unicam->lock; ++ q->min_buffers_needed = 2; ++ q->dev = &unicam->pdev->dev; ++ ++ ret = vb2_queue_init(q); ++ if (ret) { ++ unicam_err(unicam, "vb2_queue_init() failed\n"); ++ return ret; ++ } ++ ++ INIT_LIST_HEAD(&unicam->dma_queue.active); ++ ++ vdev = &unicam->video_dev; ++ strlcpy(vdev->name, UNICAM_MODULE_NAME, sizeof(vdev->name)); ++ vdev->release = video_device_release_empty; ++ vdev->fops = &unicam_fops; ++ vdev->ioctl_ops = &unicam_ioctl_ops; ++ vdev->v4l2_dev = &unicam->v4l2_dev; ++ vdev->vfl_dir = VFL_DIR_RX; ++ vdev->queue = q; ++ vdev->lock = &unicam->lock; ++ vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | ++ V4L2_CAP_READWRITE; ++ ++ /* If the source has no controls then remove our ctrl handler. */ ++ if (list_empty(&unicam->ctrl_handler.ctrls)) ++ unicam->v4l2_dev.ctrl_handler = NULL; ++ ++ video_set_drvdata(vdev, unicam); ++ ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1); ++ if (ret) { ++ unicam_err(unicam, "Unable to register video device.\n"); ++ return ret; ++ } ++ ++ if (!v4l2_subdev_has_op(unicam->sensor, video, s_std)) { ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_S_STD); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_G_STD); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_ENUMSTD); ++ } ++ if (!v4l2_subdev_has_op(unicam->sensor, video, querystd)) ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_QUERYSTD); ++ if (!v4l2_subdev_has_op(unicam->sensor, video, s_dv_timings)) { ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_S_EDID); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_G_EDID); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_DV_TIMINGS_CAP); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_G_DV_TIMINGS); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_S_DV_TIMINGS); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_ENUM_DV_TIMINGS); ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_QUERY_DV_TIMINGS); ++ } ++ ++ ret = v4l2_device_register_subdev_nodes(&unicam->v4l2_dev); ++ if (ret) { ++ unicam_err(unicam, ++ "Unable to register subdev nodes.\n"); ++ video_unregister_device(&unicam->video_dev); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int unicam_async_complete(struct v4l2_async_notifier *notifier) ++{ ++ struct unicam_device *unicam = container_of(notifier->v4l2_dev, ++ struct unicam_device, v4l2_dev); ++ ++ return unicam_probe_complete(unicam); ++} ++ ++static const struct v4l2_async_notifier_operations unicam_async_ops = { ++ .bound = unicam_async_bound, ++ .complete = unicam_async_complete, ++}; ++ ++static int of_unicam_connect_subdevs(struct unicam_device *dev) ++{ ++ struct platform_device *pdev = dev->pdev; ++ struct device_node *parent, *ep_node = NULL, *remote_ep = NULL, ++ *sensor_node = NULL; ++ struct v4l2_fwnode_endpoint *ep; ++ struct v4l2_async_subdev *asd; ++ struct v4l2_async_subdev **subdevs = NULL; ++ unsigned int peripheral_data_lanes; ++ int ret = -EINVAL; ++ unsigned int lane; ++ ++ parent = pdev->dev.of_node; ++ ++ asd = &dev->asd; ++ ep = &dev->endpoint; ++ ++ ep_node = of_graph_get_next_endpoint(parent, NULL); ++ if (!ep_node) { ++ unicam_dbg(3, dev, "can't get next endpoint\n"); ++ goto cleanup_exit; ++ } ++ ++ unicam_dbg(3, dev, "ep_node is %s\n", ep_node->name); ++ ++ v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_node), ep); ++ ++ for (lane = 0; lane < ep->bus.mipi_csi2.num_data_lanes; lane++) { ++ if (ep->bus.mipi_csi2.data_lanes[lane] != lane + 1) { ++ unicam_err(dev, "Local endpoint - data lane reordering not supported\n"); ++ goto cleanup_exit; ++ } ++ } ++ ++ peripheral_data_lanes = ep->bus.mipi_csi2.num_data_lanes; ++ ++ sensor_node = of_graph_get_remote_port_parent(ep_node); ++ if (!sensor_node) { ++ unicam_dbg(3, dev, "can't get remote parent\n"); ++ goto cleanup_exit; ++ } ++ unicam_dbg(3, dev, "sensor_node is %s\n", sensor_node->name); ++ asd->match_type = V4L2_ASYNC_MATCH_FWNODE; ++ asd->match.fwnode = of_fwnode_handle(sensor_node); ++ ++ remote_ep = of_graph_get_remote_endpoint(ep_node); ++ if (!remote_ep) { ++ unicam_dbg(3, dev, "can't get remote-endpoint\n"); ++ goto cleanup_exit; ++ } ++ unicam_dbg(3, dev, "remote_ep is %s\n", remote_ep->name); ++ v4l2_fwnode_endpoint_parse(of_fwnode_handle(remote_ep), ep); ++ unicam_dbg(3, dev, "parsed remote_ep to endpoint. nr_of_link_frequencies %u, bus_type %u\n", ++ ep->nr_of_link_frequencies, ep->bus_type); ++ ++ switch (ep->bus_type) { ++ case V4L2_MBUS_CSI2: ++ if (ep->bus.mipi_csi2.num_data_lanes > ++ peripheral_data_lanes) { ++ unicam_err(dev, "Subdevice %s wants too many data lanes (%u > %u)\n", ++ sensor_node->name, ++ ep->bus.mipi_csi2.num_data_lanes, ++ peripheral_data_lanes); ++ goto cleanup_exit; ++ } ++ for (lane = 0; ++ lane < ep->bus.mipi_csi2.num_data_lanes; ++ lane++) { ++ if (ep->bus.mipi_csi2.data_lanes[lane] != lane + 1) { ++ unicam_err(dev, "Subdevice %s - incompatible data lane config\n", ++ sensor_node->name); ++ goto cleanup_exit; ++ } ++ } ++ dev->max_data_lanes = ep->bus.mipi_csi2.num_data_lanes; ++ dev->bus_flags = ep->bus.mipi_csi2.flags; ++ break; ++ case V4L2_MBUS_CCP2: ++ if (ep->bus.mipi_csi1.clock_lane != 0 || ++ ep->bus.mipi_csi1.data_lane != 1) { ++ unicam_err(dev, "Subdevice %s incompatible lane config\n", ++ sensor_node->name); ++ goto cleanup_exit; ++ } ++ dev->max_data_lanes = 1; ++ dev->bus_flags = ep->bus.mipi_csi1.strobe; ++ break; ++ default: ++ /* Unsupported bus type */ ++ unicam_err(dev, "sub-device %s is not a CSI2 or CCP2 device %d\n", ++ sensor_node->name, ep->bus_type); ++ goto cleanup_exit; ++ } ++ ++ /* Store bus type - CSI2 or CCP2 */ ++ dev->bus_type = ep->bus_type; ++ unicam_dbg(3, dev, "bus_type is %d\n", dev->bus_type); ++ ++ /* Store Virtual Channel number */ ++ dev->virtual_channel = ep->base.id; ++ ++ unicam_dbg(3, dev, "v4l2-endpoint: %s\n", ++ dev->bus_type == V4L2_MBUS_CSI2 ? "CSI2" : "CCP2"); ++ unicam_dbg(3, dev, "Virtual Channel=%d\n", dev->virtual_channel); ++ if (dev->bus_type == V4L2_MBUS_CSI2) ++ unicam_dbg(3, dev, "flags=0x%08x\n", ep->bus.mipi_csi2.flags); ++ unicam_dbg(3, dev, "num_data_lanes=%d\n", dev->max_data_lanes); ++ ++ unicam_dbg(1, dev, "found sub-device %s\n", sensor_node->name); ++ ++ subdevs = devm_kzalloc(&dev->pdev->dev, sizeof(*subdevs), GFP_KERNEL); ++ if (!subdevs) { ++ ret = -ENOMEM; ++ goto cleanup_exit; ++ } ++ subdevs[0] = asd; ++ dev->notifier.subdevs = subdevs; ++ dev->notifier.num_subdevs = 1; ++ dev->notifier.ops = &unicam_async_ops; ++ ret = v4l2_async_notifier_register(&dev->v4l2_dev, ++ &dev->notifier); ++ if (ret) { ++ unicam_err(dev, "Error registering async notifier - ret %d\n", ++ ret); ++ ret = -EINVAL; ++ } ++ ++cleanup_exit: ++ if (remote_ep) ++ of_node_put(remote_ep); ++ if (sensor_node) ++ of_node_put(sensor_node); ++ if (ep_node) ++ of_node_put(ep_node); ++ ++ return ret; ++} ++ ++static int unicam_probe(struct platform_device *pdev) ++{ ++ struct unicam_cfg *unicam_cfg; ++ struct unicam_device *unicam; ++ struct v4l2_ctrl_handler *hdl; ++ struct resource *res; ++ int ret; ++ ++ unicam = devm_kzalloc(&pdev->dev, sizeof(*unicam), GFP_KERNEL); ++ if (!unicam) ++ return -ENOMEM; ++ ++ unicam->pdev = pdev; ++ unicam_cfg = &unicam->cfg; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ unicam_cfg->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(unicam_cfg->base)) { ++ unicam_err(unicam, "Failed to get main io block\n"); ++ return PTR_ERR(unicam_cfg->base); ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ unicam_cfg->clk_gate_base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(unicam_cfg->clk_gate_base)) { ++ unicam_err(unicam, "Failed to get 2nd io block\n"); ++ return PTR_ERR(unicam_cfg->clk_gate_base); ++ } ++ ++ unicam->clock = devm_clk_get(&pdev->dev, "lp"); ++ if (IS_ERR(unicam->clock)) { ++ unicam_err(unicam, "Failed to get clock\n"); ++ return PTR_ERR(unicam->clock); ++ } ++ ++ ret = platform_get_irq(pdev, 0); ++ if (ret <= 0) { ++ dev_err(&pdev->dev, "No IRQ resource\n"); ++ return -ENODEV; ++ } ++ ++ ret = devm_request_irq(&pdev->dev, ret, unicam_isr, 0, ++ "unicam_capture0", unicam); ++ if (ret) { ++ dev_err(&pdev->dev, "Unable to request interrupt\n"); ++ return -EINVAL; ++ } ++ ++ ret = v4l2_device_register(&pdev->dev, &unicam->v4l2_dev); ++ if (ret) { ++ unicam_err(unicam, ++ "Unable to register v4l2 device.\n"); ++ return ret; ++ } ++ ++ /* Reserve space for the controls */ ++ hdl = &unicam->ctrl_handler; ++ ret = v4l2_ctrl_handler_init(hdl, 16); ++ if (ret < 0) ++ goto probe_out_v4l2_unregister; ++ unicam->v4l2_dev.ctrl_handler = hdl; ++ ++ /* set the driver data in platform device */ ++ platform_set_drvdata(pdev, unicam); ++ ++ ret = of_unicam_connect_subdevs(unicam); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to connect subdevs\n"); ++ goto free_hdl; ++ } ++ ++ /* Enable the block power domain */ ++ pm_runtime_enable(&pdev->dev); ++ ++ return 0; ++ ++free_hdl: ++ v4l2_ctrl_handler_free(hdl); ++probe_out_v4l2_unregister: ++ v4l2_device_unregister(&unicam->v4l2_dev); ++ return ret; ++} ++ ++static int unicam_remove(struct platform_device *pdev) ++{ ++ struct unicam_device *unicam = platform_get_drvdata(pdev); ++ ++ unicam_dbg(2, unicam, "%s\n", __func__); ++ ++ pm_runtime_disable(&pdev->dev); ++ ++ v4l2_async_notifier_unregister(&unicam->notifier); ++ v4l2_ctrl_handler_free(&unicam->ctrl_handler); ++ v4l2_device_unregister(&unicam->v4l2_dev); ++ video_unregister_device(&unicam->video_dev); ++ if (unicam->sensor_config) ++ v4l2_subdev_free_pad_config(unicam->sensor_config); ++ ++ return 0; ++} ++ ++static const struct of_device_id unicam_of_match[] = { ++ { .compatible = "brcm,bcm2835-unicam", }, ++ { /* sentinel */ }, ++}; ++MODULE_DEVICE_TABLE(of, unicam_of_match); ++ ++static struct platform_driver unicam_driver = { ++ .probe = unicam_probe, ++ .remove = unicam_remove, ++ .driver = { ++ .name = UNICAM_MODULE_NAME, ++ .of_match_table = of_match_ptr(unicam_of_match), ++ }, ++}; ++ ++module_platform_driver(unicam_driver); ++ ++MODULE_AUTHOR("Dave Stevenson "); ++MODULE_DESCRIPTION("BCM2835 Unicam driver"); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION(UNICAM_VERSION); +--- /dev/null ++++ b/drivers/media/platform/bcm2835/vc4-regs-unicam.h +@@ -0,0 +1,266 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++/* ++ * Copyright (C) 2017 Raspberry Pi Trading. ++ * Dave Stevenson ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS ++ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ++ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE ++ * SOFTWARE. ++ */ ++ ++#ifndef VC4_REGS_UNICAM_H ++#define VC4_REGS_UNICAM_H ++ ++/* ++ * The following values are taken from files found within the code drop ++ * made by Broadcom for the BCM21553 Graphics Driver, predominantly in ++ * brcm_usrlib/dag/vmcsx/vcinclude/hardware_vc4.h. ++ * They have been modified to be only the register offset. ++ */ ++#define UNICAM_CTRL 0x000 ++#define UNICAM_STA 0x004 ++#define UNICAM_ANA 0x008 ++#define UNICAM_PRI 0x00c ++#define UNICAM_CLK 0x010 ++#define UNICAM_CLT 0x014 ++#define UNICAM_DAT0 0x018 ++#define UNICAM_DAT1 0x01c ++#define UNICAM_DAT2 0x020 ++#define UNICAM_DAT3 0x024 ++#define UNICAM_DLT 0x028 ++#define UNICAM_CMP0 0x02c ++#define UNICAM_CMP1 0x030 ++#define UNICAM_CAP0 0x034 ++#define UNICAM_CAP1 0x038 ++#define UNICAM_ICTL 0x100 ++#define UNICAM_ISTA 0x104 ++#define UNICAM_IDI0 0x108 ++#define UNICAM_IPIPE 0x10c ++#define UNICAM_IBSA0 0x110 ++#define UNICAM_IBEA0 0x114 ++#define UNICAM_IBLS 0x118 ++#define UNICAM_IBWP 0x11c ++#define UNICAM_IHWIN 0x120 ++#define UNICAM_IHSTA 0x124 ++#define UNICAM_IVWIN 0x128 ++#define UNICAM_IVSTA 0x12c ++#define UNICAM_ICC 0x130 ++#define UNICAM_ICS 0x134 ++#define UNICAM_IDC 0x138 ++#define UNICAM_IDPO 0x13c ++#define UNICAM_IDCA 0x140 ++#define UNICAM_IDCD 0x144 ++#define UNICAM_IDS 0x148 ++#define UNICAM_DCS 0x200 ++#define UNICAM_DBSA0 0x204 ++#define UNICAM_DBEA0 0x208 ++#define UNICAM_DBWP 0x20c ++#define UNICAM_DBCTL 0x300 ++#define UNICAM_IBSA1 0x304 ++#define UNICAM_IBEA1 0x308 ++#define UNICAM_IDI1 0x30c ++#define UNICAM_DBSA1 0x310 ++#define UNICAM_DBEA1 0x314 ++#define UNICAM_MISC 0x400 ++ ++/* ++ * The following bitmasks are from the kernel released by Broadcom ++ * for Android - https://android.googlesource.com/kernel/bcm/ ++ * The Rhea, Hawaii, and Java chips all contain the same VideoCore4 ++ * Unicam block as BCM2835, as defined in eg ++ * arch/arm/mach-rhea/include/mach/rdb_A0/brcm_rdb_cam.h and similar. ++ * Values reworked to use the kernel BIT and GENMASK macros. ++ * ++ * Some of the bit mnenomics have been amended to match the datasheet. ++ */ ++/* UNICAM_CTRL Register */ ++#define UNICAM_CPE BIT(0) ++#define UNICAM_MEM BIT(1) ++#define UNICAM_CPR BIT(2) ++#define UNICAM_CPM_MASK GENMASK(3, 3) ++#define UNICAM_CPM_CSI2 0 ++#define UNICAM_CPM_CCP2 1 ++#define UNICAM_SOE BIT(4) ++#define UNICAM_DCM_MASK GENMASK(5, 5) ++#define UNICAM_DCM_STROBE 0 ++#define UNICAM_DCM_DATA 1 ++#define UNICAM_SLS BIT(6) ++#define UNICAM_PFT_MASK GENMASK(11, 8) ++#define UNICAM_OET_MASK GENMASK(20, 12) ++ ++/* UNICAM_STA Register */ ++#define UNICAM_SYN BIT(0) ++#define UNICAM_CS BIT(1) ++#define UNICAM_SBE BIT(2) ++#define UNICAM_PBE BIT(3) ++#define UNICAM_HOE BIT(4) ++#define UNICAM_PLE BIT(5) ++#define UNICAM_SSC BIT(6) ++#define UNICAM_CRCE BIT(7) ++#define UNICAM_OES BIT(8) ++#define UNICAM_IFO BIT(9) ++#define UNICAM_OFO BIT(10) ++#define UNICAM_BFO BIT(11) ++#define UNICAM_DL BIT(12) ++#define UNICAM_PS BIT(13) ++#define UNICAM_IS BIT(14) ++#define UNICAM_PI0 BIT(15) ++#define UNICAM_PI1 BIT(16) ++#define UNICAM_FSI_S BIT(17) ++#define UNICAM_FEI_S BIT(18) ++#define UNICAM_LCI_S BIT(19) ++#define UNICAM_BUF0_RDY BIT(20) ++#define UNICAM_BUF0_NO BIT(21) ++#define UNICAM_BUF1_RDY BIT(22) ++#define UNICAM_BUF1_NO BIT(23) ++#define UNICAM_DI BIT(24) ++ ++#define UNICAM_STA_MASK_ALL \ ++ (UNICAM_DL + \ ++ UNICAM_SBE + \ ++ UNICAM_PBE + \ ++ UNICAM_HOE + \ ++ UNICAM_PLE + \ ++ UNICAM_SSC + \ ++ UNICAM_CRCE + \ ++ UNICAM_IFO + \ ++ UNICAM_OFO + \ ++ UNICAM_PS + \ ++ UNICAM_PI0 + \ ++ UNICAM_PI1) ++ ++/* UNICAM_ANA Register */ ++#define UNICAM_APD BIT(0) ++#define UNICAM_BPD BIT(1) ++#define UNICAM_AR BIT(2) ++#define UNICAM_DDL BIT(3) ++#define UNICAM_CTATADJ_MASK GENMASK(7, 4) ++#define UNICAM_PTATADJ_MASK GENMASK(11, 8) ++ ++/* UNICAM_PRI Register */ ++#define UNICAM_PE BIT(0) ++#define UNICAM_PT_MASK GENMASK(2, 1) ++#define UNICAM_NP_MASK GENMASK(7, 4) ++#define UNICAM_PP_MASK GENMASK(11, 8) ++#define UNICAM_BS_MASK GENMASK(15, 12) ++#define UNICAM_BL_MASK GENMASK(17, 16) ++ ++/* UNICAM_CLK Register */ ++#define UNICAM_CLE BIT(0) ++#define UNICAM_CLPD BIT(1) ++#define UNICAM_CLLPE BIT(2) ++#define UNICAM_CLHSE BIT(3) ++#define UNICAM_CLTRE BIT(4) ++#define UNICAM_CLAC_MASK GENMASK(8, 5) ++#define UNICAM_CLSTE BIT(29) ++ ++/* UNICAM_CLT Register */ ++#define UNICAM_CLT1_MASK GENMASK(7, 0) ++#define UNICAM_CLT2_MASK GENMASK(15, 8) ++ ++/* UNICAM_DATn Registers */ ++#define UNICAM_DLE BIT(0) ++#define UNICAM_DLPD BIT(1) ++#define UNICAM_DLLPE BIT(2) ++#define UNICAM_DLHSE BIT(3) ++#define UNICAM_DLTRE BIT(4) ++#define UNICAM_DLSM BIT(5) ++#define UNICAM_DLFO BIT(28) ++#define UNICAM_DLSTE BIT(29) ++ ++#define UNICAM_DAT_MASK_ALL (UNICAM_DLSTE + UNICAM_DLFO) ++ ++/* UNICAM_DLT Register */ ++#define UNICAM_DLT1_MASK GENMASK(7, 0) ++#define UNICAM_DLT2_MASK GENMASK(15, 8) ++#define UNICAM_DLT3_MASK GENMASK(23, 16) ++ ++/* UNICAM_ICTL Register */ ++#define UNICAM_FSIE BIT(0) ++#define UNICAM_FEIE BIT(1) ++#define UNICAM_IBOB BIT(2) ++#define UNICAM_FCM BIT(3) ++#define UNICAM_TFC BIT(4) ++#define UNICAM_LIP_MASK GENMASK(6, 5) ++#define UNICAM_LCIE_MASK GENMASK(28, 16) ++ ++/* UNICAM_IDI0/1 Register */ ++#define UNICAM_ID0_MASK GENMASK(7, 0) ++#define UNICAM_ID1_MASK GENMASK(15, 8) ++#define UNICAM_ID2_MASK GENMASK(23, 16) ++#define UNICAM_ID3_MASK GENMASK(31, 24) ++ ++/* UNICAM_ISTA Register */ ++#define UNICAM_FSI BIT(0) ++#define UNICAM_FEI BIT(1) ++#define UNICAM_LCI BIT(2) ++ ++#define UNICAM_ISTA_MASK_ALL (UNICAM_FSI + UNICAM_FEI + UNICAM_LCI) ++ ++/* UNICAM_IPIPE Register */ ++#define UNICAM_PUM_MASK GENMASK(2, 0) ++ /* Unpacking modes */ ++ #define UNICAM_PUM_NONE 0 ++ #define UNICAM_PUM_UNPACK6 1 ++ #define UNICAM_PUM_UNPACK7 2 ++ #define UNICAM_PUM_UNPACK8 3 ++ #define UNICAM_PUM_UNPACK10 4 ++ #define UNICAM_PUM_UNPACK12 5 ++ #define UNICAM_PUM_UNPACK14 6 ++ #define UNICAM_PUM_UNPACK16 7 ++#define UNICAM_DDM_MASK GENMASK(6, 3) ++#define UNICAM_PPM_MASK GENMASK(9, 7) ++ /* Packing modes */ ++ #define UNICAM_PPM_NONE 0 ++ #define UNICAM_PPM_PACK8 1 ++ #define UNICAM_PPM_PACK10 2 ++ #define UNICAM_PPM_PACK12 3 ++ #define UNICAM_PPM_PACK14 4 ++ #define UNICAM_PPM_PACK16 5 ++#define UNICAM_DEM_MASK GENMASK(11, 10) ++#define UNICAM_DEBL_MASK GENMASK(14, 12) ++#define UNICAM_ICM_MASK GENMASK(16, 15) ++#define UNICAM_IDM_MASK GENMASK(17, 17) ++ ++/* UNICAM_ICC Register */ ++#define UNICAM_ICFL_MASK GENMASK(4, 0) ++#define UNICAM_ICFH_MASK GENMASK(9, 5) ++#define UNICAM_ICST_MASK GENMASK(12, 10) ++#define UNICAM_ICLT_MASK GENMASK(15, 13) ++#define UNICAM_ICLL_MASK GENMASK(31, 16) ++ ++/* UNICAM_DCS Register */ ++#define UNICAM_DIE BIT(0) ++#define UNICAM_DIM BIT(1) ++#define UNICAM_DBOB BIT(3) ++#define UNICAM_FDE BIT(4) ++#define UNICAM_LDP BIT(5) ++#define UNICAM_EDL_MASK GENMASK(15, 8) ++ ++/* UNICAM_DBCTL Register */ ++#define UNICAM_DBEN BIT(0) ++#define UNICAM_BUF0_IE BIT(1) ++#define UNICAM_BUF1_IE BIT(2) ++ ++/* UNICAM_CMP[0,1] register */ ++#define UNICAM_PCE BIT(31) ++#define UNICAM_GI BIT(9) ++#define UNICAM_CPH BIT(8) ++#define UNICAM_PCVC_MASK GENMASK(7, 6) ++#define UNICAM_PCDT_MASK GENMASK(5, 0) ++ ++/* UNICAM_MISC register */ ++#define UNICAM_FL0 BIT(6) ++#define UNICAM_FL1 BIT(9) ++ ++#endif diff --git a/target/linux/brcm2708/patches-4.19/950-0199-MAINTAINERS-Add-entry-for-BCM2835-Unicam-driver.patch b/target/linux/brcm2708/patches-4.19/950-0199-MAINTAINERS-Add-entry-for-BCM2835-Unicam-driver.patch new file mode 100644 index 000000000..674f66190 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0199-MAINTAINERS-Add-entry-for-BCM2835-Unicam-driver.patch @@ -0,0 +1,28 @@ +From 602457089d7a0ee10df402370a50e469b213da02 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:59:40 +0000 +Subject: [PATCH 199/703] MAINTAINERS: Add entry for BCM2835 Unicam driver + +Adds entry for the new BCM2835 Unicam (CSI-2 receiver) driver + +Signed-off-by: Dave Stevenson +--- + MAINTAINERS | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -2873,6 +2873,13 @@ S: Maintained + N: bcm2835 + F: drivers/staging/vc04_services + ++BROADCOM BCM2835 CAMERA DRIVER ++M: Dave Stevenson ++L: linux-media@vger.kernel.org ++S: Maintained ++F: drivers/media/platform/bcm2835/ ++F: Documentation/devicetree/bindings/media/bcm2835-unicam.txt ++ + BROADCOM BCM47XX MIPS ARCHITECTURE + M: Hauke Mehrtens + M: Rafał Miłecki diff --git a/target/linux/brcm2708/patches-4.19/950-0200-defconfig-Enable-Unicam-driver-and-various-sources-o.patch b/target/linux/brcm2708/patches-4.19/950-0200-defconfig-Enable-Unicam-driver-and-various-sources-o.patch new file mode 100644 index 000000000..25113e701 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0200-defconfig-Enable-Unicam-driver-and-various-sources-o.patch @@ -0,0 +1,84 @@ +From 52fca9e13ca8fe69a2c181982bafe09688a42de4 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 14:59:51 +0000 +Subject: [PATCH 200/703] defconfig: Enable Unicam driver and various sources + on Pi platforms. + +Enable: + VIDEO_V4L2_SUBDEV_API=y + VIDEO_BCM2835_UNICAM=m + VIDEO_TC358743=m + VIDEO_ADV7180=m + VIDEO_OV5647=m +so that we can receive CSI data from these devices. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2709_defconfig | 5 +++++ + arch/arm/configs/bcmrpi_defconfig | 5 +++++ + 2 files changed, 10 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -714,6 +714,7 @@ CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y + CONFIG_MEDIA_RADIO_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y ++CONFIG_VIDEO_V4L2_SUBDEV_API=y + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_USB_VIDEO_CLASS=m + CONFIG_USB_M5602=m +@@ -831,6 +832,7 @@ CONFIG_VIDEO_EM28XX_V4L2=m + CONFIG_VIDEO_EM28XX_ALSA=m + CONFIG_VIDEO_EM28XX_DVB=m + CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_BCM2835_UNICAM=m + CONFIG_RADIO_SI470X=m + CONFIG_USB_SI470X=m + CONFIG_I2C_SI470X=m +@@ -850,10 +852,13 @@ CONFIG_RADIO_WL128X=m + # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + CONFIG_VIDEO_UDA1342=m + CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_ADV7180=m ++CONFIG_VIDEO_TC358743=m + CONFIG_VIDEO_TVP5150=m + CONFIG_VIDEO_TW2804=m + CONFIG_VIDEO_TW9903=m + CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV5647=m + CONFIG_VIDEO_OV7640=m + CONFIG_VIDEO_MT9V011=m + CONFIG_DRM=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -707,6 +707,7 @@ CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y + CONFIG_MEDIA_RADIO_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y ++CONFIG_VIDEO_V4L2_SUBDEV_API=y + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_USB_VIDEO_CLASS=m + CONFIG_USB_M5602=m +@@ -824,6 +825,7 @@ CONFIG_VIDEO_EM28XX_V4L2=m + CONFIG_VIDEO_EM28XX_ALSA=m + CONFIG_VIDEO_EM28XX_DVB=m + CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_BCM2835_UNICAM=m + CONFIG_RADIO_SI470X=m + CONFIG_USB_SI470X=m + CONFIG_I2C_SI470X=m +@@ -843,10 +845,13 @@ CONFIG_RADIO_WL128X=m + # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + CONFIG_VIDEO_UDA1342=m + CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_ADV7180=m ++CONFIG_VIDEO_TC358743=m + CONFIG_VIDEO_TVP5150=m + CONFIG_VIDEO_TW2804=m + CONFIG_VIDEO_TW9903=m + CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV5647=m + CONFIG_VIDEO_OV7640=m + CONFIG_VIDEO_MT9V011=m + CONFIG_DRM=m diff --git a/target/linux/brcm2708/patches-4.19/950-0201-media-adv7180-Nasty-hack-to-allow-input-selection.patch b/target/linux/brcm2708/patches-4.19/950-0201-media-adv7180-Nasty-hack-to-allow-input-selection.patch new file mode 100644 index 000000000..512139804 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0201-media-adv7180-Nasty-hack-to-allow-input-selection.patch @@ -0,0 +1,89 @@ +From b14afe8c3c5c85e3114617eba49751e21b9cbe47 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 15:00:04 +0000 +Subject: [PATCH 201/703] media: adv7180: Nasty hack to allow input selection. + +Whilst the adv7180 driver support s_routing, nothing else +does, and there is a missing lump of framework code to +define the mapping from connectors on a board to the inputs +they represent on the ADV7180. + +Add a nasty hack to take a module parameter that is passed in +to s_routing on any call to G_STD, or S_STD (or subdev +g_input_status call). + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/adv7180.c | 30 ++++++++++++++++++++++++++++-- + 1 file changed, 28 insertions(+), 2 deletions(-) + +--- a/drivers/media/i2c/adv7180.c ++++ b/drivers/media/i2c/adv7180.c +@@ -189,6 +189,10 @@ + + #define V4L2_CID_ADV_FAST_SWITCH (V4L2_CID_USER_ADV7180_BASE + 0x00) + ++static int dbg_input; ++module_param(dbg_input, int, 0644); ++MODULE_PARM_DESC(dbg_input, "Input number (0-31)"); ++ + struct adv7180_state; + + #define ADV7180_FLAG_RESET_POWERED BIT(0) +@@ -405,10 +409,24 @@ out: + return ret; + } + ++static void adv7180_check_input(struct v4l2_subdev *sd) ++{ ++ struct adv7180_state *state = to_state(sd); ++ ++ if (state->input != dbg_input) ++ if (adv7180_s_routing(sd, dbg_input, 0, 0)) ++ /* Failed - reset dbg_input */ ++ dbg_input = state->input; ++} ++ + static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status) + { + struct adv7180_state *state = to_state(sd); +- int ret = mutex_lock_interruptible(&state->mutex); ++ int ret; ++ ++ adv7180_check_input(sd); ++ ++ ret = mutex_lock_interruptible(&state->mutex); + if (ret) + return ret; + +@@ -434,7 +452,11 @@ static int adv7180_program_std(struct ad + static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std) + { + struct adv7180_state *state = to_state(sd); +- int ret = mutex_lock_interruptible(&state->mutex); ++ int ret; ++ ++ adv7180_check_input(sd); ++ ++ ret = mutex_lock_interruptible(&state->mutex); + + if (ret) + return ret; +@@ -456,6 +478,8 @@ static int adv7180_g_std(struct v4l2_sub + { + struct adv7180_state *state = to_state(sd); + ++ adv7180_check_input(sd); ++ + *norm = state->curr_norm; + + return 0; +@@ -810,6 +834,8 @@ static int adv7180_s_stream(struct v4l2_ + return 0; + } + ++ adv7180_check_input(sd); ++ + /* Must wait until querystd released the lock */ + ret = mutex_lock_interruptible(&state->mutex); + if (ret) diff --git a/target/linux/brcm2708/patches-4.19/950-0202-BCM283x-DT-Add-CSI-nodes-to-the-device-tree.patch b/target/linux/brcm2708/patches-4.19/950-0202-BCM283x-DT-Add-CSI-nodes-to-the-device-tree.patch new file mode 100644 index 000000000..0741d8997 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0202-BCM283x-DT-Add-CSI-nodes-to-the-device-tree.patch @@ -0,0 +1,202 @@ +From e2bd21a4b01db45b8b3ecf5d1e0716c608266065 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 15:00:20 +0000 +Subject: [PATCH 202/703] BCM283x DT: Add CSI nodes to the device tree. + +Adds CSI nodes to all the upstream device tree configs + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 + + arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 ++++++ + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 + + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + + arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi | 8 ++++++ + arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi | 8 ++++++ + arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi | 8 ++++++ + arch/arm/boot/dts/bcm283x.dtsi | 26 +++++++++++++++++++ + .../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 1 + + 14 files changed, 67 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi + create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi + create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi + create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi + +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -3,6 +3,7 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -3,6 +3,7 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-a", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -4,6 +4,7 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -4,6 +4,7 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -4,6 +4,7 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +@@ -13,6 +13,7 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-otg.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-zero", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -108,3 +108,11 @@ + &dsi1 { + power-domains = <&power RPI_POWER_DOMAIN_DSI1>; + }; ++ ++&csi0 { ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; ++}; ++ ++&csi1 { ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; ++}; +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -4,6 +4,7 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -4,6 +4,7 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi +@@ -0,0 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++&csi0 { ++ port { ++ endpoint { ++ data-lanes = <1 2>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi +@@ -0,0 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++&csi1 { ++ port { ++ endpoint { ++ data-lanes = <1 2>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi +@@ -0,0 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++&csi1 { ++ port { ++ endpoint { ++ data-lanes = <1 2 3 4>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -565,6 +565,32 @@ + status = "disabled"; + }; + ++ csi0: csi@7e800000 { ++ compatible = "brcm,bcm2835-unicam"; ++ reg = <0x7e800000 0x800>, ++ <0x7e802000 0x4>; ++ interrupts = <2 6>; ++ clocks = <&clocks BCM2835_CLOCK_CAM0>; ++ clock-names = "lp"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #clock-cells = <1>; ++ status = "disabled"; ++ }; ++ ++ csi1: csi@7e801000 { ++ compatible = "brcm,bcm2835-unicam"; ++ reg = <0x7e801000 0x800>, ++ <0x7e802004 0x4>; ++ interrupts = <2 7>; ++ clocks = <&clocks BCM2835_CLOCK_CAM1>; ++ clock-names = "lp"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #clock-cells = <1>; ++ status = "disabled"; ++ }; ++ + i2c1: i2c@7e804000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e804000 0x1000>; +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi +@@ -0,0 +1,8 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++&csi1 { ++ port { ++ endpoint { ++ data-lanes = <1 2>; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0203-BCM270X_DT-Add-CSI-defines-for-all-the-downstream-Pi.patch b/target/linux/brcm2708/patches-4.19/950-0203-BCM270X_DT-Add-CSI-defines-for-all-the-downstream-Pi.patch new file mode 100644 index 000000000..7d57872b8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0203-BCM270X_DT-Add-CSI-defines-for-all-the-downstream-Pi.patch @@ -0,0 +1,117 @@ +From 1778c46d5542576ba3335c00502c7ccf9035b42c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 15:00:45 +0000 +Subject: [PATCH 203/703] BCM270X_DT: Add CSI defines for all the downstream Pi + platforms + +Adds the CSI device includes for the bcm27xx platform DTS files + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-b.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-cm.dts | 2 ++ + arch/arm/boot/dts/bcm2708-rpi.dtsi | 8 ++++++++ + arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 1 + + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 1 + + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 1 + + arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 2 ++ + 9 files changed, 18 insertions(+) + +--- a/arch/arm/boot/dts/bcm2708-rpi-0-w.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2708.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts +@@ -2,6 +2,7 @@ + + #include "bcm2708.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + model = "Raspberry Pi Model B+"; +--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts +@@ -2,6 +2,7 @@ + + #include "bcm2708.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + model = "Raspberry Pi Model B"; +--- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts +@@ -1,6 +1,8 @@ + /dts-v1/; + + #include "bcm2708-rpi-cm.dtsi" ++#include "bcm283x-rpi-csi0-2lane.dtsi" ++#include "bcm283x-rpi-csi1-4lane.dtsi" + + / { + model = "Raspberry Pi Compute Module"; +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -161,3 +161,11 @@ sdhost_pins: &sdhost_gpio48 { + &vec { + status = "disabled"; + }; ++ ++&csi0 { ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; ++}; ++ ++&csi1 { ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; ++}; +--- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts +@@ -2,6 +2,7 @@ + + #include "bcm2709.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -2,6 +2,7 @@ + + #include "bcm2710.dtsi" + #include "bcm283x-rpi-lan7515.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837"; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -2,6 +2,7 @@ + + #include "bcm2710.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; +--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts +@@ -1,6 +1,8 @@ + /dts-v1/; + + #include "bcm2710.dtsi" ++#include "bcm283x-rpi-csi0-2lane.dtsi" ++#include "bcm283x-rpi-csi1-4lane.dtsi" + + / { + model = "Raspberry Pi Compute Module 3"; diff --git a/target/linux/brcm2708/patches-4.19/950-0204-arm-dt-Add-DT-overlays-for-ADV7282M-OV5647-and-TC358.patch b/target/linux/brcm2708/patches-4.19/950-0204-arm-dt-Add-DT-overlays-for-ADV7282M-OV5647-and-TC358.patch new file mode 100644 index 000000000..389c12c25 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0204-arm-dt-Add-DT-overlays-for-ADV7282M-OV5647-and-TC358.patch @@ -0,0 +1,481 @@ +From db902a4ec646e0ab4dee6168c3d1ef2d121c5865 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 15:01:59 +0000 +Subject: [PATCH 204/703] arm: dt: Add DT overlays for ADV7282M, OV5647, and + TC358743 + +DT overlays to setup the above devices via i2c_arm and csi1. +(This currently does not use the i2c-mux-pinctrl driver to +dynamically switch the pinctrl) + +tc358743 is tc358743 running at a default link frequency +of 972Mbit/s. This allows up to 1080P50 UYVY on 2 lanes. +There is a parameter to allow changing the link frequency, +but the only values supported by the driver are 297000000 +for 594Mbit/s, and 486000000 for 972Mbit/s. +There is also a parameter to enable 4 lane mode (only +relevant to Compute Module (1 or 3) csi1). + +tc358743-audio overlay enables I2S audio from the TC358743 +to the Pi (SD to GPIO20, SCK to GPIO18, WFS to GPIO19). + +ADV7282M is the Analog Devices analogue video to CSI bridge +chip. + +OV5647 is the Pi V1.3 camera module. Currently the driver only +supports VGA 8bit Bayer and very few controls. + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/overlays/Makefile | 4 + + arch/arm/boot/dts/overlays/README | 51 ++++++++ + .../boot/dts/overlays/adv7282m-overlay.dts | 76 ++++++++++++ + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 87 ++++++++++++++ + .../dts/overlays/tc358743-audio-overlay.dts | 52 ++++++++ + .../boot/dts/overlays/tc358743-overlay.dts | 112 ++++++++++++++++++ + 6 files changed, 382 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/ov5647-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/tc358743-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -6,6 +6,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + ads1015.dtbo \ + ads1115.dtbo \ + ads7846.dtbo \ ++ adv7282m.dtbo \ + akkordion-iqdacplus.dtbo \ + allo-boss-dac-pcm512x-audio.dtbo \ + allo-digione.dtbo \ +@@ -81,6 +82,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + mmc.dtbo \ + mpu6050.dtbo \ + mz61581.dtbo \ ++ ov5647.dtbo \ + papirus.dtbo \ + pi3-act-led.dtbo \ + pi3-disable-bt.dtbo \ +@@ -132,6 +134,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + spi2-3cs.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ ++ tc358743.dtbo \ ++ tc358743-audio.dtbo \ + tinylcd35.dtbo \ + uart0.dtbo \ + uart1.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -267,6 +267,15 @@ Params: cs SPI bus + www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt + + ++Name: adv7282m ++Info: Analog Devices ADV7282M analogue video to CSI2 bridge. ++ Uses Unicam1, which is the standard camera connector on most Pi ++ variants. ++Load: dtoverlay=adv7282m,= ++Params: i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++ This is required for Pi B+, 2, 0, and 0W. ++ ++ + Name: akkordion-iqdacplus + Info: Configures the Digital Dreamtime Akkordion Music Player (based on the + OEM IQAudIO DAC+ or DAC Zero module). +@@ -1284,6 +1293,23 @@ Params: speed Display + xohms Touchpanel sensitivity (X-plate resistance) + + ++Name: ov5647 ++Info: Omnivision OV5647 camera module. ++ Uses Unicam 1, which is the standard camera connector on most Pi ++ variants. ++Load: dtoverlay=ov5647,= ++Params: cam0-pwdn GPIO used to control the sensor powerdown line. ++ ++ cam0-led GPIO used to control the sensor led ++ Both these fields should be automatically filled ++ in by the firmware to reflect the default GPIO ++ configuration of the particular Pi variant in ++ use. ++ ++ i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++ This is required for Pi B+, 2, 0, and 0W. ++ ++ + Name: papirus + Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT) + Load: dtoverlay=papirus,= +@@ -1893,6 +1919,31 @@ Params: sx150-- Enables + connected. + + ++Name: tc358743 ++Info: Toshiba TC358743 HDMI to CSI-2 bridge chip. ++ Uses Unicam 1, which is the standard camera connector on most Pi ++ variants. ++Load: dtoverlay=tc358743,= ++Params: 4lane Use 4 lanes (only applicable to Compute Modules ++ CAM1 connector). ++ ++ link-frequency Set the link frequency. Only values of 297000000 ++ (574Mbit/s) and 486000000 (972Mbit/s - default) ++ are supported by the driver. ++ ++ i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++ This is required for Pi B+, 2, 0, and 0W. ++ ++ ++Name: tc358743-audio ++Info: Used in combination with the tc358743-fast overlay to route the audio ++ from the TC358743 over I2S to the Pi. ++ Wiring is LRCK/WFS to GPIO 19, BCK/SCK to GPIO 18, and DATA/SD to GPIO ++ 20. ++Load: dtoverlay=tc358743-audio,= ++Params: card-name Override the default, "tc358743", card name. ++ ++ + Name: tinylcd35 + Info: 3.5" Color TFT Display by www.tinylcd.com + Options: Touch, RTC, keypad +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts +@@ -0,0 +1,76 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Definitions for Analog Devices ADV7282-M video to CSI2 bridge on VC I2C bus ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ adv7282: adv7282@21 { ++ compatible = "adi,adv7282-m"; ++ reg = <0x21>; ++ status = "okay"; ++ clock-frequency = <24000000>; ++ port { ++ adv7282_0: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ clock-lanes = <0>; ++ data-lanes = <1>; ++ link-frequencies = ++ /bits/ 64 <297000000>; ++ ++ mclk-frequency = <12000000>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ fragment@1 { ++ target = <&csi1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ csi1_ep: endpoint { ++ remote-endpoint = <&adv7282_0>; ++ }; ++ }; ++ }; ++ }; ++ fragment@2 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <28 29>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ }; ++ fragment@3 { ++ target = <&i2c0_pins>; ++ __overlay__ { ++ brcm,pins = <44 45>; ++ brcm,function = <5>; /* alt1 */ ++ }; ++ }; ++ fragment@4 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ i2c_pins_28_29 = <0>,"+2-3"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts +@@ -0,0 +1,87 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Definitions for OV5647 camera module on VC I2C bus ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ov5647: ov5647@36 { ++ compatible = "ov5647"; ++ reg = <0x36>; ++ status = "okay"; ++ ++ pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>; ++ clocks = <&ov5647_clk>; ++ ++ ov5647_clk: camera-clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <25000000>; ++ }; ++ ++ port { ++ ov5647_0: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ clock-lanes = <0>; ++ data-lanes = <1 2>; ++ clock-noncontinuous; ++ link-frequencies = ++ /bits/ 64 <297000000>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&csi1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ csi1_ep: endpoint { ++ remote-endpoint = <&ov5647_0>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <28 29>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ }; ++ fragment@3 { ++ target = <&i2c0_pins>; ++ __overlay__ { ++ brcm,pins = <44 45>; ++ brcm,function = <5>; /* alt1 */ ++ }; ++ }; ++ fragment@4 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ i2c_pins_28_29 = <0>,"+4-5"; ++ cam0-pwdn = <&ov5647>,"pwdn-gpios:4"; ++ cam0-led = <&ov5647>,"pwdn-gpios:16"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts +@@ -0,0 +1,52 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Definitions to add I2S audio from the Toshiba TC358743 HDMI to CSI2 bridge. ++// Requires tc358743 overlay to have been loaded to actually function. ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ tc358743_codec: tc358743-codec { ++ #sound-dai-cells = <0>; ++ compatible = "linux,spdif-dir"; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ sound_overlay: __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "tc358743"; ++ simple-audio-card,bitclock-master = <&dailink0_slave>; ++ simple-audio-card,frame-master = <&dailink0_slave>; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ dai-tdm-slot-num = <2>; ++ dai-tdm-slot-width = <32>; ++ }; ++ dailink0_slave: simple-audio-card,codec { ++ sound-dai = <&tc358743_codec>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ card-name = <&sound_overlay>,"simple-audio-card,name"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts +@@ -0,0 +1,112 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Definitions for Toshiba TC358743 HDMI to CSI2 bridge on VC I2C bus ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ tc358743@0f { ++ compatible = "toshiba,tc358743"; ++ reg = <0x0f>; ++ status = "okay"; ++ ++ clocks = <&tc358743_clk>; ++ clock-names = "refclk"; ++ ++ tc358743_clk: bridge-clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <27000000>; ++ }; ++ ++ port { ++ tc358743: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ clock-lanes = <0>; ++ clock-noncontinuous; ++ link-frequencies = ++ /bits/ 64 <486000000>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&csi1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ csi1_ep: endpoint { ++ remote-endpoint = <&tc358743>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ tc358743@0f { ++ port { ++ endpoint { ++ data-lanes = <1 2>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c_vc>; ++ __dormant__ { ++ tc358743@0f { ++ port { ++ endpoint { ++ data-lanes = <1 2 3 4>; ++ }; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <28 29>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ }; ++ fragment@5 { ++ target = <&i2c0_pins>; ++ __overlay__ { ++ brcm,pins = <44 45>; ++ brcm,function = <5>; /* alt1 */ ++ }; ++ }; ++ fragment@6 { ++ target = <&i2c_vc>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ i2c_pins_28_29 = <0>,"+4-5"; ++ 4lane = <0>, "-2+3"; ++ link-frequency = <&tc358743>,"link-frequencies#0"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0205-dtoverlays-Add-support-for-ADV7280-M-ADV7281-M-and-A.patch b/target/linux/brcm2708/patches-4.19/950-0205-dtoverlays-Add-support-for-ADV7280-M-ADV7281-M-and-A.patch new file mode 100644 index 000000000..add524bfa --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0205-dtoverlays-Add-support-for-ADV7280-M-ADV7281-M-and-A.patch @@ -0,0 +1,135 @@ +From 4f00a0c8bef152e0d2f3a382bbe02cc49bc8287e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 31 Oct 2018 15:02:18 +0000 +Subject: [PATCH 205/703] dtoverlays: Add support for ADV7280-M, ADV7281-M and + ADV7281-MA chips. + +The driver that supports the ADV7282-M also supports the ADV7280-M, +ADV7281-M, and ADV7281-MA. +The 7280-M exposes 8 analogue inputs. The 7281-M doesn't have the +I2P deinterlacing block. The 7281-MA has 8 inputs but no I2P. +Otherwise they are the same as ADV7282-M. + +Adds a new overlay "adv728x" that includes the existing adv7282 +overlay but adds several parameters to modify the behaviour. + +Adds a new addr parameter to allow the I2C address to be changed. +(the chip has an address select pin to change between 0x20 and 0x21). + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 13 +++++++ + .../boot/dts/overlays/adv7282m-overlay.dts | 9 +++-- + .../boot/dts/overlays/adv728x-m-overlay.dts | 37 +++++++++++++++++++ + 4 files changed, 56 insertions(+), 4 deletions(-) + create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -7,6 +7,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + ads1115.dtbo \ + ads7846.dtbo \ + adv7282m.dtbo \ ++ adv728x-m.dtbo \ + akkordion-iqdacplus.dtbo \ + allo-boss-dac-pcm512x-audio.dtbo \ + allo-digione.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -274,6 +274,19 @@ Info: Analog Devices ADV7282M analogue + Load: dtoverlay=adv7282m,= + Params: i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. + This is required for Pi B+, 2, 0, and 0W. ++ addr Overrides the I2C address (default 0x21) ++ ++ ++Name: adv728x-m ++Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges. ++ This is a wrapper for adv7282m, and defaults to ADV7282M. ++Load: dtoverlay=adv728x-m,= ++Params: i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++ This is required for Pi B+, 2, 0, and 0W. ++ addr Overrides the I2C address (default 0x21) ++ adv7280m Select ADV7280-M. ++ adv7281m Select ADV7281-M. ++ adv7281ma Select ADV7281-MA. + + + Name: akkordion-iqdacplus +--- a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts +@@ -13,13 +13,13 @@ + #size-cells = <0>; + status = "okay"; + +- adv7282: adv7282@21 { ++ adv728x: adv728x@21 { + compatible = "adi,adv7282-m"; + reg = <0x21>; + status = "okay"; + clock-frequency = <24000000>; + port { +- adv7282_0: endpoint { ++ adv728x_0: endpoint { + remote-endpoint = <&csi1_ep>; + clock-lanes = <0>; + data-lanes = <1>; +@@ -43,7 +43,7 @@ + #address-cells = <1>; + #size-cells = <0>; + csi1_ep: endpoint { +- remote-endpoint = <&adv7282_0>; ++ remote-endpoint = <&adv728x_0>; + }; + }; + }; +@@ -71,6 +71,7 @@ + }; + + __overrides__ { +- i2c_pins_28_29 = <0>,"+2-3"; ++ i2c_pins_28_29 = <0>,"+2-3"; ++ addr = <&adv728x>,"reg:0"; + }; + }; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts +@@ -0,0 +1,37 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++// Definitions for Analog Devices ADV728[0|1|2]-M video to CSI2 bridges on VC ++// I2C bus ++ ++#include "adv7282m-overlay.dts" ++ ++/{ ++ compatible = "brcm,bcm2708"; ++ ++ // Fragment numbers deliberately high to avoid conflicts with the ++ // included adv7282m overlay file. ++ ++ fragment@101 { ++ target = <&adv728x>; ++ __dormant__ { ++ compatible = "adi,adv7280-m"; ++ }; ++ }; ++ fragment@102 { ++ target = <&adv728x>; ++ __dormant__ { ++ compatible = "adi,adv7281-m"; ++ }; ++ }; ++ fragment@103 { ++ target = <&adv728x>; ++ __dormant__ { ++ compatible = "adi,adv7281-ma"; ++ }; ++ }; ++ ++ __overrides__ { ++ adv7280m = <0>, "+101"; ++ adv7281m = <0>, "+102"; ++ adv7281ma = <0>, "+103"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0206-Mailbox-firmware-calls-now-use-kmalloc-2749.patch b/target/linux/brcm2708/patches-4.19/950-0206-Mailbox-firmware-calls-now-use-kmalloc-2749.patch new file mode 100644 index 000000000..84b1e7703 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0206-Mailbox-firmware-calls-now-use-kmalloc-2749.patch @@ -0,0 +1,89 @@ +From 3090cdd55e3a36f545409814cbee08761b93640c Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Tue, 13 Nov 2018 17:27:00 +0000 +Subject: [PATCH 206/703] Mailbox firmware calls now use kmalloc (#2749) + +A previous change moved away from variable stack +allocation of a data buffer to a fixed maximum size. +However, some mailbox calls use larger data buffers +than the maximum allowed. This change moves from +stack storage to kmalloc to ensure all sizes are +catered for. + +Signed-off-by: James Hughes +--- + drivers/firmware/raspberrypi.c | 35 +++++++++++++++++----------------- + 1 file changed, 18 insertions(+), 17 deletions(-) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + + #define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf)) +@@ -22,8 +23,6 @@ + #define MBOX_DATA28(msg) ((msg) & ~0xf) + #define MBOX_CHAN_PROPERTY 8 + +-#define MAX_RPI_FW_PROP_BUF_SIZE 48 +- + static struct platform_device *rpi_hwmon; + + struct rpi_firmware { +@@ -149,28 +148,28 @@ EXPORT_SYMBOL_GPL(rpi_firmware_property_ + int rpi_firmware_property(struct rpi_firmware *fw, + u32 tag, void *tag_data, size_t buf_size) + { +- /* Single tags are very small (generally 8 bytes), so the +- * stack should be safe. +- */ +- u8 data[sizeof(struct rpi_firmware_property_tag_header) + +- MAX_RPI_FW_PROP_BUF_SIZE]; +- struct rpi_firmware_property_tag_header *header = +- (struct rpi_firmware_property_tag_header *)data; + int ret; ++ struct rpi_firmware_property_tag_header *header; + +- if (WARN_ON(buf_size > sizeof(data) - sizeof(*header))) +- return -EINVAL; ++ /* Some mailboxes can use over 1k bytes. Rather than checking ++ * size and using stack or kmalloc depending on requirements, ++ * just use kmalloc. Mailboxes don't get called enough to worry ++ * too much about the time taken in the allocation. ++ */ ++ void *data = kmalloc(sizeof(*header) + buf_size, GFP_KERNEL); + ++ if (!data) ++ return -ENOMEM; ++ ++ header = data; + header->tag = tag; + header->buf_size = buf_size; + header->req_resp_size = 0; +- memcpy(data + sizeof(struct rpi_firmware_property_tag_header), +- tag_data, buf_size); ++ memcpy(data + sizeof(*header), tag_data, buf_size); + +- ret = rpi_firmware_property_list(fw, &data, buf_size + sizeof(*header)); +- memcpy(tag_data, +- data + sizeof(struct rpi_firmware_property_tag_header), +- buf_size); ++ ret = rpi_firmware_property_list(fw, data, buf_size + sizeof(*header)); ++ ++ memcpy(tag_data, data + sizeof(*header), buf_size); + + if ((tag == RPI_FIRMWARE_GET_THROTTLED) && + memcmp(&fw->get_throttled, tag_data, sizeof(fw->get_throttled))) { +@@ -178,6 +177,8 @@ int rpi_firmware_property(struct rpi_fir + sysfs_notify(&fw->cl.dev->kobj, NULL, "get_throttled"); + } + ++ kfree(data); ++ + return ret; + } + EXPORT_SYMBOL_GPL(rpi_firmware_property); diff --git a/target/linux/brcm2708/patches-4.19/950-0207-vcsm-Fix-an-NULL-dereference-in-the-import_dmabuf-er.patch b/target/linux/brcm2708/patches-4.19/950-0207-vcsm-Fix-an-NULL-dereference-in-the-import_dmabuf-er.patch new file mode 100644 index 000000000..656d24846 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0207-vcsm-Fix-an-NULL-dereference-in-the-import_dmabuf-er.patch @@ -0,0 +1,25 @@ +From fb5cef781e09bb78ca095f8f5780952f996115f1 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 14 Nov 2018 11:54:46 +0000 +Subject: [PATCH 207/703] vcsm: Fix an NULL dereference in the import_dmabuf + error path + +resource was dereferenced even though it was NULL. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/vc_sm/vmcs_sm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/char/broadcom/vc_sm/vmcs_sm.c ++++ b/drivers/char/broadcom/vc_sm/vmcs_sm.c +@@ -2315,8 +2315,8 @@ int vc_sm_ioctl_import_dmabuf(struct sm_ + return 0; + + error: +- resource->res_stats[IMPORT_FAIL]++; + if (resource) { ++ resource->res_stats[IMPORT_FAIL]++; + vc_sm_resource_deceased(resource, 1); + kfree(resource); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0208-Update-README-2750.patch b/target/linux/brcm2708/patches-4.19/950-0208-Update-README-2750.patch new file mode 100644 index 000000000..032d91eba --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0208-Update-README-2750.patch @@ -0,0 +1,26 @@ +From 150489867949c6059436b7f96f36b11c5e75692a Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Tue, 13 Nov 2018 16:51:21 +0000 +Subject: [PATCH 208/703] Update README (#2750) + +Small update to the DT blob docs to include the axiperf option. + +Signed-off-by: James Hughes +--- + arch/arm/boot/dts/overlays/README | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -89,6 +89,11 @@ Params: + audio Set to "on" to enable the onboard ALSA audio + interface (default "off") + ++ axiperf Set to "on" to enable the AXI bus performance ++ monitors. ++ See /sys/kernel/debug/raspberrypi_axi_monitor ++ for the results. ++ + eee Enable Energy Efficient Ethernet support for + compatible devices (default "on"). See also + "tx_lpi_timer". diff --git a/target/linux/brcm2708/patches-4.19/950-0209-overlays-Remove-superfluous-address-size-cells.patch b/target/linux/brcm2708/patches-4.19/950-0209-overlays-Remove-superfluous-address-size-cells.patch new file mode 100644 index 000000000..23c4b4afa --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0209-overlays-Remove-superfluous-address-size-cells.patch @@ -0,0 +1,63 @@ +From 18ac45909a08b7d4a67a4863a1a4c5e5ea7475dd Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 14 Nov 2018 09:53:25 +0000 +Subject: [PATCH 209/703] overlays: Remove superfluous #address/size-cells + +Newer versions of dtc warn about unnecessary usage of #address-cells +and #size-cells, so remove them. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/adv7282m-overlay.dts | 4 ---- + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 4 ---- + arch/arm/boot/dts/overlays/tc358743-overlay.dts | 4 ---- + 3 files changed, 12 deletions(-) + +--- a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts +@@ -35,13 +35,9 @@ + fragment@1 { + target = <&csi1>; + __overlay__ { +- #address-cells = <1>; +- #size-cells = <0>; + status = "okay"; + + port { +- #address-cells = <1>; +- #size-cells = <0>; + csi1_ep: endpoint { + remote-endpoint = <&adv728x_0>; + }; +--- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts +@@ -44,13 +44,9 @@ + fragment@1 { + target = <&csi1>; + __overlay__ { +- #address-cells = <1>; +- #size-cells = <0>; + status = "okay"; + + port { +- #address-cells = <1>; +- #size-cells = <0>; + csi1_ep: endpoint { + remote-endpoint = <&ov5647_0>; + }; +--- a/arch/arm/boot/dts/overlays/tc358743-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts +@@ -43,13 +43,9 @@ + fragment@1 { + target = <&csi1>; + __overlay__ { +- #address-cells = <1>; +- #size-cells = <0>; + status = "okay"; + + port { +- #address-cells = <1>; +- #size-cells = <0>; + csi1_ep: endpoint { + remote-endpoint = <&tc358743>; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0210-Revert-ASoC-wm8804-MCLK-configuration-options-32-bit.patch b/target/linux/brcm2708/patches-4.19/950-0210-Revert-ASoC-wm8804-MCLK-configuration-options-32-bit.patch new file mode 100644 index 000000000..9c9085272 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0210-Revert-ASoC-wm8804-MCLK-configuration-options-32-bit.patch @@ -0,0 +1,29 @@ +From 636b64caee57e3afbe0c92c723ff266c9d4391b1 Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Sun, 18 Nov 2018 13:21:26 +0100 +Subject: [PATCH 210/703] Revert "ASoC: wm8804: MCLK configuration options, + 32-bit" + +This reverts commit 3b12dcf797f5a4635aecd7f5c090dc507b124ffd. + +Despite the commit message being wrong idle_bias changes +were already reverted in the 4.14 tree. + +So drop the commit to bring the wm8804 driver back in line with +the rpi-4.14.y and upstream linux trees. + +Signed-off-by: Matthias Reichl +--- + sound/soc/codecs/wm8804.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/sound/soc/codecs/wm8804.c ++++ b/sound/soc/codecs/wm8804.c +@@ -550,7 +550,6 @@ static const struct snd_soc_component_dr + .use_pmdown_time = 1, + .endianness = 1, + .non_legacy_dai_naming = 1, +- .idle_bias_on = true, + }; + + const struct regmap_config wm8804_regmap_config = { diff --git a/target/linux/brcm2708/patches-4.19/950-0211-rpi-wm8804-soundcard-drop-PWRDN-register-writes.patch b/target/linux/brcm2708/patches-4.19/950-0211-rpi-wm8804-soundcard-drop-PWRDN-register-writes.patch new file mode 100644 index 000000000..c3eb81735 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0211-rpi-wm8804-soundcard-drop-PWRDN-register-writes.patch @@ -0,0 +1,128 @@ +From 3ee2530bf8c00154ba00eb70bbb6c0276fbb0ca2 Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Sun, 18 Nov 2018 15:24:16 +0100 +Subject: [PATCH 211/703] rpi-wm8804-soundcard: drop PWRDN register writes + +Since kernel 4.0 the PWRDN register bits are under DAPM +control from the wm8804 driver. + +Drop code that modifies that register to avoid interfering +with DAPM. + +Signed-off-by: Matthias Reichl +--- + sound/soc/bcm/rpi-wm8804-soundcard.c | 55 ---------------------------- + 1 file changed, 55 deletions(-) + +--- a/sound/soc/bcm/rpi-wm8804-soundcard.c ++++ b/sound/soc/bcm/rpi-wm8804-soundcard.c +@@ -54,8 +54,6 @@ struct snd_rpi_wm8804_drvdata { + struct snd_soc_dai_link *dai; + /* Required - snd_soc_card name */ + const char *card_name; +- /* Optional- Overrides the module paramter */ +- unsigned short auto_shutdown_output; + /* Optional DT node names if card info is defined in DT */ + const char *card_name_dt; + const char *dai_name_dt; +@@ -64,51 +62,12 @@ struct snd_rpi_wm8804_drvdata { + int (*probe)(struct platform_device *pdev); + }; + +-static short int auto_shutdown_output; +-module_param(auto_shutdown_output, short, 0660); +-MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped"); +- + static struct gpio_desc *snd_clk44gpio; + static struct gpio_desc *snd_clk48gpio; + + #define CLK_44EN_RATE 22579200UL + #define CLK_48EN_RATE 24576000UL + +-static int snd_rpi_wm8804_init(struct snd_soc_pcm_runtime *rtd) +-{ +- struct snd_soc_component *component = rtd->codec_dai->component; +- int rc; +- +- pr_debug("%s\n", __func__); +- +- rc = snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); +- return rc < 0 ? rc : 0; +-} +- +-static int snd_rpi_wm8804_digi_startup(struct snd_pcm_substream *substream) +-{ +- struct snd_soc_pcm_runtime *rtd = substream->private_data; +- struct snd_soc_component *component = rtd->codec_dai->component; +- int rc; +- +- pr_debug("%s\n", __func__); +- +- rc = snd_soc_component_update_bits(component, WM8804_PWRDN, 0x3c, 0x00); +- return rc < 0 ? rc : 0; +-} +- +-static void snd_rpi_wm8804_digi_shutdown(struct snd_pcm_substream *substream) +-{ +- struct snd_soc_pcm_runtime *rtd = substream->private_data; +- struct snd_soc_component *component = rtd->codec_dai->component; +- +- pr_debug("%s %d\n", __func__, auto_shutdown_output); +- +- if (auto_shutdown_output) +- snd_soc_component_update_bits(component, WM8804_PWRDN, +- 0x3c, 0x3c); +-} +- + static unsigned int snd_rpi_wm8804_enable_clock(unsigned int samplerate) + { + switch (samplerate) { +@@ -204,12 +163,6 @@ static int snd_rpi_wm8804_hw_params(stru + return ret; + } + +- /* Enable TX output */ +- snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x0); +- +- /* Power on */ +- snd_soc_component_update_bits(component, WM8804_PWRDN, 0x9, 0); +- + /* set sampling frequency status bits */ + snd_soc_component_update_bits(component, WM8804_SPDTX4, 0x0f, + sampling_freq); +@@ -219,8 +172,6 @@ static int snd_rpi_wm8804_hw_params(stru + + static struct snd_soc_ops snd_rpi_wm8804_ops = { + .hw_params = snd_rpi_wm8804_hw_params, +- .startup = snd_rpi_wm8804_digi_startup, +- .shutdown = snd_rpi_wm8804_digi_shutdown, + }; + + static struct snd_soc_dai_link snd_justboom_digi_dai[] = { +@@ -233,7 +184,6 @@ static struct snd_soc_dai_link snd_justb + static struct snd_rpi_wm8804_drvdata drvdata_justboom_digi = { + .card_name = "snd_rpi_justboom_digi", + .dai = snd_justboom_digi_dai, +- .auto_shutdown_output = 1, + }; + + static struct snd_soc_dai_link snd_iqaudio_digi_dai[] = { +@@ -335,8 +285,6 @@ static int snd_rpi_wm8804_probe(struct p + + snd_soc_card_set_drvdata(&snd_rpi_wm8804, drvdata); + +- if (!dai->init) +- dai->init = snd_rpi_wm8804_init; + if (!dai->ops) + dai->ops = &snd_rpi_wm8804_ops; + if (!dai->codec_dai_name) +@@ -348,9 +296,6 @@ static int snd_rpi_wm8804_probe(struct p + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM; + +- if (drvdata->auto_shutdown_output) +- auto_shutdown_output = 1; +- + snd_rpi_wm8804.dai_link = dai; + i2s_node = of_parse_phandle(pdev->dev.of_node, + "i2s-controller", 0); diff --git a/target/linux/brcm2708/patches-4.19/950-0212-rpi-wm8804-soundcard-configure-wm8804-clocks-only-on.patch b/target/linux/brcm2708/patches-4.19/950-0212-rpi-wm8804-soundcard-configure-wm8804-clocks-only-on.patch new file mode 100644 index 000000000..2c38804c4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0212-rpi-wm8804-soundcard-configure-wm8804-clocks-only-on.patch @@ -0,0 +1,46 @@ +From c56c1c63927b4fafb51b45df92d6a58eeb08141a Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Sun, 18 Nov 2018 15:32:28 +0100 +Subject: [PATCH 212/703] rpi-wm8804-soundcard: configure wm8804 clocks only on + rate change + +This should avoid clicks when stopping and immediately afterwards +starting a stream with the same samplerate as before. + +Signed-off-by: Matthias Reichl +--- + sound/soc/bcm/rpi-wm8804-soundcard.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/sound/soc/bcm/rpi-wm8804-soundcard.c ++++ b/sound/soc/bcm/rpi-wm8804-soundcard.c +@@ -64,6 +64,7 @@ struct snd_rpi_wm8804_drvdata { + + static struct gpio_desc *snd_clk44gpio; + static struct gpio_desc *snd_clk48gpio; ++static int wm8804_samplerate = 0; + + #define CLK_44EN_RATE 22579200UL + #define CLK_48EN_RATE 24576000UL +@@ -117,6 +118,12 @@ static int snd_rpi_wm8804_hw_params(stru + struct wm8804_clk_cfg clk_cfg; + int samplerate = params_rate(params); + ++ if (samplerate == wm8804_samplerate) ++ return 0; ++ ++ /* clear until all clocks are setup properly */ ++ wm8804_samplerate = 0; ++ + snd_rpi_wm8804_clk_cfg(samplerate, &clk_cfg); + + pr_debug("%s samplerate: %d mclk_freq: %u mclk_div: %u sysclk: %u\n", +@@ -163,6 +170,8 @@ static int snd_rpi_wm8804_hw_params(stru + return ret; + } + ++ wm8804_samplerate = samplerate; ++ + /* set sampling frequency status bits */ + snd_soc_component_update_bits(component, WM8804_SPDTX4, 0x0f, + sampling_freq); diff --git a/target/linux/brcm2708/patches-4.19/950-0213-dtoverlays-Add-i2c-on-0-1-option-to-TC358743-ADV7282.patch b/target/linux/brcm2708/patches-4.19/950-0213-dtoverlays-Add-i2c-on-0-1-option-to-TC358743-ADV7282.patch new file mode 100644 index 000000000..da1d763d5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0213-dtoverlays-Add-i2c-on-0-1-option-to-TC358743-ADV7282.patch @@ -0,0 +1,142 @@ +From 0676c7a6270df8f3bdc0cfee0025959e155c8c2a Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 26 Nov 2018 17:02:15 +0000 +Subject: [PATCH 213/703] dtoverlays: Add i2c on 0&1 option to TC358743, + ADV7282 and OV5647 + +Adds the option of configuring i2c0 to be on GPIOs 0&1 as +this is of use on the Compute Module. + +Also fixes the ov5647 overlay where the override enabled the wrong +fragments. + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/overlays/README | 14 ++++++++++++-- + arch/arm/boot/dts/overlays/adv7282m-overlay.dts | 10 +++++++++- + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 10 +++++++++- + arch/arm/boot/dts/overlays/tc358743-overlay.dts | 10 +++++++++- + 4 files changed, 39 insertions(+), 5 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -277,7 +277,9 @@ Info: Analog Devices ADV7282M analogue + Uses Unicam1, which is the standard camera connector on most Pi + variants. + Load: dtoverlay=adv7282m,= +-Params: i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. ++ Useful on Compute Modules. ++ i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. + This is required for Pi B+, 2, 0, and 0W. + addr Overrides the I2C address (default 0x21) + +@@ -286,7 +288,9 @@ Name: adv728x-m + Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges. + This is a wrapper for adv7282m, and defaults to ADV7282M. + Load: dtoverlay=adv728x-m,= +-Params: i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. ++Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. ++ Useful on Compute Modules. ++ i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. + This is required for Pi B+, 2, 0, and 0W. + addr Overrides the I2C address (default 0x21) + adv7280m Select ADV7280-M. +@@ -1324,6 +1328,9 @@ Params: cam0-pwdn GPIO use + configuration of the particular Pi variant in + use. + ++ i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. ++ Useful on Compute Modules. ++ + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. + This is required for Pi B+, 2, 0, and 0W. + +@@ -1949,6 +1956,9 @@ Params: 4lane Use 4 la + (574Mbit/s) and 486000000 (972Mbit/s - default) + are supported by the driver. + ++ i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. ++ Useful on Compute Modules. ++ + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. + This is required for Pi B+, 2, 0, and 0W. + +--- a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts +@@ -60,6 +60,13 @@ + }; + }; + fragment@4 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ }; ++ fragment@5 { + target = <&i2c_vc>; + __overlay__ { + status = "okay"; +@@ -67,7 +74,8 @@ + }; + + __overrides__ { +- i2c_pins_28_29 = <0>,"+2-3"; ++ i2c_pins_0_1 = <0>,"-2-3+4"; ++ i2c_pins_28_29 = <0>,"+2-3-4"; + addr = <&adv728x>,"reg:0"; + }; + }; +--- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts +@@ -69,6 +69,13 @@ + }; + }; + fragment@4 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ }; ++ fragment@5 { + target = <&i2c_vc>; + __overlay__ { + status = "okay"; +@@ -76,7 +83,8 @@ + }; + + __overrides__ { +- i2c_pins_28_29 = <0>,"+4-5"; ++ i2c_pins_0_1 = <0>,"-2-3+4"; ++ i2c_pins_28_29 = <0>,"+2-3-4"; + cam0-pwdn = <&ov5647>,"pwdn-gpios:4"; + cam0-led = <&ov5647>,"pwdn-gpios:16"; + }; +--- a/arch/arm/boot/dts/overlays/tc358743-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts +@@ -94,6 +94,13 @@ + }; + }; + fragment@6 { ++ target = <&i2c0_pins>; ++ __dormant__ { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ }; ++ fragment@7 { + target = <&i2c_vc>; + __overlay__ { + status = "okay"; +@@ -101,7 +108,8 @@ + }; + + __overrides__ { +- i2c_pins_28_29 = <0>,"+4-5"; ++ i2c_pins_0_1 = <0>,"-4-5+6"; ++ i2c_pins_28_29 = <0>,"+4-5-6"; + 4lane = <0>, "-2+3"; + link-frequency = <&tc358743>,"link-frequencies#0"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0214-overlays-Update-upstream-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0214-overlays-Update-upstream-overlay.patch new file mode 100644 index 000000000..00991ea72 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0214-overlays-Update-upstream-overlay.patch @@ -0,0 +1,53 @@ +From dcc96e7fc22e361aa7f242dd3ca6db1f04a4c364 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 26 Nov 2018 20:15:16 +0000 +Subject: [PATCH 214/703] overlays: Update upstream overlay + +The vc4-kms-v3d overlay gained an extra fragment enabling the txp node, +so rebuild the upstream overlay to match. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/upstream-overlay.dts | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -116,6 +116,12 @@ + }; + }; + fragment@17 { ++ target = <&txp>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ fragment@18 { + target = <&usb>; + #address-cells = <1>; + #size-cells = <1>; +@@ -130,21 +136,21 @@ + status = "okay"; + }; + }; +- fragment@18 { ++ fragment@19 { + target = <&uart1>; + __overlay__ { + interrupt-parent = <&intc>; + interrupts = <0x1 0x1d>; + }; + }; +- fragment@19 { ++ fragment@20 { + target = <&spi1>; + __overlay__ { + interrupt-parent = <&intc>; + interrupts = <0x1 0x1d>; + }; + }; +- fragment@20 { ++ fragment@21 { + target = <&spi2>; + __overlay__ { + interrupt-parent = <&intc>; diff --git a/target/linux/brcm2708/patches-4.19/950-0215-BCM2708_DT-update-firmware-node-binding.patch b/target/linux/brcm2708/patches-4.19/950-0215-BCM2708_DT-update-firmware-node-binding.patch new file mode 100644 index 000000000..b77f0800f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0215-BCM2708_DT-update-firmware-node-binding.patch @@ -0,0 +1,27 @@ +From 2a98edd2e5a5477d9649f0682c9b195c8b6c7656 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 28 Nov 2018 10:36:01 +0100 +Subject: [PATCH 215/703] BCM2708_DT: update firmware node binding + +The upstreamed version of the firmware node has been updated to present +it as a "simple-bus". We need to get this in order to accomodate other +device bindings, namely RPi's firmware based gpio expander. + +Signed-off-by: Nicolas Saenz Julienne +--- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -50,7 +50,9 @@ + }; + + firmware: firmware { +- compatible = "raspberrypi,bcm2835-firmware"; ++ compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; ++ #address-cells = <0>; ++ #size-cells = <0>; + mboxes = <&mailbox>; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0216-BCM2710_DT-fix-gpio-expander-bindings.patch b/target/linux/brcm2708/patches-4.19/950-0216-BCM2710_DT-fix-gpio-expander-bindings.patch new file mode 100644 index 000000000..0524f980c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0216-BCM2710_DT-fix-gpio-expander-bindings.patch @@ -0,0 +1,67 @@ +From 57fdcf2049630157495c84a1440632c476016687 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Tue, 27 Nov 2018 16:59:10 +0100 +Subject: [PATCH 216/703] BCM2710_DT: fix gpio expander bindings + +The upstreamed driver for the GPIO expander expects to be a children of +the "firmware" node. + +The patch also removes the "firmware" phandle as it's useless. + +Signed-off-by: Nicolas Saenz Julienne +--- + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 3 +-- + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 4 +++- + arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 4 +++- + 3 files changed, 7 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -83,12 +83,11 @@ + brcm,overclock-50 = <0>; + }; + +-&soc { ++&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; +- firmware = <&firmware>; + status = "okay"; + }; + }; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -92,11 +92,13 @@ + status = "okay"; + }; + ++}; ++ ++&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; +- firmware = <&firmware>; + status = "okay"; + }; + }; +--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts +@@ -53,11 +53,13 @@ + status = "okay"; + }; + ++}; ++ ++&firmware { + expgpio: expgpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; +- firmware = <&firmware>; + status = "okay"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0217-ARM-dts-bcm283x-The-lan7515-PHY-node-has-moved.patch b/target/linux/brcm2708/patches-4.19/950-0217-ARM-dts-bcm283x-The-lan7515-PHY-node-has-moved.patch new file mode 100644 index 000000000..9f0077cd0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0217-ARM-dts-bcm283x-The-lan7515-PHY-node-has-moved.patch @@ -0,0 +1,64 @@ +From 1606baa0882db5b08b493b59eaa2377703e536d2 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 27 Nov 2018 16:33:31 +0000 +Subject: [PATCH 217/703] ARM: dts: bcm283x: The lan7515 PHY node has moved + +The DT node describing the LAN7800s PHY has now moved inside an "mdio" +node. Update the DT declarations accordingly. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 31 ++++++++++++++-------- + 1 file changed, 20 insertions(+), 11 deletions(-) + +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -1,4 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 ++#include ++ + / { + aliases { + ethernet0 = ðernet; +@@ -21,13 +23,20 @@ + ethernet: ethernet@1 { + compatible = "usb424,7800"; + reg = <1>; +- microchip,eee-enabled; +- microchip,tx-lpi-timer = <600>; /* non-aggressive*/ +- /* +- * led0 = 1:link1000/activity +- * led1 = 6:link10/100/activity +- */ +- microchip,led-modes = <1 6>; ++ ++ mdio { ++ #address-cells = <0x1>; ++ #size-cells = <0x0>; ++ eth_phy: ethernet-phy@1 { ++ reg = <1>; ++ microchip,eee-enabled; ++ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ ++ microchip,led-modes = < ++ LAN78XX_LINK_1000_ACTIVITY ++ LAN78XX_LINK_10_100_ACTIVITY ++ >; ++ }; ++ }; + }; + }; + }; +@@ -36,9 +45,9 @@ + + / { + __overrides__ { +- eee = <ðernet>,"microchip,eee-enabled?"; +- tx_lpi_timer = <ðernet>,"microchip,tx-lpi-timer:0"; +- eth_led0 = <ðernet>,"microchip,led-modes:0"; +- eth_led1 = <ðernet>,"microchip,led-modes:4"; ++ eee = <ð_phy>,"microchip,eee-enabled?"; ++ tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; ++ eth_led0 = <ð_phy>,"microchip,led-modes:0"; ++ eth_led1 = <ð_phy>,"microchip,led-modes:4"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0218-net-lan78xx-Support-auto-downshift-to-100Mb-s.patch b/target/linux/brcm2708/patches-4.19/950-0218-net-lan78xx-Support-auto-downshift-to-100Mb-s.patch new file mode 100644 index 000000000..516ccf6cd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0218-net-lan78xx-Support-auto-downshift-to-100Mb-s.patch @@ -0,0 +1,83 @@ +From cfbb056c0c1445496f3434daf8324cad652d09be Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 26 Nov 2018 19:46:58 +0000 +Subject: [PATCH 218/703] net: lan78xx: Support auto-downshift to 100Mb/s + +Ethernet cables with faulty or missing pairs (specifically pairs C and +D) allow auto-negotiation to 1000Mbs, but do not support the successful +establishment of a link. Add a DT property, "microchip,downshift-after", +to configure the number of auto-negotiation failures after which it +falls back to 100Mbs. Valid values are 2, 3, 4, 5 and 0, where 0 means +never downshift. + +Signed-off-by: Phil Elwell +--- + drivers/net/phy/microchip.c | 32 ++++++++++++++++++++++++++++++++ + include/linux/microchipphy.h | 8 ++++++++ + 2 files changed, 40 insertions(+) + +--- a/drivers/net/phy/microchip.c ++++ b/drivers/net/phy/microchip.c +@@ -228,6 +228,7 @@ static int lan88xx_probe(struct phy_devi + struct device *dev = &phydev->mdio.dev; + struct lan88xx_priv *priv; + u32 led_modes[4]; ++ u32 downshift_after = 0; + int len; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); +@@ -257,6 +258,37 @@ static int lan88xx_probe(struct phy_devi + return -EINVAL; + } + ++ if (!of_property_read_u32(dev->of_node, ++ "microchip,downshift-after", ++ &downshift_after)) { ++ u32 mask = LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK; ++ u32 val = LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT; ++ ++ switch (downshift_after) { ++ case 2: ++ val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2; ++ break; ++ case 3: ++ val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3; ++ break; ++ case 4: ++ val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4; ++ break; ++ case 5: ++ val |= LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5; ++ break; ++ case 0: ++ /* Disable completely */ ++ mask = LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT; ++ val = 0; ++ break; ++ default: ++ return -EINVAL; ++ } ++ (void)phy_modify_paged(phydev, 1, LAN78XX_PHY_CTRL3, ++ mask, val); ++ } ++ + /* these values can be used to identify internal PHY */ + priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); + priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); +--- a/include/linux/microchipphy.h ++++ b/include/linux/microchipphy.h +@@ -73,6 +73,14 @@ + /* Registers specific to the LAN7800/LAN7850 embedded phy */ + #define LAN78XX_PHY_LED_MODE_SELECT (0x1D) + ++#define LAN78XX_PHY_CTRL3 (0x14) ++#define LAN78XX_PHY_CTRL3_AUTO_DOWNSHIFT (0x0010) ++#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_MASK (0x000c) ++#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_2 (0x0000) ++#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_3 (0x0004) ++#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_4 (0x0008) ++#define LAN78XX_PHY_CTRL3_DOWNSHIFT_CTRL_5 (0x000c) ++ + /* DSP registers */ + #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG (0x806A) + #define PHY_ARDENNES_MMD_DEV_3_PHY_CFG_ZD_DLY_EN_ (0x2000) diff --git a/target/linux/brcm2708/patches-4.19/950-0219-dt-bindings-Document-microchip-downshift-after.patch b/target/linux/brcm2708/patches-4.19/950-0219-dt-bindings-Document-microchip-downshift-after.patch new file mode 100644 index 000000000..36fc3efcb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0219-dt-bindings-Document-microchip-downshift-after.patch @@ -0,0 +1,24 @@ +From c8fee0e0a910f0286d6aa059b27c4d59109b978a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 28 Nov 2018 15:51:41 +0000 +Subject: [PATCH 219/703] dt-bindings: Document microchip,downshift-after + +Document the optional downshift-after property of the lan78xx's PHY. + +Signed-off-by: Phil Elwell +--- + Documentation/devicetree/bindings/net/microchip,lan78xx.txt | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/Documentation/devicetree/bindings/net/microchip,lan78xx.txt ++++ b/Documentation/devicetree/bindings/net/microchip,lan78xx.txt +@@ -15,6 +15,9 @@ Optional properties of the embedded PHY: + - microchip,led-modes: a 0..4 element vector, with each element configuring + the operating mode of an LED. Omitted LEDs are turned off. Allowed values + are defined in "include/dt-bindings/net/microchip-lan78xx.h". ++- microchip,downshift-after: sets the number of failed auto-negotiation ++ attempts after which the link is downgraded from 1000BASE-T. Should be one of ++ 2, 3, 4, 5 or 0, where 0 means never downshift. + + Example: + diff --git a/target/linux/brcm2708/patches-4.19/950-0220-ARM-dts-bcm283x-Set-downshift-after-for-Pi-3B.patch b/target/linux/brcm2708/patches-4.19/950-0220-ARM-dts-bcm283x-Set-downshift-after-for-Pi-3B.patch new file mode 100644 index 000000000..58be887ca --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0220-ARM-dts-bcm283x-Set-downshift-after-for-Pi-3B.patch @@ -0,0 +1,24 @@ +From 464f47a7c83ea253304b7fd43f56302db8071593 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 27 Nov 2018 16:55:14 +0000 +Subject: [PATCH 220/703] ARM: dts: bcm283x: Set downshift-after for Pi 3B+ + +Enable the auto-downshift feature on Raspberry Pi 3B+ so that a link +can eventually be established using a cable with pairs C and/or D +missing or broken in a 1000Mbps-capable port. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -31,6 +31,7 @@ + reg = <1>; + microchip,eee-enabled; + microchip,tx-lpi-timer = <600>; /* non-aggressive*/ ++ microchip,downshift-after = <2>; + microchip,led-modes = < + LAN78XX_LINK_1000_ACTIVITY + LAN78XX_LINK_10_100_ACTIVITY diff --git a/target/linux/brcm2708/patches-4.19/950-0221-BCM270X_DT-Add-new-Ethernet-DT-parameters.patch b/target/linux/brcm2708/patches-4.19/950-0221-BCM270X_DT-Add-new-Ethernet-DT-parameters.patch new file mode 100644 index 000000000..4b40e2f4d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0221-BCM270X_DT-Add-new-Ethernet-DT-parameters.patch @@ -0,0 +1,55 @@ +From 64c215470c985bd740e378cc3cd6963e15f0a927 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 27 Nov 2018 16:56:50 +0000 +Subject: [PATCH 221/703] BCM270X_DT: Add new Ethernet DT parameters + +Add "eth_downshift_after" DT parameter to allow the delay before the +downshift to be specified. The default is 2 auto-negotiation cycles, +and legal values are 2, 3, 4, 5 and 0 (disabled). + +Add "eth_max_speed" DT parameter as a way of prohibiting 1000Mbps +links. This can be used to avoid the delay until the downshift mechanism +activates. Legal values are 10, 100 and 1000, where the default is +unlimited (effectively 1000Mbps). + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 2 ++ + arch/arm/boot/dts/overlays/README | 9 +++++++++ + 2 files changed, 11 insertions(+) + +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -50,5 +50,7 @@ + tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; + eth_led0 = <ð_phy>,"microchip,led-modes:0"; + eth_led1 = <ð_phy>,"microchip,led-modes:4"; ++ eth_downshift_after = <ð_phy>,"microchip,downshift-after"; ++ eth_max_speed = <ð_phy>,"max-speed:0"; + }; + }; +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -98,6 +98,11 @@ Params: + compatible devices (default "on"). See also + "tx_lpi_timer". + ++ eth_downshift_after Set the number of auto-negotiation failures ++ after which the 1000Mbps modes are disabled. ++ Legal values are 2, 3, 4, 5 and 0, where ++ 0 means never downshift (default 2). ++ + eth_led0 Set mode of LED0 (usually orange) (default + "1"). The legal values are: + 0=link/activity 1=link1000/activity +@@ -108,6 +113,10 @@ Params: + eth_led1 Set mode of LED1 (usually green) (default + "6"). See eth_led0 for legal values. + ++ eth_max_speed Set the maximum speed a link is allowed ++ to negotiate. Legal values are 10, 100 and ++ 1000 (default 1000). ++ + i2c_arm Set to "on" to enable the ARM's i2c interface + (default "off") + diff --git a/target/linux/brcm2708/patches-4.19/950-0222-BCM270X_DT-Mark-eth_downshift_after-as-an-integer.patch b/target/linux/brcm2708/patches-4.19/950-0222-BCM270X_DT-Mark-eth_downshift_after-as-an-integer.patch new file mode 100644 index 000000000..265aee7e6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0222-BCM270X_DT-Mark-eth_downshift_after-as-an-integer.patch @@ -0,0 +1,21 @@ +From 50086a7018911acdd58d627050127bfa7c5ec7de Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 29 Nov 2018 16:00:22 +0000 +Subject: [PATCH 222/703] BCM270X_DT: Mark eth_downshift_after as an integer + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -50,7 +50,7 @@ + tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; + eth_led0 = <ð_phy>,"microchip,led-modes:0"; + eth_led1 = <ð_phy>,"microchip,led-modes:4"; +- eth_downshift_after = <ð_phy>,"microchip,downshift-after"; ++ eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; + eth_max_speed = <ð_phy>,"max-speed:0"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0223-dwc-otg-FIQ-Fix-bad-mode-in-data-abort-handler.patch b/target/linux/brcm2708/patches-4.19/950-0223-dwc-otg-FIQ-Fix-bad-mode-in-data-abort-handler.patch new file mode 100644 index 000000000..1bf0b58c4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0223-dwc-otg-FIQ-Fix-bad-mode-in-data-abort-handler.patch @@ -0,0 +1,128 @@ +From 71ffaebfc05366238b7b3777e572dc77ec6f78f6 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 16 Jul 2018 14:40:13 +0100 +Subject: [PATCH 223/703] dwc-otg: FIQ: Fix "bad mode in data abort handler" + +Create a semi-static mapping for the USB registers early in the boot +process, before additional kernel threads are started, so all threads +will have the mappings from the start. This avoids the need for +data aborts to lazily update them. + +See: https://github.com/raspberrypi/linux/issues/2450 + +Signed-off-by: Floris Bos +--- + arch/arm/mach-bcm/board_bcm2835.c | 69 +++++++++++++++++++++++ + drivers/usb/host/dwc_otg/dwc_otg_driver.c | 2 +- + 2 files changed, 70 insertions(+), 1 deletion(-) + +--- a/arch/arm/mach-bcm/board_bcm2835.c ++++ b/arch/arm/mach-bcm/board_bcm2835.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -22,6 +23,9 @@ + + #include "platsmp.h" + ++#define BCM2835_USB_VIRT_BASE 0xf0980000 ++#define BCM2835_USB_VIRT_MPHI 0xf0006000 ++ + static void __init bcm2835_init(void) + { + struct device_node *np = of_find_node_by_path("/system"); +@@ -34,6 +38,70 @@ static void __init bcm2835_init(void) + system_serial_low = val64; + } + ++/* ++ * We need to map registers that are going to be accessed by the FIQ ++ * very early, before any kernel threads are spawned. Because if done ++ * later, the mapping tables are not updated instantly but lazily upon ++ * first access through a data abort handler. While that is fine ++ * when executing regular kernel code, if the first access in a specific ++ * thread happens while running FIQ code this will result in a panic. ++ * ++ * For more background see the following old mailing list thread: ++ * https://www.spinics.net/lists/arm-kernel/msg325250.html ++ */ ++static int __init bcm2835_map_usb(unsigned long node, const char *uname, ++ int depth, void *data) ++{ ++ struct map_desc map[2]; ++ const __be32 *reg; ++ int len; ++ unsigned long p2b_offset = *((unsigned long *) data); ++ ++ if (!of_flat_dt_is_compatible(node, "brcm,bcm2708-usb")) ++ return 0; ++ reg = of_get_flat_dt_prop(node, "reg", &len); ++ if (!reg || len != (sizeof(unsigned long) * 4)) ++ return 0; ++ ++ /* Use information about the physical addresses of the ++ * registers from the device tree, but use legacy ++ * iotable_init() static mapping function to map them, ++ * as ioremap() is not functional at this stage in boot. ++ */ ++ map[0].virtual = (unsigned long) BCM2835_USB_VIRT_BASE; ++ map[0].pfn = __phys_to_pfn(be32_to_cpu(reg[0]) - p2b_offset); ++ map[0].length = be32_to_cpu(reg[1]); ++ map[0].type = MT_DEVICE; ++ map[1].virtual = (unsigned long) BCM2835_USB_VIRT_MPHI; ++ map[1].pfn = __phys_to_pfn(be32_to_cpu(reg[2]) - p2b_offset); ++ map[1].length = be32_to_cpu(reg[3]); ++ map[1].type = MT_DEVICE; ++ iotable_init(map, 2); ++ ++ return 1; ++} ++ ++static void __init bcm2835_map_io(void) ++{ ++ const __be32 *ranges; ++ int soc, len; ++ unsigned long p2b_offset; ++ ++ debug_ll_io_init(); ++ ++ /* Find out how to map bus to physical address first from soc/ranges */ ++ soc = of_get_flat_dt_subnode_by_name(of_get_flat_dt_root(), "soc"); ++ if (soc < 0) ++ return; ++ ranges = of_get_flat_dt_prop(soc, "ranges", &len); ++ if (!ranges || len < (sizeof(unsigned long) * 3)) ++ return; ++ p2b_offset = be32_to_cpu(ranges[0]) - be32_to_cpu(ranges[1]); ++ ++ /* Now search for bcm2708-usb node in device tree */ ++ of_scan_flat_dt(bcm2835_map_usb, &p2b_offset); ++} ++ + static const char * const bcm2835_compat[] = { + #ifdef CONFIG_ARCH_MULTI_V6 + "brcm,bcm2835", +@@ -46,6 +114,7 @@ static const char * const bcm2835_compat + }; + + DT_MACHINE_START(BCM2835, "BCM2835") ++ .map_io = bcm2835_map_io, + .init_machine = bcm2835_init, + .dt_compat = bcm2835_compat, + .smp = smp_ops(bcm2836_smp_ops), +--- a/drivers/usb/host/dwc_otg/dwc_otg_driver.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c +@@ -837,7 +837,7 @@ static int dwc_otg_driver_probe( + retval = -ENOMEM; + goto fail; + } +- dev_dbg(&_dev->dev, "base=0x%08x\n", ++ dev_info(&_dev->dev, "base=0x%08x\n", + (unsigned)dwc_otg_device->os_dep.base); + #endif + diff --git a/target/linux/brcm2708/patches-4.19/950-0224-lirc-rpi-Remove-in-favour-of-gpio-ir.patch b/target/linux/brcm2708/patches-4.19/950-0224-lirc-rpi-Remove-in-favour-of-gpio-ir.patch new file mode 100644 index 000000000..2aafb20c6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0224-lirc-rpi-Remove-in-favour-of-gpio-ir.patch @@ -0,0 +1,81 @@ +From e2c77b86039e8f16d6dd75e06a50dc7290e95233 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Fri, 30 Nov 2018 18:55:23 +0000 +Subject: [PATCH 224/703] lirc-rpi: Remove in favour of gpio-ir + +--- + arch/arm/boot/dts/overlays/Makefile | 1 - + .../boot/dts/overlays/lirc-rpi-overlay.dts | 57 ------------------- + 2 files changed, 58 deletions(-) + delete mode 100644 arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -68,7 +68,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + jedec-spi-nor.dtbo \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ +- lirc-rpi.dtbo \ + ltc294x.dtbo \ + mbed-dac.dtbo \ + mcp23017.dtbo \ +--- a/arch/arm/boot/dts/overlays/lirc-rpi-overlay.dts ++++ /dev/null +@@ -1,57 +0,0 @@ +-// Definitions for lirc-rpi module +-/dts-v1/; +-/plugin/; +- +-/ { +- compatible = "brcm,bcm2708"; +- +- fragment@0 { +- target-path = "/"; +- __overlay__ { +- lirc_rpi: lirc_rpi { +- compatible = "rpi,lirc-rpi"; +- pinctrl-names = "default"; +- pinctrl-0 = <&lirc_pins>; +- status = "okay"; +- +- // Override autodetection of IR receiver circuit +- // (0 = active high, 1 = active low, -1 = no override ) +- rpi,sense = <0xffffffff>; +- +- // Software carrier +- // (0 = off, 1 = on) +- rpi,softcarrier = <1>; +- +- // Invert output +- // (0 = off, 1 = on) +- rpi,invert = <0>; +- +- // Enable debugging messages +- // (0 = off, 1 = on) +- rpi,debug = <0>; +- }; +- }; +- }; +- +- fragment@1 { +- target = <&gpio>; +- __overlay__ { +- lirc_pins: lirc_pins { +- brcm,pins = <17 18>; +- brcm,function = <1 0>; // out in +- brcm,pull = <0 1>; // off down +- }; +- }; +- }; +- +- __overrides__ { +- gpio_out_pin = <&lirc_pins>,"brcm,pins:0"; +- gpio_in_pin = <&lirc_pins>,"brcm,pins:4"; +- gpio_in_pull = <&lirc_pins>,"brcm,pull:4"; +- +- sense = <&lirc_rpi>,"rpi,sense:0"; +- softcarrier = <&lirc_rpi>,"rpi,softcarrier:0"; +- invert = <&lirc_rpi>,"rpi,invert:0"; +- debug = <&lirc_rpi>,"rpi,debug:0"; +- }; +-}; diff --git a/target/linux/brcm2708/patches-4.19/950-0225-media-bcm2835-unicam-Pass-through-the-colorspace-on-.patch b/target/linux/brcm2708/patches-4.19/950-0225-media-bcm2835-unicam-Pass-through-the-colorspace-on-.patch new file mode 100644 index 000000000..dd4e3c79d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0225-media-bcm2835-unicam-Pass-through-the-colorspace-on-.patch @@ -0,0 +1,30 @@ +From b30282f720fddb3175a46726bd18ac691b172d32 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 22 Nov 2018 17:28:02 +0000 +Subject: [PATCH 225/703] media: bcm2835-unicam: Pass through the colorspace on + try_fmt + +The current colorspace was always returned from try_fmt for no +good reason. +Return what the source subdevice returns instead. + +Signed-off-by: Dave Stevenson +--- + drivers/media/platform/bcm2835/bcm2835-unicam.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/media/platform/bcm2835/bcm2835-unicam.c ++++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c +@@ -761,11 +761,7 @@ static int unicam_try_fmt_vid_cap(struct + unicam_info(dev, "Sensor trying to send interlaced video - results may be unpredictable\n"); + + v4l2_fill_pix_format(&f->fmt.pix, &sd_fmt.format); +- /* +- * Use current colorspace for now, it will get +- * updated properly during s_fmt +- */ +- f->fmt.pix.colorspace = dev->v_fmt.fmt.pix.colorspace; ++ + return unicam_calc_format_size_bpl(dev, fmt, f); + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0226-media-tc358743-Return-an-appropriate-colorspace-from.patch b/target/linux/brcm2708/patches-4.19/950-0226-media-tc358743-Return-an-appropriate-colorspace-from.patch new file mode 100644 index 000000000..24a7d10e0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0226-media-tc358743-Return-an-appropriate-colorspace-from.patch @@ -0,0 +1,98 @@ +From 8f84df14dc88580bfdce95999ab0167d3871ff7c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 22 Nov 2018 17:31:06 +0000 +Subject: [PATCH 226/703] media: tc358743: Return an appropriate colorspace + from tc358743_set_fmt + +When calling tc358743_set_fmt, the code was calling tc358743_get_fmt +to choose a valid format. However that sets the colorspace +based on what was read back from the chip. When you set the format, +then the driver would choose and program the colorspace based +on the format code. + +The result was that if you called try or set format for UYVY +when the current format was RGB3 then you would get told sRGB, +and try RGB3 when current was UYVY and you would get told +SMPTE170M. + +The value programmed into the chip is determined by this driver, +therefore there is no need to read back the value. Return the +colorspace based on the format set/tried instead. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/tc358743.c | 40 +++++++++++++----------------------- + 1 file changed, 14 insertions(+), 26 deletions(-) + +--- a/drivers/media/i2c/tc358743.c ++++ b/drivers/media/i2c/tc358743.c +@@ -1680,12 +1680,23 @@ static int tc358743_enum_mbus_code(struc + return 0; + } + ++static u32 tc358743_g_colorspace(u32 code) ++{ ++ switch (code) { ++ case MEDIA_BUS_FMT_RGB888_1X24: ++ return V4L2_COLORSPACE_SRGB; ++ case MEDIA_BUS_FMT_UYVY8_1X16: ++ return V4L2_COLORSPACE_SMPTE170M; ++ default: ++ return 0; ++ } ++} ++ + static int tc358743_get_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_pad_config *cfg, + struct v4l2_subdev_format *format) + { + struct tc358743_state *state = to_state(sd); +- u8 vi_rep = i2c_rd8(sd, VI_REP); + + if (format->pad != 0) + return -EINVAL; +@@ -1695,23 +1706,7 @@ static int tc358743_get_fmt(struct v4l2_ + format->format.height = state->timings.bt.height; + format->format.field = V4L2_FIELD_NONE; + +- switch (vi_rep & MASK_VOUT_COLOR_SEL) { +- case MASK_VOUT_COLOR_RGB_FULL: +- case MASK_VOUT_COLOR_RGB_LIMITED: +- format->format.colorspace = V4L2_COLORSPACE_SRGB; +- break; +- case MASK_VOUT_COLOR_601_YCBCR_LIMITED: +- case MASK_VOUT_COLOR_601_YCBCR_FULL: +- format->format.colorspace = V4L2_COLORSPACE_SMPTE170M; +- break; +- case MASK_VOUT_COLOR_709_YCBCR_FULL: +- case MASK_VOUT_COLOR_709_YCBCR_LIMITED: +- format->format.colorspace = V4L2_COLORSPACE_REC709; +- break; +- default: +- format->format.colorspace = 0; +- break; +- } ++ format->format.colorspace = tc358743_g_colorspace(format->format.code); + + return 0; + } +@@ -1726,18 +1721,11 @@ static int tc358743_set_fmt(struct v4l2_ + int ret = tc358743_get_fmt(sd, cfg, format); + + format->format.code = code; ++ format->format.colorspace = tc358743_g_colorspace(code); + + if (ret) + return ret; + +- switch (code) { +- case MEDIA_BUS_FMT_RGB888_1X24: +- case MEDIA_BUS_FMT_UYVY8_1X16: +- break; +- default: +- return -EINVAL; +- } +- + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + return 0; + diff --git a/target/linux/brcm2708/patches-4.19/950-0227-staging-bcm2835-camera-fix-module-autoloading.patch b/target/linux/brcm2708/patches-4.19/950-0227-staging-bcm2835-camera-fix-module-autoloading.patch new file mode 100644 index 000000000..7c6052b36 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0227-staging-bcm2835-camera-fix-module-autoloading.patch @@ -0,0 +1,24 @@ +From 99b24dda7eb97f1c094abc942241ff1a7428b639 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 20 Oct 2018 19:26:18 +0200 +Subject: [PATCH 227/703] staging: bcm2835-camera: fix module autoloading + +In order to make the module bcm2835-camera load automatically, we need to +add a module alias. + +Fixes: 4bebb0312ea9 ("staging/bcm2835-camera: Set ourselves up as a platform driver.") +Signed-off-by: Stefan Wahren +--- + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -47,6 +47,7 @@ MODULE_DESCRIPTION("Broadcom 2835 MMAL v + MODULE_AUTHOR("Vincent Sanders"); + MODULE_LICENSE("GPL"); + MODULE_VERSION(BM2835_MMAL_VERSION); ++MODULE_ALIAS("platform:bcm2835-camera"); + + int bcm2835_v4l2_debug; + module_param_named(debug, bcm2835_v4l2_debug, int, 0644); diff --git a/target/linux/brcm2708/patches-4.19/950-0228-staging-bcm2835-camera-Move-module-info-to-the-end.patch b/target/linux/brcm2708/patches-4.19/950-0228-staging-bcm2835-camera-Move-module-info-to-the-end.patch new file mode 100644 index 000000000..d743c6a99 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0228-staging-bcm2835-camera-Move-module-info-to-the-end.patch @@ -0,0 +1,38 @@ +From 9aa76a475dad23bcec194a08d063c9b19e54187e Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 20 Oct 2018 19:31:00 +0200 +Subject: [PATCH 228/703] staging: bcm2835-camera: Move module info to the end + +In order to have this more consistent between the vc04 services move +the module information to the end of the file. + +Signed-off-by: Stefan Wahren +--- + .../vc04_services/bcm2835-camera/bcm2835-camera.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -43,12 +43,6 @@ + + #define MAX_BCM2835_CAMERAS 2 + +-MODULE_DESCRIPTION("Broadcom 2835 MMAL video capture"); +-MODULE_AUTHOR("Vincent Sanders"); +-MODULE_LICENSE("GPL"); +-MODULE_VERSION(BM2835_MMAL_VERSION); +-MODULE_ALIAS("platform:bcm2835-camera"); +- + int bcm2835_v4l2_debug; + module_param_named(debug, bcm2835_v4l2_debug, int, 0644); + MODULE_PARM_DESC(bcm2835_v4l2_debug, "Debug level 0-2"); +@@ -1967,3 +1961,9 @@ static struct platform_driver bcm2835_ca + }; + + module_platform_driver(bcm2835_camera_driver) ++ ++MODULE_DESCRIPTION("Broadcom 2835 MMAL video capture"); ++MODULE_AUTHOR("Vincent Sanders"); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION(BM2835_MMAL_VERSION); ++MODULE_ALIAS("platform:bcm2835-camera"); diff --git a/target/linux/brcm2708/patches-4.19/950-0229-staging-vchiq_arm-Fix-platform-device-unregistration.patch b/target/linux/brcm2708/patches-4.19/950-0229-staging-vchiq_arm-Fix-platform-device-unregistration.patch new file mode 100644 index 000000000..4c2a3482a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0229-staging-vchiq_arm-Fix-platform-device-unregistration.patch @@ -0,0 +1,27 @@ +From e70e5563e9db4cb2cf081f40373b0b0df40b1c5c Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 13 Oct 2018 20:51:23 +0200 +Subject: [PATCH 229/703] staging: vchiq_arm: Fix platform device + unregistration + +In error case platform_device_register_data would return an ERR_PTR +instead of NULL. So we better check this before unregistration. + +Fixes: 37b7b3087a2f ("staging/vc04_services: Register a platform device for the camera driver.") +Signed-off-by: Stefan Wahren +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3656,7 +3656,8 @@ failed_platform_init: + + static int vchiq_remove(struct platform_device *pdev) + { +- platform_device_unregister(bcm2835_camera); ++ if (!IS_ERR(bcm2835_camera)) ++ platform_device_unregister(bcm2835_camera); + vchiq_debugfs_deinit(); + device_destroy(vchiq_class, vchiq_devid); + class_destroy(vchiq_class); diff --git a/target/linux/brcm2708/patches-4.19/950-0230-staging-vchiq_arm-Fix-camera-device-registration.patch b/target/linux/brcm2708/patches-4.19/950-0230-staging-vchiq_arm-Fix-camera-device-registration.patch new file mode 100644 index 000000000..181e339b4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0230-staging-vchiq_arm-Fix-camera-device-registration.patch @@ -0,0 +1,56 @@ +From 1134ea85e8c3870ee3d31bb6acb4326d0f674d6a Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Mon, 22 Oct 2018 15:16:51 +0200 +Subject: [PATCH 230/703] staging: vchiq_arm: Fix camera device registration + +Since the camera driver isn't probed via DT, we need to properly setup DMA. + +Fixes: 37b7b3087a2f ("staging/vc04_services: Register a platform device for the camera driver.") +Signed-off-by: Stefan Wahren +--- + .../interface/vchiq_arm/vchiq_arm.c | 20 ++++++++++++++++--- + 1 file changed, 17 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -49,6 +49,7 @@ + #include + #include + #include ++#include + #include + + #include "vchiq_core.h" +@@ -3578,6 +3579,21 @@ void vchiq_platform_conn_state_changed(V + } + } + ++static struct platform_device * ++vchiq_register_child(struct platform_device *pdev, const char *name) ++{ ++ struct platform_device_info pdevinfo; ++ ++ memset(&pdevinfo, 0, sizeof(pdevinfo)); ++ ++ pdevinfo.parent = &pdev->dev; ++ pdevinfo.name = name; ++ pdevinfo.id = PLATFORM_DEVID_NONE; ++ pdevinfo.dma_mask = DMA_BIT_MASK(32); ++ ++ return platform_device_register_full(&pdevinfo); ++} ++ + static int vchiq_probe(struct platform_device *pdev) + { + struct device_node *fw_node; +@@ -3637,9 +3653,7 @@ static int vchiq_probe(struct platform_d + VCHIQ_VERSION, VCHIQ_VERSION_MIN, + MAJOR(vchiq_devid), MINOR(vchiq_devid)); + +- bcm2835_camera = platform_device_register_data(&pdev->dev, +- "bcm2835-camera", -1, +- NULL, 0); ++ bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); + + return 0; + diff --git a/target/linux/brcm2708/patches-4.19/950-0231-staging-vchiq_arm-Register-a-platform-device-for-the.patch b/target/linux/brcm2708/patches-4.19/950-0231-staging-vchiq_arm-Register-a-platform-device-for-the.patch new file mode 100644 index 000000000..30bea2f20 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0231-staging-vchiq_arm-Register-a-platform-device-for-the.patch @@ -0,0 +1,38 @@ +From 1f7a4bfbb20d1775eac5b7db7545c0ab35b7642d Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 20 Oct 2018 20:25:41 +0200 +Subject: [PATCH 231/703] staging: vchiq_arm: Register a platform device for + the audio driver + +Signed-off-by: Stefan Wahren +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -170,6 +170,7 @@ static struct class *vchiq_class; + static struct device *vchiq_dev; + static DEFINE_SPINLOCK(msg_queue_spinlock); + static struct platform_device *bcm2835_camera; ++static struct platform_device *bcm2835_audio; + + static const char *const ioctl_names[] = { + "CONNECT", +@@ -3654,6 +3655,7 @@ static int vchiq_probe(struct platform_d + MAJOR(vchiq_devid), MINOR(vchiq_devid)); + + bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); ++ bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio"); + + return 0; + +@@ -3670,6 +3672,8 @@ failed_platform_init: + + static int vchiq_remove(struct platform_device *pdev) + { ++ if (!IS_ERR(bcm2835_audio)) ++ platform_device_unregister(bcm2835_audio); + if (!IS_ERR(bcm2835_camera)) + platform_device_unregister(bcm2835_camera); + vchiq_debugfs_deinit(); diff --git a/target/linux/brcm2708/patches-4.19/950-0232-staging-bcm2835-audio-Enable-compile-test.patch b/target/linux/brcm2708/patches-4.19/950-0232-staging-bcm2835-audio-Enable-compile-test.patch new file mode 100644 index 000000000..d04e18b8a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0232-staging-bcm2835-audio-Enable-compile-test.patch @@ -0,0 +1,22 @@ +From 4055954ff0be5159876c33f4841be686b4f730ab Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 13 Oct 2018 20:19:13 +0200 +Subject: [PATCH 232/703] staging: bcm2835-audio: Enable compile test + +Enable the compilation test for bcm2835-audio. + +Signed-off-by: Stefan Wahren +--- + drivers/staging/vc04_services/bcm2835-audio/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/Kconfig ++++ b/drivers/staging/vc04_services/bcm2835-audio/Kconfig +@@ -1,6 +1,6 @@ + config SND_BCM2835 + tristate "BCM2835 Audio" +- depends on ARCH_BCM2835 && SND ++ depends on (ARCH_BCM2835 || COMPILE_TEST) && SND + select SND_PCM + select BCM2835_VCHIQ + help diff --git a/target/linux/brcm2708/patches-4.19/950-0233-staging-bcm2835-audio-use-module_platform_driver-mac.patch b/target/linux/brcm2708/patches-4.19/950-0233-staging-bcm2835-audio-use-module_platform_driver-mac.patch new file mode 100644 index 000000000..27537ec5a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0233-staging-bcm2835-audio-use-module_platform_driver-mac.patch @@ -0,0 +1,43 @@ +From ff285113caa9279101db3b6eb31dfc3d94e57d3d Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 18 Oct 2018 19:47:29 +0200 +Subject: [PATCH 233/703] staging: bcm2835-audio: use module_platform_driver() + macro + +There is not much value behind this boilerplate, so use +module_platform_driver() instead. + +Signed-off-by: Stefan Wahren +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 20 +------------------ + 1 file changed, 1 insertion(+), 19 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -470,25 +470,7 @@ static struct platform_driver bcm2835_al + .of_match_table = snd_bcm2835_of_match_table, + }, + }; +- +-static int bcm2835_alsa_device_init(void) +-{ +- int retval; +- +- retval = platform_driver_register(&bcm2835_alsa0_driver); +- if (retval) +- pr_err("Error registering bcm2835_audio driver %d .\n", retval); +- +- return retval; +-} +- +-static void bcm2835_alsa_device_exit(void) +-{ +- platform_driver_unregister(&bcm2835_alsa0_driver); +-} +- +-late_initcall(bcm2835_alsa_device_init); +-module_exit(bcm2835_alsa_device_exit); ++module_platform_driver(bcm2835_alsa0_driver); + + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); diff --git a/target/linux/brcm2708/patches-4.19/950-0234-staging-bcm2835-audio-Drop-DT-dependency.patch b/target/linux/brcm2708/patches-4.19/950-0234-staging-bcm2835-audio-Drop-DT-dependency.patch new file mode 100644 index 000000000..29cd60732 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0234-staging-bcm2835-audio-Drop-DT-dependency.patch @@ -0,0 +1,116 @@ +From 4f0fb18ee7b5479b673257d15fe7bec3b3d90aac Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 18 Oct 2018 19:54:01 +0200 +Subject: [PATCH 234/703] staging: bcm2835-audio: Drop DT dependency + +Just like the bcm2835-video make this a platform driver which is probed +by vchiq. In order to change the number of channels use a module +parameter instead, but use the maximum as default. + +Signed-off-by: Stefan Wahren +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 41 +++++++++---------- + 1 file changed, 19 insertions(+), 22 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -4,15 +4,17 @@ + #include + + #include ++#include ++#include + #include + #include +-#include + + #include "bcm2835.h" + + static bool enable_hdmi; + static bool enable_headphones; + static bool enable_compat_alsa = true; ++static int num_channels = MAX_SUBSTREAMS; + + module_param(enable_hdmi, bool, 0444); + MODULE_PARM_DESC(enable_hdmi, "Enables HDMI virtual audio device"); +@@ -21,6 +23,8 @@ MODULE_PARM_DESC(enable_headphones, "Ena + module_param(enable_compat_alsa, bool, 0444); + MODULE_PARM_DESC(enable_compat_alsa, + "Enables ALSA compatibility virtual audio device"); ++module_param(num_channels, int, 0644); ++MODULE_PARM_DESC(num_channels, "Number of audio channels (default: 8)"); + + static void snd_devm_unregister_child(struct device *dev, void *res) + { +@@ -407,31 +411,30 @@ static int snd_add_child_devices(struct + return 0; + } + +-static int snd_bcm2835_alsa_probe_dt(struct platform_device *pdev) ++static int snd_bcm2835_alsa_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +- u32 numchans; + int err; + +- err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", +- &numchans); +- if (err) { +- dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); +- return err; ++ if (num_channels <= 0 || num_channels > MAX_SUBSTREAMS) { ++ num_channels = MAX_SUBSTREAMS; ++ dev_warn(dev, "Illegal num_channels value, will use %u\n", ++ num_channels); + } + +- if (numchans == 0 || numchans > MAX_SUBSTREAMS) { +- numchans = MAX_SUBSTREAMS; +- dev_warn(dev, +- "Illegal 'brcm,pwm-channels' value, will use %u\n", +- numchans); ++ dev->coherent_dma_mask = DMA_BIT_MASK(32); ++ dev->dma_mask = &dev->coherent_dma_mask; ++ err = of_dma_configure(dev, NULL, true); ++ if (err) { ++ dev_err(dev, "Unable to setup DMA: %d\n", err); ++ return err; + } + + err = bcm2835_devm_add_vchi_ctx(dev); + if (err) + return err; + +- err = snd_add_child_devices(dev, numchans); ++ err = snd_add_child_devices(dev, num_channels); + if (err) + return err; + +@@ -453,21 +456,14 @@ static int snd_bcm2835_alsa_resume(struc + + #endif + +-static const struct of_device_id snd_bcm2835_of_match_table[] = { +- { .compatible = "brcm,bcm2835-audio",}, +- {}, +-}; +-MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); +- + static struct platform_driver bcm2835_alsa0_driver = { +- .probe = snd_bcm2835_alsa_probe_dt, ++ .probe = snd_bcm2835_alsa_probe, + #ifdef CONFIG_PM + .suspend = snd_bcm2835_alsa_suspend, + .resume = snd_bcm2835_alsa_resume, + #endif + .driver = { + .name = "bcm2835_audio", +- .of_match_table = snd_bcm2835_of_match_table, + }, + }; + module_platform_driver(bcm2835_alsa0_driver); +@@ -475,3 +471,4 @@ module_platform_driver(bcm2835_alsa0_dri + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); + MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:bcm2835_audio"); diff --git a/target/linux/brcm2708/patches-4.19/950-0235-staging-bcm2835-camera-Provide-more-specific-probe-e.patch b/target/linux/brcm2708/patches-4.19/950-0235-staging-bcm2835-camera-Provide-more-specific-probe-e.patch new file mode 100644 index 000000000..e8e3c311e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0235-staging-bcm2835-camera-Provide-more-specific-probe-e.patch @@ -0,0 +1,166 @@ +From a6646e496feed4fd7affe3fc5d4fc3e2591046d6 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sun, 21 Oct 2018 18:40:07 +0200 +Subject: [PATCH 235/703] staging: bcm2835-camera: Provide more specific probe + error messages + +Currently there is only a catch-all info message which print the +relevant error code without any context. So add more specific error +messages in order to narrow down possible issues. + +Signed-off-by: Stefan Wahren +--- + .../bcm2835-camera/bcm2835-camera.c | 58 +++++++++++++------ + 1 file changed, 39 insertions(+), 19 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -1539,8 +1539,11 @@ static int mmal_init(struct bm2835_mmal_ + struct vchiq_mmal_component *camera; + + ret = vchiq_mmal_init(&dev->instance); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: vchiq mmal init failed %d\n", ++ __func__, ret); + return ret; ++ } + + /* get the camera component ready */ + ret = vchiq_mmal_component_init(dev->instance, "ril.camera", +@@ -1549,7 +1552,9 @@ static int mmal_init(struct bm2835_mmal_ + goto unreg_mmal; + + camera = dev->component[MMAL_COMPONENT_CAMERA]; +- if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { ++ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { ++ v4l2_err(&dev->v4l2_dev, "%s: too few camera outputs %d needed %d\n", ++ __func__, camera->outputs, MMAL_CAMERA_PORT_COUNT); + ret = -EINVAL; + goto unreg_camera; + } +@@ -1557,8 +1562,11 @@ static int mmal_init(struct bm2835_mmal_ + ret = set_camera_parameters(dev->instance, + camera, + dev); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: unable to set camera parameters: %d\n", ++ __func__, ret); + goto unreg_camera; ++ } + + /* There was an error in the firmware that meant the camera component + * produced BGR instead of RGB. +@@ -1647,8 +1655,8 @@ static int mmal_init(struct bm2835_mmal_ + + if (dev->component[MMAL_COMPONENT_PREVIEW]->inputs < 1) { + ret = -EINVAL; +- pr_debug("too few input ports %d needed %d\n", +- dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); ++ v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", ++ __func__, dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); + goto unreg_preview; + } + +@@ -1661,8 +1669,8 @@ static int mmal_init(struct bm2835_mmal_ + + if (dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs < 1) { + ret = -EINVAL; +- v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", +- dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, ++ v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", ++ __func__, dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, + 1); + goto unreg_image_encoder; + } +@@ -1676,8 +1684,8 @@ static int mmal_init(struct bm2835_mmal_ + + if (dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs < 1) { + ret = -EINVAL; +- v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", +- dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, ++ v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", ++ __func__, dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, + 1); + goto unreg_vid_encoder; + } +@@ -1706,8 +1714,11 @@ static int mmal_init(struct bm2835_mmal_ + sizeof(enable)); + } + ret = bm2835_mmal_set_all_camera_controls(dev); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: failed to set all camera controls: %d\n", ++ __func__, ret); + goto unreg_vid_encoder; ++ } + + return 0; + +@@ -1867,21 +1878,29 @@ static int bcm2835_mmal_probe(struct pla + snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), + "%s", BM2835_MMAL_MODULE_NAME); + ret = v4l2_device_register(NULL, &dev->v4l2_dev); +- if (ret) ++ if (ret) { ++ dev_err(&pdev->dev, "%s: could not register V4L2 device: %d\n", ++ __func__, ret); + goto free_dev; ++ } + + /* setup v4l controls */ + ret = bm2835_mmal_init_controls(dev, &dev->ctrl_handler); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: could not init controls: %d\n", ++ __func__, ret); + goto unreg_dev; ++ } + dev->v4l2_dev.ctrl_handler = &dev->ctrl_handler; + + /* mmal init */ + dev->instance = instance; + ret = mmal_init(dev); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: mmal init failed: %d\n", ++ __func__, ret); + goto unreg_dev; +- ++ } + /* initialize queue */ + q = &dev->capture.vb_vidq; + memset(q, 0, sizeof(*q)); +@@ -1899,16 +1918,19 @@ static int bcm2835_mmal_probe(struct pla + + /* initialise video devices */ + ret = bm2835_mmal_init_device(dev, &dev->vdev); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: could not init device: %d\n", ++ __func__, ret); + goto unreg_dev; ++ } + + /* Really want to call vidioc_s_fmt_vid_cap with the default + * format, but currently the APIs don't join up. + */ + ret = mmal_setup_components(dev, &default_v4l2_format); + if (ret < 0) { +- v4l2_err(&dev->v4l2_dev, +- "%s: could not setup components\n", __func__); ++ v4l2_err(&dev->v4l2_dev, "%s: could not setup components: %d\n", ++ __func__, ret); + goto unreg_dev; + } + +@@ -1932,8 +1954,6 @@ cleanup_gdev: + bcm2835_cleanup_instance(gdev[i]); + gdev[i] = NULL; + } +- pr_info("%s: error %d while loading driver\n", +- BM2835_MMAL_MODULE_NAME, ret); + + return ret; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0236-staging-bcm2835-camera-Add-hint-about-possible-fault.patch b/target/linux/brcm2708/patches-4.19/950-0236-staging-bcm2835-camera-Add-hint-about-possible-fault.patch new file mode 100644 index 000000000..8091ea01d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0236-staging-bcm2835-camera-Add-hint-about-possible-fault.patch @@ -0,0 +1,31 @@ +From 477275011a3c1720683e3f9e6014ed2e76d921b7 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sun, 21 Oct 2018 19:08:29 +0200 +Subject: [PATCH 236/703] staging: bcm2835-camera: Add hint about possible + faulty GPU mem config + +As per default the GPU memory config of the Raspberry Pi isn't sufficient +for the camera usage. Even worse the bcm2835 camera doesn't provide a +helpful error message in this case. So let's add a hint to point the user +to the likely cause. + +Signed-off-by: Stefan Wahren +--- + drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -1624,8 +1624,11 @@ int vchiq_mmal_component_init(struct vch + component = &instance->component[instance->component_idx]; + + ret = create_component(instance, component, name); +- if (ret < 0) ++ if (ret < 0) { ++ pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", ++ __func__, ret); + goto unlock; ++ } + + /* ports info needs gathering */ + component->control.type = MMAL_PORT_TYPE_CONTROL; diff --git a/target/linux/brcm2708/patches-4.19/950-0237-staging-bcm2835-Don-t-probe-if-no-camera-is-detected.patch b/target/linux/brcm2708/patches-4.19/950-0237-staging-bcm2835-Don-t-probe-if-no-camera-is-detected.patch new file mode 100644 index 000000000..0b8f0dcfa --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0237-staging-bcm2835-Don-t-probe-if-no-camera-is-detected.patch @@ -0,0 +1,41 @@ +From 55c9d1a762b9cbb5a4c574918fb41a9cde6bb491 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Mon, 22 Oct 2018 11:09:18 +0200 +Subject: [PATCH 237/703] staging: bcm2835: Don't probe if no camera is + detected + +It is a waste of resources to load the camera driver in case there isn't +a camera actually connected to the Raspberry Pi. This solution also +avoids a NULL ptr dereference of mmal instance on driver unload. + +Fixes: 7b3ad5abf027 ("staging: Import the BCM2835 MMAL-based V4L2 camera driver.") +Signed-off-by: Stefan Wahren +--- + .../vc04_services/bcm2835-camera/bcm2835-camera.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -1847,6 +1847,12 @@ static int bcm2835_mmal_probe(struct pla + num_cameras = get_num_cameras(instance, + resolutions, + MAX_BCM2835_CAMERAS); ++ ++ if (num_cameras < 1) { ++ ret = -ENODEV; ++ goto cleanup_mmal; ++ } ++ + if (num_cameras > MAX_BCM2835_CAMERAS) + num_cameras = MAX_BCM2835_CAMERAS; + +@@ -1955,6 +1961,9 @@ cleanup_gdev: + gdev[i] = NULL; + } + ++cleanup_mmal: ++ vchiq_mmal_finalise(instance); ++ + return ret; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0238-staging-vchiq_arm-Improve-error-handling-on-loading-.patch b/target/linux/brcm2708/patches-4.19/950-0238-staging-vchiq_arm-Improve-error-handling-on-loading-.patch new file mode 100644 index 000000000..c32757c24 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0238-staging-vchiq_arm-Improve-error-handling-on-loading-.patch @@ -0,0 +1,45 @@ +From f83ac752b3898e65614d8b643ac57e828e1c5668 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 3 Dec 2018 12:50:38 +0000 +Subject: [PATCH 238/703] staging: vchiq_arm: Improve error handling on loading + drivers + +The handling of loading platform drivers requires checking IS_ERR +for the pointer on unload. +If the driver fails to load, NULL the pointer during probe as +platform_device_unregister already checks for NULL. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3655,7 +3655,11 @@ static int vchiq_probe(struct platform_d + MAJOR(vchiq_devid), MINOR(vchiq_devid)); + + bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); ++ if (IS_ERR(bcm2835_camera)) ++ bcm2835_camera = NULL; + bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio"); ++ if (IS_ERR(bcm2835_audio)) ++ bcm2835_audio = NULL; + + return 0; + +@@ -3672,10 +3676,10 @@ failed_platform_init: + + static int vchiq_remove(struct platform_device *pdev) + { +- if (!IS_ERR(bcm2835_audio)) +- platform_device_unregister(bcm2835_audio); +- if (!IS_ERR(bcm2835_camera)) +- platform_device_unregister(bcm2835_camera); ++ platform_device_unregister(bcm2835_codec); ++ platform_device_unregister(bcm2835_audio); ++ platform_device_unregister(bcm2835_camera); ++ platform_device_unregister(vcsm_cma); + vchiq_debugfs_deinit(); + device_destroy(vchiq_class, vchiq_devid); + class_destroy(vchiq_class); diff --git a/target/linux/brcm2708/patches-4.19/950-0239-staging-bcm2835-camera-Do-not-bulk-receive-from-serv.patch b/target/linux/brcm2708/patches-4.19/950-0239-staging-bcm2835-camera-Do-not-bulk-receive-from-serv.patch new file mode 100644 index 000000000..99a960215 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0239-staging-bcm2835-camera-Do-not-bulk-receive-from-serv.patch @@ -0,0 +1,197 @@ +From 7cd2d38371edd4a04401c02c098a0e436816f3af Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 14 Feb 2018 17:04:26 +0000 +Subject: [PATCH 239/703] staging: bcm2835-camera: Do not bulk receive from + service thread + +vchi_bulk_queue_receive will queue up to a default of 4 +bulk receives on a connection before blocking. +If called from the VCHI service_callback thread, then +that thread is unable to service the VCHI_CALLBACK_BULK_RECEIVED +events that would enable the queue call to succeed. + +Add a workqueue to schedule the call vchi_bulk_queue_receive +in an alternate context to avoid the lock up. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/mmal-vchiq.c | 101 ++++++++++-------- + 1 file changed, 59 insertions(+), 42 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -118,8 +118,10 @@ struct mmal_msg_context { + + union { + struct { +- /* work struct for defered callback - must come first */ ++ /* work struct for buffer_cb callback */ + struct work_struct work; ++ /* work struct for deferred callback */ ++ struct work_struct buffer_to_host_work; + /* mmal instance */ + struct vchiq_mmal_instance *instance; + /* mmal port */ +@@ -167,6 +169,9 @@ struct vchiq_mmal_instance { + /* component to use next */ + int component_idx; + struct vchiq_mmal_component component[VCHIQ_MMAL_MAX_COMPONENTS]; ++ ++ /* ordered workqueue to process all bulk operations */ ++ struct workqueue_struct *bulk_wq; + }; + + static struct mmal_msg_context * +@@ -248,7 +253,44 @@ static void buffer_work_cb(struct work_s + msg_context->u.bulk.mmal_flags, + msg_context->u.bulk.dts, + msg_context->u.bulk.pts); ++} + ++/* workqueue scheduled callback to handle receiving buffers ++ * ++ * VCHI will allow up to 4 bulk receives to be scheduled before blocking. ++ * If we block in the service_callback context then we can't process the ++ * VCHI_CALLBACK_BULK_RECEIVED message that would otherwise allow the blocked ++ * vchi_bulk_queue_receive() call to complete. ++ */ ++static void buffer_to_host_work_cb(struct work_struct *work) ++{ ++ struct mmal_msg_context *msg_context = ++ container_of(work, struct mmal_msg_context, ++ u.bulk.buffer_to_host_work); ++ struct vchiq_mmal_instance *instance = msg_context->instance; ++ unsigned long len = msg_context->u.bulk.buffer_used; ++ int ret; ++ ++ if (!len) ++ /* Dummy receive to ensure the buffers remain in order */ ++ len = 8; ++ /* queue the bulk submission */ ++ vchi_service_use(instance->handle); ++ ret = vchi_bulk_queue_receive(instance->handle, ++ msg_context->u.bulk.buffer->buffer, ++ /* Actual receive needs to be a multiple ++ * of 4 bytes ++ */ ++ (len + 3) & ~3, ++ VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, ++ msg_context); ++ ++ vchi_service_release(instance->handle); ++ ++ if (ret != 0) ++ pr_err("%s: ctx: %p, vchi_bulk_queue_receive failed %d\n", ++ __func__, msg_context, ret); + } + + /* enqueue a bulk receive for a given message context */ +@@ -257,7 +299,6 @@ static int bulk_receive(struct vchiq_mma + struct mmal_msg_context *msg_context) + { + unsigned long rd_len; +- int ret; + + rd_len = msg->u.buffer_from_host.buffer_header.length; + +@@ -293,45 +334,10 @@ static int bulk_receive(struct vchiq_mma + msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; + msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; + +- /* queue the bulk submission */ +- vchi_service_use(instance->handle); +- ret = vchi_bulk_queue_receive(instance->handle, +- msg_context->u.bulk.buffer->buffer, +- /* Actual receive needs to be a multiple +- * of 4 bytes +- */ +- (rd_len + 3) & ~3, +- VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | +- VCHI_FLAGS_BLOCK_UNTIL_QUEUED, +- msg_context); +- +- vchi_service_release(instance->handle); ++ queue_work(msg_context->instance->bulk_wq, ++ &msg_context->u.bulk.buffer_to_host_work); + +- return ret; +-} +- +-/* enque a dummy bulk receive for a given message context */ +-static int dummy_bulk_receive(struct vchiq_mmal_instance *instance, +- struct mmal_msg_context *msg_context) +-{ +- int ret; +- +- /* zero length indicates this was a dummy transfer */ +- msg_context->u.bulk.buffer_used = 0; +- +- /* queue the bulk submission */ +- vchi_service_use(instance->handle); +- +- ret = vchi_bulk_queue_receive(instance->handle, +- instance->bulk_scratch, +- 8, +- VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | +- VCHI_FLAGS_BLOCK_UNTIL_QUEUED, +- msg_context); +- +- vchi_service_release(instance->handle); +- +- return ret; ++ return 0; + } + + /* data in message, memcpy from packet into output buffer */ +@@ -379,6 +385,8 @@ buffer_from_host(struct vchiq_mmal_insta + + /* initialise work structure ready to schedule callback */ + INIT_WORK(&msg_context->u.bulk.work, buffer_work_cb); ++ INIT_WORK(&msg_context->u.bulk.buffer_to_host_work, ++ buffer_to_host_work_cb); + + /* prep the buffer from host message */ + memset(&m, 0xbc, sizeof(m)); /* just to make debug clearer */ +@@ -459,7 +467,7 @@ static void buffer_to_host_cb(struct vch + if (msg->u.buffer_from_host.buffer_header.flags & + MMAL_BUFFER_HEADER_FLAG_EOS) { + msg_context->u.bulk.status = +- dummy_bulk_receive(instance, msg_context); ++ bulk_receive(instance, msg, msg_context); + if (msg_context->u.bulk.status == 0) + return; /* successful bulk submission, bulk + * completion will trigger callback +@@ -1793,6 +1801,9 @@ int vchiq_mmal_finalise(struct vchiq_mma + + mutex_unlock(&instance->vchiq_mutex); + ++ flush_workqueue(instance->bulk_wq); ++ destroy_workqueue(instance->bulk_wq); ++ + vfree(instance->bulk_scratch); + + idr_destroy(&instance->context_map); +@@ -1862,6 +1873,11 @@ int vchiq_mmal_init(struct vchiq_mmal_in + + params.callback_param = instance; + ++ instance->bulk_wq = alloc_ordered_workqueue("mmal-vchiq", ++ WQ_MEM_RECLAIM); ++ if (!instance->bulk_wq) ++ goto err_free; ++ + status = vchi_service_open(vchi_instance, ¶ms, &instance->handle); + if (status) { + pr_err("Failed to open VCHI service connection (status=%d)\n", +@@ -1876,8 +1892,9 @@ int vchiq_mmal_init(struct vchiq_mmal_in + return 0; + + err_close_services: +- + vchi_service_close(instance->handle); ++ destroy_workqueue(instance->bulk_wq); ++err_free: + vfree(instance->bulk_scratch); + kfree(instance); + return -ENODEV; diff --git a/target/linux/brcm2708/patches-4.19/950-0240-staging-bcm2835-camera-Ensure-H264-header-bytes-get-.patch b/target/linux/brcm2708/patches-4.19/950-0240-staging-bcm2835-camera-Ensure-H264-header-bytes-get-.patch new file mode 100644 index 000000000..1cf56b22d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0240-staging-bcm2835-camera-Ensure-H264-header-bytes-get-.patch @@ -0,0 +1,87 @@ +From 1e07591a39c73d5aec191a5d4065f33167483dd2 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 14:21:04 +0000 +Subject: [PATCH 240/703] staging: bcm2835-camera: Ensure H264 header bytes get + a sensible timestamp + +H264 header come from VC with 0 timestamps, which means they get a +strange timestamp when processed with VC/kernel start times, +particularly if used with the inline header option. +Remember the last frame timestamp and use that if set, or otherwise +use the kernel start time. + +https://github.com/raspberrypi/linux/issues/1836 + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 30 +++++++++++++++++-- + .../bcm2835-camera/bcm2835-camera.h | 2 ++ + 2 files changed, 29 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -360,8 +360,13 @@ static void buffer_cb(struct vchiq_mmal_ + } + } else { + if (dev->capture.frame_count) { +- if (dev->capture.vc_start_timestamp != -1 && +- pts != 0) { ++ if (dev->capture.vc_start_timestamp == -1) { ++ buf->vb.vb2_buf.timestamp = ktime_get_ns(); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Buffer time set as current time - %lld", ++ buf->vb.vb2_buf.timestamp); ++ ++ } else if (pts != 0) { + ktime_t timestamp; + s64 runtime_us = pts - + dev->capture.vc_start_timestamp; +@@ -374,10 +379,28 @@ static void buffer_cb(struct vchiq_mmal_ + ktime_to_ns(timestamp)); + buf->vb.vb2_buf.timestamp = ktime_to_ns(timestamp); + } else { +- buf->vb.vb2_buf.timestamp = ktime_get_ns(); ++ if (dev->capture.last_timestamp) { ++ buf->vb.vb2_buf.timestamp = ++ dev->capture.last_timestamp; ++ v4l2_dbg(1, bcm2835_v4l2_debug, ++ &dev->v4l2_dev, ++ "Buffer time set as last timestamp - %lld", ++ buf->vb.vb2_buf.timestamp); ++ } else { ++ buf->vb.vb2_buf.timestamp = ++ ktime_to_ns(dev->capture.kernel_start_ts); ++ v4l2_dbg(1, bcm2835_v4l2_debug, ++ &dev->v4l2_dev, ++ "Buffer time set as start timestamp - %lld", ++ buf->vb.vb2_buf.timestamp); ++ } + } ++ dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; + + vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Buffer has ts %llu", ++ dev->capture.last_timestamp); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); + + if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && +@@ -543,6 +566,7 @@ static int start_streaming(struct vb2_qu + dev->capture.vc_start_timestamp, parameter_size); + + dev->capture.kernel_start_ts = ktime_get(); ++ dev->capture.last_timestamp = 0; + + /* enable the camera port */ + dev->capture.port->cb_ctx = dev; +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +@@ -90,6 +90,8 @@ struct bm2835_mmal_dev { + s64 vc_start_timestamp; + /* Kernel start timestamp for streaming */ + ktime_t kernel_start_ts; ++ /* Timestamp of last frame */ ++ u64 last_timestamp; + + struct vchiq_mmal_port *port; /* port being used for capture */ + /* camera port being used for capture */ diff --git a/target/linux/brcm2708/patches-4.9/950-0197-BCM2835-V4L2-Correctly-denote-key-frames-in-encoded-.patch b/target/linux/brcm2708/patches-4.19/950-0241-staging-bcm2835-camera-Correctly-denote-key-frames-i.patch similarity index 51% rename from target/linux/brcm2708/patches-4.9/950-0197-BCM2835-V4L2-Correctly-denote-key-frames-in-encoded-.patch rename to target/linux/brcm2708/patches-4.19/950-0241-staging-bcm2835-camera-Correctly-denote-key-frames-i.patch index 4b375abad..4e2269a66 100644 --- a/target/linux/brcm2708/patches-4.9/950-0197-BCM2835-V4L2-Correctly-denote-key-frames-in-encoded-.patch +++ b/target/linux/brcm2708/patches-4.19/950-0241-staging-bcm2835-camera-Correctly-denote-key-frames-i.patch @@ -1,18 +1,19 @@ -From 9136b739f4ecc714db0431a3e0f4f4d9b12ab670 Mon Sep 17 00:00:00 2001 +From e66266218dca0b30e730f7b97240119cd140b92f Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Mon, 13 Feb 2017 13:11:41 +0000 -Subject: [PATCH] BCM2835-V4L2: Correctly denote key frames in encoded data +Subject: [PATCH 241/703] staging: bcm2835-camera: Correctly denote key frames + in encoded data Forward MMAL key frame flags to the V4L2 buffers. Signed-off-by: Dave Stevenson --- - drivers/media/platform/bcm2835/bcm2835-camera.c | 3 +++ + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 3 +++ 1 file changed, 3 insertions(+) ---- a/drivers/media/platform/bcm2835/bcm2835-camera.c -+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c -@@ -413,6 +413,9 @@ static void buffer_cb(struct vchiq_mmal_ +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -398,6 +398,9 @@ static void buffer_cb(struct vchiq_mmal_ dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); @@ -20,5 +21,5 @@ Signed-off-by: Dave Stevenson + buf->vb.flags |= V4L2_BUF_FLAG_KEYFRAME; + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, - "Buffer has ts %llu", - dev->capture.last_timestamp); + "Buffer has ts %llu", + dev->capture.last_timestamp); diff --git a/target/linux/brcm2708/patches-4.19/950-0242-staging-bcm2835-camera-Return-early-on-errors.patch b/target/linux/brcm2708/patches-4.19/950-0242-staging-bcm2835-camera-Return-early-on-errors.patch new file mode 100644 index 000000000..5dc558a7e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0242-staging-bcm2835-camera-Return-early-on-errors.patch @@ -0,0 +1,196 @@ +From 83ba21bb6043c5afc3d497e9be4e128b3e1adf93 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 10 Mar 2017 17:27:56 +0000 +Subject: [PATCH 242/703] staging: bcm2835-camera: Return early on errors + +Fix several instances where it is easier to return +early on error conditions than handle it as an else +clause. +As requested by Mauro. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 137 +++++++++--------- + 1 file changed, 71 insertions(+), 66 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -335,7 +335,9 @@ static void buffer_cb(struct vchiq_mmal_ + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); + } + return; +- } else if (length == 0) { ++ } ++ ++ if (length == 0) { + /* stream ended */ + if (buf) { + /* this should only ever happen if the port is +@@ -358,71 +360,72 @@ static void buffer_cb(struct vchiq_mmal_ + /* signal frame completion */ + complete(&dev->capture.frame_cmplt); + } +- } else { +- if (dev->capture.frame_count) { +- if (dev->capture.vc_start_timestamp == -1) { +- buf->vb.vb2_buf.timestamp = ktime_get_ns(); +- v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Buffer time set as current time - %lld", +- buf->vb.vb2_buf.timestamp); +- +- } else if (pts != 0) { +- ktime_t timestamp; +- s64 runtime_us = pts - +- dev->capture.vc_start_timestamp; +- timestamp = ktime_add_us(dev->capture.kernel_start_ts, +- runtime_us); +- v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Convert start time %llu and %llu with offset %llu to %llu\n", +- ktime_to_ns(dev->capture.kernel_start_ts), +- dev->capture.vc_start_timestamp, pts, +- ktime_to_ns(timestamp)); +- buf->vb.vb2_buf.timestamp = ktime_to_ns(timestamp); +- } else { +- if (dev->capture.last_timestamp) { +- buf->vb.vb2_buf.timestamp = +- dev->capture.last_timestamp; +- v4l2_dbg(1, bcm2835_v4l2_debug, +- &dev->v4l2_dev, +- "Buffer time set as last timestamp - %lld", +- buf->vb.vb2_buf.timestamp); +- } else { +- buf->vb.vb2_buf.timestamp = +- ktime_to_ns(dev->capture.kernel_start_ts); +- v4l2_dbg(1, bcm2835_v4l2_debug, +- &dev->v4l2_dev, +- "Buffer time set as start timestamp - %lld", +- buf->vb.vb2_buf.timestamp); +- } +- } +- dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; ++ return; ++ } + +- vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); +- if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) +- buf->vb.flags |= V4L2_BUF_FLAG_KEYFRAME; ++ if (!dev->capture.frame_count) { ++ /* signal frame completion */ ++ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); ++ complete(&dev->capture.frame_cmplt); ++ return; ++ } + ++ if (dev->capture.vc_start_timestamp == -1) { ++ /* ++ * VPU doesn't support MMAL_PARAMETER_SYSTEM_TIME, rely on ++ * kernel time, and have no latency compensation. ++ */ ++ buf->vb.vb2_buf.timestamp = ktime_get_ns(); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Buffer time set as current time - %lld", ++ buf->vb.vb2_buf.timestamp); ++ } else if (pts != 0) { ++ ktime_t timestamp; ++ s64 runtime_us = pts - ++ dev->capture.vc_start_timestamp; ++ timestamp = ktime_add_us(dev->capture.kernel_start_ts, ++ runtime_us); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Convert start time %llu and %llu with offset %llu to %llu\n", ++ ktime_to_ns(dev->capture.kernel_start_ts), ++ dev->capture.vc_start_timestamp, pts, ++ ktime_to_ns(timestamp)); ++ buf->vb.vb2_buf.timestamp = ktime_to_ns(timestamp); ++ } else { ++ if (dev->capture.last_timestamp) { ++ buf->vb.vb2_buf.timestamp = dev->capture.last_timestamp; + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Buffer has ts %llu", +- dev->capture.last_timestamp); +- vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); +- +- if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && +- is_capturing(dev)) { +- v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Grab another frame as buffer has EOS"); +- vchiq_mmal_port_parameter_set( +- instance, +- dev->capture.camera_port, +- MMAL_PARAMETER_CAPTURE, +- &dev->capture.frame_count, +- sizeof(dev->capture.frame_count)); +- } ++ "Buffer time set as last timestamp - %lld", ++ buf->vb.vb2_buf.timestamp); + } else { +- /* signal frame completion */ +- vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); +- complete(&dev->capture.frame_cmplt); ++ buf->vb.vb2_buf.timestamp = ++ ktime_to_ns(dev->capture.kernel_start_ts); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Buffer time set as start timestamp - %lld", ++ buf->vb.vb2_buf.timestamp); + } + } ++ dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; ++ ++ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); ++ if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) ++ buf->vb.flags |= V4L2_BUF_FLAG_KEYFRAME; ++ ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Buffer has ts %llu", ++ dev->capture.last_timestamp); ++ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); ++ ++ if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && ++ is_capturing(dev)) { ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Grab another frame as buffer has EOS"); ++ vchiq_mmal_port_parameter_set(instance, ++ dev->capture.camera_port, ++ MMAL_PARAMETER_CAPTURE, ++ &dev->capture.frame_count, ++ sizeof(dev->capture.frame_count)); ++ } + } + + static int enable_camera(struct bm2835_mmal_dev *dev) +@@ -802,27 +805,29 @@ static int vidioc_overlay(struct file *f + + ret = vchiq_mmal_port_set_format(dev->instance, src); + if (ret < 0) +- goto error; ++ return ret; + + ret = set_overlay_params(dev, dst); + if (ret < 0) +- goto error; ++ return ret; + +- if (enable_camera(dev) < 0) +- goto error; ++ if (enable_camera(dev) < 0) { ++ ret = -EINVAL; ++ return ret; ++ } + + ret = vchiq_mmal_component_enable( + dev->instance, + dev->component[MMAL_COMPONENT_PREVIEW]); + if (ret < 0) +- goto error; ++ return ret; + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "connecting %p to %p\n", + src, dst); + ret = vchiq_mmal_port_connect_tunnel(dev->instance, src, dst); + if (!ret) + ret = vchiq_mmal_port_enable(dev->instance, src, NULL); +-error: ++ + return ret; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0243-staging-bcm2835-camera-Remove-dead-email-addresses.patch b/target/linux/brcm2708/patches-4.19/950-0243-staging-bcm2835-camera-Remove-dead-email-addresses.patch new file mode 100644 index 000000000..d3bc0d822 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0243-staging-bcm2835-camera-Remove-dead-email-addresses.patch @@ -0,0 +1,241 @@ +From b7c48c78192d20fadb46b41a4628cb2a239017c1 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 10 Mar 2017 17:35:38 +0000 +Subject: [PATCH 243/703] staging: bcm2835-camera: Remove dead email addresses + +None of the listed author email addresses were valid. +Keep list of authors and the companies they represented. +Update my email address. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/bcm2835-camera.c | 9 +++++---- + .../vc04_services/bcm2835-camera/bcm2835-camera.h | 9 +++++---- + drivers/staging/vc04_services/bcm2835-camera/controls.c | 9 +++++---- + .../staging/vc04_services/bcm2835-camera/mmal-common.h | 9 +++++---- + .../vc04_services/bcm2835-camera/mmal-encodings.h | 9 +++++---- + .../vc04_services/bcm2835-camera/mmal-msg-common.h | 9 +++++---- + .../vc04_services/bcm2835-camera/mmal-msg-format.h | 9 +++++---- + .../staging/vc04_services/bcm2835-camera/mmal-msg-port.h | 9 +++++---- + drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h | 9 +++++---- + .../vc04_services/bcm2835-camera/mmal-parameters.h | 9 +++++---- + .../staging/vc04_services/bcm2835-camera/mmal-vchiq.c | 9 +++++---- + .../staging/vc04_services/bcm2835-camera/mmal-vchiq.h | 9 +++++---- + 12 files changed, 60 insertions(+), 48 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + #include +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + * + * core driver device + */ +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + #include +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-common.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-common.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + * + * MMAL structures + * +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-encodings.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-encodings.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + #ifndef MMAL_ENCODINGS_H + #define MMAL_ENCODINGS_H +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-common.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-common.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + #ifndef MMAL_MSG_COMMON_H +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-format.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-format.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + #ifndef MMAL_MSG_FORMAT_H +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-port.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-port.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + /* MMAL_PORT_TYPE_T */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + /* all the data structures which serialise the MMAL protocol. note +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + */ + + /* common parameters */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + * + * V4L2 driver MMAL vchiq interface code + */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h +@@ -4,10 +4,11 @@ + * + * Copyright © 2013 Raspberry Pi (Trading) Ltd. + * +- * Authors: Vincent Sanders +- * Dave Stevenson +- * Simon Mellor +- * Luke Diamand ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom + * + * MMAL interface to VCHIQ message passing + */ diff --git a/target/linux/brcm2708/patches-4.19/950-0244-staging-bcm2835-camera-Fix-comment-style-violations.patch b/target/linux/brcm2708/patches-4.19/950-0244-staging-bcm2835-camera-Fix-comment-style-violations.patch new file mode 100644 index 000000000..3659e33fc --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0244-staging-bcm2835-camera-Fix-comment-style-violations.patch @@ -0,0 +1,617 @@ +From d1f1713c45091e779b29ee64e8900c9fac9e6339 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 13:49:32 +0000 +Subject: [PATCH 244/703] staging: bcm2835-camera: Fix comment style + violations. + +Fix comment style violations in the header files. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/mmal-msg-format.h | 95 ++++++------ + .../bcm2835-camera/mmal-msg-port.h | 124 ++++++++-------- + .../vc04_services/bcm2835-camera/mmal-msg.h | 135 +++++++++--------- + 3 files changed, 185 insertions(+), 169 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-format.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-format.h +@@ -19,22 +19,23 @@ + /* MMAL_ES_FORMAT_T */ + + struct mmal_audio_format { +- u32 channels; /**< Number of audio channels */ +- u32 sample_rate; /**< Sample rate */ ++ u32 channels; /* Number of audio channels */ ++ u32 sample_rate; /* Sample rate */ + +- u32 bits_per_sample; /**< Bits per sample */ +- u32 block_align; /**< Size of a block of data */ ++ u32 bits_per_sample; /* Bits per sample */ ++ u32 block_align; /* Size of a block of data */ + }; + + struct mmal_video_format { +- u32 width; /**< Width of frame in pixels */ +- u32 height; /**< Height of frame in rows of pixels */ +- struct mmal_rect crop; /**< Visible region of the frame */ +- struct mmal_rational frame_rate; /**< Frame rate */ +- struct mmal_rational par; /**< Pixel aspect ratio */ +- +- /* FourCC specifying the color space of the video stream. See the +- * \ref MmalColorSpace "pre-defined color spaces" for some examples. ++ u32 width; /* Width of frame in pixels */ ++ u32 height; /* Height of frame in rows of pixels */ ++ struct mmal_rect crop; /* Visible region of the frame */ ++ struct mmal_rational frame_rate; /* Frame rate */ ++ struct mmal_rational par; /* Pixel aspect ratio */ ++ ++ /* ++ * FourCC specifying the color space of the video stream. See the ++ * MmalColorSpace "pre-defined color spaces" for some examples. + */ + u32 color_space; + }; +@@ -50,48 +51,56 @@ union mmal_es_specific_format { + struct mmal_subpicture_format subpicture; + }; + +-/** Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ ++/* Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ + struct mmal_es_format_local { +- u32 type; /* enum mmal_es_type */ +- +- u32 encoding; /* FourCC specifying encoding of the elementary stream.*/ +- u32 encoding_variant; /* FourCC specifying the specific +- * encoding variant of the elementary +- * stream. +- */ +- +- union mmal_es_specific_format *es; /* Type specific +- * information for the +- * elementary stream +- */ ++ u32 type; /* enum mmal_es_type */ + +- u32 bitrate; /**< Bitrate in bits per second */ +- u32 flags; /**< Flags describing properties of the elementary stream. */ ++ u32 encoding; /* FourCC specifying encoding of the elementary ++ * stream. ++ */ ++ u32 encoding_variant; /* FourCC specifying the specific ++ * encoding variant of the elementary ++ * stream. ++ */ ++ ++ union mmal_es_specific_format *es; /* Type specific ++ * information for the ++ * elementary stream ++ */ ++ ++ u32 bitrate; /* Bitrate in bits per second */ ++ u32 flags; /* Flags describing properties of the elementary ++ * stream. ++ */ + +- u32 extradata_size; /**< Size of the codec specific data */ +- u8 *extradata; /**< Codec specific data */ ++ u32 extradata_size; /* Size of the codec specific data */ ++ u8 *extradata; /* Codec specific data */ + }; + +-/** Remote definition of an elementary stream format (MMAL_ES_FORMAT_T) */ ++/* Remote definition of an elementary stream format (MMAL_ES_FORMAT_T) */ + struct mmal_es_format { +- u32 type; /* enum mmal_es_type */ ++ u32 type; /* enum mmal_es_type */ + +- u32 encoding; /* FourCC specifying encoding of the elementary stream.*/ +- u32 encoding_variant; /* FourCC specifying the specific +- * encoding variant of the elementary +- * stream. +- */ ++ u32 encoding; /* FourCC specifying encoding of the elementary ++ * stream. ++ */ ++ u32 encoding_variant; /* FourCC specifying the specific ++ * encoding variant of the elementary ++ * stream. ++ */ + +- u32 es; /* Type specific ++ u32 es; /* Type specific + * information for the + * elementary stream + */ + +- u32 bitrate; /**< Bitrate in bits per second */ +- u32 flags; /**< Flags describing properties of the elementary stream. */ ++ u32 bitrate; /* Bitrate in bits per second */ ++ u32 flags; /* Flags describing properties of the elementary ++ * stream. ++ */ + +- u32 extradata_size; /**< Size of the codec specific data */ +- u32 extradata; /**< Codec specific data */ ++ u32 extradata_size; /* Size of the codec specific data */ ++ u32 extradata; /* Codec specific data */ + }; + + #endif /* MMAL_MSG_FORMAT_H */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-port.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-port.h +@@ -13,28 +13,31 @@ + + /* MMAL_PORT_TYPE_T */ + enum mmal_port_type { +- MMAL_PORT_TYPE_UNKNOWN = 0, /**< Unknown port type */ +- MMAL_PORT_TYPE_CONTROL, /**< Control port */ +- MMAL_PORT_TYPE_INPUT, /**< Input port */ +- MMAL_PORT_TYPE_OUTPUT, /**< Output port */ +- MMAL_PORT_TYPE_CLOCK, /**< Clock port */ ++ MMAL_PORT_TYPE_UNKNOWN = 0, /* Unknown port type */ ++ MMAL_PORT_TYPE_CONTROL, /* Control port */ ++ MMAL_PORT_TYPE_INPUT, /* Input port */ ++ MMAL_PORT_TYPE_OUTPUT, /* Output port */ ++ MMAL_PORT_TYPE_CLOCK, /* Clock port */ + }; + +-/** The port is pass-through and doesn't need buffer headers allocated */ ++/* The port is pass-through and doesn't need buffer headers allocated */ + #define MMAL_PORT_CAPABILITY_PASSTHROUGH 0x01 +-/** The port wants to allocate the buffer payloads. ++/* ++ *The port wants to allocate the buffer payloads. + * This signals a preference that payload allocation should be done + * on this port for efficiency reasons. + */ + #define MMAL_PORT_CAPABILITY_ALLOCATION 0x02 +-/** The port supports format change events. ++/* ++ * The port supports format change events. + * This applies to input ports and is used to let the client know + * whether the port supports being reconfigured via a format + * change event (i.e. without having to disable the port). + */ + #define MMAL_PORT_CAPABILITY_SUPPORTS_EVENT_FORMAT_CHANGE 0x04 + +-/* mmal port structure (MMAL_PORT_T) ++/* ++ * mmal port structure (MMAL_PORT_T) + * + * most elements are informational only, the pointer values for + * interogation messages are generally provided as additional +@@ -42,50 +45,50 @@ enum mmal_port_type { + * buffer_num, buffer_size and userdata parameters are writable. + */ + struct mmal_port { +- u32 priv; /* Private member used by the framework */ +- u32 name; /* Port name. Used for debugging purposes (RO) */ ++ u32 priv; /* Private member used by the framework */ ++ u32 name; /* Port name. Used for debugging purposes (RO) */ + +- u32 type; /* Type of the port (RO) enum mmal_port_type */ +- u16 index; /* Index of the port in its type list (RO) */ +- u16 index_all; /* Index of the port in the list of all ports (RO) */ +- +- u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */ +- u32 format; /* Format of the elementary stream */ +- +- u32 buffer_num_min; /* Minimum number of buffers the port +- * requires (RO). This is set by the +- * component. +- */ +- +- u32 buffer_size_min; /* Minimum size of buffers the port +- * requires (RO). This is set by the +- * component. +- */ +- +- u32 buffer_alignment_min; /* Minimum alignment requirement for +- * the buffers (RO). A value of +- * zero means no special alignment +- * requirements. This is set by the +- * component. +- */ +- +- u32 buffer_num_recommended; /* Number of buffers the port +- * recommends for optimal +- * performance (RO). A value of +- * zero means no special +- * recommendation. This is set +- * by the component. +- */ +- +- u32 buffer_size_recommended; /* Size of buffers the port +- * recommends for optimal +- * performance (RO). A value of +- * zero means no special +- * recommendation. This is set +- * by the component. +- */ ++ u32 type; /* Type of the port (RO) enum mmal_port_type */ ++ u16 index; /* Index of the port in its type list (RO) */ ++ u16 index_all; /* Index of the port in the list of all ports (RO) */ ++ ++ u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */ ++ u32 format; /* Format of the elementary stream */ ++ ++ u32 buffer_num_min; /* Minimum number of buffers the port ++ * requires (RO). This is set by the ++ * component. ++ */ ++ ++ u32 buffer_size_min; /* Minimum size of buffers the port ++ * requires (RO). This is set by the ++ * component. ++ */ ++ ++ u32 buffer_alignment_min;/* Minimum alignment requirement for ++ * the buffers (RO). A value of ++ * zero means no special alignment ++ * requirements. This is set by the ++ * component. ++ */ ++ ++ u32 buffer_num_recommended; /* Number of buffers the port ++ * recommends for optimal ++ * performance (RO). A value of ++ * zero means no special ++ * recommendation. This is set ++ * by the component. ++ */ ++ ++ u32 buffer_size_recommended; /* Size of buffers the port ++ * recommends for optimal ++ * performance (RO). A value of ++ * zero means no special ++ * recommendation. This is set ++ * by the component. ++ */ + +- u32 buffer_num; /* Actual number of buffers the port will use. ++ u32 buffer_num; /* Actual number of buffers the port will use. + * This is set by the client. + */ + +@@ -94,14 +97,13 @@ struct mmal_port { + * the client. + */ + +- u32 component; /* Component this port belongs to (Read Only) */ ++ u32 component; /* Component this port belongs to (Read Only) */ + +- u32 userdata; /* Field reserved for use by the client */ +- +- u32 capabilities; /* Flags describing the capabilities of a +- * port (RO). Bitwise combination of \ref +- * portcapabilities "Port capabilities" +- * values. +- */ ++ u32 userdata; /* Field reserved for use by the client */ + ++ u32 capabilities; /* Flags describing the capabilities of a ++ * port (RO). Bitwise combination of \ref ++ * portcapabilities "Port capabilities" ++ * values. ++ */ + }; +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h +@@ -11,7 +11,8 @@ + * Luke Diamand @ Broadcom + */ + +-/* all the data structures which serialise the MMAL protocol. note ++/* ++ * all the data structures which serialise the MMAL protocol. note + * these are directly mapped onto the recived message data. + * + * BEWARE: They seem to *assume* pointers are u32 and that there is no +@@ -41,51 +42,51 @@ enum mmal_msg_type { + MMAL_MSG_TYPE_SERVICE_CLOSED, + MMAL_MSG_TYPE_GET_VERSION, + MMAL_MSG_TYPE_COMPONENT_CREATE, +- MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */ ++ MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */ + MMAL_MSG_TYPE_COMPONENT_ENABLE, + MMAL_MSG_TYPE_COMPONENT_DISABLE, + MMAL_MSG_TYPE_PORT_INFO_GET, + MMAL_MSG_TYPE_PORT_INFO_SET, +- MMAL_MSG_TYPE_PORT_ACTION, /* 10 */ ++ MMAL_MSG_TYPE_PORT_ACTION, /* 10 */ + MMAL_MSG_TYPE_BUFFER_FROM_HOST, + MMAL_MSG_TYPE_BUFFER_TO_HOST, + MMAL_MSG_TYPE_GET_STATS, + MMAL_MSG_TYPE_PORT_PARAMETER_SET, +- MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */ ++ MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */ + MMAL_MSG_TYPE_EVENT_TO_HOST, + MMAL_MSG_TYPE_GET_CORE_STATS_FOR_PORT, + MMAL_MSG_TYPE_OPAQUE_ALLOCATOR, + MMAL_MSG_TYPE_CONSUME_MEM, +- MMAL_MSG_TYPE_LMK, /* 20 */ ++ MMAL_MSG_TYPE_LMK, /* 20 */ + MMAL_MSG_TYPE_OPAQUE_ALLOCATOR_DESC, + MMAL_MSG_TYPE_DRM_GET_LHS32, + MMAL_MSG_TYPE_DRM_GET_TIME, + MMAL_MSG_TYPE_BUFFER_FROM_HOST_ZEROLEN, +- MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */ ++ MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */ + MMAL_MSG_TYPE_HOST_LOG, + MMAL_MSG_TYPE_MSG_LAST + }; + + /* port action request messages differ depending on the action type */ + enum mmal_msg_port_action_type { +- MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unknown action */ +- MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */ +- MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */ +- MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */ +- MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */ +- MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */ ++ MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unknown action */ ++ MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */ ++ MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */ + MMAL_MSG_PORT_ACTION_TYPE_SET_REQUIREMENTS, /* Set buffer requirements*/ + }; + + struct mmal_msg_header { + u32 magic; +- u32 type; /** enum mmal_msg_type */ ++ u32 type; /* enum mmal_msg_type */ + + /* Opaque handle to the control service */ + u32 control_service; + +- u32 context; /** a u32 per message context */ +- u32 status; /** The status of the vchiq operation */ ++ u32 context; /* a u32 per message context */ ++ u32 status; /* The status of the vchiq operation */ + u32 padding; + }; + +@@ -99,9 +100,9 @@ struct mmal_msg_version { + + /* request to VC to create component */ + struct mmal_msg_component_create { +- u32 client_component; /* component context */ ++ u32 client_component; /* component context */ + char name[128]; +- u32 pid; /* For debug */ ++ u32 pid; /* For debug */ + }; + + /* reply from VC to component creation request */ +@@ -121,7 +122,7 @@ struct mmal_msg_component_destroy { + }; + + struct mmal_msg_component_destroy_reply { +- u32 status; /** The component destruction status */ ++ u32 status; /* The component destruction status */ + }; + + /* request and reply to VC to enable a component */ +@@ -130,7 +131,7 @@ struct mmal_msg_component_enable { + }; + + struct mmal_msg_component_enable_reply { +- u32 status; /** The component enable status */ ++ u32 status; /* The component enable status */ + }; + + /* request and reply to VC to disable a component */ +@@ -139,7 +140,7 @@ struct mmal_msg_component_disable { + }; + + struct mmal_msg_component_disable_reply { +- u32 status; /** The component disable status */ ++ u32 status; /* The component disable status */ + }; + + /* request to VC to get port information */ +@@ -151,12 +152,12 @@ struct mmal_msg_port_info_get { + + /* reply from VC to get port info request */ + struct mmal_msg_port_info_get_reply { +- u32 status; /** enum mmal_msg_status */ +- u32 component_handle; /* component handle port is associated with */ +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 port_index; /* port indexed in query */ +- s32 found; /* unused */ +- u32 port_handle; /**< Handle to use for this port */ ++ u32 status; /* enum mmal_msg_status */ ++ u32 component_handle; /* component handle port is associated with */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 port_index; /* port indexed in query */ ++ s32 found; /* unused */ ++ u32 port_handle; /* Handle to use for this port */ + struct mmal_port port; + struct mmal_es_format format; /* elementary stream format */ + union mmal_es_specific_format es; /* es type specific data */ +@@ -166,8 +167,8 @@ struct mmal_msg_port_info_get_reply { + /* request to VC to set port information */ + struct mmal_msg_port_info_set { + u32 component_handle; +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 port_index; /* port indexed in query */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 port_index; /* port indexed in query */ + struct mmal_port port; + struct mmal_es_format format; + union mmal_es_specific_format es; +@@ -177,11 +178,11 @@ struct mmal_msg_port_info_set { + /* reply from VC to port info set request */ + struct mmal_msg_port_info_set_reply { + u32 status; +- u32 component_handle; /* component handle port is associated with */ +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 index; /* port indexed in query */ +- s32 found; /* unused */ +- u32 port_handle; /**< Handle to use for this port */ ++ u32 component_handle; /* component handle port is associated with */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 index; /* port indexed in query */ ++ s32 found; /* unused */ ++ u32 port_handle; /* Handle to use for this port */ + struct mmal_port port; + struct mmal_es_format format; + union mmal_es_specific_format es; +@@ -192,7 +193,7 @@ struct mmal_msg_port_info_set_reply { + struct mmal_msg_port_action_port { + u32 component_handle; + u32 port_handle; +- u32 action; /* enum mmal_msg_port_action_type */ ++ u32 action; /* enum mmal_msg_port_action_type */ + struct mmal_port port; + }; + +@@ -200,50 +201,53 @@ struct mmal_msg_port_action_port { + struct mmal_msg_port_action_handle { + u32 component_handle; + u32 port_handle; +- u32 action; /* enum mmal_msg_port_action_type */ ++ u32 action; /* enum mmal_msg_port_action_type */ + u32 connect_component_handle; + u32 connect_port_handle; + }; + + struct mmal_msg_port_action_reply { +- u32 status; /** The port action operation status */ ++ u32 status; /* The port action operation status */ + }; + + /* MMAL buffer transfer */ + +-/** Size of space reserved in a buffer message for short messages. */ ++/* Size of space reserved in a buffer message for short messages. */ + #define MMAL_VC_SHORT_DATA 128 + +-/** Signals that the current payload is the end of the stream of data */ ++/* Signals that the current payload is the end of the stream of data */ + #define MMAL_BUFFER_HEADER_FLAG_EOS BIT(0) +-/** Signals that the start of the current payload starts a frame */ ++/* Signals that the start of the current payload starts a frame */ + #define MMAL_BUFFER_HEADER_FLAG_FRAME_START BIT(1) +-/** Signals that the end of the current payload ends a frame */ ++/* Signals that the end of the current payload ends a frame */ + #define MMAL_BUFFER_HEADER_FLAG_FRAME_END BIT(2) +-/** Signals that the current payload contains only complete frames (>1) */ ++/* Signals that the current payload contains only complete frames (>1) */ + #define MMAL_BUFFER_HEADER_FLAG_FRAME \ + (MMAL_BUFFER_HEADER_FLAG_FRAME_START|MMAL_BUFFER_HEADER_FLAG_FRAME_END) +-/** Signals that the current payload is a keyframe (i.e. self decodable) */ ++/* Signals that the current payload is a keyframe (i.e. self decodable) */ + #define MMAL_BUFFER_HEADER_FLAG_KEYFRAME BIT(3) +-/** Signals a discontinuity in the stream of data (e.g. after a seek). ++/* ++ * Signals a discontinuity in the stream of data (e.g. after a seek). + * Can be used for instance by a decoder to reset its state + */ + #define MMAL_BUFFER_HEADER_FLAG_DISCONTINUITY BIT(4) +-/** Signals a buffer containing some kind of config data for the component ++/* ++ * Signals a buffer containing some kind of config data for the component + * (e.g. codec config data) + */ + #define MMAL_BUFFER_HEADER_FLAG_CONFIG BIT(5) +-/** Signals an encrypted payload */ ++/* Signals an encrypted payload */ + #define MMAL_BUFFER_HEADER_FLAG_ENCRYPTED BIT(6) +-/** Signals a buffer containing side information */ ++/* Signals a buffer containing side information */ + #define MMAL_BUFFER_HEADER_FLAG_CODECSIDEINFO BIT(7) +-/** Signals a buffer which is the snapshot/postview image from a stills ++/* ++ * Signals a buffer which is the snapshot/postview image from a stills + * capture + */ + #define MMAL_BUFFER_HEADER_FLAGS_SNAPSHOT BIT(8) +-/** Signals a buffer which contains data known to be corrupted */ ++/* Signals a buffer which contains data known to be corrupted */ + #define MMAL_BUFFER_HEADER_FLAG_CORRUPTED BIT(9) +-/** Signals that a buffer failed to be transmitted */ ++/* Signals that a buffer failed to be transmitted */ + #define MMAL_BUFFER_HEADER_FLAG_TRANSMISSION_FAILED BIT(10) + + struct mmal_driver_buffer { +@@ -255,8 +259,8 @@ struct mmal_driver_buffer { + + /* buffer header */ + struct mmal_buffer_header { +- u32 next; /* next header */ +- u32 priv; /* framework private data */ ++ u32 next; /* next header */ ++ u32 priv; /* framework private data */ + u32 cmd; + u32 data; + u32 alloc_size; +@@ -281,7 +285,8 @@ struct mmal_buffer_header_type_specific + }; + + struct mmal_msg_buffer_from_host { +- /* The front 32 bytes of the buffer header are copied ++ /* ++ *The front 32 bytes of the buffer header are copied + * back to us in the reply to allow for context. This + * area is used to store two mmal_driver_buffer structures to + * allow for multiple concurrent service users. +@@ -296,7 +301,7 @@ struct mmal_msg_buffer_from_host { + s32 is_zero_copy; + s32 has_reference; + +- /** allows short data to be xfered in control message */ ++ /* allows short data to be xfered in control message */ + u32 payload_in_message; + u8 short_data[MMAL_VC_SHORT_DATA]; + }; +@@ -306,10 +311,10 @@ struct mmal_msg_buffer_from_host { + #define MMAL_WORKER_PORT_PARAMETER_SPACE 96 + + struct mmal_msg_port_parameter_set { +- u32 component_handle; /* component */ +- u32 port_handle; /* port */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ ++ u32 component_handle; /* component */ ++ u32 port_handle; /* port */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ + uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; + }; + +@@ -322,16 +327,16 @@ struct mmal_msg_port_parameter_set_reply + /* port parameter getting */ + + struct mmal_msg_port_parameter_get { +- u32 component_handle; /* component */ +- u32 port_handle; /* port */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ ++ u32 component_handle; /* component */ ++ u32 port_handle; /* port */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ + }; + + struct mmal_msg_port_parameter_get_reply { +- u32 status; /* Status of mmal_port_parameter_get call */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ ++ u32 status; /* Status of mmal_port_parameter_get call */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ + uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; + }; + +@@ -339,7 +344,7 @@ struct mmal_msg_port_parameter_get_reply + #define MMAL_WORKER_EVENT_SPACE 256 + + struct mmal_msg_event_to_host { +- u32 client_component; /* component context */ ++ u32 client_component; /* component context */ + + u32 port_type; + u32 port_num; diff --git a/target/linux/brcm2708/patches-4.19/950-0245-staging-bcm2835-camera-Fix-spacing-around-operators.patch b/target/linux/brcm2708/patches-4.19/950-0245-staging-bcm2835-camera-Fix-spacing-around-operators.patch new file mode 100644 index 000000000..4d9f29655 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0245-staging-bcm2835-camera-Fix-spacing-around-operators.patch @@ -0,0 +1,102 @@ +From 587b76ecb097da6d7d386a0c228230d9175bc1e4 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 14:13:03 +0000 +Subject: [PATCH 245/703] staging: bcm2835-camera: Fix spacing around operators + +Fix checkpatch warnings over spaces around operators. +Many were around operations that can be replaced with the +BIT(x) macro, so replace with that where appropriate. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/controls.c | 32 +++++++++---------- + .../vc04_services/bcm2835-camera/mmal-msg.h | 3 +- + .../bcm2835-camera/mmal-parameters.h | 12 +++---- + 3 files changed, 24 insertions(+), 23 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -1123,10 +1123,10 @@ static const struct bm2835_mmal_v4l2_ctr + { + V4L2_CID_MPEG_VIDEO_H264_PROFILE, + MMAL_CONTROL_TYPE_STD_MENU, +- ~((1<1) */ + #define MMAL_BUFFER_HEADER_FLAG_FRAME \ +- (MMAL_BUFFER_HEADER_FLAG_FRAME_START|MMAL_BUFFER_HEADER_FLAG_FRAME_END) ++ (MMAL_BUFFER_HEADER_FLAG_FRAME_START | \ ++ MMAL_BUFFER_HEADER_FLAG_FRAME_END) + /* Signals that the current payload is a keyframe (i.e. self decodable) */ + #define MMAL_BUFFER_HEADER_FLAG_KEYFRAME BIT(3) + /* +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h +@@ -23,17 +23,17 @@ + #define __MMAL_PARAMETERS_H + + /** Common parameter ID group, used with many types of component. */ +-#define MMAL_PARAMETER_GROUP_COMMON (0<<16) ++#define MMAL_PARAMETER_GROUP_COMMON (0 << 16) + /** Camera-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CAMERA (1<<16) ++#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16) + /** Video-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_VIDEO (2<<16) ++#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16) + /** Audio-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_AUDIO (3<<16) ++#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16) + /** Clock-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CLOCK (4<<16) ++#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16) + /** Miracast-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_MIRACAST (5<<16) ++#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16) + + /* Common parameters */ + enum mmal_parameter_common_type { diff --git a/target/linux/brcm2708/patches-4.19/950-0246-staging-bcm2835-camera-Reduce-length-of-enum-names.patch b/target/linux/brcm2708/patches-4.19/950-0246-staging-bcm2835-camera-Reduce-length-of-enum-names.patch new file mode 100644 index 000000000..033086e56 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0246-staging-bcm2835-camera-Reduce-length-of-enum-names.patch @@ -0,0 +1,774 @@ +From 12692997f0508b8c3c31c23f8ab6983380888f5e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:23:35 +0000 +Subject: [PATCH 246/703] staging: bcm2835-camera: Reduce length of enum names + +We have numerous lines over 80 chars, or oddly split. Many +of these are due to using long enum names such as +MMAL_COMPONENT_CAMERA. +Reduce the length of these enum names. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 165 +++++++++--------- + .../bcm2835-camera/bcm2835-camera.h | 20 +-- + .../vc04_services/bcm2835-camera/controls.c | 47 +++-- + 3 files changed, 114 insertions(+), 118 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -80,7 +80,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_I420, + .depth = 12, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 1, + .remove_padding = 1, + }, { +@@ -89,7 +89,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_YUYV, + .depth = 16, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 2, + .remove_padding = 0, + }, { +@@ -98,7 +98,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_RGB24, + .depth = 24, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 3, + .remove_padding = 0, + }, { +@@ -107,7 +107,7 @@ static struct mmal_fmt formats[] = { + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal = MMAL_ENCODING_JPEG, + .depth = 8, +- .mmal_component = MMAL_COMPONENT_IMAGE_ENCODE, ++ .mmal_component = COMP_IMAGE_ENCODE, + .ybbp = 0, + .remove_padding = 0, + }, { +@@ -116,7 +116,7 @@ static struct mmal_fmt formats[] = { + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal = MMAL_ENCODING_H264, + .depth = 8, +- .mmal_component = MMAL_COMPONENT_VIDEO_ENCODE, ++ .mmal_component = COMP_VIDEO_ENCODE, + .ybbp = 0, + .remove_padding = 0, + }, { +@@ -125,7 +125,7 @@ static struct mmal_fmt formats[] = { + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal = MMAL_ENCODING_MJPEG, + .depth = 8, +- .mmal_component = MMAL_COMPONENT_VIDEO_ENCODE, ++ .mmal_component = COMP_VIDEO_ENCODE, + .ybbp = 0, + .remove_padding = 0, + }, { +@@ -134,7 +134,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_YVYU, + .depth = 16, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 2, + .remove_padding = 0, + }, { +@@ -143,7 +143,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_VYUY, + .depth = 16, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 2, + .remove_padding = 0, + }, { +@@ -152,7 +152,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_UYVY, + .depth = 16, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 2, + .remove_padding = 0, + }, { +@@ -161,7 +161,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_NV12, + .depth = 12, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 1, + .remove_padding = 1, + }, { +@@ -170,7 +170,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_BGR24, + .depth = 24, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 3, + .remove_padding = 0, + }, { +@@ -179,7 +179,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_YV12, + .depth = 12, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 1, + .remove_padding = 1, + }, { +@@ -188,7 +188,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_NV21, + .depth = 12, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 1, + .remove_padding = 1, + }, { +@@ -197,7 +197,7 @@ static struct mmal_fmt formats[] = { + .flags = 0, + .mmal = MMAL_ENCODING_BGRA, + .depth = 32, +- .mmal_component = MMAL_COMPONENT_CAMERA, ++ .mmal_component = COMP_CAMERA, + .ybbp = 4, + .remove_padding = 0, + }, +@@ -314,7 +314,7 @@ static inline bool is_capturing(struct b + { + return dev->capture.camera_port == + &dev-> +- component[MMAL_COMPONENT_CAMERA]->output[MMAL_CAMERA_PORT_CAPTURE]; ++ component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; + } + + static void buffer_cb(struct vchiq_mmal_instance *instance, +@@ -436,7 +436,7 @@ static int enable_camera(struct bm2835_m + if (!dev->camera_use_count) { + ret = vchiq_mmal_port_parameter_set( + dev->instance, +- &dev->component[MMAL_COMPONENT_CAMERA]->control, ++ &dev->component[COMP_CAMERA]->control, + MMAL_PARAMETER_CAMERA_NUM, &dev->camera_num, + sizeof(dev->camera_num)); + if (ret < 0) { +@@ -447,7 +447,7 @@ static int enable_camera(struct bm2835_m + + ret = vchiq_mmal_component_enable( + dev->instance, +- dev->component[MMAL_COMPONENT_CAMERA]); ++ dev->component[COMP_CAMERA]); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, + "Failed enabling camera, ret %d\n", ret); +@@ -479,7 +479,7 @@ static int disable_camera(struct bm2835_ + ret = + vchiq_mmal_component_disable( + dev->instance, +- dev->component[MMAL_COMPONENT_CAMERA]); ++ dev->component[COMP_CAMERA]); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, + "Failed disabling camera, ret %d\n", ret); +@@ -487,7 +487,7 @@ static int disable_camera(struct bm2835_ + } + vchiq_mmal_port_parameter_set( + dev->instance, +- &dev->component[MMAL_COMPONENT_CAMERA]->control, ++ &dev->component[COMP_CAMERA]->control, + MMAL_PARAMETER_CAMERA_NUM, &i, + sizeof(i)); + } +@@ -539,7 +539,7 @@ static int start_streaming(struct vb2_qu + /* if the preview is not already running, wait for a few frames for AGC + * to settle down. + */ +- if (!dev->component[MMAL_COMPONENT_PREVIEW]->enabled) ++ if (!dev->component[COMP_PREVIEW]->enabled) + msleep(300); + + /* enable the connection from camera to encoder (if applicable) */ +@@ -762,9 +762,9 @@ static int vidioc_s_fmt_vid_overlay(stru + vidioc_try_fmt_vid_overlay(file, priv, f); + + dev->overlay = f->fmt.win; +- if (dev->component[MMAL_COMPONENT_PREVIEW]->enabled) { ++ if (dev->component[COMP_PREVIEW]->enabled) { + set_overlay_params(dev, +- &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]); ++ &dev->component[COMP_PREVIEW]->input[0]); + } + + return 0; +@@ -777,13 +777,13 @@ static int vidioc_overlay(struct file *f + struct vchiq_mmal_port *src; + struct vchiq_mmal_port *dst; + +- if ((on && dev->component[MMAL_COMPONENT_PREVIEW]->enabled) || +- (!on && !dev->component[MMAL_COMPONENT_PREVIEW]->enabled)) ++ if ((on && dev->component[COMP_PREVIEW]->enabled) || ++ (!on && !dev->component[COMP_PREVIEW]->enabled)) + return 0; /* already in requested state */ + + src = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_PREVIEW]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_PREVIEW]; + + if (!on) { + /* disconnect preview ports and disable component */ +@@ -795,14 +795,14 @@ static int vidioc_overlay(struct file *f + if (ret >= 0) + ret = vchiq_mmal_component_disable( + dev->instance, +- dev->component[MMAL_COMPONENT_PREVIEW]); ++ dev->component[COMP_PREVIEW]); + + disable_camera(dev); + return ret; + } + + /* set preview port format and connect it to output */ +- dst = &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]; ++ dst = &dev->component[COMP_PREVIEW]->input[0]; + + ret = vchiq_mmal_port_set_format(dev->instance, src); + if (ret < 0) +@@ -819,7 +819,7 @@ static int vidioc_overlay(struct file *f + + ret = vchiq_mmal_component_enable( + dev->instance, +- dev->component[MMAL_COMPONENT_PREVIEW]); ++ dev->component[COMP_PREVIEW]); + if (ret < 0) + return ret; + +@@ -840,8 +840,8 @@ static int vidioc_g_fbuf(struct file *fi + */ + struct bm2835_mmal_dev *dev = video_drvdata(file); + struct vchiq_mmal_port *preview_port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_PREVIEW]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_PREVIEW]; + + a->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | + V4L2_FBUF_CAP_GLOBAL_ALPHA; +@@ -1044,31 +1044,31 @@ static int mmal_setup_components(struct + } + /* format dependent port setup */ + switch (mfmt->mmal_component) { +- case MMAL_COMPONENT_CAMERA: ++ case COMP_CAMERA: + /* Make a further decision on port based on resolution */ + if (f->fmt.pix.width <= max_video_width + && f->fmt.pix.height <= max_video_height) + camera_port = port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_VIDEO]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_VIDEO]; + else + camera_port = port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_CAPTURE]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_CAPTURE]; + break; +- case MMAL_COMPONENT_IMAGE_ENCODE: +- encode_component = dev->component[MMAL_COMPONENT_IMAGE_ENCODE]; +- port = &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->output[0]; ++ case COMP_IMAGE_ENCODE: ++ encode_component = dev->component[COMP_IMAGE_ENCODE]; ++ port = &dev->component[COMP_IMAGE_ENCODE]->output[0]; + camera_port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_CAPTURE]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_CAPTURE]; + break; +- case MMAL_COMPONENT_VIDEO_ENCODE: +- encode_component = dev->component[MMAL_COMPONENT_VIDEO_ENCODE]; +- port = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; ++ case COMP_VIDEO_ENCODE: ++ encode_component = dev->component[COMP_VIDEO_ENCODE]; ++ port = &dev->component[COMP_VIDEO_ENCODE]->output[0]; + camera_port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_VIDEO]; ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_VIDEO]; + break; + default: + break; +@@ -1110,13 +1110,12 @@ static int mmal_setup_components(struct + + if (!ret + && camera_port == +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_VIDEO]) { ++ &dev->component[COMP_CAMERA]-> ++ output[CAM_PORT_VIDEO]) { + bool overlay_enabled = +- !!dev->component[MMAL_COMPONENT_PREVIEW]->enabled; ++ !!dev->component[COMP_PREVIEW]->enabled; + struct vchiq_mmal_port *preview_port = +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_PREVIEW]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_PREVIEW]; + /* Preview and encode ports need to match on resolution */ + if (overlay_enabled) { + /* Need to disable the overlay before we can update +@@ -1147,7 +1146,7 @@ static int mmal_setup_components(struct + ret = vchiq_mmal_port_connect_tunnel( + dev->instance, + preview_port, +- &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]); ++ &dev->component[COMP_PREVIEW]->input[0]); + if (!ret) + ret = vchiq_mmal_port_enable(dev->instance, + preview_port, +@@ -1201,11 +1200,11 @@ static int mmal_setup_components(struct + port->format.encoding_variant = 0; + /* Set any encoding specific parameters */ + switch (mfmt->mmal_component) { +- case MMAL_COMPONENT_VIDEO_ENCODE: ++ case COMP_VIDEO_ENCODE: + port->format.bitrate = + dev->capture.encode_bitrate; + break; +- case MMAL_COMPONENT_IMAGE_ENCODE: ++ case COMP_IMAGE_ENCODE: + /* Could set EXIF parameters here */ + break; + default: +@@ -1580,14 +1579,14 @@ static int mmal_init(struct bm2835_mmal_ + + /* get the camera component ready */ + ret = vchiq_mmal_component_init(dev->instance, "ril.camera", +- &dev->component[MMAL_COMPONENT_CAMERA]); ++ &dev->component[COMP_CAMERA]); + if (ret < 0) + goto unreg_mmal; + +- camera = dev->component[MMAL_COMPONENT_CAMERA]; +- if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { ++ camera = dev->component[COMP_CAMERA]; ++ if (camera->outputs < CAM_PORT_COUNT) { + v4l2_err(&dev->v4l2_dev, "%s: too few camera outputs %d needed %d\n", +- __func__, camera->outputs, MMAL_CAMERA_PORT_COUNT); ++ __func__, camera->outputs, CAM_PORT_COUNT); + ret = -EINVAL; + goto unreg_camera; + } +@@ -1609,7 +1608,7 @@ static int mmal_init(struct bm2835_mmal_ + dev->rgb_bgr_swapped = true; + param_size = sizeof(supported_encodings); + ret = vchiq_mmal_port_parameter_get(dev->instance, +- &camera->output[MMAL_CAMERA_PORT_CAPTURE], ++ &camera->output[CAM_PORT_CAPTURE], + MMAL_PARAMETER_SUPPORTED_ENCODINGS, + &supported_encodings, + ¶m_size); +@@ -1630,7 +1629,7 @@ static int mmal_init(struct bm2835_mmal_ + } + } + } +- format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format; ++ format = &camera->output[CAM_PORT_PREVIEW].format; + + format->encoding = MMAL_ENCODING_OPAQUE; + format->encoding_variant = MMAL_ENCODING_I420; +@@ -1644,7 +1643,7 @@ static int mmal_init(struct bm2835_mmal_ + format->es->video.frame_rate.num = 0; /* Rely on fps_range */ + format->es->video.frame_rate.den = 1; + +- format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format; ++ format = &camera->output[CAM_PORT_VIDEO].format; + + format->encoding = MMAL_ENCODING_OPAQUE; + format->encoding_variant = MMAL_ENCODING_I420; +@@ -1658,7 +1657,7 @@ static int mmal_init(struct bm2835_mmal_ + format->es->video.frame_rate.num = 0; /* Rely on fps_range */ + format->es->video.frame_rate.den = 1; + +- format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format; ++ format = &camera->output[CAM_PORT_CAPTURE].format; + + format->encoding = MMAL_ENCODING_OPAQUE; + +@@ -1682,28 +1681,28 @@ static int mmal_init(struct bm2835_mmal_ + /* get the preview component ready */ + ret = vchiq_mmal_component_init( + dev->instance, "ril.video_render", +- &dev->component[MMAL_COMPONENT_PREVIEW]); ++ &dev->component[COMP_PREVIEW]); + if (ret < 0) + goto unreg_camera; + +- if (dev->component[MMAL_COMPONENT_PREVIEW]->inputs < 1) { ++ if (dev->component[COMP_PREVIEW]->inputs < 1) { + ret = -EINVAL; + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", +- __func__, dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); ++ __func__, dev->component[COMP_PREVIEW]->inputs, 1); + goto unreg_preview; + } + + /* get the image encoder component ready */ + ret = vchiq_mmal_component_init( + dev->instance, "ril.image_encode", +- &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]); ++ &dev->component[COMP_IMAGE_ENCODE]); + if (ret < 0) + goto unreg_preview; + +- if (dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs < 1) { ++ if (dev->component[COMP_IMAGE_ENCODE]->inputs < 1) { + ret = -EINVAL; + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", +- __func__, dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, ++ __func__, dev->component[COMP_IMAGE_ENCODE]->inputs, + 1); + goto unreg_image_encoder; + } +@@ -1711,21 +1710,21 @@ static int mmal_init(struct bm2835_mmal_ + /* get the video encoder component ready */ + ret = vchiq_mmal_component_init(dev->instance, "ril.video_encode", + &dev-> +- component[MMAL_COMPONENT_VIDEO_ENCODE]); ++ component[COMP_VIDEO_ENCODE]); + if (ret < 0) + goto unreg_image_encoder; + +- if (dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs < 1) { ++ if (dev->component[COMP_VIDEO_ENCODE]->inputs < 1) { + ret = -EINVAL; + v4l2_err(&dev->v4l2_dev, "%s: too few input ports %d needed %d\n", +- __func__, dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, ++ __func__, dev->component[COMP_VIDEO_ENCODE]->inputs, + 1); + goto unreg_vid_encoder; + } + + { + struct vchiq_mmal_port *encoder_port = +- &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; ++ &dev->component[COMP_VIDEO_ENCODE]->output[0]; + encoder_port->format.encoding = MMAL_ENCODING_H264; + ret = vchiq_mmal_port_set_format(dev->instance, + encoder_port); +@@ -1736,12 +1735,12 @@ static int mmal_init(struct bm2835_mmal_ + + vchiq_mmal_port_parameter_set( + dev->instance, +- &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->control, ++ &dev->component[COMP_VIDEO_ENCODE]->control, + MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT, + &enable, sizeof(enable)); + + vchiq_mmal_port_parameter_set(dev->instance, +- &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->control, ++ &dev->component[COMP_VIDEO_ENCODE]->control, + MMAL_PARAMETER_MINIMISE_FRAGMENTATION, + &enable, + sizeof(enable)); +@@ -1759,23 +1758,23 @@ unreg_vid_encoder: + pr_err("Cleanup: Destroy video encoder\n"); + vchiq_mmal_component_finalise( + dev->instance, +- dev->component[MMAL_COMPONENT_VIDEO_ENCODE]); ++ dev->component[COMP_VIDEO_ENCODE]); + + unreg_image_encoder: + pr_err("Cleanup: Destroy image encoder\n"); + vchiq_mmal_component_finalise( + dev->instance, +- dev->component[MMAL_COMPONENT_IMAGE_ENCODE]); ++ dev->component[COMP_IMAGE_ENCODE]); + + unreg_preview: + pr_err("Cleanup: Destroy video render\n"); + vchiq_mmal_component_finalise(dev->instance, +- dev->component[MMAL_COMPONENT_PREVIEW]); ++ dev->component[COMP_PREVIEW]); + + unreg_camera: + pr_err("Cleanup: Destroy camera\n"); + vchiq_mmal_component_finalise(dev->instance, +- dev->component[MMAL_COMPONENT_CAMERA]); ++ dev->component[COMP_CAMERA]); + + unreg_mmal: + vchiq_mmal_finalise(dev->instance); +@@ -1831,21 +1830,21 @@ static void bcm2835_cleanup_instance(str + dev->capture.encode_component); + } + vchiq_mmal_component_disable(dev->instance, +- dev->component[MMAL_COMPONENT_CAMERA]); ++ dev->component[COMP_CAMERA]); + + vchiq_mmal_component_finalise(dev->instance, + dev-> +- component[MMAL_COMPONENT_VIDEO_ENCODE]); ++ component[COMP_VIDEO_ENCODE]); + + vchiq_mmal_component_finalise(dev->instance, + dev-> +- component[MMAL_COMPONENT_IMAGE_ENCODE]); ++ component[COMP_IMAGE_ENCODE]); + + vchiq_mmal_component_finalise(dev->instance, +- dev->component[MMAL_COMPONENT_PREVIEW]); ++ dev->component[COMP_PREVIEW]); + + vchiq_mmal_component_finalise(dev->instance, +- dev->component[MMAL_COMPONENT_CAMERA]); ++ dev->component[COMP_CAMERA]); + + v4l2_ctrl_handler_free(&dev->ctrl_handler); + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +@@ -16,18 +16,18 @@ + #define V4L2_CTRL_COUNT 29 /* number of v4l controls */ + + enum { +- MMAL_COMPONENT_CAMERA = 0, +- MMAL_COMPONENT_PREVIEW, +- MMAL_COMPONENT_IMAGE_ENCODE, +- MMAL_COMPONENT_VIDEO_ENCODE, +- MMAL_COMPONENT_COUNT ++ COMP_CAMERA = 0, ++ COMP_PREVIEW, ++ COMP_IMAGE_ENCODE, ++ COMP_VIDEO_ENCODE, ++ COMP_COUNT + }; + + enum { +- MMAL_CAMERA_PORT_PREVIEW = 0, +- MMAL_CAMERA_PORT_VIDEO, +- MMAL_CAMERA_PORT_CAPTURE, +- MMAL_CAMERA_PORT_COUNT ++ CAM_PORT_PREVIEW = 0, ++ CAM_PORT_VIDEO, ++ CAM_PORT_CAPTURE, ++ CAM_PORT_COUNT + }; + + #define PREVIEW_LAYER 2 +@@ -61,7 +61,7 @@ struct bm2835_mmal_dev { + + /* allocated mmal instance and components */ + struct vchiq_mmal_instance *instance; +- struct vchiq_mmal_component *component[MMAL_COMPONENT_COUNT]; ++ struct vchiq_mmal_component *component[COMP_COUNT]; + int camera_use_count; + + struct v4l2_window overlay; +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -176,7 +176,7 @@ static int ctrl_set_rational(struct bm28 + struct mmal_parameter_rational rational_value; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + rational_value.num = ctrl->val; + rational_value.den = 100; +@@ -194,7 +194,7 @@ static int ctrl_set_value(struct bm2835_ + u32 u32_value; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + u32_value = ctrl->val; + +@@ -219,7 +219,7 @@ static int ctrl_set_iso(struct bm2835_mm + dev->manual_iso_enabled = + (ctrl->val == V4L2_ISO_SENSITIVITY_MANUAL); + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + if (dev->manual_iso_enabled) + u32_value = dev->iso; +@@ -238,7 +238,7 @@ static int ctrl_set_value_ev(struct bm28 + s32 s32_value; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + s32_value = (ctrl->val - 12) * 2; /* Convert from index to 1/6ths */ + +@@ -255,7 +255,7 @@ static int ctrl_set_rotate(struct bm2835 + u32 u32_value; + struct vchiq_mmal_component *camera; + +- camera = dev->component[MMAL_COMPONENT_CAMERA]; ++ camera = dev->component[COMP_CAMERA]; + + u32_value = ((ctrl->val % 360) / 90) * 90; + +@@ -291,7 +291,7 @@ static int ctrl_set_flip(struct bm2835_m + else + dev->vflip = ctrl->val; + +- camera = dev->component[MMAL_COMPONENT_CAMERA]; ++ camera = dev->component[COMP_CAMERA]; + + if (dev->hflip && dev->vflip) + u32_value = MMAL_PARAM_MIRROR_BOTH; +@@ -330,7 +330,7 @@ static int ctrl_set_exposure(struct bm28 + struct vchiq_mmal_port *control; + int ret = 0; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + if (mmal_ctrl->mmal_id == MMAL_PARAMETER_SHUTTER_SPEED) { + /* V4L2 is in 100usec increments. +@@ -405,7 +405,7 @@ static int ctrl_set_metering_mode(struct + struct vchiq_mmal_port *control; + u32 u32_value = dev->metering_mode; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + return vchiq_mmal_port_parameter_set(dev->instance, control, + mmal_ctrl->mmal_id, +@@ -421,7 +421,7 @@ static int ctrl_set_flicker_avoidance(st + u32 u32_value; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + switch (ctrl->val) { + case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED: +@@ -450,7 +450,7 @@ static int ctrl_set_awb_mode(struct bm28 + u32 u32_value; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + switch (ctrl->val) { + case V4L2_WHITE_BALANCE_MANUAL: +@@ -506,7 +506,7 @@ static int ctrl_set_awb_gains(struct bm2 + struct vchiq_mmal_port *control; + struct mmal_parameter_awbgains gains; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + if (ctrl->id == V4L2_CID_RED_BALANCE) + dev->red_gain = ctrl->val; +@@ -554,7 +554,7 @@ static int ctrl_set_image_effect(struct + v4l2_to_mmal_effects_values[i].v; + } + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + ret = vchiq_mmal_port_parameter_set( + dev->instance, control, +@@ -587,7 +587,7 @@ static int ctrl_set_colfx(struct bm2835_ + int ret = -EINVAL; + struct vchiq_mmal_port *control; + +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + dev->colourfx.enable = (ctrl->val & 0xff00) >> 8; + dev->colourfx.enable = ctrl->val & 0xff; +@@ -613,7 +613,7 @@ static int ctrl_set_bitrate(struct bm283 + + dev->capture.encode_bitrate = ctrl->val; + +- encoder_out = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; ++ encoder_out = &dev->component[COMP_VIDEO_ENCODE]->output[0]; + + ret = vchiq_mmal_port_parameter_set(dev->instance, encoder_out, + mmal_ctrl->mmal_id, +@@ -629,7 +629,7 @@ static int ctrl_set_bitrate_mode(struct + u32 bitrate_mode; + struct vchiq_mmal_port *encoder_out; + +- encoder_out = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; ++ encoder_out = &dev->component[COMP_VIDEO_ENCODE]->output[0]; + + dev->capture.encode_bitrate_mode = ctrl->val; + switch (ctrl->val) { +@@ -656,7 +656,7 @@ static int ctrl_set_image_encode_output( + u32 u32_value; + struct vchiq_mmal_port *jpeg_out; + +- jpeg_out = &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->output[0]; ++ jpeg_out = &dev->component[COMP_IMAGE_ENCODE]->output[0]; + + u32_value = ctrl->val; + +@@ -672,7 +672,7 @@ static int ctrl_set_video_encode_param_o + u32 u32_value; + struct vchiq_mmal_port *vid_enc_ctl; + +- vid_enc_ctl = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; ++ vid_enc_ctl = &dev->component[COMP_VIDEO_ENCODE]->output[0]; + + u32_value = ctrl->val; + +@@ -785,7 +785,7 @@ static int ctrl_set_video_encode_profile + } + + ret = vchiq_mmal_port_parameter_set(dev->instance, +- &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0], ++ &dev->component[COMP_VIDEO_ENCODE]->output[0], + mmal_ctrl->mmal_id, + ¶m, sizeof(param)); + } +@@ -803,7 +803,7 @@ static int ctrl_set_scene_mode(struct bm + v4l2_dbg(0, bcm2835_v4l2_debug, &dev->v4l2_dev, + "scene mode selected %d, was %d\n", ctrl->val, + dev->scene_mode); +- control = &dev->component[MMAL_COMPONENT_CAMERA]->control; ++ control = &dev->component[COMP_CAMERA]->control; + + if (ctrl->val == dev->scene_mode) + return 0; +@@ -1221,18 +1221,15 @@ int set_framerate_params(struct bm2835_m + fps_range.fps_high.den); + + ret = vchiq_mmal_port_parameter_set(dev->instance, +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_PREVIEW], ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_PREVIEW], + MMAL_PARAMETER_FPS_RANGE, + &fps_range, sizeof(fps_range)); + ret += vchiq_mmal_port_parameter_set(dev->instance, +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_VIDEO], ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO], + MMAL_PARAMETER_FPS_RANGE, + &fps_range, sizeof(fps_range)); + ret += vchiq_mmal_port_parameter_set(dev->instance, +- &dev->component[MMAL_COMPONENT_CAMERA]-> +- output[MMAL_CAMERA_PORT_CAPTURE], ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE], + MMAL_PARAMETER_FPS_RANGE, + &fps_range, sizeof(fps_range)); + if (ret) diff --git a/target/linux/brcm2708/patches-4.19/950-0247-staging-bcm2835-camera-Fix-multiple-line-dereference.patch b/target/linux/brcm2708/patches-4.19/950-0247-staging-bcm2835-camera-Fix-multiple-line-dereference.patch new file mode 100644 index 000000000..217cce879 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0247-staging-bcm2835-camera-Fix-multiple-line-dereference.patch @@ -0,0 +1,133 @@ +From 169d3b165889c1531227e2bb1e5df0f10ca9c83a Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:28:07 +0000 +Subject: [PATCH 247/703] staging: bcm2835-camera: Fix multiple line + dereference errors + +Fix checkpatch errors "Avoid multiple line dereference" + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 41 +++++++------------ + 1 file changed, 14 insertions(+), 27 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -313,8 +313,7 @@ static void buffer_cleanup(struct vb2_bu + static inline bool is_capturing(struct bm2835_mmal_dev *dev) + { + return dev->capture.camera_port == +- &dev-> +- component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; + } + + static void buffer_cb(struct vchiq_mmal_instance *instance, +@@ -782,8 +781,7 @@ static int vidioc_overlay(struct file *f + return 0; /* already in requested state */ + + src = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_PREVIEW]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_PREVIEW]; + + if (!on) { + /* disconnect preview ports and disable component */ +@@ -840,8 +838,7 @@ static int vidioc_g_fbuf(struct file *fi + */ + struct bm2835_mmal_dev *dev = video_drvdata(file); + struct vchiq_mmal_port *preview_port = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_PREVIEW]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_PREVIEW]; + + a->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | + V4L2_FBUF_CAP_GLOBAL_ALPHA; +@@ -1033,8 +1030,7 @@ static int mmal_setup_components(struct + dev->capture.camera_port, NULL); + dev->capture.camera_port = NULL; + ret = vchiq_mmal_component_disable(dev->instance, +- dev->capture. +- encode_component); ++ dev->capture.encode_component); + if (ret) + v4l2_err(&dev->v4l2_dev, + "Failed to disable encode component %d\n", +@@ -1049,26 +1045,22 @@ static int mmal_setup_components(struct + if (f->fmt.pix.width <= max_video_width + && f->fmt.pix.height <= max_video_height) + camera_port = port = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_VIDEO]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]; + else + camera_port = port = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_CAPTURE]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; + break; + case COMP_IMAGE_ENCODE: + encode_component = dev->component[COMP_IMAGE_ENCODE]; + port = &dev->component[COMP_IMAGE_ENCODE]->output[0]; + camera_port = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_CAPTURE]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; + break; + case COMP_VIDEO_ENCODE: + encode_component = dev->component[COMP_VIDEO_ENCODE]; + port = &dev->component[COMP_VIDEO_ENCODE]->output[0]; + camera_port = +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_VIDEO]; ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]; + break; + default: + break; +@@ -1110,8 +1102,7 @@ static int mmal_setup_components(struct + + if (!ret + && camera_port == +- &dev->component[COMP_CAMERA]-> +- output[CAM_PORT_VIDEO]) { ++ &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]) { + bool overlay_enabled = + !!dev->component[COMP_PREVIEW]->enabled; + struct vchiq_mmal_port *preview_port = +@@ -1248,9 +1239,8 @@ static int mmal_setup_components(struct + port->current_buffer.size); + port->current_buffer.size = + (f->fmt.pix.sizeimage < +- (100 << 10)) +- ? (100 << 10) +- : f->fmt.pix.sizeimage; ++ (100 << 10)) ? ++ (100 << 10) : f->fmt.pix.sizeimage; + } + v4l2_dbg(1, bcm2835_v4l2_debug, + &dev->v4l2_dev, +@@ -1709,8 +1699,7 @@ static int mmal_init(struct bm2835_mmal_ + + /* get the video encoder component ready */ + ret = vchiq_mmal_component_init(dev->instance, "ril.video_encode", +- &dev-> +- component[COMP_VIDEO_ENCODE]); ++ &dev->component[COMP_VIDEO_ENCODE]); + if (ret < 0) + goto unreg_image_encoder; + +@@ -1833,12 +1822,10 @@ static void bcm2835_cleanup_instance(str + dev->component[COMP_CAMERA]); + + vchiq_mmal_component_finalise(dev->instance, +- dev-> +- component[COMP_VIDEO_ENCODE]); ++ dev->component[COMP_VIDEO_ENCODE]); + + vchiq_mmal_component_finalise(dev->instance, +- dev-> +- component[COMP_IMAGE_ENCODE]); ++ dev->component[COMP_IMAGE_ENCODE]); + + vchiq_mmal_component_finalise(dev->instance, + dev->component[COMP_PREVIEW]); diff --git a/target/linux/brcm2708/patches-4.19/950-0248-staging-bcm2835-camera-Fix-brace-style-issues.patch b/target/linux/brcm2708/patches-4.19/950-0248-staging-bcm2835-camera-Fix-brace-style-issues.patch new file mode 100644 index 000000000..4b0a49906 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0248-staging-bcm2835-camera-Fix-brace-style-issues.patch @@ -0,0 +1,56 @@ +From b9702c9018656a2145bf18ad997d59f03f606bee Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:37:11 +0000 +Subject: [PATCH 248/703] staging: bcm2835-camera: Fix brace style issues. + +Fix mismatched or missing brace issues flagged by checkpatch. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 3 ++- + drivers/staging/vc04_services/bcm2835-camera/controls.c | 3 ++- + drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c | 3 ++- + 3 files changed, 6 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -566,10 +566,11 @@ static int start_streaming(struct vb2_qu + + /* Flag to indicate just to rely on kernel timestamps */ + dev->capture.vc_start_timestamp = -1; +- } else ++ } else { + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Start time %lld size %d\n", + dev->capture.vc_start_timestamp, parameter_size); ++ } + + dev->capture.kernel_start_ts = ktime_get(); + dev->capture.last_timestamp = 0; +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -410,8 +410,9 @@ static int ctrl_set_metering_mode(struct + return vchiq_mmal_port_parameter_set(dev->instance, control, + mmal_ctrl->mmal_id, + &u32_value, sizeof(u32_value)); +- } else ++ } else { + return 0; ++ } + } + + static int ctrl_set_flicker_avoidance(struct bm2835_mmal_dev *dev, +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -1262,9 +1262,10 @@ static int port_parameter_get(struct vch + memcpy(value, &rmsg->u.port_parameter_get_reply.value, + *value_size); + *value_size = rmsg->u.port_parameter_get_reply.size; +- } else ++ } else { + memcpy(value, &rmsg->u.port_parameter_get_reply.value, + rmsg->u.port_parameter_get_reply.size); ++ } + + pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", __func__, + ret, port->component->handle, port->handle, parameter_id); diff --git a/target/linux/brcm2708/patches-4.19/950-0249-staging-bcm2835-camera-Fix-missing-lines-between-ite.patch b/target/linux/brcm2708/patches-4.19/950-0249-staging-bcm2835-camera-Fix-missing-lines-between-ite.patch new file mode 100644 index 000000000..9314b2d3a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0249-staging-bcm2835-camera-Fix-missing-lines-between-ite.patch @@ -0,0 +1,35 @@ +From 153f1bd423b29c9c5ea0ab23ca4c1beb272dab31 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:39:26 +0000 +Subject: [PATCH 249/703] staging: bcm2835-camera: Fix missing lines between + items + +Fix checkpatch errors for missing blank lines after variable +or structure declarations. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h | 1 + + drivers/staging/vc04_services/bcm2835-camera/controls.c | 1 + + 2 files changed, 2 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +@@ -130,6 +130,7 @@ int set_framerate_params(struct bm2835_m + (pix_fmt)->pixelformat, (pix_fmt)->bytesperline, \ + (pix_fmt)->sizeimage, (pix_fmt)->colorspace, (pix_fmt)->priv); \ + } ++ + #define v4l2_dump_win_format(level, debug, dev, win_fmt, desc) \ + { \ + v4l2_dbg(level, debug, dev, \ +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -53,6 +53,7 @@ static const s64 ev_bias_qmenu[] = { + static const s64 iso_qmenu[] = { + 0, 100000, 200000, 400000, 800000, + }; ++ + static const uint32_t iso_values[] = { + 0, 100, 200, 400, 800, + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0250-staging-bcm2835-camera-Fix-logical-continuation-spli.patch b/target/linux/brcm2708/patches-4.19/950-0250-staging-bcm2835-camera-Fix-logical-continuation-spli.patch new file mode 100644 index 000000000..a04ebef3b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0250-staging-bcm2835-camera-Fix-logical-continuation-spli.patch @@ -0,0 +1,49 @@ +From b628d79fb130da3cbae59b4aaa14fbaf599a5e7c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:48:54 +0000 +Subject: [PATCH 250/703] staging: bcm2835-camera: Fix logical continuation + splits + +Fix checkpatch errors for "Logical continuations should be +on the previous line". + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/bcm2835-camera.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -542,8 +542,8 @@ static int start_streaming(struct vb2_qu + msleep(300); + + /* enable the connection from camera to encoder (if applicable) */ +- if (dev->capture.camera_port != dev->capture.port +- && dev->capture.camera_port) { ++ if (dev->capture.camera_port != dev->capture.port && ++ dev->capture.camera_port) { + ret = vchiq_mmal_port_enable(dev->instance, + dev->capture.camera_port, NULL); + if (ret) { +@@ -1043,8 +1043,8 @@ static int mmal_setup_components(struct + switch (mfmt->mmal_component) { + case COMP_CAMERA: + /* Make a further decision on port based on resolution */ +- if (f->fmt.pix.width <= max_video_width +- && f->fmt.pix.height <= max_video_height) ++ if (f->fmt.pix.width <= max_video_width && ++ f->fmt.pix.height <= max_video_height) + camera_port = port = + &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]; + else +@@ -1101,8 +1101,8 @@ static int mmal_setup_components(struct + + ret = vchiq_mmal_port_set_format(dev->instance, camera_port); + +- if (!ret +- && camera_port == ++ if (!ret && ++ camera_port == + &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]) { + bool overlay_enabled = + !!dev->component[COMP_PREVIEW]->enabled; diff --git a/target/linux/brcm2708/patches-4.19/950-0251-staging-bcm2835-camera-Fix-open-parenthesis-alignmen.patch b/target/linux/brcm2708/patches-4.19/950-0251-staging-bcm2835-camera-Fix-open-parenthesis-alignmen.patch new file mode 100644 index 000000000..965261fd0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0251-staging-bcm2835-camera-Fix-open-parenthesis-alignmen.patch @@ -0,0 +1,137 @@ +From 1e5564239201bed6be0b57d50c6f95e8f3907512 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 21 Feb 2018 15:53:59 +0000 +Subject: [PATCH 251/703] staging: bcm2835-camera: Fix open parenthesis + alignment + +Fix checkpatch "Alignment should match open parenthesis" +errors. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 12 ++++----- + .../vc04_services/bcm2835-camera/controls.c | 25 ++++++++++++------- + .../vc04_services/bcm2835-camera/mmal-vchiq.c | 2 +- + .../vc04_services/bcm2835-camera/mmal-vchiq.h | 6 ++--- + 4 files changed, 25 insertions(+), 20 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -412,8 +412,7 @@ static void buffer_cb(struct vchiq_mmal_ + buf->vb.flags |= V4L2_BUF_FLAG_KEYFRAME; + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Buffer has ts %llu", +- dev->capture.last_timestamp); ++ "Buffer has ts %llu", dev->capture.last_timestamp); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); + + if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && +@@ -581,8 +580,8 @@ static int start_streaming(struct vb2_qu + vchiq_mmal_port_enable(dev->instance, dev->capture.port, buffer_cb); + if (ret) { + v4l2_err(&dev->v4l2_dev, +- "Failed to enable capture port - error %d. Disabling camera port again\n", +- ret); ++ "Failed to enable capture port - error %d. Disabling camera port again\n", ++ ret); + + vchiq_mmal_port_disable(dev->instance, + dev->capture.camera_port); +@@ -978,8 +977,7 @@ static int vidioc_try_fmt_vid_cap(struct + f->fmt.pix.bytesperline = + (f->fmt.pix.bytesperline + align_mask) & ~align_mask; + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Not removing padding, so bytes/line = %d, " +- "(align_mask %d)\n", ++ "Not removing padding, so bytes/line = %d, (align_mask %d)\n", + f->fmt.pix.bytesperline, align_mask); + } + +@@ -1325,7 +1323,7 @@ static int vidioc_s_fmt_vid_cap(struct f + } + + static int vidioc_enum_framesizes(struct file *file, void *fh, +- struct v4l2_frmsizeenum *fsize) ++ struct v4l2_frmsizeenum *fsize) + { + struct bm2835_mmal_dev *dev = video_drvdata(file); + static const struct v4l2_frmsize_stepwise sizes = { +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -1254,9 +1254,12 @@ int bm2835_mmal_init_controls(struct bm2 + + switch (ctrl->type) { + case MMAL_CONTROL_TYPE_STD: +- dev->ctrls[c] = v4l2_ctrl_new_std(hdl, +- &bm2835_mmal_ctrl_ops, ctrl->id, +- ctrl->min, ctrl->max, ctrl->step, ctrl->def); ++ dev->ctrls[c] = ++ v4l2_ctrl_new_std(hdl, ++ &bm2835_mmal_ctrl_ops, ++ ctrl->id, ctrl->min, ++ ctrl->max, ctrl->step, ++ ctrl->def); + break; + + case MMAL_CONTROL_TYPE_STD_MENU: +@@ -1280,16 +1283,20 @@ int bm2835_mmal_init_controls(struct bm2 + mask = ~mask; + } + +- dev->ctrls[c] = v4l2_ctrl_new_std_menu(hdl, +- &bm2835_mmal_ctrl_ops, ctrl->id, +- ctrl->max, mask, ctrl->def); ++ dev->ctrls[c] = ++ v4l2_ctrl_new_std_menu(hdl, ++ &bm2835_mmal_ctrl_ops, ++ ctrl->id, ctrl->max, ++ mask, ctrl->def); + break; + } + + case MMAL_CONTROL_TYPE_INT_MENU: +- dev->ctrls[c] = v4l2_ctrl_new_int_menu(hdl, +- &bm2835_mmal_ctrl_ops, ctrl->id, +- ctrl->max, ctrl->def, ctrl->imenu); ++ dev->ctrls[c] = ++ v4l2_ctrl_new_int_menu(hdl, ++ &bm2835_mmal_ctrl_ops, ++ ctrl->id, ctrl->max, ++ ctrl->def, ctrl->imenu); + break; + + case MMAL_CONTROL_TYPE_CLUSTER: +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -645,7 +645,7 @@ static int send_synchronous_mmal_msg(str + if (payload_len > + (MMAL_MSG_MAX_SIZE - sizeof(struct mmal_msg_header))) { + pr_err("payload length %d exceeds max:%d\n", payload_len, +- (int)(MMAL_MSG_MAX_SIZE - ++ (int)(MMAL_MSG_MAX_SIZE - + sizeof(struct mmal_msg_header))); + return -EINVAL; + } +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h +@@ -128,7 +128,7 @@ int vchiq_mmal_port_enable( + * disable a port will dequeue any pending buffers + */ + int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port); ++ struct vchiq_mmal_port *port); + + int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_port *port, +@@ -146,8 +146,8 @@ int vchiq_mmal_port_set_format(struct vc + struct vchiq_mmal_port *port); + + int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *src, +- struct vchiq_mmal_port *dst); ++ struct vchiq_mmal_port *src, ++ struct vchiq_mmal_port *dst); + + int vchiq_mmal_version(struct vchiq_mmal_instance *instance, + u32 *major_out, diff --git a/target/linux/brcm2708/patches-4.19/950-0252-staging-bcm2835_camera-Ensure-all-buffers-are-return.patch b/target/linux/brcm2708/patches-4.19/950-0252-staging-bcm2835_camera-Ensure-all-buffers-are-return.patch new file mode 100644 index 000000000..b5fbceba2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0252-staging-bcm2835_camera-Ensure-all-buffers-are-return.patch @@ -0,0 +1,95 @@ +From 754a5ed1aa42ce9d5be5f84a5a0888f850b15e00 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 28 Jun 2018 15:57:25 +0100 +Subject: [PATCH 252/703] staging: bcm2835_camera: Ensure all buffers are + returned on disable + +With the recent change to match MMAL and V4L2 buffers there +is a need to wait for all MMAL buffers to be returned during +stop_streaming. + +Fixes: 9384167 "staging: bcm2835-camera: Remove V4L2/MMAL buffer remapping" +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 22 ++++++++++++++----- + .../vc04_services/bcm2835-camera/mmal-vchiq.c | 4 ++++ + .../vc04_services/bcm2835-camera/mmal-vchiq.h | 3 +++ + 3 files changed, 23 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -607,6 +607,7 @@ static void stop_streaming(struct vb2_qu + int ret; + unsigned long timeout; + struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); ++ struct vchiq_mmal_port *port = dev->capture.port; + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", + __func__, dev); +@@ -630,12 +631,6 @@ static void stop_streaming(struct vb2_qu + &dev->capture.frame_count, + sizeof(dev->capture.frame_count)); + +- /* wait for last frame to complete */ +- timeout = wait_for_completion_timeout(&dev->capture.frame_cmplt, HZ); +- if (timeout == 0) +- v4l2_err(&dev->v4l2_dev, +- "timed out waiting for frame completion\n"); +- + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "disabling connection\n"); + +@@ -650,6 +645,21 @@ static void stop_streaming(struct vb2_qu + ret); + } + ++ /* wait for all buffers to be returned */ ++ while (atomic_read(&port->buffers_with_vpu)) { ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "%s: Waiting for buffers to be returned - %d outstanding\n", ++ __func__, atomic_read(&port->buffers_with_vpu)); ++ timeout = wait_for_completion_timeout(&dev->capture.frame_cmplt, ++ HZ); ++ if (timeout == 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: Timeout waiting for buffers to be returned - %d outstanding\n", ++ __func__, ++ atomic_read(&port->buffers_with_vpu)); ++ break; ++ } ++ } ++ + if (disable_camera(dev) < 0) + v4l2_err(&dev->v4l2_dev, "Failed to disable camera\n"); + } +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -246,6 +246,8 @@ static void buffer_work_cb(struct work_s + struct mmal_msg_context *msg_context = + container_of(work, struct mmal_msg_context, u.bulk.work); + ++ atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); ++ + msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, + msg_context->u.bulk.port, + msg_context->u.bulk.status, +@@ -389,6 +391,8 @@ buffer_from_host(struct vchiq_mmal_insta + INIT_WORK(&msg_context->u.bulk.buffer_to_host_work, + buffer_to_host_work_cb); + ++ atomic_inc(&port->buffers_with_vpu); ++ + /* prep the buffer from host message */ + memset(&m, 0xbc, sizeof(m)); /* just to make debug clearer */ + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h +@@ -72,6 +72,9 @@ struct vchiq_mmal_port { + struct list_head buffers; + /* lock to serialise adding and removing buffers from list */ + spinlock_t slock; ++ ++ /* Count of buffers the VPU has yet to return */ ++ atomic_t buffers_with_vpu; + /* callback on buffer completion */ + vchiq_mmal_buffer_cb buffer_cb; + /* callback context */ diff --git a/target/linux/brcm2708/patches-4.19/950-0253-staging-bcm2835-camera-Remove-check-of-the-number-of.patch b/target/linux/brcm2708/patches-4.19/950-0253-staging-bcm2835-camera-Remove-check-of-the-number-of.patch new file mode 100644 index 000000000..f916ae183 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0253-staging-bcm2835-camera-Remove-check-of-the-number-of.patch @@ -0,0 +1,39 @@ +From 98457a5263c83026cf1d451d44d8b028b8423b87 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 4 Jul 2018 17:01:15 +0100 +Subject: [PATCH 253/703] staging: bcm2835-camera: Remove check of the number + of buffers supplied + +Before 9384167 there was a need to ensure that there were sufficient +buffers supplied from the user to cover those being sent to the VPU +(always 1). +With 9384167 the buffers are linked 1:1 between MMAL and V4L2, +therefore there is no need for that check, and indeed it is wrong +as there is no need to submit all the buffers before starting streaming. + +Fixes: 9384167 "staging: bcm2835-camera: Remove V4L2/MMAL buffer remapping" + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/mmal-vchiq.c | 10 ---------- + 1 file changed, 10 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -1338,16 +1338,6 @@ static int port_enable(struct vchiq_mmal + if (port->enabled) + return 0; + +- /* ensure there are enough buffers queued to cover the buffer headers */ +- if (port->buffer_cb) { +- hdr_count = 0; +- list_for_each(buf_head, &port->buffers) { +- hdr_count++; +- } +- if (hdr_count < port->current_buffer.num) +- return -ENOSPC; +- } +- + ret = port_action_port(instance, port, + MMAL_MSG_PORT_ACTION_TYPE_ENABLE); + if (ret) diff --git a/target/linux/brcm2708/patches-4.19/950-0254-staging-bcm2835-camera-Handle-empty-EOS-buffers-whil.patch b/target/linux/brcm2708/patches-4.19/950-0254-staging-bcm2835-camera-Handle-empty-EOS-buffers-whil.patch new file mode 100644 index 000000000..81153c9ff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0254-staging-bcm2835-camera-Handle-empty-EOS-buffers-whil.patch @@ -0,0 +1,84 @@ +From 1da35962d95cdb8648cb85c4b6f3d3367be88601 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 5 Jul 2018 16:17:03 +0100 +Subject: [PATCH 254/703] staging: bcm2835-camera: Handle empty EOS buffers + whilst streaming + +The change to mapping V4L2 to MMAL buffers 1:1 didn't handle +the condition we get with raw pixel buffers (eg YUV and RGB) +direct from the camera's stills port. That sends the pixel buffer +and then an empty buffer with the EOS flag set. The EOS buffer +wasn't handled and returned an error up the stack. + +Handle the condition correctly by returning it to the component +if streaming, or returning with an error if stopping streaming. + +Fixes: 9384167 "staging: bcm2835-camera: Remove V4L2/MMAL buffer remapping" + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 21 +++++++++++-------- + .../vc04_services/bcm2835-camera/mmal-vchiq.c | 5 +++-- + 2 files changed, 15 insertions(+), 11 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -339,16 +339,13 @@ static void buffer_cb(struct vchiq_mmal_ + + if (length == 0) { + /* stream ended */ +- if (buf) { +- /* this should only ever happen if the port is +- * disabled and there are buffers still queued ++ if (dev->capture.frame_count) { ++ /* empty buffer whilst capturing - expected to be an ++ * EOS, so grab another frame + */ +- vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); +- pr_debug("Empty buffer"); +- } else if (dev->capture.frame_count) { +- /* grab another frame */ + if (is_capturing(dev)) { +- pr_debug("Grab another frame"); ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Grab another frame"); + vchiq_mmal_port_parameter_set( + instance, + dev->capture.camera_port, +@@ -356,8 +353,14 @@ static void buffer_cb(struct vchiq_mmal_ + &dev->capture.frame_count, + sizeof(dev->capture.frame_count)); + } ++ if (vchiq_mmal_submit_buffer(instance, port, buf)) ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Failed to return EOS buffer"); + } else { +- /* signal frame completion */ ++ /* stopping streaming. ++ * return buffer, and signal frame completion ++ */ ++ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); + complete(&dev->capture.frame_cmplt); + } + return; +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c +@@ -332,8 +332,6 @@ static int bulk_receive(struct vchiq_mma + + /* store length */ + msg_context->u.bulk.buffer_used = rd_len; +- msg_context->u.bulk.mmal_flags = +- msg->u.buffer_from_host.buffer_header.flags; + msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; + msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; + +@@ -461,6 +459,9 @@ static void buffer_to_host_cb(struct vch + return; + } + ++ msg_context->u.bulk.mmal_flags = ++ msg->u.buffer_from_host.buffer_header.flags; ++ + if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { + /* message reception had an error */ + pr_warn("error %d in reply\n", msg->h.status); diff --git a/target/linux/brcm2708/patches-4.19/950-0255-staging-bcm2835-camera-Set-sequence-number-correctly.patch b/target/linux/brcm2708/patches-4.19/950-0255-staging-bcm2835-camera-Set-sequence-number-correctly.patch new file mode 100644 index 000000000..c479a0eed --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0255-staging-bcm2835-camera-Set-sequence-number-correctly.patch @@ -0,0 +1,46 @@ +From 06ef8c73a0898576b90db697007bca999acad2fe Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 21 Jun 2018 17:02:14 +0100 +Subject: [PATCH 255/703] staging: bcm2835-camera: Set sequence number + correctly + +Set the sequence number in vb2_v4l2_buffer mainly so the +latest v4l2-ctl reports the frame rate correctly. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 4 ++++ + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h | 2 ++ + 2 files changed, 6 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -409,6 +409,7 @@ static void buffer_cb(struct vchiq_mmal_ + } + } + dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; ++ buf->vb.sequence = dev->capture.sequence++; + + vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); + if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) +@@ -537,6 +538,9 @@ static int start_streaming(struct vb2_qu + /* enable frame capture */ + dev->capture.frame_count = 1; + ++ /* reset sequence number */ ++ dev->capture.sequence = 0; ++ + /* if the preview is not already running, wait for a few frames for AGC + * to settle down. + */ +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.h +@@ -93,6 +93,8 @@ struct bm2835_mmal_dev { + ktime_t kernel_start_ts; + /* Timestamp of last frame */ + u64 last_timestamp; ++ /* Sequence number of last buffer */ ++ u32 sequence; + + struct vchiq_mmal_port *port; /* port being used for capture */ + /* camera port being used for capture */ diff --git a/target/linux/brcm2708/patches-4.19/950-0256-staging-bcm2835-camera-Ensure-timestamps-never-go-ba.patch b/target/linux/brcm2708/patches-4.19/950-0256-staging-bcm2835-camera-Ensure-timestamps-never-go-ba.patch new file mode 100644 index 000000000..f4de0dab5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0256-staging-bcm2835-camera-Ensure-timestamps-never-go-ba.patch @@ -0,0 +1,38 @@ +From 04224f83b7285caf63afbbc4dab2917118ce6667 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 24 Jul 2018 12:08:29 +0100 +Subject: [PATCH 256/703] staging: bcm2835-camera: Ensure timestamps never go + backwards. + +There is an awkward situation with H264 header bytes. Currently +they are returned with a PTS of 0 because they aren't associated +with a timestamped frame to encode. These are handled by either +returning the timestamp of the last buffer to have been received, +or in the case of the first buffer the timestamp taken at +start_streaming. +This results in a race where the current frame may have started +before we take the start time, which results in the first encoded +frame having an earlier timestamp than the header bytes. + +Ensure that we never return a negative delta to the user by checking +against the previous timestamp. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -393,6 +393,11 @@ static void buffer_cb(struct vchiq_mmal_ + ktime_to_ns(dev->capture.kernel_start_ts), + dev->capture.vc_start_timestamp, pts, + ktime_to_ns(timestamp)); ++ if (timestamp < dev->capture.last_timestamp) { ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "Negative delta - using last time\n"); ++ timestamp = dev->capture.last_timestamp; ++ } + buf->vb.vb2_buf.timestamp = ktime_to_ns(timestamp); + } else { + if (dev->capture.last_timestamp) { diff --git a/target/linux/brcm2708/patches-4.19/950-0257-staging-bcm2835-camera-Avoid-unneeded-internal-decla.patch b/target/linux/brcm2708/patches-4.19/950-0257-staging-bcm2835-camera-Avoid-unneeded-internal-decla.patch new file mode 100644 index 000000000..0cf30d9bb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0257-staging-bcm2835-camera-Avoid-unneeded-internal-decla.patch @@ -0,0 +1,41 @@ +From bb6d0d223ef1579a13eae3cffc66db9ede83bbd1 Mon Sep 17 00:00:00 2001 +From: Nathan Chancellor +Date: Thu, 27 Sep 2018 17:50:39 -0700 +Subject: [PATCH 257/703] staging: bcm2835-camera: Avoid unneeded internal + declaration warning + +Clang warns: + +drivers/staging/vc04_services/bcm2835-camera/controls.c:59:18: warning: +variable 'mains_freq_qmenu' is not needed and will not be emitted +[-Wunneeded-internal-declaration] +static const s64 mains_freq_qmenu[] = { + ^ +1 warning generated. + +This is because mains_freq_qmenu is currently only used in an ARRAY_SIZE +macro, which is a compile time evaluation in this case. Avoid this by +adding mains_freq_qmenu as the imenu member of this structure, which +matches all other controls that uses the ARRAY_SIZE macro in v4l2_ctrls. +This turns out to be a no-op because V4L2_CID_MPEG_VIDEO_BITRATE_MODE is +defined as a MMAL_CONTROL_TYPE_STD_MENU, which does not pass the imenu +definition along to v4l2_ctrl_new in bm2835_mmal_init_controls. + +Link: https://github.com/ClangBuiltLinux/linux/issues/122 +Signed-off-by: Nathan Chancellor +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-camera/controls.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -1109,7 +1109,7 @@ static const struct bm2835_mmal_v4l2_ctr + { + V4L2_CID_POWER_LINE_FREQUENCY, MMAL_CONTROL_TYPE_STD_MENU, + 0, ARRAY_SIZE(mains_freq_qmenu) - 1, +- 1, 1, NULL, ++ 1, 1, mains_freq_qmenu, + MMAL_PARAMETER_FLICKER_AVOID, + &ctrl_set_flicker_avoidance, + false diff --git a/target/linux/brcm2708/patches-4.19/950-0258-staging-bcm2835-camera-Add-multiple-inclusion-protec.patch b/target/linux/brcm2708/patches-4.19/950-0258-staging-bcm2835-camera-Add-multiple-inclusion-protec.patch new file mode 100644 index 000000000..fbbb2f5de --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0258-staging-bcm2835-camera-Add-multiple-inclusion-protec.patch @@ -0,0 +1,48 @@ +From 74a68a4cabb8dc516c6d1a9860043b9285d4f661 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 16:21:06 +0100 +Subject: [PATCH 258/703] staging: bcm2835-camera: Add multiple inclusion + protection to headers + +mmal-common.h and mmal-msg.h didn't have the normal +ifndef FOO / define FOO / endif protection to stop it being +included multiple times. Add it. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/mmal-common.h | 3 +++ + drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h | 3 +++ + 2 files changed, 6 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-common.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-common.h +@@ -13,6 +13,8 @@ + * MMAL structures + * + */ ++#ifndef MMAL_COMMON_H ++#define MMAL_COMMON_H + + #define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) + #define MMAL_MAGIC MMAL_FOURCC('m', 'm', 'a', 'l') +@@ -56,3 +58,4 @@ struct mmal_colourfx { + u32 u; + u32 v; + }; ++#endif +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h +@@ -23,6 +23,8 @@ + * implementation uses fixed size types and not the enums (though the + * comments have the actual enum type + */ ++#ifndef MMAL_MSG_H ++#define MMAL_MSG_H + + #define VC_MMAL_VER 15 + #define VC_MMAL_MIN_VER 10 +@@ -401,3 +403,4 @@ struct mmal_msg { + u8 payload[MMAL_MSG_MAX_PAYLOAD]; + } u; + }; ++#endif diff --git a/target/linux/brcm2708/patches-4.19/950-0259-staging-bcm2835-camera-Unify-header-inclusion-define.patch b/target/linux/brcm2708/patches-4.19/950-0259-staging-bcm2835-camera-Unify-header-inclusion-define.patch new file mode 100644 index 000000000..55e0c534c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0259-staging-bcm2835-camera-Unify-header-inclusion-define.patch @@ -0,0 +1,30 @@ +From 8e7b28ae807a4f727ea9a1232705b2bdb6752c1f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 3 Dec 2018 13:15:20 +0000 +Subject: [PATCH 259/703] staging: bcm2835-camera: Unify header inclusion + defines + +Most of the headers use ifndef FOO_H, whilst mmal-parameters.h +used ifndef __FOO_H. + +Revise mmal-parameters.h to drop the underscores and make the +headers all consistent. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/mmal-parameters.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h +@@ -19,8 +19,8 @@ + * @{ + */ + +-#ifndef __MMAL_PARAMETERS_H +-#define __MMAL_PARAMETERS_H ++#ifndef MMAL_PARAMETERS_H ++#define MMAL_PARAMETERS_H + + /** Common parameter ID group, used with many types of component. */ + #define MMAL_PARAMETER_GROUP_COMMON (0 << 16) diff --git a/target/linux/brcm2708/patches-4.19/950-0260-ARM-bcm2835_defconfig-Enable-bcm2835-camera.patch b/target/linux/brcm2708/patches-4.19/950-0260-ARM-bcm2835_defconfig-Enable-bcm2835-camera.patch new file mode 100644 index 000000000..f61d50317 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0260-ARM-bcm2835_defconfig-Enable-bcm2835-camera.patch @@ -0,0 +1,33 @@ +From 62b19c662d048c575fc9aef23560f31f4d72767b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 15:50:50 +0000 +Subject: [PATCH 260/703] ARM: bcm2835_defconfig: Enable bcm2835-camera + +Enables the V4L2 camera driver as a module. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2835_defconfig | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/arch/arm/configs/bcm2835_defconfig ++++ b/arch/arm/configs/bcm2835_defconfig +@@ -91,6 +91,8 @@ CONFIG_THERMAL=y + CONFIG_BCM2835_THERMAL=y + CONFIG_WATCHDOG=y + CONFIG_BCM2835_WDT=y ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_DRM=y + CONFIG_DRM_VC4=y + CONFIG_FB_SIMPLE=y +@@ -128,7 +130,8 @@ CONFIG_LEDS_TRIGGER_CAMERA=y + CONFIG_DMADEVICES=y + CONFIG_DMA_BCM2835=y + CONFIG_STAGING=y +-CONFIG_BCM2835_VCHIQ=m ++CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0261-staging-bcm2835-camera-Fix-alignment-should-match-op.patch b/target/linux/brcm2708/patches-4.19/950-0261-staging-bcm2835-camera-Fix-alignment-should-match-op.patch new file mode 100644 index 000000000..cf22f6259 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0261-staging-bcm2835-camera-Fix-alignment-should-match-op.patch @@ -0,0 +1,51 @@ +From eef1625f7bbf1d7073860159fb9317725cd680dc Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 15:55:42 +0000 +Subject: [PATCH 261/703] staging: bcm2835-camera: Fix alignment should match + open parenthesis + +Fix up checkpatch "Alignment should match open parenthesis" errors + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -1934,7 +1934,7 @@ static int bcm2835_mmal_probe(struct pla + ret = bm2835_mmal_init_controls(dev, &dev->ctrl_handler); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: could not init controls: %d\n", +- __func__, ret); ++ __func__, ret); + goto unreg_dev; + } + dev->v4l2_dev.ctrl_handler = &dev->ctrl_handler; +@@ -1944,7 +1944,7 @@ static int bcm2835_mmal_probe(struct pla + ret = mmal_init(dev); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: mmal init failed: %d\n", +- __func__, ret); ++ __func__, ret); + goto unreg_dev; + } + /* initialize queue */ +@@ -1966,7 +1966,7 @@ static int bcm2835_mmal_probe(struct pla + ret = bm2835_mmal_init_device(dev, &dev->vdev); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: could not init device: %d\n", +- __func__, ret); ++ __func__, ret); + goto unreg_dev; + } + +@@ -1976,7 +1976,7 @@ static int bcm2835_mmal_probe(struct pla + ret = mmal_setup_components(dev, &default_v4l2_format); + if (ret < 0) { + v4l2_err(&dev->v4l2_dev, "%s: could not setup components: %d\n", +- __func__, ret); ++ __func__, ret); + goto unreg_dev; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0262-staging-bcm2835-camera-Fix-multiple-assignments-shou.patch b/target/linux/brcm2708/patches-4.19/950-0262-staging-bcm2835-camera-Fix-multiple-assignments-shou.patch new file mode 100644 index 000000000..d257efa70 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0262-staging-bcm2835-camera-Fix-multiple-assignments-shou.patch @@ -0,0 +1,30 @@ +From 39d27efce4fe6c36ae65c34b73ff1024ec4fbf0e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 15:58:14 +0000 +Subject: [PATCH 262/703] staging: bcm2835-camera: Fix multiple assignments + should be avoided + +Clear checkpatch complaints of "multiple assignments should be avoided" + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -1065,11 +1065,12 @@ static int mmal_setup_components(struct + /* Make a further decision on port based on resolution */ + if (f->fmt.pix.width <= max_video_width && + f->fmt.pix.height <= max_video_height) +- camera_port = port = ++ camera_port = + &dev->component[COMP_CAMERA]->output[CAM_PORT_VIDEO]; + else +- camera_port = port = ++ camera_port = + &dev->component[COMP_CAMERA]->output[CAM_PORT_CAPTURE]; ++ port = camera_port; + break; + case COMP_IMAGE_ENCODE: + encode_component = dev->component[COMP_IMAGE_ENCODE]; diff --git a/target/linux/brcm2708/patches-4.19/950-0263-staging-bcm2835-camera-Fix-up-all-formatting-in-mmal.patch b/target/linux/brcm2708/patches-4.19/950-0263-staging-bcm2835-camera-Fix-up-all-formatting-in-mmal.patch new file mode 100644 index 000000000..44ac11e07 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0263-staging-bcm2835-camera-Fix-up-all-formatting-in-mmal.patch @@ -0,0 +1,336 @@ +From 9ae2700167c495dba01b1625ab62e407b660c86c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 16:08:41 +0000 +Subject: [PATCH 263/703] staging: bcm2835-camera: Fix up all formatting in + mmal-paramters.h + +Fixes up all checkpatch errors in mmal-parameters.h + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/mmal-parameters.h | 273 +++++++++++------- + 1 file changed, 165 insertions(+), 108 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h ++++ b/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h +@@ -23,148 +23,204 @@ + #define MMAL_PARAMETERS_H + + /** Common parameter ID group, used with many types of component. */ +-#define MMAL_PARAMETER_GROUP_COMMON (0 << 16) ++#define MMAL_PARAMETER_GROUP_COMMON (0 << 16) + /** Camera-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16) ++#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16) + /** Video-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16) ++#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16) + /** Audio-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16) ++#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16) + /** Clock-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16) ++#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16) + /** Miracast-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16) ++#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16) + + /* Common parameters */ + enum mmal_parameter_common_type { +- MMAL_PARAMETER_UNUSED /**< Never a valid parameter ID */ +- = MMAL_PARAMETER_GROUP_COMMON, +- MMAL_PARAMETER_SUPPORTED_ENCODINGS, /**< MMAL_PARAMETER_ENCODING_T */ +- MMAL_PARAMETER_URI, /**< MMAL_PARAMETER_URI_T */ ++ /**< Never a valid parameter ID */ ++ MMAL_PARAMETER_UNUSED = MMAL_PARAMETER_GROUP_COMMON, + +- /** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */ ++ /**< MMAL_PARAMETER_ENCODING_T */ ++ MMAL_PARAMETER_SUPPORTED_ENCODINGS, ++ /**< MMAL_PARAMETER_URI_T */ ++ MMAL_PARAMETER_URI, ++ /** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */ + MMAL_PARAMETER_CHANGE_EVENT_REQUEST, +- +- /** MMAL_PARAMETER_BOOLEAN_T */ ++ /** MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_ZERO_COPY, +- +- /**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */ ++ /**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */ + MMAL_PARAMETER_BUFFER_REQUIREMENTS, +- +- MMAL_PARAMETER_STATISTICS, /**< MMAL_PARAMETER_STATISTICS_T */ +- MMAL_PARAMETER_CORE_STATISTICS, /**< MMAL_PARAMETER_CORE_STATISTICS_T */ +- MMAL_PARAMETER_MEM_USAGE, /**< MMAL_PARAMETER_MEM_USAGE_T */ +- MMAL_PARAMETER_BUFFER_FLAG_FILTER, /**< MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_SEEK, /**< MMAL_PARAMETER_SEEK_T */ +- MMAL_PARAMETER_POWERMON_ENABLE, /**< MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_LOGGING, /**< MMAL_PARAMETER_LOGGING_T */ +- MMAL_PARAMETER_SYSTEM_TIME, /**< MMAL_PARAMETER_UINT64_T */ +- MMAL_PARAMETER_NO_IMAGE_PADDING /**< MMAL_PARAMETER_BOOLEAN_T */ ++ /**< MMAL_PARAMETER_STATISTICS_T */ ++ MMAL_PARAMETER_STATISTICS, ++ /**< MMAL_PARAMETER_CORE_STATISTICS_T */ ++ MMAL_PARAMETER_CORE_STATISTICS, ++ /**< MMAL_PARAMETER_MEM_USAGE_T */ ++ MMAL_PARAMETER_MEM_USAGE, ++ /**< MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_BUFFER_FLAG_FILTER, ++ /**< MMAL_PARAMETER_SEEK_T */ ++ MMAL_PARAMETER_SEEK, ++ /**< MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_POWERMON_ENABLE, ++ /**< MMAL_PARAMETER_LOGGING_T */ ++ MMAL_PARAMETER_LOGGING, ++ /**< MMAL_PARAMETER_UINT64_T */ ++ MMAL_PARAMETER_SYSTEM_TIME, ++ /**< MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_NO_IMAGE_PADDING, + }; + + /* camera parameters */ + + enum mmal_parameter_camera_type { + /* 0 */ +- /** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */ +- MMAL_PARAMETER_THUMBNAIL_CONFIGURATION +- = MMAL_PARAMETER_GROUP_CAMERA, +- MMAL_PARAMETER_CAPTURE_QUALITY, /**< Unused? */ +- MMAL_PARAMETER_ROTATION, /**< @ref MMAL_PARAMETER_INT32_T */ +- MMAL_PARAMETER_EXIF_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_EXIF, /**< @ref MMAL_PARAMETER_EXIF_T */ +- MMAL_PARAMETER_AWB_MODE, /**< @ref MMAL_PARAM_AWBMODE_T */ +- MMAL_PARAMETER_IMAGE_EFFECT, /**< @ref MMAL_PARAMETER_IMAGEFX_T */ +- MMAL_PARAMETER_COLOUR_EFFECT, /**< @ref MMAL_PARAMETER_COLOURFX_T */ +- MMAL_PARAMETER_FLICKER_AVOID, /**< @ref MMAL_PARAMETER_FLICKERAVOID_T */ +- MMAL_PARAMETER_FLASH, /**< @ref MMAL_PARAMETER_FLASH_T */ +- MMAL_PARAMETER_REDEYE, /**< @ref MMAL_PARAMETER_REDEYE_T */ +- MMAL_PARAMETER_FOCUS, /**< @ref MMAL_PARAMETER_FOCUS_T */ +- MMAL_PARAMETER_FOCAL_LENGTHS, /**< Unused? */ +- MMAL_PARAMETER_EXPOSURE_COMP, /**< @ref MMAL_PARAMETER_INT32_T */ +- MMAL_PARAMETER_ZOOM, /**< @ref MMAL_PARAMETER_SCALEFACTOR_T */ +- MMAL_PARAMETER_MIRROR, /**< @ref MMAL_PARAMETER_MIRROR_T */ ++ /** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */ ++ MMAL_PARAMETER_THUMBNAIL_CONFIGURATION = ++ MMAL_PARAMETER_GROUP_CAMERA, ++ /**< Unused? */ ++ MMAL_PARAMETER_CAPTURE_QUALITY, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_ROTATION, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_EXIF_DISABLE, ++ /**< @ref MMAL_PARAMETER_EXIF_T */ ++ MMAL_PARAMETER_EXIF, ++ /**< @ref MMAL_PARAM_AWBMODE_T */ ++ MMAL_PARAMETER_AWB_MODE, ++ /**< @ref MMAL_PARAMETER_IMAGEFX_T */ ++ MMAL_PARAMETER_IMAGE_EFFECT, ++ /**< @ref MMAL_PARAMETER_COLOURFX_T */ ++ MMAL_PARAMETER_COLOUR_EFFECT, ++ /**< @ref MMAL_PARAMETER_FLICKERAVOID_T */ ++ MMAL_PARAMETER_FLICKER_AVOID, ++ /**< @ref MMAL_PARAMETER_FLASH_T */ ++ MMAL_PARAMETER_FLASH, ++ /**< @ref MMAL_PARAMETER_REDEYE_T */ ++ MMAL_PARAMETER_REDEYE, ++ /**< @ref MMAL_PARAMETER_FOCUS_T */ ++ MMAL_PARAMETER_FOCUS, ++ /**< Unused? */ ++ MMAL_PARAMETER_FOCAL_LENGTHS, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_EXPOSURE_COMP, ++ /**< @ref MMAL_PARAMETER_SCALEFACTOR_T */ ++ MMAL_PARAMETER_ZOOM, ++ /**< @ref MMAL_PARAMETER_MIRROR_T */ ++ MMAL_PARAMETER_MIRROR, + + /* 0x10 */ +- MMAL_PARAMETER_CAMERA_NUM, /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_CAPTURE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_EXPOSURE_MODE, /**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */ +- MMAL_PARAMETER_EXP_METERING_MODE, /**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */ +- MMAL_PARAMETER_FOCUS_STATUS, /**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */ +- MMAL_PARAMETER_CAMERA_CONFIG, /**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */ +- MMAL_PARAMETER_CAPTURE_STATUS, /**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */ +- MMAL_PARAMETER_FACE_TRACK, /**< @ref MMAL_PARAMETER_FACE_TRACK_T */ +- MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_JPEG_Q_FACTOR, /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_FRAME_RATE, /**< @ref MMAL_PARAMETER_FRAME_RATE_T */ +- MMAL_PARAMETER_USE_STC, /**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */ +- MMAL_PARAMETER_CAMERA_INFO, /**< @ref MMAL_PARAMETER_CAMERA_INFO_T */ +- MMAL_PARAMETER_VIDEO_STABILISATION, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_FACE_TRACK_RESULTS, /**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */ +- MMAL_PARAMETER_ENABLE_RAW_CAPTURE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_CAMERA_NUM, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_CAPTURE, ++ /**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */ ++ MMAL_PARAMETER_EXPOSURE_MODE, ++ /**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */ ++ MMAL_PARAMETER_EXP_METERING_MODE, ++ /**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */ ++ MMAL_PARAMETER_FOCUS_STATUS, ++ /**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */ ++ MMAL_PARAMETER_CAMERA_CONFIG, ++ /**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */ ++ MMAL_PARAMETER_CAPTURE_STATUS, ++ /**< @ref MMAL_PARAMETER_FACE_TRACK_T */ ++ MMAL_PARAMETER_FACE_TRACK, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS, ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_JPEG_Q_FACTOR, ++ /**< @ref MMAL_PARAMETER_FRAME_RATE_T */ ++ MMAL_PARAMETER_FRAME_RATE, ++ /**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */ ++ MMAL_PARAMETER_USE_STC, ++ /**< @ref MMAL_PARAMETER_CAMERA_INFO_T */ ++ MMAL_PARAMETER_CAMERA_INFO, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_STABILISATION, ++ /**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */ ++ MMAL_PARAMETER_FACE_TRACK_RESULTS, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ENABLE_RAW_CAPTURE, + + /* 0x20 */ +- MMAL_PARAMETER_DPF_FILE, /**< @ref MMAL_PARAMETER_URI_T */ +- MMAL_PARAMETER_ENABLE_DPF_FILE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_DPF_FAIL_IS_FATAL, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_CAPTURE_MODE, /**< @ref MMAL_PARAMETER_CAPTUREMODE_T */ +- MMAL_PARAMETER_FOCUS_REGIONS, /**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */ +- MMAL_PARAMETER_INPUT_CROP, /**< @ref MMAL_PARAMETER_INPUT_CROP_T */ +- MMAL_PARAMETER_SENSOR_INFORMATION, /**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */ +- MMAL_PARAMETER_FLASH_SELECT, /**< @ref MMAL_PARAMETER_FLASH_SELECT_T */ +- MMAL_PARAMETER_FIELD_OF_VIEW, /**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */ +- MMAL_PARAMETER_HIGH_DYNAMIC_RANGE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION, /**< @ref MMAL_PARAMETER_DRC_T */ +- MMAL_PARAMETER_ALGORITHM_CONTROL, /**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */ +- MMAL_PARAMETER_SHARPNESS, /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_CONTRAST, /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_BRIGHTNESS, /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_SATURATION, /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ /**< @ref MMAL_PARAMETER_URI_T */ ++ MMAL_PARAMETER_DPF_FILE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ENABLE_DPF_FILE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_DPF_FAIL_IS_FATAL, ++ /**< @ref MMAL_PARAMETER_CAPTUREMODE_T */ ++ MMAL_PARAMETER_CAPTURE_MODE, ++ /**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */ ++ MMAL_PARAMETER_FOCUS_REGIONS, ++ /**< @ref MMAL_PARAMETER_INPUT_CROP_T */ ++ MMAL_PARAMETER_INPUT_CROP, ++ /**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */ ++ MMAL_PARAMETER_SENSOR_INFORMATION, ++ /**< @ref MMAL_PARAMETER_FLASH_SELECT_T */ ++ MMAL_PARAMETER_FLASH_SELECT, ++ /**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */ ++ MMAL_PARAMETER_FIELD_OF_VIEW, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_HIGH_DYNAMIC_RANGE, ++ /**< @ref MMAL_PARAMETER_DRC_T */ ++ MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION, ++ /**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */ ++ MMAL_PARAMETER_ALGORITHM_CONTROL, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_SHARPNESS, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_CONTRAST, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_BRIGHTNESS, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_SATURATION, + + /* 0x30 */ +- MMAL_PARAMETER_ISO, /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_ANTISHAKE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- +- /** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */ ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_ISO, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ANTISHAKE, ++ /** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */ + MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_CAMERA_BURST_CAPTURE, +- +- /** @ref MMAL_PARAMETER_UINT32_T */ ++ /** @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_CAMERA_MIN_ISO, +- +- /** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */ ++ /** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */ + MMAL_PARAMETER_CAMERA_USE_CASE, +- +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_CAPTURE_STATS_PASS, +- +- /** @ref MMAL_PARAMETER_UINT32_T */ ++ /** @ref MMAL_PARAMETER_UINT32_T */ + MMAL_PARAMETER_CAMERA_CUSTOM_SENSOR_CONFIG, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_ENABLE_REGISTER_FILE, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ + MMAL_PARAMETER_REGISTER_FAIL_IS_FATAL, +- +- /** @ref MMAL_PARAMETER_CONFIGFILE_T */ ++ /** @ref MMAL_PARAMETER_CONFIGFILE_T */ + MMAL_PARAMETER_CONFIGFILE_REGISTERS, +- +- /** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */ ++ /** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */ + MMAL_PARAMETER_CONFIGFILE_CHUNK_REGISTERS, +- MMAL_PARAMETER_JPEG_ATTACH_LOG, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ZERO_SHUTTER_LAG, /**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */ +- MMAL_PARAMETER_FPS_RANGE, /**< @ref MMAL_PARAMETER_FPS_RANGE_T */ +- MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP, /**< @ref MMAL_PARAMETER_INT32_T */ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_JPEG_ATTACH_LOG, ++ /**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */ ++ MMAL_PARAMETER_ZERO_SHUTTER_LAG, ++ /**< @ref MMAL_PARAMETER_FPS_RANGE_T */ ++ MMAL_PARAMETER_FPS_RANGE, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP, + + /* 0x40 */ +- MMAL_PARAMETER_SW_SHARPEN_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_FLASH_REQUIRED, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_SW_SATURATION_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_SHUTTER_SPEED, /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_CUSTOM_AWB_GAINS, /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_SW_SHARPEN_DISABLE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_FLASH_REQUIRED, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_SW_SATURATION_DISABLE, ++ /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_SHUTTER_SPEED, ++ /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ ++ MMAL_PARAMETER_CUSTOM_AWB_GAINS, + }; + + struct mmal_parameter_rational { +@@ -411,7 +467,8 @@ enum mmal_parameter_video_type { + MMAL_PARAMETER_MINIMISE_FRAGMENTATION, + + /** @ref MMAL_PARAMETER_UINT32_T. +- * Setting the value to zero resets to the default (one slice per frame). ++ * Setting the value to zero resets to the default (one slice per ++ * frame). + */ + MMAL_PARAMETER_MB_ROWS_PER_SLICE, + diff --git a/target/linux/brcm2708/patches-4.19/950-0264-staging-bcm2835-camera-Use-enums-for-max-value-in-co.patch b/target/linux/brcm2708/patches-4.19/950-0264-staging-bcm2835-camera-Use-enums-for-max-value-in-co.patch new file mode 100644 index 000000000..24a420554 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0264-staging-bcm2835-camera-Use-enums-for-max-value-in-co.patch @@ -0,0 +1,112 @@ +From cbfd21871e5882f8ffa73a7b5c96018409b683ea Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 28 Sep 2018 10:17:11 +0100 +Subject: [PATCH 264/703] staging: bcm2835-camera: Use enums for max value in + controls + +Controls of type MMAL_CONTROL_TYPE_STD_MENU call v4l2_ctrl_new_std_menu +with a max value and a mask. The max value is one of the defined +values for the control, however in the config array there are several +entries where raw numbers have been used instead. Replace these +with the appropriate enum. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/controls.c | 37 +++++++------------ + 1 file changed, 13 insertions(+), 24 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -58,19 +58,6 @@ static const uint32_t iso_values[] = { + 0, 100, 200, 400, 800, + }; + +-static const s64 mains_freq_qmenu[] = { +- V4L2_CID_POWER_LINE_FREQUENCY_DISABLED, +- V4L2_CID_POWER_LINE_FREQUENCY_50HZ, +- V4L2_CID_POWER_LINE_FREQUENCY_60HZ, +- V4L2_CID_POWER_LINE_FREQUENCY_AUTO +-}; +- +-/* Supported video encode modes */ +-static const s64 bitrate_mode_qmenu[] = { +- (s64)V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, +- (s64)V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, +-}; +- + enum bm2835_mmal_ctrl_type { + MMAL_CONTROL_TYPE_STD, + MMAL_CONTROL_TYPE_STD_MENU, +@@ -966,8 +953,8 @@ static const struct bm2835_mmal_v4l2_ctr + }, + { + V4L2_CID_ISO_SENSITIVITY_AUTO, MMAL_CONTROL_TYPE_STD_MENU, +- 0, 1, V4L2_ISO_SENSITIVITY_AUTO, 1, NULL, +- MMAL_PARAMETER_ISO, ++ 0, V4L2_ISO_SENSITIVITY_AUTO, V4L2_ISO_SENSITIVITY_AUTO, 1, ++ NULL, MMAL_PARAMETER_ISO, + &ctrl_set_iso, + false + }, +@@ -984,8 +971,8 @@ static const struct bm2835_mmal_v4l2_ctr + */ + { + V4L2_CID_EXPOSURE_AUTO, MMAL_CONTROL_TYPE_STD_MENU, +- ~0x03, 3, V4L2_EXPOSURE_AUTO, 0, NULL, +- MMAL_PARAMETER_EXPOSURE_MODE, ++ ~0x03, V4L2_EXPOSURE_APERTURE_PRIORITY, V4L2_EXPOSURE_AUTO, 0, ++ NULL, MMAL_PARAMETER_EXPOSURE_MODE, + &ctrl_set_exposure, + false + }, +@@ -1021,7 +1008,8 @@ static const struct bm2835_mmal_v4l2_ctr + { + V4L2_CID_EXPOSURE_METERING, + MMAL_CONTROL_TYPE_STD_MENU, +- ~0x7, 2, V4L2_EXPOSURE_METERING_AVERAGE, 0, NULL, ++ ~0x7, V4L2_EXPOSURE_METERING_SPOT, ++ V4L2_EXPOSURE_METERING_AVERAGE, 0, NULL, + MMAL_PARAMETER_EXP_METERING_MODE, + &ctrl_set_metering_mode, + false +@@ -1029,7 +1017,8 @@ static const struct bm2835_mmal_v4l2_ctr + { + V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, + MMAL_CONTROL_TYPE_STD_MENU, +- ~0x3ff, 9, V4L2_WHITE_BALANCE_AUTO, 0, NULL, ++ ~0x3ff, V4L2_WHITE_BALANCE_SHADE, V4L2_WHITE_BALANCE_AUTO, 0, ++ NULL, + MMAL_PARAMETER_AWB_MODE, + &ctrl_set_awb_mode, + false +@@ -1050,7 +1039,7 @@ static const struct bm2835_mmal_v4l2_ctr + }, + { + V4L2_CID_COLORFX, MMAL_CONTROL_TYPE_STD_MENU, +- 0, 15, V4L2_COLORFX_NONE, 0, NULL, ++ 0, V4L2_COLORFX_SET_CBCR, V4L2_COLORFX_NONE, 0, NULL, + MMAL_PARAMETER_IMAGE_EFFECT, + &ctrl_set_image_effect, + false +@@ -1085,8 +1074,8 @@ static const struct bm2835_mmal_v4l2_ctr + }, + { + V4L2_CID_MPEG_VIDEO_BITRATE_MODE, MMAL_CONTROL_TYPE_STD_MENU, +- 0, ARRAY_SIZE(bitrate_mode_qmenu) - 1, +- 0, 0, bitrate_mode_qmenu, ++ 0, V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, ++ 0, 0, NULL, + MMAL_PARAMETER_RATECONTROL, + &ctrl_set_bitrate_mode, + false +@@ -1108,8 +1097,8 @@ static const struct bm2835_mmal_v4l2_ctr + }, + { + V4L2_CID_POWER_LINE_FREQUENCY, MMAL_CONTROL_TYPE_STD_MENU, +- 0, ARRAY_SIZE(mains_freq_qmenu) - 1, +- 1, 1, mains_freq_qmenu, ++ 0, V4L2_CID_POWER_LINE_FREQUENCY_AUTO, ++ 1, 1, NULL, + MMAL_PARAMETER_FLICKER_AVOID, + &ctrl_set_flicker_avoidance, + false diff --git a/target/linux/brcm2708/patches-4.19/950-0265-staging-bcm2835-camera-Correct-V4L2_CID_COLORFX_CBCR.patch b/target/linux/brcm2708/patches-4.19/950-0265-staging-bcm2835-camera-Correct-V4L2_CID_COLORFX_CBCR.patch new file mode 100644 index 000000000..1b81d5d33 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0265-staging-bcm2835-camera-Correct-V4L2_CID_COLORFX_CBCR.patch @@ -0,0 +1,34 @@ +From d62b10483e89fbd3adc2cde272234ad5300d9a42 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 8 Oct 2018 18:26:15 +0100 +Subject: [PATCH 265/703] staging: bcm2835-camera: Correct + V4L2_CID_COLORFX_CBCR behaviour + +With V4L2_CID_COLORFX_CBCR calling ctrl_set_colfx it was incorrectly +assigning the colour values to the enable field of dev->colourfx +instead of the u and v fields. + +Correct the assignments. + +Reported as a Coverity issue +Detected by CoverityScan CID#1419711 ("Unused value") + +Reported-by: Colin Ian King +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/controls.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -578,8 +578,8 @@ static int ctrl_set_colfx(struct bm2835_ + + control = &dev->component[COMP_CAMERA]->control; + +- dev->colourfx.enable = (ctrl->val & 0xff00) >> 8; +- dev->colourfx.enable = ctrl->val & 0xff; ++ dev->colourfx.u = (ctrl->val & 0xff00) >> 8; ++ dev->colourfx.v = ctrl->val & 0xff; + + ret = vchiq_mmal_port_parameter_set(dev->instance, control, + MMAL_PARAMETER_COLOUR_EFFECT, diff --git a/target/linux/brcm2708/patches-4.19/950-0266-staging-bcm2835-camera-Remove-amend-some-obsolete-co.patch b/target/linux/brcm2708/patches-4.19/950-0266-staging-bcm2835-camera-Remove-amend-some-obsolete-co.patch new file mode 100644 index 000000000..c7f6f28d8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0266-staging-bcm2835-camera-Remove-amend-some-obsolete-co.patch @@ -0,0 +1,49 @@ +From dac082334ccbfa6a051fdc48700f64e8412169d5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 28 Sep 2018 10:22:26 +0100 +Subject: [PATCH 266/703] staging: bcm2835-camera: Remove/amend some obsolete + comments + +Remove a todo which has been done. +Remove a template line that was redundant. +Make a comment clearer as to the non-obvious meaning of a field. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-camera/controls.c | 11 +---------- + 1 file changed, 1 insertion(+), 10 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -965,10 +965,6 @@ static const struct bm2835_mmal_v4l2_ctr + &ctrl_set_value, + false + }, +-/* { +- * 0, MMAL_CONTROL_TYPE_CLUSTER, 3, 1, 0, NULL, 0, NULL +- * }, +- */ + { + V4L2_CID_EXPOSURE_AUTO, MMAL_CONTROL_TYPE_STD_MENU, + ~0x03, V4L2_EXPOSURE_APERTURE_PRIORITY, V4L2_EXPOSURE_AUTO, 0, +@@ -976,11 +972,6 @@ static const struct bm2835_mmal_v4l2_ctr + &ctrl_set_exposure, + false + }, +-/* todo this needs mixing in with set exposure +- * { +- * V4L2_CID_SCENE_MODE, MMAL_CONTROL_TYPE_STD_MENU, +- * }, +- */ + { + V4L2_CID_EXPOSURE_ABSOLUTE, MMAL_CONTROL_TYPE_STD, + /* Units of 100usecs */ +@@ -1146,7 +1137,7 @@ static const struct bm2835_mmal_v4l2_ctr + }, + { + V4L2_CID_SCENE_MODE, MMAL_CONTROL_TYPE_STD_MENU, +- -1, /* Min is computed at runtime */ ++ -1, /* Min (mask) is computed at runtime */ + V4L2_SCENE_MODE_TEXT, + V4L2_SCENE_MODE_NONE, 1, NULL, + MMAL_PARAMETER_PROFILE, diff --git a/target/linux/brcm2708/patches-4.19/950-0267-staging-vc04_services-Split-vchiq-mmal-into-a-module.patch b/target/linux/brcm2708/patches-4.19/950-0267-staging-vc04_services-Split-vchiq-mmal-into-a-module.patch new file mode 100644 index 000000000..5ba783d11 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0267-staging-vc04_services-Split-vchiq-mmal-into-a-module.patch @@ -0,0 +1,7533 @@ +From abd417b71f4b157cb183cab26620d08c303ce805 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 16:30:37 +0100 +Subject: [PATCH 267/703] staging: vc04_services: Split vchiq-mmal into a + module + +In preparation for adding a video codec V4L2 module which also +wants to use vchiq-mmal functions, split it out into an +independent module. +The minimum number of changes have been made to achieve this +(eg straight moves where possible) so existing checkpatch +errors will still be present. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/Kconfig | 1 + + drivers/staging/vc04_services/Makefile | 1 + + .../vc04_services/bcm2835-camera/Kconfig | 2 +- + .../vc04_services/bcm2835-camera/Makefile | 4 ++-- + .../staging/vc04_services/vchiq-mmal/Kconfig | 7 ++++++ + .../staging/vc04_services/vchiq-mmal/Makefile | 8 +++++++ + .../mmal-common.h | 0 + .../mmal-encodings.h | 0 + .../mmal-msg-common.h | 0 + .../mmal-msg-format.h | 0 + .../mmal-msg-port.h | 0 + .../{bcm2835-camera => vchiq-mmal}/mmal-msg.h | 0 + .../mmal-parameters.h | 0 + .../mmal-vchiq.c | 22 +++++++++++++++++++ + .../mmal-vchiq.h | 0 + 15 files changed, 42 insertions(+), 3 deletions(-) + create mode 100644 drivers/staging/vc04_services/vchiq-mmal/Kconfig + create mode 100644 drivers/staging/vc04_services/vchiq-mmal/Makefile + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-common.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-encodings.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-msg-common.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-msg-format.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-msg-port.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-msg.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-parameters.h (100%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-vchiq.c (98%) + rename drivers/staging/vc04_services/{bcm2835-camera => vchiq-mmal}/mmal-vchiq.h (100%) + +--- a/drivers/staging/vc04_services/Kconfig ++++ b/drivers/staging/vc04_services/Kconfig +@@ -21,6 +21,7 @@ config BCM2835_VCHIQ + source "drivers/staging/vc04_services/bcm2835-audio/Kconfig" + + source "drivers/staging/vc04_services/bcm2835-camera/Kconfig" ++source "drivers/staging/vc04_services/vchiq-mmal/Kconfig" + + endif + +--- a/drivers/staging/vc04_services/Makefile ++++ b/drivers/staging/vc04_services/Makefile +@@ -12,6 +12,7 @@ vchiq-objs := \ + + obj-$(CONFIG_SND_BCM2835) += bcm2835-audio/ + obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-camera/ ++obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ + + ccflags-y += -Idrivers/staging/vc04_services -D__VCCOREVER__=0x04000000 + +--- a/drivers/staging/vc04_services/bcm2835-camera/Kconfig ++++ b/drivers/staging/vc04_services/bcm2835-camera/Kconfig +@@ -2,7 +2,7 @@ config VIDEO_BCM2835 + tristate "BCM2835 Camera" + depends on MEDIA_SUPPORT + depends on VIDEO_V4L2 && (ARCH_BCM2835 || COMPILE_TEST) +- select BCM2835_VCHIQ ++ select BCM2835_VCHIQ_MMAL + select VIDEOBUF2_VMALLOC + select BTREE + help +--- a/drivers/staging/vc04_services/bcm2835-camera/Makefile ++++ b/drivers/staging/vc04_services/bcm2835-camera/Makefile +@@ -1,11 +1,11 @@ + # SPDX-License-Identifier: GPL-2.0 + bcm2835-v4l2-$(CONFIG_VIDEO_BCM2835) := \ + bcm2835-camera.o \ +- controls.o \ +- mmal-vchiq.o ++ controls.o + + obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-v4l2.o + + ccflags-y += \ + -Idrivers/staging/vc04_services \ ++ -Idrivers/staging/vc04_services/vchiq-mmal \ + -D__VCCOREVER__=0x04000000 +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/Kconfig +@@ -0,0 +1,7 @@ ++config BCM2835_VCHIQ_MMAL ++ tristate "BCM2835 MMAL VCHIQ service" ++ depends on (ARCH_BCM2835 || COMPILE_TEST) ++ select BCM2835_VCHIQ ++ help ++ Enables the MMAL API over VCHIQ as used for the ++ majority of the multimedia services on VideoCore. +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/Makefile +@@ -0,0 +1,8 @@ ++# SPDX-License-Identifier: GPL-2.0 ++bcm2835-mmal-vchiq-objs := mmal-vchiq.o ++ ++obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += bcm2835-mmal-vchiq.o ++ ++ccflags-y += \ ++ -Idrivers/staging/vc04_services \ ++ -D__VCCOREVER__=0x04000000 +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.c ++++ /dev/null +@@ -1,1898 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- * +- * V4L2 driver MMAL vchiq interface code +- */ +- +-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include "mmal-common.h" +-#include "mmal-vchiq.h" +-#include "mmal-msg.h" +- +-#define USE_VCHIQ_ARM +-#include "interface/vchi/vchi.h" +- +-/* maximum number of components supported */ +-#define VCHIQ_MMAL_MAX_COMPONENTS 4 +- +-/*#define FULL_MSG_DUMP 1*/ +- +-#ifdef DEBUG +-static const char *const msg_type_names[] = { +- "UNKNOWN", +- "QUIT", +- "SERVICE_CLOSED", +- "GET_VERSION", +- "COMPONENT_CREATE", +- "COMPONENT_DESTROY", +- "COMPONENT_ENABLE", +- "COMPONENT_DISABLE", +- "PORT_INFO_GET", +- "PORT_INFO_SET", +- "PORT_ACTION", +- "BUFFER_FROM_HOST", +- "BUFFER_TO_HOST", +- "GET_STATS", +- "PORT_PARAMETER_SET", +- "PORT_PARAMETER_GET", +- "EVENT_TO_HOST", +- "GET_CORE_STATS_FOR_PORT", +- "OPAQUE_ALLOCATOR", +- "CONSUME_MEM", +- "LMK", +- "OPAQUE_ALLOCATOR_DESC", +- "DRM_GET_LHS32", +- "DRM_GET_TIME", +- "BUFFER_FROM_HOST_ZEROLEN", +- "PORT_FLUSH", +- "HOST_LOG", +-}; +-#endif +- +-static const char *const port_action_type_names[] = { +- "UNKNOWN", +- "ENABLE", +- "DISABLE", +- "FLUSH", +- "CONNECT", +- "DISCONNECT", +- "SET_REQUIREMENTS", +-}; +- +-#if defined(DEBUG) +-#if defined(FULL_MSG_DUMP) +-#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) \ +- do { \ +- pr_debug(TITLE" type:%s(%d) length:%d\n", \ +- msg_type_names[(MSG)->h.type], \ +- (MSG)->h.type, (MSG_LEN)); \ +- print_hex_dump(KERN_DEBUG, "<h.type], \ +- (MSG)->h.type, (MSG_LEN)); \ +- } +-#endif +-#else +-#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) +-#endif +- +-struct vchiq_mmal_instance; +- +-/* normal message context */ +-struct mmal_msg_context { +- struct vchiq_mmal_instance *instance; +- +- /* Index in the context_map idr so that we can find the +- * mmal_msg_context again when servicing the VCHI reply. +- */ +- int handle; +- +- union { +- struct { +- /* work struct for buffer_cb callback */ +- struct work_struct work; +- /* work struct for deferred callback */ +- struct work_struct buffer_to_host_work; +- /* mmal instance */ +- struct vchiq_mmal_instance *instance; +- /* mmal port */ +- struct vchiq_mmal_port *port; +- /* actual buffer used to store bulk reply */ +- struct mmal_buffer *buffer; +- /* amount of buffer used */ +- unsigned long buffer_used; +- /* MMAL buffer flags */ +- u32 mmal_flags; +- /* Presentation and Decode timestamps */ +- s64 pts; +- s64 dts; +- +- int status; /* context status */ +- +- } bulk; /* bulk data */ +- +- struct { +- /* message handle to release */ +- VCHI_HELD_MSG_T msg_handle; +- /* pointer to received message */ +- struct mmal_msg *msg; +- /* received message length */ +- u32 msg_len; +- /* completion upon reply */ +- struct completion cmplt; +- } sync; /* synchronous response */ +- } u; +- +-}; +- +-struct vchiq_mmal_instance { +- VCHI_SERVICE_HANDLE_T handle; +- +- /* ensure serialised access to service */ +- struct mutex vchiq_mutex; +- +- /* vmalloc page to receive scratch bulk xfers into */ +- void *bulk_scratch; +- +- struct idr context_map; +- spinlock_t context_map_lock; +- +- /* component to use next */ +- int component_idx; +- struct vchiq_mmal_component component[VCHIQ_MMAL_MAX_COMPONENTS]; +- +- /* ordered workqueue to process all bulk operations */ +- struct workqueue_struct *bulk_wq; +-}; +- +-static struct mmal_msg_context * +-get_msg_context(struct vchiq_mmal_instance *instance) +-{ +- struct mmal_msg_context *msg_context; +- int handle; +- +- /* todo: should this be allocated from a pool to avoid kzalloc */ +- msg_context = kzalloc(sizeof(*msg_context), GFP_KERNEL); +- +- if (!msg_context) +- return ERR_PTR(-ENOMEM); +- +- /* Create an ID that will be passed along with our message so +- * that when we service the VCHI reply, we can look up what +- * message is being replied to. +- */ +- spin_lock(&instance->context_map_lock); +- handle = idr_alloc(&instance->context_map, msg_context, +- 0, 0, GFP_KERNEL); +- spin_unlock(&instance->context_map_lock); +- +- if (handle < 0) { +- kfree(msg_context); +- return ERR_PTR(handle); +- } +- +- msg_context->instance = instance; +- msg_context->handle = handle; +- +- return msg_context; +-} +- +-static struct mmal_msg_context * +-lookup_msg_context(struct vchiq_mmal_instance *instance, int handle) +-{ +- return idr_find(&instance->context_map, handle); +-} +- +-static void +-release_msg_context(struct mmal_msg_context *msg_context) +-{ +- struct vchiq_mmal_instance *instance = msg_context->instance; +- +- spin_lock(&instance->context_map_lock); +- idr_remove(&instance->context_map, msg_context->handle); +- spin_unlock(&instance->context_map_lock); +- kfree(msg_context); +-} +- +-/* deals with receipt of event to host message */ +-static void event_to_host_cb(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, u32 msg_len) +-{ +- pr_debug("unhandled event\n"); +- pr_debug("component:%u port type:%d num:%d cmd:0x%x length:%d\n", +- msg->u.event_to_host.client_component, +- msg->u.event_to_host.port_type, +- msg->u.event_to_host.port_num, +- msg->u.event_to_host.cmd, msg->u.event_to_host.length); +-} +- +-/* workqueue scheduled callback +- * +- * we do this because it is important we do not call any other vchiq +- * sync calls from witin the message delivery thread +- */ +-static void buffer_work_cb(struct work_struct *work) +-{ +- struct mmal_msg_context *msg_context = +- container_of(work, struct mmal_msg_context, u.bulk.work); +- +- atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); +- +- msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, +- msg_context->u.bulk.port, +- msg_context->u.bulk.status, +- msg_context->u.bulk.buffer, +- msg_context->u.bulk.buffer_used, +- msg_context->u.bulk.mmal_flags, +- msg_context->u.bulk.dts, +- msg_context->u.bulk.pts); +-} +- +-/* workqueue scheduled callback to handle receiving buffers +- * +- * VCHI will allow up to 4 bulk receives to be scheduled before blocking. +- * If we block in the service_callback context then we can't process the +- * VCHI_CALLBACK_BULK_RECEIVED message that would otherwise allow the blocked +- * vchi_bulk_queue_receive() call to complete. +- */ +-static void buffer_to_host_work_cb(struct work_struct *work) +-{ +- struct mmal_msg_context *msg_context = +- container_of(work, struct mmal_msg_context, +- u.bulk.buffer_to_host_work); +- struct vchiq_mmal_instance *instance = msg_context->instance; +- unsigned long len = msg_context->u.bulk.buffer_used; +- int ret; +- +- if (!len) +- /* Dummy receive to ensure the buffers remain in order */ +- len = 8; +- /* queue the bulk submission */ +- vchi_service_use(instance->handle); +- ret = vchi_bulk_queue_receive(instance->handle, +- msg_context->u.bulk.buffer->buffer, +- /* Actual receive needs to be a multiple +- * of 4 bytes +- */ +- (len + 3) & ~3, +- VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | +- VCHI_FLAGS_BLOCK_UNTIL_QUEUED, +- msg_context); +- +- vchi_service_release(instance->handle); +- +- if (ret != 0) +- pr_err("%s: ctx: %p, vchi_bulk_queue_receive failed %d\n", +- __func__, msg_context, ret); +-} +- +-/* enqueue a bulk receive for a given message context */ +-static int bulk_receive(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, +- struct mmal_msg_context *msg_context) +-{ +- unsigned long rd_len; +- +- rd_len = msg->u.buffer_from_host.buffer_header.length; +- +- if (!msg_context->u.bulk.buffer) { +- pr_err("bulk.buffer not configured - error in buffer_from_host\n"); +- +- /* todo: this is a serious error, we should never have +- * committed a buffer_to_host operation to the mmal +- * port without the buffer to back it up (underflow +- * handling) and there is no obvious way to deal with +- * this - how is the mmal servie going to react when +- * we fail to do the xfer and reschedule a buffer when +- * it arrives? perhaps a starved flag to indicate a +- * waiting bulk receive? +- */ +- +- return -EINVAL; +- } +- +- /* ensure we do not overrun the available buffer */ +- if (rd_len > msg_context->u.bulk.buffer->buffer_size) { +- rd_len = msg_context->u.bulk.buffer->buffer_size; +- pr_warn("short read as not enough receive buffer space\n"); +- /* todo: is this the correct response, what happens to +- * the rest of the message data? +- */ +- } +- +- /* store length */ +- msg_context->u.bulk.buffer_used = rd_len; +- msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; +- msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; +- +- queue_work(msg_context->instance->bulk_wq, +- &msg_context->u.bulk.buffer_to_host_work); +- +- return 0; +-} +- +-/* data in message, memcpy from packet into output buffer */ +-static int inline_receive(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, +- struct mmal_msg_context *msg_context) +-{ +- memcpy(msg_context->u.bulk.buffer->buffer, +- msg->u.buffer_from_host.short_data, +- msg->u.buffer_from_host.payload_in_message); +- +- msg_context->u.bulk.buffer_used = +- msg->u.buffer_from_host.payload_in_message; +- +- return 0; +-} +- +-/* queue the buffer availability with MMAL_MSG_TYPE_BUFFER_FROM_HOST */ +-static int +-buffer_from_host(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, struct mmal_buffer *buf) +-{ +- struct mmal_msg_context *msg_context; +- struct mmal_msg m; +- int ret; +- +- if (!port->enabled) +- return -EINVAL; +- +- pr_debug("instance:%p buffer:%p\n", instance->handle, buf); +- +- /* get context */ +- if (!buf->msg_context) { +- pr_err("%s: msg_context not allocated, buf %p\n", __func__, +- buf); +- return -EINVAL; +- } +- msg_context = buf->msg_context; +- +- /* store bulk message context for when data arrives */ +- msg_context->u.bulk.instance = instance; +- msg_context->u.bulk.port = port; +- msg_context->u.bulk.buffer = buf; +- msg_context->u.bulk.buffer_used = 0; +- +- /* initialise work structure ready to schedule callback */ +- INIT_WORK(&msg_context->u.bulk.work, buffer_work_cb); +- INIT_WORK(&msg_context->u.bulk.buffer_to_host_work, +- buffer_to_host_work_cb); +- +- atomic_inc(&port->buffers_with_vpu); +- +- /* prep the buffer from host message */ +- memset(&m, 0xbc, sizeof(m)); /* just to make debug clearer */ +- +- m.h.type = MMAL_MSG_TYPE_BUFFER_FROM_HOST; +- m.h.magic = MMAL_MAGIC; +- m.h.context = msg_context->handle; +- m.h.status = 0; +- +- /* drvbuf is our private data passed back */ +- m.u.buffer_from_host.drvbuf.magic = MMAL_MAGIC; +- m.u.buffer_from_host.drvbuf.component_handle = port->component->handle; +- m.u.buffer_from_host.drvbuf.port_handle = port->handle; +- m.u.buffer_from_host.drvbuf.client_context = msg_context->handle; +- +- /* buffer header */ +- m.u.buffer_from_host.buffer_header.cmd = 0; +- m.u.buffer_from_host.buffer_header.data = +- (u32)(unsigned long)buf->buffer; +- m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; +- m.u.buffer_from_host.buffer_header.length = 0; /* nothing used yet */ +- m.u.buffer_from_host.buffer_header.offset = 0; /* no offset */ +- m.u.buffer_from_host.buffer_header.flags = 0; /* no flags */ +- m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; +- m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; +- +- /* clear buffer type sepecific data */ +- memset(&m.u.buffer_from_host.buffer_header_type_specific, 0, +- sizeof(m.u.buffer_from_host.buffer_header_type_specific)); +- +- /* no payload in message */ +- m.u.buffer_from_host.payload_in_message = 0; +- +- vchi_service_use(instance->handle); +- +- ret = vchi_queue_kernel_message(instance->handle, +- &m, +- sizeof(struct mmal_msg_header) + +- sizeof(m.u.buffer_from_host)); +- +- vchi_service_release(instance->handle); +- +- return ret; +-} +- +-/* deals with receipt of buffer to host message */ +-static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, u32 msg_len) +-{ +- struct mmal_msg_context *msg_context; +- u32 handle; +- +- pr_debug("%s: instance:%p msg:%p msg_len:%d\n", +- __func__, instance, msg, msg_len); +- +- if (msg->u.buffer_from_host.drvbuf.magic == MMAL_MAGIC) { +- handle = msg->u.buffer_from_host.drvbuf.client_context; +- msg_context = lookup_msg_context(instance, handle); +- +- if (!msg_context) { +- pr_err("drvbuf.client_context(%u) is invalid\n", +- handle); +- return; +- } +- } else { +- pr_err("MMAL_MSG_TYPE_BUFFER_TO_HOST with bad magic\n"); +- return; +- } +- +- msg_context->u.bulk.mmal_flags = +- msg->u.buffer_from_host.buffer_header.flags; +- +- if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { +- /* message reception had an error */ +- pr_warn("error %d in reply\n", msg->h.status); +- +- msg_context->u.bulk.status = msg->h.status; +- +- } else if (msg->u.buffer_from_host.buffer_header.length == 0) { +- /* empty buffer */ +- if (msg->u.buffer_from_host.buffer_header.flags & +- MMAL_BUFFER_HEADER_FLAG_EOS) { +- msg_context->u.bulk.status = +- bulk_receive(instance, msg, msg_context); +- if (msg_context->u.bulk.status == 0) +- return; /* successful bulk submission, bulk +- * completion will trigger callback +- */ +- } else { +- /* do callback with empty buffer - not EOS though */ +- msg_context->u.bulk.status = 0; +- msg_context->u.bulk.buffer_used = 0; +- } +- } else if (msg->u.buffer_from_host.payload_in_message == 0) { +- /* data is not in message, queue a bulk receive */ +- msg_context->u.bulk.status = +- bulk_receive(instance, msg, msg_context); +- if (msg_context->u.bulk.status == 0) +- return; /* successful bulk submission, bulk +- * completion will trigger callback +- */ +- +- /* failed to submit buffer, this will end badly */ +- pr_err("error %d on bulk submission\n", +- msg_context->u.bulk.status); +- +- } else if (msg->u.buffer_from_host.payload_in_message <= +- MMAL_VC_SHORT_DATA) { +- /* data payload within message */ +- msg_context->u.bulk.status = inline_receive(instance, msg, +- msg_context); +- } else { +- pr_err("message with invalid short payload\n"); +- +- /* signal error */ +- msg_context->u.bulk.status = -EINVAL; +- msg_context->u.bulk.buffer_used = +- msg->u.buffer_from_host.payload_in_message; +- } +- +- /* schedule the port callback */ +- schedule_work(&msg_context->u.bulk.work); +-} +- +-static void bulk_receive_cb(struct vchiq_mmal_instance *instance, +- struct mmal_msg_context *msg_context) +-{ +- msg_context->u.bulk.status = 0; +- +- /* schedule the port callback */ +- schedule_work(&msg_context->u.bulk.work); +-} +- +-static void bulk_abort_cb(struct vchiq_mmal_instance *instance, +- struct mmal_msg_context *msg_context) +-{ +- pr_err("%s: bulk ABORTED msg_context:%p\n", __func__, msg_context); +- +- msg_context->u.bulk.status = -EINTR; +- +- schedule_work(&msg_context->u.bulk.work); +-} +- +-/* incoming event service callback */ +-static void service_callback(void *param, +- const VCHI_CALLBACK_REASON_T reason, +- void *bulk_ctx) +-{ +- struct vchiq_mmal_instance *instance = param; +- int status; +- u32 msg_len; +- struct mmal_msg *msg; +- VCHI_HELD_MSG_T msg_handle; +- struct mmal_msg_context *msg_context; +- +- if (!instance) { +- pr_err("Message callback passed NULL instance\n"); +- return; +- } +- +- switch (reason) { +- case VCHI_CALLBACK_MSG_AVAILABLE: +- status = vchi_msg_hold(instance->handle, (void **)&msg, +- &msg_len, VCHI_FLAGS_NONE, &msg_handle); +- if (status) { +- pr_err("Unable to dequeue a message (%d)\n", status); +- break; +- } +- +- DBG_DUMP_MSG(msg, msg_len, "<<< reply message"); +- +- /* handling is different for buffer messages */ +- switch (msg->h.type) { +- case MMAL_MSG_TYPE_BUFFER_FROM_HOST: +- vchi_held_msg_release(&msg_handle); +- break; +- +- case MMAL_MSG_TYPE_EVENT_TO_HOST: +- event_to_host_cb(instance, msg, msg_len); +- vchi_held_msg_release(&msg_handle); +- +- break; +- +- case MMAL_MSG_TYPE_BUFFER_TO_HOST: +- buffer_to_host_cb(instance, msg, msg_len); +- vchi_held_msg_release(&msg_handle); +- break; +- +- default: +- /* messages dependent on header context to complete */ +- if (!msg->h.context) { +- pr_err("received message context was null!\n"); +- vchi_held_msg_release(&msg_handle); +- break; +- } +- +- msg_context = lookup_msg_context(instance, +- msg->h.context); +- if (!msg_context) { +- pr_err("received invalid message context %u!\n", +- msg->h.context); +- vchi_held_msg_release(&msg_handle); +- break; +- } +- +- /* fill in context values */ +- msg_context->u.sync.msg_handle = msg_handle; +- msg_context->u.sync.msg = msg; +- msg_context->u.sync.msg_len = msg_len; +- +- /* todo: should this check (completion_done() +- * == 1) for no one waiting? or do we need a +- * flag to tell us the completion has been +- * interrupted so we can free the message and +- * its context. This probably also solves the +- * message arriving after interruption todo +- * below +- */ +- +- /* complete message so caller knows it happened */ +- complete(&msg_context->u.sync.cmplt); +- break; +- } +- +- break; +- +- case VCHI_CALLBACK_BULK_RECEIVED: +- bulk_receive_cb(instance, bulk_ctx); +- break; +- +- case VCHI_CALLBACK_BULK_RECEIVE_ABORTED: +- bulk_abort_cb(instance, bulk_ctx); +- break; +- +- case VCHI_CALLBACK_SERVICE_CLOSED: +- /* TODO: consider if this requires action if received when +- * driver is not explicitly closing the service +- */ +- break; +- +- default: +- pr_err("Received unhandled message reason %d\n", reason); +- break; +- } +-} +- +-static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, +- unsigned int payload_len, +- struct mmal_msg **msg_out, +- VCHI_HELD_MSG_T *msg_handle_out) +-{ +- struct mmal_msg_context *msg_context; +- int ret; +- unsigned long timeout; +- +- /* payload size must not cause message to exceed max size */ +- if (payload_len > +- (MMAL_MSG_MAX_SIZE - sizeof(struct mmal_msg_header))) { +- pr_err("payload length %d exceeds max:%d\n", payload_len, +- (int)(MMAL_MSG_MAX_SIZE - +- sizeof(struct mmal_msg_header))); +- return -EINVAL; +- } +- +- msg_context = get_msg_context(instance); +- if (IS_ERR(msg_context)) +- return PTR_ERR(msg_context); +- +- init_completion(&msg_context->u.sync.cmplt); +- +- msg->h.magic = MMAL_MAGIC; +- msg->h.context = msg_context->handle; +- msg->h.status = 0; +- +- DBG_DUMP_MSG(msg, (sizeof(struct mmal_msg_header) + payload_len), +- ">>> sync message"); +- +- vchi_service_use(instance->handle); +- +- ret = vchi_queue_kernel_message(instance->handle, +- msg, +- sizeof(struct mmal_msg_header) + +- payload_len); +- +- vchi_service_release(instance->handle); +- +- if (ret) { +- pr_err("error %d queuing message\n", ret); +- release_msg_context(msg_context); +- return ret; +- } +- +- timeout = wait_for_completion_timeout(&msg_context->u.sync.cmplt, +- 3 * HZ); +- if (timeout == 0) { +- pr_err("timed out waiting for sync completion\n"); +- ret = -ETIME; +- /* todo: what happens if the message arrives after aborting */ +- release_msg_context(msg_context); +- return ret; +- } +- +- *msg_out = msg_context->u.sync.msg; +- *msg_handle_out = msg_context->u.sync.msg_handle; +- release_msg_context(msg_context); +- +- return 0; +-} +- +-static void dump_port_info(struct vchiq_mmal_port *port) +-{ +- pr_debug("port handle:0x%x enabled:%d\n", port->handle, port->enabled); +- +- pr_debug("buffer minimum num:%d size:%d align:%d\n", +- port->minimum_buffer.num, +- port->minimum_buffer.size, port->minimum_buffer.alignment); +- +- pr_debug("buffer recommended num:%d size:%d align:%d\n", +- port->recommended_buffer.num, +- port->recommended_buffer.size, +- port->recommended_buffer.alignment); +- +- pr_debug("buffer current values num:%d size:%d align:%d\n", +- port->current_buffer.num, +- port->current_buffer.size, port->current_buffer.alignment); +- +- pr_debug("elementary stream: type:%d encoding:0x%x variant:0x%x\n", +- port->format.type, +- port->format.encoding, port->format.encoding_variant); +- +- pr_debug(" bitrate:%d flags:0x%x\n", +- port->format.bitrate, port->format.flags); +- +- if (port->format.type == MMAL_ES_TYPE_VIDEO) { +- pr_debug +- ("es video format: width:%d height:%d colourspace:0x%x\n", +- port->es.video.width, port->es.video.height, +- port->es.video.color_space); +- +- pr_debug(" : crop xywh %d,%d,%d,%d\n", +- port->es.video.crop.x, +- port->es.video.crop.y, +- port->es.video.crop.width, port->es.video.crop.height); +- pr_debug(" : framerate %d/%d aspect %d/%d\n", +- port->es.video.frame_rate.num, +- port->es.video.frame_rate.den, +- port->es.video.par.num, port->es.video.par.den); +- } +-} +- +-static void port_to_mmal_msg(struct vchiq_mmal_port *port, struct mmal_port *p) +-{ +- /* todo do readonly fields need setting at all? */ +- p->type = port->type; +- p->index = port->index; +- p->index_all = 0; +- p->is_enabled = port->enabled; +- p->buffer_num_min = port->minimum_buffer.num; +- p->buffer_size_min = port->minimum_buffer.size; +- p->buffer_alignment_min = port->minimum_buffer.alignment; +- p->buffer_num_recommended = port->recommended_buffer.num; +- p->buffer_size_recommended = port->recommended_buffer.size; +- +- /* only three writable fields in a port */ +- p->buffer_num = port->current_buffer.num; +- p->buffer_size = port->current_buffer.size; +- p->userdata = (u32)(unsigned long)port; +-} +- +-static int port_info_set(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- pr_debug("setting port info port %p\n", port); +- if (!port) +- return -1; +- dump_port_info(port); +- +- m.h.type = MMAL_MSG_TYPE_PORT_INFO_SET; +- +- m.u.port_info_set.component_handle = port->component->handle; +- m.u.port_info_set.port_type = port->type; +- m.u.port_info_set.port_index = port->index; +- +- port_to_mmal_msg(port, &m.u.port_info_set.port); +- +- /* elementary stream format setup */ +- m.u.port_info_set.format.type = port->format.type; +- m.u.port_info_set.format.encoding = port->format.encoding; +- m.u.port_info_set.format.encoding_variant = +- port->format.encoding_variant; +- m.u.port_info_set.format.bitrate = port->format.bitrate; +- m.u.port_info_set.format.flags = port->format.flags; +- +- memcpy(&m.u.port_info_set.es, &port->es, +- sizeof(union mmal_es_specific_format)); +- +- m.u.port_info_set.format.extradata_size = port->format.extradata_size; +- memcpy(&m.u.port_info_set.extradata, port->format.extradata, +- port->format.extradata_size); +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.port_info_set), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_SET) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- /* return operation status */ +- ret = -rmsg->u.port_info_get_reply.status; +- +- pr_debug("%s:result:%d component:0x%x port:%d\n", __func__, ret, +- port->component->handle, port->handle); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* use port info get message to retrieve port information */ +-static int port_info_get(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- /* port info time */ +- m.h.type = MMAL_MSG_TYPE_PORT_INFO_GET; +- m.u.port_info_get.component_handle = port->component->handle; +- m.u.port_info_get.port_type = port->type; +- m.u.port_info_get.index = port->index; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.port_info_get), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_GET) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- /* return operation status */ +- ret = -rmsg->u.port_info_get_reply.status; +- if (ret != MMAL_MSG_STATUS_SUCCESS) +- goto release_msg; +- +- if (rmsg->u.port_info_get_reply.port.is_enabled == 0) +- port->enabled = false; +- else +- port->enabled = true; +- +- /* copy the values out of the message */ +- port->handle = rmsg->u.port_info_get_reply.port_handle; +- +- /* port type and index cached to use on port info set because +- * it does not use a port handle +- */ +- port->type = rmsg->u.port_info_get_reply.port_type; +- port->index = rmsg->u.port_info_get_reply.port_index; +- +- port->minimum_buffer.num = +- rmsg->u.port_info_get_reply.port.buffer_num_min; +- port->minimum_buffer.size = +- rmsg->u.port_info_get_reply.port.buffer_size_min; +- port->minimum_buffer.alignment = +- rmsg->u.port_info_get_reply.port.buffer_alignment_min; +- +- port->recommended_buffer.alignment = +- rmsg->u.port_info_get_reply.port.buffer_alignment_min; +- port->recommended_buffer.num = +- rmsg->u.port_info_get_reply.port.buffer_num_recommended; +- +- port->current_buffer.num = rmsg->u.port_info_get_reply.port.buffer_num; +- port->current_buffer.size = +- rmsg->u.port_info_get_reply.port.buffer_size; +- +- /* stream format */ +- port->format.type = rmsg->u.port_info_get_reply.format.type; +- port->format.encoding = rmsg->u.port_info_get_reply.format.encoding; +- port->format.encoding_variant = +- rmsg->u.port_info_get_reply.format.encoding_variant; +- port->format.bitrate = rmsg->u.port_info_get_reply.format.bitrate; +- port->format.flags = rmsg->u.port_info_get_reply.format.flags; +- +- /* elementary stream format */ +- memcpy(&port->es, +- &rmsg->u.port_info_get_reply.es, +- sizeof(union mmal_es_specific_format)); +- port->format.es = &port->es; +- +- port->format.extradata_size = +- rmsg->u.port_info_get_reply.format.extradata_size; +- memcpy(port->format.extradata, +- rmsg->u.port_info_get_reply.extradata, +- port->format.extradata_size); +- +- pr_debug("received port info\n"); +- dump_port_info(port); +- +-release_msg: +- +- pr_debug("%s:result:%d component:0x%x port:%d\n", +- __func__, ret, port->component->handle, port->handle); +- +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* create comonent on vc */ +-static int create_component(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component, +- const char *name) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- /* build component create message */ +- m.h.type = MMAL_MSG_TYPE_COMPONENT_CREATE; +- m.u.component_create.client_component = (u32)(unsigned long)component; +- strncpy(m.u.component_create.name, name, +- sizeof(m.u.component_create.name)); +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.component_create), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != m.h.type) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.component_create_reply.status; +- if (ret != MMAL_MSG_STATUS_SUCCESS) +- goto release_msg; +- +- /* a valid component response received */ +- component->handle = rmsg->u.component_create_reply.component_handle; +- component->inputs = rmsg->u.component_create_reply.input_num; +- component->outputs = rmsg->u.component_create_reply.output_num; +- component->clocks = rmsg->u.component_create_reply.clock_num; +- +- pr_debug("Component handle:0x%x in:%d out:%d clock:%d\n", +- component->handle, +- component->inputs, component->outputs, component->clocks); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* destroys a component on vc */ +-static int destroy_component(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_COMPONENT_DESTROY; +- m.u.component_destroy.component_handle = component->handle; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.component_destroy), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != m.h.type) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.component_destroy_reply.status; +- +-release_msg: +- +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* enable a component on vc */ +-static int enable_component(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_COMPONENT_ENABLE; +- m.u.component_enable.component_handle = component->handle; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.component_enable), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != m.h.type) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.component_enable_reply.status; +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* disable a component on vc */ +-static int disable_component(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_COMPONENT_DISABLE; +- m.u.component_disable.component_handle = component->handle; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.component_disable), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != m.h.type) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.component_disable_reply.status; +- +-release_msg: +- +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* get version of mmal implementation */ +-static int get_version(struct vchiq_mmal_instance *instance, +- u32 *major_out, u32 *minor_out) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_GET_VERSION; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.version), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != m.h.type) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- *major_out = rmsg->u.version.major; +- *minor_out = rmsg->u.version.minor; +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* do a port action with a port as a parameter */ +-static int port_action_port(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- enum mmal_msg_port_action_type action_type) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_PORT_ACTION; +- m.u.port_action_port.component_handle = port->component->handle; +- m.u.port_action_port.port_handle = port->handle; +- m.u.port_action_port.action = action_type; +- +- port_to_mmal_msg(port, &m.u.port_action_port.port); +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.port_action_port), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.port_action_reply.status; +- +- pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d)\n", +- __func__, +- ret, port->component->handle, port->handle, +- port_action_type_names[action_type], action_type); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* do a port action with handles as parameters */ +-static int port_action_handle(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- enum mmal_msg_port_action_type action_type, +- u32 connect_component_handle, +- u32 connect_port_handle) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_PORT_ACTION; +- +- m.u.port_action_handle.component_handle = port->component->handle; +- m.u.port_action_handle.port_handle = port->handle; +- m.u.port_action_handle.action = action_type; +- +- m.u.port_action_handle.connect_component_handle = +- connect_component_handle; +- m.u.port_action_handle.connect_port_handle = connect_port_handle; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(m.u.port_action_handle), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.port_action_reply.status; +- +- pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d) connect component:0x%x connect port:%d\n", +- __func__, +- ret, port->component->handle, port->handle, +- port_action_type_names[action_type], +- action_type, connect_component_handle, connect_port_handle); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-static int port_parameter_set(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter_id, void *value, u32 value_size) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_SET; +- +- m.u.port_parameter_set.component_handle = port->component->handle; +- m.u.port_parameter_set.port_handle = port->handle; +- m.u.port_parameter_set.id = parameter_id; +- m.u.port_parameter_set.size = (2 * sizeof(u32)) + value_size; +- memcpy(&m.u.port_parameter_set.value, value, value_size); +- +- ret = send_synchronous_mmal_msg(instance, &m, +- (4 * sizeof(u32)) + value_size, +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_SET) { +- /* got an unexpected message type in reply */ +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.port_parameter_set_reply.status; +- +- pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", +- __func__, +- ret, port->component->handle, port->handle, parameter_id); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-static int port_parameter_get(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter_id, void *value, u32 *value_size) +-{ +- int ret; +- struct mmal_msg m; +- struct mmal_msg *rmsg; +- VCHI_HELD_MSG_T rmsg_handle; +- +- m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_GET; +- +- m.u.port_parameter_get.component_handle = port->component->handle; +- m.u.port_parameter_get.port_handle = port->handle; +- m.u.port_parameter_get.id = parameter_id; +- m.u.port_parameter_get.size = (2 * sizeof(u32)) + *value_size; +- +- ret = send_synchronous_mmal_msg(instance, &m, +- sizeof(struct +- mmal_msg_port_parameter_get), +- &rmsg, &rmsg_handle); +- if (ret) +- return ret; +- +- if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_GET) { +- /* got an unexpected message type in reply */ +- pr_err("Incorrect reply type %d\n", rmsg->h.type); +- ret = -EINVAL; +- goto release_msg; +- } +- +- ret = -rmsg->u.port_parameter_get_reply.status; +- /* port_parameter_get_reply.size includes the header, +- * whilst *value_size doesn't. +- */ +- rmsg->u.port_parameter_get_reply.size -= (2 * sizeof(u32)); +- +- if (ret || rmsg->u.port_parameter_get_reply.size > *value_size) { +- /* Copy only as much as we have space for +- * but report true size of parameter +- */ +- memcpy(value, &rmsg->u.port_parameter_get_reply.value, +- *value_size); +- *value_size = rmsg->u.port_parameter_get_reply.size; +- } else { +- memcpy(value, &rmsg->u.port_parameter_get_reply.value, +- rmsg->u.port_parameter_get_reply.size); +- } +- +- pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", __func__, +- ret, port->component->handle, port->handle, parameter_id); +- +-release_msg: +- vchi_held_msg_release(&rmsg_handle); +- +- return ret; +-} +- +-/* disables a port and drains buffers from it */ +-static int port_disable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- int ret; +- struct list_head *q, *buf_head; +- unsigned long flags = 0; +- +- if (!port->enabled) +- return 0; +- +- port->enabled = false; +- +- ret = port_action_port(instance, port, +- MMAL_MSG_PORT_ACTION_TYPE_DISABLE); +- if (ret == 0) { +- /* +- * Drain all queued buffers on port. This should only +- * apply to buffers that have been queued before the port +- * has been enabled. If the port has been enabled and buffers +- * passed, then the buffers should have been removed from this +- * list, and we should get the relevant callbacks via VCHIQ +- * to release the buffers. +- */ +- spin_lock_irqsave(&port->slock, flags); +- +- list_for_each_safe(buf_head, q, &port->buffers) { +- struct mmal_buffer *mmalbuf; +- +- mmalbuf = list_entry(buf_head, struct mmal_buffer, +- list); +- list_del(buf_head); +- if (port->buffer_cb) +- port->buffer_cb(instance, +- port, 0, mmalbuf, 0, 0, +- MMAL_TIME_UNKNOWN, +- MMAL_TIME_UNKNOWN); +- } +- +- spin_unlock_irqrestore(&port->slock, flags); +- +- ret = port_info_get(instance, port); +- } +- +- return ret; +-} +- +-/* enable a port */ +-static int port_enable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- unsigned int hdr_count; +- struct list_head *q, *buf_head; +- int ret; +- +- if (port->enabled) +- return 0; +- +- ret = port_action_port(instance, port, +- MMAL_MSG_PORT_ACTION_TYPE_ENABLE); +- if (ret) +- goto done; +- +- port->enabled = true; +- +- if (port->buffer_cb) { +- /* send buffer headers to videocore */ +- hdr_count = 1; +- list_for_each_safe(buf_head, q, &port->buffers) { +- struct mmal_buffer *mmalbuf; +- +- mmalbuf = list_entry(buf_head, struct mmal_buffer, +- list); +- ret = buffer_from_host(instance, port, mmalbuf); +- if (ret) +- goto done; +- +- list_del(buf_head); +- hdr_count++; +- if (hdr_count > port->current_buffer.num) +- break; +- } +- } +- +- ret = port_info_get(instance, port); +- +-done: +- return ret; +-} +- +-/* ------------------------------------------------------------------ +- * Exported API +- *------------------------------------------------------------------ +- */ +- +-int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- ret = port_info_set(instance, port); +- if (ret) +- goto release_unlock; +- +- /* read what has actually been set */ +- ret = port_info_get(instance, port); +- +-release_unlock: +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter, void *value, u32 value_size) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- ret = port_parameter_set(instance, port, parameter, value, value_size); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter, void *value, u32 *value_size) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- ret = port_parameter_get(instance, port, parameter, value, value_size); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-/* enable a port +- * +- * enables a port and queues buffers for satisfying callbacks if we +- * provide a callback handler +- */ +-int vchiq_mmal_port_enable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- vchiq_mmal_buffer_cb buffer_cb) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- /* already enabled - noop */ +- if (port->enabled) { +- ret = 0; +- goto unlock; +- } +- +- port->buffer_cb = buffer_cb; +- +- ret = port_enable(instance, port); +- +-unlock: +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- if (!port->enabled) { +- mutex_unlock(&instance->vchiq_mutex); +- return 0; +- } +- +- ret = port_disable(instance, port); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-/* ports will be connected in a tunneled manner so data buffers +- * are not handled by client. +- */ +-int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *src, +- struct vchiq_mmal_port *dst) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- /* disconnect ports if connected */ +- if (src->connected) { +- ret = port_disable(instance, src); +- if (ret) { +- pr_err("failed disabling src port(%d)\n", ret); +- goto release_unlock; +- } +- +- /* do not need to disable the destination port as they +- * are connected and it is done automatically +- */ +- +- ret = port_action_handle(instance, src, +- MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, +- src->connected->component->handle, +- src->connected->handle); +- if (ret < 0) { +- pr_err("failed disconnecting src port\n"); +- goto release_unlock; +- } +- src->connected->enabled = false; +- src->connected = NULL; +- } +- +- if (!dst) { +- /* do not make new connection */ +- ret = 0; +- pr_debug("not making new connection\n"); +- goto release_unlock; +- } +- +- /* copy src port format to dst */ +- dst->format.encoding = src->format.encoding; +- dst->es.video.width = src->es.video.width; +- dst->es.video.height = src->es.video.height; +- dst->es.video.crop.x = src->es.video.crop.x; +- dst->es.video.crop.y = src->es.video.crop.y; +- dst->es.video.crop.width = src->es.video.crop.width; +- dst->es.video.crop.height = src->es.video.crop.height; +- dst->es.video.frame_rate.num = src->es.video.frame_rate.num; +- dst->es.video.frame_rate.den = src->es.video.frame_rate.den; +- +- /* set new format */ +- ret = port_info_set(instance, dst); +- if (ret) { +- pr_debug("setting port info failed\n"); +- goto release_unlock; +- } +- +- /* read what has actually been set */ +- ret = port_info_get(instance, dst); +- if (ret) { +- pr_debug("read back port info failed\n"); +- goto release_unlock; +- } +- +- /* connect two ports together */ +- ret = port_action_handle(instance, src, +- MMAL_MSG_PORT_ACTION_TYPE_CONNECT, +- dst->component->handle, dst->handle); +- if (ret < 0) { +- pr_debug("connecting port %d:%d to %d:%d failed\n", +- src->component->handle, src->handle, +- dst->component->handle, dst->handle); +- goto release_unlock; +- } +- src->connected = dst; +- +-release_unlock: +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- struct mmal_buffer *buffer) +-{ +- unsigned long flags = 0; +- int ret; +- +- ret = buffer_from_host(instance, port, buffer); +- if (ret == -EINVAL) { +- /* Port is disabled. Queue for when it is enabled. */ +- spin_lock_irqsave(&port->slock, flags); +- list_add_tail(&buffer->list, &port->buffers); +- spin_unlock_irqrestore(&port->slock, flags); +- } +- +- return 0; +-} +- +-int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance, +- struct mmal_buffer *buf) +-{ +- struct mmal_msg_context *msg_context = get_msg_context(instance); +- +- if (IS_ERR(msg_context)) +- return (PTR_ERR(msg_context)); +- +- buf->msg_context = msg_context; +- return 0; +-} +- +-int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) +-{ +- struct mmal_msg_context *msg_context = buf->msg_context; +- +- if (msg_context) +- release_msg_context(msg_context); +- buf->msg_context = NULL; +- +- return 0; +-} +- +-/* Initialise a mmal component and its ports +- * +- */ +-int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, +- const char *name, +- struct vchiq_mmal_component **component_out) +-{ +- int ret; +- int idx; /* port index */ +- struct vchiq_mmal_component *component; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- if (instance->component_idx == VCHIQ_MMAL_MAX_COMPONENTS) { +- ret = -EINVAL; /* todo is this correct error? */ +- goto unlock; +- } +- +- component = &instance->component[instance->component_idx]; +- +- ret = create_component(instance, component, name); +- if (ret < 0) { +- pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", +- __func__, ret); +- goto unlock; +- } +- +- /* ports info needs gathering */ +- component->control.type = MMAL_PORT_TYPE_CONTROL; +- component->control.index = 0; +- component->control.component = component; +- spin_lock_init(&component->control.slock); +- INIT_LIST_HEAD(&component->control.buffers); +- ret = port_info_get(instance, &component->control); +- if (ret < 0) +- goto release_component; +- +- for (idx = 0; idx < component->inputs; idx++) { +- component->input[idx].type = MMAL_PORT_TYPE_INPUT; +- component->input[idx].index = idx; +- component->input[idx].component = component; +- spin_lock_init(&component->input[idx].slock); +- INIT_LIST_HEAD(&component->input[idx].buffers); +- ret = port_info_get(instance, &component->input[idx]); +- if (ret < 0) +- goto release_component; +- } +- +- for (idx = 0; idx < component->outputs; idx++) { +- component->output[idx].type = MMAL_PORT_TYPE_OUTPUT; +- component->output[idx].index = idx; +- component->output[idx].component = component; +- spin_lock_init(&component->output[idx].slock); +- INIT_LIST_HEAD(&component->output[idx].buffers); +- ret = port_info_get(instance, &component->output[idx]); +- if (ret < 0) +- goto release_component; +- } +- +- for (idx = 0; idx < component->clocks; idx++) { +- component->clock[idx].type = MMAL_PORT_TYPE_CLOCK; +- component->clock[idx].index = idx; +- component->clock[idx].component = component; +- spin_lock_init(&component->clock[idx].slock); +- INIT_LIST_HEAD(&component->clock[idx].buffers); +- ret = port_info_get(instance, &component->clock[idx]); +- if (ret < 0) +- goto release_component; +- } +- +- instance->component_idx++; +- +- *component_out = component; +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return 0; +- +-release_component: +- destroy_component(instance, component); +-unlock: +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-/* +- * cause a mmal component to be destroyed +- */ +-int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- if (component->enabled) +- ret = disable_component(instance, component); +- +- ret = destroy_component(instance, component); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-/* +- * cause a mmal component to be enabled +- */ +-int vchiq_mmal_component_enable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- if (component->enabled) { +- mutex_unlock(&instance->vchiq_mutex); +- return 0; +- } +- +- ret = enable_component(instance, component); +- if (ret == 0) +- component->enabled = true; +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-/* +- * cause a mmal component to be enabled +- */ +-int vchiq_mmal_component_disable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- if (!component->enabled) { +- mutex_unlock(&instance->vchiq_mutex); +- return 0; +- } +- +- ret = disable_component(instance, component); +- if (ret == 0) +- component->enabled = false; +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_version(struct vchiq_mmal_instance *instance, +- u32 *major_out, u32 *minor_out) +-{ +- int ret; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- ret = get_version(instance, major_out, minor_out); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- return ret; +-} +- +-int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance) +-{ +- int status = 0; +- +- if (!instance) +- return -EINVAL; +- +- if (mutex_lock_interruptible(&instance->vchiq_mutex)) +- return -EINTR; +- +- vchi_service_use(instance->handle); +- +- status = vchi_service_close(instance->handle); +- if (status != 0) +- pr_err("mmal-vchiq: VCHIQ close failed\n"); +- +- mutex_unlock(&instance->vchiq_mutex); +- +- flush_workqueue(instance->bulk_wq); +- destroy_workqueue(instance->bulk_wq); +- +- vfree(instance->bulk_scratch); +- +- idr_destroy(&instance->context_map); +- +- kfree(instance); +- +- return status; +-} +- +-int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) +-{ +- int status; +- struct vchiq_mmal_instance *instance; +- static VCHI_CONNECTION_T *vchi_connection; +- static VCHI_INSTANCE_T vchi_instance; +- SERVICE_CREATION_T params = { +- .version = VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), +- .service_id = VC_MMAL_SERVER_NAME, +- .connection = vchi_connection, +- .rx_fifo_size = 0, +- .tx_fifo_size = 0, +- .callback = service_callback, +- .callback_param = NULL, +- .want_unaligned_bulk_rx = 1, +- .want_unaligned_bulk_tx = 1, +- .want_crc = 0 +- }; +- +- /* compile time checks to ensure structure size as they are +- * directly (de)serialised from memory. +- */ +- +- /* ensure the header structure has packed to the correct size */ +- BUILD_BUG_ON(sizeof(struct mmal_msg_header) != 24); +- +- /* ensure message structure does not exceed maximum length */ +- BUILD_BUG_ON(sizeof(struct mmal_msg) > MMAL_MSG_MAX_SIZE); +- +- /* mmal port struct is correct size */ +- BUILD_BUG_ON(sizeof(struct mmal_port) != 64); +- +- /* create a vchi instance */ +- status = vchi_initialise(&vchi_instance); +- if (status) { +- pr_err("Failed to initialise VCHI instance (status=%d)\n", +- status); +- return -EIO; +- } +- +- status = vchi_connect(NULL, 0, vchi_instance); +- if (status) { +- pr_err("Failed to connect VCHI instance (status=%d)\n", status); +- return -EIO; +- } +- +- instance = kzalloc(sizeof(*instance), GFP_KERNEL); +- +- if (!instance) +- return -ENOMEM; +- +- mutex_init(&instance->vchiq_mutex); +- +- instance->bulk_scratch = vmalloc(PAGE_SIZE); +- +- spin_lock_init(&instance->context_map_lock); +- idr_init_base(&instance->context_map, 1); +- +- params.callback_param = instance; +- +- instance->bulk_wq = alloc_ordered_workqueue("mmal-vchiq", +- WQ_MEM_RECLAIM); +- if (!instance->bulk_wq) +- goto err_free; +- +- status = vchi_service_open(vchi_instance, ¶ms, &instance->handle); +- if (status) { +- pr_err("Failed to open VCHI service connection (status=%d)\n", +- status); +- goto err_close_services; +- } +- +- vchi_service_release(instance->handle); +- +- *out_instance = instance; +- +- return 0; +- +-err_close_services: +- vchi_service_close(instance->handle); +- destroy_workqueue(instance->bulk_wq); +-err_free: +- vfree(instance->bulk_scratch); +- kfree(instance); +- return -ENODEV; +-} +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -0,0 +1,1920 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ * ++ * V4L2 driver MMAL vchiq interface code ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "mmal-common.h" ++#include "mmal-vchiq.h" ++#include "mmal-msg.h" ++ ++#define USE_VCHIQ_ARM ++#include "interface/vchi/vchi.h" ++ ++MODULE_DESCRIPTION("BCM2835 MMAL VCHIQ interface"); ++MODULE_AUTHOR("Dave Stevenson, "); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION("0.0.1"); ++ ++/* maximum number of components supported */ ++#define VCHIQ_MMAL_MAX_COMPONENTS 4 ++ ++/*#define FULL_MSG_DUMP 1*/ ++ ++#ifdef DEBUG ++static const char *const msg_type_names[] = { ++ "UNKNOWN", ++ "QUIT", ++ "SERVICE_CLOSED", ++ "GET_VERSION", ++ "COMPONENT_CREATE", ++ "COMPONENT_DESTROY", ++ "COMPONENT_ENABLE", ++ "COMPONENT_DISABLE", ++ "PORT_INFO_GET", ++ "PORT_INFO_SET", ++ "PORT_ACTION", ++ "BUFFER_FROM_HOST", ++ "BUFFER_TO_HOST", ++ "GET_STATS", ++ "PORT_PARAMETER_SET", ++ "PORT_PARAMETER_GET", ++ "EVENT_TO_HOST", ++ "GET_CORE_STATS_FOR_PORT", ++ "OPAQUE_ALLOCATOR", ++ "CONSUME_MEM", ++ "LMK", ++ "OPAQUE_ALLOCATOR_DESC", ++ "DRM_GET_LHS32", ++ "DRM_GET_TIME", ++ "BUFFER_FROM_HOST_ZEROLEN", ++ "PORT_FLUSH", ++ "HOST_LOG", ++}; ++#endif ++ ++static const char *const port_action_type_names[] = { ++ "UNKNOWN", ++ "ENABLE", ++ "DISABLE", ++ "FLUSH", ++ "CONNECT", ++ "DISCONNECT", ++ "SET_REQUIREMENTS", ++}; ++ ++#if defined(DEBUG) ++#if defined(FULL_MSG_DUMP) ++#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) \ ++ do { \ ++ pr_debug(TITLE" type:%s(%d) length:%d\n", \ ++ msg_type_names[(MSG)->h.type], \ ++ (MSG)->h.type, (MSG_LEN)); \ ++ print_hex_dump(KERN_DEBUG, "<h.type], \ ++ (MSG)->h.type, (MSG_LEN)); \ ++ } ++#endif ++#else ++#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) ++#endif ++ ++struct vchiq_mmal_instance; ++ ++/* normal message context */ ++struct mmal_msg_context { ++ struct vchiq_mmal_instance *instance; ++ ++ /* Index in the context_map idr so that we can find the ++ * mmal_msg_context again when servicing the VCHI reply. ++ */ ++ int handle; ++ ++ union { ++ struct { ++ /* work struct for buffer_cb callback */ ++ struct work_struct work; ++ /* work struct for deferred callback */ ++ struct work_struct buffer_to_host_work; ++ /* mmal instance */ ++ struct vchiq_mmal_instance *instance; ++ /* mmal port */ ++ struct vchiq_mmal_port *port; ++ /* actual buffer used to store bulk reply */ ++ struct mmal_buffer *buffer; ++ /* amount of buffer used */ ++ unsigned long buffer_used; ++ /* MMAL buffer flags */ ++ u32 mmal_flags; ++ /* Presentation and Decode timestamps */ ++ s64 pts; ++ s64 dts; ++ ++ int status; /* context status */ ++ ++ } bulk; /* bulk data */ ++ ++ struct { ++ /* message handle to release */ ++ VCHI_HELD_MSG_T msg_handle; ++ /* pointer to received message */ ++ struct mmal_msg *msg; ++ /* received message length */ ++ u32 msg_len; ++ /* completion upon reply */ ++ struct completion cmplt; ++ } sync; /* synchronous response */ ++ } u; ++ ++}; ++ ++struct vchiq_mmal_instance { ++ VCHI_SERVICE_HANDLE_T handle; ++ ++ /* ensure serialised access to service */ ++ struct mutex vchiq_mutex; ++ ++ /* vmalloc page to receive scratch bulk xfers into */ ++ void *bulk_scratch; ++ ++ struct idr context_map; ++ spinlock_t context_map_lock; ++ ++ /* component to use next */ ++ int component_idx; ++ struct vchiq_mmal_component component[VCHIQ_MMAL_MAX_COMPONENTS]; ++ ++ /* ordered workqueue to process all bulk operations */ ++ struct workqueue_struct *bulk_wq; ++}; ++ ++static struct mmal_msg_context * ++get_msg_context(struct vchiq_mmal_instance *instance) ++{ ++ struct mmal_msg_context *msg_context; ++ int handle; ++ ++ /* todo: should this be allocated from a pool to avoid kzalloc */ ++ msg_context = kzalloc(sizeof(*msg_context), GFP_KERNEL); ++ ++ if (!msg_context) ++ return ERR_PTR(-ENOMEM); ++ ++ /* Create an ID that will be passed along with our message so ++ * that when we service the VCHI reply, we can look up what ++ * message is being replied to. ++ */ ++ spin_lock(&instance->context_map_lock); ++ handle = idr_alloc(&instance->context_map, msg_context, ++ 0, 0, GFP_KERNEL); ++ spin_unlock(&instance->context_map_lock); ++ ++ if (handle < 0) { ++ kfree(msg_context); ++ return ERR_PTR(handle); ++ } ++ ++ msg_context->instance = instance; ++ msg_context->handle = handle; ++ ++ return msg_context; ++} ++ ++static struct mmal_msg_context * ++lookup_msg_context(struct vchiq_mmal_instance *instance, int handle) ++{ ++ return idr_find(&instance->context_map, handle); ++} ++ ++static void ++release_msg_context(struct mmal_msg_context *msg_context) ++{ ++ struct vchiq_mmal_instance *instance = msg_context->instance; ++ ++ spin_lock(&instance->context_map_lock); ++ idr_remove(&instance->context_map, msg_context->handle); ++ spin_unlock(&instance->context_map_lock); ++ kfree(msg_context); ++} ++ ++/* deals with receipt of event to host message */ ++static void event_to_host_cb(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, u32 msg_len) ++{ ++ pr_debug("unhandled event\n"); ++ pr_debug("component:%u port type:%d num:%d cmd:0x%x length:%d\n", ++ msg->u.event_to_host.client_component, ++ msg->u.event_to_host.port_type, ++ msg->u.event_to_host.port_num, ++ msg->u.event_to_host.cmd, msg->u.event_to_host.length); ++} ++ ++/* workqueue scheduled callback ++ * ++ * we do this because it is important we do not call any other vchiq ++ * sync calls from witin the message delivery thread ++ */ ++static void buffer_work_cb(struct work_struct *work) ++{ ++ struct mmal_msg_context *msg_context = ++ container_of(work, struct mmal_msg_context, u.bulk.work); ++ ++ atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); ++ ++ msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, ++ msg_context->u.bulk.port, ++ msg_context->u.bulk.status, ++ msg_context->u.bulk.buffer, ++ msg_context->u.bulk.buffer_used, ++ msg_context->u.bulk.mmal_flags, ++ msg_context->u.bulk.dts, ++ msg_context->u.bulk.pts); ++} ++ ++/* workqueue scheduled callback to handle receiving buffers ++ * ++ * VCHI will allow up to 4 bulk receives to be scheduled before blocking. ++ * If we block in the service_callback context then we can't process the ++ * VCHI_CALLBACK_BULK_RECEIVED message that would otherwise allow the blocked ++ * vchi_bulk_queue_receive() call to complete. ++ */ ++static void buffer_to_host_work_cb(struct work_struct *work) ++{ ++ struct mmal_msg_context *msg_context = ++ container_of(work, struct mmal_msg_context, ++ u.bulk.buffer_to_host_work); ++ struct vchiq_mmal_instance *instance = msg_context->instance; ++ unsigned long len = msg_context->u.bulk.buffer_used; ++ int ret; ++ ++ if (!len) ++ /* Dummy receive to ensure the buffers remain in order */ ++ len = 8; ++ /* queue the bulk submission */ ++ vchi_service_use(instance->handle); ++ ret = vchi_bulk_queue_receive(instance->handle, ++ msg_context->u.bulk.buffer->buffer, ++ /* Actual receive needs to be a multiple ++ * of 4 bytes ++ */ ++ (len + 3) & ~3, ++ VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, ++ msg_context); ++ ++ vchi_service_release(instance->handle); ++ ++ if (ret != 0) ++ pr_err("%s: ctx: %p, vchi_bulk_queue_receive failed %d\n", ++ __func__, msg_context, ret); ++} ++ ++/* enqueue a bulk receive for a given message context */ ++static int bulk_receive(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, ++ struct mmal_msg_context *msg_context) ++{ ++ unsigned long rd_len; ++ ++ rd_len = msg->u.buffer_from_host.buffer_header.length; ++ ++ if (!msg_context->u.bulk.buffer) { ++ pr_err("bulk.buffer not configured - error in buffer_from_host\n"); ++ ++ /* todo: this is a serious error, we should never have ++ * committed a buffer_to_host operation to the mmal ++ * port without the buffer to back it up (underflow ++ * handling) and there is no obvious way to deal with ++ * this - how is the mmal servie going to react when ++ * we fail to do the xfer and reschedule a buffer when ++ * it arrives? perhaps a starved flag to indicate a ++ * waiting bulk receive? ++ */ ++ ++ return -EINVAL; ++ } ++ ++ /* ensure we do not overrun the available buffer */ ++ if (rd_len > msg_context->u.bulk.buffer->buffer_size) { ++ rd_len = msg_context->u.bulk.buffer->buffer_size; ++ pr_warn("short read as not enough receive buffer space\n"); ++ /* todo: is this the correct response, what happens to ++ * the rest of the message data? ++ */ ++ } ++ ++ /* store length */ ++ msg_context->u.bulk.buffer_used = rd_len; ++ msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; ++ msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; ++ ++ queue_work(msg_context->instance->bulk_wq, ++ &msg_context->u.bulk.buffer_to_host_work); ++ ++ return 0; ++} ++ ++/* data in message, memcpy from packet into output buffer */ ++static int inline_receive(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, ++ struct mmal_msg_context *msg_context) ++{ ++ memcpy(msg_context->u.bulk.buffer->buffer, ++ msg->u.buffer_from_host.short_data, ++ msg->u.buffer_from_host.payload_in_message); ++ ++ msg_context->u.bulk.buffer_used = ++ msg->u.buffer_from_host.payload_in_message; ++ ++ return 0; ++} ++ ++/* queue the buffer availability with MMAL_MSG_TYPE_BUFFER_FROM_HOST */ ++static int ++buffer_from_host(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, struct mmal_buffer *buf) ++{ ++ struct mmal_msg_context *msg_context; ++ struct mmal_msg m; ++ int ret; ++ ++ if (!port->enabled) ++ return -EINVAL; ++ ++ pr_debug("instance:%p buffer:%p\n", instance->handle, buf); ++ ++ /* get context */ ++ if (!buf->msg_context) { ++ pr_err("%s: msg_context not allocated, buf %p\n", __func__, ++ buf); ++ return -EINVAL; ++ } ++ msg_context = buf->msg_context; ++ ++ /* store bulk message context for when data arrives */ ++ msg_context->u.bulk.instance = instance; ++ msg_context->u.bulk.port = port; ++ msg_context->u.bulk.buffer = buf; ++ msg_context->u.bulk.buffer_used = 0; ++ ++ /* initialise work structure ready to schedule callback */ ++ INIT_WORK(&msg_context->u.bulk.work, buffer_work_cb); ++ INIT_WORK(&msg_context->u.bulk.buffer_to_host_work, ++ buffer_to_host_work_cb); ++ ++ atomic_inc(&port->buffers_with_vpu); ++ ++ /* prep the buffer from host message */ ++ memset(&m, 0xbc, sizeof(m)); /* just to make debug clearer */ ++ ++ m.h.type = MMAL_MSG_TYPE_BUFFER_FROM_HOST; ++ m.h.magic = MMAL_MAGIC; ++ m.h.context = msg_context->handle; ++ m.h.status = 0; ++ ++ /* drvbuf is our private data passed back */ ++ m.u.buffer_from_host.drvbuf.magic = MMAL_MAGIC; ++ m.u.buffer_from_host.drvbuf.component_handle = port->component->handle; ++ m.u.buffer_from_host.drvbuf.port_handle = port->handle; ++ m.u.buffer_from_host.drvbuf.client_context = msg_context->handle; ++ ++ /* buffer header */ ++ m.u.buffer_from_host.buffer_header.cmd = 0; ++ m.u.buffer_from_host.buffer_header.data = ++ (u32)(unsigned long)buf->buffer; ++ m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; ++ m.u.buffer_from_host.buffer_header.length = 0; /* nothing used yet */ ++ m.u.buffer_from_host.buffer_header.offset = 0; /* no offset */ ++ m.u.buffer_from_host.buffer_header.flags = 0; /* no flags */ ++ m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; ++ m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; ++ ++ /* clear buffer type sepecific data */ ++ memset(&m.u.buffer_from_host.buffer_header_type_specific, 0, ++ sizeof(m.u.buffer_from_host.buffer_header_type_specific)); ++ ++ /* no payload in message */ ++ m.u.buffer_from_host.payload_in_message = 0; ++ ++ vchi_service_use(instance->handle); ++ ++ ret = vchi_queue_kernel_message(instance->handle, ++ &m, ++ sizeof(struct mmal_msg_header) + ++ sizeof(m.u.buffer_from_host)); ++ ++ vchi_service_release(instance->handle); ++ ++ return ret; ++} ++ ++/* deals with receipt of buffer to host message */ ++static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, u32 msg_len) ++{ ++ struct mmal_msg_context *msg_context; ++ u32 handle; ++ ++ pr_debug("%s: instance:%p msg:%p msg_len:%d\n", ++ __func__, instance, msg, msg_len); ++ ++ if (msg->u.buffer_from_host.drvbuf.magic == MMAL_MAGIC) { ++ handle = msg->u.buffer_from_host.drvbuf.client_context; ++ msg_context = lookup_msg_context(instance, handle); ++ ++ if (!msg_context) { ++ pr_err("drvbuf.client_context(%u) is invalid\n", ++ handle); ++ return; ++ } ++ } else { ++ pr_err("MMAL_MSG_TYPE_BUFFER_TO_HOST with bad magic\n"); ++ return; ++ } ++ ++ msg_context->u.bulk.mmal_flags = ++ msg->u.buffer_from_host.buffer_header.flags; ++ ++ if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { ++ /* message reception had an error */ ++ pr_warn("error %d in reply\n", msg->h.status); ++ ++ msg_context->u.bulk.status = msg->h.status; ++ ++ } else if (msg->u.buffer_from_host.buffer_header.length == 0) { ++ /* empty buffer */ ++ if (msg->u.buffer_from_host.buffer_header.flags & ++ MMAL_BUFFER_HEADER_FLAG_EOS) { ++ msg_context->u.bulk.status = ++ bulk_receive(instance, msg, msg_context); ++ if (msg_context->u.bulk.status == 0) ++ return; /* successful bulk submission, bulk ++ * completion will trigger callback ++ */ ++ } else { ++ /* do callback with empty buffer - not EOS though */ ++ msg_context->u.bulk.status = 0; ++ msg_context->u.bulk.buffer_used = 0; ++ } ++ } else if (msg->u.buffer_from_host.payload_in_message == 0) { ++ /* data is not in message, queue a bulk receive */ ++ msg_context->u.bulk.status = ++ bulk_receive(instance, msg, msg_context); ++ if (msg_context->u.bulk.status == 0) ++ return; /* successful bulk submission, bulk ++ * completion will trigger callback ++ */ ++ ++ /* failed to submit buffer, this will end badly */ ++ pr_err("error %d on bulk submission\n", ++ msg_context->u.bulk.status); ++ ++ } else if (msg->u.buffer_from_host.payload_in_message <= ++ MMAL_VC_SHORT_DATA) { ++ /* data payload within message */ ++ msg_context->u.bulk.status = inline_receive(instance, msg, ++ msg_context); ++ } else { ++ pr_err("message with invalid short payload\n"); ++ ++ /* signal error */ ++ msg_context->u.bulk.status = -EINVAL; ++ msg_context->u.bulk.buffer_used = ++ msg->u.buffer_from_host.payload_in_message; ++ } ++ ++ /* schedule the port callback */ ++ schedule_work(&msg_context->u.bulk.work); ++} ++ ++static void bulk_receive_cb(struct vchiq_mmal_instance *instance, ++ struct mmal_msg_context *msg_context) ++{ ++ msg_context->u.bulk.status = 0; ++ ++ /* schedule the port callback */ ++ schedule_work(&msg_context->u.bulk.work); ++} ++ ++static void bulk_abort_cb(struct vchiq_mmal_instance *instance, ++ struct mmal_msg_context *msg_context) ++{ ++ pr_err("%s: bulk ABORTED msg_context:%p\n", __func__, msg_context); ++ ++ msg_context->u.bulk.status = -EINTR; ++ ++ schedule_work(&msg_context->u.bulk.work); ++} ++ ++/* incoming event service callback */ ++static void service_callback(void *param, ++ const VCHI_CALLBACK_REASON_T reason, ++ void *bulk_ctx) ++{ ++ struct vchiq_mmal_instance *instance = param; ++ int status; ++ u32 msg_len; ++ struct mmal_msg *msg; ++ VCHI_HELD_MSG_T msg_handle; ++ struct mmal_msg_context *msg_context; ++ ++ if (!instance) { ++ pr_err("Message callback passed NULL instance\n"); ++ return; ++ } ++ ++ switch (reason) { ++ case VCHI_CALLBACK_MSG_AVAILABLE: ++ status = vchi_msg_hold(instance->handle, (void **)&msg, ++ &msg_len, VCHI_FLAGS_NONE, &msg_handle); ++ if (status) { ++ pr_err("Unable to dequeue a message (%d)\n", status); ++ break; ++ } ++ ++ DBG_DUMP_MSG(msg, msg_len, "<<< reply message"); ++ ++ /* handling is different for buffer messages */ ++ switch (msg->h.type) { ++ case MMAL_MSG_TYPE_BUFFER_FROM_HOST: ++ vchi_held_msg_release(&msg_handle); ++ break; ++ ++ case MMAL_MSG_TYPE_EVENT_TO_HOST: ++ event_to_host_cb(instance, msg, msg_len); ++ vchi_held_msg_release(&msg_handle); ++ ++ break; ++ ++ case MMAL_MSG_TYPE_BUFFER_TO_HOST: ++ buffer_to_host_cb(instance, msg, msg_len); ++ vchi_held_msg_release(&msg_handle); ++ break; ++ ++ default: ++ /* messages dependent on header context to complete */ ++ if (!msg->h.context) { ++ pr_err("received message context was null!\n"); ++ vchi_held_msg_release(&msg_handle); ++ break; ++ } ++ ++ msg_context = lookup_msg_context(instance, ++ msg->h.context); ++ if (!msg_context) { ++ pr_err("received invalid message context %u!\n", ++ msg->h.context); ++ vchi_held_msg_release(&msg_handle); ++ break; ++ } ++ ++ /* fill in context values */ ++ msg_context->u.sync.msg_handle = msg_handle; ++ msg_context->u.sync.msg = msg; ++ msg_context->u.sync.msg_len = msg_len; ++ ++ /* todo: should this check (completion_done() ++ * == 1) for no one waiting? or do we need a ++ * flag to tell us the completion has been ++ * interrupted so we can free the message and ++ * its context. This probably also solves the ++ * message arriving after interruption todo ++ * below ++ */ ++ ++ /* complete message so caller knows it happened */ ++ complete(&msg_context->u.sync.cmplt); ++ break; ++ } ++ ++ break; ++ ++ case VCHI_CALLBACK_BULK_RECEIVED: ++ bulk_receive_cb(instance, bulk_ctx); ++ break; ++ ++ case VCHI_CALLBACK_BULK_RECEIVE_ABORTED: ++ bulk_abort_cb(instance, bulk_ctx); ++ break; ++ ++ case VCHI_CALLBACK_SERVICE_CLOSED: ++ /* TODO: consider if this requires action if received when ++ * driver is not explicitly closing the service ++ */ ++ break; ++ ++ default: ++ pr_err("Received unhandled message reason %d\n", reason); ++ break; ++ } ++} ++ ++static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, ++ unsigned int payload_len, ++ struct mmal_msg **msg_out, ++ VCHI_HELD_MSG_T *msg_handle_out) ++{ ++ struct mmal_msg_context *msg_context; ++ int ret; ++ unsigned long timeout; ++ ++ /* payload size must not cause message to exceed max size */ ++ if (payload_len > ++ (MMAL_MSG_MAX_SIZE - sizeof(struct mmal_msg_header))) { ++ pr_err("payload length %d exceeds max:%d\n", payload_len, ++ (int)(MMAL_MSG_MAX_SIZE - ++ sizeof(struct mmal_msg_header))); ++ return -EINVAL; ++ } ++ ++ msg_context = get_msg_context(instance); ++ if (IS_ERR(msg_context)) ++ return PTR_ERR(msg_context); ++ ++ init_completion(&msg_context->u.sync.cmplt); ++ ++ msg->h.magic = MMAL_MAGIC; ++ msg->h.context = msg_context->handle; ++ msg->h.status = 0; ++ ++ DBG_DUMP_MSG(msg, (sizeof(struct mmal_msg_header) + payload_len), ++ ">>> sync message"); ++ ++ vchi_service_use(instance->handle); ++ ++ ret = vchi_queue_kernel_message(instance->handle, ++ msg, ++ sizeof(struct mmal_msg_header) + ++ payload_len); ++ ++ vchi_service_release(instance->handle); ++ ++ if (ret) { ++ pr_err("error %d queuing message\n", ret); ++ release_msg_context(msg_context); ++ return ret; ++ } ++ ++ timeout = wait_for_completion_timeout(&msg_context->u.sync.cmplt, ++ 3 * HZ); ++ if (timeout == 0) { ++ pr_err("timed out waiting for sync completion\n"); ++ ret = -ETIME; ++ /* todo: what happens if the message arrives after aborting */ ++ release_msg_context(msg_context); ++ return ret; ++ } ++ ++ *msg_out = msg_context->u.sync.msg; ++ *msg_handle_out = msg_context->u.sync.msg_handle; ++ release_msg_context(msg_context); ++ ++ return 0; ++} ++ ++static void dump_port_info(struct vchiq_mmal_port *port) ++{ ++ pr_debug("port handle:0x%x enabled:%d\n", port->handle, port->enabled); ++ ++ pr_debug("buffer minimum num:%d size:%d align:%d\n", ++ port->minimum_buffer.num, ++ port->minimum_buffer.size, port->minimum_buffer.alignment); ++ ++ pr_debug("buffer recommended num:%d size:%d align:%d\n", ++ port->recommended_buffer.num, ++ port->recommended_buffer.size, ++ port->recommended_buffer.alignment); ++ ++ pr_debug("buffer current values num:%d size:%d align:%d\n", ++ port->current_buffer.num, ++ port->current_buffer.size, port->current_buffer.alignment); ++ ++ pr_debug("elementary stream: type:%d encoding:0x%x variant:0x%x\n", ++ port->format.type, ++ port->format.encoding, port->format.encoding_variant); ++ ++ pr_debug(" bitrate:%d flags:0x%x\n", ++ port->format.bitrate, port->format.flags); ++ ++ if (port->format.type == MMAL_ES_TYPE_VIDEO) { ++ pr_debug ++ ("es video format: width:%d height:%d colourspace:0x%x\n", ++ port->es.video.width, port->es.video.height, ++ port->es.video.color_space); ++ ++ pr_debug(" : crop xywh %d,%d,%d,%d\n", ++ port->es.video.crop.x, ++ port->es.video.crop.y, ++ port->es.video.crop.width, port->es.video.crop.height); ++ pr_debug(" : framerate %d/%d aspect %d/%d\n", ++ port->es.video.frame_rate.num, ++ port->es.video.frame_rate.den, ++ port->es.video.par.num, port->es.video.par.den); ++ } ++} ++ ++static void port_to_mmal_msg(struct vchiq_mmal_port *port, struct mmal_port *p) ++{ ++ /* todo do readonly fields need setting at all? */ ++ p->type = port->type; ++ p->index = port->index; ++ p->index_all = 0; ++ p->is_enabled = port->enabled; ++ p->buffer_num_min = port->minimum_buffer.num; ++ p->buffer_size_min = port->minimum_buffer.size; ++ p->buffer_alignment_min = port->minimum_buffer.alignment; ++ p->buffer_num_recommended = port->recommended_buffer.num; ++ p->buffer_size_recommended = port->recommended_buffer.size; ++ ++ /* only three writable fields in a port */ ++ p->buffer_num = port->current_buffer.num; ++ p->buffer_size = port->current_buffer.size; ++ p->userdata = (u32)(unsigned long)port; ++} ++ ++static int port_info_set(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ pr_debug("setting port info port %p\n", port); ++ if (!port) ++ return -1; ++ dump_port_info(port); ++ ++ m.h.type = MMAL_MSG_TYPE_PORT_INFO_SET; ++ ++ m.u.port_info_set.component_handle = port->component->handle; ++ m.u.port_info_set.port_type = port->type; ++ m.u.port_info_set.port_index = port->index; ++ ++ port_to_mmal_msg(port, &m.u.port_info_set.port); ++ ++ /* elementary stream format setup */ ++ m.u.port_info_set.format.type = port->format.type; ++ m.u.port_info_set.format.encoding = port->format.encoding; ++ m.u.port_info_set.format.encoding_variant = ++ port->format.encoding_variant; ++ m.u.port_info_set.format.bitrate = port->format.bitrate; ++ m.u.port_info_set.format.flags = port->format.flags; ++ ++ memcpy(&m.u.port_info_set.es, &port->es, ++ sizeof(union mmal_es_specific_format)); ++ ++ m.u.port_info_set.format.extradata_size = port->format.extradata_size; ++ memcpy(&m.u.port_info_set.extradata, port->format.extradata, ++ port->format.extradata_size); ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.port_info_set), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_SET) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ /* return operation status */ ++ ret = -rmsg->u.port_info_get_reply.status; ++ ++ pr_debug("%s:result:%d component:0x%x port:%d\n", __func__, ret, ++ port->component->handle, port->handle); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* use port info get message to retrieve port information */ ++static int port_info_get(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ /* port info time */ ++ m.h.type = MMAL_MSG_TYPE_PORT_INFO_GET; ++ m.u.port_info_get.component_handle = port->component->handle; ++ m.u.port_info_get.port_type = port->type; ++ m.u.port_info_get.index = port->index; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.port_info_get), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_GET) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ /* return operation status */ ++ ret = -rmsg->u.port_info_get_reply.status; ++ if (ret != MMAL_MSG_STATUS_SUCCESS) ++ goto release_msg; ++ ++ if (rmsg->u.port_info_get_reply.port.is_enabled == 0) ++ port->enabled = false; ++ else ++ port->enabled = true; ++ ++ /* copy the values out of the message */ ++ port->handle = rmsg->u.port_info_get_reply.port_handle; ++ ++ /* port type and index cached to use on port info set because ++ * it does not use a port handle ++ */ ++ port->type = rmsg->u.port_info_get_reply.port_type; ++ port->index = rmsg->u.port_info_get_reply.port_index; ++ ++ port->minimum_buffer.num = ++ rmsg->u.port_info_get_reply.port.buffer_num_min; ++ port->minimum_buffer.size = ++ rmsg->u.port_info_get_reply.port.buffer_size_min; ++ port->minimum_buffer.alignment = ++ rmsg->u.port_info_get_reply.port.buffer_alignment_min; ++ ++ port->recommended_buffer.alignment = ++ rmsg->u.port_info_get_reply.port.buffer_alignment_min; ++ port->recommended_buffer.num = ++ rmsg->u.port_info_get_reply.port.buffer_num_recommended; ++ ++ port->current_buffer.num = rmsg->u.port_info_get_reply.port.buffer_num; ++ port->current_buffer.size = ++ rmsg->u.port_info_get_reply.port.buffer_size; ++ ++ /* stream format */ ++ port->format.type = rmsg->u.port_info_get_reply.format.type; ++ port->format.encoding = rmsg->u.port_info_get_reply.format.encoding; ++ port->format.encoding_variant = ++ rmsg->u.port_info_get_reply.format.encoding_variant; ++ port->format.bitrate = rmsg->u.port_info_get_reply.format.bitrate; ++ port->format.flags = rmsg->u.port_info_get_reply.format.flags; ++ ++ /* elementary stream format */ ++ memcpy(&port->es, ++ &rmsg->u.port_info_get_reply.es, ++ sizeof(union mmal_es_specific_format)); ++ port->format.es = &port->es; ++ ++ port->format.extradata_size = ++ rmsg->u.port_info_get_reply.format.extradata_size; ++ memcpy(port->format.extradata, ++ rmsg->u.port_info_get_reply.extradata, ++ port->format.extradata_size); ++ ++ pr_debug("received port info\n"); ++ dump_port_info(port); ++ ++release_msg: ++ ++ pr_debug("%s:result:%d component:0x%x port:%d\n", ++ __func__, ret, port->component->handle, port->handle); ++ ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* create comonent on vc */ ++static int create_component(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component, ++ const char *name) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ /* build component create message */ ++ m.h.type = MMAL_MSG_TYPE_COMPONENT_CREATE; ++ m.u.component_create.client_component = (u32)(unsigned long)component; ++ strncpy(m.u.component_create.name, name, ++ sizeof(m.u.component_create.name)); ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.component_create), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != m.h.type) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.component_create_reply.status; ++ if (ret != MMAL_MSG_STATUS_SUCCESS) ++ goto release_msg; ++ ++ /* a valid component response received */ ++ component->handle = rmsg->u.component_create_reply.component_handle; ++ component->inputs = rmsg->u.component_create_reply.input_num; ++ component->outputs = rmsg->u.component_create_reply.output_num; ++ component->clocks = rmsg->u.component_create_reply.clock_num; ++ ++ pr_debug("Component handle:0x%x in:%d out:%d clock:%d\n", ++ component->handle, ++ component->inputs, component->outputs, component->clocks); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* destroys a component on vc */ ++static int destroy_component(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_COMPONENT_DESTROY; ++ m.u.component_destroy.component_handle = component->handle; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.component_destroy), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != m.h.type) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.component_destroy_reply.status; ++ ++release_msg: ++ ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* enable a component on vc */ ++static int enable_component(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_COMPONENT_ENABLE; ++ m.u.component_enable.component_handle = component->handle; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.component_enable), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != m.h.type) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.component_enable_reply.status; ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* disable a component on vc */ ++static int disable_component(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_COMPONENT_DISABLE; ++ m.u.component_disable.component_handle = component->handle; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.component_disable), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != m.h.type) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.component_disable_reply.status; ++ ++release_msg: ++ ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* get version of mmal implementation */ ++static int get_version(struct vchiq_mmal_instance *instance, ++ u32 *major_out, u32 *minor_out) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_GET_VERSION; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.version), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != m.h.type) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ *major_out = rmsg->u.version.major; ++ *minor_out = rmsg->u.version.minor; ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* do a port action with a port as a parameter */ ++static int port_action_port(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ enum mmal_msg_port_action_type action_type) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_PORT_ACTION; ++ m.u.port_action_port.component_handle = port->component->handle; ++ m.u.port_action_port.port_handle = port->handle; ++ m.u.port_action_port.action = action_type; ++ ++ port_to_mmal_msg(port, &m.u.port_action_port.port); ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.port_action_port), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.port_action_reply.status; ++ ++ pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d)\n", ++ __func__, ++ ret, port->component->handle, port->handle, ++ port_action_type_names[action_type], action_type); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* do a port action with handles as parameters */ ++static int port_action_handle(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ enum mmal_msg_port_action_type action_type, ++ u32 connect_component_handle, ++ u32 connect_port_handle) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_PORT_ACTION; ++ ++ m.u.port_action_handle.component_handle = port->component->handle; ++ m.u.port_action_handle.port_handle = port->handle; ++ m.u.port_action_handle.action = action_type; ++ ++ m.u.port_action_handle.connect_component_handle = ++ connect_component_handle; ++ m.u.port_action_handle.connect_port_handle = connect_port_handle; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(m.u.port_action_handle), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.port_action_reply.status; ++ ++ pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d) connect component:0x%x connect port:%d\n", ++ __func__, ++ ret, port->component->handle, port->handle, ++ port_action_type_names[action_type], ++ action_type, connect_component_handle, connect_port_handle); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++static int port_parameter_set(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter_id, void *value, u32 value_size) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_SET; ++ ++ m.u.port_parameter_set.component_handle = port->component->handle; ++ m.u.port_parameter_set.port_handle = port->handle; ++ m.u.port_parameter_set.id = parameter_id; ++ m.u.port_parameter_set.size = (2 * sizeof(u32)) + value_size; ++ memcpy(&m.u.port_parameter_set.value, value, value_size); ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ (4 * sizeof(u32)) + value_size, ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_SET) { ++ /* got an unexpected message type in reply */ ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.port_parameter_set_reply.status; ++ ++ pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", ++ __func__, ++ ret, port->component->handle, port->handle, parameter_id); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++static int port_parameter_get(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter_id, void *value, u32 *value_size) ++{ ++ int ret; ++ struct mmal_msg m; ++ struct mmal_msg *rmsg; ++ VCHI_HELD_MSG_T rmsg_handle; ++ ++ m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_GET; ++ ++ m.u.port_parameter_get.component_handle = port->component->handle; ++ m.u.port_parameter_get.port_handle = port->handle; ++ m.u.port_parameter_get.id = parameter_id; ++ m.u.port_parameter_get.size = (2 * sizeof(u32)) + *value_size; ++ ++ ret = send_synchronous_mmal_msg(instance, &m, ++ sizeof(struct ++ mmal_msg_port_parameter_get), ++ &rmsg, &rmsg_handle); ++ if (ret) ++ return ret; ++ ++ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_GET) { ++ /* got an unexpected message type in reply */ ++ pr_err("Incorrect reply type %d\n", rmsg->h.type); ++ ret = -EINVAL; ++ goto release_msg; ++ } ++ ++ ret = -rmsg->u.port_parameter_get_reply.status; ++ /* port_parameter_get_reply.size includes the header, ++ * whilst *value_size doesn't. ++ */ ++ rmsg->u.port_parameter_get_reply.size -= (2 * sizeof(u32)); ++ ++ if (ret || rmsg->u.port_parameter_get_reply.size > *value_size) { ++ /* Copy only as much as we have space for ++ * but report true size of parameter ++ */ ++ memcpy(value, &rmsg->u.port_parameter_get_reply.value, ++ *value_size); ++ *value_size = rmsg->u.port_parameter_get_reply.size; ++ } else { ++ memcpy(value, &rmsg->u.port_parameter_get_reply.value, ++ rmsg->u.port_parameter_get_reply.size); ++ } ++ ++ pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", __func__, ++ ret, port->component->handle, port->handle, parameter_id); ++ ++release_msg: ++ vchi_held_msg_release(&rmsg_handle); ++ ++ return ret; ++} ++ ++/* disables a port and drains buffers from it */ ++static int port_disable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ int ret; ++ struct list_head *q, *buf_head; ++ unsigned long flags = 0; ++ ++ if (!port->enabled) ++ return 0; ++ ++ port->enabled = false; ++ ++ ret = port_action_port(instance, port, ++ MMAL_MSG_PORT_ACTION_TYPE_DISABLE); ++ if (ret == 0) { ++ /* ++ * Drain all queued buffers on port. This should only ++ * apply to buffers that have been queued before the port ++ * has been enabled. If the port has been enabled and buffers ++ * passed, then the buffers should have been removed from this ++ * list, and we should get the relevant callbacks via VCHIQ ++ * to release the buffers. ++ */ ++ spin_lock_irqsave(&port->slock, flags); ++ ++ list_for_each_safe(buf_head, q, &port->buffers) { ++ struct mmal_buffer *mmalbuf; ++ ++ mmalbuf = list_entry(buf_head, struct mmal_buffer, ++ list); ++ list_del(buf_head); ++ if (port->buffer_cb) ++ port->buffer_cb(instance, ++ port, 0, mmalbuf, 0, 0, ++ MMAL_TIME_UNKNOWN, ++ MMAL_TIME_UNKNOWN); ++ } ++ ++ spin_unlock_irqrestore(&port->slock, flags); ++ ++ ret = port_info_get(instance, port); ++ } ++ ++ return ret; ++} ++ ++/* enable a port */ ++static int port_enable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ unsigned int hdr_count; ++ struct list_head *q, *buf_head; ++ int ret; ++ ++ if (port->enabled) ++ return 0; ++ ++ ret = port_action_port(instance, port, ++ MMAL_MSG_PORT_ACTION_TYPE_ENABLE); ++ if (ret) ++ goto done; ++ ++ port->enabled = true; ++ ++ if (port->buffer_cb) { ++ /* send buffer headers to videocore */ ++ hdr_count = 1; ++ list_for_each_safe(buf_head, q, &port->buffers) { ++ struct mmal_buffer *mmalbuf; ++ ++ mmalbuf = list_entry(buf_head, struct mmal_buffer, ++ list); ++ ret = buffer_from_host(instance, port, mmalbuf); ++ if (ret) ++ goto done; ++ ++ list_del(buf_head); ++ hdr_count++; ++ if (hdr_count > port->current_buffer.num) ++ break; ++ } ++ } ++ ++ ret = port_info_get(instance, port); ++ ++done: ++ return ret; ++} ++ ++/* ------------------------------------------------------------------ ++ * Exported API ++ *------------------------------------------------------------------ ++ */ ++ ++int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ ret = port_info_set(instance, port); ++ if (ret) ++ goto release_unlock; ++ ++ /* read what has actually been set */ ++ ret = port_info_get(instance, port); ++ ++release_unlock: ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_set_format); ++ ++int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter, void *value, u32 value_size) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ ret = port_parameter_set(instance, port, parameter, value, value_size); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_set); ++ ++int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter, void *value, u32 *value_size) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ ret = port_parameter_get(instance, port, parameter, value, value_size); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_get); ++ ++/* enable a port ++ * ++ * enables a port and queues buffers for satisfying callbacks if we ++ * provide a callback handler ++ */ ++int vchiq_mmal_port_enable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ vchiq_mmal_buffer_cb buffer_cb) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ /* already enabled - noop */ ++ if (port->enabled) { ++ ret = 0; ++ goto unlock; ++ } ++ ++ port->buffer_cb = buffer_cb; ++ ++ ret = port_enable(instance, port); ++ ++unlock: ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_enable); ++ ++int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ if (!port->enabled) { ++ mutex_unlock(&instance->vchiq_mutex); ++ return 0; ++ } ++ ++ ret = port_disable(instance, port); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_disable); ++ ++/* ports will be connected in a tunneled manner so data buffers ++ * are not handled by client. ++ */ ++int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *src, ++ struct vchiq_mmal_port *dst) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ /* disconnect ports if connected */ ++ if (src->connected) { ++ ret = port_disable(instance, src); ++ if (ret) { ++ pr_err("failed disabling src port(%d)\n", ret); ++ goto release_unlock; ++ } ++ ++ /* do not need to disable the destination port as they ++ * are connected and it is done automatically ++ */ ++ ++ ret = port_action_handle(instance, src, ++ MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, ++ src->connected->component->handle, ++ src->connected->handle); ++ if (ret < 0) { ++ pr_err("failed disconnecting src port\n"); ++ goto release_unlock; ++ } ++ src->connected->enabled = false; ++ src->connected = NULL; ++ } ++ ++ if (!dst) { ++ /* do not make new connection */ ++ ret = 0; ++ pr_debug("not making new connection\n"); ++ goto release_unlock; ++ } ++ ++ /* copy src port format to dst */ ++ dst->format.encoding = src->format.encoding; ++ dst->es.video.width = src->es.video.width; ++ dst->es.video.height = src->es.video.height; ++ dst->es.video.crop.x = src->es.video.crop.x; ++ dst->es.video.crop.y = src->es.video.crop.y; ++ dst->es.video.crop.width = src->es.video.crop.width; ++ dst->es.video.crop.height = src->es.video.crop.height; ++ dst->es.video.frame_rate.num = src->es.video.frame_rate.num; ++ dst->es.video.frame_rate.den = src->es.video.frame_rate.den; ++ ++ /* set new format */ ++ ret = port_info_set(instance, dst); ++ if (ret) { ++ pr_debug("setting port info failed\n"); ++ goto release_unlock; ++ } ++ ++ /* read what has actually been set */ ++ ret = port_info_get(instance, dst); ++ if (ret) { ++ pr_debug("read back port info failed\n"); ++ goto release_unlock; ++ } ++ ++ /* connect two ports together */ ++ ret = port_action_handle(instance, src, ++ MMAL_MSG_PORT_ACTION_TYPE_CONNECT, ++ dst->component->handle, dst->handle); ++ if (ret < 0) { ++ pr_debug("connecting port %d:%d to %d:%d failed\n", ++ src->component->handle, src->handle, ++ dst->component->handle, dst->handle); ++ goto release_unlock; ++ } ++ src->connected = dst; ++ ++release_unlock: ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_port_connect_tunnel); ++ ++int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ struct mmal_buffer *buffer) ++{ ++ unsigned long flags = 0; ++ int ret; ++ ++ ret = buffer_from_host(instance, port, buffer); ++ if (ret == -EINVAL) { ++ /* Port is disabled. Queue for when it is enabled. */ ++ spin_lock_irqsave(&port->slock, flags); ++ list_add_tail(&buffer->list, &port->buffers); ++ spin_unlock_irqrestore(&port->slock, flags); ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_submit_buffer); ++ ++int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance, ++ struct mmal_buffer *buf) ++{ ++ struct mmal_msg_context *msg_context = get_msg_context(instance); ++ ++ if (IS_ERR(msg_context)) ++ return (PTR_ERR(msg_context)); ++ ++ buf->msg_context = msg_context; ++ return 0; ++} ++EXPORT_SYMBOL_GPL(mmal_vchi_buffer_init); ++ ++int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) ++{ ++ struct mmal_msg_context *msg_context = buf->msg_context; ++ ++ if (msg_context) ++ release_msg_context(msg_context); ++ buf->msg_context = NULL; ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); ++ ++/* Initialise a mmal component and its ports ++ * ++ */ ++int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, ++ const char *name, ++ struct vchiq_mmal_component **component_out) ++{ ++ int ret; ++ int idx; /* port index */ ++ struct vchiq_mmal_component *component; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ if (instance->component_idx == VCHIQ_MMAL_MAX_COMPONENTS) { ++ ret = -EINVAL; /* todo is this correct error? */ ++ goto unlock; ++ } ++ ++ component = &instance->component[instance->component_idx]; ++ ++ ret = create_component(instance, component, name); ++ if (ret < 0) { ++ pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", ++ __func__, ret); ++ goto unlock; ++ } ++ ++ /* ports info needs gathering */ ++ component->control.type = MMAL_PORT_TYPE_CONTROL; ++ component->control.index = 0; ++ component->control.component = component; ++ spin_lock_init(&component->control.slock); ++ INIT_LIST_HEAD(&component->control.buffers); ++ ret = port_info_get(instance, &component->control); ++ if (ret < 0) ++ goto release_component; ++ ++ for (idx = 0; idx < component->inputs; idx++) { ++ component->input[idx].type = MMAL_PORT_TYPE_INPUT; ++ component->input[idx].index = idx; ++ component->input[idx].component = component; ++ spin_lock_init(&component->input[idx].slock); ++ INIT_LIST_HEAD(&component->input[idx].buffers); ++ ret = port_info_get(instance, &component->input[idx]); ++ if (ret < 0) ++ goto release_component; ++ } ++ ++ for (idx = 0; idx < component->outputs; idx++) { ++ component->output[idx].type = MMAL_PORT_TYPE_OUTPUT; ++ component->output[idx].index = idx; ++ component->output[idx].component = component; ++ spin_lock_init(&component->output[idx].slock); ++ INIT_LIST_HEAD(&component->output[idx].buffers); ++ ret = port_info_get(instance, &component->output[idx]); ++ if (ret < 0) ++ goto release_component; ++ } ++ ++ for (idx = 0; idx < component->clocks; idx++) { ++ component->clock[idx].type = MMAL_PORT_TYPE_CLOCK; ++ component->clock[idx].index = idx; ++ component->clock[idx].component = component; ++ spin_lock_init(&component->clock[idx].slock); ++ INIT_LIST_HEAD(&component->clock[idx].buffers); ++ ret = port_info_get(instance, &component->clock[idx]); ++ if (ret < 0) ++ goto release_component; ++ } ++ ++ instance->component_idx++; ++ ++ *component_out = component; ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return 0; ++ ++release_component: ++ destroy_component(instance, component); ++unlock: ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_component_init); ++ ++/* ++ * cause a mmal component to be destroyed ++ */ ++int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ if (component->enabled) ++ ret = disable_component(instance, component); ++ ++ ret = destroy_component(instance, component); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_component_finalise); ++ ++/* ++ * cause a mmal component to be enabled ++ */ ++int vchiq_mmal_component_enable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ if (component->enabled) { ++ mutex_unlock(&instance->vchiq_mutex); ++ return 0; ++ } ++ ++ ret = enable_component(instance, component); ++ if (ret == 0) ++ component->enabled = true; ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_component_enable); ++ ++/* ++ * cause a mmal component to be enabled ++ */ ++int vchiq_mmal_component_disable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ if (!component->enabled) { ++ mutex_unlock(&instance->vchiq_mutex); ++ return 0; ++ } ++ ++ ret = disable_component(instance, component); ++ if (ret == 0) ++ component->enabled = false; ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_component_disable); ++ ++int vchiq_mmal_version(struct vchiq_mmal_instance *instance, ++ u32 *major_out, u32 *minor_out) ++{ ++ int ret; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ ret = get_version(instance, major_out, minor_out); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_version); ++ ++int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance) ++{ ++ int status = 0; ++ ++ if (!instance) ++ return -EINVAL; ++ ++ if (mutex_lock_interruptible(&instance->vchiq_mutex)) ++ return -EINTR; ++ ++ vchi_service_use(instance->handle); ++ ++ status = vchi_service_close(instance->handle); ++ if (status != 0) ++ pr_err("mmal-vchiq: VCHIQ close failed\n"); ++ ++ mutex_unlock(&instance->vchiq_mutex); ++ ++ flush_workqueue(instance->bulk_wq); ++ destroy_workqueue(instance->bulk_wq); ++ ++ vfree(instance->bulk_scratch); ++ ++ idr_destroy(&instance->context_map); ++ ++ kfree(instance); ++ ++ return status; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_finalise); ++ ++int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) ++{ ++ int status; ++ struct vchiq_mmal_instance *instance; ++ static VCHI_CONNECTION_T *vchi_connection; ++ static VCHI_INSTANCE_T vchi_instance; ++ SERVICE_CREATION_T params = { ++ .version = VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), ++ .service_id = VC_MMAL_SERVER_NAME, ++ .connection = vchi_connection, ++ .rx_fifo_size = 0, ++ .tx_fifo_size = 0, ++ .callback = service_callback, ++ .callback_param = NULL, ++ .want_unaligned_bulk_rx = 1, ++ .want_unaligned_bulk_tx = 1, ++ .want_crc = 0 ++ }; ++ ++ /* compile time checks to ensure structure size as they are ++ * directly (de)serialised from memory. ++ */ ++ ++ /* ensure the header structure has packed to the correct size */ ++ BUILD_BUG_ON(sizeof(struct mmal_msg_header) != 24); ++ ++ /* ensure message structure does not exceed maximum length */ ++ BUILD_BUG_ON(sizeof(struct mmal_msg) > MMAL_MSG_MAX_SIZE); ++ ++ /* mmal port struct is correct size */ ++ BUILD_BUG_ON(sizeof(struct mmal_port) != 64); ++ ++ /* create a vchi instance */ ++ status = vchi_initialise(&vchi_instance); ++ if (status) { ++ pr_err("Failed to initialise VCHI instance (status=%d)\n", ++ status); ++ return -EIO; ++ } ++ ++ status = vchi_connect(NULL, 0, vchi_instance); ++ if (status) { ++ pr_err("Failed to connect VCHI instance (status=%d)\n", status); ++ return -EIO; ++ } ++ ++ instance = kzalloc(sizeof(*instance), GFP_KERNEL); ++ ++ if (!instance) ++ return -ENOMEM; ++ ++ mutex_init(&instance->vchiq_mutex); ++ ++ instance->bulk_scratch = vmalloc(PAGE_SIZE); ++ ++ spin_lock_init(&instance->context_map_lock); ++ idr_init_base(&instance->context_map, 1); ++ ++ params.callback_param = instance; ++ ++ instance->bulk_wq = alloc_ordered_workqueue("mmal-vchiq", ++ WQ_MEM_RECLAIM); ++ if (!instance->bulk_wq) ++ goto err_free; ++ ++ status = vchi_service_open(vchi_instance, ¶ms, &instance->handle); ++ if (status) { ++ pr_err("Failed to open VCHI service connection (status=%d)\n", ++ status); ++ goto err_close_services; ++ } ++ ++ vchi_service_release(instance->handle); ++ ++ *out_instance = instance; ++ ++ return 0; ++ ++err_close_services: ++ vchi_service_close(instance->handle); ++ destroy_workqueue(instance->bulk_wq); ++err_free: ++ vfree(instance->bulk_scratch); ++ kfree(instance); ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(vchiq_mmal_init); +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-common.h ++++ /dev/null +@@ -1,61 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- * +- * MMAL structures +- * +- */ +-#ifndef MMAL_COMMON_H +-#define MMAL_COMMON_H +- +-#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) +-#define MMAL_MAGIC MMAL_FOURCC('m', 'm', 'a', 'l') +- +-/** Special value signalling that time is not known */ +-#define MMAL_TIME_UNKNOWN BIT_ULL(63) +- +-struct mmal_msg_context; +- +-/* mapping between v4l and mmal video modes */ +-struct mmal_fmt { +- char *name; +- u32 fourcc; /* v4l2 format id */ +- int flags; /* v4l2 flags field */ +- u32 mmal; +- int depth; +- u32 mmal_component; /* MMAL component index to be used to encode */ +- u32 ybbp; /* depth of first Y plane for planar formats */ +- bool remove_padding; /* Does the GPU have to remove padding, +- * or can we do hide padding via bytesperline. +- */ +-}; +- +-/* buffer for one video frame */ +-struct mmal_buffer { +- /* v4l buffer data -- must be first */ +- struct vb2_v4l2_buffer vb; +- +- /* list of buffers available */ +- struct list_head list; +- +- void *buffer; /* buffer pointer */ +- unsigned long buffer_size; /* size of allocated buffer */ +- +- struct mmal_msg_context *msg_context; +-}; +- +-/* */ +-struct mmal_colourfx { +- s32 enable; +- u32 u; +- u32 v; +-}; +-#endif +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-encodings.h ++++ /dev/null +@@ -1,124 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +-#ifndef MMAL_ENCODINGS_H +-#define MMAL_ENCODINGS_H +- +-#define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4') +-#define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3') +-#define MMAL_ENCODING_MP4V MMAL_FOURCC('M', 'P', '4', 'V') +-#define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V') +-#define MMAL_ENCODING_MP1V MMAL_FOURCC('M', 'P', '1', 'V') +-#define MMAL_ENCODING_WMV3 MMAL_FOURCC('W', 'M', 'V', '3') +-#define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2') +-#define MMAL_ENCODING_WMV1 MMAL_FOURCC('W', 'M', 'V', '1') +-#define MMAL_ENCODING_WVC1 MMAL_FOURCC('W', 'V', 'C', '1') +-#define MMAL_ENCODING_VP8 MMAL_FOURCC('V', 'P', '8', ' ') +-#define MMAL_ENCODING_VP7 MMAL_FOURCC('V', 'P', '7', ' ') +-#define MMAL_ENCODING_VP6 MMAL_FOURCC('V', 'P', '6', ' ') +-#define MMAL_ENCODING_THEORA MMAL_FOURCC('T', 'H', 'E', 'O') +-#define MMAL_ENCODING_SPARK MMAL_FOURCC('S', 'P', 'R', 'K') +-#define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G') +- +-#define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G') +-#define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ') +-#define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ') +-#define MMAL_ENCODING_PPM MMAL_FOURCC('P', 'P', 'M', ' ') +-#define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ') +-#define MMAL_ENCODING_BMP MMAL_FOURCC('B', 'M', 'P', ' ') +- +-#define MMAL_ENCODING_I420 MMAL_FOURCC('I', '4', '2', '0') +-#define MMAL_ENCODING_I420_SLICE MMAL_FOURCC('S', '4', '2', '0') +-#define MMAL_ENCODING_YV12 MMAL_FOURCC('Y', 'V', '1', '2') +-#define MMAL_ENCODING_I422 MMAL_FOURCC('I', '4', '2', '2') +-#define MMAL_ENCODING_I422_SLICE MMAL_FOURCC('S', '4', '2', '2') +-#define MMAL_ENCODING_YUYV MMAL_FOURCC('Y', 'U', 'Y', 'V') +-#define MMAL_ENCODING_YVYU MMAL_FOURCC('Y', 'V', 'Y', 'U') +-#define MMAL_ENCODING_UYVY MMAL_FOURCC('U', 'Y', 'V', 'Y') +-#define MMAL_ENCODING_VYUY MMAL_FOURCC('V', 'Y', 'U', 'Y') +-#define MMAL_ENCODING_NV12 MMAL_FOURCC('N', 'V', '1', '2') +-#define MMAL_ENCODING_NV21 MMAL_FOURCC('N', 'V', '2', '1') +-#define MMAL_ENCODING_ARGB MMAL_FOURCC('A', 'R', 'G', 'B') +-#define MMAL_ENCODING_RGBA MMAL_FOURCC('R', 'G', 'B', 'A') +-#define MMAL_ENCODING_ABGR MMAL_FOURCC('A', 'B', 'G', 'R') +-#define MMAL_ENCODING_BGRA MMAL_FOURCC('B', 'G', 'R', 'A') +-#define MMAL_ENCODING_RGB16 MMAL_FOURCC('R', 'G', 'B', '2') +-#define MMAL_ENCODING_RGB24 MMAL_FOURCC('R', 'G', 'B', '3') +-#define MMAL_ENCODING_RGB32 MMAL_FOURCC('R', 'G', 'B', '4') +-#define MMAL_ENCODING_BGR16 MMAL_FOURCC('B', 'G', 'R', '2') +-#define MMAL_ENCODING_BGR24 MMAL_FOURCC('B', 'G', 'R', '3') +-#define MMAL_ENCODING_BGR32 MMAL_FOURCC('B', 'G', 'R', '4') +- +-/** SAND Video (YUVUV128) format, native format understood by VideoCore. +- * This format is *not* opaque - if requested you will receive full frames +- * of YUV_UV video. +- */ +-#define MMAL_ENCODING_YUVUV128 MMAL_FOURCC('S', 'A', 'N', 'D') +- +-/** VideoCore opaque image format, image handles are returned to +- * the host but not the actual image data. +- */ +-#define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V') +- +-/** An EGL image handle +- */ +-#define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') +- +-/* }@ */ +- +-/** \name Pre-defined audio encodings */ +-/* @{ */ +-#define MMAL_ENCODING_PCM_UNSIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'U') +-#define MMAL_ENCODING_PCM_UNSIGNED_LE MMAL_FOURCC('p', 'c', 'm', 'u') +-#define MMAL_ENCODING_PCM_SIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'S') +-#define MMAL_ENCODING_PCM_SIGNED_LE MMAL_FOURCC('p', 'c', 'm', 's') +-#define MMAL_ENCODING_PCM_FLOAT_BE MMAL_FOURCC('P', 'C', 'M', 'F') +-#define MMAL_ENCODING_PCM_FLOAT_LE MMAL_FOURCC('p', 'c', 'm', 'f') +- +-/* Pre-defined H264 encoding variants */ +- +-/** ISO 14496-10 Annex B byte stream format */ +-#define MMAL_ENCODING_VARIANT_H264_DEFAULT 0 +-/** ISO 14496-15 AVC stream format */ +-#define MMAL_ENCODING_VARIANT_H264_AVC1 MMAL_FOURCC('A', 'V', 'C', '1') +-/** Implicitly delineated NAL units without emulation prevention */ +-#define MMAL_ENCODING_VARIANT_H264_RAW MMAL_FOURCC('R', 'A', 'W', ' ') +- +-/** \defgroup MmalColorSpace List of pre-defined video color spaces +- * This defines a list of common color spaces. This list isn't exhaustive and +- * is only provided as a convenience to avoid clients having to use FourCC +- * codes directly. However components are allowed to define and use their own +- * FourCC codes. +- */ +-/* @{ */ +- +-/** Unknown color space */ +-#define MMAL_COLOR_SPACE_UNKNOWN 0 +-/** ITU-R BT.601-5 [SDTV] */ +-#define MMAL_COLOR_SPACE_ITUR_BT601 MMAL_FOURCC('Y', '6', '0', '1') +-/** ITU-R BT.709-3 [HDTV] */ +-#define MMAL_COLOR_SPACE_ITUR_BT709 MMAL_FOURCC('Y', '7', '0', '9') +-/** JPEG JFIF */ +-#define MMAL_COLOR_SPACE_JPEG_JFIF MMAL_FOURCC('Y', 'J', 'F', 'I') +-/** Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */ +-#define MMAL_COLOR_SPACE_FCC MMAL_FOURCC('Y', 'F', 'C', 'C') +-/** Society of Motion Picture and Television Engineers 240M (1999) */ +-#define MMAL_COLOR_SPACE_SMPTE240M MMAL_FOURCC('Y', '2', '4', '0') +-/** ITU-R BT.470-2 System M */ +-#define MMAL_COLOR_SPACE_BT470_2_M MMAL_FOURCC('Y', '_', '_', 'M') +-/** ITU-R BT.470-2 System BG */ +-#define MMAL_COLOR_SPACE_BT470_2_BG MMAL_FOURCC('Y', '_', 'B', 'G') +-/** JPEG JFIF, but with 16..255 luma */ +-#define MMAL_COLOR_SPACE_JFIF_Y16_255 MMAL_FOURCC('Y', 'Y', '1', '6') +-/* @} MmalColorSpace List */ +- +-#endif /* MMAL_ENCODINGS_H */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-common.h ++++ /dev/null +@@ -1,48 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +- +-#ifndef MMAL_MSG_COMMON_H +-#define MMAL_MSG_COMMON_H +- +-enum mmal_msg_status { +- MMAL_MSG_STATUS_SUCCESS = 0, /**< Success */ +- MMAL_MSG_STATUS_ENOMEM, /**< Out of memory */ +- MMAL_MSG_STATUS_ENOSPC, /**< Out of resources other than memory */ +- MMAL_MSG_STATUS_EINVAL, /**< Argument is invalid */ +- MMAL_MSG_STATUS_ENOSYS, /**< Function not implemented */ +- MMAL_MSG_STATUS_ENOENT, /**< No such file or directory */ +- MMAL_MSG_STATUS_ENXIO, /**< No such device or address */ +- MMAL_MSG_STATUS_EIO, /**< I/O error */ +- MMAL_MSG_STATUS_ESPIPE, /**< Illegal seek */ +- MMAL_MSG_STATUS_ECORRUPT, /**< Data is corrupt \attention */ +- MMAL_MSG_STATUS_ENOTREADY, /**< Component is not ready */ +- MMAL_MSG_STATUS_ECONFIG, /**< Component is not configured */ +- MMAL_MSG_STATUS_EISCONN, /**< Port is already connected */ +- MMAL_MSG_STATUS_ENOTCONN, /**< Port is disconnected */ +- MMAL_MSG_STATUS_EAGAIN, /**< Resource temporarily unavailable. */ +- MMAL_MSG_STATUS_EFAULT, /**< Bad address */ +-}; +- +-struct mmal_rect { +- s32 x; /**< x coordinate (from left) */ +- s32 y; /**< y coordinate (from top) */ +- s32 width; /**< width */ +- s32 height; /**< height */ +-}; +- +-struct mmal_rational { +- s32 num; /**< Numerator */ +- s32 den; /**< Denominator */ +-}; +- +-#endif /* MMAL_MSG_COMMON_H */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-format.h ++++ /dev/null +@@ -1,106 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +- +-#ifndef MMAL_MSG_FORMAT_H +-#define MMAL_MSG_FORMAT_H +- +-#include "mmal-msg-common.h" +- +-/* MMAL_ES_FORMAT_T */ +- +-struct mmal_audio_format { +- u32 channels; /* Number of audio channels */ +- u32 sample_rate; /* Sample rate */ +- +- u32 bits_per_sample; /* Bits per sample */ +- u32 block_align; /* Size of a block of data */ +-}; +- +-struct mmal_video_format { +- u32 width; /* Width of frame in pixels */ +- u32 height; /* Height of frame in rows of pixels */ +- struct mmal_rect crop; /* Visible region of the frame */ +- struct mmal_rational frame_rate; /* Frame rate */ +- struct mmal_rational par; /* Pixel aspect ratio */ +- +- /* +- * FourCC specifying the color space of the video stream. See the +- * MmalColorSpace "pre-defined color spaces" for some examples. +- */ +- u32 color_space; +-}; +- +-struct mmal_subpicture_format { +- u32 x_offset; +- u32 y_offset; +-}; +- +-union mmal_es_specific_format { +- struct mmal_audio_format audio; +- struct mmal_video_format video; +- struct mmal_subpicture_format subpicture; +-}; +- +-/* Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ +-struct mmal_es_format_local { +- u32 type; /* enum mmal_es_type */ +- +- u32 encoding; /* FourCC specifying encoding of the elementary +- * stream. +- */ +- u32 encoding_variant; /* FourCC specifying the specific +- * encoding variant of the elementary +- * stream. +- */ +- +- union mmal_es_specific_format *es; /* Type specific +- * information for the +- * elementary stream +- */ +- +- u32 bitrate; /* Bitrate in bits per second */ +- u32 flags; /* Flags describing properties of the elementary +- * stream. +- */ +- +- u32 extradata_size; /* Size of the codec specific data */ +- u8 *extradata; /* Codec specific data */ +-}; +- +-/* Remote definition of an elementary stream format (MMAL_ES_FORMAT_T) */ +-struct mmal_es_format { +- u32 type; /* enum mmal_es_type */ +- +- u32 encoding; /* FourCC specifying encoding of the elementary +- * stream. +- */ +- u32 encoding_variant; /* FourCC specifying the specific +- * encoding variant of the elementary +- * stream. +- */ +- +- u32 es; /* Type specific +- * information for the +- * elementary stream +- */ +- +- u32 bitrate; /* Bitrate in bits per second */ +- u32 flags; /* Flags describing properties of the elementary +- * stream. +- */ +- +- u32 extradata_size; /* Size of the codec specific data */ +- u32 extradata; /* Codec specific data */ +-}; +- +-#endif /* MMAL_MSG_FORMAT_H */ +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg-port.h ++++ /dev/null +@@ -1,109 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +- +-/* MMAL_PORT_TYPE_T */ +-enum mmal_port_type { +- MMAL_PORT_TYPE_UNKNOWN = 0, /* Unknown port type */ +- MMAL_PORT_TYPE_CONTROL, /* Control port */ +- MMAL_PORT_TYPE_INPUT, /* Input port */ +- MMAL_PORT_TYPE_OUTPUT, /* Output port */ +- MMAL_PORT_TYPE_CLOCK, /* Clock port */ +-}; +- +-/* The port is pass-through and doesn't need buffer headers allocated */ +-#define MMAL_PORT_CAPABILITY_PASSTHROUGH 0x01 +-/* +- *The port wants to allocate the buffer payloads. +- * This signals a preference that payload allocation should be done +- * on this port for efficiency reasons. +- */ +-#define MMAL_PORT_CAPABILITY_ALLOCATION 0x02 +-/* +- * The port supports format change events. +- * This applies to input ports and is used to let the client know +- * whether the port supports being reconfigured via a format +- * change event (i.e. without having to disable the port). +- */ +-#define MMAL_PORT_CAPABILITY_SUPPORTS_EVENT_FORMAT_CHANGE 0x04 +- +-/* +- * mmal port structure (MMAL_PORT_T) +- * +- * most elements are informational only, the pointer values for +- * interogation messages are generally provided as additional +- * structures within the message. When used to set values only the +- * buffer_num, buffer_size and userdata parameters are writable. +- */ +-struct mmal_port { +- u32 priv; /* Private member used by the framework */ +- u32 name; /* Port name. Used for debugging purposes (RO) */ +- +- u32 type; /* Type of the port (RO) enum mmal_port_type */ +- u16 index; /* Index of the port in its type list (RO) */ +- u16 index_all; /* Index of the port in the list of all ports (RO) */ +- +- u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */ +- u32 format; /* Format of the elementary stream */ +- +- u32 buffer_num_min; /* Minimum number of buffers the port +- * requires (RO). This is set by the +- * component. +- */ +- +- u32 buffer_size_min; /* Minimum size of buffers the port +- * requires (RO). This is set by the +- * component. +- */ +- +- u32 buffer_alignment_min;/* Minimum alignment requirement for +- * the buffers (RO). A value of +- * zero means no special alignment +- * requirements. This is set by the +- * component. +- */ +- +- u32 buffer_num_recommended; /* Number of buffers the port +- * recommends for optimal +- * performance (RO). A value of +- * zero means no special +- * recommendation. This is set +- * by the component. +- */ +- +- u32 buffer_size_recommended; /* Size of buffers the port +- * recommends for optimal +- * performance (RO). A value of +- * zero means no special +- * recommendation. This is set +- * by the component. +- */ +- +- u32 buffer_num; /* Actual number of buffers the port will use. +- * This is set by the client. +- */ +- +- u32 buffer_size; /* Actual maximum size of the buffers that +- * will be sent to the port. This is set by +- * the client. +- */ +- +- u32 component; /* Component this port belongs to (Read Only) */ +- +- u32 userdata; /* Field reserved for use by the client */ +- +- u32 capabilities; /* Flags describing the capabilities of a +- * port (RO). Bitwise combination of \ref +- * portcapabilities "Port capabilities" +- * values. +- */ +-}; +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-msg.h ++++ /dev/null +@@ -1,406 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +- +-/* +- * all the data structures which serialise the MMAL protocol. note +- * these are directly mapped onto the recived message data. +- * +- * BEWARE: They seem to *assume* pointers are u32 and that there is no +- * structure padding! +- * +- * NOTE: this implementation uses kernel types to ensure sizes. Rather +- * than assigning values to enums to force their size the +- * implementation uses fixed size types and not the enums (though the +- * comments have the actual enum type +- */ +-#ifndef MMAL_MSG_H +-#define MMAL_MSG_H +- +-#define VC_MMAL_VER 15 +-#define VC_MMAL_MIN_VER 10 +-#define VC_MMAL_SERVER_NAME MAKE_FOURCC("mmal") +- +-/* max total message size is 512 bytes */ +-#define MMAL_MSG_MAX_SIZE 512 +-/* with six 32bit header elements max payload is therefore 488 bytes */ +-#define MMAL_MSG_MAX_PAYLOAD 488 +- +-#include "mmal-msg-common.h" +-#include "mmal-msg-format.h" +-#include "mmal-msg-port.h" +- +-enum mmal_msg_type { +- MMAL_MSG_TYPE_QUIT = 1, +- MMAL_MSG_TYPE_SERVICE_CLOSED, +- MMAL_MSG_TYPE_GET_VERSION, +- MMAL_MSG_TYPE_COMPONENT_CREATE, +- MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */ +- MMAL_MSG_TYPE_COMPONENT_ENABLE, +- MMAL_MSG_TYPE_COMPONENT_DISABLE, +- MMAL_MSG_TYPE_PORT_INFO_GET, +- MMAL_MSG_TYPE_PORT_INFO_SET, +- MMAL_MSG_TYPE_PORT_ACTION, /* 10 */ +- MMAL_MSG_TYPE_BUFFER_FROM_HOST, +- MMAL_MSG_TYPE_BUFFER_TO_HOST, +- MMAL_MSG_TYPE_GET_STATS, +- MMAL_MSG_TYPE_PORT_PARAMETER_SET, +- MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */ +- MMAL_MSG_TYPE_EVENT_TO_HOST, +- MMAL_MSG_TYPE_GET_CORE_STATS_FOR_PORT, +- MMAL_MSG_TYPE_OPAQUE_ALLOCATOR, +- MMAL_MSG_TYPE_CONSUME_MEM, +- MMAL_MSG_TYPE_LMK, /* 20 */ +- MMAL_MSG_TYPE_OPAQUE_ALLOCATOR_DESC, +- MMAL_MSG_TYPE_DRM_GET_LHS32, +- MMAL_MSG_TYPE_DRM_GET_TIME, +- MMAL_MSG_TYPE_BUFFER_FROM_HOST_ZEROLEN, +- MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */ +- MMAL_MSG_TYPE_HOST_LOG, +- MMAL_MSG_TYPE_MSG_LAST +-}; +- +-/* port action request messages differ depending on the action type */ +-enum mmal_msg_port_action_type { +- MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unknown action */ +- MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */ +- MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */ +- MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */ +- MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */ +- MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */ +- MMAL_MSG_PORT_ACTION_TYPE_SET_REQUIREMENTS, /* Set buffer requirements*/ +-}; +- +-struct mmal_msg_header { +- u32 magic; +- u32 type; /* enum mmal_msg_type */ +- +- /* Opaque handle to the control service */ +- u32 control_service; +- +- u32 context; /* a u32 per message context */ +- u32 status; /* The status of the vchiq operation */ +- u32 padding; +-}; +- +-/* Send from VC to host to report version */ +-struct mmal_msg_version { +- u32 flags; +- u32 major; +- u32 minor; +- u32 minimum; +-}; +- +-/* request to VC to create component */ +-struct mmal_msg_component_create { +- u32 client_component; /* component context */ +- char name[128]; +- u32 pid; /* For debug */ +-}; +- +-/* reply from VC to component creation request */ +-struct mmal_msg_component_create_reply { +- u32 status; /* enum mmal_msg_status - how does this differ to +- * the one in the header? +- */ +- u32 component_handle; /* VideoCore handle for component */ +- u32 input_num; /* Number of input ports */ +- u32 output_num; /* Number of output ports */ +- u32 clock_num; /* Number of clock ports */ +-}; +- +-/* request to VC to destroy a component */ +-struct mmal_msg_component_destroy { +- u32 component_handle; +-}; +- +-struct mmal_msg_component_destroy_reply { +- u32 status; /* The component destruction status */ +-}; +- +-/* request and reply to VC to enable a component */ +-struct mmal_msg_component_enable { +- u32 component_handle; +-}; +- +-struct mmal_msg_component_enable_reply { +- u32 status; /* The component enable status */ +-}; +- +-/* request and reply to VC to disable a component */ +-struct mmal_msg_component_disable { +- u32 component_handle; +-}; +- +-struct mmal_msg_component_disable_reply { +- u32 status; /* The component disable status */ +-}; +- +-/* request to VC to get port information */ +-struct mmal_msg_port_info_get { +- u32 component_handle; /* component handle port is associated with */ +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 index; /* port index to query */ +-}; +- +-/* reply from VC to get port info request */ +-struct mmal_msg_port_info_get_reply { +- u32 status; /* enum mmal_msg_status */ +- u32 component_handle; /* component handle port is associated with */ +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 port_index; /* port indexed in query */ +- s32 found; /* unused */ +- u32 port_handle; /* Handle to use for this port */ +- struct mmal_port port; +- struct mmal_es_format format; /* elementary stream format */ +- union mmal_es_specific_format es; /* es type specific data */ +- u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; /* es extra data */ +-}; +- +-/* request to VC to set port information */ +-struct mmal_msg_port_info_set { +- u32 component_handle; +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 port_index; /* port indexed in query */ +- struct mmal_port port; +- struct mmal_es_format format; +- union mmal_es_specific_format es; +- u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; +-}; +- +-/* reply from VC to port info set request */ +-struct mmal_msg_port_info_set_reply { +- u32 status; +- u32 component_handle; /* component handle port is associated with */ +- u32 port_type; /* enum mmal_msg_port_type */ +- u32 index; /* port indexed in query */ +- s32 found; /* unused */ +- u32 port_handle; /* Handle to use for this port */ +- struct mmal_port port; +- struct mmal_es_format format; +- union mmal_es_specific_format es; +- u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; +-}; +- +-/* port action requests that take a mmal_port as a parameter */ +-struct mmal_msg_port_action_port { +- u32 component_handle; +- u32 port_handle; +- u32 action; /* enum mmal_msg_port_action_type */ +- struct mmal_port port; +-}; +- +-/* port action requests that take handles as a parameter */ +-struct mmal_msg_port_action_handle { +- u32 component_handle; +- u32 port_handle; +- u32 action; /* enum mmal_msg_port_action_type */ +- u32 connect_component_handle; +- u32 connect_port_handle; +-}; +- +-struct mmal_msg_port_action_reply { +- u32 status; /* The port action operation status */ +-}; +- +-/* MMAL buffer transfer */ +- +-/* Size of space reserved in a buffer message for short messages. */ +-#define MMAL_VC_SHORT_DATA 128 +- +-/* Signals that the current payload is the end of the stream of data */ +-#define MMAL_BUFFER_HEADER_FLAG_EOS BIT(0) +-/* Signals that the start of the current payload starts a frame */ +-#define MMAL_BUFFER_HEADER_FLAG_FRAME_START BIT(1) +-/* Signals that the end of the current payload ends a frame */ +-#define MMAL_BUFFER_HEADER_FLAG_FRAME_END BIT(2) +-/* Signals that the current payload contains only complete frames (>1) */ +-#define MMAL_BUFFER_HEADER_FLAG_FRAME \ +- (MMAL_BUFFER_HEADER_FLAG_FRAME_START | \ +- MMAL_BUFFER_HEADER_FLAG_FRAME_END) +-/* Signals that the current payload is a keyframe (i.e. self decodable) */ +-#define MMAL_BUFFER_HEADER_FLAG_KEYFRAME BIT(3) +-/* +- * Signals a discontinuity in the stream of data (e.g. after a seek). +- * Can be used for instance by a decoder to reset its state +- */ +-#define MMAL_BUFFER_HEADER_FLAG_DISCONTINUITY BIT(4) +-/* +- * Signals a buffer containing some kind of config data for the component +- * (e.g. codec config data) +- */ +-#define MMAL_BUFFER_HEADER_FLAG_CONFIG BIT(5) +-/* Signals an encrypted payload */ +-#define MMAL_BUFFER_HEADER_FLAG_ENCRYPTED BIT(6) +-/* Signals a buffer containing side information */ +-#define MMAL_BUFFER_HEADER_FLAG_CODECSIDEINFO BIT(7) +-/* +- * Signals a buffer which is the snapshot/postview image from a stills +- * capture +- */ +-#define MMAL_BUFFER_HEADER_FLAGS_SNAPSHOT BIT(8) +-/* Signals a buffer which contains data known to be corrupted */ +-#define MMAL_BUFFER_HEADER_FLAG_CORRUPTED BIT(9) +-/* Signals that a buffer failed to be transmitted */ +-#define MMAL_BUFFER_HEADER_FLAG_TRANSMISSION_FAILED BIT(10) +- +-struct mmal_driver_buffer { +- u32 magic; +- u32 component_handle; +- u32 port_handle; +- u32 client_context; +-}; +- +-/* buffer header */ +-struct mmal_buffer_header { +- u32 next; /* next header */ +- u32 priv; /* framework private data */ +- u32 cmd; +- u32 data; +- u32 alloc_size; +- u32 length; +- u32 offset; +- u32 flags; +- s64 pts; +- s64 dts; +- u32 type; +- u32 user_data; +-}; +- +-struct mmal_buffer_header_type_specific { +- union { +- struct { +- u32 planes; +- u32 offset[4]; +- u32 pitch[4]; +- u32 flags; +- } video; +- } u; +-}; +- +-struct mmal_msg_buffer_from_host { +- /* +- *The front 32 bytes of the buffer header are copied +- * back to us in the reply to allow for context. This +- * area is used to store two mmal_driver_buffer structures to +- * allow for multiple concurrent service users. +- */ +- /* control data */ +- struct mmal_driver_buffer drvbuf; +- +- /* referenced control data for passthrough buffer management */ +- struct mmal_driver_buffer drvbuf_ref; +- struct mmal_buffer_header buffer_header; /* buffer header itself */ +- struct mmal_buffer_header_type_specific buffer_header_type_specific; +- s32 is_zero_copy; +- s32 has_reference; +- +- /* allows short data to be xfered in control message */ +- u32 payload_in_message; +- u8 short_data[MMAL_VC_SHORT_DATA]; +-}; +- +-/* port parameter setting */ +- +-#define MMAL_WORKER_PORT_PARAMETER_SPACE 96 +- +-struct mmal_msg_port_parameter_set { +- u32 component_handle; /* component */ +- u32 port_handle; /* port */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ +- uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; +-}; +- +-struct mmal_msg_port_parameter_set_reply { +- u32 status; /* enum mmal_msg_status todo: how does this +- * differ to the one in the header? +- */ +-}; +- +-/* port parameter getting */ +- +-struct mmal_msg_port_parameter_get { +- u32 component_handle; /* component */ +- u32 port_handle; /* port */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ +-}; +- +-struct mmal_msg_port_parameter_get_reply { +- u32 status; /* Status of mmal_port_parameter_get call */ +- u32 id; /* Parameter ID */ +- u32 size; /* Parameter size */ +- uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; +-}; +- +-/* event messages */ +-#define MMAL_WORKER_EVENT_SPACE 256 +- +-struct mmal_msg_event_to_host { +- u32 client_component; /* component context */ +- +- u32 port_type; +- u32 port_num; +- +- u32 cmd; +- u32 length; +- u8 data[MMAL_WORKER_EVENT_SPACE]; +- u32 delayed_buffer; +-}; +- +-/* all mmal messages are serialised through this structure */ +-struct mmal_msg { +- /* header */ +- struct mmal_msg_header h; +- /* payload */ +- union { +- struct mmal_msg_version version; +- +- struct mmal_msg_component_create component_create; +- struct mmal_msg_component_create_reply component_create_reply; +- +- struct mmal_msg_component_destroy component_destroy; +- struct mmal_msg_component_destroy_reply component_destroy_reply; +- +- struct mmal_msg_component_enable component_enable; +- struct mmal_msg_component_enable_reply component_enable_reply; +- +- struct mmal_msg_component_disable component_disable; +- struct mmal_msg_component_disable_reply component_disable_reply; +- +- struct mmal_msg_port_info_get port_info_get; +- struct mmal_msg_port_info_get_reply port_info_get_reply; +- +- struct mmal_msg_port_info_set port_info_set; +- struct mmal_msg_port_info_set_reply port_info_set_reply; +- +- struct mmal_msg_port_action_port port_action_port; +- struct mmal_msg_port_action_handle port_action_handle; +- struct mmal_msg_port_action_reply port_action_reply; +- +- struct mmal_msg_buffer_from_host buffer_from_host; +- +- struct mmal_msg_port_parameter_set port_parameter_set; +- struct mmal_msg_port_parameter_set_reply +- port_parameter_set_reply; +- struct mmal_msg_port_parameter_get +- port_parameter_get; +- struct mmal_msg_port_parameter_get_reply +- port_parameter_get_reply; +- +- struct mmal_msg_event_to_host event_to_host; +- +- u8 payload[MMAL_MSG_MAX_PAYLOAD]; +- } u; +-}; +-#endif +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-parameters.h ++++ /dev/null +@@ -1,755 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- */ +- +-/* common parameters */ +- +-/** @name Parameter groups +- * Parameters are divided into groups, and then allocated sequentially within +- * a group using an enum. +- * @{ +- */ +- +-#ifndef MMAL_PARAMETERS_H +-#define MMAL_PARAMETERS_H +- +-/** Common parameter ID group, used with many types of component. */ +-#define MMAL_PARAMETER_GROUP_COMMON (0 << 16) +-/** Camera-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16) +-/** Video-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16) +-/** Audio-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16) +-/** Clock-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16) +-/** Miracast-specific parameter ID group. */ +-#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16) +- +-/* Common parameters */ +-enum mmal_parameter_common_type { +- /**< Never a valid parameter ID */ +- MMAL_PARAMETER_UNUSED = MMAL_PARAMETER_GROUP_COMMON, +- +- /**< MMAL_PARAMETER_ENCODING_T */ +- MMAL_PARAMETER_SUPPORTED_ENCODINGS, +- /**< MMAL_PARAMETER_URI_T */ +- MMAL_PARAMETER_URI, +- /** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */ +- MMAL_PARAMETER_CHANGE_EVENT_REQUEST, +- /** MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ZERO_COPY, +- /**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */ +- MMAL_PARAMETER_BUFFER_REQUIREMENTS, +- /**< MMAL_PARAMETER_STATISTICS_T */ +- MMAL_PARAMETER_STATISTICS, +- /**< MMAL_PARAMETER_CORE_STATISTICS_T */ +- MMAL_PARAMETER_CORE_STATISTICS, +- /**< MMAL_PARAMETER_MEM_USAGE_T */ +- MMAL_PARAMETER_MEM_USAGE, +- /**< MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_BUFFER_FLAG_FILTER, +- /**< MMAL_PARAMETER_SEEK_T */ +- MMAL_PARAMETER_SEEK, +- /**< MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_POWERMON_ENABLE, +- /**< MMAL_PARAMETER_LOGGING_T */ +- MMAL_PARAMETER_LOGGING, +- /**< MMAL_PARAMETER_UINT64_T */ +- MMAL_PARAMETER_SYSTEM_TIME, +- /**< MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_NO_IMAGE_PADDING, +-}; +- +-/* camera parameters */ +- +-enum mmal_parameter_camera_type { +- /* 0 */ +- /** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */ +- MMAL_PARAMETER_THUMBNAIL_CONFIGURATION = +- MMAL_PARAMETER_GROUP_CAMERA, +- /**< Unused? */ +- MMAL_PARAMETER_CAPTURE_QUALITY, +- /**< @ref MMAL_PARAMETER_INT32_T */ +- MMAL_PARAMETER_ROTATION, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_EXIF_DISABLE, +- /**< @ref MMAL_PARAMETER_EXIF_T */ +- MMAL_PARAMETER_EXIF, +- /**< @ref MMAL_PARAM_AWBMODE_T */ +- MMAL_PARAMETER_AWB_MODE, +- /**< @ref MMAL_PARAMETER_IMAGEFX_T */ +- MMAL_PARAMETER_IMAGE_EFFECT, +- /**< @ref MMAL_PARAMETER_COLOURFX_T */ +- MMAL_PARAMETER_COLOUR_EFFECT, +- /**< @ref MMAL_PARAMETER_FLICKERAVOID_T */ +- MMAL_PARAMETER_FLICKER_AVOID, +- /**< @ref MMAL_PARAMETER_FLASH_T */ +- MMAL_PARAMETER_FLASH, +- /**< @ref MMAL_PARAMETER_REDEYE_T */ +- MMAL_PARAMETER_REDEYE, +- /**< @ref MMAL_PARAMETER_FOCUS_T */ +- MMAL_PARAMETER_FOCUS, +- /**< Unused? */ +- MMAL_PARAMETER_FOCAL_LENGTHS, +- /**< @ref MMAL_PARAMETER_INT32_T */ +- MMAL_PARAMETER_EXPOSURE_COMP, +- /**< @ref MMAL_PARAMETER_SCALEFACTOR_T */ +- MMAL_PARAMETER_ZOOM, +- /**< @ref MMAL_PARAMETER_MIRROR_T */ +- MMAL_PARAMETER_MIRROR, +- +- /* 0x10 */ +- /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_CAMERA_NUM, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_CAPTURE, +- /**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */ +- MMAL_PARAMETER_EXPOSURE_MODE, +- /**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */ +- MMAL_PARAMETER_EXP_METERING_MODE, +- /**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */ +- MMAL_PARAMETER_FOCUS_STATUS, +- /**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */ +- MMAL_PARAMETER_CAMERA_CONFIG, +- /**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */ +- MMAL_PARAMETER_CAPTURE_STATUS, +- /**< @ref MMAL_PARAMETER_FACE_TRACK_T */ +- MMAL_PARAMETER_FACE_TRACK, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS, +- /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_JPEG_Q_FACTOR, +- /**< @ref MMAL_PARAMETER_FRAME_RATE_T */ +- MMAL_PARAMETER_FRAME_RATE, +- /**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */ +- MMAL_PARAMETER_USE_STC, +- /**< @ref MMAL_PARAMETER_CAMERA_INFO_T */ +- MMAL_PARAMETER_CAMERA_INFO, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_STABILISATION, +- /**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */ +- MMAL_PARAMETER_FACE_TRACK_RESULTS, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ENABLE_RAW_CAPTURE, +- +- /* 0x20 */ +- /**< @ref MMAL_PARAMETER_URI_T */ +- MMAL_PARAMETER_DPF_FILE, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ENABLE_DPF_FILE, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_DPF_FAIL_IS_FATAL, +- /**< @ref MMAL_PARAMETER_CAPTUREMODE_T */ +- MMAL_PARAMETER_CAPTURE_MODE, +- /**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */ +- MMAL_PARAMETER_FOCUS_REGIONS, +- /**< @ref MMAL_PARAMETER_INPUT_CROP_T */ +- MMAL_PARAMETER_INPUT_CROP, +- /**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */ +- MMAL_PARAMETER_SENSOR_INFORMATION, +- /**< @ref MMAL_PARAMETER_FLASH_SELECT_T */ +- MMAL_PARAMETER_FLASH_SELECT, +- /**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */ +- MMAL_PARAMETER_FIELD_OF_VIEW, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_HIGH_DYNAMIC_RANGE, +- /**< @ref MMAL_PARAMETER_DRC_T */ +- MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION, +- /**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */ +- MMAL_PARAMETER_ALGORITHM_CONTROL, +- /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_SHARPNESS, +- /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_CONTRAST, +- /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_BRIGHTNESS, +- /**< @ref MMAL_PARAMETER_RATIONAL_T */ +- MMAL_PARAMETER_SATURATION, +- +- /* 0x30 */ +- /**< @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_ISO, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ANTISHAKE, +- /** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */ +- MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS, +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_CAMERA_BURST_CAPTURE, +- /** @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_CAMERA_MIN_ISO, +- /** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */ +- MMAL_PARAMETER_CAMERA_USE_CASE, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_CAPTURE_STATS_PASS, +- /** @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_CAMERA_CUSTOM_SENSOR_CONFIG, +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_ENABLE_REGISTER_FILE, +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_REGISTER_FAIL_IS_FATAL, +- /** @ref MMAL_PARAMETER_CONFIGFILE_T */ +- MMAL_PARAMETER_CONFIGFILE_REGISTERS, +- /** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */ +- MMAL_PARAMETER_CONFIGFILE_CHUNK_REGISTERS, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_JPEG_ATTACH_LOG, +- /**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */ +- MMAL_PARAMETER_ZERO_SHUTTER_LAG, +- /**< @ref MMAL_PARAMETER_FPS_RANGE_T */ +- MMAL_PARAMETER_FPS_RANGE, +- /**< @ref MMAL_PARAMETER_INT32_T */ +- MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP, +- +- /* 0x40 */ +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_SW_SHARPEN_DISABLE, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_FLASH_REQUIRED, +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_SW_SATURATION_DISABLE, +- /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_SHUTTER_SPEED, +- /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ +- MMAL_PARAMETER_CUSTOM_AWB_GAINS, +-}; +- +-struct mmal_parameter_rational { +- s32 num; /**< Numerator */ +- s32 den; /**< Denominator */ +-}; +- +-enum mmal_parameter_camera_config_timestamp_mode { +- MMAL_PARAM_TIMESTAMP_MODE_ZERO = 0, /* Always timestamp frames as 0 */ +- MMAL_PARAM_TIMESTAMP_MODE_RAW_STC, /* Use the raw STC value +- * for the frame timestamp +- */ +- MMAL_PARAM_TIMESTAMP_MODE_RESET_STC, /* Use the STC timestamp +- * but subtract the +- * timestamp of the first +- * frame sent to give a +- * zero based timestamp. +- */ +-}; +- +-struct mmal_parameter_fps_range { +- /**< Low end of the permitted framerate range */ +- struct mmal_parameter_rational fps_low; +- /**< High end of the permitted framerate range */ +- struct mmal_parameter_rational fps_high; +-}; +- +-/* camera configuration parameter */ +-struct mmal_parameter_camera_config { +- /* Parameters for setting up the image pools */ +- u32 max_stills_w; /* Max size of stills capture */ +- u32 max_stills_h; +- u32 stills_yuv422; /* Allow YUV422 stills capture */ +- u32 one_shot_stills; /* Continuous or one shot stills captures. */ +- +- u32 max_preview_video_w; /* Max size of the preview or video +- * capture frames +- */ +- u32 max_preview_video_h; +- u32 num_preview_video_frames; +- +- /** Sets the height of the circular buffer for stills capture. */ +- u32 stills_capture_circular_buffer_height; +- +- /** Allows preview/encode to resume as fast as possible after the stills +- * input frame has been received, and then processes the still frame in +- * the background whilst preview/encode has resumed. +- * Actual mode is controlled by MMAL_PARAMETER_CAPTURE_MODE. +- */ +- u32 fast_preview_resume; +- +- /** Selects algorithm for timestamping frames if +- * there is no clock component connected. +- * enum mmal_parameter_camera_config_timestamp_mode +- */ +- s32 use_stc_timestamp; +-}; +- +-enum mmal_parameter_exposuremode { +- MMAL_PARAM_EXPOSUREMODE_OFF, +- MMAL_PARAM_EXPOSUREMODE_AUTO, +- MMAL_PARAM_EXPOSUREMODE_NIGHT, +- MMAL_PARAM_EXPOSUREMODE_NIGHTPREVIEW, +- MMAL_PARAM_EXPOSUREMODE_BACKLIGHT, +- MMAL_PARAM_EXPOSUREMODE_SPOTLIGHT, +- MMAL_PARAM_EXPOSUREMODE_SPORTS, +- MMAL_PARAM_EXPOSUREMODE_SNOW, +- MMAL_PARAM_EXPOSUREMODE_BEACH, +- MMAL_PARAM_EXPOSUREMODE_VERYLONG, +- MMAL_PARAM_EXPOSUREMODE_FIXEDFPS, +- MMAL_PARAM_EXPOSUREMODE_ANTISHAKE, +- MMAL_PARAM_EXPOSUREMODE_FIREWORKS, +-}; +- +-enum mmal_parameter_exposuremeteringmode { +- MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE, +- MMAL_PARAM_EXPOSUREMETERINGMODE_SPOT, +- MMAL_PARAM_EXPOSUREMETERINGMODE_BACKLIT, +- MMAL_PARAM_EXPOSUREMETERINGMODE_MATRIX, +-}; +- +-enum mmal_parameter_awbmode { +- MMAL_PARAM_AWBMODE_OFF, +- MMAL_PARAM_AWBMODE_AUTO, +- MMAL_PARAM_AWBMODE_SUNLIGHT, +- MMAL_PARAM_AWBMODE_CLOUDY, +- MMAL_PARAM_AWBMODE_SHADE, +- MMAL_PARAM_AWBMODE_TUNGSTEN, +- MMAL_PARAM_AWBMODE_FLUORESCENT, +- MMAL_PARAM_AWBMODE_INCANDESCENT, +- MMAL_PARAM_AWBMODE_FLASH, +- MMAL_PARAM_AWBMODE_HORIZON, +-}; +- +-enum mmal_parameter_imagefx { +- MMAL_PARAM_IMAGEFX_NONE, +- MMAL_PARAM_IMAGEFX_NEGATIVE, +- MMAL_PARAM_IMAGEFX_SOLARIZE, +- MMAL_PARAM_IMAGEFX_POSTERIZE, +- MMAL_PARAM_IMAGEFX_WHITEBOARD, +- MMAL_PARAM_IMAGEFX_BLACKBOARD, +- MMAL_PARAM_IMAGEFX_SKETCH, +- MMAL_PARAM_IMAGEFX_DENOISE, +- MMAL_PARAM_IMAGEFX_EMBOSS, +- MMAL_PARAM_IMAGEFX_OILPAINT, +- MMAL_PARAM_IMAGEFX_HATCH, +- MMAL_PARAM_IMAGEFX_GPEN, +- MMAL_PARAM_IMAGEFX_PASTEL, +- MMAL_PARAM_IMAGEFX_WATERCOLOUR, +- MMAL_PARAM_IMAGEFX_FILM, +- MMAL_PARAM_IMAGEFX_BLUR, +- MMAL_PARAM_IMAGEFX_SATURATION, +- MMAL_PARAM_IMAGEFX_COLOURSWAP, +- MMAL_PARAM_IMAGEFX_WASHEDOUT, +- MMAL_PARAM_IMAGEFX_POSTERISE, +- MMAL_PARAM_IMAGEFX_COLOURPOINT, +- MMAL_PARAM_IMAGEFX_COLOURBALANCE, +- MMAL_PARAM_IMAGEFX_CARTOON, +-}; +- +-enum MMAL_PARAM_FLICKERAVOID_T { +- MMAL_PARAM_FLICKERAVOID_OFF, +- MMAL_PARAM_FLICKERAVOID_AUTO, +- MMAL_PARAM_FLICKERAVOID_50HZ, +- MMAL_PARAM_FLICKERAVOID_60HZ, +- MMAL_PARAM_FLICKERAVOID_MAX = 0x7FFFFFFF +-}; +- +-struct mmal_parameter_awbgains { +- struct mmal_parameter_rational r_gain; /**< Red gain */ +- struct mmal_parameter_rational b_gain; /**< Blue gain */ +-}; +- +-/** Manner of video rate control */ +-enum mmal_parameter_rate_control_mode { +- MMAL_VIDEO_RATECONTROL_DEFAULT, +- MMAL_VIDEO_RATECONTROL_VARIABLE, +- MMAL_VIDEO_RATECONTROL_CONSTANT, +- MMAL_VIDEO_RATECONTROL_VARIABLE_SKIP_FRAMES, +- MMAL_VIDEO_RATECONTROL_CONSTANT_SKIP_FRAMES +-}; +- +-enum mmal_video_profile { +- MMAL_VIDEO_PROFILE_H263_BASELINE, +- MMAL_VIDEO_PROFILE_H263_H320CODING, +- MMAL_VIDEO_PROFILE_H263_BACKWARDCOMPATIBLE, +- MMAL_VIDEO_PROFILE_H263_ISWV2, +- MMAL_VIDEO_PROFILE_H263_ISWV3, +- MMAL_VIDEO_PROFILE_H263_HIGHCOMPRESSION, +- MMAL_VIDEO_PROFILE_H263_INTERNET, +- MMAL_VIDEO_PROFILE_H263_INTERLACE, +- MMAL_VIDEO_PROFILE_H263_HIGHLATENCY, +- MMAL_VIDEO_PROFILE_MP4V_SIMPLE, +- MMAL_VIDEO_PROFILE_MP4V_SIMPLESCALABLE, +- MMAL_VIDEO_PROFILE_MP4V_CORE, +- MMAL_VIDEO_PROFILE_MP4V_MAIN, +- MMAL_VIDEO_PROFILE_MP4V_NBIT, +- MMAL_VIDEO_PROFILE_MP4V_SCALABLETEXTURE, +- MMAL_VIDEO_PROFILE_MP4V_SIMPLEFACE, +- MMAL_VIDEO_PROFILE_MP4V_SIMPLEFBA, +- MMAL_VIDEO_PROFILE_MP4V_BASICANIMATED, +- MMAL_VIDEO_PROFILE_MP4V_HYBRID, +- MMAL_VIDEO_PROFILE_MP4V_ADVANCEDREALTIME, +- MMAL_VIDEO_PROFILE_MP4V_CORESCALABLE, +- MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCODING, +- MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCORE, +- MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSCALABLE, +- MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSIMPLE, +- MMAL_VIDEO_PROFILE_H264_BASELINE, +- MMAL_VIDEO_PROFILE_H264_MAIN, +- MMAL_VIDEO_PROFILE_H264_EXTENDED, +- MMAL_VIDEO_PROFILE_H264_HIGH, +- MMAL_VIDEO_PROFILE_H264_HIGH10, +- MMAL_VIDEO_PROFILE_H264_HIGH422, +- MMAL_VIDEO_PROFILE_H264_HIGH444, +- MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE, +- MMAL_VIDEO_PROFILE_DUMMY = 0x7FFFFFFF +-}; +- +-enum mmal_video_level { +- MMAL_VIDEO_LEVEL_H263_10, +- MMAL_VIDEO_LEVEL_H263_20, +- MMAL_VIDEO_LEVEL_H263_30, +- MMAL_VIDEO_LEVEL_H263_40, +- MMAL_VIDEO_LEVEL_H263_45, +- MMAL_VIDEO_LEVEL_H263_50, +- MMAL_VIDEO_LEVEL_H263_60, +- MMAL_VIDEO_LEVEL_H263_70, +- MMAL_VIDEO_LEVEL_MP4V_0, +- MMAL_VIDEO_LEVEL_MP4V_0b, +- MMAL_VIDEO_LEVEL_MP4V_1, +- MMAL_VIDEO_LEVEL_MP4V_2, +- MMAL_VIDEO_LEVEL_MP4V_3, +- MMAL_VIDEO_LEVEL_MP4V_4, +- MMAL_VIDEO_LEVEL_MP4V_4a, +- MMAL_VIDEO_LEVEL_MP4V_5, +- MMAL_VIDEO_LEVEL_MP4V_6, +- MMAL_VIDEO_LEVEL_H264_1, +- MMAL_VIDEO_LEVEL_H264_1b, +- MMAL_VIDEO_LEVEL_H264_11, +- MMAL_VIDEO_LEVEL_H264_12, +- MMAL_VIDEO_LEVEL_H264_13, +- MMAL_VIDEO_LEVEL_H264_2, +- MMAL_VIDEO_LEVEL_H264_21, +- MMAL_VIDEO_LEVEL_H264_22, +- MMAL_VIDEO_LEVEL_H264_3, +- MMAL_VIDEO_LEVEL_H264_31, +- MMAL_VIDEO_LEVEL_H264_32, +- MMAL_VIDEO_LEVEL_H264_4, +- MMAL_VIDEO_LEVEL_H264_41, +- MMAL_VIDEO_LEVEL_H264_42, +- MMAL_VIDEO_LEVEL_H264_5, +- MMAL_VIDEO_LEVEL_H264_51, +- MMAL_VIDEO_LEVEL_DUMMY = 0x7FFFFFFF +-}; +- +-struct mmal_parameter_video_profile { +- enum mmal_video_profile profile; +- enum mmal_video_level level; +-}; +- +-/* video parameters */ +- +-enum mmal_parameter_video_type { +- /** @ref MMAL_DISPLAYREGION_T */ +- MMAL_PARAMETER_DISPLAYREGION = MMAL_PARAMETER_GROUP_VIDEO, +- +- /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ +- MMAL_PARAMETER_SUPPORTED_PROFILES, +- +- /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ +- MMAL_PARAMETER_PROFILE, +- +- /** @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_INTRAPERIOD, +- +- /** @ref MMAL_PARAMETER_VIDEO_RATECONTROL_T */ +- MMAL_PARAMETER_RATECONTROL, +- +- /** @ref MMAL_PARAMETER_VIDEO_NALUNITFORMAT_T */ +- MMAL_PARAMETER_NALUNITFORMAT, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_MINIMISE_FRAGMENTATION, +- +- /** @ref MMAL_PARAMETER_UINT32_T. +- * Setting the value to zero resets to the default (one slice per +- * frame). +- */ +- MMAL_PARAMETER_MB_ROWS_PER_SLICE, +- +- /** @ref MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION_T */ +- MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION, +- +- /** @ref MMAL_PARAMETER_VIDEO_EEDE_ENABLE_T */ +- MMAL_PARAMETER_VIDEO_EEDE_ENABLE, +- +- /** @ref MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE_T */ +- MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. Request an I-frame. */ +- MMAL_PARAMETER_VIDEO_REQUEST_I_FRAME, +- /** @ref MMAL_PARAMETER_VIDEO_INTRA_REFRESH_T */ +- MMAL_PARAMETER_VIDEO_INTRA_REFRESH, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. */ +- MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT, +- +- /** @ref MMAL_PARAMETER_UINT32_T. Run-time bit rate control */ +- MMAL_PARAMETER_VIDEO_BIT_RATE, +- +- /** @ref MMAL_PARAMETER_FRAME_RATE_T */ +- MMAL_PARAMETER_VIDEO_FRAME_RATE, +- +- /** @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_MIN_QUANT, +- +- /** @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_MAX_QUANT, +- +- /** @ref MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL, +- +- MMAL_PARAMETER_EXTRA_BUFFERS, /**< @ref MMAL_PARAMETER_UINT32_T. */ +- /** @ref MMAL_PARAMETER_UINT32_T. +- * Changing this parameter from the default can reduce frame rate +- * because image buffers need to be re-pitched. +- */ +- MMAL_PARAMETER_VIDEO_ALIGN_HORIZ, +- +- /** @ref MMAL_PARAMETER_UINT32_T. +- * Changing this parameter from the default can reduce frame rate +- * because image buffers need to be re-pitched. +- */ +- MMAL_PARAMETER_VIDEO_ALIGN_VERT, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. */ +- MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAMES, +- +- /** @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_INITIAL_QUANT, +- +- /**< @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_QP_P, +- +- /**< @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_RC_SLICE_DQUANT, +- +- /** @ref MMAL_PARAMETER_UINT32_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_FRAME_LIMIT_BITS, +- +- /** @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_PEAK_RATE, +- +- /* H264 specific parameters */ +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_DISABLE_CABAC, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_LATENCY, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_AU_DELIMITERS, +- +- /** @ref MMAL_PARAMETER_UINT32_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_DEBLOCK_IDC, +- +- /** @ref MMAL_PARAMETER_VIDEO_ENCODER_H264_MB_INTRA_MODES_T. */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_MB_INTRA_MODE, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_HEADER_ON_OPEN, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_PRECODE_FOR_QP, +- +- /** @ref MMAL_PARAMETER_VIDEO_DRM_INIT_INFO_T. */ +- MMAL_PARAMETER_VIDEO_DRM_INIT_INFO, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_TIMESTAMP_FIFO, +- +- /** @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_DECODE_ERROR_CONCEALMENT, +- +- /** @ref MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER_T. */ +- MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER, +- +- /** @ref MMAL_PARAMETER_BYTES_T */ +- MMAL_PARAMETER_VIDEO_DECODE_CONFIG_VD3, +- +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_VCL_HRD_PARAMETERS, +- +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG, +- +- /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER +-}; +- +-/** Valid mirror modes */ +-enum mmal_parameter_mirror { +- MMAL_PARAM_MIRROR_NONE, +- MMAL_PARAM_MIRROR_VERTICAL, +- MMAL_PARAM_MIRROR_HORIZONTAL, +- MMAL_PARAM_MIRROR_BOTH, +-}; +- +-enum mmal_parameter_displaytransform { +- MMAL_DISPLAY_ROT0 = 0, +- MMAL_DISPLAY_MIRROR_ROT0 = 1, +- MMAL_DISPLAY_MIRROR_ROT180 = 2, +- MMAL_DISPLAY_ROT180 = 3, +- MMAL_DISPLAY_MIRROR_ROT90 = 4, +- MMAL_DISPLAY_ROT270 = 5, +- MMAL_DISPLAY_ROT90 = 6, +- MMAL_DISPLAY_MIRROR_ROT270 = 7, +-}; +- +-enum mmal_parameter_displaymode { +- MMAL_DISPLAY_MODE_FILL = 0, +- MMAL_DISPLAY_MODE_LETTERBOX = 1, +-}; +- +-enum mmal_parameter_displayset { +- MMAL_DISPLAY_SET_NONE = 0, +- MMAL_DISPLAY_SET_NUM = 1, +- MMAL_DISPLAY_SET_FULLSCREEN = 2, +- MMAL_DISPLAY_SET_TRANSFORM = 4, +- MMAL_DISPLAY_SET_DEST_RECT = 8, +- MMAL_DISPLAY_SET_SRC_RECT = 0x10, +- MMAL_DISPLAY_SET_MODE = 0x20, +- MMAL_DISPLAY_SET_PIXEL = 0x40, +- MMAL_DISPLAY_SET_NOASPECT = 0x80, +- MMAL_DISPLAY_SET_LAYER = 0x100, +- MMAL_DISPLAY_SET_COPYPROTECT = 0x200, +- MMAL_DISPLAY_SET_ALPHA = 0x400, +-}; +- +-/* rectangle, used lots so it gets its own struct */ +-struct vchiq_mmal_rect { +- s32 x; +- s32 y; +- s32 width; +- s32 height; +-}; +- +-struct mmal_parameter_displayregion { +- /** Bitfield that indicates which fields are set and should be +- * used. All other fields will maintain their current value. +- * \ref MMAL_DISPLAYSET_T defines the bits that can be +- * combined. +- */ +- u32 set; +- +- /** Describes the display output device, with 0 typically +- * being a directly connected LCD display. The actual values +- * will depend on the hardware. Code using hard-wired numbers +- * (e.g. 2) is certain to fail. +- */ +- +- u32 display_num; +- /** Indicates that we are using the full device screen area, +- * rather than a window of the display. If zero, then +- * dest_rect is used to specify a region of the display to +- * use. +- */ +- +- s32 fullscreen; +- /** Indicates any rotation or flipping used to map frames onto +- * the natural display orientation. +- */ +- u32 transform; /* enum mmal_parameter_displaytransform */ +- +- /** Where to display the frame within the screen, if +- * fullscreen is zero. +- */ +- struct vchiq_mmal_rect dest_rect; +- +- /** Indicates which area of the frame to display. If all +- * values are zero, the whole frame will be used. +- */ +- struct vchiq_mmal_rect src_rect; +- +- /** If set to non-zero, indicates that any display scaling +- * should disregard the aspect ratio of the frame region being +- * displayed. +- */ +- s32 noaspect; +- +- /** Indicates how the image should be scaled to fit the +- * display. \code MMAL_DISPLAY_MODE_FILL \endcode indicates +- * that the image should fill the screen by potentially +- * cropping the frames. Setting \code mode \endcode to \code +- * MMAL_DISPLAY_MODE_LETTERBOX \endcode indicates that all the +- * source region should be displayed and black bars added if +- * necessary. +- */ +- u32 mode; /* enum mmal_parameter_displaymode */ +- +- /** If non-zero, defines the width of a source pixel relative +- * to \code pixel_y \endcode. If zero, then pixels default to +- * being square. +- */ +- u32 pixel_x; +- +- /** If non-zero, defines the height of a source pixel relative +- * to \code pixel_x \endcode. If zero, then pixels default to +- * being square. +- */ +- u32 pixel_y; +- +- /** Sets the relative depth of the images, with greater values +- * being in front of smaller values. +- */ +- u32 layer; +- +- /** Set to non-zero to ensure copy protection is used on +- * output. +- */ +- s32 copyprotect_required; +- +- /** Level of opacity of the layer, where zero is fully +- * transparent and 255 is fully opaque. +- */ +- u32 alpha; +-}; +- +-#define MMAL_MAX_IMAGEFX_PARAMETERS 5 +- +-struct mmal_parameter_imagefx_parameters { +- enum mmal_parameter_imagefx effect; +- u32 num_effect_params; +- u32 effect_parameter[MMAL_MAX_IMAGEFX_PARAMETERS]; +-}; +- +-#define MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS 4 +-#define MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES 2 +-#define MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN 16 +- +-struct mmal_parameter_camera_info_camera_t { +- u32 port_id; +- u32 max_width; +- u32 max_height; +- u32 lens_present; +- u8 camera_name[MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN]; +-}; +- +-enum mmal_parameter_camera_info_flash_type_t { +- /* Make values explicit to ensure they match values in config ini */ +- MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_XENON = 0, +- MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_LED = 1, +- MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_OTHER = 2, +- MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_MAX = 0x7FFFFFFF +-}; +- +-struct mmal_parameter_camera_info_flash_t { +- enum mmal_parameter_camera_info_flash_type_t flash_type; +-}; +- +-struct mmal_parameter_camera_info_t { +- u32 num_cameras; +- u32 num_flashes; +- struct mmal_parameter_camera_info_camera_t +- cameras[MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS]; +- struct mmal_parameter_camera_info_flash_t +- flashes[MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES]; +-}; +- +-#endif +--- a/drivers/staging/vc04_services/bcm2835-camera/mmal-vchiq.h ++++ /dev/null +@@ -1,166 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-/* +- * Broadcom BM2835 V4L2 driver +- * +- * Copyright © 2013 Raspberry Pi (Trading) Ltd. +- * +- * Authors: Vincent Sanders @ Collabora +- * Dave Stevenson @ Broadcom +- * (now dave.stevenson@raspberrypi.org) +- * Simon Mellor @ Broadcom +- * Luke Diamand @ Broadcom +- * +- * MMAL interface to VCHIQ message passing +- */ +- +-#ifndef MMAL_VCHIQ_H +-#define MMAL_VCHIQ_H +- +-#include "mmal-msg-format.h" +- +-#define MAX_PORT_COUNT 4 +- +-/* Maximum size of the format extradata. */ +-#define MMAL_FORMAT_EXTRADATA_MAX_SIZE 128 +- +-struct vchiq_mmal_instance; +- +-enum vchiq_mmal_es_type { +- MMAL_ES_TYPE_UNKNOWN, /**< Unknown elementary stream type */ +- MMAL_ES_TYPE_CONTROL, /**< Elementary stream of control commands */ +- MMAL_ES_TYPE_AUDIO, /**< Audio elementary stream */ +- MMAL_ES_TYPE_VIDEO, /**< Video elementary stream */ +- MMAL_ES_TYPE_SUBPICTURE /**< Sub-picture elementary stream */ +-}; +- +-struct vchiq_mmal_port_buffer { +- unsigned int num; /* number of buffers */ +- u32 size; /* size of buffers */ +- u32 alignment; /* alignment of buffers */ +-}; +- +-struct vchiq_mmal_port; +- +-typedef void (*vchiq_mmal_buffer_cb)( +- struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- int status, struct mmal_buffer *buffer, +- unsigned long length, u32 mmal_flags, s64 dts, s64 pts); +- +-struct vchiq_mmal_port { +- bool enabled; +- u32 handle; +- u32 type; /* port type, cached to use on port info set */ +- u32 index; /* port index, cached to use on port info set */ +- +- /* component port belongs to, allows simple deref */ +- struct vchiq_mmal_component *component; +- +- struct vchiq_mmal_port *connected; /* port conencted to */ +- +- /* buffer info */ +- struct vchiq_mmal_port_buffer minimum_buffer; +- struct vchiq_mmal_port_buffer recommended_buffer; +- struct vchiq_mmal_port_buffer current_buffer; +- +- /* stream format */ +- struct mmal_es_format_local format; +- /* elementary stream format */ +- union mmal_es_specific_format es; +- +- /* data buffers to fill */ +- struct list_head buffers; +- /* lock to serialise adding and removing buffers from list */ +- spinlock_t slock; +- +- /* Count of buffers the VPU has yet to return */ +- atomic_t buffers_with_vpu; +- /* callback on buffer completion */ +- vchiq_mmal_buffer_cb buffer_cb; +- /* callback context */ +- void *cb_ctx; +-}; +- +-struct vchiq_mmal_component { +- bool enabled; +- u32 handle; /* VideoCore handle for component */ +- u32 inputs; /* Number of input ports */ +- u32 outputs; /* Number of output ports */ +- u32 clocks; /* Number of clock ports */ +- struct vchiq_mmal_port control; /* control port */ +- struct vchiq_mmal_port input[MAX_PORT_COUNT]; /* input ports */ +- struct vchiq_mmal_port output[MAX_PORT_COUNT]; /* output ports */ +- struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */ +-}; +- +-int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance); +-int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance); +- +-/* Initialise a mmal component and its ports +- * +- */ +-int vchiq_mmal_component_init( +- struct vchiq_mmal_instance *instance, +- const char *name, +- struct vchiq_mmal_component **component_out); +- +-int vchiq_mmal_component_finalise( +- struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component); +- +-int vchiq_mmal_component_enable( +- struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component); +- +-int vchiq_mmal_component_disable( +- struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_component *component); +- +-/* enable a mmal port +- * +- * enables a port and if a buffer callback provided enque buffer +- * headers as appropriate for the port. +- */ +-int vchiq_mmal_port_enable( +- struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- vchiq_mmal_buffer_cb buffer_cb); +- +-/* disable a port +- * +- * disable a port will dequeue any pending buffers +- */ +-int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port); +- +-int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter, +- void *value, +- u32 value_size); +- +-int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- u32 parameter, +- void *value, +- u32 *value_size); +- +-int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port); +- +-int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *src, +- struct vchiq_mmal_port *dst); +- +-int vchiq_mmal_version(struct vchiq_mmal_instance *instance, +- u32 *major_out, +- u32 *minor_out); +- +-int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, +- struct vchiq_mmal_port *port, +- struct mmal_buffer *buf); +- +-int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance, +- struct mmal_buffer *buf); +-int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf); +-#endif /* MMAL_VCHIQ_H */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +@@ -0,0 +1,61 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ * ++ * MMAL structures ++ * ++ */ ++#ifndef MMAL_COMMON_H ++#define MMAL_COMMON_H ++ ++#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) ++#define MMAL_MAGIC MMAL_FOURCC('m', 'm', 'a', 'l') ++ ++/** Special value signalling that time is not known */ ++#define MMAL_TIME_UNKNOWN BIT_ULL(63) ++ ++struct mmal_msg_context; ++ ++/* mapping between v4l and mmal video modes */ ++struct mmal_fmt { ++ char *name; ++ u32 fourcc; /* v4l2 format id */ ++ int flags; /* v4l2 flags field */ ++ u32 mmal; ++ int depth; ++ u32 mmal_component; /* MMAL component index to be used to encode */ ++ u32 ybbp; /* depth of first Y plane for planar formats */ ++ bool remove_padding; /* Does the GPU have to remove padding, ++ * or can we do hide padding via bytesperline. ++ */ ++}; ++ ++/* buffer for one video frame */ ++struct mmal_buffer { ++ /* v4l buffer data -- must be first */ ++ struct vb2_v4l2_buffer vb; ++ ++ /* list of buffers available */ ++ struct list_head list; ++ ++ void *buffer; /* buffer pointer */ ++ unsigned long buffer_size; /* size of allocated buffer */ ++ ++ struct mmal_msg_context *msg_context; ++}; ++ ++/* */ ++struct mmal_colourfx { ++ s32 enable; ++ u32 u; ++ u32 v; ++}; ++#endif +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h +@@ -0,0 +1,124 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++#ifndef MMAL_ENCODINGS_H ++#define MMAL_ENCODINGS_H ++ ++#define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4') ++#define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3') ++#define MMAL_ENCODING_MP4V MMAL_FOURCC('M', 'P', '4', 'V') ++#define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V') ++#define MMAL_ENCODING_MP1V MMAL_FOURCC('M', 'P', '1', 'V') ++#define MMAL_ENCODING_WMV3 MMAL_FOURCC('W', 'M', 'V', '3') ++#define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2') ++#define MMAL_ENCODING_WMV1 MMAL_FOURCC('W', 'M', 'V', '1') ++#define MMAL_ENCODING_WVC1 MMAL_FOURCC('W', 'V', 'C', '1') ++#define MMAL_ENCODING_VP8 MMAL_FOURCC('V', 'P', '8', ' ') ++#define MMAL_ENCODING_VP7 MMAL_FOURCC('V', 'P', '7', ' ') ++#define MMAL_ENCODING_VP6 MMAL_FOURCC('V', 'P', '6', ' ') ++#define MMAL_ENCODING_THEORA MMAL_FOURCC('T', 'H', 'E', 'O') ++#define MMAL_ENCODING_SPARK MMAL_FOURCC('S', 'P', 'R', 'K') ++#define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G') ++ ++#define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G') ++#define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ') ++#define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ') ++#define MMAL_ENCODING_PPM MMAL_FOURCC('P', 'P', 'M', ' ') ++#define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ') ++#define MMAL_ENCODING_BMP MMAL_FOURCC('B', 'M', 'P', ' ') ++ ++#define MMAL_ENCODING_I420 MMAL_FOURCC('I', '4', '2', '0') ++#define MMAL_ENCODING_I420_SLICE MMAL_FOURCC('S', '4', '2', '0') ++#define MMAL_ENCODING_YV12 MMAL_FOURCC('Y', 'V', '1', '2') ++#define MMAL_ENCODING_I422 MMAL_FOURCC('I', '4', '2', '2') ++#define MMAL_ENCODING_I422_SLICE MMAL_FOURCC('S', '4', '2', '2') ++#define MMAL_ENCODING_YUYV MMAL_FOURCC('Y', 'U', 'Y', 'V') ++#define MMAL_ENCODING_YVYU MMAL_FOURCC('Y', 'V', 'Y', 'U') ++#define MMAL_ENCODING_UYVY MMAL_FOURCC('U', 'Y', 'V', 'Y') ++#define MMAL_ENCODING_VYUY MMAL_FOURCC('V', 'Y', 'U', 'Y') ++#define MMAL_ENCODING_NV12 MMAL_FOURCC('N', 'V', '1', '2') ++#define MMAL_ENCODING_NV21 MMAL_FOURCC('N', 'V', '2', '1') ++#define MMAL_ENCODING_ARGB MMAL_FOURCC('A', 'R', 'G', 'B') ++#define MMAL_ENCODING_RGBA MMAL_FOURCC('R', 'G', 'B', 'A') ++#define MMAL_ENCODING_ABGR MMAL_FOURCC('A', 'B', 'G', 'R') ++#define MMAL_ENCODING_BGRA MMAL_FOURCC('B', 'G', 'R', 'A') ++#define MMAL_ENCODING_RGB16 MMAL_FOURCC('R', 'G', 'B', '2') ++#define MMAL_ENCODING_RGB24 MMAL_FOURCC('R', 'G', 'B', '3') ++#define MMAL_ENCODING_RGB32 MMAL_FOURCC('R', 'G', 'B', '4') ++#define MMAL_ENCODING_BGR16 MMAL_FOURCC('B', 'G', 'R', '2') ++#define MMAL_ENCODING_BGR24 MMAL_FOURCC('B', 'G', 'R', '3') ++#define MMAL_ENCODING_BGR32 MMAL_FOURCC('B', 'G', 'R', '4') ++ ++/** SAND Video (YUVUV128) format, native format understood by VideoCore. ++ * This format is *not* opaque - if requested you will receive full frames ++ * of YUV_UV video. ++ */ ++#define MMAL_ENCODING_YUVUV128 MMAL_FOURCC('S', 'A', 'N', 'D') ++ ++/** VideoCore opaque image format, image handles are returned to ++ * the host but not the actual image data. ++ */ ++#define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V') ++ ++/** An EGL image handle ++ */ ++#define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') ++ ++/* }@ */ ++ ++/** \name Pre-defined audio encodings */ ++/* @{ */ ++#define MMAL_ENCODING_PCM_UNSIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'U') ++#define MMAL_ENCODING_PCM_UNSIGNED_LE MMAL_FOURCC('p', 'c', 'm', 'u') ++#define MMAL_ENCODING_PCM_SIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'S') ++#define MMAL_ENCODING_PCM_SIGNED_LE MMAL_FOURCC('p', 'c', 'm', 's') ++#define MMAL_ENCODING_PCM_FLOAT_BE MMAL_FOURCC('P', 'C', 'M', 'F') ++#define MMAL_ENCODING_PCM_FLOAT_LE MMAL_FOURCC('p', 'c', 'm', 'f') ++ ++/* Pre-defined H264 encoding variants */ ++ ++/** ISO 14496-10 Annex B byte stream format */ ++#define MMAL_ENCODING_VARIANT_H264_DEFAULT 0 ++/** ISO 14496-15 AVC stream format */ ++#define MMAL_ENCODING_VARIANT_H264_AVC1 MMAL_FOURCC('A', 'V', 'C', '1') ++/** Implicitly delineated NAL units without emulation prevention */ ++#define MMAL_ENCODING_VARIANT_H264_RAW MMAL_FOURCC('R', 'A', 'W', ' ') ++ ++/** \defgroup MmalColorSpace List of pre-defined video color spaces ++ * This defines a list of common color spaces. This list isn't exhaustive and ++ * is only provided as a convenience to avoid clients having to use FourCC ++ * codes directly. However components are allowed to define and use their own ++ * FourCC codes. ++ */ ++/* @{ */ ++ ++/** Unknown color space */ ++#define MMAL_COLOR_SPACE_UNKNOWN 0 ++/** ITU-R BT.601-5 [SDTV] */ ++#define MMAL_COLOR_SPACE_ITUR_BT601 MMAL_FOURCC('Y', '6', '0', '1') ++/** ITU-R BT.709-3 [HDTV] */ ++#define MMAL_COLOR_SPACE_ITUR_BT709 MMAL_FOURCC('Y', '7', '0', '9') ++/** JPEG JFIF */ ++#define MMAL_COLOR_SPACE_JPEG_JFIF MMAL_FOURCC('Y', 'J', 'F', 'I') ++/** Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */ ++#define MMAL_COLOR_SPACE_FCC MMAL_FOURCC('Y', 'F', 'C', 'C') ++/** Society of Motion Picture and Television Engineers 240M (1999) */ ++#define MMAL_COLOR_SPACE_SMPTE240M MMAL_FOURCC('Y', '2', '4', '0') ++/** ITU-R BT.470-2 System M */ ++#define MMAL_COLOR_SPACE_BT470_2_M MMAL_FOURCC('Y', '_', '_', 'M') ++/** ITU-R BT.470-2 System BG */ ++#define MMAL_COLOR_SPACE_BT470_2_BG MMAL_FOURCC('Y', '_', 'B', 'G') ++/** JPEG JFIF, but with 16..255 luma */ ++#define MMAL_COLOR_SPACE_JFIF_Y16_255 MMAL_FOURCC('Y', 'Y', '1', '6') ++/* @} MmalColorSpace List */ ++ ++#endif /* MMAL_ENCODINGS_H */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-common.h +@@ -0,0 +1,48 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++ ++#ifndef MMAL_MSG_COMMON_H ++#define MMAL_MSG_COMMON_H ++ ++enum mmal_msg_status { ++ MMAL_MSG_STATUS_SUCCESS = 0, /**< Success */ ++ MMAL_MSG_STATUS_ENOMEM, /**< Out of memory */ ++ MMAL_MSG_STATUS_ENOSPC, /**< Out of resources other than memory */ ++ MMAL_MSG_STATUS_EINVAL, /**< Argument is invalid */ ++ MMAL_MSG_STATUS_ENOSYS, /**< Function not implemented */ ++ MMAL_MSG_STATUS_ENOENT, /**< No such file or directory */ ++ MMAL_MSG_STATUS_ENXIO, /**< No such device or address */ ++ MMAL_MSG_STATUS_EIO, /**< I/O error */ ++ MMAL_MSG_STATUS_ESPIPE, /**< Illegal seek */ ++ MMAL_MSG_STATUS_ECORRUPT, /**< Data is corrupt \attention */ ++ MMAL_MSG_STATUS_ENOTREADY, /**< Component is not ready */ ++ MMAL_MSG_STATUS_ECONFIG, /**< Component is not configured */ ++ MMAL_MSG_STATUS_EISCONN, /**< Port is already connected */ ++ MMAL_MSG_STATUS_ENOTCONN, /**< Port is disconnected */ ++ MMAL_MSG_STATUS_EAGAIN, /**< Resource temporarily unavailable. */ ++ MMAL_MSG_STATUS_EFAULT, /**< Bad address */ ++}; ++ ++struct mmal_rect { ++ s32 x; /**< x coordinate (from left) */ ++ s32 y; /**< y coordinate (from top) */ ++ s32 width; /**< width */ ++ s32 height; /**< height */ ++}; ++ ++struct mmal_rational { ++ s32 num; /**< Numerator */ ++ s32 den; /**< Denominator */ ++}; ++ ++#endif /* MMAL_MSG_COMMON_H */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-format.h +@@ -0,0 +1,106 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++ ++#ifndef MMAL_MSG_FORMAT_H ++#define MMAL_MSG_FORMAT_H ++ ++#include "mmal-msg-common.h" ++ ++/* MMAL_ES_FORMAT_T */ ++ ++struct mmal_audio_format { ++ u32 channels; /* Number of audio channels */ ++ u32 sample_rate; /* Sample rate */ ++ ++ u32 bits_per_sample; /* Bits per sample */ ++ u32 block_align; /* Size of a block of data */ ++}; ++ ++struct mmal_video_format { ++ u32 width; /* Width of frame in pixels */ ++ u32 height; /* Height of frame in rows of pixels */ ++ struct mmal_rect crop; /* Visible region of the frame */ ++ struct mmal_rational frame_rate; /* Frame rate */ ++ struct mmal_rational par; /* Pixel aspect ratio */ ++ ++ /* ++ * FourCC specifying the color space of the video stream. See the ++ * MmalColorSpace "pre-defined color spaces" for some examples. ++ */ ++ u32 color_space; ++}; ++ ++struct mmal_subpicture_format { ++ u32 x_offset; ++ u32 y_offset; ++}; ++ ++union mmal_es_specific_format { ++ struct mmal_audio_format audio; ++ struct mmal_video_format video; ++ struct mmal_subpicture_format subpicture; ++}; ++ ++/* Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ ++struct mmal_es_format_local { ++ u32 type; /* enum mmal_es_type */ ++ ++ u32 encoding; /* FourCC specifying encoding of the elementary ++ * stream. ++ */ ++ u32 encoding_variant; /* FourCC specifying the specific ++ * encoding variant of the elementary ++ * stream. ++ */ ++ ++ union mmal_es_specific_format *es; /* Type specific ++ * information for the ++ * elementary stream ++ */ ++ ++ u32 bitrate; /* Bitrate in bits per second */ ++ u32 flags; /* Flags describing properties of the elementary ++ * stream. ++ */ ++ ++ u32 extradata_size; /* Size of the codec specific data */ ++ u8 *extradata; /* Codec specific data */ ++}; ++ ++/* Remote definition of an elementary stream format (MMAL_ES_FORMAT_T) */ ++struct mmal_es_format { ++ u32 type; /* enum mmal_es_type */ ++ ++ u32 encoding; /* FourCC specifying encoding of the elementary ++ * stream. ++ */ ++ u32 encoding_variant; /* FourCC specifying the specific ++ * encoding variant of the elementary ++ * stream. ++ */ ++ ++ u32 es; /* Type specific ++ * information for the ++ * elementary stream ++ */ ++ ++ u32 bitrate; /* Bitrate in bits per second */ ++ u32 flags; /* Flags describing properties of the elementary ++ * stream. ++ */ ++ ++ u32 extradata_size; /* Size of the codec specific data */ ++ u32 extradata; /* Codec specific data */ ++}; ++ ++#endif /* MMAL_MSG_FORMAT_H */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg-port.h +@@ -0,0 +1,109 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++ ++/* MMAL_PORT_TYPE_T */ ++enum mmal_port_type { ++ MMAL_PORT_TYPE_UNKNOWN = 0, /* Unknown port type */ ++ MMAL_PORT_TYPE_CONTROL, /* Control port */ ++ MMAL_PORT_TYPE_INPUT, /* Input port */ ++ MMAL_PORT_TYPE_OUTPUT, /* Output port */ ++ MMAL_PORT_TYPE_CLOCK, /* Clock port */ ++}; ++ ++/* The port is pass-through and doesn't need buffer headers allocated */ ++#define MMAL_PORT_CAPABILITY_PASSTHROUGH 0x01 ++/* ++ *The port wants to allocate the buffer payloads. ++ * This signals a preference that payload allocation should be done ++ * on this port for efficiency reasons. ++ */ ++#define MMAL_PORT_CAPABILITY_ALLOCATION 0x02 ++/* ++ * The port supports format change events. ++ * This applies to input ports and is used to let the client know ++ * whether the port supports being reconfigured via a format ++ * change event (i.e. without having to disable the port). ++ */ ++#define MMAL_PORT_CAPABILITY_SUPPORTS_EVENT_FORMAT_CHANGE 0x04 ++ ++/* ++ * mmal port structure (MMAL_PORT_T) ++ * ++ * most elements are informational only, the pointer values for ++ * interogation messages are generally provided as additional ++ * structures within the message. When used to set values only the ++ * buffer_num, buffer_size and userdata parameters are writable. ++ */ ++struct mmal_port { ++ u32 priv; /* Private member used by the framework */ ++ u32 name; /* Port name. Used for debugging purposes (RO) */ ++ ++ u32 type; /* Type of the port (RO) enum mmal_port_type */ ++ u16 index; /* Index of the port in its type list (RO) */ ++ u16 index_all; /* Index of the port in the list of all ports (RO) */ ++ ++ u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */ ++ u32 format; /* Format of the elementary stream */ ++ ++ u32 buffer_num_min; /* Minimum number of buffers the port ++ * requires (RO). This is set by the ++ * component. ++ */ ++ ++ u32 buffer_size_min; /* Minimum size of buffers the port ++ * requires (RO). This is set by the ++ * component. ++ */ ++ ++ u32 buffer_alignment_min;/* Minimum alignment requirement for ++ * the buffers (RO). A value of ++ * zero means no special alignment ++ * requirements. This is set by the ++ * component. ++ */ ++ ++ u32 buffer_num_recommended; /* Number of buffers the port ++ * recommends for optimal ++ * performance (RO). A value of ++ * zero means no special ++ * recommendation. This is set ++ * by the component. ++ */ ++ ++ u32 buffer_size_recommended; /* Size of buffers the port ++ * recommends for optimal ++ * performance (RO). A value of ++ * zero means no special ++ * recommendation. This is set ++ * by the component. ++ */ ++ ++ u32 buffer_num; /* Actual number of buffers the port will use. ++ * This is set by the client. ++ */ ++ ++ u32 buffer_size; /* Actual maximum size of the buffers that ++ * will be sent to the port. This is set by ++ * the client. ++ */ ++ ++ u32 component; /* Component this port belongs to (Read Only) */ ++ ++ u32 userdata; /* Field reserved for use by the client */ ++ ++ u32 capabilities; /* Flags describing the capabilities of a ++ * port (RO). Bitwise combination of \ref ++ * portcapabilities "Port capabilities" ++ * values. ++ */ ++}; +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h +@@ -0,0 +1,406 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++ ++/* ++ * all the data structures which serialise the MMAL protocol. note ++ * these are directly mapped onto the recived message data. ++ * ++ * BEWARE: They seem to *assume* pointers are u32 and that there is no ++ * structure padding! ++ * ++ * NOTE: this implementation uses kernel types to ensure sizes. Rather ++ * than assigning values to enums to force their size the ++ * implementation uses fixed size types and not the enums (though the ++ * comments have the actual enum type ++ */ ++#ifndef MMAL_MSG_H ++#define MMAL_MSG_H ++ ++#define VC_MMAL_VER 15 ++#define VC_MMAL_MIN_VER 10 ++#define VC_MMAL_SERVER_NAME MAKE_FOURCC("mmal") ++ ++/* max total message size is 512 bytes */ ++#define MMAL_MSG_MAX_SIZE 512 ++/* with six 32bit header elements max payload is therefore 488 bytes */ ++#define MMAL_MSG_MAX_PAYLOAD 488 ++ ++#include "mmal-msg-common.h" ++#include "mmal-msg-format.h" ++#include "mmal-msg-port.h" ++ ++enum mmal_msg_type { ++ MMAL_MSG_TYPE_QUIT = 1, ++ MMAL_MSG_TYPE_SERVICE_CLOSED, ++ MMAL_MSG_TYPE_GET_VERSION, ++ MMAL_MSG_TYPE_COMPONENT_CREATE, ++ MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */ ++ MMAL_MSG_TYPE_COMPONENT_ENABLE, ++ MMAL_MSG_TYPE_COMPONENT_DISABLE, ++ MMAL_MSG_TYPE_PORT_INFO_GET, ++ MMAL_MSG_TYPE_PORT_INFO_SET, ++ MMAL_MSG_TYPE_PORT_ACTION, /* 10 */ ++ MMAL_MSG_TYPE_BUFFER_FROM_HOST, ++ MMAL_MSG_TYPE_BUFFER_TO_HOST, ++ MMAL_MSG_TYPE_GET_STATS, ++ MMAL_MSG_TYPE_PORT_PARAMETER_SET, ++ MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */ ++ MMAL_MSG_TYPE_EVENT_TO_HOST, ++ MMAL_MSG_TYPE_GET_CORE_STATS_FOR_PORT, ++ MMAL_MSG_TYPE_OPAQUE_ALLOCATOR, ++ MMAL_MSG_TYPE_CONSUME_MEM, ++ MMAL_MSG_TYPE_LMK, /* 20 */ ++ MMAL_MSG_TYPE_OPAQUE_ALLOCATOR_DESC, ++ MMAL_MSG_TYPE_DRM_GET_LHS32, ++ MMAL_MSG_TYPE_DRM_GET_TIME, ++ MMAL_MSG_TYPE_BUFFER_FROM_HOST_ZEROLEN, ++ MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */ ++ MMAL_MSG_TYPE_HOST_LOG, ++ MMAL_MSG_TYPE_MSG_LAST ++}; ++ ++/* port action request messages differ depending on the action type */ ++enum mmal_msg_port_action_type { ++ MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unknown action */ ++ MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */ ++ MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */ ++ MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */ ++ MMAL_MSG_PORT_ACTION_TYPE_SET_REQUIREMENTS, /* Set buffer requirements*/ ++}; ++ ++struct mmal_msg_header { ++ u32 magic; ++ u32 type; /* enum mmal_msg_type */ ++ ++ /* Opaque handle to the control service */ ++ u32 control_service; ++ ++ u32 context; /* a u32 per message context */ ++ u32 status; /* The status of the vchiq operation */ ++ u32 padding; ++}; ++ ++/* Send from VC to host to report version */ ++struct mmal_msg_version { ++ u32 flags; ++ u32 major; ++ u32 minor; ++ u32 minimum; ++}; ++ ++/* request to VC to create component */ ++struct mmal_msg_component_create { ++ u32 client_component; /* component context */ ++ char name[128]; ++ u32 pid; /* For debug */ ++}; ++ ++/* reply from VC to component creation request */ ++struct mmal_msg_component_create_reply { ++ u32 status; /* enum mmal_msg_status - how does this differ to ++ * the one in the header? ++ */ ++ u32 component_handle; /* VideoCore handle for component */ ++ u32 input_num; /* Number of input ports */ ++ u32 output_num; /* Number of output ports */ ++ u32 clock_num; /* Number of clock ports */ ++}; ++ ++/* request to VC to destroy a component */ ++struct mmal_msg_component_destroy { ++ u32 component_handle; ++}; ++ ++struct mmal_msg_component_destroy_reply { ++ u32 status; /* The component destruction status */ ++}; ++ ++/* request and reply to VC to enable a component */ ++struct mmal_msg_component_enable { ++ u32 component_handle; ++}; ++ ++struct mmal_msg_component_enable_reply { ++ u32 status; /* The component enable status */ ++}; ++ ++/* request and reply to VC to disable a component */ ++struct mmal_msg_component_disable { ++ u32 component_handle; ++}; ++ ++struct mmal_msg_component_disable_reply { ++ u32 status; /* The component disable status */ ++}; ++ ++/* request to VC to get port information */ ++struct mmal_msg_port_info_get { ++ u32 component_handle; /* component handle port is associated with */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 index; /* port index to query */ ++}; ++ ++/* reply from VC to get port info request */ ++struct mmal_msg_port_info_get_reply { ++ u32 status; /* enum mmal_msg_status */ ++ u32 component_handle; /* component handle port is associated with */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 port_index; /* port indexed in query */ ++ s32 found; /* unused */ ++ u32 port_handle; /* Handle to use for this port */ ++ struct mmal_port port; ++ struct mmal_es_format format; /* elementary stream format */ ++ union mmal_es_specific_format es; /* es type specific data */ ++ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; /* es extra data */ ++}; ++ ++/* request to VC to set port information */ ++struct mmal_msg_port_info_set { ++ u32 component_handle; ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 port_index; /* port indexed in query */ ++ struct mmal_port port; ++ struct mmal_es_format format; ++ union mmal_es_specific_format es; ++ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; ++}; ++ ++/* reply from VC to port info set request */ ++struct mmal_msg_port_info_set_reply { ++ u32 status; ++ u32 component_handle; /* component handle port is associated with */ ++ u32 port_type; /* enum mmal_msg_port_type */ ++ u32 index; /* port indexed in query */ ++ s32 found; /* unused */ ++ u32 port_handle; /* Handle to use for this port */ ++ struct mmal_port port; ++ struct mmal_es_format format; ++ union mmal_es_specific_format es; ++ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; ++}; ++ ++/* port action requests that take a mmal_port as a parameter */ ++struct mmal_msg_port_action_port { ++ u32 component_handle; ++ u32 port_handle; ++ u32 action; /* enum mmal_msg_port_action_type */ ++ struct mmal_port port; ++}; ++ ++/* port action requests that take handles as a parameter */ ++struct mmal_msg_port_action_handle { ++ u32 component_handle; ++ u32 port_handle; ++ u32 action; /* enum mmal_msg_port_action_type */ ++ u32 connect_component_handle; ++ u32 connect_port_handle; ++}; ++ ++struct mmal_msg_port_action_reply { ++ u32 status; /* The port action operation status */ ++}; ++ ++/* MMAL buffer transfer */ ++ ++/* Size of space reserved in a buffer message for short messages. */ ++#define MMAL_VC_SHORT_DATA 128 ++ ++/* Signals that the current payload is the end of the stream of data */ ++#define MMAL_BUFFER_HEADER_FLAG_EOS BIT(0) ++/* Signals that the start of the current payload starts a frame */ ++#define MMAL_BUFFER_HEADER_FLAG_FRAME_START BIT(1) ++/* Signals that the end of the current payload ends a frame */ ++#define MMAL_BUFFER_HEADER_FLAG_FRAME_END BIT(2) ++/* Signals that the current payload contains only complete frames (>1) */ ++#define MMAL_BUFFER_HEADER_FLAG_FRAME \ ++ (MMAL_BUFFER_HEADER_FLAG_FRAME_START | \ ++ MMAL_BUFFER_HEADER_FLAG_FRAME_END) ++/* Signals that the current payload is a keyframe (i.e. self decodable) */ ++#define MMAL_BUFFER_HEADER_FLAG_KEYFRAME BIT(3) ++/* ++ * Signals a discontinuity in the stream of data (e.g. after a seek). ++ * Can be used for instance by a decoder to reset its state ++ */ ++#define MMAL_BUFFER_HEADER_FLAG_DISCONTINUITY BIT(4) ++/* ++ * Signals a buffer containing some kind of config data for the component ++ * (e.g. codec config data) ++ */ ++#define MMAL_BUFFER_HEADER_FLAG_CONFIG BIT(5) ++/* Signals an encrypted payload */ ++#define MMAL_BUFFER_HEADER_FLAG_ENCRYPTED BIT(6) ++/* Signals a buffer containing side information */ ++#define MMAL_BUFFER_HEADER_FLAG_CODECSIDEINFO BIT(7) ++/* ++ * Signals a buffer which is the snapshot/postview image from a stills ++ * capture ++ */ ++#define MMAL_BUFFER_HEADER_FLAGS_SNAPSHOT BIT(8) ++/* Signals a buffer which contains data known to be corrupted */ ++#define MMAL_BUFFER_HEADER_FLAG_CORRUPTED BIT(9) ++/* Signals that a buffer failed to be transmitted */ ++#define MMAL_BUFFER_HEADER_FLAG_TRANSMISSION_FAILED BIT(10) ++ ++struct mmal_driver_buffer { ++ u32 magic; ++ u32 component_handle; ++ u32 port_handle; ++ u32 client_context; ++}; ++ ++/* buffer header */ ++struct mmal_buffer_header { ++ u32 next; /* next header */ ++ u32 priv; /* framework private data */ ++ u32 cmd; ++ u32 data; ++ u32 alloc_size; ++ u32 length; ++ u32 offset; ++ u32 flags; ++ s64 pts; ++ s64 dts; ++ u32 type; ++ u32 user_data; ++}; ++ ++struct mmal_buffer_header_type_specific { ++ union { ++ struct { ++ u32 planes; ++ u32 offset[4]; ++ u32 pitch[4]; ++ u32 flags; ++ } video; ++ } u; ++}; ++ ++struct mmal_msg_buffer_from_host { ++ /* ++ *The front 32 bytes of the buffer header are copied ++ * back to us in the reply to allow for context. This ++ * area is used to store two mmal_driver_buffer structures to ++ * allow for multiple concurrent service users. ++ */ ++ /* control data */ ++ struct mmal_driver_buffer drvbuf; ++ ++ /* referenced control data for passthrough buffer management */ ++ struct mmal_driver_buffer drvbuf_ref; ++ struct mmal_buffer_header buffer_header; /* buffer header itself */ ++ struct mmal_buffer_header_type_specific buffer_header_type_specific; ++ s32 is_zero_copy; ++ s32 has_reference; ++ ++ /* allows short data to be xfered in control message */ ++ u32 payload_in_message; ++ u8 short_data[MMAL_VC_SHORT_DATA]; ++}; ++ ++/* port parameter setting */ ++ ++#define MMAL_WORKER_PORT_PARAMETER_SPACE 96 ++ ++struct mmal_msg_port_parameter_set { ++ u32 component_handle; /* component */ ++ u32 port_handle; /* port */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ ++ uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; ++}; ++ ++struct mmal_msg_port_parameter_set_reply { ++ u32 status; /* enum mmal_msg_status todo: how does this ++ * differ to the one in the header? ++ */ ++}; ++ ++/* port parameter getting */ ++ ++struct mmal_msg_port_parameter_get { ++ u32 component_handle; /* component */ ++ u32 port_handle; /* port */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ ++}; ++ ++struct mmal_msg_port_parameter_get_reply { ++ u32 status; /* Status of mmal_port_parameter_get call */ ++ u32 id; /* Parameter ID */ ++ u32 size; /* Parameter size */ ++ uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; ++}; ++ ++/* event messages */ ++#define MMAL_WORKER_EVENT_SPACE 256 ++ ++struct mmal_msg_event_to_host { ++ u32 client_component; /* component context */ ++ ++ u32 port_type; ++ u32 port_num; ++ ++ u32 cmd; ++ u32 length; ++ u8 data[MMAL_WORKER_EVENT_SPACE]; ++ u32 delayed_buffer; ++}; ++ ++/* all mmal messages are serialised through this structure */ ++struct mmal_msg { ++ /* header */ ++ struct mmal_msg_header h; ++ /* payload */ ++ union { ++ struct mmal_msg_version version; ++ ++ struct mmal_msg_component_create component_create; ++ struct mmal_msg_component_create_reply component_create_reply; ++ ++ struct mmal_msg_component_destroy component_destroy; ++ struct mmal_msg_component_destroy_reply component_destroy_reply; ++ ++ struct mmal_msg_component_enable component_enable; ++ struct mmal_msg_component_enable_reply component_enable_reply; ++ ++ struct mmal_msg_component_disable component_disable; ++ struct mmal_msg_component_disable_reply component_disable_reply; ++ ++ struct mmal_msg_port_info_get port_info_get; ++ struct mmal_msg_port_info_get_reply port_info_get_reply; ++ ++ struct mmal_msg_port_info_set port_info_set; ++ struct mmal_msg_port_info_set_reply port_info_set_reply; ++ ++ struct mmal_msg_port_action_port port_action_port; ++ struct mmal_msg_port_action_handle port_action_handle; ++ struct mmal_msg_port_action_reply port_action_reply; ++ ++ struct mmal_msg_buffer_from_host buffer_from_host; ++ ++ struct mmal_msg_port_parameter_set port_parameter_set; ++ struct mmal_msg_port_parameter_set_reply ++ port_parameter_set_reply; ++ struct mmal_msg_port_parameter_get ++ port_parameter_get; ++ struct mmal_msg_port_parameter_get_reply ++ port_parameter_get_reply; ++ ++ struct mmal_msg_event_to_host event_to_host; ++ ++ u8 payload[MMAL_MSG_MAX_PAYLOAD]; ++ } u; ++}; ++#endif +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h +@@ -0,0 +1,755 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ */ ++ ++/* common parameters */ ++ ++/** @name Parameter groups ++ * Parameters are divided into groups, and then allocated sequentially within ++ * a group using an enum. ++ * @{ ++ */ ++ ++#ifndef MMAL_PARAMETERS_H ++#define MMAL_PARAMETERS_H ++ ++/** Common parameter ID group, used with many types of component. */ ++#define MMAL_PARAMETER_GROUP_COMMON (0 << 16) ++/** Camera-specific parameter ID group. */ ++#define MMAL_PARAMETER_GROUP_CAMERA (1 << 16) ++/** Video-specific parameter ID group. */ ++#define MMAL_PARAMETER_GROUP_VIDEO (2 << 16) ++/** Audio-specific parameter ID group. */ ++#define MMAL_PARAMETER_GROUP_AUDIO (3 << 16) ++/** Clock-specific parameter ID group. */ ++#define MMAL_PARAMETER_GROUP_CLOCK (4 << 16) ++/** Miracast-specific parameter ID group. */ ++#define MMAL_PARAMETER_GROUP_MIRACAST (5 << 16) ++ ++/* Common parameters */ ++enum mmal_parameter_common_type { ++ /**< Never a valid parameter ID */ ++ MMAL_PARAMETER_UNUSED = MMAL_PARAMETER_GROUP_COMMON, ++ ++ /**< MMAL_PARAMETER_ENCODING_T */ ++ MMAL_PARAMETER_SUPPORTED_ENCODINGS, ++ /**< MMAL_PARAMETER_URI_T */ ++ MMAL_PARAMETER_URI, ++ /** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */ ++ MMAL_PARAMETER_CHANGE_EVENT_REQUEST, ++ /** MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ZERO_COPY, ++ /**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */ ++ MMAL_PARAMETER_BUFFER_REQUIREMENTS, ++ /**< MMAL_PARAMETER_STATISTICS_T */ ++ MMAL_PARAMETER_STATISTICS, ++ /**< MMAL_PARAMETER_CORE_STATISTICS_T */ ++ MMAL_PARAMETER_CORE_STATISTICS, ++ /**< MMAL_PARAMETER_MEM_USAGE_T */ ++ MMAL_PARAMETER_MEM_USAGE, ++ /**< MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_BUFFER_FLAG_FILTER, ++ /**< MMAL_PARAMETER_SEEK_T */ ++ MMAL_PARAMETER_SEEK, ++ /**< MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_POWERMON_ENABLE, ++ /**< MMAL_PARAMETER_LOGGING_T */ ++ MMAL_PARAMETER_LOGGING, ++ /**< MMAL_PARAMETER_UINT64_T */ ++ MMAL_PARAMETER_SYSTEM_TIME, ++ /**< MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_NO_IMAGE_PADDING, ++}; ++ ++/* camera parameters */ ++ ++enum mmal_parameter_camera_type { ++ /* 0 */ ++ /** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */ ++ MMAL_PARAMETER_THUMBNAIL_CONFIGURATION = ++ MMAL_PARAMETER_GROUP_CAMERA, ++ /**< Unused? */ ++ MMAL_PARAMETER_CAPTURE_QUALITY, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_ROTATION, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_EXIF_DISABLE, ++ /**< @ref MMAL_PARAMETER_EXIF_T */ ++ MMAL_PARAMETER_EXIF, ++ /**< @ref MMAL_PARAM_AWBMODE_T */ ++ MMAL_PARAMETER_AWB_MODE, ++ /**< @ref MMAL_PARAMETER_IMAGEFX_T */ ++ MMAL_PARAMETER_IMAGE_EFFECT, ++ /**< @ref MMAL_PARAMETER_COLOURFX_T */ ++ MMAL_PARAMETER_COLOUR_EFFECT, ++ /**< @ref MMAL_PARAMETER_FLICKERAVOID_T */ ++ MMAL_PARAMETER_FLICKER_AVOID, ++ /**< @ref MMAL_PARAMETER_FLASH_T */ ++ MMAL_PARAMETER_FLASH, ++ /**< @ref MMAL_PARAMETER_REDEYE_T */ ++ MMAL_PARAMETER_REDEYE, ++ /**< @ref MMAL_PARAMETER_FOCUS_T */ ++ MMAL_PARAMETER_FOCUS, ++ /**< Unused? */ ++ MMAL_PARAMETER_FOCAL_LENGTHS, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_EXPOSURE_COMP, ++ /**< @ref MMAL_PARAMETER_SCALEFACTOR_T */ ++ MMAL_PARAMETER_ZOOM, ++ /**< @ref MMAL_PARAMETER_MIRROR_T */ ++ MMAL_PARAMETER_MIRROR, ++ ++ /* 0x10 */ ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_CAMERA_NUM, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_CAPTURE, ++ /**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */ ++ MMAL_PARAMETER_EXPOSURE_MODE, ++ /**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */ ++ MMAL_PARAMETER_EXP_METERING_MODE, ++ /**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */ ++ MMAL_PARAMETER_FOCUS_STATUS, ++ /**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */ ++ MMAL_PARAMETER_CAMERA_CONFIG, ++ /**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */ ++ MMAL_PARAMETER_CAPTURE_STATUS, ++ /**< @ref MMAL_PARAMETER_FACE_TRACK_T */ ++ MMAL_PARAMETER_FACE_TRACK, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS, ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_JPEG_Q_FACTOR, ++ /**< @ref MMAL_PARAMETER_FRAME_RATE_T */ ++ MMAL_PARAMETER_FRAME_RATE, ++ /**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */ ++ MMAL_PARAMETER_USE_STC, ++ /**< @ref MMAL_PARAMETER_CAMERA_INFO_T */ ++ MMAL_PARAMETER_CAMERA_INFO, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_STABILISATION, ++ /**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */ ++ MMAL_PARAMETER_FACE_TRACK_RESULTS, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ENABLE_RAW_CAPTURE, ++ ++ /* 0x20 */ ++ /**< @ref MMAL_PARAMETER_URI_T */ ++ MMAL_PARAMETER_DPF_FILE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ENABLE_DPF_FILE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_DPF_FAIL_IS_FATAL, ++ /**< @ref MMAL_PARAMETER_CAPTUREMODE_T */ ++ MMAL_PARAMETER_CAPTURE_MODE, ++ /**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */ ++ MMAL_PARAMETER_FOCUS_REGIONS, ++ /**< @ref MMAL_PARAMETER_INPUT_CROP_T */ ++ MMAL_PARAMETER_INPUT_CROP, ++ /**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */ ++ MMAL_PARAMETER_SENSOR_INFORMATION, ++ /**< @ref MMAL_PARAMETER_FLASH_SELECT_T */ ++ MMAL_PARAMETER_FLASH_SELECT, ++ /**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */ ++ MMAL_PARAMETER_FIELD_OF_VIEW, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_HIGH_DYNAMIC_RANGE, ++ /**< @ref MMAL_PARAMETER_DRC_T */ ++ MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION, ++ /**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */ ++ MMAL_PARAMETER_ALGORITHM_CONTROL, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_SHARPNESS, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_CONTRAST, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_BRIGHTNESS, ++ /**< @ref MMAL_PARAMETER_RATIONAL_T */ ++ MMAL_PARAMETER_SATURATION, ++ ++ /* 0x30 */ ++ /**< @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_ISO, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ANTISHAKE, ++ /** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */ ++ MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS, ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_CAMERA_BURST_CAPTURE, ++ /** @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_CAMERA_MIN_ISO, ++ /** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */ ++ MMAL_PARAMETER_CAMERA_USE_CASE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_CAPTURE_STATS_PASS, ++ /** @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_CAMERA_CUSTOM_SENSOR_CONFIG, ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_ENABLE_REGISTER_FILE, ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_REGISTER_FAIL_IS_FATAL, ++ /** @ref MMAL_PARAMETER_CONFIGFILE_T */ ++ MMAL_PARAMETER_CONFIGFILE_REGISTERS, ++ /** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */ ++ MMAL_PARAMETER_CONFIGFILE_CHUNK_REGISTERS, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_JPEG_ATTACH_LOG, ++ /**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */ ++ MMAL_PARAMETER_ZERO_SHUTTER_LAG, ++ /**< @ref MMAL_PARAMETER_FPS_RANGE_T */ ++ MMAL_PARAMETER_FPS_RANGE, ++ /**< @ref MMAL_PARAMETER_INT32_T */ ++ MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP, ++ ++ /* 0x40 */ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_SW_SHARPEN_DISABLE, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_FLASH_REQUIRED, ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_SW_SATURATION_DISABLE, ++ /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_SHUTTER_SPEED, ++ /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ ++ MMAL_PARAMETER_CUSTOM_AWB_GAINS, ++}; ++ ++struct mmal_parameter_rational { ++ s32 num; /**< Numerator */ ++ s32 den; /**< Denominator */ ++}; ++ ++enum mmal_parameter_camera_config_timestamp_mode { ++ MMAL_PARAM_TIMESTAMP_MODE_ZERO = 0, /* Always timestamp frames as 0 */ ++ MMAL_PARAM_TIMESTAMP_MODE_RAW_STC, /* Use the raw STC value ++ * for the frame timestamp ++ */ ++ MMAL_PARAM_TIMESTAMP_MODE_RESET_STC, /* Use the STC timestamp ++ * but subtract the ++ * timestamp of the first ++ * frame sent to give a ++ * zero based timestamp. ++ */ ++}; ++ ++struct mmal_parameter_fps_range { ++ /**< Low end of the permitted framerate range */ ++ struct mmal_parameter_rational fps_low; ++ /**< High end of the permitted framerate range */ ++ struct mmal_parameter_rational fps_high; ++}; ++ ++/* camera configuration parameter */ ++struct mmal_parameter_camera_config { ++ /* Parameters for setting up the image pools */ ++ u32 max_stills_w; /* Max size of stills capture */ ++ u32 max_stills_h; ++ u32 stills_yuv422; /* Allow YUV422 stills capture */ ++ u32 one_shot_stills; /* Continuous or one shot stills captures. */ ++ ++ u32 max_preview_video_w; /* Max size of the preview or video ++ * capture frames ++ */ ++ u32 max_preview_video_h; ++ u32 num_preview_video_frames; ++ ++ /** Sets the height of the circular buffer for stills capture. */ ++ u32 stills_capture_circular_buffer_height; ++ ++ /** Allows preview/encode to resume as fast as possible after the stills ++ * input frame has been received, and then processes the still frame in ++ * the background whilst preview/encode has resumed. ++ * Actual mode is controlled by MMAL_PARAMETER_CAPTURE_MODE. ++ */ ++ u32 fast_preview_resume; ++ ++ /** Selects algorithm for timestamping frames if ++ * there is no clock component connected. ++ * enum mmal_parameter_camera_config_timestamp_mode ++ */ ++ s32 use_stc_timestamp; ++}; ++ ++enum mmal_parameter_exposuremode { ++ MMAL_PARAM_EXPOSUREMODE_OFF, ++ MMAL_PARAM_EXPOSUREMODE_AUTO, ++ MMAL_PARAM_EXPOSUREMODE_NIGHT, ++ MMAL_PARAM_EXPOSUREMODE_NIGHTPREVIEW, ++ MMAL_PARAM_EXPOSUREMODE_BACKLIGHT, ++ MMAL_PARAM_EXPOSUREMODE_SPOTLIGHT, ++ MMAL_PARAM_EXPOSUREMODE_SPORTS, ++ MMAL_PARAM_EXPOSUREMODE_SNOW, ++ MMAL_PARAM_EXPOSUREMODE_BEACH, ++ MMAL_PARAM_EXPOSUREMODE_VERYLONG, ++ MMAL_PARAM_EXPOSUREMODE_FIXEDFPS, ++ MMAL_PARAM_EXPOSUREMODE_ANTISHAKE, ++ MMAL_PARAM_EXPOSUREMODE_FIREWORKS, ++}; ++ ++enum mmal_parameter_exposuremeteringmode { ++ MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE, ++ MMAL_PARAM_EXPOSUREMETERINGMODE_SPOT, ++ MMAL_PARAM_EXPOSUREMETERINGMODE_BACKLIT, ++ MMAL_PARAM_EXPOSUREMETERINGMODE_MATRIX, ++}; ++ ++enum mmal_parameter_awbmode { ++ MMAL_PARAM_AWBMODE_OFF, ++ MMAL_PARAM_AWBMODE_AUTO, ++ MMAL_PARAM_AWBMODE_SUNLIGHT, ++ MMAL_PARAM_AWBMODE_CLOUDY, ++ MMAL_PARAM_AWBMODE_SHADE, ++ MMAL_PARAM_AWBMODE_TUNGSTEN, ++ MMAL_PARAM_AWBMODE_FLUORESCENT, ++ MMAL_PARAM_AWBMODE_INCANDESCENT, ++ MMAL_PARAM_AWBMODE_FLASH, ++ MMAL_PARAM_AWBMODE_HORIZON, ++}; ++ ++enum mmal_parameter_imagefx { ++ MMAL_PARAM_IMAGEFX_NONE, ++ MMAL_PARAM_IMAGEFX_NEGATIVE, ++ MMAL_PARAM_IMAGEFX_SOLARIZE, ++ MMAL_PARAM_IMAGEFX_POSTERIZE, ++ MMAL_PARAM_IMAGEFX_WHITEBOARD, ++ MMAL_PARAM_IMAGEFX_BLACKBOARD, ++ MMAL_PARAM_IMAGEFX_SKETCH, ++ MMAL_PARAM_IMAGEFX_DENOISE, ++ MMAL_PARAM_IMAGEFX_EMBOSS, ++ MMAL_PARAM_IMAGEFX_OILPAINT, ++ MMAL_PARAM_IMAGEFX_HATCH, ++ MMAL_PARAM_IMAGEFX_GPEN, ++ MMAL_PARAM_IMAGEFX_PASTEL, ++ MMAL_PARAM_IMAGEFX_WATERCOLOUR, ++ MMAL_PARAM_IMAGEFX_FILM, ++ MMAL_PARAM_IMAGEFX_BLUR, ++ MMAL_PARAM_IMAGEFX_SATURATION, ++ MMAL_PARAM_IMAGEFX_COLOURSWAP, ++ MMAL_PARAM_IMAGEFX_WASHEDOUT, ++ MMAL_PARAM_IMAGEFX_POSTERISE, ++ MMAL_PARAM_IMAGEFX_COLOURPOINT, ++ MMAL_PARAM_IMAGEFX_COLOURBALANCE, ++ MMAL_PARAM_IMAGEFX_CARTOON, ++}; ++ ++enum MMAL_PARAM_FLICKERAVOID_T { ++ MMAL_PARAM_FLICKERAVOID_OFF, ++ MMAL_PARAM_FLICKERAVOID_AUTO, ++ MMAL_PARAM_FLICKERAVOID_50HZ, ++ MMAL_PARAM_FLICKERAVOID_60HZ, ++ MMAL_PARAM_FLICKERAVOID_MAX = 0x7FFFFFFF ++}; ++ ++struct mmal_parameter_awbgains { ++ struct mmal_parameter_rational r_gain; /**< Red gain */ ++ struct mmal_parameter_rational b_gain; /**< Blue gain */ ++}; ++ ++/** Manner of video rate control */ ++enum mmal_parameter_rate_control_mode { ++ MMAL_VIDEO_RATECONTROL_DEFAULT, ++ MMAL_VIDEO_RATECONTROL_VARIABLE, ++ MMAL_VIDEO_RATECONTROL_CONSTANT, ++ MMAL_VIDEO_RATECONTROL_VARIABLE_SKIP_FRAMES, ++ MMAL_VIDEO_RATECONTROL_CONSTANT_SKIP_FRAMES ++}; ++ ++enum mmal_video_profile { ++ MMAL_VIDEO_PROFILE_H263_BASELINE, ++ MMAL_VIDEO_PROFILE_H263_H320CODING, ++ MMAL_VIDEO_PROFILE_H263_BACKWARDCOMPATIBLE, ++ MMAL_VIDEO_PROFILE_H263_ISWV2, ++ MMAL_VIDEO_PROFILE_H263_ISWV3, ++ MMAL_VIDEO_PROFILE_H263_HIGHCOMPRESSION, ++ MMAL_VIDEO_PROFILE_H263_INTERNET, ++ MMAL_VIDEO_PROFILE_H263_INTERLACE, ++ MMAL_VIDEO_PROFILE_H263_HIGHLATENCY, ++ MMAL_VIDEO_PROFILE_MP4V_SIMPLE, ++ MMAL_VIDEO_PROFILE_MP4V_SIMPLESCALABLE, ++ MMAL_VIDEO_PROFILE_MP4V_CORE, ++ MMAL_VIDEO_PROFILE_MP4V_MAIN, ++ MMAL_VIDEO_PROFILE_MP4V_NBIT, ++ MMAL_VIDEO_PROFILE_MP4V_SCALABLETEXTURE, ++ MMAL_VIDEO_PROFILE_MP4V_SIMPLEFACE, ++ MMAL_VIDEO_PROFILE_MP4V_SIMPLEFBA, ++ MMAL_VIDEO_PROFILE_MP4V_BASICANIMATED, ++ MMAL_VIDEO_PROFILE_MP4V_HYBRID, ++ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDREALTIME, ++ MMAL_VIDEO_PROFILE_MP4V_CORESCALABLE, ++ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCODING, ++ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCORE, ++ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSCALABLE, ++ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSIMPLE, ++ MMAL_VIDEO_PROFILE_H264_BASELINE, ++ MMAL_VIDEO_PROFILE_H264_MAIN, ++ MMAL_VIDEO_PROFILE_H264_EXTENDED, ++ MMAL_VIDEO_PROFILE_H264_HIGH, ++ MMAL_VIDEO_PROFILE_H264_HIGH10, ++ MMAL_VIDEO_PROFILE_H264_HIGH422, ++ MMAL_VIDEO_PROFILE_H264_HIGH444, ++ MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE, ++ MMAL_VIDEO_PROFILE_DUMMY = 0x7FFFFFFF ++}; ++ ++enum mmal_video_level { ++ MMAL_VIDEO_LEVEL_H263_10, ++ MMAL_VIDEO_LEVEL_H263_20, ++ MMAL_VIDEO_LEVEL_H263_30, ++ MMAL_VIDEO_LEVEL_H263_40, ++ MMAL_VIDEO_LEVEL_H263_45, ++ MMAL_VIDEO_LEVEL_H263_50, ++ MMAL_VIDEO_LEVEL_H263_60, ++ MMAL_VIDEO_LEVEL_H263_70, ++ MMAL_VIDEO_LEVEL_MP4V_0, ++ MMAL_VIDEO_LEVEL_MP4V_0b, ++ MMAL_VIDEO_LEVEL_MP4V_1, ++ MMAL_VIDEO_LEVEL_MP4V_2, ++ MMAL_VIDEO_LEVEL_MP4V_3, ++ MMAL_VIDEO_LEVEL_MP4V_4, ++ MMAL_VIDEO_LEVEL_MP4V_4a, ++ MMAL_VIDEO_LEVEL_MP4V_5, ++ MMAL_VIDEO_LEVEL_MP4V_6, ++ MMAL_VIDEO_LEVEL_H264_1, ++ MMAL_VIDEO_LEVEL_H264_1b, ++ MMAL_VIDEO_LEVEL_H264_11, ++ MMAL_VIDEO_LEVEL_H264_12, ++ MMAL_VIDEO_LEVEL_H264_13, ++ MMAL_VIDEO_LEVEL_H264_2, ++ MMAL_VIDEO_LEVEL_H264_21, ++ MMAL_VIDEO_LEVEL_H264_22, ++ MMAL_VIDEO_LEVEL_H264_3, ++ MMAL_VIDEO_LEVEL_H264_31, ++ MMAL_VIDEO_LEVEL_H264_32, ++ MMAL_VIDEO_LEVEL_H264_4, ++ MMAL_VIDEO_LEVEL_H264_41, ++ MMAL_VIDEO_LEVEL_H264_42, ++ MMAL_VIDEO_LEVEL_H264_5, ++ MMAL_VIDEO_LEVEL_H264_51, ++ MMAL_VIDEO_LEVEL_DUMMY = 0x7FFFFFFF ++}; ++ ++struct mmal_parameter_video_profile { ++ enum mmal_video_profile profile; ++ enum mmal_video_level level; ++}; ++ ++/* video parameters */ ++ ++enum mmal_parameter_video_type { ++ /** @ref MMAL_DISPLAYREGION_T */ ++ MMAL_PARAMETER_DISPLAYREGION = MMAL_PARAMETER_GROUP_VIDEO, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ ++ MMAL_PARAMETER_SUPPORTED_PROFILES, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ ++ MMAL_PARAMETER_PROFILE, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_INTRAPERIOD, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_RATECONTROL_T */ ++ MMAL_PARAMETER_RATECONTROL, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_NALUNITFORMAT_T */ ++ MMAL_PARAMETER_NALUNITFORMAT, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_MINIMISE_FRAGMENTATION, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. ++ * Setting the value to zero resets to the default (one slice per ++ * frame). ++ */ ++ MMAL_PARAMETER_MB_ROWS_PER_SLICE, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION_T */ ++ MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_EEDE_ENABLE_T */ ++ MMAL_PARAMETER_VIDEO_EEDE_ENABLE, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE_T */ ++ MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. Request an I-frame. */ ++ MMAL_PARAMETER_VIDEO_REQUEST_I_FRAME, ++ /** @ref MMAL_PARAMETER_VIDEO_INTRA_REFRESH_T */ ++ MMAL_PARAMETER_VIDEO_INTRA_REFRESH, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. Run-time bit rate control */ ++ MMAL_PARAMETER_VIDEO_BIT_RATE, ++ ++ /** @ref MMAL_PARAMETER_FRAME_RATE_T */ ++ MMAL_PARAMETER_VIDEO_FRAME_RATE, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_MIN_QUANT, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_MAX_QUANT, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL, ++ ++ MMAL_PARAMETER_EXTRA_BUFFERS, /**< @ref MMAL_PARAMETER_UINT32_T. */ ++ /** @ref MMAL_PARAMETER_UINT32_T. ++ * Changing this parameter from the default can reduce frame rate ++ * because image buffers need to be re-pitched. ++ */ ++ MMAL_PARAMETER_VIDEO_ALIGN_HORIZ, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. ++ * Changing this parameter from the default can reduce frame rate ++ * because image buffers need to be re-pitched. ++ */ ++ MMAL_PARAMETER_VIDEO_ALIGN_VERT, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAMES, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_INITIAL_QUANT, ++ ++ /**< @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_QP_P, ++ ++ /**< @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_RC_SLICE_DQUANT, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_FRAME_LIMIT_BITS, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_PEAK_RATE, ++ ++ /* H264 specific parameters */ ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_DISABLE_CABAC, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_LATENCY, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_AU_DELIMITERS, ++ ++ /** @ref MMAL_PARAMETER_UINT32_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_DEBLOCK_IDC, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_ENCODER_H264_MB_INTRA_MODES_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_MB_INTRA_MODE, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_HEADER_ON_OPEN, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_PRECODE_FOR_QP, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_DRM_INIT_INFO_T. */ ++ MMAL_PARAMETER_VIDEO_DRM_INIT_INFO, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_TIMESTAMP_FIFO, ++ ++ /** @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_DECODE_ERROR_CONCEALMENT, ++ ++ /** @ref MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER_T. */ ++ MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER, ++ ++ /** @ref MMAL_PARAMETER_BYTES_T */ ++ MMAL_PARAMETER_VIDEO_DECODE_CONFIG_VD3, ++ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_VCL_HRD_PARAMETERS, ++ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG, ++ ++ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER ++}; ++ ++/** Valid mirror modes */ ++enum mmal_parameter_mirror { ++ MMAL_PARAM_MIRROR_NONE, ++ MMAL_PARAM_MIRROR_VERTICAL, ++ MMAL_PARAM_MIRROR_HORIZONTAL, ++ MMAL_PARAM_MIRROR_BOTH, ++}; ++ ++enum mmal_parameter_displaytransform { ++ MMAL_DISPLAY_ROT0 = 0, ++ MMAL_DISPLAY_MIRROR_ROT0 = 1, ++ MMAL_DISPLAY_MIRROR_ROT180 = 2, ++ MMAL_DISPLAY_ROT180 = 3, ++ MMAL_DISPLAY_MIRROR_ROT90 = 4, ++ MMAL_DISPLAY_ROT270 = 5, ++ MMAL_DISPLAY_ROT90 = 6, ++ MMAL_DISPLAY_MIRROR_ROT270 = 7, ++}; ++ ++enum mmal_parameter_displaymode { ++ MMAL_DISPLAY_MODE_FILL = 0, ++ MMAL_DISPLAY_MODE_LETTERBOX = 1, ++}; ++ ++enum mmal_parameter_displayset { ++ MMAL_DISPLAY_SET_NONE = 0, ++ MMAL_DISPLAY_SET_NUM = 1, ++ MMAL_DISPLAY_SET_FULLSCREEN = 2, ++ MMAL_DISPLAY_SET_TRANSFORM = 4, ++ MMAL_DISPLAY_SET_DEST_RECT = 8, ++ MMAL_DISPLAY_SET_SRC_RECT = 0x10, ++ MMAL_DISPLAY_SET_MODE = 0x20, ++ MMAL_DISPLAY_SET_PIXEL = 0x40, ++ MMAL_DISPLAY_SET_NOASPECT = 0x80, ++ MMAL_DISPLAY_SET_LAYER = 0x100, ++ MMAL_DISPLAY_SET_COPYPROTECT = 0x200, ++ MMAL_DISPLAY_SET_ALPHA = 0x400, ++}; ++ ++/* rectangle, used lots so it gets its own struct */ ++struct vchiq_mmal_rect { ++ s32 x; ++ s32 y; ++ s32 width; ++ s32 height; ++}; ++ ++struct mmal_parameter_displayregion { ++ /** Bitfield that indicates which fields are set and should be ++ * used. All other fields will maintain their current value. ++ * \ref MMAL_DISPLAYSET_T defines the bits that can be ++ * combined. ++ */ ++ u32 set; ++ ++ /** Describes the display output device, with 0 typically ++ * being a directly connected LCD display. The actual values ++ * will depend on the hardware. Code using hard-wired numbers ++ * (e.g. 2) is certain to fail. ++ */ ++ ++ u32 display_num; ++ /** Indicates that we are using the full device screen area, ++ * rather than a window of the display. If zero, then ++ * dest_rect is used to specify a region of the display to ++ * use. ++ */ ++ ++ s32 fullscreen; ++ /** Indicates any rotation or flipping used to map frames onto ++ * the natural display orientation. ++ */ ++ u32 transform; /* enum mmal_parameter_displaytransform */ ++ ++ /** Where to display the frame within the screen, if ++ * fullscreen is zero. ++ */ ++ struct vchiq_mmal_rect dest_rect; ++ ++ /** Indicates which area of the frame to display. If all ++ * values are zero, the whole frame will be used. ++ */ ++ struct vchiq_mmal_rect src_rect; ++ ++ /** If set to non-zero, indicates that any display scaling ++ * should disregard the aspect ratio of the frame region being ++ * displayed. ++ */ ++ s32 noaspect; ++ ++ /** Indicates how the image should be scaled to fit the ++ * display. \code MMAL_DISPLAY_MODE_FILL \endcode indicates ++ * that the image should fill the screen by potentially ++ * cropping the frames. Setting \code mode \endcode to \code ++ * MMAL_DISPLAY_MODE_LETTERBOX \endcode indicates that all the ++ * source region should be displayed and black bars added if ++ * necessary. ++ */ ++ u32 mode; /* enum mmal_parameter_displaymode */ ++ ++ /** If non-zero, defines the width of a source pixel relative ++ * to \code pixel_y \endcode. If zero, then pixels default to ++ * being square. ++ */ ++ u32 pixel_x; ++ ++ /** If non-zero, defines the height of a source pixel relative ++ * to \code pixel_x \endcode. If zero, then pixels default to ++ * being square. ++ */ ++ u32 pixel_y; ++ ++ /** Sets the relative depth of the images, with greater values ++ * being in front of smaller values. ++ */ ++ u32 layer; ++ ++ /** Set to non-zero to ensure copy protection is used on ++ * output. ++ */ ++ s32 copyprotect_required; ++ ++ /** Level of opacity of the layer, where zero is fully ++ * transparent and 255 is fully opaque. ++ */ ++ u32 alpha; ++}; ++ ++#define MMAL_MAX_IMAGEFX_PARAMETERS 5 ++ ++struct mmal_parameter_imagefx_parameters { ++ enum mmal_parameter_imagefx effect; ++ u32 num_effect_params; ++ u32 effect_parameter[MMAL_MAX_IMAGEFX_PARAMETERS]; ++}; ++ ++#define MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS 4 ++#define MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES 2 ++#define MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN 16 ++ ++struct mmal_parameter_camera_info_camera_t { ++ u32 port_id; ++ u32 max_width; ++ u32 max_height; ++ u32 lens_present; ++ u8 camera_name[MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN]; ++}; ++ ++enum mmal_parameter_camera_info_flash_type_t { ++ /* Make values explicit to ensure they match values in config ini */ ++ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_XENON = 0, ++ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_LED = 1, ++ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_OTHER = 2, ++ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_MAX = 0x7FFFFFFF ++}; ++ ++struct mmal_parameter_camera_info_flash_t { ++ enum mmal_parameter_camera_info_flash_type_t flash_type; ++}; ++ ++struct mmal_parameter_camera_info_t { ++ u32 num_cameras; ++ u32 num_flashes; ++ struct mmal_parameter_camera_info_camera_t ++ cameras[MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS]; ++ struct mmal_parameter_camera_info_flash_t ++ flashes[MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES]; ++}; ++ ++#endif +--- /dev/null ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -0,0 +1,166 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Broadcom BM2835 V4L2 driver ++ * ++ * Copyright © 2013 Raspberry Pi (Trading) Ltd. ++ * ++ * Authors: Vincent Sanders @ Collabora ++ * Dave Stevenson @ Broadcom ++ * (now dave.stevenson@raspberrypi.org) ++ * Simon Mellor @ Broadcom ++ * Luke Diamand @ Broadcom ++ * ++ * MMAL interface to VCHIQ message passing ++ */ ++ ++#ifndef MMAL_VCHIQ_H ++#define MMAL_VCHIQ_H ++ ++#include "mmal-msg-format.h" ++ ++#define MAX_PORT_COUNT 4 ++ ++/* Maximum size of the format extradata. */ ++#define MMAL_FORMAT_EXTRADATA_MAX_SIZE 128 ++ ++struct vchiq_mmal_instance; ++ ++enum vchiq_mmal_es_type { ++ MMAL_ES_TYPE_UNKNOWN, /**< Unknown elementary stream type */ ++ MMAL_ES_TYPE_CONTROL, /**< Elementary stream of control commands */ ++ MMAL_ES_TYPE_AUDIO, /**< Audio elementary stream */ ++ MMAL_ES_TYPE_VIDEO, /**< Video elementary stream */ ++ MMAL_ES_TYPE_SUBPICTURE /**< Sub-picture elementary stream */ ++}; ++ ++struct vchiq_mmal_port_buffer { ++ unsigned int num; /* number of buffers */ ++ u32 size; /* size of buffers */ ++ u32 alignment; /* alignment of buffers */ ++}; ++ ++struct vchiq_mmal_port; ++ ++typedef void (*vchiq_mmal_buffer_cb)( ++ struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ int status, struct mmal_buffer *buffer, ++ unsigned long length, u32 mmal_flags, s64 dts, s64 pts); ++ ++struct vchiq_mmal_port { ++ bool enabled; ++ u32 handle; ++ u32 type; /* port type, cached to use on port info set */ ++ u32 index; /* port index, cached to use on port info set */ ++ ++ /* component port belongs to, allows simple deref */ ++ struct vchiq_mmal_component *component; ++ ++ struct vchiq_mmal_port *connected; /* port conencted to */ ++ ++ /* buffer info */ ++ struct vchiq_mmal_port_buffer minimum_buffer; ++ struct vchiq_mmal_port_buffer recommended_buffer; ++ struct vchiq_mmal_port_buffer current_buffer; ++ ++ /* stream format */ ++ struct mmal_es_format_local format; ++ /* elementary stream format */ ++ union mmal_es_specific_format es; ++ ++ /* data buffers to fill */ ++ struct list_head buffers; ++ /* lock to serialise adding and removing buffers from list */ ++ spinlock_t slock; ++ ++ /* Count of buffers the VPU has yet to return */ ++ atomic_t buffers_with_vpu; ++ /* callback on buffer completion */ ++ vchiq_mmal_buffer_cb buffer_cb; ++ /* callback context */ ++ void *cb_ctx; ++}; ++ ++struct vchiq_mmal_component { ++ bool enabled; ++ u32 handle; /* VideoCore handle for component */ ++ u32 inputs; /* Number of input ports */ ++ u32 outputs; /* Number of output ports */ ++ u32 clocks; /* Number of clock ports */ ++ struct vchiq_mmal_port control; /* control port */ ++ struct vchiq_mmal_port input[MAX_PORT_COUNT]; /* input ports */ ++ struct vchiq_mmal_port output[MAX_PORT_COUNT]; /* output ports */ ++ struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */ ++}; ++ ++int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance); ++int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance); ++ ++/* Initialise a mmal component and its ports ++ * ++ */ ++int vchiq_mmal_component_init( ++ struct vchiq_mmal_instance *instance, ++ const char *name, ++ struct vchiq_mmal_component **component_out); ++ ++int vchiq_mmal_component_finalise( ++ struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component); ++ ++int vchiq_mmal_component_enable( ++ struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component); ++ ++int vchiq_mmal_component_disable( ++ struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_component *component); ++ ++/* enable a mmal port ++ * ++ * enables a port and if a buffer callback provided enque buffer ++ * headers as appropriate for the port. ++ */ ++int vchiq_mmal_port_enable( ++ struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ vchiq_mmal_buffer_cb buffer_cb); ++ ++/* disable a port ++ * ++ * disable a port will dequeue any pending buffers ++ */ ++int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port); ++ ++int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter, ++ void *value, ++ u32 value_size); ++ ++int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ u32 parameter, ++ void *value, ++ u32 *value_size); ++ ++int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port); ++ ++int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *src, ++ struct vchiq_mmal_port *dst); ++ ++int vchiq_mmal_version(struct vchiq_mmal_instance *instance, ++ u32 *major_out, ++ u32 *minor_out); ++ ++int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, ++ struct mmal_buffer *buf); ++ ++int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance, ++ struct mmal_buffer *buf); ++int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf); ++#endif /* MMAL_VCHIQ_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0268-staging-mmal-vchiq-Allocate-and-free-components-as-r.patch b/target/linux/brcm2708/patches-4.19/950-0268-staging-mmal-vchiq-Allocate-and-free-components-as-r.patch new file mode 100644 index 000000000..fefea5d9b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0268-staging-mmal-vchiq-Allocate-and-free-components-as-r.patch @@ -0,0 +1,107 @@ +From 9daa20076f689c9d3f32446b5a73a0f0e20651ca Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 16:51:13 +0100 +Subject: [PATCH 268/703] staging: mmal-vchiq: Allocate and free components as + required + +The existing code assumed that there would only ever be 4 components, +and never freed the entries once used. +Allow arbitrary creation and destruction of components. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 29 ++++++++++++------- + .../vc04_services/vchiq-mmal/mmal-vchiq.h | 1 + + 2 files changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -38,8 +38,11 @@ MODULE_AUTHOR("Dave Stevenson, vchiq_mutex)) + return -EINTR; + +- if (instance->component_idx == VCHIQ_MMAL_MAX_COMPONENTS) { ++ for (idx = 0; idx < VCHIQ_MMAL_MAX_COMPONENTS; idx++) { ++ if (!instance->component[idx].in_use) { ++ component = &instance->component[idx]; ++ component->in_use = 1; ++ break; ++ } ++ } ++ ++ if (!component) { + ret = -EINVAL; /* todo is this correct error? */ + goto unlock; + } + +- component = &instance->component[instance->component_idx]; +- + ret = create_component(instance, component, name); + if (ret < 0) { + pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", +@@ -1693,8 +1700,6 @@ int vchiq_mmal_component_init(struct vch + goto release_component; + } + +- instance->component_idx++; +- + *component_out = component; + + mutex_unlock(&instance->vchiq_mutex); +@@ -1704,6 +1709,8 @@ int vchiq_mmal_component_init(struct vch + release_component: + destroy_component(instance, component); + unlock: ++ if (component) ++ component->in_use = 0; + mutex_unlock(&instance->vchiq_mutex); + + return ret; +@@ -1726,6 +1733,8 @@ int vchiq_mmal_component_finalise(struct + + ret = destroy_component(instance, component); + ++ component->in_use = 0; ++ + mutex_unlock(&instance->vchiq_mutex); + + return ret; +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -82,6 +82,7 @@ struct vchiq_mmal_port { + }; + + struct vchiq_mmal_component { ++ u32 in_use:1; + bool enabled; + u32 handle; /* VideoCore handle for component */ + u32 inputs; /* Number of input ports */ diff --git a/target/linux/brcm2708/patches-4.19/950-0269-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch b/target/linux/brcm2708/patches-4.19/950-0269-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch new file mode 100644 index 000000000..9a2d44312 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0269-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch @@ -0,0 +1,93 @@ +From 504d899794febbec7f371a2ef3d1b18e991d18e5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 16:20:46 +0000 +Subject: [PATCH 269/703] staging: mmal-vchiq: Avoid use of bool in structures + +Fixes up a checkpatch error "Avoid using bool structure members +because of possible alignment issues". + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 14 +++++++------- + .../staging/vc04_services/vchiq-mmal/mmal-vchiq.h | 4 ++-- + 2 files changed, 9 insertions(+), 9 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -860,9 +860,9 @@ static int port_info_get(struct vchiq_mm + goto release_msg; + + if (rmsg->u.port_info_get_reply.port.is_enabled == 0) +- port->enabled = false; ++ port->enabled = 0; + else +- port->enabled = true; ++ port->enabled = 1; + + /* copy the values out of the message */ + port->handle = rmsg->u.port_info_get_reply.port_handle; +@@ -1299,7 +1299,7 @@ static int port_disable(struct vchiq_mma + if (!port->enabled) + return 0; + +- port->enabled = false; ++ port->enabled = 0; + + ret = port_action_port(instance, port, + MMAL_MSG_PORT_ACTION_TYPE_DISABLE); +@@ -1351,7 +1351,7 @@ static int port_enable(struct vchiq_mmal + if (ret) + goto done; + +- port->enabled = true; ++ port->enabled = 1; + + if (port->buffer_cb) { + /* send buffer headers to videocore */ +@@ -1523,7 +1523,7 @@ int vchiq_mmal_port_connect_tunnel(struc + pr_err("failed disconnecting src port\n"); + goto release_unlock; + } +- src->connected->enabled = false; ++ src->connected->enabled = 0; + src->connected = NULL; + } + +@@ -1759,7 +1759,7 @@ int vchiq_mmal_component_enable(struct v + + ret = enable_component(instance, component); + if (ret == 0) +- component->enabled = true; ++ component->enabled = 1; + + mutex_unlock(&instance->vchiq_mutex); + +@@ -1785,7 +1785,7 @@ int vchiq_mmal_component_disable(struct + + ret = disable_component(instance, component); + if (ret == 0) +- component->enabled = false; ++ component->enabled = 0; + + mutex_unlock(&instance->vchiq_mutex); + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -48,7 +48,7 @@ typedef void (*vchiq_mmal_buffer_cb)( + unsigned long length, u32 mmal_flags, s64 dts, s64 pts); + + struct vchiq_mmal_port { +- bool enabled; ++ u32 enabled:1; + u32 handle; + u32 type; /* port type, cached to use on port info set */ + u32 index; /* port index, cached to use on port info set */ +@@ -83,7 +83,7 @@ struct vchiq_mmal_port { + + struct vchiq_mmal_component { + u32 in_use:1; +- bool enabled; ++ u32 enabled:1; + u32 handle; /* VideoCore handle for component */ + u32 inputs; /* Number of input ports */ + u32 outputs; /* Number of output ports */ diff --git a/target/linux/brcm2708/patches-4.19/950-0270-staging-mmal-vchiq-Make-timeout-a-defined-parameter.patch b/target/linux/brcm2708/patches-4.19/950-0270-staging-mmal-vchiq-Make-timeout-a-defined-parameter.patch new file mode 100644 index 000000000..6168d078f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0270-staging-mmal-vchiq-Make-timeout-a-defined-parameter.patch @@ -0,0 +1,38 @@ +From 11937ca9b223ffa394f04940b245b3689172537f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 16:57:09 +0100 +Subject: [PATCH 270/703] staging: mmal-vchiq: Make timeout a defined parameter + +The timeout period for VPU communications is a useful thing +to extend when debugging. +Set it via a define, rather than a magic number buried in the code. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -44,6 +44,12 @@ MODULE_VERSION("0.0.1"); + */ + #define VCHIQ_MMAL_MAX_COMPONENTS 64 + ++/* ++ * Timeout for synchronous msg responses in seconds. ++ * Helpful to increase this if stopping in the VPU debugger. ++ */ ++#define SYNC_MSG_TIMEOUT 3 ++ + /*#define FULL_MSG_DUMP 1*/ + + #ifdef DEBUG +@@ -691,7 +697,7 @@ static int send_synchronous_mmal_msg(str + } + + timeout = wait_for_completion_timeout(&msg_context->u.sync.cmplt, +- 3 * HZ); ++ SYNC_MSG_TIMEOUT * HZ); + if (timeout == 0) { + pr_err("timed out waiting for sync completion\n"); + ret = -ETIME; diff --git a/target/linux/brcm2708/patches-4.19/950-0271-staging-mmal-vchiq-Make-a-mmal_buf-struct-for-passin.patch b/target/linux/brcm2708/patches-4.19/950-0271-staging-mmal-vchiq-Make-a-mmal_buf-struct-for-passin.patch new file mode 100644 index 000000000..daf73061f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0271-staging-mmal-vchiq-Make-a-mmal_buf-struct-for-passin.patch @@ -0,0 +1,280 @@ +From 32d3fb2930b7e6f47959f0765c13f7cfda2baa7e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 17:33:37 +0100 +Subject: [PATCH 271/703] staging: mmal-vchiq: Make a mmal_buf struct for + passing parameters + +The callback from vchi_mmal to the client was growing lots of extra +parameters. Consolidate them into a single struct instead of +growing the list further. +The struct is associated with the client buffer, therefore there +are various changes to setup various containers for the struct, +and pass the appropriate members. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 62 ++++++++++++------- + .../vc04_services/vchiq-mmal/mmal-common.h | 5 ++ + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 29 ++++++--- + .../vc04_services/vchiq-mmal/mmal-vchiq.h | 3 +- + 4 files changed, 64 insertions(+), 35 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -72,6 +72,12 @@ static const struct v4l2_fract + tpf_max = {.numerator = 1, .denominator = FPS_MIN}, + tpf_default = {.numerator = 1000, .denominator = 30000}; + ++/* Container for MMAL and VB2 buffers*/ ++struct vb2_mmal_buffer { ++ struct vb2_v4l2_buffer vb; ++ struct mmal_buffer mmal; ++}; ++ + /* video formats */ + static struct mmal_fmt formats[] = { + { +@@ -267,14 +273,15 @@ static int buffer_init(struct vb2_buffer + { + struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); +- struct mmal_buffer *buf = container_of(vb2, struct mmal_buffer, vb); ++ struct vb2_mmal_buffer *buf = ++ container_of(vb2, struct vb2_mmal_buffer, vb); + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p, vb %p\n", + __func__, dev, vb); +- buf->buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); +- buf->buffer_size = vb2_plane_size(&buf->vb.vb2_buf, 0); ++ buf->mmal.buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); ++ buf->mmal.buffer_size = vb2_plane_size(&buf->vb.vb2_buf, 0); + +- return mmal_vchi_buffer_init(dev->instance, buf); ++ return mmal_vchi_buffer_init(dev->instance, &buf->mmal); + } + + static int buffer_prepare(struct vb2_buffer *vb) +@@ -303,11 +310,13 @@ static void buffer_cleanup(struct vb2_bu + { + struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); +- struct mmal_buffer *buf = container_of(vb2, struct mmal_buffer, vb); ++ struct vb2_mmal_buffer *buf = ++ container_of(vb2, struct vb2_mmal_buffer, vb); + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p, vb %p\n", + __func__, dev, vb); +- mmal_vchi_buffer_cleanup(buf); ++ ++ mmal_vchi_buffer_cleanup(&buf->mmal); + } + + static inline bool is_capturing(struct bm2835_mmal_dev *dev) +@@ -319,14 +328,16 @@ static inline bool is_capturing(struct b + static void buffer_cb(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_port *port, + int status, +- struct mmal_buffer *buf, +- unsigned long length, u32 mmal_flags, s64 dts, s64 pts) ++ struct mmal_buffer *mmal_buf) + { + struct bm2835_mmal_dev *dev = port->cb_ctx; ++ struct vb2_mmal_buffer *buf = ++ container_of(mmal_buf, struct vb2_mmal_buffer, mmal); + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "%s: status:%d, buf:%p, length:%lu, flags %u, pts %lld\n", +- __func__, status, buf, length, mmal_flags, pts); ++ __func__, status, buf, mmal_buf->length, mmal_buf->mmal_flags, ++ mmal_buf->pts); + + if (status != 0) { + /* error in transfer */ +@@ -337,7 +348,7 @@ static void buffer_cb(struct vchiq_mmal_ + return; + } + +- if (length == 0) { ++ if (mmal_buf->length == 0) { + /* stream ended */ + if (dev->capture.frame_count) { + /* empty buffer whilst capturing - expected to be an +@@ -353,7 +364,8 @@ static void buffer_cb(struct vchiq_mmal_ + &dev->capture.frame_count, + sizeof(dev->capture.frame_count)); + } +- if (vchiq_mmal_submit_buffer(instance, port, buf)) ++ if (vchiq_mmal_submit_buffer(instance, port, ++ &buf->mmal)) + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Failed to return EOS buffer"); + } else { +@@ -382,16 +394,16 @@ static void buffer_cb(struct vchiq_mmal_ + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Buffer time set as current time - %lld", + buf->vb.vb2_buf.timestamp); +- } else if (pts != 0) { ++ } else if (mmal_buf->pts != 0) { + ktime_t timestamp; +- s64 runtime_us = pts - ++ s64 runtime_us = mmal_buf->pts - + dev->capture.vc_start_timestamp; + timestamp = ktime_add_us(dev->capture.kernel_start_ts, + runtime_us); + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Convert start time %llu and %llu with offset %llu to %llu\n", + ktime_to_ns(dev->capture.kernel_start_ts), +- dev->capture.vc_start_timestamp, pts, ++ dev->capture.vc_start_timestamp, mmal_buf->pts, + ktime_to_ns(timestamp)); + if (timestamp < dev->capture.last_timestamp) { + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +@@ -416,15 +428,15 @@ static void buffer_cb(struct vchiq_mmal_ + dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; + buf->vb.sequence = dev->capture.sequence++; + +- vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); +- if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) ++ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, mmal_buf->length); ++ if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) + buf->vb.flags |= V4L2_BUF_FLAG_KEYFRAME; + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Buffer has ts %llu", dev->capture.last_timestamp); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); + +- if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && ++ if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && + is_capturing(dev)) { + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "Grab another frame as buffer has EOS"); +@@ -507,14 +519,16 @@ static void buffer_queue(struct vb2_buff + { + struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); +- struct mmal_buffer *buf = container_of(vb2, struct mmal_buffer, vb); ++ struct vb2_mmal_buffer *buf = ++ container_of(vb2, struct vb2_mmal_buffer, vb); + int ret; + + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "%s: dev:%p buf:%p, idx %u\n", + __func__, dev, buf, vb2->vb2_buf.index); + +- ret = vchiq_mmal_submit_buffer(dev->instance, dev->capture.port, buf); ++ ret = vchiq_mmal_submit_buffer(dev->instance, dev->capture.port, ++ &buf->mmal); + if (ret < 0) + v4l2_err(&dev->v4l2_dev, "%s: error submitting buffer\n", + __func__); +@@ -628,7 +642,7 @@ static void stop_streaming(struct vb2_qu + dev->capture.frame_count = 0; + + /* ensure a format has actually been set */ +- if (!dev->capture.port) { ++ if (!port) { + v4l2_err(&dev->v4l2_dev, + "no capture port - stream not started?\n"); + return; +@@ -648,11 +662,11 @@ static void stop_streaming(struct vb2_qu + + /* disable the connection from camera to encoder */ + ret = vchiq_mmal_port_disable(dev->instance, dev->capture.camera_port); +- if (!ret && dev->capture.camera_port != dev->capture.port) { ++ if (!ret && dev->capture.camera_port != port) { + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, + "disabling port\n"); +- ret = vchiq_mmal_port_disable(dev->instance, dev->capture.port); +- } else if (dev->capture.camera_port != dev->capture.port) { ++ ret = vchiq_mmal_port_disable(dev->instance, port); ++ } else if (dev->capture.camera_port != port) { + v4l2_err(&dev->v4l2_dev, "port_disable failed, error %d\n", + ret); + } +@@ -1954,7 +1968,7 @@ static int bcm2835_mmal_probe(struct pla + q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ; + q->drv_priv = dev; +- q->buf_struct_size = sizeof(struct mmal_buffer); ++ q->buf_struct_size = sizeof(struct vb2_mmal_buffer); + q->ops = &bm2835_mmal_video_qops; + q->mem_ops = &vb2_vmalloc_memops; + q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +@@ -50,6 +50,11 @@ struct mmal_buffer { + unsigned long buffer_size; /* size of allocated buffer */ + + struct mmal_msg_context *msg_context; ++ ++ unsigned long length; ++ u32 mmal_flags; ++ s64 dts; ++ s64 pts; + }; + + /* */ +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -258,17 +258,25 @@ static void buffer_work_cb(struct work_s + { + struct mmal_msg_context *msg_context = + container_of(work, struct mmal_msg_context, u.bulk.work); ++ struct mmal_buffer *buffer = msg_context->u.bulk.buffer; ++ ++ if (!buffer) { ++ pr_err("%s: ctx: %p, No mmal buffer to pass details\n", ++ __func__, msg_context); ++ return; ++ } ++ ++ buffer->length = msg_context->u.bulk.buffer_used; ++ buffer->mmal_flags = msg_context->u.bulk.mmal_flags; ++ buffer->dts = msg_context->u.bulk.dts; ++ buffer->pts = msg_context->u.bulk.pts; + + atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); + + msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, + msg_context->u.bulk.port, + msg_context->u.bulk.status, +- msg_context->u.bulk.buffer, +- msg_context->u.bulk.buffer_used, +- msg_context->u.bulk.mmal_flags, +- msg_context->u.bulk.dts, +- msg_context->u.bulk.pts); ++ msg_context->u.bulk.buffer); + } + + /* workqueue scheduled callback to handle receiving buffers +@@ -1326,11 +1334,14 @@ static int port_disable(struct vchiq_mma + mmalbuf = list_entry(buf_head, struct mmal_buffer, + list); + list_del(buf_head); +- if (port->buffer_cb) ++ if (port->buffer_cb) { ++ mmalbuf->length = 0; ++ mmalbuf->mmal_flags = 0; ++ mmalbuf->dts = MMAL_TIME_UNKNOWN; ++ mmalbuf->pts = MMAL_TIME_UNKNOWN; + port->buffer_cb(instance, +- port, 0, mmalbuf, 0, 0, +- MMAL_TIME_UNKNOWN, +- MMAL_TIME_UNKNOWN); ++ port, 0, mmalbuf); ++ } + } + + spin_unlock_irqrestore(&port->slock, flags); +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -44,8 +44,7 @@ struct vchiq_mmal_port; + typedef void (*vchiq_mmal_buffer_cb)( + struct vchiq_mmal_instance *instance, + struct vchiq_mmal_port *port, +- int status, struct mmal_buffer *buffer, +- unsigned long length, u32 mmal_flags, s64 dts, s64 pts); ++ int status, struct mmal_buffer *buffer); + + struct vchiq_mmal_port { + u32 enabled:1; diff --git a/target/linux/brcm2708/patches-4.19/950-0272-staging-mmal-vchiq-Add-support-for-event-callbacks.patch b/target/linux/brcm2708/patches-4.19/950-0272-staging-mmal-vchiq-Add-support-for-event-callbacks.patch new file mode 100644 index 000000000..4744405a4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0272-staging-mmal-vchiq-Add-support-for-event-callbacks.patch @@ -0,0 +1,356 @@ +From 903a6c2047aef7eba69ca04e6e3488ba3de0d9f9 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 18:15:38 +0100 +Subject: [PATCH 272/703] staging: mmal-vchiq: Add support for event callbacks. + +(Preparation for the codec driver). +The codec uses the event mechanism to report things such as +resolution changes. It is signalled by the cmd field of the buffer +being non-zero. + +Add support for passing this information out to the client. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/vchiq-mmal/mmal-common.h | 1 + + .../vc04_services/vchiq-mmal/mmal-msg.h | 35 ++++ + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 170 ++++++++++++++++-- + .../vc04_services/vchiq-mmal/mmal-vchiq.h | 4 + + 4 files changed, 196 insertions(+), 14 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +@@ -51,6 +51,7 @@ struct mmal_buffer { + + struct mmal_msg_context *msg_context; + ++ u32 cmd; /* MMAL command. 0=data. */ + unsigned long length; + u32 mmal_flags; + s64 dts; +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h +@@ -346,6 +346,41 @@ struct mmal_msg_port_parameter_get_reply + /* event messages */ + #define MMAL_WORKER_EVENT_SPACE 256 + ++/* Four CC's for events */ ++#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) ++ ++#define MMAL_EVENT_ERROR MMAL_FOURCC('E', 'R', 'R', 'O') ++#define MMAL_EVENT_EOS MMAL_FOURCC('E', 'E', 'O', 'S') ++#define MMAL_EVENT_FORMAT_CHANGED MMAL_FOURCC('E', 'F', 'C', 'H') ++#define MMAL_EVENT_PARAMETER_CHANGED MMAL_FOURCC('E', 'P', 'C', 'H') ++ ++/* Structs for each of the event message payloads */ ++struct mmal_msg_event_eos { ++ u32 port_type; /**< Type of port that received the end of stream */ ++ u32 port_index; /**< Index of port that received the end of stream */ ++}; ++ ++/** Format changed event data. */ ++struct mmal_msg_event_format_changed { ++ /* Minimum size of buffers the port requires */ ++ u32 buffer_size_min; ++ /* Minimum number of buffers the port requires */ ++ u32 buffer_num_min; ++ /* Size of buffers the port recommends for optimal performance. ++ * A value of zero means no special recommendation. ++ */ ++ u32 buffer_size_recommended; ++ /* Number of buffers the port recommends for optimal ++ * performance. A value of zero means no special recommendation. ++ */ ++ u32 buffer_num_recommended; ++ ++ u32 es_ptr; ++ struct mmal_es_format format; ++ union mmal_es_specific_format es; ++ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; ++}; ++ + struct mmal_msg_event_to_host { + u32 client_component; /* component context */ + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -151,6 +151,8 @@ struct mmal_msg_context { + /* Presentation and Decode timestamps */ + s64 pts; + s64 dts; ++ /* MMAL buffer command flag */ ++ u32 cmd; + + int status; /* context status */ + +@@ -237,18 +239,6 @@ release_msg_context(struct mmal_msg_cont + kfree(msg_context); + } + +-/* deals with receipt of event to host message */ +-static void event_to_host_cb(struct vchiq_mmal_instance *instance, +- struct mmal_msg *msg, u32 msg_len) +-{ +- pr_debug("unhandled event\n"); +- pr_debug("component:%u port type:%d num:%d cmd:0x%x length:%d\n", +- msg->u.event_to_host.client_component, +- msg->u.event_to_host.port_type, +- msg->u.event_to_host.port_num, +- msg->u.event_to_host.cmd, msg->u.event_to_host.length); +-} +- + /* workqueue scheduled callback + * + * we do this because it is important we do not call any other vchiq +@@ -270,13 +260,18 @@ static void buffer_work_cb(struct work_s + buffer->mmal_flags = msg_context->u.bulk.mmal_flags; + buffer->dts = msg_context->u.bulk.dts; + buffer->pts = msg_context->u.bulk.pts; ++ buffer->cmd = msg_context->u.bulk.cmd; + +- atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); ++ if (!buffer->cmd) ++ atomic_dec(&msg_context->u.bulk.port->buffers_with_vpu); + + msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, + msg_context->u.bulk.port, + msg_context->u.bulk.status, + msg_context->u.bulk.buffer); ++ ++ if (buffer->cmd) ++ mutex_unlock(&msg_context->u.bulk.port->event_context_mutex); + } + + /* workqueue scheduled callback to handle receiving buffers +@@ -355,6 +350,7 @@ static int bulk_receive(struct vchiq_mma + msg_context->u.bulk.buffer_used = rd_len; + msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; + msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; ++ msg_context->u.bulk.cmd = msg->u.buffer_from_host.buffer_header.cmd; + + queue_work(msg_context->instance->bulk_wq, + &msg_context->u.bulk.buffer_to_host_work); +@@ -456,6 +452,103 @@ buffer_from_host(struct vchiq_mmal_insta + return ret; + } + ++/* deals with receipt of event to host message */ ++static void event_to_host_cb(struct vchiq_mmal_instance *instance, ++ struct mmal_msg *msg, u32 msg_len) ++{ ++ /* FIXME: Not going to work on 64 bit */ ++ struct vchiq_mmal_component *component = ++ (struct vchiq_mmal_component *)msg->u.event_to_host.client_component; ++ struct vchiq_mmal_port *port = NULL; ++ struct mmal_msg_context *msg_context; ++ u32 port_num = msg->u.event_to_host.port_num; ++ ++ if (msg->u.buffer_from_host.drvbuf.magic == MMAL_MAGIC) { ++ pr_err("%s: MMAL_MSG_TYPE_BUFFER_TO_HOST with bad magic\n", ++ __func__); ++ return; ++ } ++ ++ switch (msg->u.event_to_host.port_type) { ++ case MMAL_PORT_TYPE_CONTROL: ++ if (port_num) { ++ pr_err("%s: port_num of %u >= number of ports 1", ++ __func__, port_num); ++ return; ++ } ++ port = &component->control; ++ break; ++ case MMAL_PORT_TYPE_INPUT: ++ if (port_num >= component->inputs) { ++ pr_err("%s: port_num of %u >= number of ports %u", ++ __func__, port_num, ++ port_num >= component->inputs); ++ return; ++ } ++ port = &component->input[port_num]; ++ break; ++ case MMAL_PORT_TYPE_OUTPUT: ++ if (port_num >= component->outputs) { ++ pr_err("%s: port_num of %u >= number of ports %u", ++ __func__, port_num, ++ port_num >= component->outputs); ++ return; ++ } ++ port = &component->output[port_num]; ++ break; ++ case MMAL_PORT_TYPE_CLOCK: ++ if (port_num >= component->clocks) { ++ pr_err("%s: port_num of %u >= number of ports %u", ++ __func__, port_num, ++ port_num >= component->clocks); ++ return; ++ } ++ port = &component->clock[port_num]; ++ break; ++ default: ++ break; ++ } ++ ++ if (!mutex_trylock(&port->event_context_mutex)) { ++ pr_err("dropping event 0x%x\n", msg->u.event_to_host.cmd); ++ return; ++ } ++ msg_context = port->event_context; ++ ++ if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { ++ /* message reception had an error */ ++ //pr_warn ++ pr_err("%s: error %d in reply\n", __func__, msg->h.status); ++ ++ msg_context->u.bulk.status = msg->h.status; ++ } else if (msg->u.event_to_host.length > MMAL_WORKER_EVENT_SPACE) { ++ /* data is not in message, queue a bulk receive */ ++ pr_err("%s: payload not in message - bulk receive??! NOT SUPPORTED\n", ++ __func__); ++ msg_context->u.bulk.status = -1; ++ } else { ++ memcpy(msg_context->u.bulk.buffer->buffer, ++ msg->u.event_to_host.data, ++ msg->u.event_to_host.length); ++ ++ msg_context->u.bulk.buffer_used = ++ msg->u.event_to_host.length; ++ ++ msg_context->u.bulk.mmal_flags = 0; ++ msg_context->u.bulk.dts = MMAL_TIME_UNKNOWN; ++ msg_context->u.bulk.pts = MMAL_TIME_UNKNOWN; ++ msg_context->u.bulk.cmd = msg->u.event_to_host.cmd; ++ ++ pr_debug("event component:%u port type:%d num:%d cmd:0x%x length:%d\n", ++ msg->u.event_to_host.client_component, ++ msg->u.event_to_host.port_type, ++ msg->u.event_to_host.port_num, ++ msg->u.event_to_host.cmd, msg->u.event_to_host.length); ++ } ++ ++ schedule_work(&msg_context->u.bulk.work); ++} ++ + /* deals with receipt of buffer to host message */ + static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, + struct mmal_msg *msg, u32 msg_len) +@@ -1339,6 +1432,7 @@ static int port_disable(struct vchiq_mma + mmalbuf->mmal_flags = 0; + mmalbuf->dts = MMAL_TIME_UNKNOWN; + mmalbuf->pts = MMAL_TIME_UNKNOWN; ++ mmalbuf->cmd = 0; + port->buffer_cb(instance, + port, 0, mmalbuf); + } +@@ -1640,6 +1734,43 @@ int mmal_vchi_buffer_cleanup(struct mmal + } + EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); + ++static void init_event_context(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port) ++{ ++ struct mmal_msg_context *ctx = get_msg_context(instance); ++ ++ mutex_init(&port->event_context_mutex); ++ ++ port->event_context = ctx; ++ ctx->u.bulk.instance = instance; ++ ctx->u.bulk.port = port; ++ ctx->u.bulk.buffer = ++ kzalloc(sizeof(*ctx->u.bulk.buffer), GFP_KERNEL); ++ if (!ctx->u.bulk.buffer) ++ goto release_msg_context; ++ ctx->u.bulk.buffer->buffer = kzalloc(MMAL_WORKER_EVENT_SPACE, ++ GFP_KERNEL); ++ if (!ctx->u.bulk.buffer->buffer) ++ goto release_buffer; ++ ++ INIT_WORK(&ctx->u.bulk.work, buffer_work_cb); ++ return; ++ ++release_buffer: ++ kfree(ctx->u.bulk.buffer); ++release_msg_context: ++ release_msg_context(ctx); ++} ++ ++static void free_event_context(struct vchiq_mmal_port *port) ++{ ++ struct mmal_msg_context *ctx = port->event_context; ++ ++ kfree(ctx->u.bulk.buffer->buffer); ++ kfree(ctx->u.bulk.buffer); ++ release_msg_context(ctx); ++} ++ + /* Initialise a mmal component and its ports + * + */ +@@ -1683,6 +1814,7 @@ int vchiq_mmal_component_init(struct vch + ret = port_info_get(instance, &component->control); + if (ret < 0) + goto release_component; ++ init_event_context(instance, &component->control); + + for (idx = 0; idx < component->inputs; idx++) { + component->input[idx].type = MMAL_PORT_TYPE_INPUT; +@@ -1693,6 +1825,7 @@ int vchiq_mmal_component_init(struct vch + ret = port_info_get(instance, &component->input[idx]); + if (ret < 0) + goto release_component; ++ init_event_context(instance, &component->input[idx]); + } + + for (idx = 0; idx < component->outputs; idx++) { +@@ -1704,6 +1837,7 @@ int vchiq_mmal_component_init(struct vch + ret = port_info_get(instance, &component->output[idx]); + if (ret < 0) + goto release_component; ++ init_event_context(instance, &component->output[idx]); + } + + for (idx = 0; idx < component->clocks; idx++) { +@@ -1715,6 +1849,7 @@ int vchiq_mmal_component_init(struct vch + ret = port_info_get(instance, &component->clock[idx]); + if (ret < 0) + goto release_component; ++ init_event_context(instance, &component->clock[idx]); + } + + *component_out = component; +@@ -1740,7 +1875,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i + int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_component *component) + { +- int ret; ++ int ret, idx; + + if (mutex_lock_interruptible(&instance->vchiq_mutex)) + return -EINTR; +@@ -1752,6 +1887,13 @@ int vchiq_mmal_component_finalise(struct + + component->in_use = 0; + ++ for (idx = 0; idx < component->inputs; idx++) ++ free_event_context(&component->input[idx]); ++ for (idx = 0; idx < component->outputs; idx++) ++ free_event_context(&component->output[idx]); ++ for (idx = 0; idx < component->clocks; idx++) ++ free_event_context(&component->clock[idx]); ++ + mutex_unlock(&instance->vchiq_mutex); + + return ret; +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -78,6 +78,10 @@ struct vchiq_mmal_port { + vchiq_mmal_buffer_cb buffer_cb; + /* callback context */ + void *cb_ctx; ++ ++ /* ensure serialised use of the one event context structure */ ++ struct mutex event_context_mutex; ++ struct mmal_msg_context *event_context; + }; + + struct vchiq_mmal_component { diff --git a/target/linux/brcm2708/patches-4.19/950-0273-staging-vc04_services-Support-sending-data-to-MMAL-p.patch b/target/linux/brcm2708/patches-4.19/950-0273-staging-vc04_services-Support-sending-data-to-MMAL-p.patch new file mode 100644 index 000000000..735ef4a4f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0273-staging-vc04_services-Support-sending-data-to-MMAL-p.patch @@ -0,0 +1,42 @@ +From 6a64ea8c2097cbe835fae209906a26c9a1896742 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Sep 2018 18:26:02 +0100 +Subject: [PATCH 273/703] staging: vc04_services: Support sending data to MMAL + ports + +Add the ability to send data to ports. This only supports +zero copy mode as the required bulk transfer setup calls +are not done. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 18 +++++++++++++----- + 1 file changed, 13 insertions(+), 5 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -427,11 +427,19 @@ buffer_from_host(struct vchiq_mmal_insta + m.u.buffer_from_host.buffer_header.data = + (u32)(unsigned long)buf->buffer; + m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; +- m.u.buffer_from_host.buffer_header.length = 0; /* nothing used yet */ +- m.u.buffer_from_host.buffer_header.offset = 0; /* no offset */ +- m.u.buffer_from_host.buffer_header.flags = 0; /* no flags */ +- m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; +- m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; ++ if (port->type == MMAL_PORT_TYPE_OUTPUT) { ++ m.u.buffer_from_host.buffer_header.length = 0; ++ m.u.buffer_from_host.buffer_header.offset = 0; ++ m.u.buffer_from_host.buffer_header.flags = 0; ++ m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; ++ m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; ++ } else { ++ m.u.buffer_from_host.buffer_header.length = buf->length; ++ m.u.buffer_from_host.buffer_header.offset = 0; ++ m.u.buffer_from_host.buffer_header.flags = buf->mmal_flags; ++ m.u.buffer_from_host.buffer_header.pts = buf->pts; ++ m.u.buffer_from_host.buffer_header.dts = buf->dts; ++ } + + /* clear buffer type sepecific data */ + memset(&m.u.buffer_from_host.buffer_header_type_specific, 0, diff --git a/target/linux/brcm2708/patches-4.19/950-0274-staging-vc04_services-Fixup-vchiq-mmal-include-order.patch b/target/linux/brcm2708/patches-4.19/950-0274-staging-vc04_services-Fixup-vchiq-mmal-include-order.patch new file mode 100644 index 000000000..4a591eb42 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0274-staging-vc04_services-Fixup-vchiq-mmal-include-order.patch @@ -0,0 +1,36 @@ +From e84380e8791d0a7a6cc4057269f2a2885a4ae8c1 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 25 Sep 2018 16:57:40 +0100 +Subject: [PATCH 274/703] staging: vc04_services: Fixup vchiq-mmal include + ordering + +There were dependencies on including the headers in the correct +order. Fix up the headers so that they include the other +headers that they depend on themselves. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h | 1 + + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h | 1 + + 2 files changed, 2 insertions(+) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-msg.h +@@ -38,6 +38,7 @@ + #include "mmal-msg-common.h" + #include "mmal-msg-format.h" + #include "mmal-msg-port.h" ++#include "mmal-vchiq.h" + + enum mmal_msg_type { + MMAL_MSG_TYPE_QUIT = 1, +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -16,6 +16,7 @@ + #ifndef MMAL_VCHIQ_H + #define MMAL_VCHIQ_H + ++#include "mmal-common.h" + #include "mmal-msg-format.h" + + #define MAX_PORT_COUNT 4 diff --git a/target/linux/brcm2708/patches-4.19/950-0275-staging-vc04_services-Add-new-vc-sm-cma-driver.patch b/target/linux/brcm2708/patches-4.19/950-0275-staging-vc04_services-Add-new-vc-sm-cma-driver.patch new file mode 100644 index 000000000..8437fb2fd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0275-staging-vc04_services-Add-new-vc-sm-cma-driver.patch @@ -0,0 +1,1881 @@ +From b9607d33b3efa9a85268961cadc6df5b5c9b042b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 25 Sep 2018 10:27:11 +0100 +Subject: [PATCH 275/703] staging: vc04_services: Add new vc-sm-cma driver + +This new driver allows contiguous memory blocks to be imported +into the VideoCore VPU memory map, and manages the lifetime of +those objects, only releasing the source dmabuf once the VPU has +confirmed it has finished with it. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/Kconfig | 1 + + drivers/staging/vc04_services/Makefile | 1 + + .../staging/vc04_services/vc-sm-cma/Kconfig | 10 + + .../staging/vc04_services/vc-sm-cma/Makefile | 8 + + drivers/staging/vc04_services/vc-sm-cma/TODO | 2 + + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 838 ++++++++++++++++++ + .../staging/vc04_services/vc-sm-cma/vc_sm.h | 59 ++ + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 498 +++++++++++ + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.h | 59 ++ + .../vc04_services/vc-sm-cma/vc_sm_defs.h | 298 +++++++ + .../vc04_services/vc-sm-cma/vc_sm_knl.h | 28 + + 11 files changed, 1802 insertions(+) + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/Kconfig + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/Makefile + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/TODO + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm.c + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm.h + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.h + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_defs.h + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_knl.h + +--- a/drivers/staging/vc04_services/Kconfig ++++ b/drivers/staging/vc04_services/Kconfig +@@ -22,6 +22,7 @@ source "drivers/staging/vc04_services/bc + + source "drivers/staging/vc04_services/bcm2835-camera/Kconfig" + source "drivers/staging/vc04_services/vchiq-mmal/Kconfig" ++source "drivers/staging/vc04_services/vc-sm-cma/Kconfig" + + endif + +--- a/drivers/staging/vc04_services/Makefile ++++ b/drivers/staging/vc04_services/Makefile +@@ -13,6 +13,7 @@ vchiq-objs := \ + obj-$(CONFIG_SND_BCM2835) += bcm2835-audio/ + obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-camera/ + obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ ++obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma/ + + ccflags-y += -Idrivers/staging/vc04_services -D__VCCOREVER__=0x04000000 + +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/Kconfig +@@ -0,0 +1,10 @@ ++config BCM_VC_SM_CMA ++ tristate "VideoCore Shared Memory (CMA) driver" ++ depends on BCM2835_VCHIQ ++ select RBTREE ++ select DMA_SHARED_BUFFER ++ help ++ Say Y here to enable the shared memory interface that ++ supports sharing dmabufs with VideoCore. ++ This operates over the VCHIQ interface to a service ++ running on VideoCore. +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/Makefile +@@ -0,0 +1,8 @@ ++ccflags-y += -Idrivers/staging/vc04_services -Idrivers/staging/vc04_services/interface/vchi -Idrivers/staging/vc04_services/interface/vchiq_arm ++# -I"drivers/staging/android/ion/" -I"$(srctree)/fs/" ++ccflags-y += -D__VCCOREVER__=0 ++ ++vc-sm-cma-$(CONFIG_BCM_VC_SM_CMA) := \ ++ vc_sm.o vc_sm_cma_vchi.o ++ ++obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma.o +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/TODO +@@ -0,0 +1,2 @@ ++1) Convert to a platform driver. ++ +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -0,0 +1,838 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * VideoCore Shared Memory driver using CMA. ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * Dave Stevenson ++ * ++ * Based on vmcs_sm driver from Broadcom Corporation for some API, ++ * and taking some code for CMA/dmabuf handling from the Android Ion ++ * driver (Google/Linaro). ++ * ++ * This is cut down version to only support import of dma_bufs from ++ * other kernel drivers. A more complete implementation of the old ++ * vmcs_sm functionality can follow later. ++ * ++ */ ++ ++/* ---- Include Files ----------------------------------------------------- */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vchiq_connected.h" ++#include "vc_sm_cma_vchi.h" ++ ++#include "vc_sm.h" ++#include "vc_sm_knl.h" ++ ++/* ---- Private Constants and Types --------------------------------------- */ ++ ++#define DEVICE_NAME "vcsm-cma" ++#define DEVICE_MINOR 0 ++ ++#define VC_SM_RESOURCE_NAME_DEFAULT "sm-host-resource" ++ ++#define VC_SM_DIR_ROOT_NAME "vcsm-cma" ++#define VC_SM_STATE "state" ++ ++/* Private file data associated with each opened device. */ ++struct vc_sm_privdata_t { ++ pid_t pid; /* PID of creator. */ ++ ++ int restart_sys; /* Tracks restart on interrupt. */ ++ enum vc_sm_msg_type int_action; /* Interrupted action. */ ++ u32 int_trans_id; /* Interrupted transaction. */ ++}; ++ ++typedef int (*VC_SM_SHOW) (struct seq_file *s, void *v); ++struct sm_pde_t { ++ VC_SM_SHOW show; /* Debug fs function hookup. */ ++ struct dentry *dir_entry; /* Debug fs directory entry. */ ++ void *priv_data; /* Private data */ ++}; ++ ++/* Global state information. */ ++struct sm_state_t { ++ struct platform_device *pdev; ++ ++ struct miscdevice dev; ++ struct sm_instance *sm_handle; /* Handle for videocore service. */ ++ ++ struct mutex map_lock; /* Global map lock. */ ++ struct list_head buffer_list; /* List of buffer. */ ++ ++ struct vc_sm_privdata_t *data_knl; /* Kernel internal data tracking. */ ++ struct dentry *dir_root; /* Debug fs entries root. */ ++ struct sm_pde_t dir_state; /* Debug fs entries state sub-tree. */ ++ ++ bool require_released_callback; /* VPU will send a released msg when it ++ * has finished with a resource. ++ */ ++ u32 int_trans_id; /* Interrupted transaction. */ ++}; ++ ++/* ---- Private Variables ----------------------------------------------- */ ++ ++static struct sm_state_t *sm_state; ++static int sm_inited; ++ ++/* ---- Private Function Prototypes -------------------------------------- */ ++ ++/* ---- Private Functions ------------------------------------------------ */ ++ ++static int vc_sm_cma_seq_file_show(struct seq_file *s, void *v) ++{ ++ struct sm_pde_t *sm_pde; ++ ++ sm_pde = (struct sm_pde_t *)(s->private); ++ ++ if (sm_pde && sm_pde->show) ++ sm_pde->show(s, v); ++ ++ return 0; ++} ++ ++static int vc_sm_cma_single_open(struct inode *inode, struct file *file) ++{ ++ return single_open(file, vc_sm_cma_seq_file_show, inode->i_private); ++} ++ ++static const struct file_operations vc_sm_cma_debug_fs_fops = { ++ .open = vc_sm_cma_single_open, ++ .read = seq_read, ++ .llseek = seq_lseek, ++ .release = single_release, ++}; ++ ++static int vc_sm_cma_global_state_show(struct seq_file *s, void *v) ++{ ++ struct vc_sm_buffer *resource = NULL; ++ int resource_count = 0; ++ ++ if (!sm_state) ++ return 0; ++ ++ seq_printf(s, "\nVC-ServiceHandle 0x%x\n", ++ (unsigned int)sm_state->sm_handle); ++ ++ /* Log all applicable mapping(s). */ ++ ++ mutex_lock(&sm_state->map_lock); ++ seq_puts(s, "\nResources\n"); ++ if (!list_empty(&sm_state->buffer_list)) { ++ list_for_each_entry(resource, &sm_state->buffer_list, ++ global_buffer_list) { ++ resource_count++; ++ ++ seq_printf(s, "\nResource %p\n", ++ resource); ++ seq_printf(s, " NAME %s\n", ++ resource->name); ++ seq_printf(s, " SIZE %d\n", ++ resource->size); ++ seq_printf(s, " DMABUF %p\n", ++ resource->dma_buf); ++ seq_printf(s, " ATTACH %p\n", ++ resource->attach); ++ seq_printf(s, " SG_TABLE %p\n", ++ resource->sg_table); ++ seq_printf(s, " SGT %p\n", ++ resource->sgt); ++ seq_printf(s, " DMA_ADDR %pad\n", ++ &resource->dma_addr); ++ seq_printf(s, " VC_HANDLE %08x\n", ++ resource->vc_handle); ++ seq_printf(s, " VC_MAPPING %d\n", ++ resource->vpu_state); ++ } ++ } ++ seq_printf(s, "\n\nTotal resource count: %d\n\n", resource_count); ++ ++ mutex_unlock(&sm_state->map_lock); ++ ++ return 0; ++} ++ ++/* ++ * Adds a buffer to the private data list which tracks all the allocated ++ * data. ++ */ ++static void vc_sm_add_resource(struct vc_sm_privdata_t *privdata, ++ struct vc_sm_buffer *buffer) ++{ ++ mutex_lock(&sm_state->map_lock); ++ list_add(&buffer->global_buffer_list, &sm_state->buffer_list); ++ mutex_unlock(&sm_state->map_lock); ++ ++ pr_debug("[%s]: added buffer %p (name %s, size %d)\n", ++ __func__, buffer, buffer->name, buffer->size); ++} ++ ++/* ++ * Release an allocation. ++ * All refcounting is done via the dma buf object. ++ */ ++static void vc_sm_release_resource(struct vc_sm_buffer *buffer, int force) ++{ ++ mutex_lock(&sm_state->map_lock); ++ mutex_lock(&buffer->lock); ++ ++ pr_debug("[%s]: buffer %p (name %s, size %d)\n", ++ __func__, buffer, buffer->name, buffer->size); ++ ++ if (buffer->vc_handle && buffer->vpu_state == VPU_MAPPED) { ++ struct vc_sm_free_t free = { buffer->vc_handle, 0 }; ++ int status = vc_sm_cma_vchi_free(sm_state->sm_handle, &free, ++ &sm_state->int_trans_id); ++ if (status != 0 && status != -EINTR) { ++ pr_err("[%s]: failed to free memory on videocore (status: %u, trans_id: %u)\n", ++ __func__, status, sm_state->int_trans_id); ++ } ++ ++ if (sm_state->require_released_callback) { ++ /* Need to wait for the VPU to confirm the free */ ++ ++ /* Retain a reference on this until the VPU has ++ * released it ++ */ ++ buffer->vpu_state = VPU_UNMAPPING; ++ goto defer; ++ } ++ buffer->vpu_state = VPU_NOT_MAPPED; ++ buffer->vc_handle = 0; ++ } ++ if (buffer->vc_handle) { ++ /* We've sent the unmap request but not had the response. */ ++ pr_err("[%s]: Waiting for VPU unmap response on %p\n", ++ __func__, buffer); ++ goto defer; ++ } ++ if (buffer->in_use) { ++ /* Don't release dmabuf here - we await the release */ ++ pr_err("[%s]: buffer %p is still in use\n", ++ __func__, buffer); ++ goto defer; ++ } ++ ++ /* Handle cleaning up imported dmabufs */ ++ if (buffer->sgt) { ++ dma_buf_unmap_attachment(buffer->attach, buffer->sgt, ++ DMA_BIDIRECTIONAL); ++ buffer->sgt = NULL; ++ } ++ if (buffer->attach) { ++ dma_buf_detach(buffer->dma_buf, buffer->attach); ++ buffer->attach = NULL; ++ } ++ ++ /* Release the dma_buf (whether ours or imported) */ ++ if (buffer->import_dma_buf) { ++ dma_buf_put(buffer->import_dma_buf); ++ buffer->import_dma_buf = NULL; ++ buffer->dma_buf = NULL; ++ } else if (buffer->dma_buf) { ++ dma_buf_put(buffer->dma_buf); ++ buffer->dma_buf = NULL; ++ } ++ ++ if (buffer->sg_table && !buffer->import_dma_buf) { ++ /* Our own allocation that we need to dma_unmap_sg */ ++ dma_unmap_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, ++ buffer->sg_table->nents, DMA_BIDIRECTIONAL); ++ } ++ ++ /* Free the local resource. Start by removing it from the list */ ++ buffer->private = NULL; ++ list_del(&buffer->global_buffer_list); ++ ++ mutex_unlock(&buffer->lock); ++ mutex_unlock(&sm_state->map_lock); ++ ++ mutex_destroy(&buffer->lock); ++ ++ kfree(buffer); ++ return; ++ ++defer: ++ mutex_unlock(&buffer->lock); ++ mutex_unlock(&sm_state->map_lock); ++} ++ ++/* Create support for private data tracking. */ ++static struct vc_sm_privdata_t *vc_sm_cma_create_priv_data(pid_t id) ++{ ++ char alloc_name[32]; ++ struct vc_sm_privdata_t *file_data = NULL; ++ ++ /* Allocate private structure. */ ++ file_data = kzalloc(sizeof(*file_data), GFP_KERNEL); ++ ++ if (!file_data) ++ return NULL; ++ ++ snprintf(alloc_name, sizeof(alloc_name), "%d", id); ++ ++ file_data->pid = id; ++ ++ return file_data; ++} ++ ++/* Dma_buf operations for chaining through to an imported dma_buf */ ++static ++int vc_sm_import_dma_buf_attach(struct dma_buf *dmabuf, ++ struct dma_buf_attachment *attachment) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return -EINVAL; ++ return res->import_dma_buf->ops->attach(res->import_dma_buf, ++ attachment); ++} ++ ++static ++void vc_sm_import_dma_buf_detatch(struct dma_buf *dmabuf, ++ struct dma_buf_attachment *attachment) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return; ++ res->import_dma_buf->ops->detach(res->import_dma_buf, attachment); ++} ++ ++static ++struct sg_table *vc_sm_import_map_dma_buf(struct dma_buf_attachment *attachment, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *res = attachment->dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return NULL; ++ return res->import_dma_buf->ops->map_dma_buf(attachment, direction); ++} ++ ++static ++void vc_sm_import_unmap_dma_buf(struct dma_buf_attachment *attachment, ++ struct sg_table *table, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *res = attachment->dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return; ++ res->import_dma_buf->ops->unmap_dma_buf(attachment, table, direction); ++} ++ ++static ++int vc_sm_import_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ pr_debug("%s: mmap dma_buf %p, res %p, imported db %p\n", __func__, ++ dmabuf, res, res->import_dma_buf); ++ if (!res->import_dma_buf) { ++ pr_err("%s: mmap dma_buf %p- not an imported buffer\n", ++ __func__, dmabuf); ++ return -EINVAL; ++ } ++ return res->import_dma_buf->ops->mmap(res->import_dma_buf, vma); ++} ++ ++static ++void vc_sm_import_dma_buf_release(struct dma_buf *dmabuf) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ pr_debug("%s: Relasing dma_buf %p\n", __func__, dmabuf); ++ if (!res->import_dma_buf) ++ return; ++ ++ res->in_use = 0; ++ ++ vc_sm_release_resource(res, 0); ++} ++ ++static ++void *vc_sm_import_dma_buf_kmap(struct dma_buf *dmabuf, ++ unsigned long offset) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return NULL; ++ return res->import_dma_buf->ops->map(res->import_dma_buf, ++ offset); ++} ++ ++static ++void vc_sm_import_dma_buf_kunmap(struct dma_buf *dmabuf, ++ unsigned long offset, void *ptr) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return; ++ res->import_dma_buf->ops->unmap(res->import_dma_buf, ++ offset, ptr); ++} ++ ++static ++int vc_sm_import_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return -EINVAL; ++ return res->import_dma_buf->ops->begin_cpu_access(res->import_dma_buf, ++ direction); ++} ++ ++static ++int vc_sm_import_dma_buf_end_cpu_access(struct dma_buf *dmabuf, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *res = dmabuf->priv; ++ ++ if (!res->import_dma_buf) ++ return -EINVAL; ++ return res->import_dma_buf->ops->end_cpu_access(res->import_dma_buf, ++ direction); ++} ++ ++static const struct dma_buf_ops dma_buf_import_ops = { ++ .map_dma_buf = vc_sm_import_map_dma_buf, ++ .unmap_dma_buf = vc_sm_import_unmap_dma_buf, ++ .mmap = vc_sm_import_dmabuf_mmap, ++ .release = vc_sm_import_dma_buf_release, ++ .attach = vc_sm_import_dma_buf_attach, ++ .detach = vc_sm_import_dma_buf_detatch, ++ .begin_cpu_access = vc_sm_import_dma_buf_begin_cpu_access, ++ .end_cpu_access = vc_sm_import_dma_buf_end_cpu_access, ++ .map = vc_sm_import_dma_buf_kmap, ++ .unmap = vc_sm_import_dma_buf_kunmap, ++}; ++ ++/* Import a dma_buf to be shared with VC. */ ++int ++vc_sm_cma_import_dmabuf_internal(struct vc_sm_privdata_t *private, ++ struct dma_buf *dma_buf, ++ struct dma_buf **imported_buf) ++{ ++ DEFINE_DMA_BUF_EXPORT_INFO(exp_info); ++ struct vc_sm_buffer *buffer = NULL; ++ struct vc_sm_import import = { }; ++ struct vc_sm_import_result result = { }; ++ struct dma_buf_attachment *attach = NULL; ++ struct sg_table *sgt = NULL; ++ int ret = 0; ++ int status; ++ ++ /* Setup our allocation parameters */ ++ pr_debug("%s: importing dma_buf %p\n", __func__, dma_buf); ++ ++ get_dma_buf(dma_buf); ++ dma_buf = dma_buf; ++ ++ attach = dma_buf_attach(dma_buf, &sm_state->pdev->dev); ++ if (IS_ERR(attach)) { ++ ret = PTR_ERR(attach); ++ goto error; ++ } ++ ++ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL); ++ if (IS_ERR(sgt)) { ++ ret = PTR_ERR(sgt); ++ goto error; ++ } ++ ++ /* Verify that the address block is contiguous */ ++ if (sgt->nents != 1) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ /* Allocate local buffer to track this allocation. */ ++ buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); ++ if (!buffer) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ import.type = VC_SM_ALLOC_NON_CACHED; ++ import.addr = (uint32_t)sg_dma_address(sgt->sgl); ++ if ((import.addr & 0xC0000000) != 0xC0000000) { ++ pr_err("%s: Expecting an uncached alias for dma_addr %08x\n", ++ __func__, import.addr); ++ import.addr |= 0xC0000000; ++ } ++ import.size = sg_dma_len(sgt->sgl); ++ import.allocator = current->tgid; ++ import.kernel_id = (uint32_t)buffer; //FIXME: 64 bit support needed. ++ ++ memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, ++ sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); ++ ++ pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %p, size %u\n", ++ __func__, import.name, import.type, (void *)import.addr, ++ import.size); ++ ++ /* Allocate the videocore buffer. */ ++ status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, ++ &sm_state->int_trans_id); ++ if (status == -EINTR) { ++ pr_debug("[%s]: requesting import memory action restart (trans_id: %u)\n", ++ __func__, sm_state->int_trans_id); ++ ret = -ERESTARTSYS; ++ private->restart_sys = -EINTR; ++ private->int_action = VC_SM_MSG_TYPE_IMPORT; ++ goto error; ++ } else if (status || !result.res_handle) { ++ pr_debug("[%s]: failed to import memory on videocore (status: %u, trans_id: %u)\n", ++ __func__, status, sm_state->int_trans_id); ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ mutex_init(&buffer->lock); ++ INIT_LIST_HEAD(&buffer->attachments); ++ memcpy(buffer->name, import.name, ++ min(sizeof(buffer->name), sizeof(import.name) - 1)); ++ ++ /* Keep track of the buffer we created. */ ++ buffer->private = private; ++ buffer->vc_handle = result.res_handle; ++ buffer->size = import.size; ++ buffer->vpu_state = VPU_MAPPED; ++ ++ buffer->import_dma_buf = dma_buf; ++ ++ buffer->attach = attach; ++ buffer->sgt = sgt; ++ buffer->dma_addr = sg_dma_address(sgt->sgl); ++ buffer->in_use = 1; ++ ++ /* ++ * We're done - we need to export a new dmabuf chaining through most ++ * functions, but enabling us to release our own internal references ++ * here. ++ */ ++ exp_info.ops = &dma_buf_import_ops; ++ exp_info.size = import.size; ++ exp_info.flags = O_RDWR; ++ exp_info.priv = buffer; ++ ++ buffer->dma_buf = dma_buf_export(&exp_info); ++ if (IS_ERR(buffer->dma_buf)) { ++ ret = PTR_ERR(buffer->dma_buf); ++ goto error; ++ } ++ ++ vc_sm_add_resource(private, buffer); ++ ++ *imported_buf = buffer->dma_buf; ++ ++ return 0; ++ ++error: ++ if (result.res_handle) { ++ struct vc_sm_free_t free = { result.res_handle, 0 }; ++ ++ vc_sm_cma_vchi_free(sm_state->sm_handle, &free, ++ &sm_state->int_trans_id); ++ } ++ kfree(buffer); ++ if (sgt) ++ dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); ++ if (attach) ++ dma_buf_detach(dma_buf, attach); ++ dma_buf_put(dma_buf); ++ return ret; ++} ++ ++/* FIXME: Pass a function pointer to this into vc_vchi_sm.c */ ++void ++vc_sm_vpu_event(struct sm_instance *instance, struct vc_sm_result_t *reply, ++ int reply_len) ++{ ++ switch (reply->trans_id & ~0x80000000) { ++ case VC_SM_MSG_TYPE_CLIENT_VERSION: ++ { ++ /* Acknowledge that the firmware supports the version command */ ++ pr_debug("%s: firmware acked version msg. Require release cb\n", ++ __func__); ++ sm_state->require_released_callback = true; ++ } ++ break; ++ case VC_SM_MSG_TYPE_RELEASED: ++ { ++ struct vc_sm_released *release = (struct vc_sm_released *)reply; ++ struct vc_sm_buffer *buffer = ++ (struct vc_sm_buffer *)release->kernel_id; ++ ++ /* ++ * FIXME: Need to check buffer is still valid and allocated ++ * before continuing ++ */ ++ pr_debug("%s: Released addr %08x, size %u, id %08x, mem_handle %08x\n", ++ __func__, release->addr, release->size, ++ release->kernel_id, release->vc_handle); ++ mutex_lock(&buffer->lock); ++ buffer->vc_handle = 0; ++ buffer->vpu_state = VPU_NOT_MAPPED; ++ mutex_unlock(&buffer->lock); ++ ++ vc_sm_release_resource(buffer, 0); ++ } ++ break; ++ default: ++ pr_err("%s: Unknown vpu cmd %x\n", __func__, reply->trans_id); ++ break; ++ } ++} ++ ++/* Videocore connected. */ ++static void vc_sm_connected_init(void) ++{ ++ int ret; ++ VCHI_INSTANCE_T vchi_instance; ++ struct vc_sm_version version; ++ struct vc_sm_result_t version_result; ++ ++ pr_info("[%s]: start\n", __func__); ++ ++ /* ++ * Initialize and create a VCHI connection for the shared memory service ++ * running on videocore. ++ */ ++ ret = vchi_initialise(&vchi_instance); ++ if (ret) { ++ pr_err("[%s]: failed to initialise VCHI instance (ret=%d)\n", ++ __func__, ret); ++ ++ ret = -EIO; ++ goto err_free_mem; ++ } ++ ++ ret = vchi_connect(vchi_instance); ++ if (ret) { ++ pr_err("[%s]: failed to connect VCHI instance (ret=%d)\n", ++ __func__, ret); ++ ++ ret = -EIO; ++ goto err_free_mem; ++ } ++ ++ /* Initialize an instance of the shared memory service. */ ++ sm_state->sm_handle = vc_sm_cma_vchi_init(vchi_instance, 1, ++ vc_sm_vpu_event); ++ if (!sm_state->sm_handle) { ++ pr_err("[%s]: failed to initialize shared memory service\n", ++ __func__); ++ ++ ret = -EPERM; ++ goto err_free_mem; ++ } ++ ++ /* Create a debug fs directory entry (root). */ ++ sm_state->dir_root = debugfs_create_dir(VC_SM_DIR_ROOT_NAME, NULL); ++ if (!sm_state->dir_root) { ++ pr_err("[%s]: failed to create \'%s\' directory entry\n", ++ __func__, VC_SM_DIR_ROOT_NAME); ++ ++ ret = -EPERM; ++ goto err_stop_sm_service; ++ } ++ ++ sm_state->dir_state.show = &vc_sm_cma_global_state_show; ++ sm_state->dir_state.dir_entry = ++ debugfs_create_file(VC_SM_STATE, 0444, sm_state->dir_root, ++ &sm_state->dir_state, ++ &vc_sm_cma_debug_fs_fops); ++ ++ INIT_LIST_HEAD(&sm_state->buffer_list); ++ ++ sm_state->data_knl = vc_sm_cma_create_priv_data(0); ++ if (!sm_state->data_knl) { ++ pr_err("[%s]: failed to create kernel private data tracker\n", ++ __func__); ++ goto err_remove_shared_memory; ++ } ++ ++ version.version = 1; ++ ret = vc_sm_cma_vchi_client_version(sm_state->sm_handle, &version, ++ &version_result, ++ &sm_state->int_trans_id); ++ if (ret) { ++ pr_err("[%s]: Failed to send version request %d\n", __func__, ++ ret); ++ } ++ ++ /* Done! */ ++ sm_inited = 1; ++ pr_info("[%s]: installed successfully\n", __func__); ++ return; ++ ++err_remove_shared_memory: ++ debugfs_remove_recursive(sm_state->dir_root); ++err_stop_sm_service: ++ vc_sm_cma_vchi_stop(&sm_state->sm_handle); ++err_free_mem: ++ kfree(sm_state); ++ pr_info("[%s]: failed, ret %d\n", __func__, ret); ++} ++ ++/* Driver loading. */ ++static int bcm2835_vc_sm_cma_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ int err; ++ ++ pr_info("%s: Videocore shared memory driver\n", __func__); ++ ++ sm_state = kzalloc(sizeof(*sm_state), GFP_KERNEL); ++ if (!sm_state) ++ return -ENOMEM; ++ sm_state->pdev = pdev; ++ mutex_init(&sm_state->map_lock); ++ ++ dev->coherent_dma_mask = DMA_BIT_MASK(32); ++ dev->dma_mask = &dev->coherent_dma_mask; ++ err = of_dma_configure(dev, NULL, true); ++ if (err) { ++ dev_err(dev, "Unable to setup DMA: %d\n", err); ++ return err; ++ } ++ ++ vchiq_add_connected_callback(vc_sm_connected_init); ++ return 0; ++} ++ ++/* Driver unloading. */ ++static int bcm2835_vc_sm_cma_remove(struct platform_device *pdev) ++{ ++ pr_debug("[%s]: start\n", __func__); ++ if (sm_inited) { ++ /* Remove shared memory device. */ ++ misc_deregister(&sm_state->dev); ++ ++ /* Remove all proc entries. */ ++ //debugfs_remove_recursive(sm_state->dir_root); ++ ++ /* Stop the videocore shared memory service. */ ++ vc_sm_cma_vchi_stop(&sm_state->sm_handle); ++ ++ /* Free the memory for the state structure. */ ++ mutex_destroy(&sm_state->map_lock); ++ kfree(sm_state); ++ } ++ ++ pr_debug("[%s]: end\n", __func__); ++ return 0; ++} ++ ++/* Get an internal resource handle mapped from the external one. */ ++int vc_sm_cma_int_handle(int handle) ++{ ++ struct dma_buf *dma_buf = (struct dma_buf *)handle; ++ struct vc_sm_buffer *res; ++ ++ /* Validate we can work with this device. */ ++ if (!sm_state || !handle) { ++ pr_err("[%s]: invalid input\n", __func__); ++ return 0; ++ } ++ ++ res = (struct vc_sm_buffer *)dma_buf->priv; ++ return res->vc_handle; ++} ++EXPORT_SYMBOL_GPL(vc_sm_cma_int_handle); ++ ++/* Free a previously allocated shared memory handle and block. */ ++int vc_sm_cma_free(int handle) ++{ ++ struct dma_buf *dma_buf = (struct dma_buf *)handle; ++ ++ /* Validate we can work with this device. */ ++ if (!sm_state || !handle) { ++ pr_err("[%s]: invalid input\n", __func__); ++ return -EPERM; ++ } ++ ++ pr_debug("%s: handle %08x/dmabuf %p\n", __func__, handle, dma_buf); ++ ++ dma_buf_put(dma_buf); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(vc_sm_cma_free); ++ ++/* Import a dmabuf to be shared with VC. */ ++int vc_sm_cma_import_dmabuf(struct dma_buf *src_dmabuf, int *handle) ++{ ++ struct dma_buf *new_dma_buf; ++ struct vc_sm_buffer *res; ++ int ret; ++ ++ /* Validate we can work with this device. */ ++ if (!sm_state || !src_dmabuf || !handle) { ++ pr_err("[%s]: invalid input\n", __func__); ++ return -EPERM; ++ } ++ ++ ret = vc_sm_cma_import_dmabuf_internal(sm_state->data_knl, src_dmabuf, ++ &new_dma_buf); ++ ++ if (!ret) { ++ pr_debug("%s: imported to ptr %p\n", __func__, new_dma_buf); ++ res = (struct vc_sm_buffer *)new_dma_buf->priv; ++ ++ /* Assign valid handle at this time.*/ ++ *handle = (int)new_dma_buf; ++ } else { ++ /* ++ * succeeded in importing the dma_buf, but then ++ * failed to look it up again. How? ++ * Release the fd again. ++ */ ++ pr_err("%s: imported vc_sm_cma_get_buffer failed %d\n", ++ __func__, ret); ++ } ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(vc_sm_cma_import_dmabuf); ++ ++static struct platform_driver bcm2835_vcsm_cma_driver = { ++ .probe = bcm2835_vc_sm_cma_probe, ++ .remove = bcm2835_vc_sm_cma_remove, ++ .driver = { ++ .name = DEVICE_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(bcm2835_vcsm_cma_driver); ++ ++MODULE_AUTHOR("Dave Stevenson"); ++MODULE_DESCRIPTION("VideoCore CMA Shared Memory Driver"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:vcsm-cma"); +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.h +@@ -0,0 +1,59 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * VideoCore Shared Memory driver using CMA. ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * ++ */ ++ ++#ifndef VC_SM_H ++#define VC_SM_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define VC_SM_MAX_NAME_LEN 32 ++ ++enum vc_sm_vpu_mapping_state { ++ VPU_NOT_MAPPED, ++ VPU_MAPPED, ++ VPU_UNMAPPING ++}; ++ ++struct vc_sm_buffer { ++ struct list_head global_buffer_list; /* Global list of buffers. */ ++ ++ size_t size; ++ ++ /* Lock over all the following state for this buffer */ ++ struct mutex lock; ++ struct sg_table *sg_table; ++ struct list_head attachments; ++ ++ char name[VC_SM_MAX_NAME_LEN]; ++ ++ int in_use:1; /* Kernel is still using this resource */ ++ ++ enum vc_sm_vpu_mapping_state vpu_state; ++ u32 vc_handle; /* VideoCore handle for this buffer */ ++ ++ /* DMABUF related fields */ ++ struct dma_buf *import_dma_buf; ++ struct dma_buf *dma_buf; ++ struct dma_buf_attachment *attach; ++ struct sg_table *sgt; ++ dma_addr_t dma_addr; ++ ++ struct vc_sm_privdata_t *private; ++}; ++ ++#endif +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -0,0 +1,498 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * Copyright 2011-2012 Broadcom Corporation. All rights reserved. ++ * ++ * Based on vmcs_sm driver from Broadcom Corporation. ++ * ++ */ ++ ++/* ---- Include Files ----------------------------------------------------- */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vc_sm_cma_vchi.h" ++ ++#define VC_SM_VER 1 ++#define VC_SM_MIN_VER 0 ++ ++/* ---- Private Constants and Types -------------------------------------- */ ++ ++/* Command blocks come from a pool */ ++#define SM_MAX_NUM_CMD_RSP_BLKS 32 ++ ++struct sm_cmd_rsp_blk { ++ struct list_head head; /* To create lists */ ++ /* To be signaled when the response is there */ ++ struct completion cmplt; ++ ++ u16 id; ++ u16 length; ++ ++ u8 msg[VC_SM_MAX_MSG_LEN]; ++ ++ uint32_t wait:1; ++ uint32_t sent:1; ++ uint32_t alloc:1; ++ ++}; ++ ++struct sm_instance { ++ u32 num_connections; ++ VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; ++ struct task_struct *io_thread; ++ struct completion io_cmplt; ++ ++ vpu_event_cb vpu_event; ++ ++ /* Mutex over the following lists */ ++ struct mutex lock; ++ u32 trans_id; ++ struct list_head cmd_list; ++ struct list_head rsp_list; ++ struct list_head dead_list; ++ ++ struct sm_cmd_rsp_blk free_blk[SM_MAX_NUM_CMD_RSP_BLKS]; ++ ++ /* Mutex over the free_list */ ++ struct mutex free_lock; ++ struct list_head free_list; ++ ++ struct semaphore free_sema; ++ ++}; ++ ++/* ---- Private Variables ------------------------------------------------ */ ++ ++/* ---- Private Function Prototypes -------------------------------------- */ ++ ++/* ---- Private Functions ------------------------------------------------ */ ++static int ++bcm2835_vchi_msg_queue(VCHI_SERVICE_HANDLE_T handle, ++ void *data, ++ unsigned int size) ++{ ++ return vchi_queue_kernel_message(handle, ++ data, ++ size); ++} ++ ++static struct ++sm_cmd_rsp_blk *vc_vchi_cmd_create(struct sm_instance *instance, ++ enum vc_sm_msg_type id, void *msg, ++ u32 size, int wait) ++{ ++ struct sm_cmd_rsp_blk *blk; ++ struct vc_sm_msg_hdr_t *hdr; ++ ++ if (down_interruptible(&instance->free_sema)) { ++ blk = kmalloc(sizeof(*blk), GFP_KERNEL); ++ if (!blk) ++ return NULL; ++ ++ blk->alloc = 1; ++ init_completion(&blk->cmplt); ++ } else { ++ mutex_lock(&instance->free_lock); ++ blk = ++ list_first_entry(&instance->free_list, ++ struct sm_cmd_rsp_blk, head); ++ list_del(&blk->head); ++ mutex_unlock(&instance->free_lock); ++ } ++ ++ blk->sent = 0; ++ blk->wait = wait; ++ blk->length = sizeof(*hdr) + size; ++ ++ hdr = (struct vc_sm_msg_hdr_t *)blk->msg; ++ hdr->type = id; ++ mutex_lock(&instance->lock); ++ instance->trans_id++; ++ /* ++ * Retain the top bit for identifying asynchronous events, or VPU cmds. ++ */ ++ instance->trans_id &= ~0x80000000; ++ hdr->trans_id = instance->trans_id; ++ blk->id = instance->trans_id; ++ mutex_unlock(&instance->lock); ++ ++ if (size) ++ memcpy(hdr->body, msg, size); ++ ++ return blk; ++} ++ ++static void ++vc_vchi_cmd_delete(struct sm_instance *instance, struct sm_cmd_rsp_blk *blk) ++{ ++ if (blk->alloc) { ++ kfree(blk); ++ return; ++ } ++ ++ mutex_lock(&instance->free_lock); ++ list_add(&blk->head, &instance->free_list); ++ mutex_unlock(&instance->free_lock); ++ up(&instance->free_sema); ++} ++ ++static void vc_sm_cma_vchi_rx_ack(struct sm_instance *instance, ++ struct sm_cmd_rsp_blk *cmd, ++ struct vc_sm_result_t *reply, ++ u32 reply_len) ++{ ++ mutex_lock(&instance->lock); ++ list_for_each_entry(cmd, ++ &instance->rsp_list, ++ head) { ++ if (cmd->id == reply->trans_id) ++ break; ++ } ++ mutex_unlock(&instance->lock); ++ ++ if (&cmd->head == &instance->rsp_list) { ++ //pr_debug("%s: received response %u, throw away...", ++ pr_err("%s: received response %u, throw away...", ++ __func__, ++ reply->trans_id); ++ } else if (reply_len > sizeof(cmd->msg)) { ++ pr_err("%s: reply too big (%u) %u, throw away...", ++ __func__, reply_len, ++ reply->trans_id); ++ } else { ++ memcpy(cmd->msg, reply, ++ reply_len); ++ complete(&cmd->cmplt); ++ } ++} ++ ++static int vc_sm_cma_vchi_videocore_io(void *arg) ++{ ++ struct sm_instance *instance = arg; ++ struct sm_cmd_rsp_blk *cmd = NULL, *cmd_tmp; ++ struct vc_sm_result_t *reply; ++ u32 reply_len; ++ s32 status; ++ int svc_use = 1; ++ ++ while (1) { ++ if (svc_use) ++ vchi_service_release(instance->vchi_handle[0]); ++ svc_use = 0; ++ if (!wait_for_completion_interruptible(&instance->io_cmplt)) { ++ vchi_service_use(instance->vchi_handle[0]); ++ svc_use = 1; ++ ++ do { ++ /* ++ * Get new command and move it to response list ++ */ ++ mutex_lock(&instance->lock); ++ if (list_empty(&instance->cmd_list)) { ++ /* no more commands to process */ ++ mutex_unlock(&instance->lock); ++ break; ++ } ++ cmd = ++ list_first_entry(&instance->cmd_list, ++ struct sm_cmd_rsp_blk, ++ head); ++ list_move(&cmd->head, &instance->rsp_list); ++ cmd->sent = 1; ++ mutex_unlock(&instance->lock); ++ ++ /* Send the command */ ++ status = bcm2835_vchi_msg_queue( ++ instance->vchi_handle[0], ++ cmd->msg, cmd->length); ++ if (status) { ++ pr_err("%s: failed to queue message (%d)", ++ __func__, status); ++ } ++ ++ /* If no reply is needed then we're done */ ++ if (!cmd->wait) { ++ mutex_lock(&instance->lock); ++ list_del(&cmd->head); ++ mutex_unlock(&instance->lock); ++ vc_vchi_cmd_delete(instance, cmd); ++ continue; ++ } ++ ++ if (status) { ++ complete(&cmd->cmplt); ++ continue; ++ } ++ ++ } while (1); ++ ++ while (!vchi_msg_peek(instance->vchi_handle[0], ++ (void **)&reply, &reply_len, ++ VCHI_FLAGS_NONE)) { ++ if (reply->trans_id & 0x80000000) { ++ /* Async event or cmd from the VPU */ ++ if (instance->vpu_event) ++ instance->vpu_event( ++ instance, reply, ++ reply_len); ++ } else { ++ vc_sm_cma_vchi_rx_ack(instance, cmd, ++ reply, reply_len); ++ } ++ ++ vchi_msg_remove(instance->vchi_handle[0]); ++ } ++ ++ /* Go through the dead list and free them */ ++ mutex_lock(&instance->lock); ++ list_for_each_entry_safe(cmd, cmd_tmp, ++ &instance->dead_list, head) { ++ list_del(&cmd->head); ++ vc_vchi_cmd_delete(instance, cmd); ++ } ++ mutex_unlock(&instance->lock); ++ } ++ } ++ ++ return 0; ++} ++ ++static void vc_sm_cma_vchi_callback(void *param, ++ const VCHI_CALLBACK_REASON_T reason, ++ void *msg_handle) ++{ ++ struct sm_instance *instance = param; ++ ++ (void)msg_handle; ++ ++ switch (reason) { ++ case VCHI_CALLBACK_MSG_AVAILABLE: ++ complete(&instance->io_cmplt); ++ break; ++ ++ case VCHI_CALLBACK_SERVICE_CLOSED: ++ pr_info("%s: service CLOSED!!", __func__); ++ default: ++ break; ++ } ++} ++ ++struct sm_instance *vc_sm_cma_vchi_init(VCHI_INSTANCE_T vchi_instance, ++ unsigned int num_connections, ++ vpu_event_cb vpu_event) ++{ ++ u32 i; ++ struct sm_instance *instance; ++ int status; ++ ++ pr_debug("%s: start", __func__); ++ ++ if (num_connections > VCHI_MAX_NUM_CONNECTIONS) { ++ pr_err("%s: unsupported number of connections %u (max=%u)", ++ __func__, num_connections, VCHI_MAX_NUM_CONNECTIONS); ++ ++ goto err_null; ++ } ++ /* Allocate memory for this instance */ ++ instance = kzalloc(sizeof(*instance), GFP_KERNEL); ++ ++ /* Misc initialisations */ ++ mutex_init(&instance->lock); ++ init_completion(&instance->io_cmplt); ++ INIT_LIST_HEAD(&instance->cmd_list); ++ INIT_LIST_HEAD(&instance->rsp_list); ++ INIT_LIST_HEAD(&instance->dead_list); ++ INIT_LIST_HEAD(&instance->free_list); ++ sema_init(&instance->free_sema, SM_MAX_NUM_CMD_RSP_BLKS); ++ mutex_init(&instance->free_lock); ++ for (i = 0; i < SM_MAX_NUM_CMD_RSP_BLKS; i++) { ++ init_completion(&instance->free_blk[i].cmplt); ++ list_add(&instance->free_blk[i].head, &instance->free_list); ++ } ++ ++ /* Open the VCHI service connections */ ++ instance->num_connections = num_connections; ++ for (i = 0; i < num_connections; i++) { ++ SERVICE_CREATION_T params = { ++ .version = VCHI_VERSION_EX(VC_SM_VER, VC_SM_MIN_VER), ++ .service_id = VC_SM_SERVER_NAME, ++ .callback = vc_sm_cma_vchi_callback, ++ .callback_param = instance, ++ }; ++ ++ status = vchi_service_open(vchi_instance, ++ ¶ms, &instance->vchi_handle[i]); ++ if (status) { ++ pr_err("%s: failed to open VCHI service (%d)", ++ __func__, status); ++ ++ goto err_close_services; ++ } ++ } ++ ++ /* Create the thread which takes care of all io to/from videoocore. */ ++ instance->io_thread = kthread_create(&vc_sm_cma_vchi_videocore_io, ++ (void *)instance, "SMIO"); ++ if (!instance->io_thread) { ++ pr_err("%s: failed to create SMIO thread", __func__); ++ ++ goto err_close_services; ++ } ++ instance->vpu_event = vpu_event; ++ set_user_nice(instance->io_thread, -10); ++ wake_up_process(instance->io_thread); ++ ++ pr_debug("%s: success - instance 0x%x", __func__, ++ (unsigned int)instance); ++ return instance; ++ ++err_close_services: ++ for (i = 0; i < instance->num_connections; i++) { ++ if (instance->vchi_handle[i]) ++ vchi_service_close(instance->vchi_handle[i]); ++ } ++ kfree(instance); ++err_null: ++ pr_debug("%s: FAILED", __func__); ++ return NULL; ++} ++ ++int vc_sm_cma_vchi_stop(struct sm_instance **handle) ++{ ++ struct sm_instance *instance; ++ u32 i; ++ ++ if (!handle) { ++ pr_err("%s: invalid pointer to handle %p", __func__, handle); ++ goto lock; ++ } ++ ++ if (!*handle) { ++ pr_err("%s: invalid handle %p", __func__, *handle); ++ goto lock; ++ } ++ ++ instance = *handle; ++ ++ /* Close all VCHI service connections */ ++ for (i = 0; i < instance->num_connections; i++) { ++ s32 success; ++ ++ vchi_service_use(instance->vchi_handle[i]); ++ ++ success = vchi_service_close(instance->vchi_handle[i]); ++ } ++ ++ kfree(instance); ++ ++ *handle = NULL; ++ return 0; ++ ++lock: ++ return -EINVAL; ++} ++ ++static int vc_sm_cma_vchi_send_msg(struct sm_instance *handle, ++ enum vc_sm_msg_type msg_id, void *msg, ++ u32 msg_size, void *result, u32 result_size, ++ u32 *cur_trans_id, u8 wait_reply) ++{ ++ int status = 0; ++ struct sm_instance *instance = handle; ++ struct sm_cmd_rsp_blk *cmd_blk; ++ ++ if (!handle) { ++ pr_err("%s: invalid handle", __func__); ++ return -EINVAL; ++ } ++ if (!msg) { ++ pr_err("%s: invalid msg pointer", __func__); ++ return -EINVAL; ++ } ++ ++ cmd_blk = ++ vc_vchi_cmd_create(instance, msg_id, msg, msg_size, wait_reply); ++ if (!cmd_blk) { ++ pr_err("[%s]: failed to allocate global tracking resource", ++ __func__); ++ return -ENOMEM; ++ } ++ ++ if (cur_trans_id) ++ *cur_trans_id = cmd_blk->id; ++ ++ mutex_lock(&instance->lock); ++ list_add_tail(&cmd_blk->head, &instance->cmd_list); ++ mutex_unlock(&instance->lock); ++ complete(&instance->io_cmplt); ++ ++ if (!wait_reply) ++ /* We're done */ ++ return 0; ++ ++ /* Wait for the response */ ++ if (wait_for_completion_interruptible(&cmd_blk->cmplt)) { ++ mutex_lock(&instance->lock); ++ if (!cmd_blk->sent) { ++ list_del(&cmd_blk->head); ++ mutex_unlock(&instance->lock); ++ vc_vchi_cmd_delete(instance, cmd_blk); ++ return -ENXIO; ++ } ++ ++ list_move(&cmd_blk->head, &instance->dead_list); ++ mutex_unlock(&instance->lock); ++ complete(&instance->io_cmplt); ++ return -EINTR; /* We're done */ ++ } ++ ++ if (result && result_size) { ++ memcpy(result, cmd_blk->msg, result_size); ++ } else { ++ struct vc_sm_result_t *res = ++ (struct vc_sm_result_t *)cmd_blk->msg; ++ status = (res->success == 0) ? 0 : -ENXIO; ++ } ++ ++ mutex_lock(&instance->lock); ++ list_del(&cmd_blk->head); ++ mutex_unlock(&instance->lock); ++ vc_vchi_cmd_delete(instance, cmd_blk); ++ return status; ++} ++ ++int vc_sm_cma_vchi_free(struct sm_instance *handle, struct vc_sm_free_t *msg, ++ u32 *cur_trans_id) ++{ ++ return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_FREE, ++ msg, sizeof(*msg), 0, 0, cur_trans_id, 0); ++} ++ ++int vc_sm_cma_vchi_import(struct sm_instance *handle, struct vc_sm_import *msg, ++ struct vc_sm_import_result *result, u32 *cur_trans_id) ++{ ++ return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_IMPORT, ++ msg, sizeof(*msg), result, sizeof(*result), ++ cur_trans_id, 1); ++} ++ ++int vc_sm_cma_vchi_client_version(struct sm_instance *handle, ++ struct vc_sm_version *msg, ++ struct vc_sm_result_t *result, ++ u32 *cur_trans_id) ++{ ++ return vc_sm_cma_vchi_send_msg(handle, VC_SM_MSG_TYPE_CLIENT_VERSION, ++ //msg, sizeof(*msg), result, sizeof(*result), ++ //cur_trans_id, 1); ++ msg, sizeof(*msg), NULL, 0, ++ cur_trans_id, 0); ++} +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.h +@@ -0,0 +1,59 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * Copyright 2011-2012 Broadcom Corporation. All rights reserved. ++ * ++ * Based on vmcs_sm driver from Broadcom Corporation. ++ * ++ */ ++ ++#ifndef __VC_SM_CMA_VCHI_H__INCLUDED__ ++#define __VC_SM_CMA_VCHI_H__INCLUDED__ ++ ++#include "interface/vchi/vchi.h" ++ ++#include "vc_sm_defs.h" ++ ++/* ++ * Forward declare. ++ */ ++struct sm_instance; ++ ++typedef void (*vpu_event_cb)(struct sm_instance *instance, ++ struct vc_sm_result_t *reply, int reply_len); ++ ++/* ++ * Initialize the shared memory service, opens up vchi connection to talk to it. ++ */ ++struct sm_instance *vc_sm_cma_vchi_init(VCHI_INSTANCE_T vchi_instance, ++ unsigned int num_connections, ++ vpu_event_cb vpu_event); ++ ++/* ++ * Terminates the shared memory service. ++ */ ++int vc_sm_cma_vchi_stop(struct sm_instance **handle); ++ ++/* ++ * Ask the shared memory service to free up some memory that was previously ++ * allocated by the vc_sm_cma_vchi_alloc function call. ++ */ ++int vc_sm_cma_vchi_free(struct sm_instance *handle, struct vc_sm_free_t *msg, ++ u32 *cur_trans_id); ++ ++/* ++ * Import a contiguous block of memory and wrap it in a GPU MEM_HANDLE_T. ++ */ ++int vc_sm_cma_vchi_import(struct sm_instance *handle, struct vc_sm_import *msg, ++ struct vc_sm_import_result *result, ++ u32 *cur_trans_id); ++ ++int vc_sm_cma_vchi_client_version(struct sm_instance *handle, ++ struct vc_sm_version *msg, ++ struct vc_sm_result_t *result, ++ u32 *cur_trans_id); ++ ++#endif /* __VC_SM_CMA_VCHI_H__INCLUDED__ */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_defs.h +@@ -0,0 +1,298 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * ++ * Based on vc_sm_defs.h from the vmcs_sm driver Copyright Broadcom Corporation. ++ * All IPC messages are copied across to this file, even if the vc-sm-cma ++ * driver is not currently using them. ++ * ++ **************************************************************************** ++ */ ++ ++#ifndef __VC_SM_DEFS_H__INCLUDED__ ++#define __VC_SM_DEFS_H__INCLUDED__ ++ ++/* FourCC code used for VCHI connection */ ++#define VC_SM_SERVER_NAME MAKE_FOURCC("SMEM") ++ ++/* Maximum message length */ ++#define VC_SM_MAX_MSG_LEN (sizeof(union vc_sm_msg_union_t) + \ ++ sizeof(struct vc_sm_msg_hdr_t)) ++#define VC_SM_MAX_RSP_LEN (sizeof(union vc_sm_msg_union_t)) ++ ++/* Resource name maximum size */ ++#define VC_SM_RESOURCE_NAME 32 ++ ++/* ++ * Version to be reported to the VPU ++ * VPU assumes 0 (aka 1) which does not require the released callback, nor ++ * expect the client to handle VC_MEM_REQUESTS. ++ * Version 2 requires the released callback, and must support VC_MEM_REQUESTS. ++ */ ++#define VC_SM_PROTOCOL_VERSION 2 ++ ++enum vc_sm_msg_type { ++ /* Message types supported for HOST->VC direction */ ++ ++ /* Allocate shared memory block */ ++ VC_SM_MSG_TYPE_ALLOC, ++ /* Lock allocated shared memory block */ ++ VC_SM_MSG_TYPE_LOCK, ++ /* Unlock allocated shared memory block */ ++ VC_SM_MSG_TYPE_UNLOCK, ++ /* Unlock allocated shared memory block, do not answer command */ ++ VC_SM_MSG_TYPE_UNLOCK_NOANS, ++ /* Free shared memory block */ ++ VC_SM_MSG_TYPE_FREE, ++ /* Resize a shared memory block */ ++ VC_SM_MSG_TYPE_RESIZE, ++ /* Walk the allocated shared memory block(s) */ ++ VC_SM_MSG_TYPE_WALK_ALLOC, ++ ++ /* A previously applied action will need to be reverted */ ++ VC_SM_MSG_TYPE_ACTION_CLEAN, ++ ++ /* ++ * Import a physical address and wrap into a MEM_HANDLE_T. ++ * Release with VC_SM_MSG_TYPE_FREE. ++ */ ++ VC_SM_MSG_TYPE_IMPORT, ++ /* ++ *Tells VC the protocol version supported by this client. ++ * 2 supports the async/cmd messages from the VPU for final release ++ * of memory, and for VC allocations. ++ */ ++ VC_SM_MSG_TYPE_CLIENT_VERSION, ++ /* Response to VC request for memory */ ++ VC_SM_MSG_TYPE_VC_MEM_REQUEST_REPLY, ++ ++ /* ++ * Asynchronous/cmd messages supported for VC->HOST direction. ++ * Signalled by setting the top bit in vc_sm_result_t trans_id. ++ */ ++ ++ /* ++ * VC has finished with an imported memory allocation. ++ * Release any Linux reference counts on the underlying block. ++ */ ++ VC_SM_MSG_TYPE_RELEASED, ++ /* VC request for memory */ ++ VC_SM_MSG_TYPE_VC_MEM_REQUEST, ++ ++ VC_SM_MSG_TYPE_MAX ++}; ++ ++/* Type of memory to be allocated */ ++enum vc_sm_alloc_type_t { ++ VC_SM_ALLOC_CACHED, ++ VC_SM_ALLOC_NON_CACHED, ++}; ++ ++/* Message header for all messages in HOST->VC direction */ ++struct vc_sm_msg_hdr_t { ++ u32 type; ++ u32 trans_id; ++ u8 body[0]; ++ ++}; ++ ++/* Request to allocate memory (HOST->VC) */ ++struct vc_sm_alloc_t { ++ /* type of memory to allocate */ ++ enum vc_sm_alloc_type_t type; ++ /* byte amount of data to allocate per unit */ ++ u32 base_unit; ++ /* number of unit to allocate */ ++ u32 num_unit; ++ /* alignment to be applied on allocation */ ++ u32 alignment; ++ /* identity of who allocated this block */ ++ u32 allocator; ++ /* resource name (for easier tracking on vc side) */ ++ char name[VC_SM_RESOURCE_NAME]; ++ ++}; ++ ++/* Result of a requested memory allocation (VC->HOST) */ ++struct vc_sm_alloc_result_t { ++ /* Transaction identifier */ ++ u32 trans_id; ++ ++ /* Resource handle */ ++ u32 res_handle; ++ /* Pointer to resource buffer */ ++ u32 res_mem; ++ /* Resource base size (bytes) */ ++ u32 res_base_size; ++ /* Resource number */ ++ u32 res_num; ++ ++}; ++ ++/* Request to free a previously allocated memory (HOST->VC) */ ++struct vc_sm_free_t { ++ /* Resource handle (returned from alloc) */ ++ u32 res_handle; ++ /* Resource buffer (returned from alloc) */ ++ u32 res_mem; ++ ++}; ++ ++/* Request to lock a previously allocated memory (HOST->VC) */ ++struct vc_sm_lock_unlock_t { ++ /* Resource handle (returned from alloc) */ ++ u32 res_handle; ++ /* Resource buffer (returned from alloc) */ ++ u32 res_mem; ++ ++}; ++ ++/* Request to resize a previously allocated memory (HOST->VC) */ ++struct vc_sm_resize_t { ++ /* Resource handle (returned from alloc) */ ++ u32 res_handle; ++ /* Resource buffer (returned from alloc) */ ++ u32 res_mem; ++ /* Resource *new* size requested (bytes) */ ++ u32 res_new_size; ++ ++}; ++ ++/* Result of a requested memory lock (VC->HOST) */ ++struct vc_sm_lock_result_t { ++ /* Transaction identifier */ ++ u32 trans_id; ++ ++ /* Resource handle */ ++ u32 res_handle; ++ /* Pointer to resource buffer */ ++ u32 res_mem; ++ /* ++ * Pointer to former resource buffer if the memory ++ * was reallocated ++ */ ++ u32 res_old_mem; ++ ++}; ++ ++/* Generic result for a request (VC->HOST) */ ++struct vc_sm_result_t { ++ /* Transaction identifier */ ++ u32 trans_id; ++ ++ s32 success; ++ ++}; ++ ++/* Request to revert a previously applied action (HOST->VC) */ ++struct vc_sm_action_clean_t { ++ /* Action of interest */ ++ enum vc_sm_msg_type res_action; ++ /* Transaction identifier for the action of interest */ ++ u32 action_trans_id; ++ ++}; ++ ++/* Request to remove all data associated with a given allocator (HOST->VC) */ ++struct vc_sm_free_all_t { ++ /* Allocator identifier */ ++ u32 allocator; ++}; ++ ++/* Request to import memory (HOST->VC) */ ++struct vc_sm_import { ++ /* type of memory to allocate */ ++ enum vc_sm_alloc_type_t type; ++ /* pointer to the VC (ie physical) address of the allocated memory */ ++ u32 addr; ++ /* size of buffer */ ++ u32 size; ++ /* opaque handle returned in RELEASED messages */ ++ u32 kernel_id; ++ /* Allocator identifier */ ++ u32 allocator; ++ /* resource name (for easier tracking on vc side) */ ++ char name[VC_SM_RESOURCE_NAME]; ++}; ++ ++/* Result of a requested memory import (VC->HOST) */ ++struct vc_sm_import_result { ++ /* Transaction identifier */ ++ u32 trans_id; ++ ++ /* Resource handle */ ++ u32 res_handle; ++}; ++ ++/* Notification that VC has finished with an allocation (VC->HOST) */ ++struct vc_sm_released { ++ /* cmd type / trans_id */ ++ u32 cmd; ++ ++ /* pointer to the VC (ie physical) address of the allocated memory */ ++ u32 addr; ++ /* size of buffer */ ++ u32 size; ++ /* opaque handle returned in RELEASED messages */ ++ u32 kernel_id; ++ u32 vc_handle; ++}; ++ ++/* ++ * Client informing VC as to the protocol version it supports. ++ * >=2 requires the released callback, and supports VC asking for memory. ++ * Failure means that the firmware doesn't support this call, and therefore the ++ * client should either fail, or NOT rely on getting the released callback. ++ */ ++struct vc_sm_version { ++ u32 version; ++}; ++ ++/* Request FROM VideoCore for some memory */ ++struct vc_sm_vc_mem_request { ++ /* cmd type */ ++ u32 cmd; ++ ++ /* trans_id (from VPU) */ ++ u32 trans_id; ++ /* size of buffer */ ++ u32 size; ++ /* alignment of buffer */ ++ u32 align; ++ /* resource name (for easier tracking) */ ++ char name[VC_SM_RESOURCE_NAME]; ++}; ++ ++/* Response from the kernel to provide the VPU with some memory */ ++struct vc_sm_vc_mem_request_result { ++ /* Transaction identifier for the VPU */ ++ u32 trans_id; ++ /* pointer to the physical address of the allocated memory */ ++ u32 addr; ++ /* opaque handle returned in RELEASED messages */ ++ u32 kernel_id; ++}; ++ ++/* Union of ALL messages */ ++union vc_sm_msg_union_t { ++ struct vc_sm_alloc_t alloc; ++ struct vc_sm_alloc_result_t alloc_result; ++ struct vc_sm_free_t free; ++ struct vc_sm_lock_unlock_t lock_unlock; ++ struct vc_sm_action_clean_t action_clean; ++ struct vc_sm_resize_t resize; ++ struct vc_sm_lock_result_t lock_result; ++ struct vc_sm_result_t result; ++ struct vc_sm_free_all_t free_all; ++ struct vc_sm_import import; ++ struct vc_sm_import_result import_result; ++ struct vc_sm_version version; ++ struct vc_sm_released released; ++ struct vc_sm_vc_mem_request vc_request; ++ struct vc_sm_vc_mem_request_result vc_request_result; ++}; ++ ++#endif /* __VC_SM_DEFS_H__INCLUDED__ */ +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_knl.h +@@ -0,0 +1,28 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * ++ * Based on vc_sm_defs.h from the vmcs_sm driver Copyright Broadcom Corporation. ++ * ++ */ ++ ++#ifndef __VC_SM_KNL_H__INCLUDED__ ++#define __VC_SM_KNL_H__INCLUDED__ ++ ++#if !defined(__KERNEL__) ++#error "This interface is for kernel use only..." ++#endif ++ ++/* Free a previously allocated or imported shared memory handle and block. */ ++int vc_sm_cma_free(int handle); ++ ++/* Get an internal resource handle mapped from the external one. */ ++int vc_sm_cma_int_handle(int handle); ++ ++/* Import a block of memory into the GPU space. */ ++int vc_sm_cma_import_dmabuf(struct dma_buf *dmabuf, int *handle); ++ ++#endif /* __VC_SM_KNL_H__INCLUDED__ */ diff --git a/target/linux/brcm2708/patches-4.19/950-0276-staging-vc-sm-cma-Fixup-driver-for-older-VCHI-APIs.patch b/target/linux/brcm2708/patches-4.19/950-0276-staging-vc-sm-cma-Fixup-driver-for-older-VCHI-APIs.patch new file mode 100644 index 000000000..1ab6bdd5a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0276-staging-vc-sm-cma-Fixup-driver-for-older-VCHI-APIs.patch @@ -0,0 +1,42 @@ +From 474a6207d432c230ffa4f9b1a8ff0d9673bd89bb Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 30 Oct 2018 11:42:48 +0000 +Subject: [PATCH 276/703] staging: vc-sm-cma: Fixup driver for older VCHI APIs + +Original patch was based off staging which included some cleanups +of the VCHI APIs. Those aren't present here, so switch back to +the older API. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 2 +- + drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 5 +++++ + 2 files changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -632,7 +632,7 @@ static void vc_sm_connected_init(void) + goto err_free_mem; + } + +- ret = vchi_connect(vchi_instance); ++ ret = vchi_connect(NULL, 0, vchi_instance); + if (ret) { + pr_err("[%s]: failed to connect VCHI instance (ret=%d)\n", + __func__, ret); +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -325,8 +325,13 @@ struct sm_instance *vc_sm_cma_vchi_init( + SERVICE_CREATION_T params = { + .version = VCHI_VERSION_EX(VC_SM_VER, VC_SM_MIN_VER), + .service_id = VC_SM_SERVER_NAME, ++ .rx_fifo_size = 0, ++ .tx_fifo_size = 0, + .callback = vc_sm_cma_vchi_callback, + .callback_param = instance, ++ .want_unaligned_bulk_rx = 0, ++ .want_unaligned_bulk_tx = 0, ++ .want_crc = 0 + }; + + status = vchi_service_open(vchi_instance, diff --git a/target/linux/brcm2708/patches-4.19/950-0277-staging-vc04_services-Use-vc-sm-cma-to-support-zero-.patch b/target/linux/brcm2708/patches-4.19/950-0277-staging-vc04_services-Use-vc-sm-cma-to-support-zero-.patch new file mode 100644 index 000000000..93dbba1cc --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0277-staging-vc04_services-Use-vc-sm-cma-to-support-zero-.patch @@ -0,0 +1,163 @@ +From d3c99e301ac57e6c1a5e13b341baacd7182a5763 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 25 Sep 2018 16:07:55 +0100 +Subject: [PATCH 277/703] staging: vc04_services: Use vc-sm-cma to support zero + copy + +With the vc-sm-cma driver we can support zero copy of buffers between +the kernel and VPU. Add this support to vchiq-mmal. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vchiq-mmal/Kconfig | 1 + + .../vc04_services/vchiq-mmal/mmal-common.h | 4 ++ + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 66 ++++++++++++++++++- + .../vc04_services/vchiq-mmal/mmal-vchiq.h | 1 + + 4 files changed, 70 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/Kconfig ++++ b/drivers/staging/vc04_services/vchiq-mmal/Kconfig +@@ -2,6 +2,7 @@ config BCM2835_VCHIQ_MMAL + tristate "BCM2835 MMAL VCHIQ service" + depends on (ARCH_BCM2835 || COMPILE_TEST) + select BCM2835_VCHIQ ++ select BCM_VC_SM_CMA + help + Enables the MMAL API over VCHIQ as used for the + majority of the multimedia services on VideoCore. +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +@@ -51,6 +51,10 @@ struct mmal_buffer { + + struct mmal_msg_context *msg_context; + ++ struct dma_buf *dma_buf;/* Exported dmabuf fd from videobuf2 */ ++ int vcsm_handle; /* VCSM handle having imported the dmabuf */ ++ u32 vc_handle; /* VC handle to that dmabuf */ ++ + u32 cmd; /* MMAL command. 0=data. */ + unsigned long length; + u32 mmal_flags; +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -27,9 +27,12 @@ + #include + + #include "mmal-common.h" ++#include "mmal-parameters.h" + #include "mmal-vchiq.h" + #include "mmal-msg.h" + ++#include "vc-sm-cma/vc_sm_knl.h" ++ + #define USE_VCHIQ_ARM + #include "interface/vchi/vchi.h" + +@@ -424,8 +427,13 @@ buffer_from_host(struct vchiq_mmal_insta + + /* buffer header */ + m.u.buffer_from_host.buffer_header.cmd = 0; +- m.u.buffer_from_host.buffer_header.data = +- (u32)(unsigned long)buf->buffer; ++ if (port->zero_copy) { ++ m.u.buffer_from_host.buffer_header.data = buf->vc_handle; ++ } else { ++ m.u.buffer_from_host.buffer_header.data = ++ (u32)(unsigned long)buf->buffer; ++ } ++ + m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; + if (port->type == MMAL_PORT_TYPE_OUTPUT) { + m.u.buffer_from_host.buffer_header.length = 0; +@@ -590,6 +598,22 @@ static void buffer_to_host_cb(struct vch + + msg_context->u.bulk.status = msg->h.status; + ++ } else if (msg->u.buffer_from_host.is_zero_copy) { ++ /* ++ * Zero copy buffer, so nothing to do. ++ * Copy buffer info and make callback. ++ */ ++ msg_context->u.bulk.buffer_used = ++ msg->u.buffer_from_host.buffer_header.length; ++ msg_context->u.bulk.mmal_flags = ++ msg->u.buffer_from_host.buffer_header.flags; ++ msg_context->u.bulk.dts = ++ msg->u.buffer_from_host.buffer_header.dts; ++ msg_context->u.bulk.pts = ++ msg->u.buffer_from_host.buffer_header.pts; ++ msg_context->u.bulk.cmd = ++ msg->u.buffer_from_host.buffer_header.cmd; ++ + } else if (msg->u.buffer_from_host.buffer_header.length == 0) { + /* empty buffer */ + if (msg->u.buffer_from_host.buffer_header.flags & +@@ -1537,6 +1561,9 @@ int vchiq_mmal_port_parameter_set(struct + + mutex_unlock(&instance->vchiq_mutex); + ++ if (parameter == MMAL_PARAMETER_ZERO_COPY && !ret) ++ port->zero_copy = !!(*(bool *)value); ++ + return ret; + } + EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_set); +@@ -1705,6 +1732,31 @@ int vchiq_mmal_submit_buffer(struct vchi + unsigned long flags = 0; + int ret; + ++ /* ++ * We really want to do this in mmal_vchi_buffer_init but can't as ++ * videobuf2 won't let us have the dmabuf there. ++ */ ++ if (port->zero_copy && buffer->dma_buf && !buffer->vcsm_handle) { ++ pr_debug("%s: import dmabuf %p\n", __func__, buffer->dma_buf); ++ ret = vc_sm_cma_import_dmabuf(buffer->dma_buf, ++ &buffer->vcsm_handle); ++ if (ret) { ++ pr_err("%s: vc_sm_import_dmabuf_fd failed, ret %d\n", ++ __func__, ret); ++ return ret; ++ } ++ ++ buffer->vc_handle = vc_sm_cma_int_handle(buffer->vcsm_handle); ++ if (!buffer->vc_handle) { ++ pr_err("%s: vc_sm_int_handle failed %d\n", ++ __func__, ret); ++ vc_sm_cma_free(buffer->vcsm_handle); ++ return ret; ++ } ++ pr_debug("%s: import dmabuf %p - got vc handle %08X\n", ++ __func__, buffer->dma_buf, buffer->vc_handle); ++ } ++ + ret = buffer_from_host(instance, port, buffer); + if (ret == -EINVAL) { + /* Port is disabled. Queue for when it is enabled. */ +@@ -1738,6 +1790,16 @@ int mmal_vchi_buffer_cleanup(struct mmal + release_msg_context(msg_context); + buf->msg_context = NULL; + ++ if (buf->vcsm_handle) { ++ int ret; ++ ++ pr_debug("%s: vc_sm_cma_free on handle %08X\n", __func__, ++ buf->vcsm_handle); ++ ret = vc_sm_cma_free(buf->vcsm_handle); ++ if (ret) ++ pr_err("%s: vcsm_free failed, ret %d\n", __func__, ret); ++ buf->vcsm_handle = 0; ++ } + return 0; + } + EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -49,6 +49,7 @@ typedef void (*vchiq_mmal_buffer_cb)( + + struct vchiq_mmal_port { + u32 enabled:1; ++ u32 zero_copy:1; + u32 handle; + u32 type; /* port type, cached to use on port info set */ + u32 index; /* port index, cached to use on port info set */ diff --git a/target/linux/brcm2708/patches-4.19/950-0278-media-videobuf2-Allow-exporting-of-a-struct-dmabuf.patch b/target/linux/brcm2708/patches-4.19/950-0278-media-videobuf2-Allow-exporting-of-a-struct-dmabuf.patch new file mode 100644 index 000000000..3972c0b6a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0278-media-videobuf2-Allow-exporting-of-a-struct-dmabuf.patch @@ -0,0 +1,83 @@ +From 2fada970d893db4a8800bae31d6ed8c01b4c4173 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 17:57:45 +0000 +Subject: [PATCH 278/703] media: videobuf2: Allow exporting of a struct dmabuf + +videobuf2 only allowed exporting a dmabuf as a file descriptor, +but there are instances where having the struct dma_buf is +useful within the kernel. + +Split the current implementation into two, one step which +exports a struct dma_buf, and the second which converts that +into an fd. + +Signed-off-by: Dave Stevenson +--- + .../media/common/videobuf2/videobuf2-core.c | 21 ++++++++++++++++--- + include/media/videobuf2-core.h | 15 +++++++++++++ + 2 files changed, 33 insertions(+), 3 deletions(-) + +--- a/drivers/media/common/videobuf2/videobuf2-core.c ++++ b/drivers/media/common/videobuf2/videobuf2-core.c +@@ -1847,12 +1847,12 @@ static int __find_plane_by_offset(struct + return -EINVAL; + } + +-int vb2_core_expbuf(struct vb2_queue *q, int *fd, unsigned int type, +- unsigned int index, unsigned int plane, unsigned int flags) ++int vb2_core_expbuf_dmabuf(struct vb2_queue *q, unsigned int type, ++ unsigned int index, unsigned int plane, ++ unsigned int flags, struct dma_buf **dmabuf) + { + struct vb2_buffer *vb = NULL; + struct vb2_plane *vb_plane; +- int ret; + struct dma_buf *dbuf; + + if (q->memory != VB2_MEMORY_MMAP) { +@@ -1902,6 +1902,21 @@ int vb2_core_expbuf(struct vb2_queue *q, + return -EINVAL; + } + ++ *dmabuf = dbuf; ++ return 0; ++} ++EXPORT_SYMBOL_GPL(vb2_core_expbuf_dmabuf); ++ ++int vb2_core_expbuf(struct vb2_queue *q, int *fd, unsigned int type, ++ unsigned int index, unsigned int plane, unsigned int flags) ++{ ++ struct dma_buf *dbuf; ++ int ret; ++ ++ ret = vb2_core_expbuf_dmabuf(q, type, index, plane, flags, &dbuf); ++ if (ret) ++ return ret; ++ + ret = dma_buf_fd(dbuf, flags & ~O_ACCMODE); + if (ret < 0) { + dprintk(3, "buffer %d, plane %d failed to export (%d)\n", +--- a/include/media/videobuf2-core.h ++++ b/include/media/videobuf2-core.h +@@ -825,6 +825,21 @@ int vb2_core_streamon(struct vb2_queue * + int vb2_core_streamoff(struct vb2_queue *q, unsigned int type); + + /** ++ * vb2_core_expbuf_dmabuf() - Export a buffer as a dma_buf structure ++ * @q: videobuf2 queue ++ * @type: buffer type ++ * @index: id number of the buffer ++ * @plane: index of the plane to be exported, 0 for single plane queues ++ * @flags: flags for newly created file, currently only O_CLOEXEC is ++ * supported, refer to manual of open syscall for more details ++ * @dmabuf: Returns the dmabuf pointer ++ * ++ */ ++int vb2_core_expbuf_dmabuf(struct vb2_queue *q, unsigned int type, ++ unsigned int index, unsigned int plane, ++ unsigned int flags, struct dma_buf **dmabuf); ++ ++/** + * vb2_core_expbuf() - Export a buffer as a file descriptor. + * @q: pointer to &struct vb2_queue with videobuf2 queue. + * @fd: pointer to the file descriptor associated with DMABUF diff --git a/target/linux/brcm2708/patches-4.19/950-0279-staging-vc04_services-Add-a-V4L2-M2M-codec-driver.patch b/target/linux/brcm2708/patches-4.19/950-0279-staging-vc04_services-Add-a-V4L2-M2M-codec-driver.patch new file mode 100644 index 000000000..b1d53c61e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0279-staging-vc04_services-Add-a-V4L2-M2M-codec-driver.patch @@ -0,0 +1,2467 @@ +From ce40b5f18f770684fcfe2b02e5bd9a73f7716a8f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 25 Sep 2018 14:53:49 +0100 +Subject: [PATCH 279/703] staging: vc04_services: Add a V4L2 M2M codec driver + +This adds a V4L2 memory to memory device that wraps the MMAL +video decode and video_encode components for H264 and MJPEG encode +and decode, MPEG4, H263, and VP8 decode (and MPEG2 decode +if the appropriate licence has been purchased). + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/Kconfig | 1 + + drivers/staging/vc04_services/Makefile | 9 +- + .../vc04_services/bcm2835-codec/Kconfig | 11 + + .../vc04_services/bcm2835-codec/Makefile | 8 + + .../staging/vc04_services/bcm2835-codec/TODO | 24 + + .../bcm2835-codec/bcm2835-v4l2-codec.c | 2359 +++++++++++++++++ + 6 files changed, 2408 insertions(+), 4 deletions(-) + create mode 100644 drivers/staging/vc04_services/bcm2835-codec/Kconfig + create mode 100644 drivers/staging/vc04_services/bcm2835-codec/Makefile + create mode 100644 drivers/staging/vc04_services/bcm2835-codec/TODO + create mode 100644 drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c + +--- a/drivers/staging/vc04_services/Kconfig ++++ b/drivers/staging/vc04_services/Kconfig +@@ -23,6 +23,7 @@ source "drivers/staging/vc04_services/bc + source "drivers/staging/vc04_services/bcm2835-camera/Kconfig" + source "drivers/staging/vc04_services/vchiq-mmal/Kconfig" + source "drivers/staging/vc04_services/vc-sm-cma/Kconfig" ++source "drivers/staging/vc04_services/bcm2835-codec/Kconfig" + + endif + +--- a/drivers/staging/vc04_services/Makefile ++++ b/drivers/staging/vc04_services/Makefile +@@ -10,10 +10,11 @@ vchiq-objs := \ + interface/vchiq_arm/vchiq_util.o \ + interface/vchiq_arm/vchiq_connected.o \ + +-obj-$(CONFIG_SND_BCM2835) += bcm2835-audio/ +-obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-camera/ +-obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ +-obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma/ ++obj-$(CONFIG_SND_BCM2835) += bcm2835-audio/ ++obj-$(CONFIG_VIDEO_BCM2835) += bcm2835-camera/ ++obj-$(CONFIG_BCM2835_VCHIQ_MMAL) += vchiq-mmal/ ++obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma/ ++obj-$(CONFIG_VIDEO_CODEC_BCM2835) += bcm2835-codec/ + + ccflags-y += -Idrivers/staging/vc04_services -D__VCCOREVER__=0x04000000 + +--- /dev/null ++++ b/drivers/staging/vc04_services/bcm2835-codec/Kconfig +@@ -0,0 +1,11 @@ ++config VIDEO_CODEC_BCM2835 ++ tristate "BCM2835 Video codec support" ++ depends on MEDIA_SUPPORT ++ depends on VIDEO_V4L2 && (ARCH_BCM2835 || COMPILE_TEST) ++ select BCM2835_VCHIQ_MMAL ++ select VIDEOBUF2_DMA_CONTIG ++ select V4L2_MEM2MEM_DEV ++ help ++ Say Y here to enable the V4L2 video codecs for ++ Broadcom BCM2835 SoC. This operates over the VCHIQ interface ++ to a service running on VideoCore. +--- /dev/null ++++ b/drivers/staging/vc04_services/bcm2835-codec/Makefile +@@ -0,0 +1,8 @@ ++# SPDX-License-Identifier: GPL-2.0 ++bcm2835-codec-objs := bcm2835-v4l2-codec.o ++ ++obj-$(CONFIG_VIDEO_CODEC_BCM2835) += bcm2835-codec.o ++ ++ccflags-y += \ ++ -Idrivers/staging/vc04_services \ ++ -D__VCCOREVER__=0x04000000 +--- /dev/null ++++ b/drivers/staging/vc04_services/bcm2835-codec/TODO +@@ -0,0 +1,24 @@ ++1) Convert to be a platform driver. ++ ++Right now when the module probes, it tries to initialize VCHI and ++errors out if it wasn't ready yet. If bcm2835-v4l2 was built in, then ++VCHI generally isn't ready because it depends on both the firmware and ++mailbox drivers having already loaded. ++ ++We should have VCHI create a platform device once it's initialized, ++and have this driver bind to it, so that we automatically load the ++v4l2 module after VCHI loads. ++ ++2) Support SELECTION API to define crop region on the image for encode. ++ ++Particularly for resolutions that aren't a multiple of the macroblock ++size, the codec will report a resolution that is a multiple of the macroblock ++size (it has to have the memory to decode into), and then a different crop ++region within that buffer. ++The most common example is 1080P, where the buffer will be 1920x1088 with a ++crop region of 1920x1080. ++ ++3) Refactor so that the component creation is only on queue_setup, not open. ++ ++Fixes v4l2-compliance failure on trying to open 100 instances of the ++device. +\ No newline at end of file +--- /dev/null ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -0,0 +1,2359 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++/* ++ * A v4l2-mem2mem device that wraps the video codec MMAL component. ++ * ++ * Copyright 2018 Raspberry Pi (Trading) Ltd. ++ * Author: Dave Stevenson (dave.stevenson@raspberrypi.org) ++ * ++ * Loosely based on the vim2m virtual driver by Pawel Osciak ++ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. ++ * Pawel Osciak, ++ * Marek Szyprowski, ++ * ++ * Whilst this driver uses the v4l2_mem2mem framework, it does not need the ++ * scheduling aspects, so will always take the buffers, pass them to the VPU, ++ * and then signal the job as complete. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vchiq-mmal/mmal-encodings.h" ++#include "vchiq-mmal/mmal-msg.h" ++#include "vchiq-mmal/mmal-parameters.h" ++#include "vchiq-mmal/mmal-vchiq.h" ++ ++/* ++ * Default /dev/videoN node numbers for decode and encode. ++ * Deliberately avoid the very low numbers as these are often taken by webcams ++ * etc, and simple apps tend to only go for /dev/video0. ++ */ ++static int decode_video_nr = 10; ++module_param(decode_video_nr, int, 0644); ++MODULE_PARM_DESC(decode_video_nr, "decoder video device number"); ++ ++static int encode_video_nr = 11; ++module_param(encode_video_nr, int, 0644); ++MODULE_PARM_DESC(encode_video_nr, "encoder video device number"); ++ ++static unsigned int debug; ++module_param(debug, uint, 0644); ++MODULE_PARM_DESC(debug, "activates debug info (0-3)"); ++ ++#define MIN_W 32 ++#define MIN_H 32 ++#define MAX_W 1920 ++#define MAX_H 1088 ++#define BPL_ALIGN 32 ++#define DEFAULT_WIDTH 640 ++#define DEFAULT_HEIGHT 480 ++/* ++ * The unanswered question - what is the maximum size of a compressed frame? ++ * V4L2 mandates that the encoded frame must fit in a single buffer. Sizing ++ * that buffer is a compromise between wasting memory and risking not fitting. ++ * The 1080P version of Big Buck Bunny has some frames that exceed 512kB. ++ * Adopt a moderately arbitrary split at 720P for switching between 512 and ++ * 768kB buffers. ++ */ ++#define DEF_COMP_BUF_SIZE_GREATER_720P (768 << 10) ++#define DEF_COMP_BUF_SIZE_720P_OR_LESS (512 << 10) ++ ++/* Flags that indicate a format can be used for capture/output */ ++#define MEM2MEM_CAPTURE BIT(0) ++#define MEM2MEM_OUTPUT BIT(1) ++ ++#define MEM2MEM_NAME "bcm2835-codec" ++ ++struct bcm2835_codec_fmt { ++ u32 fourcc; ++ int depth; ++ int bytesperline_align; ++ u32 flags; ++ u32 mmal_fmt; ++ bool decode_only; ++ bool encode_only; ++ int size_multiplier_x2; ++}; ++ ++/* Supported raw pixel formats. Those supported for both encode and decode ++ * must come first, with those only supported for decode coming after (there ++ * are no formats supported for encode only). ++ */ ++static struct bcm2835_codec_fmt raw_formats[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_YUV420, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_I420, ++ .size_multiplier_x2 = 3, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YVU420, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_YV12, ++ .size_multiplier_x2 = 3, ++ }, { ++ .fourcc = V4L2_PIX_FMT_NV12, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_NV12, ++ .size_multiplier_x2 = 3, ++ }, { ++ .fourcc = V4L2_PIX_FMT_NV21, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_NV21, ++ .size_multiplier_x2 = 3, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB565, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_RGB16, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YUYV, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_YUYV, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_UYVY, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_UYVY, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_YVYU, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_YVYU, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_VYUY, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_VYUY, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_RGB24, ++ .depth = 24, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_RGB24, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_BGR24, ++ .depth = 24, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BGR24, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_BGR32, ++ .depth = 32, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BGRA, ++ .encode_only = true, ++ .size_multiplier_x2 = 2, ++ }, ++}; ++ ++/* Supported encoded formats. Those supported for both encode and decode ++ * must come first, with those only supported for decode coming after (there ++ * are no formats supported for encode only). ++ */ ++static struct bcm2835_codec_fmt encoded_formats[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_H264, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_H264, ++ }, { ++ .fourcc = V4L2_PIX_FMT_MJPEG, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_MJPEG, ++ }, { ++ .fourcc = V4L2_PIX_FMT_MPEG4, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_MP4V, ++ .decode_only = true, ++ }, { ++ .fourcc = V4L2_PIX_FMT_H263, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_H263, ++ .decode_only = true, ++ }, { ++ .fourcc = V4L2_PIX_FMT_MPEG2, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_MP2V, ++ .decode_only = true, ++ }, { ++ .fourcc = V4L2_PIX_FMT_VP8, ++ .depth = 0, ++ .flags = V4L2_FMT_FLAG_COMPRESSED, ++ .mmal_fmt = MMAL_ENCODING_VP8, ++ .decode_only = true, ++ }, ++ /* ++ * This list couold include VP6 and Theorafor decode, but V4L2 doesn't ++ * support them. ++ */ ++}; ++ ++struct bcm2835_codec_fmt_list { ++ struct bcm2835_codec_fmt *list; ++ unsigned int num_entries; ++}; ++ ++#define RAW_LIST 0 ++#define ENCODED_LIST 1 ++ ++struct bcm2835_codec_fmt_list formats[] = { ++ { ++ .list = raw_formats, ++ .num_entries = ARRAY_SIZE(raw_formats), ++ }, { ++ .list = encoded_formats, ++ .num_entries = ARRAY_SIZE(encoded_formats), ++ }, ++}; ++ ++struct m2m_mmal_buffer { ++ struct v4l2_m2m_buffer m2m; ++ struct mmal_buffer mmal; ++}; ++ ++/* Per-queue, driver-specific private data */ ++struct bcm2835_codec_q_data { ++ /* ++ * These parameters should be treated as gospel, with everything else ++ * being determined from them. ++ */ ++ /* Buffer width/height */ ++ unsigned int bytesperline; ++ unsigned int height; ++ /* Crop size used for selection handling */ ++ unsigned int crop_width; ++ unsigned int crop_height; ++ bool selection_set; ++ ++ unsigned int sizeimage; ++ unsigned int sequence; ++ struct bcm2835_codec_fmt *fmt; ++ ++ /* One extra buffer header so we can send an EOS. */ ++ struct m2m_mmal_buffer eos_buffer; ++ bool eos_buffer_in_use; /* debug only */ ++}; ++ ++enum { ++ V4L2_M2M_SRC = 0, ++ V4L2_M2M_DST = 1, ++}; ++ ++static inline struct bcm2835_codec_fmt_list *get_format_list(bool decode, ++ bool capture) ++{ ++ return decode ^ capture ? &formats[ENCODED_LIST] : &formats[RAW_LIST]; ++} ++ ++static struct bcm2835_codec_fmt *get_default_format(bool decode, bool capture) ++{ ++ return &get_format_list(decode, capture)->list[0]; ++} ++ ++static struct bcm2835_codec_fmt *find_format(struct v4l2_format *f, bool decode, ++ bool capture) ++{ ++ struct bcm2835_codec_fmt *fmt; ++ unsigned int k; ++ struct bcm2835_codec_fmt_list *fmts = get_format_list(decode, capture); ++ ++ for (k = 0; k < fmts->num_entries; k++) { ++ fmt = &fmts->list[k]; ++ if (fmt->fourcc == f->fmt.pix.pixelformat) ++ break; ++ } ++ ++ /* ++ * Some compressed formats are only supported for decoding, not ++ * encoding. ++ */ ++ if (!decode && fmts->list[k].decode_only) ++ return NULL; ++ ++ /* Some pixel formats are only supported for encoding, not decoding. */ ++ if (decode && fmts->list[k].encode_only) ++ return NULL; ++ ++ if (k == fmts->num_entries) ++ return NULL; ++ ++ return &fmts->list[k]; ++} ++ ++struct bcm2835_codec_dev { ++ struct platform_device *pdev; ++ ++ /* v4l2 devices */ ++ struct v4l2_device v4l2_dev; ++ struct video_device vfd; ++ /* mutex for the v4l2 device */ ++ struct mutex dev_mutex; ++ atomic_t num_inst; ++ ++ /* allocated mmal instance and components */ ++ bool decode; /* Is this instance a decoder? */ ++ struct vchiq_mmal_instance *instance; ++ ++ struct v4l2_m2m_dev *m2m_dev; ++}; ++ ++struct bcm2835_codec_ctx { ++ struct v4l2_fh fh; ++ struct bcm2835_codec_dev *dev; ++ ++ struct v4l2_ctrl_handler hdl; ++ ++ struct vchiq_mmal_component *component; ++ bool component_enabled; ++ ++ enum v4l2_colorspace colorspace; ++ enum v4l2_ycbcr_encoding ycbcr_enc; ++ enum v4l2_xfer_func xfer_func; ++ enum v4l2_quantization quant; ++ ++ /* Source and destination queue data */ ++ struct bcm2835_codec_q_data q_data[2]; ++ s32 bitrate; ++ ++ bool aborting; ++ int num_ip_buffers; ++ int num_op_buffers; ++ struct completion frame_cmplt; ++}; ++ ++struct bcm2835_codec_driver { ++ struct bcm2835_codec_dev *encode; ++ struct bcm2835_codec_dev *decode; ++}; ++ ++static inline struct bcm2835_codec_ctx *file2ctx(struct file *file) ++{ ++ return container_of(file->private_data, struct bcm2835_codec_ctx, fh); ++} ++ ++static struct bcm2835_codec_q_data *get_q_data(struct bcm2835_codec_ctx *ctx, ++ enum v4l2_buf_type type) ++{ ++ switch (type) { ++ case V4L2_BUF_TYPE_VIDEO_OUTPUT: ++ return &ctx->q_data[V4L2_M2M_SRC]; ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ return &ctx->q_data[V4L2_M2M_DST]; ++ default: ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Invalid queue type %u\n", ++ __func__, type); ++ break; ++ } ++ return NULL; ++} ++ ++static struct vchiq_mmal_port *get_port_data(struct bcm2835_codec_ctx *ctx, ++ enum v4l2_buf_type type) ++{ ++ if (!ctx->component) ++ return NULL; ++ ++ switch (type) { ++ case V4L2_BUF_TYPE_VIDEO_OUTPUT: ++ return &ctx->component->input[0]; ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ return &ctx->component->output[0]; ++ default: ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Invalid queue type %u\n", ++ __func__, type); ++ break; ++ } ++ return NULL; ++} ++ ++/* ++ * mem2mem callbacks ++ */ ++ ++/** ++ * job_ready() - check whether an instance is ready to be scheduled to run ++ */ ++static int job_ready(void *priv) ++{ ++ struct bcm2835_codec_ctx *ctx = priv; ++ ++ if (!v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) && ++ !v4l2_m2m_num_dst_bufs_ready(ctx->fh.m2m_ctx)) ++ return 0; ++ ++ return 1; ++} ++ ++static void job_abort(void *priv) ++{ ++ struct bcm2835_codec_ctx *ctx = priv; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s\n", __func__); ++ /* Will cancel the transaction in the next interrupt handler */ ++ ctx->aborting = 1; ++} ++ ++static inline unsigned int get_sizeimage(int bpl, int height, ++ struct bcm2835_codec_fmt *fmt) ++{ ++ return (bpl * height * fmt->size_multiplier_x2) >> 1; ++} ++ ++static inline unsigned int get_bytesperline(int width, ++ struct bcm2835_codec_fmt *fmt) ++{ ++ return ALIGN((width * fmt->depth) >> 3, fmt->bytesperline_align); ++} ++ ++static void setup_mmal_port_format(struct bcm2835_codec_ctx *ctx, ++ bool decode, ++ struct bcm2835_codec_q_data *q_data, ++ struct vchiq_mmal_port *port) ++{ ++ port->format.encoding = q_data->fmt->mmal_fmt; ++ ++ if (!(q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED)) { ++ /* Raw image format - set width/height */ ++ port->es.video.width = q_data->bytesperline / ++ (q_data->fmt->depth >> 3); ++ port->es.video.height = q_data->height; ++ port->es.video.crop.width = q_data->crop_width; ++ port->es.video.crop.height = q_data->crop_height; ++ port->es.video.frame_rate.num = 0; ++ port->es.video.frame_rate.den = 1; ++ } else { ++ /* Compressed format - leave resolution as 0 for decode */ ++ if (decode) { ++ port->es.video.width = 0; ++ port->es.video.height = 0; ++ port->es.video.crop.width = 0; ++ port->es.video.crop.height = 0; ++ } else { ++ port->es.video.width = q_data->crop_width; ++ port->es.video.height = q_data->height; ++ port->es.video.crop.width = q_data->crop_width; ++ port->es.video.crop.height = q_data->crop_height; ++ port->format.bitrate = ctx->bitrate; ++ } ++ port->es.video.frame_rate.num = 0; ++ port->es.video.frame_rate.den = 1; ++ } ++ port->es.video.crop.x = 0; ++ port->es.video.crop.y = 0; ++ ++ port->current_buffer.size = q_data->sizeimage; ++}; ++ ++static void ip_buffer_cb(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, int status, ++ struct mmal_buffer *mmal_buf) ++{ ++ struct bcm2835_codec_ctx *ctx = port->cb_ctx/*, *curr_ctx*/; ++ struct m2m_mmal_buffer *buf = ++ container_of(mmal_buf, struct m2m_mmal_buffer, mmal); ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: port %p buf %p length %lu, flags %x\n", ++ __func__, port, mmal_buf, mmal_buf->length, ++ mmal_buf->mmal_flags); ++ ++ if (buf == &ctx->q_data[V4L2_M2M_SRC].eos_buffer) { ++ /* Do we need to add lcoking to prevent multiple submission of ++ * the EOS, and therefore handle mutliple return here? ++ */ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: eos buffer returned.\n", ++ __func__); ++ ctx->q_data[V4L2_M2M_SRC].eos_buffer_in_use = false; ++ return; ++ } ++ ++ if (status) { ++ /* error in transfer */ ++ if (buf) ++ /* there was a buffer with the error so return it */ ++ vb2_buffer_done(&buf->m2m.vb.vb2_buf, ++ VB2_BUF_STATE_ERROR); ++ return; ++ } ++ if (mmal_buf->cmd) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Not expecting cmd msgs on ip callback - %08x\n", ++ __func__, mmal_buf->cmd); ++ /* ++ * CHECKME: Should we return here. The buffer shouldn't have a ++ * message context or vb2 buf associated. ++ */ ++ } ++ ++ v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: no error. Return buffer %p\n", ++ __func__, &buf->m2m.vb.vb2_buf); ++ vb2_buffer_done(&buf->m2m.vb.vb2_buf, VB2_BUF_STATE_DONE); ++ ++ ctx->num_ip_buffers++; ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: done %d input buffers\n", ++ __func__, ctx->num_ip_buffers); ++ ++ if (!port->enabled) ++ complete(&ctx->frame_cmplt); ++} ++ ++static void queue_res_chg_event(struct bcm2835_codec_ctx *ctx) ++{ ++ static const struct v4l2_event ev_src_ch = { ++ .type = V4L2_EVENT_SOURCE_CHANGE, ++ .u.src_change.changes = ++ V4L2_EVENT_SRC_CH_RESOLUTION, ++ }; ++ ++ v4l2_event_queue_fh(&ctx->fh, &ev_src_ch); ++} ++ ++static void send_eos_event(struct bcm2835_codec_ctx *ctx) ++{ ++ static const struct v4l2_event ev = { ++ .type = V4L2_EVENT_EOS, ++ }; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Sending EOS event\n"); ++ ++ v4l2_event_queue_fh(&ctx->fh, &ev); ++} ++ ++static void color_mmal2v4l(struct bcm2835_codec_ctx *ctx, u32 mmal_color_space) ++{ ++ switch (mmal_color_space) { ++ case MMAL_COLOR_SPACE_ITUR_BT601: ++ ctx->colorspace = V4L2_COLORSPACE_REC709; ++ ctx->xfer_func = V4L2_XFER_FUNC_709; ++ ctx->ycbcr_enc = V4L2_YCBCR_ENC_601; ++ ctx->quant = V4L2_QUANTIZATION_LIM_RANGE; ++ break; ++ ++ case MMAL_COLOR_SPACE_ITUR_BT709: ++ ctx->colorspace = V4L2_COLORSPACE_REC709; ++ ctx->xfer_func = V4L2_XFER_FUNC_709; ++ ctx->ycbcr_enc = V4L2_YCBCR_ENC_709; ++ ctx->quant = V4L2_QUANTIZATION_LIM_RANGE; ++ break; ++ } ++} ++ ++static void handle_fmt_changed(struct bcm2835_codec_ctx *ctx, ++ struct mmal_buffer *mmal_buf) ++{ ++ struct bcm2835_codec_q_data *q_data; ++ struct mmal_msg_event_format_changed *format = ++ (struct mmal_msg_event_format_changed *)mmal_buf->buffer; ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: Format changed: buff size min %u, rec %u, buff num min %u, rec %u\n", ++ __func__, ++ format->buffer_size_min, ++ format->buffer_size_recommended, ++ format->buffer_num_min, ++ format->buffer_num_recommended ++ ); ++ if (format->format.type != MMAL_ES_TYPE_VIDEO) { ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: Format changed but not video %u\n", ++ __func__, format->format.type); ++ return; ++ } ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: Format changed to %ux%u, crop %ux%u, colourspace %08X\n", ++ __func__, format->es.video.width, format->es.video.height, ++ format->es.video.crop.width, format->es.video.crop.height, ++ format->es.video.color_space); ++ ++ q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); ++ q_data->crop_width = format->es.video.crop.width; ++ q_data->crop_height = format->es.video.crop.height; ++ q_data->bytesperline = format->es.video.crop.width; ++ q_data->height = format->es.video.height; ++ q_data->sizeimage = format->buffer_size_min; ++ if (format->es.video.color_space) ++ color_mmal2v4l(ctx, format->es.video.color_space); ++ ++ queue_res_chg_event(ctx); ++} ++ ++static void op_buffer_cb(struct vchiq_mmal_instance *instance, ++ struct vchiq_mmal_port *port, int status, ++ struct mmal_buffer *mmal_buf) ++{ ++ struct bcm2835_codec_ctx *ctx = port->cb_ctx; ++ struct m2m_mmal_buffer *buf; ++ struct vb2_v4l2_buffer *vb2; ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, ++ "%s: status:%d, buf:%p, length:%lu, flags %u, pts %lld\n", ++ __func__, status, mmal_buf, mmal_buf->length, ++ mmal_buf->mmal_flags, mmal_buf->pts); ++ ++ if (status) { ++ /* error in transfer */ ++ if (vb2) { ++ /* there was a buffer with the error so return it */ ++ vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_ERROR); ++ } ++ return; ++ } ++ ++ if (mmal_buf->cmd) { ++ switch (mmal_buf->cmd) { ++ case MMAL_EVENT_FORMAT_CHANGED: ++ { ++ handle_fmt_changed(ctx, mmal_buf); ++ break; ++ } ++ default: ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Unexpected event on output callback - %08x\n", ++ __func__, mmal_buf->cmd); ++ break; ++ } ++ return; ++ } ++ ++ buf = container_of(mmal_buf, struct m2m_mmal_buffer, mmal); ++ vb2 = &buf->m2m.vb; ++ ++ v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: length %lu, flags %x, idx %u\n", ++ __func__, mmal_buf->length, mmal_buf->mmal_flags, ++ vb2->vb2_buf.index); ++ ++ if (mmal_buf->length == 0) { ++ /* stream ended, or buffer being returned during disable. */ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: Empty buffer - flags %04x", ++ __func__, mmal_buf->mmal_flags); ++ if (!mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS) { ++ vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_ERROR); ++ if (!port->enabled) ++ complete(&ctx->frame_cmplt); ++ return; ++ } ++ } ++ if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS) { ++ /* EOS packet from the VPU */ ++ send_eos_event(ctx); ++ vb2->flags |= V4L2_BUF_FLAG_LAST; ++ } ++ ++ vb2->vb2_buf.timestamp = mmal_buf->pts; ++ ++ vb2_set_plane_payload(&vb2->vb2_buf, 0, mmal_buf->length); ++ if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) ++ vb2->flags |= V4L2_BUF_FLAG_KEYFRAME; ++ ++ vb2_buffer_done(&vb2->vb2_buf, VB2_BUF_STATE_DONE); ++ ctx->num_op_buffers++; ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: done %d output buffers\n", ++ __func__, ctx->num_op_buffers); ++ ++ if (!port->enabled) ++ complete(&ctx->frame_cmplt); ++} ++ ++/* vb2_to_mmal_buffer() - converts vb2 buffer header to MMAL ++ * ++ * Copies all the required fields from a VB2 buffer to the MMAL buffer header, ++ * ready for sending to the VPU. ++ */ ++static void vb2_to_mmal_buffer(struct m2m_mmal_buffer *buf, ++ struct vb2_v4l2_buffer *vb2) ++{ ++ buf->mmal.mmal_flags = 0; ++ if (vb2->flags & V4L2_BUF_FLAG_KEYFRAME) ++ buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_KEYFRAME; ++ ++ /* ++ * Adding this means that the data must be framed correctly as one frame ++ * per buffer. The underlying decoder has no such requirement, but it ++ * will reduce latency as the bistream parser will be kicked immediately ++ * to parse the frame, rather than relying on its own heuristics for ++ * when to wake up. ++ */ ++ buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_FRAME_END; ++ ++ buf->mmal.length = vb2->vb2_buf.planes[0].bytesused; ++ /* ++ * Minor ambiguity in the V4L2 spec as to whether passing in a 0 length ++ * buffer, or one with V4L2_BUF_FLAG_LAST set denotes end of stream. ++ * Handle either. ++ */ ++ if (!buf->mmal.length || vb2->flags & V4L2_BUF_FLAG_LAST) ++ buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_EOS; ++ ++ buf->mmal.pts = vb2->vb2_buf.timestamp; ++ buf->mmal.dts = MMAL_TIME_UNKNOWN; ++} ++ ++/* device_run() - prepares and starts the device ++ * ++ * This simulates all the immediate preparations required before starting ++ * a device. This will be called by the framework when it decides to schedule ++ * a particular instance. ++ */ ++static void device_run(void *priv) ++{ ++ struct bcm2835_codec_ctx *ctx = priv; ++ struct bcm2835_codec_dev *dev = ctx->dev; ++ struct vb2_v4l2_buffer *src_buf, *dst_buf; ++ struct m2m_mmal_buffer *src_m2m_buf, *dst_m2m_buf; ++ struct v4l2_m2m_buffer *m2m; ++ int ret; ++ ++ v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: off we go\n", __func__); ++ ++ src_buf = v4l2_m2m_buf_remove(&ctx->fh.m2m_ctx->out_q_ctx); ++ if (src_buf) { ++ m2m = container_of(src_buf, struct v4l2_m2m_buffer, vb); ++ src_m2m_buf = container_of(m2m, struct m2m_mmal_buffer, m2m); ++ vb2_to_mmal_buffer(src_m2m_buf, src_buf); ++ ++ ret = vchiq_mmal_submit_buffer(dev->instance, ++ &ctx->component->input[0], ++ &src_m2m_buf->mmal); ++ v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: Submitted ip buffer len %lu, pts %llu, flags %04x\n", ++ __func__, src_m2m_buf->mmal.length, ++ src_m2m_buf->mmal.pts, src_m2m_buf->mmal.mmal_flags); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed submitting ip buffer\n", ++ __func__); ++ } ++ ++ dst_buf = v4l2_m2m_buf_remove(&ctx->fh.m2m_ctx->cap_q_ctx); ++ if (dst_buf) { ++ m2m = container_of(dst_buf, struct v4l2_m2m_buffer, vb); ++ dst_m2m_buf = container_of(m2m, struct m2m_mmal_buffer, m2m); ++ vb2_to_mmal_buffer(dst_m2m_buf, dst_buf); ++ ++ ret = vchiq_mmal_submit_buffer(dev->instance, ++ &ctx->component->output[0], ++ &dst_m2m_buf->mmal); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed submitting op buffer\n", ++ __func__); ++ } ++ ++ v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: Submitted src %p, dst %p\n", ++ __func__, src_m2m_buf, dst_m2m_buf); ++ ++ /* Complete the job here. */ ++ v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx); ++} ++ ++/* ++ * video ioctls ++ */ ++static int vidioc_querycap(struct file *file, void *priv, ++ struct v4l2_capability *cap) ++{ ++ strncpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver) - 1); ++ strncpy(cap->card, MEM2MEM_NAME, sizeof(cap->card) - 1); ++ snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s", ++ MEM2MEM_NAME); ++ cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING; ++ cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; ++ return 0; ++} ++ ++static int enum_fmt(struct v4l2_fmtdesc *f, bool decode, bool capture) ++{ ++ struct bcm2835_codec_fmt *fmt; ++ struct bcm2835_codec_fmt_list *fmts = get_format_list(decode, capture); ++ ++ if (f->index < fmts->num_entries) { ++ /* Format found */ ++ /* Check format isn't a decode only format when encoding */ ++ if (!decode && ++ fmts->list[f->index].decode_only) ++ return -EINVAL; ++ /* Check format isn't a decode only format when encoding */ ++ if (decode && ++ fmts->list[f->index].encode_only) ++ return -EINVAL; ++ ++ fmt = &fmts->list[f->index]; ++ f->pixelformat = fmt->fourcc; ++ f->flags = fmt->flags; ++ return 0; ++ } ++ ++ /* Format not found */ ++ return -EINVAL; ++} ++ ++static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_fmtdesc *f) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ return enum_fmt(f, ctx->dev->decode, true); ++} ++ ++static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, ++ struct v4l2_fmtdesc *f) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ return enum_fmt(f, ctx->dev->decode, false); ++} ++ ++static int vidioc_g_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f) ++{ ++ struct vb2_queue *vq; ++ struct bcm2835_codec_q_data *q_data; ++ ++ vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); ++ if (!vq) ++ return -EINVAL; ++ ++ q_data = get_q_data(ctx, f->type); ++ ++ f->fmt.pix.width = q_data->crop_width; ++ f->fmt.pix.height = q_data->height; ++ f->fmt.pix.field = V4L2_FIELD_NONE; ++ f->fmt.pix.pixelformat = q_data->fmt->fourcc; ++ f->fmt.pix.bytesperline = q_data->bytesperline; ++ f->fmt.pix.sizeimage = q_data->sizeimage; ++ f->fmt.pix.colorspace = ctx->colorspace; ++ f->fmt.pix.xfer_func = ctx->xfer_func; ++ f->fmt.pix.ycbcr_enc = ctx->ycbcr_enc; ++ f->fmt.pix.quantization = ctx->quant; ++ ++ return 0; ++} ++ ++static int vidioc_g_fmt_vid_out(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ return vidioc_g_fmt(file2ctx(file), f); ++} ++ ++static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ return vidioc_g_fmt(file2ctx(file), f); ++} ++ ++static int vidioc_try_fmt(struct v4l2_format *f, struct bcm2835_codec_fmt *fmt) ++{ ++ /* ++ * The V4L2 specification requires the driver to correct the format ++ * struct if any of the dimensions is unsupported ++ */ ++ if (f->fmt.pix.width > MAX_W) ++ f->fmt.pix.width = MAX_W; ++ if (f->fmt.pix.height > MAX_H) ++ f->fmt.pix.height = MAX_H; ++ ++ if (!fmt->flags & V4L2_FMT_FLAG_COMPRESSED) { ++ /* Only clip min w/h on capture. Treat 0x0 as unknown. */ ++ if (f->fmt.pix.width < MIN_W) ++ f->fmt.pix.width = MIN_W; ++ if (f->fmt.pix.height < MIN_H) ++ f->fmt.pix.height = MIN_H; ++ ++ /* ++ * Buffer must have a vertical alignment of 16 lines. ++ * The selection will reflect any cropping rectangle when only ++ * some of the pixels are active. ++ */ ++ f->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); ++ ++ f->fmt.pix.bytesperline = get_bytesperline(f->fmt.pix.width, ++ fmt); ++ f->fmt.pix.sizeimage = get_sizeimage(f->fmt.pix.bytesperline, ++ f->fmt.pix.height, ++ fmt); ++ } else { ++ u32 min_size = f->fmt.pix.width > 1280 || ++ f->fmt.pix.height > 720 ? ++ DEF_COMP_BUF_SIZE_GREATER_720P : ++ DEF_COMP_BUF_SIZE_720P_OR_LESS; ++ ++ f->fmt.pix.bytesperline = 0; ++ if (f->fmt.pix.sizeimage < min_size) ++ f->fmt.pix.sizeimage = min_size; ++ } ++ ++ f->fmt.pix.field = V4L2_FIELD_NONE; ++ ++ return 0; ++} ++ ++static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ struct bcm2835_codec_fmt *fmt; ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ fmt = find_format(f, ctx->dev->decode, true); ++ if (!fmt) { ++ f->fmt.pix.pixelformat = get_default_format(ctx->dev->decode, ++ true)->fourcc; ++ fmt = find_format(f, ctx->dev->decode, true); ++ } ++ ++ return vidioc_try_fmt(f, fmt); ++} ++ ++static int vidioc_try_fmt_vid_out(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ struct bcm2835_codec_fmt *fmt; ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ fmt = find_format(f, ctx->dev->decode, false); ++ if (!fmt) { ++ f->fmt.pix.pixelformat = get_default_format(ctx->dev->decode, ++ false)->fourcc; ++ fmt = find_format(f, ctx->dev->decode, false); ++ } ++ ++ if (!f->fmt.pix.colorspace) ++ f->fmt.pix.colorspace = ctx->colorspace; ++ ++ return vidioc_try_fmt(f, fmt); ++} ++ ++static int vidioc_s_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f, ++ unsigned int requested_height) ++{ ++ struct bcm2835_codec_q_data *q_data; ++ struct vb2_queue *vq; ++ struct vchiq_mmal_port *port; ++ bool update_capture_port = false; ++ int ret; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Setting format for type %d, wxh: %dx%d, fmt: %08x, size %u\n", ++ f->type, f->fmt.pix.width, f->fmt.pix.height, ++ f->fmt.pix.pixelformat, f->fmt.pix.sizeimage); ++ ++ vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); ++ if (!vq) ++ return -EINVAL; ++ ++ q_data = get_q_data(ctx, f->type); ++ if (!q_data) ++ return -EINVAL; ++ ++ if (vb2_is_busy(vq)) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__); ++ return -EBUSY; ++ } ++ ++ q_data->fmt = find_format(f, ctx->dev->decode, ++ f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE); ++ q_data->crop_width = f->fmt.pix.width; ++ q_data->height = f->fmt.pix.height; ++ if (!q_data->selection_set) ++ q_data->crop_height = requested_height; ++ ++ /* ++ * Copying the behaviour of vicodec which retains a single set of ++ * colorspace parameters for both input and output. ++ */ ++ ctx->colorspace = f->fmt.pix.colorspace; ++ ctx->xfer_func = f->fmt.pix.xfer_func; ++ ctx->ycbcr_enc = f->fmt.pix.ycbcr_enc; ++ ctx->quant = f->fmt.pix.quantization; ++ ++ /* All parameters should have been set correctly by try_fmt */ ++ q_data->bytesperline = f->fmt.pix.bytesperline; ++ q_data->sizeimage = f->fmt.pix.sizeimage; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Calulated bpl as %u, size %u\n", ++ q_data->bytesperline, q_data->sizeimage); ++ ++ if (ctx->dev->decode && q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED && ++ f->fmt.pix.width && f->fmt.pix.height) { ++ /* ++ * On the decoder, if provided with a resolution on the input ++ * side, then replicate that to the output side. ++ * GStreamer appears not to support V4L2_EVENT_SOURCE_CHANGE, ++ * nor set up a resolution on the output side, therefore ++ * we can't decode anything at a resolution other than the ++ * default one. ++ */ ++ struct bcm2835_codec_q_data *q_data_dst = ++ &ctx->q_data[V4L2_M2M_DST]; ++ ++ q_data_dst->crop_width = q_data->crop_width; ++ q_data_dst->crop_height = q_data->crop_height; ++ q_data_dst->height = ALIGN(q_data->crop_height, 16); ++ ++ q_data_dst->bytesperline = ++ get_bytesperline(f->fmt.pix.width, q_data_dst->fmt); ++ q_data_dst->sizeimage = get_sizeimage(q_data_dst->bytesperline, ++ q_data_dst->height, ++ q_data_dst->fmt); ++ update_capture_port = true; ++ } ++ ++ /* If we have a component then setup the port as well */ ++ port = get_port_data(ctx, vq->type); ++ if (!port) ++ return 0; ++ ++ setup_mmal_port_format(ctx, ctx->dev->decode, q_data, port); ++ ret = vchiq_mmal_port_set_format(ctx->dev->instance, port); ++ if (ret) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed vchiq_mmal_port_set_format on port, ret %d\n", ++ __func__, ret); ++ ret = -EINVAL; ++ } ++ ++ if (q_data->sizeimage < port->minimum_buffer.size) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Current buffer size of %u < min buf size %u - driver mismatch to MMAL\n", ++ __func__, q_data->sizeimage, ++ port->minimum_buffer.size); ++ } ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Set format for type %d, wxh: %dx%d, fmt: %08x, size %u\n", ++ f->type, q_data->crop_width, q_data->height, ++ q_data->fmt->fourcc, q_data->sizeimage); ++ ++ if (update_capture_port) { ++ struct vchiq_mmal_port *port_dst = &ctx->component->output[0]; ++ struct bcm2835_codec_q_data *q_data_dst = ++ &ctx->q_data[V4L2_M2M_DST]; ++ ++ setup_mmal_port_format(ctx, ctx->dev->decode, q_data_dst, ++ port_dst); ++ ret = vchiq_mmal_port_set_format(ctx->dev->instance, port_dst); ++ if (ret) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed vchiq_mmal_port_set_format on output port, ret %d\n", ++ __func__, ret); ++ ret = -EINVAL; ++ } ++ } ++ return ret; ++} ++ ++static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ unsigned int height = f->fmt.pix.height; ++ int ret; ++ ++ ret = vidioc_try_fmt_vid_cap(file, priv, f); ++ if (ret) ++ return ret; ++ ++ return vidioc_s_fmt(file2ctx(file), f, height); ++} ++ ++static int vidioc_s_fmt_vid_out(struct file *file, void *priv, ++ struct v4l2_format *f) ++{ ++ unsigned int height = f->fmt.pix.height; ++ int ret; ++ ++ ret = vidioc_try_fmt_vid_out(file, priv, f); ++ if (ret) ++ return ret; ++ ++ ret = vidioc_s_fmt(file2ctx(file), f, height); ++ return ret; ++} ++ ++static int vidioc_g_selection(struct file *file, void *priv, ++ struct v4l2_selection *s) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ struct bcm2835_codec_q_data *q_data; ++ bool capture_queue = s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE ? ++ true : false; ++ ++ if (capture_queue ^ ctx->dev->decode) ++ /* OUTPUT on decoder and CAPTURE on encoder are not valid. */ ++ return -EINVAL; ++ ++ q_data = get_q_data(ctx, s->type); ++ if (!q_data) ++ return -EINVAL; ++ ++ if (ctx->dev->decode) { ++ switch (s->target) { ++ case V4L2_SEL_TGT_COMPOSE_DEFAULT: ++ case V4L2_SEL_TGT_COMPOSE: ++ s->r.left = 0; ++ s->r.top = 0; ++ s->r.width = q_data->crop_width; ++ s->r.height = q_data->crop_height; ++ break; ++ case V4L2_SEL_TGT_COMPOSE_BOUNDS: ++ s->r.left = 0; ++ s->r.top = 0; ++ s->r.width = q_data->crop_width; ++ s->r.height = q_data->crop_height; ++ break; ++ default: ++ return -EINVAL; ++ } ++ } else { ++ switch (s->target) { ++ case V4L2_SEL_TGT_CROP_DEFAULT: ++ case V4L2_SEL_TGT_CROP_BOUNDS: ++ s->r.top = 0; ++ s->r.left = 0; ++ s->r.width = q_data->bytesperline; ++ s->r.height = q_data->height; ++ break; ++ case V4L2_SEL_TGT_CROP: ++ s->r.top = 0; ++ s->r.left = 0; ++ s->r.width = q_data->crop_width; ++ s->r.height = q_data->crop_height; ++ break; ++ default: ++ return -EINVAL; ++ } ++ } ++ ++ return 0; ++} ++ ++static int vidioc_s_selection(struct file *file, void *priv, ++ struct v4l2_selection *s) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ struct bcm2835_codec_q_data *q_data = NULL; ++ bool capture_queue = s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE ? ++ true : false; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: ctx %p, type %d, q_data %p, target %d, rect x/y %d/%d, w/h %ux%u\n", ++ __func__, ctx, s->type, q_data, s->target, s->r.left, s->r.top, ++ s->r.width, s->r.height); ++ ++ if (capture_queue ^ ctx->dev->decode) ++ /* OUTPUT on decoder and CAPTURE on encoder are not valid. */ ++ return -EINVAL; ++ ++ q_data = get_q_data(ctx, s->type); ++ if (!q_data) ++ return -EINVAL; ++ ++ if (ctx->dev->decode) { ++ switch (s->target) { ++ case V4L2_SEL_TGT_COMPOSE: ++ /* Accept cropped image */ ++ s->r.left = 0; ++ s->r.top = 0; ++ s->r.width = min(s->r.width, q_data->crop_width); ++ s->r.height = min(s->r.height, q_data->height); ++ q_data->crop_width = s->r.width; ++ q_data->crop_height = s->r.height; ++ q_data->selection_set = true; ++ break; ++ default: ++ return -EINVAL; ++ } ++ } else { ++ switch (s->target) { ++ case V4L2_SEL_TGT_CROP: ++ /* Only support crop from (0,0) */ ++ s->r.top = 0; ++ s->r.left = 0; ++ s->r.width = min(s->r.width, q_data->crop_width); ++ s->r.height = min(s->r.height, q_data->crop_height); ++ q_data->crop_width = s->r.width; ++ q_data->crop_height = s->r.height; ++ q_data->selection_set = true; ++ break; ++ default: ++ return -EINVAL; ++ } ++ } ++ ++ return 0; ++} ++ ++static int vidioc_subscribe_evt(struct v4l2_fh *fh, ++ const struct v4l2_event_subscription *sub) ++{ ++ switch (sub->type) { ++ case V4L2_EVENT_EOS: ++ return v4l2_event_subscribe(fh, sub, 2, NULL); ++ case V4L2_EVENT_SOURCE_CHANGE: ++ return v4l2_src_change_event_subscribe(fh, sub); ++ default: ++ return v4l2_ctrl_subscribe_event(fh, sub); ++ } ++} ++ ++static int bcm2835_codec_set_level_profile(struct bcm2835_codec_ctx *ctx, ++ struct v4l2_ctrl *ctrl) ++{ ++ struct mmal_parameter_video_profile param; ++ int param_size = sizeof(param); ++ int ret; ++ ++ /* ++ * Level and Profile are set via the same MMAL parameter. ++ * Retrieve the current settings and amend the one that has changed. ++ */ ++ ret = vchiq_mmal_port_parameter_get(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_PROFILE, ++ ¶m, ++ ¶m_size); ++ if (ret) ++ return ret; ++ ++ switch (ctrl->id) { ++ case V4L2_CID_MPEG_VIDEO_H264_PROFILE: ++ switch (ctrl->val) { ++ case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: ++ param.profile = MMAL_VIDEO_PROFILE_H264_BASELINE; ++ break; ++ case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE: ++ param.profile = ++ MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE; ++ break; ++ case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: ++ param.profile = MMAL_VIDEO_PROFILE_H264_MAIN; ++ break; ++ case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: ++ param.profile = MMAL_VIDEO_PROFILE_H264_HIGH; ++ break; ++ default: ++ /* Should never get here */ ++ break; ++ } ++ break; ++ ++ case V4L2_CID_MPEG_VIDEO_H264_LEVEL: ++ switch (ctrl->val) { ++ case V4L2_MPEG_VIDEO_H264_LEVEL_1_0: ++ param.level = MMAL_VIDEO_LEVEL_H264_1; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_1B: ++ param.level = MMAL_VIDEO_LEVEL_H264_1b; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_1_1: ++ param.level = MMAL_VIDEO_LEVEL_H264_11; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_1_2: ++ param.level = MMAL_VIDEO_LEVEL_H264_12; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_1_3: ++ param.level = MMAL_VIDEO_LEVEL_H264_13; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_2_0: ++ param.level = MMAL_VIDEO_LEVEL_H264_2; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_2_1: ++ param.level = MMAL_VIDEO_LEVEL_H264_21; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_2_2: ++ param.level = MMAL_VIDEO_LEVEL_H264_22; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_3_0: ++ param.level = MMAL_VIDEO_LEVEL_H264_3; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: ++ param.level = MMAL_VIDEO_LEVEL_H264_31; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: ++ param.level = MMAL_VIDEO_LEVEL_H264_32; ++ break; ++ case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: ++ param.level = MMAL_VIDEO_LEVEL_H264_4; ++ break; ++ default: ++ /* Should never get here */ ++ break; ++ } ++ } ++ ret = vchiq_mmal_port_parameter_set(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_PROFILE, ++ ¶m, ++ param_size); ++ ++ return ret; ++} ++ ++static int bcm2835_codec_s_ctrl(struct v4l2_ctrl *ctrl) ++{ ++ struct bcm2835_codec_ctx *ctx = ++ container_of(ctrl->handler, struct bcm2835_codec_ctx, hdl); ++ int ret = 0; ++ ++ switch (ctrl->id) { ++ case V4L2_CID_MPEG_VIDEO_BITRATE: ++ ctx->bitrate = ctrl->val; ++ if (!ctx->component) ++ break; ++ ++ ret = vchiq_mmal_port_parameter_set(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_VIDEO_BIT_RATE, ++ &ctrl->val, ++ sizeof(ctrl->val)); ++ break; ++ ++ case V4L2_CID_MPEG_VIDEO_BITRATE_MODE: { ++ u32 bitrate_mode; ++ ++ if (!ctx->component) ++ break; ++ ++ switch (ctrl->val) { ++ default: ++ case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR: ++ bitrate_mode = MMAL_VIDEO_RATECONTROL_VARIABLE; ++ break; ++ case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR: ++ bitrate_mode = MMAL_VIDEO_RATECONTROL_CONSTANT; ++ break; ++ } ++ ++ ret = vchiq_mmal_port_parameter_set(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_RATECONTROL, ++ &bitrate_mode, ++ sizeof(bitrate_mode)); ++ break; ++ } ++ case V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER: ++ if (!ctx->component) ++ break; ++ ++ ret = vchiq_mmal_port_parameter_set(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER, ++ &ctrl->val, ++ sizeof(ctrl->val)); ++ break; ++ ++ case V4L2_CID_MPEG_VIDEO_H264_I_PERIOD: ++ if (!ctx->component) ++ break; ++ ++ ret = vchiq_mmal_port_parameter_set(ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_INTRAPERIOD, ++ &ctrl->val, ++ sizeof(ctrl->val)); ++ break; ++ ++ case V4L2_CID_MPEG_VIDEO_H264_PROFILE: ++ case V4L2_CID_MPEG_VIDEO_H264_LEVEL: ++ if (!ctx->component) ++ break; ++ ++ ret = bcm2835_codec_set_level_profile(ctx, ctrl); ++ break; ++ ++ default: ++ v4l2_err(&ctx->dev->v4l2_dev, "Invalid control\n"); ++ return -EINVAL; ++ } ++ ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "Failed setting ctrl %08x, ret %d\n", ++ ctrl->id, ret); ++ return ret ? -EINVAL : 0; ++} ++ ++static const struct v4l2_ctrl_ops bcm2835_codec_ctrl_ops = { ++ .s_ctrl = bcm2835_codec_s_ctrl, ++}; ++ ++static int vidioc_try_decoder_cmd(struct file *file, void *priv, ++ struct v4l2_decoder_cmd *cmd) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ if (!ctx->dev->decode) ++ return -EINVAL; ++ ++ switch (cmd->cmd) { ++ case V4L2_DEC_CMD_STOP: ++ if (cmd->flags & V4L2_DEC_CMD_STOP_TO_BLACK) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: DEC cmd->flags=%u stop to black not supported", ++ __func__, cmd->flags); ++ return -EINVAL; ++ } ++ break; ++ case V4L2_DEC_CMD_START: ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int vidioc_decoder_cmd(struct file *file, void *priv, ++ struct v4l2_decoder_cmd *cmd) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ struct bcm2835_codec_q_data *q_data = &ctx->q_data[V4L2_M2M_SRC]; ++ int ret; ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s, cmd %u", __func__, ++ cmd->cmd); ++ ret = vidioc_try_decoder_cmd(file, priv, cmd); ++ if (ret) ++ return ret; ++ ++ switch (cmd->cmd) { ++ case V4L2_DEC_CMD_STOP: ++ if (q_data->eos_buffer_in_use) ++ v4l2_err(&ctx->dev->v4l2_dev, "EOS buffers already in use\n"); ++ q_data->eos_buffer_in_use = true; ++ ++ q_data->eos_buffer.mmal.buffer_size = 0; ++ q_data->eos_buffer.mmal.length = 0; ++ q_data->eos_buffer.mmal.mmal_flags = ++ MMAL_BUFFER_HEADER_FLAG_EOS; ++ q_data->eos_buffer.mmal.pts = 0; ++ q_data->eos_buffer.mmal.dts = 0; ++ ++ if (!ctx->component) ++ break; ++ ++ ret = vchiq_mmal_submit_buffer(ctx->dev->instance, ++ &ctx->component->input[0], ++ &q_data->eos_buffer.mmal); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, ++ "%s: EOS buffer submit failed %d\n", ++ __func__, ret); ++ ++ break; ++ ++ case V4L2_DEC_CMD_START: ++ /* Do we need to do anything here? */ ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int vidioc_try_encoder_cmd(struct file *file, void *priv, ++ struct v4l2_encoder_cmd *cmd) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ if (ctx->dev->decode) ++ return -EINVAL; ++ ++ switch (cmd->cmd) { ++ case V4L2_ENC_CMD_STOP: ++ break; ++ ++ case V4L2_ENC_CMD_START: ++ /* Do we need to do anything here? */ ++ break; ++ default: ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++static int vidioc_encoder_cmd(struct file *file, void *priv, ++ struct v4l2_encoder_cmd *cmd) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ struct bcm2835_codec_q_data *q_data = &ctx->q_data[V4L2_M2M_SRC]; ++ int ret; ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s, cmd %u", __func__, ++ cmd->cmd); ++ ret = vidioc_try_encoder_cmd(file, priv, cmd); ++ if (ret) ++ return ret; ++ ++ switch (cmd->cmd) { ++ case V4L2_ENC_CMD_STOP: ++ if (q_data->eos_buffer_in_use) ++ v4l2_err(&ctx->dev->v4l2_dev, "EOS buffers already in use\n"); ++ q_data->eos_buffer_in_use = true; ++ ++ q_data->eos_buffer.mmal.buffer_size = 0; ++ q_data->eos_buffer.mmal.length = 0; ++ q_data->eos_buffer.mmal.mmal_flags = ++ MMAL_BUFFER_HEADER_FLAG_EOS; ++ q_data->eos_buffer.mmal.pts = 0; ++ q_data->eos_buffer.mmal.dts = 0; ++ ++ if (!ctx->component) ++ break; ++ ++ ret = vchiq_mmal_submit_buffer(ctx->dev->instance, ++ &ctx->component->input[0], ++ &q_data->eos_buffer.mmal); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, ++ "%s: EOS buffer submit failed %d\n", ++ __func__, ret); ++ ++ break; ++ case V4L2_ENC_CMD_START: ++ /* Do we need to do anything here? */ ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static const struct v4l2_ioctl_ops bcm2835_codec_ioctl_ops = { ++ .vidioc_querycap = vidioc_querycap, ++ ++ .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, ++ .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, ++ .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, ++ .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, ++ ++ .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out, ++ .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out, ++ .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out, ++ .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out, ++ ++ .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs, ++ .vidioc_querybuf = v4l2_m2m_ioctl_querybuf, ++ .vidioc_qbuf = v4l2_m2m_ioctl_qbuf, ++ .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf, ++ .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf, ++ .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs, ++ .vidioc_expbuf = v4l2_m2m_ioctl_expbuf, ++ ++ .vidioc_streamon = v4l2_m2m_ioctl_streamon, ++ .vidioc_streamoff = v4l2_m2m_ioctl_streamoff, ++ ++ .vidioc_g_selection = vidioc_g_selection, ++ .vidioc_s_selection = vidioc_s_selection, ++ ++ .vidioc_subscribe_event = vidioc_subscribe_evt, ++ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, ++ ++ .vidioc_decoder_cmd = vidioc_decoder_cmd, ++ .vidioc_try_decoder_cmd = vidioc_try_decoder_cmd, ++ .vidioc_encoder_cmd = vidioc_encoder_cmd, ++ .vidioc_try_encoder_cmd = vidioc_try_encoder_cmd, ++}; ++ ++static int bcm2835_codec_set_ctrls(struct bcm2835_codec_ctx *ctx) ++{ ++ /* ++ * Query the control handler for the value of the various controls and ++ * set them. ++ */ ++ const u32 control_ids[] = { ++ V4L2_CID_MPEG_VIDEO_BITRATE_MODE, ++ V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER, ++ V4L2_CID_MPEG_VIDEO_H264_I_PERIOD, ++ V4L2_CID_MPEG_VIDEO_H264_LEVEL, ++ V4L2_CID_MPEG_VIDEO_H264_PROFILE, ++ }; ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(control_ids); i++) { ++ struct v4l2_ctrl *ctrl; ++ ++ ctrl = v4l2_ctrl_find(&ctx->hdl, control_ids[i]); ++ if (ctrl) ++ bcm2835_codec_s_ctrl(ctrl); ++ } ++ ++ return 0; ++} ++ ++static int bcm2835_codec_create_component(struct bcm2835_codec_ctx *ctx) ++{ ++ struct bcm2835_codec_dev *dev = ctx->dev; ++ unsigned int enable = 1; ++ int ret; ++ ++ ret = vchiq_mmal_component_init(dev->instance, dev->decode ? ++ "ril.video_decode" : "ril.video_encode", ++ &ctx->component); ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: failed to create component for %s\n", ++ __func__, dev->decode ? "decode" : "encode"); ++ return -ENOMEM; ++ } ++ ++ vchiq_mmal_port_parameter_set(dev->instance, &ctx->component->input[0], ++ MMAL_PARAMETER_ZERO_COPY, &enable, ++ sizeof(enable)); ++ vchiq_mmal_port_parameter_set(dev->instance, &ctx->component->output[0], ++ MMAL_PARAMETER_ZERO_COPY, &enable, ++ sizeof(enable)); ++ ++ setup_mmal_port_format(ctx, dev->decode, &ctx->q_data[V4L2_M2M_SRC], ++ &ctx->component->input[0]); ++ ++ setup_mmal_port_format(ctx, dev->decode, &ctx->q_data[V4L2_M2M_DST], ++ &ctx->component->output[0]); ++ ++ ret = vchiq_mmal_port_set_format(dev->instance, ++ &ctx->component->input[0]); ++ if (ret < 0) ++ goto destroy_component; ++ ++ ret = vchiq_mmal_port_set_format(dev->instance, ++ &ctx->component->output[0]); ++ if (ret < 0) ++ goto destroy_component; ++ ++ if (dev->decode) { ++ if (ctx->q_data[V4L2_M2M_DST].sizeimage < ++ ctx->component->output[0].minimum_buffer.size) ++ v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", ++ ctx->q_data[V4L2_M2M_DST].sizeimage, ++ ctx->component->output[0].minimum_buffer.size); ++ } else { ++ if (ctx->q_data[V4L2_M2M_SRC].sizeimage < ++ ctx->component->output[0].minimum_buffer.size) ++ v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", ++ ctx->q_data[V4L2_M2M_SRC].sizeimage, ++ ctx->component->output[0].minimum_buffer.size); ++ ++ /* Now we have a component we can set all the ctrls */ ++ bcm2835_codec_set_ctrls(ctx); ++ } ++ ++ return 0; ++ ++destroy_component: ++ vchiq_mmal_component_finalise(ctx->dev->instance, ctx->component); ++ ++ return ret; ++} ++ ++/* ++ * Queue operations ++ */ ++ ++static int bcm2835_codec_queue_setup(struct vb2_queue *vq, ++ unsigned int *nbuffers, ++ unsigned int *nplanes, ++ unsigned int sizes[], ++ struct device *alloc_devs[]) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vq); ++ struct bcm2835_codec_q_data *q_data; ++ struct vchiq_mmal_port *port; ++ unsigned int size; ++ ++ q_data = get_q_data(ctx, vq->type); ++ if (!q_data) ++ return -EINVAL; ++ ++ if (!ctx->component) ++ if (bcm2835_codec_create_component(ctx)) ++ return -EINVAL; ++ ++ port = get_port_data(ctx, vq->type); ++ ++ size = q_data->sizeimage; ++ ++ if (*nplanes) ++ return sizes[0] < size ? -EINVAL : 0; ++ ++ *nplanes = 1; ++ ++ sizes[0] = size; ++ port->current_buffer.size = size; ++ ++ if (*nbuffers < port->minimum_buffer.num) ++ *nbuffers = port->minimum_buffer.num; ++ /* Add one buffer to take an EOS */ ++ port->current_buffer.num = *nbuffers + 1; ++ ++ return 0; ++} ++ ++static int bcm2835_codec_buf_init(struct vb2_buffer *vb) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); ++ struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); ++ struct v4l2_m2m_buffer *m2m = container_of(vb2, struct v4l2_m2m_buffer, ++ vb); ++ struct m2m_mmal_buffer *buf = container_of(m2m, struct m2m_mmal_buffer, ++ m2m); ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: ctx:%p, vb %p\n", ++ __func__, ctx, vb); ++ buf->mmal.buffer = vb2_plane_vaddr(&buf->m2m.vb.vb2_buf, 0); ++ buf->mmal.buffer_size = vb2_plane_size(&buf->m2m.vb.vb2_buf, 0); ++ ++ mmal_vchi_buffer_init(ctx->dev->instance, &buf->mmal); ++ ++ return 0; ++} ++ ++static int bcm2835_codec_buf_prepare(struct vb2_buffer *vb) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); ++ struct bcm2835_codec_q_data *q_data; ++ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); ++ struct v4l2_m2m_buffer *m2m = container_of(vbuf, struct v4l2_m2m_buffer, ++ vb); ++ struct m2m_mmal_buffer *buf = container_of(m2m, struct m2m_mmal_buffer, ++ m2m); ++ int ret; ++ ++ v4l2_dbg(4, debug, &ctx->dev->v4l2_dev, "%s: type: %d ptr %p\n", ++ __func__, vb->vb2_queue->type, vb); ++ ++ q_data = get_q_data(ctx, vb->vb2_queue->type); ++ if (V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) { ++ if (vbuf->field == V4L2_FIELD_ANY) ++ vbuf->field = V4L2_FIELD_NONE; ++ if (vbuf->field != V4L2_FIELD_NONE) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s field isn't supported\n", ++ __func__); ++ return -EINVAL; ++ } ++ } ++ ++ if (vb2_plane_size(vb, 0) < q_data->sizeimage) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s data will not fit into plane (%lu < %lu)\n", ++ __func__, vb2_plane_size(vb, 0), ++ (long)q_data->sizeimage); ++ return -EINVAL; ++ } ++ ++ if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) ++ vb2_set_plane_payload(vb, 0, q_data->sizeimage); ++ ++ /* ++ * We want to do this at init, but vb2_core_expbuf checks that the ++ * index < q->num_buffers, and q->num_buffers only gets updated once ++ * all the buffers are allocated. ++ */ ++ if (!buf->mmal.dma_buf) { ++ ret = vb2_core_expbuf_dmabuf(vb->vb2_queue, ++ vb->vb2_queue->type, vb->index, 0, ++ O_CLOEXEC, &buf->mmal.dma_buf); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed to expbuf idx %d, ret %d\n", ++ __func__, vb->index, ret); ++ } else { ++ ret = 0; ++ } ++ ++ return ret; ++} ++ ++static void bcm2835_codec_buf_queue(struct vb2_buffer *vb) ++{ ++ struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); ++ ++ v4l2_dbg(4, debug, &ctx->dev->v4l2_dev, "%s: type: %d ptr %p vbuf->flags %u, seq %u, bytesused %u\n", ++ __func__, vb->vb2_queue->type, vb, vbuf->flags, vbuf->sequence, ++ vb->planes[0].bytesused); ++ v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf); ++} ++ ++static void bcm2835_codec_buffer_cleanup(struct vb2_buffer *vb) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); ++ struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); ++ struct v4l2_m2m_buffer *m2m = container_of(vb2, struct v4l2_m2m_buffer, ++ vb); ++ struct m2m_mmal_buffer *buf = container_of(m2m, struct m2m_mmal_buffer, ++ m2m); ++ ++ v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: ctx:%p, vb %p\n", ++ __func__, ctx, vb); ++ ++ mmal_vchi_buffer_cleanup(&buf->mmal); ++ ++ if (buf->mmal.dma_buf) { ++ dma_buf_put(buf->mmal.dma_buf); ++ buf->mmal.dma_buf = NULL; ++ } ++} ++ ++static int bcm2835_codec_start_streaming(struct vb2_queue *q, ++ unsigned int count) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(q); ++ struct bcm2835_codec_dev *dev = ctx->dev; ++ struct bcm2835_codec_q_data *q_data = get_q_data(ctx, q->type); ++ int ret; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: type: %d count %d\n", ++ __func__, q->type, count); ++ q_data->sequence = 0; ++ ++ if (!ctx->component_enabled) { ++ ret = vchiq_mmal_component_enable(dev->instance, ++ ctx->component); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed enabling component, ret %d\n", ++ __func__, ret); ++ ctx->component_enabled = true; ++ } ++ ++ if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) { ++ /* ++ * Create the EOS buffer. ++ * We only need the MMAL part, and want to NOT attach a memory ++ * buffer to it as it should only take flags. ++ */ ++ memset(&q_data->eos_buffer, 0, sizeof(q_data->eos_buffer)); ++ mmal_vchi_buffer_init(dev->instance, ++ &q_data->eos_buffer.mmal); ++ q_data->eos_buffer_in_use = false; ++ ++ ctx->component->input[0].cb_ctx = ctx; ++ ret = vchiq_mmal_port_enable(dev->instance, ++ &ctx->component->input[0], ++ ip_buffer_cb); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed enabling i/p port, ret %d\n", ++ __func__, ret); ++ } else { ++ ctx->component->output[0].cb_ctx = ctx; ++ ret = vchiq_mmal_port_enable(dev->instance, ++ &ctx->component->output[0], ++ op_buffer_cb); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed enabling o/p port, ret %d\n", ++ __func__, ret); ++ } ++ return ret; ++} ++ ++static void bcm2835_codec_stop_streaming(struct vb2_queue *q) ++{ ++ struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(q); ++ struct bcm2835_codec_dev *dev = ctx->dev; ++ struct bcm2835_codec_q_data *q_data = get_q_data(ctx, q->type); ++ struct vchiq_mmal_port *port = get_port_data(ctx, q->type); ++ struct vb2_v4l2_buffer *vbuf; ++ struct vb2_v4l2_buffer *vb2; ++ struct v4l2_m2m_buffer *m2m; ++ struct m2m_mmal_buffer *buf; ++ int ret, i; ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: type: %d - return buffers\n", ++ __func__, q->type); ++ ++ init_completion(&ctx->frame_cmplt); ++ ++ /* Clear out all buffers held by m2m framework */ ++ for (;;) { ++ if (V4L2_TYPE_IS_OUTPUT(q->type)) ++ vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); ++ else ++ vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); ++ if (!vbuf) ++ break; ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: return buffer %p\n", ++ __func__, vbuf); ++ ++ v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_ERROR); ++ } ++ ++ /* Disable MMAL port - this will flush buffers back */ ++ ret = vchiq_mmal_port_disable(dev->instance, port); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed disabling %s port, ret %d\n", ++ __func__, V4L2_TYPE_IS_OUTPUT(q->type) ? "i/p" : "o/p", ++ ret); ++ ++ while (atomic_read(&port->buffers_with_vpu)) { ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: Waiting for buffers to be returned - %d outstanding\n", ++ __func__, atomic_read(&port->buffers_with_vpu)); ++ ret = wait_for_completion_timeout(&ctx->frame_cmplt, HZ); ++ if (ret <= 0) { ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Timeout waiting for buffers to be returned - %d outstanding\n", ++ __func__, ++ atomic_read(&port->buffers_with_vpu)); ++ break; ++ } ++ } ++ ++ /* ++ * Release the VCSM handle here as otherwise REQBUFS(0) aborts because ++ * someone is using the dmabuf before giving the driver a chance to do ++ * anything about it. ++ */ ++ for (i = 0; i < q->num_buffers; i++) { ++ vb2 = to_vb2_v4l2_buffer(q->bufs[i]); ++ m2m = container_of(vb2, struct v4l2_m2m_buffer, vb); ++ buf = container_of(m2m, struct m2m_mmal_buffer, m2m); ++ ++ mmal_vchi_buffer_cleanup(&buf->mmal); ++ if (buf->mmal.dma_buf) { ++ dma_buf_put(buf->mmal.dma_buf); ++ buf->mmal.dma_buf = NULL; ++ } ++ } ++ ++ /* If both ports disabled, then disable the component */ ++ if (!ctx->component->input[0].enabled && ++ !ctx->component->output[0].enabled) { ++ ret = vchiq_mmal_component_disable(dev->instance, ++ ctx->component); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed enabling component, ret %d\n", ++ __func__, ret); ++ } ++ ++ if (V4L2_TYPE_IS_OUTPUT(q->type)) ++ mmal_vchi_buffer_cleanup(&q_data->eos_buffer.mmal); ++ ++ v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "%s: done\n", __func__); ++} ++ ++static const struct vb2_ops bcm2835_codec_qops = { ++ .queue_setup = bcm2835_codec_queue_setup, ++ .buf_init = bcm2835_codec_buf_init, ++ .buf_prepare = bcm2835_codec_buf_prepare, ++ .buf_queue = bcm2835_codec_buf_queue, ++ .buf_cleanup = bcm2835_codec_buffer_cleanup, ++ .start_streaming = bcm2835_codec_start_streaming, ++ .stop_streaming = bcm2835_codec_stop_streaming, ++ .wait_prepare = vb2_ops_wait_prepare, ++ .wait_finish = vb2_ops_wait_finish, ++}; ++ ++static int queue_init(void *priv, struct vb2_queue *src_vq, ++ struct vb2_queue *dst_vq) ++{ ++ struct bcm2835_codec_ctx *ctx = priv; ++ int ret; ++ ++ src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT; ++ src_vq->io_modes = VB2_MMAP | VB2_DMABUF; ++ src_vq->drv_priv = ctx; ++ src_vq->buf_struct_size = sizeof(struct m2m_mmal_buffer); ++ src_vq->ops = &bcm2835_codec_qops; ++ src_vq->mem_ops = &vb2_dma_contig_memops; ++ src_vq->dev = &ctx->dev->pdev->dev; ++ src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; ++ src_vq->lock = &ctx->dev->dev_mutex; ++ ++ ret = vb2_queue_init(src_vq); ++ if (ret) ++ return ret; ++ ++ dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; ++ dst_vq->io_modes = VB2_MMAP | VB2_DMABUF; ++ dst_vq->drv_priv = ctx; ++ dst_vq->buf_struct_size = sizeof(struct m2m_mmal_buffer); ++ dst_vq->ops = &bcm2835_codec_qops; ++ dst_vq->mem_ops = &vb2_dma_contig_memops; ++ dst_vq->dev = &ctx->dev->pdev->dev; ++ dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; ++ dst_vq->lock = &ctx->dev->dev_mutex; ++ ++ return vb2_queue_init(dst_vq); ++} ++ ++/* ++ * File operations ++ */ ++static int bcm2835_codec_open(struct file *file) ++{ ++ struct bcm2835_codec_dev *dev = video_drvdata(file); ++ struct bcm2835_codec_ctx *ctx = NULL; ++ struct v4l2_ctrl_handler *hdl; ++ int rc = 0; ++ ++ v4l2_dbg(1, debug, &dev->v4l2_dev, "Creating instance for %s\n", ++ dev->decode ? "decode" : "encode"); ++ if (mutex_lock_interruptible(&dev->dev_mutex)) { ++ v4l2_err(&dev->v4l2_dev, "Mutex fail\n"); ++ return -ERESTARTSYS; ++ } ++ ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); ++ if (!ctx) { ++ rc = -ENOMEM; ++ goto open_unlock; ++ } ++ ++ ctx->q_data[V4L2_M2M_SRC].fmt = get_default_format(dev->decode, false); ++ ctx->q_data[V4L2_M2M_DST].fmt = get_default_format(dev->decode, true); ++ if (dev->decode) { ++ /* ++ * Input width and height are irrelevant as they will be defined ++ * by the bitstream not the format. Required by V4L2 though. ++ */ ++ ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].bytesperline = 0; ++ ctx->q_data[V4L2_M2M_SRC].sizeimage = ++ DEF_COMP_BUF_SIZE_720P_OR_LESS; ++ ++ ctx->q_data[V4L2_M2M_DST].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_DST].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].bytesperline = ++ get_bytesperline(DEFAULT_WIDTH, ++ ctx->q_data[V4L2_M2M_DST].fmt); ++ ctx->q_data[V4L2_M2M_DST].sizeimage = ++ get_sizeimage(ctx->q_data[V4L2_M2M_DST].bytesperline, ++ ctx->q_data[V4L2_M2M_DST].height, ++ ctx->q_data[V4L2_M2M_DST].fmt); ++ } else { ++ ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].bytesperline = ++ get_bytesperline(DEFAULT_WIDTH, ++ ctx->q_data[V4L2_M2M_SRC].fmt); ++ ctx->q_data[V4L2_M2M_SRC].sizeimage = ++ get_sizeimage(ctx->q_data[V4L2_M2M_SRC].bytesperline, ++ ctx->q_data[V4L2_M2M_SRC].height, ++ ctx->q_data[V4L2_M2M_SRC].fmt); ++ ++ ctx->q_data[V4L2_M2M_DST].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_DST].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].bytesperline = 0; ++ ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].sizeimage = ++ DEF_COMP_BUF_SIZE_720P_OR_LESS; ++ } ++ ++ ctx->colorspace = V4L2_COLORSPACE_REC709; ++ ctx->bitrate = 10 * 1000 * 1000; ++ ++ /* Initialise V4L2 contexts */ ++ v4l2_fh_init(&ctx->fh, video_devdata(file)); ++ file->private_data = &ctx->fh; ++ ctx->dev = dev; ++ hdl = &ctx->hdl; ++ if (!dev->decode) { ++ /* Encode controls */ ++ v4l2_ctrl_handler_init(hdl, 6); ++ ++ v4l2_ctrl_new_std_menu(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_BITRATE_MODE, ++ V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, 0, ++ V4L2_MPEG_VIDEO_BITRATE_MODE_VBR); ++ v4l2_ctrl_new_std(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_BITRATE, ++ 25 * 1000, 25 * 1000 * 1000, ++ 25 * 1000, 10 * 1000 * 1000); ++ v4l2_ctrl_new_std(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER, ++ 0, 1, ++ 1, 0); ++ v4l2_ctrl_new_std(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_H264_I_PERIOD, ++ 0, 0x7FFFFFFF, ++ 1, 60); ++ v4l2_ctrl_new_std_menu(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_H264_LEVEL, ++ V4L2_MPEG_VIDEO_H264_LEVEL_4_2, ++ ~(BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | ++ BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2)), ++ V4L2_MPEG_VIDEO_H264_LEVEL_4_0); ++ v4l2_ctrl_new_std_menu(hdl, &bcm2835_codec_ctrl_ops, ++ V4L2_CID_MPEG_VIDEO_H264_PROFILE, ++ V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, ++ ~(BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | ++ BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | ++ BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | ++ BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)), ++ V4L2_MPEG_VIDEO_H264_PROFILE_HIGH); ++ if (hdl->error) { ++ rc = hdl->error; ++ goto free_ctrl_handler; ++ } ++ ctx->fh.ctrl_handler = hdl; ++ v4l2_ctrl_handler_setup(hdl); ++ } ++ ++ ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx, &queue_init); ++ ++ if (IS_ERR(ctx->fh.m2m_ctx)) { ++ rc = PTR_ERR(ctx->fh.m2m_ctx); ++ ++ goto free_ctrl_handler; ++ } ++ ++ /* Set both queues as buffered as we have buffering in the VPU. That ++ * means that we will be scheduled whenever either an input or output ++ * buffer is available (otherwise one of each are required). ++ */ ++ v4l2_m2m_set_src_buffered(ctx->fh.m2m_ctx, true); ++ v4l2_m2m_set_dst_buffered(ctx->fh.m2m_ctx, true); ++ ++ v4l2_fh_add(&ctx->fh); ++ atomic_inc(&dev->num_inst); ++ ++ mutex_unlock(&dev->dev_mutex); ++ return 0; ++ ++free_ctrl_handler: ++ v4l2_ctrl_handler_free(hdl); ++ kfree(ctx); ++open_unlock: ++ mutex_unlock(&dev->dev_mutex); ++ return rc; ++} ++ ++static int bcm2835_codec_release(struct file *file) ++{ ++ struct bcm2835_codec_dev *dev = video_drvdata(file); ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: Releasing instance %p\n", ++ __func__, ctx); ++ ++ v4l2_fh_del(&ctx->fh); ++ v4l2_fh_exit(&ctx->fh); ++ v4l2_ctrl_handler_free(&ctx->hdl); ++ mutex_lock(&dev->dev_mutex); ++ v4l2_m2m_ctx_release(ctx->fh.m2m_ctx); ++ ++ if (ctx->component) ++ vchiq_mmal_component_finalise(dev->instance, ctx->component); ++ ++ mutex_unlock(&dev->dev_mutex); ++ kfree(ctx); ++ ++ atomic_dec(&dev->num_inst); ++ ++ return 0; ++} ++ ++static const struct v4l2_file_operations bcm2835_codec_fops = { ++ .owner = THIS_MODULE, ++ .open = bcm2835_codec_open, ++ .release = bcm2835_codec_release, ++ .poll = v4l2_m2m_fop_poll, ++ .unlocked_ioctl = video_ioctl2, ++ .mmap = v4l2_m2m_fop_mmap, ++}; ++ ++static const struct video_device bcm2835_codec_videodev = { ++ .name = MEM2MEM_NAME, ++ .vfl_dir = VFL_DIR_M2M, ++ .fops = &bcm2835_codec_fops, ++ .ioctl_ops = &bcm2835_codec_ioctl_ops, ++ .minor = -1, ++ .release = video_device_release_empty, ++}; ++ ++static const struct v4l2_m2m_ops m2m_ops = { ++ .device_run = device_run, ++ .job_ready = job_ready, ++ .job_abort = job_abort, ++}; ++ ++static int bcm2835_codec_create(struct platform_device *pdev, ++ struct bcm2835_codec_dev **new_dev, ++ bool decode) ++{ ++ struct bcm2835_codec_dev *dev; ++ struct video_device *vfd; ++ struct vchiq_mmal_instance *instance = NULL; ++ int video_nr; ++ int ret; ++ ++ dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); ++ if (!dev) ++ return -ENOMEM; ++ ++ dev->pdev = pdev; ++ ++ dev->decode = decode; ++ ++ ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); ++ if (ret) ++ return ret; ++ ++ atomic_set(&dev->num_inst, 0); ++ mutex_init(&dev->dev_mutex); ++ ++ dev->vfd = bcm2835_codec_videodev; ++ vfd = &dev->vfd; ++ vfd->lock = &dev->dev_mutex; ++ vfd->v4l2_dev = &dev->v4l2_dev; ++ ++ if (dev->decode) { ++ v4l2_disable_ioctl(vfd, VIDIOC_ENCODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD); ++ video_nr = decode_video_nr; ++ } else { ++ v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD); ++ video_nr = encode_video_nr; ++ } ++ ++ ret = video_register_device(vfd, VFL_TYPE_GRABBER, video_nr); ++ if (ret) { ++ v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); ++ goto unreg_dev; ++ } ++ ++ video_set_drvdata(vfd, dev); ++ snprintf(vfd->name, sizeof(vfd->name), "%s", ++ bcm2835_codec_videodev.name); ++ v4l2_info(&dev->v4l2_dev, "Device registered as /dev/video%d\n", ++ vfd->num); ++ ++ *new_dev = dev; ++ ++ dev->m2m_dev = v4l2_m2m_init(&m2m_ops); ++ if (IS_ERR(dev->m2m_dev)) { ++ v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n"); ++ ret = PTR_ERR(dev->m2m_dev); ++ goto err_m2m; ++ } ++ ++ ret = vchiq_mmal_init(&instance); ++ if (ret < 0) ++ goto err_m2m; ++ dev->instance = instance; ++ ++ v4l2_info(&dev->v4l2_dev, "Loaded V4L2 %s codec\n", ++ dev->decode ? "decode" : "encode"); ++ return 0; ++ ++err_m2m: ++ v4l2_m2m_release(dev->m2m_dev); ++ video_unregister_device(&dev->vfd); ++unreg_dev: ++ v4l2_device_unregister(&dev->v4l2_dev); ++ ++ return ret; ++} ++ ++static int bcm2835_codec_destroy(struct bcm2835_codec_dev *dev) ++{ ++ if (!dev) ++ return -ENODEV; ++ ++ v4l2_info(&dev->v4l2_dev, "Removing " MEM2MEM_NAME); ++ v4l2_m2m_release(dev->m2m_dev); ++ video_unregister_device(&dev->vfd); ++ v4l2_device_unregister(&dev->v4l2_dev); ++ ++ return 0; ++} ++ ++static int bcm2835_codec_probe(struct platform_device *pdev) ++{ ++ struct bcm2835_codec_driver *drv; ++ int ret = 0; ++ ++ drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); ++ if (!drv) ++ return -ENOMEM; ++ ++ ret = bcm2835_codec_create(pdev, &drv->encode, false); ++ if (ret) ++ goto out; ++ ++ ret = bcm2835_codec_create(pdev, &drv->decode, true); ++ if (ret) ++ goto out; ++ ++ platform_set_drvdata(pdev, drv); ++ ++ return 0; ++ ++out: ++ if (drv->encode) { ++ bcm2835_codec_destroy(drv->encode); ++ drv->encode = NULL; ++ } ++ return ret; ++} ++ ++static int bcm2835_codec_remove(struct platform_device *pdev) ++{ ++ struct bcm2835_codec_driver *drv = platform_get_drvdata(pdev); ++ ++ bcm2835_codec_destroy(drv->encode); ++ ++ bcm2835_codec_destroy(drv->decode); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm2835_v4l2_codec_driver = { ++ .probe = bcm2835_codec_probe, ++ .remove = bcm2835_codec_remove, ++ .driver = { ++ .name = "bcm2835-codec", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(bcm2835_v4l2_codec_driver); ++ ++MODULE_DESCRIPTION("BCM2835 codec V4L2 driver"); ++MODULE_AUTHOR("Dave Stevenson, "); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION("0.0.1"); ++MODULE_ALIAS("platform:bcm2835-codec"); diff --git a/target/linux/brcm2708/patches-4.19/950-0280-staging-vchiq_arm-Register-bcm2835-codec-as-a-platfo.patch b/target/linux/brcm2708/patches-4.19/950-0280-staging-vchiq_arm-Register-bcm2835-codec-as-a-platfo.patch new file mode 100644 index 000000000..abfd82817 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0280-staging-vchiq_arm-Register-bcm2835-codec-as-a-platfo.patch @@ -0,0 +1,34 @@ +From 7dc3f0727d394ae8eaef363808b7525e9f760310 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 26 Oct 2018 15:14:16 +0100 +Subject: [PATCH 280/703] staging: vchiq_arm: Register bcm2835-codec as a + platform driver + +Following the same pattern as bcm2835-camera and bcm2835-audio, +register the V4L2 codec driver as a platform driver + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -171,6 +171,7 @@ static struct device *vchiq_dev; + static DEFINE_SPINLOCK(msg_queue_spinlock); + static struct platform_device *bcm2835_camera; + static struct platform_device *bcm2835_audio; ++static struct platform_device *bcm2835_codec; + + static const char *const ioctl_names[] = { + "CONNECT", +@@ -3660,6 +3661,9 @@ static int vchiq_probe(struct platform_d + bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio"); + if (IS_ERR(bcm2835_audio)) + bcm2835_audio = NULL; ++ bcm2835_codec = vchiq_register_child(pdev, "bcm2835-codec"); ++ if (IS_ERR(bcm2835_codec)) ++ bcm2835_codec = NULL; + + return 0; + diff --git a/target/linux/brcm2708/patches-4.19/950-0281-staging-vchiq_arm-Register-vcsm-cma-as-a-platform-dr.patch b/target/linux/brcm2708/patches-4.19/950-0281-staging-vchiq_arm-Register-vcsm-cma-as-a-platform-dr.patch new file mode 100644 index 000000000..7c4a096ce --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0281-staging-vchiq_arm-Register-vcsm-cma-as-a-platform-dr.patch @@ -0,0 +1,34 @@ +From e0f22704bdcaa4b0033e65ce00f585e8b07b26af Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 26 Oct 2018 15:19:40 +0100 +Subject: [PATCH 281/703] staging: vchiq_arm: Register vcsm-cma as a platform + driver + +Following the same pattern as bcm2835-camera and bcm2835-audio, +register the vcsm-cma driver as a platform driver + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -172,6 +172,7 @@ static DEFINE_SPINLOCK(msg_queue_spinloc + static struct platform_device *bcm2835_camera; + static struct platform_device *bcm2835_audio; + static struct platform_device *bcm2835_codec; ++static struct platform_device *vcsm_cma; + + static const char *const ioctl_names[] = { + "CONNECT", +@@ -3655,6 +3656,9 @@ static int vchiq_probe(struct platform_d + VCHIQ_VERSION, VCHIQ_VERSION_MIN, + MAJOR(vchiq_devid), MINOR(vchiq_devid)); + ++ vcsm_cma = vchiq_register_child(pdev, "vcsm-cma"); ++ if (IS_ERR(vcsm_cma)) ++ vcsm_cma = NULL; + bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); + if (IS_ERR(bcm2835_camera)) + bcm2835_camera = NULL; diff --git a/target/linux/brcm2708/patches-4.19/950-0282-ARM-bcm2835_defconfig-Enable-bcm2835-codec.patch b/target/linux/brcm2708/patches-4.19/950-0282-ARM-bcm2835_defconfig-Enable-bcm2835-codec.patch new file mode 100644 index 000000000..1bdba512e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0282-ARM-bcm2835_defconfig-Enable-bcm2835-codec.patch @@ -0,0 +1,22 @@ +From 940f1ba9a06ccff70f10459803efe140baa7896d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Oct 2018 17:49:04 +0000 +Subject: [PATCH 282/703] ARM: bcm2835_defconfig: Enable bcm2835-codec + +Enables the V4L2 M2M codec driver as a module. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2835_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/configs/bcm2835_defconfig ++++ b/arch/arm/configs/bcm2835_defconfig +@@ -132,6 +132,7 @@ CONFIG_DMA_BCM2835=y + CONFIG_STAGING=y + CONFIG_SND_BCM2835=m + CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0283-config-Add-bcm2835-codec-to-Pi-defconfigs.patch b/target/linux/brcm2708/patches-4.19/950-0283-config-Add-bcm2835-codec-to-Pi-defconfigs.patch new file mode 100644 index 000000000..3551a7051 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0283-config-Add-bcm2835-codec-to-Pi-defconfigs.patch @@ -0,0 +1,33 @@ +From 7047db2bf3ea962ccd4b3e197b1a812aab491a79 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 30 Oct 2018 12:23:26 +0000 +Subject: [PATCH 283/703] config: Add bcm2835-codec to Pi defconfigs. + +Adds the V4L2 M2M codec driver to the config. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1210,6 +1210,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_BCM2835_VCHIQ=y + CONFIG_SND_BCM2835=m + CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1203,6 +1203,7 @@ CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_BCM2835_VCHIQ=y + CONFIG_SND_BCM2835=m + CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0284-staging-bcm2835-camera-Fix-stride-on-RGB3-BGR3-forma.patch b/target/linux/brcm2708/patches-4.19/950-0284-staging-bcm2835-camera-Fix-stride-on-RGB3-BGR3-forma.patch new file mode 100644 index 000000000..600f1b220 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0284-staging-bcm2835-camera-Fix-stride-on-RGB3-BGR3-forma.patch @@ -0,0 +1,53 @@ +From a81fd46f130118ac4e18588eec81a630623145f6 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 30 Nov 2018 16:00:54 +0000 +Subject: [PATCH 284/703] staging: bcm2835-camera: Fix stride on RGB3/BGR3 + formats + +RGB3/BGR3 end up being 3 bytes per pixel, which meant that +the alignment code ended up trying to align using bitmasking +with a mask of 96. +That doesn't work, so switch to an arithmetic alignment for +those formats. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 26 ++++++++++++++----- + 1 file changed, 20 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -1008,13 +1008,27 @@ static int vidioc_try_fmt_vid_cap(struct + 1, 0); + f->fmt.pix.bytesperline = f->fmt.pix.width * mfmt->ybbp; + if (!mfmt->remove_padding) { +- int align_mask = ((32 * mfmt->depth) >> 3) - 1; +- /* GPU isn't removing padding, so stride is aligned to 32 */ +- f->fmt.pix.bytesperline = +- (f->fmt.pix.bytesperline + align_mask) & ~align_mask; ++ if (mfmt->depth == 24) { ++ /* ++ * 24bpp is a pain as we can't use simple masking. ++ * Min stride is width aligned to 16, times 24bpp. ++ */ ++ f->fmt.pix.bytesperline = ++ ((f->fmt.pix.width + 15) & ~15) * 3; ++ } else { ++ /* ++ * GPU isn't removing padding, so stride is aligned to ++ * 32 ++ */ ++ int align_mask = ((32 * mfmt->depth) >> 3) - 1; ++ ++ f->fmt.pix.bytesperline = ++ (f->fmt.pix.bytesperline + align_mask) & ++ ~align_mask; ++ } + v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, +- "Not removing padding, so bytes/line = %d, (align_mask %d)\n", +- f->fmt.pix.bytesperline, align_mask); ++ "Not removing padding, so bytes/line = %d\n", ++ f->fmt.pix.bytesperline); + } + + /* Image buffer has to be padded to allow for alignment, even though diff --git a/target/linux/brcm2708/patches-4.19/950-0285-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch b/target/linux/brcm2708/patches-4.19/950-0285-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch new file mode 100644 index 000000000..df13c3b87 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0285-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch @@ -0,0 +1,76 @@ +From 0f4f3fca8bb1e8283d5342d63e6758f6ac16d68d Mon Sep 17 00:00:00 2001 +From: John Sheu +Date: Thu, 15 Oct 2015 18:05:25 +0900 +Subject: [PATCH 285/703] media: vb2: Allow reqbufs(0) with "in use" MMAP + buffers + +Videobuf2 presently does not allow VIDIOC_REQBUFS to destroy outstanding +buffers if the queue is of type V4L2_MEMORY_MMAP, and if the buffers are +considered "in use". This is different behavior than for other memory +types and prevents us from deallocating buffers in following two cases: + +1) There are outstanding mmap()ed views on the buffer. However even if + we put the buffer in reqbufs(0), there will be remaining references, + due to vma .open/close() adjusting vb2 buffer refcount appropriately. + This means that the buffer will be in fact freed only when the last + mmap()ed view is unmapped. + +2) Buffer has been exported as a DMABUF. Refcount of the vb2 buffer + is managed properly by VB2 DMABUF ops, i.e. incremented on DMABUF + get and decremented on DMABUF release. This means that the buffer + will be alive until all importers release it. + +Considering both cases above, there does not seem to be any need to +prevent reqbufs(0) operation, because buffer lifetime is already +properly managed by both mmap() and DMABUF code paths. Let's remove it +and allow userspace freeing the queue (and potentially allocating a new +one) even though old buffers might be still in processing. + +Signed-off-by: John Sheu +Reviewed-by: Pawel Osciak +Reviewed-by: Tomasz Figa +Signed-off-by: Tomasz Figa +--- + .../media/common/videobuf2/videobuf2-core.c | 23 ------------------- + 1 file changed, 23 deletions(-) + +--- a/drivers/media/common/videobuf2/videobuf2-core.c ++++ b/drivers/media/common/videobuf2/videobuf2-core.c +@@ -550,20 +550,6 @@ bool vb2_buffer_in_use(struct vb2_queue + } + EXPORT_SYMBOL(vb2_buffer_in_use); + +-/* +- * __buffers_in_use() - return true if any buffers on the queue are in use and +- * the queue cannot be freed (by the means of REQBUFS(0)) call +- */ +-static bool __buffers_in_use(struct vb2_queue *q) +-{ +- unsigned int buffer; +- for (buffer = 0; buffer < q->num_buffers; ++buffer) { +- if (vb2_buffer_in_use(q, q->bufs[buffer])) +- return true; +- } +- return false; +-} +- + void vb2_core_querybuf(struct vb2_queue *q, unsigned int index, void *pb) + { + call_void_bufop(q, fill_user_buffer, q->bufs[index], pb); +@@ -675,16 +661,7 @@ int vb2_core_reqbufs(struct vb2_queue *q + + if (*count == 0 || q->num_buffers != 0 || + (q->memory != VB2_MEMORY_UNKNOWN && q->memory != memory)) { +- /* +- * We already have buffers allocated, so first check if they +- * are not in use and can be freed. +- */ + mutex_lock(&q->mmap_lock); +- if (q->memory == VB2_MEMORY_MMAP && __buffers_in_use(q)) { +- mutex_unlock(&q->mmap_lock); +- dprintk(1, "memory in use, cannot free\n"); +- return -EBUSY; +- } + + /* + * Call queue_cancel to clean up any buffers in the PREPARED or diff --git a/target/linux/brcm2708/patches-4.19/950-0286-tpm-Make-SECURITYFS-a-weak-dependency.patch b/target/linux/brcm2708/patches-4.19/950-0286-tpm-Make-SECURITYFS-a-weak-dependency.patch new file mode 100644 index 000000000..fa1f2b4ee --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0286-tpm-Make-SECURITYFS-a-weak-dependency.patch @@ -0,0 +1,35 @@ +From bcff673c2438f78cb41ab282ce969e4151e00f69 Mon Sep 17 00:00:00 2001 +From: Peter Huewe +Date: Mon, 3 Sep 2018 21:51:51 +0200 +Subject: [PATCH 286/703] tpm: Make SECURITYFS a weak dependency + +commit 2f7d8dbb11287cbe9da6380ca14ed5d38c9ed91f upstream. + +While having SECURITYFS enabled for the tpm subsystem is beneficial in +most cases, it is not strictly necessary to have it enabled at all. +Especially on platforms without any boot firmware integration of the TPM +(e.g. raspberry pi) it does not add any value for the tpm subsystem, +as there is no eventlog present. + +By turning it from 'select' to 'imply' it still gets selected per +default, but enables users who want to save some kb of ram by turning +SECURITYFS off. + +Signed-off-by: Peter Huewe +Reviewed-by: Jarkko Sakkinen +Signed-off-by: Jarkko Sakkinen +--- + drivers/char/tpm/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/char/tpm/Kconfig ++++ b/drivers/char/tpm/Kconfig +@@ -5,7 +5,7 @@ + menuconfig TCG_TPM + tristate "TPM Hardware Support" + depends on HAS_IOMEM +- select SECURITYFS ++ imply SECURITYFS + select CRYPTO + select CRYPTO_HASH_INFO + ---help--- diff --git a/target/linux/brcm2708/patches-4.19/950-0287-Enable-TPM-TIS-SPI-support-for-TPM1.2-and-TPM2.0-chi.patch b/target/linux/brcm2708/patches-4.19/950-0287-Enable-TPM-TIS-SPI-support-for-TPM1.2-and-TPM2.0-chi.patch new file mode 100644 index 000000000..37481a0af --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0287-Enable-TPM-TIS-SPI-support-for-TPM1.2-and-TPM2.0-chi.patch @@ -0,0 +1,104 @@ +From 6fd45140dfb490a231a71994d92d0f0f86703b56 Mon Sep 17 00:00:00 2001 +From: Peter Huewe +Date: Thu, 14 Jun 2018 22:42:18 +0200 +Subject: [PATCH 287/703] Enable TPM TIS SPI support for TPM1.2 and TPM2.0 + chips + +This patch enables the support for SPI TPMs which follow the TCG TIS +FIFO/PTP specification like the SLB9670. +In order to decrease ram usage the weak dependency on CONFIG_SECURITFS +is explictly set to 'n'. + +Signed-off-by: Peter Huewe +--- + arch/arm/configs/bcm2709_defconfig | 5 +++-- + arch/arm/configs/bcmrpi_defconfig | 5 +++-- + arch/arm64/configs/bcmrpi3_defconfig | 3 +++ + 3 files changed, 9 insertions(+), 4 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -350,7 +350,6 @@ CONFIG_NET_ACT_SKBEDIT=m + CONFIG_NET_ACT_CSUM=m + CONFIG_BATMAN_ADV=m + CONFIG_OPENVSWITCH=m +-CONFIG_NET_L3_MASTER_DEV=y + CONFIG_NET_PKTGEN=m + CONFIG_HAMRADIO=y + CONFIG_AX25=m +@@ -610,6 +609,8 @@ CONFIG_SERIAL_DEV_BUS=m + CONFIG_TTY_PRINTK=y + CONFIG_HW_RANDOM=y + CONFIG_RAW_DRIVER=y ++CONFIG_TCG_TPM=m ++CONFIG_TCG_TIS_SPI=m + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m + CONFIG_I2C_MUX=m +@@ -1343,12 +1344,12 @@ CONFIG_NLS_ISO8859_15=m + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m + CONFIG_DLM=m ++# CONFIG_SECURITYFS is not set + CONFIG_CRYPTO_USER=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_CTS=m + CONFIG_CRYPTO_XTS=m + CONFIG_CRYPTO_XCBC=m +-CONFIG_CRYPTO_SHA512=m + CONFIG_CRYPTO_TGR192=m + CONFIG_CRYPTO_WP512=m + CONFIG_CRYPTO_CAST5=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -344,7 +344,6 @@ CONFIG_NET_ACT_SKBEDIT=m + CONFIG_NET_ACT_CSUM=m + CONFIG_BATMAN_ADV=m + CONFIG_OPENVSWITCH=m +-CONFIG_NET_L3_MASTER_DEV=y + CONFIG_NET_PKTGEN=m + CONFIG_HAMRADIO=y + CONFIG_AX25=m +@@ -604,6 +603,8 @@ CONFIG_SERIAL_DEV_BUS=m + CONFIG_TTY_PRINTK=y + CONFIG_HW_RANDOM=y + CONFIG_RAW_DRIVER=y ++CONFIG_TCG_TPM=m ++CONFIG_TCG_TIS_SPI=m + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m + CONFIG_I2C_MUX=m +@@ -1336,13 +1337,13 @@ CONFIG_NLS_ISO8859_15=m + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m + CONFIG_DLM=m ++# CONFIG_SECURITYFS is not set + CONFIG_CRYPTO_USER=m + CONFIG_CRYPTO_CRYPTD=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_CTS=m + CONFIG_CRYPTO_XTS=m + CONFIG_CRYPTO_XCBC=m +-CONFIG_CRYPTO_SHA512=m + CONFIG_CRYPTO_TGR192=m + CONFIG_CRYPTO_WP512=m + CONFIG_CRYPTO_CAST5=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -589,6 +589,8 @@ CONFIG_SERIAL_DEV_BUS=m + CONFIG_TTY_PRINTK=y + CONFIG_HW_RANDOM=y + CONFIG_RAW_DRIVER=y ++CONFIG_TCG_TPM=m ++CONFIG_TCG_TIS_SPI=m + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m + CONFIG_I2C_BCM2708=m +@@ -1187,6 +1189,7 @@ CONFIG_NLS_ISO8859_15=m + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m + CONFIG_DLM=m ++# CONFIG_SECURITYFS is not set + CONFIG_CRYPTO_USER=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_CTS=m diff --git a/target/linux/brcm2708/patches-4.19/950-0288-Add-overlay-for-SLB9760-Iridium-LetsTrust-TPM.patch b/target/linux/brcm2708/patches-4.19/950-0288-Add-overlay-for-SLB9760-Iridium-LetsTrust-TPM.patch new file mode 100644 index 000000000..de7903d86 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0288-Add-overlay-for-SLB9760-Iridium-LetsTrust-TPM.patch @@ -0,0 +1,92 @@ +From 0ca744a930b9aed72b2f291796140339eaf6ea33 Mon Sep 17 00:00:00 2001 +From: Peter Huewe +Date: Thu, 14 Jun 2018 22:51:24 +0200 +Subject: [PATCH 288/703] Add overlay for SLB9760 Iridium /LetsTrust TPM + +Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on +boards, which can be used as a secure key storage and hwrng. +available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by +pi3g. + +Signed-off-by: Peter Huewe +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 8 ++++ + .../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 +++++++++++++++++++ + 3 files changed, 53 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -137,6 +137,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + tc358743.dtbo \ + tc358743-audio.dtbo \ + tinylcd35.dtbo \ ++ tpm-slb9670.dtbo \ + uart0.dtbo \ + uart1.dtbo \ + upstream.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2012,6 +2012,14 @@ Params: speed Display + dtoverlay=tinylcd35,touch,touchgpio=3 + + ++Name: tpm-slb9670 ++Info: Enables support for Infineon SLB9670 Trusted Platform Module add-on ++ boards, which can be used as a secure key storage and hwrng, ++ available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g. ++Load: dtoverlay=tpm-slb9670 ++Params: ++ ++ + Name: uart0 + Info: Change the pin usage of uart0 + Load: dtoverlay=uart0,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts +@@ -0,0 +1,44 @@ ++/* ++ * Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on ++ * boards, which can be used as a secure key storage and hwrng. ++ * available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g. ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ slb9670: slb9670@1 { ++ compatible = "infineon,slb9670"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <32000000>; ++ status = "okay"; ++ }; ++ ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0289-Revert-staging-vchiq_arm-Register-a-platform-device-.patch b/target/linux/brcm2708/patches-4.19/950-0289-Revert-staging-vchiq_arm-Register-a-platform-device-.patch new file mode 100644 index 000000000..d428773a1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0289-Revert-staging-vchiq_arm-Register-a-platform-device-.patch @@ -0,0 +1,48 @@ +From f70b874a07779f015befed503790417c6bc1cfd2 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 4 Dec 2018 19:40:12 +0000 +Subject: [PATCH 289/703] Revert "staging: vchiq_arm: Register a platform + device for the audio driver" + +This reverts commit ab59590ed562b89db51fe46cee5db96b9bc5abd8. + +Issues have been observed in LibreElec as this was unconditionally +loading the audio driver instead of having the DT parameter to +enable it. + +Includes a partial revert of 2147700eb7a1b9e55e0684f0749114ce35d61571 +which fixed up the error handling. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 5 ----- + 1 file changed, 5 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -170,7 +170,6 @@ static struct class *vchiq_class; + static struct device *vchiq_dev; + static DEFINE_SPINLOCK(msg_queue_spinlock); + static struct platform_device *bcm2835_camera; +-static struct platform_device *bcm2835_audio; + static struct platform_device *bcm2835_codec; + static struct platform_device *vcsm_cma; + +@@ -3662,9 +3661,6 @@ static int vchiq_probe(struct platform_d + bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera"); + if (IS_ERR(bcm2835_camera)) + bcm2835_camera = NULL; +- bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio"); +- if (IS_ERR(bcm2835_audio)) +- bcm2835_audio = NULL; + bcm2835_codec = vchiq_register_child(pdev, "bcm2835-codec"); + if (IS_ERR(bcm2835_codec)) + bcm2835_codec = NULL; +@@ -3685,7 +3681,6 @@ failed_platform_init: + static int vchiq_remove(struct platform_device *pdev) + { + platform_device_unregister(bcm2835_codec); +- platform_device_unregister(bcm2835_audio); + platform_device_unregister(bcm2835_camera); + platform_device_unregister(vcsm_cma); + vchiq_debugfs_deinit(); diff --git a/target/linux/brcm2708/patches-4.19/950-0290-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch b/target/linux/brcm2708/patches-4.19/950-0290-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch new file mode 100644 index 000000000..b259f27e1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0290-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch @@ -0,0 +1,114 @@ +From 4a208b7269c8713ac3e9cb9348af76b2bb03e919 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 4 Dec 2018 20:41:19 +0000 +Subject: [PATCH 290/703] Revert "staging: bcm2835-audio: Drop DT dependency" + +This reverts commit 933bc853bb764e476b0b0f633588f46d20f1f76a. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 41 ++++++++++--------- + 1 file changed, 22 insertions(+), 19 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -4,17 +4,15 @@ + #include + + #include +-#include +-#include + #include + #include ++#include + + #include "bcm2835.h" + + static bool enable_hdmi; + static bool enable_headphones; + static bool enable_compat_alsa = true; +-static int num_channels = MAX_SUBSTREAMS; + + module_param(enable_hdmi, bool, 0444); + MODULE_PARM_DESC(enable_hdmi, "Enables HDMI virtual audio device"); +@@ -23,8 +21,6 @@ MODULE_PARM_DESC(enable_headphones, "Ena + module_param(enable_compat_alsa, bool, 0444); + MODULE_PARM_DESC(enable_compat_alsa, + "Enables ALSA compatibility virtual audio device"); +-module_param(num_channels, int, 0644); +-MODULE_PARM_DESC(num_channels, "Number of audio channels (default: 8)"); + + static void snd_devm_unregister_child(struct device *dev, void *res) + { +@@ -411,30 +407,31 @@ static int snd_add_child_devices(struct + return 0; + } + +-static int snd_bcm2835_alsa_probe(struct platform_device *pdev) ++static int snd_bcm2835_alsa_probe_dt(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; ++ u32 numchans; + int err; + +- if (num_channels <= 0 || num_channels > MAX_SUBSTREAMS) { +- num_channels = MAX_SUBSTREAMS; +- dev_warn(dev, "Illegal num_channels value, will use %u\n", +- num_channels); +- } +- +- dev->coherent_dma_mask = DMA_BIT_MASK(32); +- dev->dma_mask = &dev->coherent_dma_mask; +- err = of_dma_configure(dev, NULL, true); ++ err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", ++ &numchans); + if (err) { +- dev_err(dev, "Unable to setup DMA: %d\n", err); ++ dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); + return err; + } + ++ if (numchans == 0 || numchans > MAX_SUBSTREAMS) { ++ numchans = MAX_SUBSTREAMS; ++ dev_warn(dev, ++ "Illegal 'brcm,pwm-channels' value, will use %u\n", ++ numchans); ++ } ++ + err = bcm2835_devm_add_vchi_ctx(dev); + if (err) + return err; + +- err = snd_add_child_devices(dev, num_channels); ++ err = snd_add_child_devices(dev, numchans); + if (err) + return err; + +@@ -456,14 +453,21 @@ static int snd_bcm2835_alsa_resume(struc + + #endif + ++static const struct of_device_id snd_bcm2835_of_match_table[] = { ++ { .compatible = "brcm,bcm2835-audio",}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); ++ + static struct platform_driver bcm2835_alsa0_driver = { +- .probe = snd_bcm2835_alsa_probe, ++ .probe = snd_bcm2835_alsa_probe_dt, + #ifdef CONFIG_PM + .suspend = snd_bcm2835_alsa_suspend, + .resume = snd_bcm2835_alsa_resume, + #endif + .driver = { + .name = "bcm2835_audio", ++ .of_match_table = snd_bcm2835_of_match_table, + }, + }; + module_platform_driver(bcm2835_alsa0_driver); +@@ -471,4 +475,3 @@ module_platform_driver(bcm2835_alsa0_dri + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("platform:bcm2835_audio"); diff --git a/target/linux/brcm2708/patches-4.19/950-0291-ASoC-add-driver-for-3Dlab-Nano-soundcard-2758.patch b/target/linux/brcm2708/patches-4.19/950-0291-ASoC-add-driver-for-3Dlab-Nano-soundcard-2758.patch new file mode 100644 index 000000000..bca2e1315 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0291-ASoC-add-driver-for-3Dlab-Nano-soundcard-2758.patch @@ -0,0 +1,505 @@ +From b459fc35cd584d7f1c02da9f83f9238caa742c97 Mon Sep 17 00:00:00 2001 +From: dev-3Dlab <45081440+dev-3Dlab@users.noreply.github.com> +Date: Wed, 5 Dec 2018 10:59:11 +0100 +Subject: [PATCH 291/703] ASoC: add driver for 3Dlab Nano soundcard (#2758) + +Signed-off-by: GT +--- + .../overlays/3dlab-nano-player-overlay.dts | 32 ++ + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + sound/soc/bcm/3dlab-nano-player.c | 370 ++++++++++++++++++ + sound/soc/bcm/Kconfig | 6 + + sound/soc/bcm/Makefile | 2 + + 8 files changed, 419 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/3dlab-nano-player-overlay.dts + create mode 100644 sound/soc/bcm/3dlab-nano-player.c + +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/3dlab-nano-player-overlay.dts +@@ -0,0 +1,32 @@ ++// Definitions for 3Dlab Nano Player ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ nano-player@41 { ++ compatible = "3dlab,nano-player"; ++ reg = <0x41>; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ }; ++}; ++ ++// EOF +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -1,6 +1,7 @@ + # Overlays for the Raspberry Pi platform + + dtbo-$(CONFIG_ARCH_BCM2835) += \ ++ 3dlab-nano-player.dtbo \ + adau1977-adc.dtbo \ + adau7002-simple.dtbo \ + ads1015.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -199,6 +199,12 @@ Params: + and the other i2c baudrate parameters. + + ++Name: 3dlab-nano-player ++Info: Configures the 3Dlab Nano Player ++Load: dtoverlay=3dlab-nano-player ++Params: ++ ++ + Name: adau1977-adc + Info: Overlay for activation of ADAU1977 ADC codec over I2C for control + and I2S for data. +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -902,6 +902,7 @@ CONFIG_SND_USB_6FIRE=m + CONFIG_SND_USB_HIFACE=m + CONFIG_SND_SOC=m + CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -895,6 +895,7 @@ CONFIG_SND_USB_6FIRE=m + CONFIG_SND_USB_HIFACE=m + CONFIG_SND_SOC=m + CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m +--- /dev/null ++++ b/sound/soc/bcm/3dlab-nano-player.c +@@ -0,0 +1,370 @@ ++/* ++ * 3Dlab Nano Player ALSA SoC Audio driver. ++ * ++ * Copyright (C) 2018 3Dlab. ++ * ++ * Author: GT ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NANO_ID 0x00 ++#define NANO_VER 0x01 ++#define NANO_CFG 0x02 ++#define NANO_STATUS 0x03 ++#define NANO_SPI_ADDR 0x04 ++#define NANO_SPI_DATA 0x05 ++ ++#define NANO_ID_VAL 0x3D ++#define NANO_CFG_OFF 0x00 ++#define NANO_CFG_MULT1 0 ++#define NANO_CFG_MULT2 1 ++#define NANO_CFG_MULT4 2 ++#define NANO_CFG_MULT8 3 ++#define NANO_CFG_MULT16 4 ++#define NANO_CFG_CLK22 0 ++#define NANO_CFG_CLK24 BIT(3) ++#define NANO_CFG_DSD BIT(4) ++#define NANO_CFG_ENA BIT(5) ++#define NANO_CFG_BLINK BIT(6) ++#define NANO_STATUS_P1 BIT(0) ++#define NANO_STATUS_P2 BIT(1) ++#define NANO_STATUS_FLG BIT(2) ++#define NANO_STATUS_CLK BIT(3) ++#define NANO_SPI_READ 0 ++#define NANO_SPI_WRITE BIT(5) ++ ++#define NANO_DAC_CTRL1 0x00 ++#define NANO_DAC_CTRL2 0x01 ++#define NANO_DAC_CTRL3 0x02 ++#define NANO_DAC_LATT 0x03 ++#define NANO_DAC_RATT 0x04 ++ ++#define NANO_CTRL2_VAL 0x22 ++ ++static int nano_player_spi_write(struct regmap *map, ++ unsigned int reg, unsigned int val) ++{ ++ /* indirect register access */ ++ regmap_write(map, NANO_SPI_DATA, val); ++ regmap_write(map, NANO_SPI_ADDR, reg | NANO_SPI_WRITE); ++ return 0; ++} ++ ++static int nano_player_ctrl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ /* describe control element */ ++ if (strstr(kcontrol->id.name, "Volume")) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 100; ++ } else { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 1; ++ } ++ ++ return 0; ++} ++ ++static int nano_player_ctrl_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ /* program control value to hardware */ ++ struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); ++ struct regmap *regmap = snd_soc_card_get_drvdata(card); ++ ++ if (strstr(kcontrol->id.name, "Volume")) { ++ unsigned int vol = ucontrol->value.integer.value[0]; ++ unsigned int att = 255 - (2 * (100 - vol)); ++ ++ nano_player_spi_write(regmap, NANO_DAC_LATT, att); ++ nano_player_spi_write(regmap, NANO_DAC_RATT, att); ++ kcontrol->private_value = vol; ++ } else { ++ unsigned int mute = ucontrol->value.integer.value[0]; ++ unsigned int reg = NANO_CTRL2_VAL | mute; ++ ++ nano_player_spi_write(regmap, NANO_DAC_CTRL2, reg); ++ kcontrol->private_value = mute; ++ } ++ return 0; ++} ++ ++static int nano_player_ctrl_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ /* return last programmed value */ ++ ucontrol->value.integer.value[0] = kcontrol->private_value; ++ return 0; ++} ++ ++#define SOC_NANO_PLAYER_CTRL(xname) \ ++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ ++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, \ ++ .info = nano_player_ctrl_info, \ ++ .put = nano_player_ctrl_put, \ ++ .get = nano_player_ctrl_get } ++ ++static const struct snd_kcontrol_new nano_player_controls[] = { ++ SOC_NANO_PLAYER_CTRL("Master Playback Volume"), ++ SOC_NANO_PLAYER_CTRL("Master Playback Switch"), ++}; ++ ++static const unsigned int nano_player_rates[] = { ++ 44100, 48000, 88200, 96000, 176400, 192000, 352800, 384000, ++ 705600, 768000 /* only possible with fast clocks */ ++}; ++ ++static struct snd_pcm_hw_constraint_list nano_player_constraint_rates = { ++ .list = nano_player_rates, ++ .count = ARRAY_SIZE(nano_player_rates), ++}; ++ ++static int nano_player_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_card *card = rtd->card; ++ struct regmap *regmap = snd_soc_card_get_drvdata(card); ++ struct snd_soc_pcm_stream *cpu = &rtd->cpu_dai->driver->playback; ++ struct snd_soc_pcm_stream *codec = &rtd->codec_dai->driver->playback; ++ unsigned int sample_bits = 32; ++ unsigned int val; ++ ++ /* configure cpu dai */ ++ cpu->formats |= SNDRV_PCM_FMTBIT_DSD_U32_LE; ++ cpu->rate_max = 768000; ++ ++ /* configure dummy codec dai */ ++ codec->rate_min = 44100; ++ codec->rates = SNDRV_PCM_RATE_KNOT; ++ codec->formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE; ++ ++ /* configure max supported rate */ ++ regmap_read(regmap, NANO_STATUS, &val); ++ if (val & NANO_STATUS_CLK) { ++ dev_notice(card->dev, "Board with fast clocks installed\n"); ++ codec->rate_max = 768000; ++ } else { ++ dev_notice(card->dev, "Board with normal clocks installed\n"); ++ codec->rate_max = 384000; ++ } ++ ++ /* frame length enforced by hardware */ ++ return snd_soc_dai_set_bclk_ratio(rtd->cpu_dai, sample_bits * 2); ++} ++ ++static int nano_player_startup(struct snd_pcm_substream *substream) ++{ ++ return snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &nano_player_constraint_rates); ++} ++ ++static int nano_player_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_card *card = rtd->card; ++ struct regmap *regmap = snd_soc_card_get_drvdata(card); ++ unsigned int config = NANO_CFG_ENA; ++ struct snd_mask *fmt; ++ ++ /* configure PCM or DSD */ ++ fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); ++ if (snd_mask_test(fmt, SNDRV_PCM_FORMAT_DSD_U32_LE)) { ++ /* embed DSD in PCM data */ ++ snd_mask_none(fmt); ++ snd_mask_set(fmt, SNDRV_PCM_FORMAT_S32_LE); ++ /* enable DSD mode */ ++ config |= NANO_CFG_DSD; ++ } ++ ++ /* configure clocks */ ++ switch (params_rate(params)) { ++ case 44100: ++ config |= NANO_CFG_MULT1 | NANO_CFG_CLK22; ++ break; ++ case 88200: ++ config |= NANO_CFG_MULT2 | NANO_CFG_CLK22; ++ break; ++ case 176400: ++ config |= NANO_CFG_MULT4 | NANO_CFG_CLK22; ++ break; ++ case 352800: ++ config |= NANO_CFG_MULT8 | NANO_CFG_CLK22; ++ break; ++ case 705600: ++ config |= NANO_CFG_MULT16 | NANO_CFG_CLK22; ++ break; ++ case 48000: ++ config |= NANO_CFG_MULT1 | NANO_CFG_CLK24; ++ break; ++ case 96000: ++ config |= NANO_CFG_MULT2 | NANO_CFG_CLK24; ++ break; ++ case 192000: ++ config |= NANO_CFG_MULT4 | NANO_CFG_CLK24; ++ break; ++ case 384000: ++ config |= NANO_CFG_MULT8 | NANO_CFG_CLK24; ++ break; ++ case 768000: ++ config |= NANO_CFG_MULT16 | NANO_CFG_CLK24; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ dev_dbg(card->dev, "Send CFG register 0x%02X\n", config); ++ return regmap_write(regmap, NANO_CFG, config); ++} ++ ++static struct snd_soc_ops nano_player_ops = { ++ .startup = nano_player_startup, ++ .hw_params = nano_player_hw_params, ++}; ++ ++static struct snd_soc_dai_link nano_player_link = { ++ .name = "3Dlab Nano Player", ++ .stream_name = "3Dlab Nano Player HiFi", ++ .platform_name = "bcm2708-i2s.0", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_name = "snd-soc-dummy", ++ .codec_dai_name = "snd-soc-dummy-dai", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | ++ SND_SOC_DAIFMT_CONT | ++ SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ .init = nano_player_init, ++ .ops = &nano_player_ops, ++}; ++ ++static const struct regmap_config nano_player_regmap = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = 128, ++ .cache_type = REGCACHE_RBTREE, ++}; ++ ++static int nano_player_card_probe(struct snd_soc_card *card) ++{ ++ struct regmap *regmap = snd_soc_card_get_drvdata(card); ++ unsigned int val; ++ ++ /* check hardware integrity */ ++ regmap_read(regmap, NANO_ID, &val); ++ if (val != NANO_ID_VAL) { ++ dev_err(card->dev, "Invalid ID register 0x%02X\n", val); ++ return -ENODEV; ++ } ++ ++ /* report version to the user */ ++ regmap_read(regmap, NANO_VER, &val); ++ dev_notice(card->dev, "Started 3Dlab Nano Player driver (v%d)\n", val); ++ ++ /* enable internal audio bus and blink status LED */ ++ return regmap_write(regmap, NANO_CFG, NANO_CFG_ENA | NANO_CFG_BLINK); ++} ++ ++static int nano_player_card_remove(struct snd_soc_card *card) ++{ ++ /* disable internal audio bus */ ++ struct regmap *regmap = snd_soc_card_get_drvdata(card); ++ ++ return regmap_write(regmap, NANO_CFG, NANO_CFG_OFF); ++} ++ ++static struct snd_soc_card nano_player_card = { ++ .name = "3Dlab_Nano_Player", ++ .owner = THIS_MODULE, ++ .dai_link = &nano_player_link, ++ .num_links = 1, ++ .controls = nano_player_controls, ++ .num_controls = ARRAY_SIZE(nano_player_controls), ++ .probe = nano_player_card_probe, ++ .remove = nano_player_card_remove, ++}; ++ ++static int nano_player_i2c_probe(struct i2c_client *i2c, ++ const struct i2c_device_id *id) ++{ ++ struct regmap *regmap; ++ int ret; ++ ++ regmap = devm_regmap_init_i2c(i2c, &nano_player_regmap); ++ if (IS_ERR(regmap)) { ++ ret = PTR_ERR(regmap); ++ dev_err(&i2c->dev, "Failed to init regmap %d\n", ret); ++ return ret; ++ } ++ ++ if (i2c->dev.of_node) { ++ struct snd_soc_dai_link *dai = &nano_player_link; ++ struct device_node *node; ++ ++ /* cpu handle configured by device tree */ ++ node = of_parse_phandle(i2c->dev.of_node, "i2s-controller", 0); ++ if (node) { ++ dai->platform_name = NULL; ++ dai->platform_of_node = node; ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = node; ++ } ++ } ++ ++ nano_player_card.dev = &i2c->dev; ++ snd_soc_card_set_drvdata(&nano_player_card, regmap); ++ ret = devm_snd_soc_register_card(&i2c->dev, &nano_player_card); ++ ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&i2c->dev, "Failed to register card %d\n", ret); ++ ++ return ret; ++} ++ ++static const struct of_device_id nano_player_of_match[] = { ++ { .compatible = "3dlab,nano-player", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, nano_player_of_match); ++ ++static const struct i2c_device_id nano_player_i2c_id[] = { ++ { "nano-player", 0 }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, nano_player_i2c_id); ++ ++static struct i2c_driver nano_player_i2c_driver = { ++ .probe = nano_player_i2c_probe, ++ .id_table = nano_player_i2c_id, ++ .driver = { ++ .name = "nano-player", ++ .owner = THIS_MODULE, ++ .of_match_table = nano_player_of_match, ++ }, ++}; ++ ++module_i2c_driver(nano_player_i2c_driver); ++ ++MODULE_DESCRIPTION("ASoC 3Dlab Nano Player driver"); ++MODULE_AUTHOR("GT "); ++MODULE_LICENSE("GPL v2"); ++ ++/* EOF */ +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -17,6 +17,12 @@ config SND_SOC_CYGNUS + + If you don't know what to do here, say N. + ++config SND_BCM2708_SOC_3DLAB_NANO_PLAYER ++ tristate "Support for 3Dlab Nano Player" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ help ++ Say Y or M if you want to add support for 3Dlab Nano Player. ++ + config SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD + tristate "Support for Google voiceHAT soundcard" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- + snd-soc-googlevoicehat-codec-objs := googlevoicehat-codec.o + + # BCM2708 Machine Support ++snd-soc-3dlab-nano-player-objs := 3dlab-nano-player.o + snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o + snd-soc-justboom-dac-objs := justboom-dac.o + snd-soc-rpi-cirrus-objs := rpi-cirrus.o +@@ -31,6 +32,7 @@ snd-soc-fe-pi-audio-objs := fe-pi-audio. + snd-soc-rpi-simple-soundcard-objs := rpi-simple-soundcard.o + snd-soc-rpi-wm8804-soundcard-objs := rpi-wm8804-soundcard.o + ++obj-$(CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER) += snd-soc-3dlab-nano-player.o + obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o + obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o diff --git a/target/linux/brcm2708/patches-4.19/950-0292-overlays-Update-README-with-removal-of-lirc-rpi.patch b/target/linux/brcm2708/patches-4.19/950-0292-overlays-Update-README-with-removal-of-lirc-rpi.patch new file mode 100644 index 000000000..9adabcc8b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0292-overlays-Update-README-with-removal-of-lirc-rpi.patch @@ -0,0 +1,91 @@ +From a7544b1d73143b69134dd9ec665d0013775aca50 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 5 Dec 2018 11:56:40 +0000 +Subject: [PATCH 292/703] overlays: Update README with removal of lirc-rpi + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 57 ++++++++++++------------------- + 1 file changed, 21 insertions(+), 36 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -56,23 +56,29 @@ have its contents deleted (or commented + Using Overlays + ============== + +-Overlays are loaded using the "dtoverlay" directive. As an example, consider +-the popular lirc-rpi module, the Linux Infrared Remote Control driver. In the +-pre-DT world this would be loaded from /etc/modules, with an explicit +-"modprobe lirc-rpi" command, or programmatically by lircd. With DT enabled, +-this becomes a line in config.txt: +- +- dtoverlay=lirc-rpi +- +-This causes the file /boot/overlays/lirc-rpi.dtbo to be loaded. By +-default it will use GPIOs 17 (out) and 18 (in), but this can be modified using +-DT parameters: +- +- dtoverlay=lirc-rpi,gpio_out_pin=17,gpio_in_pin=13 +- +-Parameters always have default values, although in some cases (e.g. "w1-gpio") +-it is necessary to provided multiple overlays in order to get the desired +-behaviour. See the list of overlays below for a description of the parameters ++Overlays are loaded using the "dtoverlay" config.txt setting. As an example, ++consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded ++by writing a magic string comprising a device identifier and an I2C address to ++a special file in /sys/class/i2c-adapter, having first loaded the driver for ++the I2C interface and the RTC device - something like this: ++ ++ modprobe i2c-bcm2835 ++ modprobe rtc-ds1307 ++ echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device ++ ++With DT enabled, this becomes a line in config.txt: ++ ++ dtoverlay=i2c-rtc,ds1307 ++ ++This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node" ++describing the DS1307 I2C device to be added to the Device Tree for the Pi. By ++default it usees address 0x68, but this can be modified with an additional DT ++parameter: ++ ++ dtoverlay=i2c-rtc,ds1307,addr=0x68 ++ ++Parameters usually have default values, although certain parameters are ++mandatory. See the list of overlays below for a description of the parameters + and their defaults. + + The Overlay and Parameter Reference +@@ -1135,29 +1141,8 @@ Params: + + + Name: lirc-rpi +-Info: Configures lirc-rpi (Linux Infrared Remote Control for Raspberry Pi) +- Consult the module documentation for more details. +-Load: dtoverlay=lirc-rpi,= +-Params: gpio_out_pin GPIO for output (default "17") +- +- gpio_in_pin GPIO for input (default "18") +- +- gpio_in_pull Pull up/down/off on the input pin +- (default "down") +- +- sense Override the IR receive auto-detection logic: +- "0" = force active-high +- "1" = force active-low +- "-1" = use auto-detection +- (default "-1") +- +- softcarrier Turn the software carrier "on" or "off" +- (default "on") +- +- invert "on" = invert the output pin (default "off") +- +- debug "on" = enable additional debug messages +- (default "off") ++Info: This overlay has been deprecated and removed - see gpio-ir ++Load: + + + Name: ltc294x diff --git a/target/linux/brcm2708/patches-4.19/950-0293-staging-bcm2835-camera-Check-the-error-for-REPEAT_SE.patch b/target/linux/brcm2708/patches-4.19/950-0293-staging-bcm2835-camera-Check-the-error-for-REPEAT_SE.patch new file mode 100644 index 000000000..1216424e1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0293-staging-bcm2835-camera-Check-the-error-for-REPEAT_SE.patch @@ -0,0 +1,31 @@ +From c2423f2fef7098dac416a1b49b3f9efbbbbd3293 Mon Sep 17 00:00:00 2001 +From: 6by9 <6by9@users.noreply.github.com> +Date: Tue, 11 Dec 2018 15:18:02 +0000 +Subject: [PATCH 293/703] staging: bcm2835-camera: Check the error for + REPEAT_SEQ_HEADER (#2782) + +When handling for V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER was added +the firmware would reject the setting if H264 hadn't already been +selected. This was fixed in the firmware at that point, but to +enable backwards compatibility the returned error was ignored. + +That was Dec 2013, so the chances of having a firmware that still +has that issue is so close to zero that the workaround can be +removed. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/controls.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -1100,7 +1100,7 @@ static const struct bm2835_mmal_v4l2_ctr + 0, 1, NULL, + MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER, + &ctrl_set_video_encode_param_output, +- true /* Errors ignored as requires latest firmware to work */ ++ false + }, + { + V4L2_CID_MPEG_VIDEO_H264_PROFILE, diff --git a/target/linux/brcm2708/patches-4.19/950-0294-gpio-ir-change-default-pull-configuration-to-up.patch b/target/linux/brcm2708/patches-4.19/950-0294-gpio-ir-change-default-pull-configuration-to-up.patch new file mode 100644 index 000000000..8cc791d63 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0294-gpio-ir-change-default-pull-configuration-to-up.patch @@ -0,0 +1,47 @@ +From 550dce51930fca1d5dc2a00a7a6f172fbb4e5b56 Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Wed, 9 Jan 2019 14:51:01 +0100 +Subject: [PATCH 294/703] gpio-ir: change default pull configuration to up + +IR receivers like the TSOP series from Vishay and compatible ones +have active-low open collector outputs with an internal pull up of +about 30k (according to the TSOP datasheets). + +Activating a pull-down resistor on the GPIO will make it work against +the pull-up in the IR receiver and brings the idle input voltage down +to about 1.9V (measured on a RPi3B+ with a TSOP4438). While that's +usually enough to make the RPi see a high signal it's certainly not +optimal and may even fail when using an IR receiver with a weaker pull-up. + +Switching the default GPIO pull to "up" results in an input voltage +level of about 3.3V and ensures that an idle state (high signal) will +be detected if no IR receiver is attached. + +Signed-off-by: Matthias Reichl +--- + arch/arm/boot/dts/overlays/README | 2 +- + arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -611,7 +611,7 @@ Load: dtoverlay=gpio-ir,= + Params: gpio_pin Input pin number. Default is 18. + + gpio_pull Desired pull-up/down state (off, down, up) +- Default is "down". ++ Default is "up". + + rc-map-name Default rc keymap (can also be changed by + ir-keytable), defaults to "rc-rc6-mce" +--- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts +@@ -30,7 +30,7 @@ + gpio_ir_pins: gpio_ir_pins@12 { + brcm,pins = <18>; // pin 18 + brcm,function = <0>; // in +- brcm,pull = <1>; // down ++ brcm,pull = <2>; // up + }; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0295-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch b/target/linux/brcm2708/patches-4.19/950-0295-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch new file mode 100644 index 000000000..0e4a22409 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0295-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch @@ -0,0 +1,79 @@ +From 127e0899869365f5dc078e1ed84429ce81df90dc Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 10 Jan 2019 17:58:06 +0000 +Subject: [PATCH 295/703] firmware: raspberrypi: Report the fw variant during + probe + +The driver already reported the firmware build date during probe. +The mailbox calls have been extended to also report the variant + 1 = standard start.elf + 2 = start_x.elf (includes camera stack) + 3 = start_db.elf (includes assert logging) + 4 = start_cd.elf (cutdown version for smallest memory footprint). +Log the variant during probe. + +Signed-off-by: Dave Stevenson +--- + drivers/firmware/raspberrypi.c | 32 +++++++++++++++++----- + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 2 files changed, 26 insertions(+), 7 deletions(-) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -227,21 +227,39 @@ static const struct attribute_group rpi_ + static void + rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) + { ++ static const char * const variant_strs[] = { ++ "unknown", ++ "start", ++ "start_x", ++ "start_db", ++ "start_cd", ++ }; ++ const char *variant_str = "cmd unsupported"; + u32 packet; ++ u32 variant; ++ struct tm tm; + int ret = rpi_firmware_property(fw, + RPI_FIRMWARE_GET_FIRMWARE_REVISION, + &packet, sizeof(packet)); + +- if (ret == 0) { +- struct tm tm; ++ if (ret) ++ return; + +- time64_to_tm(packet, 0, &tm); ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_FIRMWARE_VARIANT, ++ &variant, sizeof(variant)); + +- dev_info(fw->cl.dev, +- "Attached to firmware from %04ld-%02d-%02d %02d:%02d\n", +- tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, +- tm.tm_hour, tm.tm_min); ++ if (!ret) { ++ if (variant >= ARRAY_SIZE(variant_strs)) ++ variant = 0; ++ variant_str = variant_strs[variant]; + } ++ ++ time64_to_tm(packet, 0, &tm); ++ ++ dev_info(fw->cl.dev, ++ "Attached to firmware from %04ld-%02d-%02d %02d:%02d, variant %s\n", ++ tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, ++ tm.tm_min, variant_str); + } + + static void +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -41,6 +41,7 @@ struct rpi_firmware_property_tag_header + enum rpi_firmware_property_tag { + RPI_FIRMWARE_PROPERTY_END = 0, + RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001, ++ RPI_FIRMWARE_GET_FIRMWARE_VARIANT = 0x00000002, + + RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010, + RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011, diff --git a/target/linux/brcm2708/patches-4.19/950-0296-firmware-raspberrypi-Report-the-fw-git-hash-during-p.patch b/target/linux/brcm2708/patches-4.19/950-0296-firmware-raspberrypi-Report-the-fw-git-hash-during-p.patch new file mode 100644 index 000000000..8194883bd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0296-firmware-raspberrypi-Report-the-fw-git-hash-during-p.patch @@ -0,0 +1,58 @@ +From 66d4a3ecb20bca91bc9e209cc8dc7730dffb0b57 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 10 Jan 2019 18:48:54 +0000 +Subject: [PATCH 296/703] firmware: raspberrypi: Report the fw git hash during + probe + +The firmware can now report the git hash from which it was built +via the mailbox, so report it during probe. + +Signed-off-by: Dave Stevenson +--- + drivers/firmware/raspberrypi.c | 17 +++++++++++++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 2 files changed, 18 insertions(+) + +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -263,6 +263,22 @@ rpi_firmware_print_firmware_revision(str + } + + static void ++rpi_firmware_print_firmware_hash(struct rpi_firmware *fw) ++{ ++ u32 hash[5]; ++ int ret = rpi_firmware_property(fw, ++ RPI_FIRMWARE_GET_FIRMWARE_HASH, ++ hash, sizeof(hash)); ++ ++ if (ret) ++ return; ++ ++ dev_info(fw->cl.dev, ++ "Firmware hash is %08x%08x%08x%08x%08x\n", ++ hash[0], hash[1], hash[2], hash[3], hash[4]); ++} ++ ++static void + rpi_register_hwmon_driver(struct device *dev, struct rpi_firmware *fw) + { + u32 packet; +@@ -308,6 +324,7 @@ static int rpi_firmware_probe(struct pla + g_pdev = pdev; + + rpi_firmware_print_firmware_revision(fw); ++ rpi_firmware_print_firmware_hash(fw); + rpi_register_hwmon_driver(dev, fw); + + return 0; +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -42,6 +42,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_PROPERTY_END = 0, + RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001, + RPI_FIRMWARE_GET_FIRMWARE_VARIANT = 0x00000002, ++ RPI_FIRMWARE_GET_FIRMWARE_HASH = 0x00000003, + + RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010, + RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011, diff --git a/target/linux/brcm2708/patches-4.19/950-0297-arm64-dts-broadcom-Enable-fixups-for-overlays.patch b/target/linux/brcm2708/patches-4.19/950-0297-arm64-dts-broadcom-Enable-fixups-for-overlays.patch new file mode 100644 index 000000000..69e1d6592 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0297-arm64-dts-broadcom-Enable-fixups-for-overlays.patch @@ -0,0 +1,23 @@ +From e09f9e3d46d8a393d54e414a718d232d13169a29 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 15 Jan 2019 09:56:41 +0000 +Subject: [PATCH 297/703] arm64: dts: broadcom: Enable fixups for overlays + +See: https://github.com/raspberrypi/linux/pull/2733 + +Signed-off-by: Phil Elwell +--- + arch/arm64/boot/dts/broadcom/Makefile | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm64/boot/dts/broadcom/Makefile ++++ b/arch/arm64/boot/dts/broadcom/Makefile +@@ -9,3 +9,8 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rp + + subdir-y += northstar2 + subdir-y += stingray ++ ++# Enable fixups to support overlays on BCM2835 platforms ++ifeq ($(CONFIG_ARCH_BCM2835),y) ++ DTC_FLAGS ?= -@ ++endif diff --git a/target/linux/brcm2708/patches-4.19/950-0298-sc16is7xx-Fix-for-Unexpected-interrupt-8.patch b/target/linux/brcm2708/patches-4.19/950-0298-sc16is7xx-Fix-for-Unexpected-interrupt-8.patch new file mode 100644 index 000000000..8c980ce43 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0298-sc16is7xx-Fix-for-Unexpected-interrupt-8.patch @@ -0,0 +1,110 @@ +From 2328af8468b09a20258488b2126449aa8539ee5a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 18 May 2018 10:26:59 +0100 +Subject: [PATCH 298/703] sc16is7xx: Fix for "Unexpected interrupt: 8" + +The SC16IS752 has an Enhanced Feature Register which is aliased at the +same address as the Interrupt Identification Register; accessing it +requires that a magic value is written to the Line Configuration +Register. If an interrupt is raised while the EFR is mapped in then +the ISR won't be able to access the IIR, leading to the "Unexpected +interrupt" error messages. + +Avoid the problem by claiming a mutex around accesses to the EFR +register, also claiming the mutex in the interrupt handler work +item (this is equivalent to disabling interrupts to interlock against +a non-threaded interrupt handler). + +See: https://github.com/raspberrypi/linux/issues/2529 + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/sc16is7xx.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/tty/serial/sc16is7xx.c ++++ b/drivers/tty/serial/sc16is7xx.c +@@ -328,6 +328,7 @@ struct sc16is7xx_port { + struct kthread_worker kworker; + struct task_struct *kworker_task; + struct kthread_work irq_work; ++ struct mutex efr_lock; + struct sc16is7xx_one p[0]; + }; + +@@ -499,6 +500,21 @@ static int sc16is7xx_set_baud(struct uar + div /= 4; + } + ++ /* In an amazing feat of design, the Enhanced Features Register shares ++ * the address of the Interrupt Identification Register, and is ++ * switched in by writing a magic value (0xbf) to the Line Control ++ * Register. Any interrupt firing during this time will see the EFR ++ * where it expects the IIR to be, leading to "Unexpected interrupt" ++ * messages. ++ * ++ * Prevent this possibility by claiming a mutex while accessing the ++ * EFR, and claiming the same mutex from within the interrupt handler. ++ * This is similar to disabling the interrupt, but that doesn't work ++ * because the bulk of the interrupt processing is run as a workqueue ++ * job in thread context. ++ */ ++ mutex_lock(&s->efr_lock); ++ + lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG); + + /* Open the LCR divisors for configuration */ +@@ -514,6 +530,8 @@ static int sc16is7xx_set_baud(struct uar + /* Put LCR back to the normal mode */ + sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); + ++ mutex_unlock(&s->efr_lock); ++ + sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, + SC16IS7XX_MCR_CLKSEL_BIT, + prescaler); +@@ -698,6 +716,8 @@ static void sc16is7xx_ist(struct kthread + { + struct sc16is7xx_port *s = to_sc16is7xx_port(ws, irq_work); + ++ mutex_lock(&s->efr_lock); ++ + while (1) { + bool keep_polling = false; + int i; +@@ -707,6 +727,8 @@ static void sc16is7xx_ist(struct kthread + if (!keep_polling) + break; + } ++ ++ mutex_unlock(&s->efr_lock); + } + + static irqreturn_t sc16is7xx_irq(int irq, void *dev_id) +@@ -901,6 +923,9 @@ static void sc16is7xx_set_termios(struct + if (!(termios->c_cflag & CREAD)) + port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK; + ++ /* As above, claim the mutex while accessing the EFR. */ ++ mutex_lock(&s->efr_lock); ++ + sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, + SC16IS7XX_LCR_CONF_MODE_B); + +@@ -922,6 +947,8 @@ static void sc16is7xx_set_termios(struct + /* Update LCR register */ + sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr); + ++ mutex_unlock(&s->efr_lock); ++ + /* Get baud rate generator configuration */ + baud = uart_get_baud_rate(port, termios, old, + port->uartclk / 16 / 4 / 0xffff, +@@ -1187,6 +1214,7 @@ static int sc16is7xx_probe(struct device + s->regmap = regmap; + s->devtype = devtype; + dev_set_drvdata(dev, s); ++ mutex_init(&s->efr_lock); + + kthread_init_worker(&s->kworker); + kthread_init_work(&s->irq_work, sc16is7xx_ist); diff --git a/target/linux/brcm2708/patches-4.19/950-0299-dtoverlays-fe-pi-audio-fix-sgtl5000-compatible-strin.patch b/target/linux/brcm2708/patches-4.19/950-0299-dtoverlays-fe-pi-audio-fix-sgtl5000-compatible-strin.patch new file mode 100644 index 000000000..21237ed4b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0299-dtoverlays-fe-pi-audio-fix-sgtl5000-compatible-strin.patch @@ -0,0 +1,27 @@ +From 4e7767bc63406cf8a4cb2cdcf86c2592c07440f6 Mon Sep 17 00:00:00 2001 +From: Ben Wolsieffer +Date: Sun, 9 Dec 2018 16:46:00 -0500 +Subject: [PATCH 299/703] dtoverlays: fe-pi-audio: fix sgtl5000 compatible + string + +The compatible string was set to "fepi,sgtl5000", which worked for some +reason in 4.14, but does not work in 4.19, presumably due to some +change in the kernel matching logic. The correct string is +"fsl,sgtl5000". + +Signed-off-by: Ben Wolsieffer +--- + arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts +@@ -39,7 +39,7 @@ + + sgtl5000@0a { + #sound-dai-cells = <0>; +- compatible = "fepi,sgtl5000"; ++ compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&sgtl5000_mclk>; + micbias-resistor-k-ohms = <2>; diff --git a/target/linux/brcm2708/patches-4.19/950-0300-bcm2835_smi-re-add-dereference-to-fix-DMA-transfers.patch b/target/linux/brcm2708/patches-4.19/950-0300-bcm2835_smi-re-add-dereference-to-fix-DMA-transfers.patch new file mode 100644 index 000000000..9512c1291 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0300-bcm2835_smi-re-add-dereference-to-fix-DMA-transfers.patch @@ -0,0 +1,20 @@ +From 6edc58ab2e73fc38ba380de57e8a416cfaaba512 Mon Sep 17 00:00:00 2001 +From: Ezekiel Bethel +Date: Wed, 12 Dec 2018 19:11:13 +0000 +Subject: [PATCH 300/703] bcm2835_smi: re-add dereference to fix DMA transfers + +--- + drivers/misc/bcm2835_smi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/misc/bcm2835_smi.c ++++ b/drivers/misc/bcm2835_smi.c +@@ -879,7 +879,7 @@ static int bcm2835_smi_probe(struct plat + goto err; + } + addr = of_get_address(node, 0, NULL, NULL); +- inst->smi_regs_busaddr = be32_to_cpu(addr); ++ inst->smi_regs_busaddr = be32_to_cpu(*addr); + + err = bcm2835_smi_dma_setup(inst); + if (err) diff --git a/target/linux/brcm2708/patches-4.19/950-0301-lan78xx-Debounce-link-events-to-minimize-poll-storm.patch b/target/linux/brcm2708/patches-4.19/950-0301-lan78xx-Debounce-link-events-to-minimize-poll-storm.patch new file mode 100644 index 000000000..f5ca286e7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0301-lan78xx-Debounce-link-events-to-minimize-poll-storm.patch @@ -0,0 +1,44 @@ +From 643d2b5c276c5d2967b857256a983ae7860607a1 Mon Sep 17 00:00:00 2001 +From: Joshua Emele +Date: Wed, 7 Nov 2018 16:07:40 -0800 +Subject: [PATCH 301/703] lan78xx: Debounce link events to minimize poll storm + +The bInterval is set to 4 (i.e. 8 microframes => 1ms) and the only bit +that the driver pays attention to is "link was reset". If there's a +flapping status bit in that endpoint data, (such as if PHY negotiation +needs a few tries to get a stable link) then polling at a slower rate +would act as a de-bounce. + +See: https://github.com/raspberrypi/linux/issues/2447 +--- + drivers/net/usb/lan78xx.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -448,6 +448,11 @@ static bool enable_tso; + module_param(enable_tso, bool, 0644); + MODULE_PARM_DESC(enable_tso, "Enables TCP segmentation offload"); + ++#define INT_URB_MICROFRAMES_PER_MS 8 ++static int int_urb_interval_ms = 8; ++module_param(int_urb_interval_ms, int, 0); ++MODULE_PARM_DESC(int_urb_interval_ms, "Override usb interrupt urb interval"); ++ + static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) + { + u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL); +@@ -3816,7 +3821,12 @@ static int lan78xx_probe(struct usb_inte + dev->pipe_intr = usb_rcvintpipe(dev->udev, + dev->ep_intr->desc.bEndpointAddress & + USB_ENDPOINT_NUMBER_MASK); +- period = dev->ep_intr->desc.bInterval; ++ if (int_urb_interval_ms <= 0) ++ period = dev->ep_intr->desc.bInterval; ++ else ++ period = int_urb_interval_ms * INT_URB_MICROFRAMES_PER_MS; ++ ++ netif_notice(dev, probe, netdev, "int urb period %d\n", period); + + maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0); + buf = kmalloc(maxp, GFP_KERNEL); diff --git a/target/linux/brcm2708/patches-4.19/950-0302-ASoC-Add-support-for-AudioSense-Pi-add-on-soundcard.patch b/target/linux/brcm2708/patches-4.19/950-0302-ASoC-Add-support-for-AudioSense-Pi-add-on-soundcard.patch new file mode 100644 index 000000000..f2cd3aa15 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0302-ASoC-Add-support-for-AudioSense-Pi-add-on-soundcard.patch @@ -0,0 +1,320 @@ +From 99324d4b613b3ee56683446abbd96623c6a64887 Mon Sep 17 00:00:00 2001 +From: b-ak +Date: Thu, 3 Jan 2019 00:01:08 +0530 +Subject: [PATCH 302/703] ASoC: Add support for AudioSense-Pi add-on soundcard + +AudioSense-Pi is a RPi HAT based on a TI's TLV320AIC32x4 stereo codec + +This hardware provides multiple audio I/O capabilities to the RPi. +The codec connects to the RPi's SoC through the I2S Bus. + +The following devices can be connected through a 3.5mm jack + 1. Line-In: Plain old audio in from mobile phones, PCs, etc., + 2. Mic-In: Connect a microphone + 3. Line-Out: Connect the output to a speaker + 4. Headphones: Connect a Headphone w or w/o microphones + +Multiple Inputs: + It supports the following combinations + 1. Two stereo Line-Inputs and a microphone + 2. One stereo Line-Input and two microphones + 3. Two stereo Line-Inputs, a microphone and + one mono line-input (with h/w hack) + 4. One stereo Line-Input, two microphones and + one mono line-input (with h/w hack) + +Multiple Outputs: + Audio output can be routed to the headphones or + speakers (with additional hardware) + +Signed-off-by: b-ak +--- + sound/soc/bcm/Kconfig | 7 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/audiosense-pi.c | 246 ++++++++++++++++++++++++++++++++++ + 3 files changed, 255 insertions(+) + create mode 100644 sound/soc/bcm/audiosense-pi.c + +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -137,6 +137,13 @@ config SND_AUDIOINJECTOR_OCTO_SOUNDCARD + help + Say Y or M if you want to add support for audioinjector.net octo add on + ++config SND_AUDIOSENSE_PI ++ tristate "Support for AudioSense Add-On Soundcard" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_TLV320AIC32X4_I2C ++ help ++ Say Y or M if you want to add support for tlv320aic32x4 add-on ++ + config SND_DIGIDAC1_SOUNDCARD + tristate "Support for Red Rocks Audio DigiDAC1" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -20,6 +20,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o + snd-soc-iqaudio-dac-objs := iqaudio-dac.o + snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o + snd-soc-audioinjector-octo-soundcard-objs := audioinjector-octo-soundcard.o ++snd-soc-audiosense-pi-objs := audiosense-pi.o + snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o + snd-soc-dionaudio-loco-objs := dionaudio_loco.o + snd-soc-dionaudio-loco-v2-objs := dionaudio_loco-v2.o +@@ -41,6 +42,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) + obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o + obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o + obj-$(CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD) += snd-soc-audioinjector-octo-soundcard.o ++obj-$(CONFIG_SND_AUDIOSENSE_PI) += snd-soc-audiosense-pi.o + obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o + obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o + obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2) += snd-soc-dionaudio-loco-v2.o +--- /dev/null ++++ b/sound/soc/bcm/audiosense-pi.c +@@ -0,0 +1,246 @@ ++/* ++ * ASoC Driver for AudioSense add on soundcard ++ * Author: ++ * Bhargav A K ++ * Copyright 2017 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "../codecs/tlv320aic32x4.h" ++ ++#define AIC32X4_SYSCLK_XTAL 0x00 ++ ++/* ++ * Setup Codec Sample Rates and Channels ++ * Supported Rates: ++ * 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, 88200, 96000, ++ */ ++static const unsigned int audiosense_pi_rate[] = { ++ 48000, ++}; ++ ++static struct snd_pcm_hw_constraint_list audiosense_constraints_rates = { ++ .list = audiosense_pi_rate, ++ .count = ARRAY_SIZE(audiosense_pi_rate), ++}; ++ ++static const unsigned int audiosense_pi_channels[] = { ++ 2, ++}; ++ ++static struct snd_pcm_hw_constraint_list audiosense_constraints_ch = { ++ .count = ARRAY_SIZE(audiosense_pi_channels), ++ .list = audiosense_pi_channels, ++ .mask = 0, ++}; ++ ++/* Setup DAPM widgets and paths */ ++static const struct snd_soc_dapm_widget audiosense_pi_dapm_widgets[] = { ++ SND_SOC_DAPM_HP("Headphone Jack", NULL), ++ SND_SOC_DAPM_LINE("Line Out", NULL), ++ SND_SOC_DAPM_LINE("Line In", NULL), ++ SND_SOC_DAPM_INPUT("CM_L"), ++ SND_SOC_DAPM_INPUT("CM_R"), ++}; ++ ++static const struct snd_soc_dapm_route audiosense_pi_audio_map[] = { ++ /* Line Inputs are connected to ++ * (IN1_L | IN1_R) ++ * (IN2_L | IN2_R) ++ * (IN3_L | IN3_R) ++ */ ++ {"IN1_L", NULL, "Line In"}, ++ {"IN1_R", NULL, "Line In"}, ++ {"IN2_L", NULL, "Line In"}, ++ {"IN2_R", NULL, "Line In"}, ++ {"IN3_L", NULL, "Line In"}, ++ {"IN3_R", NULL, "Line In"}, ++ ++ /* Mic is connected to IN2_L and IN2_R */ ++ {"Left ADC", NULL, "Mic Bias"}, ++ {"Right ADC", NULL, "Mic Bias"}, ++ ++ /* Headphone connected to HPL, HPR */ ++ {"Headphone Jack", NULL, "HPL"}, ++ {"Headphone Jack", NULL, "HPR"}, ++ ++ /* Speakers connected to LOL and LOR */ ++ {"Line Out", NULL, "LOL"}, ++ {"Line Out", NULL, "LOR"}, ++}; ++ ++static int audiosense_pi_card_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ /* TODO: init of the codec specific dapm data, ignore suspend/resume */ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_soc_component_update_bits(component, AIC32X4_MICBIAS, 0x78, ++ AIC32X4_MICBIAS_LDOIN | ++ AIC32X4_MICBIAS_2075V); ++ snd_soc_component_update_bits(component, AIC32X4_PWRCFG, 0x08, ++ AIC32X4_AVDDWEAKDISABLE); ++ snd_soc_component_update_bits(component, AIC32X4_LDOCTL, 0x01, ++ AIC32X4_LDOCTLEN); ++ ++ return 0; ++} ++ ++static int audiosense_pi_card_hw_params( ++ struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ int ret = 0; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ /* Set the codec system clock, there is a 12 MHz XTAL on the board */ ++ ret = snd_soc_dai_set_sysclk(codec_dai, AIC32X4_SYSCLK_XTAL, ++ 12000000, SND_SOC_CLOCK_IN); ++ if (ret) { ++ dev_err(rtd->card->dev, ++ "could not set codec driver clock params\n"); ++ return ret; ++ } ++ return 0; ++} ++ ++static int audiosense_pi_card_startup(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ ++ /* ++ * Set codec to 48Khz Sampling, Stereo I/O and 16 bit audio ++ */ ++ runtime->hw.channels_max = 2; ++ snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, ++ &audiosense_constraints_ch); ++ ++ runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE; ++ snd_pcm_hw_constraint_msbits(runtime, 0, 16, 16); ++ ++ ++ snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &audiosense_constraints_rates); ++ return 0; ++} ++ ++static struct snd_soc_ops audiosense_pi_card_ops = { ++ .startup = audiosense_pi_card_startup, ++ .hw_params = audiosense_pi_card_hw_params, ++}; ++ ++static struct snd_soc_dai_link audiosense_pi_card_dai[] = { ++ { ++ .name = "TLV320AIC3204 Audio", ++ .stream_name = "TLV320AIC3204 Hifi Audio", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "tlv320aic32x4-hifi", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "tlv320aic32x4.1-0018", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ .ops = &audiosense_pi_card_ops, ++ .init = audiosense_pi_card_init, ++ }, ++}; ++ ++static struct snd_soc_card audiosense_pi_card = { ++ .name = "audiosense-pi", ++ .driver_name = "audiosense-pi", ++ .dai_link = audiosense_pi_card_dai, ++ .owner = THIS_MODULE, ++ .num_links = ARRAY_SIZE(audiosense_pi_card_dai), ++ .dapm_widgets = audiosense_pi_dapm_widgets, ++ .num_dapm_widgets = ARRAY_SIZE(audiosense_pi_dapm_widgets), ++ .dapm_routes = audiosense_pi_audio_map, ++ .num_dapm_routes = ARRAY_SIZE(audiosense_pi_audio_map), ++}; ++ ++static int audiosense_pi_card_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct snd_soc_card *card = &audiosense_pi_card; ++ struct snd_soc_dai_link *dai = &audiosense_pi_card_dai[0]; ++ struct device_node *i2s_node = pdev->dev.of_node; ++ ++ card->dev = &pdev->dev; ++ ++ if (!dai) { ++ dev_err(&pdev->dev, "DAI not found. Missing or Invalid\n"); ++ return -EINVAL; ++ } ++ ++ i2s_node = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0); ++ if (!i2s_node) { ++ dev_err(&pdev->dev, ++ "Property 'i2s-controller' missing or invalid\n"); ++ return -EINVAL; ++ } ++ ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ ++ of_node_put(i2s_node); ++ ++ ret = snd_soc_register_card(card); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static int audiosense_pi_card_remove(struct platform_device *pdev) ++{ ++ struct snd_soc_card *card = platform_get_drvdata(pdev); ++ ++ return snd_soc_unregister_card(card); ++ ++} ++ ++static const struct of_device_id audiosense_pi_card_of_match[] = { ++ { .compatible = "as,audiosense-pi", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, audiosense_pi_card_of_match); ++ ++static struct platform_driver audiosense_pi_card_driver = { ++ .driver = { ++ .name = "audiosense-snd-card", ++ .owner = THIS_MODULE, ++ .of_match_table = audiosense_pi_card_of_match, ++ }, ++ .probe = audiosense_pi_card_probe, ++ .remove = audiosense_pi_card_remove, ++}; ++ ++module_platform_driver(audiosense_pi_card_driver); ++ ++MODULE_AUTHOR("Bhargav AK "); ++MODULE_DESCRIPTION("ASoC Driver for TLV320AIC3204 Audio"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:audiosense-pi"); ++ diff --git a/target/linux/brcm2708/patches-4.19/950-0303-BCM270X-Adding-device-tree-support-for-AudioSense-Pi.patch b/target/linux/brcm2708/patches-4.19/950-0303-BCM270X-Adding-device-tree-support-for-AudioSense-Pi.patch new file mode 100644 index 000000000..666da8699 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0303-BCM270X-Adding-device-tree-support-for-AudioSense-Pi.patch @@ -0,0 +1,135 @@ +From 43f0013d9050a0011c05370c9b6123eb059f235b Mon Sep 17 00:00:00 2001 +From: b-ak +Date: Thu, 3 Jan 2019 00:29:14 +0530 +Subject: [PATCH 303/703] BCM270X: Adding device tree support for AudioSense-Pi + add-on soundcard + +Device tree overlay for AudioSense-Pi card. + +To enable support for the hardware add the following +line to the RPi /boot/config.txt: + + dtoverlay=audiosense-pi + +More documentation @ arch/arm/boot/dts/overlays/README + +Signed-off-by: b-ak +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 8 ++ + .../dts/overlays/audiosense-pi-overlay.dts | 82 +++++++++++++++++++ + 3 files changed, 91 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -20,6 +20,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + audioinjector-addons.dtbo \ + audioinjector-ultra.dtbo \ + audioinjector-wm8731-audio.dtbo \ ++ audiosense-pi.dtbo \ + audremap.dtbo \ + balena-fin.dtbo \ + bmp085_i2c-sensor.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -453,6 +453,14 @@ Load: dtoverlay=audioinjector-wm8731-a + Params: + + ++Name: audiosense-pi ++Info: Configures the audiosense-pi add on soundcard ++ For more information refer to ++ https://gitlab.com/kakar0t/audiosense-pi ++Load: dtoverlay=audiosense-pi ++Params: ++ ++ + Name: audremap + Info: Switches PWM sound output to pins 12 (Right) & 13 (Left) + Load: dtoverlay=audremap,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts +@@ -0,0 +1,82 @@ ++// Definitions for audiosense add on soundcard ++/dts-v1/; ++/plugin/; ++#include ++#include ++ ++/ { ++ compatible = "brcm,bcm2837", "brcm,bcm2836", "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ codec_reg_1v8: codec-reg-1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "tlv320aic3204_1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&gpio>; ++ __overlay__ { ++ codec_rst: codec-rst { ++ brcm,pins = <26>; ++ brcm,function = ; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ /* audio external oscillator */ ++ codec_osc: codec_osc { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <12000000>; /* 12 MHz */ ++ }; ++ ++ codec: tlv320aic32x4@18 { ++ #sound-dai-cells = <0>; ++ compatible = "ti,tlv320aic32x4"; ++ reg = <0x18>; ++ ++ clocks = <&codec_osc>; ++ clock-names = "mclk"; ++ ++ iov-supply = <&vdd_3v3_reg>; ++ ldoin-supply = <&vdd_3v3_reg>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++ reset-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>; ++ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "as,audiosense-pi"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0304-configs-Add-CONFIG_SND_AUDIOSENSE_PI-m.patch b/target/linux/brcm2708/patches-4.19/950-0304-configs-Add-CONFIG_SND_AUDIOSENSE_PI-m.patch new file mode 100644 index 000000000..16174c7d3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0304-configs-Add-CONFIG_SND_AUDIOSENSE_PI-m.patch @@ -0,0 +1,44 @@ +From 3e7e88225ea313a8a79773383b4004b714b07bc2 Mon Sep 17 00:00:00 2001 +From: b-ak +Date: Fri, 4 Jan 2019 00:12:51 +0530 +Subject: [PATCH 304/703] configs: Add CONFIG_SND_AUDIOSENSE_PI=m + +AudioSense-Pi add on soundcard configuration definitions + +Signed-off-by: b-ak +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -918,6 +918,7 @@ CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_AUDIOSENSE_PI=m + CONFIG_SND_DIGIDAC1_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -911,6 +911,7 @@ CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_AUDIOSENSE_PI=m + CONFIG_SND_DIGIDAC1_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -800,6 +800,7 @@ CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m ++CONFIG_SND_AUDIOSENSE_PI=m + CONFIG_SND_DIGIDAC1_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m + CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m diff --git a/target/linux/brcm2708/patches-4.19/950-0305-configs-Add-CONFIG_USB_TMC-m.patch b/target/linux/brcm2708/patches-4.19/950-0305-configs-Add-CONFIG_USB_TMC-m.patch new file mode 100644 index 000000000..48ea4c642 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0305-configs-Add-CONFIG_USB_TMC-m.patch @@ -0,0 +1,70 @@ +From 5822a95be9ca76e9f467392f9010fd10635f86cd Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 14 Jan 2019 08:50:55 +0000 +Subject: [PATCH 305/703] configs: Add CONFIG_USB_TMC=m + +Enable the Test & Measurement Class USB driver module. + +See: https://github.com/raspberrypi/linux/firmware/issues/929 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 2 +- + arch/arm/configs/bcmrpi_defconfig | 2 +- + arch/arm64/configs/bcmrpi3_defconfig | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1002,6 +1002,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + CONFIG_USB_MON=m + CONFIG_USB_DWCOTG=y + CONFIG_USB_PRINTER=m ++CONFIG_USB_TMC=m + CONFIG_USB_STORAGE=y + CONFIG_USB_STORAGE_REALTEK=m + CONFIG_USB_STORAGE_DATAFAB=m +@@ -1301,7 +1302,6 @@ CONFIG_CIFS=m + CONFIG_CIFS_WEAK_PW_HASH=y + CONFIG_CIFS_UPCALL=y + CONFIG_CIFS_XATTR=y +-CONFIG_CIFS_POSIX=y + CONFIG_CIFS_ACL=y + CONFIG_CIFS_DFS_UPCALL=y + CONFIG_CIFS_FSCACHE=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -995,6 +995,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + CONFIG_USB_MON=m + CONFIG_USB_DWCOTG=y + CONFIG_USB_PRINTER=m ++CONFIG_USB_TMC=m + CONFIG_USB_STORAGE=y + CONFIG_USB_STORAGE_REALTEK=m + CONFIG_USB_STORAGE_DATAFAB=m +@@ -1294,7 +1295,6 @@ CONFIG_CIFS=m + CONFIG_CIFS_WEAK_PW_HASH=y + CONFIG_CIFS_UPCALL=y + CONFIG_CIFS_XATTR=y +-CONFIG_CIFS_POSIX=y + CONFIG_CIFS_ACL=y + CONFIG_CIFS_DFS_UPCALL=y + CONFIG_CIFS_FSCACHE=y +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -871,6 +871,7 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + CONFIG_USB_MON=m + CONFIG_USB_DWCOTG=y + CONFIG_USB_PRINTER=m ++CONFIG_USB_TMC=m + CONFIG_USB_STORAGE=y + CONFIG_USB_STORAGE_REALTEK=m + CONFIG_USB_STORAGE_DATAFAB=m +@@ -1145,7 +1146,6 @@ CONFIG_CIFS=m + CONFIG_CIFS_WEAK_PW_HASH=y + CONFIG_CIFS_UPCALL=y + CONFIG_CIFS_XATTR=y +-CONFIG_CIFS_POSIX=y + CONFIG_CIFS_ACL=y + CONFIG_CIFS_DFS_UPCALL=y + CONFIG_CIFS_FSCACHE=y diff --git a/target/linux/brcm2708/patches-4.19/950-0306-overlays-sdio-Add-enhanced-1-bit-support.patch b/target/linux/brcm2708/patches-4.19/950-0306-overlays-sdio-Add-enhanced-1-bit-support.patch new file mode 100644 index 000000000..9a95c5874 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0306-overlays-sdio-Add-enhanced-1-bit-support.patch @@ -0,0 +1,107 @@ +From 510aeba93fa3dde1e2890d49409bd1be2d72f3fe Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 10 Jan 2019 15:27:56 +0000 +Subject: [PATCH 306/703] overlays: sdio: Add enhanced 1-bit support + +"dtoverlay=sdio,bus_width=1,gpios_22_25" is equivalent to the sdio-1bit +overlay, which is now deprecated. + +"dtoverlay=sdio,bus_width=1,gpios_34_37" enables 1-bit mode on GPIOs 34-37. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 24 +++++++++++---------- + arch/arm/boot/dts/overlays/sdio-overlay.dts | 20 ++++++++++++++++- + 2 files changed, 32 insertions(+), 12 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -479,8 +479,7 @@ Params: + + Name: bmp085_i2c-sensor + Info: This overlay is now deprecated - see i2c-sensor +-Load: dtoverlay=bmp085_i2c-sensor +-Params: ++Load: + + + Name: dht11 +@@ -1737,7 +1736,8 @@ Params: overclock_50 Clock (i + + Name: sdio + Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock, +- and enables SDIO via GPIOs 22-27. ++ and enables SDIO via GPIOs 22-27. An example of use in 1-bit mode is ++ "dtoverlay=sdio,bus_width=1,gpios_22_25" + Load: dtoverlay=sdio,= + Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC + framework requests 50MHz +@@ -1747,16 +1747,18 @@ Params: sdio_overclock SDIO Clo + + bus_width Set the SDIO host bus width (default 4 bits) + ++ gpios_22_25 Select GPIOs 22-25 for 1-bit mode. Must be used ++ with bus_width=1. This replaces the sdio-1bit ++ overlay, which is now deprecated. + +-Name: sdio-1bit +-Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock, +- and enables 1-bit SDIO via GPIOs 22-25. +-Load: dtoverlay=sdio-1bit,= +-Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC +- framework requests 50MHz ++ gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used ++ with bus_width=1. + +- poll_once Disable SDIO-device polling every second +- (default on: polling once at boot-time) ++ ++Name: sdio-1bit ++Info: This overlay is now deprecated. Use ++ "dtoverlay=sdio,bus_width=1,gpios_22_25" instead. ++Load: + + + Name: sdtweak +--- a/arch/arm/boot/dts/overlays/sdio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts +@@ -32,7 +32,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&sdio_ovl_pins>; + non-removable; +- bus-width = <1>; ++ bus-width = <4>; + }; + }; + }; +@@ -49,6 +49,22 @@ + }; + + fragment@3 { ++ target = <&sdio_ovl_pins>; ++ __dormant__ { ++ brcm,pins = <22 23 24 25>; ++ brcm,pull = <0 2 2 2>; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&sdio_ovl_pins>; ++ __dormant__ { ++ brcm,pins = <34 35 36 37>; ++ brcm,pull = <0 2 2 2>; ++ }; ++ }; ++ ++ fragment@6 { + target-path = "/aliases"; + __overlay__ { + mmc1 = "/soc/sdio@7e300000"; +@@ -59,5 +75,7 @@ + poll_once = <&sdio_ovl>,"non-removable?"; + bus_width = <&sdio_ovl>,"bus-width:0"; + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0"; ++ gpios_22_25 = <0>,"=3"; ++ gpios_34_37 = <0>,"=4"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0307-dwc_otg-fix-bug-with-port_addr-assignment-for-single.patch b/target/linux/brcm2708/patches-4.19/950-0307-dwc_otg-fix-bug-with-port_addr-assignment-for-single.patch new file mode 100644 index 000000000..a52aafd63 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0307-dwc_otg-fix-bug-with-port_addr-assignment-for-single.patch @@ -0,0 +1,28 @@ +From 0efd687c78d47645956af472eac1b8d8f3a973d5 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Wed, 16 Jan 2019 10:17:52 +0000 +Subject: [PATCH 307/703] dwc_otg: fix bug with port_addr assignment for + single-TT hubs + +See https://github.com/raspberrypi/linux/issues/2734 + +The "Hub Port" field in the split transaction packet was always set +to 1 for single-TT hubs. The majority of single-TT hub products +apparently ignore this field and broadcast to all downstream enabled +ports, which masked the issue. A subset of hub devices apparently +need the port number to be exact or split transactions will fail. +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -232,7 +232,7 @@ static int _hub_info(dwc_otg_hcd_t * hcd + else + *hub_addr = urb->dev->tt->hub->devnum; + } +- *port_addr = urb->dev->tt->multi ? urb->dev->ttport : 1; ++ *port_addr = urb->dev->ttport; + } else { + *hub_addr = 0; + *port_addr = urb->dev->ttport; diff --git a/target/linux/brcm2708/patches-4.19/950-0308-configs-Add-CONFIG_USB_UAS-m.patch b/target/linux/brcm2708/patches-4.19/950-0308-configs-Add-CONFIG_USB_UAS-m.patch new file mode 100644 index 000000000..57869cc5e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0308-configs-Add-CONFIG_USB_UAS-m.patch @@ -0,0 +1,46 @@ +From a87e24f59adb93d2701e56245adefe599e8eef86 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 16 Jan 2019 21:26:13 +0000 +Subject: [PATCH 308/703] configs: Add CONFIG_USB_UAS=m + +Enable support for USB-attached-SCSI devicess. + +See: https://github.com/raspberrypi/linux/issues/2813 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1017,6 +1017,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m + CONFIG_USB_STORAGE_KARMA=m + CONFIG_USB_STORAGE_CYPRESS_ATACB=m + CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=m + CONFIG_USB_MDC800=m + CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1010,6 +1010,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m + CONFIG_USB_STORAGE_KARMA=m + CONFIG_USB_STORAGE_CYPRESS_ATACB=m + CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=m + CONFIG_USB_MDC800=m + CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -886,6 +886,7 @@ CONFIG_USB_STORAGE_ONETOUCH=m + CONFIG_USB_STORAGE_KARMA=m + CONFIG_USB_STORAGE_CYPRESS_ATACB=m + CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=m + CONFIG_USB_MDC800=m + CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m diff --git a/target/linux/brcm2708/patches-4.19/950-0309-Added-driver-for-the-HiFiBerry-DAC-ADC-2694.patch b/target/linux/brcm2708/patches-4.19/950-0309-Added-driver-for-the-HiFiBerry-DAC-ADC-2694.patch new file mode 100644 index 000000000..4ce4243b7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0309-Added-driver-for-the-HiFiBerry-DAC-ADC-2694.patch @@ -0,0 +1,598 @@ +From e4b9a8f537b069bd3017f30b21bceb811263c979 Mon Sep 17 00:00:00 2001 +From: HiFiBerry +Date: Mon, 8 Oct 2018 18:10:12 +0200 +Subject: [PATCH 309/703] Added driver for the HiFiBerry DAC+ ADC (#2694) + +Signed-off-by: Daniel Matuschek +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 21 + + .../overlays/hifiberry-dacplusadc-overlay.dts | 71 +++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + sound/soc/bcm/Kconfig | 8 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/hifiberry_dacplusadc.c | 407 ++++++++++++++++++ + 8 files changed, 512 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts + create mode 100644 sound/soc/bcm/hifiberry_dacplusadc.c + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -49,6 +49,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + hifiberry-amp.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dacplus.dtbo \ ++ hifiberry-dacplusadc.dtbo \ + hifiberry-digi.dtbo \ + hifiberry-digi-pro.dtbo \ + hy28a.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -779,6 +779,27 @@ Params: 24db_digital_gain Allow ga + master for bit clock and frame clock. + + ++Name: hifiberry-dacplusadc ++Info: Configures the HifiBerry DAC+ADC audio card ++Load: dtoverlay=hifiberry-dacplusadc,= ++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec ++ Digital volume control. Enable with ++ "dtoverlay=hifiberry-dacplus,24db_digital_gain" ++ (The default behaviour is that the Digital ++ volume control is limited to a maximum of ++ 0dB. ie. it can attenuate but not provide ++ gain. For most users, this will be desired ++ as it will prevent clipping. By appending ++ the 24dB_digital_gain parameter, the Digital ++ volume control will allow up to 24dB of ++ gain. If this parameter is enabled, it is the ++ responsibility of the user to ensure that ++ the Digital volume control is set to a value ++ that does not result in clipping/distortion!) ++ slave Force DAC+ Pro into slave mode, using Pi as ++ master for bit clock and frame clock. ++ ++ + Name: hifiberry-digi + Info: Configures the HifiBerry Digi and Digi+ audio card + Load: dtoverlay=hifiberry-digi +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts +@@ -0,0 +1,71 @@ ++// Definitions for HiFiBerry DAC+ADC ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target-path = "/clocks"; ++ __overlay__ { ++ dacpro_osc: dacpro_osc { ++ compatible = "hifiberry,dacpro-clk"; ++ #clock-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcm_codec: pcm5122@4d { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ reg = <0x4d>; ++ clocks = <&dacpro_osc>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "/"; ++ __overlay__ { ++ dmic { ++ #sound-dai-cells = <0>; ++ compatible = "dmic-codec"; ++ num-channels = <2>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&sound>; ++ hifiberry_dacplusadc: __overlay__ { ++ compatible = "hifiberry,hifiberry-dacplusadc"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ 24db_digital_gain = ++ <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?"; ++ slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?"; ++ }; ++}; +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -905,6 +905,7 @@ CONFIG_SND_BCM2835_SOC_I2S=m + CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -898,6 +898,7 @@ CONFIG_SND_BCM2835_SOC_I2S=m + CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -46,6 +46,14 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS + help + Say Y or M if you want to add support for HifiBerry DAC+. + ++config SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC ++ tristate "Support for HifiBerry DAC+ADC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM512x_I2C ++ select SND_SOC_DMIC ++ help ++ Say Y or M if you want to add support for HifiBerry DAC+ADC. ++ + config SND_BCM2708_SOC_HIFIBERRY_DIGI + tristate "Support for HifiBerry Digi" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -14,6 +14,7 @@ snd-soc-googlevoicehat-codec-objs := goo + # BCM2708 Machine Support + snd-soc-3dlab-nano-player-objs := 3dlab-nano-player.o + snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o ++snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o + snd-soc-justboom-dac-objs := justboom-dac.o + snd-soc-rpi-cirrus-objs := rpi-cirrus.o + snd-soc-rpi-proto-objs := rpi-proto.o +@@ -36,6 +37,7 @@ snd-soc-rpi-wm8804-soundcard-objs := rpi + obj-$(CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER) += snd-soc-3dlab-nano-player.o + obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o ++obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o + obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o +--- /dev/null ++++ b/sound/soc/bcm/hifiberry_dacplusadc.c +@@ -0,0 +1,407 @@ ++/* ++ * ASoC Driver for HiFiBerry DAC+ / DAC Pro with ADC ++ * ++ * Author: Daniel Matuschek, Stuart MacLean ++ * Copyright 2014-2015 ++ * based on code by Florian Meier ++ * ADC added by Joerg Schambacher ++ * Copyright 2018 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/pcm512x.h" ++ ++#define HIFIBERRY_DACPRO_NOCLOCK 0 ++#define HIFIBERRY_DACPRO_CLK44EN 1 ++#define HIFIBERRY_DACPRO_CLK48EN 2 ++ ++struct platform_device *dmic_codec_dev; ++ ++struct pcm512x_priv { ++ struct regmap *regmap; ++ struct clk *sclk; ++}; ++ ++/* Clock rate of CLK44EN attached to GPIO6 pin */ ++#define CLK_44EN_RATE 22579200UL ++/* Clock rate of CLK48EN attached to GPIO3 pin */ ++#define CLK_48EN_RATE 24576000UL ++ ++static bool slave; ++static bool snd_rpi_hifiberry_is_dacpro; ++static bool digital_gain_0db_limit = true; ++ ++static void snd_rpi_hifiberry_dacplusadc_select_clk(struct snd_soc_component *component, ++ int clk_id) ++{ ++ switch (clk_id) { ++ case HIFIBERRY_DACPRO_NOCLOCK: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x00); ++ break; ++ case HIFIBERRY_DACPRO_CLK44EN: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x20); ++ break; ++ case HIFIBERRY_DACPRO_CLK48EN: ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x24, 0x04); ++ break; ++ } ++} ++ ++static void snd_rpi_hifiberry_dacplusadc_clk_gpio(struct snd_soc_component *component) ++{ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x24, 0x24); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_3, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_6, 0x0f, 0x02); ++} ++ ++static bool snd_rpi_hifiberry_dacplusadc_is_sclk(struct snd_soc_component *component) ++{ ++ unsigned int sck; ++ ++ snd_soc_component_read(component, PCM512x_RATE_DET_4, &sck); ++ return (!(sck & 0x40)); ++} ++ ++static bool snd_rpi_hifiberry_dacplusadc_is_sclk_sleep( ++ struct snd_soc_component *component) ++{ ++ msleep(2); ++ return snd_rpi_hifiberry_dacplusadc_is_sclk(component); ++} ++ ++static bool snd_rpi_hifiberry_dacplusadc_is_pro_card(struct snd_soc_component *component) ++{ ++ bool isClk44EN, isClk48En, isNoClk; ++ ++ snd_rpi_hifiberry_dacplusadc_clk_gpio(component); ++ ++ snd_rpi_hifiberry_dacplusadc_select_clk(component, HIFIBERRY_DACPRO_CLK44EN); ++ isClk44EN = snd_rpi_hifiberry_dacplusadc_is_sclk_sleep(component); ++ ++ snd_rpi_hifiberry_dacplusadc_select_clk(component, HIFIBERRY_DACPRO_NOCLOCK); ++ isNoClk = snd_rpi_hifiberry_dacplusadc_is_sclk_sleep(component); ++ ++ snd_rpi_hifiberry_dacplusadc_select_clk(component, HIFIBERRY_DACPRO_CLK48EN); ++ isClk48En = snd_rpi_hifiberry_dacplusadc_is_sclk_sleep(component); ++ ++ return (isClk44EN && isClk48En && !isNoClk); ++} ++ ++static int snd_rpi_hifiberry_dacplusadc_clk_for_rate(int sample_rate) ++{ ++ int type; ++ ++ switch (sample_rate) { ++ case 11025: ++ case 22050: ++ case 44100: ++ case 88200: ++ case 176400: ++ case 352800: ++ type = HIFIBERRY_DACPRO_CLK44EN; ++ break; ++ default: ++ type = HIFIBERRY_DACPRO_CLK48EN; ++ break; ++ } ++ return type; ++} ++ ++static void snd_rpi_hifiberry_dacplusadc_set_sclk(struct snd_soc_component *component, ++ int sample_rate) ++{ ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ ++ if (!IS_ERR(pcm512x->sclk)) { ++ int ctype; ++ ++ ctype = snd_rpi_hifiberry_dacplusadc_clk_for_rate(sample_rate); ++ clk_set_rate(pcm512x->sclk, (ctype == HIFIBERRY_DACPRO_CLK44EN) ++ ? CLK_44EN_RATE : CLK_48EN_RATE); ++ snd_rpi_hifiberry_dacplusadc_select_clk(component, ctype); ++ } ++} ++ ++static int snd_rpi_hifiberry_dacplusadc_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct pcm512x_priv *priv; ++ ++ if (slave) ++ snd_rpi_hifiberry_is_dacpro = false; ++ else ++ snd_rpi_hifiberry_is_dacpro = ++ snd_rpi_hifiberry_dacplusadc_is_pro_card(component); ++ ++ if (snd_rpi_hifiberry_is_dacpro) { ++ struct snd_soc_dai_link *dai = rtd->dai_link; ++ ++ dai->name = "HiFiBerry ADCDAC+ Pro"; ++ dai->stream_name = "HiFiBerry ADCDAC+ Pro HiFi"; ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBM_CFM; ++ ++ snd_soc_component_update_bits(component, PCM512x_BCLK_LRCLK_CFG, 0x31, 0x11); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_MODE, 0x03, 0x03); ++ snd_soc_component_update_bits(component, PCM512x_MASTER_CLKDIV_2, 0x7f, 63); ++ } else { ++ priv = snd_soc_component_get_drvdata(component); ++ priv->sclk = ERR_PTR(-ENOENT); ++ } ++ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ ++ if (digital_gain_0db_limit) { ++ int ret; ++ struct snd_soc_card *card = rtd->card; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); ++ } ++ ++ return 0; ++} ++ ++static int snd_rpi_hifiberry_dacplusadc_update_rate_den( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ struct snd_ratnum *rats_no_pll; ++ unsigned int num = 0, den = 0; ++ int err; ++ ++ rats_no_pll = devm_kzalloc(rtd->dev, sizeof(*rats_no_pll), GFP_KERNEL); ++ if (!rats_no_pll) ++ return -ENOMEM; ++ ++ rats_no_pll->num = clk_get_rate(pcm512x->sclk) / 64; ++ rats_no_pll->den_min = 1; ++ rats_no_pll->den_max = 128; ++ rats_no_pll->den_step = 1; ++ ++ err = snd_interval_ratnum(hw_param_interval(params, ++ SNDRV_PCM_HW_PARAM_RATE), 1, rats_no_pll, &num, &den); ++ if (err >= 0 && den) { ++ params->rate_num = num; ++ params->rate_den = den; ++ } ++ ++ devm_kfree(rtd->dev, rats_no_pll); ++ return 0; ++} ++ ++static int snd_rpi_hifiberry_dacplusadc_hw_params( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ int ret = 0; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ int channels = params_channels(params); ++ int width = 32; ++ ++ if (snd_rpi_hifiberry_is_dacpro) { ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ width = snd_pcm_format_physical_width(params_format(params)); ++ ++ snd_rpi_hifiberry_dacplusadc_set_sclk(component, ++ params_rate(params)); ++ ++ ret = snd_rpi_hifiberry_dacplusadc_update_rate_den( ++ substream, params); ++ } ++ ++ ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x03, 0x03, ++ channels, width); ++ if (ret) ++ return ret; ++ ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0x03, 0x03, ++ channels, width); ++ return ret; ++} ++ ++static int hifiberry_dacplusadc_LED_cnt; ++ ++static int snd_rpi_hifiberry_dacplusadc_startup( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, ++ 0x08, 0x08); ++ hifiberry_dacplusadc_LED_cnt++; ++ return 0; ++} ++ ++static void snd_rpi_hifiberry_dacplusadc_shutdown( ++ struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ hifiberry_dacplusadc_LED_cnt--; ++ if (!hifiberry_dacplusadc_LED_cnt) ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, ++ 0x08, 0x00); ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_rpi_hifiberry_dacplusadc_ops = { ++ .hw_params = snd_rpi_hifiberry_dacplusadc_hw_params, ++ .startup = snd_rpi_hifiberry_dacplusadc_startup, ++ .shutdown = snd_rpi_hifiberry_dacplusadc_shutdown, ++}; ++ ++static struct snd_soc_dai_link_component snd_rpi_hifiberry_dacplusadc_codecs[] = { ++ { ++ .name = "pcm512x.1-004d", ++ .dai_name = "pcm512x-hifi", ++ }, ++ { ++ .name = "dmic-codec", ++ .dai_name = "dmic-hifi", ++ }, ++}; ++ ++static struct snd_soc_dai_link snd_rpi_hifiberry_dacplusadc_dai[] = { ++{ ++ .name = "HiFiBerry DAC+ADC", ++ .stream_name = "HiFiBerry DAC+ADC HiFi", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .platform_name = "bcm2708-i2s.0", ++ .codecs = snd_rpi_hifiberry_dacplusadc_codecs, ++ .num_codecs = 2, ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .ops = &snd_rpi_hifiberry_dacplusadc_ops, ++ .init = snd_rpi_hifiberry_dacplusadc_init, ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_hifiberry_dacplusadc = { ++ .name = "snd_rpi_hifiberry_dacplusadc", ++ .driver_name = "HifiberryDacpAdc", ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_hifiberry_dacplusadc_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_dacplusadc_dai), ++}; ++ ++ ++static int snd_rpi_hifiberry_dacplusadc_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_rpi_hifiberry_dacplusadc.dev = &pdev->dev; ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai; ++ ++ dai = &snd_rpi_hifiberry_dacplusadc_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (i2s_node) { ++ dai->cpu_of_node = i2s_node; ++ dai->platform_of_node = i2s_node; ++ dai->cpu_dai_name = NULL; ++ dai->platform_name = NULL; ++ } ++ dai = &snd_rpi_hifiberry_dacplusadc_dai[1]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, "dmic", 0); ++ if (i2s_node) { ++ dai->cpu_of_node = i2s_node; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ } ++ digital_gain_0db_limit = !of_property_read_bool( ++ pdev->dev.of_node, "hifiberry,24db_digital_gain"); ++ slave = of_property_read_bool(pdev->dev.of_node, ++ "hifiberry-dacplusadc,slave"); ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, ++ &snd_rpi_hifiberry_dacplusadc); ++ if (ret && ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ ++ return ret; ++} ++ ++static const struct of_device_id snd_rpi_hifiberry_dacplusadc_of_match[] = { ++ { .compatible = "hifiberry,hifiberry-dacplusadc", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_dacplusadc_of_match); ++ ++static struct platform_driver snd_rpi_hifiberry_dacplusadc_driver = { ++ .driver = { ++ .name = "snd-rpi-hifiberry-dacplusadc", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_hifiberry_dacplusadc_of_match, ++ }, ++ .probe = snd_rpi_hifiberry_dacplusadc_probe, ++}; ++ ++static int __init hifiberry_dacplusadc_init(void) ++{ ++ int ret; ++ ++ dmic_codec_dev = platform_device_register_simple("dmic-codec", -1, NULL, ++ 0); ++ if (IS_ERR(dmic_codec_dev)) { ++ pr_err("%s: dmic-codec device registration failed\n", __func__); ++ return PTR_ERR(dmic_codec_dev); ++ } ++ ++ ret = platform_driver_register(&snd_rpi_hifiberry_dacplusadc_driver); ++ if (ret) { ++ pr_err("%s: platform driver registration failed\n", __func__); ++ platform_device_unregister(dmic_codec_dev); ++ } ++ ++ return ret; ++} ++module_init(hifiberry_dacplusadc_init); ++ ++static void __exit hifiberry_dacplusadc_exit(void) ++{ ++ platform_driver_unregister(&snd_rpi_hifiberry_dacplusadc_driver); ++ platform_device_unregister(dmic_codec_dev); ++} ++module_exit(hifiberry_dacplusadc_exit); ++ ++MODULE_AUTHOR("Joerg Schambacher "); ++MODULE_AUTHOR("Daniel Matuschek "); ++MODULE_DESCRIPTION("ASoC Driver for HiFiBerry DAC+ADC"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0310-Revert-pwm-Set-class-for-exported-channels-in-sysfs.patch b/target/linux/brcm2708/patches-4.19/950-0310-Revert-pwm-Set-class-for-exported-channels-in-sysfs.patch new file mode 100644 index 000000000..ea8a2b2c0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0310-Revert-pwm-Set-class-for-exported-channels-in-sysfs.patch @@ -0,0 +1,63 @@ +From d499c8f6171122d78a90c3a6403ac7c0c1f50887 Mon Sep 17 00:00:00 2001 +From: Fabrice Gasnier +Date: Mon, 1 Oct 2018 15:23:56 +0200 +Subject: [PATCH 310/703] Revert "pwm: Set class for exported channels in + sysfs" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit c289d6625237aa785b484b4e94c23b3b91ea7e60 upstream. + +This reverts commit 7e5d1fd75c3dde9fc10c4472b9368089d1b81d00 ("pwm: Set +class for exported channels in sysfs") as it causes regression with +multiple pwm chip[1], when exporting a pwm channel (echo X > export): + +- ABI (Documentation/ABI/testing/sysfs-class-pwm) states pwmX should be + created in /sys/class/pwm/pwmchipN/pwmX +- Reverted patch causes new entry to be also created directly in + /sys/class/pwm/pwmX +- 1st time, exporting pwmX will create an entry in /sys/class/pwm/pwmX +- class attributes are added under pwmX folder, such as export, unexport + npwm, symlinks. This is wrong as it belongs to pwmchipN. It may cause + bad behavior and report wrong values. +- when another export happens on another pwmchip, it can't be created + (e.g. -EEXIST). This is causing the issue with multiple pwmchip. + +Example on stm32 (stm32429i-eval) platform: +$ ls /sys/class/pwm +pwmchip0 pwmchip4 + +$ cd /sys/class/pwm/pwmchip0/ +$ echo 0 > export +$ ls /sys/class/pwm +pwm0 pwmchip0 pwmchip4 + +$ cd /sys/class/pwm/pwmchip4/ +$ echo 0 > export +sysfs: cannot create duplicate filename '/class/pwm/pwm0' +...Exception stack follows... + +This is also seen on other platform [2] + +[1] https://lkml.org/lkml/2018/9/25/713 +[2] https://lkml.org/lkml/2018/9/25/447 + +Signed-off-by: Fabrice Gasnier +Tested-by: Gottfried Haider +Tested-by: Michal Vokáč +Signed-off-by: Thierry Reding +--- + drivers/pwm/sysfs.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/pwm/sysfs.c ++++ b/drivers/pwm/sysfs.c +@@ -263,7 +263,6 @@ static int pwm_export_child(struct devic + export->pwm = pwm; + mutex_init(&export->lock); + +- export->child.class = parent->class; + export->child.release = pwm_export_release; + export->child.parent = parent; + export->child.devt = MKDEV(0, 0); diff --git a/target/linux/brcm2708/patches-4.19/950-0311-pwm-Send-a-uevent-on-the-pwmchip-device-upon-channel.patch b/target/linux/brcm2708/patches-4.19/950-0311-pwm-Send-a-uevent-on-the-pwmchip-device-upon-channel.patch new file mode 100644 index 000000000..33d6b4d8f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0311-pwm-Send-a-uevent-on-the-pwmchip-device-upon-channel.patch @@ -0,0 +1,86 @@ +From f88cefba19bb7ad7f92f721b94fcd9782f49a3c1 Mon Sep 17 00:00:00 2001 +From: Fabrice Gasnier +Date: Mon, 1 Oct 2018 15:23:57 +0200 +Subject: [PATCH 311/703] pwm: Send a uevent on the pwmchip device upon channel + sysfs (un)export +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit 552c02e3e7cfe2744b59de285aaea70021ae95c9 upstream. + +This patch sends a uevent (KOBJ_CHANGE) on the pwmchipN device, +everytime a pwmX channel has been exported/unexported via sysfs. This +allows udev to implement rules on such events, like: + +SUBSYSTEM=="pwm*", PROGRAM="/bin/sh -c '\ + chown -R root:gpio /sys/class/pwm && chmod -R 770 /sys/class/pwm;\ + chown -R root:gpio +/sys/devices/platform/soc/*.pwm/pwm/pwmchip* && chmod -R 770 +/sys/devices/platform/soc/*.pwm/pwm/pwmchip*\ +'" + +This is a replacement patch for commit 7e5d1fd75c3d ("pwm: Set class for +exported channels in sysfs"), see [1]. + +basic testing: +$ udevadm monitor --environment & +$ echo 0 > /sys/class/pwm/pwmchip0/export +KERNEL[197.321736] change /devices/.../pwm/pwmchip0 (pwm) +ACTION=change +DEVPATH=/devices/.../pwm/pwmchip0 +EXPORT=pwm0 +SEQNUM=2045 +SUBSYSTEM=pwm + +[1] https://lkml.org/lkml/2018/9/25/713 + +Signed-off-by: Fabrice Gasnier +Tested-by: Gottfried Haider +Tested-by: Michal Vokáč +Signed-off-by: Thierry Reding +--- + drivers/pwm/sysfs.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/pwm/sysfs.c ++++ b/drivers/pwm/sysfs.c +@@ -249,6 +249,7 @@ static void pwm_export_release(struct de + static int pwm_export_child(struct device *parent, struct pwm_device *pwm) + { + struct pwm_export *export; ++ char *pwm_prop[2]; + int ret; + + if (test_and_set_bit(PWMF_EXPORTED, &pwm->flags)) +@@ -276,6 +277,10 @@ static int pwm_export_child(struct devic + export = NULL; + return ret; + } ++ pwm_prop[0] = kasprintf(GFP_KERNEL, "EXPORT=pwm%u", pwm->hwpwm); ++ pwm_prop[1] = NULL; ++ kobject_uevent_env(&parent->kobj, KOBJ_CHANGE, pwm_prop); ++ kfree(pwm_prop[0]); + + return 0; + } +@@ -288,6 +293,7 @@ static int pwm_unexport_match(struct dev + static int pwm_unexport_child(struct device *parent, struct pwm_device *pwm) + { + struct device *child; ++ char *pwm_prop[2]; + + if (!test_and_clear_bit(PWMF_EXPORTED, &pwm->flags)) + return -ENODEV; +@@ -296,6 +302,11 @@ static int pwm_unexport_child(struct dev + if (!child) + return -ENODEV; + ++ pwm_prop[0] = kasprintf(GFP_KERNEL, "UNEXPORT=pwm%u", pwm->hwpwm); ++ pwm_prop[1] = NULL; ++ kobject_uevent_env(&parent->kobj, KOBJ_CHANGE, pwm_prop); ++ kfree(pwm_prop[0]); ++ + /* for device_find_child() */ + put_device(child); + device_unregister(child); diff --git a/target/linux/brcm2708/patches-4.19/950-0312-usb-dwc2-Disable-all-EP-s-on-disconnect.patch b/target/linux/brcm2708/patches-4.19/950-0312-usb-dwc2-Disable-all-EP-s-on-disconnect.patch new file mode 100644 index 000000000..90004c8b0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0312-usb-dwc2-Disable-all-EP-s-on-disconnect.patch @@ -0,0 +1,107 @@ +From e87be7d6627b4dc1ebd9173b1bf29c16b4ebd93f Mon Sep 17 00:00:00 2001 +From: Minas Harutyunyan +Date: Wed, 19 Sep 2018 18:13:52 +0400 +Subject: [PATCH 312/703] usb: dwc2: Disable all EP's on disconnect + +commit dccf1bad4be7eaa096c1f3697bd37883f9a08ecb upstream. + +Disabling all EP's allow to reset EP's to initial state. +On disconnect disable all EP's instead of just killing +all requests. Because of some platform didn't catch +disconnect event, same stuff added to +dwc2_hsotg_core_init_disconnected() function when USB +reset detected on the bus. + +Changed from version 1: +Changed lock acquire flow in dwc2_hsotg_ep_disable() +function. + +Signed-off-by: Minas Harutyunyan +Signed-off-by: Felipe Balbi +--- + drivers/usb/dwc2/gadget.c | 30 +++++++++++++++++++++++------- + 1 file changed, 23 insertions(+), 7 deletions(-) + +--- a/drivers/usb/dwc2/gadget.c ++++ b/drivers/usb/dwc2/gadget.c +@@ -3107,6 +3107,8 @@ static void kill_all_requests(struct dwc + dwc2_hsotg_txfifo_flush(hsotg, ep->fifo_index); + } + ++static int dwc2_hsotg_ep_disable(struct usb_ep *ep); ++ + /** + * dwc2_hsotg_disconnect - disconnect service + * @hsotg: The device state. +@@ -3125,13 +3127,12 @@ void dwc2_hsotg_disconnect(struct dwc2_h + hsotg->connected = 0; + hsotg->test_mode = 0; + ++ /* all endpoints should be shutdown */ + for (ep = 0; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) +- kill_all_requests(hsotg, hsotg->eps_in[ep], +- -ESHUTDOWN); ++ dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); + if (hsotg->eps_out[ep]) +- kill_all_requests(hsotg, hsotg->eps_out[ep], +- -ESHUTDOWN); ++ dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); + } + + call_gadget(hsotg, disconnect); +@@ -3189,13 +3190,23 @@ void dwc2_hsotg_core_init_disconnected(s + u32 val; + u32 usbcfg; + u32 dcfg = 0; ++ int ep; + + /* Kill any ep0 requests as controller will be reinitialized */ + kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); + +- if (!is_usb_reset) ++ if (!is_usb_reset) { + if (dwc2_core_reset(hsotg, true)) + return; ++ } else { ++ /* all endpoints should be shutdown */ ++ for (ep = 1; ep < hsotg->num_of_eps; ep++) { ++ if (hsotg->eps_in[ep]) ++ dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); ++ if (hsotg->eps_out[ep]) ++ dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); ++ } ++ } + + /* + * we must now enable ep0 ready for host detection and then +@@ -3996,6 +4007,7 @@ static int dwc2_hsotg_ep_disable(struct + unsigned long flags; + u32 epctrl_reg; + u32 ctrl; ++ int locked; + + dev_dbg(hsotg->dev, "%s(ep %p)\n", __func__, ep); + +@@ -4011,7 +4023,9 @@ static int dwc2_hsotg_ep_disable(struct + + epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); + +- spin_lock_irqsave(&hsotg->lock, flags); ++ locked = spin_is_locked(&hsotg->lock); ++ if (!locked) ++ spin_lock_irqsave(&hsotg->lock, flags); + + ctrl = dwc2_readl(hsotg, epctrl_reg); + +@@ -4035,7 +4049,9 @@ static int dwc2_hsotg_ep_disable(struct + hs_ep->fifo_index = 0; + hs_ep->fifo_size = 0; + +- spin_unlock_irqrestore(&hsotg->lock, flags); ++ if (!locked) ++ spin_unlock_irqrestore(&hsotg->lock, flags); ++ + return 0; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0313-usb-dwc2-Fix-disable-all-EP-s-on-disconnect.patch b/target/linux/brcm2708/patches-4.19/950-0313-usb-dwc2-Fix-disable-all-EP-s-on-disconnect.patch new file mode 100644 index 000000000..a0b0cad31 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0313-usb-dwc2-Fix-disable-all-EP-s-on-disconnect.patch @@ -0,0 +1,152 @@ +From c28c22b965a3c129fd4ba70a5e6b1b2353282d46 Mon Sep 17 00:00:00 2001 +From: Minas Harutyunyan +Date: Mon, 10 Dec 2018 18:09:32 +0400 +Subject: [PATCH 313/703] usb: dwc2: Fix disable all EP's on disconnect +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit 4fe4f9fecc36956fd53c8edf96dd0c691ef98ff9 upstream. + +Disabling all EP's allow to reset EP's to initial state. +Introduced new function dwc2_hsotg_ep_disable_lock() which +before calling dwc2_hsotg_ep_disable() function acquire +hsotg->lock and release on exiting. +From dwc2_hsotg_ep_disable() function removed acquiring +hsotg->lock. +In dwc2_hsotg_core_init_disconnected() function when USB +reset interrupt asserted disabling all ep’s by +dwc2_hsotg_ep_disable() function. +This updates eliminating sparse imbalance warnings. + +Reverted changes in dwc2_hostg_disconnect() function. +Introduced new function dwc2_hsotg_ep_disable_lock(). +Changed dwc2_hsotg_ep_ops. Now disable point to +dwc2_hsotg_ep_disable_lock() function. +In functions dwc2_hsotg_udc_stop() and dwc2_hsotg_suspend() +dwc2_hsotg_ep_disable() function replaced by +dwc2_hsotg_ep_disable_lock() function. +In dwc2_hsotg_ep_disable() function removed acquiring +of hsotg->lock. + +Fixes: dccf1bad4be7 ("usb: dwc2: Disable all EP's on disconnect") +Signed-off-by: Minas Harutyunyan +Signed-off-by: Felipe Balbi +--- + drivers/usb/dwc2/gadget.c | 41 ++++++++++++++++++++++----------------- + 1 file changed, 23 insertions(+), 18 deletions(-) + +--- a/drivers/usb/dwc2/gadget.c ++++ b/drivers/usb/dwc2/gadget.c +@@ -3107,8 +3107,6 @@ static void kill_all_requests(struct dwc + dwc2_hsotg_txfifo_flush(hsotg, ep->fifo_index); + } + +-static int dwc2_hsotg_ep_disable(struct usb_ep *ep); +- + /** + * dwc2_hsotg_disconnect - disconnect service + * @hsotg: The device state. +@@ -3130,9 +3128,11 @@ void dwc2_hsotg_disconnect(struct dwc2_h + /* all endpoints should be shutdown */ + for (ep = 0; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); ++ kill_all_requests(hsotg, hsotg->eps_in[ep], ++ -ESHUTDOWN); + if (hsotg->eps_out[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); ++ kill_all_requests(hsotg, hsotg->eps_out[ep], ++ -ESHUTDOWN); + } + + call_gadget(hsotg, disconnect); +@@ -3176,6 +3176,7 @@ static void dwc2_hsotg_irq_fifoempty(str + GINTSTS_PTXFEMP | \ + GINTSTS_RXFLVL) + ++static int dwc2_hsotg_ep_disable(struct usb_ep *ep); + /** + * dwc2_hsotg_core_init - issue softreset to the core + * @hsotg: The device state +@@ -4004,10 +4005,8 @@ static int dwc2_hsotg_ep_disable(struct + struct dwc2_hsotg *hsotg = hs_ep->parent; + int dir_in = hs_ep->dir_in; + int index = hs_ep->index; +- unsigned long flags; + u32 epctrl_reg; + u32 ctrl; +- int locked; + + dev_dbg(hsotg->dev, "%s(ep %p)\n", __func__, ep); + +@@ -4023,10 +4022,6 @@ static int dwc2_hsotg_ep_disable(struct + + epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); + +- locked = spin_is_locked(&hsotg->lock); +- if (!locked) +- spin_lock_irqsave(&hsotg->lock, flags); +- + ctrl = dwc2_readl(hsotg, epctrl_reg); + + if (ctrl & DXEPCTL_EPENA) +@@ -4049,12 +4044,22 @@ static int dwc2_hsotg_ep_disable(struct + hs_ep->fifo_index = 0; + hs_ep->fifo_size = 0; + +- if (!locked) +- spin_unlock_irqrestore(&hsotg->lock, flags); +- + return 0; + } + ++static int dwc2_hsotg_ep_disable_lock(struct usb_ep *ep) ++{ ++ struct dwc2_hsotg_ep *hs_ep = our_ep(ep); ++ struct dwc2_hsotg *hsotg = hs_ep->parent; ++ unsigned long flags; ++ int ret; ++ ++ spin_lock_irqsave(&hsotg->lock, flags); ++ ret = dwc2_hsotg_ep_disable(ep); ++ spin_unlock_irqrestore(&hsotg->lock, flags); ++ return ret; ++} ++ + /** + * on_list - check request is on the given endpoint + * @ep: The endpoint to check. +@@ -4202,7 +4207,7 @@ static int dwc2_hsotg_ep_sethalt_lock(st + + static const struct usb_ep_ops dwc2_hsotg_ep_ops = { + .enable = dwc2_hsotg_ep_enable, +- .disable = dwc2_hsotg_ep_disable, ++ .disable = dwc2_hsotg_ep_disable_lock, + .alloc_request = dwc2_hsotg_ep_alloc_request, + .free_request = dwc2_hsotg_ep_free_request, + .queue = dwc2_hsotg_ep_queue_lock, +@@ -4342,9 +4347,9 @@ static int dwc2_hsotg_udc_stop(struct us + /* all endpoints should be shutdown */ + for (ep = 1; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); ++ dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); + if (hsotg->eps_out[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); ++ dwc2_hsotg_ep_disable_lock(&hsotg->eps_out[ep]->ep); + } + + spin_lock_irqsave(&hsotg->lock, flags); +@@ -4792,9 +4797,9 @@ int dwc2_hsotg_suspend(struct dwc2_hsotg + + for (ep = 0; ep < hsotg->num_of_eps; ep++) { + if (hsotg->eps_in[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); ++ dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep); + if (hsotg->eps_out[ep]) +- dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); ++ dwc2_hsotg_ep_disable_lock(&hsotg->eps_out[ep]->ep); + } + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0314-overlays-Add-ssd1306-overlay-for-OLED-display.patch b/target/linux/brcm2708/patches-4.19/950-0314-overlays-Add-ssd1306-overlay-for-OLED-display.patch new file mode 100644 index 000000000..3f59e9560 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0314-overlays-Add-ssd1306-overlay-for-OLED-display.patch @@ -0,0 +1,104 @@ +From f6ed9ece5ed29ca16dc021ce0e9ab64bf4c879cb Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 21 Jan 2019 21:17:27 +0000 +Subject: [PATCH 314/703] overlays: Add ssd1306 overlay for OLED display + +See: https://github.com/raspberrypi/firmware/issues/1098 + +Signed-off-by: mincepi +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 31 ++++++++++++++++ + .../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 +++++++++++++++++++ + 3 files changed, 68 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/ssd1306-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -135,6 +135,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + spi2-1cs.dtbo \ + spi2-2cs.dtbo \ + spi2-3cs.dtbo \ ++ ssd1306.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ + tc358743.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1950,6 +1950,37 @@ Params: cs0_pin GPIO pin + is 'okay' or enabled). + + ++Name: ssd1306 ++Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer. ++Load: dtoverlay=ssd1306,= ++Params: address Location in display memory of first character. ++ (default=0) ++ width Width of display. (default=128) ++ height Height of display. (default=64) ++ offset virtual channel a. (default=0) ++ normal Has no effect on displays tested. (default=not ++ set) ++ sequential Set this if every other scan line is missing. ++ (default=not set) ++ remapped Set this if display is garbled. (default=not ++ set) ++ inverted Set this if display is inverted and mirrored. ++ (default=not set) ++ ++ Examples: ++ Typical usage for 128x64 display: dtoverlay=ssd1306,inverted ++ ++ Typical usage for 128x32 display: dtoverlay=ssd1306,inverted,sequential ++ ++ i2c_baudrate=400000 will speed up the display. ++ ++ i2c_baudrate=1000000 seems to work even though it's not officially ++ supported by the hardware, and is faster still. ++ ++ For more information refer to the device datasheet at: ++ https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf ++ ++ + Name: superaudioboard + Info: Configures the SuperAudioBoard sound card + Load: dtoverlay=superaudioboard,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts +@@ -0,0 +1,36 @@ ++// Overlay for SSD1306 128x64 and 128x32 OLED displays ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2718"; ++ ++ fragment@0 { ++ target = <&i2c1>; ++ __overlay__ { ++ status = "okay"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ssd1306: oled@3c{ ++ compatible = "solomon,ssd1306fb-i2c"; ++ reg = <0x3c>; ++ solomon,width = <128>; ++ solomon,height = <64>; ++ solomon,page-offset = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ address = <&ssd1306>,"reg:0"; ++ width = <&ssd1306>,"solomon,width:0"; ++ height = <&ssd1306>,"solomon,height:0"; ++ offset = <&ssd1306>,"solomon,page-offset:0"; ++ normal = <&ssd1306>,"solomon,segment-no-remap?"; ++ sequential = <&ssd1306>,"solomon,com-seq?"; ++ remapped = <&ssd1306>,"solomon,com-lrremap?"; ++ inverted = <&ssd1306>,"solomon,com-invdir?"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0315-overlays-mcp23017-Support-the-MCP23008.patch b/target/linux/brcm2708/patches-4.19/950-0315-overlays-mcp23017-Support-the-MCP23008.patch new file mode 100644 index 000000000..24e1e0308 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0315-overlays-mcp23017-Support-the-MCP23008.patch @@ -0,0 +1,49 @@ +From 1cfb681bddf0f63b99296987b155a8a9efdb7bbf Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 21 Jan 2019 12:19:57 +0000 +Subject: [PATCH 315/703] overlays: mcp23017: Support the MCP23008 + +Add an 'mcp23008' parameter to enable support for the MCP23008 device. + +See: https://github.com/raspberrypi/linux/issues/2818 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 2 ++ + arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 10 +++++++++- + 2 files changed, 11 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1212,6 +1212,8 @@ Params: gpiopin Gpio pin + + addr I2C address of the MCP23017 (default: 0x20) + ++ mcp23008 Configure an MCP23008 instead. ++ + + Name: mcp23s17 + Info: Configures the MCP23S08/17 SPI GPIO expanders. +--- a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts +@@ -44,11 +44,19 @@ + }; + }; + }; +- ++ ++ fragment@3 { ++ target = <&mcp23017>; ++ __dormant__ { ++ compatible = "microchip,mcp23008"; ++ }; ++ }; ++ + __overrides__ { + gpiopin = <&mcp23017_pins>,"brcm,pins:0", + <&mcp23017>,"interrupts:0"; + addr = <&mcp23017>,"reg:0"; ++ mcp23008 = <0>,"=3"; + }; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0316-overlays-Add-mcp342x-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0316-overlays-Add-mcp342x-overlay.patch new file mode 100644 index 000000000..87c05781a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0316-overlays-Add-mcp342x-overlay.patch @@ -0,0 +1,148 @@ +From 62f5819191c114130ce67a4b8f33abd35403f777 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 21 Jan 2019 12:23:55 +0000 +Subject: [PATCH 316/703] overlays: Add mcp342x overlay + +Support the MCP342x family of ADCs from Microchip. + +See: https://github.com/raspberrypi/linux/issues/2819 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 16 ++++ + .../arm/boot/dts/overlays/mcp342x-overlay.dts | 93 +++++++++++++++++++ + 3 files changed, 110 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/mcp342x-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -79,6 +79,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + mcp2515-can1.dtbo \ + mcp3008.dtbo \ + mcp3202.dtbo \ ++ mcp342x.dtbo \ + media-center.dtbo \ + midi-uart0.dtbo \ + midi-uart1.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1277,6 +1277,22 @@ Params: spi--present boolean, + spi--speed integer, set the spi bus speed for this device + + ++Name: mcp342x ++Info: Overlay for activation of Microchip MCP3421-3428 ADCs over I2C ++Load: dtoverlay=mcp342x,= ++Params: addr I2C bus address of device, for devices with ++ addresses that are configurable, e.g. by ++ hardware links (default=0x68) ++ mcp3421 The device is an MCP3421 ++ mcp3422 The device is an MCP3422 ++ mcp3423 The device is an MCP3423 ++ mcp3424 The device is an MCP3424 ++ mcp3425 The device is an MCP3425 ++ mcp3426 The device is an MCP3426 ++ mcp3427 The device is an MCP3427 ++ mcp3428 The device is an MCP3428 ++ ++ + Name: media-center + Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply + Load: dtoverlay=media-center,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts +@@ -0,0 +1,93 @@ ++// Overlay for MCP3421-8 ADCs from Microchip Semiconductor ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ fragment@0 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp342x: mcp@68 { ++ reg = <0x68>; ++ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3421"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3422"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3423"; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3424"; ++ }; ++ }; ++ ++ fragment@5 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3425"; ++ }; ++ }; ++ ++ fragment@6 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3426"; ++ }; ++ }; ++ ++ fragment@7 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3427"; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&mcp342x>; ++ __dormant__ { ++ compatible = "microchip,mcp3428"; ++ }; ++ }; ++ ++ __overrides__ { ++ addr = <&mcp342x>,"reg:0"; ++ mcp3421 = <0>,"=1"; ++ mcp3422 = <0>,"=2"; ++ mcp3423 = <0>,"=3"; ++ mcp3424 = <0>,"=4"; ++ mcp3425 = <0>,"=5"; ++ mcp3426 = <0>,"=6"; ++ mcp3427 = <0>,"=7"; ++ mcp3428 = <0>,"=8"; ++ }; ++}; ++ diff --git a/target/linux/brcm2708/patches-4.19/950-0317-char-vcio-Add-compat-ioctl-handling.patch b/target/linux/brcm2708/patches-4.19/950-0317-char-vcio-Add-compat-ioctl-handling.patch new file mode 100644 index 000000000..8d6bf4a1c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0317-char-vcio-Add-compat-ioctl-handling.patch @@ -0,0 +1,58 @@ +From ee233473783f700db1c795d8114facae23ed776b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 13:56:30 +0000 +Subject: [PATCH 317/703] char: vcio: Add compat ioctl handling + +There was no compat ioctl handler, so 32 bit userspace on a +64 bit kernel failed as IOCTL_MBOX_PROPERTY used the size +of char*. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/vcio.c | 22 +++++++++++++++++++++- + 1 file changed, 21 insertions(+), 1 deletion(-) + +--- a/drivers/char/broadcom/vcio.c ++++ b/drivers/char/broadcom/vcio.c +@@ -24,6 +24,9 @@ + + #define VCIO_IOC_MAGIC 100 + #define IOCTL_MBOX_PROPERTY _IOWR(VCIO_IOC_MAGIC, 0, char *) ++#ifdef CONFIG_COMPAT ++#define IOCTL_MBOX_PROPERTY32 _IOWR(VCIO_IOC_MAGIC, 0, compat_uptr_t) ++#endif + + static struct { + dev_t devt; +@@ -87,13 +90,30 @@ static long vcio_device_ioctl(struct fil + case IOCTL_MBOX_PROPERTY: + return vcio_user_property_list((void *)ioctl_param); + default: +- pr_err("unknown ioctl: %d\n", ioctl_num); ++ pr_err("unknown ioctl: %x\n", ioctl_num); + return -EINVAL; + } + } + ++#ifdef CONFIG_COMPAT ++static long vcio_device_compat_ioctl(struct file *file, unsigned int ioctl_num, ++ unsigned long ioctl_param) ++{ ++ switch (ioctl_num) { ++ case IOCTL_MBOX_PROPERTY32: ++ return vcio_user_property_list(compat_ptr(ioctl_param)); ++ default: ++ pr_err("unknown ioctl: %x\n", ioctl_num); ++ return -EINVAL; ++ } ++} ++#endif ++ + const struct file_operations vcio_fops = { + .unlocked_ioctl = vcio_device_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = vcio_device_compat_ioctl, ++#endif + .open = vcio_device_open, + .release = vcio_device_release, + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0318-char-vcio-Fail-probe-if-rpi_firmware-is-not-found.patch b/target/linux/brcm2708/patches-4.19/950-0318-char-vcio-Fail-probe-if-rpi_firmware-is-not-found.patch new file mode 100644 index 000000000..702ad73f6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0318-char-vcio-Fail-probe-if-rpi_firmware-is-not-found.patch @@ -0,0 +1,28 @@ +From 4742e81159d5a54494f497a79834cf746f236681 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 14:03:28 +0000 +Subject: [PATCH 318/703] char: vcio: Fail probe if rpi_firmware is not found. + +Device Tree is now the only supported config mechanism, therefore +uncomment the block of code that fails the probe if the +firmware node can't be found. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/vcio.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/char/broadcom/vcio.c ++++ b/drivers/char/broadcom/vcio.c +@@ -126,10 +126,9 @@ static int __init vcio_init(void) + + np = of_find_compatible_node(NULL, NULL, + "raspberrypi,bcm2835-firmware"); +-/* Uncomment this when we only boot with Device Tree + if (!of_device_is_available(np)) + return -ENODEV; +-*/ ++ + vcio.fw = rpi_firmware_get(np); + if (!vcio.fw) + return -ENODEV; diff --git a/target/linux/brcm2708/patches-4.19/950-0319-staging-mmal-vchiq-Fix-client_component-for-64-bit-k.patch b/target/linux/brcm2708/patches-4.19/950-0319-staging-mmal-vchiq-Fix-client_component-for-64-bit-k.patch new file mode 100644 index 000000000..098362baf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0319-staging-mmal-vchiq-Fix-client_component-for-64-bit-k.patch @@ -0,0 +1,68 @@ +From 4be57b2f957bfe584752bc59c3a7bdee1d615b98 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 22 Jan 2019 12:04:09 +0000 +Subject: [PATCH 319/703] staging: mmal-vchiq: Fix client_component for 64 bit + kernel + +The MMAL client_component field is used with the event +mechanism to allow the client to identify the component for +which the event is generated. +The field is only 32bits in size, therefore we can't use a +pointer to the component in a 64 bit kernel. + +Component handles are already held in an array per VCHI +instance, so use the array index as the client_component handle +to avoid having to create a new IDR for this purpose. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 12 +++++++++--- + .../staging/vc04_services/vchiq-mmal/mmal-vchiq.h | 1 + + 2 files changed, 10 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -472,9 +472,9 @@ buffer_from_host(struct vchiq_mmal_insta + static void event_to_host_cb(struct vchiq_mmal_instance *instance, + struct mmal_msg *msg, u32 msg_len) + { +- /* FIXME: Not going to work on 64 bit */ ++ int comp_idx = msg->u.event_to_host.client_component; + struct vchiq_mmal_component *component = +- (struct vchiq_mmal_component *)msg->u.event_to_host.client_component; ++ &instance->component[comp_idx]; + struct vchiq_mmal_port *port = NULL; + struct mmal_msg_context *msg_context; + u32 port_num = msg->u.event_to_host.port_num; +@@ -1073,7 +1073,7 @@ static int create_component(struct vchiq + + /* build component create message */ + m.h.type = MMAL_MSG_TYPE_COMPONENT_CREATE; +- m.u.component_create.client_component = (u32)(unsigned long)component; ++ m.u.component_create.client_component = component->client_component; + strncpy(m.u.component_create.name, name, + sizeof(m.u.component_create.name)); + +@@ -1868,6 +1868,12 @@ int vchiq_mmal_component_init(struct vch + goto unlock; + } + ++ /* We need a handle to reference back to our component structure. ++ * Use the array index in instance->component rather than rolling ++ * another IDR. ++ */ ++ component->client_component = idx; ++ + ret = create_component(instance, component, name); + if (ret < 0) { + pr_err("%s: failed to create component %d (Not enough GPU mem?)\n", +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -97,6 +97,7 @@ struct vchiq_mmal_component { + struct vchiq_mmal_port input[MAX_PORT_COUNT]; /* input ports */ + struct vchiq_mmal_port output[MAX_PORT_COUNT]; /* output ports */ + struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */ ++ u32 client_component; /* Used to ref back to client struct */ + }; + + int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance); diff --git a/target/linux/brcm2708/patches-4.19/950-0320-staging-bcm2835-camera-Add-sanity-checks-for-queue_s.patch b/target/linux/brcm2708/patches-4.19/950-0320-staging-bcm2835-camera-Add-sanity-checks-for-queue_s.patch new file mode 100644 index 000000000..4a483c661 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0320-staging-bcm2835-camera-Add-sanity-checks-for-queue_s.patch @@ -0,0 +1,44 @@ +From cd78829bc64d03ae095636e1c5ed851e9fd7abf2 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 15 Jan 2019 15:35:24 +0000 +Subject: [PATCH 320/703] staging: bcm2835-camera: Add sanity checks for + queue_setup/CREATE_BUFS + +Fixes a v4l2-compliance failure when passed a buffer that is +too small. +queue_setup wasn't handling the case where !(*nplanes), as +used from CREATE_BUFS and requiring the driver to sanity +check the provided buffer parameters. It was assuming that +it was always being used in the REQBUFS case where it provides +the buffer properties. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-camera/bcm2835-camera.c | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -242,6 +242,22 @@ static int queue_setup(struct vb2_queue + return -EINVAL; + } + ++ /* Handle CREATE_BUFS situation - *nplanes != 0 */ ++ if (*nplanes) { ++ if (*nplanes != 1 || ++ sizes[0] < dev->capture.port->current_buffer.size) { ++ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, ++ "%s: dev:%p Invalid buffer request from CREATE_BUFS, size %u < %u, nplanes %u != 1\n", ++ __func__, dev, sizes[0], ++ dev->capture.port->current_buffer.size, ++ *nplanes); ++ return -EINVAL; ++ } else { ++ return 0; ++ } ++ } ++ ++ /* Handle REQBUFS situation */ + size = dev->capture.port->current_buffer.size; + if (size == 0) { + v4l2_err(&dev->v4l2_dev, diff --git a/target/linux/brcm2708/patches-4.19/950-0321-staging-bcm2835-camera-Set-the-field-value-within-ea.patch b/target/linux/brcm2708/patches-4.19/950-0321-staging-bcm2835-camera-Set-the-field-value-within-ea.patch new file mode 100644 index 000000000..895f5ddb6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0321-staging-bcm2835-camera-Set-the-field-value-within-ea.patch @@ -0,0 +1,27 @@ +From a470862bbbcc79c925933bf3e5beb7265e9aef48 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 15 Jan 2019 16:32:33 +0000 +Subject: [PATCH 321/703] staging: bcm2835-camera: Set the field value within + each buffer + +Fixes a v4l2-compliance failure +v4l2-test-buffers.cpp(415): g_field() == V4L2_FIELD_ANY + +The driver only ever produces progresive frames, so field should +always be set to V4L2_FIELD_NONE. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/bcm2835-camera.c +@@ -443,6 +443,7 @@ static void buffer_cb(struct vchiq_mmal_ + } + dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; + buf->vb.sequence = dev->capture.sequence++; ++ buf->vb.field = V4L2_FIELD_NONE; + + vb2_set_plane_payload(&buf->vb.vb2_buf, 0, mmal_buf->length); + if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) diff --git a/target/linux/brcm2708/patches-4.19/950-0322-char-vc_mem-Fix-up-compat-ioctls-for-64bit-kernel.patch b/target/linux/brcm2708/patches-4.19/950-0322-char-vc_mem-Fix-up-compat-ioctls-for-64bit-kernel.patch new file mode 100644 index 000000000..261d82e75 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0322-char-vc_mem-Fix-up-compat-ioctls-for-64bit-kernel.patch @@ -0,0 +1,111 @@ +From e2387d73874182f3aa3b0748bfa19b5cb292f97c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 23 Jan 2019 18:25:50 +0000 +Subject: [PATCH 322/703] char: vc_mem: Fix up compat ioctls for 64bit kernel + +compat_ioctl wasn't defined, so 32bit user/64bit kernel +always failed. +VC_MEM_IOC_MEM_PHYS_ADDR was defined with parameter size +unsigned long, so the ioctl cmd changes between sizes. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/vc_mem.c | 40 +++++++++++++++++++++++++++++---- + include/linux/broadcom/vc_mem.h | 4 ++++ + 2 files changed, 40 insertions(+), 4 deletions(-) + +--- a/drivers/char/broadcom/vc_mem.c ++++ b/drivers/char/broadcom/vc_mem.c +@@ -148,7 +148,7 @@ vc_mem_ioctl(struct file *file, unsigned + (void) cmd; + (void) arg; + +- pr_debug("%s: called file = 0x%p\n", __func__, file); ++ pr_debug("%s: called file = 0x%p, cmd %08x\n", __func__, file, cmd); + + switch (cmd) { + case VC_MEM_IOC_MEM_PHYS_ADDR: +@@ -167,7 +167,7 @@ vc_mem_ioctl(struct file *file, unsigned + // Get the videocore memory size first + vc_mem_get_size(); + +- pr_debug("%s: VC_MEM_IOC_MEM_SIZE=%u\n", __func__, ++ pr_debug("%s: VC_MEM_IOC_MEM_SIZE=%x\n", __func__, + mm_vc_mem_size); + + if (copy_to_user((void *) arg, &mm_vc_mem_size, +@@ -181,7 +181,7 @@ vc_mem_ioctl(struct file *file, unsigned + // Get the videocore memory base + vc_mem_get_base(); + +- pr_debug("%s: VC_MEM_IOC_MEM_BASE=%u\n", __func__, ++ pr_debug("%s: VC_MEM_IOC_MEM_BASE=%x\n", __func__, + mm_vc_mem_base); + + if (copy_to_user((void *) arg, &mm_vc_mem_base, +@@ -195,7 +195,7 @@ vc_mem_ioctl(struct file *file, unsigned + // Get the videocore memory base + vc_mem_get_base(); + +- pr_debug("%s: VC_MEM_IOC_MEM_LOAD=%u\n", __func__, ++ pr_debug("%s: VC_MEM_IOC_MEM_LOAD=%x\n", __func__, + mm_vc_mem_base); + + if (copy_to_user((void *) arg, &mm_vc_mem_base, +@@ -214,6 +214,35 @@ vc_mem_ioctl(struct file *file, unsigned + return rc; + } + ++#ifdef CONFIG_COMPAT ++static long ++vc_mem_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int rc = 0; ++ ++ switch (cmd) { ++ case VC_MEM_IOC_MEM_PHYS_ADDR32: ++ pr_debug("%s: VC_MEM_IOC_MEM_PHYS_ADDR32=0x%p\n", ++ __func__, (void *)mm_vc_mem_phys_addr); ++ ++ /* This isn't correct, but will cover us for now as ++ * VideoCore is 32bit only. ++ */ ++ if (copy_to_user((void *)arg, &mm_vc_mem_phys_addr, ++ sizeof(compat_ulong_t))) ++ rc = -EFAULT; ++ ++ break; ++ ++ default: ++ rc = vc_mem_ioctl(file, cmd, arg); ++ break; ++ } ++ ++ return rc; ++} ++#endif ++ + /**************************************************************************** + * + * vc_mem_mmap +@@ -259,6 +288,9 @@ static const struct file_operations vc_m + .open = vc_mem_open, + .release = vc_mem_release, + .unlocked_ioctl = vc_mem_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = vc_mem_compat_ioctl, ++#endif + .mmap = vc_mem_mmap, + }; + +--- a/include/linux/broadcom/vc_mem.h ++++ b/include/linux/broadcom/vc_mem.h +@@ -32,4 +32,8 @@ extern unsigned int mm_vc_mem_size; + extern int vc_mem_get_current_size( void ); + #endif + ++#ifdef CONFIG_COMPAT ++#define VC_MEM_IOC_MEM_PHYS_ADDR32 _IOR(VC_MEM_IOC_MAGIC, 0, compat_ulong_t) ++#endif ++ + #endif /* _VC_MEM_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0323-char-vc_mem-Fix-all-coding-style-issues.patch b/target/linux/brcm2708/patches-4.19/950-0323-char-vc_mem-Fix-all-coding-style-issues.patch new file mode 100644 index 000000000..375d2afec --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0323-char-vc_mem-Fix-all-coding-style-issues.patch @@ -0,0 +1,428 @@ +From 89452f1b5d1ebad50b1aab2eac896730ec2debfd Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 23 Jan 2019 18:37:29 +0000 +Subject: [PATCH 323/703] char: vc_mem: Fix all coding style issues. + +Cleans up all checkpatch errors in vc_mem.c and vc_mem.h +No functional change to the code. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/vc_mem.c | 177 +++++++++++--------------------- + include/linux/broadcom/vc_mem.h | 38 +++---- + 2 files changed, 77 insertions(+), 138 deletions(-) + +--- a/drivers/char/broadcom/vc_mem.c ++++ b/drivers/char/broadcom/vc_mem.c +@@ -1,16 +1,16 @@ +-/***************************************************************************** +-* Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. +-* +-* Unless you and Broadcom execute a separate written software license +-* agreement governing use of this software, this software is licensed to you +-* under the terms of the GNU General Public License version 2, available at +-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +-* +-* Notwithstanding the above, under no circumstances may you combine this +-* software in any way with any other Broadcom software provided under a +-* license other than the GPL, without Broadcom's express prior written +-* consent. +-*****************************************************************************/ ++/* ++ * Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ */ + + #include + #include +@@ -26,11 +26,11 @@ + + #define DRIVER_NAME "vc-mem" + +-// Device (/dev) related variables +-static dev_t vc_mem_devnum = 0; +-static struct class *vc_mem_class = NULL; ++/* Device (/dev) related variables */ ++static dev_t vc_mem_devnum; ++static struct class *vc_mem_class; + static struct cdev vc_mem_cdev; +-static int vc_mem_inited = 0; ++static int vc_mem_inited; + + #ifdef CONFIG_DEBUG_FS + static struct dentry *vc_mem_debugfs_entry; +@@ -50,96 +50,55 @@ static struct dentry *vc_mem_debugfs_ent + * bootloader (and/or kernel). When that happens, the values of these variables + * would be calculated and assigned in the init function. + */ +-// in the 2835 VC in mapped above ARM, but ARM has full access to VC space +-unsigned long mm_vc_mem_phys_addr = 0x00000000; +-unsigned int mm_vc_mem_size = 0; +-unsigned int mm_vc_mem_base = 0; +- ++/* In the 2835 VC in mapped above ARM, but ARM has full access to VC space */ ++unsigned long mm_vc_mem_phys_addr; + EXPORT_SYMBOL(mm_vc_mem_phys_addr); ++unsigned int mm_vc_mem_size; + EXPORT_SYMBOL(mm_vc_mem_size); ++unsigned int mm_vc_mem_base; + EXPORT_SYMBOL(mm_vc_mem_base); + +-static uint phys_addr = 0; +-static uint mem_size = 0; +-static uint mem_base = 0; +- +- +-/**************************************************************************** +-* +-* vc_mem_open +-* +-***************************************************************************/ ++static uint phys_addr; ++static uint mem_size; ++static uint mem_base; + + static int + vc_mem_open(struct inode *inode, struct file *file) + { +- (void) inode; +- (void) file; ++ (void)inode; + + pr_debug("%s: called file = 0x%p\n", __func__, file); + + return 0; + } + +-/**************************************************************************** +-* +-* vc_mem_release +-* +-***************************************************************************/ +- + static int + vc_mem_release(struct inode *inode, struct file *file) + { +- (void) inode; +- (void) file; ++ (void)inode; + + pr_debug("%s: called file = 0x%p\n", __func__, file); + + return 0; + } + +-/**************************************************************************** +-* +-* vc_mem_get_size +-* +-***************************************************************************/ +- + static void + vc_mem_get_size(void) + { + } + +-/**************************************************************************** +-* +-* vc_mem_get_base +-* +-***************************************************************************/ +- + static void + vc_mem_get_base(void) + { + } + +-/**************************************************************************** +-* +-* vc_mem_get_current_size +-* +-***************************************************************************/ +- + int + vc_mem_get_current_size(void) + { + return mm_vc_mem_size; + } +- + EXPORT_SYMBOL_GPL(vc_mem_get_current_size); + +-/**************************************************************************** +-* +-* vc_mem_ioctl +-* +-***************************************************************************/ +- + static long + vc_mem_ioctl(struct file *file, unsigned int cmd, unsigned long arg) + { +@@ -154,52 +113,52 @@ vc_mem_ioctl(struct file *file, unsigned + case VC_MEM_IOC_MEM_PHYS_ADDR: + { + pr_debug("%s: VC_MEM_IOC_MEM_PHYS_ADDR=0x%p\n", +- __func__, (void *) mm_vc_mem_phys_addr); ++ __func__, (void *)mm_vc_mem_phys_addr); + +- if (copy_to_user((void *) arg, &mm_vc_mem_phys_addr, +- sizeof (mm_vc_mem_phys_addr)) != 0) { ++ if (copy_to_user((void *)arg, &mm_vc_mem_phys_addr, ++ sizeof(mm_vc_mem_phys_addr))) { + rc = -EFAULT; + } + break; + } + case VC_MEM_IOC_MEM_SIZE: + { +- // Get the videocore memory size first ++ /* Get the videocore memory size first */ + vc_mem_get_size(); + + pr_debug("%s: VC_MEM_IOC_MEM_SIZE=%x\n", __func__, +- mm_vc_mem_size); ++ mm_vc_mem_size); + +- if (copy_to_user((void *) arg, &mm_vc_mem_size, +- sizeof (mm_vc_mem_size)) != 0) { ++ if (copy_to_user((void *)arg, &mm_vc_mem_size, ++ sizeof(mm_vc_mem_size))) { + rc = -EFAULT; + } + break; + } + case VC_MEM_IOC_MEM_BASE: + { +- // Get the videocore memory base ++ /* Get the videocore memory base */ + vc_mem_get_base(); + + pr_debug("%s: VC_MEM_IOC_MEM_BASE=%x\n", __func__, +- mm_vc_mem_base); ++ mm_vc_mem_base); + +- if (copy_to_user((void *) arg, &mm_vc_mem_base, +- sizeof (mm_vc_mem_base)) != 0) { ++ if (copy_to_user((void *)arg, &mm_vc_mem_base, ++ sizeof(mm_vc_mem_base))) { + rc = -EFAULT; + } + break; + } + case VC_MEM_IOC_MEM_LOAD: + { +- // Get the videocore memory base ++ /* Get the videocore memory base */ + vc_mem_get_base(); + + pr_debug("%s: VC_MEM_IOC_MEM_LOAD=%x\n", __func__, + mm_vc_mem_base); + +- if (copy_to_user((void *) arg, &mm_vc_mem_base, +- sizeof (mm_vc_mem_base)) != 0) { ++ if (copy_to_user((void *)arg, &mm_vc_mem_base, ++ sizeof(mm_vc_mem_base))) { + rc = -EFAULT; + } + break; +@@ -243,12 +202,6 @@ vc_mem_compat_ioctl(struct file *file, u + } + #endif + +-/**************************************************************************** +-* +-* vc_mem_mmap +-* +-***************************************************************************/ +- + static int + vc_mem_mmap(struct file *filp, struct vm_area_struct *vma) + { +@@ -257,32 +210,26 @@ vc_mem_mmap(struct file *filp, struct vm + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + + pr_debug("%s: vm_start = 0x%08lx vm_end = 0x%08lx vm_pgoff = 0x%08lx\n", +- __func__, (long) vma->vm_start, (long) vma->vm_end, +- (long) vma->vm_pgoff); ++ __func__, (long)vma->vm_start, (long)vma->vm_end, ++ (long)vma->vm_pgoff); + + if (offset + length > mm_vc_mem_size) { + pr_err("%s: length %ld is too big\n", __func__, length); + return -EINVAL; + } +- // Do not cache the memory map ++ /* Do not cache the memory map */ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + rc = remap_pfn_range(vma, vma->vm_start, + (mm_vc_mem_phys_addr >> PAGE_SHIFT) + + vma->vm_pgoff, length, vma->vm_page_prot); +- if (rc != 0) { ++ if (rc) + pr_err("%s: remap_pfn_range failed (rc=%d)\n", __func__, rc); +- } + + return rc; + } + +-/**************************************************************************** +-* +-* File Operations for the driver. +-* +-***************************************************************************/ +- ++/* File Operations for the driver. */ + static const struct file_operations vc_mem_fops = { + .owner = THIS_MODULE, + .open = vc_mem_open, +@@ -316,7 +263,7 @@ static int vc_mem_debugfs_init( + vc_mem_debugfs_entry, + (u32 *)&mm_vc_mem_phys_addr)) { + dev_warn(dev, "%s:could not create vc_mem_phys entry\n", +- __func__); ++ __func__); + goto fail; + } + +@@ -325,7 +272,7 @@ static int vc_mem_debugfs_init( + vc_mem_debugfs_entry, + (u32 *)&mm_vc_mem_size)) { + dev_warn(dev, "%s:could not create vc_mem_size entry\n", +- __func__); ++ __func__); + goto fail; + } + +@@ -347,12 +294,7 @@ fail: + + #endif /* CONFIG_DEBUG_FS */ + +- +-/**************************************************************************** +-* +-* vc_mem_init +-* +-***************************************************************************/ ++/* Module load/unload functions */ + + static int __init + vc_mem_init(void) +@@ -369,16 +311,19 @@ vc_mem_init(void) + vc_mem_get_size(); + + pr_info("vc-mem: phys_addr:0x%08lx mem_base=0x%08x mem_size:0x%08x(%u MiB)\n", +- mm_vc_mem_phys_addr, mm_vc_mem_base, mm_vc_mem_size, mm_vc_mem_size / (1024 * 1024)); ++ mm_vc_mem_phys_addr, mm_vc_mem_base, mm_vc_mem_size, ++ mm_vc_mem_size / (1024 * 1024)); + +- if ((rc = alloc_chrdev_region(&vc_mem_devnum, 0, 1, DRIVER_NAME)) < 0) { ++ rc = alloc_chrdev_region(&vc_mem_devnum, 0, 1, DRIVER_NAME); ++ if (rc < 0) { + pr_err("%s: alloc_chrdev_region failed (rc=%d)\n", + __func__, rc); + goto out_err; + } + + cdev_init(&vc_mem_cdev, &vc_mem_fops); +- if ((rc = cdev_add(&vc_mem_cdev, vc_mem_devnum, 1)) != 0) { ++ rc = cdev_add(&vc_mem_cdev, vc_mem_devnum, 1); ++ if (rc) { + pr_err("%s: cdev_add failed (rc=%d)\n", __func__, rc); + goto out_unregister; + } +@@ -408,26 +353,20 @@ vc_mem_init(void) + + device_destroy(vc_mem_class, vc_mem_devnum); + +- out_class_destroy: ++out_class_destroy: + class_destroy(vc_mem_class); + vc_mem_class = NULL; + +- out_cdev_del: ++out_cdev_del: + cdev_del(&vc_mem_cdev); + +- out_unregister: ++out_unregister: + unregister_chrdev_region(vc_mem_devnum, 1); + +- out_err: ++out_err: + return -1; + } + +-/**************************************************************************** +-* +-* vc_mem_exit +-* +-***************************************************************************/ +- + static void __exit + vc_mem_exit(void) + { +--- a/include/linux/broadcom/vc_mem.h ++++ b/include/linux/broadcom/vc_mem.h +@@ -1,16 +1,16 @@ +-/***************************************************************************** +-* Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. +-* +-* Unless you and Broadcom execute a separate written software license +-* agreement governing use of this software, this software is licensed to you +-* under the terms of the GNU General Public License version 2, available at +-* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). +-* +-* Notwithstanding the above, under no circumstances may you combine this +-* software in any way with any other Broadcom software provided under a +-* license other than the GPL, without Broadcom's express prior written +-* consent. +-*****************************************************************************/ ++/* ++ * Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. ++ * ++ * Unless you and Broadcom execute a separate written software license ++ * agreement governing use of this software, this software is licensed to you ++ * under the terms of the GNU General Public License version 2, available at ++ * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++ * ++ * Notwithstanding the above, under no circumstances may you combine this ++ * software in any way with any other Broadcom software provided under a ++ * license other than the GPL, without Broadcom's express prior written ++ * consent. ++ */ + + #ifndef _VC_MEM_H + #define _VC_MEM_H +@@ -19,17 +19,17 @@ + + #define VC_MEM_IOC_MAGIC 'v' + +-#define VC_MEM_IOC_MEM_PHYS_ADDR _IOR( VC_MEM_IOC_MAGIC, 0, unsigned long ) +-#define VC_MEM_IOC_MEM_SIZE _IOR( VC_MEM_IOC_MAGIC, 1, unsigned int ) +-#define VC_MEM_IOC_MEM_BASE _IOR( VC_MEM_IOC_MAGIC, 2, unsigned int ) +-#define VC_MEM_IOC_MEM_LOAD _IOR( VC_MEM_IOC_MAGIC, 3, unsigned int ) ++#define VC_MEM_IOC_MEM_PHYS_ADDR _IOR(VC_MEM_IOC_MAGIC, 0, unsigned long) ++#define VC_MEM_IOC_MEM_SIZE _IOR(VC_MEM_IOC_MAGIC, 1, unsigned int) ++#define VC_MEM_IOC_MEM_BASE _IOR(VC_MEM_IOC_MAGIC, 2, unsigned int) ++#define VC_MEM_IOC_MEM_LOAD _IOR(VC_MEM_IOC_MAGIC, 3, unsigned int) + +-#if defined( __KERNEL__ ) ++#ifdef __KERNEL__ + #define VC_MEM_TO_ARM_ADDR_MASK 0x3FFFFFFF + + extern unsigned long mm_vc_mem_phys_addr; + extern unsigned int mm_vc_mem_size; +-extern int vc_mem_get_current_size( void ); ++extern int vc_mem_get_current_size(void); + #endif + + #ifdef CONFIG_COMPAT diff --git a/target/linux/brcm2708/patches-4.19/950-0324-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch b/target/linux/brcm2708/patches-4.19/950-0324-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch new file mode 100644 index 000000000..303cfd763 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0324-clk-clk-bcm2835-Use-zd-when-printing-size_t.patch @@ -0,0 +1,24 @@ +From efb7d0e1c98be0715d57d6fd41f2d8f9ec7b9afd Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 15:09:28 +0000 +Subject: [PATCH 324/703] clk: clk-bcm2835: Use %zd when printing size_t + +The debug text for how many clocks have been registered +uses "%d" with a size_t. Correct it to "%zd". + +Signed-off-by: Dave Stevenson +--- + drivers/clk/bcm/clk-bcm2835.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -2271,7 +2271,7 @@ static int bcm2835_clk_probe(struct plat + return ret; + + /* note that we have registered all the clocks */ +- dev_dbg(dev, "registered %d clocks\n", asize); ++ dev_dbg(dev, "registered %zd clocks\n", asize); + + return 0; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0325-mfd-Add-rpi_sense_core-of-compatible-string.patch b/target/linux/brcm2708/patches-4.19/950-0325-mfd-Add-rpi_sense_core-of-compatible-string.patch new file mode 100644 index 000000000..0d95039d1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0325-mfd-Add-rpi_sense_core-of-compatible-string.patch @@ -0,0 +1,26 @@ +From 9f4e8de5ea95750736cda32007e7e5f099429396 Mon Sep 17 00:00:00 2001 +From: Serge Schneider +Date: Tue, 29 Jan 2019 12:05:49 +0000 +Subject: [PATCH 325/703] mfd: Add rpi_sense_core of compatible string + +--- + drivers/mfd/rpisense-core.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mfd/rpisense-core.c ++++ b/drivers/mfd/rpisense-core.c +@@ -138,6 +138,14 @@ static const struct i2c_device_id rpisen + }; + MODULE_DEVICE_TABLE(i2c, rpisense_i2c_id); + ++#ifdef CONFIG_OF ++static const struct of_device_id rpisense_core_id[] = { ++ { .compatible = "rpi,rpi-sense" }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, rpisense_core_id); ++#endif ++ + + static struct i2c_driver rpisense_driver = { + .driver = { diff --git a/target/linux/brcm2708/patches-4.19/950-0326-gpu-vc4_firmware_kms-Fix-up-64-bit-compile-warnings.patch b/target/linux/brcm2708/patches-4.19/950-0326-gpu-vc4_firmware_kms-Fix-up-64-bit-compile-warnings.patch new file mode 100644 index 000000000..d8fff0310 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0326-gpu-vc4_firmware_kms-Fix-up-64-bit-compile-warnings.patch @@ -0,0 +1,66 @@ +From dacca227ccf7120b91dac51cdb863aa6bcab9c2f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 28 Jan 2019 14:40:16 +0000 +Subject: [PATCH 326/703] gpu: vc4_firmware_kms: Fix up 64 bit compile + warnings. + +Resolve two build warnings with regard using incorrectly +sized parameters in logging messages on 64 bit builds. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -160,14 +160,14 @@ static void vc4_primary_plane_atomic_upd + WARN_ON_ONCE(vc4_plane->pitch != fb->pitches[0]); + } + +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] primary update %dx%d@%d +%d,%d 0x%08x/%d\n", ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] primary update %dx%d@%d +%d,%d 0x%pad/%d\n", + plane->base.id, plane->name, + state->crtc_w, + state->crtc_h, + bpp, + state->crtc_x, + state->crtc_y, +- bo->paddr + fb->offsets[0], ++ &fbinfo->base, + fb->pitches[0]); + + ret = rpi_firmware_transaction(vc4->firmware, +@@ -197,6 +197,7 @@ static void vc4_cursor_plane_atomic_upda + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); ++ dma_addr_t addr = bo->paddr + fb->offsets[0]; + int ret; + u32 packet_state[] = { + state->crtc->state->active, +@@ -206,13 +207,13 @@ static void vc4_cursor_plane_atomic_upda + }; + WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4); + +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] update %dx%d cursor at %d,%d (0x%08x/%d)", ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] update %dx%d cursor at %d,%d (0x%pad/%d)", + plane->base.id, plane->name, + state->crtc_w, + state->crtc_h, + state->crtc_x, + state->crtc_y, +- bo->paddr + fb->offsets[0], ++ &addr, + fb->pitches[0]); + + /* add on the top/left offsets when overscan is active */ +@@ -238,7 +239,7 @@ static void vc4_cursor_plane_atomic_upda + fb != old_state->fb) { + u32 packet_info[] = { state->crtc_w, state->crtc_h, + 0, /* unused */ +- bo->paddr + fb->offsets[0], ++ addr, + 0, 0, /* hotx, hoty */}; + + ret = rpi_firmware_property(vc4->firmware, diff --git a/target/linux/brcm2708/patches-4.19/950-0327-input-rpi-ft5406-Clear-build-warning-on-64-bit-build.patch b/target/linux/brcm2708/patches-4.19/950-0327-input-rpi-ft5406-Clear-build-warning-on-64-bit-build.patch new file mode 100644 index 000000000..ad4f2d5ed --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0327-input-rpi-ft5406-Clear-build-warning-on-64-bit-build.patch @@ -0,0 +1,26 @@ +From 9611b3067bd576a4a02bf503baf57db681571e3d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 28 Jan 2019 14:42:34 +0000 +Subject: [PATCH 327/703] input: rpi-ft5406: Clear build warning on 64 bit + builds. + +Resolve 64 bit build warning over using %x with a dma_addr_t. + +Signed-off-by: Dave Stevenson +--- + drivers/input/touchscreen/rpi-ft5406.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/input/touchscreen/rpi-ft5406.c ++++ b/drivers/input/touchscreen/rpi-ft5406.c +@@ -218,8 +218,8 @@ static int ft5406_probe(struct platform_ + + if (!ts->ts_base) { + dev_warn(dev, +- "set failed, trying get (err:%d touchbuf:%x virt:%p bus:%x)\n", +- err, touchbuf, ts->ts_base, ts->bus_addr); ++ "set failed, trying get (err:%d touchbuf:%x virt:%p bus:%pad)\n", ++ err, touchbuf, ts->ts_base, &ts->bus_addr); + + err = rpi_firmware_property( + fw, diff --git a/target/linux/brcm2708/patches-4.19/950-0328-dtoverlays-Correct-DT-handling-camera-GPIOs.patch b/target/linux/brcm2708/patches-4.19/950-0328-dtoverlays-Correct-DT-handling-camera-GPIOs.patch new file mode 100644 index 000000000..707531c42 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0328-dtoverlays-Correct-DT-handling-camera-GPIOs.patch @@ -0,0 +1,85 @@ +From 7ca9fd2d5c0488279fb746ef17c99f737416949d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 18 Sep 2018 10:47:38 +0100 +Subject: [PATCH 328/703] dtoverlays: Correct DT handling camera GPIOs + +The firmware has support for updating overrides with the correct +GPIO settings for the camera GPIOs, but the wrong device tree +setup ended up being merged. +Correct the DT configuration so that the firmware does set it +up correctly. + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/bcm270x.dtsi | 7 +++++++ + arch/arm/boot/dts/overlays/README | 10 +--------- + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 14 +++++++++++--- + 3 files changed, 19 insertions(+), 12 deletions(-) + +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -152,6 +152,13 @@ + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; ++ ++ __overrides__ { ++ cam0-pwdn-ctrl; ++ cam0-pwdn; ++ cam0-led-ctrl; ++ cam0-led; ++ }; + }; + + &vc4 { +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1366,15 +1366,7 @@ Info: Omnivision OV5647 camera module. + Uses Unicam 1, which is the standard camera connector on most Pi + variants. + Load: dtoverlay=ov5647,= +-Params: cam0-pwdn GPIO used to control the sensor powerdown line. +- +- cam0-led GPIO used to control the sensor led +- Both these fields should be automatically filled +- in by the firmware to reflect the default GPIO +- configuration of the particular Pi variant in +- use. +- +- i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. ++Params: i2c_pins_0_1 Use pins 0&1 for the I2C instead of 44&45. + Useful on Compute Modules. + + i2c_pins_28_29 Use pins 28&29 for the I2C instead of 44&45. +--- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts +@@ -14,7 +14,7 @@ + status = "okay"; + + ov5647: ov5647@36 { +- compatible = "ov5647"; ++ compatible = "ovti,ov5647"; + reg = <0x36>; + status = "okay"; + +@@ -82,10 +82,18 @@ + }; + }; + ++ fragment@6 { ++ target-path="/__overrides__"; ++ __overlay__ { ++ cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0"; ++ cam0-pwdn = <&ov5647>,"pwdn-gpios:4"; ++ cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12"; ++ cam0-led = <&ov5647>,"pwdn-gpios:16"; ++ }; ++ }; ++ + __overrides__ { + i2c_pins_0_1 = <0>,"-2-3+4"; + i2c_pins_28_29 = <0>,"+2-3-4"; +- cam0-pwdn = <&ov5647>,"pwdn-gpios:4"; +- cam0-led = <&ov5647>,"pwdn-gpios:16"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0329-media-ov5647-Use-gpiod_set_value_cansleep.patch b/target/linux/brcm2708/patches-4.19/950-0329-media-ov5647-Use-gpiod_set_value_cansleep.patch new file mode 100644 index 000000000..5ac15ba63 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0329-media-ov5647-Use-gpiod_set_value_cansleep.patch @@ -0,0 +1,54 @@ +From eca3d1380c02a49273c89ce988532dd23a964860 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 18 Sep 2018 11:08:51 +0100 +Subject: [PATCH 329/703] media: ov5647: Use gpiod_set_value_cansleep + +All calls to the gpio library are in contexts that can sleep, +therefore there is no issue with having those GPIOs controlled +by controllers which require sleeping (eg I2C GPIO expanders). + +Switch to using gpiod_set_value_cansleep instead of gpiod_set_value +to avoid triggering the warning in gpiolib should the GPIO +controller need to sleep. + +Signed-off-by: Dave Stevenson +--- + drivers/media/i2c/ov5647.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/media/i2c/ov5647.c ++++ b/drivers/media/i2c/ov5647.c +@@ -373,7 +373,7 @@ static int ov5647_sensor_power(struct v4 + dev_dbg(&client->dev, "OV5647 power on\n"); + + if (ov5647->pwdn) { +- gpiod_set_value(ov5647->pwdn, 0); ++ gpiod_set_value_cansleep(ov5647->pwdn, 0); + msleep(PWDN_ACTIVE_DELAY_MS); + } + +@@ -415,7 +415,7 @@ static int ov5647_sensor_power(struct v4 + + clk_disable_unprepare(ov5647->xclk); + +- gpiod_set_value(ov5647->pwdn, 1); ++ gpiod_set_value_cansleep(ov5647->pwdn, 1); + } + + /* Update the power count. */ +@@ -649,13 +649,13 @@ static int ov5647_probe(struct i2c_clien + goto mutex_remove; + + if (sensor->pwdn) { +- gpiod_set_value(sensor->pwdn, 0); ++ gpiod_set_value_cansleep(sensor->pwdn, 0); + msleep(PWDN_ACTIVE_DELAY_MS); + } + + ret = ov5647_detect(sd); + +- gpiod_set_value(sensor->pwdn, 1); ++ gpiod_set_value_cansleep(sensor->pwdn, 1); + + if (ret < 0) + goto error; diff --git a/target/linux/brcm2708/patches-4.19/950-0330-media-bcm2835-unicam-Power-on-subdev-on-open-release.patch b/target/linux/brcm2708/patches-4.19/950-0330-media-bcm2835-unicam-Power-on-subdev-on-open-release.patch new file mode 100644 index 000000000..d6294cf20 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0330-media-bcm2835-unicam-Power-on-subdev-on-open-release.patch @@ -0,0 +1,121 @@ +From e627fc071de98ec50c88869b579bb90f15043e3d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 15:56:10 +0000 +Subject: [PATCH 330/703] media:bcm2835-unicam: Power on subdev on + open/release, not streaming + +The driver was powering on the source subdevice as part of STREAMON, +and powering it off in STREAMOFF. This isn't so great if there is a +significant amount of setup required for your device. + +Copy the approach taken in the Atmel ISC driver where s_power(1) is called +on first file handle open, and s_power(0) is called on the last release. + +See https://www.raspberrypi.org/forums/viewtopic.php?f=43&t=232437 + +Signed-off-by: Dave Stevenson +--- + .../media/platform/bcm2835/bcm2835-unicam.c | 68 +++++++++++++++---- + 1 file changed, 54 insertions(+), 14 deletions(-) + +--- a/drivers/media/platform/bcm2835/bcm2835-unicam.c ++++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c +@@ -1237,11 +1237,6 @@ static int unicam_start_streaming(struct + unicam_err(dev, "Failed to enable CSI clock: %d\n", ret); + goto err_pm_put; + } +- ret = v4l2_subdev_call(dev->sensor, core, s_power, 1); +- if (ret < 0 && ret != -ENOIOCTLCMD) { +- unicam_err(dev, "power on failed in subdev\n"); +- goto err_clock_unprepare; +- } + dev->streaming = 1; + + unicam_start_rx(dev, addr); +@@ -1256,8 +1251,6 @@ static int unicam_start_streaming(struct + + err_disable_unicam: + unicam_disable(dev); +- v4l2_subdev_call(dev->sensor, core, s_power, 0); +-err_clock_unprepare: + clk_disable_unprepare(dev->clock); + err_pm_put: + unicam_runtime_put(dev); +@@ -1306,11 +1299,6 @@ static void unicam_stop_streaming(struct + dev->next_frm = NULL; + spin_unlock_irqrestore(&dev->dma_queue_lock, flags); + +- if (v4l2_subdev_has_op(dev->sensor, core, s_power)) { +- if (v4l2_subdev_call(dev->sensor, core, s_power, 0) < 0) +- unicam_err(dev, "power off failed in subdev\n"); +- } +- + clk_disable_unprepare(dev->clock); + unicam_runtime_put(dev); + } +@@ -1543,11 +1531,63 @@ static const struct vb2_ops unicam_video + .stop_streaming = unicam_stop_streaming, + }; + ++/* ++ * unicam_open : This function is based on the v4l2_fh_open helper function. ++ * It has been augmented to handle sensor subdevice power management, ++ */ ++static int unicam_open(struct file *file) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ int ret; ++ ++ mutex_lock(&dev->lock); ++ ++ ret = v4l2_fh_open(file); ++ if (ret) { ++ unicam_err(dev, "v4l2_fh_open failed\n"); ++ goto unlock; ++ } ++ ++ if (!v4l2_fh_is_singular_file(file)) ++ goto unlock; ++ ++ ret = v4l2_subdev_call(dev->sensor, core, s_power, 1); ++ if (ret < 0 && ret != -ENOIOCTLCMD) { ++ v4l2_fh_release(file); ++ goto unlock; ++ } ++ ++unlock: ++ mutex_unlock(&dev->lock); ++ return ret; ++} ++ ++static int unicam_release(struct file *file) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ struct v4l2_subdev *sd = dev->sensor; ++ bool fh_singular; ++ int ret; ++ ++ mutex_lock(&dev->lock); ++ ++ fh_singular = v4l2_fh_is_singular_file(file); ++ ++ ret = _vb2_fop_release(file, NULL); ++ ++ if (fh_singular) ++ v4l2_subdev_call(sd, core, s_power, 0); ++ ++ mutex_unlock(&dev->lock); ++ ++ return ret; ++} ++ + /* unicam capture driver file operations */ + static const struct v4l2_file_operations unicam_fops = { + .owner = THIS_MODULE, +- .open = v4l2_fh_open, +- .release = vb2_fop_release, ++ .open = unicam_open, ++ .release = unicam_release, + .read = vb2_fop_read, + .poll = vb2_fop_poll, + .unlocked_ioctl = video_ioctl2, diff --git a/target/linux/brcm2708/patches-4.19/950-0331-audioinjector-octo-revert-to-dummy-supplies.patch b/target/linux/brcm2708/patches-4.19/950-0331-audioinjector-octo-revert-to-dummy-supplies.patch new file mode 100644 index 000000000..db005e6af --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0331-audioinjector-octo-revert-to-dummy-supplies.patch @@ -0,0 +1,23 @@ +From 6fcdc4686f212cb572a0b93a293f6b6fb2a49992 Mon Sep 17 00:00:00 2001 +From: Matt Flax +Date: Tue, 29 Jan 2019 14:56:03 +1100 +Subject: [PATCH 331/703] audioinjector-octo: revert to dummy supplies + +The Audio Injector Octo has had a lot of reports of not coming up on power cycles. By reverting to dummy supplies, the card comes up reliably. +--- + arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts | 4 ---- + 1 file changed, 4 deletions(-) + +--- a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts +@@ -25,10 +25,6 @@ + reg = <0x48>; + clocks = <&cs42448_mclk>; + clock-names = "mclk"; +- VA-supply = <&vdd_5v0_reg>; +- VD-supply = <&vdd_3v3_reg>; +- VLS-supply = <&vdd_3v3_reg>; +- VLC-supply = <&vdd_3v3_reg>; + status = "okay"; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0332-staging-bcm2835-camera-Correct-ctrl-min-max-step-def.patch b/target/linux/brcm2708/patches-4.19/950-0332-staging-bcm2835-camera-Correct-ctrl-min-max-step-def.patch new file mode 100644 index 000000000..e8fb4e233 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0332-staging-bcm2835-camera-Correct-ctrl-min-max-step-def.patch @@ -0,0 +1,58 @@ +From 0bdc8ddc14e97955e91c999b42f90f420a190027 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 16:20:38 +0000 +Subject: [PATCH 332/703] staging: bcm2835-camera: Correct ctrl + min/max/step/def to 64bit + +The V4L2 control API was expanded to take 64 bit values in commit +0ba2aeb6dab (Apr 16 2014), but as this driver wasn't in the mainline +kernel at that point this was overlooked. + +Update to use 64 bit values. This also fixes a couple of warnings +in 64 bit builds. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-camera/controls.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-camera/controls.c ++++ b/drivers/staging/vc04_services/bcm2835-camera/controls.c +@@ -78,10 +78,10 @@ struct bm2835_mmal_v4l2_ctrl { + /* control minimum value or + * mask for MMAL_CONTROL_TYPE_STD_MENU + */ +- s32 min; +- s32 max; /* maximum value of control */ +- s32 def; /* default value of control */ +- s32 step; /* step size of the control */ ++ s64 min; ++ s64 max; /* maximum value of control */ ++ s64 def; /* default value of control */ ++ u64 step; /* step size of the control */ + const s64 *imenu; /* integer menu array */ + u32 mmal_id; /* mmal parameter id */ + bm2835_mmal_v4l2_ctrl_cb *setter; +@@ -1244,7 +1244,7 @@ int bm2835_mmal_init_controls(struct bm2 + + case MMAL_CONTROL_TYPE_STD_MENU: + { +- int mask = ctrl->min; ++ u64 mask = ctrl->min; + + if (ctrl->id == V4L2_CID_SCENE_MODE) { + /* Special handling to work out the mask +@@ -1254,11 +1254,11 @@ int bm2835_mmal_init_controls(struct bm2 + */ + int i; + +- mask = 1 << V4L2_SCENE_MODE_NONE; ++ mask = BIT(V4L2_SCENE_MODE_NONE); + for (i = 0; + i < ARRAY_SIZE(scene_configs); + i++) { +- mask |= 1 << scene_configs[i].v4l2_scene; ++ mask |= BIT(scene_configs[i].v4l2_scene); + } + mask = ~mask; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0333-staging-bcm2835-codec-variable-vb2-may-be-used-unini.patch b/target/linux/brcm2708/patches-4.19/950-0333-staging-bcm2835-codec-variable-vb2-may-be-used-unini.patch new file mode 100644 index 000000000..79c953bea --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0333-staging-bcm2835-codec-variable-vb2-may-be-used-unini.patch @@ -0,0 +1,37 @@ +From e53e03707c6de4230a67633e5eb534e244d21b9e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 16:40:01 +0000 +Subject: [PATCH 333/703] staging: bcm2835-codec: variable vb2 may be used + uninitialised + +In op_buffer_cb, the failure path checked whether there was +an associated vb2 buffer before the variable vb2 had been +assigned. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -634,6 +634,9 @@ static void op_buffer_cb(struct vchiq_mm + __func__, status, mmal_buf, mmal_buf->length, + mmal_buf->mmal_flags, mmal_buf->pts); + ++ buf = container_of(mmal_buf, struct m2m_mmal_buffer, mmal); ++ vb2 = &buf->m2m.vb; ++ + if (status) { + /* error in transfer */ + if (vb2) { +@@ -658,9 +661,6 @@ static void op_buffer_cb(struct vchiq_mm + return; + } + +- buf = container_of(mmal_buf, struct m2m_mmal_buffer, mmal); +- vb2 = &buf->m2m.vb; +- + v4l2_dbg(3, debug, &ctx->dev->v4l2_dev, "%s: length %lu, flags %x, idx %u\n", + __func__, mmal_buf->length, mmal_buf->mmal_flags, + vb2->vb2_buf.index); diff --git a/target/linux/brcm2708/patches-4.19/950-0334-staging-bcm2835-codec-Fix-potentially-uninitialised-.patch b/target/linux/brcm2708/patches-4.19/950-0334-staging-bcm2835-codec-Fix-potentially-uninitialised-.patch new file mode 100644 index 000000000..72688e4d4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0334-staging-bcm2835-codec-Fix-potentially-uninitialised-.patch @@ -0,0 +1,25 @@ +From ee043e469252c42db198e66f4e4c290dcd48d4a0 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 24 Jan 2019 16:36:19 +0000 +Subject: [PATCH 334/703] staging: bcm2835-codec: Fix potentially uninitialised + vars + +src_m2m_buf and dst_m2m_buf were printed in log messages +when there are code paths that don't initialise them. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -743,7 +743,7 @@ static void device_run(void *priv) + struct bcm2835_codec_ctx *ctx = priv; + struct bcm2835_codec_dev *dev = ctx->dev; + struct vb2_v4l2_buffer *src_buf, *dst_buf; +- struct m2m_mmal_buffer *src_m2m_buf, *dst_m2m_buf; ++ struct m2m_mmal_buffer *src_m2m_buf = NULL, *dst_m2m_buf = NULL; + struct v4l2_m2m_buffer *m2m; + int ret; + diff --git a/target/linux/brcm2708/patches-4.19/950-0335-video-bcm2708_fb-Add-compat_ioctl-support.patch b/target/linux/brcm2708/patches-4.19/950-0335-video-bcm2708_fb-Add-compat_ioctl-support.patch new file mode 100644 index 000000000..af2c45641 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0335-video-bcm2708_fb-Add-compat_ioctl-support.patch @@ -0,0 +1,154 @@ +From 5bdb5d6229725a096d7ded73a47034d8bb7f70be Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 25 Jan 2019 17:12:54 +0000 +Subject: [PATCH 335/703] video: bcm2708_fb: Add compat_ioctl support. + +When using a 64 bit kernel with 32 bit userspace we need +compat ioctl handling for FBIODMACOPY as one of the +parameters is a pointer. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 87 ++++++++++++++++++++++++-------- + 1 file changed, 66 insertions(+), 21 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -482,9 +482,8 @@ static void dma_memcpy(struct bcm2708_fb + /* cache coherent but non-allocating in L1 and L2 */ + #define INTALIAS_L1L2_NONALLOCATING(x) (((x)&~0xc0000000)|0x80000000) + +-static long vc_mem_copy(struct bcm2708_fb *fb, unsigned long arg) ++static long vc_mem_copy(struct bcm2708_fb *fb, struct fb_dmacopy *ioparam) + { +- struct fb_dmacopy ioparam; + size_t size = PAGE_SIZE; + u32 *buf = NULL; + dma_addr_t bus_addr; +@@ -497,26 +496,16 @@ static long vc_mem_copy(struct bcm2708_f + goto out; + } + +- /* Get the parameter data. +- */ +- if (copy_from_user +- (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { +- pr_err("[%s]: failed to copy-from-user\n", +- __func__); +- rc = -EFAULT; +- goto out; +- } +- +- if (fb->gpu.base == 0 || fb->gpu.length == 0) { ++ if (!fb->gpu.base || !fb->gpu.length) { + pr_err("[%s]: Unable to determine gpu memory (%x,%x)\n", + __func__, fb->gpu.base, fb->gpu.length); + return -EFAULT; + } + +- if (INTALIAS_NORMAL(ioparam.src) < fb->gpu.base || +- INTALIAS_NORMAL(ioparam.src) >= fb->gpu.base + fb->gpu.length) { ++ if (INTALIAS_NORMAL(ioparam->src) < fb->gpu.base || ++ INTALIAS_NORMAL(ioparam->src) >= fb->gpu.base + fb->gpu.length) { + pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__, +- INTALIAS_NORMAL(ioparam.src), fb->gpu.base, ++ INTALIAS_NORMAL(ioparam->src), fb->gpu.base, + fb->gpu.base + fb->gpu.length); + return -EFAULT; + } +@@ -530,11 +519,11 @@ static long vc_mem_copy(struct bcm2708_f + goto out; + } + +- for (offset = 0; offset < ioparam.length; offset += size) { +- size_t remaining = ioparam.length - offset; ++ for (offset = 0; offset < ioparam->length; offset += size) { ++ size_t remaining = ioparam->length - offset; + size_t s = min(size, remaining); +- unsigned char *p = (unsigned char *)ioparam.src + offset; +- unsigned char *q = (unsigned char *)ioparam.dst + offset; ++ u8 *p = (u8 *)((uintptr_t)ioparam->src + offset); ++ u8 *q = (u8 *)ioparam->dst + offset; + + dma_memcpy(fb, bus_addr, + INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size); +@@ -566,8 +555,19 @@ static int bcm2708_ioctl(struct fb_info + &dummy, sizeof(dummy)); + break; + case FBIODMACOPY: +- ret = vc_mem_copy(fb, arg); ++ { ++ struct fb_dmacopy ioparam; ++ /* Get the parameter data. ++ */ ++ if (copy_from_user ++ (&ioparam, (void *)arg, sizeof(ioparam))) { ++ pr_err("[%s]: failed to copy-from-user\n", __func__); ++ ret = -EFAULT; ++ break; ++ } ++ ret = vc_mem_copy(fb, &ioparam); + break; ++ } + default: + dev_dbg(info->device, "Unknown ioctl 0x%x\n", cmd); + return -ENOTTY; +@@ -578,6 +578,48 @@ static int bcm2708_ioctl(struct fb_info + + return ret; + } ++ ++#ifdef CONFIG_COMPAT ++struct fb_dmacopy32 { ++ compat_uptr_t dst; ++ __u32 src; ++ __u32 length; ++}; ++ ++#define FBIODMACOPY32 _IOW('z', 0x22, struct fb_dmacopy32) ++ ++static int bcm2708_compat_ioctl(struct fb_info *info, unsigned int cmd, ++ unsigned long arg) ++{ ++ struct bcm2708_fb *fb = to_bcm2708(info); ++ int ret; ++ ++ switch (cmd) { ++ case FBIODMACOPY32: ++ { ++ struct fb_dmacopy32 param32; ++ struct fb_dmacopy param; ++ /* Get the parameter data. ++ */ ++ if (copy_from_user(¶m32, (void *)arg, sizeof(param32))) { ++ pr_err("[%s]: failed to copy-from-user\n", __func__); ++ ret = -EFAULT; ++ break; ++ } ++ param.dst = compat_ptr(param32.dst); ++ param.src = param32.src; ++ param.length = param32.length; ++ ret = vc_mem_copy(fb, ¶m); ++ break; ++ } ++ default: ++ ret = bcm2708_ioctl(info, cmd, arg); ++ break; ++ } ++ return ret; ++} ++#endif ++ + static void bcm2708_fb_fillrect(struct fb_info *info, + const struct fb_fillrect *rect) + { +@@ -768,6 +810,9 @@ static struct fb_ops bcm2708_fb_ops = { + .fb_imageblit = bcm2708_fb_imageblit, + .fb_pan_display = bcm2708_fb_pan_display, + .fb_ioctl = bcm2708_ioctl, ++#ifdef CONFIG_COMPAT ++ .fb_compat_ioctl = bcm2708_compat_ioctl, ++#endif + }; + + static int bcm2708_fb_register(struct bcm2708_fb *fb) diff --git a/target/linux/brcm2708/patches-4.19/950-0336-video-bcm2708_fb-Fix-warnings-on-64-bit-builds.patch b/target/linux/brcm2708/patches-4.19/950-0336-video-bcm2708_fb-Fix-warnings-on-64-bit-builds.patch new file mode 100644 index 000000000..4441c8545 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0336-video-bcm2708_fb-Fix-warnings-on-64-bit-builds.patch @@ -0,0 +1,46 @@ +From 3695125662f57ce208b6769418bcda80bedbd5b6 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 25 Jan 2019 17:11:39 +0000 +Subject: [PATCH 336/703] video: bcm2708_fb: Fix warnings on 64 bit builds + +Fix up logging lines where the wrong format specifiers were +being used. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 10 ++++------ + 1 file changed, 4 insertions(+), 6 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -513,8 +513,8 @@ static long vc_mem_copy(struct bcm2708_f + buf = dma_alloc_coherent(fb->fb.device, PAGE_ALIGN(size), &bus_addr, + GFP_ATOMIC); + if (!buf) { +- pr_err("[%s]: failed to dma_alloc_coherent(%d)\n", +- __func__, size); ++ pr_err("[%s]: failed to dma_alloc_coherent(%zd)\n", __func__, ++ size); + rc = -ENOMEM; + goto out; + } +@@ -910,8 +910,7 @@ static int bcm2708_fb_probe(struct platf + goto free_fb; + } + +- pr_info("BCM2708FB: allocated DMA memory %08x\n", +- fb->cb_handle); ++ pr_info("BCM2708FB: allocated DMA memory %pad\n", &fb->cb_handle); + + ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK, + &fb->dma_chan_base, &fb->dma_irq); +@@ -929,8 +928,7 @@ static int bcm2708_fb_probe(struct platf + } + + +- pr_info("BCM2708FB: allocated DMA channel %d @ %p\n", +- fb->dma_chan, fb->dma_chan_base); ++ pr_info("BCM2708FB: allocated DMA channel %d\n", fb->dma_chan); + + fb->dev = dev; + fb->fb.device = &dev->dev; diff --git a/target/linux/brcm2708/patches-4.19/950-0337-video-bcm2708_fb-Clean-up-coding-style-issues.patch b/target/linux/brcm2708/patches-4.19/950-0337-video-bcm2708_fb-Clean-up-coding-style-issues.patch new file mode 100644 index 000000000..fcd34a1b2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0337-video-bcm2708_fb-Clean-up-coding-style-issues.patch @@ -0,0 +1,275 @@ +From 9236c0f31f2052bbcd6386367ace3ebfad57da3d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 25 Jan 2019 17:32:54 +0000 +Subject: [PATCH 337/703] video: bcm2708_fb: Clean up coding style issues + +Now checkpatch clean except for 2 long lines, missing +SPDX header, and no DT documentation. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 96 ++++++++++++++------------------ + 1 file changed, 42 insertions(+), 54 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -41,7 +41,7 @@ + #define MODULE_NAME "bcm2708_fb" + + #ifdef BCM2708_FB_DEBUG +-#define print_debug(fmt, ...) pr_debug("%s:%s:%d: "fmt, \ ++#define print_debug(fmt, ...) pr_debug("%s:%s:%d: " fmt, \ + MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) + #else + #define print_debug(fmt, ...) +@@ -57,7 +57,7 @@ static int fbheight = 480; /* module par + static int fbdepth = 32; /* module parameter */ + static int fbswap; /* module parameter */ + +-static u32 dma_busy_wait_threshold = 1<<15; ++static u32 dma_busy_wait_threshold = 1 << 15; + module_param(dma_busy_wait_threshold, int, 0644); + MODULE_PARM_DESC(dma_busy_wait_threshold, "Busy-wait for DMA completion below this area"); + +@@ -132,8 +132,8 @@ static int bcm2708_fb_debugfs_init(struc + fb->stats.regset.nregs = ARRAY_SIZE(stats_registers); + fb->stats.regset.base = &fb->stats; + +- if (!debugfs_create_regset32( +- "stats", 0444, fb->debugfs_dir, &fb->stats.regset)) { ++ if (!debugfs_create_regset32("stats", 0444, fb->debugfs_dir, ++ &fb->stats.regset)) { + pr_warn("%s: could not create statistics registers\n", + __func__); + goto fail; +@@ -223,25 +223,22 @@ static int bcm2708_fb_check_var(struct f + { + /* info input, var output */ + print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", +- __func__, +- info, +- info->var.xres, info->var.yres, info->var.xres_virtual, +- info->var.yres_virtual, (int)info->screen_size, +- info->var.bits_per_pixel); +- print_debug("%s(%p) %dx%d (%dx%d), %d\n", __func__, var, +- var->xres, var->yres, var->xres_virtual, var->yres_virtual, +- var->bits_per_pixel); ++ __func__, info, info->var.xres, info->var.yres, ++ info->var.xres_virtual, info->var.yres_virtual, ++ (int)info->screen_size, info->var.bits_per_pixel); ++ print_debug("%s(%p) %dx%d (%dx%d), %d\n", __func__, var, var->xres, ++ var->yres, var->xres_virtual, var->yres_virtual, ++ var->bits_per_pixel); + + if (!var->bits_per_pixel) + var->bits_per_pixel = 16; + + if (bcm2708_fb_set_bitfields(var) != 0) { + pr_err("%s: invalid bits_per_pixel %d\n", __func__, +- var->bits_per_pixel); ++ var->bits_per_pixel); + return -EINVAL; + } + +- + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + /* use highest possible virtual resolution */ +@@ -249,7 +246,7 @@ static int bcm2708_fb_check_var(struct f + var->yres_virtual = 480; + + pr_err("%s: virtual resolution set to maximum of %dx%d\n", +- __func__, var->xres_virtual, var->yres_virtual); ++ __func__, var->xres_virtual, var->yres_virtual); + } + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; +@@ -294,9 +291,9 @@ static int bcm2708_fb_set_par(struct fb_ + int ret; + + print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info, +- info->var.xres, info->var.yres, info->var.xres_virtual, +- info->var.yres_virtual, (int)info->screen_size, +- info->var.bits_per_pixel); ++ info->var.xres, info->var.yres, info->var.xres_virtual, ++ info->var.yres_virtual, (int)info->screen_size, ++ info->var.bits_per_pixel); + + ret = rpi_firmware_property_list(fb->fw, &fbinfo, sizeof(fbinfo)); + if (ret) { +@@ -328,12 +325,10 @@ static int bcm2708_fb_set_par(struct fb_ + return -ENOMEM; + } + +- print_debug( +- "%s: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d\n", +- __func__, +- (void *)fb->fb.screen_base, (void *)fb->fb_bus_address, +- fbinfo.xres, fbinfo.yres, fbinfo.bpp, +- fbinfo.pitch, (int)fb->fb.screen_size); ++ print_debug("%s: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d\n", ++ __func__, (void *)fb->fb.screen_base, ++ (void *)fb->fb_bus_address, fbinfo.xres, fbinfo.yres, ++ fbinfo.bpp, fbinfo.pitch, (int)fb->fb.screen_size); + + return 0; + } +@@ -345,7 +340,6 @@ static inline u32 convert_bitfield(int v + return (val >> (16 - bf->length) & mask) << bf->offset; + } + +- + static int bcm2708_fb_setcolreg(unsigned int regno, unsigned int red, + unsigned int green, unsigned int blue, + unsigned int transp, struct fb_info *info) +@@ -379,11 +373,11 @@ static int bcm2708_fb_setcolreg(unsigned + packet->offset = 0; + packet->length = regno + 1; + memcpy(packet->cmap, fb->gpu_cmap, +- sizeof(packet->cmap)); ++ sizeof(packet->cmap)); + ret = rpi_firmware_property(fb->fw, +- RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE, +- packet, +- (2 + packet->length) * sizeof(u32)); ++ RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE, ++ packet, ++ (2 + packet->length) * sizeof(u32)); + if (ret || packet->offset) + dev_err(info->device, + "Failed to set palette (%d,%u)\n", +@@ -392,9 +386,9 @@ static int bcm2708_fb_setcolreg(unsigned + } + } else if (regno < 16) { + fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) | +- convert_bitfield(blue, &fb->fb.var.blue) | +- convert_bitfield(green, &fb->fb.var.green) | +- convert_bitfield(red, &fb->fb.var.red); ++ convert_bitfield(blue, &fb->fb.var.blue) | ++ convert_bitfield(green, &fb->fb.var.green) | ++ convert_bitfield(red, &fb->fb.var.red); + } + return regno > 255; + } +@@ -437,8 +431,8 @@ static int bcm2708_fb_pan_display(struct + info->var.yoffset = var->yoffset; + result = bcm2708_fb_set_par(info); + if (result != 0) +- pr_err("%s(%d,%d) returns=%d\n", __func__, +- var->xoffset, var->yoffset, result); ++ pr_err("%s(%d,%d) returns=%d\n", __func__, var->xoffset, ++ var->yoffset, result); + return result; + } + +@@ -468,9 +462,8 @@ static void dma_memcpy(struct bcm2708_fb + cb->info |= BCM2708_DMA_INT_EN; + bcm_dma_start(fb->dma_chan_base, fb->cb_handle); + while (bcm_dma_is_busy(dma_chan)) { +- wait_event_interruptible( +- fb->dma_waitq, +- !bcm_dma_is_busy(dma_chan)); ++ wait_event_interruptible(fb->dma_waitq, ++ !bcm_dma_is_busy(dma_chan)); + } + fb->stats.dma_irqs++; + } +@@ -478,9 +471,9 @@ static void dma_memcpy(struct bcm2708_fb + } + + /* address with no aliases */ +-#define INTALIAS_NORMAL(x) ((x)&~0xc0000000) ++#define INTALIAS_NORMAL(x) ((x) & ~0xc0000000) + /* cache coherent but non-allocating in L1 and L2 */ +-#define INTALIAS_L1L2_NONALLOCATING(x) (((x)&~0xc0000000)|0x80000000) ++#define INTALIAS_L1L2_NONALLOCATING(x) (((x) & ~0xc0000000) | 0x80000000) + + static long vc_mem_copy(struct bcm2708_fb *fb, struct fb_dmacopy *ioparam) + { +@@ -498,15 +491,15 @@ static long vc_mem_copy(struct bcm2708_f + + if (!fb->gpu.base || !fb->gpu.length) { + pr_err("[%s]: Unable to determine gpu memory (%x,%x)\n", +- __func__, fb->gpu.base, fb->gpu.length); ++ __func__, fb->gpu.base, fb->gpu.length); + return -EFAULT; + } + + if (INTALIAS_NORMAL(ioparam->src) < fb->gpu.base || + INTALIAS_NORMAL(ioparam->src) >= fb->gpu.base + fb->gpu.length) { + pr_err("[%s]: Invalid memory access %x (%x-%x)", __func__, +- INTALIAS_NORMAL(ioparam->src), fb->gpu.base, +- fb->gpu.base + fb->gpu.length); ++ INTALIAS_NORMAL(ioparam->src), fb->gpu.base, ++ fb->gpu.base + fb->gpu.length); + return -EFAULT; + } + +@@ -528,8 +521,7 @@ static long vc_mem_copy(struct bcm2708_f + dma_memcpy(fb, bus_addr, + INTALIAS_L1L2_NONALLOCATING((dma_addr_t)p), size); + if (copy_to_user(q, buf, s) != 0) { +- pr_err("[%s]: failed to copy-to-user\n", +- __func__); ++ pr_err("[%s]: failed to copy-to-user\n", __func__); + rc = -EFAULT; + goto out; + } +@@ -755,7 +747,6 @@ static void bcm2708_fb_copyarea(struct f + /* end of dma control blocks chain */ + cb->next = 0; + +- + if (pixels < dma_busy_wait_threshold) { + bcm_dma_start(fb->dma_chan_base, fb->cb_handle); + bcm_dma_wait_idle(fb->dma_chan_base); +@@ -765,9 +756,8 @@ static void bcm2708_fb_copyarea(struct f + cb->info |= BCM2708_DMA_INT_EN; + bcm_dma_start(fb->dma_chan_base, fb->cb_handle); + while (bcm_dma_is_busy(dma_chan)) { +- wait_event_interruptible( +- fb->dma_waitq, +- !bcm_dma_is_busy(dma_chan)); ++ wait_event_interruptible(fb->dma_waitq, ++ !bcm_dma_is_busy(dma_chan)); + } + fb->stats.dma_irqs++; + } +@@ -863,7 +853,7 @@ static int bcm2708_fb_register(struct bc + return ret; + + print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n", +- fbwidth, fbheight, fbdepth, fbswap); ++ fbwidth, fbheight, fbdepth, fbswap); + + ret = register_framebuffer(&fb->fb); + print_debug("BCM2708FB: register framebuffer (%d)\n", ret); +@@ -893,7 +883,7 @@ static int bcm2708_fb_probe(struct platf + if (!fw) + return -EPROBE_DEFER; + +- fb = kzalloc(sizeof(struct bcm2708_fb), GFP_KERNEL); ++ fb = kzalloc(sizeof(*fb), GFP_KERNEL); + if (!fb) { + ret = -ENOMEM; + goto free_region; +@@ -927,7 +917,6 @@ static int bcm2708_fb_probe(struct platf + goto free_dma_chan; + } + +- + pr_info("BCM2708FB: allocated DMA channel %d\n", fb->dma_chan); + + fb->dev = dev; +@@ -936,9 +925,8 @@ static int bcm2708_fb_probe(struct platf + /* failure here isn't fatal, but we'll fail in vc_mem_copy if + * fb->gpu is not valid + */ +- rpi_firmware_property(fb->fw, +- RPI_FIRMWARE_GET_VC_MEMORY, +- &fb->gpu, sizeof(fb->gpu)); ++ rpi_firmware_property(fb->fw, RPI_FIRMWARE_GET_VC_MEMORY, &fb->gpu, ++ sizeof(fb->gpu)); + + ret = bcm2708_fb_register(fb); + if (ret == 0) { diff --git a/target/linux/brcm2708/patches-4.19/950-0338-bcm2835-dma-Add-support-for-per-channel-flags.patch b/target/linux/brcm2708/patches-4.19/950-0338-bcm2835-dma-Add-support-for-per-channel-flags.patch new file mode 100644 index 000000000..5a1cd23d5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0338-bcm2835-dma-Add-support-for-per-channel-flags.patch @@ -0,0 +1,48 @@ +From f1eb781eb15506a49307cd80ad5b70533622ee68 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 20 Jul 2018 22:03:41 +0100 +Subject: [PATCH 338/703] bcm2835-dma: Add support for per-channel flags + +Add the ability to interpret the high bits of the dreq specifier as +flags to be included in the DMA_CS register. The motivation for this +change is the ability to set the DISDEBUG flag for SD card transfers +to avoid corruption when using the VPU debugger. + +Signed-off-by: Phil Elwell +--- + drivers/dma/bcm2835-dma.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -146,6 +146,10 @@ struct bcm2835_desc { + #define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */ + #define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */ + #define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12) ++#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \ ++ BCM2835_DMA_PANIC_PRIORITY(15) | \ ++ BCM2835_DMA_WAIT_FOR_WRITES | \ ++ BCM2835_DMA_DIS_DEBUG)) + #define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */ + #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */ + #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */ +@@ -461,7 +465,8 @@ static void bcm2835_dma_start_desc(struc + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR); +- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS); ++ writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq), ++ c->chan_base + BCM2835_DMA_CS); + } + + static irqreturn_t bcm2835_dma_callback(int irq, void *data) +@@ -488,7 +493,8 @@ static irqreturn_t bcm2835_dma_callback( + * if this IRQ handler is threaded.) If the channel is finished, it + * will remain idle despite the ACTIVE flag being set. + */ +- writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE, ++ writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE | ++ BCM2835_DMA_CS_FLAGS(c->dreq), + c->chan_base + BCM2835_DMA_CS); + + d = c->desc; diff --git a/target/linux/brcm2708/patches-4.19/950-0339-bcm283x-Set-the-DISDEBUG-flag-for-SD-transfers.patch b/target/linux/brcm2708/patches-4.19/950-0339-bcm283x-Set-the-DISDEBUG-flag-for-SD-transfers.patch new file mode 100644 index 000000000..abaa23923 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0339-bcm283x-Set-the-DISDEBUG-flag-for-SD-transfers.patch @@ -0,0 +1,21 @@ +From 393156f30a06f1cd3e739e31b92e0f9a62857ea9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 20 Jul 2018 22:08:05 +0100 +Subject: [PATCH 339/703] bcm283x: Set the DISDEBUG flag for SD transfers + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm283x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -400,7 +400,7 @@ + reg = <0x7e202000 0x100>; + interrupts = <2 24>; + clocks = <&clocks BCM2835_CLOCK_VPU>; +- dmas = <&dma 13>; ++ dmas = <&dma (13|(1<<29))>; + dma-names = "rx-tx"; + status = "disabled"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0340-ASoC-pcm512x-Implement-the-digital_mute-interface.patch b/target/linux/brcm2708/patches-4.19/950-0340-ASoC-pcm512x-Implement-the-digital_mute-interface.patch new file mode 100644 index 000000000..68855d8bf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0340-ASoC-pcm512x-Implement-the-digital_mute-interface.patch @@ -0,0 +1,196 @@ +From 9912d38ec8ef31866f61d526e1d3c001c657964e Mon Sep 17 00:00:00 2001 +From: Dimitris Papavasiliou +Date: Sat, 24 Nov 2018 22:05:42 +0200 +Subject: [PATCH 340/703] ASoC: pcm512x: Implement the digital_mute interface + +[ Upstream commit 3500f1c589e92e0b6b1f8d31b4084fbde08d49cb ] + +Clicks and pops of various volumes can be produced while the device is +opened, closed, put into and taken out of standby, or reconfigured. +Fix this, by implementing the digital_mute interface, so that the +output is muted during such operations. + +Signed-off-by: Dimitris Papavasiliou +Signed-off-by: Mark Brown +--- + sound/soc/codecs/pcm512x.c | 121 ++++++++++++++++++++++++++++++++++++- + sound/soc/codecs/pcm512x.h | 2 + + 2 files changed, 121 insertions(+), 2 deletions(-) + +--- a/sound/soc/codecs/pcm512x.c ++++ b/sound/soc/codecs/pcm512x.c +@@ -53,6 +53,8 @@ struct pcm512x_priv { + unsigned long overclock_pll; + unsigned long overclock_dac; + unsigned long overclock_dsp; ++ int mute; ++ struct mutex mutex; + int lrclk_div; + }; + +@@ -385,6 +387,61 @@ static const struct soc_enum pcm512x_ved + SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2, PCM512x_VEDS_SHIFT, 4, + pcm512x_ramp_step_text); + ++static int pcm512x_update_mute(struct pcm512x_priv *pcm512x) ++{ ++ return regmap_update_bits( ++ pcm512x->regmap, PCM512x_MUTE, PCM512x_RQML | PCM512x_RQMR, ++ (!!(pcm512x->mute & 0x5) << PCM512x_RQML_SHIFT) ++ | (!!(pcm512x->mute & 0x3) << PCM512x_RQMR_SHIFT)); ++} ++ ++static int pcm512x_digital_playback_switch_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ ++ mutex_lock(&pcm512x->mutex); ++ ucontrol->value.integer.value[0] = !(pcm512x->mute & 0x4); ++ ucontrol->value.integer.value[1] = !(pcm512x->mute & 0x2); ++ mutex_unlock(&pcm512x->mutex); ++ ++ return 0; ++} ++ ++static int pcm512x_digital_playback_switch_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ int ret, changed = 0; ++ ++ mutex_lock(&pcm512x->mutex); ++ ++ if ((pcm512x->mute & 0x4) == (ucontrol->value.integer.value[0] << 2)) { ++ pcm512x->mute ^= 0x4; ++ changed = 1; ++ } ++ if ((pcm512x->mute & 0x2) == (ucontrol->value.integer.value[1] << 1)) { ++ pcm512x->mute ^= 0x2; ++ changed = 1; ++ } ++ ++ if (changed) { ++ ret = pcm512x_update_mute(pcm512x); ++ if (ret != 0) { ++ dev_err(component->dev, ++ "Failed to update digital mute: %d\n", ret); ++ mutex_unlock(&pcm512x->mutex); ++ return ret; ++ } ++ } ++ ++ mutex_unlock(&pcm512x->mutex); ++ ++ return changed; ++} ++ + static const struct snd_kcontrol_new pcm512x_controls[] = { + SOC_DOUBLE_R_TLV("Digital Playback Volume", PCM512x_DIGITAL_VOLUME_2, + PCM512x_DIGITAL_VOLUME_3, 0, 255, 1, digital_tlv), +@@ -392,8 +449,15 @@ SOC_DOUBLE_TLV("Analogue Playback Volume + PCM512x_LAGN_SHIFT, PCM512x_RAGN_SHIFT, 1, 1, analog_tlv), + SOC_DOUBLE_TLV("Analogue Playback Boost Volume", PCM512x_ANALOG_GAIN_BOOST, + PCM512x_AGBL_SHIFT, PCM512x_AGBR_SHIFT, 1, 0, boost_tlv), +-SOC_DOUBLE("Digital Playback Switch", PCM512x_MUTE, PCM512x_RQML_SHIFT, +- PCM512x_RQMR_SHIFT, 1, 1), ++{ ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "Digital Playback Switch", ++ .index = 0, ++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, ++ .info = snd_ctl_boolean_stereo_info, ++ .get = pcm512x_digital_playback_switch_get, ++ .put = pcm512x_digital_playback_switch_put ++}, + + SOC_SINGLE("Deemphasis Switch", PCM512x_DSP, PCM512x_DEMP_SHIFT, 1, 1), + SOC_ENUM("DSP Program", pcm512x_dsp_program), +@@ -1323,6 +1387,56 @@ static int pcm512x_set_fmt(struct snd_so + return 0; + } + ++static int pcm512x_digital_mute(struct snd_soc_dai *dai, int mute) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct pcm512x_priv *pcm512x = snd_soc_component_get_drvdata(component); ++ int ret; ++ unsigned int mute_det; ++ ++ mutex_lock(&pcm512x->mutex); ++ ++ if (mute) { ++ pcm512x->mute |= 0x1; ++ ret = regmap_update_bits(pcm512x->regmap, PCM512x_MUTE, ++ PCM512x_RQML | PCM512x_RQMR, ++ PCM512x_RQML | PCM512x_RQMR); ++ if (ret != 0) { ++ dev_err(component->dev, ++ "Failed to set digital mute: %d\n", ret); ++ mutex_unlock(&pcm512x->mutex); ++ return ret; ++ } ++ ++ regmap_read_poll_timeout(pcm512x->regmap, ++ PCM512x_ANALOG_MUTE_DET, ++ mute_det, (mute_det & 0x3) == 0, ++ 200, 10000); ++ ++ mutex_unlock(&pcm512x->mutex); ++ } else { ++ pcm512x->mute &= ~0x1; ++ ret = pcm512x_update_mute(pcm512x); ++ if (ret != 0) { ++ dev_err(component->dev, ++ "Failed to update digital mute: %d\n", ret); ++ mutex_unlock(&pcm512x->mutex); ++ return ret; ++ } ++ ++ regmap_read_poll_timeout(pcm512x->regmap, ++ PCM512x_ANALOG_MUTE_DET, ++ mute_det, ++ (mute_det & 0x3) ++ == ((~pcm512x->mute >> 1) & 0x3), ++ 200, 10000); ++ } ++ ++ mutex_unlock(&pcm512x->mutex); ++ ++ return 0; ++} ++ + static int pcm512x_set_tdm_slot(struct snd_soc_dai *dai, + unsigned int tx_mask, unsigned int rx_mask, + int slots, int width) +@@ -1348,6 +1462,7 @@ static const struct snd_soc_dai_ops pcm5 + .startup = pcm512x_dai_startup, + .hw_params = pcm512x_hw_params, + .set_fmt = pcm512x_set_fmt, ++ .digital_mute = pcm512x_digital_mute, + .set_tdm_slot = pcm512x_set_tdm_slot, + }; + +@@ -1414,6 +1529,8 @@ int pcm512x_probe(struct device *dev, st + if (!pcm512x) + return -ENOMEM; + ++ mutex_init(&pcm512x->mutex); ++ + dev_set_drvdata(dev, pcm512x); + pcm512x->regmap = regmap; + +--- a/sound/soc/codecs/pcm512x.h ++++ b/sound/soc/codecs/pcm512x.h +@@ -112,7 +112,9 @@ + #define PCM512x_RQST_SHIFT 4 + + /* Page 0, Register 3 - mute */ ++#define PCM512x_RQMR (1 << 0) + #define PCM512x_RQMR_SHIFT 0 ++#define PCM512x_RQML (1 << 4) + #define PCM512x_RQML_SHIFT 4 + + /* Page 0, Register 4 - PLL */ diff --git a/target/linux/brcm2708/patches-4.19/950-0341-ASoC-pcm512x-Fix-a-double-unlock-in-pcm512x_digital_.patch b/target/linux/brcm2708/patches-4.19/950-0341-ASoC-pcm512x-Fix-a-double-unlock-in-pcm512x_digital_.patch new file mode 100644 index 000000000..83113e92c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0341-ASoC-pcm512x-Fix-a-double-unlock-in-pcm512x_digital_.patch @@ -0,0 +1,62 @@ +From e0d60424f966b62d61300cec4ba7fd070abaf772 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Fri, 21 Dec 2018 12:11:20 +0300 +Subject: [PATCH 341/703] ASoC: pcm512x: Fix a double unlock in + pcm512x_digital_mute() + +[ Upstream commit 28b698b7342c7d5300cfe217cd77ff7d2a55e03d ] + +We accidentally call mutex_unlock(&pcm512x->mutex); twice in a row. + +I re-wrote the error handling to use "goto unlock;" instead of returning +directly. Hopefully, it makes the code a little simpler. + +Fixes: 3500f1c589e9 ("ASoC: pcm512x: Implement the digital_mute interface") +Signed-off-by: Dan Carpenter +Reviwed-by: Dimitris Papavasiliou +Signed-off-by: Mark Brown +--- + sound/soc/codecs/pcm512x.c | 11 ++++------- + 1 file changed, 4 insertions(+), 7 deletions(-) + +--- a/sound/soc/codecs/pcm512x.c ++++ b/sound/soc/codecs/pcm512x.c +@@ -1404,24 +1404,20 @@ static int pcm512x_digital_mute(struct s + if (ret != 0) { + dev_err(component->dev, + "Failed to set digital mute: %d\n", ret); +- mutex_unlock(&pcm512x->mutex); +- return ret; ++ goto unlock; + } + + regmap_read_poll_timeout(pcm512x->regmap, + PCM512x_ANALOG_MUTE_DET, + mute_det, (mute_det & 0x3) == 0, + 200, 10000); +- +- mutex_unlock(&pcm512x->mutex); + } else { + pcm512x->mute &= ~0x1; + ret = pcm512x_update_mute(pcm512x); + if (ret != 0) { + dev_err(component->dev, + "Failed to update digital mute: %d\n", ret); +- mutex_unlock(&pcm512x->mutex); +- return ret; ++ goto unlock; + } + + regmap_read_poll_timeout(pcm512x->regmap, +@@ -1432,9 +1428,10 @@ static int pcm512x_digital_mute(struct s + 200, 10000); + } + ++unlock: + mutex_unlock(&pcm512x->mutex); + +- return 0; ++ return ret; + } + + static int pcm512x_set_tdm_slot(struct snd_soc_dai *dai, diff --git a/target/linux/brcm2708/patches-4.19/950-0342-usb-dwc_otg-Clean-up-build-warnings-on-64bit-kernels.patch b/target/linux/brcm2708/patches-4.19/950-0342-usb-dwc_otg-Clean-up-build-warnings-on-64bit-kernels.patch new file mode 100644 index 000000000..de67efcd9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0342-usb-dwc_otg-Clean-up-build-warnings-on-64bit-kernels.patch @@ -0,0 +1,110 @@ +From b10441b7ce4abbdb0f870f705cbb7d3520a57044 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 25 Jan 2019 16:03:31 +0000 +Subject: [PATCH 342/703] usb: dwc_otg: Clean up build warnings on 64bit + kernels + +No functional changes. Almost all are changes to logging lines. + +Signed-off-by: Dave Stevenson +--- + drivers/usb/host/dwc_otg/dwc_otg_driver.c | 3 +-- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 2 +- + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 19 ++++++++++++++----- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 10 ++++------ + 4 files changed, 20 insertions(+), 14 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_driver.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c +@@ -837,8 +837,7 @@ static int dwc_otg_driver_probe( + retval = -ENOMEM; + goto fail; + } +- dev_info(&_dev->dev, "base=0x%08x\n", +- (unsigned)dwc_otg_device->os_dep.base); ++ dev_info(&_dev->dev, "base=%p\n", dwc_otg_device->os_dep.base); + #endif + + /* +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c +@@ -301,7 +301,7 @@ static int notrace fiq_iso_out_advance(s + last = 1; + + /* New DMA address - address of bounce buffer referred to in index */ +- hcdma.d32 = (uint32_t) &blob->channel[n].index[i].buf[0]; ++ hcdma.d32 = (dma_addr_t) blob->channel[n].index[i].buf; + //hcdma.d32 = FIQ_READ(st->dwc_regs_base + HC_START + (HC_OFFSET * n) + HC_DMA); + //hcdma.d32 += st->channel[n].dma_info.slot_len[i]; + fiq_print(FIQDBG_INT, st, "LAST: %01d ", last); +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +@@ -1041,8 +1041,8 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd + * moderately readable array casts. + */ + hcd->fiq_dmab = DWC_DMA_ALLOC(dev, (sizeof(struct fiq_dma_channel) * num_channels), &hcd->fiq_state->dma_base); +- DWC_WARN("FIQ DMA bounce buffers: virt = 0x%08x dma = 0x%08x len=%d", +- (unsigned int)hcd->fiq_dmab, (unsigned int)hcd->fiq_state->dma_base, ++ DWC_WARN("FIQ DMA bounce buffers: virt = %px dma = %pad len=%zu", ++ hcd->fiq_dmab, &hcd->fiq_state->dma_base, + sizeof(struct fiq_dma_channel) * num_channels); + + DWC_MEMSET(hcd->fiq_dmab, 0x6b, 9024); +@@ -1522,9 +1522,12 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h + /* + * Set dma_regs to bounce buffer. FIQ will update the + * state depending on transaction progress. ++ * Pointer arithmetic on hcd->fiq_state->dma_base (a dma_addr_t) ++ * to point it to the correct offset in the allocated buffers. + */ + blob = (struct fiq_dma_blob *) hcd->fiq_state->dma_base; +- st->hcdma_copy.d32 = (uint32_t) &blob->channel[hc->hc_num].index[0].buf[0]; ++ st->hcdma_copy.d32 = (dma_addr_t) blob->channel[hc->hc_num].index[0].buf; ++ + /* Calculate the max number of CSPLITS such that the FIQ can time out + * a transaction if it fails. + */ +@@ -1571,9 +1574,15 @@ int fiq_fsm_setup_periodic_dma(dwc_otg_h + st->nrpackets = i; + } + ptr = qtd->urb->buf + frame_desc->offset; +- /* Point the HC at the DMA address of the bounce buffers */ ++ /* ++ * Point the HC at the DMA address of the bounce buffers ++ * ++ * Pointer arithmetic on hcd->fiq_state->dma_base (a ++ * dma_addr_t) to point it to the correct offset in the ++ * allocated buffers. ++ */ + blob = (struct fiq_dma_blob *) hcd->fiq_state->dma_base; +- st->hcdma_copy.d32 = (uint32_t) &blob->channel[hc->hc_num].index[0].buf[0]; ++ st->hcdma_copy.d32 = (dma_addr_t) blob->channel[hc->hc_num].index[0].buf; + + /* fixup xfersize to the actual packet size */ + st->hctsiz_copy.b.pid = 0; +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -454,11 +454,9 @@ static void hcd_init_fiq(void *cookie) + DWC_ERROR("Can't claim FIQ"); + BUG(); + } +- DWC_WARN("FIQ on core %d at 0x%08x", +- smp_processor_id(), +- (fiq_fsm_enable ? (int)&dwc_otg_fiq_fsm : (int)&dwc_otg_fiq_nop)); +- DWC_WARN("FIQ ASM at 0x%08x length %d", (int)&_dwc_otg_fiq_stub, (int)(&_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub)); +- set_fiq_handler((void *) &_dwc_otg_fiq_stub, &_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub); ++ DWC_WARN("FIQ on core %d", smp_processor_id()); ++ DWC_WARN("FIQ ASM at %px length %d", &_dwc_otg_fiq_stub, (int)(&_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub)); ++ set_fiq_handler((void *) &_dwc_otg_fiq_stub, &_dwc_otg_fiq_stub_end - &_dwc_otg_fiq_stub); + memset(®s,0,sizeof(regs)); + + regs.ARM_r8 = (long) dwc_otg_hcd->fiq_state; +@@ -483,7 +481,7 @@ static void hcd_init_fiq(void *cookie) + dwc_otg_hcd->fiq_state->mphi_regs.outddb = otg_dev->os_dep.mphi_base + 0x2c; + dwc_otg_hcd->fiq_state->mphi_regs.intstat = otg_dev->os_dep.mphi_base + 0x50; + dwc_otg_hcd->fiq_state->dwc_regs_base = otg_dev->os_dep.base; +- DWC_WARN("MPHI regs_base at 0x%08x", (int)dwc_otg_hcd->fiq_state->mphi_regs.base); ++ DWC_WARN("MPHI regs_base at %px", dwc_otg_hcd->fiq_state->mphi_regs.base); + //Enable mphi peripheral + writel((1<<31),dwc_otg_hcd->fiq_state->mphi_regs.ctrl); + #ifdef DEBUG diff --git a/target/linux/brcm2708/patches-4.19/950-0343-usb-dwc_otg-Use-dma-allocation-for-mphi-dummy_send-b.patch b/target/linux/brcm2708/patches-4.19/950-0343-usb-dwc_otg-Use-dma-allocation-for-mphi-dummy_send-b.patch new file mode 100644 index 000000000..43a2877fd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0343-usb-dwc_otg-Use-dma-allocation-for-mphi-dummy_send-b.patch @@ -0,0 +1,74 @@ +From 2aa9b698ab642535989a1bd69300f9a6e13395c9 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 30 Jan 2019 17:47:51 +0000 +Subject: [PATCH 343/703] usb: dwc_otg: Use dma allocation for mphi dummy_send + buffer + +The FIQ driver used a kzalloc'ed buffer for dummy_send, +passing a kernel virtual address to the hardware block. +The buffer is only ever used for a dummy read, so it +should be harmless, but there is the chance that it will +cause exceptions. + +Use a dma allocation so that we have a genuine bus address, +and read from that. +Free the allocation when done for good measure. + +Signed-off-by: Dave Stevenson +--- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 4 ++-- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 1 + + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 5 ++++- + 3 files changed, 7 insertions(+), 3 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c +@@ -1347,7 +1347,7 @@ void notrace dwc_otg_fiq_fsm(struct fiq_ + /* We got an interrupt, didn't handle it. */ + if (kick_irq) { + state->mphi_int_count++; +- FIQ_WRITE(state->mphi_regs.outdda, (int) state->dummy_send); ++ FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); + FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); + + } +@@ -1408,7 +1408,7 @@ void notrace dwc_otg_fiq_nop(struct fiq_ + FIQ_WRITE(state->dwc_regs_base + GINTMSK, gintmsk.d32); + /* Force a clear before another dummy send */ + FIQ_WRITE(state->mphi_regs.intstat, (1<<29)); +- FIQ_WRITE(state->mphi_regs.outdda, (int) state->dummy_send); ++ FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); + FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); + + } +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h +@@ -352,6 +352,7 @@ struct fiq_state { + dma_addr_t dma_base; + struct fiq_dma_blob *fiq_dmab; + void *dummy_send; ++ dma_addr_t dummy_send_dma; + gintmsk_data_t gintmsk_saved; + haintmsk_data_t haintmsk_saved; + int mphi_int_count; +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +@@ -929,6 +929,8 @@ static void dwc_otg_hcd_free(dwc_otg_hcd + DWC_TIMER_FREE(dwc_otg_hcd->conn_timer); + DWC_TASK_FREE(dwc_otg_hcd->reset_tasklet); + DWC_TASK_FREE(dwc_otg_hcd->completion_tasklet); ++ DWC_DMA_FREE(dev, 16, dwc_otg_hcd->fiq_state->dummy_send, ++ dwc_otg_hcd->fiq_state->dummy_send_dma); + DWC_FREE(dwc_otg_hcd->fiq_state); + + #ifdef DWC_DEV_SRPCAP +@@ -1021,7 +1023,8 @@ int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd + for (i = 0; i < num_channels; i++) { + hcd->fiq_state->channel[i].fsm = FIQ_PASSTHROUGH; + } +- hcd->fiq_state->dummy_send = DWC_ALLOC_ATOMIC(16); ++ hcd->fiq_state->dummy_send = DWC_DMA_ALLOC_ATOMIC(dev, 16, ++ &hcd->fiq_state->dummy_send_dma); + + hcd->fiq_stack = DWC_ALLOC(sizeof(struct fiq_stack)); + if (!hcd->fiq_stack) { diff --git a/target/linux/brcm2708/patches-4.19/950-0344-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch b/target/linux/brcm2708/patches-4.19/950-0344-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch new file mode 100644 index 000000000..760042c5c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0344-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch @@ -0,0 +1,47 @@ +From 0a0aaf192a20f9c5552c0fca4f5b29c3d31784ab Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 16:13:25 +0000 +Subject: [PATCH 344/703] staging: vchiq_arm: Set up dma ranges on child + devices + +The VCHIQ driver now loads the audio, camera, codec, and vc-sm +drivers as platform drivers. However they were not being given +the correct DMA configuration. + +Call of_dma_configure with the parent (VCHIQ) parameters to be +inherited by the child. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 13 ++++++++++++- + 1 file changed, 12 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3585,6 +3585,7 @@ static struct platform_device * + vchiq_register_child(struct platform_device *pdev, const char *name) + { + struct platform_device_info pdevinfo; ++ struct platform_device *new_dev; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + +@@ -3593,7 +3594,17 @@ vchiq_register_child(struct platform_dev + pdevinfo.id = PLATFORM_DEVID_NONE; + pdevinfo.dma_mask = DMA_BIT_MASK(32); + +- return platform_device_register_full(&pdevinfo); ++ new_dev = platform_device_register_full(&pdevinfo); ++ if (!new_dev) ++ return NULL; ++ ++ /* ++ * We want the dma-ranges etc to be copied from the parent VCHIQ device ++ * to be passed on to the children too. ++ */ ++ of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); ++ ++ return new_dev; + } + + static int vchiq_probe(struct platform_device *pdev) diff --git a/target/linux/brcm2708/patches-4.19/950-0345-staging-vc-sm-cma-Correct-DMA-configuration.patch b/target/linux/brcm2708/patches-4.19/950-0345-staging-vc-sm-cma-Correct-DMA-configuration.patch new file mode 100644 index 000000000..f2b66d063 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0345-staging-vc-sm-cma-Correct-DMA-configuration.patch @@ -0,0 +1,44 @@ +From 6fab727ac8fd457541d36edf07e6615c20341372 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 16:24:41 +0000 +Subject: [PATCH 345/703] staging: vc-sm-cma: Correct DMA configuration. + +Now that VCHIQ is setting up the DMA configuration as our +parent device, don't try to configure it during probe. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 15 +++++---------- + 1 file changed, 5 insertions(+), 10 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -703,9 +703,6 @@ err_free_mem: + /* Driver loading. */ + static int bcm2835_vc_sm_cma_probe(struct platform_device *pdev) + { +- struct device *dev = &pdev->dev; +- int err; +- + pr_info("%s: Videocore shared memory driver\n", __func__); + + sm_state = kzalloc(sizeof(*sm_state), GFP_KERNEL); +@@ -714,13 +711,11 @@ static int bcm2835_vc_sm_cma_probe(struc + sm_state->pdev = pdev; + mutex_init(&sm_state->map_lock); + +- dev->coherent_dma_mask = DMA_BIT_MASK(32); +- dev->dma_mask = &dev->coherent_dma_mask; +- err = of_dma_configure(dev, NULL, true); +- if (err) { +- dev_err(dev, "Unable to setup DMA: %d\n", err); +- return err; +- } ++ pdev->dev.dma_parms = devm_kzalloc(&pdev->dev, ++ sizeof(*pdev->dev.dma_parms), ++ GFP_KERNEL); ++ /* dma_set_max_seg_size checks if dma_parms is NULL. */ ++ dma_set_max_seg_size(&pdev->dev, 0x3FFFFFFF); + + vchiq_add_connected_callback(vc_sm_connected_init); + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0346-staging-vc-sm-cma-Use-a-void-pointer-as-the-handle-w.patch b/target/linux/brcm2708/patches-4.19/950-0346-staging-vc-sm-cma-Use-a-void-pointer-as-the-handle-w.patch new file mode 100644 index 000000000..a9205fbff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0346-staging-vc-sm-cma-Use-a-void-pointer-as-the-handle-w.patch @@ -0,0 +1,111 @@ +From 0bdf03ed6435089119a3d502f84f8943a12f65ac Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 16:29:00 +0000 +Subject: [PATCH 346/703] staging: vc-sm-cma: Use a void* pointer as the handle + within the kernel + +The driver was using an unsigned int as the handle to the outside world, +and doing a nasty cast to the struct dmabuf when handed it back. +This breaks badly with a 64 bit kernel where the pointer doesn't fit +in an unsigned int. + +Switch to using a void* within the kernel. Reality is that it is +a struct dma_buf*, but advertising it as such to other drivers seems +to encourage the use of it as such, and I'm not sure on the implications +of that. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 10 +++++----- + drivers/staging/vc04_services/vc-sm-cma/vc_sm_knl.h | 6 +++--- + drivers/staging/vc04_services/vchiq-mmal/mmal-common.h | 2 +- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 2 +- + 4 files changed, 10 insertions(+), 10 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -745,7 +745,7 @@ static int bcm2835_vc_sm_cma_remove(stru + } + + /* Get an internal resource handle mapped from the external one. */ +-int vc_sm_cma_int_handle(int handle) ++int vc_sm_cma_int_handle(void *handle) + { + struct dma_buf *dma_buf = (struct dma_buf *)handle; + struct vc_sm_buffer *res; +@@ -762,7 +762,7 @@ int vc_sm_cma_int_handle(int handle) + EXPORT_SYMBOL_GPL(vc_sm_cma_int_handle); + + /* Free a previously allocated shared memory handle and block. */ +-int vc_sm_cma_free(int handle) ++int vc_sm_cma_free(void *handle) + { + struct dma_buf *dma_buf = (struct dma_buf *)handle; + +@@ -772,7 +772,7 @@ int vc_sm_cma_free(int handle) + return -EPERM; + } + +- pr_debug("%s: handle %08x/dmabuf %p\n", __func__, handle, dma_buf); ++ pr_debug("%s: handle %p/dmabuf %p\n", __func__, handle, dma_buf); + + dma_buf_put(dma_buf); + +@@ -781,7 +781,7 @@ int vc_sm_cma_free(int handle) + EXPORT_SYMBOL_GPL(vc_sm_cma_free); + + /* Import a dmabuf to be shared with VC. */ +-int vc_sm_cma_import_dmabuf(struct dma_buf *src_dmabuf, int *handle) ++int vc_sm_cma_import_dmabuf(struct dma_buf *src_dmabuf, void **handle) + { + struct dma_buf *new_dma_buf; + struct vc_sm_buffer *res; +@@ -801,7 +801,7 @@ int vc_sm_cma_import_dmabuf(struct dma_b + res = (struct vc_sm_buffer *)new_dma_buf->priv; + + /* Assign valid handle at this time.*/ +- *handle = (int)new_dma_buf; ++ *handle = new_dma_buf; + } else { + /* + * succeeded in importing the dma_buf, but then +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_knl.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_knl.h +@@ -17,12 +17,12 @@ + #endif + + /* Free a previously allocated or imported shared memory handle and block. */ +-int vc_sm_cma_free(int handle); ++int vc_sm_cma_free(void *handle); + + /* Get an internal resource handle mapped from the external one. */ +-int vc_sm_cma_int_handle(int handle); ++int vc_sm_cma_int_handle(void *handle); + + /* Import a block of memory into the GPU space. */ +-int vc_sm_cma_import_dmabuf(struct dma_buf *dmabuf, int *handle); ++int vc_sm_cma_import_dmabuf(struct dma_buf *dmabuf, void **handle); + + #endif /* __VC_SM_KNL_H__INCLUDED__ */ +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-common.h +@@ -52,7 +52,7 @@ struct mmal_buffer { + struct mmal_msg_context *msg_context; + + struct dma_buf *dma_buf;/* Exported dmabuf fd from videobuf2 */ +- int vcsm_handle; /* VCSM handle having imported the dmabuf */ ++ void *vcsm_handle; /* VCSM handle having imported the dmabuf */ + u32 vc_handle; /* VC handle to that dmabuf */ + + u32 cmd; /* MMAL command. 0=data. */ +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1793,7 +1793,7 @@ int mmal_vchi_buffer_cleanup(struct mmal + if (buf->vcsm_handle) { + int ret; + +- pr_debug("%s: vc_sm_cma_free on handle %08X\n", __func__, ++ pr_debug("%s: vc_sm_cma_free on handle %p\n", __func__, + buf->vcsm_handle); + ret = vc_sm_cma_free(buf->vcsm_handle); + if (ret) diff --git a/target/linux/brcm2708/patches-4.19/950-0347-staging-vc-sm-cma-Fix-up-for-64bit-builds.patch b/target/linux/brcm2708/patches-4.19/950-0347-staging-vc-sm-cma-Fix-up-for-64bit-builds.patch new file mode 100644 index 000000000..df49149d6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0347-staging-vc-sm-cma-Fix-up-for-64bit-builds.patch @@ -0,0 +1,199 @@ +From 857c68b05d9b99e26d1dd460f349ed33857dbf71 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 16:32:57 +0000 +Subject: [PATCH 347/703] staging: vc-sm-cma: Fix up for 64bit builds + +There were a number of logging lines that were using +inappropriate formatting under 64bit kernels. + +The kernel_id field passed to/from the VPU was being +abused for storing the struct vc_sm_buffer *. +This breaks with 64bit kernels, so change to using an IDR. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 60 +++++++++++++++---- + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 3 +- + 2 files changed, 48 insertions(+), 15 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -75,6 +75,9 @@ struct sm_state_t { + struct miscdevice dev; + struct sm_instance *sm_handle; /* Handle for videocore service. */ + ++ spinlock_t kernelid_map_lock; /* Spinlock protecting kernelid_map */ ++ struct idr kernelid_map; ++ + struct mutex map_lock; /* Global map lock. */ + struct list_head buffer_list; /* List of buffer. */ + +@@ -97,6 +100,29 @@ static int sm_inited; + + /* ---- Private Functions ------------------------------------------------ */ + ++static int get_kernel_id(struct vc_sm_buffer *buffer) ++{ ++ int handle; ++ ++ spin_lock(&sm_state->kernelid_map_lock); ++ handle = idr_alloc(&sm_state->kernelid_map, buffer, 0, 0, GFP_KERNEL); ++ spin_unlock(&sm_state->kernelid_map_lock); ++ ++ return handle; ++} ++ ++static struct vc_sm_buffer *lookup_kernel_id(int handle) ++{ ++ return idr_find(&sm_state->kernelid_map, handle); ++} ++ ++static void free_kernel_id(int handle) ++{ ++ spin_lock(&sm_state->kernelid_map_lock); ++ idr_remove(&sm_state->kernelid_map, handle); ++ spin_unlock(&sm_state->kernelid_map_lock); ++} ++ + static int vc_sm_cma_seq_file_show(struct seq_file *s, void *v) + { + struct sm_pde_t *sm_pde; +@@ -129,8 +155,7 @@ static int vc_sm_cma_global_state_show(s + if (!sm_state) + return 0; + +- seq_printf(s, "\nVC-ServiceHandle 0x%x\n", +- (unsigned int)sm_state->sm_handle); ++ seq_printf(s, "\nVC-ServiceHandle %p\n", sm_state->sm_handle); + + /* Log all applicable mapping(s). */ + +@@ -145,7 +170,7 @@ static int vc_sm_cma_global_state_show(s + resource); + seq_printf(s, " NAME %s\n", + resource->name); +- seq_printf(s, " SIZE %d\n", ++ seq_printf(s, " SIZE %zu\n", + resource->size); + seq_printf(s, " DMABUF %p\n", + resource->dma_buf); +@@ -181,7 +206,7 @@ static void vc_sm_add_resource(struct vc + list_add(&buffer->global_buffer_list, &sm_state->buffer_list); + mutex_unlock(&sm_state->map_lock); + +- pr_debug("[%s]: added buffer %p (name %s, size %d)\n", ++ pr_debug("[%s]: added buffer %p (name %s, size %zu)\n", + __func__, buffer, buffer->name, buffer->size); + } + +@@ -194,7 +219,7 @@ static void vc_sm_release_resource(struc + mutex_lock(&sm_state->map_lock); + mutex_lock(&buffer->lock); + +- pr_debug("[%s]: buffer %p (name %s, size %d)\n", ++ pr_debug("[%s]: buffer %p (name %s, size %zu)\n", + __func__, buffer, buffer->name, buffer->size); + + if (buffer->vc_handle && buffer->vpu_state == VPU_MAPPED) { +@@ -443,6 +468,7 @@ vc_sm_cma_import_dmabuf_internal(struct + struct vc_sm_import_result result = { }; + struct dma_buf_attachment *attach = NULL; + struct sg_table *sgt = NULL; ++ dma_addr_t dma_addr; + int ret = 0; + int status; + +@@ -478,21 +504,22 @@ vc_sm_cma_import_dmabuf_internal(struct + } + + import.type = VC_SM_ALLOC_NON_CACHED; +- import.addr = (uint32_t)sg_dma_address(sgt->sgl); ++ dma_addr = sg_dma_address(sgt->sgl); ++ import.addr = (uint32_t)dma_addr; + if ((import.addr & 0xC0000000) != 0xC0000000) { +- pr_err("%s: Expecting an uncached alias for dma_addr %08x\n", +- __func__, import.addr); ++ pr_err("%s: Expecting an uncached alias for dma_addr %pad\n", ++ __func__, &dma_addr); + import.addr |= 0xC0000000; + } + import.size = sg_dma_len(sgt->sgl); + import.allocator = current->tgid; +- import.kernel_id = (uint32_t)buffer; //FIXME: 64 bit support needed. ++ import.kernel_id = get_kernel_id(buffer); + + memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, + sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); + +- pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %p, size %u\n", +- __func__, import.name, import.type, (void *)import.addr, ++ pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %pad, size %u\n", ++ __func__, import.name, import.type, &dma_addr, + import.size); + + /* Allocate the videocore buffer. */ +@@ -527,7 +554,7 @@ vc_sm_cma_import_dmabuf_internal(struct + + buffer->attach = attach; + buffer->sgt = sgt; +- buffer->dma_addr = sg_dma_address(sgt->sgl); ++ buffer->dma_addr = dma_addr; + buffer->in_use = 1; + + /* +@@ -559,6 +586,7 @@ error: + vc_sm_cma_vchi_free(sm_state->sm_handle, &free, + &sm_state->int_trans_id); + } ++ free_kernel_id(import.kernel_id); + kfree(buffer); + if (sgt) + dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL); +@@ -586,7 +614,7 @@ vc_sm_vpu_event(struct sm_instance *inst + { + struct vc_sm_released *release = (struct vc_sm_released *)reply; + struct vc_sm_buffer *buffer = +- (struct vc_sm_buffer *)release->kernel_id; ++ lookup_kernel_id(release->kernel_id); + + /* + * FIXME: Need to check buffer is still valid and allocated +@@ -599,6 +627,7 @@ vc_sm_vpu_event(struct sm_instance *inst + buffer->vc_handle = 0; + buffer->vpu_state = VPU_NOT_MAPPED; + mutex_unlock(&buffer->lock); ++ free_kernel_id(release->kernel_id); + + vc_sm_release_resource(buffer, 0); + } +@@ -711,6 +740,9 @@ static int bcm2835_vc_sm_cma_probe(struc + sm_state->pdev = pdev; + mutex_init(&sm_state->map_lock); + ++ spin_lock_init(&sm_state->kernelid_map_lock); ++ idr_init_base(&sm_state->kernelid_map, 1); ++ + pdev->dev.dma_parms = devm_kzalloc(&pdev->dev, + sizeof(*pdev->dev.dma_parms), + GFP_KERNEL); +@@ -735,6 +767,8 @@ static int bcm2835_vc_sm_cma_remove(stru + /* Stop the videocore shared memory service. */ + vc_sm_cma_vchi_stop(&sm_state->sm_handle); + ++ idr_destroy(&sm_state->kernelid_map); ++ + /* Free the memory for the state structure. */ + mutex_destroy(&sm_state->map_lock); + kfree(sm_state); +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -356,8 +356,7 @@ struct sm_instance *vc_sm_cma_vchi_init( + set_user_nice(instance->io_thread, -10); + wake_up_process(instance->io_thread); + +- pr_debug("%s: success - instance 0x%x", __func__, +- (unsigned int)instance); ++ pr_debug("%s: success - instance %p", __func__, instance); + return instance; + + err_close_services: diff --git a/target/linux/brcm2708/patches-4.19/950-0348-configs-Add-Unicam-and-subdevices-to-bcmrpi3_defconf.patch b/target/linux/brcm2708/patches-4.19/950-0348-configs-Add-Unicam-and-subdevices-to-bcmrpi3_defconf.patch new file mode 100644 index 000000000..08e51c0b9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0348-configs-Add-Unicam-and-subdevices-to-bcmrpi3_defconf.patch @@ -0,0 +1,47 @@ +From a707e82004fa7e421a531690d3b072e53fa05819 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 4 Feb 2019 12:35:06 +0000 +Subject: [PATCH 348/703] configs: Add Unicam and subdevices to + bcmrpi3_defconfig + +The bcm2835-unicam, tc358743, adv7180 (for adv7282m) and ov5647 +have been tested on a 64bit kernel and shown to work. +Add them to the config. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -645,6 +645,7 @@ CONFIG_MEDIA_ANALOG_TV_SUPPORT=y + CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y + CONFIG_MEDIA_RADIO_SUPPORT=y + CONFIG_MEDIA_CONTROLLER=y ++CONFIG_VIDEO_V4L2_SUBDEV_API=y + CONFIG_MEDIA_USB_SUPPORT=y + CONFIG_USB_VIDEO_CLASS=m + CONFIG_USB_M5602=m +@@ -727,6 +728,7 @@ CONFIG_VIDEO_EM28XX_V4L2=m + CONFIG_VIDEO_EM28XX_ALSA=m + CONFIG_VIDEO_EM28XX_DVB=m + CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_BCM2835_UNICAM=m + CONFIG_RADIO_SI470X=m + CONFIG_USB_SI470X=m + CONFIG_I2C_SI470X=m +@@ -746,10 +748,13 @@ CONFIG_RADIO_WL128X=m + # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set + CONFIG_VIDEO_UDA1342=m + CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_ADV7180=m ++CONFIG_VIDEO_TC358743=m + CONFIG_VIDEO_TVP5150=m + CONFIG_VIDEO_TW2804=m + CONFIG_VIDEO_TW9903=m + CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV5647=m + CONFIG_VIDEO_OV7640=m + CONFIG_VIDEO_MT9V011=m + CONFIG_DRM=m diff --git a/target/linux/brcm2708/patches-4.19/950-0349-configs-Add-VIDEO_BCM2835-to-bcmrpi3_defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0349-configs-Add-VIDEO_BCM2835-to-bcmrpi3_defconfig.patch new file mode 100644 index 000000000..d424bfaa3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0349-configs-Add-VIDEO_BCM2835-to-bcmrpi3_defconfig.patch @@ -0,0 +1,23 @@ +From a44812330b02d78a28b17f1e364e73d827f4a872 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 4 Feb 2019 12:45:25 +0000 +Subject: [PATCH 349/703] configs: Add VIDEO_BCM2835 to bcmrpi3_defconfig + +This is now shown to work with 64 bit kernels, so add it to +the defconfig. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1070,6 +1070,7 @@ CONFIG_FB_TFT_WATTEROTT=m + CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0350-configs-Add-V4L2-codec-driver-to-bcmrpi3_defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0350-configs-Add-V4L2-codec-driver-to-bcmrpi3_defconfig.patch new file mode 100644 index 000000000..ef8ea1d18 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0350-configs-Add-V4L2-codec-driver-to-bcmrpi3_defconfig.patch @@ -0,0 +1,23 @@ +From 426d55354b0d23a514ee80596f22d1ea2a58b811 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 4 Feb 2019 13:42:51 +0000 +Subject: [PATCH 350/703] configs: Add V4L2 codec driver to bcmrpi3_defconfig + +As this is now fixed to work with 64bit kernels, add it to the +defconfig. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1071,6 +1071,7 @@ CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m + CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0351-config-Add-IPVLAN-module-to-bcmrpi3_defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0351-config-Add-IPVLAN-module-to-bcmrpi3_defconfig.patch new file mode 100644 index 000000000..5b504167c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0351-config-Add-IPVLAN-module-to-bcmrpi3_defconfig.patch @@ -0,0 +1,22 @@ +From ba6462e05310a26c30e22aab737db4eb5ae938a8 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 5 Feb 2019 12:31:23 +0000 +Subject: [PATCH 351/703] config: Add IPVLAN module to bcmrpi3_defconfig + +It's built for the 32bit kernels, but not for the 64bit ones. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -430,6 +430,7 @@ CONFIG_BONDING=m + CONFIG_DUMMY=m + CONFIG_IFB=m + CONFIG_MACVLAN=m ++CONFIG_IPVLAN=m + CONFIG_VXLAN=m + CONFIG_NETCONSOLE=m + CONFIG_TUN=m diff --git a/target/linux/brcm2708/patches-4.19/950-0352-configs-Enable-the-AD193x-codecs.patch b/target/linux/brcm2708/patches-4.19/950-0352-configs-Enable-the-AD193x-codecs.patch new file mode 100644 index 000000000..b755ae051 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0352-configs-Enable-the-AD193x-codecs.patch @@ -0,0 +1,64 @@ +From 09e5438e80f821df067895228f0a78d28da17846 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 7 Feb 2019 18:16:25 +0000 +Subject: [PATCH 352/703] configs: Enable the AD193x codecs + +See: https://github.com/raspberrypi/linux/issues/2850 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 2 ++ + arch/arm/configs/bcmrpi_defconfig | 2 ++ + arch/arm64/configs/bcmrpi3_defconfig | 2 ++ + sound/soc/codecs/Kconfig | 4 ++-- + 4 files changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -930,6 +930,8 @@ CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m + CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m + CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m + CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_AD193X_SPI=m ++CONFIG_SND_SOC_AD193X_I2C=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -923,6 +923,8 @@ CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m + CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m + CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m + CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_AD193X_SPI=m ++CONFIG_SND_SOC_AD193X_I2C=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -811,6 +811,8 @@ CONFIG_SND_DIGIDAC1_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m + CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m + CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_AD193X_SPI=m ++CONFIG_SND_SOC_AD193X_I2C=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4271_I2C=m +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -295,11 +295,11 @@ config SND_SOC_AD193X + tristate + + config SND_SOC_AD193X_SPI +- tristate ++ tristate "Analog Devices AU193X CODEC - SPI" + select SND_SOC_AD193X + + config SND_SOC_AD193X_I2C +- tristate ++ tristate "Analog Devices AU193X CODEC - I2C" + select SND_SOC_AD193X + + config SND_SOC_AD1980 diff --git a/target/linux/brcm2708/patches-4.19/950-0353-overlays-balenaFin-v1.1.0-carrier-board-update.patch b/target/linux/brcm2708/patches-4.19/950-0353-overlays-balenaFin-v1.1.0-carrier-board-update.patch new file mode 100644 index 000000000..a8ab145d7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0353-overlays-balenaFin-v1.1.0-carrier-board-update.patch @@ -0,0 +1,109 @@ +From d9e484de16eef5f3daa61a8df462ff35ebe1aedc Mon Sep 17 00:00:00 2001 +From: Zahari Petkov +Date: Fri, 8 Feb 2019 13:03:38 +0200 +Subject: [PATCH 353/703] overlays: balenaFin v1.1.0 carrier board update + +A backward compatible update for the balenaFin carrier board for the +Raspberry Pi Compute Module 3/3+ Lite. + +The updated overlay includes: + * support for the newly introduced RGB LEDs + * i2c-gpio and SDIO improvements + * DT based Marvell 88W8887 configuration + +Signed-off-by: Zahari Petkov +--- + arch/arm/boot/dts/overlays/README | 2 +- + .../boot/dts/overlays/balena-fin-overlay.dts | 46 ++++++++++++++++++- + 2 files changed, 45 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -472,7 +472,7 @@ Params: swap_lr Reverse + + Name: balena-fin + Info: Overlay that enables WiFi, Bluetooth and the GPIO expander on the +- Balena Fin board. ++ balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite. + Load: dtoverlay=balena-fin + Params: + +--- a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts ++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts +@@ -11,6 +11,7 @@ + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + brcm,overclock-50 = <35>; ++ non-removable; + status = "okay"; + }; + }; +@@ -34,7 +35,8 @@ + fragment@2 { + target-path = "/"; + __overlay__ { +- // We should investigate how to switch to mmc-pwrseq-sd8787 ++ // We should switch to mmc-pwrseq-sd8787 after making it ++ // compatible with sd8887 + // Currently that module requires two GPIOs to function since it + // targets a slightly different chip + power_ctrl: power_ctrl { +@@ -46,10 +48,21 @@ + i2c_soft: i2c@0 { + compatible = "i2c-gpio"; + gpios = <&gpio 43 0 /* sda */ &gpio 42 0 /* scl */>; +- i2c-gpio,delay-us = <2>; /* ~100 kHz */ ++ i2c-gpio,delay-us = <5>; ++ i2c-gpio,scl-open-drain; ++ i2c-gpio,sda-open-drain; + #address-cells = <1>; + #size-cells = <0>; + }; ++ ++ sd8xxx-wlan { ++ drvdbg = <0x6>; ++ drv_mode = <0x1>; ++ cfg80211_wext = <0xf>; ++ sta_name = "wlan"; ++ wfd_name = "p2p"; ++ cal_data_cfg = "none"; ++ }; + }; + }; + +@@ -74,6 +87,35 @@ + reg = <0x68>; + status = "okay"; + }; ++ ++ // RGB LEDs (>= v1.1.0) ++ pca9633: pca9633@62 { ++ compatible = "nxp,pca9633"; ++ reg = <0x62>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ red@0 { ++ label = "red"; ++ reg = <0>; ++ linux,default-trigger = "none"; ++ }; ++ green@1 { ++ label = "green"; ++ reg = <1>; ++ linux,default-trigger = "none"; ++ }; ++ blue@2 { ++ label = "blue"; ++ reg = <2>; ++ linux,default-trigger = "none"; ++ }; ++ unused@3 { ++ label = "unused"; ++ reg = <3>; ++ linux,default-trigger = "none"; ++ }; ++ }; + }; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0354-configs-Add-CONFIG_LEDS_PCA963X-m.patch b/target/linux/brcm2708/patches-4.19/950-0354-configs-Add-CONFIG_LEDS_PCA963X-m.patch new file mode 100644 index 000000000..5e8eb9733 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0354-configs-Add-CONFIG_LEDS_PCA963X-m.patch @@ -0,0 +1,47 @@ +From dbf219eac8302d979a6602b7f2f48ca58a0225e7 Mon Sep 17 00:00:00 2001 +From: Zahari Petkov +Date: Fri, 8 Feb 2019 13:33:47 +0200 +Subject: [PATCH 354/703] configs: Add CONFIG_LEDS_PCA963X=m + +Enable support for PCA963x I2C chip. + +Needed for the balenaFin v1.1.0 carrier board for the +Raspberry Pi Compute Module 3/3+ Lite. + +Signed-off-by: Zahari Petkov +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1124,6 +1124,7 @@ CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_PCA963X=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1117,6 +1117,7 @@ CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_PCA963X=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -984,6 +984,7 @@ CONFIG_MMC_SDHCI_IPROC=m + CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_PCA963X=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y diff --git a/target/linux/brcm2708/patches-4.19/950-0355-Revert-brcmfmac-Mute-expected-startup-errors.patch b/target/linux/brcm2708/patches-4.19/950-0355-Revert-brcmfmac-Mute-expected-startup-errors.patch new file mode 100644 index 000000000..eab48b688 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0355-Revert-brcmfmac-Mute-expected-startup-errors.patch @@ -0,0 +1,26 @@ +From a0ee8937092bd619a1b99cc5e39dc579be5fdd9a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 18 Feb 2019 15:43:30 +0000 +Subject: [PATCH 355/703] Revert "brcmfmac: Mute expected startup 'errors'" + +This reverts commit 34eba9138ccf8d84552ab9dae37d8f348640e663. + +Upstream patch 26e537884a ("brcmfmac: Do not complain about country code "00") +fixes the same issue, so drop this downstream patch. + +Signed-off-by: Phil Elwell +--- + drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c +@@ -6844,8 +6844,6 @@ static void brcmf_cfg80211_reg_notifier( + /* ignore non-ISO3166 country codes */ + for (i = 0; i < 2; i++) + if (req->alpha2[i] < 'A' || req->alpha2[i] > 'Z') { +- if (req->alpha2[0] == '0' && req->alpha2[1] == '0') +- return; + brcmf_err("not an ISO3166 code (0x%02x 0x%02x)\n", + req->alpha2[0], req->alpha2[1]); + return; diff --git a/target/linux/brcm2708/patches-4.19/950-0356-gpu-vc4-fkms-Update-driver-to-not-use-plane-crtc.patch b/target/linux/brcm2708/patches-4.19/950-0356-gpu-vc4-fkms-Update-driver-to-not-use-plane-crtc.patch new file mode 100644 index 000000000..7188a7acb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0356-gpu-vc4-fkms-Update-driver-to-not-use-plane-crtc.patch @@ -0,0 +1,36 @@ +From 477a46fa014209503a601add47994f7bc4b2093a Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 19 Feb 2019 15:06:31 +0000 +Subject: [PATCH 356/703] gpu:vc4-fkms: Update driver to not use plane->crtc. + +Following on from +commit 2f958af7fc248 ("drm/vc4: Stop updating plane->fb/crtc") +do the same in the firmwarekms driver and look at plane_state->crtc +instead. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -193,8 +193,8 @@ static void vc4_cursor_plane_atomic_upda + struct drm_plane_state *old_state) + { + struct vc4_dev *vc4 = to_vc4_dev(plane->dev); +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(plane->crtc); + struct drm_plane_state *state = plane->state; ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(state->crtc); + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); + dma_addr_t addr = bo->paddr + fb->offsets[0]; +@@ -682,8 +682,6 @@ static int vc4_fkms_bind(struct device * + drm_crtc_init_with_planes(drm, crtc, primary_plane, cursor_plane, + &vc4_crtc_funcs, NULL); + drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs); +- primary_plane->crtc = crtc; +- cursor_plane->crtc = crtc; + + vc4_encoder = devm_kzalloc(dev, sizeof(*vc4_encoder), GFP_KERNEL); + if (!vc4_encoder) diff --git a/target/linux/brcm2708/patches-4.19/950-0357-drm-vc4-Programming-the-CTM-is-conditional-on-runnin.patch b/target/linux/brcm2708/patches-4.19/950-0357-drm-vc4-Programming-the-CTM-is-conditional-on-runnin.patch new file mode 100644 index 000000000..2fd12593d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0357-drm-vc4-Programming-the-CTM-is-conditional-on-runnin.patch @@ -0,0 +1,26 @@ +From d75d01225814a7c722affe33f3bfe0ba72fe49a8 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 19 Feb 2019 15:18:25 +0000 +Subject: [PATCH 357/703] drm: vc4: Programming the CTM is conditional on + running full KMS + +vc4_ctm_commit writes to HVS registers, so this is only applicable +when in full KMS mode, not in firmware KMS mode. Add this conditional. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_kms.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -147,7 +147,8 @@ vc4_atomic_complete_commit(struct drm_at + + drm_atomic_helper_commit_modeset_disables(dev, state); + +- vc4_ctm_commit(vc4, state); ++ if (!vc4->firmware_kms) ++ vc4_ctm_commit(vc4, state); + + drm_atomic_helper_commit_planes(dev, state, 0); + diff --git a/target/linux/brcm2708/patches-4.19/950-0358-staging-mmal_vchiq-Add-in-the-Bayer-encoding-formats.patch b/target/linux/brcm2708/patches-4.19/950-0358-staging-mmal_vchiq-Add-in-the-Bayer-encoding-formats.patch new file mode 100644 index 000000000..68d53280a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0358-staging-mmal_vchiq-Add-in-the-Bayer-encoding-formats.patch @@ -0,0 +1,51 @@ +From f65a0ba774c5ef012f45ea3136565713aa4884d5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Feb 2019 12:33:29 +0000 +Subject: [PATCH 358/703] staging: mmal_vchiq: Add in the Bayer encoding + formats + +The list of formats was copied before Bayer support was added. +The ISP supports Bayer and is being supported by the bcm2835_codec +driver, so add in the encodings for them. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/vchiq-mmal/mmal-encodings.h | 27 +++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-encodings.h +@@ -69,6 +69,33 @@ + */ + #define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V') + ++/* Bayer formats ++ * FourCC values copied from V4L2 where defined. ++ */ ++/* 8 bit per pixel Bayer formats. */ ++#define MMAL_ENCODING_BAYER_SBGGR8 MMAL_FOURCC('B', 'A', '8', '1') ++#define MMAL_ENCODING_BAYER_SGBRG8 MMAL_FOURCC('G', 'B', 'R', 'G') ++#define MMAL_ENCODING_BAYER_SGRBG8 MMAL_FOURCC('G', 'R', 'B', 'G') ++#define MMAL_ENCODING_BAYER_SRGGB8 MMAL_FOURCC('R', 'G', 'G', 'B') ++ ++/* 10 bit per pixel packed Bayer formats. */ ++#define MMAL_ENCODING_BAYER_SBGGR10P MMAL_FOURCC('p', 'B', 'A', 'A') ++#define MMAL_ENCODING_BAYER_SGRBG10P MMAL_FOURCC('p', 'g', 'A', 'A') ++#define MMAL_ENCODING_BAYER_SGBRG10P MMAL_FOURCC('p', 'G', 'A', 'A') ++#define MMAL_ENCODING_BAYER_SRGGB10P MMAL_FOURCC('p', 'R', 'A', 'A') ++ ++/* 12 bit per pixel packed Bayer formats. */ ++#define MMAL_ENCODING_BAYER_SBGGR12P MMAL_FOURCC('p', 'B', '1', '2') ++#define MMAL_ENCODING_BAYER_SGRBG12P MMAL_FOURCC('p', 'g', '1', '2') ++#define MMAL_ENCODING_BAYER_SGBRG12P MMAL_FOURCC('p', 'G', '1', '2') ++#define MMAL_ENCODING_BAYER_SRGGB12P MMAL_FOURCC('p', 'R', '1', '2') ++ ++/* 16 bit per pixel Bayer formats. */ ++#define MMAL_ENCODING_BAYER_SBGGR16 MMAL_FOURCC('B', 'G', '1', '6') ++#define MMAL_ENCODING_BAYER_SGBRG16 MMAL_FOURCC('G', 'B', '1', '6') ++#define MMAL_ENCODING_BAYER_SGRBG16 MMAL_FOURCC('G', 'R', '1', '6') ++#define MMAL_ENCODING_BAYER_SRGGB16 MMAL_FOURCC('R', 'G', '1', '6') ++ + /** An EGL image handle + */ + #define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') diff --git a/target/linux/brcm2708/patches-4.19/950-0359-staging-mmal-vchiq-Always-return-the-param-size-from.patch b/target/linux/brcm2708/patches-4.19/950-0359-staging-mmal-vchiq-Always-return-the-param-size-from.patch new file mode 100644 index 000000000..5e8b8e9b5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0359-staging-mmal-vchiq-Always-return-the-param-size-from.patch @@ -0,0 +1,38 @@ +From c6d50172818f5fdc61d561ba9124c72a2ae49718 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Feb 2019 12:36:56 +0000 +Subject: [PATCH 359/703] staging: mmal-vchiq: Always return the param size + from param_get + +mmal-vchiq is a reimplementation of the userland library for MMAL. +When getting a parameter, the client provides the storage and +the size of the storage. The VPU then returns the size of the +parameter that it wished to return, and as much as possible of +that parameter is returned to the client. + +The implementation previously only returned the size provided +by the VPU should it exceed the buffer size. So for parameters +such as the supported encodings list the client had no idea +how much of the provided storage had been populated. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1412,11 +1412,12 @@ static int port_parameter_get(struct vch + */ + memcpy(value, &rmsg->u.port_parameter_get_reply.value, + *value_size); +- *value_size = rmsg->u.port_parameter_get_reply.size; + } else { + memcpy(value, &rmsg->u.port_parameter_get_reply.value, + rmsg->u.port_parameter_get_reply.size); + } ++ /* Always report the size of the returned parameter to the caller */ ++ *value_size = rmsg->u.port_parameter_get_reply.size; + + pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", __func__, + ret, port->component->handle, port->handle, parameter_id); diff --git a/target/linux/brcm2708/patches-4.19/950-0360-staging-mmal-vchiq-If-the-VPU-returns-an-error-don-t.patch b/target/linux/brcm2708/patches-4.19/950-0360-staging-mmal-vchiq-If-the-VPU-returns-an-error-don-t.patch new file mode 100644 index 000000000..f79e49993 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0360-staging-mmal-vchiq-If-the-VPU-returns-an-error-don-t.patch @@ -0,0 +1,29 @@ +From 351eab98f47fae8172a91cb8d65237dd1fd41a11 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Feb 2019 12:51:03 +0000 +Subject: [PATCH 360/703] staging: mmal-vchiq: If the VPU returns an error, + don't negate it + +There is an enum for the errors that the VPU can return. +port_parameter_get was negating that value, but also using -EINVAL +from the Linux error codes. +Pass the VPU error code as positive values. Should the function +need to pass a Linux failure, then return that as negative. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1400,7 +1400,8 @@ static int port_parameter_get(struct vch + goto release_msg; + } + +- ret = -rmsg->u.port_parameter_get_reply.status; ++ ret = rmsg->u.port_parameter_get_reply.status; ++ + /* port_parameter_get_reply.size includes the header, + * whilst *value_size doesn't. + */ diff --git a/target/linux/brcm2708/patches-4.19/950-0361-staging-bcm2835_codec-Query-supported-formats-from-t.patch b/target/linux/brcm2708/patches-4.19/950-0361-staging-bcm2835_codec-Query-supported-formats-from-t.patch new file mode 100644 index 000000000..e4b7981c2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0361-staging-bcm2835_codec-Query-supported-formats-from-t.patch @@ -0,0 +1,727 @@ +From 467255263f6d2c85b43a98300d283869d72a3ac3 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Feb 2019 13:44:00 +0000 +Subject: [PATCH 361/703] staging: bcm2835_codec: Query supported formats from + the component + +The driver was previously working with hard coded tables of +which video formats were supported by each component. +The components advertise this information via a MMAL parameter, +so retrieve the information from there during probe, and store +in the state structure for that device. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 455 +++++++++++++----- + 1 file changed, 327 insertions(+), 128 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -88,17 +88,12 @@ struct bcm2835_codec_fmt { + int bytesperline_align; + u32 flags; + u32 mmal_fmt; +- bool decode_only; +- bool encode_only; + int size_multiplier_x2; + }; + +-/* Supported raw pixel formats. Those supported for both encode and decode +- * must come first, with those only supported for decode coming after (there +- * are no formats supported for encode only). +- */ +-static struct bcm2835_codec_fmt raw_formats[] = { ++static const struct bcm2835_codec_fmt supported_formats[] = { + { ++ /* YUV formats */ + .fourcc = V4L2_PIX_FMT_YUV420, + .depth = 8, + .bytesperline_align = 32, +@@ -139,7 +134,6 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_YUYV, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { + .fourcc = V4L2_PIX_FMT_UYVY, +@@ -147,7 +141,6 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_UYVY, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { + .fourcc = V4L2_PIX_FMT_YVYU, +@@ -155,7 +148,6 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_YVYU, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { + .fourcc = V4L2_PIX_FMT_VYUY, +@@ -163,15 +155,14 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_VYUY, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { ++ /* RGB formats */ + .fourcc = V4L2_PIX_FMT_RGB24, + .depth = 24, + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_RGB24, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { + .fourcc = V4L2_PIX_FMT_BGR24, +@@ -179,7 +170,6 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BGR24, +- .encode_only = true, + .size_multiplier_x2 = 2, + }, { + .fourcc = V4L2_PIX_FMT_BGR32, +@@ -187,17 +177,126 @@ static struct bcm2835_codec_fmt raw_form + .bytesperline_align = 32, + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BGRA, +- .encode_only = true, + .size_multiplier_x2 = 2, +- }, +-}; +- +-/* Supported encoded formats. Those supported for both encode and decode +- * must come first, with those only supported for decode coming after (there +- * are no formats supported for encode only). +- */ +-static struct bcm2835_codec_fmt encoded_formats[] = { +- { ++ }, { ++ /* Bayer formats */ ++ /* 8 bit */ ++ .fourcc = V4L2_PIX_FMT_SRGGB8, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB8, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR8, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR8, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG8, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG8, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG8, ++ .depth = 8, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG8, ++ .size_multiplier_x2 = 2, ++ }, { ++ /* 10 bit */ ++ .fourcc = V4L2_PIX_FMT_SRGGB10P, ++ .depth = 10, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR10P, ++ .depth = 10, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG10P, ++ .depth = 10, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG10P, ++ .depth = 10, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10P, ++ .size_multiplier_x2 = 2, ++ }, { ++ /* 12 bit */ ++ .fourcc = V4L2_PIX_FMT_SRGGB12P, ++ .depth = 12, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR12P, ++ .depth = 12, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG12P, ++ .depth = 12, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12P, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG12P, ++ .depth = 12, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12P, ++ .size_multiplier_x2 = 2, ++ }, { ++ /* 16 bit */ ++ .fourcc = V4L2_PIX_FMT_SRGGB16, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB16, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SBGGR16, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR16, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGRBG16, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG16, ++ .size_multiplier_x2 = 2, ++ }, { ++ .fourcc = V4L2_PIX_FMT_SGBRG16, ++ .depth = 16, ++ .bytesperline_align = 32, ++ .flags = 0, ++ .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG16, ++ .size_multiplier_x2 = 2, ++ }, { ++ /* Compressed formats */ + .fourcc = V4L2_PIX_FMT_H264, + .depth = 0, + .flags = V4L2_FMT_FLAG_COMPRESSED, +@@ -212,30 +311,22 @@ static struct bcm2835_codec_fmt encoded_ + .depth = 0, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal_fmt = MMAL_ENCODING_MP4V, +- .decode_only = true, + }, { + .fourcc = V4L2_PIX_FMT_H263, + .depth = 0, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal_fmt = MMAL_ENCODING_H263, +- .decode_only = true, + }, { + .fourcc = V4L2_PIX_FMT_MPEG2, + .depth = 0, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal_fmt = MMAL_ENCODING_MP2V, +- .decode_only = true, + }, { + .fourcc = V4L2_PIX_FMT_VP8, + .depth = 0, + .flags = V4L2_FMT_FLAG_COMPRESSED, + .mmal_fmt = MMAL_ENCODING_VP8, +- .decode_only = true, + }, +- /* +- * This list couold include VP6 and Theorafor decode, but V4L2 doesn't +- * support them. +- */ + }; + + struct bcm2835_codec_fmt_list { +@@ -243,19 +334,6 @@ struct bcm2835_codec_fmt_list { + unsigned int num_entries; + }; + +-#define RAW_LIST 0 +-#define ENCODED_LIST 1 +- +-struct bcm2835_codec_fmt_list formats[] = { +- { +- .list = raw_formats, +- .num_entries = ARRAY_SIZE(raw_formats), +- }, { +- .list = encoded_formats, +- .num_entries = ARRAY_SIZE(encoded_formats), +- }, +-}; +- + struct m2m_mmal_buffer { + struct v4l2_m2m_buffer m2m; + struct mmal_buffer mmal; +@@ -284,52 +362,6 @@ struct bcm2835_codec_q_data { + bool eos_buffer_in_use; /* debug only */ + }; + +-enum { +- V4L2_M2M_SRC = 0, +- V4L2_M2M_DST = 1, +-}; +- +-static inline struct bcm2835_codec_fmt_list *get_format_list(bool decode, +- bool capture) +-{ +- return decode ^ capture ? &formats[ENCODED_LIST] : &formats[RAW_LIST]; +-} +- +-static struct bcm2835_codec_fmt *get_default_format(bool decode, bool capture) +-{ +- return &get_format_list(decode, capture)->list[0]; +-} +- +-static struct bcm2835_codec_fmt *find_format(struct v4l2_format *f, bool decode, +- bool capture) +-{ +- struct bcm2835_codec_fmt *fmt; +- unsigned int k; +- struct bcm2835_codec_fmt_list *fmts = get_format_list(decode, capture); +- +- for (k = 0; k < fmts->num_entries; k++) { +- fmt = &fmts->list[k]; +- if (fmt->fourcc == f->fmt.pix.pixelformat) +- break; +- } +- +- /* +- * Some compressed formats are only supported for decoding, not +- * encoding. +- */ +- if (!decode && fmts->list[k].decode_only) +- return NULL; +- +- /* Some pixel formats are only supported for encoding, not decoding. */ +- if (decode && fmts->list[k].encode_only) +- return NULL; +- +- if (k == fmts->num_entries) +- return NULL; +- +- return &fmts->list[k]; +-} +- + struct bcm2835_codec_dev { + struct platform_device *pdev; + +@@ -342,6 +374,9 @@ struct bcm2835_codec_dev { + + /* allocated mmal instance and components */ + bool decode; /* Is this instance a decoder? */ ++ /* The list of formats supported on input and output queues. */ ++ struct bcm2835_codec_fmt_list supported_fmts[2]; ++ + struct vchiq_mmal_instance *instance; + + struct v4l2_m2m_dev *m2m_dev; +@@ -374,8 +409,59 @@ struct bcm2835_codec_ctx { + struct bcm2835_codec_driver { + struct bcm2835_codec_dev *encode; + struct bcm2835_codec_dev *decode; ++ struct bcm2835_codec_dev *isp; ++}; ++ ++enum { ++ V4L2_M2M_SRC = 0, ++ V4L2_M2M_DST = 1, + }; + ++static const struct bcm2835_codec_fmt *get_fmt(u32 mmal_fmt) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < ARRAY_SIZE(supported_formats); i++) { ++ if (supported_formats[i].mmal_fmt == mmal_fmt) ++ return &supported_formats[i]; ++ } ++ return NULL; ++} ++ ++static inline ++struct bcm2835_codec_fmt_list *get_format_list(struct bcm2835_codec_dev *dev, ++ bool capture) ++{ ++ return &dev->supported_fmts[capture ? 1 : 0]; ++} ++ ++static ++struct bcm2835_codec_fmt *get_default_format(struct bcm2835_codec_dev *dev, ++ bool capture) ++{ ++ return &dev->supported_fmts[capture ? 1 : 0].list[0]; ++} ++ ++static struct bcm2835_codec_fmt *find_format(struct v4l2_format *f, ++ struct bcm2835_codec_dev *dev, ++ bool capture) ++{ ++ struct bcm2835_codec_fmt *fmt; ++ unsigned int k; ++ struct bcm2835_codec_fmt_list *fmts = ++ &dev->supported_fmts[capture ? 1 : 0]; ++ ++ for (k = 0; k < fmts->num_entries; k++) { ++ fmt = &fmts->list[k]; ++ if (fmt->fourcc == f->fmt.pix.pixelformat) ++ break; ++ } ++ if (k == fmts->num_entries) ++ return NULL; ++ ++ return &fmts->list[k]; ++} ++ + static inline struct bcm2835_codec_ctx *file2ctx(struct file *file) + { + return container_of(file->private_data, struct bcm2835_codec_ctx, fh); +@@ -456,7 +542,6 @@ static inline unsigned int get_bytesperl + } + + static void setup_mmal_port_format(struct bcm2835_codec_ctx *ctx, +- bool decode, + struct bcm2835_codec_q_data *q_data, + struct vchiq_mmal_port *port) + { +@@ -473,7 +558,7 @@ static void setup_mmal_port_format(struc + port->es.video.frame_rate.den = 1; + } else { + /* Compressed format - leave resolution as 0 for decode */ +- if (decode) { ++ if (ctx->dev->decode) { + port->es.video.width = 0; + port->es.video.height = 0; + port->es.video.crop.width = 0; +@@ -802,22 +887,15 @@ static int vidioc_querycap(struct file * + return 0; + } + +-static int enum_fmt(struct v4l2_fmtdesc *f, bool decode, bool capture) ++static int enum_fmt(struct v4l2_fmtdesc *f, struct bcm2835_codec_ctx *ctx, ++ bool capture) + { + struct bcm2835_codec_fmt *fmt; +- struct bcm2835_codec_fmt_list *fmts = get_format_list(decode, capture); ++ struct bcm2835_codec_fmt_list *fmts = ++ get_format_list(ctx->dev, capture); + + if (f->index < fmts->num_entries) { + /* Format found */ +- /* Check format isn't a decode only format when encoding */ +- if (!decode && +- fmts->list[f->index].decode_only) +- return -EINVAL; +- /* Check format isn't a decode only format when encoding */ +- if (decode && +- fmts->list[f->index].encode_only) +- return -EINVAL; +- + fmt = &fmts->list[f->index]; + f->pixelformat = fmt->fourcc; + f->flags = fmt->flags; +@@ -833,7 +911,7 @@ static int vidioc_enum_fmt_vid_cap(struc + { + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- return enum_fmt(f, ctx->dev->decode, true); ++ return enum_fmt(f, ctx, true); + } + + static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, +@@ -841,7 +919,7 @@ static int vidioc_enum_fmt_vid_out(struc + { + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- return enum_fmt(f, ctx->dev->decode, false); ++ return enum_fmt(f, ctx, false); + } + + static int vidioc_g_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f) +@@ -933,11 +1011,11 @@ static int vidioc_try_fmt_vid_cap(struct + struct bcm2835_codec_fmt *fmt; + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- fmt = find_format(f, ctx->dev->decode, true); ++ fmt = find_format(f, ctx->dev, true); + if (!fmt) { +- f->fmt.pix.pixelformat = get_default_format(ctx->dev->decode, ++ f->fmt.pix.pixelformat = get_default_format(ctx->dev, + true)->fourcc; +- fmt = find_format(f, ctx->dev->decode, true); ++ fmt = find_format(f, ctx->dev, true); + } + + return vidioc_try_fmt(f, fmt); +@@ -949,11 +1027,11 @@ static int vidioc_try_fmt_vid_out(struct + struct bcm2835_codec_fmt *fmt; + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- fmt = find_format(f, ctx->dev->decode, false); ++ fmt = find_format(f, ctx->dev, false); + if (!fmt) { +- f->fmt.pix.pixelformat = get_default_format(ctx->dev->decode, ++ f->fmt.pix.pixelformat = get_default_format(ctx->dev, + false)->fourcc; +- fmt = find_format(f, ctx->dev->decode, false); ++ fmt = find_format(f, ctx->dev, false); + } + + if (!f->fmt.pix.colorspace) +@@ -988,7 +1066,7 @@ static int vidioc_s_fmt(struct bcm2835_c + return -EBUSY; + } + +- q_data->fmt = find_format(f, ctx->dev->decode, ++ q_data->fmt = find_format(f, ctx->dev, + f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE); + q_data->crop_width = f->fmt.pix.width; + q_data->height = f->fmt.pix.height; +@@ -1041,7 +1119,7 @@ static int vidioc_s_fmt(struct bcm2835_c + if (!port) + return 0; + +- setup_mmal_port_format(ctx, ctx->dev->decode, q_data, port); ++ setup_mmal_port_format(ctx, q_data, port); + ret = vchiq_mmal_port_set_format(ctx->dev->instance, port); + if (ret) { + v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed vchiq_mmal_port_set_format on port, ret %d\n", +@@ -1064,8 +1142,7 @@ static int vidioc_s_fmt(struct bcm2835_c + struct bcm2835_codec_q_data *q_data_dst = + &ctx->q_data[V4L2_M2M_DST]; + +- setup_mmal_port_format(ctx, ctx->dev->decode, q_data_dst, +- port_dst); ++ setup_mmal_port_format(ctx, q_data_dst, port_dst); + ret = vchiq_mmal_port_set_format(ctx->dev->instance, port_dst); + if (ret) { + v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed vchiq_mmal_port_set_format on output port, ret %d\n", +@@ -1636,10 +1713,10 @@ static int bcm2835_codec_create_componen + MMAL_PARAMETER_ZERO_COPY, &enable, + sizeof(enable)); + +- setup_mmal_port_format(ctx, dev->decode, &ctx->q_data[V4L2_M2M_SRC], ++ setup_mmal_port_format(ctx, &ctx->q_data[V4L2_M2M_SRC], + &ctx->component->input[0]); + +- setup_mmal_port_format(ctx, dev->decode, &ctx->q_data[V4L2_M2M_DST], ++ setup_mmal_port_format(ctx, &ctx->q_data[V4L2_M2M_DST], + &ctx->component->output[0]); + + ret = vchiq_mmal_port_set_format(dev->instance, +@@ -2025,8 +2102,8 @@ static int bcm2835_codec_open(struct fil + goto open_unlock; + } + +- ctx->q_data[V4L2_M2M_SRC].fmt = get_default_format(dev->decode, false); +- ctx->q_data[V4L2_M2M_DST].fmt = get_default_format(dev->decode, true); ++ ctx->q_data[V4L2_M2M_SRC].fmt = get_default_format(dev, false); ++ ctx->q_data[V4L2_M2M_DST].fmt = get_default_format(dev, true); + if (dev->decode) { + /* + * Input width and height are irrelevant as they will be defined +@@ -2209,13 +2286,130 @@ static const struct v4l2_m2m_ops m2m_ops + .job_abort = job_abort, + }; + ++/* Size of the array to provide to the VPU when asking for the list of supported ++ * formats. ++ * The ISP component currently advertises 33 input formats, so add a small ++ * overhead on that. ++ */ ++#define MAX_SUPPORTED_ENCODINGS 40 ++ ++/* Populate dev->supported_fmts with the formats supported by those ports. */ ++static int bcm2835_codec_get_supported_fmts(struct bcm2835_codec_dev *dev) ++{ ++ struct bcm2835_codec_fmt *list; ++ struct vchiq_mmal_component *component; ++ u32 fourccs[MAX_SUPPORTED_ENCODINGS]; ++ u32 param_size = sizeof(fourccs); ++ unsigned int i, j, num_encodings; ++ int ret; ++ ++ ret = vchiq_mmal_component_init(dev->instance, ++ dev->decode ? ++ "ril.video_decode" : ++ "ril.video_encode", ++ &component); ++ if (ret < 0) { ++ v4l2_err(&dev->v4l2_dev, "%s: failed to create component\n", ++ __func__); ++ return -ENOMEM; ++ } ++ ++ ret = vchiq_mmal_port_parameter_get(dev->instance, ++ &component->input[0], ++ MMAL_PARAMETER_SUPPORTED_ENCODINGS, ++ &fourccs, ++ ¶m_size); ++ ++ if (ret) { ++ if (ret == MMAL_MSG_STATUS_ENOSPC) { ++ v4l2_err(&dev->v4l2_dev, "%s: port has more encoding than we provided space for. Some are dropped.\n", ++ __func__); ++ num_encodings = MAX_SUPPORTED_ENCODINGS; ++ } else { ++ v4l2_err(&dev->v4l2_dev, "%s: get_param ret %u.\n", ++ __func__, ret); ++ ret = -EINVAL; ++ goto destroy_component; ++ } ++ } else { ++ num_encodings = param_size / sizeof(u32); ++ } ++ ++ /* Assume at this stage that all encodings will be supported in V4L2. ++ * Any that aren't supported will waste a very small amount of memory. ++ */ ++ list = devm_kzalloc(&dev->pdev->dev, ++ sizeof(struct bcm2835_codec_fmt) * num_encodings, ++ GFP_KERNEL); ++ if (!list) { ++ ret = -ENOMEM; ++ goto destroy_component; ++ } ++ dev->supported_fmts[0].list = list; ++ ++ for (i = 0, j = 0; i < num_encodings; i++) { ++ const struct bcm2835_codec_fmt *fmt = get_fmt(fourccs[i]); ++ ++ if (fmt) { ++ list[j] = *fmt; ++ j++; ++ } ++ } ++ dev->supported_fmts[0].num_entries = j; ++ ++ param_size = sizeof(fourccs); ++ ret = vchiq_mmal_port_parameter_get(dev->instance, ++ &component->output[0], ++ MMAL_PARAMETER_SUPPORTED_ENCODINGS, ++ &fourccs, ++ ¶m_size); ++ ++ if (ret) { ++ if (ret == MMAL_MSG_STATUS_ENOSPC) { ++ v4l2_err(&dev->v4l2_dev, "%s: port has more encoding than we provided space for. Some are dropped.\n", ++ __func__); ++ num_encodings = MAX_SUPPORTED_ENCODINGS; ++ } else { ++ ret = -EINVAL; ++ goto destroy_component; ++ } ++ } else { ++ num_encodings = param_size / sizeof(u32); ++ } ++ /* Assume at this stage that all encodings will be supported in V4L2. */ ++ list = devm_kzalloc(&dev->pdev->dev, ++ sizeof(struct bcm2835_codec_fmt) * num_encodings, ++ GFP_KERNEL); ++ if (!list) { ++ ret = -ENOMEM; ++ goto destroy_component; ++ } ++ dev->supported_fmts[1].list = list; ++ ++ for (i = 0, j = 0; i < num_encodings; i++) { ++ const struct bcm2835_codec_fmt *fmt = get_fmt(fourccs[i]); ++ ++ if (fmt) { ++ list[j] = *fmt; ++ j++; ++ } ++ } ++ dev->supported_fmts[1].num_entries = j; ++ ++ ret = 0; ++ ++destroy_component: ++ vchiq_mmal_component_finalise(dev->instance, component); ++ ++ return ret; ++} ++ + static int bcm2835_codec_create(struct platform_device *pdev, + struct bcm2835_codec_dev **new_dev, + bool decode) + { + struct bcm2835_codec_dev *dev; + struct video_device *vfd; +- struct vchiq_mmal_instance *instance = NULL; + int video_nr; + int ret; + +@@ -2227,10 +2421,18 @@ static int bcm2835_codec_create(struct p + + dev->decode = decode; + +- ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); ++ ret = vchiq_mmal_init(&dev->instance); + if (ret) + return ret; + ++ ret = bcm2835_codec_get_supported_fmts(dev); ++ if (ret) ++ goto vchiq_finalise; ++ ++ ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); ++ if (ret) ++ goto vchiq_finalise; ++ + atomic_set(&dev->num_inst, 0); + mutex_init(&dev->dev_mutex); + +@@ -2270,12 +2472,7 @@ static int bcm2835_codec_create(struct p + goto err_m2m; + } + +- ret = vchiq_mmal_init(&instance); +- if (ret < 0) +- goto err_m2m; +- dev->instance = instance; +- +- v4l2_info(&dev->v4l2_dev, "Loaded V4L2 %s codec\n", ++ v4l2_info(&dev->v4l2_dev, "Loaded V4L2 %s\n", + dev->decode ? "decode" : "encode"); + return 0; + +@@ -2284,7 +2481,8 @@ err_m2m: + video_unregister_device(&dev->vfd); + unreg_dev: + v4l2_device_unregister(&dev->v4l2_dev); +- ++vchiq_finalise: ++ vchiq_mmal_finalise(dev->instance); + return ret; + } + +@@ -2297,6 +2495,7 @@ static int bcm2835_codec_destroy(struct + v4l2_m2m_release(dev->m2m_dev); + video_unregister_device(&dev->vfd); + v4l2_device_unregister(&dev->v4l2_dev); ++ vchiq_mmal_finalise(dev->instance); + + return 0; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0362-staging-bcm2835_codec-Add-support-for-the-ISP-as-an-.patch b/target/linux/brcm2708/patches-4.19/950-0362-staging-bcm2835_codec-Add-support-for-the-ISP-as-an-.patch new file mode 100644 index 000000000..4a83858c5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0362-staging-bcm2835_codec-Add-support-for-the-ISP-as-an-.patch @@ -0,0 +1,384 @@ +From dd3aa42c6ca22eae1b91f78f6de85935bcd6ab0e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 13 Feb 2019 14:07:52 +0000 +Subject: [PATCH 362/703] staging: bcm2835_codec: Add support for the ISP as an + M2M device + +The MMAL ISP component can also use this same V4L2 wrapper to +provide a M2M format conversion and resizer. +Instantiate 3 V4L2 devices now, one for each of decode, encode, +and isp. +The ISP currently doesn't expose any controls via V4L2, but this +can be extended in the future. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 132 ++++++++++++------ + 1 file changed, 92 insertions(+), 40 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -54,10 +54,26 @@ static int encode_video_nr = 11; + module_param(encode_video_nr, int, 0644); + MODULE_PARM_DESC(encode_video_nr, "encoder video device number"); + ++static int isp_video_nr = 12; ++module_param(isp_video_nr, int, 0644); ++MODULE_PARM_DESC(isp_video_nr, "isp video device number"); ++ + static unsigned int debug; + module_param(debug, uint, 0644); + MODULE_PARM_DESC(debug, "activates debug info (0-3)"); + ++enum bcm2835_codec_role { ++ DECODE, ++ ENCODE, ++ ISP, ++}; ++ ++static const char * const components[] = { ++ "ril.video_decode", ++ "ril.video_encode", ++ "ril.isp", ++}; ++ + #define MIN_W 32 + #define MIN_H 32 + #define MAX_W 1920 +@@ -373,7 +389,7 @@ struct bcm2835_codec_dev { + atomic_t num_inst; + + /* allocated mmal instance and components */ +- bool decode; /* Is this instance a decoder? */ ++ enum bcm2835_codec_role role; + /* The list of formats supported on input and output queues. */ + struct bcm2835_codec_fmt_list supported_fmts[2]; + +@@ -558,7 +574,7 @@ static void setup_mmal_port_format(struc + port->es.video.frame_rate.den = 1; + } else { + /* Compressed format - leave resolution as 0 for decode */ +- if (ctx->dev->decode) { ++ if (ctx->dev->role == DECODE) { + port->es.video.width = 0; + port->es.video.height = 0; + port->es.video.crop.width = 0; +@@ -1089,7 +1105,8 @@ static int vidioc_s_fmt(struct bcm2835_c + v4l2_dbg(1, debug, &ctx->dev->v4l2_dev, "Calulated bpl as %u, size %u\n", + q_data->bytesperline, q_data->sizeimage); + +- if (ctx->dev->decode && q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED && ++ if (ctx->dev->role == DECODE && ++ q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED && + f->fmt.pix.width && f->fmt.pix.height) { + /* + * On the decoder, if provided with a resolution on the input +@@ -1188,7 +1205,8 @@ static int vidioc_g_selection(struct fil + bool capture_queue = s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE ? + true : false; + +- if (capture_queue ^ ctx->dev->decode) ++ if ((ctx->dev->role == DECODE && !capture_queue) || ++ (ctx->dev->role == ENCODE && capture_queue)) + /* OUTPUT on decoder and CAPTURE on encoder are not valid. */ + return -EINVAL; + +@@ -1196,7 +1214,8 @@ static int vidioc_g_selection(struct fil + if (!q_data) + return -EINVAL; + +- if (ctx->dev->decode) { ++ switch (ctx->dev->role) { ++ case DECODE: + switch (s->target) { + case V4L2_SEL_TGT_COMPOSE_DEFAULT: + case V4L2_SEL_TGT_COMPOSE: +@@ -1214,7 +1233,8 @@ static int vidioc_g_selection(struct fil + default: + return -EINVAL; + } +- } else { ++ break; ++ case ENCODE: + switch (s->target) { + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP_BOUNDS: +@@ -1232,6 +1252,9 @@ static int vidioc_g_selection(struct fil + default: + return -EINVAL; + } ++ break; ++ case ISP: ++ break; + } + + return 0; +@@ -1249,7 +1272,8 @@ static int vidioc_s_selection(struct fil + __func__, ctx, s->type, q_data, s->target, s->r.left, s->r.top, + s->r.width, s->r.height); + +- if (capture_queue ^ ctx->dev->decode) ++ if ((ctx->dev->role == DECODE && !capture_queue) || ++ (ctx->dev->role == ENCODE && capture_queue)) + /* OUTPUT on decoder and CAPTURE on encoder are not valid. */ + return -EINVAL; + +@@ -1257,7 +1281,8 @@ static int vidioc_s_selection(struct fil + if (!q_data) + return -EINVAL; + +- if (ctx->dev->decode) { ++ switch (ctx->dev->role) { ++ case DECODE: + switch (s->target) { + case V4L2_SEL_TGT_COMPOSE: + /* Accept cropped image */ +@@ -1272,7 +1297,8 @@ static int vidioc_s_selection(struct fil + default: + return -EINVAL; + } +- } else { ++ break; ++ case ENCODE: + switch (s->target) { + case V4L2_SEL_TGT_CROP: + /* Only support crop from (0,0) */ +@@ -1287,6 +1313,9 @@ static int vidioc_s_selection(struct fil + default: + return -EINVAL; + } ++ break; ++ case ISP: ++ break; + } + + return 0; +@@ -1490,7 +1519,7 @@ static int vidioc_try_decoder_cmd(struct + { + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- if (!ctx->dev->decode) ++ if (ctx->dev->role != DECODE) + return -EINVAL; + + switch (cmd->cmd) { +@@ -1564,7 +1593,7 @@ static int vidioc_try_encoder_cmd(struct + { + struct bcm2835_codec_ctx *ctx = file2ctx(file); + +- if (ctx->dev->decode) ++ if (ctx->dev->role != ENCODE) + return -EINVAL; + + switch (cmd->cmd) { +@@ -1697,12 +1726,11 @@ static int bcm2835_codec_create_componen + unsigned int enable = 1; + int ret; + +- ret = vchiq_mmal_component_init(dev->instance, dev->decode ? +- "ril.video_decode" : "ril.video_encode", ++ ret = vchiq_mmal_component_init(dev->instance, components[dev->role], + &ctx->component); + if (ret < 0) { +- v4l2_err(&dev->v4l2_dev, "%s: failed to create component for %s\n", +- __func__, dev->decode ? "decode" : "encode"); ++ v4l2_err(&dev->v4l2_dev, "%s: failed to create component %s\n", ++ __func__, components[dev->role]); + return -ENOMEM; + } + +@@ -1729,13 +1757,7 @@ static int bcm2835_codec_create_componen + if (ret < 0) + goto destroy_component; + +- if (dev->decode) { +- if (ctx->q_data[V4L2_M2M_DST].sizeimage < +- ctx->component->output[0].minimum_buffer.size) +- v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", +- ctx->q_data[V4L2_M2M_DST].sizeimage, +- ctx->component->output[0].minimum_buffer.size); +- } else { ++ if (dev->role == ENCODE) { + if (ctx->q_data[V4L2_M2M_SRC].sizeimage < + ctx->component->output[0].minimum_buffer.size) + v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", +@@ -1744,6 +1766,12 @@ static int bcm2835_codec_create_componen + + /* Now we have a component we can set all the ctrls */ + bcm2835_codec_set_ctrls(ctx); ++ } else { ++ if (ctx->q_data[V4L2_M2M_DST].sizeimage < ++ ctx->component->output[0].minimum_buffer.size) ++ v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", ++ ctx->q_data[V4L2_M2M_DST].sizeimage, ++ ctx->component->output[0].minimum_buffer.size); + } + + return 0; +@@ -2090,8 +2118,6 @@ static int bcm2835_codec_open(struct fil + struct v4l2_ctrl_handler *hdl; + int rc = 0; + +- v4l2_dbg(1, debug, &dev->v4l2_dev, "Creating instance for %s\n", +- dev->decode ? "decode" : "encode"); + if (mutex_lock_interruptible(&dev->dev_mutex)) { + v4l2_err(&dev->v4l2_dev, "Mutex fail\n"); + return -ERESTARTSYS; +@@ -2104,7 +2130,8 @@ static int bcm2835_codec_open(struct fil + + ctx->q_data[V4L2_M2M_SRC].fmt = get_default_format(dev, false); + ctx->q_data[V4L2_M2M_DST].fmt = get_default_format(dev, true); +- if (dev->decode) { ++ switch (dev->role) { ++ case DECODE: + /* + * Input width and height are irrelevant as they will be defined + * by the bitstream not the format. Required by V4L2 though. +@@ -2126,7 +2153,8 @@ static int bcm2835_codec_open(struct fil + get_sizeimage(ctx->q_data[V4L2_M2M_DST].bytesperline, + ctx->q_data[V4L2_M2M_DST].height, + ctx->q_data[V4L2_M2M_DST].fmt); +- } else { ++ break; ++ case ENCODE: + ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; + ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; + ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; +@@ -2144,6 +2172,9 @@ static int bcm2835_codec_open(struct fil + ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; + ctx->q_data[V4L2_M2M_DST].sizeimage = + DEF_COMP_BUF_SIZE_720P_OR_LESS; ++ break; ++ case ISP: ++ break; + } + + ctx->colorspace = V4L2_COLORSPACE_REC709; +@@ -2154,7 +2185,7 @@ static int bcm2835_codec_open(struct fil + file->private_data = &ctx->fh; + ctx->dev = dev; + hdl = &ctx->hdl; +- if (!dev->decode) { ++ if (dev->role == ENCODE) { + /* Encode controls */ + v4l2_ctrl_handler_init(hdl, 6); + +@@ -2303,14 +2334,11 @@ static int bcm2835_codec_get_supported_f + unsigned int i, j, num_encodings; + int ret; + +- ret = vchiq_mmal_component_init(dev->instance, +- dev->decode ? +- "ril.video_decode" : +- "ril.video_encode", ++ ret = vchiq_mmal_component_init(dev->instance, components[dev->role], + &component); + if (ret < 0) { +- v4l2_err(&dev->v4l2_dev, "%s: failed to create component\n", +- __func__); ++ v4l2_err(&dev->v4l2_dev, "%s: failed to create component %s\n", ++ __func__, components[dev->role]); + return -ENOMEM; + } + +@@ -2406,12 +2434,13 @@ destroy_component: + + static int bcm2835_codec_create(struct platform_device *pdev, + struct bcm2835_codec_dev **new_dev, +- bool decode) ++ enum bcm2835_codec_role role) + { + struct bcm2835_codec_dev *dev; + struct video_device *vfd; + int video_nr; + int ret; ++ const static char *roles[] = {"decode", "encode", "isp"}; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) +@@ -2419,7 +2448,7 @@ static int bcm2835_codec_create(struct p + + dev->pdev = pdev; + +- dev->decode = decode; ++ dev->role = role; + + ret = vchiq_mmal_init(&dev->instance); + if (ret) +@@ -2441,14 +2470,27 @@ static int bcm2835_codec_create(struct p + vfd->lock = &dev->dev_mutex; + vfd->v4l2_dev = &dev->v4l2_dev; + +- if (dev->decode) { ++ switch (role) { ++ case DECODE: + v4l2_disable_ioctl(vfd, VIDIOC_ENCODER_CMD); + v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD); + video_nr = decode_video_nr; +- } else { ++ break; ++ case ENCODE: + v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD); + v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD); + video_nr = encode_video_nr; ++ break; ++ case ISP: ++ v4l2_disable_ioctl(vfd, VIDIOC_ENCODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD); ++ video_nr = isp_video_nr; ++ break; ++ default: ++ ret = -EINVAL; ++ goto unreg_dev; + } + + ret = video_register_device(vfd, VFL_TYPE_GRABBER, video_nr); +@@ -2473,7 +2515,7 @@ static int bcm2835_codec_create(struct p + } + + v4l2_info(&dev->v4l2_dev, "Loaded V4L2 %s\n", +- dev->decode ? "decode" : "encode"); ++ roles[role]); + return 0; + + err_m2m: +@@ -2509,11 +2551,15 @@ static int bcm2835_codec_probe(struct pl + if (!drv) + return -ENOMEM; + +- ret = bcm2835_codec_create(pdev, &drv->encode, false); ++ ret = bcm2835_codec_create(pdev, &drv->decode, DECODE); + if (ret) + goto out; + +- ret = bcm2835_codec_create(pdev, &drv->decode, true); ++ ret = bcm2835_codec_create(pdev, &drv->encode, ENCODE); ++ if (ret) ++ goto out; ++ ++ ret = bcm2835_codec_create(pdev, &drv->isp, ISP); + if (ret) + goto out; + +@@ -2526,6 +2572,10 @@ out: + bcm2835_codec_destroy(drv->encode); + drv->encode = NULL; + } ++ if (drv->decode) { ++ bcm2835_codec_destroy(drv->decode); ++ drv->decode = NULL; ++ } + return ret; + } + +@@ -2533,6 +2583,8 @@ static int bcm2835_codec_remove(struct p + { + struct bcm2835_codec_driver *drv = platform_get_drvdata(pdev); + ++ bcm2835_codec_destroy(drv->isp); ++ + bcm2835_codec_destroy(drv->encode); + + bcm2835_codec_destroy(drv->decode); diff --git a/target/linux/brcm2708/patches-4.19/950-0363-staging-bcm2835_codec-Add-an-option-for-ignoring-Bay.patch b/target/linux/brcm2708/patches-4.19/950-0363-staging-bcm2835_codec-Add-an-option-for-ignoring-Bay.patch new file mode 100644 index 000000000..f1b512fdd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0363-staging-bcm2835_codec-Add-an-option-for-ignoring-Bay.patch @@ -0,0 +1,179 @@ +From bb5864d9cbab452b7946b5ef97e781cf6e18e8b9 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 15 Feb 2019 11:36:14 +0000 +Subject: [PATCH 363/703] staging: bcm2835_codec: Add an option for ignoring + Bayer formats. + +This is a workaround for GStreamer currently not identifying Bayer +as a raw format, therefore any device that supports it does not +match the criteria for v4l2convert. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 29 ++++++++++++++++++- + 1 file changed, 28 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -58,6 +58,15 @@ static int isp_video_nr = 12; + module_param(isp_video_nr, int, 0644); + MODULE_PARM_DESC(isp_video_nr, "isp video device number"); + ++/* ++ * Workaround for GStreamer v4l2convert component not considering Bayer formats ++ * as raw, and therefore not considering a V4L2 device that supports them as ++ * as a suitable candidate. ++ */ ++static bool disable_bayer; ++module_param(disable_bayer, bool, 0644); ++MODULE_PARM_DESC(disable_bayer, "Disable support for Bayer formats"); ++ + static unsigned int debug; + module_param(debug, uint, 0644); + MODULE_PARM_DESC(debug, "activates debug info (0-3)"); +@@ -105,6 +114,7 @@ struct bcm2835_codec_fmt { + u32 flags; + u32 mmal_fmt; + int size_multiplier_x2; ++ bool is_bayer; + }; + + static const struct bcm2835_codec_fmt supported_formats[] = { +@@ -203,6 +213,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB8, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .depth = 8, +@@ -210,6 +221,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR8, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .depth = 8, +@@ -217,6 +229,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG8, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .depth = 8, +@@ -224,6 +237,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG8, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + /* 10 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB10P, +@@ -232,6 +246,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB10P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR10P, + .depth = 10, +@@ -239,6 +254,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR10P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG10P, + .depth = 10, +@@ -246,6 +262,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG10P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG10P, + .depth = 10, +@@ -253,6 +270,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG10P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + /* 12 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB12P, +@@ -261,6 +279,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB12P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR12P, + .depth = 12, +@@ -268,6 +287,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR12P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG12P, + .depth = 12, +@@ -275,6 +295,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG12P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG12P, + .depth = 12, +@@ -282,6 +303,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG12P, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + /* 16 bit */ + .fourcc = V4L2_PIX_FMT_SRGGB16, +@@ -290,6 +312,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SRGGB16, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SBGGR16, + .depth = 16, +@@ -297,6 +320,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SBGGR16, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGRBG16, + .depth = 16, +@@ -304,6 +328,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGRBG16, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + .fourcc = V4L2_PIX_FMT_SGBRG16, + .depth = 16, +@@ -311,6 +336,7 @@ static const struct bcm2835_codec_fmt su + .flags = 0, + .mmal_fmt = MMAL_ENCODING_BAYER_SGBRG16, + .size_multiplier_x2 = 2, ++ .is_bayer = true, + }, { + /* Compressed formats */ + .fourcc = V4L2_PIX_FMT_H264, +@@ -438,7 +464,8 @@ static const struct bcm2835_codec_fmt *g + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(supported_formats); i++) { +- if (supported_formats[i].mmal_fmt == mmal_fmt) ++ if (supported_formats[i].mmal_fmt == mmal_fmt && ++ (!disable_bayer || !supported_formats[i].is_bayer)) + return &supported_formats[i]; + } + return NULL; diff --git a/target/linux/brcm2708/patches-4.19/950-0364-staging-bcm2835_codec-Fix-handling-of-VB2_MEMORY_DMA.patch b/target/linux/brcm2708/patches-4.19/950-0364-staging-bcm2835_codec-Fix-handling-of-VB2_MEMORY_DMA.patch new file mode 100644 index 000000000..8e6e69356 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0364-staging-bcm2835_codec-Fix-handling-of-VB2_MEMORY_DMA.patch @@ -0,0 +1,186 @@ +From d103cd3b55e4285f2c0ad937cf31bea9ebaa4d21 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 15 Feb 2019 11:38:45 +0000 +Subject: [PATCH 364/703] staging: bcm2835_codec: Fix handling of + VB2_MEMORY_DMABUF buffers + +If the queue is configured as VB2_MEMORY_DMABUF then vb2_core_expbuf +fails as it ensures the queue is defined as VB2_MEMORY_MMAP. + +Correct the handling so that we unmap the buffer from vcsm and the +VPU on cleanup, and then correctly get the dma buf of the new buffer. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 80 +++++++++++++------ + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 21 +++-- + .../vc04_services/vchiq-mmal/mmal-vchiq.h | 2 + + 3 files changed, 73 insertions(+), 30 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1852,6 +1852,18 @@ static int bcm2835_codec_queue_setup(str + return 0; + } + ++static int bcm2835_codec_mmal_buf_cleanup(struct mmal_buffer *mmal_buf) ++{ ++ mmal_vchi_buffer_cleanup(mmal_buf); ++ ++ if (mmal_buf->dma_buf) { ++ dma_buf_put(mmal_buf->dma_buf); ++ mmal_buf->dma_buf = NULL; ++ } ++ ++ return 0; ++} ++ + static int bcm2835_codec_buf_init(struct vb2_buffer *vb) + { + struct bcm2835_codec_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue); +@@ -1880,6 +1892,7 @@ static int bcm2835_codec_buf_prepare(str + vb); + struct m2m_mmal_buffer *buf = container_of(m2m, struct m2m_mmal_buffer, + m2m); ++ struct dma_buf *dma_buf; + int ret; + + v4l2_dbg(4, debug, &ctx->dev->v4l2_dev, "%s: type: %d ptr %p\n", +@@ -1906,20 +1919,48 @@ static int bcm2835_codec_buf_prepare(str + if (!V4L2_TYPE_IS_OUTPUT(vb->vb2_queue->type)) + vb2_set_plane_payload(vb, 0, q_data->sizeimage); + +- /* +- * We want to do this at init, but vb2_core_expbuf checks that the +- * index < q->num_buffers, and q->num_buffers only gets updated once +- * all the buffers are allocated. +- */ +- if (!buf->mmal.dma_buf) { +- ret = vb2_core_expbuf_dmabuf(vb->vb2_queue, +- vb->vb2_queue->type, vb->index, 0, +- O_CLOEXEC, &buf->mmal.dma_buf); +- if (ret) +- v4l2_err(&ctx->dev->v4l2_dev, "%s: Failed to expbuf idx %d, ret %d\n", +- __func__, vb->index, ret); +- } else { ++ switch (vb->memory) { ++ case VB2_MEMORY_DMABUF: ++ dma_buf = dma_buf_get(vb->planes[0].m.fd); ++ ++ if (dma_buf != buf->mmal.dma_buf) { ++ /* dmabuf either hasn't already been mapped, or it has ++ * changed. ++ */ ++ if (buf->mmal.dma_buf) { ++ v4l2_err(&ctx->dev->v4l2_dev, ++ "%s Buffer changed - why did the core not call cleanup?\n", ++ __func__); ++ bcm2835_codec_mmal_buf_cleanup(&buf->mmal); ++ } ++ ++ buf->mmal.dma_buf = dma_buf; ++ } + ret = 0; ++ break; ++ case VB2_MEMORY_MMAP: ++ /* ++ * We want to do this at init, but vb2_core_expbuf checks that ++ * the index < q->num_buffers, and q->num_buffers only gets ++ * updated once all the buffers are allocated. ++ */ ++ if (!buf->mmal.dma_buf) { ++ ret = vb2_core_expbuf_dmabuf(vb->vb2_queue, ++ vb->vb2_queue->type, ++ vb->index, 0, ++ O_CLOEXEC, ++ &buf->mmal.dma_buf); ++ if (ret) ++ v4l2_err(&ctx->dev->v4l2_dev, ++ "%s: Failed to expbuf idx %d, ret %d\n", ++ __func__, vb->index, ret); ++ } else { ++ ret = 0; ++ } ++ break; ++ default: ++ ret = -EINVAL; ++ break; + } + + return ret; +@@ -1948,12 +1989,7 @@ static void bcm2835_codec_buffer_cleanup + v4l2_dbg(2, debug, &ctx->dev->v4l2_dev, "%s: ctx:%p, vb %p\n", + __func__, ctx, vb); + +- mmal_vchi_buffer_cleanup(&buf->mmal); +- +- if (buf->mmal.dma_buf) { +- dma_buf_put(buf->mmal.dma_buf); +- buf->mmal.dma_buf = NULL; +- } ++ bcm2835_codec_mmal_buf_cleanup(&buf->mmal); + } + + static int bcm2835_codec_start_streaming(struct vb2_queue *q, +@@ -2067,11 +2103,7 @@ static void bcm2835_codec_stop_streaming + m2m = container_of(vb2, struct v4l2_m2m_buffer, vb); + buf = container_of(m2m, struct m2m_mmal_buffer, m2m); + +- mmal_vchi_buffer_cleanup(&buf->mmal); +- if (buf->mmal.dma_buf) { +- dma_buf_put(buf->mmal.dma_buf); +- buf->mmal.dma_buf = NULL; +- } ++ bcm2835_codec_mmal_buf_cleanup(&buf->mmal); + } + + /* If both ports disabled, then disable the component */ +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1784,13 +1784,9 @@ int mmal_vchi_buffer_init(struct vchiq_m + } + EXPORT_SYMBOL_GPL(mmal_vchi_buffer_init); + +-int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) ++int mmal_vchi_buffer_unmap(struct mmal_buffer *buf) + { +- struct mmal_msg_context *msg_context = buf->msg_context; +- +- if (msg_context) +- release_msg_context(msg_context); +- buf->msg_context = NULL; ++ int ret = 0; + + if (buf->vcsm_handle) { + int ret; +@@ -1802,6 +1798,19 @@ int mmal_vchi_buffer_cleanup(struct mmal + pr_err("%s: vcsm_free failed, ret %d\n", __func__, ret); + buf->vcsm_handle = 0; + } ++ return ret; ++} ++EXPORT_SYMBOL_GPL(mmal_vchi_buffer_unmap); ++ ++int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf) ++{ ++ struct mmal_msg_context *msg_context = buf->msg_context; ++ ++ if (msg_context) ++ release_msg_context(msg_context); ++ buf->msg_context = NULL; ++ ++ mmal_vchi_buffer_unmap(buf); + return 0; + } + EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.h +@@ -167,6 +167,8 @@ int vchiq_mmal_submit_buffer(struct vchi + struct vchiq_mmal_port *port, + struct mmal_buffer *buf); + ++int mmal_vchi_buffer_unmap(struct mmal_buffer *buf); ++ + int mmal_vchi_buffer_init(struct vchiq_mmal_instance *instance, + struct mmal_buffer *buf); + int mmal_vchi_buffer_cleanup(struct mmal_buffer *buf); diff --git a/target/linux/brcm2708/patches-4.19/950-0365-staging-mmal-vchiq-Update-mmal_parameters.h-with-rec.patch b/target/linux/brcm2708/patches-4.19/950-0365-staging-mmal-vchiq-Update-mmal_parameters.h-with-rec.patch new file mode 100644 index 000000000..342c22f80 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0365-staging-mmal-vchiq-Update-mmal_parameters.h-with-rec.patch @@ -0,0 +1,56 @@ +From c295d66017878afeee903f9f324b59e847dfb69b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 18 Feb 2019 15:52:29 +0000 +Subject: [PATCH 365/703] staging: mmal-vchiq: Update mmal_parameters.h with + recently defined params + +mmal_parameters.h hasn't been updated to reflect additions made +over the last few years. Update it to reflect the currently +supported parameters. + +Signed-off-by: Dave Stevenson +--- + .../vchiq-mmal/mmal-parameters.h | 32 ++++++++++++++++++- + 1 file changed, 31 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-parameters.h +@@ -580,7 +580,37 @@ enum mmal_parameter_video_type { + MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG, + + /**< @ref MMAL_PARAMETER_BOOLEAN_T */ +- MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER ++ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER, ++ ++ /**< Take a @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_SEI_ENABLE, ++ ++ /**< Take a @ref MMAL_PARAMETER_BOOLEAN_T. */ ++ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_VECTORS, ++ ++ /**< Take a @ref MMAL_PARAMETER_VIDEO_RENDER_STATS_T. */ ++ MMAL_PARAMETER_VIDEO_RENDER_STATS, ++ ++ /**< Take a @ref MMAL_PARAMETER_VIDEO_INTERLACE_TYPE_T. */ ++ MMAL_PARAMETER_VIDEO_INTERLACE_TYPE, ++ ++ /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_INTERPOLATE_TIMESTAMPS, ++ ++ /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_SPS_TIMING, ++ ++ /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_VIDEO_MAX_NUM_CALLBACKS, ++ ++ /**< Takes a @ref MMAL_PARAMETER_SOURCE_PATTERN_T */ ++ MMAL_PARAMETER_VIDEO_SOURCE_PATTERN, ++ ++ /**< Takes a @ref MMAL_PARAMETER_BOOLEAN_T */ ++ MMAL_PARAMETER_VIDEO_ENCODE_SEPARATE_NAL_BUFS, ++ ++ /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ ++ MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAME_LENGTH, + }; + + /** Valid mirror modes */ diff --git a/target/linux/brcm2708/patches-4.19/950-0366-staging-bcm2835_codec-Include-timing-info-in-SPS-hea.patch b/target/linux/brcm2708/patches-4.19/950-0366-staging-bcm2835_codec-Include-timing-info-in-SPS-hea.patch new file mode 100644 index 000000000..b0c449bd2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0366-staging-bcm2835_codec-Include-timing-info-in-SPS-hea.patch @@ -0,0 +1,44 @@ +From 90a411bf61170375a4392b603e6f085ff0c68927 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 18 Feb 2019 15:56:42 +0000 +Subject: [PATCH 366/703] staging: bcm2835_codec: Include timing info in SPS + headers + +Inserting timing information into the VUI block of the SPS is +optional with the VPU encoder. +GStreamer appears to require them when using V4L2 M2M, therefore +set the option to enable them from the encoder. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1785,6 +1785,8 @@ static int bcm2835_codec_create_componen + goto destroy_component; + + if (dev->role == ENCODE) { ++ u32 param = 1; ++ + if (ctx->q_data[V4L2_M2M_SRC].sizeimage < + ctx->component->output[0].minimum_buffer.size) + v4l2_err(&dev->v4l2_dev, "buffer size mismatch sizeimage %u < min size %u\n", +@@ -1793,6 +1795,16 @@ static int bcm2835_codec_create_componen + + /* Now we have a component we can set all the ctrls */ + bcm2835_codec_set_ctrls(ctx); ++ ++ /* Enable SPS Timing header so framerate information is encoded ++ * in the H264 header. ++ */ ++ vchiq_mmal_port_parameter_set( ++ ctx->dev->instance, ++ &ctx->component->output[0], ++ MMAL_PARAMETER_VIDEO_ENCODE_SPS_TIMING, ++ ¶m, sizeof(param)); ++ + } else { + if (ctx->q_data[V4L2_M2M_DST].sizeimage < + ctx->component->output[0].minimum_buffer.size) diff --git a/target/linux/brcm2708/patches-4.19/950-0367-drm-vc4-Don-t-wait-for-vblank-on-fkms-cursor-updates.patch b/target/linux/brcm2708/patches-4.19/950-0367-drm-vc4-Don-t-wait-for-vblank-on-fkms-cursor-updates.patch new file mode 100644 index 000000000..f49a1ce97 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0367-drm-vc4-Don-t-wait-for-vblank-on-fkms-cursor-updates.patch @@ -0,0 +1,28 @@ +From 2e2eb767bf98517b95fc7d7e1d28b802b41bfcd9 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 5 Feb 2018 18:53:18 +0000 +Subject: [PATCH 367/703] drm/vc4: Don't wait for vblank on fkms cursor + updates. + +We don't use the same async update path between fkms and normal kms, +and the normal kms workaround ended up making us wait. This became a +larger problem in rpi-4.14.y, as the USB HID update rate throttling +got (accidentally?) dropped. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_kms.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -222,7 +222,8 @@ static int vc4_atomic_commit(struct drm_ + * drm_atomic_helper_setup_commit() from auto-completing + * commit->flip_done. + */ +- state->legacy_cursor_update = false; ++ if (!vc4->firmware_kms) ++ state->legacy_cursor_update = false; + ret = drm_atomic_helper_setup_commit(state, nonblock); + if (ret) + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0368-Fix-for-Pisound-kernel-module-in-Real-Time-kernel-co.patch b/target/linux/brcm2708/patches-4.19/950-0368-Fix-for-Pisound-kernel-module-in-Real-Time-kernel-co.patch new file mode 100644 index 000000000..916a35957 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0368-Fix-for-Pisound-kernel-module-in-Real-Time-kernel-co.patch @@ -0,0 +1,38 @@ +From 3e9ce629c2f5f9f58c0b869261226ab811e2d5a7 Mon Sep 17 00:00:00 2001 +From: Giedrius +Date: Wed, 27 Feb 2019 14:27:28 +0000 +Subject: [PATCH 368/703] Fix for Pisound kernel module in Real Time kernel + configuration. + +When handler of data_available interrupt is fired, queue_work ends up +getting called and it can block on a spin lock which is not allowed in +interrupt context. The fix was to run the handler from a thread context +instead. +--- + sound/soc/bcm/pisound.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/sound/soc/bcm/pisound.c ++++ b/sound/soc/bcm/pisound.c +@@ -1,6 +1,6 @@ + /* + * Pisound Linux kernel module. +- * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound ++ * Copyright (C) 2016-2019 Vilniaus Blokas UAB, https://blokas.io/pisound + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License +@@ -532,10 +532,10 @@ static void pisnd_spi_gpio_uninit(void) + + static int pisnd_spi_gpio_irq_init(struct device *dev) + { +- return request_irq( +- gpiod_to_irq(data_available), ++ return request_threaded_irq( ++ gpiod_to_irq(data_available), NULL, + data_available_interrupt_handler, +- IRQF_TIMER | IRQF_TRIGGER_RISING, ++ IRQF_TIMER | IRQF_TRIGGER_RISING | IRQF_ONESHOT, + "data_available_int", + NULL + ); diff --git a/target/linux/brcm2708/patches-4.19/950-0369-config-Add-CONFIG_FB_TFT_SH1106-m.patch b/target/linux/brcm2708/patches-4.19/950-0369-config-Add-CONFIG_FB_TFT_SH1106-m.patch new file mode 100644 index 000000000..efd96dd89 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0369-config-Add-CONFIG_FB_TFT_SH1106-m.patch @@ -0,0 +1,64 @@ +From 9a9dd897e8de1bbf48dae13f1bdaa99996ab3b52 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 27 Feb 2019 20:08:48 +0000 +Subject: [PATCH 369/703] config: Add CONFIG_FB_TFT_SH1106=m + +See: https://github.com/raspberrypi/linux/issues/2876 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 3 ++- + arch/arm/configs/bcmrpi_defconfig | 3 ++- + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 5 insertions(+), 2 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -905,8 +905,8 @@ CONFIG_SND_BCM2835_SOC_I2S=m + CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m +-CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m + CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m +@@ -1203,6 +1203,7 @@ CONFIG_FB_TFT_PCD8544=m + CONFIG_FB_TFT_RA8875=m + CONFIG_FB_TFT_S6D02A1=m + CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SH1106=m + CONFIG_FB_TFT_SSD1289=m + CONFIG_FB_TFT_SSD1306=m + CONFIG_FB_TFT_SSD1331=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -898,8 +898,8 @@ CONFIG_SND_BCM2835_SOC_I2S=m + CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m +-CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m + CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m +@@ -1196,6 +1196,7 @@ CONFIG_FB_TFT_PCD8544=m + CONFIG_FB_TFT_RA8875=m + CONFIG_FB_TFT_S6D02A1=m + CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SH1106=m + CONFIG_FB_TFT_SSD1289=m + CONFIG_FB_TFT_SSD1306=m + CONFIG_FB_TFT_SSD1331=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1061,6 +1061,7 @@ CONFIG_FB_TFT_PCD8544=m + CONFIG_FB_TFT_RA8875=m + CONFIG_FB_TFT_S6D02A1=m + CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SH1106=m + CONFIG_FB_TFT_SSD1289=m + CONFIG_FB_TFT_SSD1306=m + CONFIG_FB_TFT_SSD1331=m diff --git a/target/linux/brcm2708/patches-4.19/950-0370-Added-mute-stream-func.patch b/target/linux/brcm2708/patches-4.19/950-0370-Added-mute-stream-func.patch new file mode 100644 index 000000000..f7e6b4cf0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0370-Added-mute-stream-func.patch @@ -0,0 +1,146 @@ +From ac5d3c0f1d947302f4d518187357720711f4961d Mon Sep 17 00:00:00 2001 +From: Jaikumar +Date: Thu, 7 Jun 2018 21:22:45 +0530 +Subject: [PATCH 370/703] Added mute stream func + +Signed-off-by: Jaikumar +--- + sound/soc/bcm/allo-katana-codec.c | 60 ++++++++++++++++++++++--------- + 1 file changed, 44 insertions(+), 16 deletions(-) + +--- a/sound/soc/bcm/allo-katana-codec.c ++++ b/sound/soc/bcm/allo-katana-codec.c +@@ -31,21 +31,23 @@ + + #define KATANA_CODEC_CHIP_ID 0x30 + #define KATANA_CODEC_VIRT_BASE 0x100 +-#define KATANA_CODEC_PAGE 0 ++#define KATANA_CODEC_PAGE 0 + + #define KATANA_CODEC_CHIP_ID_REG (KATANA_CODEC_VIRT_BASE + 0) +-#define KATANA_CODEC_RESET (KATANA_CODEC_VIRT_BASE + 1) ++#define KATANA_CODEC_RESET (KATANA_CODEC_VIRT_BASE + 1) + #define KATANA_CODEC_VOLUME_1 (KATANA_CODEC_VIRT_BASE + 2) + #define KATANA_CODEC_VOLUME_2 (KATANA_CODEC_VIRT_BASE + 3) +-#define KATANA_CODEC_MUTE (KATANA_CODEC_VIRT_BASE + 4) ++#define KATANA_CODEC_MUTE (KATANA_CODEC_VIRT_BASE + 4) + #define KATANA_CODEC_DSP_PROGRAM (KATANA_CODEC_VIRT_BASE + 5) + #define KATANA_CODEC_DEEMPHASIS (KATANA_CODEC_VIRT_BASE + 6) +-#define KATANA_CODEC_DOP (KATANA_CODEC_VIRT_BASE + 7) +-#define KATANA_CODEC_FORMAT (KATANA_CODEC_VIRT_BASE + 8) ++#define KATANA_CODEC_DOP (KATANA_CODEC_VIRT_BASE + 7) ++#define KATANA_CODEC_FORMAT (KATANA_CODEC_VIRT_BASE + 8) + #define KATANA_CODEC_COMMAND (KATANA_CODEC_VIRT_BASE + 9) +-#define KATANA_CODEC_MAX_REGISTER (KATANA_CODEC_VIRT_BASE + 9) ++#define KATANA_CODEC_MUTE_STREAM (KATANA_CODEC_VIRT_BASE + 10) + +-#define KATANA_CODEC_FMT 0xff ++#define KATANA_CODEC_MAX_REGISTER (KATANA_CODEC_VIRT_BASE + 10) ++ ++#define KATANA_CODEC_FMT 0xff + #define KATANA_CODEC_CHAN_MONO 0x00 + #define KATANA_CODEC_CHAN_STEREO 0x80 + #define KATANA_CODEC_ALEN_16 0x10 +@@ -135,7 +137,8 @@ static const struct snd_kcontrol_new kat + SOC_SINGLE("DoP Playback Switch", KATANA_CODEC_DOP, 0, 1, 1) + }; + +-static bool katana_codec_readable_register(struct device *dev, unsigned int reg) ++static bool katana_codec_readable_register(struct device *dev, ++ unsigned int reg) + { + switch (reg) { + case KATANA_CODEC_CHIP_ID_REG: +@@ -150,13 +153,15 @@ static int katana_codec_hw_params(struct + struct snd_soc_dai *dai) + { + struct snd_soc_component *component = dai->component; +- struct katana_codec_priv *katana_codec = snd_soc_component_get_drvdata(component); ++ struct katana_codec_priv *katana_codec = ++ snd_soc_component_get_drvdata(component); + int fmt = 0; + int ret; + +- dev_dbg(component->card->dev, "hw_params %u Hz, %u channels\n", ++ dev_dbg(component->card->dev, "hw_params %u Hz, %u channels, %u bits\n", + params_rate(params), +- params_channels(params)); ++ params_channels(params), ++ params_width(params)); + + switch (katana_codec->fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: // master +@@ -212,13 +217,17 @@ static int katana_codec_hw_params(struct + return -EINVAL; + } + +- ret = regmap_write(katana_codec->regmap, KATANA_CODEC_FORMAT, fmt); ++ ret = regmap_write(katana_codec->regmap, KATANA_CODEC_FORMAT, ++ fmt); + if (ret != 0) { + dev_err(component->card->dev, "Failed to set format: %d\n", ret); + return ret; + } + break; + ++ case SND_SOC_DAIFMT_CBS_CFS: ++ break; ++ + default: + return -EINVAL; + } +@@ -229,14 +238,33 @@ static int katana_codec_hw_params(struct + static int katana_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) + { + struct snd_soc_component *component = dai->component; +- struct katana_codec_priv *katana_codec = snd_soc_component_get_drvdata(component); ++ struct katana_codec_priv *katana_codec = ++ snd_soc_component_get_drvdata(component); + + katana_codec->fmt = fmt; + + return 0; + } + ++int katana_codec_dai_mute_stream(struct snd_soc_dai *dai, int mute, ++ int stream) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct katana_codec_priv *katana_codec = ++ snd_soc_component_get_drvdata(component); ++ int ret = 0; ++ ++ ret = regmap_write(katana_codec->regmap, KATANA_CODEC_MUTE_STREAM, ++ mute); ++ if (ret != 0) { ++ dev_err(component->card->dev, "Failed to set mute: %d\n", ret); ++ return ret; ++ } ++ return ret; ++} ++ + static const struct snd_soc_dai_ops katana_codec_dai_ops = { ++ .mute_stream = katana_codec_dai_mute_stream, + .hw_params = katana_codec_hw_params, + .set_fmt = katana_codec_set_fmt, + }; +@@ -300,7 +328,7 @@ static int allo_katana_component_probe(s + return PTR_ERR(regmap); + + katana_codec = devm_kzalloc(dev, sizeof(struct katana_codec_priv), +- GFP_KERNEL); ++ GFP_KERNEL); + if (!katana_codec) + return -ENOMEM; + +@@ -348,8 +376,8 @@ static struct i2c_driver allo_katana_com + .remove = allo_katana_component_remove, + .id_table = allo_katana_component_id, + .driver = { +- .name = "allo-katana-codec", +- .of_match_table = allo_katana_codec_of_match, ++ .name = "allo-katana-codec", ++ .of_match_table = allo_katana_codec_of_match, + }, + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0371-lan78xx-EEE-support-is-now-a-PHY-property.patch b/target/linux/brcm2708/patches-4.19/950-0371-lan78xx-EEE-support-is-now-a-PHY-property.patch new file mode 100644 index 000000000..dda084d7a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0371-lan78xx-EEE-support-is-now-a-PHY-property.patch @@ -0,0 +1,26 @@ +From 9fc96f927bdcefe90e8646c23c6eea65b07e72ab Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 5 Mar 2019 09:51:22 +0000 +Subject: [PATCH 371/703] lan78xx: EEE support is now a PHY property + +Now that EEE support is a property of the PHY, use the PHY's DT node +when querying the EEE-related properties. + +See: https://github.com/raspberrypi/linux/issues/2882 + +Signed-off-by: Phil Elwell +--- + drivers/net/usb/lan78xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -2191,7 +2191,7 @@ static int lan78xx_phy_init(struct lan78 + mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control); + phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv); + +- if (of_property_read_bool(dev->udev->dev.of_node, ++ if (of_property_read_bool(phydev->mdio.dev.of_node, + "microchip,eee-enabled")) { + struct ethtool_eee edata; + memset(&edata, 0, sizeof(edata)); diff --git a/target/linux/brcm2708/patches-4.19/950-0372-video-bcm2708_fb-Try-allocating-on-the-ARM-and-passi.patch b/target/linux/brcm2708/patches-4.19/950-0372-video-bcm2708_fb-Try-allocating-on-the-ARM-and-passi.patch new file mode 100644 index 000000000..aa43b8bc2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0372-video-bcm2708_fb-Try-allocating-on-the-ARM-and-passi.patch @@ -0,0 +1,162 @@ +From 7e709c572681a79ed9f906ceeb01a9cc8ca77049 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 27 Feb 2019 17:30:33 +0000 +Subject: [PATCH 372/703] video: bcm2708_fb: Try allocating on the ARM and + passing to VPU + +Currently the VPU allocates the contiguous buffer for the +framebuffer. +Try an alternate path first where we use dma_alloc_coherent +and pass the buffer to the VPU. Should the VPU firmware not +support that path, then free the buffer and revert to the +old behaviour of using the VPU allocation. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 102 ++++++++++++++++++--- + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 2 files changed, 91 insertions(+), 12 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -98,6 +98,11 @@ struct bcm2708_fb { + struct bcm2708_fb_stats stats; + unsigned long fb_bus_address; + struct { u32 base, length; } gpu; ++ ++ bool disable_arm_alloc; ++ unsigned int image_size; ++ dma_addr_t dma_addr; ++ void *cpuaddr; + }; + + #define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) +@@ -283,23 +288,88 @@ static int bcm2708_fb_set_par(struct fb_ + .xoffset = info->var.xoffset, + .yoffset = info->var.yoffset, + .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, +- .base = 0, +- .screen_size = 0, +- .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH, 4, 0 }, +- .pitch = 0, ++ /* base and screen_size will be initialised later */ ++ .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, ++ /* pitch will be initialised later */ + }; +- int ret; ++ int ret, image_size; ++ + + print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info, + info->var.xres, info->var.yres, info->var.xres_virtual, + info->var.yres_virtual, (int)info->screen_size, + info->var.bits_per_pixel); + +- ret = rpi_firmware_property_list(fb->fw, &fbinfo, sizeof(fbinfo)); ++ /* Try allocating our own buffer. We can specify all the parameters */ ++ image_size = ((info->var.xres * info->var.yres) * ++ info->var.bits_per_pixel) >> 3; ++ ++ if (!fb->disable_arm_alloc && ++ (image_size != fb->image_size || !fb->dma_addr)) { ++ if (fb->dma_addr) { ++ dma_free_coherent(info->device, fb->image_size, ++ fb->cpuaddr, fb->dma_addr); ++ fb->image_size = 0; ++ fb->cpuaddr = NULL; ++ fb->dma_addr = 0; ++ } ++ ++ fb->cpuaddr = dma_alloc_coherent(info->device, image_size, ++ &fb->dma_addr, GFP_KERNEL); ++ ++ if (!fb->cpuaddr) { ++ fb->dma_addr = 0; ++ fb->disable_arm_alloc = true; ++ } else { ++ fb->image_size = image_size; ++ } ++ } ++ ++ if (fb->cpuaddr) { ++ fbinfo.base = fb->dma_addr; ++ fbinfo.screen_size = image_size; ++ fbinfo.pitch = (info->var.xres * info->var.bits_per_pixel) >> 3; ++ ++ ret = rpi_firmware_property_list(fb->fw, &fbinfo, ++ sizeof(fbinfo)); ++ if (ret || fbinfo.base != fb->dma_addr) { ++ /* Firmware either failed, or assigned a different base ++ * address (ie it doesn't support being passed an FB ++ * allocation). ++ * Destroy the allocation, and don't try again. ++ */ ++ dma_free_coherent(info->device, fb->image_size, ++ fb->cpuaddr, fb->dma_addr); ++ fb->image_size = 0; ++ fb->cpuaddr = NULL; ++ fb->dma_addr = 0; ++ fb->disable_arm_alloc = true; ++ } ++ } else { ++ /* Our allocation failed - drop into the old scheme of ++ * allocation by the VPU. ++ */ ++ ret = -ENOMEM; ++ } ++ + if (ret) { +- dev_err(info->device, +- "Failed to allocate GPU framebuffer (%d)\n", ret); +- return ret; ++ /* Old scheme: ++ * - FRAMEBUFFER_ALLOCATE passes 0 for base and screen_size. ++ * - GET_PITCH instead of SET_PITCH. ++ */ ++ fbinfo.base = 0; ++ fbinfo.screen_size = 0; ++ fbinfo.tag6.tag = RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH; ++ fbinfo.pitch = 0; ++ ++ ret = rpi_firmware_property_list(fb->fw, &fbinfo, ++ sizeof(fbinfo)); ++ if (ret) { ++ dev_err(info->device, ++ "Failed to allocate GPU framebuffer (%d)\n", ++ ret); ++ return ret; ++ } + } + + if (info->var.bits_per_pixel <= 8) +@@ -314,9 +384,17 @@ static int bcm2708_fb_set_par(struct fb_ + fb->fb.fix.smem_start = fbinfo.base; + fb->fb.fix.smem_len = fbinfo.pitch * fbinfo.yres_virtual; + fb->fb.screen_size = fbinfo.screen_size; +- if (fb->fb.screen_base) +- iounmap(fb->fb.screen_base); +- fb->fb.screen_base = ioremap_wc(fbinfo.base, fb->fb.screen_size); ++ ++ if (!fb->dma_addr) { ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ ++ fb->fb.screen_base = ioremap_wc(fbinfo.base, ++ fb->fb.screen_size); ++ } else { ++ fb->fb.screen_base = fb->cpuaddr; ++ } ++ + if (!fb->fb.screen_base) { + /* the console may currently be locked */ + console_trylock(); +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -128,6 +128,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, + RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, + RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, + RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, + RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, + RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, diff --git a/target/linux/brcm2708/patches-4.19/950-0373-staging-vc_sm_cma-Remove-erroneous-misc_deregister.patch b/target/linux/brcm2708/patches-4.19/950-0373-staging-vc_sm_cma-Remove-erroneous-misc_deregister.patch new file mode 100644 index 000000000..82d8fe493 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0373-staging-vc_sm_cma-Remove-erroneous-misc_deregister.patch @@ -0,0 +1,44 @@ +From d5fc03cec741a893fd37150f3fecef0cbb6ecb19 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 10:38:59 +0000 +Subject: [PATCH 373/703] staging: vc_sm_cma: Remove erroneous misc_deregister + +Code from the misc /dev node was still present in +bcm2835_vc_sm_cma_remove, which caused a NULL deref. +Remove it. + +See #2885. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 5 ----- + 1 file changed, 5 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -25,7 +25,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -72,7 +71,6 @@ struct sm_pde_t { + struct sm_state_t { + struct platform_device *pdev; + +- struct miscdevice dev; + struct sm_instance *sm_handle; /* Handle for videocore service. */ + + spinlock_t kernelid_map_lock; /* Spinlock protecting kernelid_map */ +@@ -758,9 +756,6 @@ static int bcm2835_vc_sm_cma_remove(stru + { + pr_debug("[%s]: start\n", __func__); + if (sm_inited) { +- /* Remove shared memory device. */ +- misc_deregister(&sm_state->dev); +- + /* Remove all proc entries. */ + //debugfs_remove_recursive(sm_state->dir_root); + diff --git a/target/linux/brcm2708/patches-4.19/950-0374-vcsm-Fix-makefile-include-on-out-of-tree-builds.patch b/target/linux/brcm2708/patches-4.19/950-0374-vcsm-Fix-makefile-include-on-out-of-tree-builds.patch new file mode 100644 index 000000000..d4a4539ee --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0374-vcsm-Fix-makefile-include-on-out-of-tree-builds.patch @@ -0,0 +1,27 @@ +From 902c22fdf3bf32f26412cef747bc7d657abcf194 Mon Sep 17 00:00:00 2001 +From: Kieran Bingham +Date: Mon, 18 Mar 2019 17:14:51 +0000 +Subject: [PATCH 374/703] vcsm: Fix makefile include on out-of-tree builds + +The vc_sm module tries to include the 'fs' directory from the +$(srctree). $(srctree) is already provided by the build system, and +causes the include path to be duplicated. + +With -Werror this fails to compile. + +Remove the unnecessary variable. + +Signed-off-by: Kieran Bingham +--- + drivers/char/broadcom/vc_sm/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/char/broadcom/vc_sm/Makefile ++++ b/drivers/char/broadcom/vc_sm/Makefile +@@ -1,5 +1,5 @@ + ccflags-$(CONFIG_BCM_VC_SM) += -Werror -Wall -Wstrict-prototypes -Wno-trigraphs -O2 +-ccflags-$(CONFIG_BCM_VC_SM) += -I"drivers/staging/vc04_services" -I"drivers/staging/vc04_services/interface/vchi" -I"drivers/staging/vc04_services/interface/vchiq_arm" -I"$(srctree)/fs/" ++ccflags-$(CONFIG_BCM_VC_SM) += -I"drivers/staging/vc04_services" -I"drivers/staging/vc04_services/interface/vchi" -I"drivers/staging/vc04_services/interface/vchiq_arm" -I"fs" + ccflags-$(CONFIG_BCM_VC_SM) += -DOS_ASSERT_FAILURE -D__STDC_VERSION=199901L -D__STDC_VERSION__=199901L -D__VCCOREVER__=0 -D__KERNEL__ -D__linux__ + + obj-$(CONFIG_BCM_VC_SM) := vc-sm.o diff --git a/target/linux/brcm2708/patches-4.19/950-0375-vcsm-Remove-set-but-unused-variable.patch b/target/linux/brcm2708/patches-4.19/950-0375-vcsm-Remove-set-but-unused-variable.patch new file mode 100644 index 000000000..cce2facc4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0375-vcsm-Remove-set-but-unused-variable.patch @@ -0,0 +1,28 @@ +From ea8f08311188a54cafb0ad39702c173ae7c2a3e3 Mon Sep 17 00:00:00 2001 +From: Kieran Bingham +Date: Mon, 18 Mar 2019 17:16:41 +0000 +Subject: [PATCH 375/703] vcsm: Remove set but unused variable + +The 'success' variable is set by the call to vchi_service_close() but never checked. +Remove it, keeping the call in place. + +Signed-off-by: Kieran Bingham +--- + drivers/char/broadcom/vc_sm/vc_vchi_sm.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +--- a/drivers/char/broadcom/vc_sm/vc_vchi_sm.c ++++ b/drivers/char/broadcom/vc_sm/vc_vchi_sm.c +@@ -361,11 +361,9 @@ int vc_vchi_sm_stop(struct sm_instance * + + /* Close all VCHI service connections */ + for (i = 0; i < instance->num_connections; i++) { +- int32_t success; +- + vchi_service_use(instance->vchi_handle[i]); + +- success = vchi_service_close(instance->vchi_handle[i]); ++ vchi_service_close(instance->vchi_handle[i]); + } + + kfree(instance); diff --git a/target/linux/brcm2708/patches-4.19/950-0376-vcsm-Reduce-scope-of-local-functions.patch b/target/linux/brcm2708/patches-4.19/950-0376-vcsm-Reduce-scope-of-local-functions.patch new file mode 100644 index 000000000..2f4134775 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0376-vcsm-Reduce-scope-of-local-functions.patch @@ -0,0 +1,69 @@ +From 84195d1efab9720f7d378cd4e01a57eb5b864a2e Mon Sep 17 00:00:00 2001 +From: Kieran Bingham +Date: Mon, 18 Mar 2019 17:17:40 +0000 +Subject: [PATCH 376/703] vcsm: Reduce scope of local functions + +The functions: + + vc_vchi_sm_send_msg + vc_sm_ioctl_alloc + vc_sm_ioctl_alloc_share + vc_sm_ioctl_import_dmabuf + +Are declared without a prototype. They are not used outside of this +module, thus - convert them to static functions. + +Signed-off-by: Kieran Bingham +--- + drivers/char/broadcom/vc_sm/vc_vchi_sm.c | 2 +- + drivers/char/broadcom/vc_sm/vmcs_sm.c | 14 +++++++------- + 2 files changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/char/broadcom/vc_sm/vc_vchi_sm.c ++++ b/drivers/char/broadcom/vc_sm/vc_vchi_sm.c +@@ -375,7 +375,7 @@ lock: + return -EINVAL; + } + +-int vc_vchi_sm_send_msg(struct sm_instance *handle, ++static int vc_vchi_sm_send_msg(struct sm_instance *handle, + enum vc_sm_msg_type msg_id, + void *msg, uint32_t msg_size, + void *result, uint32_t result_size, +--- a/drivers/char/broadcom/vc_sm/vmcs_sm.c ++++ b/drivers/char/broadcom/vc_sm/vmcs_sm.c +@@ -1574,8 +1574,8 @@ error: + } + + /* Allocate a shared memory handle and block. */ +-int vc_sm_ioctl_alloc(struct sm_priv_data_t *private, +- struct vmcs_sm_ioctl_alloc *ioparam) ++static int vc_sm_ioctl_alloc(struct sm_priv_data_t *private, ++ struct vmcs_sm_ioctl_alloc *ioparam) + { + int ret = 0; + int status; +@@ -1685,8 +1685,8 @@ error: + } + + /* Share an allocate memory handle and block.*/ +-int vc_sm_ioctl_alloc_share(struct sm_priv_data_t *private, +- struct vmcs_sm_ioctl_alloc_share *ioparam) ++static int vc_sm_ioctl_alloc_share(struct sm_priv_data_t *private, ++ struct vmcs_sm_ioctl_alloc_share *ioparam) + { + struct sm_resource_t *resource, *shared_resource; + int ret = 0; +@@ -2200,9 +2200,9 @@ error: + } + + /* Import a contiguous block of memory to be shared with VC. */ +-int vc_sm_ioctl_import_dmabuf(struct sm_priv_data_t *private, +- struct vmcs_sm_ioctl_import_dmabuf *ioparam, +- struct dma_buf *src_dma_buf) ++static int vc_sm_ioctl_import_dmabuf(struct sm_priv_data_t *private, ++ struct vmcs_sm_ioctl_import_dmabuf *ioparam, ++ struct dma_buf *src_dma_buf) + { + int ret = 0; + int status; diff --git a/target/linux/brcm2708/patches-4.19/950-0377-staging-bcm2835-codec-NULL-component-handle-on-queue.patch b/target/linux/brcm2708/patches-4.19/950-0377-staging-bcm2835-codec-NULL-component-handle-on-queue.patch new file mode 100644 index 000000000..37d499a84 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0377-staging-bcm2835-codec-NULL-component-handle-on-queue.patch @@ -0,0 +1,59 @@ +From 521d98b25f82438027cb6b88bdbb76d552426aae Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 19 Mar 2019 17:55:09 +0000 +Subject: [PATCH 377/703] staging: bcm2835-codec: NULL component handle on + queue_setup failure + +queue_setup tries creating the relevant MMAL component and configures +the input and output ports as we're expecting to start streaming. +If the port configuration failed then it destroyed the component, +but failed to clear the component handle, therefore release tried +destroying the component again. +Adds some logging should the port config fail as well. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 15 +++++++++++++-- + 1 file changed, 13 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1776,13 +1776,21 @@ static int bcm2835_codec_create_componen + + ret = vchiq_mmal_port_set_format(dev->instance, + &ctx->component->input[0]); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_dbg(1, debug, &dev->v4l2_dev, ++ "%s: vchiq_mmal_port_set_format ip port failed\n", ++ __func__); + goto destroy_component; ++ } + + ret = vchiq_mmal_port_set_format(dev->instance, + &ctx->component->output[0]); +- if (ret < 0) ++ if (ret < 0) { ++ v4l2_dbg(1, debug, &dev->v4l2_dev, ++ "%s: vchiq_mmal_port_set_format op port failed\n", ++ __func__); + goto destroy_component; ++ } + + if (dev->role == ENCODE) { + u32 param = 1; +@@ -1812,11 +1820,14 @@ static int bcm2835_codec_create_componen + ctx->q_data[V4L2_M2M_DST].sizeimage, + ctx->component->output[0].minimum_buffer.size); + } ++ v4l2_dbg(2, debug, &dev->v4l2_dev, "%s: component created as %s\n", ++ __func__, components[dev->role]); + + return 0; + + destroy_component: + vchiq_mmal_component_finalise(ctx->dev->instance, ctx->component); ++ ctx->component = NULL; + + return ret; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0378-staging-vc-sm-cma-Remove-the-debugfs-directory-on-re.patch b/target/linux/brcm2708/patches-4.19/950-0378-staging-vc-sm-cma-Remove-the-debugfs-directory-on-re.patch new file mode 100644 index 000000000..1456a2b9a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0378-staging-vc-sm-cma-Remove-the-debugfs-directory-on-re.patch @@ -0,0 +1,24 @@ +From efa4c15a8012b80f3c1a63d7b79bfbaf013bf404 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 10:49:17 +0000 +Subject: [PATCH 378/703] staging: vc-sm-cma: Remove the debugfs directory on + remove + +Without removing that, reloading the driver fails. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -757,7 +757,7 @@ static int bcm2835_vc_sm_cma_remove(stru + pr_debug("[%s]: start\n", __func__); + if (sm_inited) { + /* Remove all proc entries. */ +- //debugfs_remove_recursive(sm_state->dir_root); ++ debugfs_remove_recursive(sm_state->dir_root); + + /* Stop the videocore shared memory service. */ + vc_sm_cma_vchi_stop(&sm_state->sm_handle); diff --git a/target/linux/brcm2708/patches-4.19/950-0379-staging-vc-sm-cma-Use-devm_-allocs-for-sm_state.patch b/target/linux/brcm2708/patches-4.19/950-0379-staging-vc-sm-cma-Use-devm_-allocs-for-sm_state.patch new file mode 100644 index 000000000..547314431 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0379-staging-vc-sm-cma-Use-devm_-allocs-for-sm_state.patch @@ -0,0 +1,69 @@ +From 95d0b2763bc5b18a8e9f7dc2db1ff101364056ef Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 11:06:41 +0000 +Subject: [PATCH 379/703] staging: vc-sm-cma: Use devm_ allocs for sm_state. + +Use managed allocations for sm_state, removing reliance on +manual management. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 12 +++++------- + 1 file changed, 5 insertions(+), 7 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -656,7 +656,7 @@ static void vc_sm_connected_init(void) + __func__, ret); + + ret = -EIO; +- goto err_free_mem; ++ goto err_failed; + } + + ret = vchi_connect(NULL, 0, vchi_instance); +@@ -665,7 +665,7 @@ static void vc_sm_connected_init(void) + __func__, ret); + + ret = -EIO; +- goto err_free_mem; ++ goto err_failed; + } + + /* Initialize an instance of the shared memory service. */ +@@ -676,7 +676,7 @@ static void vc_sm_connected_init(void) + __func__); + + ret = -EPERM; +- goto err_free_mem; ++ goto err_failed; + } + + /* Create a debug fs directory entry (root). */ +@@ -722,8 +722,7 @@ err_remove_shared_memory: + debugfs_remove_recursive(sm_state->dir_root); + err_stop_sm_service: + vc_sm_cma_vchi_stop(&sm_state->sm_handle); +-err_free_mem: +- kfree(sm_state); ++err_failed: + pr_info("[%s]: failed, ret %d\n", __func__, ret); + } + +@@ -732,7 +731,7 @@ static int bcm2835_vc_sm_cma_probe(struc + { + pr_info("%s: Videocore shared memory driver\n", __func__); + +- sm_state = kzalloc(sizeof(*sm_state), GFP_KERNEL); ++ sm_state = devm_kzalloc(&pdev->dev, sizeof(*sm_state), GFP_KERNEL); + if (!sm_state) + return -ENOMEM; + sm_state->pdev = pdev; +@@ -766,7 +765,6 @@ static int bcm2835_vc_sm_cma_remove(stru + + /* Free the memory for the state structure. */ + mutex_destroy(&sm_state->map_lock); +- kfree(sm_state); + } + + pr_debug("[%s]: end\n", __func__); diff --git a/target/linux/brcm2708/patches-4.19/950-0380-staging-vc-sm-cma-Don-t-fail-if-debugfs-calls-fail.patch b/target/linux/brcm2708/patches-4.19/950-0380-staging-vc-sm-cma-Don-t-fail-if-debugfs-calls-fail.patch new file mode 100644 index 000000000..d7016935f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0380-staging-vc-sm-cma-Don-t-fail-if-debugfs-calls-fail.patch @@ -0,0 +1,37 @@ +From 367e360d68d9dfd7f1b213a47576139ffb6028c8 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 11:09:49 +0000 +Subject: [PATCH 380/703] staging: vc-sm-cma: Don't fail if debugfs calls fail. + +Return codes from debugfs calls should never alter the +flow of the main code. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 8 -------- + 1 file changed, 8 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -681,13 +681,6 @@ static void vc_sm_connected_init(void) + + /* Create a debug fs directory entry (root). */ + sm_state->dir_root = debugfs_create_dir(VC_SM_DIR_ROOT_NAME, NULL); +- if (!sm_state->dir_root) { +- pr_err("[%s]: failed to create \'%s\' directory entry\n", +- __func__, VC_SM_DIR_ROOT_NAME); +- +- ret = -EPERM; +- goto err_stop_sm_service; +- } + + sm_state->dir_state.show = &vc_sm_cma_global_state_show; + sm_state->dir_state.dir_entry = +@@ -720,7 +713,6 @@ static void vc_sm_connected_init(void) + + err_remove_shared_memory: + debugfs_remove_recursive(sm_state->dir_root); +-err_stop_sm_service: + vc_sm_cma_vchi_stop(&sm_state->sm_handle); + err_failed: + pr_info("[%s]: failed, ret %d\n", __func__, ret); diff --git a/target/linux/brcm2708/patches-4.19/950-0381-staging-vc-sm-cma-Ensure-mutex-and-idr-are-destroyed.patch b/target/linux/brcm2708/patches-4.19/950-0381-staging-vc-sm-cma-Ensure-mutex-and-idr-are-destroyed.patch new file mode 100644 index 000000000..6c0f1d09d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0381-staging-vc-sm-cma-Ensure-mutex-and-idr-are-destroyed.patch @@ -0,0 +1,27 @@ +From 47046caff7455c46f07b7fd816cdd23ab9801842 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 11:11:46 +0000 +Subject: [PATCH 381/703] staging: vc-sm-cma: Ensure mutex and idr are + destroyed + +map_lock and kernelid_map are created in probe, but not released +in release should the vcsm service not connect (eg running the +cutdown firmware). + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -752,7 +752,9 @@ static int bcm2835_vc_sm_cma_remove(stru + + /* Stop the videocore shared memory service. */ + vc_sm_cma_vchi_stop(&sm_state->sm_handle); ++ } + ++ if (sm_state) { + idr_destroy(&sm_state->kernelid_map); + + /* Free the memory for the state structure. */ diff --git a/target/linux/brcm2708/patches-4.19/950-0382-staging-bcm2835_codec-Clean-up-logging-on-unloading-.patch b/target/linux/brcm2708/patches-4.19/950-0382-staging-bcm2835_codec-Clean-up-logging-on-unloading-.patch new file mode 100644 index 000000000..632c4f3a5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0382-staging-bcm2835_codec-Clean-up-logging-on-unloading-.patch @@ -0,0 +1,49 @@ +From 7b588426000023ff56672cb1e2811e382cb49032 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 8 Mar 2019 11:26:00 +0000 +Subject: [PATCH 382/703] staging: bcm2835_codec: Clean up logging on unloading + the driver + +The log line was missing a closing \n, so wasn't added to the +log immediately. +Adds the function of the V4L2 device that is being unregistered +too. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -77,6 +77,12 @@ enum bcm2835_codec_role { + ISP, + }; + ++const static char *roles[] = { ++ "decode", ++ "encode", ++ "isp" ++}; ++ + static const char * const components[] = { + "ril.video_decode", + "ril.video_encode", +@@ -2522,7 +2528,6 @@ static int bcm2835_codec_create(struct p + struct video_device *vfd; + int video_nr; + int ret; +- const static char *roles[] = {"decode", "encode", "isp"}; + + dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); + if (!dev) +@@ -2615,7 +2620,8 @@ static int bcm2835_codec_destroy(struct + if (!dev) + return -ENODEV; + +- v4l2_info(&dev->v4l2_dev, "Removing " MEM2MEM_NAME); ++ v4l2_info(&dev->v4l2_dev, "Removing " MEM2MEM_NAME ", %s\n", ++ roles[dev->role]); + v4l2_m2m_release(dev->m2m_dev); + video_unregister_device(&dev->vfd); + v4l2_device_unregister(&dev->v4l2_dev); diff --git a/target/linux/brcm2708/patches-4.19/950-0383-configs-Enable-MT76-USB-wifi.patch b/target/linux/brcm2708/patches-4.19/950-0383-configs-Enable-MT76-USB-wifi.patch new file mode 100644 index 000000000..a938c986f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0383-configs-Enable-MT76-USB-wifi.patch @@ -0,0 +1,45 @@ +From 942452eb02558e142288e4e9476281d5a5554cb2 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 7 Mar 2019 19:27:05 +0100 +Subject: [PATCH 383/703] configs: Enable MT76 USB wifi + +Signed-off-by: Stefan Wahren +--- + arch/arm/configs/bcm2709_defconfig | 2 ++ + arch/arm/configs/bcmrpi_defconfig | 2 ++ + arch/arm64/configs/bcmrpi3_defconfig | 2 ++ + 3 files changed, 6 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -526,6 +526,8 @@ CONFIG_LIBERTAS_THINFIRM_USB=m + CONFIG_MWIFIEX=m + CONFIG_MWIFIEX_SDIO=m + CONFIG_MT7601U=m ++CONFIG_MT76x0U=m ++CONFIG_MT76x2U=m + CONFIG_RT2X00=m + CONFIG_RT2500USB=m + CONFIG_RT73USB=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -520,6 +520,8 @@ CONFIG_LIBERTAS_THINFIRM_USB=m + CONFIG_MWIFIEX=m + CONFIG_MWIFIEX_SDIO=m + CONFIG_MT7601U=m ++CONFIG_MT76x0U=m ++CONFIG_MT76x2U=m + CONFIG_RT2X00=m + CONFIG_RT2500USB=m + CONFIG_RT73USB=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -512,6 +512,8 @@ CONFIG_LIBERTAS_THINFIRM_USB=m + CONFIG_MWIFIEX=m + CONFIG_MWIFIEX_SDIO=m + CONFIG_MT7601U=m ++CONFIG_MT76x0U=m ++CONFIG_MT76x2U=m + CONFIG_RT2X00=m + CONFIG_RT2500USB=m + CONFIG_RT73USB=m diff --git a/target/linux/brcm2708/patches-4.19/950-0384-bcm2835-sdhost-Allow-for-sg-entries-that-cross-pages.patch b/target/linux/brcm2708/patches-4.19/950-0384-bcm2835-sdhost-Allow-for-sg-entries-that-cross-pages.patch new file mode 100644 index 000000000..719cd6669 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0384-bcm2835-sdhost-Allow-for-sg-entries-that-cross-pages.patch @@ -0,0 +1,32 @@ +From 7d87e7c1dbf0be8015daec4ae7eb2a87147915d5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 13 Mar 2019 14:19:11 +0000 +Subject: [PATCH 384/703] bcm2835-sdhost: Allow for sg entries that cross pages + +The dma_complete handling code calculates a virtual address for a page +then adds an offset, but if the offset is more than a page and HIGHMEM +is in use then the summed address could be in an unmapped (or just +incorrect) page. + +The upstream SDHOST driver allows for this possibility - copy the code +that does so. + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/bcm2835-sdhost.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/mmc/host/bcm2835-sdhost.c ++++ b/drivers/mmc/host/bcm2835-sdhost.c +@@ -543,6 +543,11 @@ static void bcm2835_sdhost_dma_complete( + void *page; + u32 *buf; + ++ if (host->drain_offset & PAGE_MASK) { ++ host->drain_page += host->drain_offset >> PAGE_SHIFT; ++ host->drain_offset &= ~PAGE_MASK; ++ } ++ + page = kmap_atomic(host->drain_page); + buf = page + host->drain_offset; + diff --git a/target/linux/brcm2708/patches-4.19/950-0385-overlays-sdio-Added-4-bit-support-on-GPIOs-34-39.-29.patch b/target/linux/brcm2708/patches-4.19/950-0385-overlays-sdio-Added-4-bit-support-on-GPIOs-34-39.-29.patch new file mode 100644 index 000000000..4fe40ed0a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0385-overlays-sdio-Added-4-bit-support-on-GPIOs-34-39.-29.patch @@ -0,0 +1,47 @@ +From 693450014feff59f24614f8032e7e1b798d8694c Mon Sep 17 00:00:00 2001 +From: Adrien RICCIARDI +Date: Fri, 22 Mar 2019 11:35:30 +0100 +Subject: [PATCH 385/703] overlays: sdio: Added 4-bit support on GPIOs 34-39. + (#2903) + +--- + arch/arm/boot/dts/overlays/README | 3 +++ + arch/arm/boot/dts/overlays/sdio-overlay.dts | 9 +++++++++ + 2 files changed, 12 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1785,6 +1785,9 @@ Params: sdio_overclock SDIO Clo + gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used + with bus_width=1. + ++ gpios_34_39 Select GPIOs 34-39 for 4-bit mode. Must be used ++ with bus_width=4 (the default). ++ + + Name: sdio-1bit + Info: This overlay is now deprecated. Use +--- a/arch/arm/boot/dts/overlays/sdio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts +@@ -64,6 +64,14 @@ + }; + }; + ++ fragment@5 { ++ target = <&sdio_ovl_pins>; ++ __dormant__ { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ }; ++ + fragment@6 { + target-path = "/aliases"; + __overlay__ { +@@ -77,5 +85,6 @@ + sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0"; + gpios_22_25 = <0>,"=3"; + gpios_34_37 = <0>,"=4"; ++ gpios_34_39 = <0>,"=5"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0386-overlays-Fix-multiple-instantiation-of-sc16is7xx.patch b/target/linux/brcm2708/patches-4.19/950-0386-overlays-Fix-multiple-instantiation-of-sc16is7xx.patch new file mode 100644 index 000000000..e2fe7d590 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0386-overlays-Fix-multiple-instantiation-of-sc16is7xx.patch @@ -0,0 +1,57 @@ +From 018329c19febff752bf09820eda6465748ae9c65 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 22 Mar 2019 16:44:47 +0000 +Subject: [PATCH 386/703] overlays: Fix multiple-instantiation of sc16is7xx* + +The registration of the fixed clocks uses the node name as the clock +name, causing a clash if two clock nodes have the same name, regardless +of the path to the node. Fix the issue by overwriting the clock node +names using the value of the "addr" parameter, providing a crude +disambiguation. (A bit of string pasting to form "sc16is752_clk_" +would have been nice, but that is outside the abilities of the overlay +parameter mechanism.) + +Also give the sc16is750-i2c overlay the xtal parameter for symmetry. + +See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=235650 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 1 + + arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts | 3 ++- + arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts | 2 +- + 3 files changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1725,6 +1725,7 @@ Info: Overlay for the NXP SC16IS750 UA + Load: dtoverlay=sc16is750-i2c,= + Params: int_pin GPIO used for IRQ (default 24) + addr Address (default 0x48) ++ xtal On-board crystal frequency (default 14745600) + + + Name: sc16is752-i2c +--- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts +@@ -31,7 +31,8 @@ + + __overrides__ { + int_pin = <&sc16is750>,"interrupts:0"; +- addr = <&sc16is750>,"reg:0"; ++ addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name"; ++ xtal = <&sc16is750>,"clock-frequency:0"; + }; + + }; +--- a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts +@@ -34,7 +34,7 @@ + + __overrides__ { + int_pin = <&sc16is752>,"interrupts:0"; +- addr = <&sc16is752>,"reg:0"; ++ addr = <&sc16is752>,"reg:0",<&sc16is752_clk>,"name"; + xtal = <&sc16is752>,"clock-frequency:0"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0387-configs-Re-enable-CONFIG_NETFILTER_XT_MATCH_SOCKET.patch b/target/linux/brcm2708/patches-4.19/950-0387-configs-Re-enable-CONFIG_NETFILTER_XT_MATCH_SOCKET.patch new file mode 100644 index 000000000..da1295c52 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0387-configs-Re-enable-CONFIG_NETFILTER_XT_MATCH_SOCKET.patch @@ -0,0 +1,47 @@ +From 59f78628ccd725312dd1ff24d1b0952fa8203ee2 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Sun, 24 Mar 2019 20:54:25 +0000 +Subject: [PATCH 387/703] configs: Re-enable CONFIG_NETFILTER_XT_MATCH_SOCKET + +A Kconfig change in 4.10 caused the xt_socket module to no-longer be +included in Raspbian builds. Fix the defconfigs to re-enable it. + +See: https://github.com/raspberrypi/linux/issues/2905 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -186,6 +186,7 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m + CONFIG_NETFILTER_XT_MATCH_RATEEST=m + CONFIG_NETFILTER_XT_MATCH_REALM=m + CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m + CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -180,6 +180,7 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m + CONFIG_NETFILTER_XT_MATCH_RATEEST=m + CONFIG_NETFILTER_XT_MATCH_REALM=m + CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m + CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -181,6 +181,7 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m + CONFIG_NETFILTER_XT_MATCH_RATEEST=m + CONFIG_NETFILTER_XT_MATCH_REALM=m + CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m + CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m diff --git a/target/linux/brcm2708/patches-4.19/950-0388-bcm2835-mmc-Fix-DMA-channel-leak.patch b/target/linux/brcm2708/patches-4.19/950-0388-bcm2835-mmc-Fix-DMA-channel-leak.patch new file mode 100644 index 000000000..b61b81418 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0388-bcm2835-mmc-Fix-DMA-channel-leak.patch @@ -0,0 +1,42 @@ +From 94a6414f6aaef2575eeb36149d65c79c13b85922 Mon Sep 17 00:00:00 2001 +From: Lukas Wunner +Date: Wed, 16 Jan 2019 12:22:32 +0100 +Subject: [PATCH 388/703] bcm2835-mmc: Fix DMA channel leak + +The BCM2835 MMC host driver requests a DMA channel on probe but neglects +to release the channel in the probe error path and on driver unbind. + +I'm seeing this happen on every boot of the Compute Module 3: On first +driver probe, DMA channel 2 is allocated and then leaked with a "could +not get clk, deferring probe" message. On second driver probe, channel 4 +is allocated. + +Fix it. + +Signed-off-by: Lukas Wunner +Cc: Frank Pavlic +--- + drivers/mmc/host/bcm2835-mmc.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/mmc/host/bcm2835-mmc.c ++++ b/drivers/mmc/host/bcm2835-mmc.c +@@ -1503,6 +1503,8 @@ static int bcm2835_mmc_probe(struct plat + + return 0; + err: ++ if (host->dma_chan_rxtx) ++ dma_release_channel(host->dma_chan_rxtx); + mmc_free_host(mmc); + + return ret; +@@ -1548,6 +1550,9 @@ static int bcm2835_mmc_remove(struct pla + + tasklet_kill(&host->finish_tasklet); + ++ if (host->dma_chan_rxtx) ++ dma_release_channel(host->dma_chan_rxtx); ++ + mmc_free_host(host->mmc); + platform_set_drvdata(pdev, NULL); + diff --git a/target/linux/brcm2708/patches-4.19/950-0389-bcm2835-mmc-Fix-struct-mmc_host-leak-on-probe.patch b/target/linux/brcm2708/patches-4.19/950-0389-bcm2835-mmc-Fix-struct-mmc_host-leak-on-probe.patch new file mode 100644 index 000000000..6265a6ba7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0389-bcm2835-mmc-Fix-struct-mmc_host-leak-on-probe.patch @@ -0,0 +1,29 @@ +From eaea13d958263b1fae8a96ffe184f91b0ca526cd Mon Sep 17 00:00:00 2001 +From: Lukas Wunner +Date: Sat, 19 Jan 2019 08:06:48 +0100 +Subject: [PATCH 389/703] bcm2835-mmc: Fix struct mmc_host leak on probe + +The BCM2835 MMC host driver requests the bus address of the host's +register map on probe. If that fails, the driver leaks the struct +mmc_host allocated earlier. + +Fix it. + +Signed-off-by: Lukas Wunner +Cc: Frank Pavlic +--- + drivers/mmc/host/bcm2835-mmc.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/bcm2835-mmc.c ++++ b/drivers/mmc/host/bcm2835-mmc.c +@@ -1439,7 +1439,8 @@ static int bcm2835_mmc_probe(struct plat + addr = of_get_address(node, 0, NULL, NULL); + if (!addr) { + dev_err(dev, "could not get DMA-register address\n"); +- return -ENODEV; ++ ret = -ENODEV; ++ goto err; + } + host->bus_addr = be32_to_cpup(addr); + pr_debug(" - ioaddr %lx, iomem->start %lx, bus_addr %lx\n", diff --git a/target/linux/brcm2708/patches-4.19/950-0390-bcm2835-mmc-Fix-duplicate-free_irq-on-remove.patch b/target/linux/brcm2708/patches-4.19/950-0390-bcm2835-mmc-Fix-duplicate-free_irq-on-remove.patch new file mode 100644 index 000000000..24e3d178a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0390-bcm2835-mmc-Fix-duplicate-free_irq-on-remove.patch @@ -0,0 +1,38 @@ +From d2ba7664d279bf06ad8ffc281cbefe29ddc180e7 Mon Sep 17 00:00:00 2001 +From: Lukas Wunner +Date: Sat, 19 Jan 2019 09:00:26 +0100 +Subject: [PATCH 390/703] bcm2835-mmc: Fix duplicate free_irq() on remove + +The BCM2835 MMC host driver requests its interrupt as a device-managed +resource, so the interrupt is automatically freed after the driver is +unbound. + +However on driver unbind, bcm2835_mmc_remove() frees the interrupt +explicitly to avoid invocation of the interrupt handler after driver +structures have been torn down. + +The interrupt is thus freed twice, leading to a WARN splat in +__free_irq(). Fix by not requesting the interrupt as a device-managed +resource. + +Signed-off-by: Lukas Wunner +Cc: Frank Pavlic +--- + drivers/mmc/host/bcm2835-mmc.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/mmc/host/bcm2835-mmc.c ++++ b/drivers/mmc/host/bcm2835-mmc.c +@@ -1389,9 +1389,9 @@ static int bcm2835_mmc_add_host(struct b + init_waitqueue_head(&host->buf_ready_int); + + bcm2835_mmc_init(host, 0); +- ret = devm_request_threaded_irq(dev, host->irq, bcm2835_mmc_irq, +- bcm2835_mmc_thread_irq, IRQF_SHARED, +- mmc_hostname(mmc), host); ++ ret = request_threaded_irq(host->irq, bcm2835_mmc_irq, ++ bcm2835_mmc_thread_irq, IRQF_SHARED, ++ mmc_hostname(mmc), host); + if (ret) { + dev_err(dev, "Failed to request IRQ %d: %d\n", host->irq, ret); + goto untasklet; diff --git a/target/linux/brcm2708/patches-4.19/950-0391-bcm2835-mmc-Handle-mmc_add_host-errors.patch b/target/linux/brcm2708/patches-4.19/950-0391-bcm2835-mmc-Handle-mmc_add_host-errors.patch new file mode 100644 index 000000000..10db02ede --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0391-bcm2835-mmc-Handle-mmc_add_host-errors.patch @@ -0,0 +1,35 @@ +From 3c29f09811abafef65e431bc70a66ef78625c08a Mon Sep 17 00:00:00 2001 +From: Lukas Wunner +Date: Tue, 22 Jan 2019 12:29:45 +0100 +Subject: [PATCH 391/703] bcm2835-mmc: Handle mmc_add_host() errors + +The BCM2835 MMC host driver calls mmc_add_host() but doesn't check its +return value. Errors occurring in that function are therefore not +handled. Fix it. + +Signed-off-by: Lukas Wunner +Cc: Frank Pavlic +--- + drivers/mmc/host/bcm2835-mmc.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/bcm2835-mmc.c ++++ b/drivers/mmc/host/bcm2835-mmc.c +@@ -1398,10 +1398,16 @@ static int bcm2835_mmc_add_host(struct b + } + + mmiowb(); +- mmc_add_host(mmc); ++ ret = mmc_add_host(mmc); ++ if (ret) { ++ dev_err(dev, "could not add MMC host\n"); ++ goto free_irq; ++ } + + return 0; + ++free_irq: ++ free_irq(host->irq, host); + untasklet: + tasklet_kill(&host->finish_tasklet); + diff --git a/target/linux/brcm2708/patches-4.19/950-0392-bcm2835-mmc-Deduplicate-reset-of-driver-data-on-remo.patch b/target/linux/brcm2708/patches-4.19/950-0392-bcm2835-mmc-Deduplicate-reset-of-driver-data-on-remo.patch new file mode 100644 index 000000000..2e897aedc --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0392-bcm2835-mmc-Deduplicate-reset-of-driver-data-on-remo.patch @@ -0,0 +1,26 @@ +From 706fb772745fae3b0ea6a36830cc92eaf1c22606 Mon Sep 17 00:00:00 2001 +From: Lukas Wunner +Date: Sat, 19 Jan 2019 08:42:40 +0100 +Subject: [PATCH 392/703] bcm2835-mmc: Deduplicate reset of driver data on + remove + +The BCM2835 MMC host driver sets the device's driver data pointer to +NULL on ->remove() even though the driver core subsequently does the +same in __device_release_driver(). Drop the duplicate assignment. + +Signed-off-by: Lukas Wunner +Cc: Frank Pavlic +--- + drivers/mmc/host/bcm2835-mmc.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/mmc/host/bcm2835-mmc.c ++++ b/drivers/mmc/host/bcm2835-mmc.c +@@ -1561,7 +1561,6 @@ static int bcm2835_mmc_remove(struct pla + dma_release_channel(host->dma_chan_rxtx); + + mmc_free_host(host->mmc); +- platform_set_drvdata(pdev, NULL); + + return 0; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0393-configs-Add-CONFIG_BATTERY_MAX17040.patch b/target/linux/brcm2708/patches-4.19/950-0393-configs-Add-CONFIG_BATTERY_MAX17040.patch new file mode 100644 index 000000000..5087075ab --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0393-configs-Add-CONFIG_BATTERY_MAX17040.patch @@ -0,0 +1,44 @@ +From 034896f9b6faf8107788575990c2cec2a6ef964e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 25 Mar 2019 17:54:05 +0000 +Subject: [PATCH 393/703] configs: Add CONFIG_BATTERY_MAX17040 + +See: https://github.com/raspberrypi/linux/issues/2906 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -659,6 +659,7 @@ CONFIG_W1_SLAVE_DS28E04=m + CONFIG_POWER_RESET=y + CONFIG_POWER_RESET_GPIO=y + CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_MAX17040=m + CONFIG_BATTERY_GAUGE_LTC2941=m + CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -652,6 +652,7 @@ CONFIG_W1_SLAVE_DS28E04=m + CONFIG_POWER_RESET=y + CONFIG_POWER_RESET_GPIO=y + CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_MAX17040=m + CONFIG_BATTERY_GAUGE_LTC2941=m + CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -629,6 +629,7 @@ CONFIG_W1_SLAVE_DS2781=m + CONFIG_W1_SLAVE_DS28E04=m + CONFIG_POWER_RESET_GPIO=y + CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_MAX17040=m + CONFIG_HWMON=m + CONFIG_SENSORS_LM75=m + CONFIG_SENSORS_SHT21=m diff --git a/target/linux/brcm2708/patches-4.19/950-0394-overlays-Add-max17040-support-to-i2c-sensor.patch b/target/linux/brcm2708/patches-4.19/950-0394-overlays-Add-max17040-support-to-i2c-sensor.patch new file mode 100644 index 000000000..1372d7d7a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0394-overlays-Add-max17040-support-to-i2c-sensor.patch @@ -0,0 +1,56 @@ +From 1ec52e16794513c5802ad219d317ac1f825b6346 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 25 Mar 2019 18:03:48 +0000 +Subject: [PATCH 394/703] overlays: Add max17040 support to i2c-sensor + +See: https://github.com/raspberrypi/linux/issues/2906 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 3 +++ + .../arm/boot/dts/overlays/i2c-sensor-overlay.dts | 16 ++++++++++++++++ + 2 files changed, 19 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1030,6 +1030,9 @@ Params: addr Set the + + lm75addr Deprecated - use addr parameter instead + ++ max17040 Select the Maxim Integrated MAX17040 battery ++ monitor ++ + sht3x Select the Sensiron SHT3x temperature and + humidity sensor. Valid addresses 0x44-0x45, + default 0x44 +--- a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts +@@ -201,6 +201,21 @@ + }; + }; + ++ fragment@13 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ max17040: max17040@36 { ++ compatible = "maxim,max17040"; ++ reg = <0x36>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ + __overrides__ { + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0", + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0", +@@ -219,5 +234,6 @@ + veml6070 = <0>,"+10"; + sht3x = <0>,"+11"; + ds1621 = <0>,"+12"; ++ max17040 = <0>,"+13"; + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0395-defconfigs-disable-memory-and-IO-cgroups-2908.patch b/target/linux/brcm2708/patches-4.19/950-0395-defconfigs-disable-memory-and-IO-cgroups-2908.patch new file mode 100644 index 000000000..1b06ed374 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0395-defconfigs-disable-memory-and-IO-cgroups-2908.patch @@ -0,0 +1,81 @@ +From 77816ef138e56144d51a5948d5a9646a4e1f2aa8 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Tue, 26 Mar 2019 09:48:25 +0000 +Subject: [PATCH 395/703] defconfigs: disable memory and IO cgroups (#2908) + +Due to an upstream bug, memory is leaked in the inode cache when cgroups +are enabled. Disable as this is causing crashes. + +See: https://github.com/raspberrypi/linux/issues/2829 +--- + arch/arm/configs/bcm2709_defconfig | 4 ---- + arch/arm/configs/bcmrpi_defconfig | 4 ---- + arch/arm64/configs/bcmrpi3_defconfig | 4 ---- + 3 files changed, 12 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -14,8 +14,6 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y +-CONFIG_MEMCG=y +-CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y +@@ -64,10 +62,8 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y +-CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y +-CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=m + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -13,8 +13,6 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y +-CONFIG_MEMCG=y +-CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y +@@ -58,10 +56,8 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y +-CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y +-CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=m + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -13,8 +13,6 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y +-CONFIG_MEMCG=y +-CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y +@@ -62,10 +60,8 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y +-CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y +-CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=y + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y diff --git a/target/linux/brcm2708/patches-4.19/950-0396-media-bcm2835-unicam-Add-support-for-enum-framesizes.patch b/target/linux/brcm2708/patches-4.19/950-0396-media-bcm2835-unicam-Add-support-for-enum-framesizes.patch new file mode 100644 index 000000000..edff74cec --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0396-media-bcm2835-unicam-Add-support-for-enum-framesizes.patch @@ -0,0 +1,133 @@ +From 99e2a119c5dc323c698f8b7f699c20599c05e23e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 5 Mar 2019 15:43:27 +0000 +Subject: [PATCH 396/703] media: bcm2835-unicam: Add support for enum + framesizes and frameintervals + +vidioc_enum_framesizes and vidioc_enum_frameintervals weren't implemented, +therefore clients couldn't enumerate the supported resolutions. + +Implement them by forwarding on to the sensor driver. + +Signed-off-by: Dave Stevenson +--- + .../media/platform/bcm2835/bcm2835-unicam.c | 94 +++++++++++++++++++ + 1 file changed, 94 insertions(+) + +--- a/drivers/media/platform/bcm2835/bcm2835-unicam.c ++++ b/drivers/media/platform/bcm2835/bcm2835-unicam.c +@@ -1406,6 +1406,84 @@ static int unicam_g_edid(struct file *fi + return v4l2_subdev_call(dev->sensor, pad, get_edid, edid); + } + ++static int unicam_enum_framesizes(struct file *file, void *priv, ++ struct v4l2_frmsizeenum *fsize) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ const struct unicam_fmt *fmt; ++ struct v4l2_subdev_frame_size_enum fse; ++ int ret; ++ ++ /* check for valid format */ ++ fmt = find_format_by_pix(dev, fsize->pixel_format); ++ if (!fmt) { ++ unicam_dbg(3, dev, "Invalid pixel code: %x\n", ++ fsize->pixel_format); ++ return -EINVAL; ++ } ++ ++ fse.index = fsize->index; ++ fse.pad = 0; ++ fse.code = fmt->code; ++ ++ ret = v4l2_subdev_call(dev->sensor, pad, enum_frame_size, NULL, &fse); ++ if (ret) ++ return ret; ++ ++ unicam_dbg(1, dev, "%s: index: %d code: %x W:[%d,%d] H:[%d,%d]\n", ++ __func__, fse.index, fse.code, fse.min_width, fse.max_width, ++ fse.min_height, fse.max_height); ++ ++ fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; ++ fsize->discrete.width = fse.max_width; ++ fsize->discrete.height = fse.max_height; ++ ++ return 0; ++} ++ ++static int unicam_enum_frameintervals(struct file *file, void *priv, ++ struct v4l2_frmivalenum *fival) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ const struct unicam_fmt *fmt; ++ struct v4l2_subdev_frame_interval_enum fie = { ++ .index = fival->index, ++ .width = fival->width, ++ .height = fival->height, ++ .which = V4L2_SUBDEV_FORMAT_ACTIVE, ++ }; ++ int ret; ++ ++ fmt = find_format_by_pix(dev, fival->pixel_format); ++ if (!fmt) ++ return -EINVAL; ++ ++ fie.code = fmt->code; ++ ret = v4l2_subdev_call(dev->sensor, pad, enum_frame_interval, ++ NULL, &fie); ++ if (ret) ++ return ret; ++ ++ fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; ++ fival->discrete = fie.interval; ++ ++ return 0; ++} ++ ++static int unicam_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_g_parm_cap(video_devdata(file), dev->sensor, a); ++} ++ ++static int unicam_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a) ++{ ++ struct unicam_device *dev = video_drvdata(file); ++ ++ return v4l2_s_parm_cap(video_devdata(file), dev->sensor, a); ++} ++ + static int unicam_g_dv_timings(struct file *file, void *priv, + struct v4l2_dv_timings *timings) + { +@@ -1613,6 +1691,12 @@ static const struct v4l2_ioctl_ops unica + .vidioc_g_edid = unicam_g_edid, + .vidioc_s_edid = unicam_s_edid, + ++ .vidioc_enum_framesizes = unicam_enum_framesizes, ++ .vidioc_enum_frameintervals = unicam_enum_frameintervals, ++ ++ .vidioc_g_parm = unicam_g_parm, ++ .vidioc_s_parm = unicam_s_parm, ++ + .vidioc_s_dv_timings = unicam_s_dv_timings, + .vidioc_g_dv_timings = unicam_g_dv_timings, + .vidioc_query_dv_timings = unicam_query_dv_timings, +@@ -1850,6 +1934,16 @@ static int unicam_probe_complete(struct + v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_ENUM_DV_TIMINGS); + v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_QUERY_DV_TIMINGS); + } ++ if (!v4l2_subdev_has_op(unicam->sensor, pad, enum_frame_interval)) ++ v4l2_disable_ioctl(&unicam->video_dev, ++ VIDIOC_ENUM_FRAMEINTERVALS); ++ if (!v4l2_subdev_has_op(unicam->sensor, video, g_frame_interval)) ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_G_PARM); ++ if (!v4l2_subdev_has_op(unicam->sensor, video, s_frame_interval)) ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_S_PARM); ++ ++ if (!v4l2_subdev_has_op(unicam->sensor, pad, enum_frame_size)) ++ v4l2_disable_ioctl(&unicam->video_dev, VIDIOC_ENUM_FRAMESIZES); + + ret = v4l2_device_register_subdev_nodes(&unicam->v4l2_dev); + if (ret) { diff --git a/target/linux/brcm2708/patches-4.19/950-0397-staging-bcm2835-codec-Refactor-default-resolution-co.patch b/target/linux/brcm2708/patches-4.19/950-0397-staging-bcm2835-codec-Refactor-default-resolution-co.patch new file mode 100644 index 000000000..2340d7182 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0397-staging-bcm2835-codec-Refactor-default-resolution-co.patch @@ -0,0 +1,154 @@ +From a0019271c4c0b0a156770fdb53267010627f03b1 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 20 Mar 2019 10:06:51 +0000 +Subject: [PATCH 397/703] staging: bcm2835-codec: Refactor default resolution + code + +The default resolution code was different for each role +as compressed formats need to pass bytesperline as 0 and +set up customised buffer sizes. +This is common setup, therefore amend get_sizeimage and +get_bytesperline to do the correct thing whether compressed +or uncompressed. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 103 +++++++----------- + 1 file changed, 40 insertions(+), 63 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -578,10 +578,17 @@ static void job_abort(void *priv) + ctx->aborting = 1; + } + +-static inline unsigned int get_sizeimage(int bpl, int height, ++static inline unsigned int get_sizeimage(int bpl, int width, int height, + struct bcm2835_codec_fmt *fmt) + { +- return (bpl * height * fmt->size_multiplier_x2) >> 1; ++ if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) { ++ if (width * height > 1280 * 720) ++ return DEF_COMP_BUF_SIZE_GREATER_720P; ++ else ++ return DEF_COMP_BUF_SIZE_720P_OR_LESS; ++ } else { ++ return (bpl * height * fmt->size_multiplier_x2) >> 1; ++ } + } + + static inline unsigned int get_bytesperline(int width, +@@ -1032,22 +1039,13 @@ static int vidioc_try_fmt(struct v4l2_fo + * some of the pixels are active. + */ + f->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); +- +- f->fmt.pix.bytesperline = get_bytesperline(f->fmt.pix.width, +- fmt); +- f->fmt.pix.sizeimage = get_sizeimage(f->fmt.pix.bytesperline, +- f->fmt.pix.height, +- fmt); +- } else { +- u32 min_size = f->fmt.pix.width > 1280 || +- f->fmt.pix.height > 720 ? +- DEF_COMP_BUF_SIZE_GREATER_720P : +- DEF_COMP_BUF_SIZE_720P_OR_LESS; +- +- f->fmt.pix.bytesperline = 0; +- if (f->fmt.pix.sizeimage < min_size) +- f->fmt.pix.sizeimage = min_size; + } ++ f->fmt.pix.bytesperline = get_bytesperline(f->fmt.pix.width, ++ fmt); ++ f->fmt.pix.sizeimage = get_sizeimage(f->fmt.pix.bytesperline, ++ f->fmt.pix.width, ++ f->fmt.pix.height, ++ fmt); + + f->fmt.pix.field = V4L2_FIELD_NONE; + +@@ -1159,6 +1157,7 @@ static int vidioc_s_fmt(struct bcm2835_c + q_data_dst->bytesperline = + get_bytesperline(f->fmt.pix.width, q_data_dst->fmt); + q_data_dst->sizeimage = get_sizeimage(q_data_dst->bytesperline, ++ q_data_dst->crop_width, + q_data_dst->height, + q_data_dst->fmt); + update_capture_port = true; +@@ -2218,52 +2217,30 @@ static int bcm2835_codec_open(struct fil + + ctx->q_data[V4L2_M2M_SRC].fmt = get_default_format(dev, false); + ctx->q_data[V4L2_M2M_DST].fmt = get_default_format(dev, true); +- switch (dev->role) { +- case DECODE: +- /* +- * Input width and height are irrelevant as they will be defined +- * by the bitstream not the format. Required by V4L2 though. +- */ +- ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; +- ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_SRC].bytesperline = 0; +- ctx->q_data[V4L2_M2M_SRC].sizeimage = +- DEF_COMP_BUF_SIZE_720P_OR_LESS; +- +- ctx->q_data[V4L2_M2M_DST].crop_width = DEFAULT_WIDTH; +- ctx->q_data[V4L2_M2M_DST].crop_height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_DST].bytesperline = +- get_bytesperline(DEFAULT_WIDTH, +- ctx->q_data[V4L2_M2M_DST].fmt); +- ctx->q_data[V4L2_M2M_DST].sizeimage = +- get_sizeimage(ctx->q_data[V4L2_M2M_DST].bytesperline, +- ctx->q_data[V4L2_M2M_DST].height, +- ctx->q_data[V4L2_M2M_DST].fmt); +- break; +- case ENCODE: +- ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; +- ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_SRC].bytesperline = +- get_bytesperline(DEFAULT_WIDTH, +- ctx->q_data[V4L2_M2M_SRC].fmt); +- ctx->q_data[V4L2_M2M_SRC].sizeimage = +- get_sizeimage(ctx->q_data[V4L2_M2M_SRC].bytesperline, +- ctx->q_data[V4L2_M2M_SRC].height, +- ctx->q_data[V4L2_M2M_SRC].fmt); +- +- ctx->q_data[V4L2_M2M_DST].crop_width = DEFAULT_WIDTH; +- ctx->q_data[V4L2_M2M_DST].crop_height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_DST].bytesperline = 0; +- ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; +- ctx->q_data[V4L2_M2M_DST].sizeimage = +- DEF_COMP_BUF_SIZE_720P_OR_LESS; +- break; +- case ISP: +- break; +- } ++ ++ ctx->q_data[V4L2_M2M_SRC].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_SRC].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_SRC].bytesperline = ++ get_bytesperline(DEFAULT_WIDTH, ++ ctx->q_data[V4L2_M2M_SRC].fmt); ++ ctx->q_data[V4L2_M2M_SRC].sizeimage = ++ get_sizeimage(ctx->q_data[V4L2_M2M_SRC].bytesperline, ++ ctx->q_data[V4L2_M2M_SRC].crop_width, ++ ctx->q_data[V4L2_M2M_SRC].height, ++ ctx->q_data[V4L2_M2M_SRC].fmt); ++ ++ ctx->q_data[V4L2_M2M_DST].crop_width = DEFAULT_WIDTH; ++ ctx->q_data[V4L2_M2M_DST].crop_height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].height = DEFAULT_HEIGHT; ++ ctx->q_data[V4L2_M2M_DST].bytesperline = ++ get_bytesperline(DEFAULT_WIDTH, ++ ctx->q_data[V4L2_M2M_DST].fmt); ++ ctx->q_data[V4L2_M2M_DST].sizeimage = ++ get_sizeimage(ctx->q_data[V4L2_M2M_DST].bytesperline, ++ ctx->q_data[V4L2_M2M_DST].crop_width, ++ ctx->q_data[V4L2_M2M_DST].height, ++ ctx->q_data[V4L2_M2M_DST].fmt); + + ctx->colorspace = V4L2_COLORSPACE_REC709; + ctx->bitrate = 10 * 1000 * 1000; diff --git a/target/linux/brcm2708/patches-4.19/950-0398-nvmem-add-type-attribute.patch b/target/linux/brcm2708/patches-4.19/950-0398-nvmem-add-type-attribute.patch new file mode 100644 index 000000000..de3b5ede2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0398-nvmem-add-type-attribute.patch @@ -0,0 +1,131 @@ +From 8d82ada47578fd867da43108fadcd77e3f57f056 Mon Sep 17 00:00:00 2001 +From: Alexandre Belloni +Date: Fri, 30 Nov 2018 11:53:20 +0000 +Subject: [PATCH 398/703] nvmem: add type attribute + +commit 16688453661b6d5159be558a1f8c1f54463a420f upstream. + +Add a type attribute so userspace is able to know how the data is stored as +this can help taking the correct decision when selecting which device to +use. This will also help program display the proper warnings when burning +fuses for example. + +Signed-off-by: Alexandre Belloni +Signed-off-by: Srinivas Kandagatla +Signed-off-by: Greg Kroah-Hartman +--- + drivers/nvmem/core.c | 21 +++++++++++++++++++++ + include/linux/nvmem-provider.h | 16 ++++++++++++++++ + 2 files changed, 37 insertions(+) + +--- a/drivers/nvmem/core.c ++++ b/drivers/nvmem/core.c +@@ -36,6 +36,7 @@ struct nvmem_device { + size_t size; + bool read_only; + int flags; ++ enum nvmem_type type; + struct bin_attribute eeprom; + struct device *base_dev; + nvmem_reg_read_t reg_read; +@@ -84,6 +85,21 @@ static int nvmem_reg_write(struct nvmem_ + return -EINVAL; + } + ++static ssize_t type_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct nvmem_device *nvmem = to_nvmem_device(dev); ++ ++ return sprintf(buf, "%s\n", nvmem_type_str[nvmem->type]); ++} ++ ++static DEVICE_ATTR_RO(type); ++ ++static struct attribute *nvmem_attrs[] = { ++ &dev_attr_type.attr, ++ NULL, ++}; ++ + static ssize_t bin_attr_nvmem_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, + char *buf, loff_t pos, size_t count) +@@ -169,6 +185,7 @@ static struct bin_attribute *nvmem_bin_r + + static const struct attribute_group nvmem_bin_rw_group = { + .bin_attrs = nvmem_bin_rw_attributes, ++ .attrs = nvmem_attrs, + }; + + static const struct attribute_group *nvmem_rw_dev_groups[] = { +@@ -192,6 +209,7 @@ static struct bin_attribute *nvmem_bin_r + + static const struct attribute_group nvmem_bin_ro_group = { + .bin_attrs = nvmem_bin_ro_attributes, ++ .attrs = nvmem_attrs, + }; + + static const struct attribute_group *nvmem_ro_dev_groups[] = { +@@ -216,6 +234,7 @@ static struct bin_attribute *nvmem_bin_r + + static const struct attribute_group nvmem_bin_rw_root_group = { + .bin_attrs = nvmem_bin_rw_root_attributes, ++ .attrs = nvmem_attrs, + }; + + static const struct attribute_group *nvmem_rw_root_dev_groups[] = { +@@ -239,6 +258,7 @@ static struct bin_attribute *nvmem_bin_r + + static const struct attribute_group nvmem_bin_ro_root_group = { + .bin_attrs = nvmem_bin_ro_root_attributes, ++ .attrs = nvmem_attrs, + }; + + static const struct attribute_group *nvmem_ro_root_dev_groups[] = { +@@ -478,6 +498,7 @@ struct nvmem_device *nvmem_register(cons + nvmem->dev.bus = &nvmem_bus_type; + nvmem->dev.parent = config->dev; + nvmem->priv = config->priv; ++ nvmem->type = config->type; + nvmem->reg_read = config->reg_read; + nvmem->reg_write = config->reg_write; + nvmem->dev.of_node = config->dev->of_node; +--- a/include/linux/nvmem-provider.h ++++ b/include/linux/nvmem-provider.h +@@ -22,6 +22,20 @@ typedef int (*nvmem_reg_read_t)(void *pr + typedef int (*nvmem_reg_write_t)(void *priv, unsigned int offset, + void *val, size_t bytes); + ++enum nvmem_type { ++ NVMEM_TYPE_UNKNOWN = 0, ++ NVMEM_TYPE_EEPROM, ++ NVMEM_TYPE_OTP, ++ NVMEM_TYPE_BATTERY_BACKED, ++}; ++ ++static const char * const nvmem_type_str[] = { ++ [NVMEM_TYPE_UNKNOWN] = "Unknown", ++ [NVMEM_TYPE_EEPROM] = "EEPROM", ++ [NVMEM_TYPE_OTP] = "OTP", ++ [NVMEM_TYPE_BATTERY_BACKED] = "Battery backed", ++}; ++ + /** + * struct nvmem_config - NVMEM device configuration + * +@@ -31,6 +45,7 @@ typedef int (*nvmem_reg_write_t)(void *p + * @owner: Pointer to exporter module. Used for refcounting. + * @cells: Optional array of pre-defined NVMEM cells. + * @ncells: Number of elements in cells. ++ * @type: Type of the nvmem storage + * @read_only: Device is read-only. + * @root_only: Device is accessibly to root only. + * @reg_read: Callback to read data. +@@ -54,6 +69,7 @@ struct nvmem_config { + struct module *owner; + const struct nvmem_cell_info *cells; + int ncells; ++ enum nvmem_type type; + bool read_only; + bool root_only; + nvmem_reg_read_t reg_read; diff --git a/target/linux/brcm2708/patches-4.19/950-0399-rtc-rv3028-add-new-driver.patch b/target/linux/brcm2708/patches-4.19/950-0399-rtc-rv3028-add-new-driver.patch new file mode 100644 index 000000000..b4e3a3154 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0399-rtc-rv3028-add-new-driver.patch @@ -0,0 +1,860 @@ +From f2e44f13f6524a60c5d3c1395ba3e323f72eff6d Mon Sep 17 00:00:00 2001 +From: Alexandre Belloni +Date: Wed, 13 Feb 2019 00:21:36 +0100 +Subject: [PATCH 399/703] rtc: rv3028: add new driver + +upstream commit e6e7376cfd7b3f9b63de3a22792f64d9bfb2ab53. + +Add a driver for the MicroCrystal RV-3028. It is a SMT Real-Time Clock +Module that incorporates an integrated CMOS circuit together with an XTAL. +It has an i2c interface. + +The driver handles date/time, alarms, trickle charging, timestamping, +frequency offset correction, EEPROM and NVRAM. + +Signed-off-by: Alexandre Belloni +--- + Documentation/devicetree/bindings/rtc/rtc.txt | 69 ++ + drivers/rtc/Kconfig | 9 + + drivers/rtc/Makefile | 1 + + drivers/rtc/rtc-rv3028.c | 733 ++++++++++++++++++ + 4 files changed, 812 insertions(+) + create mode 100644 Documentation/devicetree/bindings/rtc/rtc.txt + create mode 100644 drivers/rtc/rtc-rv3028.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/rtc/rtc.txt +@@ -0,0 +1,69 @@ ++Generic device tree bindings for Real Time Clock devices ++======================================================== ++ ++This document describes generic bindings which can be used to describe Real Time ++Clock devices in a device tree. ++ ++Required properties ++------------------- ++ ++- compatible : name of RTC device following generic names recommended practice. ++ ++For other required properties e.g. to describe register sets, ++clocks, etc. check the binding documentation of the specific driver. ++ ++Optional properties ++------------------- ++ ++- start-year : if provided, the default hardware range supported by the RTC is ++ shifted so the first usable year is the specified one. ++ ++The following properties may not be supported by all drivers. However, if a ++driver wants to support one of the below features, it should adapt the bindings ++below. ++- trickle-resistor-ohms : Selected resistor for trickle charger. Should be given ++ if trickle charger should be enabled ++- trickle-diode-disable : Do not use internal trickle charger diode Should be ++ given if internal trickle charger diode should be ++ disabled ++- wakeup-source : Enables wake up of host system on alarm ++- quartz-load-femtofarads : The capacitive load of the quartz(x-tal), ++ expressed in femto Farad (fF). ++ The default value shall be listed (if optional), ++ and likewise all valid values. ++ ++Trivial RTCs ++------------ ++ ++This is a list of trivial RTC devices that have simple device tree ++bindings, consisting only of a compatible field, an address and ++possibly an interrupt line. ++ ++ ++Compatible Vendor / Chip ++========== ============= ++abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface ++dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output ++dallas,ds1672 Dallas DS1672 Real-time Clock ++dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM ++epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE ++epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE ++emmicro,em3027 EM Microelectronic EM3027 Real-time Clock ++isil,isl1208 Intersil ISL1208 Low Power RTC with Battery Backed SRAM ++isil,isl1218 Intersil ISL1218 Low Power RTC with Battery Backed SRAM ++isil,isl12022 Intersil ISL12022 Real-time Clock ++microcrystal,rv3028 Real Time Clock Module with I2C-Bus ++microcrystal,rv3029 Real Time Clock Module with I2C-Bus ++microcrystal,rv8523 Real Time Clock ++nxp,pcf2127 Real-time clock ++nxp,pcf2129 Real-time clock ++nxp,pcf8563 Real-time clock/calendar ++pericom,pt7c4338 Real-time Clock Module ++ricoh,r2025sd I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++ricoh,r2221tl I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++ricoh,rs5c372b I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++ricoh,rv5c386 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++ricoh,rv5c387a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC ++sii,s35390a 2-wire CMOS real-time clock ++whwave,sd3078 I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC +--- a/drivers/rtc/Kconfig ++++ b/drivers/rtc/Kconfig +@@ -625,6 +625,15 @@ config RTC_DRV_EM3027 + This driver can also be built as a module. If so, the module + will be called rtc-em3027. + ++config RTC_DRV_RV3028 ++ tristate "Micro Crystal RV3028" ++ help ++ If you say yes here you get support for the Micro Crystal ++ RV3028. ++ ++ This driver can also be built as a module. If so, the module ++ will be called rtc-rv3028. ++ + config RTC_DRV_RV8803 + tristate "Micro Crystal RV8803, Epson RX8900" + help +--- a/drivers/rtc/Makefile ++++ b/drivers/rtc/Makefile +@@ -136,6 +136,7 @@ obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5 + obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o + obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o + obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o ++obj-$(CONFIG_RTC_DRV_RV3028) += rtc-rv3028.o + obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o + obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o + obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o +--- /dev/null ++++ b/drivers/rtc/rtc-rv3028.c +@@ -0,0 +1,733 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * RTC driver for the Micro Crystal RV3028 ++ * ++ * Copyright (C) 2019 Micro Crystal SA ++ * ++ * Alexandre Belloni ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rtc-core.h" ++ ++#define RV3028_SEC 0x00 ++#define RV3028_MIN 0x01 ++#define RV3028_HOUR 0x02 ++#define RV3028_WDAY 0x03 ++#define RV3028_DAY 0x04 ++#define RV3028_MONTH 0x05 ++#define RV3028_YEAR 0x06 ++#define RV3028_ALARM_MIN 0x07 ++#define RV3028_ALARM_HOUR 0x08 ++#define RV3028_ALARM_DAY 0x09 ++#define RV3028_STATUS 0x0E ++#define RV3028_CTRL1 0x0F ++#define RV3028_CTRL2 0x10 ++#define RV3028_EVT_CTRL 0x13 ++#define RV3028_TS_COUNT 0x14 ++#define RV3028_TS_SEC 0x15 ++#define RV3028_RAM1 0x1F ++#define RV3028_EEPROM_ADDR 0x25 ++#define RV3028_EEPROM_DATA 0x26 ++#define RV3028_EEPROM_CMD 0x27 ++#define RV3028_CLKOUT 0x35 ++#define RV3028_OFFSET 0x36 ++#define RV3028_BACKUP 0x37 ++ ++#define RV3028_STATUS_PORF BIT(0) ++#define RV3028_STATUS_EVF BIT(1) ++#define RV3028_STATUS_AF BIT(2) ++#define RV3028_STATUS_TF BIT(3) ++#define RV3028_STATUS_UF BIT(4) ++#define RV3028_STATUS_BSF BIT(5) ++#define RV3028_STATUS_CLKF BIT(6) ++#define RV3028_STATUS_EEBUSY BIT(7) ++ ++#define RV3028_CTRL1_EERD BIT(3) ++#define RV3028_CTRL1_WADA BIT(5) ++ ++#define RV3028_CTRL2_RESET BIT(0) ++#define RV3028_CTRL2_12_24 BIT(1) ++#define RV3028_CTRL2_EIE BIT(2) ++#define RV3028_CTRL2_AIE BIT(3) ++#define RV3028_CTRL2_TIE BIT(4) ++#define RV3028_CTRL2_UIE BIT(5) ++#define RV3028_CTRL2_TSE BIT(7) ++ ++#define RV3028_EVT_CTRL_TSR BIT(2) ++ ++#define RV3028_EEPROM_CMD_WRITE 0x21 ++#define RV3028_EEPROM_CMD_READ 0x22 ++ ++#define RV3028_EEBUSY_POLL 10000 ++#define RV3028_EEBUSY_TIMEOUT 100000 ++ ++#define RV3028_BACKUP_TCE BIT(5) ++#define RV3028_BACKUP_TCR_MASK GENMASK(1,0) ++ ++#define OFFSET_STEP_PPT 953674 ++ ++enum rv3028_type { ++ rv_3028, ++}; ++ ++struct rv3028_data { ++ struct regmap *regmap; ++ struct rtc_device *rtc; ++ enum rv3028_type type; ++}; ++ ++static u16 rv3028_trickle_resistors[] = {1000, 3000, 6000, 11000}; ++ ++static ssize_t timestamp0_store(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); ++ ++ regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, ++ RV3028_EVT_CTRL_TSR); ++ ++ return count; ++}; ++ ++static ssize_t timestamp0_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); ++ struct rtc_time tm; ++ int ret, count; ++ u8 date[6]; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); ++ if (ret) ++ return ret; ++ ++ if (!count) ++ return 0; ++ ++ ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date, ++ sizeof(date)); ++ if (ret) ++ return ret; ++ ++ tm.tm_sec = bcd2bin(date[0]); ++ tm.tm_min = bcd2bin(date[1]); ++ tm.tm_hour = bcd2bin(date[2]); ++ tm.tm_mday = bcd2bin(date[3]); ++ tm.tm_mon = bcd2bin(date[4]) - 1; ++ tm.tm_year = bcd2bin(date[5]) + 100; ++ ++ ret = rtc_valid_tm(&tm); ++ if (ret) ++ return ret; ++ ++ return sprintf(buf, "%llu\n", ++ (unsigned long long)rtc_tm_to_time64(&tm)); ++}; ++ ++static DEVICE_ATTR_RW(timestamp0); ++ ++static ssize_t timestamp0_count_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); ++ int ret, count; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); ++ if (ret) ++ return ret; ++ ++ return sprintf(buf, "%u\n", count); ++}; ++ ++static DEVICE_ATTR_RO(timestamp0_count); ++ ++static struct attribute *rv3028_attrs[] = { ++ &dev_attr_timestamp0.attr, ++ &dev_attr_timestamp0_count.attr, ++ NULL ++}; ++ ++static const struct attribute_group rv3028_attr_group = { ++ .attrs = rv3028_attrs, ++}; ++ ++static irqreturn_t rv3028_handle_irq(int irq, void *dev_id) ++{ ++ struct rv3028_data *rv3028 = dev_id; ++ unsigned long events = 0; ++ u32 status = 0, ctrl = 0; ++ ++ if (regmap_read(rv3028->regmap, RV3028_STATUS, &status) < 0 || ++ status == 0) { ++ return IRQ_NONE; ++ } ++ ++ if (status & RV3028_STATUS_PORF) ++ dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n"); ++ ++ if (status & RV3028_STATUS_TF) { ++ status |= RV3028_STATUS_TF; ++ ctrl |= RV3028_CTRL2_TIE; ++ events |= RTC_PF; ++ } ++ ++ if (status & RV3028_STATUS_AF) { ++ status |= RV3028_STATUS_AF; ++ ctrl |= RV3028_CTRL2_AIE; ++ events |= RTC_AF; ++ } ++ ++ if (status & RV3028_STATUS_UF) { ++ status |= RV3028_STATUS_UF; ++ ctrl |= RV3028_CTRL2_UIE; ++ events |= RTC_UF; ++ } ++ ++ if (events) { ++ rtc_update_irq(rv3028->rtc, 1, events); ++ regmap_update_bits(rv3028->regmap, RV3028_STATUS, status, 0); ++ regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ctrl, 0); ++ } ++ ++ if (status & RV3028_STATUS_EVF) { ++ sysfs_notify(&rv3028->rtc->dev.kobj, NULL, ++ dev_attr_timestamp0.attr.name); ++ dev_warn(&rv3028->rtc->dev, "event detected"); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int rv3028_get_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ u8 date[7]; ++ int ret, status; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); ++ if (ret < 0) ++ return ret; ++ ++ if (status & RV3028_STATUS_PORF) { ++ dev_warn(dev, "Voltage low, data is invalid.\n"); ++ return -EINVAL; ++ } ++ ++ ret = regmap_bulk_read(rv3028->regmap, RV3028_SEC, date, sizeof(date)); ++ if (ret) ++ return ret; ++ ++ tm->tm_sec = bcd2bin(date[RV3028_SEC] & 0x7f); ++ tm->tm_min = bcd2bin(date[RV3028_MIN] & 0x7f); ++ tm->tm_hour = bcd2bin(date[RV3028_HOUR] & 0x3f); ++ tm->tm_wday = ilog2(date[RV3028_WDAY] & 0x7f); ++ tm->tm_mday = bcd2bin(date[RV3028_DAY] & 0x3f); ++ tm->tm_mon = bcd2bin(date[RV3028_MONTH] & 0x1f) - 1; ++ tm->tm_year = bcd2bin(date[RV3028_YEAR]) + 100; ++ ++ return 0; ++} ++ ++static int rv3028_set_time(struct device *dev, struct rtc_time *tm) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ u8 date[7]; ++ int ret; ++ ++ date[RV3028_SEC] = bin2bcd(tm->tm_sec); ++ date[RV3028_MIN] = bin2bcd(tm->tm_min); ++ date[RV3028_HOUR] = bin2bcd(tm->tm_hour); ++ date[RV3028_WDAY] = 1 << (tm->tm_wday); ++ date[RV3028_DAY] = bin2bcd(tm->tm_mday); ++ date[RV3028_MONTH] = bin2bcd(tm->tm_mon + 1); ++ date[RV3028_YEAR] = bin2bcd(tm->tm_year - 100); ++ ++ /* ++ * Writing to the Seconds register has the same effect as setting RESET ++ * bit to 1 ++ */ ++ ret = regmap_bulk_write(rv3028->regmap, RV3028_SEC, date, ++ sizeof(date)); ++ if (ret) ++ return ret; ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, ++ RV3028_STATUS_PORF, 0); ++ ++ return ret; ++} ++ ++static int rv3028_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ u8 alarmvals[3]; ++ int status, ctrl, ret; ++ ++ ret = regmap_bulk_read(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, ++ sizeof(alarmvals)); ++ if (ret) ++ return ret; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); ++ if (ret < 0) ++ return ret; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_CTRL2, &ctrl); ++ if (ret < 0) ++ return ret; ++ ++ alrm->time.tm_sec = 0; ++ alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); ++ alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); ++ alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); ++ ++ alrm->enabled = !!(ctrl & RV3028_CTRL2_AIE); ++ alrm->pending = (status & RV3028_STATUS_AF) && alrm->enabled; ++ ++ return 0; ++} ++ ++static int rv3028_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ u8 alarmvals[3]; ++ u8 ctrl = 0; ++ int ret; ++ ++ /* The alarm has no seconds, round up to nearest minute */ ++ if (alrm->time.tm_sec) { ++ time64_t alarm_time = rtc_tm_to_time64(&alrm->time); ++ ++ alarm_time += 60 - alrm->time.tm_sec; ++ rtc_time64_to_tm(alarm_time, &alrm->time); ++ } ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ++ RV3028_CTRL2_AIE | RV3028_CTRL2_UIE, 0); ++ if (ret) ++ return ret; ++ ++ alarmvals[0] = bin2bcd(alrm->time.tm_min); ++ alarmvals[1] = bin2bcd(alrm->time.tm_hour); ++ alarmvals[2] = bin2bcd(alrm->time.tm_mday); ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, ++ RV3028_STATUS_AF, 0); ++ if (ret) ++ return ret; ++ ++ ret = regmap_bulk_write(rv3028->regmap, RV3028_ALARM_MIN, alarmvals, ++ sizeof(alarmvals)); ++ if (ret) ++ return ret; ++ ++ if (alrm->enabled) { ++ if (rv3028->rtc->uie_rtctimer.enabled) ++ ctrl |= RV3028_CTRL2_UIE; ++ if (rv3028->rtc->aie_timer.enabled) ++ ctrl |= RV3028_CTRL2_AIE; ++ } ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ++ RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); ++ ++ return ret; ++} ++ ++static int rv3028_alarm_irq_enable(struct device *dev, unsigned int enabled) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ int ctrl = 0, ret; ++ ++ if (enabled) { ++ if (rv3028->rtc->uie_rtctimer.enabled) ++ ctrl |= RV3028_CTRL2_UIE; ++ if (rv3028->rtc->aie_timer.enabled) ++ ctrl |= RV3028_CTRL2_AIE; ++ } ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, ++ RV3028_STATUS_AF | RV3028_STATUS_UF, 0); ++ if (ret) ++ return ret; ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ++ RV3028_CTRL2_UIE | RV3028_CTRL2_AIE, ctrl); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int rv3028_read_offset(struct device *dev, long *offset) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ int ret, value, steps; ++ ++ ret = regmap_read(rv3028->regmap, RV3028_OFFSET, &value); ++ if (ret < 0) ++ return ret; ++ ++ steps = sign_extend32(value << 1, 8); ++ ++ ret = regmap_read(rv3028->regmap, RV3028_BACKUP, &value); ++ if (ret < 0) ++ return ret; ++ ++ steps += value >> 7; ++ ++ *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); ++ ++ return 0; ++} ++ ++static int rv3028_set_offset(struct device *dev, long offset) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ int ret; ++ ++ offset = clamp(offset, -244141L, 243187L) * 1000; ++ offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); ++ ++ ret = regmap_write(rv3028->regmap, RV3028_OFFSET, offset >> 1); ++ if (ret < 0) ++ return ret; ++ ++ return regmap_update_bits(rv3028->regmap, RV3028_BACKUP, BIT(7), ++ offset << 7); ++} ++ ++static int rv3028_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) ++{ ++ struct rv3028_data *rv3028 = dev_get_drvdata(dev); ++ int status, ret = 0; ++ ++ switch (cmd) { ++ case RTC_VL_READ: ++ ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); ++ if (ret < 0) ++ return ret; ++ ++ if (status & RV3028_STATUS_PORF) ++ dev_warn(&rv3028->rtc->dev, "Voltage low, data loss detected.\n"); ++ ++ status &= RV3028_STATUS_PORF; ++ ++ if (copy_to_user((void __user *)arg, &status, sizeof(int))) ++ return -EFAULT; ++ ++ return 0; ++ ++ case RTC_VL_CLR: ++ ret = regmap_update_bits(rv3028->regmap, RV3028_STATUS, ++ RV3028_STATUS_PORF, 0); ++ ++ return ret; ++ ++ default: ++ return -ENOIOCTLCMD; ++ } ++} ++ ++static int rv3028_nvram_write(void *priv, unsigned int offset, void *val, ++ size_t bytes) ++{ ++ return regmap_bulk_write(priv, RV3028_RAM1 + offset, val, bytes); ++} ++ ++static int rv3028_nvram_read(void *priv, unsigned int offset, void *val, ++ size_t bytes) ++{ ++ return regmap_bulk_read(priv, RV3028_RAM1 + offset, val, bytes); ++} ++ ++static int rv3028_eeprom_write(void *priv, unsigned int offset, void *val, ++ size_t bytes) ++{ ++ u32 status, ctrl1; ++ int i, ret, err; ++ u8 *buf = val; ++ ++ ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); ++ if (ret) ++ return ret; ++ ++ if (!(ctrl1 & RV3028_CTRL1_EERD)) { ++ ret = regmap_update_bits(priv, RV3028_CTRL1, ++ RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); ++ if (ret) ++ return ret; ++ ++ ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, ++ !(status & RV3028_STATUS_EEBUSY), ++ RV3028_EEBUSY_POLL, ++ RV3028_EEBUSY_TIMEOUT); ++ if (ret) ++ goto restore_eerd; ++ } ++ ++ for (i = 0; i < bytes; i++) { ++ ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_write(priv, RV3028_EEPROM_DATA, buf[i]); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_write(priv, RV3028_EEPROM_CMD, ++ RV3028_EEPROM_CMD_WRITE); ++ if (ret) ++ goto restore_eerd; ++ ++ usleep_range(RV3028_EEBUSY_POLL, RV3028_EEBUSY_TIMEOUT); ++ ++ ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, ++ !(status & RV3028_STATUS_EEBUSY), ++ RV3028_EEBUSY_POLL, ++ RV3028_EEBUSY_TIMEOUT); ++ if (ret) ++ goto restore_eerd; ++ } ++ ++restore_eerd: ++ if (!(ctrl1 & RV3028_CTRL1_EERD)) ++ { ++ err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, ++ 0); ++ if (err && !ret) ++ ret = err; ++ } ++ ++ return ret; ++} ++ ++static int rv3028_eeprom_read(void *priv, unsigned int offset, void *val, ++ size_t bytes) ++{ ++ u32 status, ctrl1, data; ++ int i, ret, err; ++ u8 *buf = val; ++ ++ ret = regmap_read(priv, RV3028_CTRL1, &ctrl1); ++ if (ret) ++ return ret; ++ ++ if (!(ctrl1 & RV3028_CTRL1_EERD)) { ++ ret = regmap_update_bits(priv, RV3028_CTRL1, ++ RV3028_CTRL1_EERD, RV3028_CTRL1_EERD); ++ if (ret) ++ return ret; ++ ++ ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, ++ !(status & RV3028_STATUS_EEBUSY), ++ RV3028_EEBUSY_POLL, ++ RV3028_EEBUSY_TIMEOUT); ++ if (ret) ++ goto restore_eerd; ++ } ++ ++ for (i = 0; i < bytes; i++) { ++ ret = regmap_write(priv, RV3028_EEPROM_ADDR, offset + i); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_write(priv, RV3028_EEPROM_CMD, 0x0); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_write(priv, RV3028_EEPROM_CMD, ++ RV3028_EEPROM_CMD_READ); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_read_poll_timeout(priv, RV3028_STATUS, status, ++ !(status & RV3028_STATUS_EEBUSY), ++ RV3028_EEBUSY_POLL, ++ RV3028_EEBUSY_TIMEOUT); ++ if (ret) ++ goto restore_eerd; ++ ++ ret = regmap_read(priv, RV3028_EEPROM_DATA, &data); ++ if (ret) ++ goto restore_eerd; ++ buf[i] = data; ++ } ++ ++restore_eerd: ++ if (!(ctrl1 & RV3028_CTRL1_EERD)) ++ { ++ err = regmap_update_bits(priv, RV3028_CTRL1, RV3028_CTRL1_EERD, ++ 0); ++ if (err && !ret) ++ ret = err; ++ } ++ ++ return ret; ++} ++ ++static struct rtc_class_ops rv3028_rtc_ops = { ++ .read_time = rv3028_get_time, ++ .set_time = rv3028_set_time, ++ .read_offset = rv3028_read_offset, ++ .set_offset = rv3028_set_offset, ++ .ioctl = rv3028_ioctl, ++}; ++ ++static const struct regmap_config regmap_config = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = 0x37, ++}; ++ ++static int rv3028_probe(struct i2c_client *client) ++{ ++ struct rv3028_data *rv3028; ++ int ret, status; ++ u32 ohms; ++ struct nvmem_config nvmem_cfg = { ++ .name = "rv3028_nvram", ++ .word_size = 1, ++ .stride = 1, ++ .size = 2, ++ .type = NVMEM_TYPE_BATTERY_BACKED, ++ .reg_read = rv3028_nvram_read, ++ .reg_write = rv3028_nvram_write, ++ }; ++ struct nvmem_config eeprom_cfg = { ++ .name = "rv3028_eeprom", ++ .word_size = 1, ++ .stride = 1, ++ .size = 43, ++ .type = NVMEM_TYPE_EEPROM, ++ .reg_read = rv3028_eeprom_read, ++ .reg_write = rv3028_eeprom_write, ++ }; ++ ++ rv3028 = devm_kzalloc(&client->dev, sizeof(struct rv3028_data), ++ GFP_KERNEL); ++ if (!rv3028) ++ return -ENOMEM; ++ ++ rv3028->regmap = devm_regmap_init_i2c(client, ®map_config); ++ ++ i2c_set_clientdata(client, rv3028); ++ ++ ret = regmap_read(rv3028->regmap, RV3028_STATUS, &status); ++ if (ret < 0) ++ return ret; ++ ++ if (status & RV3028_STATUS_PORF) ++ dev_warn(&client->dev, "Voltage low, data loss detected.\n"); ++ ++ if (status & RV3028_STATUS_AF) ++ dev_warn(&client->dev, "An alarm may have been missed.\n"); ++ ++ rv3028->rtc = devm_rtc_allocate_device(&client->dev); ++ if (IS_ERR(rv3028->rtc)) { ++ return PTR_ERR(rv3028->rtc); ++ } ++ ++ if (client->irq > 0) { ++ ret = devm_request_threaded_irq(&client->dev, client->irq, ++ NULL, rv3028_handle_irq, ++ IRQF_TRIGGER_LOW | IRQF_ONESHOT, ++ "rv3028", rv3028); ++ if (ret) { ++ dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); ++ client->irq = 0; ++ } else { ++ rv3028_rtc_ops.read_alarm = rv3028_get_alarm; ++ rv3028_rtc_ops.set_alarm = rv3028_set_alarm; ++ rv3028_rtc_ops.alarm_irq_enable = rv3028_alarm_irq_enable; ++ } ++ } ++ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL1, ++ RV3028_CTRL1_WADA, RV3028_CTRL1_WADA); ++ if (ret) ++ return ret; ++ ++ /* setup timestamping */ ++ ret = regmap_update_bits(rv3028->regmap, RV3028_CTRL2, ++ RV3028_CTRL2_EIE | RV3028_CTRL2_TSE, ++ RV3028_CTRL2_EIE | RV3028_CTRL2_TSE); ++ if (ret) ++ return ret; ++ ++ /* setup trickle charger */ ++ if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms", ++ &ohms)) { ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(rv3028_trickle_resistors); i++) ++ if (ohms == rv3028_trickle_resistors[i]) ++ break; ++ ++ if (i < ARRAY_SIZE(rv3028_trickle_resistors)) { ++ ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, ++ RV3028_BACKUP_TCE | ++ RV3028_BACKUP_TCR_MASK, ++ RV3028_BACKUP_TCE | i); ++ if (ret) ++ return ret; ++ } else { ++ dev_warn(&client->dev, "invalid trickle resistor value\n"); ++ } ++ } ++ ++ ret = rtc_add_group(rv3028->rtc, &rv3028_attr_group); ++ if (ret) ++ return ret; ++ ++ rv3028->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; ++ rv3028->rtc->range_max = RTC_TIMESTAMP_END_2099; ++ rv3028->rtc->ops = &rv3028_rtc_ops; ++ ret = rtc_register_device(rv3028->rtc); ++ if (ret) ++ return ret; ++ ++ nvmem_cfg.priv = rv3028->regmap; ++ rtc_nvmem_register(rv3028->rtc, &nvmem_cfg); ++ eeprom_cfg.priv = rv3028->regmap; ++ rtc_nvmem_register(rv3028->rtc, &eeprom_cfg); ++ ++ rv3028->rtc->max_user_freq = 1; ++ ++ return 0; ++} ++ ++static const struct of_device_id rv3028_of_match[] = { ++ { .compatible = "microcrystal,rv3028", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, rv3028_of_match); ++ ++static struct i2c_driver rv3028_driver = { ++ .driver = { ++ .name = "rtc-rv3028", ++ .of_match_table = of_match_ptr(rv3028_of_match), ++ }, ++ .probe_new = rv3028_probe, ++}; ++module_i2c_driver(rv3028_driver); ++ ++MODULE_AUTHOR("Alexandre Belloni "); ++MODULE_DESCRIPTION("Micro Crystal RV3028 RTC driver"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0400-configs-Add-RTC_DRV_RV3028-m.patch b/target/linux/brcm2708/patches-4.19/950-0400-configs-Add-RTC_DRV_RV3028-m.patch new file mode 100644 index 000000000..04080509a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0400-configs-Add-RTC_DRV_RV3028-m.patch @@ -0,0 +1,44 @@ +From 709dd35519e82a34da3fdbb9053f3173e7319167 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 28 Mar 2019 13:13:52 +0000 +Subject: [PATCH 400/703] configs: Add RTC_DRV_RV3028=m + +See: https://github.com/raspberrypi/linux/issues/2912 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1157,6 +1157,7 @@ CONFIG_RTC_DRV_FM3130=m + CONFIG_RTC_DRV_RX8581=m + CONFIG_RTC_DRV_RX8025=m + CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_RV3028=m + CONFIG_RTC_DRV_M41T93=m + CONFIG_RTC_DRV_M41T94=m + CONFIG_RTC_DRV_DS1302=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1150,6 +1150,7 @@ CONFIG_RTC_DRV_FM3130=m + CONFIG_RTC_DRV_RX8581=m + CONFIG_RTC_DRV_RX8025=m + CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_RV3028=m + CONFIG_RTC_DRV_M41T93=m + CONFIG_RTC_DRV_M41T94=m + CONFIG_RTC_DRV_DS1302=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1017,6 +1017,7 @@ CONFIG_RTC_DRV_FM3130=m + CONFIG_RTC_DRV_RX8581=m + CONFIG_RTC_DRV_RX8025=m + CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_RV3028=m + CONFIG_RTC_DRV_M41T93=m + CONFIG_RTC_DRV_M41T94=m + CONFIG_RTC_DRV_DS1302=m diff --git a/target/linux/brcm2708/patches-4.19/950-0401-overlays-Add-rv3028-to-i2c-rtc.patch b/target/linux/brcm2708/patches-4.19/950-0401-overlays-Add-rv3028-to-i2c-rtc.patch new file mode 100644 index 000000000..eb0674829 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0401-overlays-Add-rv3028-to-i2c-rtc.patch @@ -0,0 +1,75 @@ +From 7eab8a839b1994c2b16c955af4ad805022acccb7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 28 Mar 2019 13:26:59 +0000 +Subject: [PATCH 401/703] overlays: Add rv3028 to i2c-rtc + +See: https://github.com/raspberrypi/linux/issues/2912 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 4 +++- + .../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 19 ++++++++++++++++++- + 2 files changed, 21 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -939,6 +939,8 @@ Params: abx80x Select o + + pcf8563 Select the PCF8563 device + ++ rv3028 Select the Micro Crystal RV3028 device ++ + addr Sets the address for the RTC. Note that the + device must be configured to use the specified + address. +@@ -947,7 +949,7 @@ Params: abx80x Select o + "schottky" (ABx80x only) + + trickle-resistor-ohms Resistor value for trickle charge (DS1339, +- ABx80x) ++ ABx80x, RV3028) + + wakeup-source Specify that the RTC can be used as a wakeup + source +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -158,6 +158,21 @@ + }; + }; + ++ fragment@10 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ rv3028: rv3028@52 { ++ compatible = "microcrystal,rv3028"; ++ reg = <0x52>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ + __overrides__ { + abx80x = <0>,"+0"; + ds1307 = <0>,"+1"; +@@ -169,6 +184,7 @@ + pcf8523 = <0>,"+7"; + pcf8563 = <0>,"+8"; + m41t62 = <0>,"+9"; ++ rv3028 = <0>,"+10"; + + addr = <&abx80x>, "reg:0", + <&ds1307>, "reg:0", +@@ -182,7 +198,8 @@ + <&m41t62>, "reg:0"; + trickle-diode-type = <&abx80x>,"abracon,tc-diode"; + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", +- <&abx80x>,"abracon,tc-resistor"; ++ <&abx80x>,"abracon,tc-resistor", ++ <&rv3028>,"trickle-resistor-ohms:0"; + wakeup-source = <&ds1339>,"wakeup-source?", + <&ds3231>,"wakeup-source?", + <&mcp7940x>,"wakeup-source?", diff --git a/target/linux/brcm2708/patches-4.19/950-0402-ASoC-tlv320aic32x4-SND_SOC_DAPM_MICBIAS-is-deprecate.patch b/target/linux/brcm2708/patches-4.19/950-0402-ASoC-tlv320aic32x4-SND_SOC_DAPM_MICBIAS-is-deprecate.patch new file mode 100644 index 000000000..4dc424b43 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0402-ASoC-tlv320aic32x4-SND_SOC_DAPM_MICBIAS-is-deprecate.patch @@ -0,0 +1,78 @@ +From e4e16b18401abf412c5d1d6435176e609a33c1ed Mon Sep 17 00:00:00 2001 +From: b-ak +Date: Wed, 9 Jan 2019 22:41:21 +0530 +Subject: [PATCH 402/703] ASoC: tlv320aic32x4: SND_SOC_DAPM_MICBIAS is + deprecated + +commit 04d979d7a7bac2f645cd827ea37e5ffa5b4e1f97 upstream. + +SND_SOC_DAPM_MICBIAS is deprecated, replace it with SND_SOC_DAPM_SUPPLY. + +MICBIAS voltage wasn't supplied to the microphone with the older +SND_SOC_DAPM_MICBIAS widget, hence the microphone wouldn't work. + +This patch fixes the problem. + +Signed-off-by: b-ak +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 30 +++++++++++++++++++++++++++++- + sound/soc/codecs/tlv320aic32x4.h | 1 + + 2 files changed, 30 insertions(+), 1 deletion(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -79,6 +79,32 @@ struct aic32x4_priv { + struct device *dev; + }; + ++static int mic_bias_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *kcontrol, int event) ++{ ++ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); ++ ++ switch (event) { ++ case SND_SOC_DAPM_POST_PMU: ++ /* Change Mic Bias Registor */ ++ snd_soc_component_update_bits(component, AIC32X4_MICBIAS, ++ AIC32x4_MICBIAS_MASK, ++ AIC32X4_MICBIAS_LDOIN | ++ AIC32X4_MICBIAS_2075V); ++ printk(KERN_DEBUG "%s: Mic Bias will be turned ON\n", __func__); ++ break; ++ case SND_SOC_DAPM_PRE_PMD: ++ snd_soc_component_update_bits(component, AIC32X4_MICBIAS, ++ AIC32x4_MICBIAS_MASK, 0); ++ printk(KERN_DEBUG "%s: Mic Bias will be turned OFF\n", ++ __func__); ++ break; ++ } ++ ++ return 0; ++} ++ ++ + static int aic32x4_get_mfp1_gpio(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) + { +@@ -450,7 +476,9 @@ static const struct snd_soc_dapm_widget + SND_SOC_DAPM_MUX("IN3_R to Left Mixer Negative Resistor", SND_SOC_NOPM, 0, 0, + in3r_to_lmixer_controls), + +- SND_SOC_DAPM_MICBIAS("Mic Bias", AIC32X4_MICBIAS, 6, 0), ++ SND_SOC_DAPM_SUPPLY("Mic Bias", AIC32X4_MICBIAS, 6, 0, mic_bias_event, ++ SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), ++ + + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("HPR"), +--- a/sound/soc/codecs/tlv320aic32x4.h ++++ b/sound/soc/codecs/tlv320aic32x4.h +@@ -195,6 +195,7 @@ int aic32x4_remove(struct device *dev); + /* AIC32X4_MICBIAS */ + #define AIC32X4_MICBIAS_LDOIN BIT(3) + #define AIC32X4_MICBIAS_2075V 0x60 ++#define AIC32x4_MICBIAS_MASK GENMASK(6, 3) + + /* AIC32X4_LMICPGANIN */ + #define AIC32X4_LMICPGANIN_IN2R_10K 0x10 diff --git a/target/linux/brcm2708/patches-4.19/950-0403-ASoC-tlv320aic32x4-Break-out-clock-setting-into-sepa.patch b/target/linux/brcm2708/patches-4.19/950-0403-ASoC-tlv320aic32x4-Break-out-clock-setting-into-sepa.patch new file mode 100644 index 000000000..29135a8f6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0403-ASoC-tlv320aic32x4-Break-out-clock-setting-into-sepa.patch @@ -0,0 +1,64 @@ +From 8ce90120ea5e084d5d9f2b5b1a449edef6099b0b Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Mon, 18 Mar 2019 20:37:44 -0700 +Subject: [PATCH 403/703] ASoC: tlv320aic32x4: Break out clock setting into + separate function + +commit bf31cbfbe25001036e1e096b1c260bf871766ea5 upstream. + +Break the clock setting logic out from the main hw_params. It's +rather large and unweildy and makes for a large function. This +also better enables some of the following changes to the clock +tree access in the driver. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 26 ++++++++++++++++++-------- + 1 file changed, 18 insertions(+), 8 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -698,17 +698,13 @@ static int aic32x4_set_dai_fmt(struct sn + return 0; + } + +-static int aic32x4_hw_params(struct snd_pcm_substream *substream, +- struct snd_pcm_hw_params *params, +- struct snd_soc_dai *dai) ++static int aic32x4_setup_clocks(struct snd_soc_component *component, ++ unsigned int sample_rate, ++ unsigned int parent_rate) + { +- struct snd_soc_component *component = dai->component; +- struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); +- u8 iface1_reg = 0; +- u8 dacsetup_reg = 0; + int i; + +- i = aic32x4_get_divs(aic32x4->sysclk, params_rate(params)); ++ i = aic32x4_get_divs(parent_rate, sample_rate); + if (i < 0) { + printk(KERN_ERR "aic32x4: sampling rate not supported\n"); + return i; +@@ -765,6 +761,20 @@ static int aic32x4_hw_params(struct snd_ + snd_soc_component_update_bits(component, AIC32X4_BCLKN, + AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); + ++ return 0; ++} ++ ++static int aic32x4_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); ++ u8 iface1_reg = 0; ++ u8 dacsetup_reg = 0; ++ ++ aic32x4_setup_clocks(component, params_rate(params), aic32x4->sysclk); ++ + switch (params_width(params)) { + case 16: + iface1_reg |= (AIC32X4_WORD_LEN_16BITS << diff --git a/target/linux/brcm2708/patches-4.19/950-0404-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch b/target/linux/brcm2708/patches-4.19/950-0404-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch new file mode 100644 index 000000000..41675f7a5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0404-ASoC-tlv320aic32x4-Properly-Set-Processing-Blocks.patch @@ -0,0 +1,111 @@ +From d41102524cf14a1098a735add06aa4d67c631130 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 20 Mar 2019 19:38:44 -0700 +Subject: [PATCH 404/703] ASoC: tlv320aic32x4: Properly Set Processing Blocks + +commit c95e3a4b96293403a427b5185e60fad28af51fdd upstream. + +Different processing blocks are required for different sampling +rates and power parameters. Set the processing blocks based +on this information. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 56 ++++++++++++++++++++------------ + 1 file changed, 36 insertions(+), 20 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -59,6 +59,8 @@ struct aic32x4_rate_divs { + u8 nadc; + u8 madc; + u8 blck_N; ++ u8 r_block; ++ u8 p_block; + }; + + struct aic32x4_priv { +@@ -307,34 +309,34 @@ static const struct snd_kcontrol_new aic + + static const struct aic32x4_rate_divs aic32x4_divs[] = { + /* 8k rate */ +- {12000000, 8000, 1, 7, 6800, 768, 5, 3, 128, 5, 18, 24}, +- {24000000, 8000, 2, 7, 6800, 768, 15, 1, 64, 45, 4, 24}, +- {25000000, 8000, 2, 7, 3728, 768, 15, 1, 64, 45, 4, 24}, ++ {12000000, 8000, 1, 7, 6800, 768, 5, 3, 128, 5, 18, 24, 1, 1}, ++ {24000000, 8000, 2, 7, 6800, 768, 15, 1, 64, 45, 4, 24, 1, 1}, ++ {25000000, 8000, 2, 7, 3728, 768, 15, 1, 64, 45, 4, 24, 1, 1}, + /* 11.025k rate */ +- {12000000, 11025, 1, 7, 5264, 512, 8, 2, 128, 8, 8, 16}, +- {24000000, 11025, 2, 7, 5264, 512, 16, 1, 64, 32, 4, 16}, ++ {12000000, 11025, 1, 7, 5264, 512, 8, 2, 128, 8, 8, 16, 1, 1}, ++ {24000000, 11025, 2, 7, 5264, 512, 16, 1, 64, 32, 4, 16, 1, 1}, + /* 16k rate */ +- {12000000, 16000, 1, 7, 6800, 384, 5, 3, 128, 5, 9, 12}, +- {24000000, 16000, 2, 7, 6800, 384, 15, 1, 64, 18, 5, 12}, +- {25000000, 16000, 2, 7, 3728, 384, 15, 1, 64, 18, 5, 12}, ++ {12000000, 16000, 1, 7, 6800, 384, 5, 3, 128, 5, 9, 12, 1, 1}, ++ {24000000, 16000, 2, 7, 6800, 384, 15, 1, 64, 18, 5, 12, 1, 1}, ++ {25000000, 16000, 2, 7, 3728, 384, 15, 1, 64, 18, 5, 12, 1, 1}, + /* 22.05k rate */ +- {12000000, 22050, 1, 7, 5264, 256, 4, 4, 128, 4, 8, 8}, +- {24000000, 22050, 2, 7, 5264, 256, 16, 1, 64, 16, 4, 8}, +- {25000000, 22050, 2, 7, 2253, 256, 16, 1, 64, 16, 4, 8}, ++ {12000000, 22050, 1, 7, 5264, 256, 4, 4, 128, 4, 8, 8, 1, 1}, ++ {24000000, 22050, 2, 7, 5264, 256, 16, 1, 64, 16, 4, 8, 1, 1}, ++ {25000000, 22050, 2, 7, 2253, 256, 16, 1, 64, 16, 4, 8, 1, 1}, + /* 32k rate */ +- {12000000, 32000, 1, 7, 1680, 192, 2, 7, 64, 2, 21, 6}, +- {24000000, 32000, 2, 7, 1680, 192, 7, 2, 64, 7, 6, 6}, ++ {12000000, 32000, 1, 7, 1680, 192, 2, 7, 64, 2, 21, 6, 1, 1}, ++ {24000000, 32000, 2, 7, 1680, 192, 7, 2, 64, 7, 6, 6, 1, 1}, + /* 44.1k rate */ +- {12000000, 44100, 1, 7, 5264, 128, 2, 8, 128, 2, 8, 4}, +- {24000000, 44100, 2, 7, 5264, 128, 8, 2, 64, 8, 4, 4}, +- {25000000, 44100, 2, 7, 2253, 128, 8, 2, 64, 8, 4, 4}, ++ {12000000, 44100, 1, 7, 5264, 128, 2, 8, 128, 2, 8, 4, 1, 1}, ++ {24000000, 44100, 2, 7, 5264, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ {25000000, 44100, 2, 7, 2253, 128, 8, 2, 64, 8, 4, 4, 1, 1}, + /* 48k rate */ +- {12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4}, +- {24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4}, +- {25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4}, ++ {12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4, 1, 1}, ++ {24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ {25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4, 1, 1}, + + /* 96k rate */ +- {25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1}, ++ {25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1, 1, 9}, + }; + + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { +@@ -698,6 +700,18 @@ static int aic32x4_set_dai_fmt(struct sn + return 0; + } + ++static int aic32x4_set_processing_blocks(struct snd_soc_component *component, ++ u8 r_block, u8 p_block) ++{ ++ if (r_block > 18 || p_block > 25) ++ return -EINVAL; ++ ++ snd_soc_component_write(component, AIC32X4_ADCSPB, r_block); ++ snd_soc_component_write(component, AIC32X4_DACSPB, p_block); ++ ++ return 0; ++} ++ + static int aic32x4_setup_clocks(struct snd_soc_component *component, + unsigned int sample_rate, + unsigned int parent_rate) +@@ -710,6 +724,8 @@ static int aic32x4_setup_clocks(struct s + return i; + } + ++ aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); ++ + /* MCLK as PLL_CLKIN */ + snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_PLL_CLKIN_MASK, + AIC32X4_PLL_CLKIN_MCLK << AIC32X4_PLL_CLKIN_SHIFT); diff --git a/target/linux/brcm2708/patches-4.19/950-0405-ASoC-tlv320aic32x4-Model-PLL-in-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0405-ASoC-tlv320aic32x4-Model-PLL-in-CCF.patch new file mode 100644 index 000000000..5ac36a917 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0405-ASoC-tlv320aic32x4-Model-PLL-in-CCF.patch @@ -0,0 +1,877 @@ +From 12e71e0f6b9009a5de89b2073a53c55c9ae28a40 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:45 -0700 +Subject: [PATCH 405/703] ASoC: tlv320aic32x4: Model PLL in CCF + +commit 514b044cba667e4b7c383ec79b42b997e624b91d upstream. + +Model and manage the on-board PLL as a component in the Core +Clock Framework. This should allow us to do some more complex +clock management and power control. Also, some of the +on-board chip clocks can be exposed to the outside, and this +change will make those clocks easier to consume by other +parts of the kernel. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/Kconfig | 1 + + sound/soc/codecs/Makefile | 2 +- + sound/soc/codecs/tlv320aic32x4-clk.c | 323 +++++++++++++++++++++++++++ + sound/soc/codecs/tlv320aic32x4.c | 195 ++++++++-------- + sound/soc/codecs/tlv320aic32x4.h | 5 + + 5 files changed, 431 insertions(+), 95 deletions(-) + create mode 100644 sound/soc/codecs/tlv320aic32x4-clk.c + +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -1025,6 +1025,7 @@ config SND_SOC_TLV320AIC31XX + + config SND_SOC_TLV320AIC32X4 + tristate ++ depends on COMMON_CLK + + config SND_SOC_TLV320AIC32X4_I2C + tristate "Texas Instruments TLV320AIC32x4 audio CODECs - I2C" +--- a/sound/soc/codecs/Makefile ++++ b/sound/soc/codecs/Makefile +@@ -182,7 +182,7 @@ snd-soc-tlv320aic23-i2c-objs := tlv320ai + snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o + snd-soc-tlv320aic26-objs := tlv320aic26.o + snd-soc-tlv320aic31xx-objs := tlv320aic31xx.o +-snd-soc-tlv320aic32x4-objs := tlv320aic32x4.o ++snd-soc-tlv320aic32x4-objs := tlv320aic32x4.o tlv320aic32x4-clk.o + snd-soc-tlv320aic32x4-i2c-objs := tlv320aic32x4-i2c.o + snd-soc-tlv320aic32x4-spi-objs := tlv320aic32x4-spi.o + snd-soc-tlv320aic3x-objs := tlv320aic3x.o +--- /dev/null ++++ b/sound/soc/codecs/tlv320aic32x4-clk.c +@@ -0,0 +1,323 @@ ++/* SPDX-License-Identifier: GPL-2.0 ++ * ++ * Clock Tree for the Texas Instruments TLV320AIC32x4 ++ * ++ * Copyright 2019 Annaliese McDermond ++ * ++ * Author: Annaliese McDermond ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "tlv320aic32x4.h" ++ ++#define to_clk_aic32x4(_hw) container_of(_hw, struct clk_aic32x4, hw) ++struct clk_aic32x4 { ++ struct clk_hw hw; ++ struct device *dev; ++ struct regmap *regmap; ++ unsigned int reg; ++}; ++ ++/* ++ * struct clk_aic32x4_pll_muldiv - Multiplier/divider settings ++ * @p: Divider ++ * @r: first multiplier ++ * @j: integer part of second multiplier ++ * @d: decimal part of second multiplier ++ */ ++struct clk_aic32x4_pll_muldiv { ++ u8 p; ++ u16 r; ++ u8 j; ++ u16 d; ++}; ++ ++struct aic32x4_clkdesc { ++ const char *name; ++ const char * const *parent_names; ++ unsigned int num_parents; ++ const struct clk_ops *ops; ++ unsigned int reg; ++}; ++ ++static int clk_aic32x4_pll_prepare(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ ++ return regmap_update_bits(pll->regmap, AIC32X4_PLLPR, ++ AIC32X4_PLLEN, AIC32X4_PLLEN); ++} ++ ++static void clk_aic32x4_pll_unprepare(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ ++ regmap_update_bits(pll->regmap, AIC32X4_PLLPR, ++ AIC32X4_PLLEN, 0); ++} ++ ++static int clk_aic32x4_pll_is_prepared(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ ++ unsigned int val; ++ int ret; ++ ++ ret = regmap_read(pll->regmap, AIC32X4_PLLPR, &val); ++ if (ret < 0) ++ return ret; ++ ++ return !!(val & AIC32X4_PLLEN); ++} ++ ++static int clk_aic32x4_pll_get_muldiv(struct clk_aic32x4 *pll, ++ struct clk_aic32x4_pll_muldiv *settings) ++{ ++ /* Change to use regmap_bulk_read? */ ++ unsigned int val; ++ int ret; ++ ++ ret = regmap_read(pll->regmap, AIC32X4_PLLPR, &val); ++ if (ret) ++ return ret; ++ settings->r = val & AIC32X4_PLL_R_MASK; ++ settings->p = (val & AIC32X4_PLL_P_MASK) >> AIC32X4_PLL_P_SHIFT; ++ ++ ret = regmap_read(pll->regmap, AIC32X4_PLLJ, &val); ++ if (ret < 0) ++ return ret; ++ settings->j = val; ++ ++ ret = regmap_read(pll->regmap, AIC32X4_PLLDMSB, &val); ++ if (ret < 0) ++ return ret; ++ settings->d = val << 8; ++ ++ ret = regmap_read(pll->regmap, AIC32X4_PLLDLSB, &val); ++ if (ret < 0) ++ return ret; ++ settings->d |= val; ++ ++ return 0; ++} ++ ++static int clk_aic32x4_pll_set_muldiv(struct clk_aic32x4 *pll, ++ struct clk_aic32x4_pll_muldiv *settings) ++{ ++ int ret; ++ /* Change to use regmap_bulk_write for some if not all? */ ++ ++ ret = regmap_update_bits(pll->regmap, AIC32X4_PLLPR, ++ AIC32X4_PLL_R_MASK, settings->r); ++ if (ret < 0) ++ return ret; ++ ++ ret = regmap_update_bits(pll->regmap, AIC32X4_PLLPR, ++ AIC32X4_PLL_P_MASK, ++ settings->p << AIC32X4_PLL_P_SHIFT); ++ if (ret < 0) ++ return ret; ++ ++ ret = regmap_write(pll->regmap, AIC32X4_PLLJ, settings->j); ++ if (ret < 0) ++ return ret; ++ ++ ret = regmap_write(pll->regmap, AIC32X4_PLLDMSB, (settings->d >> 8)); ++ if (ret < 0) ++ return ret; ++ ret = regmap_write(pll->regmap, AIC32X4_PLLDLSB, (settings->d & 0xff)); ++ if (ret < 0) ++ return ret; ++ ++ return 0; ++} ++ ++static unsigned long clk_aic32x4_pll_calc_rate( ++ struct clk_aic32x4_pll_muldiv *settings, ++ unsigned long parent_rate) ++{ ++ u64 rate; ++ /* ++ * We scale j by 10000 to account for the decimal part of P and divide ++ * it back out later. ++ */ ++ rate = (u64) parent_rate * settings->r * ++ ((settings->j * 10000) + settings->d); ++ ++ return (unsigned long) DIV_ROUND_UP_ULL(rate, settings->p * 10000); ++} ++ ++static int clk_aic32x4_pll_calc_muldiv(struct clk_aic32x4_pll_muldiv *settings, ++ unsigned long rate, unsigned long parent_rate) ++{ ++ u64 multiplier; ++ ++ settings->p = parent_rate / AIC32X4_MAX_PLL_CLKIN + 1; ++ if (settings->p > 8) ++ return -1; ++ ++ /* ++ * We scale this figure by 10000 so that we can get the decimal part ++ * of the multiplier. This is because we can't do floating point ++ * math in the kernel. ++ */ ++ multiplier = (u64) rate * settings->p * 10000; ++ do_div(multiplier, parent_rate); ++ ++ /* ++ * J can't be over 64, so R can scale this. ++ * R can't be greater than 4. ++ */ ++ settings->r = ((u32) multiplier / 640000) + 1; ++ if (settings->r > 4) ++ return -1; ++ do_div(multiplier, settings->r); ++ ++ /* ++ * J can't be < 1. ++ */ ++ if (multiplier < 10000) ++ return -1; ++ ++ /* Figure out the integer part, J, and the fractional part, D. */ ++ settings->j = (u32) multiplier / 10000; ++ settings->d = (u32) multiplier % 10000; ++ ++ return 0; ++} ++ ++static unsigned long clk_aic32x4_pll_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ struct clk_aic32x4_pll_muldiv settings; ++ int ret; ++ ++ ret = clk_aic32x4_pll_get_muldiv(pll, &settings); ++ if (ret < 0) ++ return 0; ++ ++ return clk_aic32x4_pll_calc_rate(&settings, parent_rate); ++} ++ ++static long clk_aic32x4_pll_round_rate(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ struct clk_aic32x4_pll_muldiv settings; ++ int ret; ++ ++ ret = clk_aic32x4_pll_calc_muldiv(&settings, rate, *parent_rate); ++ if (ret < 0) ++ return 0; ++ ++ return clk_aic32x4_pll_calc_rate(&settings, *parent_rate); ++} ++ ++static int clk_aic32x4_pll_set_rate(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ struct clk_aic32x4_pll_muldiv settings; ++ int ret; ++ ++ ret = clk_aic32x4_pll_calc_muldiv(&settings, rate, parent_rate); ++ if (ret < 0) ++ return -EINVAL; ++ ++ return clk_aic32x4_pll_set_muldiv(pll, &settings); ++} ++ ++static int clk_aic32x4_pll_set_parent(struct clk_hw *hw, u8 index) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ ++ return regmap_update_bits(pll->regmap, ++ AIC32X4_CLKMUX, ++ AIC32X4_PLL_CLKIN_MASK, ++ index << AIC32X4_PLL_CLKIN_SHIFT); ++} ++ ++static u8 clk_aic32x4_pll_get_parent(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *pll = to_clk_aic32x4(hw); ++ unsigned int val; ++ ++ regmap_read(pll->regmap, AIC32X4_PLLPR, &val); ++ ++ return (val & AIC32X4_PLL_CLKIN_MASK) >> AIC32X4_PLL_CLKIN_SHIFT; ++} ++ ++ ++static const struct clk_ops aic32x4_pll_ops = { ++ .prepare = clk_aic32x4_pll_prepare, ++ .unprepare = clk_aic32x4_pll_unprepare, ++ .is_prepared = clk_aic32x4_pll_is_prepared, ++ .recalc_rate = clk_aic32x4_pll_recalc_rate, ++ .round_rate = clk_aic32x4_pll_round_rate, ++ .set_rate = clk_aic32x4_pll_set_rate, ++ .set_parent = clk_aic32x4_pll_set_parent, ++ .get_parent = clk_aic32x4_pll_get_parent, ++}; ++ ++static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { ++ { ++ .name = "pll", ++ .parent_names = ++ (const char* []) { "mclk", "bclk", "gpio", "din" }, ++ .num_parents = 4, ++ .ops = &aic32x4_pll_ops, ++ .reg = 0, ++ }, ++}; ++ ++static struct clk *aic32x4_register_clk(struct device *dev, ++ struct aic32x4_clkdesc *desc) ++{ ++ struct clk_init_data init; ++ struct clk_aic32x4 *priv; ++ const char *devname = dev_name(dev); ++ ++ init.ops = desc->ops; ++ init.name = desc->name; ++ init.parent_names = desc->parent_names; ++ init.num_parents = desc->num_parents; ++ init.flags = 0; ++ ++ priv = devm_kzalloc(dev, sizeof(struct clk_aic32x4), GFP_KERNEL); ++ if (priv == NULL) ++ return (struct clk *) -ENOMEM; ++ ++ priv->dev = dev; ++ priv->hw.init = &init; ++ priv->regmap = dev_get_regmap(dev, NULL); ++ priv->reg = desc->reg; ++ ++ clk_hw_register_clkdev(&priv->hw, desc->name, devname); ++ return devm_clk_register(dev, &priv->hw); ++} ++ ++int aic32x4_register_clocks(struct device *dev, const char *mclk_name) ++{ ++ int i; ++ ++ /* ++ * These lines are here to preserve the current functionality of ++ * the driver with regard to the DT. These should eventually be set ++ * by DT nodes so that the connections can be set up in configuration ++ * rather than code. ++ */ ++ aic32x4_clkdesc_array[0].parent_names = ++ (const char* []) { mclk_name, "bclk", "gpio", "din" }; ++ ++ for (i = 0; i < ARRAY_SIZE(aic32x4_clkdesc_array); ++i) ++ aic32x4_register_clk(dev, &aic32x4_clkdesc_array[i]); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(aic32x4_register_clocks); +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -14,7 +14,7 @@ + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License +@@ -33,6 +33,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -49,9 +50,7 @@ + struct aic32x4_rate_divs { + u32 mclk; + u32 rate; +- u8 p_val; +- u8 pll_j; +- u16 pll_d; ++ unsigned long pll_rate; + u16 dosr; + u8 ndac; + u8 mdac; +@@ -71,6 +70,7 @@ struct aic32x4_priv { + bool swapdacs; + int rstn_gpio; + struct clk *mclk; ++ const char *mclk_name; + + struct regulator *supply_ldo; + struct regulator *supply_iov; +@@ -309,34 +309,34 @@ static const struct snd_kcontrol_new aic + + static const struct aic32x4_rate_divs aic32x4_divs[] = { + /* 8k rate */ +- {12000000, 8000, 1, 7, 6800, 768, 5, 3, 128, 5, 18, 24, 1, 1}, +- {24000000, 8000, 2, 7, 6800, 768, 15, 1, 64, 45, 4, 24, 1, 1}, +- {25000000, 8000, 2, 7, 3728, 768, 15, 1, 64, 45, 4, 24, 1, 1}, ++ { 12000000, 8000, 57120000, 768, 5, 3, 128, 5, 18, 24, 1, 1 }, ++ { 24000000, 8000, 57120000, 768, 15, 1, 64, 45, 4, 24, 1, 1 }, ++ { 25000000, 8000, 32620000, 768, 15, 1, 64, 45, 4, 24, 1, 1 }, + /* 11.025k rate */ +- {12000000, 11025, 1, 7, 5264, 512, 8, 2, 128, 8, 8, 16, 1, 1}, +- {24000000, 11025, 2, 7, 5264, 512, 16, 1, 64, 32, 4, 16, 1, 1}, ++ { 12000000, 11025, 44217600, 512, 8, 2, 128, 8, 8, 16, 1, 1 }, ++ { 24000000, 11025, 44217600, 512, 16, 1, 64, 32, 4, 16, 1, 1 }, + /* 16k rate */ +- {12000000, 16000, 1, 7, 6800, 384, 5, 3, 128, 5, 9, 12, 1, 1}, +- {24000000, 16000, 2, 7, 6800, 384, 15, 1, 64, 18, 5, 12, 1, 1}, +- {25000000, 16000, 2, 7, 3728, 384, 15, 1, 64, 18, 5, 12, 1, 1}, ++ { 12000000, 16000, 57120000, 384, 5, 3, 128, 5, 9, 12, 1, 1 }, ++ { 24000000, 16000, 57120000, 384, 15, 1, 64, 18, 5, 12, 1, 1 }, ++ { 25000000, 16000, 32620000, 384, 15, 1, 64, 18, 5, 12, 1, 1 }, + /* 22.05k rate */ +- {12000000, 22050, 1, 7, 5264, 256, 4, 4, 128, 4, 8, 8, 1, 1}, +- {24000000, 22050, 2, 7, 5264, 256, 16, 1, 64, 16, 4, 8, 1, 1}, +- {25000000, 22050, 2, 7, 2253, 256, 16, 1, 64, 16, 4, 8, 1, 1}, ++ { 12000000, 22050, 44217600, 256, 4, 4, 128, 4, 8, 8, 1, 1 }, ++ { 24000000, 22050, 44217600, 256, 16, 1, 64, 16, 4, 8, 1, 1 }, ++ { 25000000, 22050, 19713750, 256, 16, 1, 64, 16, 4, 8, 1, 1 }, + /* 32k rate */ +- {12000000, 32000, 1, 7, 1680, 192, 2, 7, 64, 2, 21, 6, 1, 1}, +- {24000000, 32000, 2, 7, 1680, 192, 7, 2, 64, 7, 6, 6, 1, 1}, ++ { 12000000, 32000, 14112000, 192, 2, 7, 64, 2, 21, 6, 1, 1 }, ++ { 24000000, 32000, 14112000, 192, 7, 2, 64, 7, 6, 6, 1, 1 }, + /* 44.1k rate */ +- {12000000, 44100, 1, 7, 5264, 128, 2, 8, 128, 2, 8, 4, 1, 1}, +- {24000000, 44100, 2, 7, 5264, 128, 8, 2, 64, 8, 4, 4, 1, 1}, +- {25000000, 44100, 2, 7, 2253, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ { 12000000, 44100, 44217600, 128, 2, 8, 128, 2, 8, 4, 1, 1 }, ++ { 24000000, 44100, 44217600, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, ++ { 25000000, 44100, 19713750, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, + /* 48k rate */ +- {12000000, 48000, 1, 8, 1920, 128, 2, 8, 128, 2, 8, 4, 1, 1}, +- {24000000, 48000, 2, 8, 1920, 128, 8, 2, 64, 8, 4, 4, 1, 1}, +- {25000000, 48000, 2, 7, 8643, 128, 8, 2, 64, 8, 4, 4, 1, 1}, ++ { 12000000, 48000, 18432000, 128, 2, 8, 128, 2, 8, 4, 1, 1 }, ++ { 24000000, 48000, 18432000, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, ++ { 25000000, 48000, 75626250, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, + + /* 96k rate */ +- {25000000, 96000, 2, 7, 8643, 64, 4, 4, 64, 4, 4, 1, 1, 9}, ++ { 25000000, 96000, 75626250, 64, 4, 4, 64, 4, 4, 1, 1, 9 }, + }; + + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { +@@ -393,7 +393,7 @@ static const struct snd_kcontrol_new in3 + SOC_DAPM_ENUM("IN3_R L- Switch", in3r_lpga_n_enum), + }; + +-/* Right mixer pins */ ++/* Right mixer pins */ + static SOC_ENUM_SINGLE_DECL(in1r_rpga_p_enum, AIC32X4_RMICPGAPIN, 6, resistor_text); + static SOC_ENUM_SINGLE_DECL(in2r_rpga_p_enum, AIC32X4_RMICPGAPIN, 4, resistor_text); + static SOC_ENUM_SINGLE_DECL(in3r_rpga_p_enum, AIC32X4_RMICPGAPIN, 2, resistor_text); +@@ -597,7 +597,7 @@ static const struct snd_soc_dapm_route a + static const struct regmap_range_cfg aic32x4_regmap_pages[] = { + { + .selector_reg = 0, +- .selector_mask = 0xff, ++ .selector_mask = 0xff, + .window_start = 0, + .window_len = 128, + .range_min = 0, +@@ -618,7 +618,7 @@ static inline int aic32x4_get_divs(int m + + for (i = 0; i < ARRAY_SIZE(aic32x4_divs); i++) { + if ((aic32x4_divs[i].rate == rate) +- && (aic32x4_divs[i].mclk == mclk)) { ++ && (aic32x4_divs[i].mclk == mclk)) { + return i; + } + } +@@ -690,12 +690,12 @@ static int aic32x4_set_dai_fmt(struct sn + } + + snd_soc_component_update_bits(component, AIC32X4_IFACE1, +- AIC32X4_IFACE1_DATATYPE_MASK | +- AIC32X4_IFACE1_MASTER_MASK, iface_reg_1); ++ AIC32X4_IFACE1_DATATYPE_MASK | ++ AIC32X4_IFACE1_MASTER_MASK, iface_reg_1); + snd_soc_component_update_bits(component, AIC32X4_IFACE2, +- AIC32X4_DATA_OFFSET_MASK, iface_reg_2); ++ AIC32X4_DATA_OFFSET_MASK, iface_reg_2); + snd_soc_component_update_bits(component, AIC32X4_IFACE3, +- AIC32X4_BCLKINV_MASK, iface_reg_3); ++ AIC32X4_BCLKINV_MASK, iface_reg_3); + + return 0; + } +@@ -717,6 +717,11 @@ static int aic32x4_setup_clocks(struct s + unsigned int parent_rate) + { + int i; ++ int ret; ++ ++ struct clk_bulk_data clocks[] = { ++ { .id = "pll" }, ++ }; + + i = aic32x4_get_divs(parent_rate, sample_rate); + if (i < 0) { +@@ -724,39 +729,29 @@ static int aic32x4_setup_clocks(struct s + return i; + } + ++ ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); ++ if (ret) ++ return ret; ++ ++ clk_set_rate(clocks[0].clk, sample_rate); ++ + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + +- /* MCLK as PLL_CLKIN */ +- snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_PLL_CLKIN_MASK, +- AIC32X4_PLL_CLKIN_MCLK << AIC32X4_PLL_CLKIN_SHIFT); + /* PLL as CODEC_CLKIN */ +- snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_CODEC_CLKIN_MASK, +- AIC32X4_CODEC_CLKIN_PLL << AIC32X4_CODEC_CLKIN_SHIFT); ++ snd_soc_component_update_bits(component, AIC32X4_CLKMUX, ++ AIC32X4_CODEC_CLKIN_MASK, ++ AIC32X4_CODEC_CLKIN_PLL << AIC32X4_CODEC_CLKIN_SHIFT); + /* DAC_MOD_CLK as BDIV_CLKIN */ + snd_soc_component_update_bits(component, AIC32X4_IFACE3, AIC32X4_BDIVCLK_MASK, +- AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); +- +- /* We will fix R value to 1 and will make P & J=K.D as variable */ +- snd_soc_component_update_bits(component, AIC32X4_PLLPR, AIC32X4_PLL_R_MASK, 0x01); +- +- /* PLL P value */ +- snd_soc_component_update_bits(component, AIC32X4_PLLPR, AIC32X4_PLL_P_MASK, +- aic32x4_divs[i].p_val << AIC32X4_PLL_P_SHIFT); +- +- /* PLL J value */ +- snd_soc_component_write(component, AIC32X4_PLLJ, aic32x4_divs[i].pll_j); +- +- /* PLL D value */ +- snd_soc_component_write(component, AIC32X4_PLLDMSB, (aic32x4_divs[i].pll_d >> 8)); +- snd_soc_component_write(component, AIC32X4_PLLDLSB, (aic32x4_divs[i].pll_d & 0xff)); ++ AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); + + /* NDAC divider value */ + snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDAC_MASK, aic32x4_divs[i].ndac); ++ AIC32X4_NDAC_MASK, aic32x4_divs[i].ndac); + + /* MDAC divider value */ + snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDAC_MASK, aic32x4_divs[i].mdac); ++ AIC32X4_MDAC_MASK, aic32x4_divs[i].mdac); + + /* DOSR MSB & LSB values */ + snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); +@@ -764,18 +759,18 @@ static int aic32x4_setup_clocks(struct s + + /* NADC divider value */ + snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADC_MASK, aic32x4_divs[i].nadc); ++ AIC32X4_NADC_MASK, aic32x4_divs[i].nadc); + + /* MADC divider value */ + snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADC_MASK, aic32x4_divs[i].madc); ++ AIC32X4_MADC_MASK, aic32x4_divs[i].madc); + + /* AOSR value */ + snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); + + /* BCLK N divider */ + snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); ++ AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); + + return 0; + } +@@ -794,23 +789,23 @@ static int aic32x4_hw_params(struct snd_ + switch (params_width(params)) { + case 16: + iface1_reg |= (AIC32X4_WORD_LEN_16BITS << +- AIC32X4_IFACE1_DATALEN_SHIFT); ++ AIC32X4_IFACE1_DATALEN_SHIFT); + break; + case 20: + iface1_reg |= (AIC32X4_WORD_LEN_20BITS << +- AIC32X4_IFACE1_DATALEN_SHIFT); ++ AIC32X4_IFACE1_DATALEN_SHIFT); + break; + case 24: + iface1_reg |= (AIC32X4_WORD_LEN_24BITS << +- AIC32X4_IFACE1_DATALEN_SHIFT); ++ AIC32X4_IFACE1_DATALEN_SHIFT); + break; + case 32: + iface1_reg |= (AIC32X4_WORD_LEN_32BITS << +- AIC32X4_IFACE1_DATALEN_SHIFT); ++ AIC32X4_IFACE1_DATALEN_SHIFT); + break; + } + snd_soc_component_update_bits(component, AIC32X4_IFACE1, +- AIC32X4_IFACE1_DATALEN_MASK, iface1_reg); ++ AIC32X4_IFACE1_DATALEN_MASK, iface1_reg); + + if (params_channels(params) == 1) { + dacsetup_reg = AIC32X4_RDAC2LCHN | AIC32X4_LDAC2LCHN; +@@ -821,7 +816,7 @@ static int aic32x4_hw_params(struct snd_ + dacsetup_reg = AIC32X4_LDAC2LCHN | AIC32X4_RDAC2RCHN; + } + snd_soc_component_update_bits(component, AIC32X4_DACSETUP, +- AIC32X4_DAC_CHAN_MASK, dacsetup_reg); ++ AIC32X4_DAC_CHAN_MASK, dacsetup_reg); + + return 0; + } +@@ -831,7 +826,7 @@ static int aic32x4_mute(struct snd_soc_d + struct snd_soc_component *component = dai->component; + + snd_soc_component_update_bits(component, AIC32X4_DACMUTE, +- AIC32X4_MUTEON, mute ? AIC32X4_MUTEON : 0); ++ AIC32X4_MUTEON, mute ? AIC32X4_MUTEON : 0); + + return 0; + } +@@ -853,27 +848,27 @@ static int aic32x4_set_bias_level(struct + + /* Switch on PLL */ + snd_soc_component_update_bits(component, AIC32X4_PLLPR, +- AIC32X4_PLLEN, AIC32X4_PLLEN); ++ AIC32X4_PLLEN, AIC32X4_PLLEN); + + /* Switch on NDAC Divider */ + snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDACEN, AIC32X4_NDACEN); ++ AIC32X4_NDACEN, AIC32X4_NDACEN); + + /* Switch on MDAC Divider */ + snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDACEN, AIC32X4_MDACEN); ++ AIC32X4_MDACEN, AIC32X4_MDACEN); + + /* Switch on NADC Divider */ + snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADCEN, AIC32X4_NADCEN); ++ AIC32X4_NADCEN, AIC32X4_NADCEN); + + /* Switch on MADC Divider */ + snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADCEN, AIC32X4_MADCEN); ++ AIC32X4_MADCEN, AIC32X4_MADCEN); + + /* Switch on BCLK_N Divider */ + snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLKEN, AIC32X4_BCLKEN); ++ AIC32X4_BCLKEN, AIC32X4_BCLKEN); + break; + case SND_SOC_BIAS_PREPARE: + break; +@@ -884,27 +879,27 @@ static int aic32x4_set_bias_level(struct + + /* Switch off BCLK_N Divider */ + snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLKEN, 0); ++ AIC32X4_BCLKEN, 0); + + /* Switch off MADC Divider */ + snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADCEN, 0); ++ AIC32X4_MADCEN, 0); + + /* Switch off NADC Divider */ + snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADCEN, 0); ++ AIC32X4_NADCEN, 0); + + /* Switch off MDAC Divider */ + snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDACEN, 0); ++ AIC32X4_MDACEN, 0); + + /* Switch off NDAC Divider */ + snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDACEN, 0); ++ AIC32X4_NDACEN, 0); + + /* Switch off PLL */ + snd_soc_component_update_bits(component, AIC32X4_PLLPR, +- AIC32X4_PLLEN, 0); ++ AIC32X4_PLLEN, 0); + + /* Switch off master clock */ + clk_disable_unprepare(aic32x4->mclk); +@@ -916,7 +911,7 @@ static int aic32x4_set_bias_level(struct + } + + #define AIC32X4_RATES SNDRV_PCM_RATE_8000_96000 +-#define AIC32X4_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ ++#define AIC32X4_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + + static const struct snd_soc_dai_ops aic32x4_ops = { +@@ -929,17 +924,17 @@ static const struct snd_soc_dai_ops aic3 + static struct snd_soc_dai_driver aic32x4_dai = { + .name = "tlv320aic32x4-hifi", + .playback = { +- .stream_name = "Playback", +- .channels_min = 1, +- .channels_max = 2, +- .rates = AIC32X4_RATES, +- .formats = AIC32X4_FORMATS,}, ++ .stream_name = "Playback", ++ .channels_min = 1, ++ .channels_max = 2, ++ .rates = AIC32X4_RATES, ++ .formats = AIC32X4_FORMATS,}, + .capture = { +- .stream_name = "Capture", +- .channels_min = 1, +- .channels_max = 2, +- .rates = AIC32X4_RATES, +- .formats = AIC32X4_FORMATS,}, ++ .stream_name = "Capture", ++ .channels_min = 1, ++ .channels_max = 2, ++ .rates = AIC32X4_RATES, ++ .formats = AIC32X4_FORMATS,}, + .ops = &aic32x4_ops, + .symmetric_rates = 1, + }; +@@ -952,7 +947,7 @@ static void aic32x4_setup_gpios(struct s + /* MFP1 */ + if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) { + snd_soc_component_write(component, AIC32X4_DINCTL, +- aic32x4->setup->gpio_func[0]); ++ aic32x4->setup->gpio_func[0]); + snd_soc_add_component_controls(component, aic32x4_mfp1, + ARRAY_SIZE(aic32x4_mfp1)); + } +@@ -960,7 +955,7 @@ static void aic32x4_setup_gpios(struct s + /* MFP2 */ + if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) { + snd_soc_component_write(component, AIC32X4_DOUTCTL, +- aic32x4->setup->gpio_func[1]); ++ aic32x4->setup->gpio_func[1]); + snd_soc_add_component_controls(component, aic32x4_mfp2, + ARRAY_SIZE(aic32x4_mfp2)); + } +@@ -968,7 +963,7 @@ static void aic32x4_setup_gpios(struct s + /* MFP3 */ + if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) { + snd_soc_component_write(component, AIC32X4_SCLKCTL, +- aic32x4->setup->gpio_func[2]); ++ aic32x4->setup->gpio_func[2]); + snd_soc_add_component_controls(component, aic32x4_mfp3, + ARRAY_SIZE(aic32x4_mfp3)); + } +@@ -976,7 +971,7 @@ static void aic32x4_setup_gpios(struct s + /* MFP4 */ + if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) { + snd_soc_component_write(component, AIC32X4_MISOCTL, +- aic32x4->setup->gpio_func[3]); ++ aic32x4->setup->gpio_func[3]); + snd_soc_add_component_controls(component, aic32x4_mfp4, + ARRAY_SIZE(aic32x4_mfp4)); + } +@@ -984,7 +979,7 @@ static void aic32x4_setup_gpios(struct s + /* MFP5 */ + if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) { + snd_soc_component_write(component, AIC32X4_GPIOCTL, +- aic32x4->setup->gpio_func[4]); ++ aic32x4->setup->gpio_func[4]); + snd_soc_add_component_controls(component, aic32x4_mfp5, + ARRAY_SIZE(aic32x4_mfp5)); + } +@@ -1007,8 +1002,8 @@ static int aic32x4_component_probe(struc + + /* Power platform configuration */ + if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { +- snd_soc_component_write(component, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN | +- AIC32X4_MICBIAS_2075V); ++ snd_soc_component_write(component, AIC32X4_MICBIAS, ++ AIC32X4_MICBIAS_LDOIN | AIC32X4_MICBIAS_2075V); + } + if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) + snd_soc_component_write(component, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE); +@@ -1071,12 +1066,18 @@ static int aic32x4_parse_dt(struct aic32 + struct device_node *np) + { + struct aic32x4_setup_data *aic32x4_setup; ++ int ret; + + aic32x4_setup = devm_kzalloc(aic32x4->dev, sizeof(*aic32x4_setup), + GFP_KERNEL); + if (!aic32x4_setup) + return -ENOMEM; + ++ ret = of_property_match_string(np, "clock-names", "mclk"); ++ if (ret < 0) ++ return -EINVAL; ++ aic32x4->mclk_name = of_clk_get_parent_name(np, ret); ++ + aic32x4->swapdacs = false; + aic32x4->micpga_routing = 0; + aic32x4->rstn_gpio = of_get_named_gpio(np, "reset-gpios", 0); +@@ -1198,7 +1199,7 @@ int aic32x4_probe(struct device *dev, st + return PTR_ERR(regmap); + + aic32x4 = devm_kzalloc(dev, sizeof(struct aic32x4_priv), +- GFP_KERNEL); ++ GFP_KERNEL); + if (aic32x4 == NULL) + return -ENOMEM; + +@@ -1210,6 +1211,7 @@ int aic32x4_probe(struct device *dev, st + aic32x4->swapdacs = pdata->swapdacs; + aic32x4->micpga_routing = pdata->micpga_routing; + aic32x4->rstn_gpio = pdata->rstn_gpio; ++ aic32x4->mclk_name = "mclk"; + } else if (np) { + ret = aic32x4_parse_dt(aic32x4, np); + if (ret) { +@@ -1221,6 +1223,7 @@ int aic32x4_probe(struct device *dev, st + aic32x4->swapdacs = false; + aic32x4->micpga_routing = 0; + aic32x4->rstn_gpio = -1; ++ aic32x4->mclk_name = "mclk"; + } + + aic32x4->mclk = devm_clk_get(dev, "mclk"); +@@ -1229,6 +1232,10 @@ int aic32x4_probe(struct device *dev, st + return PTR_ERR(aic32x4->mclk); + } + ++ ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); ++ if (ret) ++ return ret; ++ + if (gpio_is_valid(aic32x4->rstn_gpio)) { + ret = devm_gpio_request_one(dev, aic32x4->rstn_gpio, + GPIOF_OUT_INIT_LOW, "tlv320aic32x4 rstn"); +--- a/sound/soc/codecs/tlv320aic32x4.h ++++ b/sound/soc/codecs/tlv320aic32x4.h +@@ -16,6 +16,7 @@ struct regmap_config; + extern const struct regmap_config aic32x4_regmap_config; + int aic32x4_probe(struct device *dev, struct regmap *regmap); + int aic32x4_remove(struct device *dev); ++int aic32x4_register_clocks(struct device *dev, const char *mclk_name); + + /* tlv320aic32x4 register space (in decimal to match datasheet) */ + +@@ -205,4 +206,8 @@ int aic32x4_remove(struct device *dev); + #define AIC32X4_RMICPGANIN_IN1L_10K 0x10 + #define AIC32X4_RMICPGANIN_CM1R_10K 0x40 + ++/* Clock Limits */ ++#define AIC32X4_MAX_PLL_CLKIN 20000000 ++ ++ + #endif /* _TLV320AIC32X4_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0406-ASoC-tlv320aic32x4-Model-CODEC_CLKIN-in-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0406-ASoC-tlv320aic32x4-Model-CODEC_CLKIN-in-CCF.patch new file mode 100644 index 000000000..b8797fe3d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0406-ASoC-tlv320aic32x4-Model-CODEC_CLKIN-in-CCF.patch @@ -0,0 +1,120 @@ +From f0192af931c8aea25440c014b9a995a3bf1a5363 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:46 -0700 +Subject: [PATCH 406/703] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF + +commit fd2df3aeafa4b4cc468d58e147e0822967034b71 upstream. + +Model and manage codec clock input as a component in the Core +Clock Framework. This should allow us to do some more complex +clock management and power control. Also, some of the +on-board chip clocks can be exposed to the outside, and this +change will make those clocks easier to consume by other +parts of the kernel. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4-clk.c | 34 ++++++++++++++++++++++++++++ + sound/soc/codecs/tlv320aic32x4.c | 18 +++++++++++---- + 2 files changed, 47 insertions(+), 5 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4-clk.c ++++ b/sound/soc/codecs/tlv320aic32x4-clk.c +@@ -265,6 +265,30 @@ static const struct clk_ops aic32x4_pll_ + .get_parent = clk_aic32x4_pll_get_parent, + }; + ++static int clk_aic32x4_codec_clkin_set_parent(struct clk_hw *hw, u8 index) ++{ ++ struct clk_aic32x4 *mux = to_clk_aic32x4(hw); ++ ++ return regmap_update_bits(mux->regmap, ++ AIC32X4_CLKMUX, ++ AIC32X4_CODEC_CLKIN_MASK, index << AIC32X4_CODEC_CLKIN_SHIFT); ++} ++ ++static u8 clk_aic32x4_codec_clkin_get_parent(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *mux = to_clk_aic32x4(hw); ++ unsigned int val; ++ ++ regmap_read(mux->regmap, AIC32X4_CLKMUX, &val); ++ ++ return (val & AIC32X4_CODEC_CLKIN_MASK) >> AIC32X4_CODEC_CLKIN_SHIFT; ++} ++ ++static const struct clk_ops aic32x4_codec_clkin_ops = { ++ .set_parent = clk_aic32x4_codec_clkin_set_parent, ++ .get_parent = clk_aic32x4_codec_clkin_get_parent, ++}; ++ + static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { + { + .name = "pll", +@@ -274,6 +298,14 @@ static struct aic32x4_clkdesc aic32x4_cl + .ops = &aic32x4_pll_ops, + .reg = 0, + }, ++ { ++ .name = "codec_clkin", ++ .parent_names = ++ (const char *[]) { "mclk", "bclk", "gpio", "pll" }, ++ .num_parents = 4, ++ .ops = &aic32x4_codec_clkin_ops, ++ .reg = 0, ++ }, + }; + + static struct clk *aic32x4_register_clk(struct device *dev, +@@ -314,6 +346,8 @@ int aic32x4_register_clocks(struct devic + */ + aic32x4_clkdesc_array[0].parent_names = + (const char* []) { mclk_name, "bclk", "gpio", "din" }; ++ aic32x4_clkdesc_array[1].parent_names = ++ (const char *[]) { mclk_name, "bclk", "gpio", "pll" }; + + for (i = 0; i < ARRAY_SIZE(aic32x4_clkdesc_array); ++i) + aic32x4_register_clk(dev, &aic32x4_clkdesc_array[i]); +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -737,12 +737,9 @@ static int aic32x4_setup_clocks(struct s + + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + +- /* PLL as CODEC_CLKIN */ +- snd_soc_component_update_bits(component, AIC32X4_CLKMUX, +- AIC32X4_CODEC_CLKIN_MASK, +- AIC32X4_CODEC_CLKIN_PLL << AIC32X4_CODEC_CLKIN_SHIFT); + /* DAC_MOD_CLK as BDIV_CLKIN */ +- snd_soc_component_update_bits(component, AIC32X4_IFACE3, AIC32X4_BDIVCLK_MASK, ++ snd_soc_component_update_bits(component, AIC32X4_IFACE3, ++ AIC32X4_BDIVCLK_MASK, + AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); + + /* NDAC divider value */ +@@ -989,6 +986,15 @@ static int aic32x4_component_probe(struc + { + struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); + u32 tmp_reg; ++ int ret; ++ ++ struct clk_bulk_data clocks[] = { ++ { .id = "codec_clkin" }, ++ }; ++ ++ ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); ++ if (ret) ++ return ret; + + if (gpio_is_valid(aic32x4->rstn_gpio)) { + ndelay(10); +@@ -1000,6 +1006,8 @@ static int aic32x4_component_probe(struc + if (aic32x4->setup) + aic32x4_setup_gpios(component); + ++ clk_set_parent(clocks[0].clk, clocks[1].clk); ++ + /* Power platform configuration */ + if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { + snd_soc_component_write(component, AIC32X4_MICBIAS, diff --git a/target/linux/brcm2708/patches-4.19/950-0407-ASoC-tlv320aic32x4-Model-DAC-ADC-dividers-in-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0407-ASoC-tlv320aic32x4-Model-DAC-ADC-dividers-in-CCF.patch new file mode 100644 index 000000000..a4c3e1c0f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0407-ASoC-tlv320aic32x4-Model-DAC-ADC-dividers-in-CCF.patch @@ -0,0 +1,306 @@ +From 532403e3a16502340711131fd075cd7dd4dd20b1 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:47 -0700 +Subject: [PATCH 407/703] ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF + +commit a51b50062091619915c5155085bbe13a7aca6903 upstream. + +Model and manage DAC/ADC dividers as components in the Core +Clock Framework. This should allow us to do some more complex +clock management and power control. Also, some of the +on-board chip clocks can be exposed to the outside, and this +change will make those clocks easier to consume by other +parts of the kernel. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4-clk.c | 90 ++++++++++++++++++++++++ + sound/soc/codecs/tlv320aic32x4.c | 101 +++++++++++++++------------ + sound/soc/codecs/tlv320aic32x4.h | 4 ++ + 3 files changed, 151 insertions(+), 44 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4-clk.c ++++ b/sound/soc/codecs/tlv320aic32x4-clk.c +@@ -289,6 +289,68 @@ static const struct clk_ops aic32x4_code + .get_parent = clk_aic32x4_codec_clkin_get_parent, + }; + ++static int clk_aic32x4_div_prepare(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *div = to_clk_aic32x4(hw); ++ ++ return regmap_update_bits(div->regmap, div->reg, ++ AIC32X4_DIVEN, AIC32X4_DIVEN); ++} ++ ++static void clk_aic32x4_div_unprepare(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *div = to_clk_aic32x4(hw); ++ ++ regmap_update_bits(div->regmap, div->reg, ++ AIC32X4_DIVEN, 0); ++} ++ ++static int clk_aic32x4_div_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct clk_aic32x4 *div = to_clk_aic32x4(hw); ++ u8 divisor; ++ ++ divisor = DIV_ROUND_UP(parent_rate, rate); ++ if (divisor > 128) ++ return -EINVAL; ++ ++ return regmap_update_bits(div->regmap, div->reg, ++ AIC32X4_DIV_MASK, divisor); ++} ++ ++static long clk_aic32x4_div_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ unsigned long divisor; ++ ++ divisor = DIV_ROUND_UP(*parent_rate, rate); ++ if (divisor > 128) ++ return -EINVAL; ++ ++ return DIV_ROUND_UP(*parent_rate, divisor); ++} ++ ++static unsigned long clk_aic32x4_div_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct clk_aic32x4 *div = to_clk_aic32x4(hw); ++ ++ unsigned int val; ++ ++ regmap_read(div->regmap, div->reg, &val); ++ ++ return DIV_ROUND_UP(parent_rate, val & AIC32X4_DIV_MASK); ++} ++ ++static const struct clk_ops aic32x4_div_ops = { ++ .prepare = clk_aic32x4_div_prepare, ++ .unprepare = clk_aic32x4_div_unprepare, ++ .set_rate = clk_aic32x4_div_set_rate, ++ .round_rate = clk_aic32x4_div_round_rate, ++ .recalc_rate = clk_aic32x4_div_recalc_rate, ++}; ++ + static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { + { + .name = "pll", +@@ -306,6 +368,34 @@ static struct aic32x4_clkdesc aic32x4_cl + .ops = &aic32x4_codec_clkin_ops, + .reg = 0, + }, ++ { ++ .name = "ndac", ++ .parent_names = (const char * []) { "codec_clkin" }, ++ .num_parents = 1, ++ .ops = &aic32x4_div_ops, ++ .reg = AIC32X4_NDAC, ++ }, ++ { ++ .name = "mdac", ++ .parent_names = (const char * []) { "ndac" }, ++ .num_parents = 1, ++ .ops = &aic32x4_div_ops, ++ .reg = AIC32X4_MDAC, ++ }, ++ { ++ .name = "nadc", ++ .parent_names = (const char * []) { "codec_clkin" }, ++ .num_parents = 1, ++ .ops = &aic32x4_div_ops, ++ .reg = AIC32X4_NADC, ++ }, ++ { ++ .name = "madc", ++ .parent_names = (const char * []) { "nadc" }, ++ .num_parents = 1, ++ .ops = &aic32x4_div_ops, ++ .reg = AIC32X4_MADC, ++ }, + }; + + static struct clk *aic32x4_register_clk(struct device *dev, +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -52,11 +52,11 @@ struct aic32x4_rate_divs { + u32 rate; + unsigned long pll_rate; + u16 dosr; +- u8 ndac; +- u8 mdac; ++ unsigned long ndac_rate; ++ unsigned long mdac_rate; + u8 aosr; +- u8 nadc; +- u8 madc; ++ unsigned long nadc_rate; ++ unsigned long madc_rate; + u8 blck_N; + u8 r_block; + u8 p_block; +@@ -309,34 +309,54 @@ static const struct snd_kcontrol_new aic + + static const struct aic32x4_rate_divs aic32x4_divs[] = { + /* 8k rate */ +- { 12000000, 8000, 57120000, 768, 5, 3, 128, 5, 18, 24, 1, 1 }, +- { 24000000, 8000, 57120000, 768, 15, 1, 64, 45, 4, 24, 1, 1 }, +- { 25000000, 8000, 32620000, 768, 15, 1, 64, 45, 4, 24, 1, 1 }, ++ { 12000000, 8000, 57120000, 768, 18432000, 6144000, 128, 18432000, ++ 1024000, 24, 1, 1 }, ++ { 24000000, 8000, 57120000, 768, 6144000, 6144000, 64, 2048000, ++ 512000, 24, 1, 1 }, ++ { 25000000, 8000, 32620000, 768, 6144000, 6144000, 64, 2048000, ++ 512000, 24, 1, 1 }, + /* 11.025k rate */ +- { 12000000, 11025, 44217600, 512, 8, 2, 128, 8, 8, 16, 1, 1 }, +- { 24000000, 11025, 44217600, 512, 16, 1, 64, 32, 4, 16, 1, 1 }, ++ { 12000000, 11025, 44217600, 512, 11289600, 5644800, 128, 11289600, ++ 1411200, 16, 1, 1 }, ++ { 24000000, 11025, 44217600, 512, 5644800, 5644800, 64, 2822400, ++ 705600, 16, 1, 1 }, + /* 16k rate */ +- { 12000000, 16000, 57120000, 384, 5, 3, 128, 5, 9, 12, 1, 1 }, +- { 24000000, 16000, 57120000, 384, 15, 1, 64, 18, 5, 12, 1, 1 }, +- { 25000000, 16000, 32620000, 384, 15, 1, 64, 18, 5, 12, 1, 1 }, ++ { 12000000, 16000, 57120000, 384, 18432000, 6144000, 128, 18432000, ++ 2048000, 12, 1, 1 }, ++ { 24000000, 16000, 57120000, 384, 6144000, 6144000, 64, 5120000, ++ 1024000, 12, 1, 1 }, ++ { 25000000, 16000, 32620000, 384, 6144000, 6144000, 64, 5120000, ++ 1024000, 12, 1, 1 }, + /* 22.05k rate */ +- { 12000000, 22050, 44217600, 256, 4, 4, 128, 4, 8, 8, 1, 1 }, +- { 24000000, 22050, 44217600, 256, 16, 1, 64, 16, 4, 8, 1, 1 }, +- { 25000000, 22050, 19713750, 256, 16, 1, 64, 16, 4, 8, 1, 1 }, ++ { 12000000, 22050, 44217600, 256, 22579200, 5644800, 128, 22579200, ++ 2822400, 8, 1, 1 }, ++ { 24000000, 22050, 44217600, 256, 5644800, 5644800, 64, 5644800, ++ 1411200, 8, 1, 1 }, ++ { 25000000, 22050, 19713750, 256, 5644800, 5644800, 64, 5644800, ++ 1411200, 8, 1, 1 }, + /* 32k rate */ +- { 12000000, 32000, 14112000, 192, 2, 7, 64, 2, 21, 6, 1, 1 }, +- { 24000000, 32000, 14112000, 192, 7, 2, 64, 7, 6, 6, 1, 1 }, ++ { 12000000, 32000, 14112000, 192, 43008000, 6144000, 64, 43008000, ++ 2048000, 6, 1, 1 }, ++ { 24000000, 32000, 14112000, 192, 12288000, 6144000, 64, 12288000, ++ 2048000, 6, 1, 1 }, + /* 44.1k rate */ +- { 12000000, 44100, 44217600, 128, 2, 8, 128, 2, 8, 4, 1, 1 }, +- { 24000000, 44100, 44217600, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, +- { 25000000, 44100, 19713750, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, ++ { 12000000, 44100, 44217600, 128, 45158400, 5644800, 128, 45158400, ++ 5644800, 4, 1, 1 }, ++ { 24000000, 44100, 44217600, 128, 11289600, 5644800, 64, 11289600, ++ 2822400, 4, 1, 1 }, ++ { 25000000, 44100, 19713750, 128, 11289600, 5644800, 64, 11289600, ++ 2822400, 4, 1, 1 }, + /* 48k rate */ +- { 12000000, 48000, 18432000, 128, 2, 8, 128, 2, 8, 4, 1, 1 }, +- { 24000000, 48000, 18432000, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, +- { 25000000, 48000, 75626250, 128, 8, 2, 64, 8, 4, 4, 1, 1 }, ++ { 12000000, 48000, 18432000, 128, 49152000, 6144000, 128, 49152000, ++ 6144000, 4, 1, 1 }, ++ { 24000000, 48000, 18432000, 128, 12288000, 6144000, 64, 12288000, ++ 3072000, 4, 1, 1 }, ++ { 25000000, 48000, 75626250, 128, 12288000, 6144000, 64, 12288000, ++ 3072000, 4, 1, 1 }, + + /* 96k rate */ +- { 25000000, 96000, 75626250, 64, 4, 4, 64, 4, 4, 1, 1, 9 }, ++ { 25000000, 96000, 75626250, 64, 24576000, 6144000, 64, 24576000, ++ 6144000, 1, 1, 9 }, + }; + + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { +@@ -721,6 +741,10 @@ static int aic32x4_setup_clocks(struct s + + struct clk_bulk_data clocks[] = { + { .id = "pll" }, ++ { .id = "nadc" }, ++ { .id = "madc" }, ++ { .id = "ndac" }, ++ { .id = "mdac" }, + }; + + i = aic32x4_get_divs(parent_rate, sample_rate); +@@ -733,7 +757,11 @@ static int aic32x4_setup_clocks(struct s + if (ret) + return ret; + +- clk_set_rate(clocks[0].clk, sample_rate); ++ clk_set_rate(clocks[0].clk, aic32x4_divs[i].pll_rate); ++ clk_set_rate(clocks[1].clk, aic32x4_divs[i].nadc_rate); ++ clk_set_rate(clocks[2].clk, aic32x4_divs[i].madc_rate); ++ clk_set_rate(clocks[3].clk, aic32x4_divs[i].ndac_rate); ++ clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); + + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + +@@ -742,26 +770,10 @@ static int aic32x4_setup_clocks(struct s + AIC32X4_BDIVCLK_MASK, + AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); + +- /* NDAC divider value */ +- snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDAC_MASK, aic32x4_divs[i].ndac); +- +- /* MDAC divider value */ +- snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDAC_MASK, aic32x4_divs[i].mdac); +- + /* DOSR MSB & LSB values */ + snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); + snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff)); + +- /* NADC divider value */ +- snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADC_MASK, aic32x4_divs[i].nadc); +- +- /* MADC divider value */ +- snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADC_MASK, aic32x4_divs[i].madc); +- + /* AOSR value */ + snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); + +@@ -773,8 +785,8 @@ static int aic32x4_setup_clocks(struct s + } + + static int aic32x4_hw_params(struct snd_pcm_substream *substream, +- struct snd_pcm_hw_params *params, +- struct snd_soc_dai *dai) ++ struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) + { + struct snd_soc_component *component = dai->component; + struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); +@@ -989,7 +1001,8 @@ static int aic32x4_component_probe(struc + int ret; + + struct clk_bulk_data clocks[] = { +- { .id = "codec_clkin" }, ++ { .id = "codec_clkin" }, ++ { .id = "pll" }, + }; + + ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); +--- a/sound/soc/codecs/tlv320aic32x4.h ++++ b/sound/soc/codecs/tlv320aic32x4.h +@@ -206,6 +206,10 @@ int aic32x4_register_clocks(struct devic + #define AIC32X4_RMICPGANIN_IN1L_10K 0x10 + #define AIC32X4_RMICPGANIN_CM1R_10K 0x40 + ++/* Common mask and enable for all of the dividers */ ++#define AIC32X4_DIVEN BIT(7) ++#define AIC32X4_DIV_MASK GENMASK(6, 0) ++ + /* Clock Limits */ + #define AIC32X4_MAX_PLL_CLKIN 20000000 + diff --git a/target/linux/brcm2708/patches-4.19/950-0408-ASoC-tlv320aic32x4-Model-BDIV-divider-in-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0408-ASoC-tlv320aic32x4-Model-BDIV-divider-in-CCF.patch new file mode 100644 index 000000000..41e5e4bfd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0408-ASoC-tlv320aic32x4-Model-BDIV-divider-in-CCF.patch @@ -0,0 +1,210 @@ +From f057c2ccc9c5fddca55fb42032395cf355f918e8 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:48 -0700 +Subject: [PATCH 408/703] ASoC: tlv320aic32x4: Model BDIV divider in CCF + +commit 9b484124ebd906c4d6bc826cc0d417e80cc1105c upstream. + +Model and manage BDIV divider as components in the Core +Clock Framework. This should allow us to do some more complex +clock management and power control. Also, some of the +on-board chip clocks can be exposed to the outside, and this +change will make those clocks easier to consume by other +parts of the kernel. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4-clk.c | 36 ++++++++++++++++++ + sound/soc/codecs/tlv320aic32x4.c | 56 +++++++++++++--------------- + 2 files changed, 62 insertions(+), 30 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4-clk.c ++++ b/sound/soc/codecs/tlv320aic32x4-clk.c +@@ -351,6 +351,34 @@ static const struct clk_ops aic32x4_div_ + .recalc_rate = clk_aic32x4_div_recalc_rate, + }; + ++static int clk_aic32x4_bdiv_set_parent(struct clk_hw *hw, u8 index) ++{ ++ struct clk_aic32x4 *mux = to_clk_aic32x4(hw); ++ ++ return regmap_update_bits(mux->regmap, AIC32X4_IFACE3, ++ AIC32X4_BDIVCLK_MASK, index); ++} ++ ++static u8 clk_aic32x4_bdiv_get_parent(struct clk_hw *hw) ++{ ++ struct clk_aic32x4 *mux = to_clk_aic32x4(hw); ++ unsigned int val; ++ ++ regmap_read(mux->regmap, AIC32X4_IFACE3, &val); ++ ++ return val & AIC32X4_BDIVCLK_MASK; ++} ++ ++static const struct clk_ops aic32x4_bdiv_ops = { ++ .prepare = clk_aic32x4_div_prepare, ++ .unprepare = clk_aic32x4_div_unprepare, ++ .set_parent = clk_aic32x4_bdiv_set_parent, ++ .get_parent = clk_aic32x4_bdiv_get_parent, ++ .set_rate = clk_aic32x4_div_set_rate, ++ .round_rate = clk_aic32x4_div_round_rate, ++ .recalc_rate = clk_aic32x4_div_recalc_rate, ++}; ++ + static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = { + { + .name = "pll", +@@ -396,6 +424,14 @@ static struct aic32x4_clkdesc aic32x4_cl + .ops = &aic32x4_div_ops, + .reg = AIC32X4_MADC, + }, ++ { ++ .name = "bdiv", ++ .parent_names = ++ (const char *[]) { "ndac", "mdac", "nadc", "madc" }, ++ .num_parents = 4, ++ .ops = &aic32x4_bdiv_ops, ++ .reg = AIC32X4_BCLKN, ++ }, + }; + + static struct clk *aic32x4_register_clk(struct device *dev, +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -57,7 +57,7 @@ struct aic32x4_rate_divs { + u8 aosr; + unsigned long nadc_rate; + unsigned long madc_rate; +- u8 blck_N; ++ unsigned long bdiv_rate; + u8 r_block; + u8 p_block; + }; +@@ -310,53 +310,53 @@ static const struct snd_kcontrol_new aic + static const struct aic32x4_rate_divs aic32x4_divs[] = { + /* 8k rate */ + { 12000000, 8000, 57120000, 768, 18432000, 6144000, 128, 18432000, +- 1024000, 24, 1, 1 }, ++ 1024000, 256000, 1, 1 }, + { 24000000, 8000, 57120000, 768, 6144000, 6144000, 64, 2048000, +- 512000, 24, 1, 1 }, ++ 512000, 256000, 1, 1 }, + { 25000000, 8000, 32620000, 768, 6144000, 6144000, 64, 2048000, +- 512000, 24, 1, 1 }, ++ 512000, 256000, 1, 1 }, + /* 11.025k rate */ + { 12000000, 11025, 44217600, 512, 11289600, 5644800, 128, 11289600, +- 1411200, 16, 1, 1 }, ++ 1411200, 352800, 1, 1 }, + { 24000000, 11025, 44217600, 512, 5644800, 5644800, 64, 2822400, +- 705600, 16, 1, 1 }, ++ 705600, 352800, 1, 1 }, + /* 16k rate */ + { 12000000, 16000, 57120000, 384, 18432000, 6144000, 128, 18432000, +- 2048000, 12, 1, 1 }, ++ 2048000, 512000, 1, 1 }, + { 24000000, 16000, 57120000, 384, 6144000, 6144000, 64, 5120000, +- 1024000, 12, 1, 1 }, ++ 1024000, 512000, 1, 1 }, + { 25000000, 16000, 32620000, 384, 6144000, 6144000, 64, 5120000, +- 1024000, 12, 1, 1 }, ++ 1024000, 512000, 1, 1 }, + /* 22.05k rate */ + { 12000000, 22050, 44217600, 256, 22579200, 5644800, 128, 22579200, +- 2822400, 8, 1, 1 }, ++ 2822400, 705600, 1, 1 }, + { 24000000, 22050, 44217600, 256, 5644800, 5644800, 64, 5644800, +- 1411200, 8, 1, 1 }, ++ 1411200, 705600, 1, 1 }, + { 25000000, 22050, 19713750, 256, 5644800, 5644800, 64, 5644800, +- 1411200, 8, 1, 1 }, ++ 1411200, 705600, 1, 1 }, + /* 32k rate */ + { 12000000, 32000, 14112000, 192, 43008000, 6144000, 64, 43008000, +- 2048000, 6, 1, 1 }, ++ 2048000, 1024000, 1, 1 }, + { 24000000, 32000, 14112000, 192, 12288000, 6144000, 64, 12288000, +- 2048000, 6, 1, 1 }, ++ 2048000, 1024000, 1, 1 }, + /* 44.1k rate */ + { 12000000, 44100, 44217600, 128, 45158400, 5644800, 128, 45158400, +- 5644800, 4, 1, 1 }, ++ 5644800, 1411200, 1, 1 }, + { 24000000, 44100, 44217600, 128, 11289600, 5644800, 64, 11289600, +- 2822400, 4, 1, 1 }, ++ 2822400, 1411200, 1, 1 }, + { 25000000, 44100, 19713750, 128, 11289600, 5644800, 64, 11289600, +- 2822400, 4, 1, 1 }, ++ 2822400, 1411200, 1, 1 }, + /* 48k rate */ + { 12000000, 48000, 18432000, 128, 49152000, 6144000, 128, 49152000, +- 6144000, 4, 1, 1 }, ++ 6144000, 1536000, 1, 1 }, + { 24000000, 48000, 18432000, 128, 12288000, 6144000, 64, 12288000, +- 3072000, 4, 1, 1 }, ++ 3072000, 1536000, 1, 1 }, + { 25000000, 48000, 75626250, 128, 12288000, 6144000, 64, 12288000, +- 3072000, 4, 1, 1 }, ++ 3072000, 1536000, 1, 1 }, + + /* 96k rate */ + { 25000000, 96000, 75626250, 64, 24576000, 6144000, 64, 24576000, +- 6144000, 1, 1, 9 }, ++ 6144000, 3072000, 1, 9 }, + }; + + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { +@@ -745,6 +745,7 @@ static int aic32x4_setup_clocks(struct s + { .id = "madc" }, + { .id = "ndac" }, + { .id = "mdac" }, ++ { .id = "bdiv" }, + }; + + i = aic32x4_get_divs(parent_rate, sample_rate); +@@ -762,14 +763,10 @@ static int aic32x4_setup_clocks(struct s + clk_set_rate(clocks[2].clk, aic32x4_divs[i].madc_rate); + clk_set_rate(clocks[3].clk, aic32x4_divs[i].ndac_rate); + clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); ++ clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate); + + aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + +- /* DAC_MOD_CLK as BDIV_CLKIN */ +- snd_soc_component_update_bits(component, AIC32X4_IFACE3, +- AIC32X4_BDIVCLK_MASK, +- AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT); +- + /* DOSR MSB & LSB values */ + snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); + snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff)); +@@ -777,10 +774,6 @@ static int aic32x4_setup_clocks(struct s + /* AOSR value */ + snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); + +- /* BCLK N divider */ +- snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N); +- + return 0; + } + +@@ -1003,6 +996,8 @@ static int aic32x4_component_probe(struc + struct clk_bulk_data clocks[] = { + { .id = "codec_clkin" }, + { .id = "pll" }, ++ { .id = "bdiv" }, ++ { .id = "mdac" }, + }; + + ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); +@@ -1020,6 +1015,7 @@ static int aic32x4_component_probe(struc + aic32x4_setup_gpios(component); + + clk_set_parent(clocks[0].clk, clocks[1].clk); ++ clk_set_parent(clocks[2].clk, clocks[3].clk); + + /* Power platform configuration */ + if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { diff --git a/target/linux/brcm2708/patches-4.19/950-0409-ASoC-tlv320aic32x4-Control-clock-gating-with-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0409-ASoC-tlv320aic32x4-Control-clock-gating-with-CCF.patch new file mode 100644 index 000000000..1f6aed664 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0409-ASoC-tlv320aic32x4-Control-clock-gating-with-CCF.patch @@ -0,0 +1,109 @@ +From eea2c82299034bb146f3ad10e8ed4c2d574777df Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:49 -0700 +Subject: [PATCH 409/703] ASoC: tlv320aic32x4: Control clock gating with CCF + +commit d25970b5fd51e9fcf0afbe190908ea4049454da4 upstream. + +Control the clock gating to the various clock components to use +the CCF. This allows us to prepare_enalbe only 3 clocks and the +relationships assigned to them will cause upstream clockss to +enable automatically. Additionally we can do this in a single +call to the CCF. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 67 +++++++------------------------- + 1 file changed, 13 insertions(+), 54 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -836,41 +836,25 @@ static int aic32x4_mute(struct snd_soc_d + static int aic32x4_set_bias_level(struct snd_soc_component *component, + enum snd_soc_bias_level level) + { +- struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); + int ret; + ++ struct clk_bulk_data clocks[] = { ++ { .id = "madc" }, ++ { .id = "mdac" }, ++ { .id = "bdiv" }, ++ }; ++ ++ ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); ++ if (ret) ++ return ret; ++ + switch (level) { + case SND_SOC_BIAS_ON: +- /* Switch on master clock */ +- ret = clk_prepare_enable(aic32x4->mclk); ++ ret = clk_bulk_prepare_enable(ARRAY_SIZE(clocks), clocks); + if (ret) { +- dev_err(component->dev, "Failed to enable master clock\n"); ++ dev_err(component->dev, "Failed to enable clocks\n"); + return ret; + } +- +- /* Switch on PLL */ +- snd_soc_component_update_bits(component, AIC32X4_PLLPR, +- AIC32X4_PLLEN, AIC32X4_PLLEN); +- +- /* Switch on NDAC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDACEN, AIC32X4_NDACEN); +- +- /* Switch on MDAC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDACEN, AIC32X4_MDACEN); +- +- /* Switch on NADC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADCEN, AIC32X4_NADCEN); +- +- /* Switch on MADC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADCEN, AIC32X4_MADCEN); +- +- /* Switch on BCLK_N Divider */ +- snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLKEN, AIC32X4_BCLKEN); + break; + case SND_SOC_BIAS_PREPARE: + break; +@@ -879,32 +863,7 @@ static int aic32x4_set_bias_level(struct + if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) + break; + +- /* Switch off BCLK_N Divider */ +- snd_soc_component_update_bits(component, AIC32X4_BCLKN, +- AIC32X4_BCLKEN, 0); +- +- /* Switch off MADC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_MADC, +- AIC32X4_MADCEN, 0); +- +- /* Switch off NADC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_NADC, +- AIC32X4_NADCEN, 0); +- +- /* Switch off MDAC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_MDAC, +- AIC32X4_MDACEN, 0); +- +- /* Switch off NDAC Divider */ +- snd_soc_component_update_bits(component, AIC32X4_NDAC, +- AIC32X4_NDACEN, 0); +- +- /* Switch off PLL */ +- snd_soc_component_update_bits(component, AIC32X4_PLLPR, +- AIC32X4_PLLEN, 0); +- +- /* Switch off master clock */ +- clk_disable_unprepare(aic32x4->mclk); ++ clk_bulk_disable_unprepare(ARRAY_SIZE(clocks), clocks); + break; + case SND_SOC_BIAS_OFF: + break; diff --git a/target/linux/brcm2708/patches-4.19/950-0410-ASoC-tlv320aic32x4-Move-aosr-and-dosr-setting-to-sep.patch b/target/linux/brcm2708/patches-4.19/950-0410-ASoC-tlv320aic32x4-Move-aosr-and-dosr-setting-to-sep.patch new file mode 100644 index 000000000..291f107c8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0410-ASoC-tlv320aic32x4-Move-aosr-and-dosr-setting-to-sep.patch @@ -0,0 +1,58 @@ +From d69dddf58047b95c5ade57c246e7d4994d439f23 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:50 -0700 +Subject: [PATCH 410/703] ASoC: tlv320aic32x4: Move aosr and dosr setting to + separate functions + +commit fbafbf6517274a797e6e6508c18dd8dba5920c89 upstream. + +Move these to separate helper functions. This looks cleaner and fits +better with the new clock setting in CCF. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 24 +++++++++++++++++------- + 1 file changed, 17 insertions(+), 7 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -720,6 +720,20 @@ static int aic32x4_set_dai_fmt(struct sn + return 0; + } + ++static int aic32x4_set_aosr(struct snd_soc_component *component, u8 aosr) ++{ ++ return snd_soc_component_write(component, AIC32X4_AOSR, aosr); ++} ++ ++static int aic32x4_set_dosr(struct snd_soc_component *component, u16 dosr) ++{ ++ snd_soc_component_write(component, AIC32X4_DOSRMSB, dosr >> 8); ++ snd_soc_component_write(component, AIC32X4_DOSRLSB, ++ (dosr & 0xff)); ++ ++ return 0; ++} ++ + static int aic32x4_set_processing_blocks(struct snd_soc_component *component, + u8 r_block, u8 p_block) + { +@@ -765,14 +779,10 @@ static int aic32x4_setup_clocks(struct s + clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); + clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate); + +- aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); ++ aic32x4_set_aosr(component, aic32x4_divs[i].aosr); ++ aic32x4_set_dosr(component, aic32x4_divs[i].dosr); + +- /* DOSR MSB & LSB values */ +- snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8); +- snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff)); +- +- /* AOSR value */ +- snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr); ++ aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); + + return 0; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0411-ASoC-tlv320aic32x4-Dynamically-Determine-Clocking.patch b/target/linux/brcm2708/patches-4.19/950-0411-ASoC-tlv320aic32x4-Dynamically-Determine-Clocking.patch new file mode 100644 index 000000000..b31a93c8c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0411-ASoC-tlv320aic32x4-Dynamically-Determine-Clocking.patch @@ -0,0 +1,285 @@ +From 60aee9d4b5857dbefc658ff7b3317cacf568a5d5 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:51 -0700 +Subject: [PATCH 411/703] ASoC: tlv320aic32x4: Dynamically Determine Clocking + +commit 96c3bb00239de4fb5f4ddca42c1f90d6d9b3c697 upstream. + +The existing code uses a static lookup table to determine the +settings of the various clock devices on board the chip. This is +limiting in a couple of ways. First, this doesn't allow for any +master clock rates other than the three that have been +precalculated. Additionally, new sample rates are difficult to +add to the table. Witness that the chip is capable of 192000 Hz +sampling, but it is not provided by this driver. Last, if the +driver is clocked by something that isn't a crystal, the +upstream clock may not be able to achieve exactly the rate +requested in the driver. This will mean that clocking will be +slightly off for the sampling clock or that it won't work at all. + +This patch determines the settings for all of the clocks at +runtime considering the real conditions of the clocks in the +system. The rules for the clocks are in TI's SLAA557 application +guide on pages 37, 51 and 77. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 190 ++++++++++++++----------------- + sound/soc/codecs/tlv320aic32x4.h | 4 +- + 2 files changed, 90 insertions(+), 104 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -47,21 +47,6 @@ + + #include "tlv320aic32x4.h" + +-struct aic32x4_rate_divs { +- u32 mclk; +- u32 rate; +- unsigned long pll_rate; +- u16 dosr; +- unsigned long ndac_rate; +- unsigned long mdac_rate; +- u8 aosr; +- unsigned long nadc_rate; +- unsigned long madc_rate; +- unsigned long bdiv_rate; +- u8 r_block; +- u8 p_block; +-}; +- + struct aic32x4_priv { + struct regmap *regmap; + u32 sysclk; +@@ -307,58 +292,6 @@ static const struct snd_kcontrol_new aic + 0, 0x0F, 0), + }; + +-static const struct aic32x4_rate_divs aic32x4_divs[] = { +- /* 8k rate */ +- { 12000000, 8000, 57120000, 768, 18432000, 6144000, 128, 18432000, +- 1024000, 256000, 1, 1 }, +- { 24000000, 8000, 57120000, 768, 6144000, 6144000, 64, 2048000, +- 512000, 256000, 1, 1 }, +- { 25000000, 8000, 32620000, 768, 6144000, 6144000, 64, 2048000, +- 512000, 256000, 1, 1 }, +- /* 11.025k rate */ +- { 12000000, 11025, 44217600, 512, 11289600, 5644800, 128, 11289600, +- 1411200, 352800, 1, 1 }, +- { 24000000, 11025, 44217600, 512, 5644800, 5644800, 64, 2822400, +- 705600, 352800, 1, 1 }, +- /* 16k rate */ +- { 12000000, 16000, 57120000, 384, 18432000, 6144000, 128, 18432000, +- 2048000, 512000, 1, 1 }, +- { 24000000, 16000, 57120000, 384, 6144000, 6144000, 64, 5120000, +- 1024000, 512000, 1, 1 }, +- { 25000000, 16000, 32620000, 384, 6144000, 6144000, 64, 5120000, +- 1024000, 512000, 1, 1 }, +- /* 22.05k rate */ +- { 12000000, 22050, 44217600, 256, 22579200, 5644800, 128, 22579200, +- 2822400, 705600, 1, 1 }, +- { 24000000, 22050, 44217600, 256, 5644800, 5644800, 64, 5644800, +- 1411200, 705600, 1, 1 }, +- { 25000000, 22050, 19713750, 256, 5644800, 5644800, 64, 5644800, +- 1411200, 705600, 1, 1 }, +- /* 32k rate */ +- { 12000000, 32000, 14112000, 192, 43008000, 6144000, 64, 43008000, +- 2048000, 1024000, 1, 1 }, +- { 24000000, 32000, 14112000, 192, 12288000, 6144000, 64, 12288000, +- 2048000, 1024000, 1, 1 }, +- /* 44.1k rate */ +- { 12000000, 44100, 44217600, 128, 45158400, 5644800, 128, 45158400, +- 5644800, 1411200, 1, 1 }, +- { 24000000, 44100, 44217600, 128, 11289600, 5644800, 64, 11289600, +- 2822400, 1411200, 1, 1 }, +- { 25000000, 44100, 19713750, 128, 11289600, 5644800, 64, 11289600, +- 2822400, 1411200, 1, 1 }, +- /* 48k rate */ +- { 12000000, 48000, 18432000, 128, 49152000, 6144000, 128, 49152000, +- 6144000, 1536000, 1, 1 }, +- { 24000000, 48000, 18432000, 128, 12288000, 6144000, 64, 12288000, +- 3072000, 1536000, 1, 1 }, +- { 25000000, 48000, 75626250, 128, 12288000, 6144000, 64, 12288000, +- 3072000, 1536000, 1, 1 }, +- +- /* 96k rate */ +- { 25000000, 96000, 75626250, 64, 24576000, 6144000, 64, 24576000, +- 6144000, 3072000, 1, 9 }, +-}; +- + static const struct snd_kcontrol_new hpl_output_mixer_controls[] = { + SOC_DAPM_SINGLE("L_DAC Switch", AIC32X4_HPLROUTE, 3, 1, 0), + SOC_DAPM_SINGLE("IN1_L Switch", AIC32X4_HPLROUTE, 2, 1, 0), +@@ -632,20 +565,6 @@ const struct regmap_config aic32x4_regma + }; + EXPORT_SYMBOL(aic32x4_regmap_config); + +-static inline int aic32x4_get_divs(int mclk, int rate) +-{ +- int i; +- +- for (i = 0; i < ARRAY_SIZE(aic32x4_divs); i++) { +- if ((aic32x4_divs[i].rate == rate) +- && (aic32x4_divs[i].mclk == mclk)) { +- return i; +- } +- } +- printk(KERN_ERR "aic32x4: master clock and sample rate is not supported\n"); +- return -EINVAL; +-} +- + static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) + { +@@ -747,11 +666,17 @@ static int aic32x4_set_processing_blocks + } + + static int aic32x4_setup_clocks(struct snd_soc_component *component, +- unsigned int sample_rate, +- unsigned int parent_rate) ++ unsigned int sample_rate) + { +- int i; ++ u8 aosr; ++ u16 dosr; ++ u8 adc_resource_class, dac_resource_class; ++ u8 madc, nadc, mdac, ndac, max_nadc, min_mdac, max_ndac; ++ u8 dosr_increment; ++ u16 max_dosr, min_dosr; ++ unsigned long mclk_rate, adc_clock_rate, dac_clock_rate; + int ret; ++ struct clk *mclk; + + struct clk_bulk_data clocks[] = { + { .id = "pll" }, +@@ -761,30 +686,89 @@ static int aic32x4_setup_clocks(struct s + { .id = "mdac" }, + { .id = "bdiv" }, + }; +- +- i = aic32x4_get_divs(parent_rate, sample_rate); +- if (i < 0) { +- printk(KERN_ERR "aic32x4: sampling rate not supported\n"); +- return i; +- } +- + ret = devm_clk_bulk_get(component->dev, ARRAY_SIZE(clocks), clocks); + if (ret) + return ret; + +- clk_set_rate(clocks[0].clk, aic32x4_divs[i].pll_rate); +- clk_set_rate(clocks[1].clk, aic32x4_divs[i].nadc_rate); +- clk_set_rate(clocks[2].clk, aic32x4_divs[i].madc_rate); +- clk_set_rate(clocks[3].clk, aic32x4_divs[i].ndac_rate); +- clk_set_rate(clocks[4].clk, aic32x4_divs[i].mdac_rate); +- clk_set_rate(clocks[5].clk, aic32x4_divs[i].bdiv_rate); ++ mclk = clk_get_parent(clocks[1].clk); ++ mclk_rate = clk_get_rate(mclk); + +- aic32x4_set_aosr(component, aic32x4_divs[i].aosr); +- aic32x4_set_dosr(component, aic32x4_divs[i].dosr); ++ if (sample_rate <= 48000) { ++ aosr = 128; ++ adc_resource_class = 6; ++ dac_resource_class = 8; ++ dosr_increment = 8; ++ aic32x4_set_processing_blocks(component, 1, 1); ++ } else if (sample_rate <= 96000) { ++ aosr = 64; ++ adc_resource_class = 6; ++ dac_resource_class = 8; ++ dosr_increment = 4; ++ aic32x4_set_processing_blocks(component, 1, 9); ++ } else if (sample_rate == 192000) { ++ aosr = 32; ++ adc_resource_class = 3; ++ dac_resource_class = 4; ++ dosr_increment = 2; ++ aic32x4_set_processing_blocks(component, 13, 19); ++ } else { ++ dev_err(component->dev, "Sampling rate not supported\n"); ++ return -EINVAL; ++ } + +- aic32x4_set_processing_blocks(component, aic32x4_divs[i].r_block, aic32x4_divs[i].p_block); ++ madc = DIV_ROUND_UP((32 * adc_resource_class), aosr); ++ max_dosr = (AIC32X4_MAX_DOSR_FREQ / sample_rate / dosr_increment) * ++ dosr_increment; ++ min_dosr = (AIC32X4_MIN_DOSR_FREQ / sample_rate / dosr_increment) * ++ dosr_increment; ++ max_nadc = AIC32X4_MAX_CODEC_CLKIN_FREQ / (madc * aosr * sample_rate); ++ ++ for (nadc = max_nadc; nadc > 0; --nadc) { ++ adc_clock_rate = nadc * madc * aosr * sample_rate; ++ for (dosr = max_dosr; dosr >= min_dosr; ++ dosr -= dosr_increment) { ++ min_mdac = DIV_ROUND_UP((32 * dac_resource_class), dosr); ++ max_ndac = AIC32X4_MAX_CODEC_CLKIN_FREQ / ++ (min_mdac * dosr * sample_rate); ++ for (mdac = min_mdac; mdac <= 128; ++mdac) { ++ for (ndac = max_ndac; ndac > 0; --ndac) { ++ dac_clock_rate = ndac * mdac * dosr * ++ sample_rate; ++ if (dac_clock_rate == adc_clock_rate) { ++ if (clk_round_rate(clocks[0].clk, dac_clock_rate) == 0) ++ continue; ++ ++ clk_set_rate(clocks[0].clk, ++ dac_clock_rate); ++ ++ clk_set_rate(clocks[1].clk, ++ sample_rate * aosr * ++ madc); ++ clk_set_rate(clocks[2].clk, ++ sample_rate * aosr); ++ aic32x4_set_aosr(component, ++ aosr); ++ ++ clk_set_rate(clocks[3].clk, ++ sample_rate * dosr * ++ mdac); ++ clk_set_rate(clocks[4].clk, ++ sample_rate * dosr); ++ aic32x4_set_dosr(component, ++ dosr); ++ ++ clk_set_rate(clocks[5].clk, ++ sample_rate * 32); ++ return 0; ++ } ++ } ++ } ++ } ++ } + +- return 0; ++ dev_err(component->dev, ++ "Could not set clocks to support sample rate.\n"); ++ return -EINVAL; + } + + static int aic32x4_hw_params(struct snd_pcm_substream *substream, +@@ -796,7 +780,7 @@ static int aic32x4_hw_params(struct snd_ + u8 iface1_reg = 0; + u8 dacsetup_reg = 0; + +- aic32x4_setup_clocks(component, params_rate(params), aic32x4->sysclk); ++ aic32x4_setup_clocks(component, params_rate(params)); + + switch (params_width(params)) { + case 16: +--- a/sound/soc/codecs/tlv320aic32x4.h ++++ b/sound/soc/codecs/tlv320aic32x4.h +@@ -211,7 +211,9 @@ int aic32x4_register_clocks(struct devic + #define AIC32X4_DIV_MASK GENMASK(6, 0) + + /* Clock Limits */ ++#define AIC32X4_MAX_DOSR_FREQ 6200000 ++#define AIC32X4_MIN_DOSR_FREQ 2800000 ++#define AIC32X4_MAX_CODEC_CLKIN_FREQ 110000000 + #define AIC32X4_MAX_PLL_CLKIN 20000000 + +- + #endif /* _TLV320AIC32X4_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0412-ASoC-tlv320aic32x4-Restructure-set_dai_sysclk.patch b/target/linux/brcm2708/patches-4.19/950-0412-ASoC-tlv320aic32x4-Restructure-set_dai_sysclk.patch new file mode 100644 index 000000000..ff61edf97 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0412-ASoC-tlv320aic32x4-Restructure-set_dai_sysclk.patch @@ -0,0 +1,51 @@ +From dc848cfb79aa1a4cea301c388e920e4205ac791a Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:52 -0700 +Subject: [PATCH 412/703] ASoC: tlv320aic32x4: Restructure set_dai_sysclk + +commit aa6a60f7be925210d5156f0e8025f3afe1f4f54d upstream. + +The sysclk is now managed by the CCF. Change this function +to merely find the system clock and set it using +clk_set_rate. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 17 ++++++----------- + 1 file changed, 6 insertions(+), 11 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -49,7 +49,6 @@ + + struct aic32x4_priv { + struct regmap *regmap; +- u32 sysclk; + u32 power_cfg; + u32 micpga_routing; + bool swapdacs; +@@ -569,17 +568,13 @@ static int aic32x4_set_dai_sysclk(struct + int clk_id, unsigned int freq, int dir) + { + struct snd_soc_component *component = codec_dai->component; +- struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component); ++ struct clk *mclk; ++ struct clk *pll; + +- switch (freq) { +- case 12000000: +- case 24000000: +- case 25000000: +- aic32x4->sysclk = freq; +- return 0; +- } +- printk(KERN_ERR "aic32x4: invalid frequency to set DAI system clock\n"); +- return -EINVAL; ++ pll = devm_clk_get(component->dev, "pll"); ++ mclk = clk_get_parent(pll); ++ ++ return clk_set_rate(mclk, freq); + } + + static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) diff --git a/target/linux/brcm2708/patches-4.19/950-0413-ASoC-tlv320aic32x4-Remove-mclk-references.patch b/target/linux/brcm2708/patches-4.19/950-0413-ASoC-tlv320aic32x4-Remove-mclk-references.patch new file mode 100644 index 000000000..cc7251a78 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0413-ASoC-tlv320aic32x4-Remove-mclk-references.patch @@ -0,0 +1,39 @@ +From 76203a21b47e2dcbb3619a9655cc4918e4d496a5 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:53 -0700 +Subject: [PATCH 413/703] ASoC: tlv320aic32x4: Remove mclk references + +commit 78f2d58a289302e56a7def96a783a7686ebf27e2 upstream. + +mclk is not used by anything anymore. Remove support for it. +All that information now comes from the clock tree. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -53,7 +53,6 @@ struct aic32x4_priv { + u32 micpga_routing; + bool swapdacs; + int rstn_gpio; +- struct clk *mclk; + const char *mclk_name; + + struct regulator *supply_ldo; +@@ -1191,12 +1190,6 @@ int aic32x4_probe(struct device *dev, st + aic32x4->mclk_name = "mclk"; + } + +- aic32x4->mclk = devm_clk_get(dev, "mclk"); +- if (IS_ERR(aic32x4->mclk)) { +- dev_err(dev, "Failed getting the mclk. The current implementation does not support the usage of this codec without mclk\n"); +- return PTR_ERR(aic32x4->mclk); +- } +- + ret = aic32x4_register_clocks(dev, aic32x4->mclk_name); + if (ret) + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0414-ASoC-tlv320aic32x4-Allow-192000-Sample-Rate.patch b/target/linux/brcm2708/patches-4.19/950-0414-ASoC-tlv320aic32x4-Allow-192000-Sample-Rate.patch new file mode 100644 index 000000000..75f744adb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0414-ASoC-tlv320aic32x4-Allow-192000-Sample-Rate.patch @@ -0,0 +1,27 @@ +From c72904446aa20ab6136502697641545cc5e7dc7e Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Thu, 21 Mar 2019 17:58:54 -0700 +Subject: [PATCH 414/703] ASoC: tlv320aic32x4: Allow 192000 Sample Rate + +commit 6d56ee1550b8a81bc63c80051ff78d8d704b09ba upstream. + +The clocking and processing blocks are now properly set up to +support 192000 sample rates. Allow drivers to ask for that. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -859,7 +859,7 @@ static int aic32x4_set_bias_level(struct + return 0; + } + +-#define AIC32X4_RATES SNDRV_PCM_RATE_8000_96000 ++#define AIC32X4_RATES SNDRV_PCM_RATE_8000_192000 + #define AIC32X4_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \ + | SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) + diff --git a/target/linux/brcm2708/patches-4.19/950-0415-ASoC-tlv320aic32x4-Only-enable-with-common-clock.patch b/target/linux/brcm2708/patches-4.19/950-0415-ASoC-tlv320aic32x4-Only-enable-with-common-clock.patch new file mode 100644 index 000000000..06084e41f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0415-ASoC-tlv320aic32x4-Only-enable-with-common-clock.patch @@ -0,0 +1,43 @@ +From 499d000a3d56edf6c5d2bf81de6d7af5348eb258 Mon Sep 17 00:00:00 2001 +From: Mark Brown +Date: Tue, 26 Mar 2019 13:10:13 +0000 +Subject: [PATCH 415/703] ASoC: tlv320aic32x4: Only enable with common clock + +commit 64f01d2b5ccc621c3aa66b82daf9154f5581f36a upstream. + +Some architectures do not yet support the common clock API at all but +the tlv320aic32x4 driver now requires it. + +Reported-by: Stephen Rothwell +Signed-off-by: Mark Brown +--- + sound/soc/codecs/Kconfig | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -170,8 +170,8 @@ config SND_SOC_ALL_CODECS + select SND_SOC_TAS5713 if I2C + select SND_SOC_TLV320AIC26 if SPI_MASTER + select SND_SOC_TLV320AIC31XX if I2C +- select SND_SOC_TLV320AIC32X4_I2C if I2C +- select SND_SOC_TLV320AIC32X4_SPI if SPI_MASTER ++ select SND_SOC_TLV320AIC32X4_I2C if I2C && COMMON_CLK ++ select SND_SOC_TLV320AIC32X4_SPI if SPI_MASTER && COMMON_CLK + select SND_SOC_TLV320AIC3X if I2C + select SND_SOC_TPA6130A2 if I2C + select SND_SOC_TLV320DAC33 if I2C +@@ -1030,11 +1030,13 @@ config SND_SOC_TLV320AIC32X4 + config SND_SOC_TLV320AIC32X4_I2C + tristate "Texas Instruments TLV320AIC32x4 audio CODECs - I2C" + depends on I2C ++ depends on COMMON_CLK + select SND_SOC_TLV320AIC32X4 + + config SND_SOC_TLV320AIC32X4_SPI + tristate "Texas Instruments TLV320AIC32x4 audio CODECs - SPI" + depends on SPI_MASTER ++ depends on COMMON_CLK + select SND_SOC_TLV320AIC32X4 + + config SND_SOC_TLV320AIC3X diff --git a/target/linux/brcm2708/patches-4.19/950-0416-Audiophonics-I-Sabre-9038Q2M-DAC-driver.patch b/target/linux/brcm2708/patches-4.19/950-0416-Audiophonics-I-Sabre-9038Q2M-DAC-driver.patch new file mode 100644 index 000000000..919faf736 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0416-Audiophonics-I-Sabre-9038Q2M-DAC-driver.patch @@ -0,0 +1,794 @@ +From b40f72a9aeee6ce7d7df3a3b3ff602234215fe79 Mon Sep 17 00:00:00 2001 +From: FERHAT Nicolas +Date: Fri, 5 Apr 2019 13:06:42 +0100 +Subject: [PATCH 416/703] Audiophonics I-Sabre 9038Q2M DAC driver + +Signed-off-by: Audiophonics +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + .../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 ++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + sound/soc/bcm/Kconfig | 7 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/i-sabre-q2m.c | 157 +++++++ + sound/soc/codecs/Kconfig | 5 + + sound/soc/codecs/Makefile | 2 + + sound/soc/codecs/i-sabre-codec.c | 392 ++++++++++++++++++ + sound/soc/codecs/i-sabre-codec.h | 42 ++ + 13 files changed, 656 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts + create mode 100644 sound/soc/bcm/i-sabre-q2m.c + create mode 100644 sound/soc/codecs/i-sabre-codec.c + create mode 100644 sound/soc/codecs/i-sabre-codec.h + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -55,6 +55,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + hy28a.dtbo \ + hy28b.dtbo \ + hy28b-2017.dtbo \ ++ i-sabre-q2m.dtbo \ + i2c-bcm2708.dtbo \ + i2c-gpio.dtbo \ + i2c-mux.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -869,6 +869,12 @@ Params: speed Display + ledgpio GPIO used to control backlight + + ++Name: i-sabre-q2m ++Info: Configures the Audiophonics I-SABRE Q2M DAC ++Load: dtoverlay=i-sabre-q2m ++Params: ++ ++ + Name: i2c-bcm2708 + Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus. + Load: dtoverlay=i2c-bcm2708 +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts +@@ -0,0 +1,39 @@ ++// Definitions for I-Sabre Q2M ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&sound>; ++ frag0: __overlay__ { ++ compatible = "audiophonics,i-sabre-q2m"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ i-sabre-codec@48 { ++ #sound-dai-cells = <0>; ++ compatible = "audiophonics,i-sabre-codec"; ++ reg = <0x48>; ++ status = "okay"; ++ }; ++ }; ++ }; ++}; +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -916,6 +916,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -909,6 +909,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -804,6 +804,7 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOSENSE_PI=m +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -123,6 +123,13 @@ config SND_BCM2708_SOC_IQAUDIO_DIGI + help + Say Y or M if you want to add support for IQAudIO Digital IO board. + ++config SND_BCM2708_SOC_I_SABRE_Q2M ++ tristate "Support for Audiophonics I-Sabre Q2M DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_I_SABRE_CODEC ++ help ++ Say Y or M if you want to add support for Audiophonics I-SABRE Q2M DAC ++ + config SND_BCM2708_SOC_ADAU1977_ADC + tristate "Support for ADAU1977 ADC" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -19,6 +19,7 @@ snd-soc-justboom-dac-objs := justboom-da + snd-soc-rpi-cirrus-objs := rpi-cirrus.o + snd-soc-rpi-proto-objs := rpi-proto.o + snd-soc-iqaudio-dac-objs := iqaudio-dac.o ++ snd-soc-i-sabre-q2m-objs := i-sabre-q2m.o + snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o + snd-soc-audioinjector-octo-soundcard-objs := audioinjector-octo-soundcard.o + snd-soc-audiosense-pi-objs := audiosense-pi.o +@@ -42,6 +43,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DA + obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o + obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o ++ obj-$(CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M) += snd-soc-i-sabre-q2m.o + obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o + obj-$(CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD) += snd-soc-audioinjector-octo-soundcard.o + obj-$(CONFIG_SND_AUDIOSENSE_PI) += snd-soc-audiosense-pi.o +--- /dev/null ++++ b/sound/soc/bcm/i-sabre-q2m.c +@@ -0,0 +1,157 @@ ++/* ++ * ASoC Driver for I-Sabre Q2M ++ * ++ * Author: Satoru Kawase ++ * Modified by: Xiao Qingyong ++ * Update kernel v4.18+ by : Audiophonics ++ * Copyright 2018 Audiophonics ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/i-sabre-codec.h" ++ ++ ++static int snd_rpi_i_sabre_q2m_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ unsigned int value; ++ ++ /* Device ID */ ++ value = snd_soc_component_read32(component, ISABRECODEC_REG_01); ++ dev_info(component->card->dev, "Audiophonics Device ID : %02X\n", value); ++ ++ /* API revision */ ++ value = snd_soc_component_read32(component, ISABRECODEC_REG_02); ++ dev_info(component->card->dev, "Audiophonics API revision : %02X\n", value); ++ ++ return 0; ++} ++ ++static int snd_rpi_i_sabre_q2m_hw_params( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ int bclk_ratio; ++ ++ bclk_ratio = snd_pcm_format_physical_width( ++ params_format(params)) * params_channels(params); ++ return snd_soc_dai_set_bclk_ratio(cpu_dai, bclk_ratio); ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_rpi_i_sabre_q2m_ops = { ++ .hw_params = snd_rpi_i_sabre_q2m_hw_params, ++}; ++ ++ ++static struct snd_soc_dai_link snd_rpi_i_sabre_q2m_dai[] = { ++ { ++ .name = "I-Sabre Q2M", ++ .stream_name = "I-Sabre Q2M DAC", ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "i-sabre-codec-dai", ++ .platform_name = "bcm2708-i2s.0", ++ .codec_name = "i-sabre-codec-i2c.1-0048", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBS_CFS, ++ .init = snd_rpi_i_sabre_q2m_init, ++ .ops = &snd_rpi_i_sabre_q2m_ops, ++ } ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_i_sabre_q2m = { ++ .name = "I-Sabre Q2M DAC", ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_i_sabre_q2m_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_i_sabre_q2m_dai) ++}; ++ ++ ++static int snd_rpi_i_sabre_q2m_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_rpi_i_sabre_q2m.dev = &pdev->dev; ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai; ++ ++ dai = &snd_rpi_i_sabre_q2m_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (i2s_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } else { ++ dev_err(&pdev->dev, ++ "Property 'i2s-controller' missing or invalid\n"); ++ return (-EINVAL); ++ } ++ ++ dai->name = "I-Sabre Q2M"; ++ dai->stream_name = "I-Sabre Q2M DAC"; ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S ++ | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBS_CFS; ++ } ++ ++ /* Wait for registering codec driver */ ++ mdelay(50); ++ ++ ret = snd_soc_register_card(&snd_rpi_i_sabre_q2m); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ } ++ ++ return ret; ++} ++ ++static int snd_rpi_i_sabre_q2m_remove(struct platform_device *pdev) ++{ ++ return snd_soc_unregister_card(&snd_rpi_i_sabre_q2m); ++} ++ ++static const struct of_device_id snd_rpi_i_sabre_q2m_of_match[] = { ++ { .compatible = "audiophonics,i-sabre-q2m", }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, snd_rpi_i_sabre_q2m_of_match); ++ ++static struct platform_driver snd_rpi_i_sabre_q2m_driver = { ++ .driver = { ++ .name = "snd-rpi-i-sabre-q2m", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_i_sabre_q2m_of_match, ++ }, ++ .probe = snd_rpi_i_sabre_q2m_probe, ++ .remove = snd_rpi_i_sabre_q2m_remove, ++}; ++module_platform_driver(snd_rpi_i_sabre_q2m_driver); ++ ++MODULE_DESCRIPTION("ASoC Driver for I-Sabre Q2M"); ++MODULE_AUTHOR("Audiophonics "); ++MODULE_LICENSE("GPL"); +--- a/sound/soc/codecs/Kconfig ++++ b/sound/soc/codecs/Kconfig +@@ -85,6 +85,7 @@ config SND_SOC_ALL_CODECS + select SND_SOC_ICS43432 + select SND_SOC_INNO_RK3036 + select SND_SOC_ISABELLE if I2C ++ select SND_SOC_I_SABRE_CODEC if I2C + select SND_SOC_JZ4740_CODEC + select SND_SOC_LM4857 if I2C + select SND_SOC_LM49453 if I2C +@@ -1322,4 +1323,8 @@ config SND_SOC_TPA6130A2 + tristate "Texas Instruments TPA6130A2 headphone amplifier" + depends on I2C + ++config SND_SOC_I_SABRE_CODEC ++ tristate "Audiophonics I-SABRE Codec" ++ depends on I2C ++ + endmenu +--- a/sound/soc/codecs/Makefile ++++ b/sound/soc/codecs/Makefile +@@ -81,6 +81,7 @@ snd-soc-hdac-hdmi-objs := hdac_hdmi.o + snd-soc-ics43432-objs := ics43432.o + snd-soc-inno-rk3036-objs := inno_rk3036.o + snd-soc-isabelle-objs := isabelle.o ++snd-soc-i-sabre-codec-objs := i-sabre-codec.o + snd-soc-jz4740-codec-objs := jz4740.o + snd-soc-l3-objs := l3.o + snd-soc-lm4857-objs := lm4857.o +@@ -343,6 +344,7 @@ obj-$(CONFIG_SND_SOC_HDAC_HDMI) += snd-s + obj-$(CONFIG_SND_SOC_ICS43432) += snd-soc-ics43432.o + obj-$(CONFIG_SND_SOC_INNO_RK3036) += snd-soc-inno-rk3036.o + obj-$(CONFIG_SND_SOC_ISABELLE) += snd-soc-isabelle.o ++obj-$(CONFIG_SND_SOC_I_SABRE_CODEC) += snd-soc-i-sabre-codec.o + obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o + obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o + obj-$(CONFIG_SND_SOC_LM4857) += snd-soc-lm4857.o +--- /dev/null ++++ b/sound/soc/codecs/i-sabre-codec.c +@@ -0,0 +1,392 @@ ++/* ++ * Driver for I-Sabre Q2M ++ * ++ * Author: Satoru Kawase ++ * Modified by: Xiao Qingyong ++ * Modified by: JC BARBAUD (Mute) ++ * Update kernel v4.18+ by : Audiophonics ++ * Copyright 2018 Audiophonics ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "i-sabre-codec.h" ++ ++ ++/* I-Sabre Q2M Codec Private Data */ ++struct i_sabre_codec_priv { ++ struct regmap *regmap; ++ unsigned int fmt; ++}; ++ ++ ++/* I-Sabre Q2M Codec Default Register Value */ ++static const struct reg_default i_sabre_codec_reg_defaults[] = { ++ { ISABRECODEC_REG_10, 0x00 }, ++ { ISABRECODEC_REG_20, 0x00 }, ++ { ISABRECODEC_REG_21, 0x00 }, ++ { ISABRECODEC_REG_22, 0x00 }, ++ { ISABRECODEC_REG_24, 0x00 }, ++}; ++ ++ ++static bool i_sabre_codec_writeable(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case ISABRECODEC_REG_10: ++ case ISABRECODEC_REG_20: ++ case ISABRECODEC_REG_21: ++ case ISABRECODEC_REG_22: ++ case ISABRECODEC_REG_24: ++ return true; ++ ++ default: ++ return false; ++ } ++} ++ ++static bool i_sabre_codec_readable(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case ISABRECODEC_REG_01: ++ case ISABRECODEC_REG_02: ++ case ISABRECODEC_REG_10: ++ case ISABRECODEC_REG_20: ++ case ISABRECODEC_REG_21: ++ case ISABRECODEC_REG_22: ++ case ISABRECODEC_REG_24: ++ return true; ++ ++ default: ++ return false; ++ } ++} ++ ++static bool i_sabre_codec_volatile(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case ISABRECODEC_REG_01: ++ case ISABRECODEC_REG_02: ++ return true; ++ ++ default: ++ return false; ++ } ++} ++ ++ ++/* Volume Scale */ ++static const DECLARE_TLV_DB_SCALE(volume_tlv, -10000, 100, 0); ++ ++ ++/* Filter Type */ ++static const char * const fir_filter_type_texts[] = { ++ "brick wall", ++ "corrected minimum phase fast", ++ "minimum phase slow", ++ "minimum phase fast", ++ "linear phase slow", ++ "linear phase fast", ++ "apodizing fast", ++}; ++ ++static SOC_ENUM_SINGLE_DECL(i_sabre_fir_filter_type_enum, ++ ISABRECODEC_REG_22, 0, fir_filter_type_texts); ++ ++ ++/* I2S / SPDIF Select */ ++static const char * const iis_spdif_sel_texts[] = { ++ "I2S", ++ "SPDIF", ++}; ++ ++static SOC_ENUM_SINGLE_DECL(i_sabre_iis_spdif_sel_enum, ++ ISABRECODEC_REG_24, 0, iis_spdif_sel_texts); ++ ++ ++/* Control */ ++static const struct snd_kcontrol_new i_sabre_codec_controls[] = { ++SOC_SINGLE_RANGE_TLV("Digital Playback Volume", ISABRECODEC_REG_20, 0, 0, 100, 1, volume_tlv), ++SOC_SINGLE("Digital Playback Switch", ISABRECODEC_REG_21, 0, 1, 1), ++SOC_ENUM("FIR Filter Type", i_sabre_fir_filter_type_enum), ++SOC_ENUM("I2S/SPDIF Select", i_sabre_iis_spdif_sel_enum), ++}; ++ ++ ++static const u32 i_sabre_codec_dai_rates_slave[] = { ++ 8000, 11025, 16000, 22050, 32000, ++ 44100, 48000, 64000, 88200, 96000, ++ 176400, 192000, 352800, 384000, ++ 705600, 768000, 1411200, 1536000 ++}; ++ ++static const struct snd_pcm_hw_constraint_list constraints_slave = { ++ .list = i_sabre_codec_dai_rates_slave, ++ .count = ARRAY_SIZE(i_sabre_codec_dai_rates_slave), ++}; ++ ++static int i_sabre_codec_dai_startup_slave( ++ struct snd_pcm_substream *substream, struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ int ret; ++ ++ ret = snd_pcm_hw_constraint_list(substream->runtime, ++ 0, SNDRV_PCM_HW_PARAM_RATE, &constraints_slave); ++ if (ret != 0) { ++ dev_err(component->card->dev, "Failed to setup rates constraints: %d\n", ret); ++ } ++ ++ return ret; ++} ++ ++static int i_sabre_codec_dai_startup( ++ struct snd_pcm_substream *substream, struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct i_sabre_codec_priv *i_sabre_codec ++ = snd_soc_component_get_drvdata(component); ++ ++ switch (i_sabre_codec->fmt & SND_SOC_DAIFMT_MASTER_MASK) { ++ case SND_SOC_DAIFMT_CBS_CFS: ++ return i_sabre_codec_dai_startup_slave(substream, dai); ++ ++ default: ++ return (-EINVAL); ++ } ++} ++ ++static int i_sabre_codec_hw_params( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, ++ struct snd_soc_dai *dai) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct i_sabre_codec_priv *i_sabre_codec ++ = snd_soc_component_get_drvdata(component); ++ unsigned int daifmt; ++ int format_width; ++ ++ dev_dbg(component->card->dev, "hw_params %u Hz, %u channels\n", ++ params_rate(params), params_channels(params)); ++ ++ /* Check I2S Format (Bit Size) */ ++ format_width = snd_pcm_format_width(params_format(params)); ++ if ((format_width != 32) && (format_width != 16)) { ++ dev_err(component->card->dev, "Bad frame size: %d\n", ++ snd_pcm_format_width(params_format(params))); ++ return (-EINVAL); ++ } ++ ++ /* Check Slave Mode */ ++ daifmt = i_sabre_codec->fmt & SND_SOC_DAIFMT_MASTER_MASK; ++ if (daifmt != SND_SOC_DAIFMT_CBS_CFS) { ++ return (-EINVAL); ++ } ++ ++ /* Notify Sampling Frequency */ ++ switch (params_rate(params)) ++ { ++ case 44100: ++ case 48000: ++ case 88200: ++ case 96000: ++ case 176400: ++ case 192000: ++ snd_soc_component_update_bits(component, ISABRECODEC_REG_10, 0x01, 0x00); ++ break; ++ ++ case 352800: ++ case 384000: ++ case 705600: ++ case 768000: ++ case 1411200: ++ case 1536000: ++ snd_soc_component_update_bits(component, ISABRECODEC_REG_10, 0x01, 0x01); ++ break; ++ } ++ ++ return 0; ++} ++ ++static int i_sabre_codec_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) ++{ ++ struct snd_soc_component *component = dai->component; ++ struct i_sabre_codec_priv *i_sabre_codec ++ = snd_soc_component_get_drvdata(component); ++ ++ /* interface format */ ++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { ++ case SND_SOC_DAIFMT_I2S: ++ break; ++ ++ case SND_SOC_DAIFMT_RIGHT_J: ++ case SND_SOC_DAIFMT_LEFT_J: ++ default: ++ return (-EINVAL); ++ } ++ ++ /* clock inversion */ ++ if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) { ++ return (-EINVAL); ++ } ++ ++ /* Set Audio Data Format */ ++ i_sabre_codec->fmt = fmt; ++ ++ return 0; ++} ++ ++static int i_sabre_codec_dac_mute(struct snd_soc_dai *dai, int mute) ++{ ++ struct snd_soc_component *component = dai->component; ++ ++ if (mute) { ++ snd_soc_component_update_bits(component, ISABRECODEC_REG_21, 0x01, 0x01); ++ } else { ++ snd_soc_component_update_bits(component, ISABRECODEC_REG_21, 0x01, 0x00); ++ } ++ ++ return 0; ++} ++ ++ ++static const struct snd_soc_dai_ops i_sabre_codec_dai_ops = { ++ .startup = i_sabre_codec_dai_startup, ++ .hw_params = i_sabre_codec_hw_params, ++ .set_fmt = i_sabre_codec_set_fmt, ++ .digital_mute = i_sabre_codec_dac_mute, ++}; ++ ++static struct snd_soc_dai_driver i_sabre_codec_dai = { ++ .name = "i-sabre-codec-dai", ++ .playback = { ++ .stream_name = "Playback", ++ .channels_min = 2, ++ .channels_max = 2, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS, ++ .rate_min = 8000, ++ .rate_max = 1536000, ++ .formats = SNDRV_PCM_FMTBIT_S16_LE ++ | SNDRV_PCM_FMTBIT_S32_LE, ++ }, ++ .ops = &i_sabre_codec_dai_ops, ++}; ++ ++static struct snd_soc_component_driver i_sabre_codec_codec_driver = { ++ .controls = i_sabre_codec_controls, ++ .num_controls = ARRAY_SIZE(i_sabre_codec_controls), ++}; ++ ++ ++static const struct regmap_config i_sabre_codec_regmap = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = ISABRECODEC_MAX_REG, ++ ++ .reg_defaults = i_sabre_codec_reg_defaults, ++ .num_reg_defaults = ARRAY_SIZE(i_sabre_codec_reg_defaults), ++ ++ .writeable_reg = i_sabre_codec_writeable, ++ .readable_reg = i_sabre_codec_readable, ++ .volatile_reg = i_sabre_codec_volatile, ++ ++ .cache_type = REGCACHE_RBTREE, ++}; ++ ++ ++static int i_sabre_codec_probe(struct device *dev, struct regmap *regmap) ++{ ++ struct i_sabre_codec_priv *i_sabre_codec; ++ int ret; ++ ++ i_sabre_codec = devm_kzalloc(dev, sizeof(*i_sabre_codec), GFP_KERNEL); ++ if (!i_sabre_codec) { ++ dev_err(dev, "devm_kzalloc"); ++ return (-ENOMEM); ++ } ++ ++ i_sabre_codec->regmap = regmap; ++ ++ dev_set_drvdata(dev, i_sabre_codec); ++ ++ ret = snd_soc_register_component(dev, ++ &i_sabre_codec_codec_driver, &i_sabre_codec_dai, 1); ++ if (ret != 0) { ++ dev_err(dev, "Failed to register CODEC: %d\n", ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void i_sabre_codec_remove(struct device *dev) ++{ ++ snd_soc_unregister_component(dev); ++} ++ ++ ++static int i_sabre_codec_i2c_probe( ++ struct i2c_client *i2c, const struct i2c_device_id *id) ++{ ++ struct regmap *regmap; ++ ++ regmap = devm_regmap_init_i2c(i2c, &i_sabre_codec_regmap); ++ if (IS_ERR(regmap)) { ++ return PTR_ERR(regmap); ++ } ++ ++ return i_sabre_codec_probe(&i2c->dev, regmap); ++} ++ ++static int i_sabre_codec_i2c_remove(struct i2c_client *i2c) ++{ ++ i_sabre_codec_remove(&i2c->dev); ++ ++ return 0; ++} ++ ++ ++static const struct i2c_device_id i_sabre_codec_i2c_id[] = { ++ { "i-sabre-codec", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, i_sabre_codec_i2c_id); ++ ++static const struct of_device_id i_sabre_codec_of_match[] = { ++ { .compatible = "audiophonics,i-sabre-codec", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, i_sabre_codec_of_match); ++ ++static struct i2c_driver i_sabre_codec_i2c_driver = { ++ .driver = { ++ .name = "i-sabre-codec-i2c", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(i_sabre_codec_of_match), ++ }, ++ .probe = i_sabre_codec_i2c_probe, ++ .remove = i_sabre_codec_i2c_remove, ++ .id_table = i_sabre_codec_i2c_id, ++}; ++module_i2c_driver(i_sabre_codec_i2c_driver); ++ ++ ++MODULE_DESCRIPTION("ASoC I-Sabre Q2M codec driver"); ++MODULE_AUTHOR("Audiophonics "); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/sound/soc/codecs/i-sabre-codec.h +@@ -0,0 +1,42 @@ ++/* ++ * Driver for I-Sabre Q2M ++ * ++ * Author: Satoru Kawase ++ * Modified by: Xiao Qingyong ++ * Copyright 2018 Audiophonics ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#ifndef _SND_SOC_ISABRECODEC ++#define _SND_SOC_ISABRECODEC ++ ++ ++/* ISABRECODEC Register Address */ ++#define ISABRECODEC_REG_01 0x01 /* Virtual Device ID : 0x01 = es9038q2m */ ++#define ISABRECODEC_REG_02 0x02 /* API revision : 0x01 = Revision 01 */ ++#define ISABRECODEC_REG_10 0x10 /* 0x01 = above 192kHz, 0x00 = otherwise */ ++#define ISABRECODEC_REG_20 0x20 /* 0 - 100 (decimal value, 0 = min., 100 = max.) */ ++#define ISABRECODEC_REG_21 0x21 /* 0x00 = Mute OFF, 0x01 = Mute ON */ ++#define ISABRECODEC_REG_22 0x22 ++/* ++ 0x00 = brick wall, ++ 0x01 = corrected minimum phase fast, ++ 0x02 = minimum phase slow, ++ 0x03 = minimum phase fast, ++ 0x04 = linear phase slow, ++ 0x05 = linear phase fast, ++ 0x06 = apodizing fast, ++*/ ++//#define ISABRECODEC_REG_23 0x23 /* reserved */ ++#define ISABRECODEC_REG_24 0x24 /* 0x00 = I2S, 0x01 = SPDIF */ ++#define ISABRECODEC_MAX_REG 0x24 /* Maximum Register Number */ ++ ++#endif /* _SND_SOC_ISABRECODEC */ diff --git a/target/linux/brcm2708/patches-4.19/950-0417-ASoC-tlv320aic32x4-Change-author-s-name.patch b/target/linux/brcm2708/patches-4.19/950-0417-ASoC-tlv320aic32x4-Change-author-s-name.patch new file mode 100644 index 000000000..1c01edc30 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0417-ASoC-tlv320aic32x4-Change-author-s-name.patch @@ -0,0 +1,54 @@ +From fcde4e55513ec62d7a0fdc18c9db9445de741f4f Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 3 Apr 2019 21:17:15 -0700 +Subject: [PATCH 417/703] ASoC: tlv320aic32x4: Change author's name + +commit 7297ba6c74c5b9e78d8e936af82eecfcf7d32dfb upstream. + +The author of these files has changed her name. Update +instances in the code of her dead name to current legal +name. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4-i2c.c | 4 ++-- + sound/soc/codecs/tlv320aic32x4-spi.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4-i2c.c ++++ b/sound/soc/codecs/tlv320aic32x4-i2c.c +@@ -3,7 +3,7 @@ + * + * Copyright 2011 NW Digital Radio + * +- * Author: Jeremy McDermond ++ * Author: Annaliese McDermond + * + * Based on sound/soc/codecs/wm8974 and TI driver for kernel 2.6.27. + * +@@ -72,5 +72,5 @@ static struct i2c_driver aic32x4_i2c_dri + module_i2c_driver(aic32x4_i2c_driver); + + MODULE_DESCRIPTION("ASoC TLV320AIC32x4 codec driver I2C"); +-MODULE_AUTHOR("Jeremy McDermond "); ++MODULE_AUTHOR("Annaliese McDermond "); + MODULE_LICENSE("GPL"); +--- a/sound/soc/codecs/tlv320aic32x4-spi.c ++++ b/sound/soc/codecs/tlv320aic32x4-spi.c +@@ -3,7 +3,7 @@ + * + * Copyright 2011 NW Digital Radio + * +- * Author: Jeremy McDermond ++ * Author: Annaliese McDermond + * + * Based on sound/soc/codecs/wm8974 and TI driver for kernel 2.6.27. + * +@@ -74,5 +74,5 @@ static struct spi_driver aic32x4_spi_dri + module_spi_driver(aic32x4_spi_driver); + + MODULE_DESCRIPTION("ASoC TLV320AIC32x4 codec driver SPI"); +-MODULE_AUTHOR("Jeremy McDermond "); ++MODULE_AUTHOR("Annaliese McDermond "); + MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm2708/patches-4.19/950-0418-ASoC-tlv320aic32x4-Update-copyright-and-use-SPDX-ide.patch b/target/linux/brcm2708/patches-4.19/950-0418-ASoC-tlv320aic32x4-Update-copyright-and-use-SPDX-ide.patch new file mode 100644 index 000000000..530f8a495 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0418-ASoC-tlv320aic32x4-Update-copyright-and-use-SPDX-ide.patch @@ -0,0 +1,70 @@ +From c287dc67e33f04d09f8bc0d2cdf900d6b720fc78 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 3 Apr 2019 21:17:16 -0700 +Subject: [PATCH 418/703] ASoC: tlv320aic32x4: Update copyright and use SPDX + identifier + +commit 8a1d95c393d971e624fc28f11516b0bc3a7fa706 upstream. + +Update the copyright dates and use the SPDX identifier instead +of reciting the license. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4-i2c.c | 14 ++------------ + sound/soc/codecs/tlv320aic32x4-spi.c | 14 ++------------ + 2 files changed, 4 insertions(+), 24 deletions(-) + +--- a/sound/soc/codecs/tlv320aic32x4-i2c.c ++++ b/sound/soc/codecs/tlv320aic32x4-i2c.c +@@ -1,21 +1,11 @@ +-/* +- * linux/sound/soc/codecs/tlv320aic32x4-i2c.c ++/* SPDX-License-Identifier: GPL-2.0 + * +- * Copyright 2011 NW Digital Radio ++ * Copyright 2011-2019 NW Digital Radio + * + * Author: Annaliese McDermond + * + * Based on sound/soc/codecs/wm8974 and TI driver for kernel 2.6.27. + * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. + */ + + #include +--- a/sound/soc/codecs/tlv320aic32x4-spi.c ++++ b/sound/soc/codecs/tlv320aic32x4-spi.c +@@ -1,21 +1,11 @@ +-/* +- * linux/sound/soc/codecs/tlv320aic32x4-spi.c ++/* SPDX-License-Identifier: GPL-2.0 + * +- * Copyright 2011 NW Digital Radio ++ * Copyright 2011-2019 NW Digital Radio + * + * Author: Annaliese McDermond + * + * Based on sound/soc/codecs/wm8974 and TI driver for kernel 2.6.27. + * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. + */ + + #include diff --git a/target/linux/brcm2708/patches-4.19/950-0419-ASoC-tlv320aic32x4-Add-Switch-for-Setting-Common-Mod.patch b/target/linux/brcm2708/patches-4.19/950-0419-ASoC-tlv320aic32x4-Add-Switch-for-Setting-Common-Mod.patch new file mode 100644 index 000000000..07b71d023 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0419-ASoC-tlv320aic32x4-Add-Switch-for-Setting-Common-Mod.patch @@ -0,0 +1,40 @@ +From 8821b9227b5e19f7a745c5836b6ef4b9a478904f Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 3 Apr 2019 21:01:54 -0700 +Subject: [PATCH 419/703] ASoC: tlv320aic32x4: Add Switch for Setting Common + Mode Voltage + +commit 44ceee847e27c828f2f1ef4e400e6bc0c8d04de3 upstream. + +Add a switch for setting common mode voltage. This can allow +for higher drive levels on the amplifier outputs. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -242,6 +242,12 @@ static DECLARE_TLV_DB_SCALE(tlv_driver_g + /* -12dB min, 0.5dB steps */ + static DECLARE_TLV_DB_SCALE(tlv_adc_vol, -1200, 50, 0); + ++static const char * const lo_cm_text[] = { ++ "Full Chip", "1.65V", ++}; ++ ++static SOC_ENUM_SINGLE_DECL(lo_cm_enum, AIC32X4_CMMODE, 3, lo_cm_text); ++ + static const struct snd_kcontrol_new aic32x4_snd_controls[] = { + SOC_DOUBLE_R_S_TLV("PCM Playback Volume", AIC32X4_LDACVOL, + AIC32X4_RDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm), +@@ -255,6 +261,7 @@ static const struct snd_kcontrol_new aic + AIC32X4_HPRGAIN, 6, 0x01, 1), + SOC_DOUBLE_R("LO DAC Playback Switch", AIC32X4_LOLGAIN, + AIC32X4_LORGAIN, 6, 0x01, 1), ++ SOC_ENUM("LO Playback Common Mode Switch", lo_cm_enum), + SOC_DOUBLE_R("Mic PGA Switch", AIC32X4_LMICPGAVOL, + AIC32X4_RMICPGAVOL, 7, 0x01, 1), + diff --git a/target/linux/brcm2708/patches-4.19/950-0420-ASoC-tlv320aic32x4-Add-Playback-PowerTune-Controls.patch b/target/linux/brcm2708/patches-4.19/950-0420-ASoC-tlv320aic32x4-Add-Playback-PowerTune-Controls.patch new file mode 100644 index 000000000..b806e674c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0420-ASoC-tlv320aic32x4-Add-Playback-PowerTune-Controls.patch @@ -0,0 +1,52 @@ +From cbea77ecf69bf49def7f8222e38037a9349adbaa Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Wed, 3 Apr 2019 21:01:55 -0700 +Subject: [PATCH 420/703] ASoC: tlv320aic32x4: Add Playback PowerTune Controls + +commit d3e6e374566e1154820a9a3dc82f7eef646fcf95 upstream. + +PowerTune controls the power level of the chip. On playback this +indirectly controls things like the gain of the various output +amplifiers. This can allow for the decrease of output levels +from the codec. This adds controls for those power levels to +the driver. + +Signed-off-by: Annaliese McDermond +Signed-off-by: Mark Brown +--- + sound/soc/codecs/tlv320aic32x4.c | 9 +++++++++ + sound/soc/codecs/tlv320aic32x4.h | 2 ++ + 2 files changed, 11 insertions(+) + +--- a/sound/soc/codecs/tlv320aic32x4.c ++++ b/sound/soc/codecs/tlv320aic32x4.c +@@ -248,9 +248,18 @@ static const char * const lo_cm_text[] = + + static SOC_ENUM_SINGLE_DECL(lo_cm_enum, AIC32X4_CMMODE, 3, lo_cm_text); + ++static const char * const ptm_text[] = { ++ "P3", "P2", "P1", ++}; ++ ++static SOC_ENUM_SINGLE_DECL(l_ptm_enum, AIC32X4_LPLAYBACK, 2, ptm_text); ++static SOC_ENUM_SINGLE_DECL(r_ptm_enum, AIC32X4_RPLAYBACK, 2, ptm_text); ++ + static const struct snd_kcontrol_new aic32x4_snd_controls[] = { + SOC_DOUBLE_R_S_TLV("PCM Playback Volume", AIC32X4_LDACVOL, + AIC32X4_RDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm), ++ SOC_ENUM("DAC Left Playback PowerTune Switch", l_ptm_enum), ++ SOC_ENUM("DAC Right Playback PowerTune Switch", r_ptm_enum), + SOC_DOUBLE_R_S_TLV("HP Driver Gain Volume", AIC32X4_HPLGAIN, + AIC32X4_HPRGAIN, 0, -0x6, 0x1d, 5, 0, + tlv_driver_gain), +--- a/sound/soc/codecs/tlv320aic32x4.h ++++ b/sound/soc/codecs/tlv320aic32x4.h +@@ -78,6 +78,8 @@ int aic32x4_register_clocks(struct devic + + #define AIC32X4_PWRCFG AIC32X4_REG(1, 1) + #define AIC32X4_LDOCTL AIC32X4_REG(1, 2) ++#define AIC32X4_LPLAYBACK AIC32X4_REG(1, 3) ++#define AIC32X4_RPLAYBACK AIC32X4_REG(1, 4) + #define AIC32X4_OUTPWRCTL AIC32X4_REG(1, 9) + #define AIC32X4_CMMODE AIC32X4_REG(1, 10) + #define AIC32X4_HPLROUTE AIC32X4_REG(1, 12) diff --git a/target/linux/brcm2708/patches-4.19/950-0421-dtoverlays-Add-Support-for-the-UDRC-DRAWS.patch b/target/linux/brcm2708/patches-4.19/950-0421-dtoverlays-Add-Support-for-the-UDRC-DRAWS.patch new file mode 100644 index 000000000..8da46da0e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0421-dtoverlays-Add-Support-for-the-UDRC-DRAWS.patch @@ -0,0 +1,445 @@ +From f1e74b2152a21e848075ea40ba8e8665f8313739 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Sun, 17 Mar 2019 16:48:36 -0700 +Subject: [PATCH 421/703] dtoverlays: Add Support for the UDRC/DRAWS + +Adds a new overlay to support the Northwest Digital Radio +DRAWS and UDRC HATs. See http://nwdigitalradio.com. + +Signed-off-by: Annaliese McDermond +--- + arch/arm/boot/dts/overlays/Makefile | 2 + + arch/arm/boot/dts/overlays/README | 59 ++++++ + arch/arm/boot/dts/overlays/draws-overlay.dts | 200 +++++++++++++++++++ + arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 ++++++++++++ + 4 files changed, 389 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -29,6 +29,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + dionaudio-loco-v2.dtbo \ + dpi18.dtbo \ + dpi24.dtbo \ ++ draws.dtbo \ + dwc-otg.dtbo \ + dwc2.dtbo \ + enc28j60.dtbo \ +@@ -146,6 +147,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + tpm-slb9670.dtbo \ + uart0.dtbo \ + uart1.dtbo \ ++ udrc.dtbo \ + upstream.dtbo \ + upstream-aux-interrupt.dtbo \ + vc4-fkms-v3d.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -531,6 +531,59 @@ Load: dtoverlay=dpi24 + Params: + + ++Name: draws ++Info: Configures the NW Digital Radio DRAWS Hat ++ ++ The board includes an ADC to measure various board values and also ++ provides two analog user inputs on the expansion header. The ADC ++ can be configured for various sample rates and gain values to adjust ++ the input range. Tables describing the two parameters follow. ++ ++ ADC Gain Values: ++ 0 = +/- 6.144V ++ 1 = +/- 4.096V ++ 2 = +/- 2.048V ++ 3 = +/- 1.024V ++ 4 = +/- 0.512V ++ 5 = +/- 0.256V ++ 6 = +/- 0.256V ++ 7 = +/- 0.256V ++ ++ ADC Datarate Values: ++ 0 = 128sps ++ 1 = 250sps ++ 2 = 490sps ++ 3 = 920sps ++ 4 = 1600sps (default) ++ 5 = 2400sps ++ 6 = 3300sps ++ 7 = 3300sps ++Load: dtoverlay=draws,= ++Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs ++ input voltage sensor (default 1) ++ ++ draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage ++ sensor ++ ++ draws_adc_ch5_gain Sets the full scale resolution of the ADCs ++ 5V rail voltage sensor (default 1) ++ ++ draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage ++ sensor ++ ++ draws_adc_ch6_gain Sets the full scale resolution of the ADCs ++ AIN2 input (default 2) ++ ++ draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input ++ ++ draws_adc_ch7_gain Sets the full scale resolution of the ADCs ++ AIN3 input (default 2) ++ ++ draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input ++ ++ alsaname Name of the ALSA audio device (default "draws") ++ ++ + Name: dwc-otg + Info: Selects the dwc_otg USB controller driver which has fiq support. This + is the default on all except the Pi Zero which defaults to dwc2. +@@ -2117,6 +2170,12 @@ Params: txd1_pin GPIO pin + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15) + + ++Name: udrc ++Info: Configures the NW Digital Radio UDRC Hat ++Load: dtoverlay=udrc,= ++Params: alsaname Name of the ALSA audio device (default "udrc") ++ ++ + Name: upstream + Info: Allow usage of downstream .dtb with upstream kernel. Comprises + vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays. +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/draws-overlay.dts +@@ -0,0 +1,200 @@ ++#include ++/* ++ * Device tree overlay for the DRAWS Hardware ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ udrc0_ldoin: udrc0_ldoin { ++ compatible = "regulator-fixed"; ++ regulator-name = "ldoin"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ }; ++ ++ pps: pps { ++ compatible = "pps-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pps_pins>; ++ gpios = <&gpio 7 0>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c_arm>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ tlv320aic32x4: tlv320aic32x4@18 { ++ compatible = "ti,tlv320aic32x4"; ++ reg = <0x18>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ ++ clocks = <&clocks BCM2835_CLOCK_GP0>; ++ clock-names = "mclk"; ++ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>; ++ assigned-clock-rates = <25000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpclk0_pin &aic3204_reset>; ++ ++ reset-gpios = <&gpio 13 0>; ++ ++ iov-supply = <&udrc0_ldoin>; ++ ldoin-supply = <&udrc0_ldoin>; ++ }; ++ ++ sc16is752: sc16is752@50 { ++ compatible = "nxp,sc16is752"; ++ reg = <0x50>; ++ clocks = <&sc16is752_clk>; ++ interrupt-parent = <&gpio>; ++ interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */ ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sc16is752_irq>; ++ ++ sc16is752_clk: sc16is752_clk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <1843200>; ++ }; ++ }; ++ ++ tla2024: tla2024@48 { ++ compatible = "ti,ads1015"; ++ reg = <0x48>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ adc_ch4: channel@4 { ++ reg = <4>; ++ ti,gain = <1>; ++ ti,datarate = <4>; ++ }; ++ ++ adc_ch5: channel@5 { ++ reg = <5>; ++ ti,gain = <1>; ++ ti,datarate = <4>; ++ }; ++ ++ adc_ch6: channel@6 { ++ reg = <6>; ++ ti,gain = <2>; ++ ti,datarate = <4>; ++ }; ++ ++ adc_ch7: channel@7 { ++ reg = <7>; ++ ti,gain = <2>; ++ ti,datarate = <4>; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ snd: __overlay__ { ++ compatible = "simple-audio-card"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ ++ simple-audio-card,name = "draws"; ++ simple-audio-card,format = "i2s"; ++ ++ simple-audio-card,bitclock-master = <&dailink0_master>; ++ simple-audio-card,frame-master = <&dailink0_master>; ++ ++ simple-audio-card,widgets = ++ "Line", "Line In", ++ "Line", "Line Out"; ++ ++ simple-audio-card,routing = ++ "IN1_R", "Line In", ++ "IN1_L", "Line In", ++ "CM_L", "Line In", ++ "CM_R", "Line In", ++ "Line Out", "LOR", ++ "Line Out", "LOL"; ++ ++ dailink0_master: simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&tlv320aic32x4>; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&gpio>; ++ __overlay__ { ++ gpclk0_pin: gpclk0_pin { ++ brcm,pins = <4>; ++ brcm,function = <4>; ++ }; ++ ++ aic3204_reset: aic3204_reset { ++ brcm,pins = <13>; ++ brcm,function = <1>; ++ brcm,pull = <1>; ++ }; ++ ++ aic3204_gpio: aic3204_gpio { ++ brcm,pins = <26>; ++ }; ++ ++ sc16is752_irq: sc16is752_irq { ++ brcm,pins = <17>; ++ brcm,function = <0>; ++ brcm,pull = <2>; ++ }; ++ ++ pps_pins: pps_pins { ++ brcm,pins = <7>; ++ brcm,function = <0>; ++ brcm,pull = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0"; ++ draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0"; ++ draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0"; ++ draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0"; ++ draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0"; ++ draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0"; ++ draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0"; ++ draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0"; ++ alsaname = <&snd>, "simple-audio-card,name"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts +@@ -0,0 +1,128 @@ ++#include ++/* ++ * Device tree overlay for the Universal Digital Radio Controller ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ clocks = <&clocks BCM2835_CLOCK_PCM>; ++ clock-names = "pcm"; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ udrc0_ldoin: udrc0_ldoin { ++ compatible = "regulator-fixed"; ++ regulator-name = "ldoin"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ clock-frequency = <400000>; ++ ++ tlv320aic32x4: tlv320aic32x4@18 { ++ compatible = "ti,tlv320aic32x4"; ++ #sound-dai-cells = <0>; ++ reg = <0x18>; ++ status = "okay"; ++ ++ clocks = <&clocks BCM2835_CLOCK_GP0>; ++ clock-names = "mclk"; ++ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>; ++ assigned-clock-rates = <25000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gpclk0_pin &aic3204_reset>; ++ ++ reset-gpios = <&gpio 13 0>; ++ ++ iov-supply = <&udrc0_ldoin>; ++ ldoin-supply = <&udrc0_ldoin>; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ snd: __overlay__ { ++ compatible = "simple-audio-card"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ ++ simple-audio-card,name = "udrc"; ++ simple-audio-card,format = "i2s"; ++ ++ simple-audio-card,bitclock-master = <&dailink0_master>; ++ simple-audio-card,frame-master = <&dailink0_master>; ++ ++ simple-audio-card,widgets = ++ "Line", "Line In", ++ "Line", "Line Out"; ++ ++ simple-audio-card,routing = ++ "IN1_R", "Line In", ++ "IN1_L", "Line In", ++ "CM_L", "Line In", ++ "CM_R", "Line In", ++ "Line Out", "LOR", ++ "Line Out", "LOL"; ++ ++ dailink0_master: simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&tlv320aic32x4>; ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&gpio>; ++ __overlay__ { ++ gpclk0_pin: gpclk0_pin { ++ brcm,pins = <4>; ++ brcm,function = <4>; ++ }; ++ ++ aic3204_reset: aic3204_reset { ++ brcm,pins = <13>; ++ brcm,function = <1>; ++ brcm,pull = <1>; ++ }; ++ ++ aic3204_gpio: aic3204_gpio { ++ brcm,pins = <26>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ alsaname = <&snd>, "simple-audio-card,name"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0422-dwc_otg-only-do_split-when-we-actually-need-to-do-a-.patch b/target/linux/brcm2708/patches-4.19/950-0422-dwc_otg-only-do_split-when-we-actually-need-to-do-a-.patch new file mode 100644 index 000000000..443b6408d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0422-dwc_otg-only-do_split-when-we-actually-need-to-do-a-.patch @@ -0,0 +1,55 @@ +From e30b8c6f64fe1cd5ea4e522186847be170efe88b Mon Sep 17 00:00:00 2001 +From: P33M +Date: Mon, 8 Apr 2019 12:45:23 +0100 +Subject: [PATCH 422/703] dwc_otg: only do_split when we actually need to do a + split + +The previous test would fail if the root port was in fullspeed mode +and there was a hub between the FS device and the root port. While +the transfer worked, the schedule mangling performed for high-speed +split transfers would break leading to an 8ms polling interval. +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +@@ -167,8 +167,10 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot + char *speed, *type; + int dev_speed; + uint32_t hub_addr, hub_port; ++ hprt0_data_t hprt; + + dwc_memset(qh, 0, sizeof(dwc_otg_qh_t)); ++ hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0); + + /* Initialize QH */ + qh->ep_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info); +@@ -191,9 +193,8 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot + + qh->nak_frame = 0xffff; + +- if (((dev_speed == USB_SPEED_LOW) || +- (dev_speed == USB_SPEED_FULL)) && +- (hub_addr != 0 && hub_addr != 1)) { ++ if (hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED && ++ dev_speed != USB_SPEED_HIGH) { + DWC_DEBUGPL(DBG_HCD, + "QH init: EP %d: TT found at hub addr %d, for port %d\n", + dwc_otg_hcd_get_ep_num(&urb->pipe_info), hub_addr, +@@ -204,7 +205,6 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot + + if (qh->ep_type == UE_INTERRUPT || qh->ep_type == UE_ISOCHRONOUS) { + /* Compute scheduling parameters once and save them. */ +- hprt0_data_t hprt; + + /** @todo Account for split transfers in the bus time. */ + int bytecount = +@@ -219,7 +219,6 @@ void qh_init(dwc_otg_hcd_t * hcd, dwc_ot + SCHEDULE_SLOP); + qh->interval = urb->interval; + +- hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0); + if (hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) { + if (dev_speed == USB_SPEED_LOW || + dev_speed == USB_SPEED_FULL) { diff --git a/target/linux/brcm2708/patches-4.19/950-0423-Input-ili210x-fetch-touchscreen-geometry-from-DT.patch b/target/linux/brcm2708/patches-4.19/950-0423-Input-ili210x-fetch-touchscreen-geometry-from-DT.patch new file mode 100644 index 000000000..763bcbbf5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0423-Input-ili210x-fetch-touchscreen-geometry-from-DT.patch @@ -0,0 +1,490 @@ +From 7424847b3053bb995d52b13b6b7a387d682cde31 Mon Sep 17 00:00:00 2001 +From: Samuel Hsu +Date: Mon, 8 Apr 2019 16:42:17 +0200 +Subject: [PATCH 423/703] Input: ili210x - fetch touchscreen geometry from DT + +commit f67cc3e927d8414ad3872e046764534ea1f5db0d upstream + +Fetching the geometry from the ILI251x registers seems unreliable and +sometimes returns all zeroes. Add support for fetching the geometry and +axis inversion from DT instead. + +Signed-off-by: Marek Vasut +Signed-off-by: Dmitry Torokhov +--- + drivers/input/touchscreen/ili210x.c | 321 +++++++++++++++++----------- + 1 file changed, 194 insertions(+), 127 deletions(-) + +--- a/drivers/input/touchscreen/ili210x.c ++++ b/drivers/input/touchscreen/ili210x.c +@@ -4,11 +4,15 @@ + #include + #include + #include ++#include + #include + #include +-#include ++#include ++#include ++#include + +-#define MAX_TOUCHES 2 ++#define ILI210X_TOUCHES 2 ++#define ILI251X_TOUCHES 10 + #define DEFAULT_POLL_PERIOD 20 + + /* Touchscreen commands */ +@@ -17,41 +21,32 @@ + #define REG_FIRMWARE_VERSION 0x40 + #define REG_CALIBRATE 0xcc + +-struct finger { +- u8 x_low; +- u8 x_high; +- u8 y_low; +- u8 y_high; +-} __packed; +- +-struct touchdata { +- u8 status; +- struct finger finger[MAX_TOUCHES]; +-} __packed; +- +-struct panel_info { +- struct finger finger_max; +- u8 xchannel_num; +- u8 ychannel_num; +-} __packed; +- + struct firmware_version { + u8 id; + u8 major; + u8 minor; + } __packed; + ++enum ili2xxx_model { ++ MODEL_ILI210X, ++ MODEL_ILI251X, ++}; ++ + struct ili210x { + struct i2c_client *client; + struct input_dev *input; +- bool (*get_pendown_state)(void); + unsigned int poll_period; + struct delayed_work dwork; ++ struct gpio_desc *reset_gpio; ++ struct touchscreen_properties prop; ++ enum ili2xxx_model model; ++ unsigned int max_touches; + }; + + static int ili210x_read_reg(struct i2c_client *client, u8 reg, void *buf, + size_t len) + { ++ struct ili210x *priv = i2c_get_clientdata(client); + struct i2c_msg msg[2] = { + { + .addr = client->addr, +@@ -67,7 +62,38 @@ static int ili210x_read_reg(struct i2c_c + } + }; + +- if (i2c_transfer(client->adapter, msg, 2) != 2) { ++ if (priv->model == MODEL_ILI251X) { ++ if (i2c_transfer(client->adapter, msg, 1) != 1) { ++ dev_err(&client->dev, "i2c transfer failed\n"); ++ return -EIO; ++ } ++ ++ usleep_range(5000, 5500); ++ ++ if (i2c_transfer(client->adapter, msg + 1, 1) != 1) { ++ dev_err(&client->dev, "i2c transfer failed\n"); ++ return -EIO; ++ } ++ } else { ++ if (i2c_transfer(client->adapter, msg, 2) != 2) { ++ dev_err(&client->dev, "i2c transfer failed\n"); ++ return -EIO; ++ } ++ } ++ ++ return 0; ++} ++ ++static int ili210x_read(struct i2c_client *client, void *buf, size_t len) ++{ ++ struct i2c_msg msg = { ++ .addr = client->addr, ++ .flags = I2C_M_RD, ++ .len = len, ++ .buf = buf, ++ }; ++ ++ if (i2c_transfer(client->adapter, &msg, 1) != 1) { + dev_err(&client->dev, "i2c transfer failed\n"); + return -EIO; + } +@@ -75,42 +101,72 @@ static int ili210x_read_reg(struct i2c_c + return 0; + } + +-static void ili210x_report_events(struct input_dev *input, +- const struct touchdata *touchdata) ++static bool ili210x_touchdata_to_coords(struct ili210x *priv, u8 *touchdata, ++ unsigned int finger, ++ unsigned int *x, unsigned int *y) + { +- int i; +- bool touch; +- unsigned int x, y; +- const struct finger *finger; ++ if (finger >= ILI210X_TOUCHES) ++ return false; + +- for (i = 0; i < MAX_TOUCHES; i++) { +- input_mt_slot(input, i); ++ if (touchdata[0] & BIT(finger)) ++ return false; + +- finger = &touchdata->finger[i]; ++ *x = get_unaligned_be16(touchdata + 1 + (finger * 4) + 0); ++ *y = get_unaligned_be16(touchdata + 1 + (finger * 4) + 2); + +- touch = touchdata->status & (1 << i); +- input_mt_report_slot_state(input, MT_TOOL_FINGER, touch); +- if (touch) { +- x = finger->x_low | (finger->x_high << 8); +- y = finger->y_low | (finger->y_high << 8); ++ return true; ++} ++ ++static bool ili251x_touchdata_to_coords(struct ili210x *priv, u8 *touchdata, ++ unsigned int finger, ++ unsigned int *x, unsigned int *y) ++{ ++ if (finger >= ILI251X_TOUCHES) ++ return false; ++ ++ *x = get_unaligned_be16(touchdata + 1 + (finger * 5) + 0); ++ if (!(*x & BIT(15))) /* Touch indication */ ++ return false; ++ ++ *x &= 0x3fff; ++ *y = get_unaligned_be16(touchdata + 1 + (finger * 5) + 2); ++ ++ return true; ++} ++ ++static bool ili210x_report_events(struct ili210x *priv, u8 *touchdata) ++{ ++ struct input_dev *input = priv->input; ++ int i; ++ bool contact = false, touch = false; ++ unsigned int x = 0, y = 0; + +- input_report_abs(input, ABS_MT_POSITION_X, x); +- input_report_abs(input, ABS_MT_POSITION_Y, y); ++ for (i = 0; i < priv->max_touches; i++) { ++ if (priv->model == MODEL_ILI210X) { ++ touch = ili210x_touchdata_to_coords(priv, touchdata, ++ i, &x, &y); ++ } else if (priv->model == MODEL_ILI251X) { ++ touch = ili251x_touchdata_to_coords(priv, touchdata, ++ i, &x, &y); ++ if (touch) ++ contact = true; + } ++ ++ input_mt_slot(input, i); ++ input_mt_report_slot_state(input, MT_TOOL_FINGER, touch); ++ if (!touch) ++ continue; ++ touchscreen_report_pos(input, &priv->prop, x, y, ++ true); + } + + input_mt_report_pointer_emulation(input, false); + input_sync(input); +-} + +-static bool get_pendown_state(const struct ili210x *priv) +-{ +- bool state = false; +- +- if (priv->get_pendown_state) +- state = priv->get_pendown_state(); ++ if (priv->model == MODEL_ILI210X) ++ contact = touchdata[0] & 0xf3; + +- return state; ++ return contact; + } + + static void ili210x_work(struct work_struct *work) +@@ -118,20 +174,29 @@ static void ili210x_work(struct work_str + struct ili210x *priv = container_of(work, struct ili210x, + dwork.work); + struct i2c_client *client = priv->client; +- struct touchdata touchdata; +- int error; ++ u8 touchdata[64] = { 0 }; ++ bool touch; ++ int error = -EINVAL; ++ ++ if (priv->model == MODEL_ILI210X) { ++ error = ili210x_read_reg(client, REG_TOUCHDATA, ++ touchdata, sizeof(touchdata)); ++ } else if (priv->model == MODEL_ILI251X) { ++ error = ili210x_read_reg(client, REG_TOUCHDATA, ++ touchdata, 31); ++ if (!error && touchdata[0] == 2) ++ error = ili210x_read(client, &touchdata[31], 20); ++ } + +- error = ili210x_read_reg(client, REG_TOUCHDATA, +- &touchdata, sizeof(touchdata)); + if (error) { + dev_err(&client->dev, + "Unable to get touchdata, err = %d\n", error); + return; + } + +- ili210x_report_events(priv->input, &touchdata); ++ touch = ili210x_report_events(priv, touchdata); + +- if ((touchdata.status & 0xf3) || get_pendown_state(priv)) ++ if (touch) + schedule_delayed_work(&priv->dwork, + msecs_to_jiffies(priv->poll_period)); + } +@@ -180,30 +245,76 @@ static const struct attribute_group ili2 + .attrs = ili210x_attributes, + }; + ++static void ili210x_power_down(void *data) ++{ ++ struct gpio_desc *reset_gpio = data; ++ ++ gpiod_set_value_cansleep(reset_gpio, 1); ++} ++ ++static void ili210x_cancel_work(void *data) ++{ ++ struct ili210x *priv = data; ++ ++ cancel_delayed_work_sync(&priv->dwork); ++} ++ + static int ili210x_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) + { + struct device *dev = &client->dev; +- const struct ili210x_platform_data *pdata = dev_get_platdata(dev); + struct ili210x *priv; ++ struct gpio_desc *reset_gpio; + struct input_dev *input; +- struct panel_info panel; + struct firmware_version firmware; +- int xmax, ymax; ++ enum ili2xxx_model model; + int error; + +- dev_dbg(dev, "Probing for ILI210X I2C Touschreen driver"); ++ model = (enum ili2xxx_model)id->driver_data; + +- if (!pdata) { +- dev_err(dev, "No platform data!\n"); +- return -EINVAL; +- } ++ dev_dbg(dev, "Probing for ILI210X I2C Touschreen driver"); + + if (client->irq <= 0) { + dev_err(dev, "No IRQ!\n"); + return -EINVAL; + } + ++ reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); ++ if (IS_ERR(reset_gpio)) ++ return PTR_ERR(reset_gpio); ++ ++ if (reset_gpio) { ++ error = devm_add_action_or_reset(dev, ili210x_power_down, ++ reset_gpio); ++ if (error) ++ return error; ++ ++ usleep_range(50, 100); ++ gpiod_set_value_cansleep(reset_gpio, 0); ++ msleep(100); ++ } ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ input = devm_input_allocate_device(dev); ++ if (!input) ++ return -ENOMEM; ++ ++ priv->client = client; ++ priv->input = input; ++ priv->poll_period = DEFAULT_POLL_PERIOD; ++ INIT_DELAYED_WORK(&priv->dwork, ili210x_work); ++ priv->reset_gpio = reset_gpio; ++ priv->model = model; ++ if (model == MODEL_ILI210X) ++ priv->max_touches = ILI210X_TOUCHES; ++ if (model == MODEL_ILI251X) ++ priv->max_touches = ILI251X_TOUCHES; ++ ++ i2c_set_clientdata(client, priv); ++ + /* Get firmware version */ + error = ili210x_read_reg(client, REG_FIRMWARE_VERSION, + &firmware, sizeof(firmware)); +@@ -213,70 +324,40 @@ static int ili210x_i2c_probe(struct i2c_ + return error; + } + +- /* get panel info */ +- error = ili210x_read_reg(client, REG_PANEL_INFO, &panel, sizeof(panel)); +- if (error) { +- dev_err(dev, "Failed to get panel information, err: %d\n", +- error); +- return error; +- } +- +- xmax = panel.finger_max.x_low | (panel.finger_max.x_high << 8); +- ymax = panel.finger_max.y_low | (panel.finger_max.y_high << 8); +- +- priv = kzalloc(sizeof(*priv), GFP_KERNEL); +- input = input_allocate_device(); +- if (!priv || !input) { +- error = -ENOMEM; +- goto err_free_mem; +- } +- +- priv->client = client; +- priv->input = input; +- priv->get_pendown_state = pdata->get_pendown_state; +- priv->poll_period = pdata->poll_period ? : DEFAULT_POLL_PERIOD; +- INIT_DELAYED_WORK(&priv->dwork, ili210x_work); +- + /* Setup input device */ + input->name = "ILI210x Touchscreen"; + input->id.bustype = BUS_I2C; + input->dev.parent = dev; + +- __set_bit(EV_SYN, input->evbit); +- __set_bit(EV_KEY, input->evbit); +- __set_bit(EV_ABS, input->evbit); +- __set_bit(BTN_TOUCH, input->keybit); +- +- /* Single touch */ +- input_set_abs_params(input, ABS_X, 0, xmax, 0, 0); +- input_set_abs_params(input, ABS_Y, 0, ymax, 0, 0); +- + /* Multi touch */ +- input_mt_init_slots(input, MAX_TOUCHES, 0); +- input_set_abs_params(input, ABS_MT_POSITION_X, 0, xmax, 0, 0); +- input_set_abs_params(input, ABS_MT_POSITION_Y, 0, ymax, 0, 0); ++ input_set_abs_params(input, ABS_MT_POSITION_X, 0, 0xffff, 0, 0); ++ input_set_abs_params(input, ABS_MT_POSITION_Y, 0, 0xffff, 0, 0); ++ touchscreen_parse_properties(input, true, &priv->prop); ++ input_mt_init_slots(input, priv->max_touches, INPUT_MT_DIRECT); + +- i2c_set_clientdata(client, priv); ++ error = devm_add_action(dev, ili210x_cancel_work, priv); ++ if (error) ++ return error; + +- error = request_irq(client->irq, ili210x_irq, pdata->irq_flags, +- client->name, priv); ++ error = devm_request_irq(dev, client->irq, ili210x_irq, 0, ++ client->name, priv); + if (error) { + dev_err(dev, "Unable to request touchscreen IRQ, err: %d\n", + error); +- goto err_free_mem; ++ return error; + } + +- error = sysfs_create_group(&dev->kobj, &ili210x_attr_group); ++ error = devm_device_add_group(dev, &ili210x_attr_group); + if (error) { + dev_err(dev, "Unable to create sysfs attributes, err: %d\n", + error); +- goto err_free_irq; ++ return error; + } + + error = input_register_device(priv->input); + if (error) { + dev_err(dev, "Cannot register input device, err: %d\n", error); +- goto err_remove_sysfs; ++ return error; + } + + device_init_wakeup(dev, 1); +@@ -286,28 +367,6 @@ static int ili210x_i2c_probe(struct i2c_ + client->irq, firmware.id, firmware.major, firmware.minor); + + return 0; +- +-err_remove_sysfs: +- sysfs_remove_group(&dev->kobj, &ili210x_attr_group); +-err_free_irq: +- free_irq(client->irq, priv); +-err_free_mem: +- input_free_device(input); +- kfree(priv); +- return error; +-} +- +-static int ili210x_i2c_remove(struct i2c_client *client) +-{ +- struct ili210x *priv = i2c_get_clientdata(client); +- +- sysfs_remove_group(&client->dev.kobj, &ili210x_attr_group); +- free_irq(priv->client->irq, priv); +- cancel_delayed_work_sync(&priv->dwork); +- input_unregister_device(priv->input); +- kfree(priv); +- +- return 0; + } + + static int __maybe_unused ili210x_i2c_suspend(struct device *dev) +@@ -334,19 +393,27 @@ static SIMPLE_DEV_PM_OPS(ili210x_i2c_pm, + ili210x_i2c_suspend, ili210x_i2c_resume); + + static const struct i2c_device_id ili210x_i2c_id[] = { +- { "ili210x", 0 }, ++ { "ili210x", MODEL_ILI210X }, ++ { "ili251x", MODEL_ILI251X }, + { } + }; + MODULE_DEVICE_TABLE(i2c, ili210x_i2c_id); + ++static const struct of_device_id ili210x_dt_ids[] = { ++ { .compatible = "ilitek,ili210x", .data = (void *)MODEL_ILI210X }, ++ { .compatible = "ilitek,ili251x", .data = (void *)MODEL_ILI251X }, ++ { }, ++}; ++MODULE_DEVICE_TABLE(of, ili210x_dt_ids); ++ + static struct i2c_driver ili210x_ts_driver = { + .driver = { + .name = "ili210x_i2c", + .pm = &ili210x_i2c_pm, ++ .of_match_table = ili210x_dt_ids, + }, + .id_table = ili210x_i2c_id, + .probe = ili210x_i2c_probe, +- .remove = ili210x_i2c_remove, + }; + + module_i2c_driver(ili210x_ts_driver); diff --git a/target/linux/brcm2708/patches-4.19/950-0424-Input-ili210x-add-DT-binding-document.patch b/target/linux/brcm2708/patches-4.19/950-0424-Input-ili210x-add-DT-binding-document.patch new file mode 100644 index 000000000..50dbc9539 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0424-Input-ili210x-add-DT-binding-document.patch @@ -0,0 +1,47 @@ +From 5cea7939c6062752322697e33f8a90e33fca461f Mon Sep 17 00:00:00 2001 +From: Samuel Hsu +Date: Mon, 8 Apr 2019 16:49:51 +0200 +Subject: [PATCH 424/703] Input: ili210x - add DT binding document + +commit 41a852e002e65ab7a1e6841b485d72d022e95df2 upstream + +Add DT binding document for the Ilitek ILI210x and ILI251x +touchscreen controllers. + +Signed-off-by: Marek Vasut +Reviewed-by: Rob Herring +Signed-off-by: Dmitry Torokhov +--- + .../bindings/input/ilitek,ili2xxx.txt | 26 +++++++++++++++++++ + 1 file changed, 26 insertions(+) + create mode 100644 Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt +@@ -0,0 +1,26 @@ ++Ilitek ILI210x/ILI251x touchscreen controller ++ ++Required properties: ++- compatible: ++ ilitek,ili210x for ILI210x ++ ilitek,ili251x for ILI251x ++ ++- reg: The I2C address of the device ++ ++- interrupts: The sink for the touchscreen's IRQ output ++ See ../interrupt-controller/interrupts.txt ++ ++Optional properties for main touchpad device: ++ ++- reset-gpios: GPIO specifier for the touchscreen's reset pin (active low) ++ ++Example: ++ ++ touchscreen@41 { ++ compatible = "ilitek,ili251x"; ++ reg = <0x41>; ++ interrupt-parent = <&gpio4>; ++ interrupts = <7 IRQ_TYPE_EDGE_FALLING>; ++ reset-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>; ++ }; ++ diff --git a/target/linux/brcm2708/patches-4.19/950-0425-configs-Add-TOUCHSCREEN_ILI210X-m.patch b/target/linux/brcm2708/patches-4.19/950-0425-configs-Add-TOUCHSCREEN_ILI210X-m.patch new file mode 100644 index 000000000..970ae3a95 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0425-configs-Add-TOUCHSCREEN_ILI210X-m.patch @@ -0,0 +1,42 @@ +From e01ec5fd94e01b665f4deb1567f5b1da0537cce8 Mon Sep 17 00:00:00 2001 +From: Samuel Hsu +Date: Mon, 8 Apr 2019 16:54:34 +0200 +Subject: [PATCH 425/703] configs: Add TOUCHSCREEN_ILI210X=m + +Signed-off-by: Samuel Hsu +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -565,6 +565,7 @@ CONFIG_TOUCHSCREEN_ADS7846=m + CONFIG_TOUCHSCREEN_EGALAX=m + CONFIG_TOUCHSCREEN_EXC3000=m + CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_ILI210X=m + CONFIG_TOUCHSCREEN_EDT_FT5X06=m + CONFIG_TOUCHSCREEN_RPI_FT5406=m + CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -559,6 +559,7 @@ CONFIG_TOUCHSCREEN_ADS7846=m + CONFIG_TOUCHSCREEN_EGALAX=m + CONFIG_TOUCHSCREEN_EXC3000=m + CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_ILI210X=m + CONFIG_TOUCHSCREEN_EDT_FT5X06=m + CONFIG_TOUCHSCREEN_RPI_FT5406=m + CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -547,6 +547,7 @@ CONFIG_INPUT_TOUCHSCREEN=y + CONFIG_TOUCHSCREEN_ADS7846=m + CONFIG_TOUCHSCREEN_EGALAX=m + CONFIG_TOUCHSCREEN_EKTF2127=m ++CONFIG_TOUCHSCREEN_ILI210X=m + CONFIG_TOUCHSCREEN_RPI_FT5406=m + CONFIG_TOUCHSCREEN_USB_COMPOSITE=m + CONFIG_TOUCHSCREEN_STMPE=m diff --git a/target/linux/brcm2708/patches-4.19/950-0426-BCM2708-Add-core-Device-Tree-support-ilitek251x.patch b/target/linux/brcm2708/patches-4.19/950-0426-BCM2708-Add-core-Device-Tree-support-ilitek251x.patch new file mode 100644 index 000000000..b2b62ba39 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0426-BCM2708-Add-core-Device-Tree-support-ilitek251x.patch @@ -0,0 +1,91 @@ +From 7b15bdfee1c922d6c3e92329cd23a45e77e036ae Mon Sep 17 00:00:00 2001 +From: Samuel Hsu +Date: Mon, 8 Apr 2019 17:06:44 +0200 +Subject: [PATCH 426/703] BCM2708: Add core Device Tree support, ilitek251x + +Signed-off-by: Samuel Hsu +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 11 +++++ + .../boot/dts/overlays/ilitek251x-overlay.dts | 45 +++++++++++++++++++ + 3 files changed, 57 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/ilitek251x-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -67,6 +67,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + i2c0-bcm2708.dtbo \ + i2c1-bcm2708.dtbo \ + i2s-gpio28-31.dtbo \ ++ ilitek251x.dtbo \ + iqaudio-dac.dtbo \ + iqaudio-dacplus.dtbo \ + iqaudio-digi-wm8804-audio.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1146,6 +1146,17 @@ Load: dtoverlay=i2s-gpio28-31 + Params: + + ++Name: ilitek251x ++Info: Enables I2C connected Ilitek 251x multiple touch controller using ++ GPIO 4 (pin 7 on GPIO header) for interrupt. ++Load: dtoverlay=ilitek251x,= ++Params: interrupt GPIO used for interrupt (default 4) ++ sizex Touchscreen size x, horizontal resolution of ++ touchscreen (in pixels) ++ sizey Touchscreen size y, vertical resolution of ++ touchscreen (in pixels) ++ ++ + Name: iqaudio-dac + Info: Configures the IQaudio DAC audio card + Load: dtoverlay=iqaudio-dac, +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts +@@ -0,0 +1,45 @@ ++// Device tree overlay for I2C connected Ilitek multiple touch controller ++/dts-v1/; ++/plugin/; ++ ++ / { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&gpio>; ++ __overlay__ { ++ ili251x_pins: ili251x_pins { ++ brcm,pins = <4>; // interrupt ++ brcm,function = <0>; // in ++ brcm,pull = <2>; // pull-up // ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ ili251x: ili251x@41 { ++ compatible = "ilitek,ili251x"; ++ reg = <0x41>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ili251x_pins>; ++ interrupt-parent = <&gpio>; ++ interrupts = <4 8>; // high-to-low edge triggered ++ touchscreen-size-x = <16384>; ++ touchscreen-size-y = <9600>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ interrupt = <&ili251x_pins>,"brcm,pins:0", ++ <&ili251x>,"interrupts:0"; ++ sizex = <&ili251x>,"touchscreen-size-x:0"; ++ sizey = <&ili251x>,"touchscreen-size-y:0"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0427-dwc_otg-fix-locking-around-dequeueing-and-killing-UR.patch b/target/linux/brcm2708/patches-4.19/950-0427-dwc_otg-fix-locking-around-dequeueing-and-killing-UR.patch new file mode 100644 index 000000000..c04b50358 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0427-dwc_otg-fix-locking-around-dequeueing-and-killing-UR.patch @@ -0,0 +1,63 @@ +From ddd696d15f75315f1a20d5da57d94ed65d8c1404 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Tue, 9 Apr 2019 16:40:48 +0100 +Subject: [PATCH 427/703] dwc_otg: fix locking around dequeueing and killing + URBs + +kill_urbs_in_qh_list() is practically only ever called with the fiq lock +already held, so don't spinlock twice in the case where we need to cancel +an isochronous transfer. + +Also fix up a case where the global interrupt register could be read with +the fiq lock not held. + +Fixes the deadlock seen in https://github.com/raspberrypi/linux/issues/2907 +--- + drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 9 +++++++-- + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4 ---- + 2 files changed, 7 insertions(+), 6 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c +@@ -1344,16 +1344,21 @@ static inline uint32_t dwc_otg_read_comm + */ + gintmsk_common.b.portintr = 1; + } +- gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); +- gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); + if(fiq_enable) { + local_fiq_disable(); ++ fiq_fsm_spin_lock(&hcd->fiq_state->lock); ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); + /* Pull in the interrupts that the FIQ has masked */ + gintmsk.d32 |= ~(hcd->fiq_state->gintmsk_saved.d32); + gintmsk.d32 |= gintmsk_common.d32; + /* for the upstairs function to reenable - have to read it here in case FIQ triggers again */ + reenable_gintmsk->d32 = gintmsk.d32; ++ fiq_fsm_spin_unlock(&hcd->fiq_state->lock); + local_fiq_enable(); ++ } else { ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); + } + + gahbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg); +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +@@ -195,15 +195,11 @@ static void kill_urbs_in_qh_list(dwc_otg + * but not yet been through the IRQ handler. + */ + if (fiq_fsm_enable && (hcd->fiq_state->channel[qh->channel->hc_num].fsm != FIQ_PASSTHROUGH)) { +- local_fiq_disable(); +- fiq_fsm_spin_lock(&hcd->fiq_state->lock); + qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; + qh->channel->halt_pending = 1; + if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || + hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) + hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; +- fiq_fsm_spin_unlock(&hcd->fiq_state->lock); +- local_fiq_enable(); + } else { + dwc_otg_hc_halt(hcd->core_if, qh->channel, + DWC_OTG_HC_XFER_URB_DEQUEUE); diff --git a/target/linux/brcm2708/patches-4.19/950-0428-rtc-rv3028-Add-backup-switchover-mode-support.patch b/target/linux/brcm2708/patches-4.19/950-0428-rtc-rv3028-Add-backup-switchover-mode-support.patch new file mode 100644 index 000000000..765f8c1f5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0428-rtc-rv3028-Add-backup-switchover-mode-support.patch @@ -0,0 +1,50 @@ +From 5159281b7a2fe2f4dc1cc2f1cd97d45972f02d99 Mon Sep 17 00:00:00 2001 +From: Phil Howard +Date: Fri, 29 Mar 2019 10:53:14 +0000 +Subject: [PATCH 428/703] rtc: rv3028: Add backup switchover mode support + +Signed-off-by: Phil Howard +--- + drivers/rtc/rtc-rv3028.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/drivers/rtc/rtc-rv3028.c ++++ b/drivers/rtc/rtc-rv3028.c +@@ -74,6 +74,7 @@ + + #define RV3028_BACKUP_TCE BIT(5) + #define RV3028_BACKUP_TCR_MASK GENMASK(1,0) ++#define RV3028_BACKUP_BSM_MASK 0x0C + + #define OFFSET_STEP_PPT 953674 + +@@ -601,6 +602,7 @@ static int rv3028_probe(struct i2c_clien + struct rv3028_data *rv3028; + int ret, status; + u32 ohms; ++ u8 bsm; + struct nvmem_config nvmem_cfg = { + .name = "rv3028_nvram", + .word_size = 1, +@@ -671,6 +673,21 @@ static int rv3028_probe(struct i2c_clien + if (ret) + return ret; + ++ /* setup backup switchover mode */ ++ if (!device_property_read_u8(&client->dev, "backup-switchover-mode", ++ &bsm)) { ++ if (bsm <= 3) { ++ ret = regmap_update_bits(rv3028->regmap, RV3028_BACKUP, ++ RV3028_BACKUP_BSM_MASK, ++ (bsm & 0x03) << 2); ++ ++ if (ret) ++ return ret; ++ } else { ++ dev_warn(&client->dev, "invalid backup switchover mode value\n"); ++ } ++ } ++ + /* setup trickle charger */ + if (!device_property_read_u32(&client->dev, "trickle-resistor-ohms", + &ohms)) { diff --git a/target/linux/brcm2708/patches-4.19/950-0429-dt-bindings-rv3028-backup-switchover-support.patch b/target/linux/brcm2708/patches-4.19/950-0429-dt-bindings-rv3028-backup-switchover-support.patch new file mode 100644 index 000000000..7a9c962de --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0429-dt-bindings-rv3028-backup-switchover-support.patch @@ -0,0 +1,20 @@ +From ea30c9b919bbd7695f99e0467f3546ac945d4e54 Mon Sep 17 00:00:00 2001 +From: Phil Howard +Date: Fri, 29 Mar 2019 10:57:07 +0000 +Subject: [PATCH 429/703] dt-bindings: rv3028 backup switchover support + +Signed-off-by: Phil Howard +--- + Documentation/devicetree/bindings/rtc/rtc.txt | 1 + + 1 file changed, 1 insertion(+) + +--- a/Documentation/devicetree/bindings/rtc/rtc.txt ++++ b/Documentation/devicetree/bindings/rtc/rtc.txt +@@ -26,6 +26,7 @@ below. + - trickle-diode-disable : Do not use internal trickle charger diode Should be + given if internal trickle charger diode should be + disabled ++- backup-switchover-mode : Configure RTC backup power supply switch behaviour + - wakeup-source : Enables wake up of host system on alarm + - quartz-load-femtofarads : The capacitive load of the quartz(x-tal), + expressed in femto Farad (fF). diff --git a/target/linux/brcm2708/patches-4.19/950-0430-overlays-Add-rv3028-backup-switchover-support-to-i2c.patch b/target/linux/brcm2708/patches-4.19/950-0430-overlays-Add-rv3028-backup-switchover-support-to-i2c.patch new file mode 100644 index 000000000..08a205c27 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0430-overlays-Add-rv3028-backup-switchover-support-to-i2c.patch @@ -0,0 +1,34 @@ +From a73793c4cea3ef39d203c6a0e7e3456629e25f5e Mon Sep 17 00:00:00 2001 +From: Phil Howard +Date: Fri, 29 Mar 2019 10:59:55 +0000 +Subject: [PATCH 430/703] overlays: Add rv3028 backup switchover support to + i2c-rtc + +Signed-off-by: Phil Howard +--- + arch/arm/boot/dts/overlays/README | 3 +++ + arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 1 + + 2 files changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1013,6 +1013,9 @@ Params: abx80x Select o + wakeup-source Specify that the RTC can be used as a wakeup + source + ++ backup-switchover-mode Backup power supply switch mode. Must be 0 for ++ off or 1 for Vdd < VBackup (RV3028 only) ++ + + Name: i2c-rtc-gpio + Info: Adds support for a number of I2C Real Time Clock devices +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -200,6 +200,7 @@ + trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0", + <&abx80x>,"abracon,tc-resistor", + <&rv3028>,"trickle-resistor-ohms:0"; ++ backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0"; + wakeup-source = <&ds1339>,"wakeup-source?", + <&ds3231>,"wakeup-source?", + <&mcp7940x>,"wakeup-source?", diff --git a/target/linux/brcm2708/patches-4.19/950-0431-Maxim-MAX98357A-I2S-DAC-overlay-2935.patch b/target/linux/brcm2708/patches-4.19/950-0431-Maxim-MAX98357A-I2S-DAC-overlay-2935.patch new file mode 100644 index 000000000..c9136fda0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0431-Maxim-MAX98357A-I2S-DAC-overlay-2935.patch @@ -0,0 +1,130 @@ +From 43371fb1fb2a2eaefe54288bcd61d015237c25fe Mon Sep 17 00:00:00 2001 +From: wavelet2 <20504977+wavelet2@users.noreply.github.com> +Date: Mon, 15 Apr 2019 10:00:20 +0100 +Subject: [PATCH 431/703] Maxim MAX98357A I2S DAC overlay (#2935) + +Add overlay for Maxim MAX98357A I2S DAC. + +Signed-off-by: Richard Steedman +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 9 ++ + .../boot/dts/overlays/max98357a-overlay.dts | 84 +++++++++++++++++++ + 3 files changed, 94 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/max98357a-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -75,6 +75,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ + ltc294x.dtbo \ ++ max98357a.dtbo \ + mbed-dac.dtbo \ + mcp23017.dtbo \ + mcp23s17.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1276,6 +1276,15 @@ Params: ltc2941 Select t + See the datasheet for more information. + + ++Name: max98357a ++Info: Configures the Maxim MAX98357A I2S DAC ++Load: dtoverlay=max98357a,= ++Params: no-sdmode Driver does not manage the state of the DAC's ++ SD_MODE pin (i.e. chip is always on). ++ sdmode-pin integer, GPIO pin connected to the SD_MODE input ++ of the DAC (default GPIO4 if parameter omitted). ++ ++ + Name: mbed-dac + Info: Configures the mbed AudioCODEC (TLV320AIC23B) + Load: dtoverlay=mbed-dac +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts +@@ -0,0 +1,84 @@ ++// Overlay for Maxim MAX98357A audio DAC ++ ++// dtparams: ++// no-sdmode - SD_MODE pin not managed by driver. ++// sdmode-pin - Specify GPIO pin to which SD_MODE is connected (default 4). ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ ++ /* Enable I2S */ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ /* DAC whose SD_MODE pin is managed by driver (via GPIO pin) */ ++ fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ max98357a_dac: max98357a { ++ compatible = "maxim,max98357a"; ++ #sound-dai-cells = <0>; ++ sdmode-gpios = <&gpio 4 0>; /* 2nd word overwritten by sdmode-pin parameter */ ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ /* DAC whose SD_MODE pin is not managed by driver */ ++ fragment@2 { ++ target-path = "/"; ++ __dormant__ { ++ max98357a_nsd: max98357a { ++ compatible = "maxim,max98357a"; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ /* Soundcard connecting I2S to DAC with SD_MODE */ ++ fragment@3 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "MAX98357A"; ++ status = "okay"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&max98357a_dac>; ++ }; ++ }; ++ }; ++ ++ /* Soundcard connecting I2S to DAC without SD_MODE */ ++ fragment@4 { ++ target = <&sound>; ++ __dormant__ { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "MAX98357A"; ++ status = "okay"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&max98357a_nsd>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ no-sdmode = <0>,"-1+2-3+4"; ++ sdmode-pin = <&max98357a_dac>,"sdmode-gpios:4"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0432-sound-Fixes-for-audioinjector-octo-under-4.19.patch b/target/linux/brcm2708/patches-4.19/950-0432-sound-Fixes-for-audioinjector-octo-under-4.19.patch new file mode 100644 index 000000000..b4cf23139 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0432-sound-Fixes-for-audioinjector-octo-under-4.19.patch @@ -0,0 +1,108 @@ +From 7ed120d6a2733f70a5c8ee15844e1f02aec3f421 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 21 Mar 2019 11:19:46 +0000 +Subject: [PATCH 432/703] sound: Fixes for audioinjector-octo under 4.19 + +1. Move the DT alias declaration to the I2C shim in the cases +where the shim is enabled. This works around a problem caused by a +4.19 commit [1] that generates DT/OF uevents for I2C drivers. + +2. Fix the diagnostics in an error path of the soundcard driver to +correctly identify the reason for the failure to load. + +3. Move the declaration of the clock node in the overlay outside +the I2C node to avoid warnings. + +4. Sort the overlay nodes so that dependencies are only to earlier +fragments, in an attempt to get runtime dtoverlay application to +work (it still doesn't...) + +See: https://github.com/Audio-Injector/Octo/issues/14 +Signed-off-by: Phil Elwell + +[1] af503716ac14 ("i2c: core: report OF style module alias for devices registered via OF") +--- + .../overlays/audioinjector-addons-overlay.dts | 19 ++++++++++++------- + sound/soc/bcm/audioinjector-octo-soundcard.c | 2 +- + sound/soc/codecs/cs42xx8-i2c.c | 7 +++++++ + sound/soc/codecs/cs42xx8.c | 2 ++ + 4 files changed, 22 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts +@@ -13,6 +13,17 @@ + }; + + fragment@1 { ++ target-path = "/"; ++ __overlay__ { ++ cs42448_mclk: codec-mclk { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <49152000>; ++ }; ++ }; ++ }; ++ ++ fragment@2 { + target = <&i2c1>; + __overlay__ { + #address-cells = <1>; +@@ -27,16 +38,10 @@ + clock-names = "mclk"; + status = "okay"; + }; +- +- cs42448_mclk: codec-mclk { +- compatible = "fixed-clock"; +- #clock-cells = <0>; +- clock-frequency = <49152000>; +- }; + }; + }; + +- fragment@2 { ++ fragment@3 { + target = <&sound>; + snd: __overlay__ { + compatible = "ai,audioinjector-octo-soundcard"; +--- a/sound/soc/bcm/audioinjector-octo-soundcard.c ++++ b/sound/soc/bcm/audioinjector-octo-soundcard.c +@@ -297,7 +297,7 @@ static int audioinjector_octo_probe(stru + dai->codec_name = NULL; + dai->codec_of_node = codec_node; + } else +- if (!dai->cpu_of_node) { ++ if (!i2s_node) { + dev_err(&pdev->dev, + "i2s-controller missing or invalid in DT\n"); + return -EINVAL; +--- a/sound/soc/codecs/cs42xx8-i2c.c ++++ b/sound/soc/codecs/cs42xx8-i2c.c +@@ -45,6 +45,13 @@ static struct i2c_device_id cs42xx8_i2c_ + }; + MODULE_DEVICE_TABLE(i2c, cs42xx8_i2c_id); + ++const struct of_device_id cs42xx8_of_match[] = { ++ { .compatible = "cirrus,cs42448", .data = &cs42448_data, }, ++ { .compatible = "cirrus,cs42888", .data = &cs42888_data, }, ++ { /* sentinel */ } ++}; ++MODULE_DEVICE_TABLE(of, cs42xx8_of_match); ++ + static struct i2c_driver cs42xx8_i2c_driver = { + .driver = { + .name = "cs42xx8", +--- a/sound/soc/codecs/cs42xx8.c ++++ b/sound/soc/codecs/cs42xx8.c +@@ -436,8 +436,10 @@ const struct of_device_id cs42xx8_of_mat + { .compatible = "cirrus,cs42888", .data = &cs42888_data, }, + { /* sentinel */ } + }; ++#if !IS_ENABLED(CONFIG_SND_SOC_CS42XX8_I2C) + MODULE_DEVICE_TABLE(of, cs42xx8_of_match); + EXPORT_SYMBOL_GPL(cs42xx8_of_match); ++#endif + + int cs42xx8_probe(struct device *dev, struct regmap *regmap) + { diff --git a/target/linux/brcm2708/patches-4.19/950-0433-Revert-cgroup-Disable-cgroup-memory-by-default.patch b/target/linux/brcm2708/patches-4.19/950-0433-Revert-cgroup-Disable-cgroup-memory-by-default.patch new file mode 100644 index 000000000..efc145e1a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0433-Revert-cgroup-Disable-cgroup-memory-by-default.patch @@ -0,0 +1,63 @@ +From 18c18a16cbf0007907319d5472351f6bc3e7135d Mon Sep 17 00:00:00 2001 +From: P33M +Date: Wed, 24 Apr 2019 14:25:09 +0100 +Subject: [PATCH 433/703] Revert "cgroup: Disable cgroup "memory" by default" + +This reverts commit cd6ce4d0ded13c94ff5208c679ed5e030263149b. +--- + kernel/cgroup/cgroup.c | 30 ------------------------------ + 1 file changed, 30 deletions(-) + +--- a/kernel/cgroup/cgroup.c ++++ b/kernel/cgroup/cgroup.c +@@ -5296,8 +5296,6 @@ int __init cgroup_init_early(void) + } + + static u16 cgroup_disable_mask __initdata; +-static u16 cgroup_enable_mask __initdata; +-static int __init cgroup_disable(char *str); + + /** + * cgroup_init - cgroup initialization +@@ -5338,12 +5336,6 @@ int __init cgroup_init(void) + + mutex_unlock(&cgroup_mutex); + +- /* Apply an implicit disable... */ +- cgroup_disable("memory"); +- +- /* ...knowing that an explicit enable will override it. */ +- cgroup_disable_mask &= ~cgroup_enable_mask; +- + for_each_subsys(ss, ssid) { + if (ss->early_init) { + struct cgroup_subsys_state *css = +@@ -5727,28 +5719,6 @@ static int __init cgroup_disable(char *s + } + __setup("cgroup_disable=", cgroup_disable); + +-static int __init cgroup_enable(char *str) +-{ +- struct cgroup_subsys *ss; +- char *token; +- int i; +- +- while ((token = strsep(&str, ",")) != NULL) { +- if (!*token) +- continue; +- +- for_each_subsys(ss, i) { +- if (strcmp(token, ss->name) && +- strcmp(token, ss->legacy_name)) +- continue; +- +- cgroup_enable_mask |= 1 << i; +- } +- } +- return 1; +-} +-__setup("cgroup_enable=", cgroup_enable); +- + /** + * css_tryget_online_from_dir - get corresponding css from a cgroup dentry + * @dentry: directory dentry of interest diff --git a/target/linux/brcm2708/patches-4.19/950-0434-Revert-defconfigs-disable-memory-and-IO-cgroups-2908.patch b/target/linux/brcm2708/patches-4.19/950-0434-Revert-defconfigs-disable-memory-and-IO-cgroups-2908.patch new file mode 100644 index 000000000..746a5bc0c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0434-Revert-defconfigs-disable-memory-and-IO-cgroups-2908.patch @@ -0,0 +1,79 @@ +From 76088decdde58c18a100c2fc7f15f9abbead6eef Mon Sep 17 00:00:00 2001 +From: P33M +Date: Wed, 24 Apr 2019 14:25:41 +0100 +Subject: [PATCH 434/703] Revert "defconfigs: disable memory and IO cgroups + (#2908)" + +This reverts commit 9881cdbf446081f71c62f39f4c56a21001baea73. +--- + arch/arm/configs/bcm2709_defconfig | 4 ++++ + arch/arm/configs/bcmrpi_defconfig | 4 ++++ + arch/arm64/configs/bcmrpi3_defconfig | 4 ++++ + 3 files changed, 12 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -14,6 +14,8 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y +@@ -62,8 +64,10 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=m + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -13,6 +13,8 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y +@@ -56,8 +58,10 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=m + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -13,6 +13,8 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y +@@ -60,8 +62,10 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=y + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y diff --git a/target/linux/brcm2708/patches-4.19/950-0435-overlays-Add-PiGlow-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0435-overlays-Add-PiGlow-overlay.patch new file mode 100644 index 000000000..323b6cd7c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0435-overlays-Add-PiGlow-overlay.patch @@ -0,0 +1,147 @@ +From 1c61854d266759522f33e59fb58de1cb9470d886 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Mon, 29 Apr 2019 19:35:33 +0200 +Subject: [PATCH 435/703] overlays: Add PiGlow overlay + +The PiGlow is a small add-on board for the Raspberry Pi that provides +18 individually controllable LEDs (SN3218) and uses the following pins: + +P1 & P17 (3V3) +P2 (5V) +P3 (SDA) +P5 (SCL) +P14 (GND) + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 ++ + arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 +++++++++++++++++++ + 3 files changed, 104 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/piglow-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -97,6 +97,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + pi3-disable-wifi.dtbo \ + pi3-miniuart-bt.dtbo \ + pibell.dtbo \ ++ piglow.dtbo \ + piscreen.dtbo \ + piscreen2r.dtbo \ + pisound.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1532,6 +1532,12 @@ Params: alsaname Set the + "PiBell") + + ++Name: piglow ++Info: Configures the PiGlow by pimoroni.com ++Load: dtoverlay=piglow ++Params: ++ ++ + Name: piscreen + Info: PiScreen display by OzzMaker.com + Load: dtoverlay=piscreen,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts +@@ -0,0 +1,97 @@ ++// Definitions for SN3218 LED driver from Si-En Technology on PiGlow ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2c_arm>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ sn3218@54 { ++ compatible = "si-en,sn3218"; ++ reg = <0x54>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ led@1 { ++ reg = <1>; ++ label = "piglow:red:led1"; ++ }; ++ led@2 { ++ reg = <2>; ++ label = "piglow:orange:led2"; ++ }; ++ led@3 { ++ reg = <3>; ++ label = "piglow:yellow:led3"; ++ }; ++ led@4 { ++ reg = <4>; ++ label = "piglow:green:led4"; ++ }; ++ led@5 { ++ reg = <5>; ++ label = "piglow:blue:led5"; ++ }; ++ led@6 { ++ reg = <6>; ++ label = "piglow:green:led6"; ++ }; ++ led@7 { ++ reg = <7>; ++ label = "piglow:red:led7"; ++ }; ++ led@8 { ++ reg = <8>; ++ label = "piglow:orange:led8"; ++ }; ++ led@9 { ++ reg = <9>; ++ label = "piglow:yellow:led9"; ++ }; ++ led@10 { ++ reg = <10>; ++ label = "piglow:white:led10"; ++ }; ++ led@11 { ++ reg = <11>; ++ label = "piglow:white:led11"; ++ }; ++ led@12 { ++ reg = <12>; ++ label = "piglow:blue:led12"; ++ }; ++ led@13 { ++ reg = <13>; ++ label = "piglow:white:led13"; ++ }; ++ led@14 { ++ reg = <14>; ++ label = "piglow:green:led14"; ++ }; ++ led@15 { ++ reg = <15>; ++ label = "piglow:blue:led15"; ++ }; ++ led@16 { ++ reg = <16>; ++ label = "piglow:yellow:led16"; ++ }; ++ led@17 { ++ reg = <17>; ++ label = "piglow:orange:led17"; ++ }; ++ led@18 { ++ reg = <18>; ++ label = "piglow:red:led18"; ++ }; ++ }; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0436-configs-enable-LED-driver-for-PiGlow.patch b/target/linux/brcm2708/patches-4.19/950-0436-configs-enable-LED-driver-for-PiGlow.patch new file mode 100644 index 000000000..0bde83669 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0436-configs-enable-LED-driver-for-PiGlow.patch @@ -0,0 +1,52 @@ +From bf7d2a13c0617dd23e0a394bccd9b41b2295ead0 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Mon, 29 Apr 2019 19:28:51 +0200 +Subject: [PATCH 436/703] configs: enable LED driver for PiGlow + +Signed-off-by: Stefan Wahren +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 3 ++- + 3 files changed, 4 insertions(+), 1 deletion(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1131,6 +1131,7 @@ CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y + CONFIG_LEDS_PCA963X=m ++CONFIG_LEDS_IS31FL32XX=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1124,6 +1124,7 @@ CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y + CONFIG_LEDS_PCA963X=m ++CONFIG_LEDS_IS31FL32XX=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -550,8 +550,8 @@ CONFIG_JOYSTICK_RPISENSE=m + CONFIG_INPUT_TOUCHSCREEN=y + CONFIG_TOUCHSCREEN_ADS7846=m + CONFIG_TOUCHSCREEN_EGALAX=m +-CONFIG_TOUCHSCREEN_EKTF2127=m + CONFIG_TOUCHSCREEN_ILI210X=m ++CONFIG_TOUCHSCREEN_EKTF2127=m + CONFIG_TOUCHSCREEN_RPI_FT5406=m + CONFIG_TOUCHSCREEN_USB_COMPOSITE=m + CONFIG_TOUCHSCREEN_STMPE=m +@@ -991,6 +991,7 @@ CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y + CONFIG_LEDS_PCA963X=m ++CONFIG_LEDS_IS31FL32XX=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y diff --git a/target/linux/brcm2708/patches-4.19/950-0437-Revert-bcm2835-interpolate-audio-delay.patch b/target/linux/brcm2708/patches-4.19/950-0437-Revert-bcm2835-interpolate-audio-delay.patch new file mode 100644 index 000000000..a8693c523 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0437-Revert-bcm2835-interpolate-audio-delay.patch @@ -0,0 +1,71 @@ +From fe6afd9a110a042d2f00934b3a95ae57471f18cf Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 29 Apr 2019 19:16:14 +0100 +Subject: [PATCH 437/703] Revert "bcm2835: interpolate audio delay" + +commit fb4b9f02986fcb5ae751106ef9b027806b5dd750 upstream. + +This reverts commit fb8cc99f05687ca5565dc53a7ee0dd86aefad952. +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 12 +----------- + .../staging/vc04_services/bcm2835-audio/bcm2835.h | 1 - + 2 files changed, 1 insertion(+), 12 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -11,7 +11,7 @@ + /* hardware definition */ + static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | +- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BATCH), ++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, +@@ -81,8 +81,6 @@ void bcm2835_playback_fifo(struct bcm283 + alsa_stream->pos %= alsa_stream->buffer_size; + } + +- alsa_stream->interpolate_start = ktime_get_ns(); +- + if (alsa_stream->substream) { + if (new_period) + snd_pcm_period_elapsed(alsa_stream->substream); +@@ -308,7 +306,6 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); + alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); + alsa_stream->pos = 0; +- alsa_stream->interpolate_start = ktime_get_ns(); + + audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", + alsa_stream->buffer_size, alsa_stream->period_size, +@@ -400,19 +397,12 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s + { + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; +- u64 now = ktime_get_ns(); + + audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, + frames_to_bytes(runtime, runtime->status->hw_ptr), + frames_to_bytes(runtime, runtime->control->appl_ptr), + alsa_stream->pos); + +- /* Give userspace better delay reporting by interpolating between GPU +- * notifications, assuming audio speed is close enough to the clock +- * used for ktime */ +- if (alsa_stream->interpolate_start && alsa_stream->interpolate_start < now) +- runtime->delay = -(int)div_u64((now - alsa_stream->interpolate_start) * runtime->rate, 1000000000); +- + return snd_pcm_indirect_playback_pointer(substream, + &alsa_stream->pcm_indirect, + alsa_stream->pos); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -133,7 +133,6 @@ struct bcm2835_alsa_stream { + unsigned int pos; + unsigned int buffer_size; + unsigned int period_size; +- u64 interpolate_start; + + atomic_t retrieved; + struct bcm2835_audio_instance *instance; diff --git a/target/linux/brcm2708/patches-4.19/950-0438-Revert-staging-bcm2835-audio-Enable-compile-test.patch b/target/linux/brcm2708/patches-4.19/950-0438-Revert-staging-bcm2835-audio-Enable-compile-test.patch new file mode 100644 index 000000000..671bd39a7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0438-Revert-staging-bcm2835-audio-Enable-compile-test.patch @@ -0,0 +1,22 @@ +From 5776c86dca6b3bc3c96d28514b1c5b398c7c6b8f Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 29 Apr 2019 19:16:15 +0100 +Subject: [PATCH 438/703] Revert "staging: bcm2835-audio: Enable compile test" + +commit 4eae66777a262ac9707980ea0cfe902afadfb577 upstream. + +This reverts commit 02d205a57c4c943fc2a5b1ac7c912ce01944f700. +--- + drivers/staging/vc04_services/bcm2835-audio/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/Kconfig ++++ b/drivers/staging/vc04_services/bcm2835-audio/Kconfig +@@ -1,6 +1,6 @@ + config SND_BCM2835 + tristate "BCM2835 Audio" +- depends on (ARCH_BCM2835 || COMPILE_TEST) && SND ++ depends on ARCH_BCM2835 && SND + select SND_PCM + select BCM2835_VCHIQ + help diff --git a/target/linux/brcm2708/patches-4.19/950-0439-Revert-staging-bcm2835-audio-use-module_platform_dri.patch b/target/linux/brcm2708/patches-4.19/950-0439-Revert-staging-bcm2835-audio-use-module_platform_dri.patch new file mode 100644 index 000000000..5ce5a24f9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0439-Revert-staging-bcm2835-audio-use-module_platform_dri.patch @@ -0,0 +1,42 @@ +From f1137241f30689ffe38dd414c73f0b17bf08ecc8 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 29 Apr 2019 19:16:16 +0100 +Subject: [PATCH 439/703] Revert "staging: bcm2835-audio: use + module_platform_driver() macro" + +commit ed4c2e5dc4216d5dded502bfcf594d3984e6bccd upstream. + +This reverts commit 786ced30fec053b27248ed5b24dcde61ed3f47f6. +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 20 ++++++++++++++++++- + 1 file changed, 19 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -470,7 +470,25 @@ static struct platform_driver bcm2835_al + .of_match_table = snd_bcm2835_of_match_table, + }, + }; +-module_platform_driver(bcm2835_alsa0_driver); ++ ++static int bcm2835_alsa_device_init(void) ++{ ++ int retval; ++ ++ retval = platform_driver_register(&bcm2835_alsa0_driver); ++ if (retval) ++ pr_err("Error registering bcm2835_audio driver %d .\n", retval); ++ ++ return retval; ++} ++ ++static void bcm2835_alsa_device_exit(void) ++{ ++ platform_driver_unregister(&bcm2835_alsa0_driver); ++} ++ ++late_initcall(bcm2835_alsa_device_init); ++module_exit(bcm2835_alsa_device_exit); + + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); diff --git a/target/linux/brcm2708/patches-4.19/950-0440-staging-bcm2835-audio-Clean-up-mutex-locks.patch b/target/linux/brcm2708/patches-4.19/950-0440-staging-bcm2835-audio-Clean-up-mutex-locks.patch new file mode 100644 index 000000000..941c40207 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0440-staging-bcm2835-audio-Clean-up-mutex-locks.patch @@ -0,0 +1,301 @@ +From 8fa93d6fee921789b90a1b3be272366df36e026e Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:30 +0200 +Subject: [PATCH 440/703] staging: bcm2835-audio: Clean up mutex locks + +commit ce4bb1aa271a97047b80ac917a5d91b54925913b upstream. + +snd-bcm2835 driver takes the lock with mutex_lock_interruptible() in +all places, which don't make sense. Replace them with the simple +mutex_lock(). + +Also taking a mutex lock right after creating it for each PCM object +is nonsense, too. It cannot be racy at that point. We can get rid of +it. + +Last but not least, initializing chip->audio_mutex at each place is +error-prone. Initialize properly at creating the chip object in +snd_bcm2835_create() instead. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 18 +++---- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 33 ++----------- + .../bcm2835-audio/bcm2835-vchiq.c | 47 ++++--------------- + .../vc04_services/bcm2835-audio/bcm2835.c | 1 + + 4 files changed, 20 insertions(+), 79 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -77,8 +77,7 @@ static int snd_bcm2835_ctl_get(struct sn + { + struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + BUG_ON(!chip && !(chip->avail_substreams & AVAIL_SUBSTREAMS_MASK)); + +@@ -99,8 +98,7 @@ static int snd_bcm2835_ctl_put(struct sn + struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { + audio_info("Volume change attempted.. volume = %d new_volume = %d\n", chip->volume, (int)ucontrol->value.integer.value[0]); +@@ -187,8 +185,7 @@ static int snd_bcm2835_spdif_default_get + struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); + int i; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + for (i = 0; i < 4; i++) + ucontrol->value.iec958.status[i] = +@@ -205,8 +202,7 @@ static int snd_bcm2835_spdif_default_put + unsigned int val = 0; + int i, change; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + for (i = 0; i < 4; i++) + val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); +@@ -251,8 +247,7 @@ static int snd_bcm2835_spdif_stream_get( + struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); + int i; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + for (i = 0; i < 4; i++) + ucontrol->value.iec958.status[i] = +@@ -269,8 +264,7 @@ static int snd_bcm2835_spdif_stream_put( + unsigned int val = 0; + int i, change; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + for (i = 0; i < 4; i++) + val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -99,10 +99,7 @@ static int snd_bcm2835_playback_open_gen + int idx; + int err; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) { +- audio_error("Interrupted whilst waiting for lock\n"); +- return -EINTR; +- } ++ mutex_lock(&chip->audio_mutex); + audio_info("Alsa open (%d)\n", substream->number); + idx = substream->number; + +@@ -194,10 +191,7 @@ static int snd_bcm2835_playback_close(st + struct bcm2835_alsa_stream *alsa_stream; + + chip = snd_pcm_substream_chip(substream); +- if (mutex_lock_interruptible(&chip->audio_mutex)) { +- audio_error("Interrupted whilst waiting for lock\n"); +- return -EINTR; +- } ++ mutex_lock(&chip->audio_mutex); + runtime = substream->runtime; + alsa_stream = runtime->private_data; + +@@ -274,8 +268,7 @@ static int snd_bcm2835_pcm_prepare(struc + int channels; + int err; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) +- return -EINTR; ++ mutex_lock(&chip->audio_mutex); + + /* notify the vchiq that it should enter spdif passthrough mode by + * setting channels=0 (see +@@ -449,14 +442,9 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + struct snd_pcm *pcm; + int err; + +- mutex_init(&chip->audio_mutex); +- if (mutex_lock_interruptible(&chip->audio_mutex)) { +- audio_error("Interrupted whilst waiting for lock\n"); +- return -EINTR; +- } + err = snd_pcm_new(chip->card, "bcm2835 ALSA", 0, numchannels, 0, &pcm); + if (err < 0) +- goto out; ++ return err; + pcm->private_data = chip; + strcpy(pcm->name, "bcm2835 ALSA"); + chip->pcm = pcm; +@@ -474,9 +462,6 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + snd_bcm2835_playback_hw.buffer_bytes_max, + snd_bcm2835_playback_hw.buffer_bytes_max); + +-out: +- mutex_unlock(&chip->audio_mutex); +- + return 0; + } + +@@ -485,13 +470,9 @@ int snd_bcm2835_new_spdif_pcm(struct bcm + struct snd_pcm *pcm; + int err; + +- if (mutex_lock_interruptible(&chip->audio_mutex)) { +- audio_error("Interrupted whilst waiting for lock\n"); +- return -EINTR; +- } + err = snd_pcm_new(chip->card, "bcm2835 ALSA", 1, 1, 0, &pcm); + if (err < 0) +- goto out; ++ return err; + + pcm->private_data = chip; + strcpy(pcm->name, "bcm2835 IEC958/HDMI"); +@@ -504,8 +485,6 @@ int snd_bcm2835_new_spdif_pcm(struct bcm + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, + snd_dma_continuous_data(GFP_KERNEL), + snd_bcm2835_playback_spdif_hw.buffer_bytes_max, snd_bcm2835_playback_spdif_hw.buffer_bytes_max); +-out: +- mutex_unlock(&chip->audio_mutex); + + return 0; + } +@@ -518,8 +497,6 @@ int snd_bcm2835_new_simple_pcm(struct bc + struct snd_pcm *pcm; + int err; + +- mutex_init(&chip->audio_mutex); +- + err = snd_pcm_new(chip->card, name, 0, numchannels, + 0, &pcm); + if (err) +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -319,11 +319,7 @@ static int vc_vchi_audio_deinit(struct b + } + + LOG_DBG(" .. about to lock (%d)\n", instance->num_connections); +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + + /* Close all VCHI service connections */ + for (i = 0; i < instance->num_connections; i++) { +@@ -434,11 +430,7 @@ int bcm2835_audio_open(struct bcm2835_al + instance = alsa_stream->instance; + LOG_DBG(" instance (%p)\n", instance); + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", instance->num_connections); +- ret = -EINTR; +- goto free_wq; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + m.type = VC_AUDIO_MSG_TYPE_OPEN; +@@ -479,11 +471,7 @@ static int bcm2835_audio_set_ctls_chan(s + LOG_INFO(" Setting ALSA dest(%d), volume(%d)\n", + chip->dest, chip->volume); + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + instance->result = -1; +@@ -569,10 +557,7 @@ int bcm2835_audio_set_params(struct bcm2 + return -EINVAL; + } + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + instance->result = -1; +@@ -629,11 +614,7 @@ static int bcm2835_audio_start_worker(st + int status; + int ret; + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + m.type = VC_AUDIO_MSG_TYPE_START; +@@ -665,11 +646,7 @@ static int bcm2835_audio_stop_worker(str + int status; + int ret; + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + m.type = VC_AUDIO_MSG_TYPE_STOP; +@@ -704,11 +681,7 @@ int bcm2835_audio_close(struct bcm2835_a + + my_workqueue_quit(alsa_stream); + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + m.type = VC_AUDIO_MSG_TYPE_CLOSE; +@@ -761,11 +734,7 @@ static int bcm2835_audio_write_worker(st + + LOG_INFO(" Writing %d bytes from %p\n", count, src); + +- if (mutex_lock_interruptible(&instance->vchi_mutex)) { +- LOG_DBG("Interrupted whilst waiting for lock on (%d)\n", +- instance->num_connections); +- return -EINTR; +- } ++ mutex_lock(&instance->vchi_mutex); + vchi_service_use(instance->vchi_handle[0]); + + if (instance->peer_version == 0 && +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -149,6 +149,7 @@ static int snd_bcm2835_create(struct snd + return -ENOMEM; + + chip->card = card; ++ mutex_init(&chip->audio_mutex); + + chip->vchi_ctx = devres_find(card->dev->parent, + bcm2835_devm_free_vchi_ctx, NULL, NULL); diff --git a/target/linux/brcm2708/patches-4.19/950-0441-staging-bcm2835-audio-Remove-redundant-spdif-stream-.patch b/target/linux/brcm2708/patches-4.19/950-0441-staging-bcm2835-audio-Remove-redundant-spdif-stream-.patch new file mode 100644 index 000000000..99b9ed23c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0441-staging-bcm2835-audio-Remove-redundant-spdif-stream-.patch @@ -0,0 +1,89 @@ +From 5171b87bdf5a98d8d24f9fd7a5f3b6304e8ce5ad Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:31 +0200 +Subject: [PATCH 441/703] staging: bcm2835-audio: Remove redundant spdif stream + ctls + +commit ab91e26229eaca2832df51e13c1285aea3be33ab upstream. + +The "IEC958 Playback Stream" control does basically the very same +thing as "IEC958 Playback Default" redundantly. The former should +have been stream-specific and restored after closing the stream, but +we don't do in that way. + +Since it's nothing but confusion, remove this fake. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 51 ------------------- + 1 file changed, 51 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -233,48 +233,6 @@ static int snd_bcm2835_spdif_mask_get(st + return 0; + } + +-static int snd_bcm2835_spdif_stream_info(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_info *uinfo) +-{ +- uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; +- uinfo->count = 1; +- return 0; +-} +- +-static int snd_bcm2835_spdif_stream_get(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); +- int i; +- +- mutex_lock(&chip->audio_mutex); +- +- for (i = 0; i < 4; i++) +- ucontrol->value.iec958.status[i] = +- (chip->spdif_status >> (i * 8)) & 0xff; +- +- mutex_unlock(&chip->audio_mutex); +- return 0; +-} +- +-static int snd_bcm2835_spdif_stream_put(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); +- unsigned int val = 0; +- int i, change; +- +- mutex_lock(&chip->audio_mutex); +- +- for (i = 0; i < 4; i++) +- val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); +- change = val != chip->spdif_status; +- chip->spdif_status = val; +- +- mutex_unlock(&chip->audio_mutex); +- return change; +-} +- + static struct snd_kcontrol_new snd_bcm2835_spdif[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, +@@ -290,15 +248,6 @@ static struct snd_kcontrol_new snd_bcm28 + .info = snd_bcm2835_spdif_mask_info, + .get = snd_bcm2835_spdif_mask_get, + }, +- { +- .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | +- SNDRV_CTL_ELEM_ACCESS_INACTIVE, +- .iface = SNDRV_CTL_ELEM_IFACE_PCM, +- .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), +- .info = snd_bcm2835_spdif_stream_info, +- .get = snd_bcm2835_spdif_stream_get, +- .put = snd_bcm2835_spdif_stream_put, +- }, + }; + + int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) diff --git a/target/linux/brcm2708/patches-4.19/950-0442-staging-bcm2835-audio-Clean-up-include-files-in-bcm2.patch b/target/linux/brcm2708/patches-4.19/950-0442-staging-bcm2835-audio-Clean-up-include-files-in-bcm2.patch new file mode 100644 index 000000000..1b8dcd019 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0442-staging-bcm2835-audio-Clean-up-include-files-in-bcm2.patch @@ -0,0 +1,43 @@ +From eaa6771ead56c4388b41740e502b652912423d65 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:32 +0200 +Subject: [PATCH 442/703] staging: bcm2835-audio: Clean up include files in + bcm2835-ctl.c + +commit 821950d3da4bf97bcfedcb812176a0f26b833db0 upstream. + +Only a few of them are really needed. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 15 --------------- + 1 file changed, 15 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -1,23 +1,8 @@ + // SPDX-License-Identifier: GPL-2.0 + /* Copyright 2011 Broadcom Corporation. All rights reserved. */ + +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- + #include + #include +-#include +-#include +-#include +-#include + #include + #include + diff --git a/target/linux/brcm2708/patches-4.19/950-0443-staging-bcm2835-audio-Remove-redundant-substream-mas.patch b/target/linux/brcm2708/patches-4.19/950-0443-staging-bcm2835-audio-Remove-redundant-substream-mas.patch new file mode 100644 index 000000000..1b9b919eb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0443-staging-bcm2835-audio-Remove-redundant-substream-mas.patch @@ -0,0 +1,111 @@ +From 48113d6d98bd0f810b439741bb0da982b1abe4c1 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:33 +0200 +Subject: [PATCH 443/703] staging: bcm2835-audio: Remove redundant substream + mask checks + +commit 14b1f4cba853a11c7b381ad919622f38eb194bd7 upstream. + +The avail_substreams bit mask is checked for the possible racy +accesses, but this cannot happen in practice; i.e. the assignment and +the check are superfluous. + +Let's rip them off. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 2 -- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 8 -------- + .../vc04_services/bcm2835-audio/bcm2835-vchiq.c | 17 +++++++---------- + .../vc04_services/bcm2835-audio/bcm2835.c | 5 +---- + .../vc04_services/bcm2835-audio/bcm2835.h | 2 -- + 5 files changed, 8 insertions(+), 26 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -64,8 +64,6 @@ static int snd_bcm2835_ctl_get(struct sn + + mutex_lock(&chip->audio_mutex); + +- BUG_ON(!chip && !(chip->avail_substreams & AVAIL_SUBSTREAMS_MASK)); +- + if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) + ucontrol->value.integer.value[0] = chip2alsa(chip->volume); + else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -118,14 +118,6 @@ static int snd_bcm2835_playback_open_gen + goto out; + } + +- /* Check if we are ready */ +- if (!(chip->avail_substreams & (1 << idx))) { +- /* We are not ready yet */ +- audio_error("substream(%d) device is not ready yet\n", idx); +- err = -EAGAIN; +- goto out; +- } +- + alsa_stream = kzalloc(sizeof(*alsa_stream), GFP_KERNEL); + if (!alsa_stream) { + err = -ENOMEM; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -523,16 +523,13 @@ int bcm2835_audio_set_ctls(struct bcm283 + + /* change ctls for all substreams */ + for (i = 0; i < MAX_SUBSTREAMS; i++) { +- if (chip->avail_substreams & (1 << i)) { +- if (!chip->alsa_stream[i]) { +- LOG_DBG(" No ALSA stream available?! %i:%p (%x)\n", i, chip->alsa_stream[i], chip->avail_substreams); +- ret = 0; +- } else if (bcm2835_audio_set_ctls_chan(chip->alsa_stream[i], chip) != 0) { +- LOG_ERR("Couldn't set the controls for stream %d\n", i); +- ret = -1; +- } else { +- LOG_DBG(" Controls set for stream %d\n", i); +- } ++ if (!chip->alsa_stream[i]) ++ continue; ++ if (bcm2835_audio_set_ctls_chan(chip->alsa_stream[i], chip) != 0) { ++ LOG_ERR("Couldn't set the controls for stream %d\n", i); ++ ret = -1; ++ } else { ++ LOG_DBG(" Controls set for stream %d\n", i); + } + } + return ret; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -280,7 +280,7 @@ static int snd_add_child_device(struct d + struct snd_card *card; + struct device *child; + struct bcm2835_chip *chip; +- int err, i; ++ int err; + + child = snd_create_device(device, &audio_driver->driver, + audio_driver->driver.name); +@@ -325,9 +325,6 @@ static int snd_add_child_device(struct d + return err; + } + +- for (i = 0; i < numchans; i++) +- chip->avail_substreams |= (1 << i); +- + err = snd_card_register(card); + if (err) { + dev_err(child, "Failed to register card, error %d\n", err); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -98,8 +98,6 @@ struct bcm2835_chip { + struct snd_card *card; + struct snd_pcm *pcm; + struct snd_pcm *pcm_spdif; +- /* Bitmat for valid reg_base and irq numbers */ +- unsigned int avail_substreams; + struct device *dev; + struct bcm2835_alsa_stream *alsa_stream[MAX_SUBSTREAMS]; + diff --git a/target/linux/brcm2708/patches-4.19/950-0444-staging-bcm2835-audio-Fix-mute-controls-volume-handl.patch b/target/linux/brcm2708/patches-4.19/950-0444-staging-bcm2835-audio-Fix-mute-controls-volume-handl.patch new file mode 100644 index 000000000..ea2d72b39 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0444-staging-bcm2835-audio-Fix-mute-controls-volume-handl.patch @@ -0,0 +1,273 @@ +From 8e1cbe403cccb0269ad6563cf223a220f2173964 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:34 +0200 +Subject: [PATCH 444/703] staging: bcm2835-audio: Fix mute controls, volume + handling cleanup + +commit 495e5a0d83d3902c741771f267a702ae19da8ab6 upstream. + +In the current code, the mute control is dealt in a special manner, +modifying the current volume and saving the old volume, etc. This is +inconsistent (e.g. change the volume while muted, then unmute), and +way too complex. + +Also, the whole volume handling code has conversion between ALSA +volume and raw volume values, which can lead to another +inconsistency and complexity. + +This patch simplifies these points: +- The ALSA volume value is saved in chip->volume +- volume->mute saves the mute state +- The mute state is evaluated only when the actual volume is passed to + the hardware, bcm2835_audio_set_ctls() + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 84 +++++++------------ + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 6 +- + .../bcm2835-audio/bcm2835-vchiq.c | 32 ++----- + .../vc04_services/bcm2835-audio/bcm2835.h | 5 +- + 4 files changed, 45 insertions(+), 82 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -12,6 +12,21 @@ + #define CTRL_VOL_MAX 400 + #define CTRL_VOL_MIN -10239 /* originally -10240 */ + ++static int bcm2835_audio_set_chip_ctls(struct bcm2835_chip *chip) ++{ ++ int i, err = 0; ++ ++ /* change ctls for all substreams */ ++ for (i = 0; i < MAX_SUBSTREAMS; i++) { ++ if (chip->alsa_stream[i]) { ++ err = bcm2835_audio_set_ctls(chip->alsa_stream[i]); ++ if (err < 0) ++ break; ++ } ++ } ++ return err; ++} ++ + static int snd_bcm2835_ctl_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) + { +@@ -34,29 +49,6 @@ static int snd_bcm2835_ctl_info(struct s + return 0; + } + +-/* toggles mute on or off depending on the value of nmute, and returns +- * 1 if the mute value was changed, otherwise 0 +- */ +-static int toggle_mute(struct bcm2835_chip *chip, int nmute) +-{ +- /* if settings are ok, just return 0 */ +- if (chip->mute == nmute) +- return 0; +- +- /* if the sound is muted then we need to unmute */ +- if (chip->mute == CTRL_VOL_MUTE) { +- chip->volume = chip->old_volume; /* copy the old volume back */ +- audio_info("Unmuting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); +- } else /* otherwise we mute */ { +- chip->old_volume = chip->volume; +- chip->volume = 26214; /* set volume to minimum level AKA mute */ +- audio_info("Muting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); +- } +- +- chip->mute = nmute; +- return 1; +-} +- + static int snd_bcm2835_ctl_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) + { +@@ -65,7 +57,7 @@ static int snd_bcm2835_ctl_get(struct sn + mutex_lock(&chip->audio_mutex); + + if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) +- ucontrol->value.integer.value[0] = chip2alsa(chip->volume); ++ ucontrol->value.integer.value[0] = chip->volume; + else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) + ucontrol->value.integer.value[0] = chip->mute; + else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) +@@ -79,38 +71,26 @@ static int snd_bcm2835_ctl_put(struct sn + struct snd_ctl_elem_value *ucontrol) + { + struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); ++ int val, *valp; + int changed = 0; + +- mutex_lock(&chip->audio_mutex); +- +- if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { +- audio_info("Volume change attempted.. volume = %d new_volume = %d\n", chip->volume, (int)ucontrol->value.integer.value[0]); +- if (chip->mute == CTRL_VOL_MUTE) { +- /* changed = toggle_mute(chip, CTRL_VOL_UNMUTE); */ +- changed = 1; /* should return 0 to signify no change but the mixer takes this as the opposite sign (no idea why) */ +- goto unlock; +- } +- if (changed || (ucontrol->value.integer.value[0] != chip2alsa(chip->volume))) { +- chip->volume = alsa2chip(ucontrol->value.integer.value[0]); +- changed = 1; +- } +- +- } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { +- /* Now implemented */ +- audio_info(" Mute attempted\n"); +- changed = toggle_mute(chip, ucontrol->value.integer.value[0]); ++ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) ++ valp = &chip->volume; ++ else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) ++ valp = &chip->mute; ++ else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) ++ valp = &chip->dest; ++ else ++ return -EINVAL; + +- } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { +- if (ucontrol->value.integer.value[0] != chip->dest) { +- chip->dest = ucontrol->value.integer.value[0]; +- changed = 1; +- } ++ val = ucontrol->value.integer.value[0]; ++ mutex_lock(&chip->audio_mutex); ++ if (val != *valp) { ++ *valp = val; ++ changed = 1; ++ if (bcm2835_audio_set_chip_ctls(chip)) ++ dev_err(chip->card->dev, "Failed to set ALSA controls..\n"); + } +- +- if (changed && bcm2835_audio_set_ctls(chip)) +- dev_err(chip->card->dev, "Failed to set ALSA controls..\n"); +- +-unlock: + mutex_unlock(&chip->audio_mutex); + return changed; + } +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -280,7 +280,7 @@ static int snd_bcm2835_pcm_prepare(struc + bcm2835_audio_setup(alsa_stream); + + /* in preparation of the stream, set the controls (volume level) of the stream */ +- bcm2835_audio_set_ctls(alsa_stream->chip); ++ bcm2835_audio_set_ctls(alsa_stream); + + memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); + +@@ -441,7 +441,7 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + strcpy(pcm->name, "bcm2835 ALSA"); + chip->pcm = pcm; + chip->dest = AUDIO_DEST_AUTO; +- chip->volume = alsa2chip(0); ++ chip->volume = 0; + chip->mute = CTRL_VOL_UNMUTE; /*disable mute on startup */ + /* set operators */ + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, +@@ -498,7 +498,7 @@ int snd_bcm2835_new_simple_pcm(struct bc + strcpy(pcm->name, name); + chip->pcm = pcm; + chip->dest = route; +- chip->volume = alsa2chip(0); ++ chip->volume = 0; + chip->mute = CTRL_VOL_UNMUTE; + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -460,11 +460,11 @@ free_wq: + return ret; + } + +-static int bcm2835_audio_set_ctls_chan(struct bcm2835_alsa_stream *alsa_stream, +- struct bcm2835_chip *chip) ++int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream) + { + struct vc_audio_msg m; + struct bcm2835_audio_instance *instance = alsa_stream->instance; ++ struct bcm2835_chip *chip = alsa_stream->chip; + int status; + int ret; + +@@ -478,7 +478,10 @@ static int bcm2835_audio_set_ctls_chan(s + + m.type = VC_AUDIO_MSG_TYPE_CONTROL; + m.u.control.dest = chip->dest; +- m.u.control.volume = chip->volume; ++ if (!chip->mute) ++ m.u.control.volume = CHIP_MIN_VOLUME; ++ else ++ m.u.control.volume = alsa2chip(chip->volume); + + /* Create the message available completion */ + init_completion(&instance->msg_avail_comp); +@@ -514,27 +517,6 @@ unlock: + return ret; + } + +-int bcm2835_audio_set_ctls(struct bcm2835_chip *chip) +-{ +- int i; +- int ret = 0; +- +- LOG_DBG(" Setting ALSA dest(%d), volume(%d)\n", chip->dest, chip->volume); +- +- /* change ctls for all substreams */ +- for (i = 0; i < MAX_SUBSTREAMS; i++) { +- if (!chip->alsa_stream[i]) +- continue; +- if (bcm2835_audio_set_ctls_chan(chip->alsa_stream[i], chip) != 0) { +- LOG_ERR("Couldn't set the controls for stream %d\n", i); +- ret = -1; +- } else { +- LOG_DBG(" Controls set for stream %d\n", i); +- } +- } +- return ret; +-} +- + int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, + unsigned int channels, unsigned int samplerate, + unsigned int bps) +@@ -548,7 +530,7 @@ int bcm2835_audio_set_params(struct bcm2 + channels, samplerate, bps); + + /* resend ctls - alsa_stream may not have been open when first send */ +- ret = bcm2835_audio_set_ctls_chan(alsa_stream, alsa_stream->chip); ++ ret = bcm2835_audio_set_ctls(alsa_stream); + if (ret) { + LOG_ERR(" Alsa controls not supported\n"); + return -EINVAL; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -74,6 +74,8 @@ enum { + // convert chip to alsa volume + #define chip2alsa(vol) -(((vol) * 100) >> 8) + ++#define CHIP_MIN_VOLUME 26214 /* minimum level aka mute */ ++ + /* Some constants for values .. */ + enum snd_bcm2835_route { + AUDIO_DEST_AUTO = 0, +@@ -102,7 +104,6 @@ struct bcm2835_chip { + struct bcm2835_alsa_stream *alsa_stream[MAX_SUBSTREAMS]; + + int volume; +- int old_volume; /* stores the volume value whist muted */ + int dest; + int mute; + +@@ -160,7 +161,7 @@ int bcm2835_audio_set_params(struct bcm2 + int bcm2835_audio_setup(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream); +-int bcm2835_audio_set_ctls(struct bcm2835_chip *chip); ++int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, + unsigned int count, + void *src); diff --git a/target/linux/brcm2708/patches-4.19/950-0445-staging-bcm2835-audio-Remove-redundant-function-call.patch b/target/linux/brcm2708/patches-4.19/950-0445-staging-bcm2835-audio-Remove-redundant-function-call.patch new file mode 100644 index 000000000..7154e0f95 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0445-staging-bcm2835-audio-Remove-redundant-function-call.patch @@ -0,0 +1,95 @@ +From c778d5d0208598e0595e59b2795b92580483971d Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:35 +0200 +Subject: [PATCH 445/703] staging: bcm2835-audio: Remove redundant function + calls + +commit 124950ebe9fa8547c59e8d4acc8d6c59e6278ed6 upstream. + +bcm2835_audio_setup(), bcm2835_audio_flush_buffers() and +bcm2835_audio_flush_playback_buffers() functions do implement +nothing. + +Also, bcm2835_audio_set_ctls() is already called inside +bcm2835_audio_set_params(), so the later call is superfluous. + +This patch removes these superfluous implementations. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 5 ----- + .../bcm2835-audio/bcm2835-vchiq.c | 21 ------------------- + .../vc04_services/bcm2835-audio/bcm2835.h | 3 --- + 3 files changed, 29 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -277,11 +277,6 @@ static int snd_bcm2835_pcm_prepare(struc + if (err < 0) + audio_error(" error setting hw params\n"); + +- bcm2835_audio_setup(alsa_stream); +- +- /* in preparation of the stream, set the controls (volume level) of the stream */ +- bcm2835_audio_set_ctls(alsa_stream); +- + memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); + + alsa_stream->pcm_indirect.hw_buffer_size = +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -580,12 +580,6 @@ unlock: + return ret; + } + +-int bcm2835_audio_setup(struct bcm2835_alsa_stream *alsa_stream) +-{ +- +- return 0; +-} +- + static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream) + { + struct vc_audio_msg m; +@@ -774,21 +768,6 @@ unlock: + return ret; + } + +-/** +- * Returns all buffers from arm->vc +- */ +-void bcm2835_audio_flush_buffers(struct bcm2835_alsa_stream *alsa_stream) +-{ +-} +- +-/** +- * Forces VC to flush(drop) its filled playback buffers and +- * return them the us. (VC->ARM) +- */ +-void bcm2835_audio_flush_playback_buffers(struct bcm2835_alsa_stream *alsa_stream) +-{ +-} +- + unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream) + { + unsigned int count = atomic_read(&alsa_stream->retrieved); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -158,7 +158,6 @@ int bcm2835_audio_close(struct bcm2835_a + int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, + unsigned int channels, unsigned int samplerate, + unsigned int bps); +-int bcm2835_audio_setup(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream); +@@ -167,7 +166,5 @@ int bcm2835_audio_write(struct bcm2835_a + void *src); + void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream); + unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream); +-void bcm2835_audio_flush_buffers(struct bcm2835_alsa_stream *alsa_stream); +-void bcm2835_audio_flush_playback_buffers(struct bcm2835_alsa_stream *alsa_stream); + + #endif /* __SOUND_ARM_BCM2835_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0446-staging-bcm2835-audio-Remove-superfluous-open-flag.patch b/target/linux/brcm2708/patches-4.19/950-0446-staging-bcm2835-audio-Remove-superfluous-open-flag.patch new file mode 100644 index 000000000..26a3ddf36 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0446-staging-bcm2835-audio-Remove-superfluous-open-flag.patch @@ -0,0 +1,61 @@ +From 5894f3d0de921dd5134004906643a1d1219b13cf Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:36 +0200 +Subject: [PATCH 446/703] staging: bcm2835-audio: Remove superfluous open flag + +commit ad13924de6b07cb52714ea1809c57b2e72a24504 upstream. + +All the alsa_stream->open flag checks in the current code are +redundant, and they cannot be racy. For the code simplification, +let's remove the flag and its check. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 9 ++------- + drivers/staging/vc04_services/bcm2835-audio/bcm2835.h | 1 - + 2 files changed, 2 insertions(+), 8 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -57,8 +57,7 @@ void bcm2835_playback_fifo(struct bcm283 + audio_info("alsa_stream=%p substream=%p\n", alsa_stream, + alsa_stream ? alsa_stream->substream : 0); + +- if (alsa_stream->open) +- consumed = bcm2835_audio_retrieve_buffers(alsa_stream); ++ consumed = bcm2835_audio_retrieve_buffers(alsa_stream); + + /* We get called only if playback was triggered, So, the number of buffers we retrieve in + * each iteration are the buffers that have been played out already +@@ -154,7 +153,6 @@ static int snd_bcm2835_playback_open_gen + chip->alsa_stream[idx] = alsa_stream; + + chip->opened |= (1 << idx); +- alsa_stream->open = 1; + alsa_stream->draining = 1; + + out: +@@ -205,10 +203,7 @@ static int snd_bcm2835_playback_close(st + alsa_stream->period_size = 0; + alsa_stream->buffer_size = 0; + +- if (alsa_stream->open) { +- alsa_stream->open = 0; +- bcm2835_audio_close(alsa_stream); +- } ++ bcm2835_audio_close(alsa_stream); + if (alsa_stream->chip) + alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; + /* +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -121,7 +121,6 @@ struct bcm2835_alsa_stream { + + spinlock_t lock; + +- int open; + int running; + int draining; + diff --git a/target/linux/brcm2708/patches-4.19/950-0447-staging-bcm2835-audio-Drop-useless-running-flag-and-.patch b/target/linux/brcm2708/patches-4.19/950-0447-staging-bcm2835-audio-Drop-useless-running-flag-and-.patch new file mode 100644 index 000000000..ba0c220c3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0447-staging-bcm2835-audio-Drop-useless-running-flag-and-.patch @@ -0,0 +1,106 @@ +From 2dd8625b99a3244bf632278cd7fdd74dffaeb3a3 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:37 +0200 +Subject: [PATCH 447/703] staging: bcm2835-audio: Drop useless running flag and + check + +commit 02f2376321d75e78117f39ff81f215254ee6b4ef upstream. + +The running flag of alsa_stream is basically useless. The running +state is strictly controlled in ALSA PCM core side, hence the check in +PCM trigger and close callbacks are superfluous. + +Also, the prefill ack at trigger start became superfluous nowadays +with the ALSA PCM core update. + +Let's rip them off. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 46 ++++--------------- + .../vc04_services/bcm2835-audio/bcm2835.h | 1 - + 2 files changed, 8 insertions(+), 39 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -187,19 +187,6 @@ static int snd_bcm2835_playback_close(st + + audio_info("Alsa close\n"); + +- /* +- * Call stop if it's still running. This happens when app +- * is force killed and we don't get a stop trigger. +- */ +- if (alsa_stream->running) { +- int err; +- +- err = bcm2835_audio_stop(alsa_stream); +- alsa_stream->running = 0; +- if (err) +- audio_error(" Failed to STOP alsa device\n"); +- } +- + alsa_stream->period_size = 0; + alsa_stream->buffer_size = 0; + +@@ -324,27 +311,13 @@ static int snd_bcm2835_pcm_trigger(struc + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: +- audio_debug("bcm2835_AUDIO_TRIGGER_START running=%d\n", +- alsa_stream->running); +- if (!alsa_stream->running) { +- err = bcm2835_audio_start(alsa_stream); +- if (!err) { +- alsa_stream->pcm_indirect.hw_io = +- alsa_stream->pcm_indirect.hw_data = +- bytes_to_frames(runtime, +- alsa_stream->pos); +- substream->ops->ack(substream); +- alsa_stream->running = 1; +- alsa_stream->draining = 1; +- } else { +- audio_error(" Failed to START alsa device (%d)\n", err); +- } +- } ++ err = bcm2835_audio_start(alsa_stream); ++ if (!err) ++ alsa_stream->draining = 1; ++ else ++ audio_error(" Failed to START alsa device (%d)\n", err); + break; + case SNDRV_PCM_TRIGGER_STOP: +- audio_debug +- ("bcm2835_AUDIO_TRIGGER_STOP running=%d draining=%d\n", +- alsa_stream->running, runtime->status->state == SNDRV_PCM_STATE_DRAINING); + if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) { + audio_info("DRAINING\n"); + alsa_stream->draining = 1; +@@ -352,12 +325,9 @@ static int snd_bcm2835_pcm_trigger(struc + audio_info("DROPPING\n"); + alsa_stream->draining = 0; + } +- if (alsa_stream->running) { +- err = bcm2835_audio_stop(alsa_stream); +- if (err != 0) +- audio_error(" Failed to STOP alsa device (%d)\n", err); +- alsa_stream->running = 0; +- } ++ err = bcm2835_audio_stop(alsa_stream); ++ if (err != 0) ++ audio_error(" Failed to STOP alsa device (%d)\n", err); + break; + default: + err = -EINVAL; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -121,7 +121,6 @@ struct bcm2835_alsa_stream { + + spinlock_t lock; + +- int running; + int draining; + + int channels; diff --git a/target/linux/brcm2708/patches-4.19/950-0448-staging-bcm2835-audio-Fix-incorrect-draining-handlin.patch b/target/linux/brcm2708/patches-4.19/950-0448-staging-bcm2835-audio-Fix-incorrect-draining-handlin.patch new file mode 100644 index 000000000..16c6d3d5a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0448-staging-bcm2835-audio-Fix-incorrect-draining-handlin.patch @@ -0,0 +1,69 @@ +From 0938ad598509c19a256d5fc63b9002ad9cf59a14 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:38 +0200 +Subject: [PATCH 448/703] staging: bcm2835-audio: Fix incorrect draining + handling + +commit 7d2a91f5f1bcf08ca257bcf1ed9721fcd341f834 upstream. + +The handling of SNDRV_PCM_TRIGGER_STOP at the trigger callback is +incorrect: when the STOP is issued, the driver is supposed to drop the +stream immediately. Meanwhile bcm2835 driver checks the DRAINING +state and tries to issue some different command. + +This patch straightens things a bit, dropping the incorrect state +checks. The draining behavior would be still not perfect at this +point, but will be improved in a later patch. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 18 ++++++------------ + 1 file changed, 6 insertions(+), 12 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -153,7 +153,6 @@ static int snd_bcm2835_playback_open_gen + chip->alsa_stream[idx] = alsa_stream; + + chip->opened |= (1 << idx); +- alsa_stream->draining = 1; + + out: + mutex_unlock(&chip->audio_mutex); +@@ -268,6 +267,7 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); + alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); + alsa_stream->pos = 0; ++ alsa_stream->draining = false; + + audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", + alsa_stream->buffer_size, alsa_stream->period_size, +@@ -312,21 +312,15 @@ static int snd_bcm2835_pcm_trigger(struc + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + err = bcm2835_audio_start(alsa_stream); +- if (!err) +- alsa_stream->draining = 1; +- else ++ if (err) + audio_error(" Failed to START alsa device (%d)\n", err); + break; ++ case SNDRV_PCM_TRIGGER_DRAIN: ++ alsa_stream->draining = true; ++ break; + case SNDRV_PCM_TRIGGER_STOP: +- if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) { +- audio_info("DRAINING\n"); +- alsa_stream->draining = 1; +- } else { +- audio_info("DROPPING\n"); +- alsa_stream->draining = 0; +- } + err = bcm2835_audio_stop(alsa_stream); +- if (err != 0) ++ if (err) + audio_error(" Failed to STOP alsa device (%d)\n", err); + break; + default: diff --git a/target/linux/brcm2708/patches-4.19/950-0449-staging-bcm2835-audio-Kill-unused-spinlock.patch b/target/linux/brcm2708/patches-4.19/950-0449-staging-bcm2835-audio-Kill-unused-spinlock.patch new file mode 100644 index 000000000..9caaf33f2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0449-staging-bcm2835-audio-Kill-unused-spinlock.patch @@ -0,0 +1,39 @@ +From 7634e4d73bc54cd1382ccffd72ab07db522f2667 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:39 +0200 +Subject: [PATCH 449/703] staging: bcm2835-audio: Kill unused spinlock + +commit 5332f6f012c0bf3a45c77dbc0f79814443a884d4 upstream. + +The alsa_stream->lock is never used. Kill it. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 2 -- + drivers/staging/vc04_services/bcm2835-audio/bcm2835.h | 2 -- + 2 files changed, 4 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -128,8 +128,6 @@ static int snd_bcm2835_playback_open_gen + alsa_stream->substream = substream; + alsa_stream->idx = idx; + +- spin_lock_init(&alsa_stream->lock); +- + err = bcm2835_audio_open(alsa_stream); + if (err) { + kfree(alsa_stream); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -119,8 +119,6 @@ struct bcm2835_alsa_stream { + struct snd_pcm_substream *substream; + struct snd_pcm_indirect pcm_indirect; + +- spinlock_t lock; +- + int draining; + + int channels; diff --git a/target/linux/brcm2708/patches-4.19/950-0450-staging-bcm2835-audio-Use-PCM-runtime-values-instead.patch b/target/linux/brcm2708/patches-4.19/950-0450-staging-bcm2835-audio-Use-PCM-runtime-values-instead.patch new file mode 100644 index 000000000..a01aa145f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0450-staging-bcm2835-audio-Use-PCM-runtime-values-instead.patch @@ -0,0 +1,74 @@ +From 5e97bf3a60f5ebcb1e4135fe1d92f649c920ff81 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:40 +0200 +Subject: [PATCH 450/703] staging: bcm2835-audio: Use PCM runtime values + instead + +commit b8f7fdd50890b848e085c0519469aed4ff4d9b54 upstream. + +Some fields in alsa_stream are the values we keep already in PCM +runtime object, hence they are redundant. Use the standard PCM +runtime values instead of the private copies. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 23 ++++--------------- + .../vc04_services/bcm2835-audio/bcm2835.h | 4 ---- + 2 files changed, 4 insertions(+), 23 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -206,22 +206,7 @@ static int snd_bcm2835_playback_close(st + static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) + { +- struct snd_pcm_runtime *runtime = substream->runtime; +- struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; +- int err; +- +- err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); +- if (err < 0) { +- audio_error +- (" pcm_lib_malloc failed to allocated pages for buffers\n"); +- return err; +- } +- +- alsa_stream->channels = params_channels(params); +- alsa_stream->params_rate = params_rate(params); +- alsa_stream->pcm_format_width = snd_pcm_format_width(params_format(params)); +- +- return err; ++ return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); + } + + /* hw_free callback */ +@@ -248,11 +233,11 @@ static int snd_bcm2835_pcm_prepare(struc + if (chip->spdif_status & IEC958_AES0_NONAUDIO) + channels = 0; + else +- channels = alsa_stream->channels; ++ channels = runtime->channels; + + err = bcm2835_audio_set_params(alsa_stream, channels, +- alsa_stream->params_rate, +- alsa_stream->pcm_format_width); ++ runtime->rate, ++ snd_pcm_format_width(runtime->format)); + if (err < 0) + audio_error(" error setting hw params\n"); + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -121,10 +121,6 @@ struct bcm2835_alsa_stream { + + int draining; + +- int channels; +- int params_rate; +- int pcm_format_width; +- + unsigned int pos; + unsigned int buffer_size; + unsigned int period_size; diff --git a/target/linux/brcm2708/patches-4.19/950-0451-staging-bcm2835-audio-Drop-unnecessary-pcm-indirect-.patch b/target/linux/brcm2708/patches-4.19/950-0451-staging-bcm2835-audio-Drop-unnecessary-pcm-indirect-.patch new file mode 100644 index 000000000..c1946bbfb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0451-staging-bcm2835-audio-Drop-unnecessary-pcm-indirect-.patch @@ -0,0 +1,29 @@ +From 82365fbb4b8d2b7602c765b49524da2895efba61 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:41 +0200 +Subject: [PATCH 451/703] staging: bcm2835-audio: Drop unnecessary pcm indirect + setup + +commit 7318ec896f4856fae2bb013858e422fa078201e1 upstream. + +The hw_queue_size of PCM indirect helper doesn't need to be set up if +you use the whole given buffer size. Drop the useless +initialization, which just confuses readers. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -280,7 +280,6 @@ static int snd_bcm2835_pcm_ack(struct sn + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; + struct snd_pcm_indirect *pcm_indirect = &alsa_stream->pcm_indirect; + +- pcm_indirect->hw_queue_size = runtime->hw.buffer_bytes_max; + return snd_pcm_indirect_playback_transfer(substream, pcm_indirect, + snd_bcm2835_pcm_transfer); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0452-staging-bcm2835-audio-Drop-useless-NULL-check.patch b/target/linux/brcm2708/patches-4.19/950-0452-staging-bcm2835-audio-Drop-useless-NULL-check.patch new file mode 100644 index 000000000..c6205a0d5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0452-staging-bcm2835-audio-Drop-useless-NULL-check.patch @@ -0,0 +1,28 @@ +From fa0533b8020b056d559cfdcb86da8ee332ae8a02 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:42 +0200 +Subject: [PATCH 452/703] staging: bcm2835-audio: Drop useless NULL check + +commit 8bcf9f252c29c2d5bcce3db605c0ebf1ef230f9c upstream. + +alsa_stream->chip can be never NULL. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -188,8 +188,7 @@ static int snd_bcm2835_playback_close(st + alsa_stream->buffer_size = 0; + + bcm2835_audio_close(alsa_stream); +- if (alsa_stream->chip) +- alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; ++ alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; + /* + * Do not free up alsa_stream here, it will be freed up by + * runtime->private_free callback we registered in *_open above diff --git a/target/linux/brcm2708/patches-4.19/950-0453-staging-bcm2835-audio-Propagate-parameter-setup-erro.patch b/target/linux/brcm2708/patches-4.19/950-0453-staging-bcm2835-audio-Propagate-parameter-setup-erro.patch new file mode 100644 index 000000000..884171b33 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0453-staging-bcm2835-audio-Propagate-parameter-setup-erro.patch @@ -0,0 +1,40 @@ +From 10310b6f36d3573f55e3ab318204aebe9f1a60f8 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:43 +0200 +Subject: [PATCH 453/703] staging: bcm2835-audio: Propagate parameter setup + error + +commit fee5638fe552ff8222c3a5bdcc4a34255e248d8c upstream. + +When the parameter setup fails, the driver should propagate the error +code instead of silently ignoring it. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -238,7 +238,7 @@ static int snd_bcm2835_pcm_prepare(struc + runtime->rate, + snd_pcm_format_width(runtime->format)); + if (err < 0) +- audio_error(" error setting hw params\n"); ++ goto out; + + memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); + +@@ -255,8 +255,9 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->buffer_size, alsa_stream->period_size, + alsa_stream->pos, runtime->frame_bits); + ++ out: + mutex_unlock(&chip->audio_mutex); +- return 0; ++ return err; + } + + static void snd_bcm2835_pcm_transfer(struct snd_pcm_substream *substream, diff --git a/target/linux/brcm2708/patches-4.19/950-0454-staging-bcm2835-audio-Drop-debug-messages-in-bcm2835.patch b/target/linux/brcm2708/patches-4.19/950-0454-staging-bcm2835-audio-Drop-debug-messages-in-bcm2835.patch new file mode 100644 index 000000000..0955df559 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0454-staging-bcm2835-audio-Drop-debug-messages-in-bcm2835.patch @@ -0,0 +1,150 @@ +From 50292f7a57de792cb23b3883594b0e102e74e9e2 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:44 +0200 +Subject: [PATCH 454/703] staging: bcm2835-audio: Drop debug messages in + bcm2835-pcm.c + +commit 055e1c330d04df87d4730a5db837161c11ddaafc upstream. + +These debug messages worsen the code readability a lot while they give +little debuggability (which we already have via tracing, in anyway). + +Let's clean them up. This allows us to reduce the +snd_bcm2835_pcm_lib_ioctl() function to be a direct call of the +snd_pcm_lib_ioctl callback (like most other drivers do), too. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 51 +++---------------- + 1 file changed, 7 insertions(+), 44 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -44,9 +44,7 @@ static const struct snd_pcm_hardware snd + + static void snd_bcm2835_playback_free(struct snd_pcm_runtime *runtime) + { +- audio_info("Freeing up alsa stream here ..\n"); + kfree(runtime->private_data); +- runtime->private_data = NULL; + } + + void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream) +@@ -99,7 +97,6 @@ static int snd_bcm2835_playback_open_gen + int err; + + mutex_lock(&chip->audio_mutex); +- audio_info("Alsa open (%d)\n", substream->number); + idx = substream->number; + + if (spdif && chip->opened) { +@@ -182,8 +179,6 @@ static int snd_bcm2835_playback_close(st + runtime = substream->runtime; + alsa_stream = runtime->private_data; + +- audio_info("Alsa close\n"); +- + alsa_stream->period_size = 0; + alsa_stream->buffer_size = 0; + +@@ -251,10 +246,6 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->pos = 0; + alsa_stream->draining = false; + +- audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", +- alsa_stream->buffer_size, alsa_stream->period_size, +- alsa_stream->pos, runtime->frame_bits); +- + out: + mutex_unlock(&chip->audio_mutex); + return err; +@@ -266,12 +257,8 @@ static void snd_bcm2835_pcm_transfer(str + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; + void *src = (void *) (substream->runtime->dma_area + rec->sw_data); +- int err; +- +- err = bcm2835_audio_write(alsa_stream, bytes, src); +- if (err) +- audio_error(" Failed to transfer to alsa device (%d)\n", err); + ++ bcm2835_audio_write(alsa_stream, bytes, src); + } + + static int snd_bcm2835_pcm_ack(struct snd_pcm_substream *substream) +@@ -289,27 +276,18 @@ static int snd_bcm2835_pcm_trigger(struc + { + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; +- int err = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: +- err = bcm2835_audio_start(alsa_stream); +- if (err) +- audio_error(" Failed to START alsa device (%d)\n", err); +- break; ++ return bcm2835_audio_start(alsa_stream); + case SNDRV_PCM_TRIGGER_DRAIN: + alsa_stream->draining = true; +- break; ++ return 0; + case SNDRV_PCM_TRIGGER_STOP: +- err = bcm2835_audio_stop(alsa_stream); +- if (err) +- audio_error(" Failed to STOP alsa device (%d)\n", err); +- break; ++ return bcm2835_audio_stop(alsa_stream); + default: +- err = -EINVAL; ++ return -EINVAL; + } +- +- return err; + } + + /* pointer callback */ +@@ -319,31 +297,16 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; + +- audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, +- frames_to_bytes(runtime, runtime->status->hw_ptr), +- frames_to_bytes(runtime, runtime->control->appl_ptr), +- alsa_stream->pos); +- + return snd_pcm_indirect_playback_pointer(substream, + &alsa_stream->pcm_indirect, + alsa_stream->pos); + } + +-static int snd_bcm2835_pcm_lib_ioctl(struct snd_pcm_substream *substream, +- unsigned int cmd, void *arg) +-{ +- int ret = snd_pcm_lib_ioctl(substream, cmd, arg); +- +- audio_info(" .. substream=%p, cmd=%d, arg=%p (%x) ret=%d\n", substream, +- cmd, arg, arg ? *(unsigned int *)arg : 0, ret); +- return ret; +-} +- + /* operators */ + static const struct snd_pcm_ops snd_bcm2835_playback_ops = { + .open = snd_bcm2835_playback_open, + .close = snd_bcm2835_playback_close, +- .ioctl = snd_bcm2835_pcm_lib_ioctl, ++ .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_bcm2835_pcm_hw_params, + .hw_free = snd_bcm2835_pcm_hw_free, + .prepare = snd_bcm2835_pcm_prepare, +@@ -355,7 +318,7 @@ static const struct snd_pcm_ops snd_bcm2 + static const struct snd_pcm_ops snd_bcm2835_playback_spdif_ops = { + .open = snd_bcm2835_playback_spdif_open, + .close = snd_bcm2835_playback_close, +- .ioctl = snd_bcm2835_pcm_lib_ioctl, ++ .ioctl = snd_pcm_lib_ioctl, + .hw_params = snd_bcm2835_pcm_hw_params, + .hw_free = snd_bcm2835_pcm_hw_free, + .prepare = snd_bcm2835_pcm_prepare, diff --git a/target/linux/brcm2708/patches-4.19/950-0455-staging-bcm2835-audio-Drop-superfluous-mutex-lock-du.patch b/target/linux/brcm2708/patches-4.19/950-0455-staging-bcm2835-audio-Drop-superfluous-mutex-lock-du.patch new file mode 100644 index 000000000..6a36ee056 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0455-staging-bcm2835-audio-Drop-superfluous-mutex-lock-du.patch @@ -0,0 +1,49 @@ +From 1eb403fb6c5f6b8bea96e9bd0d6b87949aab172f Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:45 +0200 +Subject: [PATCH 455/703] staging: bcm2835-audio: Drop superfluous mutex lock + during prepare + +commit f0eb15d055380ff127e5f12c8fad2b36bdb3c006 upstream. + +The chip->audio_mutex is used basically for protecting the opened +stream assignment, and the prepare callback is irrelevant with it. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 8 ++------ + 1 file changed, 2 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -218,8 +218,6 @@ static int snd_bcm2835_pcm_prepare(struc + int channels; + int err; + +- mutex_lock(&chip->audio_mutex); +- + /* notify the vchiq that it should enter spdif passthrough mode by + * setting channels=0 (see + * https://github.com/raspberrypi/linux/issues/528) +@@ -233,7 +231,7 @@ static int snd_bcm2835_pcm_prepare(struc + runtime->rate, + snd_pcm_format_width(runtime->format)); + if (err < 0) +- goto out; ++ return err; + + memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); + +@@ -246,9 +244,7 @@ static int snd_bcm2835_pcm_prepare(struc + alsa_stream->pos = 0; + alsa_stream->draining = false; + +- out: +- mutex_unlock(&chip->audio_mutex); +- return err; ++ return 0; + } + + static void snd_bcm2835_pcm_transfer(struct snd_pcm_substream *substream, diff --git a/target/linux/brcm2708/patches-4.19/950-0456-staging-bcm2835-audio-Add-10ms-period-constraint.patch b/target/linux/brcm2708/patches-4.19/950-0456-staging-bcm2835-audio-Add-10ms-period-constraint.patch new file mode 100644 index 000000000..7549032b3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0456-staging-bcm2835-audio-Add-10ms-period-constraint.patch @@ -0,0 +1,33 @@ +From c0c56af886a1f7078dcd78ab46d7480009b080a2 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:46 +0200 +Subject: [PATCH 456/703] staging: bcm2835-audio: Add 10ms period constraint + +commit 93c66acaf68b5247c3121a46a71ff6a70fc1d492 upstream. + +It seems that the resolution of vc04 callback is in 10 msec; i.e. the +minimal period size is also 10 msec. + +This patch adds the corresponding hw constraint. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -145,6 +145,11 @@ static int snd_bcm2835_playback_open_gen + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, + 16); + ++ /* position update is in 10ms order */ ++ snd_pcm_hw_constraint_minmax(runtime, ++ SNDRV_PCM_HW_PARAM_PERIOD_TIME, ++ 10 * 1000, UINT_MAX); ++ + chip->alsa_stream[idx] = alsa_stream; + + chip->opened |= (1 << idx); diff --git a/target/linux/brcm2708/patches-4.19/950-0457-staging-bcm2835-audio-Make-single-vchi-handle.patch b/target/linux/brcm2708/patches-4.19/950-0457-staging-bcm2835-audio-Make-single-vchi-handle.patch new file mode 100644 index 000000000..6b0e3715e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0457-staging-bcm2835-audio-Make-single-vchi-handle.patch @@ -0,0 +1,412 @@ +From 8456d764799cf7bc661892900cb08b3943e3bda2 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:47 +0200 +Subject: [PATCH 457/703] staging: bcm2835-audio: Make single vchi handle + +commit 326a6edcb2ada56375bd7d3fc24c83f58e8da7f3 upstream. + +The bcm2835_audio_instance object contains the array of +VCHI_SERVICE_HANDLE_T, while the code assumes and uses only the first +element explicitly. Let's reduce to a single vchi handle for +simplifying the code. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../bcm2835-audio/bcm2835-vchiq.c | 170 ++++++------------ + 1 file changed, 58 insertions(+), 112 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -44,8 +44,7 @@ + #endif + + struct bcm2835_audio_instance { +- unsigned int num_connections; +- VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; ++ VCHI_SERVICE_HANDLE_T vchi_handle; + struct completion msg_avail_comp; + struct mutex vchi_mutex; + struct bcm2835_alsa_stream *alsa_stream; +@@ -202,12 +201,12 @@ static void audio_vchi_callback(void *pa + BUG(); + return; + } +- if (!instance->vchi_handle[0]) { +- LOG_ERR(" .. instance->vchi_handle[0] is null\n"); ++ if (!instance->vchi_handle) { ++ LOG_ERR(" .. instance->vchi_handle is null\n"); + BUG(); + return; + } +- status = vchi_msg_dequeue(instance->vchi_handle[0], ++ status = vchi_msg_dequeue(instance->vchi_handle, + &m, sizeof(m), &msg_len, VCHI_FLAGS_NONE); + if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { + LOG_DBG(" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", +@@ -237,102 +236,61 @@ static void audio_vchi_callback(void *pa + + static struct bcm2835_audio_instance * + vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, +- VCHI_CONNECTION_T **vchi_connections, +- unsigned int num_connections) ++ VCHI_CONNECTION_T *vchi_connection) + { +- unsigned int i; ++ SERVICE_CREATION_T params = { ++ .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), ++ .service_id = VC_AUDIO_SERVER_NAME, ++ .connection = vchi_connection, ++ .rx_fifo_size = 0, ++ .tx_fifo_size = 0, ++ .callback = audio_vchi_callback, ++ .want_unaligned_bulk_rx = 1, //TODO: remove VCOS_FALSE ++ .want_unaligned_bulk_tx = 1, //TODO: remove VCOS_FALSE ++ .want_crc = 0 ++ }; + struct bcm2835_audio_instance *instance; + int status; +- int ret; +- +- LOG_DBG("%s: start", __func__); + +- if (num_connections > VCHI_MAX_NUM_CONNECTIONS) { +- LOG_ERR("%s: unsupported number of connections %u (max=%u)\n", +- __func__, num_connections, VCHI_MAX_NUM_CONNECTIONS); +- +- return ERR_PTR(-EINVAL); +- } + /* Allocate memory for this instance */ + instance = kzalloc(sizeof(*instance), GFP_KERNEL); + if (!instance) + return ERR_PTR(-ENOMEM); + +- instance->num_connections = num_connections; +- + /* Create a lock for exclusive, serialized VCHI connection access */ + mutex_init(&instance->vchi_mutex); + /* Open the VCHI service connections */ +- for (i = 0; i < num_connections; i++) { +- SERVICE_CREATION_T params = { +- .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), +- .service_id = VC_AUDIO_SERVER_NAME, +- .connection = vchi_connections[i], +- .rx_fifo_size = 0, +- .tx_fifo_size = 0, +- .callback = audio_vchi_callback, +- .callback_param = instance, +- .want_unaligned_bulk_rx = 1, //TODO: remove VCOS_FALSE +- .want_unaligned_bulk_tx = 1, //TODO: remove VCOS_FALSE +- .want_crc = 0 +- }; +- +- LOG_DBG("%s: about to open %i\n", __func__, i); +- status = vchi_service_open(vchi_instance, ¶ms, +- &instance->vchi_handle[i]); ++ params.callback_param = instance, + +- LOG_DBG("%s: opened %i: %p=%d\n", __func__, i, instance->vchi_handle[i], status); +- if (status) { +- LOG_ERR("%s: failed to open VCHI service connection (status=%d)\n", +- __func__, status); +- ret = -EPERM; +- goto err_close_services; +- } +- /* Finished with the service for now */ +- vchi_service_release(instance->vchi_handle[i]); +- } +- +- LOG_DBG("%s: okay\n", __func__); +- return instance; ++ status = vchi_service_open(vchi_instance, ¶ms, ++ &instance->vchi_handle); + +-err_close_services: +- for (i = 0; i < instance->num_connections; i++) { +- LOG_ERR("%s: closing %i: %p\n", __func__, i, instance->vchi_handle[i]); +- if (instance->vchi_handle[i]) +- vchi_service_close(instance->vchi_handle[i]); ++ if (status) { ++ LOG_ERR("%s: failed to open VCHI service connection (status=%d)\n", ++ __func__, status); ++ kfree(instance); ++ return ERR_PTR(-EPERM); + } + +- kfree(instance); +- LOG_ERR("%s: error\n", __func__); ++ /* Finished with the service for now */ ++ vchi_service_release(instance->vchi_handle); + +- return ERR_PTR(ret); ++ return instance; + } + + static int vc_vchi_audio_deinit(struct bcm2835_audio_instance *instance) + { +- unsigned int i; +- +- if (!instance) { +- LOG_ERR("%s: invalid handle %p\n", __func__, instance); +- +- return -1; +- } ++ int status; + +- LOG_DBG(" .. about to lock (%d)\n", instance->num_connections); + mutex_lock(&instance->vchi_mutex); + + /* Close all VCHI service connections */ +- for (i = 0; i < instance->num_connections; i++) { +- int status; +- +- LOG_DBG(" .. %i:closing %p\n", i, instance->vchi_handle[i]); +- vchi_service_use(instance->vchi_handle[i]); ++ vchi_service_use(instance->vchi_handle); + +- status = vchi_service_close(instance->vchi_handle[i]); +- if (status) { +- LOG_DBG("%s: failed to close VCHI service connection (status=%d)\n", +- __func__, status); +- } ++ status = vchi_service_close(instance->vchi_handle); ++ if (status) { ++ LOG_DBG("%s: failed to close VCHI service connection (status=%d)\n", ++ __func__, status); + } + + mutex_unlock(&instance->vchi_mutex); +@@ -383,19 +341,9 @@ static int bcm2835_audio_open_connection + (struct bcm2835_audio_instance *)alsa_stream->instance; + struct bcm2835_vchi_ctx *vhci_ctx = alsa_stream->chip->vchi_ctx; + +- LOG_INFO("%s: start\n", __func__); +- BUG_ON(instance); +- if (instance) { +- LOG_ERR("%s: VCHI instance already open (%p)\n", +- __func__, instance); +- instance->alsa_stream = alsa_stream; +- alsa_stream->instance = instance; +- return 0; +- } +- + /* Initialize an instance of the audio service */ + instance = vc_vchi_audio_init(vhci_ctx->vchi_instance, +- &vhci_ctx->vchi_connection, 1); ++ vhci_ctx->vchi_connection); + + if (IS_ERR(instance)) { + LOG_ERR("%s: failed to initialize audio service\n", __func__); +@@ -407,8 +355,6 @@ static int bcm2835_audio_open_connection + instance->alsa_stream = alsa_stream; + alsa_stream->instance = instance; + +- LOG_DBG(" success !\n"); +- + return 0; + } + +@@ -431,12 +377,12 @@ int bcm2835_audio_open(struct bcm2835_al + LOG_DBG(" instance (%p)\n", instance); + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + m.type = VC_AUDIO_MSG_TYPE_OPEN; + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -450,7 +396,7 @@ int bcm2835_audio_open(struct bcm2835_al + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + + free_wq: +@@ -472,7 +418,7 @@ int bcm2835_audio_set_ctls(struct bcm283 + chip->dest, chip->volume); + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + instance->result = -1; + +@@ -487,7 +433,7 @@ int bcm2835_audio_set_ctls(struct bcm283 + init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -511,7 +457,7 @@ int bcm2835_audio_set_ctls(struct bcm283 + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + + return ret; +@@ -537,7 +483,7 @@ int bcm2835_audio_set_params(struct bcm2 + } + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + instance->result = -1; + +@@ -550,7 +496,7 @@ int bcm2835_audio_set_params(struct bcm2 + init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -574,7 +520,7 @@ int bcm2835_audio_set_params(struct bcm2 + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + + return ret; +@@ -588,12 +534,12 @@ static int bcm2835_audio_start_worker(st + int ret; + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + m.type = VC_AUDIO_MSG_TYPE_START; + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -607,7 +553,7 @@ static int bcm2835_audio_start_worker(st + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + return ret; + } +@@ -620,13 +566,13 @@ static int bcm2835_audio_stop_worker(str + int ret; + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + m.type = VC_AUDIO_MSG_TYPE_STOP; + m.u.stop.draining = alsa_stream->draining; + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -640,7 +586,7 @@ static int bcm2835_audio_stop_worker(str + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + return ret; + } +@@ -655,7 +601,7 @@ int bcm2835_audio_close(struct bcm2835_a + my_workqueue_quit(alsa_stream); + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + m.type = VC_AUDIO_MSG_TYPE_CLOSE; + +@@ -663,7 +609,7 @@ int bcm2835_audio_close(struct bcm2835_a + init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -687,7 +633,7 @@ int bcm2835_audio_close(struct bcm2835_a + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + + /* Stop the audio service */ +@@ -708,10 +654,10 @@ static int bcm2835_audio_write_worker(st + LOG_INFO(" Writing %d bytes from %p\n", count, src); + + mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle[0]); ++ vchi_service_use(instance->vchi_handle); + + if (instance->peer_version == 0 && +- vchi_get_peer_version(instance->vchi_handle[0], &instance->peer_version) == 0) ++ vchi_get_peer_version(instance->vchi_handle, &instance->peer_version) == 0) + LOG_DBG("%s: client version %d connected\n", __func__, instance->peer_version); + + m.type = VC_AUDIO_MSG_TYPE_WRITE; +@@ -723,7 +669,7 @@ static int bcm2835_audio_write_worker(st + m.u.write.silence = src == NULL; + + /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + &m, sizeof(m)); + + if (status) { +@@ -736,7 +682,7 @@ static int bcm2835_audio_write_worker(st + if (!m.u.write.silence) { + if (!m.u.write.max_packet) { + /* Send the message to the videocore */ +- status = vchi_bulk_queue_transmit(instance->vchi_handle[0], ++ status = vchi_bulk_queue_transmit(instance->vchi_handle, + src, count, + 0 * VCHI_FLAGS_BLOCK_UNTIL_QUEUED + + +@@ -746,7 +692,7 @@ static int bcm2835_audio_write_worker(st + while (count > 0) { + int bytes = min_t(int, m.u.write.max_packet, count); + +- status = bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ status = bcm2835_vchi_msg_queue(instance->vchi_handle, + src, bytes); + src = (char *)src + bytes; + count -= bytes; +@@ -763,7 +709,7 @@ static int bcm2835_audio_write_worker(st + ret = 0; + + unlock: +- vchi_service_release(instance->vchi_handle[0]); ++ vchi_service_release(instance->vchi_handle); + mutex_unlock(&instance->vchi_mutex); + return ret; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0458-staging-bcm2835-audio-Code-refactoring-of-vchiq-acce.patch b/target/linux/brcm2708/patches-4.19/950-0458-staging-bcm2835-audio-Code-refactoring-of-vchiq-acce.patch new file mode 100644 index 000000000..0cc2de5c8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0458-staging-bcm2835-audio-Code-refactoring-of-vchiq-acce.patch @@ -0,0 +1,575 @@ +From 8ef08ec7a6a8f3bb42b8000e84cc444c88e60f8d Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:48 +0200 +Subject: [PATCH 458/703] staging: bcm2835-audio: Code refactoring of vchiq + accessor codes + +commit 769a8e9bf5cf39813f52962fdafdf7e4d52ad585 upstream. + +This is a cleanup and code refactoring in bcm2835-vchiq.c. + +The major code changes are to provide local helpers for easier use of +lock / unlock, and message passing with/without response wait. This +allows us to reduce lots of open codes. + +Also, the max packet is set at opening the stream, not at each time +when the write gets called. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../bcm2835-audio/bcm2835-vchiq.c | 440 ++++++------------ + 1 file changed, 142 insertions(+), 298 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -49,6 +49,7 @@ struct bcm2835_audio_instance { + struct mutex vchi_mutex; + struct bcm2835_alsa_stream *alsa_stream; + int result; ++ unsigned int max_packet; + short peer_version; + }; + +@@ -65,16 +66,68 @@ static int bcm2835_audio_start_worker(st + static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, + unsigned int count, void *src); + +-// Routine to send a message across a service ++static void bcm2835_audio_lock(struct bcm2835_audio_instance *instance) ++{ ++ mutex_lock(&instance->vchi_mutex); ++ vchi_service_use(instance->vchi_handle); ++} ++ ++static void bcm2835_audio_unlock(struct bcm2835_audio_instance *instance) ++{ ++ vchi_service_release(instance->vchi_handle); ++ mutex_unlock(&instance->vchi_mutex); ++} ++ ++static int bcm2835_audio_send_msg_locked(struct bcm2835_audio_instance *instance, ++ struct vc_audio_msg *m, bool wait) ++{ ++ int status; ++ ++ if (wait) { ++ instance->result = -1; ++ init_completion(&instance->msg_avail_comp); ++ } ++ ++ status = vchi_queue_kernel_message(instance->vchi_handle, ++ m, sizeof(*m)); ++ if (status) { ++ LOG_ERR("vchi message queue failed: %d, msg=%d\n", ++ status, m->type); ++ return -EIO; ++ } ++ ++ if (wait) { ++ if (!wait_for_completion_timeout(&instance->msg_avail_comp, ++ msecs_to_jiffies(10 * 1000))) { ++ LOG_ERR("vchi message timeout, msg=%d\n", m->type); ++ return -ETIMEDOUT; ++ } else if (instance->result) { ++ LOG_ERR("vchi message response error:%d, msg=%d\n", ++ instance->result, m->type); ++ return -EIO; ++ } ++ } ++ ++ return 0; ++} + +-static int +-bcm2835_vchi_msg_queue(VCHI_SERVICE_HANDLE_T handle, +- void *data, +- unsigned int size) +-{ +- return vchi_queue_kernel_message(handle, +- data, +- size); ++static int bcm2835_audio_send_msg(struct bcm2835_audio_instance *instance, ++ struct vc_audio_msg *m, bool wait) ++{ ++ int err; ++ ++ bcm2835_audio_lock(instance); ++ err = bcm2835_audio_send_msg_locked(instance, m, wait); ++ bcm2835_audio_unlock(instance); ++ return err; ++} ++ ++static int bcm2835_audio_send_simple(struct bcm2835_audio_instance *instance, ++ int type, bool wait) ++{ ++ struct vc_audio_msg m = { .type = type }; ++ ++ return bcm2835_audio_send_msg(instance, &m, wait); + } + + static const u32 BCM2835_AUDIO_WRITE_COOKIE1 = ('B' << 24 | 'C' << 16 | +@@ -283,10 +336,9 @@ static int vc_vchi_audio_deinit(struct b + int status; + + mutex_lock(&instance->vchi_mutex); +- +- /* Close all VCHI service connections */ + vchi_service_use(instance->vchi_handle); + ++ /* Close all VCHI service connections */ + status = vchi_service_close(instance->vchi_handle); + if (status) { + LOG_DBG("%s: failed to close VCHI service connection (status=%d)\n", +@@ -345,12 +397,8 @@ static int bcm2835_audio_open_connection + instance = vc_vchi_audio_init(vhci_ctx->vchi_instance, + vhci_ctx->vchi_connection); + +- if (IS_ERR(instance)) { +- LOG_ERR("%s: failed to initialize audio service\n", __func__); +- +- /* vchi_instance is retained for use the next time. */ ++ if (IS_ERR(instance)) + return PTR_ERR(instance); +- } + + instance->alsa_stream = alsa_stream; + alsa_stream->instance = instance; +@@ -361,66 +409,44 @@ static int bcm2835_audio_open_connection + int bcm2835_audio_open(struct bcm2835_alsa_stream *alsa_stream) + { + struct bcm2835_audio_instance *instance; +- struct vc_audio_msg m; +- int status; +- int ret; ++ int err; + + alsa_stream->my_wq = alloc_workqueue("my_queue", WQ_HIGHPRI, 1); + if (!alsa_stream->my_wq) + return -ENOMEM; + +- ret = bcm2835_audio_open_connection(alsa_stream); +- if (ret) ++ err = bcm2835_audio_open_connection(alsa_stream); ++ if (err < 0) + goto free_wq; + + instance = alsa_stream->instance; +- LOG_DBG(" instance (%p)\n", instance); +- +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- m.type = VC_AUDIO_MSG_TYPE_OPEN; +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; + +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); ++ err = bcm2835_audio_send_simple(instance, VC_AUDIO_MSG_TYPE_OPEN, ++ false); ++ if (err < 0) ++ goto deinit; ++ ++ bcm2835_audio_lock(instance); ++ vchi_get_peer_version(instance->vchi_handle, &instance->peer_version); ++ bcm2835_audio_unlock(instance); ++ if (instance->peer_version < 2 || force_bulk) ++ instance->max_packet = 0; /* bulk transfer */ ++ else ++ instance->max_packet = 4000; + +-free_wq: +- if (ret) +- destroy_workqueue(alsa_stream->my_wq); ++ return 0; + +- return ret; ++ deinit: ++ vc_vchi_audio_deinit(instance); ++ free_wq: ++ destroy_workqueue(alsa_stream->my_wq); ++ return err; + } + + int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream) + { +- struct vc_audio_msg m; +- struct bcm2835_audio_instance *instance = alsa_stream->instance; + struct bcm2835_chip *chip = alsa_stream->chip; +- int status; +- int ret; +- +- LOG_INFO(" Setting ALSA dest(%d), volume(%d)\n", +- chip->dest, chip->volume); +- +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- instance->result = -1; ++ struct vc_audio_msg m = {}; + + m.type = VC_AUDIO_MSG_TYPE_CONTROL; + m.u.control.dest = chip->dest; +@@ -429,289 +455,107 @@ int bcm2835_audio_set_ctls(struct bcm283 + else + m.u.control.volume = alsa2chip(chip->volume); + +- /* Create the message available completion */ +- init_completion(&instance->msg_avail_comp); +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; +- goto unlock; +- } +- +- /* We are expecting a reply from the videocore */ +- wait_for_completion(&instance->msg_avail_comp); +- +- if (instance->result) { +- LOG_ERR("%s: result=%d\n", __func__, instance->result); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; +- +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); +- +- return ret; ++ return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); + } + + int bcm2835_audio_set_params(struct bcm2835_alsa_stream *alsa_stream, + unsigned int channels, unsigned int samplerate, + unsigned int bps) + { +- struct vc_audio_msg m; +- struct bcm2835_audio_instance *instance = alsa_stream->instance; +- int status; +- int ret; +- +- LOG_INFO(" Setting ALSA channels(%d), samplerate(%d), bits-per-sample(%d)\n", +- channels, samplerate, bps); ++ struct vc_audio_msg m = { ++ .type = VC_AUDIO_MSG_TYPE_CONFIG, ++ .u.config.channels = channels, ++ .u.config.samplerate = samplerate, ++ .u.config.bps = bps, ++ }; ++ int err; + + /* resend ctls - alsa_stream may not have been open when first send */ +- ret = bcm2835_audio_set_ctls(alsa_stream); +- if (ret) { +- LOG_ERR(" Alsa controls not supported\n"); +- return -EINVAL; +- } ++ err = bcm2835_audio_set_ctls(alsa_stream); ++ if (err) ++ return err; + +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- instance->result = -1; +- +- m.type = VC_AUDIO_MSG_TYPE_CONFIG; +- m.u.config.channels = channels; +- m.u.config.samplerate = samplerate; +- m.u.config.bps = bps; +- +- /* Create the message available completion */ +- init_completion(&instance->msg_avail_comp); +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; +- goto unlock; +- } +- +- /* We are expecting a reply from the videocore */ +- wait_for_completion(&instance->msg_avail_comp); +- +- if (instance->result) { +- LOG_ERR("%s: result=%d", __func__, instance->result); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; +- +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); +- +- return ret; ++ return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); + } + + static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream) + { +- struct vc_audio_msg m; +- struct bcm2835_audio_instance *instance = alsa_stream->instance; +- int status; +- int ret; +- +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- m.type = VC_AUDIO_MSG_TYPE_START; +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; +- +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); +- return ret; ++ return bcm2835_audio_send_simple(alsa_stream->instance, ++ VC_AUDIO_MSG_TYPE_START, false); + } + + static int bcm2835_audio_stop_worker(struct bcm2835_alsa_stream *alsa_stream) + { +- struct vc_audio_msg m; +- struct bcm2835_audio_instance *instance = alsa_stream->instance; +- int status; +- int ret; +- +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- m.type = VC_AUDIO_MSG_TYPE_STOP; +- m.u.stop.draining = alsa_stream->draining; +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; +- +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); +- return ret; ++ return bcm2835_audio_send_simple(alsa_stream->instance, ++ VC_AUDIO_MSG_TYPE_STOP, false); + } + + int bcm2835_audio_close(struct bcm2835_alsa_stream *alsa_stream) + { +- struct vc_audio_msg m; + struct bcm2835_audio_instance *instance = alsa_stream->instance; +- int status; +- int ret; ++ int err; + + my_workqueue_quit(alsa_stream); + +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); +- +- m.type = VC_AUDIO_MSG_TYPE_CLOSE; +- +- /* Create the message available completion */ +- init_completion(&instance->msg_avail_comp); +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); +- +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- ret = -1; +- goto unlock; +- } +- +- /* We are expecting a reply from the videocore */ +- wait_for_completion(&instance->msg_avail_comp); +- +- if (instance->result) { +- LOG_ERR("%s: failed result (result=%d)\n", +- __func__, instance->result); +- +- ret = -1; +- goto unlock; +- } +- +- ret = 0; +- +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); ++ err = bcm2835_audio_send_simple(alsa_stream->instance, ++ VC_AUDIO_MSG_TYPE_CLOSE, true); + + /* Stop the audio service */ + vc_vchi_audio_deinit(instance); + alsa_stream->instance = NULL; + +- return ret; ++ return err; + } + + static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, +- unsigned int count, void *src) ++ unsigned int size, void *src) + { +- struct vc_audio_msg m; + struct bcm2835_audio_instance *instance = alsa_stream->instance; +- int status; +- int ret; +- +- LOG_INFO(" Writing %d bytes from %p\n", count, src); +- +- mutex_lock(&instance->vchi_mutex); +- vchi_service_use(instance->vchi_handle); ++ struct vc_audio_msg m = { ++ .type = VC_AUDIO_MSG_TYPE_WRITE, ++ .u.write.count = size, ++ .u.write.max_packet = instance->max_packet, ++ .u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1, ++ .u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2, ++ }; ++ unsigned int count; ++ int err, status; + +- if (instance->peer_version == 0 && +- vchi_get_peer_version(instance->vchi_handle, &instance->peer_version) == 0) +- LOG_DBG("%s: client version %d connected\n", __func__, instance->peer_version); +- +- m.type = VC_AUDIO_MSG_TYPE_WRITE; +- m.u.write.count = count; +- // old version uses bulk, new version uses control +- m.u.write.max_packet = instance->peer_version < 2 || force_bulk ? 0 : 4000; +- m.u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1; +- m.u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2; +- m.u.write.silence = src == NULL; +- +- /* Send the message to the videocore */ +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- &m, sizeof(m)); ++ if (!size) ++ return 0; + +- if (status) { +- LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", +- __func__, status); +- +- ret = -1; ++ bcm2835_audio_lock(instance); ++ err = bcm2835_audio_send_msg_locked(instance, &m, false); ++ if (err < 0) + goto unlock; +- } +- if (!m.u.write.silence) { +- if (!m.u.write.max_packet) { +- /* Send the message to the videocore */ +- status = vchi_bulk_queue_transmit(instance->vchi_handle, +- src, count, +- 0 * VCHI_FLAGS_BLOCK_UNTIL_QUEUED +- + +- 1 * VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, +- NULL); +- } else { +- while (count > 0) { +- int bytes = min_t(int, m.u.write.max_packet, count); + +- status = bcm2835_vchi_msg_queue(instance->vchi_handle, +- src, bytes); +- src = (char *)src + bytes; +- count -= bytes; +- } +- } +- if (status) { +- LOG_ERR("%s: failed on vchi_bulk_queue_transmit (status=%d)\n", +- __func__, status); ++ count = size; ++ if (!instance->max_packet) { ++ /* Send the message to the videocore */ ++ status = vchi_bulk_queue_transmit(instance->vchi_handle, ++ src, count, ++ VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, ++ NULL); ++ } else { ++ while (count > 0) { ++ int bytes = min(instance->max_packet, count); + +- ret = -1; +- goto unlock; ++ status = vchi_queue_kernel_message(instance->vchi_handle, ++ src, bytes); ++ src += bytes; ++ count -= bytes; + } + } +- ret = 0; + +-unlock: +- vchi_service_release(instance->vchi_handle); +- mutex_unlock(&instance->vchi_mutex); +- return ret; ++ if (status) { ++ LOG_ERR("failed on %d bytes transfer (status=%d)\n", ++ size, status); ++ err = -EIO; ++ } ++ ++ unlock: ++ bcm2835_audio_unlock(instance); ++ return err; + } + + unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream) diff --git a/target/linux/brcm2708/patches-4.19/950-0459-staging-bcm2835-audio-Operate-non-atomic-PCM-ops.patch b/target/linux/brcm2708/patches-4.19/950-0459-staging-bcm2835-audio-Operate-non-atomic-PCM-ops.patch new file mode 100644 index 000000000..5ce175fde --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0459-staging-bcm2835-audio-Operate-non-atomic-PCM-ops.patch @@ -0,0 +1,593 @@ +From 8f5871c73ba767c9443eb02c4ca0cb7df56982e8 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:49 +0200 +Subject: [PATCH 459/703] staging: bcm2835-audio: Operate non-atomic PCM ops + +commit 5c7883e5f27e829f3f3a2ba174d4a724bfd5f026 upstream. + +This is the most significant part in the patch series. + +The bcm2835-audio driver used to queue the commands to vc04 core via +workqueue, but basically the whole accesses to vc04 core are done in +the sleepable context, including the callback calls. In such a case, +rewriting the code using non-atomic PCM ops will simplify the logic a +lot. + +This patch does it: all workqueue are gone and each former-work +implementation is now directly called from PCM ops like trigger and +write transfer. + +Along with it, the DMA position updater, bcm2835_playback_fifo(), was +also rewritten to use a simpler logic. Now it handles the XRUN and +draining properly by calling snd_pcm_stop() conditionally. + +The current position is kept in atomic_t value so that it can be read +concurrently from the pointer callback. + +Also, the bcm2835_audio_instance object is allocated at the beginning +of bcm2835_audio_open(). This makes the resource management clearer. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 74 +++--- + .../bcm2835-audio/bcm2835-vchiq.c | 244 +++--------------- + .../vc04_services/bcm2835-audio/bcm2835.h | 9 +- + 3 files changed, 82 insertions(+), 245 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -11,7 +11,8 @@ + /* hardware definition */ + static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | +- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), ++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_DRAIN_TRIGGER), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, +@@ -27,7 +28,8 @@ static const struct snd_pcm_hardware snd + + static const struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | +- SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), ++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | ++ SNDRV_PCM_INFO_DRAIN_TRIGGER), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, +@@ -47,42 +49,34 @@ static void snd_bcm2835_playback_free(st + kfree(runtime->private_data); + } + +-void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream) ++void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream, ++ unsigned int bytes) + { +- unsigned int consumed = 0; +- int new_period = 0; ++ struct snd_pcm_substream *substream = alsa_stream->substream; ++ unsigned int pos; + +- audio_info("alsa_stream=%p substream=%p\n", alsa_stream, +- alsa_stream ? alsa_stream->substream : 0); ++ if (!alsa_stream->period_size) ++ return; + +- consumed = bcm2835_audio_retrieve_buffers(alsa_stream); +- +- /* We get called only if playback was triggered, So, the number of buffers we retrieve in +- * each iteration are the buffers that have been played out already +- */ +- +- if (alsa_stream->period_size) { +- if ((alsa_stream->pos / alsa_stream->period_size) != +- ((alsa_stream->pos + consumed) / alsa_stream->period_size)) +- new_period = 1; +- } +- audio_debug("updating pos cur: %d + %d max:%d period_bytes:%d, hw_ptr: %d new_period:%d\n", +- alsa_stream->pos, +- consumed, +- alsa_stream->buffer_size, +- (int) (alsa_stream->period_size * alsa_stream->substream->runtime->periods), +- frames_to_bytes(alsa_stream->substream->runtime, alsa_stream->substream->runtime->status->hw_ptr), +- new_period); +- if (alsa_stream->buffer_size) { +- alsa_stream->pos += consumed & ~(1 << 30); +- alsa_stream->pos %= alsa_stream->buffer_size; ++ if (bytes >= alsa_stream->buffer_size) { ++ snd_pcm_stream_lock(substream); ++ snd_pcm_stop(substream, ++ alsa_stream->draining ? ++ SNDRV_PCM_STATE_SETUP : ++ SNDRV_PCM_STATE_XRUN); ++ snd_pcm_stream_unlock(substream); ++ return; + } + +- if (alsa_stream->substream) { +- if (new_period) +- snd_pcm_period_elapsed(alsa_stream->substream); +- } else { +- audio_warning(" unexpected NULL substream\n"); ++ pos = atomic_read(&alsa_stream->pos); ++ pos += bytes; ++ pos %= alsa_stream->buffer_size; ++ atomic_set(&alsa_stream->pos, pos); ++ ++ alsa_stream->period_offset += bytes; ++ if (alsa_stream->period_offset >= alsa_stream->period_size) { ++ alsa_stream->period_offset %= alsa_stream->period_size; ++ snd_pcm_period_elapsed(substream); + } + } + +@@ -246,7 +240,8 @@ static int snd_bcm2835_pcm_prepare(struc + + alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); + alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); +- alsa_stream->pos = 0; ++ atomic_set(&alsa_stream->pos, 0); ++ alsa_stream->period_offset = 0; + alsa_stream->draining = false; + + return 0; +@@ -283,7 +278,7 @@ static int snd_bcm2835_pcm_trigger(struc + return bcm2835_audio_start(alsa_stream); + case SNDRV_PCM_TRIGGER_DRAIN: + alsa_stream->draining = true; +- return 0; ++ return bcm2835_audio_drain(alsa_stream); + case SNDRV_PCM_TRIGGER_STOP: + return bcm2835_audio_stop(alsa_stream); + default: +@@ -300,7 +295,7 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s + + return snd_pcm_indirect_playback_pointer(substream, + &alsa_stream->pcm_indirect, +- alsa_stream->pos); ++ atomic_read(&alsa_stream->pos)); + } + + /* operators */ +@@ -338,6 +333,7 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + if (err < 0) + return err; + pcm->private_data = chip; ++ pcm->nonatomic = true; + strcpy(pcm->name, "bcm2835 ALSA"); + chip->pcm = pcm; + chip->dest = AUDIO_DEST_AUTO; +@@ -367,6 +363,7 @@ int snd_bcm2835_new_spdif_pcm(struct bcm + return err; + + pcm->private_data = chip; ++ pcm->nonatomic = true; + strcpy(pcm->name, "bcm2835 IEC958/HDMI"); + chip->pcm_spdif = pcm; + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, +@@ -395,6 +392,7 @@ int snd_bcm2835_new_simple_pcm(struct bc + return err; + + pcm->private_data = chip; ++ pcm->nonatomic = true; + strcpy(pcm->name, name); + chip->pcm = pcm; + chip->dest = route; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -26,10 +26,6 @@ + + /* ---- Private Constants and Types ------------------------------------------ */ + +-#define BCM2835_AUDIO_STOP 0 +-#define BCM2835_AUDIO_START 1 +-#define BCM2835_AUDIO_WRITE 2 +- + /* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ + #ifdef AUDIO_DEBUG_ENABLE + #define LOG_ERR(fmt, arg...) pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) +@@ -55,17 +51,6 @@ struct bcm2835_audio_instance { + + static bool force_bulk; + +-/* ---- Private Variables ---------------------------------------------------- */ +- +-/* ---- Private Function Prototypes ------------------------------------------ */ +- +-/* ---- Private Functions ---------------------------------------------------- */ +- +-static int bcm2835_audio_stop_worker(struct bcm2835_alsa_stream *alsa_stream); +-static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream); +-static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, +- unsigned int count, void *src); +- + static void bcm2835_audio_lock(struct bcm2835_audio_instance *instance) + { + mutex_lock(&instance->vchi_mutex); +@@ -135,108 +120,6 @@ static const u32 BCM2835_AUDIO_WRITE_COO + static const u32 BCM2835_AUDIO_WRITE_COOKIE2 = ('D' << 24 | 'A' << 16 | + 'T' << 8 | 'A'); + +-struct bcm2835_audio_work { +- struct work_struct my_work; +- struct bcm2835_alsa_stream *alsa_stream; +- int cmd; +- void *src; +- unsigned int count; +-}; +- +-static void my_wq_function(struct work_struct *work) +-{ +- struct bcm2835_audio_work *w = +- container_of(work, struct bcm2835_audio_work, my_work); +- int ret = -9; +- +- switch (w->cmd) { +- case BCM2835_AUDIO_START: +- ret = bcm2835_audio_start_worker(w->alsa_stream); +- break; +- case BCM2835_AUDIO_STOP: +- ret = bcm2835_audio_stop_worker(w->alsa_stream); +- break; +- case BCM2835_AUDIO_WRITE: +- ret = bcm2835_audio_write_worker(w->alsa_stream, w->count, +- w->src); +- break; +- default: +- LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->cmd); +- break; +- } +- kfree((void *)work); +-} +- +-int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream) +-{ +- struct bcm2835_audio_work *work; +- +- work = kmalloc(sizeof(*work), GFP_ATOMIC); +- /*--- Queue some work (item 1) ---*/ +- if (!work) { +- LOG_ERR(" .. Error: NULL work kmalloc\n"); +- return -ENOMEM; +- } +- INIT_WORK(&work->my_work, my_wq_function); +- work->alsa_stream = alsa_stream; +- work->cmd = BCM2835_AUDIO_START; +- if (!queue_work(alsa_stream->my_wq, &work->my_work)) { +- kfree(work); +- return -EBUSY; +- } +- return 0; +-} +- +-int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream) +-{ +- struct bcm2835_audio_work *work; +- +- work = kmalloc(sizeof(*work), GFP_ATOMIC); +- /*--- Queue some work (item 1) ---*/ +- if (!work) { +- LOG_ERR(" .. Error: NULL work kmalloc\n"); +- return -ENOMEM; +- } +- INIT_WORK(&work->my_work, my_wq_function); +- work->alsa_stream = alsa_stream; +- work->cmd = BCM2835_AUDIO_STOP; +- if (!queue_work(alsa_stream->my_wq, &work->my_work)) { +- kfree(work); +- return -EBUSY; +- } +- return 0; +-} +- +-int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, +- unsigned int count, void *src) +-{ +- struct bcm2835_audio_work *work; +- +- work = kmalloc(sizeof(*work), GFP_ATOMIC); +- /*--- Queue some work (item 1) ---*/ +- if (!work) { +- LOG_ERR(" .. Error: NULL work kmalloc\n"); +- return -ENOMEM; +- } +- INIT_WORK(&work->my_work, my_wq_function); +- work->alsa_stream = alsa_stream; +- work->cmd = BCM2835_AUDIO_WRITE; +- work->src = src; +- work->count = count; +- if (!queue_work(alsa_stream->my_wq, &work->my_work)) { +- kfree(work); +- return -EBUSY; +- } +- return 0; +-} +- +-static void my_workqueue_quit(struct bcm2835_alsa_stream *alsa_stream) +-{ +- flush_workqueue(alsa_stream->my_wq); +- destroy_workqueue(alsa_stream->my_wq); +- alsa_stream->my_wq = NULL; +-} +- + static void audio_vchi_callback(void *param, + const VCHI_CALLBACK_REASON_T reason, + void *msg_handle) +@@ -249,47 +132,27 @@ static void audio_vchi_callback(void *pa + if (reason != VCHI_CALLBACK_MSG_AVAILABLE) + return; + +- if (!instance) { +- LOG_ERR(" .. instance is null\n"); +- BUG(); +- return; +- } +- if (!instance->vchi_handle) { +- LOG_ERR(" .. instance->vchi_handle is null\n"); +- BUG(); +- return; +- } + status = vchi_msg_dequeue(instance->vchi_handle, + &m, sizeof(m), &msg_len, VCHI_FLAGS_NONE); + if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { +- LOG_DBG(" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", +- instance, m.u.result.success); + instance->result = m.u.result.success; + complete(&instance->msg_avail_comp); + } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { +- struct bcm2835_alsa_stream *alsa_stream = instance->alsa_stream; +- +- LOG_DBG(" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_COMPLETE, complete=%d\n", +- instance, m.u.complete.count); + if (m.u.complete.cookie1 != BCM2835_AUDIO_WRITE_COOKIE1 || + m.u.complete.cookie2 != BCM2835_AUDIO_WRITE_COOKIE2) +- LOG_ERR(" .. response is corrupt\n"); +- else if (alsa_stream) { +- atomic_add(m.u.complete.count, +- &alsa_stream->retrieved); +- bcm2835_playback_fifo(alsa_stream); +- } else { +- LOG_ERR(" .. unexpected alsa_stream=%p\n", +- alsa_stream); +- } ++ LOG_ERR("invalid cookie\n"); ++ else ++ bcm2835_playback_fifo(instance->alsa_stream, ++ m.u.complete.count); + } else { +- LOG_ERR(" .. unexpected m.type=%d\n", m.type); ++ LOG_ERR("unexpected callback type=%d\n", m.type); + } + } + +-static struct bcm2835_audio_instance * ++static int + vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, +- VCHI_CONNECTION_T *vchi_connection) ++ VCHI_CONNECTION_T *vchi_connection, ++ struct bcm2835_audio_instance *instance) + { + SERVICE_CREATION_T params = { + .version = VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), +@@ -298,23 +161,14 @@ vc_vchi_audio_init(VCHI_INSTANCE_T vchi_ + .rx_fifo_size = 0, + .tx_fifo_size = 0, + .callback = audio_vchi_callback, ++ .callback_param = instance, + .want_unaligned_bulk_rx = 1, //TODO: remove VCOS_FALSE + .want_unaligned_bulk_tx = 1, //TODO: remove VCOS_FALSE + .want_crc = 0 + }; +- struct bcm2835_audio_instance *instance; + int status; + +- /* Allocate memory for this instance */ +- instance = kzalloc(sizeof(*instance), GFP_KERNEL); +- if (!instance) +- return ERR_PTR(-ENOMEM); +- +- /* Create a lock for exclusive, serialized VCHI connection access */ +- mutex_init(&instance->vchi_mutex); + /* Open the VCHI service connections */ +- params.callback_param = instance, +- + status = vchi_service_open(vchi_instance, ¶ms, + &instance->vchi_handle); + +@@ -322,16 +176,16 @@ vc_vchi_audio_init(VCHI_INSTANCE_T vchi_ + LOG_ERR("%s: failed to open VCHI service connection (status=%d)\n", + __func__, status); + kfree(instance); +- return ERR_PTR(-EPERM); ++ return -EPERM; + } + + /* Finished with the service for now */ + vchi_service_release(instance->vchi_handle); + +- return instance; ++ return 0; + } + +-static int vc_vchi_audio_deinit(struct bcm2835_audio_instance *instance) ++static void vc_vchi_audio_deinit(struct bcm2835_audio_instance *instance) + { + int status; + +@@ -346,10 +200,6 @@ static int vc_vchi_audio_deinit(struct b + } + + mutex_unlock(&instance->vchi_mutex); +- +- kfree(instance); +- +- return 0; + } + + int bcm2835_new_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx) +@@ -387,39 +237,25 @@ void bcm2835_free_vchi_ctx(struct bcm283 + vchi_ctx->vchi_instance = NULL; + } + +-static int bcm2835_audio_open_connection(struct bcm2835_alsa_stream *alsa_stream) +-{ +- struct bcm2835_audio_instance *instance = +- (struct bcm2835_audio_instance *)alsa_stream->instance; +- struct bcm2835_vchi_ctx *vhci_ctx = alsa_stream->chip->vchi_ctx; +- +- /* Initialize an instance of the audio service */ +- instance = vc_vchi_audio_init(vhci_ctx->vchi_instance, +- vhci_ctx->vchi_connection); +- +- if (IS_ERR(instance)) +- return PTR_ERR(instance); +- +- instance->alsa_stream = alsa_stream; +- alsa_stream->instance = instance; +- +- return 0; +-} +- + int bcm2835_audio_open(struct bcm2835_alsa_stream *alsa_stream) + { ++ struct bcm2835_vchi_ctx *vchi_ctx = alsa_stream->chip->vchi_ctx; + struct bcm2835_audio_instance *instance; + int err; + +- alsa_stream->my_wq = alloc_workqueue("my_queue", WQ_HIGHPRI, 1); +- if (!alsa_stream->my_wq) ++ /* Allocate memory for this instance */ ++ instance = kzalloc(sizeof(*instance), GFP_KERNEL); ++ if (!instance) + return -ENOMEM; ++ mutex_init(&instance->vchi_mutex); ++ instance->alsa_stream = alsa_stream; ++ alsa_stream->instance = instance; + +- err = bcm2835_audio_open_connection(alsa_stream); ++ err = vc_vchi_audio_init(vchi_ctx->vchi_instance, ++ vchi_ctx->vchi_connection, ++ instance); + if (err < 0) +- goto free_wq; +- +- instance = alsa_stream->instance; ++ goto free_instance; + + err = bcm2835_audio_send_simple(instance, VC_AUDIO_MSG_TYPE_OPEN, + false); +@@ -438,8 +274,9 @@ int bcm2835_audio_open(struct bcm2835_al + + deinit: + vc_vchi_audio_deinit(instance); +- free_wq: +- destroy_workqueue(alsa_stream->my_wq); ++ free_instance: ++ alsa_stream->instance = NULL; ++ kfree(instance); + return err; + } + +@@ -478,37 +315,46 @@ int bcm2835_audio_set_params(struct bcm2 + return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); + } + +-static int bcm2835_audio_start_worker(struct bcm2835_alsa_stream *alsa_stream) ++int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream) + { + return bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_START, false); + } + +-static int bcm2835_audio_stop_worker(struct bcm2835_alsa_stream *alsa_stream) ++int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream) + { + return bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_STOP, false); + } + ++int bcm2835_audio_drain(struct bcm2835_alsa_stream *alsa_stream) ++{ ++ struct vc_audio_msg m = { ++ .type = VC_AUDIO_MSG_TYPE_STOP, ++ .u.stop.draining = 1, ++ }; ++ ++ return bcm2835_audio_send_msg(alsa_stream->instance, &m, false); ++} ++ + int bcm2835_audio_close(struct bcm2835_alsa_stream *alsa_stream) + { + struct bcm2835_audio_instance *instance = alsa_stream->instance; + int err; + +- my_workqueue_quit(alsa_stream); +- + err = bcm2835_audio_send_simple(alsa_stream->instance, + VC_AUDIO_MSG_TYPE_CLOSE, true); + + /* Stop the audio service */ + vc_vchi_audio_deinit(instance); + alsa_stream->instance = NULL; ++ kfree(instance); + + return err; + } + +-static int bcm2835_audio_write_worker(struct bcm2835_alsa_stream *alsa_stream, +- unsigned int size, void *src) ++int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, ++ unsigned int size, void *src) + { + struct bcm2835_audio_instance *instance = alsa_stream->instance; + struct vc_audio_msg m = { +@@ -558,13 +404,5 @@ static int bcm2835_audio_write_worker(st + return err; + } + +-unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream) +-{ +- unsigned int count = atomic_read(&alsa_stream->retrieved); +- +- atomic_sub(count, &alsa_stream->retrieved); +- return count; +-} +- + module_param(force_bulk, bool, 0444); + MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -121,13 +121,12 @@ struct bcm2835_alsa_stream { + + int draining; + +- unsigned int pos; ++ atomic_t pos; ++ unsigned int period_offset; + unsigned int buffer_size; + unsigned int period_size; + +- atomic_t retrieved; + struct bcm2835_audio_instance *instance; +- struct workqueue_struct *my_wq; + int idx; + }; + +@@ -152,11 +151,13 @@ int bcm2835_audio_set_params(struct bcm2 + unsigned int bps); + int bcm2835_audio_start(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_stop(struct bcm2835_alsa_stream *alsa_stream); ++int bcm2835_audio_drain(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_set_ctls(struct bcm2835_alsa_stream *alsa_stream); + int bcm2835_audio_write(struct bcm2835_alsa_stream *alsa_stream, + unsigned int count, + void *src); +-void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream); ++void bcm2835_playback_fifo(struct bcm2835_alsa_stream *alsa_stream, ++ unsigned int size); + unsigned int bcm2835_audio_retrieve_buffers(struct bcm2835_alsa_stream *alsa_stream); + + #endif /* __SOUND_ARM_BCM2835_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0460-staging-bcm2835-audio-Use-card-private_data.patch b/target/linux/brcm2708/patches-4.19/950-0460-staging-bcm2835-audio-Use-card-private_data.patch new file mode 100644 index 000000000..f97f3124c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0460-staging-bcm2835-audio-Use-card-private_data.patch @@ -0,0 +1,138 @@ +From 18bd0bcc6b0455640038084fa6ab3b06462319c5 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:50 +0200 +Subject: [PATCH 460/703] staging: bcm2835-audio: Use card->private_data + +commit 898001a0c845cefe5d47d133485712412853f0a8 upstream. + +Instead of allocating a separate snd_device object, let snd_card_new() +allocate the private resource. This simplifies the code. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 91 +++---------------- + 1 file changed, 13 insertions(+), 78 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -86,9 +86,6 @@ static int bcm2835_devm_add_vchi_ctx(str + + static void snd_bcm2835_release(struct device *dev) + { +- struct bcm2835_chip *chip = dev_get_drvdata(dev); +- +- kfree(chip); + } + + static struct device * +@@ -117,69 +114,6 @@ snd_create_device(struct device *parent, + return device; + } + +-/* component-destructor +- * (see "Management of Cards and Components") +- */ +-static int snd_bcm2835_dev_free(struct snd_device *device) +-{ +- struct bcm2835_chip *chip = device->device_data; +- struct snd_card *card = chip->card; +- +- snd_device_free(card, chip); +- +- return 0; +-} +- +-/* chip-specific constructor +- * (see "Management of Cards and Components") +- */ +-static int snd_bcm2835_create(struct snd_card *card, +- struct bcm2835_chip **rchip) +-{ +- struct bcm2835_chip *chip; +- int err; +- static struct snd_device_ops ops = { +- .dev_free = snd_bcm2835_dev_free, +- }; +- +- *rchip = NULL; +- +- chip = kzalloc(sizeof(*chip), GFP_KERNEL); +- if (!chip) +- return -ENOMEM; +- +- chip->card = card; +- mutex_init(&chip->audio_mutex); +- +- chip->vchi_ctx = devres_find(card->dev->parent, +- bcm2835_devm_free_vchi_ctx, NULL, NULL); +- if (!chip->vchi_ctx) { +- kfree(chip); +- return -ENODEV; +- } +- +- err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); +- if (err) { +- kfree(chip); +- return err; +- } +- +- *rchip = chip; +- return 0; +-} +- +-static struct snd_card *snd_bcm2835_card_new(struct device *dev) +-{ +- struct snd_card *card; +- int ret; +- +- ret = snd_card_new(dev, -1, NULL, THIS_MODULE, 0, &card); +- if (ret) +- return ERR_PTR(ret); +- +- return card; +-} +- + typedef int (*bcm2835_audio_newpcm_func)(struct bcm2835_chip *chip, + const char *name, + enum snd_bcm2835_route route, +@@ -292,25 +226,26 @@ static int snd_add_child_device(struct d + return PTR_ERR(child); + } + +- card = snd_bcm2835_card_new(child); +- if (IS_ERR(card)) { ++ err = snd_card_new(child, -1, NULL, THIS_MODULE, sizeof(*chip), &card); ++ if (err < 0) { + dev_err(child, "Failed to create card"); +- return PTR_ERR(card); ++ return err; + } + +- snd_card_set_dev(card, child); ++ chip = card->private_data; ++ chip->card = card; ++ chip->dev = child; ++ mutex_init(&chip->audio_mutex); ++ ++ chip->vchi_ctx = devres_find(device, ++ bcm2835_devm_free_vchi_ctx, NULL, NULL); ++ if (!chip->vchi_ctx) ++ return -ENODEV; ++ + strcpy(card->driver, audio_driver->driver.name); + strcpy(card->shortname, audio_driver->shortname); + strcpy(card->longname, audio_driver->longname); + +- err = snd_bcm2835_create(card, &chip); +- if (err) { +- dev_err(child, "Failed to create chip, error %d\n", err); +- return err; +- } +- +- chip->dev = child; +- + err = audio_driver->newpcm(chip, audio_driver->shortname, + audio_driver->route, + numchans); diff --git a/target/linux/brcm2708/patches-4.19/950-0461-staging-bcm2835-audio-Use-standard-error-print-helpe.patch b/target/linux/brcm2708/patches-4.19/950-0461-staging-bcm2835-audio-Use-standard-error-print-helpe.patch new file mode 100644 index 000000000..762de4b21 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0461-staging-bcm2835-audio-Use-standard-error-print-helpe.patch @@ -0,0 +1,237 @@ +From 1dff63cdd20b6dfc763d01d35dff231b8abe8175 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:51 +0200 +Subject: [PATCH 461/703] staging: bcm2835-audio: Use standard error print + helpers + +commit b7584b64168208ebc14160770c0966b8b12fc16b upstream. + +For making the whole code more consistent, replace the home-made debug +print macros with the standard dev_err() & co. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 4 +- + .../bcm2835-audio/bcm2835-vchiq.c | 52 ++++++++----------- + .../vc04_services/bcm2835-audio/bcm2835.c | 2 +- + .../vc04_services/bcm2835-audio/bcm2835.h | 43 +-------------- + 4 files changed, 27 insertions(+), 74 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -101,8 +101,8 @@ static int snd_bcm2835_playback_open_gen + goto out; + } + if (idx >= MAX_SUBSTREAMS) { +- audio_error +- ("substream(%d) device doesn't exist max(%d) substreams allowed\n", ++ dev_err(chip->dev, ++ "substream(%d) device doesn't exist max(%d) substreams allowed\n", + idx, MAX_SUBSTREAMS); + err = -ENODEV; + goto out; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -26,20 +26,8 @@ + + /* ---- Private Constants and Types ------------------------------------------ */ + +-/* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ +-#ifdef AUDIO_DEBUG_ENABLE +-#define LOG_ERR(fmt, arg...) pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) +-#define LOG_WARN(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) +-#define LOG_INFO(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) +-#define LOG_DBG(fmt, arg...) pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) +-#else +-#define LOG_ERR(fmt, arg...) pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) +-#define LOG_WARN(fmt, arg...) no_printk(fmt, ##arg) +-#define LOG_INFO(fmt, arg...) no_printk(fmt, ##arg) +-#define LOG_DBG(fmt, arg...) no_printk(fmt, ##arg) +-#endif +- + struct bcm2835_audio_instance { ++ struct device *dev; + VCHI_SERVICE_HANDLE_T vchi_handle; + struct completion msg_avail_comp; + struct mutex vchi_mutex; +@@ -76,7 +64,8 @@ static int bcm2835_audio_send_msg_locked + status = vchi_queue_kernel_message(instance->vchi_handle, + m, sizeof(*m)); + if (status) { +- LOG_ERR("vchi message queue failed: %d, msg=%d\n", ++ dev_err(instance->dev, ++ "vchi message queue failed: %d, msg=%d\n", + status, m->type); + return -EIO; + } +@@ -84,10 +73,12 @@ static int bcm2835_audio_send_msg_locked + if (wait) { + if (!wait_for_completion_timeout(&instance->msg_avail_comp, + msecs_to_jiffies(10 * 1000))) { +- LOG_ERR("vchi message timeout, msg=%d\n", m->type); ++ dev_err(instance->dev, ++ "vchi message timeout, msg=%d\n", m->type); + return -ETIMEDOUT; + } else if (instance->result) { +- LOG_ERR("vchi message response error:%d, msg=%d\n", ++ dev_err(instance->dev, ++ "vchi message response error:%d, msg=%d\n", + instance->result, m->type); + return -EIO; + } +@@ -140,12 +131,12 @@ static void audio_vchi_callback(void *pa + } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { + if (m.u.complete.cookie1 != BCM2835_AUDIO_WRITE_COOKIE1 || + m.u.complete.cookie2 != BCM2835_AUDIO_WRITE_COOKIE2) +- LOG_ERR("invalid cookie\n"); ++ dev_err(instance->dev, "invalid cookie\n"); + else + bcm2835_playback_fifo(instance->alsa_stream, + m.u.complete.count); + } else { +- LOG_ERR("unexpected callback type=%d\n", m.type); ++ dev_err(instance->dev, "unexpected callback type=%d\n", m.type); + } + } + +@@ -173,8 +164,9 @@ vc_vchi_audio_init(VCHI_INSTANCE_T vchi_ + &instance->vchi_handle); + + if (status) { +- LOG_ERR("%s: failed to open VCHI service connection (status=%d)\n", +- __func__, status); ++ dev_err(instance->dev, ++ "failed to open VCHI service connection (status=%d)\n", ++ status); + kfree(instance); + return -EPERM; + } +@@ -195,30 +187,30 @@ static void vc_vchi_audio_deinit(struct + /* Close all VCHI service connections */ + status = vchi_service_close(instance->vchi_handle); + if (status) { +- LOG_DBG("%s: failed to close VCHI service connection (status=%d)\n", +- __func__, status); ++ dev_err(instance->dev, ++ "failed to close VCHI service connection (status=%d)\n", ++ status); + } + + mutex_unlock(&instance->vchi_mutex); + } + +-int bcm2835_new_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx) ++int bcm2835_new_vchi_ctx(struct device *dev, struct bcm2835_vchi_ctx *vchi_ctx) + { + int ret; + + /* Initialize and create a VCHI connection */ + ret = vchi_initialise(&vchi_ctx->vchi_instance); + if (ret) { +- LOG_ERR("%s: failed to initialise VCHI instance (ret=%d)\n", +- __func__, ret); +- ++ dev_err(dev, "failed to initialise VCHI instance (ret=%d)\n", ++ ret); + return -EIO; + } + + ret = vchi_connect(NULL, 0, vchi_ctx->vchi_instance); + if (ret) { +- LOG_ERR("%s: failed to connect VCHI instance (ret=%d)\n", +- __func__, ret); ++ dev_dbg(dev, "failed to connect VCHI instance (ret=%d)\n", ++ ret); + + kfree(vchi_ctx->vchi_instance); + vchi_ctx->vchi_instance = NULL; +@@ -248,6 +240,7 @@ int bcm2835_audio_open(struct bcm2835_al + if (!instance) + return -ENOMEM; + mutex_init(&instance->vchi_mutex); ++ instance->dev = alsa_stream->chip->dev; + instance->alsa_stream = alsa_stream; + alsa_stream->instance = instance; + +@@ -394,7 +387,8 @@ int bcm2835_audio_write(struct bcm2835_a + } + + if (status) { +- LOG_ERR("failed on %d bytes transfer (status=%d)\n", ++ dev_err(instance->dev, ++ "failed on %d bytes transfer (status=%d)\n", + size, status); + err = -EIO; + } +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -73,7 +73,7 @@ static int bcm2835_devm_add_vchi_ctx(str + + memset(vchi_ctx, 0, sizeof(*vchi_ctx)); + +- ret = bcm2835_new_vchi_ctx(vchi_ctx); ++ ret = bcm2835_new_vchi_ctx(dev, vchi_ctx); + if (ret) { + devres_free(vchi_ctx); + return ret; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -17,47 +17,6 @@ + + #include "interface/vchi/vchi.h" + +-/* +- * #define AUDIO_DEBUG_ENABLE +- * #define AUDIO_VERBOSE_DEBUG_ENABLE +- */ +- +-/* Debug macros */ +- +-#ifdef AUDIO_DEBUG_ENABLE +-#ifdef AUDIO_VERBOSE_DEBUG_ENABLE +- +-#define audio_debug(fmt, arg...) \ +- pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) +- +-#define audio_info(fmt, arg...) \ +- pr_info("%s:%d " fmt, __func__, __LINE__, ##arg) +- +-#else +- +-#define audio_debug(fmt, arg...) +- +-#define audio_info(fmt, arg...) +- +-#endif /* AUDIO_VERBOSE_DEBUG_ENABLE */ +- +-#else +- +-#define audio_debug(fmt, arg...) +- +-#define audio_info(fmt, arg...) +- +-#endif /* AUDIO_DEBUG_ENABLE */ +- +-#define audio_error(fmt, arg...) \ +- pr_err("%s:%d " fmt, __func__, __LINE__, ##arg) +- +-#define audio_warning(fmt, arg...) \ +- pr_warn("%s:%d " fmt, __func__, __LINE__, ##arg) +- +-#define audio_alert(fmt, arg...) \ +- pr_alert("%s:%d " fmt, __func__, __LINE__, ##arg) +- + #define MAX_SUBSTREAMS (8) + #define AVAIL_SUBSTREAMS_MASK (0xff) + +@@ -141,7 +100,7 @@ int snd_bcm2835_new_simple_pcm(struct bc + int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip); + int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip); + +-int bcm2835_new_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx); ++int bcm2835_new_vchi_ctx(struct device *dev, struct bcm2835_vchi_ctx *vchi_ctx); + void bcm2835_free_vchi_ctx(struct bcm2835_vchi_ctx *vchi_ctx); + + int bcm2835_audio_open(struct bcm2835_alsa_stream *alsa_stream); diff --git a/target/linux/brcm2708/patches-4.19/950-0462-staging-bcm2835-audio-Remove-unnecessary-header-file.patch b/target/linux/brcm2708/patches-4.19/950-0462-staging-bcm2835-audio-Remove-unnecessary-header-file.patch new file mode 100644 index 000000000..1f5073425 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0462-staging-bcm2835-audio-Remove-unnecessary-header-file.patch @@ -0,0 +1,73 @@ +From d202703ef99f5d370997c2372e8b0e0873834868 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:52 +0200 +Subject: [PATCH 462/703] staging: bcm2835-audio: Remove unnecessary header + file includes + +commit 7e46fff5f19ce2b8a9891e4c08631c64d06e9e17 upstream. + +Yet a few header files are included unnecessarily. Drop them. + +Also remove trivial comments. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../bcm2835-audio/bcm2835-vchiq.c | 19 ------------------- + .../vc04_services/bcm2835-audio/bcm2835.h | 6 ------ + 2 files changed, 25 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -1,31 +1,12 @@ + // SPDX-License-Identifier: GPL-2.0 + /* Copyright 2011 Broadcom Corporation. All rights reserved. */ + +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include + #include +-#include +-#include + #include + #include +- + #include "bcm2835.h" +- +-/* ---- Include Files -------------------------------------------------------- */ +- + #include "vc_vchi_audioserv_defs.h" + +-/* ---- Private Constants and Types ------------------------------------------ */ +- + struct bcm2835_audio_instance { + struct device *dev; + VCHI_SERVICE_HANDLE_T vchi_handle; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -5,16 +5,10 @@ + #define __SOUND_ARM_BCM2835_H + + #include +-#include +-#include + #include + #include +-#include + #include +-#include + #include +-#include +- + #include "interface/vchi/vchi.h" + + #define MAX_SUBSTREAMS (8) diff --git a/target/linux/brcm2708/patches-4.19/950-0463-staging-bcm2835-audio-Move-module-parameter-descript.patch b/target/linux/brcm2708/patches-4.19/950-0463-staging-bcm2835-audio-Move-module-parameter-descript.patch new file mode 100644 index 000000000..b50ba9876 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0463-staging-bcm2835-audio-Move-module-parameter-descript.patch @@ -0,0 +1,36 @@ +From 4337174647cfd9a5bde517543ec1093d43c81522 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:53 +0200 +Subject: [PATCH 463/703] staging: bcm2835-audio: Move module parameter + description + +commit b876f2075808e95e244053caa53fa7e86e929a99 upstream. + +For more consistency, move the module parameter description right +after its variable definition. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -19,6 +19,8 @@ struct bcm2835_audio_instance { + }; + + static bool force_bulk; ++module_param(force_bulk, bool, 0444); ++MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); + + static void bcm2835_audio_lock(struct bcm2835_audio_instance *instance) + { +@@ -378,6 +380,3 @@ int bcm2835_audio_write(struct bcm2835_a + bcm2835_audio_unlock(instance); + return err; + } +- +-module_param(force_bulk, bool, 0444); +-MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); diff --git a/target/linux/brcm2708/patches-4.19/950-0464-staging-bcm2835-audio-Use-coherent-device-buffers.patch b/target/linux/brcm2708/patches-4.19/950-0464-staging-bcm2835-audio-Use-coherent-device-buffers.patch new file mode 100644 index 000000000..384eb49d6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0464-staging-bcm2835-audio-Use-coherent-device-buffers.patch @@ -0,0 +1,61 @@ +From 4ff1a81a824daafb1c0fd56d299852ada0dd0b05 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:54 +0200 +Subject: [PATCH 464/703] staging: bcm2835-audio: Use coherent device buffers + +commit ad29c6e6cbf6f2af7362b043adad51a3be3d39c7 upstream. + +The memory access to the pages allocated with +SNDRV_DMA_TYPE_CONTINUOUS are basically non-coherent, and it becomes a +problem when a process accesses via mmap. + +For the more consistent access, use the device coherent memory, just +by replacing the call pattern in the allocator helpers. + +The only point we need to be careful for is the device object passed +there; since bcm2835-audio driver creates fake devices and each card +is created on top of that, we need to pass its parent device as the +real device object. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -345,8 +345,8 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + + /* pre-allocation of buffers */ + /* NOTE: this may fail */ +- snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, +- snd_dma_continuous_data(GFP_KERNEL), ++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, ++ chip->card->dev->parent, + snd_bcm2835_playback_hw.buffer_bytes_max, + snd_bcm2835_playback_hw.buffer_bytes_max); + +@@ -371,8 +371,8 @@ int snd_bcm2835_new_spdif_pcm(struct bcm + + /* pre-allocation of buffers */ + /* NOTE: this may fail */ +- snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, +- snd_dma_continuous_data(GFP_KERNEL), ++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, ++ chip->card->dev->parent, + snd_bcm2835_playback_spdif_hw.buffer_bytes_max, snd_bcm2835_playback_spdif_hw.buffer_bytes_max); + + return 0; +@@ -404,8 +404,8 @@ int snd_bcm2835_new_simple_pcm(struct bc + + snd_pcm_lib_preallocate_pages_for_all( + pcm, +- SNDRV_DMA_TYPE_CONTINUOUS, +- snd_dma_continuous_data(GFP_KERNEL), ++ SNDRV_DMA_TYPE_DEV, ++ chip->card->dev->parent, + snd_bcm2835_playback_hw.buffer_bytes_max, + snd_bcm2835_playback_hw.buffer_bytes_max); + diff --git a/target/linux/brcm2708/patches-4.19/950-0465-staging-bcm2835-audio-Set-SNDRV_PCM_INFO_SYNC_APPLPT.patch b/target/linux/brcm2708/patches-4.19/950-0465-staging-bcm2835-audio-Set-SNDRV_PCM_INFO_SYNC_APPLPT.patch new file mode 100644 index 000000000..2eda52040 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0465-staging-bcm2835-audio-Set-SNDRV_PCM_INFO_SYNC_APPLPT.patch @@ -0,0 +1,40 @@ +From b30057f82f95a75c641ff5ffe6bdb4d4507ecd8e Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:55 +0200 +Subject: [PATCH 465/703] staging: bcm2835-audio: Set + SNDRV_PCM_INFO_SYNC_APPLPTR + +commit b59d6a5f73501f74848d6700101e7736afe3d54a upstream. + +The recent ALSA PCM core supports the SNDRV_PCM_INFO_SYNC_APPLPTR flag +indicating that the driver needs the ack call at each appl_ptr +update. This is requirement for the indirect PCM implementations like +bcm2835-audio driver, too. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -12,7 +12,7 @@ + static const struct snd_pcm_hardware snd_bcm2835_playback_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | +- SNDRV_PCM_INFO_DRAIN_TRIGGER), ++ SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, +@@ -29,7 +29,7 @@ static const struct snd_pcm_hardware snd + static const struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { + .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | +- SNDRV_PCM_INFO_DRAIN_TRIGGER), ++ SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, diff --git a/target/linux/brcm2708/patches-4.19/950-0466-staging-bcm2835-audio-Simplify-PCM-creation-helpers.patch b/target/linux/brcm2708/patches-4.19/950-0466-staging-bcm2835-audio-Simplify-PCM-creation-helpers.patch new file mode 100644 index 000000000..5d2693539 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0466-staging-bcm2835-audio-Simplify-PCM-creation-helpers.patch @@ -0,0 +1,196 @@ +From 1d7ccadf57b043d8721a5110ac9203e9883fceb2 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:56 +0200 +Subject: [PATCH 466/703] staging: bcm2835-audio: Simplify PCM creation helpers + +commit 74470ffeb9aed5548654cfca881bf1d7469fe9c4 upstream. + +All three functions to create PCM objects are fairly resemble, and can +be unified to a single common helper. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 87 ++++--------------- + .../vc04_services/bcm2835-audio/bcm2835.c | 17 +++- + .../vc04_services/bcm2835-audio/bcm2835.h | 9 +- + 3 files changed, 32 insertions(+), 81 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -324,91 +324,36 @@ static const struct snd_pcm_ops snd_bcm2 + }; + + /* create a pcm device */ +-int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, u32 numchannels) ++int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, const char *name, ++ int idx, enum snd_bcm2835_route route, ++ u32 numchannels, bool spdif) + { + struct snd_pcm *pcm; + int err; + +- err = snd_pcm_new(chip->card, "bcm2835 ALSA", 0, numchannels, 0, &pcm); +- if (err < 0) +- return err; +- pcm->private_data = chip; +- pcm->nonatomic = true; +- strcpy(pcm->name, "bcm2835 ALSA"); +- chip->pcm = pcm; +- chip->dest = AUDIO_DEST_AUTO; +- chip->volume = 0; +- chip->mute = CTRL_VOL_UNMUTE; /*disable mute on startup */ +- /* set operators */ +- snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, +- &snd_bcm2835_playback_ops); +- +- /* pre-allocation of buffers */ +- /* NOTE: this may fail */ +- snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, +- chip->card->dev->parent, +- snd_bcm2835_playback_hw.buffer_bytes_max, +- snd_bcm2835_playback_hw.buffer_bytes_max); +- +- return 0; +-} +- +-int snd_bcm2835_new_spdif_pcm(struct bcm2835_chip *chip) +-{ +- struct snd_pcm *pcm; +- int err; +- +- err = snd_pcm_new(chip->card, "bcm2835 ALSA", 1, 1, 0, &pcm); +- if (err < 0) +- return err; +- +- pcm->private_data = chip; +- pcm->nonatomic = true; +- strcpy(pcm->name, "bcm2835 IEC958/HDMI"); +- chip->pcm_spdif = pcm; +- snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, +- &snd_bcm2835_playback_spdif_ops); +- +- /* pre-allocation of buffers */ +- /* NOTE: this may fail */ +- snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, +- chip->card->dev->parent, +- snd_bcm2835_playback_spdif_hw.buffer_bytes_max, snd_bcm2835_playback_spdif_hw.buffer_bytes_max); +- +- return 0; +-} +- +-int snd_bcm2835_new_simple_pcm(struct bcm2835_chip *chip, +- const char *name, +- enum snd_bcm2835_route route, +- u32 numchannels) +-{ +- struct snd_pcm *pcm; +- int err; +- +- err = snd_pcm_new(chip->card, name, 0, numchannels, +- 0, &pcm); ++ err = snd_pcm_new(chip->card, name, idx, numchannels, 0, &pcm); + if (err) + return err; + + pcm->private_data = chip; + pcm->nonatomic = true; + strcpy(pcm->name, name); +- chip->pcm = pcm; +- chip->dest = route; +- chip->volume = 0; +- chip->mute = CTRL_VOL_UNMUTE; ++ if (!spdif) { ++ chip->dest = route; ++ chip->volume = 0; ++ chip->mute = CTRL_VOL_UNMUTE; ++ } + + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, ++ spdif ? &snd_bcm2835_playback_spdif_ops : + &snd_bcm2835_playback_ops); + +- snd_pcm_lib_preallocate_pages_for_all( +- pcm, +- SNDRV_DMA_TYPE_DEV, +- chip->card->dev->parent, +- snd_bcm2835_playback_hw.buffer_bytes_max, +- snd_bcm2835_playback_hw.buffer_bytes_max); ++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, ++ chip->card->dev->parent, 128 * 1024, 128 * 1024); + ++ if (spdif) ++ chip->pcm_spdif = pcm; ++ else ++ chip->pcm = pcm; + return 0; + } +- +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -138,17 +138,26 @@ static int bcm2835_audio_alsa_newpcm(str + { + int err; + +- err = snd_bcm2835_new_pcm(chip, numchannels - 1); ++ err = snd_bcm2835_new_pcm(chip, "bcm2835 ALSA", 0, AUDIO_DEST_AUTO, ++ numchannels - 1, false); + if (err) + return err; + +- err = snd_bcm2835_new_spdif_pcm(chip); ++ err = snd_bcm2835_new_pcm(chip, "bcm2835 IEC958/HDMI", 1, 0, 1, true); + if (err) + return err; + + return 0; + } + ++static int bcm2835_audio_simple_newpcm(struct bcm2835_chip *chip, ++ const char *name, ++ enum snd_bcm2835_route route, ++ u32 numchannels) ++{ ++ return snd_bcm2835_new_pcm(chip, name, 0, route, numchannels, false); ++} ++ + static struct bcm2835_audio_driver bcm2835_audio_alsa = { + .driver = { + .name = "bcm2835_alsa", +@@ -169,7 +178,7 @@ static struct bcm2835_audio_driver bcm28 + .shortname = "bcm2835 HDMI", + .longname = "bcm2835 HDMI", + .minchannels = 1, +- .newpcm = snd_bcm2835_new_simple_pcm, ++ .newpcm = bcm2835_audio_simple_newpcm, + .newctl = snd_bcm2835_new_hdmi_ctl, + .route = AUDIO_DEST_HDMI + }; +@@ -182,7 +191,7 @@ static struct bcm2835_audio_driver bcm28 + .shortname = "bcm2835 Headphones", + .longname = "bcm2835 Headphones", + .minchannels = 1, +- .newpcm = snd_bcm2835_new_simple_pcm, ++ .newpcm = bcm2835_audio_simple_newpcm, + .newctl = snd_bcm2835_new_headphones_ctl, + .route = AUDIO_DEST_HEADPHONES + }; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -84,12 +84,9 @@ struct bcm2835_alsa_stream { + }; + + int snd_bcm2835_new_ctl(struct bcm2835_chip *chip); +-int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, u32 numchannels); +-int snd_bcm2835_new_spdif_pcm(struct bcm2835_chip *chip); +-int snd_bcm2835_new_simple_pcm(struct bcm2835_chip *chip, +- const char *name, +- enum snd_bcm2835_route route, +- u32 numchannels); ++int snd_bcm2835_new_pcm(struct bcm2835_chip *chip, const char *name, ++ int idx, enum snd_bcm2835_route route, ++ u32 numchannels, bool spdif); + + int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip); + int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip); diff --git a/target/linux/brcm2708/patches-4.19/950-0467-staging-bcm2835-audio-Simplify-kctl-creation-helpers.patch b/target/linux/brcm2708/patches-4.19/950-0467-staging-bcm2835-audio-Simplify-kctl-creation-helpers.patch new file mode 100644 index 000000000..8454f7c9c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0467-staging-bcm2835-audio-Simplify-kctl-creation-helpers.patch @@ -0,0 +1,161 @@ +From af83d44b51e549b26c1f0db6cfc3207cf9e44d50 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:57 +0200 +Subject: [PATCH 467/703] staging: bcm2835-audio: Simplify kctl creation + helpers + +commit dc5c0eb1e8601206dffbfc302cbd190f89dcd040 upstream. + +Just a minor code refactoring and adding some const prefix. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-ctl.c | 69 +++++++------------ + 1 file changed, 25 insertions(+), 44 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-ctl.c +@@ -97,40 +97,34 @@ static int snd_bcm2835_ctl_put(struct sn + + static DECLARE_TLV_DB_SCALE(snd_bcm2835_db_scale, CTRL_VOL_MIN, 1, 1); + +-static struct snd_kcontrol_new snd_bcm2835_ctl[] = { ++static const struct snd_kcontrol_new snd_bcm2835_ctl[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "PCM Playback Volume", +- .index = 0, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, + .private_value = PCM_PLAYBACK_VOLUME, + .info = snd_bcm2835_ctl_info, + .get = snd_bcm2835_ctl_get, + .put = snd_bcm2835_ctl_put, +- .count = 1, + .tlv = {.p = snd_bcm2835_db_scale} + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "PCM Playback Switch", +- .index = 0, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .private_value = PCM_PLAYBACK_MUTE, + .info = snd_bcm2835_ctl_info, + .get = snd_bcm2835_ctl_get, + .put = snd_bcm2835_ctl_put, +- .count = 1, + }, + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "PCM Playback Route", +- .index = 0, + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, + .private_value = PCM_PLAYBACK_DEVICE, + .info = snd_bcm2835_ctl_info, + .get = snd_bcm2835_ctl_get, + .put = snd_bcm2835_ctl_put, +- .count = 1, + }, + }; + +@@ -196,7 +190,7 @@ static int snd_bcm2835_spdif_mask_get(st + return 0; + } + +-static struct snd_kcontrol_new snd_bcm2835_spdif[] = { ++static const struct snd_kcontrol_new snd_bcm2835_spdif[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), +@@ -213,28 +207,32 @@ static struct snd_kcontrol_new snd_bcm28 + }, + }; + +-int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) ++static int create_ctls(struct bcm2835_chip *chip, size_t size, ++ const struct snd_kcontrol_new *kctls) + { +- int err; +- unsigned int idx; ++ int i, err; + +- strcpy(chip->card->mixername, "Broadcom Mixer"); +- for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_ctl); idx++) { +- err = snd_ctl_add(chip->card, +- snd_ctl_new1(&snd_bcm2835_ctl[idx], chip)); +- if (err < 0) +- return err; +- } +- for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_spdif); idx++) { +- err = snd_ctl_add(chip->card, +- snd_ctl_new1(&snd_bcm2835_spdif[idx], chip)); ++ for (i = 0; i < size; i++) { ++ err = snd_ctl_add(chip->card, snd_ctl_new1(&kctls[i], chip)); + if (err < 0) + return err; + } + return 0; + } + +-static struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { ++int snd_bcm2835_new_ctl(struct bcm2835_chip *chip) ++{ ++ int err; ++ ++ strcpy(chip->card->mixername, "Broadcom Mixer"); ++ err = create_ctls(chip, ARRAY_SIZE(snd_bcm2835_ctl), snd_bcm2835_ctl); ++ if (err < 0) ++ return err; ++ return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_spdif), ++ snd_bcm2835_spdif); ++} ++ ++static const struct snd_kcontrol_new snd_bcm2835_headphones_ctl[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Headphone Playback Volume", +@@ -263,21 +261,12 @@ static struct snd_kcontrol_new snd_bcm28 + + int snd_bcm2835_new_headphones_ctl(struct bcm2835_chip *chip) + { +- int err; +- unsigned int idx; +- + strcpy(chip->card->mixername, "Broadcom Mixer"); +- for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_headphones_ctl); idx++) { +- err = snd_ctl_add(chip->card, +- snd_ctl_new1(&snd_bcm2835_headphones_ctl[idx], +- chip)); +- if (err) +- return err; +- } +- return 0; ++ return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_headphones_ctl), ++ snd_bcm2835_headphones_ctl); + } + +-static struct snd_kcontrol_new snd_bcm2835_hdmi[] = { ++static const struct snd_kcontrol_new snd_bcm2835_hdmi[] = { + { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "HDMI Playback Volume", +@@ -306,16 +295,8 @@ static struct snd_kcontrol_new snd_bcm28 + + int snd_bcm2835_new_hdmi_ctl(struct bcm2835_chip *chip) + { +- int err; +- unsigned int idx; +- + strcpy(chip->card->mixername, "Broadcom Mixer"); +- for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_hdmi); idx++) { +- err = snd_ctl_add(chip->card, +- snd_ctl_new1(&snd_bcm2835_hdmi[idx], chip)); +- if (err) +- return err; +- } +- return 0; ++ return create_ctls(chip, ARRAY_SIZE(snd_bcm2835_hdmi), ++ snd_bcm2835_hdmi); + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0468-staging-bcm2835-audio-Simplify-card-object-managemen.patch b/target/linux/brcm2708/patches-4.19/950-0468-staging-bcm2835-audio-Simplify-card-object-managemen.patch new file mode 100644 index 000000000..9d2b10a7a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0468-staging-bcm2835-audio-Simplify-card-object-managemen.patch @@ -0,0 +1,212 @@ +From 18c2353cd57e25ececa0551b2ec22fd1f76f6484 Mon Sep 17 00:00:00 2001 +From: Takashi Iwai +Date: Tue, 4 Sep 2018 17:58:58 +0200 +Subject: [PATCH 468/703] staging: bcm2835-audio: Simplify card object + management + +commit 872ae2d63d516a2a3b9c833d8685afcfa7814542 upstream. + +Instead of creating a dummy child device to manage the card object, +just use devm stuff directly for releasing with snd_card_free(). +This results in a lot of code reduction. + +Since the dummy child devices are gone, the device object to be passed +to the memory allocator needs to be adjusted as well. + +Signed-off-by: Takashi Iwai +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 2 +- + .../vc04_services/bcm2835-audio/bcm2835.c | 120 +++++------------- + 2 files changed, 33 insertions(+), 89 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -349,7 +349,7 @@ int snd_bcm2835_new_pcm(struct bcm2835_c + &snd_bcm2835_playback_ops); + + snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, +- chip->card->dev->parent, 128 * 1024, 128 * 1024); ++ chip->card->dev, 128 * 1024, 128 * 1024); + + if (spdif) + chip->pcm_spdif = pcm; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -22,38 +22,6 @@ module_param(enable_compat_alsa, bool, 0 + MODULE_PARM_DESC(enable_compat_alsa, + "Enables ALSA compatibility virtual audio device"); + +-static void snd_devm_unregister_child(struct device *dev, void *res) +-{ +- struct device *childdev = *(struct device **)res; +- struct bcm2835_chip *chip = dev_get_drvdata(childdev); +- struct snd_card *card = chip->card; +- +- snd_card_free(card); +- +- device_unregister(childdev); +-} +- +-static int snd_devm_add_child(struct device *dev, struct device *child) +-{ +- struct device **dr; +- int ret; +- +- dr = devres_alloc(snd_devm_unregister_child, sizeof(*dr), GFP_KERNEL); +- if (!dr) +- return -ENOMEM; +- +- ret = device_add(child); +- if (ret) { +- devres_free(dr); +- return ret; +- } +- +- *dr = child; +- devres_add(dev, dr); +- +- return 0; +-} +- + static void bcm2835_devm_free_vchi_ctx(struct device *dev, void *res) + { + struct bcm2835_vchi_ctx *vchi_ctx = res; +@@ -84,36 +52,6 @@ static int bcm2835_devm_add_vchi_ctx(str + return 0; + } + +-static void snd_bcm2835_release(struct device *dev) +-{ +-} +- +-static struct device * +-snd_create_device(struct device *parent, +- struct device_driver *driver, +- const char *name) +-{ +- struct device *device; +- int ret; +- +- device = devm_kzalloc(parent, sizeof(*device), GFP_KERNEL); +- if (!device) +- return ERR_PTR(-ENOMEM); +- +- device_initialize(device); +- device->parent = parent; +- device->driver = driver; +- device->release = snd_bcm2835_release; +- +- dev_set_name(device, "%s", name); +- +- ret = snd_devm_add_child(parent, device); +- if (ret) +- return ERR_PTR(ret); +- +- return device; +-} +- + typedef int (*bcm2835_audio_newpcm_func)(struct bcm2835_chip *chip, + const char *name, + enum snd_bcm2835_route route, +@@ -216,40 +154,36 @@ static struct bcm2835_audio_drivers chil + }, + }; + +-static int snd_add_child_device(struct device *device, ++static void bcm2835_card_free(void *data) ++{ ++ snd_card_free(data); ++} ++ ++static int snd_add_child_device(struct device *dev, + struct bcm2835_audio_driver *audio_driver, + u32 numchans) + { + struct snd_card *card; +- struct device *child; + struct bcm2835_chip *chip; + int err; + +- child = snd_create_device(device, &audio_driver->driver, +- audio_driver->driver.name); +- if (IS_ERR(child)) { +- dev_err(device, +- "Unable to create child device %p, error %ld", +- audio_driver->driver.name, +- PTR_ERR(child)); +- return PTR_ERR(child); +- } +- +- err = snd_card_new(child, -1, NULL, THIS_MODULE, sizeof(*chip), &card); ++ err = snd_card_new(dev, -1, NULL, THIS_MODULE, sizeof(*chip), &card); + if (err < 0) { +- dev_err(child, "Failed to create card"); ++ dev_err(dev, "Failed to create card"); + return err; + } + + chip = card->private_data; + chip->card = card; +- chip->dev = child; ++ chip->dev = dev; + mutex_init(&chip->audio_mutex); + +- chip->vchi_ctx = devres_find(device, ++ chip->vchi_ctx = devres_find(dev, + bcm2835_devm_free_vchi_ctx, NULL, NULL); +- if (!chip->vchi_ctx) +- return -ENODEV; ++ if (!chip->vchi_ctx) { ++ err = -ENODEV; ++ goto error; ++ } + + strcpy(card->driver, audio_driver->driver.name); + strcpy(card->shortname, audio_driver->shortname); +@@ -259,26 +193,36 @@ static int snd_add_child_device(struct d + audio_driver->route, + numchans); + if (err) { +- dev_err(child, "Failed to create pcm, error %d\n", err); +- return err; ++ dev_err(dev, "Failed to create pcm, error %d\n", err); ++ goto error; + } + + err = audio_driver->newctl(chip); + if (err) { +- dev_err(child, "Failed to create controls, error %d\n", err); +- return err; ++ dev_err(dev, "Failed to create controls, error %d\n", err); ++ goto error; + } + + err = snd_card_register(card); + if (err) { +- dev_err(child, "Failed to register card, error %d\n", err); +- return err; ++ dev_err(dev, "Failed to register card, error %d\n", err); ++ goto error; + } + +- dev_set_drvdata(child, chip); +- dev_info(child, "card created with %d channels\n", numchans); ++ dev_set_drvdata(dev, chip); + ++ err = devm_add_action(dev, bcm2835_card_free, card); ++ if (err < 0) { ++ dev_err(dev, "Failed to add devm action, err %d\n", err); ++ goto error; ++ } ++ ++ dev_info(dev, "card created with %d channels\n", numchans); + return 0; ++ ++ error: ++ snd_card_free(card); ++ return err; + } + + static int snd_add_child_devices(struct device *device, u32 numchans) diff --git a/target/linux/brcm2708/patches-4.19/950-0469-staging-bcm2835-audio-unify-FOURCC-command-definitio.patch b/target/linux/brcm2708/patches-4.19/950-0469-staging-bcm2835-audio-unify-FOURCC-command-definitio.patch new file mode 100644 index 000000000..04e2dfbcb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0469-staging-bcm2835-audio-unify-FOURCC-command-definitio.patch @@ -0,0 +1,71 @@ +From 6bfd152edc4d9a19836dc2a12c9545a5ccc1a87f Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:50 +0200 +Subject: [PATCH 469/703] staging: bcm2835-audio: unify FOURCC command + definitions + +commit a90d8f49cc7fd7220aa24b85fc74ef3cfd62b96f upstream. + +The device communicates with the audio core using FOURCC codes. The +driver was generating them using different macros/expressions. We now +use the same macro to create them and centralize all the definitions. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Takashi Iwai +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-vchiq.c | 13 ++++--------- + .../bcm2835-audio/vc_vchi_audioserv_defs.h | 4 +++- + 2 files changed, 7 insertions(+), 10 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -89,11 +89,6 @@ static int bcm2835_audio_send_simple(str + return bcm2835_audio_send_msg(instance, &m, wait); + } + +-static const u32 BCM2835_AUDIO_WRITE_COOKIE1 = ('B' << 24 | 'C' << 16 | +- 'M' << 8 | 'A'); +-static const u32 BCM2835_AUDIO_WRITE_COOKIE2 = ('D' << 24 | 'A' << 16 | +- 'T' << 8 | 'A'); +- + static void audio_vchi_callback(void *param, + const VCHI_CALLBACK_REASON_T reason, + void *msg_handle) +@@ -112,8 +107,8 @@ static void audio_vchi_callback(void *pa + instance->result = m.u.result.success; + complete(&instance->msg_avail_comp); + } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { +- if (m.u.complete.cookie1 != BCM2835_AUDIO_WRITE_COOKIE1 || +- m.u.complete.cookie2 != BCM2835_AUDIO_WRITE_COOKIE2) ++ if (m.u.complete.cookie1 != VC_AUDIO_WRITE_COOKIE1 || ++ m.u.complete.cookie2 != VC_AUDIO_WRITE_COOKIE2) + dev_err(instance->dev, "invalid cookie\n"); + else + bcm2835_playback_fifo(instance->alsa_stream, +@@ -337,8 +332,8 @@ int bcm2835_audio_write(struct bcm2835_a + .type = VC_AUDIO_MSG_TYPE_WRITE, + .u.write.count = size, + .u.write.max_packet = instance->max_packet, +- .u.write.cookie1 = BCM2835_AUDIO_WRITE_COOKIE1, +- .u.write.cookie2 = BCM2835_AUDIO_WRITE_COOKIE2, ++ .u.write.cookie1 = VC_AUDIO_WRITE_COOKIE1, ++ .u.write.cookie2 = VC_AUDIO_WRITE_COOKIE2, + }; + unsigned int count; + int err, status; +--- a/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h +@@ -7,8 +7,10 @@ + #define VC_AUDIOSERV_MIN_VER 1 + #define VC_AUDIOSERV_VER 2 + +-/* FourCC code used for VCHI connection */ ++/* FourCC codes used for VCHI communication */ + #define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS") ++#define VC_AUDIO_WRITE_COOKIE1 MAKE_FOURCC("BCMA") ++#define VC_AUDIO_WRITE_COOKIE2 MAKE_FOURCC("DATA") + + /* + * List of screens that are currently supported diff --git a/target/linux/brcm2708/patches-4.19/950-0470-staging-bcm2835-audio-don-t-initialize-memory-twice.patch b/target/linux/brcm2708/patches-4.19/950-0470-staging-bcm2835-audio-don-t-initialize-memory-twice.patch new file mode 100644 index 000000000..9845a03f0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0470-staging-bcm2835-audio-don-t-initialize-memory-twice.patch @@ -0,0 +1,30 @@ +From 2477bc42397c7be4c74429b6fb8c1325765b9a46 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:51 +0200 +Subject: [PATCH 470/703] staging: bcm2835-audio: don't initialize memory twice + +commit 2e5f59fb77397cab3bc3d156e8be4164a67d32ef upstream. + +The memory is being allocated with devres_alloc(), wich ultimately uses +__GFP_ZERO to call kmalloc. We don't need to zero the memory area again +in bcm2835-audio. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Takashi Iwai +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -39,8 +39,6 @@ static int bcm2835_devm_add_vchi_ctx(str + if (!vchi_ctx) + return -ENOMEM; + +- memset(vchi_ctx, 0, sizeof(*vchi_ctx)); +- + ret = bcm2835_new_vchi_ctx(dev, vchi_ctx); + if (ret) { + devres_free(vchi_ctx); diff --git a/target/linux/brcm2708/patches-4.19/950-0471-staging-bcm2835-audio-reorder-variable-declarations-.patch b/target/linux/brcm2708/patches-4.19/950-0471-staging-bcm2835-audio-reorder-variable-declarations-.patch new file mode 100644 index 000000000..d43c1675a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0471-staging-bcm2835-audio-reorder-variable-declarations-.patch @@ -0,0 +1,118 @@ +From 42b0651189ceea6c9684931d68566091a37914a3 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:52 +0200 +Subject: [PATCH 471/703] staging: bcm2835-audio: reorder variable declarations + & remove trivial comments + +commit d048385a070552ae819f99f05bd03ec41072783d upstream. + +When it comes to declaring variables it's preferred, when possible, to +use an inverted tree organization scheme. + +Also, removes some comments that were useless. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Takashi Iwai +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 10 ++-------- + .../vc04_services/bcm2835-audio/bcm2835-vchiq.c | 4 ++-- + .../staging/vc04_services/bcm2835-audio/bcm2835.c | 14 +++++++------- + 3 files changed, 11 insertions(+), 17 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -164,14 +164,11 @@ static int snd_bcm2835_playback_spdif_op + return snd_bcm2835_playback_open_generic(substream, 1); + } + +-/* close callback */ + static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) + { +- /* the hardware-specific codes will be here */ +- +- struct bcm2835_chip *chip; +- struct snd_pcm_runtime *runtime; + struct bcm2835_alsa_stream *alsa_stream; ++ struct snd_pcm_runtime *runtime; ++ struct bcm2835_chip *chip; + + chip = snd_pcm_substream_chip(substream); + mutex_lock(&chip->audio_mutex); +@@ -195,20 +192,17 @@ static int snd_bcm2835_playback_close(st + return 0; + } + +-/* hw_params callback */ + static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) + { + return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); + } + +-/* hw_free callback */ + static int snd_bcm2835_pcm_hw_free(struct snd_pcm_substream *substream) + { + return snd_pcm_lib_free_pages(substream); + } + +-/* prepare callback */ + static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) + { + struct bcm2835_chip *chip = snd_pcm_substream_chip(substream); +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -94,9 +94,9 @@ static void audio_vchi_callback(void *pa + void *msg_handle) + { + struct bcm2835_audio_instance *instance = param; +- int status; +- int msg_len; + struct vc_audio_msg m; ++ int msg_len; ++ int status; + + if (reason != VCHI_CALLBACK_MSG_AVAILABLE) + return; +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -161,8 +161,8 @@ static int snd_add_child_device(struct d + struct bcm2835_audio_driver *audio_driver, + u32 numchans) + { +- struct snd_card *card; + struct bcm2835_chip *chip; ++ struct snd_card *card; + int err; + + err = snd_card_new(dev, -1, NULL, THIS_MODULE, sizeof(*chip), &card); +@@ -225,12 +225,12 @@ static int snd_add_child_device(struct d + + static int snd_add_child_devices(struct device *device, u32 numchans) + { +- int i; +- int count_devices = 0; +- int minchannels = 0; +- int extrachannels = 0; + int extrachannels_per_driver = 0; + int extrachannels_remainder = 0; ++ int count_devices = 0; ++ int extrachannels = 0; ++ int minchannels = 0; ++ int i; + + for (i = 0; i < ARRAY_SIZE(children_devices); i++) + if (*children_devices[i].is_enabled) +@@ -258,9 +258,9 @@ static int snd_add_child_devices(struct + extrachannels_remainder); + + for (i = 0; i < ARRAY_SIZE(children_devices); i++) { +- int err; +- int numchannels_this_device; + struct bcm2835_audio_driver *audio_driver; ++ int numchannels_this_device; ++ int err; + + if (!*children_devices[i].is_enabled) + continue; diff --git a/target/linux/brcm2708/patches-4.19/950-0472-staging-bcm2835-audio-use-anonymous-union-in-struct-.patch b/target/linux/brcm2708/patches-4.19/950-0472-staging-bcm2835-audio-use-anonymous-union-in-struct-.patch new file mode 100644 index 000000000..5e5fdceab --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0472-staging-bcm2835-audio-use-anonymous-union-in-struct-.patch @@ -0,0 +1,105 @@ +From ba6476674aaab4ed91db3792eb860c65ff6c588f Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:53 +0200 +Subject: [PATCH 472/703] staging: bcm2835-audio: use anonymous union in struct + vc_audio_msg + +commit 9c2eaf7da855d314a369d48b9cbf8ac80717a1d0 upstream. + +In this case explicitly naming the union doesn't help overall code +comprehension and clutters it. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Takashi Iwai +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../bcm2835-audio/bcm2835-vchiq.c | 30 +++++++++---------- + .../bcm2835-audio/vc_vchi_audioserv_defs.h | 2 +- + 2 files changed, 16 insertions(+), 16 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -104,15 +104,15 @@ static void audio_vchi_callback(void *pa + status = vchi_msg_dequeue(instance->vchi_handle, + &m, sizeof(m), &msg_len, VCHI_FLAGS_NONE); + if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { +- instance->result = m.u.result.success; ++ instance->result = m.result.success; + complete(&instance->msg_avail_comp); + } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { +- if (m.u.complete.cookie1 != VC_AUDIO_WRITE_COOKIE1 || +- m.u.complete.cookie2 != VC_AUDIO_WRITE_COOKIE2) ++ if (m.complete.cookie1 != VC_AUDIO_WRITE_COOKIE1 || ++ m.complete.cookie2 != VC_AUDIO_WRITE_COOKIE2) + dev_err(instance->dev, "invalid cookie\n"); + else + bcm2835_playback_fifo(instance->alsa_stream, +- m.u.complete.count); ++ m.complete.count); + } else { + dev_err(instance->dev, "unexpected callback type=%d\n", m.type); + } +@@ -257,11 +257,11 @@ int bcm2835_audio_set_ctls(struct bcm283 + struct vc_audio_msg m = {}; + + m.type = VC_AUDIO_MSG_TYPE_CONTROL; +- m.u.control.dest = chip->dest; ++ m.control.dest = chip->dest; + if (!chip->mute) +- m.u.control.volume = CHIP_MIN_VOLUME; ++ m.control.volume = CHIP_MIN_VOLUME; + else +- m.u.control.volume = alsa2chip(chip->volume); ++ m.control.volume = alsa2chip(chip->volume); + + return bcm2835_audio_send_msg(alsa_stream->instance, &m, true); + } +@@ -272,9 +272,9 @@ int bcm2835_audio_set_params(struct bcm2 + { + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_CONFIG, +- .u.config.channels = channels, +- .u.config.samplerate = samplerate, +- .u.config.bps = bps, ++ .config.channels = channels, ++ .config.samplerate = samplerate, ++ .config.bps = bps, + }; + int err; + +@@ -302,7 +302,7 @@ int bcm2835_audio_drain(struct bcm2835_a + { + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_STOP, +- .u.stop.draining = 1, ++ .stop.draining = 1, + }; + + return bcm2835_audio_send_msg(alsa_stream->instance, &m, false); +@@ -330,10 +330,10 @@ int bcm2835_audio_write(struct bcm2835_a + struct bcm2835_audio_instance *instance = alsa_stream->instance; + struct vc_audio_msg m = { + .type = VC_AUDIO_MSG_TYPE_WRITE, +- .u.write.count = size, +- .u.write.max_packet = instance->max_packet, +- .u.write.cookie1 = VC_AUDIO_WRITE_COOKIE1, +- .u.write.cookie2 = VC_AUDIO_WRITE_COOKIE2, ++ .write.count = size, ++ .write.max_packet = instance->max_packet, ++ .write.cookie1 = VC_AUDIO_WRITE_COOKIE1, ++ .write.cookie2 = VC_AUDIO_WRITE_COOKIE2, + }; + unsigned int count; + int err, status; +--- a/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/vc_vchi_audioserv_defs.h +@@ -93,7 +93,7 @@ struct vc_audio_msg { + struct vc_audio_write write; + struct vc_audio_result result; + struct vc_audio_complete complete; +- } u; ++ }; + }; + + #endif /* _VC_AUDIO_DEFS_H_ */ diff --git a/target/linux/brcm2708/patches-4.19/950-0473-staging-bcm2835-audio-more-generic-probe-function-na.patch b/target/linux/brcm2708/patches-4.19/950-0473-staging-bcm2835-audio-more-generic-probe-function-na.patch new file mode 100644 index 000000000..df728d56e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0473-staging-bcm2835-audio-more-generic-probe-function-na.patch @@ -0,0 +1,39 @@ +From 7c0e6cbc1257861e011256fd78a713b8d308541d Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:54 +0200 +Subject: [PATCH 473/703] staging: bcm2835-audio: more generic probe function + name + +commit 96f3bd8ae6516898c7b411ecb87064bb0dd25415 upstream. + +There will only be one probe function, there is no use for appendig +"_dt" the end of the name. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Takashi Iwai +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -291,7 +291,7 @@ static int snd_add_child_devices(struct + return 0; + } + +-static int snd_bcm2835_alsa_probe_dt(struct platform_device *pdev) ++static int snd_bcm2835_alsa_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; + u32 numchans; +@@ -344,7 +344,7 @@ static const struct of_device_id snd_bcm + MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); + + static struct platform_driver bcm2835_alsa0_driver = { +- .probe = snd_bcm2835_alsa_probe_dt, ++ .probe = snd_bcm2835_alsa_probe, + #ifdef CONFIG_PM + .suspend = snd_bcm2835_alsa_suspend, + .resume = snd_bcm2835_alsa_resume, diff --git a/target/linux/brcm2708/patches-4.19/950-0474-staging-bcm2835-audio-rename-platform_driver-structu.patch b/target/linux/brcm2708/patches-4.19/950-0474-staging-bcm2835-audio-rename-platform_driver-structu.patch new file mode 100644 index 000000000..e324013c3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0474-staging-bcm2835-audio-rename-platform_driver-structu.patch @@ -0,0 +1,47 @@ +From 8766790884bfc46d8036a9da0dcf8d0cf291e42b Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:55 +0200 +Subject: [PATCH 474/703] staging: bcm2835-audio: rename platform_driver + structure + +commit 82cdc0c6b6faf877e2aecb957cffa9cb578cc572 upstream. + +It was called bcm2835_alsa0_driver, that "0" didn't mean much. + +Suggested-by: Takashi Iwai +Signed-off-by: Nicolas Saenz Julienne +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -343,7 +343,7 @@ static const struct of_device_id snd_bcm + }; + MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); + +-static struct platform_driver bcm2835_alsa0_driver = { ++static struct platform_driver bcm2835_alsa_driver = { + .probe = snd_bcm2835_alsa_probe, + #ifdef CONFIG_PM + .suspend = snd_bcm2835_alsa_suspend, +@@ -359,7 +359,7 @@ static int bcm2835_alsa_device_init(void + { + int retval; + +- retval = platform_driver_register(&bcm2835_alsa0_driver); ++ retval = platform_driver_register(&bcm2835_alsa_driver); + if (retval) + pr_err("Error registering bcm2835_audio driver %d .\n", retval); + +@@ -368,7 +368,7 @@ static int bcm2835_alsa_device_init(void + + static void bcm2835_alsa_device_exit(void) + { +- platform_driver_unregister(&bcm2835_alsa0_driver); ++ platform_driver_unregister(&bcm2835_alsa_driver); + } + + late_initcall(bcm2835_alsa_device_init); diff --git a/target/linux/brcm2708/patches-4.19/950-0475-staging-bcm2835-audio-update-TODO.patch b/target/linux/brcm2708/patches-4.19/950-0475-staging-bcm2835-audio-update-TODO.patch new file mode 100644 index 000000000..a9f6279f8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0475-staging-bcm2835-audio-update-TODO.patch @@ -0,0 +1,56 @@ +From ab9ae6bfcca7033f0d6767e21076d82f4554ba99 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 17 Oct 2018 21:01:56 +0200 +Subject: [PATCH 475/703] staging: bcm2835-audio: update TODO + +commit 01ec7398c56e8f1b903ecb3c5c75400e263eef43 upstream. + +The following tasks were completed or not the right solution: + +1/2- Not the proper solution, we should register a platform device in +vchiq the same way it's done with bcm2835-camera as commented here: +https://lkml.org/lkml/2018/10/16/1131 + +2/3- Fixed by Takashi Iwai here: https://lkml.org/lkml/2018/9/4/587 + +Also, adds a new task as per mailing list conversation. + +Signed-off-by: Nicolas Saenz Julienne +Acked-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../staging/vc04_services/bcm2835-audio/TODO | 25 +++---------------- + 1 file changed, 3 insertions(+), 22 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/TODO ++++ b/drivers/staging/vc04_services/bcm2835-audio/TODO +@@ -4,26 +4,7 @@ + * * + ***************************************************************************** + ++1) Revisit multi-cards options and PCM route mixer control (as per comment ++https://lkml.org/lkml/2018/9/8/200) + +-1) Document the device tree node +- +-The downstream tree(the tree that the driver was imported from) at +-http://www.github.com/raspberrypi/linux uses this node: +- +-audio: audio { +- compatible = "brcm,bcm2835-audio"; +- brcm,pwm-channels = <8>; +-}; +- +-Since the driver requires the use of VCHIQ, it may be useful to have a link +-in the device tree to the VCHIQ driver. +- +-2) Gracefully handle the case where VCHIQ is missing from the device tree or +-it has not been initialized yet. +- +-3) Review error handling and remove duplicate code. +- +-4) Cleanup the logging mechanism. The driver should probably be using the +-standard kernel logging mechanisms such as dev_info, dev_dbg, and friends. +- +-5) Fix the remaining checkpatch.pl errors and warnings. ++2) Fix the remaining checkpatch.pl errors and warnings. diff --git a/target/linux/brcm2708/patches-4.19/950-0476-staging-bcm2835-audio-interpolate-audio-delay.patch b/target/linux/brcm2708/patches-4.19/950-0476-staging-bcm2835-audio-interpolate-audio-delay.patch new file mode 100644 index 000000000..7f1e32656 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0476-staging-bcm2835-audio-interpolate-audio-delay.patch @@ -0,0 +1,82 @@ +From 798edea528f75fd95c0edc6967efce509969e8e9 Mon Sep 17 00:00:00 2001 +From: Mike Brady +Date: Mon, 22 Oct 2018 20:17:08 +0100 +Subject: [PATCH 476/703] staging: bcm2835-audio: interpolate audio delay + +commit a105a3a72824e0ac685a0711a67e4dbe29de62d0 upstream. + +When the BCM2835 audio output is used, userspace sees a jitter up to 10ms +in the audio position, aka "delay" -- the number of frames that must +be output before a new frame would be played. +Make this a bit nicer for userspace by interpolating the position +using the CPU clock. +The overhead is small -- an extra ktime_get() every time a GPU message +is sent -- and another call and a few calculations whenever the delay +is sought from userland. +At 48,000 frames per second, i.e. approximately 20 microseconds per +frame, it would take a clock inaccuracy of +20 microseconds in 10 milliseconds -- 2,000 parts per million -- +to result in an inaccurate estimate, whereas +crystal- or resonator-based clocks typically have an +inaccuracy of 10s to 100s of parts per million. + +Signed-off-by: Mike Brady +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 20 +++++++++++++++++++ + .../vc04_services/bcm2835-audio/bcm2835.h | 1 + + 2 files changed, 21 insertions(+) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -74,6 +74,7 @@ void bcm2835_playback_fifo(struct bcm283 + atomic_set(&alsa_stream->pos, pos); + + alsa_stream->period_offset += bytes; ++ alsa_stream->interpolate_start = ktime_get(); + if (alsa_stream->period_offset >= alsa_stream->period_size) { + alsa_stream->period_offset %= alsa_stream->period_size; + snd_pcm_period_elapsed(substream); +@@ -237,6 +238,7 @@ static int snd_bcm2835_pcm_prepare(struc + atomic_set(&alsa_stream->pos, 0); + alsa_stream->period_offset = 0; + alsa_stream->draining = false; ++ alsa_stream->interpolate_start = ktime_get(); + + return 0; + } +@@ -286,6 +288,24 @@ snd_bcm2835_pcm_pointer(struct snd_pcm_s + { + struct snd_pcm_runtime *runtime = substream->runtime; + struct bcm2835_alsa_stream *alsa_stream = runtime->private_data; ++ ktime_t now = ktime_get(); ++ ++ /* Give userspace better delay reporting by interpolating between GPU ++ * notifications, assuming audio speed is close enough to the clock ++ * used for ktime ++ */ ++ ++ if ((ktime_to_ns(alsa_stream->interpolate_start)) && ++ (ktime_compare(alsa_stream->interpolate_start, now) < 0)) { ++ u64 interval = ++ (ktime_to_ns(ktime_sub(now, ++ alsa_stream->interpolate_start))); ++ u64 frames_output_in_interval = ++ div_u64((interval * runtime->rate), 1000000000); ++ snd_pcm_sframes_t frames_output_in_interval_sized = ++ -frames_output_in_interval; ++ runtime->delay = frames_output_in_interval_sized; ++ } + + return snd_pcm_indirect_playback_pointer(substream, + &alsa_stream->pcm_indirect, +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.h +@@ -78,6 +78,7 @@ struct bcm2835_alsa_stream { + unsigned int period_offset; + unsigned int buffer_size; + unsigned int period_size; ++ ktime_t interpolate_start; + + struct bcm2835_audio_instance *instance; + int idx; diff --git a/target/linux/brcm2708/patches-4.19/950-0477-staging-bcm2835-audio-Enable-compile-test.patch b/target/linux/brcm2708/patches-4.19/950-0477-staging-bcm2835-audio-Enable-compile-test.patch new file mode 100644 index 000000000..956ed80c9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0477-staging-bcm2835-audio-Enable-compile-test.patch @@ -0,0 +1,27 @@ +From 54b8fc1b2213a73f56a5ca9e098f420014f3c073 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 6 Dec 2018 19:28:56 +0100 +Subject: [PATCH 477/703] staging: bcm2835-audio: Enable compile test + +commit 458d4866a34d0c129ffc3bd56345b2166ba46d77 upstream. + +Enable the compilation test for bcm2835-audio to gain more build coverage. + +Signed-off-by: Stefan Wahren +Reviewed-by: Nicolas Saenz Julienne +Reviewed-by: Dan Carpenter +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/Kconfig ++++ b/drivers/staging/vc04_services/bcm2835-audio/Kconfig +@@ -1,6 +1,6 @@ + config SND_BCM2835 + tristate "BCM2835 Audio" +- depends on ARCH_BCM2835 && SND ++ depends on (ARCH_BCM2835 || COMPILE_TEST) && SND + select SND_PCM + select BCM2835_VCHIQ + help diff --git a/target/linux/brcm2708/patches-4.19/950-0478-staging-bcm2835-audio-use-module_platform_driver-mac.patch b/target/linux/brcm2708/patches-4.19/950-0478-staging-bcm2835-audio-use-module_platform_driver-mac.patch new file mode 100644 index 000000000..05f1e063f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0478-staging-bcm2835-audio-use-module_platform_driver-mac.patch @@ -0,0 +1,48 @@ +From 8981dcb58013f5e48b8657377018cb09896bab98 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 6 Dec 2018 19:28:57 +0100 +Subject: [PATCH 478/703] staging: bcm2835-audio: use module_platform_driver() + macro + +commit 1e55d56344b0777d6cee9b9e4a813d53728ee798 upstream. + +There is not much value behind this boilerplate, so use +module_platform_driver() instead. + +Signed-off-by: Stefan Wahren +Reviewed-by: Nicolas Saenz Julienne +Reviewed-by: Dan Carpenter +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 20 +------------------ + 1 file changed, 1 insertion(+), 19 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -354,25 +354,7 @@ static struct platform_driver bcm2835_al + .of_match_table = snd_bcm2835_of_match_table, + }, + }; +- +-static int bcm2835_alsa_device_init(void) +-{ +- int retval; +- +- retval = platform_driver_register(&bcm2835_alsa_driver); +- if (retval) +- pr_err("Error registering bcm2835_audio driver %d .\n", retval); +- +- return retval; +-} +- +-static void bcm2835_alsa_device_exit(void) +-{ +- platform_driver_unregister(&bcm2835_alsa_driver); +-} +- +-late_initcall(bcm2835_alsa_device_init); +-module_exit(bcm2835_alsa_device_exit); ++module_platform_driver(bcm2835_alsa_driver); + + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); diff --git a/target/linux/brcm2708/patches-4.19/950-0479-staging-bcm2835-audio-Drop-DT-dependency.patch b/target/linux/brcm2708/patches-4.19/950-0479-staging-bcm2835-audio-Drop-DT-dependency.patch new file mode 100644 index 000000000..dc8085c4c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0479-staging-bcm2835-audio-Drop-DT-dependency.patch @@ -0,0 +1,105 @@ +From 2fa5b1611732fd522cbceaded4dad36e81b3d990 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 6 Dec 2018 19:28:58 +0100 +Subject: [PATCH 479/703] staging: bcm2835-audio: Drop DT dependency + +commit 438fc48260a0afc4cee733e5bc20234ff2bbef56 upstream. + +Just like the bcm2835-video make this a platform driver which is probed +by vchiq. In order to change the number of channels use a module +parameter instead, but use the maximum as default. + +Signed-off-by: Stefan Wahren +Reviewed-by: Nicolas Saenz Julienne +Reviewed-by: Dan Carpenter +Signed-off-by: Greg Kroah-Hartman +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 31 ++++++------------- + 1 file changed, 9 insertions(+), 22 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -6,13 +6,13 @@ + #include + #include + #include +-#include + + #include "bcm2835.h" + + static bool enable_hdmi; + static bool enable_headphones; + static bool enable_compat_alsa = true; ++static int num_channels = MAX_SUBSTREAMS; + + module_param(enable_hdmi, bool, 0444); + MODULE_PARM_DESC(enable_hdmi, "Enables HDMI virtual audio device"); +@@ -21,6 +21,8 @@ MODULE_PARM_DESC(enable_headphones, "Ena + module_param(enable_compat_alsa, bool, 0444); + MODULE_PARM_DESC(enable_compat_alsa, + "Enables ALSA compatibility virtual audio device"); ++module_param(num_channels, int, 0644); ++MODULE_PARM_DESC(num_channels, "Number of audio channels (default: 8)"); + + static void bcm2835_devm_free_vchi_ctx(struct device *dev, void *res) + { +@@ -294,28 +296,19 @@ static int snd_add_child_devices(struct + static int snd_bcm2835_alsa_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; +- u32 numchans; + int err; + +- err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", +- &numchans); +- if (err) { +- dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); +- return err; +- } +- +- if (numchans == 0 || numchans > MAX_SUBSTREAMS) { +- numchans = MAX_SUBSTREAMS; +- dev_warn(dev, +- "Illegal 'brcm,pwm-channels' value, will use %u\n", +- numchans); ++ if (num_channels <= 0 || num_channels > MAX_SUBSTREAMS) { ++ num_channels = MAX_SUBSTREAMS; ++ dev_warn(dev, "Illegal num_channels value, will use %u\n", ++ num_channels); + } + + err = bcm2835_devm_add_vchi_ctx(dev); + if (err) + return err; + +- err = snd_add_child_devices(dev, numchans); ++ err = snd_add_child_devices(dev, num_channels); + if (err) + return err; + +@@ -337,12 +330,6 @@ static int snd_bcm2835_alsa_resume(struc + + #endif + +-static const struct of_device_id snd_bcm2835_of_match_table[] = { +- { .compatible = "brcm,bcm2835-audio",}, +- {}, +-}; +-MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); +- + static struct platform_driver bcm2835_alsa_driver = { + .probe = snd_bcm2835_alsa_probe, + #ifdef CONFIG_PM +@@ -351,7 +338,6 @@ static struct platform_driver bcm2835_al + #endif + .driver = { + .name = "bcm2835_audio", +- .of_match_table = snd_bcm2835_of_match_table, + }, + }; + module_platform_driver(bcm2835_alsa_driver); +@@ -359,3 +345,4 @@ module_platform_driver(bcm2835_alsa_driv + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); + MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:bcm2835_audio"); diff --git a/target/linux/brcm2708/patches-4.19/950-0480-staging-bcm2835-audio-double-free-in-init-error-path.patch b/target/linux/brcm2708/patches-4.19/950-0480-staging-bcm2835-audio-double-free-in-init-error-path.patch new file mode 100644 index 000000000..f5a83bd1b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0480-staging-bcm2835-audio-double-free-in-init-error-path.patch @@ -0,0 +1,30 @@ +From 9886534de7551e0a59e90677bd1bab0539102772 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Mon, 17 Dec 2018 10:08:54 +0300 +Subject: [PATCH 480/703] staging: bcm2835-audio: double free in init error + path + +commit 136ff5e49271c4c8fceeca5491c48e66b961564b upstream. + +We free instance here and in the caller. It should be only the caller +which handles it. + +Fixes: d7ca3a71545b ("staging: bcm2835-audio: Operate non-atomic PCM ops") +Signed-off-by: Dan Carpenter +Reviewed-by: Takashi Iwai +Cc: stable +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c +@@ -145,7 +145,6 @@ vc_vchi_audio_init(VCHI_INSTANCE_T vchi_ + dev_err(instance->dev, + "failed to open VCHI service connection (status=%d)\n", + status); +- kfree(instance); + return -EPERM; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0481-dts-Increase-default-coherent-pool-size.patch b/target/linux/brcm2708/patches-4.19/950-0481-dts-Increase-default-coherent-pool-size.patch new file mode 100644 index 000000000..8331777ee --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0481-dts-Increase-default-coherent-pool-size.patch @@ -0,0 +1,27 @@ +From 451f65d34555dad7837da5f9502968f31284615b Mon Sep 17 00:00:00 2001 +From: P33M +Date: Wed, 1 May 2019 15:00:05 +0100 +Subject: [PATCH 481/703] dts: Increase default coherent pool size + +dwc_otg allocates DMA-coherent buffers in atomic context for misaligned +transfer buffers. The pool that these allocations come from is set up +at boot-time but can be overridden by a commandline parameter - +increase this for now to prevent failures seen on 4.19 with multiple +USB Ethernet devices. + +see: https://github.com/raspberrypi/linux/issues/2924 +--- + arch/arm/boot/dts/bcm270x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -3,7 +3,7 @@ + + / { + chosen { +- bootargs = ""; ++ bootargs = "coherent_pool=1M"; + /delete-property/ stdout-path; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0482-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch b/target/linux/brcm2708/patches-4.19/950-0482-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch new file mode 100644 index 000000000..2b5928ef0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0482-Revert-staging-bcm2835-audio-Drop-DT-dependency.patch @@ -0,0 +1,96 @@ +From 5a957250fdb0f0b45bd41569c754a676fa556225 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Wed, 1 May 2019 14:23:39 +0100 +Subject: [PATCH 482/703] Revert "staging: bcm2835-audio: Drop DT dependency" + +This reverts commit 60a2e557a4f81480216066f22b84c3dda31b3470. +--- + .../vc04_services/bcm2835-audio/bcm2835.c | 31 +++++++++++++------ + 1 file changed, 22 insertions(+), 9 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835.c +@@ -6,13 +6,13 @@ + #include + #include + #include ++#include + + #include "bcm2835.h" + + static bool enable_hdmi; + static bool enable_headphones; + static bool enable_compat_alsa = true; +-static int num_channels = MAX_SUBSTREAMS; + + module_param(enable_hdmi, bool, 0444); + MODULE_PARM_DESC(enable_hdmi, "Enables HDMI virtual audio device"); +@@ -21,8 +21,6 @@ MODULE_PARM_DESC(enable_headphones, "Ena + module_param(enable_compat_alsa, bool, 0444); + MODULE_PARM_DESC(enable_compat_alsa, + "Enables ALSA compatibility virtual audio device"); +-module_param(num_channels, int, 0644); +-MODULE_PARM_DESC(num_channels, "Number of audio channels (default: 8)"); + + static void bcm2835_devm_free_vchi_ctx(struct device *dev, void *res) + { +@@ -296,19 +294,28 @@ static int snd_add_child_devices(struct + static int snd_bcm2835_alsa_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; ++ u32 numchans; + int err; + +- if (num_channels <= 0 || num_channels > MAX_SUBSTREAMS) { +- num_channels = MAX_SUBSTREAMS; +- dev_warn(dev, "Illegal num_channels value, will use %u\n", +- num_channels); ++ err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", ++ &numchans); ++ if (err) { ++ dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); ++ return err; ++ } ++ ++ if (numchans == 0 || numchans > MAX_SUBSTREAMS) { ++ numchans = MAX_SUBSTREAMS; ++ dev_warn(dev, ++ "Illegal 'brcm,pwm-channels' value, will use %u\n", ++ numchans); + } + + err = bcm2835_devm_add_vchi_ctx(dev); + if (err) + return err; + +- err = snd_add_child_devices(dev, num_channels); ++ err = snd_add_child_devices(dev, numchans); + if (err) + return err; + +@@ -330,6 +337,12 @@ static int snd_bcm2835_alsa_resume(struc + + #endif + ++static const struct of_device_id snd_bcm2835_of_match_table[] = { ++ { .compatible = "brcm,bcm2835-audio",}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); ++ + static struct platform_driver bcm2835_alsa_driver = { + .probe = snd_bcm2835_alsa_probe, + #ifdef CONFIG_PM +@@ -338,6 +351,7 @@ static struct platform_driver bcm2835_al + #endif + .driver = { + .name = "bcm2835_audio", ++ .of_match_table = snd_bcm2835_of_match_table, + }, + }; + module_platform_driver(bcm2835_alsa_driver); +@@ -345,4 +359,3 @@ module_platform_driver(bcm2835_alsa_driv + MODULE_AUTHOR("Dom Cobley"); + MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("platform:bcm2835_audio"); diff --git a/target/linux/brcm2708/patches-4.19/950-0483-configs-Enable-netdev-LED-trigger.patch b/target/linux/brcm2708/patches-4.19/950-0483-configs-Enable-netdev-LED-trigger.patch new file mode 100644 index 000000000..797e0b387 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0483-configs-Enable-netdev-LED-trigger.patch @@ -0,0 +1,42 @@ +From dcf73f16faa51b4ff0fc25106e1b45f861ddd5b8 Mon Sep 17 00:00:00 2001 +From: Russell Joyce +Date: Wed, 1 May 2019 16:43:27 +0100 +Subject: [PATCH 483/703] configs: Enable netdev LED trigger + +Signed-off-by: Russell Joyce +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -1143,6 +1143,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=m + CONFIG_LEDS_TRIGGER_CAMERA=m + CONFIG_LEDS_TRIGGER_INPUT=y + CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_LEDS_TRIGGER_NETDEV=m + CONFIG_RTC_CLASS=y + # CONFIG_RTC_HCTOSYS is not set + CONFIG_RTC_DRV_ABX80X=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1136,6 +1136,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=m + CONFIG_LEDS_TRIGGER_CAMERA=m + CONFIG_LEDS_TRIGGER_INPUT=y + CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_LEDS_TRIGGER_NETDEV=m + CONFIG_RTC_CLASS=y + # CONFIG_RTC_HCTOSYS is not set + CONFIG_RTC_DRV_ABX80X=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1003,6 +1003,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=m + CONFIG_LEDS_TRIGGER_CAMERA=m + CONFIG_LEDS_TRIGGER_INPUT=y + CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_LEDS_TRIGGER_NETDEV=m + CONFIG_RTC_CLASS=y + # CONFIG_RTC_HCTOSYS is not set + CONFIG_RTC_DRV_ABX80X=m diff --git a/target/linux/brcm2708/patches-4.19/950-0484-smsc95xx-dynamically-fix-up-TX-buffer-alignment-with.patch b/target/linux/brcm2708/patches-4.19/950-0484-smsc95xx-dynamically-fix-up-TX-buffer-alignment-with.patch new file mode 100644 index 000000000..5bb655967 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0484-smsc95xx-dynamically-fix-up-TX-buffer-alignment-with.patch @@ -0,0 +1,62 @@ +From e303bfb934b2a5adb549b43bbd51b1a0e33c33b3 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Wed, 1 May 2019 17:04:32 +0100 +Subject: [PATCH 484/703] smsc95xx: dynamically fix up TX buffer alignment with + padding bytes + +dwc_otg requires a 32-bit aligned buffer start address, otherwise +expensive bounce buffers are used. The LAN951x hardware can skip up to +3 bytes between the TX header and the start of frame data, which can +be used to force alignment of the URB passed to dwc_otg. + +As found in https://github.com/raspberrypi/linux/issues/2924 +--- + drivers/net/usb/smsc95xx.c | 12 +++++++----- + drivers/net/usb/smsc95xx.h | 2 +- + 2 files changed, 8 insertions(+), 6 deletions(-) + +--- a/drivers/net/usb/smsc95xx.c ++++ b/drivers/net/usb/smsc95xx.c +@@ -2082,7 +2082,9 @@ static struct sk_buff *smsc95xx_tx_fixup + struct sk_buff *skb, gfp_t flags) + { + bool csum = skb->ip_summed == CHECKSUM_PARTIAL; +- int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; ++ unsigned int align_bytes = -((uintptr_t)skb->data) & 0x3; ++ int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM + align_bytes ++ : SMSC95XX_TX_OVERHEAD + align_bytes; + u32 tx_cmd_a, tx_cmd_b; + + /* We do not advertise SG, so skbs should be already linearized */ +@@ -2116,16 +2118,16 @@ static struct sk_buff *smsc95xx_tx_fixup + } + } + +- skb_push(skb, 4); +- tx_cmd_b = (u32)(skb->len - 4); ++ skb_push(skb, 4 + align_bytes); ++ tx_cmd_b = (u32)(skb->len - 4 - align_bytes); + if (csum) + tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; + cpu_to_le32s(&tx_cmd_b); + memcpy(skb->data, &tx_cmd_b, 4); + + skb_push(skb, 4); +- tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | +- TX_CMD_A_LAST_SEG_; ++ tx_cmd_a = (u32)(skb->len - 8 - align_bytes) | TX_CMD_A_FIRST_SEG_ | ++ (align_bytes << 16) | TX_CMD_A_LAST_SEG_; + cpu_to_le32s(&tx_cmd_a); + memcpy(skb->data, &tx_cmd_a, 4); + +--- a/drivers/net/usb/smsc95xx.h ++++ b/drivers/net/usb/smsc95xx.h +@@ -21,7 +21,7 @@ + #define _SMSC95XX_H + + /* Tx command words */ +-#define TX_CMD_A_DATA_OFFSET_ (0x001F0000) /* Data Start Offset */ ++#define TX_CMD_A_DATA_OFFSET_ (0x00030000) /* Data Start Offset */ + #define TX_CMD_A_FIRST_SEG_ (0x00002000) /* First Segment */ + #define TX_CMD_A_LAST_SEG_ (0x00001000) /* Last Segment */ + #define TX_CMD_A_BUF_SIZE_ (0x000007FF) /* Buffer Size */ diff --git a/target/linux/brcm2708/patches-4.19/950-0485-lan78xx-use-default-alignment-for-rx-buffers.patch b/target/linux/brcm2708/patches-4.19/950-0485-lan78xx-use-default-alignment-for-rx-buffers.patch new file mode 100644 index 000000000..e16194504 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0485-lan78xx-use-default-alignment-for-rx-buffers.patch @@ -0,0 +1,23 @@ +From 877ede0851381694597771e1497ca7fc24cd23a6 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Thu, 2 May 2019 11:53:45 +0100 +Subject: [PATCH 485/703] lan78xx: use default alignment for rx buffers + +The lan78xx uses a 12-byte hardware rx header, so there is no need +to allocate SKBs with NET_IP_ALIGN set. Removes alignment faults +in both dwc_otg and in ipv6 processing. +--- + drivers/net/usb/lan78xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/usb/lan78xx.c ++++ b/drivers/net/usb/lan78xx.c +@@ -3250,7 +3250,7 @@ static int rx_submit(struct lan78xx_net + size_t size = dev->rx_urb_size; + int ret = 0; + +- skb = netdev_alloc_skb_ip_align(dev->net, size); ++ skb = netdev_alloc_skb(dev->net, size); + if (!skb) { + usb_free_urb(urb); + return -ENOMEM; diff --git a/target/linux/brcm2708/patches-4.19/950-0486-staging-bcm2835-codec-Correct-port-width-calc-for-tr.patch b/target/linux/brcm2708/patches-4.19/950-0486-staging-bcm2835-codec-Correct-port-width-calc-for-tr.patch new file mode 100644 index 000000000..29847b600 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0486-staging-bcm2835-codec-Correct-port-width-calc-for-tr.patch @@ -0,0 +1,29 @@ +From f6e11e230a385a290e1a5890241f0ec4907f794c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 2 May 2019 14:30:24 +0100 +Subject: [PATCH 486/703] staging: bcm2835-codec: Correct port width calc for + truncation + +The calculation converting from V4L2 bytesperline to MMAL +width had an operator ordering issue that lead to Bayer raw 10 +(and 12 and 14) setting an incorrect stride for the buffer. +Correct this operation ordering issue. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -605,8 +605,8 @@ static void setup_mmal_port_format(struc + + if (!(q_data->fmt->flags & V4L2_FMT_FLAG_COMPRESSED)) { + /* Raw image format - set width/height */ +- port->es.video.width = q_data->bytesperline / +- (q_data->fmt->depth >> 3); ++ port->es.video.width = (q_data->bytesperline << 3) / ++ q_data->fmt->depth; + port->es.video.height = q_data->height; + port->es.video.crop.width = q_data->crop_width; + port->es.video.crop.height = q_data->crop_height; diff --git a/target/linux/brcm2708/patches-4.19/950-0487-staging-bcm2835-codec-Remove-height-padding-for-ISP-.patch b/target/linux/brcm2708/patches-4.19/950-0487-staging-bcm2835-codec-Remove-height-padding-for-ISP-.patch new file mode 100644 index 000000000..e0ab408a1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0487-staging-bcm2835-codec-Remove-height-padding-for-ISP-.patch @@ -0,0 +1,61 @@ +From 9b2ae5ee715a6dfc1d82b8ed0602a7221df6b641 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 2 May 2019 14:32:21 +0100 +Subject: [PATCH 487/703] staging: bcm2835-codec: Remove height padding for ISP + role + +The ISP has no need for heights to be a multiple of macroblock +sizes, therefore doesn't require the align on the height. +Remove it for the ISP role. (It is required for the codecs). + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -1015,7 +1015,8 @@ static int vidioc_g_fmt_vid_cap(struct f + return vidioc_g_fmt(file2ctx(file), f); + } + +-static int vidioc_try_fmt(struct v4l2_format *f, struct bcm2835_codec_fmt *fmt) ++static int vidioc_try_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f, ++ struct bcm2835_codec_fmt *fmt) + { + /* + * The V4L2 specification requires the driver to correct the format +@@ -1034,11 +1035,13 @@ static int vidioc_try_fmt(struct v4l2_fo + f->fmt.pix.height = MIN_H; + + /* +- * Buffer must have a vertical alignment of 16 lines. ++ * For codecs the buffer must have a vertical alignment of 16 ++ * lines. + * The selection will reflect any cropping rectangle when only + * some of the pixels are active. + */ +- f->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); ++ if (ctx->dev->role != ISP) ++ f->fmt.pix.height = ALIGN(f->fmt.pix.height, 16); + } + f->fmt.pix.bytesperline = get_bytesperline(f->fmt.pix.width, + fmt); +@@ -1065,7 +1068,7 @@ static int vidioc_try_fmt_vid_cap(struct + fmt = find_format(f, ctx->dev, true); + } + +- return vidioc_try_fmt(f, fmt); ++ return vidioc_try_fmt(ctx, f, fmt); + } + + static int vidioc_try_fmt_vid_out(struct file *file, void *priv, +@@ -1084,7 +1087,7 @@ static int vidioc_try_fmt_vid_out(struct + if (!f->fmt.pix.colorspace) + f->fmt.pix.colorspace = ctx->colorspace; + +- return vidioc_try_fmt(f, fmt); ++ return vidioc_try_fmt(ctx, f, fmt); + } + + static int vidioc_s_fmt(struct bcm2835_codec_ctx *ctx, struct v4l2_format *f, diff --git a/target/linux/brcm2708/patches-4.19/950-0488-staging-mmal-vchiq-Free-the-event-context-for-contro.patch b/target/linux/brcm2708/patches-4.19/950-0488-staging-mmal-vchiq-Free-the-event-context-for-contro.patch new file mode 100644 index 000000000..046ea7a1d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0488-staging-mmal-vchiq-Free-the-event-context-for-contro.patch @@ -0,0 +1,28 @@ +From 26f04aa97ca1c498f13e6c4dfea2e8ea436a9f83 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 1 May 2019 13:27:23 +0100 +Subject: [PATCH 488/703] staging: mmal-vchiq: Free the event context for + control ports + +vchiq_mmal_component_init calls init_event_context for the +control port, but vchiq_mmal_component_finalise didn't free +it, causing a memory leak.. + +Add the free call. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1981,6 +1981,8 @@ int vchiq_mmal_component_finalise(struct + for (idx = 0; idx < component->clocks; idx++) + free_event_context(&component->clock[idx]); + ++ free_event_context(&component->control); ++ + mutex_unlock(&instance->vchiq_mutex); + + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0489-staging-mmal-vchiq-Replace-spinlock-protecting-conte.patch b/target/linux/brcm2708/patches-4.19/950-0489-staging-mmal-vchiq-Replace-spinlock-protecting-conte.patch new file mode 100644 index 000000000..7b2744d74 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0489-staging-mmal-vchiq-Replace-spinlock-protecting-conte.patch @@ -0,0 +1,67 @@ +From 39464cbb618af3ddf6427d77b0c0be0042bcaaf9 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 1 May 2019 15:17:00 +0100 +Subject: [PATCH 489/703] staging: mmal-vchiq: Replace spinlock protecting + context_map with mutex + +950fd86 staging: bcm2835-camera: Replace open-coded idr with a struct idr. +replaced an internal implementation of an idr with the standard functions +and a spinlock. +idr_alloc(GFP_KERNEL) can sleep whilst calling kmem_cache_alloc to allocate +the new node, but this is not valid whilst in an atomic context due to the +spinlock. + +There is no need for this to be a spinlock as a standard mutex is +sufficient. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 13 +++++++------ + 1 file changed, 7 insertions(+), 6 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -185,7 +185,8 @@ struct vchiq_mmal_instance { + void *bulk_scratch; + + struct idr context_map; +- spinlock_t context_map_lock; ++ /* protect accesses to context_map */ ++ struct mutex context_map_lock; + + struct vchiq_mmal_component component[VCHIQ_MMAL_MAX_COMPONENTS]; + +@@ -209,10 +210,10 @@ get_msg_context(struct vchiq_mmal_instan + * that when we service the VCHI reply, we can look up what + * message is being replied to. + */ +- spin_lock(&instance->context_map_lock); ++ mutex_lock(&instance->context_map_lock); + handle = idr_alloc(&instance->context_map, msg_context, + 0, 0, GFP_KERNEL); +- spin_unlock(&instance->context_map_lock); ++ mutex_unlock(&instance->context_map_lock); + + if (handle < 0) { + kfree(msg_context); +@@ -236,9 +237,9 @@ release_msg_context(struct mmal_msg_cont + { + struct vchiq_mmal_instance *instance = msg_context->instance; + +- spin_lock(&instance->context_map_lock); ++ mutex_lock(&instance->context_map_lock); + idr_remove(&instance->context_map, msg_context->handle); +- spin_unlock(&instance->context_map_lock); ++ mutex_unlock(&instance->context_map_lock); + kfree(msg_context); + } + +@@ -2143,7 +2144,7 @@ int vchiq_mmal_init(struct vchiq_mmal_in + + instance->bulk_scratch = vmalloc(PAGE_SIZE); + +- spin_lock_init(&instance->context_map_lock); ++ mutex_init(&instance->context_map_lock); + idr_init_base(&instance->context_map, 1); + + params.callback_param = instance; diff --git a/target/linux/brcm2708/patches-4.19/950-0490-BCM270X_DT-Also-set-coherent_pool-1M-for-BT-Pis.patch b/target/linux/brcm2708/patches-4.19/950-0490-BCM270X_DT-Also-set-coherent_pool-1M-for-BT-Pis.patch new file mode 100644 index 000000000..6a08a3a88 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0490-BCM270X_DT-Also-set-coherent_pool-1M-for-BT-Pis.patch @@ -0,0 +1,47 @@ +From 0e6d5495da81b0f441a8e59156213907b170b085 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 2 May 2019 22:14:34 +0100 +Subject: [PATCH 490/703] BCM270X_DT: Also set coherent_pool=1M for BT Pis + +See: https://github.com/raspberrypi/linux/issues/2924 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 2 +- + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 2 +- + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/bcm2708-rpi-0-w.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts +@@ -8,7 +8,7 @@ + model = "Raspberry Pi Zero W"; + + chosen { +- bootargs = "8250.nr_uarts=1"; ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1"; + }; + + aliases { +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -9,7 +9,7 @@ + model = "Raspberry Pi 3 Model B+"; + + chosen { +- bootargs = "8250.nr_uarts=1"; ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1"; + }; + + aliases { +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -9,7 +9,7 @@ + model = "Raspberry Pi 3 Model B"; + + chosen { +- bootargs = "8250.nr_uarts=1"; ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1"; + }; + + aliases { diff --git a/target/linux/brcm2708/patches-4.19/950-0491-configs-Enable-ICS-43432-I2S-microphone-module.patch b/target/linux/brcm2708/patches-4.19/950-0491-configs-Enable-ICS-43432-I2S-microphone-module.patch new file mode 100644 index 000000000..a135c529a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0491-configs-Enable-ICS-43432-I2S-microphone-module.patch @@ -0,0 +1,42 @@ +From 9618e38d927290bf174936756face014a37a93e6 Mon Sep 17 00:00:00 2001 +From: Russell Joyce +Date: Thu, 2 May 2019 15:18:36 +0100 +Subject: [PATCH 491/703] configs: Enable ICS-43432 I2S microphone module + +Signed-off-by: Russell Joyce +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -943,6 +943,7 @@ CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_ICS43432=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -936,6 +936,7 @@ CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_ICS43432=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -822,6 +822,7 @@ CONFIG_SND_SOC_AD193X_I2C=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_AK4554=m + CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_ICS43432=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m + CONFIG_HIDRAW=y diff --git a/target/linux/brcm2708/patches-4.19/950-0492-arm-dts-overlays-rpi-sense-add-upstream-humidity-com.patch b/target/linux/brcm2708/patches-4.19/950-0492-arm-dts-overlays-rpi-sense-add-upstream-humidity-com.patch new file mode 100644 index 000000000..8603b29eb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0492-arm-dts-overlays-rpi-sense-add-upstream-humidity-com.patch @@ -0,0 +1,26 @@ +From cecb1267b1b51025c6e54bb4ba05c84ff6e7e3c7 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 5 May 2019 21:07:12 +0100 +Subject: [PATCH 492/703] arm: dts: overlays: rpi-sense: add upstream humidity + compatible + +The upstream humidiity driver uses "st,hts221" for the compatible +string so add that in as well so it will work with an unmodified +upstream kernel driver. We leave the downstream as the priority. + +Signed-off-by: Peter Robinson +--- + arch/arm/boot/dts/overlays/rpi-sense-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts +@@ -38,7 +38,7 @@ + }; + + hts221-humid@5f { +- compatible = "st,hts221-humid"; ++ compatible = "st,hts221-humid", "st,hts221"; + reg = <0x5f>; + status = "okay"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0493-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch b/target/linux/brcm2708/patches-4.19/950-0493-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch new file mode 100644 index 000000000..c74fb9390 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0493-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch @@ -0,0 +1,67 @@ +From af1d0b04a35776cf36049b1549fcb33260a4e145 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 2 May 2019 15:50:01 +0100 +Subject: [PATCH 493/703] staging: mmal-vchiq: Fix memory leak in error path + +On error, vchiq_mmal_component_init could leave the +event context allocated for ports. +Clean them up in the error path. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/vchiq-mmal/mmal-vchiq.c | 27 +++++++++++++------ + 1 file changed, 19 insertions(+), 8 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -1848,9 +1848,26 @@ static void free_event_context(struct vc + { + struct mmal_msg_context *ctx = port->event_context; + ++ if (!ctx) ++ return; ++ + kfree(ctx->u.bulk.buffer->buffer); + kfree(ctx->u.bulk.buffer); + release_msg_context(ctx); ++ port->event_context = NULL; ++} ++ ++static void release_all_event_contexts(struct vchiq_mmal_component *component) ++{ ++ int idx; ++ ++ for (idx = 0; idx < component->inputs; idx++) ++ free_event_context(&component->input[idx]); ++ for (idx = 0; idx < component->outputs; idx++) ++ free_event_context(&component->output[idx]); ++ for (idx = 0; idx < component->clocks; idx++) ++ free_event_context(&component->clock[idx]); ++ free_event_context(&component->control); + } + + /* Initialise a mmal component and its ports +@@ -1948,6 +1965,7 @@ int vchiq_mmal_component_init(struct vch + + release_component: + destroy_component(instance, component); ++ release_all_event_contexts(component); + unlock: + if (component) + component->in_use = 0; +@@ -1975,14 +1993,7 @@ int vchiq_mmal_component_finalise(struct + + component->in_use = 0; + +- for (idx = 0; idx < component->inputs; idx++) +- free_event_context(&component->input[idx]); +- for (idx = 0; idx < component->outputs; idx++) +- free_event_context(&component->output[idx]); +- for (idx = 0; idx < component->clocks; idx++) +- free_event_context(&component->clock[idx]); +- +- free_event_context(&component->control); ++ release_all_event_contexts(component); + + mutex_unlock(&instance->vchiq_mutex); + diff --git a/target/linux/brcm2708/patches-4.19/950-0494-staging-vchiq-mmal-Fix-memory-leak-of-vchiq-instance.patch b/target/linux/brcm2708/patches-4.19/950-0494-staging-vchiq-mmal-Fix-memory-leak-of-vchiq-instance.patch new file mode 100644 index 000000000..7c9ac2261 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0494-staging-vchiq-mmal-Fix-memory-leak-of-vchiq-instance.patch @@ -0,0 +1,62 @@ +From 123507714c5b2fd44d78f2eac3dc8ade39bb3018 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 3 May 2019 13:27:51 +0100 +Subject: [PATCH 494/703] staging: vchiq-mmal: Fix memory leak of vchiq + instance + +The vchiq instance was allocated from vchiq_mmal_init via +vchi_initialise, but was never released with vchi_disconnect. + +Retain the handle and release it from vchiq_mmal_finalise. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c ++++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +@@ -176,6 +176,7 @@ struct mmal_msg_context { + }; + + struct vchiq_mmal_instance { ++ VCHI_INSTANCE_T vchi_instance; + VCHI_SERVICE_HANDLE_T handle; + + /* ensure serialised access to service */ +@@ -1981,7 +1982,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i + int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, + struct vchiq_mmal_component *component) + { +- int ret, idx; ++ int ret; + + if (mutex_lock_interruptible(&instance->vchiq_mutex)) + return -EINTR; +@@ -2094,6 +2095,8 @@ int vchiq_mmal_finalise(struct vchiq_mma + + idr_destroy(&instance->context_map); + ++ vchi_disconnect(instance->vchi_instance); ++ + kfree(instance); + + return status; +@@ -2105,7 +2108,7 @@ int vchiq_mmal_init(struct vchiq_mmal_in + int status; + struct vchiq_mmal_instance *instance; + static VCHI_CONNECTION_T *vchi_connection; +- static VCHI_INSTANCE_T vchi_instance; ++ VCHI_INSTANCE_T vchi_instance; + SERVICE_CREATION_T params = { + .version = VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), + .service_id = VC_MMAL_SERVER_NAME, +@@ -2151,6 +2154,8 @@ int vchiq_mmal_init(struct vchiq_mmal_in + if (!instance) + return -ENOMEM; + ++ instance->vchi_instance = vchi_instance; ++ + mutex_init(&instance->vchiq_mutex); + + instance->bulk_scratch = vmalloc(PAGE_SIZE); diff --git a/target/linux/brcm2708/patches-4.19/950-0495-Revert-video-bcm2708_fb-Try-allocating-on-the-ARM-an.patch b/target/linux/brcm2708/patches-4.19/950-0495-Revert-video-bcm2708_fb-Try-allocating-on-the-ARM-an.patch new file mode 100644 index 000000000..743a2586c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0495-Revert-video-bcm2708_fb-Try-allocating-on-the-ARM-an.patch @@ -0,0 +1,164 @@ +From dfe9e42ef9bce3edba84cab22269995f8edd02a5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 13 May 2019 17:34:29 +0100 +Subject: [PATCH 495/703] Revert "video: bcm2708_fb: Try allocating on the ARM + and passing to VPU" + +This reverts commit ca36c709fce57e8023d2b8b354376bf161601a49. + +The driver tries a cma_alloc to avoid using gpu_mem, but should +that fail the core code is logging an error with no easy way to +test whether it will succeed or fail first. + +Revert until we either totally give up on gpu_mem and increase +CMA always, or find a way to try an allocation. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 102 +++------------------ + include/soc/bcm2835/raspberrypi-firmware.h | 1 - + 2 files changed, 12 insertions(+), 91 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -98,11 +98,6 @@ struct bcm2708_fb { + struct bcm2708_fb_stats stats; + unsigned long fb_bus_address; + struct { u32 base, length; } gpu; +- +- bool disable_arm_alloc; +- unsigned int image_size; +- dma_addr_t dma_addr; +- void *cpuaddr; + }; + + #define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) +@@ -288,88 +283,23 @@ static int bcm2708_fb_set_par(struct fb_ + .xoffset = info->var.xoffset, + .yoffset = info->var.yoffset, + .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, +- /* base and screen_size will be initialised later */ +- .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, +- /* pitch will be initialised later */ ++ .base = 0, ++ .screen_size = 0, ++ .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH, 4, 0 }, ++ .pitch = 0, + }; +- int ret, image_size; +- ++ int ret; + + print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info, + info->var.xres, info->var.yres, info->var.xres_virtual, + info->var.yres_virtual, (int)info->screen_size, + info->var.bits_per_pixel); + +- /* Try allocating our own buffer. We can specify all the parameters */ +- image_size = ((info->var.xres * info->var.yres) * +- info->var.bits_per_pixel) >> 3; +- +- if (!fb->disable_arm_alloc && +- (image_size != fb->image_size || !fb->dma_addr)) { +- if (fb->dma_addr) { +- dma_free_coherent(info->device, fb->image_size, +- fb->cpuaddr, fb->dma_addr); +- fb->image_size = 0; +- fb->cpuaddr = NULL; +- fb->dma_addr = 0; +- } +- +- fb->cpuaddr = dma_alloc_coherent(info->device, image_size, +- &fb->dma_addr, GFP_KERNEL); +- +- if (!fb->cpuaddr) { +- fb->dma_addr = 0; +- fb->disable_arm_alloc = true; +- } else { +- fb->image_size = image_size; +- } +- } +- +- if (fb->cpuaddr) { +- fbinfo.base = fb->dma_addr; +- fbinfo.screen_size = image_size; +- fbinfo.pitch = (info->var.xres * info->var.bits_per_pixel) >> 3; +- +- ret = rpi_firmware_property_list(fb->fw, &fbinfo, +- sizeof(fbinfo)); +- if (ret || fbinfo.base != fb->dma_addr) { +- /* Firmware either failed, or assigned a different base +- * address (ie it doesn't support being passed an FB +- * allocation). +- * Destroy the allocation, and don't try again. +- */ +- dma_free_coherent(info->device, fb->image_size, +- fb->cpuaddr, fb->dma_addr); +- fb->image_size = 0; +- fb->cpuaddr = NULL; +- fb->dma_addr = 0; +- fb->disable_arm_alloc = true; +- } +- } else { +- /* Our allocation failed - drop into the old scheme of +- * allocation by the VPU. +- */ +- ret = -ENOMEM; +- } +- ++ ret = rpi_firmware_property_list(fb->fw, &fbinfo, sizeof(fbinfo)); + if (ret) { +- /* Old scheme: +- * - FRAMEBUFFER_ALLOCATE passes 0 for base and screen_size. +- * - GET_PITCH instead of SET_PITCH. +- */ +- fbinfo.base = 0; +- fbinfo.screen_size = 0; +- fbinfo.tag6.tag = RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH; +- fbinfo.pitch = 0; +- +- ret = rpi_firmware_property_list(fb->fw, &fbinfo, +- sizeof(fbinfo)); +- if (ret) { +- dev_err(info->device, +- "Failed to allocate GPU framebuffer (%d)\n", +- ret); +- return ret; +- } ++ dev_err(info->device, ++ "Failed to allocate GPU framebuffer (%d)\n", ret); ++ return ret; + } + + if (info->var.bits_per_pixel <= 8) +@@ -384,17 +314,9 @@ static int bcm2708_fb_set_par(struct fb_ + fb->fb.fix.smem_start = fbinfo.base; + fb->fb.fix.smem_len = fbinfo.pitch * fbinfo.yres_virtual; + fb->fb.screen_size = fbinfo.screen_size; +- +- if (!fb->dma_addr) { +- if (fb->fb.screen_base) +- iounmap(fb->fb.screen_base); +- +- fb->fb.screen_base = ioremap_wc(fbinfo.base, +- fb->fb.screen_size); +- } else { +- fb->fb.screen_base = fb->cpuaddr; +- } +- ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ fb->fb.screen_base = ioremap_wc(fbinfo.base, fb->fb.screen_size); + if (!fb->fb.screen_base) { + /* the console may currently be locked */ + console_trylock(); +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -128,7 +128,6 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, + RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, + RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, +- RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, + RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, + RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, + RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, diff --git a/target/linux/brcm2708/patches-4.19/950-0496-Added-IQaudIO-Pi-Codec-board-support-2969.patch b/target/linux/brcm2708/patches-4.19/950-0496-Added-IQaudIO-Pi-Codec-board-support-2969.patch new file mode 100644 index 000000000..177d8900b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0496-Added-IQaudIO-Pi-Codec-board-support-2969.patch @@ -0,0 +1,409 @@ +From 7208ccb2165feb06eda3f04858d09388cd279c7d Mon Sep 17 00:00:00 2001 +From: IQaudIO +Date: Mon, 13 May 2019 21:53:05 +0100 +Subject: [PATCH 496/703] Added IQaudIO Pi-Codec board support (#2969) + +Add support for the IQaudIO Pi-Codec board. + +Signed-off-by: Gordon +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + .../dts/overlays/iqaudio-codec-overlay.dts | 42 +++ + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + arch/arm64/configs/bcmrpi3_defconfig | 1 + + sound/soc/bcm/Kconfig | 7 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/iqaudio-codec.c | 250 ++++++++++++++++++ + 9 files changed, 311 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts + create mode 100644 sound/soc/bcm/iqaudio-codec.c + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -68,6 +68,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + i2c1-bcm2708.dtbo \ + i2s-gpio28-31.dtbo \ + ilitek251x.dtbo \ ++ iqaudio-codec.dtbo \ + iqaudio-dac.dtbo \ + iqaudio-dacplus.dtbo \ + iqaudio-digi-wm8804-audio.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1160,6 +1160,12 @@ Params: interrupt GPIO use + touchscreen (in pixels) + + ++Name: iqaudio-codec ++Info: Configures the IQaudio Codec audio card ++Load: dtoverlay=iqaudio-codec ++Params: ++ ++ + Name: iqaudio-dac + Info: Configures the IQaudio DAC audio card + Load: dtoverlay=iqaudio-dac, +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts +@@ -0,0 +1,42 @@ ++// Definitions for IQaudIO CODEC ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2708"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ da2713@1a { ++ #sound-dai-cells = <0>; ++ compatible = "dlg,da7213"; ++ reg = <0x1a>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&sound>; ++ iqaudio_dac: __overlay__ { ++ compatible = "iqaudio,iqaudio-codec"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ }; ++}; +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -919,6 +919,7 @@ CONFIG_SND_BCM2708_SOC_RPI_DAC=m + CONFIG_SND_BCM2708_SOC_RPI_PROTO=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -912,6 +912,7 @@ CONFIG_SND_BCM2708_SOC_RPI_DAC=m + CONFIG_SND_BCM2708_SOC_RPI_PROTO=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -807,6 +807,7 @@ CONFIG_SND_BCM2708_SOC_RPI_DAC=m + CONFIG_SND_BCM2708_SOC_RPI_PROTO=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m + CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m + CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -108,6 +108,13 @@ config SND_BCM2708_SOC_JUSTBOOM_DIGI + help + Say Y or M if you want to add support for JustBoom Digi. + ++config SND_BCM2708_SOC_IQAUDIO_CODEC ++ tristate "Support for IQaudIO-CODEC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_DA7213 ++ help ++ Say Y or M if you want to add support for IQaudIO-CODEC. ++ + config SND_BCM2708_SOC_IQAUDIO_DAC + tristate "Support for IQaudIO-DAC" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -18,6 +18,7 @@ snd-soc-hifiberry-dacplusadc-objs := hif + snd-soc-justboom-dac-objs := justboom-dac.o + snd-soc-rpi-cirrus-objs := rpi-cirrus.o + snd-soc-rpi-proto-objs := rpi-proto.o ++snd-soc-iqaudio-codec-objs := iqaudio-codec.o + snd-soc-iqaudio-dac-objs := iqaudio-dac.o + snd-soc-i-sabre-q2m-objs := i-sabre-q2m.o + snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o +@@ -42,6 +43,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D + obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o ++obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC) += snd-soc-iqaudio-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o + obj-$(CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M) += snd-soc-i-sabre-q2m.o + obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o +--- /dev/null ++++ b/sound/soc/bcm/iqaudio-codec.c +@@ -0,0 +1,250 @@ ++/* ++ * ASoC Driver for IQaudIO Raspberry Pi Codec board ++ * ++ * Author: Gordon Garrity ++ * (C) Copyright IQaudio Limited, 2017-2019 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "../codecs/da7213.h" ++ ++static int pll_out = DA7213_PLL_FREQ_OUT_90316800; ++ ++static int snd_rpi_iqaudio_pll_control(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *k, int event) ++{ ++ int ret = 0; ++ struct snd_soc_dapm_context *dapm = w->dapm; ++ struct snd_soc_card *card = dapm->card; ++ struct snd_soc_pcm_runtime *rtd = ++ snd_soc_get_pcm_runtime(card, card->dai_link[0].name); ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ ++ if (SND_SOC_DAPM_EVENT_OFF(event)) { ++ ret = snd_soc_dai_set_pll(codec_dai, 0, DA7213_SYSCLK_MCLK, 0, ++ 0); ++ if (ret) ++ dev_err(card->dev, "Failed to bypass PLL: %d\n", ret); ++ } else if (SND_SOC_DAPM_EVENT_ON(event)) { ++ ret = snd_soc_dai_set_pll(codec_dai, 0, DA7213_SYSCLK_PLL, 0, ++ pll_out); ++ if (ret) ++ dev_err(card->dev, "Failed to enable PLL: %d\n", ret); ++ } ++ ++ return ret; ++} ++ ++static int snd_rpi_iqaudio_post_dapm_event(struct snd_soc_dapm_widget *w, ++ struct snd_kcontrol *kcontrol, ++ int event) ++{ ++ switch (event) { ++ case SND_SOC_DAPM_POST_PMU: ++ /* Delay for mic bias ramp */ ++ msleep(1000); ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static const struct snd_soc_dapm_widget dapm_widgets[] = { ++ SND_SOC_DAPM_HP("HP Jack", NULL), ++ SND_SOC_DAPM_MIC("MIC Jack", NULL), ++ SND_SOC_DAPM_MIC("Onboard MIC", NULL), ++ SND_SOC_DAPM_LINE("AUX Jack", NULL), ++ SND_SOC_DAPM_SUPPLY("PLL Control", SND_SOC_NOPM, 0, 0, ++ snd_rpi_iqaudio_pll_control, ++ SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), ++ SND_SOC_DAPM_POST("Post Power Up Event", snd_rpi_iqaudio_post_dapm_event), ++}; ++ ++static const struct snd_soc_dapm_route audio_map[] = { ++ {"HP Jack", NULL, "HPL"}, ++ {"HP Jack", NULL, "HPR"}, ++ {"HP Jack", NULL, "PLL Control"}, ++ ++ {"AUX Jack", NULL, "AUXR"}, ++ {"AUX Jack", NULL, "AUXL"}, ++ {"AUX Jack", NULL, "PLL Control"}, ++ ++ /* Assume Mic1 is linked to Headset and Mic2 to on-board mic */ ++ {"MIC Jack", NULL, "MIC1"}, ++ {"MIC Jack", NULL, "PLL Control"}, ++ {"Onboard MIC", NULL, "MIC2"}, ++ {"Onboard MIC", NULL, "PLL Control"}, ++}; ++ ++/* machine stream operations */ ++ ++static int snd_rpi_iqaudio_codec_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ int ret; ++ ++ /* Set bclk ratio to align with codec's BCLK rate */ ++ ret = snd_soc_dai_set_bclk_ratio(cpu_dai, 64); ++ if (ret) { ++ dev_err(rtd->dev, "Failed to set CPU BLCK ratio\n"); ++ return ret; ++ } ++ ++ /* Set MCLK frequency to codec, onboard 11.2896MHz clock */ ++ return snd_soc_dai_set_sysclk(codec_dai, DA7213_CLKSRC_MCLK, 11289600, ++ SND_SOC_CLOCK_OUT); ++} ++ ++static int snd_rpi_iqaudio_codec_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ unsigned int samplerate = params_rate(params); ++ ++ switch (samplerate) { ++ case 8000: ++ case 16000: ++ case 32000: ++ case 48000: ++ case 96000: ++ pll_out = DA7213_PLL_FREQ_OUT_98304000; ++ return 0; ++ case 44100: ++ case 88200: ++ pll_out = DA7213_PLL_FREQ_OUT_90316800; ++ return 0; ++ default: ++ dev_err(rtd->dev,"Unsupported samplerate %d\n", samplerate); ++ return -EINVAL; ++ } ++} ++ ++static const struct snd_soc_ops snd_rpi_iqaudio_codec_ops = { ++ .hw_params = snd_rpi_iqaudio_codec_hw_params, ++}; ++ ++ ++static struct snd_soc_dai_link snd_rpi_iqaudio_codec_dai[] = { ++{ ++ .cpu_dai_name = "bcm2708-i2s.0", ++ .codec_dai_name = "da7213-hifi", ++ .platform_name = "bmc2708-i2s.0", ++ .codec_name = "da7213.1-001a", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ .init = snd_rpi_iqaudio_codec_init, ++ .ops = &snd_rpi_iqaudio_codec_ops, ++ .symmetric_rates = 1, ++ .symmetric_channels = 1, ++ .symmetric_samplebits = 1, ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_iqaudio_codec = { ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_iqaudio_codec_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_iqaudio_codec_dai), ++ .dapm_widgets = dapm_widgets, ++ .num_dapm_widgets = ARRAY_SIZE(dapm_widgets), ++ .dapm_routes = audio_map, ++ .num_dapm_routes = ARRAY_SIZE(audio_map), ++}; ++ ++static int snd_rpi_iqaudio_codec_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ ++ snd_rpi_iqaudio_codec.dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_card *card = &snd_rpi_iqaudio_codec; ++ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_codec_dai[0]; ++ ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ if (i2s_node) { ++ dai->cpu_dai_name = NULL; ++ dai->cpu_of_node = i2s_node; ++ dai->platform_name = NULL; ++ dai->platform_of_node = i2s_node; ++ } ++ ++ if (of_property_read_string(pdev->dev.of_node, "card_name", ++ &card->name)) ++ card->name = "IQaudIOCODEC"; ++ ++ if (of_property_read_string(pdev->dev.of_node, "dai_name", ++ &dai->name)) ++ dai->name = "IQaudIO CODEC"; ++ ++ if (of_property_read_string(pdev->dev.of_node, ++ "dai_stream_name", &dai->stream_name)) ++ dai->stream_name = "IQaudIO CODEC HiFi v1.1"; ++ ++ } ++ ++ ret = snd_soc_register_card(&snd_rpi_iqaudio_codec); ++ if (ret) { ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int snd_rpi_iqaudio_codec_remove(struct platform_device *pdev) ++{ ++ return snd_soc_unregister_card(&snd_rpi_iqaudio_codec); ++} ++ ++static const struct of_device_id iqaudio_of_match[] = { ++ { .compatible = "iqaudio,iqaudio-codec", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, iqaudio_of_match); ++ ++static struct platform_driver snd_rpi_iqaudio_codec_driver = { ++ .driver = { ++ .name = "snd-rpi-iqaudio-codec", ++ .owner = THIS_MODULE, ++ .of_match_table = iqaudio_of_match, ++ }, ++ .probe = snd_rpi_iqaudio_codec_probe, ++ .remove = snd_rpi_iqaudio_codec_remove, ++}; ++ ++ ++ ++module_platform_driver(snd_rpi_iqaudio_codec_driver); ++ ++MODULE_AUTHOR("Gordon Garrity "); ++MODULE_DESCRIPTION("ASoC Driver for IQaudIO CODEC"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.19/950-0497-Revert-smsc95xx-dynamically-fix-up-TX-buffer-alignme.patch b/target/linux/brcm2708/patches-4.19/950-0497-Revert-smsc95xx-dynamically-fix-up-TX-buffer-alignme.patch new file mode 100644 index 000000000..08532bda5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0497-Revert-smsc95xx-dynamically-fix-up-TX-buffer-alignme.patch @@ -0,0 +1,60 @@ +From fb13c1342c81bb0c06afdcfe1e8561e8a6e149d7 Mon Sep 17 00:00:00 2001 +From: P33M +Date: Tue, 14 May 2019 14:55:19 +0100 +Subject: [PATCH 497/703] Revert "smsc95xx: dynamically fix up TX buffer + alignment with padding bytes" + +As reported in https://github.com/raspberrypi/linux/issues/2964 this +commit causes a regression corrupting non-option TCP ack packets. + +This reverts commit 96b972dc736d943f371a16ccca452a053d83c65b. +--- + drivers/net/usb/smsc95xx.c | 12 +++++------- + drivers/net/usb/smsc95xx.h | 2 +- + 2 files changed, 6 insertions(+), 8 deletions(-) + +--- a/drivers/net/usb/smsc95xx.c ++++ b/drivers/net/usb/smsc95xx.c +@@ -2082,9 +2082,7 @@ static struct sk_buff *smsc95xx_tx_fixup + struct sk_buff *skb, gfp_t flags) + { + bool csum = skb->ip_summed == CHECKSUM_PARTIAL; +- unsigned int align_bytes = -((uintptr_t)skb->data) & 0x3; +- int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM + align_bytes +- : SMSC95XX_TX_OVERHEAD + align_bytes; ++ int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; + u32 tx_cmd_a, tx_cmd_b; + + /* We do not advertise SG, so skbs should be already linearized */ +@@ -2118,16 +2116,16 @@ static struct sk_buff *smsc95xx_tx_fixup + } + } + +- skb_push(skb, 4 + align_bytes); +- tx_cmd_b = (u32)(skb->len - 4 - align_bytes); ++ skb_push(skb, 4); ++ tx_cmd_b = (u32)(skb->len - 4); + if (csum) + tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; + cpu_to_le32s(&tx_cmd_b); + memcpy(skb->data, &tx_cmd_b, 4); + + skb_push(skb, 4); +- tx_cmd_a = (u32)(skb->len - 8 - align_bytes) | TX_CMD_A_FIRST_SEG_ | +- (align_bytes << 16) | TX_CMD_A_LAST_SEG_; ++ tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | ++ TX_CMD_A_LAST_SEG_; + cpu_to_le32s(&tx_cmd_a); + memcpy(skb->data, &tx_cmd_a, 4); + +--- a/drivers/net/usb/smsc95xx.h ++++ b/drivers/net/usb/smsc95xx.h +@@ -21,7 +21,7 @@ + #define _SMSC95XX_H + + /* Tx command words */ +-#define TX_CMD_A_DATA_OFFSET_ (0x00030000) /* Data Start Offset */ ++#define TX_CMD_A_DATA_OFFSET_ (0x001F0000) /* Data Start Offset */ + #define TX_CMD_A_FIRST_SEG_ (0x00002000) /* First Segment */ + #define TX_CMD_A_LAST_SEG_ (0x00001000) /* Last Segment */ + #define TX_CMD_A_BUF_SIZE_ (0x000007FF) /* Buffer Size */ diff --git a/target/linux/brcm2708/patches-4.19/950-0498-configs-Enable-PIDs-cgroup.patch b/target/linux/brcm2708/patches-4.19/950-0498-configs-Enable-PIDs-cgroup.patch new file mode 100644 index 000000000..67c31a54b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0498-configs-Enable-PIDs-cgroup.patch @@ -0,0 +1,26 @@ +From 8bf83aaaa40f140bc14521ac2f1dd08a8463cc87 Mon Sep 17 00:00:00 2001 +From: Henrique Gontijo +Date: Sun, 12 May 2019 17:11:02 -0700 +Subject: [PATCH 498/703] configs: Enable PIDs cgroup + +My use case to is to allow Kubernetes master to run on Raspberry Pi 3. +Kubernetes introduced [Pid limiting](https://github.com/kubernetes/enhancements/blob/master/keps/sig-node/20190129-pid-limiting.md), +on v.1.14.0 which includes [Pod Pids Limit](https://github.com/kubernetes/kubernetes/commit/bce9d5f2043bd86964c9fec80d466e47776071bc) +and [Node Pids Limit](https://github.com/kubernetes/kubernetes/commit/2597a1d97ef4d8f54b1ca661453e32794b756909#diff-fa76bb6ae2d9b4bb3d023737fe5e6029R333) +that requires pids cgroup. + +See: https://github.com/raspberrypi/linux/pull/2968 +--- + arch/arm/configs/bcm2709_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -20,6 +20,7 @@ CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y ++CONFIG_CGROUP_PIDS=y + CONFIG_NAMESPACES=y + CONFIG_USER_NS=y + CONFIG_SCHED_AUTOGROUP=y diff --git a/target/linux/brcm2708/patches-4.19/950-0499-w1-ds2408-reset-on-output_write-retry-with-readback.patch b/target/linux/brcm2708/patches-4.19/950-0499-w1-ds2408-reset-on-output_write-retry-with-readback.patch new file mode 100644 index 000000000..a767102b4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0499-w1-ds2408-reset-on-output_write-retry-with-readback.patch @@ -0,0 +1,140 @@ +From cc87b27a07e5da8d072b3c4e80a3f92cda44e106 Mon Sep 17 00:00:00 2001 +From: Jean-Francois Dagenais +Date: Thu, 28 Mar 2019 12:41:11 -0400 +Subject: [PATCH 499/703] w1: ds2408: reset on output_write retry with readback + +commit 49695ac46861180baf2b2b92c62da8619b6bf28f upstream. + +When we have success in 'Channel Access Write' but reading back latch +states fails, a write is retried without doing a proper slave reset. +This leads to protocol errors as the slave treats the next 'Channel +Access Write' as the continuation of previous command. + +This commit is fixing this by making sure if the retry loop re-runs, a +reset is performed, whatever the failure (CONFIRM_BYTE or the read +back). + +The loop was quite due for a cleanup and this change mandated it. By +isolating the CONFIG_W1_SLAVE_DS2408_READBACK case into it's own +function, we vastly reduce the visual and branching(runtime and +compile-time) noise. + +Reported-by: Mariusz Bialonczyk +Tested-by: Mariusz Bialonczyk +Signed-off-by: Jean-Francois Dagenais +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2408.c | 76 ++++++++++++++++++----------------- + 1 file changed, 39 insertions(+), 37 deletions(-) + +--- a/drivers/w1/slaves/w1_ds2408.c ++++ b/drivers/w1/slaves/w1_ds2408.c +@@ -138,14 +138,37 @@ static ssize_t status_control_read(struc + W1_F29_REG_CONTROL_AND_STATUS, buf); + } + ++#ifdef fCONFIG_W1_SLAVE_DS2408_READBACK ++static bool optional_read_back_valid(struct w1_slave *sl, u8 expected) ++{ ++ u8 w1_buf[3]; ++ ++ if (w1_reset_resume_command(sl->master)) ++ return false; ++ ++ w1_buf[0] = W1_F29_FUNC_READ_PIO_REGS; ++ w1_buf[1] = W1_F29_REG_OUTPUT_LATCH_STATE; ++ w1_buf[2] = 0; ++ ++ w1_write_block(sl->master, w1_buf, 3); ++ ++ return (w1_read_8(sl->master) == expected); ++} ++#else ++static bool optional_read_back_valid(struct w1_slave *sl, u8 expected) ++{ ++ return true; ++} ++#endif ++ + static ssize_t output_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t off, size_t count) + { + struct w1_slave *sl = kobj_to_w1_slave(kobj); + u8 w1_buf[3]; +- u8 readBack; + unsigned int retries = W1_F29_RETRIES; ++ ssize_t bytes_written = -EIO; + + if (count != 1 || off != 0) + return -EFAULT; +@@ -155,54 +178,33 @@ static ssize_t output_write(struct file + dev_dbg(&sl->dev, "mutex locked"); + + if (w1_reset_select_slave(sl)) +- goto error; ++ goto out; + +- while (retries--) { ++ do { + w1_buf[0] = W1_F29_FUNC_CHANN_ACCESS_WRITE; + w1_buf[1] = *buf; + w1_buf[2] = ~(*buf); +- w1_write_block(sl->master, w1_buf, 3); + +- readBack = w1_read_8(sl->master); ++ w1_write_block(sl->master, w1_buf, 3); + +- if (readBack != W1_F29_SUCCESS_CONFIRM_BYTE) { +- if (w1_reset_resume_command(sl->master)) +- goto error; +- /* try again, the slave is ready for a command */ +- continue; ++ if (w1_read_8(sl->master) == W1_F29_SUCCESS_CONFIRM_BYTE && ++ optional_read_back_valid(sl, *buf)) { ++ bytes_written = 1; ++ goto out; + } + +-#ifdef CONFIG_W1_SLAVE_DS2408_READBACK +- /* here the master could read another byte which +- would be the PIO reg (the actual pin logic state) +- since in this driver we don't know which pins are +- in and outs, there's no value to read the state and +- compare. with (*buf) so end this command abruptly: */ + if (w1_reset_resume_command(sl->master)) +- goto error; ++ goto out; /* unrecoverable error */ ++ /* try again, the slave is ready for a command */ ++ } while (--retries); + +- /* go read back the output latches */ +- /* (the direct effect of the write above) */ +- w1_buf[0] = W1_F29_FUNC_READ_PIO_REGS; +- w1_buf[1] = W1_F29_REG_OUTPUT_LATCH_STATE; +- w1_buf[2] = 0; +- w1_write_block(sl->master, w1_buf, 3); +- /* read the result of the READ_PIO_REGS command */ +- if (w1_read_8(sl->master) == *buf) +-#endif +- { +- /* success! */ +- mutex_unlock(&sl->master->bus_mutex); +- dev_dbg(&sl->dev, +- "mutex unlocked, retries:%d", retries); +- return 1; +- } +- } +-error: ++out: + mutex_unlock(&sl->master->bus_mutex); +- dev_dbg(&sl->dev, "mutex unlocked in error, retries:%d", retries); + +- return -EIO; ++ dev_dbg(&sl->dev, "%s, mutex unlocked retries:%d\n", ++ (bytes_written > 0) ? "succeeded" : "error", retries); ++ ++ return bytes_written; + } + + diff --git a/target/linux/brcm2708/patches-4.19/950-0500-w1-ds2482-cosmetic-fixes-after-54865314f5a1.patch b/target/linux/brcm2708/patches-4.19/950-0500-w1-ds2482-cosmetic-fixes-after-54865314f5a1.patch new file mode 100644 index 000000000..6d8277a71 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0500-w1-ds2482-cosmetic-fixes-after-54865314f5a1.patch @@ -0,0 +1,91 @@ +From cf423c8b0d5d1fa5cc0c9427b5282aa888b5eaef Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Mon, 4 Mar 2019 12:23:36 +0100 +Subject: [PATCH 500/703] w1: ds2482: cosmetic fixes after 54865314f5a1 + +commit 5cb27d30fc3a281e830a2099d520b469e2b82008 upstream. + +We have a helper function ds2482_calculate_config() which is calculating +the config value, so just use it instead of passing the same variable +in all calls to this function. + +Also fixes the placement of module parameters to match with: +50fa2951bd74 (w1: Organize driver source to natural/common order) +by Andrew F. Davis + +Signed-off-by: Mariusz Bialonczyk +Cc: Andrew Worsley +Cc: Andrew F. Davis +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/masters/ds2482.c | 18 +++++++++++------- + 1 file changed, 11 insertions(+), 7 deletions(-) + +--- a/drivers/w1/masters/ds2482.c ++++ b/drivers/w1/masters/ds2482.c +@@ -37,6 +37,11 @@ module_param_named(active_pullup, ds2482 + MODULE_PARM_DESC(active_pullup, "Active pullup (apply to all buses): " \ + "0-disable, 1-enable (default)"); + ++/* extra configurations - e.g. 1WS */ ++static int extra_config; ++module_param(extra_config, int, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(extra_config, "Extra Configuration settings 1=APU,2=PPM,3=SPU,8=1WS"); ++ + /** + * The DS2482 registers - there are 3 registers that are addressed by a read + * pointer. The read pointer is set by the last command executed. +@@ -70,8 +75,6 @@ MODULE_PARM_DESC(active_pullup, "Active + #define DS2482_REG_CFG_PPM 0x02 /* presence pulse masking */ + #define DS2482_REG_CFG_APU 0x01 /* active pull-up */ + +-/* extra configurations - e.g. 1WS */ +-static int extra_config; + + /** + * Write and verify codes for the CHANNEL_SELECT command (DS2482-800 only). +@@ -130,6 +133,8 @@ struct ds2482_data { + */ + static inline u8 ds2482_calculate_config(u8 conf) + { ++ conf |= extra_config; ++ + if (ds2482_active_pullup) + conf |= DS2482_REG_CFG_APU; + +@@ -405,7 +410,7 @@ static u8 ds2482_w1_reset_bus(void *data + /* If the chip did reset since detect, re-config it */ + if (err & DS2482_REG_STS_RST) + ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, +- ds2482_calculate_config(extra_config)); ++ ds2482_calculate_config(0x00)); + } + + mutex_unlock(&pdev->access_lock); +@@ -431,7 +436,8 @@ static u8 ds2482_w1_set_pullup(void *dat + ds2482_wait_1wire_idle(pdev); + /* note: it seems like both SPU and APU have to be set! */ + retval = ds2482_send_cmd_data(pdev, DS2482_CMD_WRITE_CONFIG, +- ds2482_calculate_config(extra_config|DS2482_REG_CFG_SPU|DS2482_REG_CFG_APU)); ++ ds2482_calculate_config(DS2482_REG_CFG_SPU | ++ DS2482_REG_CFG_APU)); + ds2482_wait_1wire_idle(pdev); + } + +@@ -484,7 +490,7 @@ static int ds2482_probe(struct i2c_clien + + /* Set all config items to 0 (off) */ + ds2482_send_cmd_data(data, DS2482_CMD_WRITE_CONFIG, +- ds2482_calculate_config(extra_config)); ++ ds2482_calculate_config(0x00)); + + mutex_init(&data->access_lock); + +@@ -559,7 +565,5 @@ module_i2c_driver(ds2482_driver); + + MODULE_AUTHOR("Ben Gardner "); + MODULE_DESCRIPTION("DS2482 driver"); +-module_param(extra_config, int, S_IRUGO | S_IWUSR); +-MODULE_PARM_DESC(extra_config, "Extra Configuration settings 1=APU,2=PPM,3=SPU,8=1WS"); + + MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm2708/patches-4.19/950-0501-sound-pcm512x-codec-Adding-352.8kHz-samplerate-suppo.patch b/target/linux/brcm2708/patches-4.19/950-0501-sound-pcm512x-codec-Adding-352.8kHz-samplerate-suppo.patch new file mode 100644 index 000000000..146b48393 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0501-sound-pcm512x-codec-Adding-352.8kHz-samplerate-suppo.patch @@ -0,0 +1,21 @@ +From d188a0a3472f80003d2558639ebeb41e190a4b9b Mon Sep 17 00:00:00 2001 +From: Klaus Schulz +Date: Thu, 16 May 2019 13:35:32 +0200 +Subject: [PATCH 501/703] sound: pcm512x-codec: Adding 352.8kHz samplerate + support + +--- + sound/soc/codecs/pcm512x.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/sound/soc/codecs/pcm512x.c ++++ b/sound/soc/codecs/pcm512x.c +@@ -542,7 +542,7 @@ static unsigned long pcm512x_ncp_target( + + static const u32 pcm512x_dai_rates[] = { + 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000, +- 88200, 96000, 176400, 192000, 384000, ++ 88200, 96000, 176400, 192000, 352800, 384000, + }; + + static const struct snd_pcm_hw_constraint_list constraints_slave = { diff --git a/target/linux/brcm2708/patches-4.19/950-0502-ASoC-decommissioning-driver-for-3Dlab-Nano-soundcard.patch b/target/linux/brcm2708/patches-4.19/950-0502-ASoC-decommissioning-driver-for-3Dlab-Nano-soundcard.patch new file mode 100644 index 000000000..af2c44628 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0502-ASoC-decommissioning-driver-for-3Dlab-Nano-soundcard.patch @@ -0,0 +1,522 @@ +From 4f8dc6c030b1d24c4bf270637eba452ad9b9dd9b Mon Sep 17 00:00:00 2001 +From: GT +Date: Sat, 6 Apr 2019 21:16:39 +0100 +Subject: [PATCH 502/703] ASoC: decommissioning driver for 3Dlab Nano soundcard + +--- + .../overlays/3dlab-nano-player-overlay.dts | 32 -- + arch/arm/boot/dts/overlays/Makefile | 1 - + arch/arm/boot/dts/overlays/README | 6 - + arch/arm/configs/bcm2709_defconfig | 1 - + arch/arm/configs/bcmrpi_defconfig | 1 - + sound/soc/bcm/3dlab-nano-player.c | 370 ------------------ + sound/soc/bcm/Kconfig | 6 - + sound/soc/bcm/Makefile | 6 +- + 8 files changed, 2 insertions(+), 421 deletions(-) + delete mode 100644 arch/arm/boot/dts/overlays/3dlab-nano-player-overlay.dts + delete mode 100644 sound/soc/bcm/3dlab-nano-player.c + +--- a/arch/arm/boot/dts/overlays/3dlab-nano-player-overlay.dts ++++ /dev/null +@@ -1,32 +0,0 @@ +-// Definitions for 3Dlab Nano Player +-/dts-v1/; +-/plugin/; +- +-/ { +- compatible = "brcm,bcm2708"; +- +- fragment@0 { +- target = <&i2s>; +- __overlay__ { +- status = "okay"; +- }; +- }; +- +- fragment@1 { +- target = <&i2c>; +- __overlay__ { +- #address-cells = <1>; +- #size-cells = <0>; +- status = "okay"; +- +- nano-player@41 { +- compatible = "3dlab,nano-player"; +- reg = <0x41>; +- i2s-controller = <&i2s>; +- status = "okay"; +- }; +- }; +- }; +-}; +- +-// EOF +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -1,7 +1,6 @@ + # Overlays for the Raspberry Pi platform + + dtbo-$(CONFIG_ARCH_BCM2835) += \ +- 3dlab-nano-player.dtbo \ + adau1977-adc.dtbo \ + adau7002-simple.dtbo \ + ads1015.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -205,12 +205,6 @@ Params: + and the other i2c baudrate parameters. + + +-Name: 3dlab-nano-player +-Info: Configures the 3Dlab Nano Player +-Load: dtoverlay=3dlab-nano-player +-Params: +- +- + Name: adau1977-adc + Info: Overlay for activation of ADAU1977 ADC codec over I2C for control + and I2S for data. +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -908,7 +908,6 @@ CONFIG_SND_USB_6FIRE=m + CONFIG_SND_USB_HIFACE=m + CONFIG_SND_SOC=m + CONFIG_SND_BCM2835_SOC_I2S=m +-CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -900,7 +900,6 @@ CONFIG_SND_USB_6FIRE=m + CONFIG_SND_USB_HIFACE=m + CONFIG_SND_SOC=m + CONFIG_SND_BCM2835_SOC_I2S=m +-CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER=m + CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m + CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m +--- a/sound/soc/bcm/3dlab-nano-player.c ++++ /dev/null +@@ -1,370 +0,0 @@ +-/* +- * 3Dlab Nano Player ALSA SoC Audio driver. +- * +- * Copyright (C) 2018 3Dlab. +- * +- * Author: GT +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License +- * version 2 as published by the Free Software Foundation. +- * +- * This program is distributed in the hope that it will be useful, but +- * WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +- * General Public License for more details. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-#define NANO_ID 0x00 +-#define NANO_VER 0x01 +-#define NANO_CFG 0x02 +-#define NANO_STATUS 0x03 +-#define NANO_SPI_ADDR 0x04 +-#define NANO_SPI_DATA 0x05 +- +-#define NANO_ID_VAL 0x3D +-#define NANO_CFG_OFF 0x00 +-#define NANO_CFG_MULT1 0 +-#define NANO_CFG_MULT2 1 +-#define NANO_CFG_MULT4 2 +-#define NANO_CFG_MULT8 3 +-#define NANO_CFG_MULT16 4 +-#define NANO_CFG_CLK22 0 +-#define NANO_CFG_CLK24 BIT(3) +-#define NANO_CFG_DSD BIT(4) +-#define NANO_CFG_ENA BIT(5) +-#define NANO_CFG_BLINK BIT(6) +-#define NANO_STATUS_P1 BIT(0) +-#define NANO_STATUS_P2 BIT(1) +-#define NANO_STATUS_FLG BIT(2) +-#define NANO_STATUS_CLK BIT(3) +-#define NANO_SPI_READ 0 +-#define NANO_SPI_WRITE BIT(5) +- +-#define NANO_DAC_CTRL1 0x00 +-#define NANO_DAC_CTRL2 0x01 +-#define NANO_DAC_CTRL3 0x02 +-#define NANO_DAC_LATT 0x03 +-#define NANO_DAC_RATT 0x04 +- +-#define NANO_CTRL2_VAL 0x22 +- +-static int nano_player_spi_write(struct regmap *map, +- unsigned int reg, unsigned int val) +-{ +- /* indirect register access */ +- regmap_write(map, NANO_SPI_DATA, val); +- regmap_write(map, NANO_SPI_ADDR, reg | NANO_SPI_WRITE); +- return 0; +-} +- +-static int nano_player_ctrl_info(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_info *uinfo) +-{ +- /* describe control element */ +- if (strstr(kcontrol->id.name, "Volume")) { +- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; +- uinfo->count = 1; +- uinfo->value.integer.min = 0; +- uinfo->value.integer.max = 100; +- } else { +- uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; +- uinfo->count = 1; +- uinfo->value.integer.min = 0; +- uinfo->value.integer.max = 1; +- } +- +- return 0; +-} +- +-static int nano_player_ctrl_put(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- /* program control value to hardware */ +- struct snd_soc_card *card = snd_kcontrol_chip(kcontrol); +- struct regmap *regmap = snd_soc_card_get_drvdata(card); +- +- if (strstr(kcontrol->id.name, "Volume")) { +- unsigned int vol = ucontrol->value.integer.value[0]; +- unsigned int att = 255 - (2 * (100 - vol)); +- +- nano_player_spi_write(regmap, NANO_DAC_LATT, att); +- nano_player_spi_write(regmap, NANO_DAC_RATT, att); +- kcontrol->private_value = vol; +- } else { +- unsigned int mute = ucontrol->value.integer.value[0]; +- unsigned int reg = NANO_CTRL2_VAL | mute; +- +- nano_player_spi_write(regmap, NANO_DAC_CTRL2, reg); +- kcontrol->private_value = mute; +- } +- return 0; +-} +- +-static int nano_player_ctrl_get(struct snd_kcontrol *kcontrol, +- struct snd_ctl_elem_value *ucontrol) +-{ +- /* return last programmed value */ +- ucontrol->value.integer.value[0] = kcontrol->private_value; +- return 0; +-} +- +-#define SOC_NANO_PLAYER_CTRL(xname) \ +-{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ +- .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, \ +- .info = nano_player_ctrl_info, \ +- .put = nano_player_ctrl_put, \ +- .get = nano_player_ctrl_get } +- +-static const struct snd_kcontrol_new nano_player_controls[] = { +- SOC_NANO_PLAYER_CTRL("Master Playback Volume"), +- SOC_NANO_PLAYER_CTRL("Master Playback Switch"), +-}; +- +-static const unsigned int nano_player_rates[] = { +- 44100, 48000, 88200, 96000, 176400, 192000, 352800, 384000, +- 705600, 768000 /* only possible with fast clocks */ +-}; +- +-static struct snd_pcm_hw_constraint_list nano_player_constraint_rates = { +- .list = nano_player_rates, +- .count = ARRAY_SIZE(nano_player_rates), +-}; +- +-static int nano_player_init(struct snd_soc_pcm_runtime *rtd) +-{ +- struct snd_soc_card *card = rtd->card; +- struct regmap *regmap = snd_soc_card_get_drvdata(card); +- struct snd_soc_pcm_stream *cpu = &rtd->cpu_dai->driver->playback; +- struct snd_soc_pcm_stream *codec = &rtd->codec_dai->driver->playback; +- unsigned int sample_bits = 32; +- unsigned int val; +- +- /* configure cpu dai */ +- cpu->formats |= SNDRV_PCM_FMTBIT_DSD_U32_LE; +- cpu->rate_max = 768000; +- +- /* configure dummy codec dai */ +- codec->rate_min = 44100; +- codec->rates = SNDRV_PCM_RATE_KNOT; +- codec->formats = SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE; +- +- /* configure max supported rate */ +- regmap_read(regmap, NANO_STATUS, &val); +- if (val & NANO_STATUS_CLK) { +- dev_notice(card->dev, "Board with fast clocks installed\n"); +- codec->rate_max = 768000; +- } else { +- dev_notice(card->dev, "Board with normal clocks installed\n"); +- codec->rate_max = 384000; +- } +- +- /* frame length enforced by hardware */ +- return snd_soc_dai_set_bclk_ratio(rtd->cpu_dai, sample_bits * 2); +-} +- +-static int nano_player_startup(struct snd_pcm_substream *substream) +-{ +- return snd_pcm_hw_constraint_list(substream->runtime, 0, +- SNDRV_PCM_HW_PARAM_RATE, +- &nano_player_constraint_rates); +-} +- +-static int nano_player_hw_params(struct snd_pcm_substream *substream, +- struct snd_pcm_hw_params *params) +-{ +- struct snd_soc_pcm_runtime *rtd = substream->private_data; +- struct snd_soc_card *card = rtd->card; +- struct regmap *regmap = snd_soc_card_get_drvdata(card); +- unsigned int config = NANO_CFG_ENA; +- struct snd_mask *fmt; +- +- /* configure PCM or DSD */ +- fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); +- if (snd_mask_test(fmt, SNDRV_PCM_FORMAT_DSD_U32_LE)) { +- /* embed DSD in PCM data */ +- snd_mask_none(fmt); +- snd_mask_set(fmt, SNDRV_PCM_FORMAT_S32_LE); +- /* enable DSD mode */ +- config |= NANO_CFG_DSD; +- } +- +- /* configure clocks */ +- switch (params_rate(params)) { +- case 44100: +- config |= NANO_CFG_MULT1 | NANO_CFG_CLK22; +- break; +- case 88200: +- config |= NANO_CFG_MULT2 | NANO_CFG_CLK22; +- break; +- case 176400: +- config |= NANO_CFG_MULT4 | NANO_CFG_CLK22; +- break; +- case 352800: +- config |= NANO_CFG_MULT8 | NANO_CFG_CLK22; +- break; +- case 705600: +- config |= NANO_CFG_MULT16 | NANO_CFG_CLK22; +- break; +- case 48000: +- config |= NANO_CFG_MULT1 | NANO_CFG_CLK24; +- break; +- case 96000: +- config |= NANO_CFG_MULT2 | NANO_CFG_CLK24; +- break; +- case 192000: +- config |= NANO_CFG_MULT4 | NANO_CFG_CLK24; +- break; +- case 384000: +- config |= NANO_CFG_MULT8 | NANO_CFG_CLK24; +- break; +- case 768000: +- config |= NANO_CFG_MULT16 | NANO_CFG_CLK24; +- break; +- default: +- return -EINVAL; +- } +- +- dev_dbg(card->dev, "Send CFG register 0x%02X\n", config); +- return regmap_write(regmap, NANO_CFG, config); +-} +- +-static struct snd_soc_ops nano_player_ops = { +- .startup = nano_player_startup, +- .hw_params = nano_player_hw_params, +-}; +- +-static struct snd_soc_dai_link nano_player_link = { +- .name = "3Dlab Nano Player", +- .stream_name = "3Dlab Nano Player HiFi", +- .platform_name = "bcm2708-i2s.0", +- .cpu_dai_name = "bcm2708-i2s.0", +- .codec_name = "snd-soc-dummy", +- .codec_dai_name = "snd-soc-dummy-dai", +- .dai_fmt = SND_SOC_DAIFMT_I2S | +- SND_SOC_DAIFMT_CONT | +- SND_SOC_DAIFMT_NB_NF | +- SND_SOC_DAIFMT_CBM_CFM, +- .init = nano_player_init, +- .ops = &nano_player_ops, +-}; +- +-static const struct regmap_config nano_player_regmap = { +- .reg_bits = 8, +- .val_bits = 8, +- .max_register = 128, +- .cache_type = REGCACHE_RBTREE, +-}; +- +-static int nano_player_card_probe(struct snd_soc_card *card) +-{ +- struct regmap *regmap = snd_soc_card_get_drvdata(card); +- unsigned int val; +- +- /* check hardware integrity */ +- regmap_read(regmap, NANO_ID, &val); +- if (val != NANO_ID_VAL) { +- dev_err(card->dev, "Invalid ID register 0x%02X\n", val); +- return -ENODEV; +- } +- +- /* report version to the user */ +- regmap_read(regmap, NANO_VER, &val); +- dev_notice(card->dev, "Started 3Dlab Nano Player driver (v%d)\n", val); +- +- /* enable internal audio bus and blink status LED */ +- return regmap_write(regmap, NANO_CFG, NANO_CFG_ENA | NANO_CFG_BLINK); +-} +- +-static int nano_player_card_remove(struct snd_soc_card *card) +-{ +- /* disable internal audio bus */ +- struct regmap *regmap = snd_soc_card_get_drvdata(card); +- +- return regmap_write(regmap, NANO_CFG, NANO_CFG_OFF); +-} +- +-static struct snd_soc_card nano_player_card = { +- .name = "3Dlab_Nano_Player", +- .owner = THIS_MODULE, +- .dai_link = &nano_player_link, +- .num_links = 1, +- .controls = nano_player_controls, +- .num_controls = ARRAY_SIZE(nano_player_controls), +- .probe = nano_player_card_probe, +- .remove = nano_player_card_remove, +-}; +- +-static int nano_player_i2c_probe(struct i2c_client *i2c, +- const struct i2c_device_id *id) +-{ +- struct regmap *regmap; +- int ret; +- +- regmap = devm_regmap_init_i2c(i2c, &nano_player_regmap); +- if (IS_ERR(regmap)) { +- ret = PTR_ERR(regmap); +- dev_err(&i2c->dev, "Failed to init regmap %d\n", ret); +- return ret; +- } +- +- if (i2c->dev.of_node) { +- struct snd_soc_dai_link *dai = &nano_player_link; +- struct device_node *node; +- +- /* cpu handle configured by device tree */ +- node = of_parse_phandle(i2c->dev.of_node, "i2s-controller", 0); +- if (node) { +- dai->platform_name = NULL; +- dai->platform_of_node = node; +- dai->cpu_dai_name = NULL; +- dai->cpu_of_node = node; +- } +- } +- +- nano_player_card.dev = &i2c->dev; +- snd_soc_card_set_drvdata(&nano_player_card, regmap); +- ret = devm_snd_soc_register_card(&i2c->dev, &nano_player_card); +- +- if (ret && ret != -EPROBE_DEFER) +- dev_err(&i2c->dev, "Failed to register card %d\n", ret); +- +- return ret; +-} +- +-static const struct of_device_id nano_player_of_match[] = { +- { .compatible = "3dlab,nano-player", }, +- { } +-}; +-MODULE_DEVICE_TABLE(of, nano_player_of_match); +- +-static const struct i2c_device_id nano_player_i2c_id[] = { +- { "nano-player", 0 }, +- { } +-}; +-MODULE_DEVICE_TABLE(i2c, nano_player_i2c_id); +- +-static struct i2c_driver nano_player_i2c_driver = { +- .probe = nano_player_i2c_probe, +- .id_table = nano_player_i2c_id, +- .driver = { +- .name = "nano-player", +- .owner = THIS_MODULE, +- .of_match_table = nano_player_of_match, +- }, +-}; +- +-module_i2c_driver(nano_player_i2c_driver); +- +-MODULE_DESCRIPTION("ASoC 3Dlab Nano Player driver"); +-MODULE_AUTHOR("GT "); +-MODULE_LICENSE("GPL v2"); +- +-/* EOF */ +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -17,12 +17,6 @@ config SND_SOC_CYGNUS + + If you don't know what to do here, say N. + +-config SND_BCM2708_SOC_3DLAB_NANO_PLAYER +- tristate "Support for 3Dlab Nano Player" +- depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +- help +- Say Y or M if you want to add support for 3Dlab Nano Player. +- + config SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD + tristate "Support for Google voiceHAT soundcard" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -12,7 +12,6 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- + snd-soc-googlevoicehat-codec-objs := googlevoicehat-codec.o + + # BCM2708 Machine Support +-snd-soc-3dlab-nano-player-objs := 3dlab-nano-player.o + snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o + snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o + snd-soc-justboom-dac-objs := justboom-dac.o +@@ -20,7 +19,7 @@ snd-soc-rpi-cirrus-objs := rpi-cirrus.o + snd-soc-rpi-proto-objs := rpi-proto.o + snd-soc-iqaudio-codec-objs := iqaudio-codec.o + snd-soc-iqaudio-dac-objs := iqaudio-dac.o +- snd-soc-i-sabre-q2m-objs := i-sabre-q2m.o ++snd-soc-i-sabre-q2m-objs := i-sabre-q2m.o + snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o + snd-soc-audioinjector-octo-soundcard-objs := audioinjector-octo-soundcard.o + snd-soc-audiosense-pi-objs := audiosense-pi.o +@@ -36,7 +35,6 @@ snd-soc-fe-pi-audio-objs := fe-pi-audio. + snd-soc-rpi-simple-soundcard-objs := rpi-simple-soundcard.o + snd-soc-rpi-wm8804-soundcard-objs := rpi-wm8804-soundcard.o + +-obj-$(CONFIG_SND_BCM2708_SOC_3DLAB_NANO_PLAYER) += snd-soc-3dlab-nano-player.o + obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o +@@ -45,7 +43,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) + obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o + obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC) += snd-soc-iqaudio-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o +- obj-$(CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M) += snd-soc-i-sabre-q2m.o ++obj-$(CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M) += snd-soc-i-sabre-q2m.o + obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o + obj-$(CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD) += snd-soc-audioinjector-octo-soundcard.o + obj-$(CONFIG_SND_AUDIOSENSE_PI) += snd-soc-audiosense-pi.o diff --git a/target/linux/brcm2708/patches-4.19/950-0503-.gitignore-Add-.dtbo-explicitly.patch b/target/linux/brcm2708/patches-4.19/950-0503-.gitignore-Add-.dtbo-explicitly.patch new file mode 100644 index 000000000..613180083 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0503-.gitignore-Add-.dtbo-explicitly.patch @@ -0,0 +1,22 @@ +From 44cadbedb79dbbae0cea7dd008bcf2583570e883 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 21 May 2019 15:17:33 +0100 +Subject: [PATCH 503/703] .gitignore: Add *.dtbo explicitly + +Signed-off-by: popcornmix +--- + .gitignore | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/.gitignore ++++ b/.gitignore +@@ -15,7 +15,8 @@ + *.bin + *.bz2 + *.c.[012]*.* +-*.dtb* ++*.dtb ++*.dtbo + *.dtb.S + *.dwo + *.elf diff --git a/target/linux/brcm2708/patches-4.19/950-0504-Bluetooth-Check-key-sizes-only-when-Secure-Simple-Pa.patch b/target/linux/brcm2708/patches-4.19/950-0504-Bluetooth-Check-key-sizes-only-when-Secure-Simple-Pa.patch new file mode 100644 index 000000000..8e8fa07ad --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0504-Bluetooth-Check-key-sizes-only-when-Secure-Simple-Pa.patch @@ -0,0 +1,39 @@ +From 0b83f023796a12b822191c29b4313b161d68fbe7 Mon Sep 17 00:00:00 2001 +From: Marcel Holtmann +Date: Wed, 22 May 2019 09:05:40 +0200 +Subject: [PATCH 504/703] Bluetooth: Check key sizes only when Secure Simple + Pairing is enabled + +The encryption is only mandatory to be enforced when both sides are using +Secure Simple Pairing and this means the key size check makes only sense +in that case. + +On legacy Bluetooth 2.0 and earlier devices like mice the encryption was +optional and thus causing an issue if the key size check is not bound to +using Secure Simple Pairing. + +Fixes: d5bb334a8e17 ("Bluetooth: Align minimum encryption key size for LE and BR/EDR connections") +Signed-off-by: Marcel Holtmann +Cc: stable@vger.kernel.org +--- + net/bluetooth/hci_conn.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/net/bluetooth/hci_conn.c ++++ b/net/bluetooth/hci_conn.c +@@ -1272,8 +1272,13 @@ int hci_conn_check_link_mode(struct hci_ + return 0; + } + +- if (hci_conn_ssp_enabled(conn) && +- !test_bit(HCI_CONN_ENCRYPT, &conn->flags)) ++ /* If Secure Simple Pairing is not enabled, then legacy connection ++ * setup is used and no encryption or key sizes can be enforced. ++ */ ++ if (!hci_conn_ssp_enabled(conn)) ++ return 1; ++ ++ if (!test_bit(HCI_CONN_ENCRYPT, &conn->flags)) + return 0; + + return 1; diff --git a/target/linux/brcm2708/patches-4.19/950-0505-usb-dwc_otg-Clean-up-interrupt-claiming-code.patch b/target/linux/brcm2708/patches-4.19/950-0505-usb-dwc_otg-Clean-up-interrupt-claiming-code.patch new file mode 100644 index 000000000..e6795b4bf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0505-usb-dwc_otg-Clean-up-interrupt-claiming-code.patch @@ -0,0 +1,157 @@ +From 6ed82a6ca0e146b20e1d09dc7ec9d31706fc85c5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 7 May 2019 17:23:41 +0100 +Subject: [PATCH 505/703] usb: dwc_otg: Clean up interrupt claiming code + +The FIQ/IRQ interrupt number identification code is scattered through +the dwc_otg driver. Rationalise it, simplifying the code and solving +an existing issue. + +See: https://github.com/raspberrypi/linux/issues/2612 + +Signed-off-by: Phil Elwell +--- + drivers/usb/host/dwc_otg/dwc_otg_driver.c | 18 +++++++++----- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 10 +++----- + drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 6 +++++ + drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c | 26 +++----------------- + 4 files changed, 25 insertions(+), 35 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_driver.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c +@@ -624,11 +624,7 @@ static int dwc_otg_driver_remove( + * Free the IRQ + */ + if (otg_dev->common_irq_installed) { +-#ifdef PLATFORM_INTERFACE +- free_irq(platform_get_irq(_dev, 0), otg_dev); +-#else +- free_irq(_dev->irq, otg_dev); +-#endif ++ free_irq(otg_dev->os_dep.irq_num, otg_dev); + } else { + DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__); + return REM_RETVAL(-ENXIO); +@@ -905,7 +901,9 @@ static int dwc_otg_driver_probe( + */ + + #if defined(PLATFORM_INTERFACE) +- devirq = platform_get_irq(_dev, fiq_enable ? 0 : 1); ++ devirq = platform_get_irq_byname(_dev, fiq_enable ? "soft" : "usb"); ++ if (devirq < 0) ++ devirq = platform_get_irq(_dev, fiq_enable ? 0 : 1); + #else + devirq = _dev->irq; + #endif +@@ -922,6 +920,14 @@ static int dwc_otg_driver_probe( + } else { + dwc_otg_device->common_irq_installed = 1; + } ++ dwc_otg_device->os_dep.irq_num = devirq; ++ dwc_otg_device->os_dep.fiq_num = -EINVAL; ++ if (fiq_enable) { ++ int devfiq = platform_get_irq_byname(_dev, "usb"); ++ if (devfiq < 0) ++ devfiq = platform_get_irq(_dev, 1); ++ dwc_otg_device->os_dep.fiq_num = devfiq; ++ } + + #ifndef IRQF_TRIGGER_LOW + #if defined(LM_INTERFACE) || defined(PLATFORM_INTERFACE) +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -492,7 +492,7 @@ static void hcd_init_fiq(void *cookie) + #endif + // Enable FIQ interrupt from USB peripheral + #ifdef CONFIG_ARM64 +- irq = platform_get_irq(otg_dev->os_dep.platformdev, 1); ++ irq = otg_dev->os_dep.fiq_num; + + if (irq < 0) { + DWC_ERROR("Can't get SIM-FIQ irq"); +@@ -509,7 +509,7 @@ static void hcd_init_fiq(void *cookie) + simfiq_irq = irq; + #else + #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER +- irq = platform_get_irq(otg_dev->os_dep.platformdev, 1); ++ irq = otg_dev->os_dep.fiq_num; + #else + irq = INTERRUPT_VC_USB; + #endif +@@ -626,11 +626,7 @@ int hcd_init(dwc_bus_dev_t *_dev) + * allocates the DMA buffer pool, registers the USB bus, requests the + * IRQ line, and calls hcd_start method. + */ +-#ifdef PLATFORM_INTERFACE +- retval = usb_add_hcd(hcd, platform_get_irq(_dev, fiq_enable ? 0 : 1), IRQF_SHARED); +-#else +- retval = usb_add_hcd(hcd, _dev->irq, IRQF_SHARED); +-#endif ++ retval = usb_add_hcd(hcd, otg_dev->os_dep.irq_num, IRQF_SHARED); + if (retval < 0) { + goto error2; + } +--- a/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h ++++ b/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h +@@ -102,6 +102,12 @@ typedef struct os_dependent { + /** Base address for MPHI peripheral */ + void *mphi_base; + ++ /** IRQ number (<0 if not valid) */ ++ int irq_num; ++ ++ /** FIQ number (<0 if not valid) */ ++ int fiq_num; ++ + #ifdef LM_INTERFACE + struct lm_device *lmdev; + #elif defined(PCI_INTERFACE) +--- a/drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c +@@ -1224,30 +1224,16 @@ int pcd_init(dwc_bus_dev_t *_dev) + /* + * Setup interupt handler + */ +-#ifdef PLATFORM_INTERFACE + DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", +- platform_get_irq(_dev, fiq_enable ? 0 : 1)); +- retval = request_irq(platform_get_irq(_dev, fiq_enable ? 0 : 1), dwc_otg_pcd_irq, ++ otg_dev->os_dep.irq_num); ++ retval = request_irq(otg_dev->os_dep.irq_num, dwc_otg_pcd_irq, + IRQF_SHARED, gadget_wrapper->gadget.name, + otg_dev->pcd); + if (retval != 0) { +- DWC_ERROR("request of irq%d failed\n", +- platform_get_irq(_dev, fiq_enable ? 0 : 1)); ++ DWC_ERROR("request of irq%d failed\n", otg_dev->os_dep.irq_num); + free_wrapper(gadget_wrapper); + return -EBUSY; + } +-#else +- DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", +- _dev->irq); +- retval = request_irq(_dev->irq, dwc_otg_pcd_irq, +- IRQF_SHARED | IRQF_DISABLED, +- gadget_wrapper->gadget.name, otg_dev->pcd); +- if (retval != 0) { +- DWC_ERROR("request of irq%d failed\n", _dev->irq); +- free_wrapper(gadget_wrapper); +- return -EBUSY; +- } +-#endif + + dwc_otg_pcd_start(gadget_wrapper->pcd, &fops); + +@@ -1267,11 +1253,7 @@ void pcd_remove(dwc_bus_dev_t *_dev) + /* + * Free the IRQ + */ +-#ifdef PLATFORM_INTERFACE +- free_irq(platform_get_irq(_dev, 0), pcd); +-#else +- free_irq(_dev->irq, pcd); +-#endif ++ free_irq(otg_dev->os_dep.irq_num, pcd); + dwc_otg_pcd_remove(otg_dev->pcd); + free_wrapper(gadget_wrapper); + otg_dev->pcd = 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0506-overlays-Delete-the-deprecated-sdio-1bit-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0506-overlays-Delete-the-deprecated-sdio-1bit-overlay.patch new file mode 100644 index 000000000..23c02dba1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0506-overlays-Delete-the-deprecated-sdio-1bit-overlay.patch @@ -0,0 +1,90 @@ +From 039ab199d862424e77a9f5a8b431453a36d6af7c Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 7 May 2019 14:27:35 +0100 +Subject: [PATCH 506/703] overlays: Delete the deprecated sdio-1bit overlay + +Use dtoverlay=sdio,bus_width=1,gpios_22_25 instead. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 1 - + .../boot/dts/overlays/sdio-1bit-overlay.dts | 63 ------------------- + 2 files changed, 64 deletions(-) + delete mode 100644 arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -126,7 +126,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + sc16is752-spi1.dtbo \ + sdhost.dtbo \ + sdio.dtbo \ +- sdio-1bit.dtbo \ + sdtweak.dtbo \ + smi.dtbo \ + smi-dev.dtbo \ +--- a/arch/arm/boot/dts/overlays/sdio-1bit-overlay.dts ++++ /dev/null +@@ -1,63 +0,0 @@ +-/dts-v1/; +-/plugin/; +- +-/* Enable 1-bit SDIO from MMC interface via GPIOs 22-25. Includes sdhost overlay. */ +- +-/{ +- compatible = "brcm,bcm2708"; +- +- fragment@0 { +- target = <&mmc>; +- __overlay__ { +- status = "disabled"; +- }; +- }; +- +- fragment@1 { +- target = <&soc>; +- __overlay__ { +- #address-cells = <1>; +- #size-cells = <1>; +- +- sdio_1bit: sdio@7e300000 { +- compatible = "brcm,bcm2835-mmc", +- "brcm,bcm2835-sdhci"; +- reg = <0x7e300000 0x100>; +- interrupts = <2 30>; +- clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>; +- dmas = <&dma 11>; +- dma-names = "rx-tx"; +- brcm,overclock-50 = <0>; +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&sdio_1bit_pins>; +- non-removable; +- bus-width = <1>; +- }; +- }; +- }; +- +- fragment@2 { +- target = <&gpio>; +- __overlay__ { +- sdio_1bit_pins: sdio_1bit_pins { +- brcm,pins = <22 23 24 25>; +- brcm,function = <7>; /* ALT3 = SD1 */ +- brcm,pull = <0 2 2 2>; +- }; +- }; +- }; +- +- fragment@3 { +- target-path = "/aliases"; +- __overlay__ { +- mmc1 = "/soc/sdio@7e300000"; +- }; +- }; +- +- +- __overrides__ { +- poll_once = <&sdio_1bit>,"non-removable?"; +- sdio_overclock = <&sdio_1bit>,"brcm,overclock-50:0"; +- }; +-}; diff --git a/target/linux/brcm2708/patches-4.19/950-0507-overlays-Remove-upstream-aux-interrupt-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0507-overlays-Remove-upstream-aux-interrupt-overlay.patch new file mode 100644 index 000000000..d1f2bb8fb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0507-overlays-Remove-upstream-aux-interrupt-overlay.patch @@ -0,0 +1,97 @@ +From 1bb35a0debe9afff8113fe7727020e22a6160fd2 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 7 May 2019 10:06:04 +0100 +Subject: [PATCH 507/703] overlays: Remove upstream-aux-interrupt overlay + +We no longer have a downstream-specific auxilliary interrupt +driver, so the overlay to disable it is no longer needed. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 1 - + arch/arm/boot/dts/overlays/README | 12 +++---- + .../upstream-aux-interrupt-overlay.dts | 33 ------------------- + .../boot/dts/overlays/upstream-overlay.dts | 2 +- + 4 files changed, 6 insertions(+), 42 deletions(-) + delete mode 100644 arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -151,7 +151,6 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + uart1.dtbo \ + udrc.dtbo \ + upstream.dtbo \ +- upstream-aux-interrupt.dtbo \ + vc4-fkms-v3d.dtbo \ + vc4-kms-kippah-7inch.dtbo \ + vc4-kms-v3d.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2206,18 +2206,16 @@ Params: alsaname Name of + + + Name: upstream +-Info: Allow usage of downstream .dtb with upstream kernel. Comprises +- vc4-kms-v3d, dwc2 and upstream-aux-interrupt overlays. ++Info: Allow usage of downstream .dtb with upstream kernel. Comprises the ++ vc4-kms-v3d and dwc2 overlays. + Load: dtoverlay=upstream + Params: + + + Name: upstream-aux-interrupt +-Info: Allow usage of downstream .dtb with upstream kernel by binding AUX +- devices directly to the shared AUX interrupt line. One of the parts +- of the 'upstream' overlay +-Load: dtoverlay=upstream-aux-interrupt +-Params: ++Info: This overlay has been deprecated and removed because it is no longer ++ necessary. ++Load: + + + Name: vc4-fkms-v3d +--- a/arch/arm/boot/dts/overlays/upstream-aux-interrupt-overlay.dts ++++ /dev/null +@@ -1,33 +0,0 @@ +-// Overlay for missing AUX interrupt controller +-// Instead we bind all AUX devices to the generic AUX interrupt line +-/dts-v1/; +-/plugin/; +- +-/ { +- compatible = "brcm,bcm2708"; +- +- fragment@0 { +- target = <&uart1>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; +- +- fragment@1 { +- target = <&spi1>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; +- +- fragment@2 { +- target = <&spi2>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; +-}; +- +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -1,4 +1,4 @@ +-// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg upstream-aux-interrupt-overlay.dts, ++// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-96 dwc2-overlay.dts,dr_mode=otg + + /dts-v1/; + /plugin/; diff --git a/target/linux/brcm2708/patches-4.19/950-0508-overlays-Standardise-on-compatible-brcm-bcm2835.patch b/target/linux/brcm2708/patches-4.19/950-0508-overlays-Standardise-on-compatible-brcm-bcm2835.patch new file mode 100644 index 000000000..1afddc66c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0508-overlays-Standardise-on-compatible-brcm-bcm2835.patch @@ -0,0 +1,1767 @@ +From 72ce89af10e9f0d504f9c31a137928464b269cfb Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 14 May 2019 13:33:05 +0100 +Subject: [PATCH 508/703] overlays: Standardise on compatible="brcm,bcm2835" + +Curb the proliferation of compatible string combinations by +standardising on "brcm,bcm2835" to denote BCM2835 and its descendants. + +As nothing in the firmware or kernel is checking overlay compatible +strings, this should be a purely cosmetic change. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ads1015-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ads1115-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ads7846-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/adv7282m-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/adv728x-m-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts | 2 +- + .../boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/allo-digione-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts | 2 +- + .../boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts | 2 +- + .../dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/applepi-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/at86rf233-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts | 2 +- + .../boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/audremap-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/balena-fin-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dht11-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dpi18-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dpi24-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/draws-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dwc-otg-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dwc2-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/enc28j60-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/exc3000-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/goodix-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-fan-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-ir-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-key-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hy28a-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hy28b-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-mux-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ilitek251x-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts | 2 +- + .../arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/justboom-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/justboom-digi-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/max98357a-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mbed-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp23s17-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp3008-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp3202-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mcp342x-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/media-center-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mmc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mpu6050-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/mz61581-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ov5647-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/papirus-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pibell-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/piglow-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/piscreen-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/piscreen2r-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pisound-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pitft22-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pps-gpio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/qca7000-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-dac-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-display-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-proto-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-sense-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 2 +- + .../arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sdhost-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sdio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sdtweak-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/smi-nand-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/smi-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi-rtc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/ssd1306-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/superaudioboard-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/sx150x-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/tc358743-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/tinylcd35-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/uart0-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/uart1-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/udrc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/upstream-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/vga666-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/w1-gpio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/wittypi-overlay.dts | 2 +- + 146 files changed, 146 insertions(+), 146 deletions(-) + +--- a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c>; +--- a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/ads1015-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + /* ----------- ADS1015 ------------ */ + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/ads1115-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/ads7846-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_vc>; +--- a/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts +@@ -5,7 +5,7 @@ + #include "adv7282m-overlay.dts" + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + // Fragment numbers deliberately high to avoid conflicts with the + // included adv7282m overlay file. +--- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/clocks"; +--- a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts +@@ -13,7 +13,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sound>; +--- a/arch/arm/boot/dts/overlays/at86rf233-overlay.dts ++++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts +@@ -4,7 +4,7 @@ + /* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */ + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts +@@ -5,7 +5,7 @@ + #include + + / { +- compatible = "brcm,bcm2837", "brcm,bcm2836", "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/audremap-overlay.dts ++++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&audio_pins>; +--- a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts ++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&mmc>; +--- a/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts ++++ b/arch/arm/boot/dts/overlays/bmp085_i2c-sensor-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/dht11-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts +@@ -8,7 +8,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts +@@ -9,7 +9,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sound>; +--- a/arch/arm/boot/dts/overlays/dpi18-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + // There is no DPI driver module, but we need a platform device + // node (that doesn't already use pinctrl) to hang the pinctrl +--- a/arch/arm/boot/dts/overlays/dpi24-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + // There is no DPI driver module, but we need a platform device + // node (that doesn't already use pinctrl) to hang the pinctrl +--- a/arch/arm/boot/dts/overlays/draws-overlay.dts ++++ b/arch/arm/boot/dts/overlays/draws-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + fragment@0 { + target = <&i2s>; + __overlay__ { +--- a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&usb>; +--- a/arch/arm/boot/dts/overlays/dwc2-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&usb>; +--- a/arch/arm/boot/dts/overlays/enc28j60-overlay.dts ++++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts ++++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi2>; +--- a/arch/arm/boot/dts/overlays/exc3000-overlay.dts ++++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&clocks>; +--- a/arch/arm/boot/dts/overlays/goodix-overlay.dts ++++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts ++++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts +@@ -38,7 +38,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/gpio-key-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + // Configure the gpio pin controller +--- a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts +@@ -10,7 +10,7 @@ + // note that GPIO3 has an external pullup on at least some boards). + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + // Configure the gpio pin controller +--- a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/clocks"; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/clocks"; +--- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/hy28a-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/hy28b-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sound>; +--- a/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c0-bcm2708-overlay.dts +@@ -9,7 +9,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c0>; +--- a/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c1-bcm2708-overlay.dts +@@ -9,7 +9,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s_pins>; +--- a/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts ++++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts +@@ -13,7 +13,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + // disable spi-dev on spi0.0 + fragment@0 { +--- a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/max98357a-overlay.dts ++++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts +@@ -8,7 +8,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + /* Enable I2S */ + fragment@0 { +--- a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts +@@ -20,7 +20,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + // disable spi-dev on spi0.0 + fragment@0 { +--- a/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + /* disable spi-dev for spi0.0 */ + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + /* disable spi-dev for spi0.1 */ + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/mcp3008-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spidev0>; +--- a/arch/arm/boot/dts/overlays/mcp3202-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spidev0>; +--- a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/media-center-overlay.dts ++++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/mmc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&mmc>; +--- a/arch/arm/boot/dts/overlays/mpu6050-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/mz61581-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/ov5647-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_vc>; +--- a/arch/arm/boot/dts/overlays/papirus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts +@@ -11,7 +11,7 @@ + */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&act_led>; +--- a/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts +@@ -9,7 +9,7 @@ + */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&uart1>; +--- a/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&mmc>; +--- a/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts +@@ -16,7 +16,7 @@ + */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&uart0>; +--- a/arch/arm/boot/dts/overlays/pibell-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/piglow-overlay.dts ++++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/piscreen-overlay.dts ++++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts ++++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pisound-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts +@@ -23,7 +23,7 @@ + #include + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pitft22-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + fragment@0 { + target-path = "/"; + __overlay__ { +--- a/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/qca7000-overlay.dts ++++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spidev0>; +--- a/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts +@@ -6,7 +6,7 @@ + #include + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/rpi-display-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spidev0>; +--- a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_arm>; +--- a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/sdhost-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts +@@ -4,7 +4,7 @@ + /* Provide backwards compatible aliases for the old sdhost dtparams. */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sdhost>; +--- a/arch/arm/boot/dts/overlays/sdio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts +@@ -4,7 +4,7 @@ + /* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&mmc>; +--- a/arch/arm/boot/dts/overlays/sdtweak-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdtweak-overlay.dts +@@ -4,7 +4,7 @@ + /* Provide backwards compatible aliases for the old sdhost dtparams. */ + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sdhost>; +--- a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts ++++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&smi>; +--- a/arch/arm/boot/dts/overlays/smi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/smi-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&smi>; +--- a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spidev0>; +--- a/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0_cs_pins>; +--- a/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi0-hw-cs-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts ++++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts +@@ -3,7 +3,7 @@ + + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&gpio>; +--- a/arch/arm/boot/dts/overlays/ssd1306-overlay.dts ++++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2718"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c1>; +--- a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts ++++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&sound>; +--- a/arch/arm/boot/dts/overlays/sx150x-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts +@@ -22,7 +22,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + // Enable I2C#0 interface + fragment@0 { +--- a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts +@@ -5,7 +5,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/tc358743-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts +@@ -4,7 +4,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2c_vc>; +--- a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts +@@ -24,7 +24,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts +@@ -8,7 +8,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&spi0>; +--- a/arch/arm/boot/dts/overlays/uart0-overlay.dts ++++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&uart0>; +--- a/arch/arm/boot/dts/overlays/uart1-overlay.dts ++++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&uart1>; +--- a/arch/arm/boot/dts/overlays/udrc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts +@@ -7,7 +7,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + fragment@0 { + target = <&i2s>; + __overlay__ { +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -6,7 +6,7 @@ + #include + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + fragment@0 { + target-path = "/chosen"; + __dormant__ { +--- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts +@@ -6,7 +6,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/chosen"; +--- a/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts +@@ -8,7 +8,7 @@ + #include + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts +@@ -8,7 +8,7 @@ + #include + + / { +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/chosen"; +--- a/arch/arm/boot/dts/overlays/vga666-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts +@@ -2,7 +2,7 @@ + /plugin/; + + /{ +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + // There is no VGA driver module, but we need a platform device + // node (that doesn't already use pinctrl) to hang the pinctrl +--- a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts ++++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; +--- a/arch/arm/boot/dts/overlays/wittypi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts +@@ -8,7 +8,7 @@ + + / { + +- compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&leds>; diff --git a/target/linux/brcm2708/patches-4.19/950-0509-vc4-Remove-interrupt-and-DMA-trampling.patch b/target/linux/brcm2708/patches-4.19/950-0509-vc4-Remove-interrupt-and-DMA-trampling.patch new file mode 100644 index 000000000..da3774ee1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0509-vc4-Remove-interrupt-and-DMA-trampling.patch @@ -0,0 +1,121 @@ +From 66ba94b1099ebc09bf82516499257165495c7c46 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 22 May 2019 12:58:47 +0100 +Subject: [PATCH 509/703] vc4: Remove interrupt and DMA trampling + +As part of the effort to clean up the overlays, remove the interrupt +and DMA mask declarations from the vc4 overlays which just duplicate +that which is in the base DTBs. + +Signed-off-by: Phil Elwell +--- + .../boot/dts/overlays/vc4-fkms-v3d-overlay.dts | 8 -------- + .../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 18 ++---------------- + 2 files changed, 2 insertions(+), 24 deletions(-) + +--- a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts +@@ -60,7 +60,6 @@ + fragment@7 { + target = <&v3d>; + __overlay__ { +- interrupts = <1 10>; + status = "okay"; + }; + }; +@@ -72,13 +71,6 @@ + }; + }; + +- fragment@9 { +- target-path = "/soc/dma"; +- __overlay__ { +- brcm,dma-channel-mask = <0x7f35>; +- }; +- }; +- + __overrides__ { + cma-256 = <0>,"+0-1-2-3-4"; + cma-192 = <0>,"-0+1-2-3-4"; +--- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts ++++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts +@@ -62,7 +62,6 @@ + fragment@7 { + target = <&pixelvalve0>; + __overlay__ { +- interrupts = <2 13>; /* pwa0 */ + status = "okay"; + }; + }; +@@ -70,7 +69,6 @@ + fragment@8 { + target = <&pixelvalve1>; + __overlay__ { +- interrupts = <2 14>; /* pwa1 */ + status = "okay"; + }; + }; +@@ -78,7 +76,6 @@ + fragment@9 { + target = <&pixelvalve2>; + __overlay__ { +- interrupts = <2 10>; /* pixelvalve */ + status = "okay"; + }; + }; +@@ -86,7 +83,6 @@ + fragment@10 { + target = <&hvs>; + __overlay__ { +- interrupts = <2 1>; + status = "okay"; + }; + }; +@@ -94,7 +90,6 @@ + fragment@11 { + target = <&hdmi>; + __overlay__ { +- interrupts = <2 8>, <2 9>; + status = "okay"; + }; + }; +@@ -102,7 +97,6 @@ + fragment@12 { + target = <&v3d>; + __overlay__ { +- interrupts = <1 10>; + status = "okay"; + }; + }; +@@ -115,14 +109,6 @@ + }; + + fragment@14 { +- target-path = "/soc/dma"; +- __overlay__ { +- brcm,dma-channel-mask = <0x7f35>; +- }; +- }; +- +- +- fragment@15 { + target = <&clocks>; + __overlay__ { + claim-clocks = < +@@ -134,14 +120,14 @@ + }; + }; + +- fragment@16 { ++ fragment@15 { + target = <&vec>; + __overlay__ { + status = "okay"; + }; + }; + +- fragment@17 { ++ fragment@16 { + target = <&txp>; + __overlay__ { + status = "okay"; diff --git a/target/linux/brcm2708/patches-4.19/950-0510-BCM270X_DT-Add-non-removable-clone-of-mmc-node.patch b/target/linux/brcm2708/patches-4.19/950-0510-BCM270X_DT-Add-non-removable-clone-of-mmc-node.patch new file mode 100644 index 000000000..061c437cd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0510-BCM270X_DT-Add-non-removable-clone-of-mmc-node.patch @@ -0,0 +1,206 @@ +From 5c9796882b256d149d9c9d9da6b374e4c4e7cbaa Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 7 May 2019 14:29:38 +0100 +Subject: [PATCH 510/703] BCM270X_DT: Add non-removable clone of mmc node + +non-removable is a boolean property, and as such can't be unset by an +overlay if it is set in a base DTB. Until now the workaround for this +problem has been for overlays to clone non-removable nodes without +the offending property, but this involves a lot of unnecessary +replication. Instead, add a clone of the mmc node with non-removable +already set to the base DTB, selecting the required version using +the status properties. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 4 +-- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 3 +- + arch/arm/boot/dts/bcm270x.dtsi | 13 ++++++++ + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 5 ++-- + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 5 ++-- + arch/arm/boot/dts/overlays/mmc-overlay.dts | 7 +++++ + arch/arm/boot/dts/overlays/sdio-overlay.dts | 33 +++++++-------------- + 7 files changed, 38 insertions(+), 32 deletions(-) + +--- a/arch/arm/boot/dts/bcm2708-rpi-0-w.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts +@@ -14,6 +14,7 @@ + aliases { + serial0 = &uart1; + serial1 = &uart0; ++ mmc1 = &mmcnr; + }; + }; + +@@ -73,10 +74,9 @@ + }; + }; + +-&mmc { ++&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; +- non-removable; + bus-width = <4>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -118,7 +118,8 @@ + sd_force_pio = <&sdhost>,"brcm,force-pio?"; + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; + sd_debug = <&sdhost>,"brcm,debug"; +- sdio_overclock = <&mmc>,"brcm,overclock-50:0"; ++ sdio_overclock = <&mmc>,"brcm,overclock-50:0", ++ <&mmcnr>,"brcm,overclock-50:0"; + axiperf = <&axiperf>,"status"; + }; + }; +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -79,6 +79,19 @@ + status = "disabled"; + }; + ++ /* A clone of mmc but with non-removable set */ ++ mmcnr: mmcnr@7e300000 { ++ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; ++ reg = <0x7e300000 0x100>; ++ interrupts = <2 30>; ++ clocks = <&clocks BCM2835_CLOCK_EMMC>; ++ dmas = <&dma 11>; ++ dma-names = "rx-tx"; ++ brcm,overclock-50 = <0>; ++ non-removable; ++ status = "disabled"; ++ }; ++ + hvs: hvs@7e400000 { + /* Add alias */ + status = "disabled"; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -15,6 +15,7 @@ + aliases { + serial0 = &uart1; + serial1 = &uart0; ++ mmc1 = &mmcnr; + }; + }; + +@@ -74,13 +75,11 @@ + }; + }; + +-&mmc { ++&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; +- non-removable; + bus-width = <4>; + status = "okay"; +- brcm,overclock-50 = <0>; + }; + + &firmware { +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -15,6 +15,7 @@ + aliases { + serial0 = &uart1; + serial1 = &uart0; ++ mmc1 = &mmcnr; + }; + }; + +@@ -74,13 +75,11 @@ + }; + }; + +-&mmc { ++&mmcnr { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; +- non-removable; + bus-width = <4>; + status = "okay"; +- brcm,overclock-50 = <0>; + }; + + &soc { +--- a/arch/arm/boot/dts/overlays/mmc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts +@@ -33,6 +33,13 @@ + }; + }; + ++ fragment@3 { ++ target = <&mmcnr>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ + __overrides__ { + overclock_50 = <&frag0>,"brcm,overclock-50:0"; + }; +--- a/arch/arm/boot/dts/overlays/sdio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts +@@ -1,39 +1,26 @@ + /dts-v1/; + /plugin/; + +-/* Enable SDIO from MMC interface via GPIOs 22-27. Includes sdhost overlay. */ ++/* Enable SDIO from MMC interface via various GPIO groups */ + + /{ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target = <&mmc>; ++ target = <&mmcnr>; + __overlay__ { + status = "disabled"; + }; + }; + + fragment@1 { +- target = <&soc>; +- __overlay__ { +- #address-cells = <1>; +- #size-cells = <1>; +- +- sdio_ovl: sdio@7e300000 { +- compatible = "brcm,bcm2835-mmc", +- "brcm,bcm2835-sdhci"; +- reg = <0x7e300000 0x100>; +- interrupts = <2 30>; +- clocks = <&clocks 28/*BCM2835_CLOCK_EMMC*/>; +- dmas = <&dma 11>; +- dma-names = "rx-tx"; +- brcm,overclock-50 = <0>; +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&sdio_ovl_pins>; +- non-removable; +- bus-width = <4>; +- }; ++ target = <&mmc>; ++ sdio_ovl: __overlay__ { ++ pinctrl-0 = <&sdio_ovl_pins>; ++ pinctrl-names = "default"; ++ non-removable; ++ bus-width = <4>; ++ status = "okay"; + }; + }; + +@@ -75,7 +62,7 @@ + fragment@6 { + target-path = "/aliases"; + __overlay__ { +- mmc1 = "/soc/sdio@7e300000"; ++ mmc1 = "/soc/mmc@7e300000"; + }; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0511-BCM270X_DT-usb-Refactor-DTS-and-overlays.patch b/target/linux/brcm2708/patches-4.19/950-0511-BCM270X_DT-usb-Refactor-DTS-and-overlays.patch new file mode 100644 index 000000000..ed31c11ad --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0511-BCM270X_DT-usb-Refactor-DTS-and-overlays.patch @@ -0,0 +1,60 @@ +From fdec17c9cd5cb9c52872e9669aca53d58c7f1eaf Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 8 May 2019 10:08:31 +0100 +Subject: [PATCH 511/703] BCM270X_DT: usb: Refactor DTS and overlays + +Move the IRQ interrupt declaration in the usb node before the FIQ +declaration, so that the dwc2 driver will find it. Name the +interrupts appropriately so that the dwc_otg driver can still find +them. Then remove the interrupt rewriting from the overlays. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm270x.dtsi | 6 ++++-- + arch/arm/boot/dts/overlays/dwc-otg-overlay.dts | 6 ------ + arch/arm/boot/dts/overlays/dwc2-overlay.dts | 2 -- + 3 files changed, 4 insertions(+), 10 deletions(-) + +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -131,8 +131,10 @@ + compatible = "brcm,bcm2708-usb"; + reg = <0x7e980000 0x10000>, + <0x7e006000 0x1000>; +- interrupts = <2 0>, +- <1 9>; ++ interrupt-names = "usb", ++ "soft"; ++ interrupts = <1 9>, ++ <2 0>; + }; + + v3d@7ec00000 { /* vd3 */ +--- a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts +@@ -6,14 +6,8 @@ + + fragment@0 { + target = <&usb>; +- #address-cells = <1>; +- #size-cells = <1>; + __overlay__ { + compatible = "brcm,bcm2708-usb"; +- reg = <0x7e980000 0x10000>, +- <0x7e006000 0x1000>; +- interrupts = <2 0>, +- <1 9>; + status = "okay"; + }; + }; +--- a/arch/arm/boot/dts/overlays/dwc2-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts +@@ -10,8 +10,6 @@ + #size-cells = <1>; + dwc2_usb: __overlay__ { + compatible = "brcm,bcm2835-usb"; +- reg = <0x7e980000 0x10000>; +- interrupts = <1 9>; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; + g-rx-fifo-size = <256>; diff --git a/target/linux/brcm2708/patches-4.19/950-0512-overlays-Update-upstream-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0512-overlays-Update-upstream-overlay.patch new file mode 100644 index 000000000..d0eed0361 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0512-overlays-Update-upstream-overlay.patch @@ -0,0 +1,126 @@ +From a81bfae69a80e92852509118ff81f3485836b81e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 22 May 2019 13:29:56 +0100 +Subject: [PATCH 512/703] overlays: Update upstream overlay + +The recent DT/overlay changes have had a corresponding effect on the +upstream overlay, which is a composite of the vc4-kms-v3d and dwc2 +overlays. + +Signed-off-by: Phil Elwell +--- + .../boot/dts/overlays/upstream-overlay.dts | 41 ++----------------- + 1 file changed, 3 insertions(+), 38 deletions(-) + +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -52,42 +52,36 @@ + fragment@7 { + target = <&pixelvalve0>; + __overlay__ { +- interrupts = <2 13>; + status = "okay"; + }; + }; + fragment@8 { + target = <&pixelvalve1>; + __overlay__ { +- interrupts = <2 14>; + status = "okay"; + }; + }; + fragment@9 { + target = <&pixelvalve2>; + __overlay__ { +- interrupts = <2 10>; + status = "okay"; + }; + }; + fragment@10 { + target = <&hvs>; + __overlay__ { +- interrupts = <2 1>; + status = "okay"; + }; + }; + fragment@11 { + target = <&hdmi>; + __overlay__ { +- interrupts = <2 8>, <2 9>; + status = "okay"; + }; + }; + fragment@12 { + target = <&v3d>; + __overlay__ { +- interrupts = <1 10>; + status = "okay"; + }; + }; +@@ -98,37 +92,29 @@ + }; + }; + fragment@14 { +- target-path = "/soc/dma"; +- __overlay__ { +- brcm,dma-channel-mask = <0x7f35>; +- }; +- }; +- fragment@15 { + target = <&clocks>; + __overlay__ { + claim-clocks = ; + }; + }; +- fragment@16 { ++ fragment@15 { + target = <&vec>; + __overlay__ { + status = "okay"; + }; + }; +- fragment@17 { ++ fragment@16 { + target = <&txp>; + __overlay__ { + status = "okay"; + }; + }; +- fragment@18 { ++ fragment@17 { + target = <&usb>; + #address-cells = <1>; + #size-cells = <1>; + dwc2_usb: __overlay__ { + compatible = "brcm,bcm2835-usb"; +- reg = <0x7e980000 0x10000>; +- interrupts = <1 9>; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; + g-rx-fifo-size = <256>; +@@ -136,25 +122,4 @@ + status = "okay"; + }; + }; +- fragment@19 { +- target = <&uart1>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; +- fragment@20 { +- target = <&spi1>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; +- fragment@21 { +- target = <&spi2>; +- __overlay__ { +- interrupt-parent = <&intc>; +- interrupts = <0x1 0x1d>; +- }; +- }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0513-w1-ds2408-Fix-typo-after-49695ac46861-reset-on-outpu.patch b/target/linux/brcm2708/patches-4.19/950-0513-w1-ds2408-Fix-typo-after-49695ac46861-reset-on-outpu.patch new file mode 100644 index 000000000..a41de1738 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0513-w1-ds2408-Fix-typo-after-49695ac46861-reset-on-outpu.patch @@ -0,0 +1,31 @@ +From b7e76f445cec9a72c1f8f22cba1b2afe0e77f849 Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Thu, 16 May 2019 14:39:21 +0200 +Subject: [PATCH 513/703] w1: ds2408: Fix typo after 49695ac46861 (reset on + output_write retry with readback) + +commit 6660a04feb7ef648e50c792e19084d675fa6f3a2 upstream. + +Fix a typo in commit: +49695ac46861 w1: ds2408: reset on output_write retry with readback + +Fixes: 49695ac46861 ("w1: ds2408: reset on output_write retry with readback") +Reported-by: Phil Elwell +Cc: Jean-Francois Dagenais +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2408.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/w1/slaves/w1_ds2408.c ++++ b/drivers/w1/slaves/w1_ds2408.c +@@ -138,7 +138,7 @@ static ssize_t status_control_read(struc + W1_F29_REG_CONTROL_AND_STATUS, buf); + } + +-#ifdef fCONFIG_W1_SLAVE_DS2408_READBACK ++#ifdef CONFIG_W1_SLAVE_DS2408_READBACK + static bool optional_read_back_valid(struct w1_slave *sl, u8 expected) + { + u8 w1_buf[3]; diff --git a/target/linux/brcm2708/patches-4.19/950-0514-BCM270X_DT-Rename-Pi-Zero-W-DT-files.patch b/target/linux/brcm2708/patches-4.19/950-0514-BCM270X_DT-Rename-Pi-Zero-W-DT-files.patch new file mode 100644 index 000000000..e3ab79570 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0514-BCM270X_DT-Rename-Pi-Zero-W-DT-files.patch @@ -0,0 +1,367 @@ +From 8daca09e4eea788e6fc2fdf3d8ab4c0976128d3d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 28 May 2019 16:36:04 +0100 +Subject: [PATCH 514/703] BCM270X_DT: Rename Pi Zero W DT files + +The downtream Pi Zero W dts file uses the digit 0, whereas upstream +chose to spell it out - "zero-w". The firmware has, for a long time, +looked for bcm2708-rpi-zero-w.dtb first before falling back to the +numerical version. Therefore it is better to follow upstream and +make the switch to "bcm2708-rpi-zero-w". + +At the same time, remove some overrides that duplicate values +inherited from the shared .dtsi files. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/Makefile | 2 +- + .../boot/dts/{bcm2708-rpi-0-w.dts => bcm2708-rpi-zero-w.dts} | 5 ----- + 2 files changed, 1 insertion(+), 6 deletions(-) + rename arch/arm/boot/dts/{bcm2708-rpi-0-w.dts => bcm2708-rpi-zero-w.dts} (97%) + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -4,7 +4,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2708-rpi-b.dtb \ + bcm2708-rpi-b-plus.dtb \ + bcm2708-rpi-cm.dtb \ +- bcm2708-rpi-0-w.dtb \ ++ bcm2708-rpi-zero-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ + bcm2710-rpi-3-b-plus.dtb \ +--- a/arch/arm/boot/dts/bcm2708-rpi-0-w.dts ++++ /dev/null +@@ -1,167 +0,0 @@ +-/dts-v1/; +- +-#include "bcm2708.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" +- +-/ { +- compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; +- model = "Raspberry Pi Zero W"; +- +- chosen { +- bootargs = "coherent_pool=1M 8250.nr_uarts=1"; +- }; +- +- aliases { +- serial0 = &uart1; +- serial1 = &uart0; +- mmc1 = &mmcnr; +- }; +-}; +- +-&gpio { +- spi0_pins: spi0_pins { +- brcm,pins = <9 10 11>; +- brcm,function = <4>; /* alt0 */ +- }; +- +- spi0_cs_pins: spi0_cs_pins { +- brcm,pins = <8 7>; +- brcm,function = <1>; /* output */ +- }; +- +- i2c0_pins: i2c0 { +- brcm,pins = <0 1>; +- brcm,function = <4>; +- }; +- +- i2c1_pins: i2c1 { +- brcm,pins = <2 3>; +- brcm,function = <4>; +- }; +- +- i2s_pins: i2s { +- brcm,pins = <18 19 20 21>; +- brcm,function = <4>; /* alt0 */ +- }; +- +- sdio_pins: sdio_pins { +- brcm,pins = <34 35 36 37 38 39>; +- brcm,function = <7>; /* ALT3 = SD1 */ +- brcm,pull = <0 2 2 2 2 2>; +- }; +- +- bt_pins: bt_pins { +- brcm,pins = <43>; +- brcm,function = <4>; /* alt0:GPCLK2 */ +- brcm,pull = <0>; /* none */ +- }; +- +- uart0_pins: uart0_pins { +- brcm,pins = <30 31 32 33>; +- brcm,function = <7>; /* alt3=UART0 */ +- brcm,pull = <2 0 0 2>; /* up none none up */ +- }; +- +- uart1_pins: uart1_pins { +- brcm,pins; +- brcm,function; +- brcm,pull; +- }; +- +- audio_pins: audio_pins { +- brcm,pins = <>; +- brcm,function = <>; +- }; +-}; +- +-&mmcnr { +- pinctrl-names = "default"; +- pinctrl-0 = <&sdio_pins>; +- bus-width = <4>; +- status = "okay"; +-}; +- +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins &bt_pins>; +- status = "okay"; +-}; +- +-&uart1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart1_pins>; +- status = "okay"; +-}; +- +-&spi0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&spi0_pins &spi0_cs_pins>; +- cs-gpios = <&gpio 8 1>, <&gpio 7 1>; +- +- spidev0: spidev@0{ +- compatible = "spidev"; +- reg = <0>; /* CE0 */ +- #address-cells = <1>; +- #size-cells = <0>; +- spi-max-frequency = <125000000>; +- }; +- +- spidev1: spidev@1{ +- compatible = "spidev"; +- reg = <1>; /* CE1 */ +- #address-cells = <1>; +- #size-cells = <0>; +- spi-max-frequency = <125000000>; +- }; +-}; +- +-&i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- clock-frequency = <100000>; +-}; +- +-&i2c1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c1_pins>; +- clock-frequency = <100000>; +-}; +- +-&i2c2 { +- clock-frequency = <100000>; +-}; +- +-&i2s { +- #sound-dai-cells = <0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2s_pins>; +-}; +- +-&random { +- status = "okay"; +-}; +- +-&leds { +- act_led: act { +- label = "led0"; +- linux,default-trigger = "mmc0"; +- gpios = <&gpio 47 0>; +- }; +-}; +- +-&hdmi { +- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; +-}; +- +-&audio { +- pinctrl-names = "default"; +- pinctrl-0 = <&audio_pins>; +-}; +- +-/ { +- __overrides__ { +- act_led_gpio = <&act_led>,"gpios:4"; +- act_led_activelow = <&act_led>,"gpios:8"; +- act_led_trigger = <&act_led>,"linux,default-trigger"; +- }; +-}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts +@@ -0,0 +1,162 @@ ++/dts-v1/; ++ ++#include "bcm2708.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" ++ ++/ { ++ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; ++ model = "Raspberry Pi Zero W"; ++ ++ chosen { ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ mmc1 = &mmcnr; ++ }; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = <1>; /* output */ ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = <4>; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = <7>; /* ALT3 = SD1 */ ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ bt_pins: bt_pins { ++ brcm,pins = <43>; ++ brcm,function = <4>; /* alt0:GPCLK2 */ ++ brcm,pull = <0>; /* none */ ++ }; ++ ++ uart0_pins: uart0_pins { ++ brcm,pins = <30 31 32 33>; ++ brcm,function = <7>; /* alt3=UART0 */ ++ brcm,pull = <2 0 0 2>; /* up none none up */ ++ }; ++ ++ uart1_pins: uart1_pins { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ ++ audio_pins: audio_pins { ++ brcm,pins = <>; ++ brcm,function = <>; ++ }; ++}; ++ ++&mmcnr { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins &bt_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 47 0>; ++ }; ++}; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0515-BCM270X_DT-Create-bcm2708-rpi-zero.dts.patch b/target/linux/brcm2708/patches-4.19/950-0515-BCM270X_DT-Create-bcm2708-rpi-zero.dts.patch new file mode 100644 index 000000000..54d61650c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0515-BCM270X_DT-Create-bcm2708-rpi-zero.dts.patch @@ -0,0 +1,148 @@ +From 926eb05f48f4c805075aa535a444127de6de0dbb Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 28 May 2019 16:23:51 +0100 +Subject: [PATCH 515/703] BCM270X_DT: Create bcm2708-rpi-zero.dts + +The Pi Zero deserves a dedicated .dtb file - sharing the b-plus .dtb +has been observed to cause an issue with the MAC address of some +Ethernet dongles. + +See: https://github.com/raspberrypi/linux/issues/2990 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm2708-rpi-zero.dts | 117 +++++++++++++++++++++++++ + 2 files changed, 118 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2708-rpi-b.dtb \ + bcm2708-rpi-b-plus.dtb \ + bcm2708-rpi-cm.dtb \ ++ bcm2708-rpi-zero.dtb \ + bcm2708-rpi-zero-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts +@@ -0,0 +1,117 @@ ++/dts-v1/; ++ ++#include "bcm2708.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" ++ ++/ { ++ compatible = "raspberrypi,model-zero", "brcm,bcm2835"; ++ model = "Raspberry Pi Zero"; ++ ++ chosen { ++ bootargs = "coherent_pool=1M"; ++ }; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = <1>; /* output */ ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = <4>; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = <4>; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = <4>; /* alt0 */ ++ }; ++ ++ audio_pins: audio_pins { ++ brcm,pins = <>; ++ brcm,function = <>; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 47 0>; ++ }; ++}; ++ ++&hdmi { ++ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0516-overlays-Fix-mmc-related-overlays-after-refactor.patch b/target/linux/brcm2708/patches-4.19/950-0516-overlays-Fix-mmc-related-overlays-after-refactor.patch new file mode 100644 index 000000000..850a07997 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0516-overlays-Fix-mmc-related-overlays-after-refactor.patch @@ -0,0 +1,73 @@ +From 59ffffa03628f1df3dc63d8f2f1b61bce4b322c2 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 30 May 2019 12:25:29 +0100 +Subject: [PATCH 516/703] overlays: Fix mmc-related overlays after refactor + +The addition of the mmcnr node to the base dtbs caused some overlays to +not work as they should. Patch up pi3-disable-wifi, balena-fin and +sdhost. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/balena-fin-overlay.dts | 7 ++++--- + arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts | 7 +++++++ + arch/arm/boot/dts/overlays/sdhost-overlay.dts | 7 +++++++ + 3 files changed, 18 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts ++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts +@@ -5,13 +5,12 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target = <&mmc>; +- sdio_wifi: __overlay__ { ++ target = <&mmcnr>; ++ __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&sdio_pins>; + bus-width = <4>; + brcm,overclock-50 = <35>; +- non-removable; + status = "okay"; + }; + }; +@@ -43,6 +42,8 @@ + compatible = "gpio-poweroff"; + gpios = <&gpio 40 1>; + force; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&power_ctrl_pins>; + }; + + i2c_soft: i2c@0 { +--- a/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts +@@ -10,4 +10,11 @@ + status = "disabled"; + }; + }; ++ ++ fragment@1 { ++ target = <&mmcnr>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; + }; +--- a/arch/arm/boot/dts/overlays/sdhost-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts +@@ -22,6 +22,13 @@ + }; + }; + ++ fragment@2 { ++ target = <&mmcnr>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ + __overrides__ { + overclock_50 = <&frag0>,"brcm,overclock-50:0"; + force_pio = <&frag0>,"brcm,force-pio?"; diff --git a/target/linux/brcm2708/patches-4.19/950-0517-config-Add-NF_TABLES-support.patch b/target/linux/brcm2708/patches-4.19/950-0517-config-Add-NF_TABLES-support.patch new file mode 100644 index 000000000..bebcd4efa --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0517-config-Add-NF_TABLES-support.patch @@ -0,0 +1,166 @@ +From f022f74f85fa0871e650c1a2fe385d7a24d07d92 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 3 Jun 2019 14:57:56 +0100 +Subject: [PATCH 517/703] config: Add NF_TABLES support + +--- + arch/arm/configs/bcm2709_defconfig | 48 ++++++++++++++++++++++++++++++ + arch/arm/configs/bcmrpi_defconfig | 48 ++++++++++++++++++++++++++++++ + 2 files changed, 96 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -136,6 +136,36 @@ CONFIG_NF_CONNTRACK_SANE=m + CONFIG_NF_CONNTRACK_SIP=m + CONFIG_NF_CONNTRACK_TFTP=m + CONFIG_NF_CT_NETLINK=m ++CONFIG_NF_TABLES=m ++CONFIG_NF_TABLES_SET=m ++CONFIG_NF_TABLES_INET=y ++CONFIG_NF_TABLES_NETDEV=y ++CONFIG_NFT_NUMGEN=m ++CONFIG_NFT_CT=m ++CONFIG_NFT_FLOW_OFFLOAD=m ++CONFIG_NFT_COUNTER=m ++CONFIG_NFT_CONNLIMIT=m ++CONFIG_NFT_LOG=m ++CONFIG_NFT_LIMIT=m ++CONFIG_NFT_MASQ=m ++CONFIG_NFT_REDIR=m ++CONFIG_NFT_NAT=m ++CONFIG_NFT_TUNNEL=m ++CONFIG_NFT_OBJREF=m ++CONFIG_NFT_QUEUE=m ++CONFIG_NFT_QUOTA=m ++CONFIG_NFT_REJECT=m ++CONFIG_NFT_COMPAT=m ++CONFIG_NFT_HASH=m ++CONFIG_NFT_FIB_INET=m ++CONFIG_NFT_SOCKET=m ++CONFIG_NFT_OSF=m ++CONFIG_NFT_TPROXY=m ++CONFIG_NFT_DUP_NETDEV=m ++CONFIG_NFT_FWD_NETDEV=m ++CONFIG_NFT_FIB_NETDEV=m ++CONFIG_NF_FLOW_TABLE_INET=m ++CONFIG_NF_FLOW_TABLE=m + CONFIG_NETFILTER_XT_SET=m + CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m + CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +@@ -224,6 +254,14 @@ CONFIG_IP_VS_SED=m + CONFIG_IP_VS_NQ=m + CONFIG_IP_VS_FTP=m + CONFIG_IP_VS_PE_SIP=m ++CONFIG_NFT_CHAIN_ROUTE_IPV4=m ++CONFIG_NFT_DUP_IPV4=m ++CONFIG_NFT_FIB_IPV4=m ++CONFIG_NF_TABLES_ARP=y ++CONFIG_NF_FLOW_TABLE_IPV4=m ++CONFIG_NFT_CHAIN_NAT_IPV4=m ++CONFIG_NFT_MASQ_IPV4=m ++CONFIG_NFT_REDIR_IPV4=m + CONFIG_IP_NF_IPTABLES=m + CONFIG_IP_NF_MATCH_AH=m + CONFIG_IP_NF_MATCH_ECN=m +@@ -243,6 +281,13 @@ CONFIG_IP_NF_RAW=m + CONFIG_IP_NF_ARPTABLES=m + CONFIG_IP_NF_ARPFILTER=m + CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_NFT_CHAIN_ROUTE_IPV6=m ++CONFIG_NFT_CHAIN_NAT_IPV6=m ++CONFIG_NFT_MASQ_IPV6=m ++CONFIG_NFT_REDIR_IPV6=m ++CONFIG_NFT_DUP_IPV6=m ++CONFIG_NFT_FIB_IPV6=m ++CONFIG_NF_FLOW_TABLE_IPV6=m + CONFIG_IP6_NF_IPTABLES=m + CONFIG_IP6_NF_MATCH_AH=m + CONFIG_IP6_NF_MATCH_EUI64=m +@@ -261,6 +306,9 @@ CONFIG_IP6_NF_RAW=m + CONFIG_IP6_NF_NAT=m + CONFIG_IP6_NF_TARGET_MASQUERADE=m + CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_NF_TABLES_BRIDGE=y ++CONFIG_NFT_BRIDGE_REJECT=m ++CONFIG_NF_LOG_BRIDGE=m + CONFIG_BRIDGE_NF_EBTABLES=m + CONFIG_BRIDGE_EBT_BROUTE=m + CONFIG_BRIDGE_EBT_T_FILTER=m +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -129,6 +129,36 @@ CONFIG_NF_CONNTRACK_SANE=m + CONFIG_NF_CONNTRACK_SIP=m + CONFIG_NF_CONNTRACK_TFTP=m + CONFIG_NF_CT_NETLINK=m ++CONFIG_NF_TABLES=m ++CONFIG_NF_TABLES_SET=m ++CONFIG_NF_TABLES_INET=y ++CONFIG_NF_TABLES_NETDEV=y ++CONFIG_NFT_NUMGEN=m ++CONFIG_NFT_CT=m ++CONFIG_NFT_FLOW_OFFLOAD=m ++CONFIG_NFT_COUNTER=m ++CONFIG_NFT_CONNLIMIT=m ++CONFIG_NFT_LOG=m ++CONFIG_NFT_LIMIT=m ++CONFIG_NFT_MASQ=m ++CONFIG_NFT_REDIR=m ++CONFIG_NFT_NAT=m ++CONFIG_NFT_TUNNEL=m ++CONFIG_NFT_OBJREF=m ++CONFIG_NFT_QUEUE=m ++CONFIG_NFT_QUOTA=m ++CONFIG_NFT_REJECT=m ++CONFIG_NFT_COMPAT=m ++CONFIG_NFT_HASH=m ++CONFIG_NFT_FIB_INET=m ++CONFIG_NFT_SOCKET=m ++CONFIG_NFT_OSF=m ++CONFIG_NFT_TPROXY=m ++CONFIG_NFT_DUP_NETDEV=m ++CONFIG_NFT_FWD_NETDEV=m ++CONFIG_NFT_FIB_NETDEV=m ++CONFIG_NF_FLOW_TABLE_INET=m ++CONFIG_NF_FLOW_TABLE=m + CONFIG_NETFILTER_XT_SET=m + CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m + CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +@@ -217,6 +247,14 @@ CONFIG_IP_VS_SED=m + CONFIG_IP_VS_NQ=m + CONFIG_IP_VS_FTP=m + CONFIG_IP_VS_PE_SIP=m ++CONFIG_NFT_CHAIN_ROUTE_IPV4=m ++CONFIG_NFT_DUP_IPV4=m ++CONFIG_NFT_FIB_IPV4=m ++CONFIG_NF_TABLES_ARP=y ++CONFIG_NF_FLOW_TABLE_IPV4=m ++CONFIG_NFT_CHAIN_NAT_IPV4=m ++CONFIG_NFT_MASQ_IPV4=m ++CONFIG_NFT_REDIR_IPV4=m + CONFIG_IP_NF_IPTABLES=m + CONFIG_IP_NF_MATCH_AH=m + CONFIG_IP_NF_MATCH_ECN=m +@@ -236,6 +274,13 @@ CONFIG_IP_NF_RAW=m + CONFIG_IP_NF_ARPTABLES=m + CONFIG_IP_NF_ARPFILTER=m + CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_NFT_CHAIN_ROUTE_IPV6=m ++CONFIG_NFT_CHAIN_NAT_IPV6=m ++CONFIG_NFT_MASQ_IPV6=m ++CONFIG_NFT_REDIR_IPV6=m ++CONFIG_NFT_DUP_IPV6=m ++CONFIG_NFT_FIB_IPV6=m ++CONFIG_NF_FLOW_TABLE_IPV6=m + CONFIG_IP6_NF_IPTABLES=m + CONFIG_IP6_NF_MATCH_AH=m + CONFIG_IP6_NF_MATCH_EUI64=m +@@ -254,6 +299,9 @@ CONFIG_IP6_NF_RAW=m + CONFIG_IP6_NF_NAT=m + CONFIG_IP6_NF_TARGET_MASQUERADE=m + CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_NF_TABLES_BRIDGE=y ++CONFIG_NFT_BRIDGE_REJECT=m ++CONFIG_NF_LOG_BRIDGE=m + CONFIG_BRIDGE_NF_EBTABLES=m + CONFIG_BRIDGE_EBT_BROUTE=m + CONFIG_BRIDGE_EBT_T_FILTER=m diff --git a/target/linux/brcm2708/patches-4.19/950-0518-Fixed-48k-timing-issue.patch b/target/linux/brcm2708/patches-4.19/950-0518-Fixed-48k-timing-issue.patch new file mode 100644 index 000000000..55cf2dd72 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0518-Fixed-48k-timing-issue.patch @@ -0,0 +1,95 @@ +From a06ffe5daac9ef401c406a8aa28b5d20279e0cdb Mon Sep 17 00:00:00 2001 +From: IQaudIO +Date: Thu, 6 Jun 2019 10:20:55 +0100 +Subject: [PATCH 518/703] Fixed 48k timing issue + +--- + sound/soc/bcm/iqaudio-codec.c | 33 ++++++++++++++++++++++++++++----- + 1 file changed, 28 insertions(+), 5 deletions(-) + +--- a/sound/soc/bcm/iqaudio-codec.c ++++ b/sound/soc/bcm/iqaudio-codec.c +@@ -45,11 +45,15 @@ static int snd_rpi_iqaudio_pll_control(s + 0); + if (ret) + dev_err(card->dev, "Failed to bypass PLL: %d\n", ret); ++ /* Allow PLL time to bypass */ ++ msleep(100); + } else if (SND_SOC_DAPM_EVENT_ON(event)) { + ret = snd_soc_dai_set_pll(codec_dai, 0, DA7213_SYSCLK_PLL, 0, + pll_out); + if (ret) + dev_err(card->dev, "Failed to enable PLL: %d\n", ret); ++ /* Allow PLL time to lock */ ++ msleep(100); + } + + return ret; +@@ -71,6 +75,13 @@ static int snd_rpi_iqaudio_post_dapm_eve + return 0; + } + ++static const struct snd_kcontrol_new dapm_controls[] = { ++ SOC_DAPM_PIN_SWITCH("HP Jack"), ++ SOC_DAPM_PIN_SWITCH("MIC Jack"), ++ SOC_DAPM_PIN_SWITCH("Onboard MIC"), ++ SOC_DAPM_PIN_SWITCH("AUX Jack"), ++}; ++ + static const struct snd_soc_dapm_widget dapm_widgets[] = { + SND_SOC_DAPM_HP("HP Jack", NULL), + SND_SOC_DAPM_MIC("MIC Jack", NULL), +@@ -87,14 +98,14 @@ static const struct snd_soc_dapm_route a + {"HP Jack", NULL, "HPR"}, + {"HP Jack", NULL, "PLL Control"}, + +- {"AUX Jack", NULL, "AUXR"}, +- {"AUX Jack", NULL, "AUXL"}, ++ {"AUXR", NULL, "AUX Jack"}, ++ {"AUXL", NULL, "AUX Jack"}, + {"AUX Jack", NULL, "PLL Control"}, + + /* Assume Mic1 is linked to Headset and Mic2 to on-board mic */ +- {"MIC Jack", NULL, "MIC1"}, ++ {"MIC1", NULL, "MIC Jack"}, + {"MIC Jack", NULL, "PLL Control"}, +- {"Onboard MIC", NULL, "MIC2"}, ++ {"MIC2", NULL, "Onboard MIC"}, + {"Onboard MIC", NULL, "PLL Control"}, + }; + +@@ -106,6 +117,16 @@ static int snd_rpi_iqaudio_codec_init(st + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int ret; + ++ /* ++ * Disable AUX Jack Pin by default to prevent PLL being enabled at ++ * startup. This avoids holding the PLL to a fixed SR config for ++ * subsequent streams. ++ * ++ * This pin can still be enabled later, as required by user-space. ++ */ ++ snd_soc_dapm_disable_pin(&rtd->card->dapm, "AUX Jack"); ++ snd_soc_dapm_sync(&rtd->card->dapm); ++ + /* Set bclk ratio to align with codec's BCLK rate */ + ret = snd_soc_dai_set_bclk_ratio(cpu_dai, 64); + if (ret) { +@@ -168,6 +189,8 @@ static struct snd_soc_card snd_rpi_iqaud + .owner = THIS_MODULE, + .dai_link = snd_rpi_iqaudio_codec_dai, + .num_links = ARRAY_SIZE(snd_rpi_iqaudio_codec_dai), ++ .controls = dapm_controls, ++ .num_controls = ARRAY_SIZE(dapm_controls), + .dapm_widgets = dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(dapm_widgets), + .dapm_routes = audio_map, +@@ -204,7 +227,7 @@ static int snd_rpi_iqaudio_codec_probe(s + + if (of_property_read_string(pdev->dev.of_node, + "dai_stream_name", &dai->stream_name)) +- dai->stream_name = "IQaudIO CODEC HiFi v1.1"; ++ dai->stream_name = "IQaudIO CODEC HiFi v1.2"; + + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0519-staging-bcm2835-codec-Convert-V4L2-nsec-timestamps-t.patch b/target/linux/brcm2708/patches-4.19/950-0519-staging-bcm2835-codec-Convert-V4L2-nsec-timestamps-t.patch new file mode 100644 index 000000000..5a2534df2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0519-staging-bcm2835-codec-Convert-V4L2-nsec-timestamps-t.patch @@ -0,0 +1,46 @@ +From 58b048261814bb8763573cac6146079ed8813f65 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 10 May 2019 14:11:58 +0100 +Subject: [PATCH 519/703] staging: bcm2835-codec: Convert V4L2 nsec timestamps + to MMAL usec + +V4L2 uses nsecs, whilst MMAL uses usecs, but the code wasn't converting +between them. This upsets video encode rate control. + +Signed-off-by: Dave Stevenson +--- + .../vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -823,7 +823,8 @@ static void op_buffer_cb(struct vchiq_mm + vb2->flags |= V4L2_BUF_FLAG_LAST; + } + +- vb2->vb2_buf.timestamp = mmal_buf->pts; ++ /* vb2 timestamps in nsecs, mmal in usecs */ ++ vb2->vb2_buf.timestamp = mmal_buf->pts * 1000; + + vb2_set_plane_payload(&vb2->vb2_buf, 0, mmal_buf->length); + if (mmal_buf->mmal_flags & MMAL_BUFFER_HEADER_FLAG_KEYFRAME) +@@ -847,6 +848,7 @@ static void op_buffer_cb(struct vchiq_mm + static void vb2_to_mmal_buffer(struct m2m_mmal_buffer *buf, + struct vb2_v4l2_buffer *vb2) + { ++ u64 pts; + buf->mmal.mmal_flags = 0; + if (vb2->flags & V4L2_BUF_FLAG_KEYFRAME) + buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_KEYFRAME; +@@ -869,7 +871,10 @@ static void vb2_to_mmal_buffer(struct m2 + if (!buf->mmal.length || vb2->flags & V4L2_BUF_FLAG_LAST) + buf->mmal.mmal_flags |= MMAL_BUFFER_HEADER_FLAG_EOS; + +- buf->mmal.pts = vb2->vb2_buf.timestamp; ++ /* vb2 timestamps in nsecs, mmal in usecs */ ++ pts = vb2->vb2_buf.timestamp; ++ do_div(pts, 1000); ++ buf->mmal.pts = pts; + buf->mmal.dts = MMAL_TIME_UNKNOWN; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0520-staging-bcm2835-codec-Add-support-for-setting-S_PARM.patch b/target/linux/brcm2708/patches-4.19/950-0520-staging-bcm2835-codec-Add-support-for-setting-S_PARM.patch new file mode 100644 index 000000000..94fb23c32 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0520-staging-bcm2835-codec-Add-support-for-setting-S_PARM.patch @@ -0,0 +1,118 @@ +From 17100548de7995412237633c58c4e04a11a6d5ed Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 10 May 2019 14:13:11 +0100 +Subject: [PATCH 520/703] staging: bcm2835-codec: Add support for setting + S_PARM and G_PARM + +Video encode can use the frame rate for rate control calculations, +therefore plumb it through from V4L2's [S|G]_PARM ioctl. + +Signed-off-by: Dave Stevenson +--- + .../bcm2835-codec/bcm2835-v4l2-codec.c | 52 +++++++++++++++++-- + 1 file changed, 48 insertions(+), 4 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c ++++ b/drivers/staging/vc04_services/bcm2835-codec/bcm2835-v4l2-codec.c +@@ -447,6 +447,8 @@ struct bcm2835_codec_ctx { + /* Source and destination queue data */ + struct bcm2835_codec_q_data q_data[2]; + s32 bitrate; ++ unsigned int framerate_num; ++ unsigned int framerate_denom; + + bool aborting; + int num_ip_buffers; +@@ -610,8 +612,8 @@ static void setup_mmal_port_format(struc + port->es.video.height = q_data->height; + port->es.video.crop.width = q_data->crop_width; + port->es.video.crop.height = q_data->crop_height; +- port->es.video.frame_rate.num = 0; +- port->es.video.frame_rate.den = 1; ++ port->es.video.frame_rate.num = ctx->framerate_num; ++ port->es.video.frame_rate.den = ctx->framerate_denom; + } else { + /* Compressed format - leave resolution as 0 for decode */ + if (ctx->dev->role == DECODE) { +@@ -625,9 +627,9 @@ static void setup_mmal_port_format(struc + port->es.video.crop.width = q_data->crop_width; + port->es.video.crop.height = q_data->crop_height; + port->format.bitrate = ctx->bitrate; ++ port->es.video.frame_rate.num = ctx->framerate_num; ++ port->es.video.frame_rate.den = ctx->framerate_denom; + } +- port->es.video.frame_rate.num = 0; +- port->es.video.frame_rate.den = 1; + } + port->es.video.crop.x = 0; + port->es.video.crop.y = 0; +@@ -1361,6 +1363,41 @@ static int vidioc_s_selection(struct fil + return 0; + } + ++static int vidioc_s_parm(struct file *file, void *priv, ++ struct v4l2_streamparm *parm) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ if (parm->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) ++ return -EINVAL; ++ ++ ctx->framerate_num = ++ parm->parm.output.timeperframe.denominator; ++ ctx->framerate_denom = ++ parm->parm.output.timeperframe.numerator; ++ ++ parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; ++ ++ return 0; ++} ++ ++static int vidioc_g_parm(struct file *file, void *priv, ++ struct v4l2_streamparm *parm) ++{ ++ struct bcm2835_codec_ctx *ctx = file2ctx(file); ++ ++ if (parm->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) ++ return -EINVAL; ++ ++ parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME; ++ parm->parm.output.timeperframe.denominator = ++ ctx->framerate_num; ++ parm->parm.output.timeperframe.numerator = ++ ctx->framerate_denom; ++ ++ return 0; ++} ++ + static int vidioc_subscribe_evt(struct v4l2_fh *fh, + const struct v4l2_event_subscription *sub) + { +@@ -1725,6 +1762,9 @@ static const struct v4l2_ioctl_ops bcm28 + .vidioc_g_selection = vidioc_g_selection, + .vidioc_s_selection = vidioc_s_selection, + ++ .vidioc_g_parm = vidioc_g_parm, ++ .vidioc_s_parm = vidioc_s_parm, ++ + .vidioc_subscribe_event = vidioc_subscribe_evt, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, + +@@ -2546,6 +2586,8 @@ static int bcm2835_codec_create(struct p + case DECODE: + v4l2_disable_ioctl(vfd, VIDIOC_ENCODER_CMD); + v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_S_PARM); ++ v4l2_disable_ioctl(vfd, VIDIOC_G_PARM); + video_nr = decode_video_nr; + break; + case ENCODE: +@@ -2558,6 +2600,8 @@ static int bcm2835_codec_create(struct p + v4l2_disable_ioctl(vfd, VIDIOC_TRY_ENCODER_CMD); + v4l2_disable_ioctl(vfd, VIDIOC_DECODER_CMD); + v4l2_disable_ioctl(vfd, VIDIOC_TRY_DECODER_CMD); ++ v4l2_disable_ioctl(vfd, VIDIOC_S_PARM); ++ v4l2_disable_ioctl(vfd, VIDIOC_G_PARM); + video_nr = isp_video_nr; + break; + default: diff --git a/target/linux/brcm2708/patches-4.19/950-0521-w1-w1-gpio-Make-GPIO-an-output-for-strong-pullup.patch b/target/linux/brcm2708/patches-4.19/950-0521-w1-w1-gpio-Make-GPIO-an-output-for-strong-pullup.patch new file mode 100644 index 000000000..7cb7e88d7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0521-w1-w1-gpio-Make-GPIO-an-output-for-strong-pullup.patch @@ -0,0 +1,27 @@ +From d4b6aeeb564bcc56316ba15eaa62d25400dde175 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 12 Jun 2019 17:15:05 +0100 +Subject: [PATCH 521/703] w1: w1-gpio: Make GPIO an output for strong pullup + +The logic to drive the data line high to implement a strong pullup +assumed that the pin was already an output - setting a value does +not change an input. + +See: https://github.com/raspberrypi/firmware/issues/1143 + +Signed-off-by: Phil Elwell +--- + drivers/w1/masters/w1-gpio.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/w1/masters/w1-gpio.c ++++ b/drivers/w1/masters/w1-gpio.c +@@ -33,7 +33,7 @@ static u8 w1_gpio_set_pullup(void *data, + * This will OVERRIDE open drain emulation and force-pull + * the line high for some time. + */ +- gpiod_set_raw_value(pdata->gpiod, 1); ++ gpiod_direction_output_raw(pdata->gpiod, 1); + msleep(pdata->pullup_duration); + /* + * This will simply set the line as input since we are doing diff --git a/target/linux/brcm2708/patches-4.19/950-0522-overlays-Update-w1-gpio-and-w1-gpio-pullup.patch b/target/linux/brcm2708/patches-4.19/950-0522-overlays-Update-w1-gpio-and-w1-gpio-pullup.patch new file mode 100644 index 000000000..66977ba67 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0522-overlays-Update-w1-gpio-and-w1-gpio-pullup.patch @@ -0,0 +1,78 @@ +From f182f8725cc6a5cccd7f513268e311e5037eca03 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 12 Jun 2019 17:32:11 +0100 +Subject: [PATCH 522/703] overlays: Update w1-gpio and w1-gpio-pullup + +The parasitic power (power on data) feature is now enabled by +default in the w1-gpio driver, so update the README and make the +"pullup" parameter a no-op. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 9 ++------- + arch/arm/boot/dts/overlays/w1-gpio-overlay.dts | 3 +-- + arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts | 3 +-- + 3 files changed, 4 insertions(+), 11 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2261,9 +2261,7 @@ Info: Configures the w1-gpio Onewire i + Use this overlay if you *don't* need a GPIO to drive an external pullup. + Load: dtoverlay=w1-gpio,= + Params: gpiopin GPIO for I/O (default "4") +- +- pullup Non-zero, "on", or "y" to enable the parasitic +- power (2-wire, power-on-data) feature ++ pullup Now enabled by default (ignored) + + + Name: w1-gpio-pullup +@@ -2271,11 +2269,8 @@ Info: Configures the w1-gpio Onewire i + Use this overlay if you *do* need a GPIO to drive an external pullup. + Load: dtoverlay=w1-gpio-pullup,= + Params: gpiopin GPIO for I/O (default "4") +- +- pullup Non-zero, "on", or "y" to enable the parasitic +- power (2-wire, power-on-data) feature +- + extpullup GPIO for external pullup (default "5") ++ pullup Now enabled by default (ignored) + + + Name: wittypi +--- a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts +@@ -14,7 +14,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&gpio 4 0>; +- rpi,parasitic-power = <0>; + status = "okay"; + }; + }; +@@ -36,6 +35,6 @@ + <&w1>,"reg:0", + <&w1_pins>,"brcm,pins:0", + <&w1_pins>,"reg:0"; +- pullup = <&w1>,"rpi,parasitic-power:0"; ++ pullup; // Silently ignore unneeded parameter + }; + }; +--- a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts ++++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts +@@ -14,7 +14,6 @@ + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&gpio 4 0>, <&gpio 5 1>; +- rpi,parasitic-power = <0>; + status = "okay"; + }; + }; +@@ -38,6 +37,6 @@ + <&w1_pins>,"reg:0"; + extpullup = <&w1>,"gpios:16", + <&w1_pins>,"brcm,pins:4"; +- pullup = <&w1>,"rpi,parasitic-power:0"; ++ pullup; // Silently ignore unneeded parameter + }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0523-bcm2835-sdhost-Fix-DMA-channel-leak-on-error-remove.patch b/target/linux/brcm2708/patches-4.19/950-0523-bcm2835-sdhost-Fix-DMA-channel-leak-on-error-remove.patch new file mode 100644 index 000000000..4ca216eaf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0523-bcm2835-sdhost-Fix-DMA-channel-leak-on-error-remove.patch @@ -0,0 +1,31 @@ +From 578084fa26af562bc35db7175ea7784a01f87f87 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 12 Jun 2019 20:45:17 +0100 +Subject: [PATCH 523/703] bcm2835-sdhost: Fix DMA channel leak on error/remove + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/bcm2835-sdhost.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/mmc/host/bcm2835-sdhost.c ++++ b/drivers/mmc/host/bcm2835-sdhost.c +@@ -2154,6 +2154,8 @@ static int bcm2835_sdhost_probe(struct p + + err: + pr_debug("bcm2835_sdhost_probe -> err %d\n", ret); ++ if (host->dma_chan_rxtx) ++ dma_release_channel(host->dma_chan_rxtx); + mmc_free_host(mmc); + + return ret; +@@ -2174,7 +2176,8 @@ static int bcm2835_sdhost_remove(struct + del_timer_sync(&host->timer); + + tasklet_kill(&host->finish_tasklet); +- ++ if (host->dma_chan_rxtx) ++ dma_release_channel(host->dma_chan_rxtx); + mmc_free_host(host->mmc); + platform_set_drvdata(pdev, NULL); + diff --git a/target/linux/brcm2708/patches-4.19/950-0524-i2c-bcm2835-Model-Divider-in-CCF.patch b/target/linux/brcm2708/patches-4.19/950-0524-i2c-bcm2835-Model-Divider-in-CCF.patch new file mode 100644 index 000000000..08a8c90e7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0524-i2c-bcm2835-Model-Divider-in-CCF.patch @@ -0,0 +1,270 @@ +From c86d0f6bfecc53a44e753f14238921ababae29d4 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Sat, 8 Jun 2019 10:14:43 -0700 +Subject: [PATCH 524/703] i2c: bcm2835: Model Divider in CCF + +Commit bebff81fb8b9216eb4fba22cf910553621ae3477 upstream. + +Model the I2C bus clock divider as a part of the Core Clock Framework. +Primarily this removes the clk_get_rate() call from each transfer. +This call causes problems for slave drivers that themselves have +internal clock components that are controlled by an I2C interface. +When the slave's internal clock component is prepared, the prepare +lock is obtained, and it makes calls to the I2C subsystem to +command the hardware to activate the clock. In order to perform +the I2C transfer, this driver sets the divider, which requires +it to get the parent clock rate, which it does with clk_get_rate(). +Unfortunately, this function will try to take the clock prepare +lock, which is already held by the slave's internal clock calls +creating a deadlock. + +Modeling the divider in the CCF natively removes this dependency +and the divider value is only set upon changing the bus clock +frequency or changes in the parent clock that cascade down to this +divisor. This obviates the need to set the divider with every +transfer and avoids the deadlock described above. It also should +provide better clock debugging and save a few cycles on each +transfer due to not having to recalcuate the divider value. + +Signed-off-by: Annaliese McDermond +Acked-by: Stefan Wahren +Reviewed-by: Eric Anholt +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-bcm2835.c | 145 ++++++++++++++++++++++++------- + 1 file changed, 114 insertions(+), 31 deletions(-) + +--- a/drivers/i2c/busses/i2c-bcm2835.c ++++ b/drivers/i2c/busses/i2c-bcm2835.c +@@ -12,6 +12,8 @@ + */ + + #include ++#include ++#include + #include + #include + #include +@@ -71,9 +73,7 @@ struct bcm2835_debug { + struct bcm2835_i2c_dev { + struct device *dev; + void __iomem *regs; +- struct clk *clk; + int irq; +- u32 bus_clk_rate; + struct i2c_adapter adapter; + struct completion completion; + struct i2c_msg *curr_msg; +@@ -164,12 +164,17 @@ static inline u32 bcm2835_i2c_readl(stru + return readl(i2c_dev->regs + reg); + } + +-static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev) ++#define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw) ++struct clk_bcm2835_i2c { ++ struct clk_hw hw; ++ struct bcm2835_i2c_dev *i2c_dev; ++}; ++ ++static int clk_bcm2835_i2c_calc_divider(unsigned long rate, ++ unsigned long parent_rate) + { +- u32 divider, redl, fedl; ++ u32 divider = DIV_ROUND_UP(parent_rate, rate); + +- divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), +- i2c_dev->bus_clk_rate); + /* + * Per the datasheet, the register is always interpreted as an even + * number, by rounding down. In other words, the LSB is ignored. So, +@@ -178,12 +183,23 @@ static int bcm2835_i2c_set_divider(struc + if (divider & 1) + divider++; + if ((divider < BCM2835_I2C_CDIV_MIN) || +- (divider > BCM2835_I2C_CDIV_MAX)) { +- dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n"); ++ (divider > BCM2835_I2C_CDIV_MAX)) + return -EINVAL; +- } + +- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); ++ return divider; ++} ++ ++static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long parent_rate) ++{ ++ struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); ++ u32 redl, fedl; ++ u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate); ++ ++ if (divider == -EINVAL) ++ return -EINVAL; ++ ++ bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider); + + /* + * Number of core clocks to wait after falling edge before +@@ -198,12 +214,62 @@ static int bcm2835_i2c_set_divider(struc + */ + redl = max(divider / 4, 1u); + +- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL, ++ bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL, + (fedl << BCM2835_I2C_FEDL_SHIFT) | + (redl << BCM2835_I2C_REDL_SHIFT)); + return 0; + } + ++static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate, ++ unsigned long *parent_rate) ++{ ++ u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate); ++ ++ return DIV_ROUND_UP(*parent_rate, divider); ++} ++ ++static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw); ++ u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV); ++ ++ return DIV_ROUND_UP(parent_rate, divider); ++} ++ ++static const struct clk_ops clk_bcm2835_i2c_ops = { ++ .set_rate = clk_bcm2835_i2c_set_rate, ++ .round_rate = clk_bcm2835_i2c_round_rate, ++ .recalc_rate = clk_bcm2835_i2c_recalc_rate, ++}; ++ ++static struct clk *bcm2835_i2c_register_div(struct device *dev, ++ const char *mclk_name, ++ struct bcm2835_i2c_dev *i2c_dev) ++{ ++ struct clk_init_data init; ++ struct clk_bcm2835_i2c *priv; ++ char name[32]; ++ ++ snprintf(name, sizeof(name), "%s_div", dev_name(dev)); ++ ++ init.ops = &clk_bcm2835_i2c_ops; ++ init.name = name; ++ init.parent_names = (const char* []) { mclk_name }; ++ init.num_parents = 1; ++ init.flags = 0; ++ ++ priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL); ++ if (priv == NULL) ++ return ERR_PTR(-ENOMEM); ++ ++ priv->hw.init = &init; ++ priv->i2c_dev = i2c_dev; ++ ++ clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev)); ++ return devm_clk_register(dev, &priv->hw); ++} ++ + static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev) + { + u32 val; +@@ -363,7 +429,7 @@ static int bcm2835_i2c_xfer(struct i2c_a + { + struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); + unsigned long time_left; +- int i, ret; ++ int i; + + if (debug) + i2c_dev->debug_num_msgs = num; +@@ -379,10 +445,6 @@ static int bcm2835_i2c_xfer(struct i2c_a + return -EOPNOTSUPP; + } + +- ret = bcm2835_i2c_set_divider(i2c_dev); +- if (ret) +- return ret; +- + i2c_dev->curr_msg = msgs; + i2c_dev->num_msgs = num; + reinit_completion(&i2c_dev->completion); +@@ -443,6 +505,9 @@ static int bcm2835_i2c_probe(struct plat + struct resource *mem, *irq; + int ret; + struct i2c_adapter *adap; ++ const char *mclk_name; ++ struct clk *bus_clk; ++ u32 bus_clk_rate; + + i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); + if (!i2c_dev) +@@ -456,21 +521,6 @@ static int bcm2835_i2c_probe(struct plat + if (IS_ERR(i2c_dev->regs)) + return PTR_ERR(i2c_dev->regs); + +- i2c_dev->clk = devm_clk_get(&pdev->dev, NULL); +- if (IS_ERR(i2c_dev->clk)) { +- if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER) +- dev_err(&pdev->dev, "Could not get clock\n"); +- return PTR_ERR(i2c_dev->clk); +- } +- +- ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", +- &i2c_dev->bus_clk_rate); +- if (ret < 0) { +- dev_warn(&pdev->dev, +- "Could not read clock-frequency property\n"); +- i2c_dev->bus_clk_rate = 100000; +- } +- + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!irq) { + dev_err(&pdev->dev, "No IRQ resource\n"); +@@ -485,6 +535,35 @@ static int bcm2835_i2c_probe(struct plat + return -ENODEV; + } + ++ mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0); ++ ++ bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev); ++ ++ if (IS_ERR(bus_clk)) { ++ dev_err(&pdev->dev, "Could not register clock\n"); ++ return PTR_ERR(bus_clk); ++ } ++ ++ ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", ++ &bus_clk_rate); ++ if (ret < 0) { ++ dev_warn(&pdev->dev, ++ "Could not read clock-frequency property\n"); ++ bus_clk_rate = 100000; ++ } ++ ++ ret = clk_set_rate_exclusive(bus_clk, bus_clk_rate); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "Could not set clock frequency\n"); ++ return ret; ++ } ++ ++ ret = clk_prepare_enable(bus_clk); ++ if (ret) { ++ dev_err(&pdev->dev, "Couldn't prepare clock"); ++ return ret; ++ } ++ + adap = &i2c_dev->adapter; + i2c_set_adapdata(adap, i2c_dev); + adap->owner = THIS_MODULE; +@@ -507,6 +586,10 @@ static int bcm2835_i2c_probe(struct plat + static int bcm2835_i2c_remove(struct platform_device *pdev) + { + struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev); ++ struct clk *bus_clk = devm_clk_get(i2c_dev->dev, "div"); ++ ++ clk_rate_exclusive_put(bus_clk); ++ clk_disable_unprepare(bus_clk); + + free_irq(i2c_dev->irq, i2c_dev); + i2c_del_adapter(&i2c_dev->adapter); diff --git a/target/linux/brcm2708/patches-4.19/950-0525-staging-vc04_services-Use-correct-cache-line-size.patch b/target/linux/brcm2708/patches-4.19/950-0525-staging-vc04_services-Use-correct-cache-line-size.patch new file mode 100644 index 000000000..d9dae4f0c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0525-staging-vc04_services-Use-correct-cache-line-size.patch @@ -0,0 +1,135 @@ +From 75d0074312c7cb74c7a7c17f9cef7a071e209d79 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 17 Sep 2018 09:22:21 +0100 +Subject: [PATCH 525/703] staging/vc04_services: Use correct cache line size + +Use the compatible string in the DTB to select the correct cache line +size for the SoC - 32 for BCM2835, and 64 for BCM2836 and BCM2837. + +Signed-off-by: Phil Elwell +Tested-by: Stefan Wahren +Signed-off-by: Greg Kroah-Hartman +--- + .../interface/vchiq_arm/vchiq_2835_arm.c | 15 ++------ + .../interface/vchiq_arm/vchiq_arm.c | 35 +++++++++++++------ + .../interface/vchiq_arm/vchiq_arm.h | 5 +++ + 3 files changed, 33 insertions(+), 22 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +@@ -117,7 +117,8 @@ free_pagelist(struct vchiq_pagelist_info + int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state) + { + struct device *dev = &pdev->dev; +- struct rpi_firmware *fw = platform_get_drvdata(pdev); ++ struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev); ++ struct rpi_firmware *fw = drvdata->fw; + VCHIQ_SLOT_ZERO_T *vchiq_slot_zero; + struct resource *res; + void *slot_mem; +@@ -135,17 +136,7 @@ int vchiq_platform_init(struct platform_ + if (err < 0) + return err; + +- /* +- * The tempting L1_CACHE_BYTES macro doesn't work in the case of +- * a kernel built with bcm2835_defconfig running on a BCM2836/7 +- * processor, hence the need for a runtime check. The dcache line size +- * is encoded in one of the coprocessor registers, but there is no +- * convenient way to access it short of embedded assembler, hence +- * the use of read_cpuid_id(). The following test evaluates to true +- * on a BCM2835 showing that it is ARMv6-ish, whereas +- * cpu_architecture() will indicate that it is an ARMv7. +- */ +- g_cache_line_size = ((read_cpuid_id() & 0x7f000) == 0x7b000) ? 32 : 64; ++ g_cache_line_size = drvdata->cache_line_size; + g_fragments_size = 2 * g_cache_line_size; + + /* Allocate space for the channels in coherent memory */ +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -173,6 +173,14 @@ static struct platform_device *bcm2835_c + static struct platform_device *bcm2835_codec; + static struct platform_device *vcsm_cma; + ++static struct vchiq_drvdata bcm2835_drvdata = { ++ .cache_line_size = 32, ++}; ++ ++static struct vchiq_drvdata bcm2836_drvdata = { ++ .cache_line_size = 64, ++}; ++ + static const char *const ioctl_names[] = { + "CONNECT", + "SHUTDOWN", +@@ -3607,12 +3615,25 @@ vchiq_register_child(struct platform_dev + return new_dev; + } + ++static const struct of_device_id vchiq_of_match[] = { ++ { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata }, ++ { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, vchiq_of_match); ++ + static int vchiq_probe(struct platform_device *pdev) + { + struct device_node *fw_node; +- struct rpi_firmware *fw; ++ const struct of_device_id *of_id; ++ struct vchiq_drvdata *drvdata; + int err; + ++ of_id = of_match_node(vchiq_of_match, pdev->dev.of_node); ++ drvdata = (struct vchiq_drvdata *)of_id->data; ++ if (!drvdata) ++ return -EINVAL; ++ + fw_node = of_find_compatible_node(NULL, NULL, + "raspberrypi,bcm2835-firmware"); + if (!fw_node) { +@@ -3620,12 +3641,12 @@ static int vchiq_probe(struct platform_d + return -ENOENT; + } + +- fw = rpi_firmware_get(fw_node); ++ drvdata->fw = rpi_firmware_get(fw_node); + of_node_put(fw_node); +- if (!fw) ++ if (!drvdata->fw) + return -EPROBE_DEFER; + +- platform_set_drvdata(pdev, fw); ++ platform_set_drvdata(pdev, drvdata); + + err = vchiq_platform_init(pdev, &g_state); + if (err != 0) +@@ -3703,12 +3724,6 @@ static int vchiq_remove(struct platform_ + return 0; + } + +-static const struct of_device_id vchiq_of_match[] = { +- { .compatible = "brcm,bcm2835-vchiq", }, +- {}, +-}; +-MODULE_DEVICE_TABLE(of, vchiq_of_match); +- + static struct platform_driver vchiq_driver = { + .driver = { + .name = "bcm2835_vchiq", +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h +@@ -123,6 +123,11 @@ typedef struct vchiq_arm_state_struct { + + } VCHIQ_ARM_STATE_T; + ++struct vchiq_drvdata { ++ const unsigned int cache_line_size; ++ struct rpi_firmware *fw; ++}; ++ + extern int vchiq_arm_log_level; + extern int vchiq_susp_log_level; + diff --git a/target/linux/brcm2708/patches-4.19/950-0526-tty-amba-pl011-allow-shared-interrupt.patch b/target/linux/brcm2708/patches-4.19/950-0526-tty-amba-pl011-allow-shared-interrupt.patch new file mode 100644 index 000000000..d726ee31d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0526-tty-amba-pl011-allow-shared-interrupt.patch @@ -0,0 +1,28 @@ +From 135b1563027fb8f30be1a9daae3db209166028af Mon Sep 17 00:00:00 2001 +From: Doug Berger +Date: Mon, 13 May 2019 20:59:45 +0200 +Subject: [PATCH 526/703] tty: amba-pl011: allow shared interrupt + +The PL011 register space includes all necessary status bits to +determine whether a device instance requires handling in response +to an interrupt. Therefore, multiple instances of the device could +be serviced by a single shared interrupt, which is the case on BCM7211. + +Signed-off-by: Doug Berger +Signed-off-by: Florian Fainelli +--- + drivers/tty/serial/amba-pl011.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -1735,7 +1735,8 @@ static int pl011_allocate_irq(struct uar + { + pl011_write(uap->im, uap, REG_IMSC); + +- return request_irq(uap->port.irq, pl011_int, 0, "uart-pl011", uap); ++ return request_irq(uap->port.irq, pl011_int, IRQF_SHARED, "uart-pl011", ++ uap); + } + + /* diff --git a/target/linux/brcm2708/patches-4.19/950-0527-ARM-bcm283x-Reduce-register-ranges-for-UART-SPI-and-.patch b/target/linux/brcm2708/patches-4.19/950-0527-ARM-bcm283x-Reduce-register-ranges-for-UART-SPI-and-.patch new file mode 100644 index 000000000..2fc2d163d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0527-ARM-bcm283x-Reduce-register-ranges-for-UART-SPI-and-.patch @@ -0,0 +1,44 @@ +From 272132a1b67448ec6e72e431abe0ca00cc4e0554 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sun, 19 May 2019 12:20:00 +0200 +Subject: [PATCH 527/703] ARM: bcm283x: Reduce register ranges for UART, SPI + and I2C + +The assigned register ranges for UART, SPI and I2C were too wasteful. +In order to avoid overlapping with the new functions on BCM2838 +reduce the ranges. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm283x.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -387,7 +387,7 @@ + + uart0: serial@7e201000 { + compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201000 0x1000>; ++ reg = <0x7e201000 0x200>; + interrupts = <2 25>; + clocks = <&clocks BCM2835_CLOCK_UART>, + <&clocks BCM2835_CLOCK_VPU>; +@@ -418,7 +418,7 @@ + + spi: spi@7e204000 { + compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204000 0x1000>; ++ reg = <0x7e204000 0x200>; + interrupts = <2 22>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; +@@ -428,7 +428,7 @@ + + i2c0: i2c@7e205000 { + compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205000 0x1000>; ++ reg = <0x7e205000 0x200>; + interrupts = <2 21>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + #address-cells = <1>; diff --git a/target/linux/brcm2708/patches-4.19/950-0528-ARM-bcm283x-Extend-the-WDT-DT-node-out-to-cover-the-.patch b/target/linux/brcm2708/patches-4.19/950-0528-ARM-bcm283x-Extend-the-WDT-DT-node-out-to-cover-the-.patch new file mode 100644 index 000000000..5a808b5dd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0528-ARM-bcm283x-Extend-the-WDT-DT-node-out-to-cover-the-.patch @@ -0,0 +1,45 @@ +From 35c9dd5eb19625b5eba5373ca780eef9e4029e87 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 12 Dec 2018 15:51:49 -0800 +Subject: [PATCH 528/703] ARM: bcm283x: Extend the WDT DT node out to cover the + whole PM block. (v4) + +It was covering part of the PM block's range, up to the WDT regs. To +support the rest of the PM block's functionality, we need the full +register range plus the AXI Async Bridge regs for PM sequencing. + +This doesn't convert any of the consumers over to the new binding yet, +since we will need to be careful in coordinating our usage of firmware +services that might power domains on and off versus the bcm2835-pm +driver's access of those same domains. + +Signed-off-by: Eric Anholt +Acked-by: Stefan Wahren +Signed-off-by: Stefan Wahren +(cherry picked from commit 29abc92c1d93e28a8f4d55e6343eec4faf44025a) +--- + arch/arm/boot/dts/bcm283x.dtsi | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -121,8 +121,17 @@ + }; + + watchdog@7e100000 { +- compatible = "brcm,bcm2835-pm-wdt"; +- reg = <0x7e100000 0x28>; ++ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; ++ #power-domain-cells = <1>; ++ #reset-cells = <1>; ++ reg = <0x7e100000 0x114>, ++ <0x7e00a000 0x24>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>, ++ <&clocks BCM2835_CLOCK_PERI_IMAGE>, ++ <&clocks BCM2835_CLOCK_H264>, ++ <&clocks BCM2835_CLOCK_ISP>; ++ clock-names = "v3d", "peri_image", "h264", "isp"; ++ system-power-controller; + }; + + clocks: cprman@7e101000 { diff --git a/target/linux/brcm2708/patches-4.19/950-0529-ARM-dts-Add-label-to-bcm2835-RNG.patch b/target/linux/brcm2708/patches-4.19/950-0529-ARM-dts-Add-label-to-bcm2835-RNG.patch new file mode 100644 index 000000000..dfe6f5b3f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0529-ARM-dts-Add-label-to-bcm2835-RNG.patch @@ -0,0 +1,20 @@ +From 381ffaf15617d63c898f3b70105dc42d17e4ed3b Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 4 May 2019 17:06:54 +0200 +Subject: [PATCH 529/703] ARM: dts: Add label to bcm2835 RNG + +--- + arch/arm/boot/dts/bcm283x.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -148,7 +148,7 @@ + <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; + }; + +- rng@7e104000 { ++ rng: rng@7e104000 { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; + interrupts = <2 29>; diff --git a/target/linux/brcm2708/patches-4.19/950-0530-dts-Use-fb-rather-than-leds-for-dpi-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0530-dts-Use-fb-rather-than-leds-for-dpi-overlay.patch new file mode 100644 index 000000000..8339d60d4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0530-dts-Use-fb-rather-than-leds-for-dpi-overlay.patch @@ -0,0 +1,32 @@ +From ef4e6bd54e6b5d352eb62d245bf4354259812d05 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Thu, 12 Oct 2017 18:11:32 +0100 +Subject: [PATCH 530/703] dts: Use fb rather than leds for dpi overlay + +--- + arch/arm/boot/dts/overlays/dpi18-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/dpi24-overlay.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/dpi18-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts +@@ -9,7 +9,7 @@ + // reference on - leds will do + + fragment@0 { +- target = <&leds>; ++ target = <&fb>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&dpi18_pins>; +--- a/arch/arm/boot/dts/overlays/dpi24-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts +@@ -9,7 +9,7 @@ + // reference on - leds will do + + fragment@0 { +- target = <&leds>; ++ target = <&fb>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&dpi24_pins>; diff --git a/target/linux/brcm2708/patches-4.19/950-0531-BCM270X_DT-Minor-tidy-up.patch b/target/linux/brcm2708/patches-4.19/950-0531-BCM270X_DT-Minor-tidy-up.patch new file mode 100644 index 000000000..607f61758 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0531-BCM270X_DT-Minor-tidy-up.patch @@ -0,0 +1,95 @@ +From 8b2b33292610a414d8cc3a7a78104fd375bf0cce Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 May 2019 15:19:21 +0100 +Subject: [PATCH 531/703] BCM270X_DT: Minor tidy up + +Move arm_pmu out of soc on bcm2710, and labels aren't aliases. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm270x.dtsi | 14 +++++++------- + arch/arm/boot/dts/bcm2710.dtsi | 13 +++++-------- + 2 files changed, 12 insertions(+), 15 deletions(-) + +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -10,11 +10,11 @@ + soc: soc { + + watchdog: watchdog@7e100000 { +- /* Add alias */ ++ /* Add label */ + }; + + random: rng@7e104000 { +- /* Add alias */ ++ /* Add label */ + }; + + gpio@7e200000 { /* gpio */ +@@ -40,18 +40,18 @@ + }; + + spi0: spi@7e204000 { +- /* Add alias */ ++ /* Add label */ + dmas = <&dma 6>, <&dma 7>; + dma-names = "tx", "rx"; + }; + + pixelvalve0: pixelvalve@7e206000 { +- /* Add alias */ ++ /* Add label */ + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7e207000 { +- /* Add alias */ ++ /* Add label */ + status = "disabled"; + }; + +@@ -93,7 +93,7 @@ + }; + + hvs: hvs@7e400000 { +- /* Add alias */ ++ /* Add label */ + status = "disabled"; + }; + +@@ -119,7 +119,7 @@ + }; + + pixelvalve2: pixelvalve@7e807000 { +- /* Add alias */ ++ /* Add label */ + status = "disabled"; + }; + +--- a/arch/arm/boot/dts/bcm2710.dtsi ++++ b/arch/arm/boot/dts/bcm2710.dtsi +@@ -5,18 +5,15 @@ + / { + compatible = "brcm,bcm2837", "brcm,bcm2836"; + +- soc { +- +- arm-pmu { ++ arm-pmu { + #ifdef RPI364 +- compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu"; ++ compatible = "arm,armv8-pmuv3", "arm,cortex-a7-pmu"; + #else +- compatible = "arm,cortex-a7-pmu"; ++ compatible = "arm,cortex-a7-pmu"; + #endif +- interrupt-parent = <&local_intc>; +- interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; +- }; ++ }; + ++ soc { + /delete-node/ timer@7e003000; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0532-arm-bcm2835-Fix-FIQ-early-ioremap.patch b/target/linux/brcm2708/patches-4.19/950-0532-arm-bcm2835-Fix-FIQ-early-ioremap.patch new file mode 100644 index 000000000..7acf9d953 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0532-arm-bcm2835-Fix-FIQ-early-ioremap.patch @@ -0,0 +1,73 @@ +From bd1c6d07ec4b1ddf087ad139c0164ab195244a55 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 20 Feb 2019 08:49:39 +0000 +Subject: [PATCH 532/703] arm: bcm2835: Fix FIQ early ioremap + +The ioremapping creates mappings within the vmalloc area. The +equivalent early function, create_mapping, now checks that the +requested explicit virtual address is between VMALLOC_START and +VMALLOC_END. As there is no reason to have any correlation between +the physical and virtual addresses, put the required mappings at +VMALLOC_START and above. + +Signed-off-by: Phil Elwell +--- + arch/arm/mach-bcm/board_bcm2835.c | 21 +++++++++++++++------ + 1 file changed, 15 insertions(+), 6 deletions(-) + +--- a/arch/arm/mach-bcm/board_bcm2835.c ++++ b/arch/arm/mach-bcm/board_bcm2835.c +@@ -14,17 +14,20 @@ + + #include + #include ++#include + #include + #include + #include + + #include + #include ++#include ++#include + + #include "platsmp.h" + +-#define BCM2835_USB_VIRT_BASE 0xf0980000 +-#define BCM2835_USB_VIRT_MPHI 0xf0006000 ++#define BCM2835_USB_VIRT_BASE (VMALLOC_START) ++#define BCM2835_USB_VIRT_MPHI (VMALLOC_START + 0x10000) + + static void __init bcm2835_init(void) + { +@@ -83,20 +86,26 @@ static int __init bcm2835_map_usb(unsign + + static void __init bcm2835_map_io(void) + { +- const __be32 *ranges; ++ const __be32 *ranges, *address_cells; ++ unsigned long root, addr_cells; + int soc, len; + unsigned long p2b_offset; + + debug_ll_io_init(); + ++ root = of_get_flat_dt_root(); + /* Find out how to map bus to physical address first from soc/ranges */ +- soc = of_get_flat_dt_subnode_by_name(of_get_flat_dt_root(), "soc"); ++ soc = of_get_flat_dt_subnode_by_name(root, "soc"); + if (soc < 0) + return; ++ address_cells = of_get_flat_dt_prop(root, "#address-cells", &len); ++ if (!address_cells || len < (sizeof(unsigned long))) ++ return; ++ addr_cells = be32_to_cpu(address_cells[0]); + ranges = of_get_flat_dt_prop(soc, "ranges", &len); +- if (!ranges || len < (sizeof(unsigned long) * 3)) ++ if (!ranges || len < (sizeof(unsigned long) * (2 + addr_cells))) + return; +- p2b_offset = be32_to_cpu(ranges[0]) - be32_to_cpu(ranges[1]); ++ p2b_offset = be32_to_cpu(ranges[0]) - be32_to_cpu(ranges[addr_cells]); + + /* Now search for bcm2708-usb node in device tree */ + of_scan_flat_dt(bcm2835_map_usb, &p2b_offset); diff --git a/target/linux/brcm2708/patches-4.19/950-0533-Fix-copy_from_user-if-BCM2835_FAST_MEMCPY-n.patch b/target/linux/brcm2708/patches-4.19/950-0533-Fix-copy_from_user-if-BCM2835_FAST_MEMCPY-n.patch new file mode 100644 index 000000000..91c3fcd37 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0533-Fix-copy_from_user-if-BCM2835_FAST_MEMCPY-n.patch @@ -0,0 +1,39 @@ +From 1f1c37d795048414202d1b097854ebb78df4b1fe Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Thu, 14 Mar 2019 10:16:02 +0000 +Subject: [PATCH 533/703] Fix copy_from_user if BCM2835_FAST_MEMCPY=n + +The change which introduced CONFIG_BCM2835_FAST_MEMCPY unconditionally +changed the behaviour of arm_copy_from_user. The page pinning code +is not safe on ARMv7 if LPAE & high memory is enabled and causes +crashes which look like PTE corruption. + +Make __copy_from_user_memcpy conditional on CONFIG_2835_FAST_MEMCPY=y +which is really an ARMv6 / Pi1 optimization and not necessary on newer +ARM processors. +--- + arch/arm/lib/uaccess_with_memcpy.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/arch/arm/lib/uaccess_with_memcpy.c ++++ b/arch/arm/lib/uaccess_with_memcpy.c +@@ -257,6 +257,7 @@ arm_copy_to_user(void __user *to, const + unsigned long __must_check + arm_copy_from_user(void *to, const void __user *from, unsigned long n) + { ++#ifdef CONFIG_BCM2835_FAST_MEMCPY + /* + * This test is stubbed out of the main function above to keep + * the overhead for small copies low by avoiding a large +@@ -271,6 +272,11 @@ arm_copy_from_user(void *to, const void + } else { + n = __copy_from_user_memcpy(to, from, n); + } ++#else ++ unsigned long ua_flags = uaccess_save_and_enable(); ++ n = __copy_from_user_std(to, from, n); ++ uaccess_restore(ua_flags); ++#endif + return n; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0534-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch b/target/linux/brcm2708/patches-4.19/950-0534-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch new file mode 100644 index 000000000..536bc32fe --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0534-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch @@ -0,0 +1,1187 @@ +From f44f216d79d668049e28f696840c7761017e3406 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 19 Feb 2019 22:06:59 +0000 +Subject: [PATCH 534/703] PCI: brcmstb: Add Broadcom STB PCIe host controller + driver + +This commit adds the basic Broadcom STB PCIe controller. Missing is +the ability to process MSI and also handle dma-ranges for inbound +memory accesses. These two functionalities are added in subsequent +commits. + +The PCIe block contains an MDIO interface. This is a local interface +only accessible by the PCIe controller. It cannot be used or shared +by any other HW. As such, the small amount of code for this +controller is included in this driver as there is little upside to put +it elsewhere. + +Signed-off-by: Jim Quinlan +--- + drivers/pci/controller/Kconfig | 9 + + drivers/pci/controller/Makefile | 2 +- + drivers/pci/controller/pcie-brcmstb.c | 1097 +++++++++++++++++++++++++ + include/soc/brcmstb/memory_api.h | 25 + + 4 files changed, 1132 insertions(+), 1 deletion(-) + create mode 100644 drivers/pci/controller/pcie-brcmstb.c + create mode 100644 include/soc/brcmstb/memory_api.h + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -278,5 +278,14 @@ config VMD + To compile this driver as a module, choose M here: the + module will be called vmd. + ++config PCIE_BRCMSTB ++ tristate "Broadcom Brcmstb PCIe platform host driver" ++ depends on ARCH_BRCMSTB || BMIPS_GENERIC ++ depends on OF ++ depends on SOC_BRCMSTB ++ default ARCH_BRCMSTB || BMIPS_GENERIC ++ help ++ Adds support for Broadcom Settop Box PCIe host controller. ++ + source "drivers/pci/controller/dwc/Kconfig" + endmenu +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -28,11 +28,11 @@ obj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie + obj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o + obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o ++obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o + obj-$(CONFIG_VMD) += vmd.o + # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW + obj-y += dwc/ + +- + # The following drivers are for devices that use the generic ACPI + # pci_root.c driver but don't support standard ECAM config access. + # They contain MCFG quirks to replace the generic ECAM accessors with +--- /dev/null ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -0,0 +1,1097 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* Copyright (C) 2009 - 2017 Broadcom */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../pci.h" ++ ++/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ ++#define BRCM_PCIE_CAP_REGS 0x00ac ++ ++/* ++ * Broadcom Settop Box PCIe Register Offsets. The names are from ++ * the chip's RDB and we use them here so that a script can correlate ++ * this code and the RDB to prevent discrepancies. ++ */ ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 ++#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c ++#define PCIE_RC_DL_MDIO_ADDR 0x1100 ++#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 ++#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 ++#define PCIE_MISC_MISC_CTRL 0x4008 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 ++#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c ++#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 ++#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 ++#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c ++#define PCIE_MISC_PCIE_CTRL 0x4064 ++#define PCIE_MISC_PCIE_STATUS 0x4068 ++#define PCIE_MISC_REVISION 0x406c ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 ++#define PCIE_INTR2_CPU_BASE 0x4300 ++ ++/* ++ * Broadcom Settop Box PCIe Register Field shift and mask info. The ++ * names are from the chip's RDB and we use them here so that a script ++ * can correlate this code and the RDB to prevent discrepancies. ++ */ ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_SHIFT 0x2 ++#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff ++#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_SHIFT 0x0 ++#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 ++#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_SHIFT 0xc ++#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 ++#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_SHIFT 0xd ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_SHIFT 0x14 ++#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 ++#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_SHIFT 0x1b ++#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_MASK 0x7c00000 ++#define PCIE_MISC_MISC_CTRL_SCB1_SIZE_SHIFT 0x16 ++#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_MASK 0x1f ++#define PCIE_MISC_MISC_CTRL_SCB2_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_SHIFT 0x0 ++#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_MASK 0x4 ++#define PCIE_MISC_PCIE_CTRL_PCIE_PERSTB_SHIFT 0x2 ++#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 ++#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_SHIFT 0x0 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_SHIFT 0x7 ++#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 ++#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_SHIFT 0x5 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_SHIFT 0x4 ++#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 ++#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_SHIFT 0x6 ++#define PCIE_MISC_REVISION_MAJMIN_MASK 0xffff ++#define PCIE_MISC_REVISION_MAJMIN_SHIFT 0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_SHIFT 0x14 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_SHIFT 0x4 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS 0xc ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_SHIFT 0x0 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_SHIFT 0x0 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_SHIFT 0x1 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_SHIFT 0x1b ++#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 ++#define PCIE_RGR1_SW_INIT_1_PERST_SHIFT 0x0 ++ ++#define BRCM_NUM_PCIE_OUT_WINS 0x4 ++#define BRCM_MAX_SCB 0x4 ++ ++#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL ++#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL ++ ++#define BURST_SIZE_128 0 ++#define BURST_SIZE_256 1 ++#define BURST_SIZE_512 2 ++ ++/* Offsets from PCIE_INTR2_CPU_BASE */ ++#define STATUS 0x0 ++#define SET 0x4 ++#define CLR 0x8 ++#define MASK_STATUS 0xc ++#define MASK_SET 0x10 ++#define MASK_CLR 0x14 ++ ++#define PCIE_BUSNUM_SHIFT 20 ++#define PCIE_SLOT_SHIFT 15 ++#define PCIE_FUNC_SHIFT 12 ++ ++#if defined(__BIG_ENDIAN) ++#define DATA_ENDIAN 2 /* PCIe->DDR inbound traffic */ ++#define MMIO_ENDIAN 2 /* CPU->PCIe outbound traffic */ ++#else ++#define DATA_ENDIAN 0 ++#define MMIO_ENDIAN 0 ++#endif ++ ++#define MDIO_PORT0 0x0 ++#define MDIO_DATA_MASK 0x7fffffff ++#define MDIO_DATA_SHIFT 0x0 ++#define MDIO_PORT_MASK 0xf0000 ++#define MDIO_PORT_SHIFT 0x16 ++#define MDIO_REGAD_MASK 0xffff ++#define MDIO_REGAD_SHIFT 0x0 ++#define MDIO_CMD_MASK 0xfff00000 ++#define MDIO_CMD_SHIFT 0x14 ++#define MDIO_CMD_READ 0x1 ++#define MDIO_CMD_WRITE 0x0 ++#define MDIO_DATA_DONE_MASK 0x80000000 ++#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) ++#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) ++#define SSC_REGS_ADDR 0x1100 ++#define SET_ADDR_OFFSET 0x1f ++#define SSC_CNTL_OFFSET 0x2 ++#define SSC_CNTL_OVRD_EN_MASK 0x8000 ++#define SSC_CNTL_OVRD_EN_SHIFT 0xf ++#define SSC_CNTL_OVRD_VAL_MASK 0x4000 ++#define SSC_CNTL_OVRD_VAL_SHIFT 0xe ++#define SSC_STATUS_OFFSET 0x1 ++#define SSC_STATUS_SSC_MASK 0x400 ++#define SSC_STATUS_SSC_SHIFT 0xa ++#define SSC_STATUS_PLL_LOCK_MASK 0x800 ++#define SSC_STATUS_PLL_LOCK_SHIFT 0xb ++ ++#define IDX_ADDR(pcie) \ ++ ((pcie)->reg_offsets[EXT_CFG_INDEX]) ++#define DATA_ADDR(pcie) \ ++ ((pcie)->reg_offsets[EXT_CFG_DATA]) ++#define PCIE_RGR1_SW_INIT_1(pcie) \ ++ ((pcie)->reg_offsets[RGR1_SW_INIT_1]) ++ ++enum { ++ RGR1_SW_INIT_1, ++ EXT_CFG_INDEX, ++ EXT_CFG_DATA, ++}; ++ ++enum { ++ RGR1_SW_INIT_1_INIT_MASK, ++ RGR1_SW_INIT_1_INIT_SHIFT, ++ RGR1_SW_INIT_1_PERST_MASK, ++ RGR1_SW_INIT_1_PERST_SHIFT, ++}; ++ ++enum pcie_type { ++ BCM7425, ++ BCM7435, ++ GENERIC, ++ BCM7278, ++}; ++ ++struct brcm_window { ++ dma_addr_t pcie_addr; ++ phys_addr_t cpu_addr; ++ dma_addr_t size; ++}; ++ ++/* Internal PCIe Host Controller Information.*/ ++struct brcm_pcie { ++ struct device *dev; ++ void __iomem *base; ++ struct list_head resources; ++ int irq; ++ struct clk *clk; ++ struct pci_bus *root_bus; ++ struct device_node *dn; ++ int id; ++ bool suspended; ++ int num_out_wins; ++ bool ssc; ++ int gen; ++ struct brcm_window out_wins[BRCM_NUM_PCIE_OUT_WINS]; ++ unsigned int rev; ++ const int *reg_offsets; ++ const int *reg_field_info; ++ enum pcie_type type; ++}; ++ ++struct pcie_cfg_data { ++ const int *reg_field_info; ++ const int *offsets; ++ const enum pcie_type type; ++}; ++ ++static const int pcie_reg_field_info[] = { ++ [RGR1_SW_INIT_1_INIT_MASK] = 0x2, ++ [RGR1_SW_INIT_1_INIT_SHIFT] = 0x1, ++}; ++ ++static const int pcie_reg_field_info_bcm7278[] = { ++ [RGR1_SW_INIT_1_INIT_MASK] = 0x1, ++ [RGR1_SW_INIT_1_INIT_SHIFT] = 0x0, ++}; ++ ++static const int pcie_offset_bcm7425[] = { ++ [RGR1_SW_INIT_1] = 0x8010, ++ [EXT_CFG_INDEX] = 0x8300, ++ [EXT_CFG_DATA] = 0x8304, ++}; ++ ++static const struct pcie_cfg_data bcm7425_cfg = { ++ .reg_field_info = pcie_reg_field_info, ++ .offsets = pcie_offset_bcm7425, ++ .type = BCM7425, ++}; ++ ++static const int pcie_offsets[] = { ++ [RGR1_SW_INIT_1] = 0x9210, ++ [EXT_CFG_INDEX] = 0x9000, ++ [EXT_CFG_DATA] = 0x9004, ++}; ++ ++static const struct pcie_cfg_data bcm7435_cfg = { ++ .reg_field_info = pcie_reg_field_info, ++ .offsets = pcie_offsets, ++ .type = BCM7435, ++}; ++ ++static const struct pcie_cfg_data generic_cfg = { ++ .reg_field_info = pcie_reg_field_info, ++ .offsets = pcie_offsets, ++ .type = GENERIC, ++}; ++ ++static const int pcie_offset_bcm7278[] = { ++ [RGR1_SW_INIT_1] = 0xc010, ++ [EXT_CFG_INDEX] = 0x9000, ++ [EXT_CFG_DATA] = 0x9004, ++}; ++ ++static const struct pcie_cfg_data bcm7278_cfg = { ++ .reg_field_info = pcie_reg_field_info_bcm7278, ++ .offsets = pcie_offset_bcm7278, ++ .type = BCM7278, ++}; ++ ++static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, ++ int where); ++ ++static struct pci_ops brcm_pcie_ops = { ++ .map_bus = brcm_pcie_map_conf, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++}; ++ ++#if defined(CONFIG_MIPS) ++/* Broadcom MIPs HW implicitly does the swapping if necessary */ ++#define bcm_readl(a) __raw_readl(a) ++#define bcm_writel(d, a) __raw_writel(d, a) ++#define bcm_readw(a) __raw_readw(a) ++#define bcm_writew(d, a) __raw_writew(d, a) ++#else ++#define bcm_readl(a) readl(a) ++#define bcm_writel(d, a) writel(d, a) ++#define bcm_readw(a) readw(a) ++#define bcm_writew(d, a) writew(d, a) ++#endif ++ ++/* These macros extract/insert fields to host controller's register set. */ ++#define RD_FLD(base, reg, field) \ ++ rd_fld(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT) ++#define WR_FLD(base, reg, field, val) \ ++ wr_fld(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) ++#define WR_FLD_RB(base, reg, field, val) \ ++ wr_fld_rb(base + reg, reg##_##field##_MASK, reg##_##field##_SHIFT, val) ++#define WR_FLD_WITH_OFFSET(base, off, reg, field, val) \ ++ wr_fld(base + reg + off, reg##_##field##_MASK, \ ++ reg##_##field##_SHIFT, val) ++#define EXTRACT_FIELD(val, reg, field) \ ++ ((val & reg##_##field##_MASK) >> reg##_##field##_SHIFT) ++#define INSERT_FIELD(val, reg, field, field_val) \ ++ ((val & ~reg##_##field##_MASK) | \ ++ (reg##_##field##_MASK & (field_val << reg##_##field##_SHIFT))) ++ ++static phys_addr_t scb_size[BRCM_MAX_SCB]; ++static int num_memc; ++static int num_pcie; ++static DEFINE_MUTEX(brcm_pcie_lock); ++ ++static u32 rd_fld(void __iomem *p, u32 mask, int shift) ++{ ++ return (bcm_readl(p) & mask) >> shift; ++} ++ ++static void wr_fld(void __iomem *p, u32 mask, int shift, u32 val) ++{ ++ u32 reg = bcm_readl(p); ++ ++ reg = (reg & ~mask) | ((val << shift) & mask); ++ bcm_writel(reg, p); ++} ++ ++static void wr_fld_rb(void __iomem *p, u32 mask, int shift, u32 val) ++{ ++ wr_fld(p, mask, shift, val); ++ (void)bcm_readl(p); ++} ++ ++static const char *link_speed_to_str(int s) ++{ ++ switch (s) { ++ case 1: ++ return "2.5"; ++ case 2: ++ return "5.0"; ++ case 3: ++ return "8.0"; ++ default: ++ break; ++ } ++ return "???"; ++} ++ ++/* ++ * The roundup_pow_of_two() from log2.h invokes ++ * __roundup_pow_of_two(unsigned long), but we really need a ++ * such a function to take a native u64 since unsigned long ++ * is 32 bits on some configurations. So we provide this helper ++ * function below. ++ */ ++static u64 roundup_pow_of_two_64(u64 n) ++{ ++ return 1ULL << fls64(n - 1); ++} ++ ++/* ++ * This is to convert the size of the inbound "BAR" region to the ++ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE ++ */ ++int encode_ibar_size(u64 size) ++{ ++ int log2_in = ilog2(size); ++ ++ if (log2_in >= 12 && log2_in <= 15) ++ /* Covers 4KB to 32KB (inclusive) */ ++ return (log2_in - 12) + 0x1c; ++ else if (log2_in >= 16 && log2_in <= 37) ++ /* Covers 64KB to 32GB, (inclusive) */ ++ return log2_in - 15; ++ /* Something is awry so disable */ ++ return 0; ++} ++ ++static u32 mdio_form_pkt(int port, int regad, int cmd) ++{ ++ u32 pkt = 0; ++ ++ pkt |= (port << MDIO_PORT_SHIFT) & MDIO_PORT_MASK; ++ pkt |= (regad << MDIO_REGAD_SHIFT) & MDIO_REGAD_MASK; ++ pkt |= (cmd << MDIO_CMD_SHIFT) & MDIO_CMD_MASK; ++ ++ return pkt; ++} ++ ++/* negative return value indicates error */ ++static int mdio_read(void __iomem *base, u8 port, u8 regad) ++{ ++ int tries; ++ u32 data; ++ ++ bcm_writel(mdio_form_pkt(port, regad, MDIO_CMD_READ), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ bcm_readl(base + PCIE_RC_DL_MDIO_ADDR); ++ ++ data = bcm_readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = bcm_readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ } ++ ++ return MDIO_RD_DONE(data) ++ ? (data & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT ++ : -EIO; ++} ++ ++/* negative return value indicates error */ ++static int mdio_write(void __iomem *base, u8 port, u8 regad, u16 wrdata) ++{ ++ int tries; ++ u32 data; ++ ++ bcm_writel(mdio_form_pkt(port, regad, MDIO_CMD_WRITE), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ bcm_readl(base + PCIE_RC_DL_MDIO_ADDR); ++ bcm_writel(MDIO_DATA_DONE_MASK | wrdata, ++ base + PCIE_RC_DL_MDIO_WR_DATA); ++ ++ data = bcm_readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = bcm_readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ } ++ ++ return MDIO_WT_DONE(data) ? 0 : -EIO; ++} ++ ++/* ++ * Configures device for Spread Spectrum Clocking (SSC) mode; a negative ++ * return value indicates error. ++ */ ++static int set_ssc(void __iomem *base) ++{ ++ int tmp; ++ u16 wrdata; ++ int pll, ssc; ++ ++ tmp = mdio_write(base, MDIO_PORT0, SET_ADDR_OFFSET, SSC_REGS_ADDR); ++ if (tmp < 0) ++ return tmp; ++ ++ tmp = mdio_read(base, MDIO_PORT0, SSC_CNTL_OFFSET); ++ if (tmp < 0) ++ return tmp; ++ ++ wrdata = INSERT_FIELD(tmp, SSC_CNTL_OVRD, EN, 1); ++ wrdata = INSERT_FIELD(wrdata, SSC_CNTL_OVRD, VAL, 1); ++ tmp = mdio_write(base, MDIO_PORT0, SSC_CNTL_OFFSET, wrdata); ++ if (tmp < 0) ++ return tmp; ++ ++ usleep_range(1000, 2000); ++ tmp = mdio_read(base, MDIO_PORT0, SSC_STATUS_OFFSET); ++ if (tmp < 0) ++ return tmp; ++ ++ ssc = EXTRACT_FIELD(tmp, SSC_STATUS, SSC); ++ pll = EXTRACT_FIELD(tmp, SSC_STATUS, PLL_LOCK); ++ ++ return (ssc && pll) ? 0 : -EIO; ++} ++ ++/* Limits operation to a specific generation (1, 2, or 3) */ ++static void set_gen(void __iomem *base, int gen) ++{ ++ u32 lnkcap = bcm_readl(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ u16 lnkctl2 = bcm_readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++ ++ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; ++ bcm_writel(lnkcap, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ ++ lnkctl2 = (lnkctl2 & ~0xf) | gen; ++ bcm_writew(lnkctl2, base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++} ++ ++static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, ++ unsigned int win, phys_addr_t cpu_addr, ++ dma_addr_t pcie_addr, dma_addr_t size) ++{ ++ void __iomem *base = pcie->base; ++ phys_addr_t cpu_addr_mb, limit_addr_mb; ++ u32 tmp; ++ ++ /* Set the base of the pcie_addr window */ ++ bcm_writel(lower_32_bits(pcie_addr) + MMIO_ENDIAN, ++ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + (win * 8)); ++ bcm_writel(upper_32_bits(pcie_addr), ++ base + PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + (win * 8)); ++ ++ cpu_addr_mb = cpu_addr >> 20; ++ limit_addr_mb = (cpu_addr + size - 1) >> 20; ++ ++ /* Write the addr base low register */ ++ WR_FLD_WITH_OFFSET(base, (win * 4), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, ++ BASE, cpu_addr_mb); ++ /* Write the addr limit low register */ ++ WR_FLD_WITH_OFFSET(base, (win * 4), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT, ++ LIMIT, limit_addr_mb); ++ ++ if (pcie->type != BCM7435 && pcie->type != BCM7425) { ++ /* Write the cpu addr high register */ ++ tmp = (u32)(cpu_addr_mb >> ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); ++ WR_FLD_WITH_OFFSET(base, (win * 8), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI, ++ BASE, tmp); ++ /* Write the cpu limit high register */ ++ tmp = (u32)(limit_addr_mb >> ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_NUM_MASK_BITS); ++ WR_FLD_WITH_OFFSET(base, (win * 8), ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI, ++ LIMIT, tmp); ++ } ++} ++ ++/* Configuration space read/write support */ ++static int cfg_index(int busnr, int devfn, int reg) ++{ ++ return ((PCI_SLOT(devfn) & 0x1f) << PCIE_SLOT_SHIFT) ++ | ((PCI_FUNC(devfn) & 0x07) << PCIE_FUNC_SHIFT) ++ | (busnr << PCIE_BUSNUM_SHIFT) ++ | (reg & ~3); ++} ++ ++/* The controller is capable of serving in both RC and EP roles */ ++static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ u32 val = bcm_readl(base + PCIE_MISC_PCIE_STATUS); ++ ++ return !!EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PORT); ++} ++ ++static bool brcm_pcie_link_up(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ u32 val = bcm_readl(base + PCIE_MISC_PCIE_STATUS); ++ u32 dla = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_DL_ACTIVE); ++ u32 plu = EXTRACT_FIELD(val, PCIE_MISC_PCIE_STATUS, PCIE_PHYLINKUP); ++ ++ return (dla && plu) ? true : false; ++} ++ ++static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, ++ int where) ++{ ++ struct brcm_pcie *pcie = bus->sysdata; ++ void __iomem *base = pcie->base; ++ int idx; ++ ++ /* Accesses to the RC go right to the RC registers if slot==0 */ ++ if (pci_is_root_bus(bus)) ++ return PCI_SLOT(devfn) ? NULL : base + where; ++ ++ /* For devices, write to the config space index register */ ++ idx = cfg_index(bus->number, devfn, where); ++ bcm_writel(idx, pcie->base + IDX_ADDR(pcie)); ++ return base + DATA_ADDR(pcie) + (where & 0x3); ++} ++ ++static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, ++ unsigned int val) ++{ ++ unsigned int shift = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_SHIFT]; ++ u32 mask = pcie->reg_field_info[RGR1_SW_INIT_1_INIT_MASK]; ++ ++ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), mask, shift, val); ++} ++ ++static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, ++ unsigned int val) ++{ ++ if (pcie->type != BCM7278) ++ wr_fld_rb(pcie->base + PCIE_RGR1_SW_INIT_1(pcie), ++ PCIE_RGR1_SW_INIT_1_PERST_MASK, ++ PCIE_RGR1_SW_INIT_1_PERST_SHIFT, val); ++ else ++ /* Assert = 0, de-assert = 1 on 7278 */ ++ WR_FLD_RB(pcie->base, PCIE_MISC_PCIE_CTRL, PCIE_PERSTB, !val); ++} ++ ++static int brcm_pcie_add_controller(struct brcm_pcie *pcie) ++{ ++ int i, ret = 0; ++ ++ mutex_lock(&brcm_pcie_lock); ++ if (num_pcie > 0) { ++ num_pcie++; ++ goto done; ++ } ++ ++ /* Determine num_memc and their sizes */ ++ for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { ++ u64 size = brcmstb_memory_memc_size(i); ++ ++ if (size == (u64)-1) { ++ dev_err(pcie->dev, "cannot get memc%d size\n", i); ++ ret = -EINVAL; ++ goto done; ++ } else if (size) { ++ scb_size[i] = roundup_pow_of_two_64(size); ++ num_memc++; ++ } else { ++ break; ++ } ++ } ++ if (!ret && num_memc == 0) { ++ ret = -EINVAL; ++ goto done; ++ } ++ ++ num_pcie++; ++done: ++ mutex_unlock(&brcm_pcie_lock); ++ return ret; ++} ++ ++static void brcm_pcie_remove_controller(struct brcm_pcie *pcie) ++{ ++ mutex_lock(&brcm_pcie_lock); ++ if (--num_pcie == 0) ++ num_memc = 0; ++ mutex_unlock(&brcm_pcie_lock); ++} ++ ++static int brcm_pcie_parse_request_of_pci_ranges(struct brcm_pcie *pcie) ++{ ++ struct resource_entry *win; ++ int ret; ++ ++ ret = devm_of_pci_get_host_bridge_resources(pcie->dev, 0, 0xff, ++ &pcie->resources, NULL); ++ if (ret) { ++ dev_err(pcie->dev, "failed to get host resources\n"); ++ return ret; ++ } ++ ++ resource_list_for_each_entry(win, &pcie->resources) { ++ struct resource *parent, *res = win->res; ++ dma_addr_t offset = (dma_addr_t)win->offset; ++ ++ if (resource_type(res) == IORESOURCE_IO) { ++ parent = &ioport_resource; ++ } else if (resource_type(res) == IORESOURCE_MEM) { ++ if (pcie->num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) { ++ dev_err(pcie->dev, "too many outbound wins\n"); ++ return -EINVAL; ++ } ++ pcie->out_wins[pcie->num_out_wins].cpu_addr ++ = (phys_addr_t)res->start; ++ pcie->out_wins[pcie->num_out_wins].pcie_addr ++ = (dma_addr_t)(res->start ++ - (phys_addr_t)offset); ++ pcie->out_wins[pcie->num_out_wins].size ++ = (dma_addr_t)(res->end - res->start + 1); ++ pcie->num_out_wins++; ++ parent = &iomem_resource; ++ } else { ++ continue; ++ } ++ ++ ret = devm_request_resource(pcie->dev, parent, res); ++ if (ret) { ++ dev_err(pcie->dev, "failed to get res %pR\n", res); ++ return ret; ++ } ++ } ++ return 0; ++} ++ ++static int brcm_pcie_setup(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ unsigned int scb_size_val; ++ u64 rc_bar2_offset, rc_bar2_size, total_mem_size = 0; ++ u32 tmp, burst; ++ int i, j, ret, limit; ++ u16 nlw, cls, lnksta; ++ bool ssc_good = false; ++ struct device *dev = pcie->dev; ++ ++ /* Reset the bridge */ ++ brcm_pcie_bridge_sw_init_set(pcie, 1); ++ ++ /* ++ * Ensure that the fundamental reset is asserted, except for 7278, ++ * which fails if we do this. ++ */ ++ if (pcie->type != BCM7278) ++ brcm_pcie_perst_set(pcie, 1); ++ ++ usleep_range(100, 200); ++ ++ /* Take the bridge out of reset */ ++ brcm_pcie_bridge_sw_init_set(pcie, 0); ++ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, SERDES_IDDQ, 0); ++ /* Wait for SerDes to be stable */ ++ usleep_range(100, 200); ++ ++ /* Grab the PCIe hw revision number */ ++ tmp = bcm_readl(base + PCIE_MISC_REVISION); ++ pcie->rev = EXTRACT_FIELD(tmp, PCIE_MISC_REVISION, MAJMIN); ++ ++ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ ++ tmp = INSERT_FIELD(0, PCIE_MISC_MISC_CTRL, SCB_ACCESS_EN, 1); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, CFG_READ_UR_MODE, 1); ++ burst = (pcie->type == GENERIC || pcie->type == BCM7278) ++ ? BURST_SIZE_512 : BURST_SIZE_256; ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, MAX_BURST_SIZE, burst); ++ bcm_writel(tmp, base + PCIE_MISC_MISC_CTRL); ++ ++ /* ++ * Set up inbound memory view for the EP (called RC_BAR2, ++ * not to be confused with the BARs that are advertised by ++ * the EP). ++ */ ++ for (i = 0; i < num_memc; i++) ++ total_mem_size += scb_size[i]; ++ ++ /* ++ * The PCIe host controller by design must set the inbound ++ * viewport to be a contiguous arrangement of all of the ++ * system's memory. In addition, its size mut be a power of ++ * two. To further complicate matters, the viewport must ++ * start on a pcie-address that is aligned on a multiple of its ++ * size. If a portion of the viewport does not represent ++ * system memory -- e.g. 3GB of memory requires a 4GB viewport ++ * -- we can map the outbound memory in or after 3GB and even ++ * though the viewport will overlap the outbound memory the ++ * controller will know to send outbound memory downstream and ++ * everything else upstream. ++ */ ++ rc_bar2_size = roundup_pow_of_two_64(total_mem_size); ++ ++ /* ++ * Set simple configuration based on memory sizes ++ * only. We always start the viewport at address 0. ++ */ ++ rc_bar2_offset = 0; ++ ++ tmp = lower_32_bits(rc_bar2_offset); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_RC_BAR2_CONFIG_LO, SIZE, ++ encode_ibar_size(rc_bar2_size)); ++ bcm_writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); ++ bcm_writel(upper_32_bits(rc_bar2_offset), ++ base + PCIE_MISC_RC_BAR2_CONFIG_HI); ++ ++ scb_size_val = scb_size[0] ++ ? ilog2(scb_size[0]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB0_SIZE, scb_size_val); ++ ++ if (num_memc > 1) { ++ scb_size_val = scb_size[1] ++ ? ilog2(scb_size[1]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB1_SIZE, scb_size_val); ++ } ++ ++ if (num_memc > 2) { ++ scb_size_val = scb_size[2] ++ ? ilog2(scb_size[2]) - 15 : 0xf; /* 0xf is 1GB */ ++ WR_FLD(base, PCIE_MISC_MISC_CTRL, SCB2_SIZE, scb_size_val); ++ } ++ ++ /* disable the PCIe->GISB memory window (RC_BAR1) */ ++ WR_FLD(base, PCIE_MISC_RC_BAR1_CONFIG_LO, SIZE, 0); ++ ++ /* disable the PCIe->SCB memory window (RC_BAR3) */ ++ WR_FLD(base, PCIE_MISC_RC_BAR3_CONFIG_LO, SIZE, 0); ++ ++ if (!pcie->suspended) { ++ /* clear any interrupts we find on boot */ ++ bcm_writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + CLR); ++ (void)bcm_readl(base + PCIE_INTR2_CPU_BASE + CLR); ++ } ++ ++ /* Mask all interrupts since we are not handling any yet */ ++ bcm_writel(0xffffffff, base + PCIE_INTR2_CPU_BASE + MASK_SET); ++ (void)bcm_readl(base + PCIE_INTR2_CPU_BASE + MASK_SET); ++ ++ if (pcie->gen) ++ set_gen(base, pcie->gen); ++ ++ /* Unassert the fundamental reset */ ++ brcm_pcie_perst_set(pcie, 0); ++ ++ /* ++ * Give the RC/EP time to wake up, before trying to configure RC. ++ * Intermittently check status for link-up, up to a total of 100ms ++ * when we don't know if the device is there, and up to 1000ms if ++ * we do know the device is there. ++ */ ++ limit = pcie->suspended ? 1000 : 100; ++ for (i = 1, j = 0; j < limit && !brcm_pcie_link_up(pcie); ++ j += i, i = i * 2) ++ msleep(i + j > limit ? limit - j : i); ++ ++ if (!brcm_pcie_link_up(pcie)) { ++ dev_info(dev, "link down\n"); ++ return -ENODEV; ++ } ++ ++ if (!brcm_pcie_rc_mode(pcie)) { ++ dev_err(dev, "PCIe misconfigured; is in EP mode\n"); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < pcie->num_out_wins; i++) ++ brcm_pcie_set_outbound_win(pcie, i, pcie->out_wins[i].cpu_addr, ++ pcie->out_wins[i].pcie_addr, ++ pcie->out_wins[i].size); ++ ++ /* ++ * For config space accesses on the RC, show the right class for ++ * a PCIe-PCIe bridge (the default setting is to be EP mode). ++ */ ++ WR_FLD_RB(base, PCIE_RC_CFG_PRIV1_ID_VAL3, CLASS_CODE, 0x060400); ++ ++ if (pcie->ssc) { ++ ret = set_ssc(base); ++ if (ret == 0) ++ ssc_good = true; ++ else ++ dev_err(dev, "failed attempt to enter ssc mode\n"); ++ } ++ ++ lnksta = bcm_readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); ++ cls = lnksta & PCI_EXP_LNKSTA_CLS; ++ nlw = (lnksta & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT; ++ dev_info(dev, "link up, %s Gbps x%u %s\n", link_speed_to_str(cls), ++ nlw, ssc_good ? "(SSC)" : "(!SSC)"); ++ ++ /* PCIe->SCB endian mode for BAR */ ++ /* field ENDIAN_MODE_BAR2 = DATA_ENDIAN */ ++ WR_FLD_RB(base, PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1, ++ ENDIAN_MODE_BAR2, DATA_ENDIAN); ++ ++ /* ++ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 ++ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. ++ */ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, CLKREQ_DEBUG_ENABLE, 1); ++ ++ return 0; ++} ++ ++/* L23 is a low-power PCIe link state */ ++static void enter_l23(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ int tries, l23; ++ ++ /* assert request for L23 */ ++ WR_FLD_RB(base, PCIE_MISC_PCIE_CTRL, PCIE_L23_REQUEST, 1); ++ /* poll L23 status */ ++ for (tries = 0, l23 = 0; tries < 1000 && !l23; tries++) ++ l23 = RD_FLD(base, PCIE_MISC_PCIE_STATUS, PCIE_LINK_IN_L23); ++ if (!l23) ++ dev_err(pcie->dev, "failed to enter L23\n"); ++} ++ ++static void turn_off(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ ++ if (brcm_pcie_link_up(pcie)) ++ enter_l23(pcie); ++ /* Assert fundamental reset */ ++ brcm_pcie_perst_set(pcie, 1); ++ /* Deassert request for L23 in case it was asserted */ ++ WR_FLD_RB(base, PCIE_MISC_PCIE_CTRL, PCIE_L23_REQUEST, 0); ++ /* Turn off SerDes */ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, SERDES_IDDQ, 1); ++ /* Shutdown PCIe bridge */ ++ brcm_pcie_bridge_sw_init_set(pcie, 1); ++} ++ ++static int brcm_pcie_suspend(struct device *dev) ++{ ++ struct brcm_pcie *pcie = dev_get_drvdata(dev); ++ ++ turn_off(pcie); ++ clk_disable_unprepare(pcie->clk); ++ pcie->suspended = true; ++ ++ return 0; ++} ++ ++static int brcm_pcie_resume(struct device *dev) ++{ ++ struct brcm_pcie *pcie = dev_get_drvdata(dev); ++ void __iomem *base; ++ int ret; ++ ++ base = pcie->base; ++ clk_prepare_enable(pcie->clk); ++ ++ /* Take bridge out of reset so we can access the SerDes reg */ ++ brcm_pcie_bridge_sw_init_set(pcie, 0); ++ ++ /* Turn on SerDes */ ++ WR_FLD_RB(base, PCIE_MISC_HARD_PCIE_HARD_DEBUG, SERDES_IDDQ, 0); ++ /* Wait for SerDes to be stable */ ++ usleep_range(100, 200); ++ ++ ret = brcm_pcie_setup(pcie); ++ if (ret) ++ return ret; ++ ++ pcie->suspended = false; ++ ++ return 0; ++} ++ ++static void _brcm_pcie_remove(struct brcm_pcie *pcie) ++{ ++ turn_off(pcie); ++ clk_disable_unprepare(pcie->clk); ++ clk_put(pcie->clk); ++ brcm_pcie_remove_controller(pcie); ++} ++ ++static int brcm_pcie_remove(struct platform_device *pdev) ++{ ++ struct brcm_pcie *pcie = platform_get_drvdata(pdev); ++ ++ pci_stop_root_bus(pcie->root_bus); ++ pci_remove_root_bus(pcie->root_bus); ++ _brcm_pcie_remove(pcie); ++ ++ return 0; ++} ++ ++static const struct of_device_id brcm_pcie_match[] = { ++ { .compatible = "brcm,bcm7425-pcie", .data = &bcm7425_cfg }, ++ { .compatible = "brcm,bcm7435-pcie", .data = &bcm7435_cfg }, ++ { .compatible = "brcm,bcm7278-pcie", .data = &bcm7278_cfg }, ++ { .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, brcm_pcie_match); ++ ++static int brcm_pcie_probe(struct platform_device *pdev) ++{ ++ struct device_node *dn = pdev->dev.of_node; ++ const struct of_device_id *of_id; ++ const struct pcie_cfg_data *data; ++ int ret; ++ struct brcm_pcie *pcie; ++ struct resource *res; ++ void __iomem *base; ++ u32 tmp; ++ struct pci_host_bridge *bridge; ++ struct pci_bus *child; ++ ++ bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); ++ if (!bridge) ++ return -ENOMEM; ++ ++ pcie = pci_host_bridge_priv(bridge); ++ INIT_LIST_HEAD(&pcie->resources); ++ ++ of_id = of_match_node(brcm_pcie_match, dn); ++ if (!of_id) { ++ dev_err(&pdev->dev, "failed to look up compatible string\n"); ++ return -EINVAL; ++ } ++ ++ if (of_property_read_u32(dn, "dma-ranges", &tmp) == 0) { ++ dev_err(&pdev->dev, "cannot yet handle dma-ranges\n"); ++ return -EINVAL; ++ } ++ ++ data = of_id->data; ++ pcie->reg_offsets = data->offsets; ++ pcie->reg_field_info = data->reg_field_info; ++ pcie->type = data->type; ++ pcie->dn = dn; ++ pcie->dev = &pdev->dev; ++ ++ /* We use the domain number as our controller number */ ++ pcie->id = of_get_pci_domain_nr(dn); ++ if (pcie->id < 0) ++ return pcie->id; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res) ++ return -EINVAL; ++ ++ base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(base)) ++ return PTR_ERR(base); ++ ++ pcie->clk = of_clk_get_by_name(dn, "sw_pcie"); ++ if (IS_ERR(pcie->clk)) { ++ dev_err(&pdev->dev, "could not get clock\n"); ++ pcie->clk = NULL; ++ } ++ pcie->base = base; ++ ++ ret = of_pci_get_max_link_speed(dn); ++ pcie->gen = (ret < 0) ? 0 : ret; ++ ++ pcie->ssc = of_property_read_bool(dn, "brcm,enable-ssc"); ++ ++ ret = irq_of_parse_and_map(pdev->dev.of_node, 0); ++ if (ret == 0) ++ /* keep going, as we don't use this intr yet */ ++ dev_warn(pcie->dev, "cannot get PCIe interrupt\n"); ++ else ++ pcie->irq = ret; ++ ++ ret = brcm_pcie_parse_request_of_pci_ranges(pcie); ++ if (ret) ++ return ret; ++ ++ ret = clk_prepare_enable(pcie->clk); ++ if (ret) { ++ dev_err(&pdev->dev, "could not enable clock\n"); ++ return ret; ++ } ++ ++ ret = brcm_pcie_add_controller(pcie); ++ if (ret) ++ return ret; ++ ++ ret = brcm_pcie_setup(pcie); ++ if (ret) ++ goto fail; ++ ++ list_splice_init(&pcie->resources, &bridge->windows); ++ bridge->dev.parent = &pdev->dev; ++ bridge->busnr = 0; ++ bridge->ops = &brcm_pcie_ops; ++ bridge->sysdata = pcie; ++ bridge->map_irq = of_irq_parse_and_map_pci; ++ bridge->swizzle_irq = pci_common_swizzle; ++ ++ ret = pci_scan_root_bus_bridge(bridge); ++ if (ret < 0) { ++ dev_err(pcie->dev, "Scanning root bridge failed\n"); ++ goto fail; ++ } ++ ++ pci_assign_unassigned_bus_resources(bridge->bus); ++ list_for_each_entry(child, &bridge->bus->children, node) ++ pcie_bus_configure_settings(child); ++ pci_bus_add_devices(bridge->bus); ++ platform_set_drvdata(pdev, pcie); ++ pcie->root_bus = bridge->bus; ++ ++ return 0; ++ ++fail: ++ _brcm_pcie_remove(pcie); ++ return ret; ++} ++ ++static const struct dev_pm_ops brcm_pcie_pm_ops = { ++ .suspend_noirq = brcm_pcie_suspend, ++ .resume_noirq = brcm_pcie_resume, ++}; ++ ++static struct platform_driver brcm_pcie_driver = { ++ .probe = brcm_pcie_probe, ++ .remove = brcm_pcie_remove, ++ .driver = { ++ .name = "brcm-pcie", ++ .owner = THIS_MODULE, ++ .of_match_table = brcm_pcie_match, ++ .pm = &brcm_pcie_pm_ops, ++ }, ++}; ++ ++module_platform_driver(brcm_pcie_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("Broadcom STB PCIe RC driver"); ++MODULE_AUTHOR("Broadcom"); +--- /dev/null ++++ b/include/soc/brcmstb/memory_api.h +@@ -0,0 +1,25 @@ ++#ifndef __MEMORY_API_H ++#define __MEMORY_API_H ++ ++/* ++ * Bus Interface Unit control register setup, must happen early during boot, ++ * before SMP is brought up, called by machine entry point. ++ */ ++void brcmstb_biuctrl_init(void); ++ ++#ifdef CONFIG_SOC_BRCMSTB ++int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa); ++u64 brcmstb_memory_memc_size(int memc); ++#else ++static inline int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa) ++{ ++ return -EINVAL; ++} ++ ++static inline u64 brcmstb_memory_memc_size(int memc) ++{ ++ return -1; ++} ++#endif ++ ++#endif /* __MEMORY_API_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0535-PCI-brcmstb-Add-dma-range-mapping-for-inbound-traffi.patch b/target/linux/brcm2708/patches-4.19/950-0535-PCI-brcmstb-Add-dma-range-mapping-for-inbound-traffi.patch new file mode 100644 index 000000000..aba422604 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0535-PCI-brcmstb-Add-dma-range-mapping-for-inbound-traffi.patch @@ -0,0 +1,569 @@ +From 00dbba2f38e18a68e5dce8327ec91bdcb94d2bd1 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 19 Feb 2019 22:06:59 +0000 +Subject: [PATCH 535/703] PCI: brcmstb: Add dma-range mapping for inbound + traffic + +The Broadcom STB PCIe host controller is intimately related to the +memory subsystem. This close relationship adds complexity to how cpu +system memory is mapped to PCIe memory. Ideally, this mapping is an +identity mapping, or an identity mapping off by a constant. Not so in +this case. + +Consider the Broadcom reference board BCM97445LCC_4X8 which has 6 GB +of system memory. Here is how the PCIe controller maps the +system memory to PCIe memory: + + memc0-a@[ 0....3fffffff] <=> pci@[ 0....3fffffff] + memc0-b@[100000000...13fffffff] <=> pci@[ 40000000....7fffffff] + memc1-a@[ 40000000....7fffffff] <=> pci@[ 80000000....bfffffff] + memc1-b@[300000000...33fffffff] <=> pci@[ c0000000....ffffffff] + memc2-a@[ 80000000....bfffffff] <=> pci@[100000000...13fffffff] + memc2-b@[c00000000...c3fffffff] <=> pci@[140000000...17fffffff] + +Although there are some "gaps" that can be added between the +individual mappings by software, the permutation of memory regions for +the most part is fixed by HW. The solution of having something close +to an identity mapping is not possible. + +The idea behind this HW design is that the same PCIe module can +act as an RC or EP, and if it acts as an EP it concatenates all +of system memory into a BAR so anything can be accessed. Unfortunately, +when the PCIe block is in the role of an RC it also presents this +"BAR" to downstream PCIe devices, rather than offering an identity map +between its system memory and PCIe space. + +Suppose that an endpoint driver allocs some DMA memory. Suppose this +memory is located at 0x6000_0000, which is in the middle of memc1-a. +The driver wants a dma_addr_t value that it can pass on to the EP to +use. Without doing any custom mapping, the EP will use this value for +DMA: the driver will get a dma_addr_t equal to 0x6000_0000. But this +won't work; the device needs a dma_addr_t that reflects the PCIe space +address, namely 0xa000_0000. + +So, essentially the solution to this problem must modify the +dma_addr_t returned by the DMA routines routines. There are two +ways (I know of) of doing this: + +(a) overriding/redefining the dma_to_phys() and phys_to_dma() calls +that are used by the dma_ops routines. This is the approach of + + arch/mips/cavium-octeon/dma-octeon.c + +In ARM and ARM64 these two routines are defiend in asm/dma-mapping.h +as static inline functions. + +(b) Subscribe to a notifier that notifies when a device is added to a +bus. When this happens, set_dma_ops() can be called for the device. +This method is mentioned in: + + http://lxr.free-electrons.com/source/drivers/of/platform.c?v=3.16#L152 + +where it says as a comment + + "In case if platform code need to use own special DMA + configuration, it can use Platform bus notifier and + handle BUS_NOTIFY_ADD_DEVICE event to fix up DMA + configuration." + +Solution (b) is what this commit does. It uses its own set of +dma_ops which are wrappers around the arch_dma_ops. The +wrappers translate the dma addresses before/after invoking +the arch_dma_ops, as appropriate. + +Signed-off-by: Jim Quinlan +--- + drivers/pci/controller/pcie-brcmstb.c | 420 +++++++++++++++++++++++++- + 1 file changed, 411 insertions(+), 9 deletions(-) + +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -4,6 +4,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -319,11 +320,307 @@ static struct pci_ops brcm_pcie_ops = { + ((val & ~reg##_##field##_MASK) | \ + (reg##_##field##_MASK & (field_val << reg##_##field##_SHIFT))) + ++static const struct dma_map_ops *arch_dma_ops; ++static const struct dma_map_ops *brcm_dma_ops_ptr; ++static struct of_pci_range *dma_ranges; ++static int num_dma_ranges; ++ + static phys_addr_t scb_size[BRCM_MAX_SCB]; + static int num_memc; + static int num_pcie; + static DEFINE_MUTEX(brcm_pcie_lock); + ++static dma_addr_t brcm_to_pci(dma_addr_t addr) ++{ ++ struct of_pci_range *p; ++ ++ if (!num_dma_ranges) ++ return addr; ++ ++ for (p = dma_ranges; p < &dma_ranges[num_dma_ranges]; p++) ++ if (addr >= p->cpu_addr && addr < (p->cpu_addr + p->size)) ++ return addr - p->cpu_addr + p->pci_addr; ++ ++ return addr; ++} ++ ++static dma_addr_t brcm_to_cpu(dma_addr_t addr) ++{ ++ struct of_pci_range *p; ++ ++ if (!num_dma_ranges) ++ return addr; ++ ++ for (p = dma_ranges; p < &dma_ranges[num_dma_ranges]; p++) ++ if (addr >= p->pci_addr && addr < (p->pci_addr + p->size)) ++ return addr - p->pci_addr + p->cpu_addr; ++ ++ return addr; ++} ++ ++static void *brcm_alloc(struct device *dev, size_t size, dma_addr_t *handle, ++ gfp_t gfp, unsigned long attrs) ++{ ++ void *ret; ++ ++ ret = arch_dma_ops->alloc(dev, size, handle, gfp, attrs); ++ if (ret) ++ *handle = brcm_to_pci(*handle); ++ return ret; ++} ++ ++static void brcm_free(struct device *dev, size_t size, void *cpu_addr, ++ dma_addr_t handle, unsigned long attrs) ++{ ++ handle = brcm_to_cpu(handle); ++ arch_dma_ops->free(dev, size, cpu_addr, handle, attrs); ++} ++ ++static int brcm_mmap(struct device *dev, struct vm_area_struct *vma, ++ void *cpu_addr, dma_addr_t dma_addr, size_t size, ++ unsigned long attrs) ++{ ++ dma_addr = brcm_to_cpu(dma_addr); ++ return arch_dma_ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); ++} ++ ++static int brcm_get_sgtable(struct device *dev, struct sg_table *sgt, ++ void *cpu_addr, dma_addr_t handle, size_t size, ++ unsigned long attrs) ++{ ++ handle = brcm_to_cpu(handle); ++ return arch_dma_ops->get_sgtable(dev, sgt, cpu_addr, handle, size, ++ attrs); ++} ++ ++static dma_addr_t brcm_map_page(struct device *dev, struct page *page, ++ unsigned long offset, size_t size, ++ enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ return brcm_to_pci(arch_dma_ops->map_page(dev, page, offset, size, ++ dir, attrs)); ++} ++ ++static void brcm_unmap_page(struct device *dev, dma_addr_t handle, ++ size_t size, enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ handle = brcm_to_cpu(handle); ++ arch_dma_ops->unmap_page(dev, handle, size, dir, attrs); ++} ++ ++static int brcm_map_sg(struct device *dev, struct scatterlist *sgl, ++ int nents, enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ int i, j; ++ struct scatterlist *sg; ++ ++ for_each_sg(sgl, sg, nents, i) { ++#ifdef CONFIG_NEED_SG_DMA_LENGTH ++ sg->dma_length = sg->length; ++#endif ++ sg->dma_address = ++ brcm_dma_ops_ptr->map_page(dev, sg_page(sg), sg->offset, ++ sg->length, dir, attrs); ++ if (dma_mapping_error(dev, sg->dma_address)) ++ goto bad_mapping; ++ } ++ return nents; ++ ++bad_mapping: ++ for_each_sg(sgl, sg, i, j) ++ brcm_dma_ops_ptr->unmap_page(dev, sg_dma_address(sg), ++ sg_dma_len(sg), dir, attrs); ++ return 0; ++} ++ ++static void brcm_unmap_sg(struct device *dev, ++ struct scatterlist *sgl, int nents, ++ enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ int i; ++ struct scatterlist *sg; ++ ++ for_each_sg(sgl, sg, nents, i) ++ brcm_dma_ops_ptr->unmap_page(dev, sg_dma_address(sg), ++ sg_dma_len(sg), dir, attrs); ++} ++ ++static void brcm_sync_single_for_cpu(struct device *dev, ++ dma_addr_t handle, size_t size, ++ enum dma_data_direction dir) ++{ ++ handle = brcm_to_cpu(handle); ++ arch_dma_ops->sync_single_for_cpu(dev, handle, size, dir); ++} ++ ++static void brcm_sync_single_for_device(struct device *dev, ++ dma_addr_t handle, size_t size, ++ enum dma_data_direction dir) ++{ ++ handle = brcm_to_cpu(handle); ++ arch_dma_ops->sync_single_for_device(dev, handle, size, dir); ++} ++ ++static dma_addr_t brcm_map_resource(struct device *dev, phys_addr_t phys, ++ size_t size, ++ enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ if (arch_dma_ops->map_resource) ++ return brcm_to_pci(arch_dma_ops->map_resource ++ (dev, phys, size, dir, attrs)); ++ return brcm_to_pci((dma_addr_t)phys); ++} ++ ++static void brcm_unmap_resource(struct device *dev, dma_addr_t handle, ++ size_t size, enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ if (arch_dma_ops->unmap_resource) ++ arch_dma_ops->unmap_resource(dev, brcm_to_cpu(handle), size, ++ dir, attrs); ++} ++ ++void brcm_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, ++ int nents, enum dma_data_direction dir) ++{ ++ struct scatterlist *sg; ++ int i; ++ ++ for_each_sg(sgl, sg, nents, i) ++ brcm_dma_ops_ptr->sync_single_for_cpu(dev, sg_dma_address(sg), ++ sg->length, dir); ++} ++ ++void brcm_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, ++ int nents, enum dma_data_direction dir) ++{ ++ struct scatterlist *sg; ++ int i; ++ ++ for_each_sg(sgl, sg, nents, i) ++ brcm_dma_ops_ptr->sync_single_for_device(dev, ++ sg_dma_address(sg), ++ sg->length, dir); ++} ++ ++static int brcm_mapping_error(struct device *dev, dma_addr_t dma_addr) ++{ ++ return arch_dma_ops->mapping_error(dev, dma_addr); ++} ++ ++static int brcm_dma_supported(struct device *dev, u64 mask) ++{ ++ if (num_dma_ranges) { ++ /* ++ * It is our translated addresses that the EP will "see", so ++ * we check all of the ranges for the largest possible value. ++ */ ++ int i; ++ ++ for (i = 0; i < num_dma_ranges; i++) ++ if (dma_ranges[i].pci_addr + dma_ranges[i].size - 1 ++ > mask) ++ return 0; ++ return 1; ++ } ++ ++ return arch_dma_ops->dma_supported(dev, mask); ++} ++ ++#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK ++u64 brcm_get_required_mask)(struct device *dev) ++{ ++ return arch_dma_ops->get_required_mask(dev); ++} ++#endif ++ ++static const struct dma_map_ops brcm_dma_ops = { ++ .alloc = brcm_alloc, ++ .free = brcm_free, ++ .mmap = brcm_mmap, ++ .get_sgtable = brcm_get_sgtable, ++ .map_page = brcm_map_page, ++ .unmap_page = brcm_unmap_page, ++ .map_sg = brcm_map_sg, ++ .unmap_sg = brcm_unmap_sg, ++ .map_resource = brcm_map_resource, ++ .unmap_resource = brcm_unmap_resource, ++ .sync_single_for_cpu = brcm_sync_single_for_cpu, ++ .sync_single_for_device = brcm_sync_single_for_device, ++ .sync_sg_for_cpu = brcm_sync_sg_for_cpu, ++ .sync_sg_for_device = brcm_sync_sg_for_device, ++ .mapping_error = brcm_mapping_error, ++ .dma_supported = brcm_dma_supported, ++#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK ++ .get_required_mask = brcm_get_required_mask, ++#endif ++}; ++ ++static void brcm_set_dma_ops(struct device *dev) ++{ ++ int ret; ++ ++ if (IS_ENABLED(CONFIG_ARM64)) { ++ /* ++ * We are going to invoke get_dma_ops(). That ++ * function, at this point in time, invokes ++ * get_arch_dma_ops(), and for ARM64 that function ++ * returns a pointer to dummy_dma_ops. So then we'd ++ * like to call arch_setup_dma_ops(), but that isn't ++ * exported. Instead, we call of_dma_configure(), ++ * which is exported, and this calls ++ * arch_setup_dma_ops(). Once we do this the call to ++ * get_dma_ops() will work properly because ++ * dev->dma_ops will be set. ++ */ ++ ret = of_dma_configure(dev, dev->of_node, true); ++ if (ret) { ++ dev_err(dev, "of_dma_configure() failed: %d\n", ret); ++ return; ++ } ++ } ++ ++ arch_dma_ops = get_dma_ops(dev); ++ if (!arch_dma_ops) { ++ dev_err(dev, "failed to get arch_dma_ops\n"); ++ return; ++ } ++ ++ set_dma_ops(dev, &brcm_dma_ops); ++} ++ ++static int brcmstb_platform_notifier(struct notifier_block *nb, ++ unsigned long event, void *__dev) ++{ ++ struct device *dev = __dev; ++ ++ brcm_dma_ops_ptr = &brcm_dma_ops; ++ if (event != BUS_NOTIFY_ADD_DEVICE) ++ return NOTIFY_DONE; ++ ++ brcm_set_dma_ops(dev); ++ return NOTIFY_OK; ++} ++ ++static struct notifier_block brcmstb_platform_nb = { ++ .notifier_call = brcmstb_platform_notifier, ++}; ++ ++static int brcm_register_notifier(void) ++{ ++ return bus_register_notifier(&pci_bus_type, &brcmstb_platform_nb); ++} ++ ++static int brcm_unregister_notifier(void) ++{ ++ return bus_unregister_notifier(&pci_bus_type, &brcmstb_platform_nb); ++} ++ + static u32 rd_fld(void __iomem *p, u32 mask, int shift) + { + return (bcm_readl(p) & mask) >> shift; +@@ -597,9 +894,71 @@ static inline void brcm_pcie_perst_set(s + WR_FLD_RB(pcie->base, PCIE_MISC_PCIE_CTRL, PCIE_PERSTB, !val); + } + ++static int pci_dma_range_parser_init(struct of_pci_range_parser *parser, ++ struct device_node *node) ++{ ++ const int na = 3, ns = 2; ++ int rlen; ++ ++ parser->node = node; ++ parser->pna = of_n_addr_cells(node); ++ parser->np = parser->pna + na + ns; ++ ++ parser->range = of_get_property(node, "dma-ranges", &rlen); ++ if (!parser->range) ++ return -ENOENT; ++ ++ parser->end = parser->range + rlen / sizeof(__be32); ++ ++ return 0; ++} ++ ++static int brcm_pcie_parse_map_dma_ranges(struct brcm_pcie *pcie) ++{ ++ int i; ++ struct of_pci_range_parser parser; ++ struct device_node *dn = pcie->dn; ++ ++ /* ++ * Parse dma-ranges property if present. If there are multiple ++ * PCIe controllers, we only have to parse from one of them since ++ * the others will have an identical mapping. ++ */ ++ if (!pci_dma_range_parser_init(&parser, dn)) { ++ unsigned int max_ranges ++ = (parser.end - parser.range) / parser.np; ++ ++ dma_ranges = kcalloc(max_ranges, sizeof(struct of_pci_range), ++ GFP_KERNEL); ++ if (!dma_ranges) ++ return -ENOMEM; ++ ++ for (i = 0; of_pci_range_parser_one(&parser, dma_ranges + i); ++ i++) ++ num_dma_ranges++; ++ } ++ ++ for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { ++ u64 size = brcmstb_memory_memc_size(i); ++ ++ if (size == (u64)-1) { ++ dev_err(pcie->dev, "cannot get memc%d size", i); ++ return -EINVAL; ++ } else if (size) { ++ scb_size[i] = roundup_pow_of_two_64(size); ++ num_memc++; ++ } else { ++ break; ++ } ++ } ++ ++ return 0; ++} ++ + static int brcm_pcie_add_controller(struct brcm_pcie *pcie) + { + int i, ret = 0; ++ struct device *dev = pcie->dev; + + mutex_lock(&brcm_pcie_lock); + if (num_pcie > 0) { +@@ -607,12 +966,21 @@ static int brcm_pcie_add_controller(stru + goto done; + } + ++ ret = brcm_register_notifier(); ++ if (ret) { ++ dev_err(dev, "failed to register pci bus notifier\n"); ++ goto done; ++ } ++ ret = brcm_pcie_parse_map_dma_ranges(pcie); ++ if (ret) ++ goto done; ++ + /* Determine num_memc and their sizes */ + for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { + u64 size = brcmstb_memory_memc_size(i); + + if (size == (u64)-1) { +- dev_err(pcie->dev, "cannot get memc%d size\n", i); ++ dev_err(dev, "cannot get memc%d size\n", i); + ret = -EINVAL; + goto done; + } else if (size) { +@@ -636,8 +1004,16 @@ done: + static void brcm_pcie_remove_controller(struct brcm_pcie *pcie) + { + mutex_lock(&brcm_pcie_lock); +- if (--num_pcie == 0) +- num_memc = 0; ++ if (--num_pcie > 0) ++ goto out; ++ ++ if (brcm_unregister_notifier()) ++ dev_err(pcie->dev, "failed to unregister pci bus notifier\n"); ++ kfree(dma_ranges); ++ dma_ranges = NULL; ++ num_dma_ranges = 0; ++ num_memc = 0; ++out: + mutex_unlock(&brcm_pcie_lock); + } + +@@ -757,6 +1133,38 @@ static int brcm_pcie_setup(struct brcm_p + */ + rc_bar2_offset = 0; + ++ if (dma_ranges) { ++ /* ++ * The best-case scenario is to place the inbound ++ * region in the first 4GB of pci-space, as some ++ * legacy devices can only address 32bits. ++ * We would also like to put the MSI under 4GB ++ * as well, since some devices require a 32bit ++ * MSI target address. ++ */ ++ if (total_mem_size <= 0xc0000000ULL && ++ rc_bar2_size <= 0x100000000ULL) { ++ rc_bar2_offset = 0; ++ } else { ++ /* ++ * The system memory is 4GB or larger so we ++ * cannot start the inbound region at location ++ * 0 (since we have to allow some space for ++ * outbound memory @ 3GB). So instead we ++ * start it at the 1x multiple of its size ++ */ ++ rc_bar2_offset = rc_bar2_size; ++ } ++ ++ } else { ++ /* ++ * Set simple configuration based on memory sizes ++ * only. We always start the viewport at address 0, ++ * and set the MSI target address accordingly. ++ */ ++ rc_bar2_offset = 0; ++ } ++ + tmp = lower_32_bits(rc_bar2_offset); + tmp = INSERT_FIELD(tmp, PCIE_MISC_RC_BAR2_CONFIG_LO, SIZE, + encode_ibar_size(rc_bar2_size)); +@@ -967,7 +1375,6 @@ static int brcm_pcie_probe(struct platfo + struct brcm_pcie *pcie; + struct resource *res; + void __iomem *base; +- u32 tmp; + struct pci_host_bridge *bridge; + struct pci_bus *child; + +@@ -984,11 +1391,6 @@ static int brcm_pcie_probe(struct platfo + return -EINVAL; + } + +- if (of_property_read_u32(dn, "dma-ranges", &tmp) == 0) { +- dev_err(&pdev->dev, "cannot yet handle dma-ranges\n"); +- return -EINVAL; +- } +- + data = of_id->data; + pcie->reg_offsets = data->offsets; + pcie->reg_field_info = data->reg_field_info; diff --git a/target/linux/brcm2708/patches-4.19/950-0536-PCI-brcmstb-Add-MSI-capability.patch b/target/linux/brcm2708/patches-4.19/950-0536-PCI-brcmstb-Add-MSI-capability.patch new file mode 100644 index 000000000..f2ed3d811 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0536-PCI-brcmstb-Add-MSI-capability.patch @@ -0,0 +1,543 @@ +From 17f152efa5b5c156df0ff918b38855a1b4efd1e9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 19 Feb 2019 22:06:59 +0000 +Subject: [PATCH 536/703] PCI: brcmstb: Add MSI capability + +This commit adds MSI to the Broadcom STB PCIe host controller. It does +not add MSIX since that functionality is not in the HW. The MSI +controller is physically located within the PCIe block, however, there +is no reason why the MSI controller could not be moved elsewhere in +the future. + +Since the internal Brcmstb MSI controller is intertwined with the PCIe +controller, it is not its own platform device but rather part of the +PCIe platform device. + +Signed-off-by: Jim Quinlan +--- + drivers/pci/controller/pcie-brcmstb.c | 374 ++++++++++++++++++++++++-- + 1 file changed, 353 insertions(+), 21 deletions(-) + +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + /* Copyright (C) 2009 - 2017 Broadcom */ + ++#include + #include + #include + #include +@@ -9,11 +10,13 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -47,6 +50,9 @@ + #define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 + #define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 + #define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c ++#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 ++#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 ++#define PCIE_MISC_MSI_DATA_CONFIG 0x404c + #define PCIE_MISC_PCIE_CTRL 0x4064 + #define PCIE_MISC_PCIE_STATUS 0x4068 + #define PCIE_MISC_REVISION 0x406c +@@ -55,6 +61,7 @@ + #define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 + #define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 + #define PCIE_INTR2_CPU_BASE 0x4300 ++#define PCIE_MSI_INTR2_BASE 0x4500 + + /* + * Broadcom Settop Box PCIe Register Field shift and mask info. The +@@ -115,6 +122,8 @@ + + #define BRCM_NUM_PCIE_OUT_WINS 0x4 + #define BRCM_MAX_SCB 0x4 ++#define BRCM_INT_PCI_MSI_NR 32 ++#define BRCM_PCIE_HW_REV_33 0x0303 + + #define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL + #define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL +@@ -203,6 +212,33 @@ struct brcm_window { + dma_addr_t size; + }; + ++struct brcm_msi { ++ struct device *dev; ++ void __iomem *base; ++ struct device_node *dn; ++ struct irq_domain *msi_domain; ++ struct irq_domain *inner_domain; ++ struct mutex lock; /* guards the alloc/free operations */ ++ u64 target_addr; ++ int irq; ++ ++ /* intr_base is the base pointer for interrupt status/set/clr regs */ ++ void __iomem *intr_base; ++ ++ /* intr_legacy_mask indicates how many bits are MSI interrupts */ ++ u32 intr_legacy_mask; ++ ++ /* ++ * intr_legacy_offset indicates bit position of MSI_01. It is ++ * to map the register bit position to a hwirq that starts at 0. ++ */ ++ u32 intr_legacy_offset; ++ ++ /* used indicates which MSI interrupts have been alloc'd */ ++ unsigned long used; ++ unsigned int rev; ++}; ++ + /* Internal PCIe Host Controller Information.*/ + struct brcm_pcie { + struct device *dev; +@@ -217,7 +253,10 @@ struct brcm_pcie { + int num_out_wins; + bool ssc; + int gen; ++ u64 msi_target_addr; + struct brcm_window out_wins[BRCM_NUM_PCIE_OUT_WINS]; ++ struct brcm_msi *msi; ++ bool msi_internal; + unsigned int rev; + const int *reg_offsets; + const int *reg_field_info; +@@ -225,9 +264,9 @@ struct brcm_pcie { + }; + + struct pcie_cfg_data { +- const int *reg_field_info; +- const int *offsets; +- const enum pcie_type type; ++ const int *reg_field_info; ++ const int *offsets; ++ const enum pcie_type type; + }; + + static const int pcie_reg_field_info[] = { +@@ -828,6 +867,267 @@ static void brcm_pcie_set_outbound_win(s + } + } + ++static struct irq_chip brcm_msi_irq_chip = { ++ .name = "Brcm_MSI", ++ .irq_mask = pci_msi_mask_irq, ++ .irq_unmask = pci_msi_unmask_irq, ++}; ++ ++static struct msi_domain_info brcm_msi_domain_info = { ++ .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | ++ MSI_FLAG_PCI_MSIX), ++ .chip = &brcm_msi_irq_chip, ++}; ++ ++static void brcm_pcie_msi_isr(struct irq_desc *desc) ++{ ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct brcm_msi *msi; ++ unsigned long status, virq; ++ u32 mask, bit, hwirq; ++ struct device *dev; ++ ++ chained_irq_enter(chip, desc); ++ msi = irq_desc_get_handler_data(desc); ++ mask = msi->intr_legacy_mask; ++ dev = msi->dev; ++ ++ while ((status = bcm_readl(msi->intr_base + STATUS) & mask)) { ++ for_each_set_bit(bit, &status, BRCM_INT_PCI_MSI_NR) { ++ /* clear the interrupt */ ++ bcm_writel(1 << bit, msi->intr_base + CLR); ++ ++ /* Account for legacy interrupt offset */ ++ hwirq = bit - msi->intr_legacy_offset; ++ ++ virq = irq_find_mapping(msi->inner_domain, hwirq); ++ if (virq) { ++ if (msi->used & (1 << hwirq)) ++ generic_handle_irq(virq); ++ else ++ dev_info(dev, "unhandled MSI %d\n", ++ hwirq); ++ } else { ++ /* Unknown MSI, just clear it */ ++ dev_dbg(dev, "unexpected MSI\n"); ++ } ++ } ++ } ++ chained_irq_exit(chip, desc); ++} ++ ++static void brcm_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ++{ ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); ++ u32 temp; ++ ++ msg->address_lo = lower_32_bits(msi->target_addr); ++ msg->address_hi = upper_32_bits(msi->target_addr); ++ temp = bcm_readl(msi->base + PCIE_MISC_MSI_DATA_CONFIG); ++ msg->data = ((temp >> 16) & (temp & 0xffff)) | data->hwirq; ++} ++ ++static int brcm_msi_set_affinity(struct irq_data *irq_data, ++ const struct cpumask *mask, bool force) ++{ ++ return -EINVAL; ++} ++ ++static struct irq_chip brcm_msi_bottom_irq_chip = { ++ .name = "Brcm_MSI", ++ .irq_compose_msi_msg = brcm_compose_msi_msg, ++ .irq_set_affinity = brcm_msi_set_affinity, ++}; ++ ++static int brcm_msi_alloc(struct brcm_msi *msi) ++{ ++ int bit, hwirq; ++ ++ mutex_lock(&msi->lock); ++ bit = ~msi->used ? ffz(msi->used) : -1; ++ ++ if (bit >= 0 && bit < BRCM_INT_PCI_MSI_NR) { ++ msi->used |= (1 << bit); ++ hwirq = bit - msi->intr_legacy_offset; ++ } else { ++ hwirq = -ENOSPC; ++ } ++ ++ mutex_unlock(&msi->lock); ++ return hwirq; ++} ++ ++static void brcm_msi_free(struct brcm_msi *msi, unsigned long hwirq) ++{ ++ mutex_lock(&msi->lock); ++ msi->used &= ~(1 << (hwirq + msi->intr_legacy_offset)); ++ mutex_unlock(&msi->lock); ++} ++ ++static int brcm_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, ++ unsigned int nr_irqs, void *args) ++{ ++ struct brcm_msi *msi = domain->host_data; ++ int hwirq; ++ ++ hwirq = brcm_msi_alloc(msi); ++ ++ if (hwirq < 0) ++ return hwirq; ++ ++ irq_domain_set_info(domain, virq, (irq_hw_number_t)hwirq, ++ &brcm_msi_bottom_irq_chip, domain->host_data, ++ handle_simple_irq, NULL, NULL); ++ return 0; ++} ++ ++static void brcm_irq_domain_free(struct irq_domain *domain, ++ unsigned int virq, unsigned int nr_irqs) ++{ ++ struct irq_data *d = irq_domain_get_irq_data(domain, virq); ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(d); ++ ++ brcm_msi_free(msi, d->hwirq); ++} ++ ++static void brcm_msi_set_regs(struct brcm_msi *msi) ++{ ++ u32 data_val, msi_lo, msi_hi; ++ ++ if (msi->rev >= BRCM_PCIE_HW_REV_33) { ++ /* ++ * ffe0 -- least sig 5 bits are 0 indicating 32 msgs ++ * 6540 -- this is our arbitrary unique data value ++ */ ++ data_val = 0xffe06540; ++ } else { ++ /* ++ * fff8 -- least sig 3 bits are 0 indicating 8 msgs ++ * 6540 -- this is our arbitrary unique data value ++ */ ++ data_val = 0xfff86540; ++ } ++ ++ /* ++ * Make sure we are not masking MSIs. Note that MSIs can be masked, ++ * but that occurs on the PCIe EP device ++ */ ++ bcm_writel(0xffffffff & msi->intr_legacy_mask, ++ msi->intr_base + MASK_CLR); ++ ++ msi_lo = lower_32_bits(msi->target_addr); ++ msi_hi = upper_32_bits(msi->target_addr); ++ /* ++ * The 0 bit of PCIE_MISC_MSI_BAR_CONFIG_LO is repurposed to MSI ++ * enable, which we set to 1. ++ */ ++ bcm_writel(msi_lo | 1, msi->base + PCIE_MISC_MSI_BAR_CONFIG_LO); ++ bcm_writel(msi_hi, msi->base + PCIE_MISC_MSI_BAR_CONFIG_HI); ++ bcm_writel(data_val, msi->base + PCIE_MISC_MSI_DATA_CONFIG); ++} ++ ++static const struct irq_domain_ops msi_domain_ops = { ++ .alloc = brcm_irq_domain_alloc, ++ .free = brcm_irq_domain_free, ++}; ++ ++static int brcm_allocate_domains(struct brcm_msi *msi) ++{ ++ struct fwnode_handle *fwnode = of_node_to_fwnode(msi->dn); ++ struct device *dev = msi->dev; ++ ++ msi->inner_domain = irq_domain_add_linear(NULL, BRCM_INT_PCI_MSI_NR, ++ &msi_domain_ops, msi); ++ if (!msi->inner_domain) { ++ dev_err(dev, "failed to create IRQ domain\n"); ++ return -ENOMEM; ++ } ++ ++ msi->msi_domain = pci_msi_create_irq_domain(fwnode, ++ &brcm_msi_domain_info, ++ msi->inner_domain); ++ if (!msi->msi_domain) { ++ dev_err(dev, "failed to create MSI domain\n"); ++ irq_domain_remove(msi->inner_domain); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static void brcm_free_domains(struct brcm_msi *msi) ++{ ++ irq_domain_remove(msi->msi_domain); ++ irq_domain_remove(msi->inner_domain); ++} ++ ++static void brcm_msi_remove(struct brcm_pcie *pcie) ++{ ++ struct brcm_msi *msi = pcie->msi; ++ ++ if (!msi) ++ return; ++ irq_set_chained_handler(msi->irq, NULL); ++ irq_set_handler_data(msi->irq, NULL); ++ brcm_free_domains(msi); ++} ++ ++static int brcm_pcie_enable_msi(struct brcm_pcie *pcie) ++{ ++ struct brcm_msi *msi; ++ int irq, ret; ++ struct device *dev = pcie->dev; ++ ++ irq = irq_of_parse_and_map(dev->of_node, 1); ++ if (irq <= 0) { ++ dev_err(dev, "cannot map msi intr\n"); ++ return -ENODEV; ++ } ++ ++ msi = devm_kzalloc(dev, sizeof(struct brcm_msi), GFP_KERNEL); ++ if (!msi) ++ return -ENOMEM; ++ ++ msi->dev = dev; ++ msi->base = pcie->base; ++ msi->rev = pcie->rev; ++ msi->dn = pcie->dn; ++ msi->target_addr = pcie->msi_target_addr; ++ msi->irq = irq; ++ ++ ret = brcm_allocate_domains(msi); ++ if (ret) ++ return ret; ++ ++ irq_set_chained_handler_and_data(msi->irq, brcm_pcie_msi_isr, msi); ++ ++ if (msi->rev >= BRCM_PCIE_HW_REV_33) { ++ msi->intr_base = msi->base + PCIE_MSI_INTR2_BASE; ++ /* ++ * This version of PCIe hw has only 32 intr bits ++ * starting at bit position 0. ++ */ ++ msi->intr_legacy_mask = 0xffffffff; ++ msi->intr_legacy_offset = 0x0; ++ msi->used = 0x0; ++ ++ } else { ++ msi->intr_base = msi->base + PCIE_INTR2_CPU_BASE; ++ /* ++ * This version of PCIe hw has only 8 intr bits starting ++ * at bit position 24. ++ */ ++ msi->intr_legacy_mask = 0xff000000; ++ msi->intr_legacy_offset = 24; ++ msi->used = 0x00ffffff; ++ } ++ ++ brcm_msi_set_regs(msi); ++ pcie->msi = msi; ++ ++ return 0; ++} ++ + /* Configuration space read/write support */ + static int cfg_index(int busnr, int devfn, int reg) + { +@@ -1072,6 +1372,7 @@ static int brcm_pcie_setup(struct brcm_p + u16 nlw, cls, lnksta; + bool ssc_good = false; + struct device *dev = pcie->dev; ++ u64 msi_target_addr; + + /* Reset the bridge */ + brcm_pcie_bridge_sw_init_set(pcie, 1); +@@ -1116,27 +1417,24 @@ static int brcm_pcie_setup(struct brcm_p + * The PCIe host controller by design must set the inbound + * viewport to be a contiguous arrangement of all of the + * system's memory. In addition, its size mut be a power of +- * two. To further complicate matters, the viewport must +- * start on a pcie-address that is aligned on a multiple of its +- * size. If a portion of the viewport does not represent +- * system memory -- e.g. 3GB of memory requires a 4GB viewport +- * -- we can map the outbound memory in or after 3GB and even +- * though the viewport will overlap the outbound memory the +- * controller will know to send outbound memory downstream and +- * everything else upstream. ++ * two. Further, the MSI target address must NOT be placed ++ * inside this region, as the decoding logic will consider its ++ * address to be inbound memory traffic. To further ++ * complicate matters, the viewport must start on a ++ * pcie-address that is aligned on a multiple of its size. ++ * If a portion of the viewport does not represent system ++ * memory -- e.g. 3GB of memory requires a 4GB viewport -- ++ * we can map the outbound memory in or after 3GB and even ++ * though the viewport will overlap the outbound memory ++ * the controller will know to send outbound memory downstream ++ * and everything else upstream. + */ + rc_bar2_size = roundup_pow_of_two_64(total_mem_size); + +- /* +- * Set simple configuration based on memory sizes +- * only. We always start the viewport at address 0. +- */ +- rc_bar2_offset = 0; +- + if (dma_ranges) { + /* + * The best-case scenario is to place the inbound +- * region in the first 4GB of pci-space, as some ++ * region in the first 4GB of pcie-space, as some + * legacy devices can only address 32bits. + * We would also like to put the MSI under 4GB + * as well, since some devices require a 32bit +@@ -1145,6 +1443,14 @@ static int brcm_pcie_setup(struct brcm_p + if (total_mem_size <= 0xc0000000ULL && + rc_bar2_size <= 0x100000000ULL) { + rc_bar2_offset = 0; ++ /* If the viewport is less then 4GB we can fit ++ * the MSI target address under 4GB. Otherwise ++ * put it right below 64GB. ++ */ ++ msi_target_addr = ++ (rc_bar2_size == 0x100000000ULL) ++ ? BRCM_MSI_TARGET_ADDR_GT_4GB ++ : BRCM_MSI_TARGET_ADDR_LT_4GB; + } else { + /* + * The system memory is 4GB or larger so we +@@ -1154,8 +1460,12 @@ static int brcm_pcie_setup(struct brcm_p + * start it at the 1x multiple of its size + */ + rc_bar2_offset = rc_bar2_size; +- } + ++ /* Since we are starting the viewport at 4GB or ++ * higher, put the MSI target address below 4GB ++ */ ++ msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; ++ } + } else { + /* + * Set simple configuration based on memory sizes +@@ -1163,7 +1473,12 @@ static int brcm_pcie_setup(struct brcm_p + * and set the MSI target address accordingly. + */ + rc_bar2_offset = 0; ++ ++ msi_target_addr = (rc_bar2_size >= 0x100000000ULL) ++ ? BRCM_MSI_TARGET_ADDR_GT_4GB ++ : BRCM_MSI_TARGET_ADDR_LT_4GB; + } ++ pcie->msi_target_addr = msi_target_addr; + + tmp = lower_32_bits(rc_bar2_offset); + tmp = INSERT_FIELD(tmp, PCIE_MISC_RC_BAR2_CONFIG_LO, SIZE, +@@ -1333,6 +1648,9 @@ static int brcm_pcie_resume(struct devic + if (ret) + return ret; + ++ if (pcie->msi && pcie->msi_internal) ++ brcm_msi_set_regs(pcie->msi); ++ + pcie->suspended = false; + + return 0; +@@ -1340,6 +1658,7 @@ static int brcm_pcie_resume(struct devic + + static void _brcm_pcie_remove(struct brcm_pcie *pcie) + { ++ brcm_msi_remove(pcie); + turn_off(pcie); + clk_disable_unprepare(pcie->clk); + clk_put(pcie->clk); +@@ -1368,7 +1687,7 @@ MODULE_DEVICE_TABLE(of, brcm_pcie_match) + + static int brcm_pcie_probe(struct platform_device *pdev) + { +- struct device_node *dn = pdev->dev.of_node; ++ struct device_node *dn = pdev->dev.of_node, *msi_dn; + const struct of_device_id *of_id; + const struct pcie_cfg_data *data; + int ret; +@@ -1448,6 +1767,20 @@ static int brcm_pcie_probe(struct platfo + if (ret) + goto fail; + ++ msi_dn = of_parse_phandle(pcie->dn, "msi-parent", 0); ++ /* Use the internal MSI if no msi-parent property */ ++ if (!msi_dn) ++ msi_dn = pcie->dn; ++ ++ if (pci_msi_enabled() && msi_dn == pcie->dn) { ++ ret = brcm_pcie_enable_msi(pcie); ++ if (ret) ++ dev_err(pcie->dev, ++ "probe of internal MSI failed: %d)", ret); ++ else ++ pcie->msi_internal = true; ++ } ++ + list_splice_init(&pcie->resources, &bridge->windows); + bridge->dev.parent = &pdev->dev; + bridge->busnr = 0; +@@ -1470,7 +1803,6 @@ static int brcm_pcie_probe(struct platfo + pcie->root_bus = bridge->bus; + + return 0; +- + fail: + _brcm_pcie_remove(pcie); + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0537-dt-bindings-pci-Add-DT-docs-for-Brcmstb-PCIe-device.patch b/target/linux/brcm2708/patches-4.19/950-0537-dt-bindings-pci-Add-DT-docs-for-Brcmstb-PCIe-device.patch new file mode 100644 index 000000000..fec88b768 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0537-dt-bindings-pci-Add-DT-docs-for-Brcmstb-PCIe-device.patch @@ -0,0 +1,77 @@ +From ed5b4725bde9d0067ac2a1098756ff5abfa13798 Mon Sep 17 00:00:00 2001 +From: Jim Quinlan +Date: Mon, 15 Jan 2018 18:28:39 -0500 +Subject: [PATCH 537/703] dt-bindings: pci: Add DT docs for Brcmstb PCIe device + +The DT bindings description of the Brcmstb PCIe device is described. This +node can be used by almost all Broadcom settop box chips, using +ARM, ARM64, or MIPS CPU architectures. + +Signed-off-by: Jim Quinlan +--- + .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 +++++++++++++++++++ + 1 file changed, 59 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/brcmstb-pcie.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt +@@ -0,0 +1,59 @@ ++Brcmstb PCIe Host Controller Device Tree Bindings ++ ++Required Properties: ++- compatible ++ "brcm,bcm7425-pcie" -- for 7425 family MIPS-based SOCs. ++ "brcm,bcm7435-pcie" -- for 7435 family MIPS-based SOCs. ++ "brcm,bcm7445-pcie" -- for 7445 and later ARM based SOCs (not including ++ the 7278). ++ "brcm,bcm7278-pcie" -- for 7278 family ARM-based SOCs. ++ ++- reg -- the register start address and length for the PCIe reg block. ++- interrupts -- two interrupts are specified; the first interrupt is for ++ the PCI host controller and the second is for MSI if the built-in ++ MSI controller is to be used. ++- interrupt-names -- names of the interrupts (above): "pcie" and "msi". ++- #address-cells -- set to <3>. ++- #size-cells -- set to <2>. ++- #interrupt-cells: set to <1>. ++- interrupt-map-mask and interrupt-map, standard PCI properties to define the ++ mapping of the PCIe interface to interrupt numbers. ++- ranges: ranges for the PCI memory and I/O regions. ++- linux,pci-domain -- should be unique per host controller. ++ ++Optional Properties: ++- clocks -- phandle of pcie clock. ++- clock-names -- set to "sw_pcie" if clocks is used. ++- dma-ranges -- Specifies the inbound memory mapping regions when ++ an "identity map" is not possible. ++- msi-controller -- this property is typically specified to have the ++ PCIe controller use its internal MSI controller. ++- msi-parent -- set to use an external MSI interrupt controller. ++- brcm,enable-ssc -- (boolean) indicates usage of spread-spectrum clocking. ++- max-link-speed -- (integer) indicates desired generation of link: ++ 1 => 2.5 Gbps (gen1), 2 => 5.0 Gbps (gen2), 3 => 8.0 Gbps (gen3). ++ ++Example Node: ++ ++pcie0: pcie@f0460000 { ++ reg = <0x0 0xf0460000 0x0 0x9310>; ++ interrupts = <0x0 0x0 0x4>; ++ compatible = "brcm,bcm7445-pcie"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000 ++ 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0 0 0 1 &intc 0 47 3 ++ 0 0 0 2 &intc 0 48 3 ++ 0 0 0 3 &intc 0 49 3 ++ 0 0 0 4 &intc 0 50 3>; ++ clocks = <&sw_pcie0>; ++ clock-names = "sw_pcie"; ++ msi-parent = <&pcie0>; /* use PCIe's internal MSI controller */ ++ msi-controller; /* use PCIe's internal MSI controller */ ++ brcm,ssc; ++ max-link-speed = <1>; ++ linux,pci-domain = <0>; ++ }; diff --git a/target/linux/brcm2708/patches-4.19/950-0538-pcie-brcmstb-Changes-for-BCM2711.patch b/target/linux/brcm2708/patches-4.19/950-0538-pcie-brcmstb-Changes-for-BCM2711.patch new file mode 100644 index 000000000..f622986dd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0538-pcie-brcmstb-Changes-for-BCM2711.patch @@ -0,0 +1,1411 @@ +From 20675667235d3f454db422f8fbc296605195647e Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 19 Feb 2019 22:06:59 +0000 +Subject: [PATCH 538/703] pcie-brcmstb: Changes for BCM2711 + +The initial brcmstb PCIe driver - originally taken from the V3(?) +patch set - has been modified significantly for the BCM2711. + +Signed-off-by: Phil Elwell +--- + drivers/dma/bcm2835-dma.c | 107 ++++ + drivers/pci/controller/Makefile | 4 + + drivers/pci/controller/pcie-brcmstb-bounce.c | 564 +++++++++++++++++++ + drivers/pci/controller/pcie-brcmstb-bounce.h | 32 ++ + drivers/pci/controller/pcie-brcmstb.c | 237 ++++---- + drivers/soc/bcm/brcmstb/Makefile | 2 +- + drivers/soc/bcm/brcmstb/memory.c | 158 ++++++ + 7 files changed, 996 insertions(+), 108 deletions(-) + create mode 100644 drivers/pci/controller/pcie-brcmstb-bounce.c + create mode 100644 drivers/pci/controller/pcie-brcmstb-bounce.h + create mode 100644 drivers/soc/bcm/brcmstb/memory.c + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -68,6 +68,17 @@ struct bcm2835_dma_cb { + uint32_t pad[2]; + }; + ++struct bcm2838_dma40_scb { ++ uint32_t ti; ++ uint32_t src; ++ uint32_t srci; ++ uint32_t dst; ++ uint32_t dsti; ++ uint32_t len; ++ uint32_t next_cb; ++ uint32_t rsvd; ++}; ++ + struct bcm2835_cb_entry { + struct bcm2835_dma_cb *cb; + dma_addr_t paddr; +@@ -185,6 +196,45 @@ struct bcm2835_desc { + #define MAX_DMA_LEN SZ_1G + #define MAX_LITE_DMA_LEN (SZ_64K - 4) + ++/* 40-bit DMA support */ ++#define BCM2838_DMA40_CS 0x00 ++#define BCM2838_DMA40_CB 0x04 ++#define BCM2838_DMA40_DEBUG 0x0c ++#define BCM2858_DMA40_TI 0x10 ++#define BCM2838_DMA40_SRC 0x14 ++#define BCM2838_DMA40_SRCI 0x18 ++#define BCM2838_DMA40_DEST 0x1c ++#define BCM2838_DMA40_DESTI 0x20 ++#define BCM2838_DMA40_LEN 0x24 ++#define BCM2838_DMA40_NEXT_CB 0x28 ++#define BCM2838_DMA40_DEBUG2 0x2c ++ ++#define BCM2838_DMA40_CS_ACTIVE BIT(0) ++#define BCM2838_DMA40_CS_END BIT(1) ++ ++#define BCM2838_DMA40_CS_QOS(x) (((x) & 0x1f) << 16) ++#define BCM2838_DMA40_CS_PANIC_QOS(x) (((x) & 0x1f) << 20) ++#define BCM2838_DMA40_CS_WRITE_WAIT BIT(28) ++ ++#define BCM2838_DMA40_BURST_LEN(x) ((((x) - 1) & 0xf) << 8) ++#define BCM2838_DMA40_INC BIT(12) ++#define BCM2838_DMA40_SIZE_128 (2 << 13) ++ ++#define BCM2838_DMA40_MEMCPY_QOS \ ++ (BCM2838_DMA40_CS_QOS(0x0) | \ ++ BCM2838_DMA40_CS_PANIC_QOS(0x0) | \ ++ BCM2838_DMA40_CS_WRITE_WAIT) ++ ++#define BCM2838_DMA40_MEMCPY_XFER_INFO \ ++ (BCM2838_DMA40_SIZE_128 | \ ++ BCM2838_DMA40_INC | \ ++ BCM2838_DMA40_BURST_LEN(16)) ++ ++static void __iomem *memcpy_chan; ++static struct bcm2838_dma40_scb *memcpy_scb; ++static dma_addr_t memcpy_scb_dma; ++DEFINE_SPINLOCK(memcpy_lock); ++ + static inline size_t bcm2835_dma_max_frame_length(struct bcm2835_chan *c) + { + /* lite and normal channels have different max frame length */ +@@ -868,6 +918,56 @@ static void bcm2835_dma_free(struct bcm2 + } + } + ++int bcm2838_dma40_memcpy_init(struct device *dev) ++{ ++ if (memcpy_scb) ++ return 0; ++ ++ memcpy_scb = dma_alloc_coherent(dev, sizeof(*memcpy_scb), ++ &memcpy_scb_dma, GFP_KERNEL); ++ ++ if (!memcpy_scb) { ++ pr_err("bcm2838_dma40_memcpy_init failed!\n"); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++EXPORT_SYMBOL(bcm2838_dma40_memcpy_init); ++ ++void bcm2838_dma40_memcpy(dma_addr_t dst, dma_addr_t src, size_t size) ++{ ++ struct bcm2838_dma40_scb *scb = memcpy_scb; ++ unsigned long flags; ++ ++ if (!scb) { ++ pr_err("bcm2838_dma40_memcpy not initialised!\n"); ++ return; ++ } ++ ++ spin_lock_irqsave(&memcpy_lock, flags); ++ ++ scb->ti = 0; ++ scb->src = lower_32_bits(src); ++ scb->srci = upper_32_bits(src) | BCM2838_DMA40_MEMCPY_XFER_INFO; ++ scb->dst = lower_32_bits(dst); ++ scb->dsti = upper_32_bits(dst) | BCM2838_DMA40_MEMCPY_XFER_INFO; ++ scb->len = size; ++ scb->next_cb = 0; ++ ++ writel((u32)(memcpy_scb_dma >> 5), memcpy_chan + BCM2838_DMA40_CB); ++ writel(BCM2838_DMA40_MEMCPY_QOS + BCM2838_DMA40_CS_ACTIVE, ++ memcpy_chan + BCM2838_DMA40_CS); ++ /* Poll for completion */ ++ while (!(readl(memcpy_chan + BCM2838_DMA40_CS) & BCM2838_DMA40_CS_END)) ++ cpu_relax(); ++ ++ writel(BCM2838_DMA40_CS_END, memcpy_chan + BCM2838_DMA40_CS); ++ ++ spin_unlock_irqrestore(&memcpy_lock, flags); ++} ++EXPORT_SYMBOL(bcm2838_dma40_memcpy); ++ + static const struct of_device_id bcm2835_dma_of_match[] = { + { .compatible = "brcm,bcm2835-dma", }, + {}, +@@ -964,6 +1064,13 @@ static int bcm2835_dma_probe(struct plat + /* Channel 0 is used by the legacy API */ + chans_available &= ~BCM2835_DMA_BULK_MASK; + ++ /* We can't use channels 11-13 yet */ ++ chans_available &= ~(BIT(11) | BIT(12) | BIT(13)); ++ ++ /* Grab channel 14 for the 40-bit DMA memcpy */ ++ chans_available &= ~BIT(14); ++ memcpy_chan = BCM2835_DMA_CHANIO(base, 14); ++ + /* get irqs for each channel that we support */ + for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) { + /* skip masked out channels */ +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -29,6 +29,10 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-medi + obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o + obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o ++ifdef CONFIG_ARM ++obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb-bounce.o ++endif ++ + obj-$(CONFIG_VMD) += vmd.o + # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW + obj-y += dwc/ +--- /dev/null ++++ b/drivers/pci/controller/pcie-brcmstb-bounce.c +@@ -0,0 +1,564 @@ ++/* ++ * This code started out as a version of arch/arm/common/dmabounce.c, ++ * modified to cope with highmem pages. Now it has been changed heavily - ++ * it now preallocates a large block (currently 4MB) and carves it up ++ * sequentially in ring fashion, and DMA is used to copy the data - to the ++ * point where very little of the original remains. ++ * ++ * Copyright (C) 2019 Raspberry Pi (Trading) Ltd. ++ * ++ * Original version by Brad Parker (brad@heeltoe.com) ++ * Re-written by Christopher Hoover ++ * Made generic by Deepak Saxena ++ * ++ * Copyright (C) 2002 Hewlett Packard Company. ++ * Copyright (C) 2004 MontaVista Software, Inc. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define STATS ++ ++#ifdef STATS ++#define DO_STATS(X) do { X ; } while (0) ++#else ++#define DO_STATS(X) do { } while (0) ++#endif ++ ++/* ************************************************** */ ++ ++struct safe_buffer { ++ struct list_head node; ++ ++ /* original request */ ++ size_t size; ++ int direction; ++ ++ struct dmabounce_pool *pool; ++ void *safe; ++ dma_addr_t unsafe_dma_addr; ++ dma_addr_t safe_dma_addr; ++}; ++ ++struct dmabounce_pool { ++ unsigned long pages; ++ void *virt_addr; ++ dma_addr_t dma_addr; ++ unsigned long *alloc_map; ++ unsigned long alloc_pos; ++ spinlock_t lock; ++ struct device *dev; ++ unsigned long num_pages; ++#ifdef STATS ++ size_t max_size; ++ unsigned long num_bufs; ++ unsigned long max_bufs; ++ unsigned long max_pages; ++#endif ++}; ++ ++struct dmabounce_device_info { ++ struct device *dev; ++ dma_addr_t threshold; ++ struct list_head safe_buffers; ++ struct dmabounce_pool pool; ++ rwlock_t lock; ++#ifdef STATS ++ unsigned long map_count; ++ unsigned long unmap_count; ++ unsigned long sync_dev_count; ++ unsigned long sync_cpu_count; ++ unsigned long fail_count; ++ int attr_res; ++#endif ++}; ++ ++static struct dmabounce_device_info *g_dmabounce_device_info; ++ ++extern int bcm2838_dma40_memcpy_init(struct device *dev); ++extern void bcm2838_dma40_memcpy(dma_addr_t dst, dma_addr_t src, size_t size); ++ ++#ifdef STATS ++static ssize_t ++bounce_show(struct device *dev, struct device_attribute *attr, char *buf) ++{ ++ struct dmabounce_device_info *device_info = g_dmabounce_device_info; ++ return sprintf(buf, "m:%lu/%lu s:%lu/%lu f:%lu s:%zu b:%lu/%lu a:%lu/%lu\n", ++ device_info->map_count, ++ device_info->unmap_count, ++ device_info->sync_dev_count, ++ device_info->sync_cpu_count, ++ device_info->fail_count, ++ device_info->pool.max_size, ++ device_info->pool.num_bufs, ++ device_info->pool.max_bufs, ++ device_info->pool.num_pages * PAGE_SIZE, ++ device_info->pool.max_pages * PAGE_SIZE); ++} ++ ++static DEVICE_ATTR(dmabounce_stats, 0444, bounce_show, NULL); ++#endif ++ ++static int bounce_create(struct dmabounce_pool *pool, struct device *dev, ++ unsigned long buffer_size) ++{ ++ int ret = -ENOMEM; ++ pool->pages = (buffer_size + PAGE_SIZE - 1)/PAGE_SIZE; ++ pool->alloc_map = bitmap_zalloc(pool->pages, GFP_KERNEL); ++ if (!pool->alloc_map) ++ goto err_bitmap; ++ pool->virt_addr = dma_alloc_coherent(dev, pool->pages * PAGE_SIZE, ++ &pool->dma_addr, GFP_KERNEL); ++ if (!pool->virt_addr) ++ goto err_dmabuf; ++ ++ pool->alloc_pos = 0; ++ spin_lock_init(&pool->lock); ++ pool->dev = dev; ++ pool->num_pages = 0; ++ ++ DO_STATS(pool->max_size = 0); ++ DO_STATS(pool->num_bufs = 0); ++ DO_STATS(pool->max_bufs = 0); ++ DO_STATS(pool->max_pages = 0); ++ ++ return 0; ++ ++err_dmabuf: ++ bitmap_free(pool->alloc_map); ++err_bitmap: ++ return ret; ++} ++ ++static void bounce_destroy(struct dmabounce_pool *pool) ++{ ++ dma_free_coherent(pool->dev, pool->pages * PAGE_SIZE, pool->virt_addr, ++ pool->dma_addr); ++ ++ bitmap_free(pool->alloc_map); ++} ++ ++static void *bounce_alloc(struct dmabounce_pool *pool, size_t size, ++ dma_addr_t *dmaaddrp) ++{ ++ unsigned long pages; ++ unsigned long flags; ++ unsigned long pos; ++ ++ pages = (size + PAGE_SIZE - 1)/PAGE_SIZE; ++ ++ DO_STATS(pool->max_size = max(size, pool->max_size)); ++ ++ spin_lock_irqsave(&pool->lock, flags); ++ pos = bitmap_find_next_zero_area(pool->alloc_map, pool->pages, ++ pool->alloc_pos, pages, 0); ++ /* If not found, try from the start */ ++ if (pos >= pool->pages && pool->alloc_pos) ++ pos = bitmap_find_next_zero_area(pool->alloc_map, pool->pages, ++ 0, pages, 0); ++ ++ if (pos >= pool->pages) { ++ spin_unlock_irqrestore(&pool->lock, flags); ++ return NULL; ++ } ++ ++ bitmap_set(pool->alloc_map, pos, pages); ++ pool->alloc_pos = (pos + pages) % pool->pages; ++ pool->num_pages += pages; ++ ++ DO_STATS(pool->num_bufs++); ++ DO_STATS(pool->max_bufs = max(pool->num_bufs, pool->max_bufs)); ++ DO_STATS(pool->max_pages = max(pool->num_pages, pool->max_pages)); ++ ++ spin_unlock_irqrestore(&pool->lock, flags); ++ ++ *dmaaddrp = pool->dma_addr + pos * PAGE_SIZE; ++ ++ return pool->virt_addr + pos * PAGE_SIZE; ++} ++ ++static void ++bounce_free(struct dmabounce_pool *pool, void *buf, size_t size) ++{ ++ unsigned long pages; ++ unsigned long flags; ++ unsigned long pos; ++ ++ pages = (size + PAGE_SIZE - 1)/PAGE_SIZE; ++ pos = (buf - pool->virt_addr)/PAGE_SIZE; ++ ++ BUG_ON((buf - pool->virt_addr) & (PAGE_SIZE - 1)); ++ ++ spin_lock_irqsave(&pool->lock, flags); ++ bitmap_clear(pool->alloc_map, pos, pages); ++ pool->num_pages -= pages; ++ if (pool->num_pages == 0) ++ pool->alloc_pos = 0; ++ DO_STATS(pool->num_bufs--); ++ spin_unlock_irqrestore(&pool->lock, flags); ++} ++ ++/* allocate a 'safe' buffer and keep track of it */ ++static struct safe_buffer * ++alloc_safe_buffer(struct dmabounce_device_info *device_info, ++ dma_addr_t dma_addr, size_t size, enum dma_data_direction dir) ++{ ++ struct safe_buffer *buf; ++ struct dmabounce_pool *pool = &device_info->pool; ++ struct device *dev = device_info->dev; ++ unsigned long flags; ++ ++ /* ++ * Although one might expect this to be called in thread context, ++ * using GFP_KERNEL here leads to hard-to-debug lockups. in_atomic() ++ * was previously used to select the appropriate allocation mode, ++ * but this is unsafe. ++ */ ++ buf = kmalloc(sizeof(struct safe_buffer), GFP_ATOMIC); ++ if (!buf) { ++ dev_warn(dev, "%s: kmalloc failed\n", __func__); ++ return NULL; ++ } ++ ++ buf->unsafe_dma_addr = dma_addr; ++ buf->size = size; ++ buf->direction = dir; ++ buf->pool = pool; ++ ++ buf->safe = bounce_alloc(pool, size, &buf->safe_dma_addr); ++ ++ if (!buf->safe) { ++ dev_warn(dev, ++ "%s: could not alloc dma memory (size=%d)\n", ++ __func__, size); ++ kfree(buf); ++ return NULL; ++ } ++ ++ write_lock_irqsave(&device_info->lock, flags); ++ list_add(&buf->node, &device_info->safe_buffers); ++ write_unlock_irqrestore(&device_info->lock, flags); ++ ++ return buf; ++} ++ ++/* determine if a buffer is from our "safe" pool */ ++static struct safe_buffer * ++find_safe_buffer(struct dmabounce_device_info *device_info, ++ dma_addr_t safe_dma_addr) ++{ ++ struct safe_buffer *b, *rb = NULL; ++ unsigned long flags; ++ ++ read_lock_irqsave(&device_info->lock, flags); ++ ++ list_for_each_entry(b, &device_info->safe_buffers, node) ++ if (b->safe_dma_addr <= safe_dma_addr && ++ b->safe_dma_addr + b->size > safe_dma_addr) { ++ rb = b; ++ break; ++ } ++ ++ read_unlock_irqrestore(&device_info->lock, flags); ++ return rb; ++} ++ ++static void ++free_safe_buffer(struct dmabounce_device_info *device_info, ++ struct safe_buffer *buf) ++{ ++ unsigned long flags; ++ ++ write_lock_irqsave(&device_info->lock, flags); ++ list_del(&buf->node); ++ write_unlock_irqrestore(&device_info->lock, flags); ++ ++ bounce_free(buf->pool, buf->safe, buf->size); ++ ++ kfree(buf); ++} ++ ++/* ************************************************** */ ++ ++static struct safe_buffer * ++find_safe_buffer_dev(struct device *dev, dma_addr_t dma_addr, const char *where) ++{ ++ if (!dev || !g_dmabounce_device_info) ++ return NULL; ++ if (dma_mapping_error(dev, dma_addr)) { ++ dev_err(dev, "Trying to %s invalid mapping\n", where); ++ return NULL; ++ } ++ return find_safe_buffer(g_dmabounce_device_info, dma_addr); ++} ++ ++static dma_addr_t ++map_single(struct device *dev, struct safe_buffer *buf, size_t size, ++ enum dma_data_direction dir, unsigned long attrs) ++{ ++ BUG_ON(buf->size != size); ++ BUG_ON(buf->direction != dir); ++ ++ dev_dbg(dev, "map: %llx->%llx\n", (u64)buf->unsafe_dma_addr, ++ (u64)buf->safe_dma_addr); ++ ++ if ((dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) && ++ !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) ++ bcm2838_dma40_memcpy(buf->safe_dma_addr, buf->unsafe_dma_addr, ++ size); ++ ++ return buf->safe_dma_addr; ++} ++ ++static dma_addr_t ++unmap_single(struct device *dev, struct safe_buffer *buf, size_t size, ++ enum dma_data_direction dir, unsigned long attrs) ++{ ++ BUG_ON(buf->size != size); ++ BUG_ON(buf->direction != dir); ++ ++ if ((dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) && ++ !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) { ++ dev_dbg(dev, "unmap: %llx->%llx\n", (u64)buf->safe_dma_addr, ++ (u64)buf->unsafe_dma_addr); ++ ++ bcm2838_dma40_memcpy(buf->unsafe_dma_addr, buf->safe_dma_addr, ++ size); ++ } ++ return buf->unsafe_dma_addr; ++} ++ ++/* ************************************************** */ ++ ++/* ++ * see if a buffer address is in an 'unsafe' range. if it is ++ * allocate a 'safe' buffer and copy the unsafe buffer into it. ++ * substitute the safe buffer for the unsafe one. ++ * (basically move the buffer from an unsafe area to a safe one) ++ */ ++static dma_addr_t ++dmabounce_map_page(struct device *dev, struct page *page, unsigned long offset, ++ size_t size, enum dma_data_direction dir, ++ unsigned long attrs) ++{ ++ struct dmabounce_device_info *device_info = g_dmabounce_device_info; ++ dma_addr_t dma_addr; ++ ++ dma_addr = pfn_to_dma(dev, page_to_pfn(page)) + offset; ++ ++ arm_dma_ops.sync_single_for_device(dev, dma_addr, size, dir); ++ ++ if (device_info && (dma_addr + size) > device_info->threshold) { ++ struct safe_buffer *buf; ++ ++ buf = alloc_safe_buffer(device_info, dma_addr, size, dir); ++ if (!buf) { ++ DO_STATS(device_info->fail_count++); ++ return ARM_MAPPING_ERROR; ++ } ++ ++ DO_STATS(device_info->map_count++); ++ ++ dma_addr = map_single(dev, buf, size, dir, attrs); ++ } ++ ++ return dma_addr; ++} ++ ++/* ++ * see if a mapped address was really a "safe" buffer and if so, copy ++ * the data from the safe buffer back to the unsafe buffer and free up ++ * the safe buffer. (basically return things back to the way they ++ * should be) ++ */ ++static void ++dmabounce_unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, ++ enum dma_data_direction dir, unsigned long attrs) ++{ ++ struct safe_buffer *buf; ++ ++ buf = find_safe_buffer_dev(dev, dma_addr, __func__); ++ if (buf) { ++ DO_STATS(g_dmabounce_device_info->unmap_count++); ++ dma_addr = unmap_single(dev, buf, size, dir, attrs); ++ free_safe_buffer(g_dmabounce_device_info, buf); ++ } ++ ++ arm_dma_ops.sync_single_for_cpu(dev, dma_addr, size, dir); ++} ++ ++/* ++ * A version of dmabounce_map_page that assumes the mapping has already ++ * been created - intended for streaming operation. ++ */ ++static void ++dmabounce_sync_for_device(struct device *dev, dma_addr_t dma_addr, size_t size, ++ enum dma_data_direction dir) ++{ ++ struct safe_buffer *buf; ++ ++ arm_dma_ops.sync_single_for_device(dev, dma_addr, size, dir); ++ ++ buf = find_safe_buffer_dev(dev, dma_addr, __func__); ++ if (buf) { ++ DO_STATS(g_dmabounce_device_info->sync_dev_count++); ++ map_single(dev, buf, size, dir, 0); ++ } ++} ++ ++/* ++ * A version of dmabounce_unmap_page that doesn't destroy the mapping - ++ * intended for streaming operation. ++ */ ++static void ++dmabounce_sync_for_cpu(struct device *dev, dma_addr_t dma_addr, ++ size_t size, enum dma_data_direction dir) ++{ ++ struct safe_buffer *buf; ++ ++ buf = find_safe_buffer_dev(dev, dma_addr, __func__); ++ if (buf) { ++ DO_STATS(g_dmabounce_device_info->sync_cpu_count++); ++ dma_addr = unmap_single(dev, buf, size, dir, 0); ++ } ++ ++ arm_dma_ops.sync_single_for_cpu(dev, dma_addr, size, dir); ++} ++ ++static int dmabounce_dma_supported(struct device *dev, u64 dma_mask) ++{ ++ if (g_dmabounce_device_info) ++ return 0; ++ ++ return arm_dma_ops.dma_supported(dev, dma_mask); ++} ++ ++static int dmabounce_mapping_error(struct device *dev, dma_addr_t dma_addr) ++{ ++ return arm_dma_ops.mapping_error(dev, dma_addr); ++} ++ ++static const struct dma_map_ops dmabounce_ops = { ++ .alloc = arm_dma_alloc, ++ .free = arm_dma_free, ++ .mmap = arm_dma_mmap, ++ .get_sgtable = arm_dma_get_sgtable, ++ .map_page = dmabounce_map_page, ++ .unmap_page = dmabounce_unmap_page, ++ .sync_single_for_cpu = dmabounce_sync_for_cpu, ++ .sync_single_for_device = dmabounce_sync_for_device, ++ .map_sg = arm_dma_map_sg, ++ .unmap_sg = arm_dma_unmap_sg, ++ .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu, ++ .sync_sg_for_device = arm_dma_sync_sg_for_device, ++ .dma_supported = dmabounce_dma_supported, ++ .mapping_error = dmabounce_mapping_error, ++}; ++ ++int brcm_pcie_bounce_register_dev(struct device *dev, ++ unsigned long buffer_size, ++ dma_addr_t threshold) ++{ ++ struct dmabounce_device_info *device_info; ++ int ret; ++ ++ /* Only support a single client */ ++ if (g_dmabounce_device_info) ++ return -EBUSY; ++ ++ ret = bcm2838_dma40_memcpy_init(dev); ++ if (ret) ++ return ret; ++ ++ device_info = kmalloc(sizeof(struct dmabounce_device_info), GFP_ATOMIC); ++ if (!device_info) { ++ dev_err(dev, ++ "Could not allocated dmabounce_device_info\n"); ++ return -ENOMEM; ++ } ++ ++ ret = bounce_create(&device_info->pool, dev, buffer_size); ++ if (ret) { ++ dev_err(dev, ++ "dmabounce: could not allocate %ld byte DMA pool\n", ++ buffer_size); ++ goto err_bounce; ++ } ++ ++ device_info->dev = dev; ++ device_info->threshold = threshold; ++ INIT_LIST_HEAD(&device_info->safe_buffers); ++ rwlock_init(&device_info->lock); ++ ++ DO_STATS(device_info->map_count = 0); ++ DO_STATS(device_info->unmap_count = 0); ++ DO_STATS(device_info->sync_dev_count = 0); ++ DO_STATS(device_info->sync_cpu_count = 0); ++ DO_STATS(device_info->fail_count = 0); ++ DO_STATS(device_info->attr_res = ++ device_create_file(dev, &dev_attr_dmabounce_stats)); ++ ++ g_dmabounce_device_info = device_info; ++ set_dma_ops(dev, &dmabounce_ops); ++ ++ dev_info(dev, "dmabounce: registered device - %ld kB, threshold %pad\n", ++ buffer_size / 1024, &threshold); ++ ++ return 0; ++ ++ err_bounce: ++ kfree(device_info); ++ return ret; ++} ++EXPORT_SYMBOL(brcm_pcie_bounce_register_dev); ++ ++void brcm_pcie_bounce_unregister_dev(struct device *dev) ++{ ++ struct dmabounce_device_info *device_info = g_dmabounce_device_info; ++ ++ g_dmabounce_device_info = NULL; ++ set_dma_ops(dev, NULL); ++ ++ if (!device_info) { ++ dev_warn(dev, ++ "Never registered with dmabounce but attempting" ++ "to unregister!\n"); ++ return; ++ } ++ ++ if (!list_empty(&device_info->safe_buffers)) { ++ dev_err(dev, ++ "Removing from dmabounce with pending buffers!\n"); ++ BUG(); ++ } ++ ++ bounce_destroy(&device_info->pool); ++ ++ DO_STATS(if (device_info->attr_res == 0) ++ device_remove_file(dev, &dev_attr_dmabounce_stats)); ++ ++ kfree(device_info); ++ ++ dev_info(dev, "dmabounce: device unregistered\n"); ++} ++EXPORT_SYMBOL(brcm_pcie_bounce_unregister_dev); ++ ++MODULE_AUTHOR("Phil Elwell "); ++MODULE_DESCRIPTION("Dedicate DMA bounce support for pcie-brcmstb"); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/pci/controller/pcie-brcmstb-bounce.h +@@ -0,0 +1,32 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2019 Raspberry Pi (Trading) Ltd. ++ */ ++ ++#ifndef _PCIE_BRCMSTB_BOUNCE_H ++#define _PCIE_BRCMSTB_BOUNCE_H ++ ++#ifdef CONFIG_ARM ++ ++int brcm_pcie_bounce_register_dev(struct device *dev, unsigned long buffer_size, ++ dma_addr_t threshold); ++ ++int brcm_pcie_bounce_unregister_dev(struct device *dev); ++ ++#else ++ ++static inline int brcm_pcie_bounce_register_dev(struct device *dev, ++ unsigned long buffer_size, ++ dma_addr_t threshold) ++{ ++ return 0; ++} ++ ++static inline int brcm_pcie_bounce_unregister_dev(struct device *dev) ++{ ++ return 0; ++} ++ ++#endif ++ ++#endif /* _PCIE_BRCMSTB_BOUNCE_H */ +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -29,6 +29,7 @@ + #include + #include + #include "../pci.h" ++#include "pcie-brcmstb-bounce.h" + + /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ + #define BRCM_PCIE_CAP_REGS 0x00ac +@@ -53,6 +54,7 @@ + #define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 + #define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 + #define PCIE_MISC_MSI_DATA_CONFIG 0x404c ++#define PCIE_MISC_EOI_CTRL 0x4060 + #define PCIE_MISC_PCIE_CTRL 0x4064 + #define PCIE_MISC_PCIE_STATUS 0x4068 + #define PCIE_MISC_REVISION 0x406c +@@ -260,12 +262,14 @@ struct brcm_pcie { + unsigned int rev; + const int *reg_offsets; + const int *reg_field_info; ++ u32 max_burst_size; + enum pcie_type type; + }; + + struct pcie_cfg_data { + const int *reg_field_info; + const int *offsets; ++ const u32 max_burst_size; + const enum pcie_type type; + }; + +@@ -288,24 +292,27 @@ static const int pcie_offset_bcm7425[] = + static const struct pcie_cfg_data bcm7425_cfg = { + .reg_field_info = pcie_reg_field_info, + .offsets = pcie_offset_bcm7425, ++ .max_burst_size = BURST_SIZE_256, + .type = BCM7425, + }; + + static const int pcie_offsets[] = { + [RGR1_SW_INIT_1] = 0x9210, + [EXT_CFG_INDEX] = 0x9000, +- [EXT_CFG_DATA] = 0x9004, ++ [EXT_CFG_DATA] = 0x8000, + }; + + static const struct pcie_cfg_data bcm7435_cfg = { + .reg_field_info = pcie_reg_field_info, + .offsets = pcie_offsets, ++ .max_burst_size = BURST_SIZE_256, + .type = BCM7435, + }; + + static const struct pcie_cfg_data generic_cfg = { + .reg_field_info = pcie_reg_field_info, + .offsets = pcie_offsets, ++ .max_burst_size = BURST_SIZE_128, // before BURST_SIZE_512 + .type = GENERIC, + }; + +@@ -318,6 +325,7 @@ static const int pcie_offset_bcm7278[] = + static const struct pcie_cfg_data bcm7278_cfg = { + .reg_field_info = pcie_reg_field_info_bcm7278, + .offsets = pcie_offset_bcm7278, ++ .max_burst_size = BURST_SIZE_512, + .type = BCM7278, + }; + +@@ -360,7 +368,6 @@ static struct pci_ops brcm_pcie_ops = { + (reg##_##field##_MASK & (field_val << reg##_##field##_SHIFT))) + + static const struct dma_map_ops *arch_dma_ops; +-static const struct dma_map_ops *brcm_dma_ops_ptr; + static struct of_pci_range *dma_ranges; + static int num_dma_ranges; + +@@ -369,6 +376,16 @@ static int num_memc; + static int num_pcie; + static DEFINE_MUTEX(brcm_pcie_lock); + ++static unsigned int bounce_buffer = 32*1024*1024; ++module_param(bounce_buffer, uint, 0644); ++MODULE_PARM_DESC(bounce_buffer, "Size of bounce buffer"); ++ ++static unsigned int bounce_threshold = 0xc0000000; ++module_param(bounce_threshold, uint, 0644); ++MODULE_PARM_DESC(bounce_threshold, "Bounce threshold"); ++ ++static struct brcm_pcie *g_pcie; ++ + static dma_addr_t brcm_to_pci(dma_addr_t addr) + { + struct of_pci_range *p; +@@ -457,12 +474,10 @@ static int brcm_map_sg(struct device *de + struct scatterlist *sg; + + for_each_sg(sgl, sg, nents, i) { +-#ifdef CONFIG_NEED_SG_DMA_LENGTH +- sg->dma_length = sg->length; +-#endif ++ sg_dma_len(sg) = sg->length; + sg->dma_address = +- brcm_dma_ops_ptr->map_page(dev, sg_page(sg), sg->offset, +- sg->length, dir, attrs); ++ brcm_map_page(dev, sg_page(sg), sg->offset, ++ sg->length, dir, attrs); + if (dma_mapping_error(dev, sg->dma_address)) + goto bad_mapping; + } +@@ -470,8 +485,8 @@ static int brcm_map_sg(struct device *de + + bad_mapping: + for_each_sg(sgl, sg, i, j) +- brcm_dma_ops_ptr->unmap_page(dev, sg_dma_address(sg), +- sg_dma_len(sg), dir, attrs); ++ brcm_unmap_page(dev, sg_dma_address(sg), ++ sg_dma_len(sg), dir, attrs); + return 0; + } + +@@ -484,8 +499,8 @@ static void brcm_unmap_sg(struct device + struct scatterlist *sg; + + for_each_sg(sgl, sg, nents, i) +- brcm_dma_ops_ptr->unmap_page(dev, sg_dma_address(sg), +- sg_dma_len(sg), dir, attrs); ++ brcm_unmap_page(dev, sg_dma_address(sg), ++ sg_dma_len(sg), dir, attrs); + } + + static void brcm_sync_single_for_cpu(struct device *dev, +@@ -531,8 +546,8 @@ void brcm_sync_sg_for_cpu(struct device + int i; + + for_each_sg(sgl, sg, nents, i) +- brcm_dma_ops_ptr->sync_single_for_cpu(dev, sg_dma_address(sg), +- sg->length, dir); ++ brcm_sync_single_for_cpu(dev, sg_dma_address(sg), ++ sg->length, dir); + } + + void brcm_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, +@@ -542,9 +557,9 @@ void brcm_sync_sg_for_device(struct devi + int i; + + for_each_sg(sgl, sg, nents, i) +- brcm_dma_ops_ptr->sync_single_for_device(dev, +- sg_dma_address(sg), +- sg->length, dir); ++ brcm_sync_single_for_device(dev, ++ sg_dma_address(sg), ++ sg->length, dir); + } + + static int brcm_mapping_error(struct device *dev, dma_addr_t dma_addr) +@@ -633,17 +648,47 @@ static void brcm_set_dma_ops(struct devi + set_dma_ops(dev, &brcm_dma_ops); + } + ++static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, ++ unsigned int val); + static int brcmstb_platform_notifier(struct notifier_block *nb, + unsigned long event, void *__dev) + { ++ extern unsigned long max_pfn; + struct device *dev = __dev; ++ const char *rc_name = "0000:00:00.0"; + +- brcm_dma_ops_ptr = &brcm_dma_ops; +- if (event != BUS_NOTIFY_ADD_DEVICE) +- return NOTIFY_DONE; ++ switch (event) { ++ case BUS_NOTIFY_ADD_DEVICE: ++ if (max_pfn > (bounce_threshold/PAGE_SIZE) && ++ strcmp(dev->kobj.name, rc_name)) { ++ int ret; ++ ++ ret = brcm_pcie_bounce_register_dev(dev, bounce_buffer, ++ (dma_addr_t)bounce_threshold); ++ if (ret) { ++ dev_err(dev, ++ "brcm_pcie_bounce_register_dev() failed: %d\n", ++ ret); ++ return ret; ++ } ++ } ++ brcm_set_dma_ops(dev); ++ return NOTIFY_OK; ++ ++ case BUS_NOTIFY_DEL_DEVICE: ++ if (!strcmp(dev->kobj.name, rc_name) && g_pcie) { ++ /* Force a bus reset */ ++ brcm_pcie_perst_set(g_pcie, 1); ++ msleep(100); ++ brcm_pcie_perst_set(g_pcie, 0); ++ } else if (max_pfn > (bounce_threshold/PAGE_SIZE)) { ++ brcm_pcie_bounce_unregister_dev(dev); ++ } ++ return NOTIFY_OK; + +- brcm_set_dma_ops(dev); +- return NOTIFY_OK; ++ default: ++ return NOTIFY_DONE; ++ } + } + + static struct notifier_block brcmstb_platform_nb = { +@@ -914,6 +959,7 @@ static void brcm_pcie_msi_isr(struct irq + } + } + chained_irq_exit(chip, desc); ++ bcm_writel(1, msi->base + PCIE_MISC_EOI_CTRL); + } + + static void brcm_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) +@@ -930,7 +976,8 @@ static void brcm_compose_msi_msg(struct + static int brcm_msi_set_affinity(struct irq_data *irq_data, + const struct cpumask *mask, bool force) + { +- return -EINVAL; ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(irq_data); ++ return __irq_set_affinity(msi->irq, mask, force); + } + + static struct irq_chip brcm_msi_bottom_irq_chip = { +@@ -1168,9 +1215,9 @@ static void __iomem *brcm_pcie_map_conf( + return PCI_SLOT(devfn) ? NULL : base + where; + + /* For devices, write to the config space index register */ +- idx = cfg_index(bus->number, devfn, where); ++ idx = cfg_index(bus->number, devfn, 0); + bcm_writel(idx, pcie->base + IDX_ADDR(pcie)); +- return base + DATA_ADDR(pcie) + (where & 0x3); ++ return base + DATA_ADDR(pcie) + where; + } + + static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, +@@ -1238,20 +1285,6 @@ static int brcm_pcie_parse_map_dma_range + num_dma_ranges++; + } + +- for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { +- u64 size = brcmstb_memory_memc_size(i); +- +- if (size == (u64)-1) { +- dev_err(pcie->dev, "cannot get memc%d size", i); +- return -EINVAL; +- } else if (size) { +- scb_size[i] = roundup_pow_of_two_64(size); +- num_memc++; +- } else { +- break; +- } +- } +- + return 0; + } + +@@ -1275,26 +1308,25 @@ static int brcm_pcie_add_controller(stru + if (ret) + goto done; + +- /* Determine num_memc and their sizes */ +- for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { +- u64 size = brcmstb_memory_memc_size(i); +- +- if (size == (u64)-1) { +- dev_err(dev, "cannot get memc%d size\n", i); +- ret = -EINVAL; +- goto done; +- } else if (size) { +- scb_size[i] = roundup_pow_of_two_64(size); +- num_memc++; +- } else { +- break; ++ if (!num_dma_ranges) { ++ /* Determine num_memc and their sizes by other means */ ++ for (i = 0, num_memc = 0; i < BRCM_MAX_SCB; i++) { ++ u64 size = brcmstb_memory_memc_size(i); ++ ++ if (size == (u64)-1) { ++ dev_err(dev, "cannot get memc%d size\n", i); ++ ret = -EINVAL; ++ goto done; ++ } else if (size) { ++ scb_size[i] = roundup_pow_of_two_64(size); ++ } else { ++ break; ++ } + } +- } +- if (!ret && num_memc == 0) { +- ret = -EINVAL; +- goto done; ++ num_memc = i; + } + ++ g_pcie = pcie; + num_pcie++; + done: + mutex_unlock(&brcm_pcie_lock); +@@ -1307,6 +1339,7 @@ static void brcm_pcie_remove_controller( + if (--num_pcie > 0) + goto out; + ++ g_pcie = NULL; + if (brcm_unregister_notifier()) + dev_err(pcie->dev, "failed to unregister pci bus notifier\n"); + kfree(dma_ranges); +@@ -1367,7 +1400,7 @@ static int brcm_pcie_setup(struct brcm_p + void __iomem *base = pcie->base; + unsigned int scb_size_val; + u64 rc_bar2_offset, rc_bar2_size, total_mem_size = 0; +- u32 tmp, burst; ++ u32 tmp; + int i, j, ret, limit; + u16 nlw, cls, lnksta; + bool ssc_good = false; +@@ -1400,20 +1433,15 @@ static int brcm_pcie_setup(struct brcm_p + /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ + tmp = INSERT_FIELD(0, PCIE_MISC_MISC_CTRL, SCB_ACCESS_EN, 1); + tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, CFG_READ_UR_MODE, 1); +- burst = (pcie->type == GENERIC || pcie->type == BCM7278) +- ? BURST_SIZE_512 : BURST_SIZE_256; +- tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, MAX_BURST_SIZE, burst); ++ tmp = INSERT_FIELD(tmp, PCIE_MISC_MISC_CTRL, MAX_BURST_SIZE, ++ pcie->max_burst_size); + bcm_writel(tmp, base + PCIE_MISC_MISC_CTRL); + + /* + * Set up inbound memory view for the EP (called RC_BAR2, + * not to be confused with the BARs that are advertised by + * the EP). +- */ +- for (i = 0; i < num_memc; i++) +- total_mem_size += scb_size[i]; +- +- /* ++ * + * The PCIe host controller by design must set the inbound + * viewport to be a contiguous arrangement of all of the + * system's memory. In addition, its size mut be a power of +@@ -1429,55 +1457,49 @@ static int brcm_pcie_setup(struct brcm_p + * the controller will know to send outbound memory downstream + * and everything else upstream. + */ +- rc_bar2_size = roundup_pow_of_two_64(total_mem_size); + +- if (dma_ranges) { ++ if (num_dma_ranges) { + /* +- * The best-case scenario is to place the inbound +- * region in the first 4GB of pcie-space, as some +- * legacy devices can only address 32bits. +- * We would also like to put the MSI under 4GB +- * as well, since some devices require a 32bit +- * MSI target address. ++ * Use the base address and size(s) provided in the dma-ranges ++ * property. + */ +- if (total_mem_size <= 0xc0000000ULL && +- rc_bar2_size <= 0x100000000ULL) { +- rc_bar2_offset = 0; +- /* If the viewport is less then 4GB we can fit +- * the MSI target address under 4GB. Otherwise +- * put it right below 64GB. +- */ +- msi_target_addr = +- (rc_bar2_size == 0x100000000ULL) +- ? BRCM_MSI_TARGET_ADDR_GT_4GB +- : BRCM_MSI_TARGET_ADDR_LT_4GB; +- } else { +- /* +- * The system memory is 4GB or larger so we +- * cannot start the inbound region at location +- * 0 (since we have to allow some space for +- * outbound memory @ 3GB). So instead we +- * start it at the 1x multiple of its size +- */ +- rc_bar2_offset = rc_bar2_size; +- +- /* Since we are starting the viewport at 4GB or +- * higher, put the MSI target address below 4GB +- */ +- msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; +- } +- } else { ++ for (i = 0; i < num_dma_ranges; i++) ++ scb_size[i] = roundup_pow_of_two_64(dma_ranges[i].size); ++ ++ num_memc = num_dma_ranges; ++ rc_bar2_offset = dma_ranges[0].pci_addr; ++ } else if (num_memc) { + /* + * Set simple configuration based on memory sizes +- * only. We always start the viewport at address 0, +- * and set the MSI target address accordingly. ++ * only. We always start the viewport at address 0. + */ + rc_bar2_offset = 0; ++ } else { ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < num_memc; i++) ++ total_mem_size += scb_size[i]; ++ ++ rc_bar2_size = roundup_pow_of_two_64(total_mem_size); + +- msi_target_addr = (rc_bar2_size >= 0x100000000ULL) +- ? BRCM_MSI_TARGET_ADDR_GT_4GB +- : BRCM_MSI_TARGET_ADDR_LT_4GB; ++ /* Verify the alignment is correct */ ++ if (rc_bar2_offset & (rc_bar2_size - 1)) { ++ dev_err(dev, "inbound window is misaligned\n"); ++ return -EINVAL; + } ++ ++ /* ++ * Position the MSI target low if possible. ++ * ++ * TO DO: Consider outbound window when choosing MSI target and ++ * verifying configuration. ++ */ ++ msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; ++ if (rc_bar2_offset <= msi_target_addr && ++ rc_bar2_offset + rc_bar2_size > msi_target_addr) ++ msi_target_addr = BRCM_MSI_TARGET_ADDR_GT_4GB; ++ + pcie->msi_target_addr = msi_target_addr; + + tmp = lower_32_bits(rc_bar2_offset); +@@ -1713,6 +1735,7 @@ static int brcm_pcie_probe(struct platfo + data = of_id->data; + pcie->reg_offsets = data->offsets; + pcie->reg_field_info = data->reg_field_info; ++ pcie->max_burst_size = data->max_burst_size; + pcie->type = data->type; + pcie->dn = dn; + pcie->dev = &pdev->dev; +@@ -1732,7 +1755,7 @@ static int brcm_pcie_probe(struct platfo + + pcie->clk = of_clk_get_by_name(dn, "sw_pcie"); + if (IS_ERR(pcie->clk)) { +- dev_err(&pdev->dev, "could not get clock\n"); ++ dev_warn(&pdev->dev, "could not get clock\n"); + pcie->clk = NULL; + } + pcie->base = base; +@@ -1755,7 +1778,8 @@ static int brcm_pcie_probe(struct platfo + + ret = clk_prepare_enable(pcie->clk); + if (ret) { +- dev_err(&pdev->dev, "could not enable clock\n"); ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "could not enable clock\n"); + return ret; + } + +@@ -1818,7 +1842,6 @@ static struct platform_driver brcm_pcie_ + .remove = brcm_pcie_remove, + .driver = { + .name = "brcm-pcie", +- .owner = THIS_MODULE, + .of_match_table = brcm_pcie_match, + .pm = &brcm_pcie_pm_ops, + }, +--- a/drivers/soc/bcm/brcmstb/Makefile ++++ b/drivers/soc/bcm/brcmstb/Makefile +@@ -1,2 +1,2 @@ +-obj-y += common.o biuctrl.o ++obj-y += common.o biuctrl.o memory.o + obj-$(CONFIG_BRCMSTB_PM) += pm/ +--- /dev/null ++++ b/drivers/soc/bcm/brcmstb/memory.c +@@ -0,0 +1,158 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* Copyright © 2015-2017 Broadcom */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Macro to help extract property data */ ++#define DT_PROP_DATA_TO_U32(b, offs) (fdt32_to_cpu(*(u32 *)(b + offs))) ++ ++/* Constants used when retrieving memc info */ ++#define NUM_BUS_RANGES 10 ++#define BUS_RANGE_ULIMIT_SHIFT 4 ++#define BUS_RANGE_LLIMIT_SHIFT 4 ++#define BUS_RANGE_PA_SHIFT 12 ++ ++enum { ++ BUSNUM_MCP0 = 0x4, ++ BUSNUM_MCP1 = 0x5, ++ BUSNUM_MCP2 = 0x6, ++}; ++ ++/* ++ * If the DT nodes are handy, determine which MEMC holds the specified ++ * physical address. ++ */ ++#ifdef CONFIG_ARCH_BRCMSTB ++int __brcmstb_memory_phys_addr_to_memc(phys_addr_t pa, void __iomem *base) ++{ ++ int memc = -1; ++ int i; ++ ++ for (i = 0; i < NUM_BUS_RANGES; i++, base += 8) { ++ const u64 ulimit_raw = readl(base); ++ const u64 llimit_raw = readl(base + 4); ++ const u64 ulimit = ++ ((ulimit_raw >> BUS_RANGE_ULIMIT_SHIFT) ++ << BUS_RANGE_PA_SHIFT) | 0xfff; ++ const u64 llimit = (llimit_raw >> BUS_RANGE_LLIMIT_SHIFT) ++ << BUS_RANGE_PA_SHIFT; ++ const u32 busnum = (u32)(ulimit_raw & 0xf); ++ ++ if (pa >= llimit && pa <= ulimit) { ++ if (busnum >= BUSNUM_MCP0 && busnum <= BUSNUM_MCP2) { ++ memc = busnum - BUSNUM_MCP0; ++ break; ++ } ++ } ++ } ++ ++ return memc; ++} ++ ++int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa) ++{ ++ int memc = -1; ++ struct device_node *np; ++ void __iomem *cpubiuctrl; ++ ++ np = of_find_compatible_node(NULL, NULL, "brcm,brcmstb-cpu-biu-ctrl"); ++ if (!np) ++ return memc; ++ ++ cpubiuctrl = of_iomap(np, 0); ++ if (!cpubiuctrl) ++ goto cleanup; ++ ++ memc = __brcmstb_memory_phys_addr_to_memc(pa, cpubiuctrl); ++ iounmap(cpubiuctrl); ++ ++cleanup: ++ of_node_put(np); ++ ++ return memc; ++} ++ ++#elif defined(CONFIG_MIPS) ++int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa) ++{ ++ /* The logic here is fairly simple and hardcoded: if pa <= 0x5000_0000, ++ * then this is MEMC0, else MEMC1. ++ * ++ * For systems with 2GB on MEMC0, MEMC1 starts at 9000_0000, with 1GB ++ * on MEMC0, MEMC1 starts at 6000_0000. ++ */ ++ if (pa >= 0x50000000ULL) ++ return 1; ++ else ++ return 0; ++} ++#endif ++ ++u64 brcmstb_memory_memc_size(int memc) ++{ ++ const void *fdt = initial_boot_params; ++ const int mem_offset = fdt_path_offset(fdt, "/memory"); ++ int addr_cells = 1, size_cells = 1; ++ const struct fdt_property *prop; ++ int proplen, cellslen; ++ u64 memc_size = 0; ++ int i; ++ ++ /* Get root size and address cells if specified */ ++ prop = fdt_get_property(fdt, 0, "#size-cells", &proplen); ++ if (prop) ++ size_cells = DT_PROP_DATA_TO_U32(prop->data, 0); ++ ++ prop = fdt_get_property(fdt, 0, "#address-cells", &proplen); ++ if (prop) ++ addr_cells = DT_PROP_DATA_TO_U32(prop->data, 0); ++ ++ if (mem_offset < 0) ++ return -1; ++ ++ prop = fdt_get_property(fdt, mem_offset, "reg", &proplen); ++ cellslen = (int)sizeof(u32) * (addr_cells + size_cells); ++ if ((proplen % cellslen) != 0) ++ return -1; ++ ++ for (i = 0; i < proplen / cellslen; ++i) { ++ u64 addr = 0; ++ u64 size = 0; ++ int memc_idx; ++ int j; ++ ++ for (j = 0; j < addr_cells; ++j) { ++ int offset = (cellslen * i) + (sizeof(u32) * j); ++ ++ addr |= (u64)DT_PROP_DATA_TO_U32(prop->data, offset) << ++ ((addr_cells - j - 1) * 32); ++ } ++ for (j = 0; j < size_cells; ++j) { ++ int offset = (cellslen * i) + ++ (sizeof(u32) * (j + addr_cells)); ++ ++ size |= (u64)DT_PROP_DATA_TO_U32(prop->data, offset) << ++ ((size_cells - j - 1) * 32); ++ } ++ ++ if ((phys_addr_t)addr != addr) { ++ pr_err("phys_addr_t is smaller than provided address 0x%llx!\n", ++ addr); ++ return -1; ++ } ++ ++ memc_idx = brcmstb_memory_phys_addr_to_memc((phys_addr_t)addr); ++ if (memc_idx == memc) ++ memc_size += size; ++ } ++ ++ return memc_size; ++} ++EXPORT_SYMBOL_GPL(brcmstb_memory_memc_size); ++ diff --git a/target/linux/brcm2708/patches-4.19/950-0539-arm-bcm2835-DMA-can-only-address-1GB.patch b/target/linux/brcm2708/patches-4.19/950-0539-arm-bcm2835-DMA-can-only-address-1GB.patch new file mode 100644 index 000000000..17a752494 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0539-arm-bcm2835-DMA-can-only-address-1GB.patch @@ -0,0 +1,25 @@ +From 4f8fa14b05198c3d145d72d47ad9adfc25601842 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 May 2019 15:47:42 +0100 +Subject: [PATCH 539/703] arm: bcm2835: DMA can only address 1GB + +The legacy peripherals can only address the first gigabyte of RAM, so +ensure that DMA allocations are restricted to that region. + +Signed-off-by: Phil Elwell +--- + arch/arm/mach-bcm/board_bcm2835.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/arm/mach-bcm/board_bcm2835.c ++++ b/arch/arm/mach-bcm/board_bcm2835.c +@@ -123,6 +123,9 @@ static const char * const bcm2835_compat + }; + + DT_MACHINE_START(BCM2835, "BCM2835") ++#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) ++ .dma_zone_size = SZ_1G, ++#endif + .map_io = bcm2835_map_io, + .init_machine = bcm2835_init, + .dt_compat = bcm2835_compat, diff --git a/target/linux/brcm2708/patches-4.19/950-0540-mmc-bcm2835-sdhost-Support-64-bit-physical-addresses.patch b/target/linux/brcm2708/patches-4.19/950-0540-mmc-bcm2835-sdhost-Support-64-bit-physical-addresses.patch new file mode 100644 index 000000000..7a3e71cff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0540-mmc-bcm2835-sdhost-Support-64-bit-physical-addresses.patch @@ -0,0 +1,56 @@ +From 6178ee953f25002e50b63af4b77b1f2a58ce17d6 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 Aug 2018 09:05:15 +0100 +Subject: [PATCH 540/703] mmc: bcm2835-sdhost: Support 64-bit physical + addresses + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/bcm2835-sdhost.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/mmc/host/bcm2835-sdhost.c ++++ b/drivers/mmc/host/bcm2835-sdhost.c +@@ -148,7 +148,7 @@ struct bcm2835_host { + spinlock_t lock; + + void __iomem *ioaddr; +- u32 bus_addr; ++ phys_addr_t bus_addr; + + struct mmc_host *mmc; + +@@ -246,8 +246,8 @@ static void log_init(struct device *dev, + sdhost_log_buf = dma_zalloc_coherent(dev, LOG_SIZE, &sdhost_log_addr, + GFP_KERNEL); + if (sdhost_log_buf) { +- pr_info("sdhost: log_buf @ %p (%x)\n", +- sdhost_log_buf, (u32)sdhost_log_addr); ++ pr_info("sdhost: log_buf @ %p (%llx)\n", ++ sdhost_log_buf, (u64)sdhost_log_addr); + timer_base = ioremap_nocache(bus_to_phys + 0x7e003000, SZ_4K); + if (!timer_base) + pr_err("sdhost: failed to remap timer\n"); +@@ -2024,6 +2024,7 @@ static int bcm2835_sdhost_probe(struct p + struct mmc_host *mmc; + const __be32 *addr; + u32 msg[3]; ++ int na; + int ret; + + pr_debug("bcm2835_sdhost_probe\n"); +@@ -2047,12 +2048,13 @@ static int bcm2835_sdhost_probe(struct p + goto err; + } + ++ na = of_n_addr_cells(node); + addr = of_get_address(node, 0, NULL, NULL); + if (!addr) { + dev_err(dev, "could not get DMA-register address\n"); + return -ENODEV; + } +- host->bus_addr = be32_to_cpup(addr); ++ host->bus_addr = (phys_addr_t)of_read_number(addr, na); + pr_debug(" - ioaddr %lx, iomem->start %lx, bus_addr %lx\n", + (unsigned long)host->ioaddr, + (unsigned long)iomem->start, diff --git a/target/linux/brcm2708/patches-4.19/950-0541-mmc-sdhci-Mask-spurious-interrupts.patch b/target/linux/brcm2708/patches-4.19/950-0541-mmc-sdhci-Mask-spurious-interrupts.patch new file mode 100644 index 000000000..db2166d4e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0541-mmc-sdhci-Mask-spurious-interrupts.patch @@ -0,0 +1,29 @@ +From 80e4525509000d3f7faebbc9ea403c9776aab2c5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 28 Sep 2018 16:24:05 +0100 +Subject: [PATCH 541/703] mmc: sdhci: Mask "spurious" interrupts + +Add a filter for "spurious" Transfer Complete interrupts, attempting +to make it as specific as possible: +* INT_DATA_END (transfer complete) is set +* There is a stop command in progress +* There is no data transfer in progress + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/sdhci.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -2930,6 +2930,10 @@ static irqreturn_t sdhci_irq(int irq, vo + result = IRQ_WAKE_THREAD; + } + ++ if ((intmask & SDHCI_INT_DATA_END) && !host->data && ++ host->cmd && (host->cmd == host->cmd->mrq->stop)) ++ intmask &= ~SDHCI_INT_DATA_END; ++ + if (intmask & SDHCI_INT_CMD_MASK) + sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, &intmask); + diff --git a/target/linux/brcm2708/patches-4.19/950-0542-mmc-sdhci-iproc-Add-support-for-emmc2-of-the-BCM2838.patch b/target/linux/brcm2708/patches-4.19/950-0542-mmc-sdhci-iproc-Add-support-for-emmc2-of-the-BCM2838.patch new file mode 100644 index 000000000..148fe99eb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0542-mmc-sdhci-iproc-Add-support-for-emmc2-of-the-BCM2838.patch @@ -0,0 +1,36 @@ +From 8433b9112a42c8f7b0fefeac50e2f3ebb3ab956c Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 27 Apr 2019 12:33:57 +0200 +Subject: [PATCH 542/703] mmc: sdhci-iproc: Add support for emmc2 of the + BCM2838 + +The emmc2 interface of the BCM2838 should be integrated in sdhci-iproc +to avoid code redundancy. Except 32 bit only access no other quirks are +known yet. Add an additional compatible string for upstream proposal. + +Signed-off-by: Stefan Wahren +--- + drivers/mmc/host/sdhci-iproc.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/mmc/host/sdhci-iproc.c ++++ b/drivers/mmc/host/sdhci-iproc.c +@@ -250,8 +250,18 @@ static const struct sdhci_iproc_data bcm + .mmc_caps = 0x00000000, + }; + ++static const struct sdhci_pltfm_data sdhci_bcm2838_pltfm_data = { ++ .ops = &sdhci_iproc_32only_ops, ++}; ++ ++static const struct sdhci_iproc_data bcm2838_data = { ++ .pdata = &sdhci_bcm2838_pltfm_data, ++}; ++ + static const struct of_device_id sdhci_iproc_of_match[] = { + { .compatible = "brcm,bcm2835-sdhci", .data = &bcm2835_data }, ++ { .compatible = "brcm,bcm2838-sdhci", .data = &bcm2838_data }, ++ { .compatible = "brcm,bcm2711-emmc2", .data = &bcm2838_data }, + { .compatible = "brcm,sdhci-iproc-cygnus", .data = &iproc_cygnus_data}, + { .compatible = "brcm,sdhci-iproc", .data = &iproc_data }, + { } diff --git a/target/linux/brcm2708/patches-4.19/950-0543-hwrng-iproc-rng200-Add-BCM2838-support.patch b/target/linux/brcm2708/patches-4.19/950-0543-hwrng-iproc-rng200-Add-BCM2838-support.patch new file mode 100644 index 000000000..ae846de43 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0543-hwrng-iproc-rng200-Add-BCM2838-support.patch @@ -0,0 +1,158 @@ +From 60dfcaef2e9fb7fd79b7a87c25cd520b82c6dd02 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 4 May 2019 17:06:15 +0200 +Subject: [PATCH 543/703] hwrng: iproc-rng200: Add BCM2838 support + +The HWRNG on the BCM2838 is compatible to iproc-rng200, so add the +support to this driver instead of bcm2835-rng. + +Signed-off-by: Stefan Wahren +--- + drivers/char/hw_random/Kconfig | 4 +- + drivers/char/hw_random/iproc-rng200.c | 81 +++++++++++++++++++++++++-- + 2 files changed, 79 insertions(+), 6 deletions(-) + +--- a/drivers/char/hw_random/Kconfig ++++ b/drivers/char/hw_random/Kconfig +@@ -89,11 +89,11 @@ config HW_RANDOM_BCM2835 + + config HW_RANDOM_IPROC_RNG200 + tristate "Broadcom iProc/STB RNG200 support" +- depends on ARCH_BCM_IPROC || ARCH_BRCMSTB ++ depends on ARCH_BCM_IPROC || ARCH_BCM2835 || ARCH_BRCMSTB + default HW_RANDOM + ---help--- + This driver provides kernel-side support for the RNG200 +- hardware found on the Broadcom iProc and STB SoCs. ++ hardware found on the Broadcom iProc, BCM2838 and STB SoCs. + + To compile this driver as a module, choose M here: the + module will be called iproc-rng200 +--- a/drivers/char/hw_random/iproc-rng200.c ++++ b/drivers/char/hw_random/iproc-rng200.c +@@ -29,6 +29,7 @@ + #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF + #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001 + #define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000 ++#define RNG_CTRL_RNG_DIV_CTRL_SHIFT 13 + + #define RNG_SOFT_RESET_OFFSET 0x04 + #define RNG_SOFT_RESET 0x00000001 +@@ -36,16 +37,23 @@ + #define RBG_SOFT_RESET_OFFSET 0x08 + #define RBG_SOFT_RESET 0x00000001 + ++#define RNG_TOTAL_BIT_COUNT_OFFSET 0x0C ++ ++#define RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET 0x10 ++ + #define RNG_INT_STATUS_OFFSET 0x18 + #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000 + #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK 0x00020000 + #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020 + #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK 0x00000001 + ++#define RNG_INT_ENABLE_OFFSET 0x1C ++ + #define RNG_FIFO_DATA_OFFSET 0x20 + + #define RNG_FIFO_COUNT_OFFSET 0x24 + #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF ++#define RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT 8 + + struct iproc_rng200_dev { + struct hwrng rng; +@@ -166,6 +174,64 @@ static int iproc_rng200_init(struct hwrn + return 0; + } + ++static int bcm2838_rng200_read(struct hwrng *rng, void *buf, size_t max, ++ bool wait) ++{ ++ struct iproc_rng200_dev *priv = to_rng_priv(rng); ++ u32 max_words = max / sizeof(u32); ++ u32 num_words, count, val; ++ ++ /* ensure warm up period has elapsed */ ++ while (1) { ++ val = ioread32(priv->base + RNG_TOTAL_BIT_COUNT_OFFSET); ++ if (val > 16) ++ break; ++ cpu_relax(); ++ } ++ ++ /* ensure fifo is not empty */ ++ while (1) { ++ num_words = ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) & ++ RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK; ++ if (num_words) ++ break; ++ if (!wait) ++ return 0; ++ cpu_relax(); ++ } ++ ++ if (num_words > max_words) ++ num_words = max_words; ++ ++ for (count = 0; count < num_words; count++) { ++ ((u32 *)buf)[count] = ioread32(priv->base + ++ RNG_FIFO_DATA_OFFSET); ++ } ++ ++ return num_words * sizeof(u32); ++} ++ ++static int bcm2838_rng200_init(struct hwrng *rng) ++{ ++ struct iproc_rng200_dev *priv = to_rng_priv(rng); ++ uint32_t val; ++ ++ if (ioread32(priv->base + RNG_CTRL_OFFSET) & RNG_CTRL_RNG_RBGEN_MASK) ++ return 0; ++ ++ /* initial numbers generated are "less random" so will be discarded */ ++ val = 0x40000; ++ iowrite32(val, priv->base + RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET); ++ /* min fifo count to generate full interrupt */ ++ val = 2 << RNG_FIFO_COUNT_RNG_FIFO_THRESHOLD_SHIFT; ++ iowrite32(val, priv->base + RNG_FIFO_COUNT_OFFSET); ++ /* enable the rng - 1Mhz sample rate */ ++ val = (0x3 << RNG_CTRL_RNG_DIV_CTRL_SHIFT) | RNG_CTRL_RNG_RBGEN_MASK; ++ iowrite32(val, priv->base + RNG_CTRL_OFFSET); ++ ++ return 0; ++} ++ + static void iproc_rng200_cleanup(struct hwrng *rng) + { + struct iproc_rng200_dev *priv = to_rng_priv(rng); +@@ -202,10 +268,16 @@ static int iproc_rng200_probe(struct pla + return PTR_ERR(priv->base); + } + +- priv->rng.name = "iproc-rng200", +- priv->rng.read = iproc_rng200_read, +- priv->rng.init = iproc_rng200_init, +- priv->rng.cleanup = iproc_rng200_cleanup, ++ priv->rng.name = pdev->name; ++ priv->rng.cleanup = iproc_rng200_cleanup; ++ ++ if (of_device_is_compatible(dev->of_node, "brcm,bcm2838-rng200")) { ++ priv->rng.init = bcm2838_rng200_init; ++ priv->rng.read = bcm2838_rng200_read; ++ } else { ++ priv->rng.init = iproc_rng200_init; ++ priv->rng.read = iproc_rng200_read; ++ } + + /* Register driver */ + ret = devm_hwrng_register(dev, &priv->rng); +@@ -222,6 +294,7 @@ static int iproc_rng200_probe(struct pla + static const struct of_device_id iproc_rng200_of_match[] = { + { .compatible = "brcm,bcm7278-rng200", }, + { .compatible = "brcm,iproc-rng200", }, ++ { .compatible = "brcm,bcm2838-rng200"}, + {}, + }; + MODULE_DEVICE_TABLE(of, iproc_rng200_of_match); diff --git a/target/linux/brcm2708/patches-4.19/950-0544-thermal-brcmstb_thermal-Add-BCM2838-support.patch b/target/linux/brcm2708/patches-4.19/950-0544-thermal-brcmstb_thermal-Add-BCM2838-support.patch new file mode 100644 index 000000000..740da70ec --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0544-thermal-brcmstb_thermal-Add-BCM2838-support.patch @@ -0,0 +1,162 @@ +From bbb17da9724f068cc4cd7620c6d75b09a3d76a96 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sat, 18 May 2019 12:26:11 +0200 +Subject: [PATCH 544/703] thermal: brcmstb_thermal: Add BCM2838 support + +The BCM2838 has an AVS TMON hardware block. This adds the necessary +support to the brcmstb_thermal driver ( no trip handling ). + +Signed-off-by: Stefan Wahren +--- + drivers/thermal/broadcom/Kconfig | 2 +- + drivers/thermal/broadcom/brcmstb_thermal.c | 65 +++++++++++++++++++--- + 2 files changed, 58 insertions(+), 9 deletions(-) + +--- a/drivers/thermal/broadcom/Kconfig ++++ b/drivers/thermal/broadcom/Kconfig +@@ -8,7 +8,7 @@ config BCM2835_THERMAL + + config BRCMSTB_THERMAL + tristate "Broadcom STB AVS TMON thermal driver" +- depends on ARCH_BRCMSTB || COMPILE_TEST ++ depends on ARCH_BRCMSTB || ARCH_BCM2835 || COMPILE_TEST + help + Enable this driver if you have a Broadcom STB SoC and would like + thermal framework support. +--- a/drivers/thermal/broadcom/brcmstb_thermal.c ++++ b/drivers/thermal/broadcom/brcmstb_thermal.c +@@ -19,6 +19,7 @@ + #define pr_fmt(fmt) DRV_NAME ": " fmt + + #include ++#include + #include + #include + #include +@@ -31,9 +32,6 @@ + #include + + #define AVS_TMON_STATUS 0x00 +- #define AVS_TMON_STATUS_valid_msk BIT(11) +- #define AVS_TMON_STATUS_data_msk GENMASK(10, 1) +- #define AVS_TMON_STATUS_data_shift 1 + + #define AVS_TMON_EN_OVERTEMP_RESET 0x04 + #define AVS_TMON_EN_OVERTEMP_RESET_msk BIT(0) +@@ -111,10 +109,19 @@ static struct avs_tmon_trip avs_tmon_tri + }, + }; + ++struct brcmstb_thermal_of_data { ++ const struct thermal_zone_of_device_ops *of_ops; ++ u32 status_valid_mask; ++ u32 status_data_mask; ++ u32 status_data_shift; ++}; ++ + struct brcmstb_thermal_priv { + void __iomem *tmon_base; + struct device *dev; + struct thermal_zone_device *thermal; ++ struct clk *clk; ++ const struct brcmstb_thermal_of_data *socdata; + }; + + static void avs_tmon_get_coeffs(struct thermal_zone_device *tz, int *slope, +@@ -164,17 +171,18 @@ static inline u32 avs_tmon_temp_to_code( + static int brcmstb_get_temp(void *data, int *temp) + { + struct brcmstb_thermal_priv *priv = data; ++ const struct brcmstb_thermal_of_data *socdata = priv->socdata; + u32 val; + long t; + + val = __raw_readl(priv->tmon_base + AVS_TMON_STATUS); + +- if (!(val & AVS_TMON_STATUS_valid_msk)) { ++ if (!(val & socdata->status_valid_mask)) { + dev_err(priv->dev, "reading not valid\n"); + return -EIO; + } + +- val = (val & AVS_TMON_STATUS_data_msk) >> AVS_TMON_STATUS_data_shift; ++ val = (val & socdata->status_data_mask) >> socdata->status_data_shift; + + t = avs_tmon_code_to_temp(priv->thermal, val); + if (t < 0) +@@ -299,13 +307,34 @@ static int brcmstb_set_trips(void *data, + return 0; + } + +-static struct thermal_zone_of_device_ops of_ops = { ++static const struct thermal_zone_of_device_ops bcm7445_thermal_of_ops = { + .get_temp = brcmstb_get_temp, + .set_trips = brcmstb_set_trips, + }; + ++static const struct thermal_zone_of_device_ops bcm2838_thermal_of_ops = { ++ .get_temp = brcmstb_get_temp, ++}; ++ ++static const struct brcmstb_thermal_of_data bcm7445_thermal_of_data = { ++ .of_ops = &bcm7445_thermal_of_ops, ++ .status_valid_mask = BIT(11), ++ .status_data_mask = GENMASK(10, 1), ++ .status_data_shift = 1, ++}; ++ ++static const struct brcmstb_thermal_of_data bcm2838_thermal_of_data = { ++ .of_ops = &bcm2838_thermal_of_ops, ++ .status_valid_mask = BIT(10), ++ .status_data_mask = GENMASK(9, 0), ++ .status_data_shift = 0, ++}; ++ + static const struct of_device_id brcmstb_thermal_id_table[] = { +- { .compatible = "brcm,avs-tmon" }, ++ { .compatible = "brcm,avs-tmon", ++ .data = &bcm7445_thermal_of_data }, ++ { .compatible = "brcm,avs-tmon-bcm2838", ++ .data = &bcm2838_thermal_of_data }, + {}, + }; + MODULE_DEVICE_TABLE(of, brcmstb_thermal_id_table); +@@ -326,10 +355,27 @@ static int brcmstb_thermal_probe(struct + if (IS_ERR(priv->tmon_base)) + return PTR_ERR(priv->tmon_base); + ++ priv->socdata = of_device_get_match_data(&pdev->dev); ++ if (!priv->socdata) { ++ dev_err(&pdev->dev, "no device match found\n"); ++ return -ENODEV; ++ } ++ ++ priv->clk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->clk) && PTR_ERR(priv->clk) == -EPROBE_DEFER) ++ return -EPROBE_DEFER; ++ ++ if (!IS_ERR(priv->clk)) { ++ ret = clk_prepare_enable(priv->clk); ++ if (ret) ++ return ret; ++ } ++ + priv->dev = &pdev->dev; + platform_set_drvdata(pdev, priv); + +- thermal = thermal_zone_of_sensor_register(&pdev->dev, 0, priv, &of_ops); ++ thermal = thermal_zone_of_sensor_register(&pdev->dev, 0, priv, ++ priv->socdata->of_ops); + if (IS_ERR(thermal)) { + ret = PTR_ERR(thermal); + dev_err(&pdev->dev, "could not register sensor: %d\n", ret); +@@ -369,6 +415,9 @@ static int brcmstb_thermal_exit(struct p + if (thermal) + thermal_zone_of_sensor_unregister(&pdev->dev, priv->thermal); + ++ if (!IS_ERR(priv->clk)) ++ clk_disable_unprepare(priv->clk); ++ + return 0; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0545-vchiq-Add-36-bit-address-support.patch b/target/linux/brcm2708/patches-4.19/950-0545-vchiq-Add-36-bit-address-support.patch new file mode 100644 index 000000000..eeb53b4e8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0545-vchiq-Add-36-bit-address-support.patch @@ -0,0 +1,196 @@ +From f9625d8ee77e57593af378a1d60708fc8d43db46 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 1 Nov 2018 17:31:37 +0000 +Subject: [PATCH 545/703] vchiq: Add 36-bit address support + +Conditional on a new compatible string, change the pagelist encoding +such that the top 24 bits are the pfn, leaving 8 bits for run length +(-1). + +Signed-off-by: Phil Elwell +--- + .../interface/vchiq_arm/vchiq_2835_arm.c | 90 ++++++++++++++----- + .../interface/vchiq_arm/vchiq_arm.c | 6 ++ + .../interface/vchiq_arm/vchiq_arm.h | 1 + + 3 files changed, 75 insertions(+), 22 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +@@ -47,6 +47,8 @@ + #include + + #define TOTAL_SLOTS (VCHIQ_SLOT_ZERO_SLOTS + 2 * 32) ++#define VC_SAFE(x) (g_use_36bit_addrs ? ((u32)(x) | 0xc0000000) : (u32)(x)) ++#define IS_VC_SAFE(x) (g_use_36bit_addrs ? !((x) & ~0x3fffffffull) : 1) + + #include "vchiq_arm.h" + #include "vchiq_connected.h" +@@ -96,6 +98,7 @@ static void __iomem *g_regs; + */ + static unsigned int g_cache_line_size; + static struct dma_pool *g_dma_pool; ++static unsigned int g_use_36bit_addrs = 0; + static unsigned int g_fragments_size; + static char *g_fragments_base; + static char *g_free_fragments; +@@ -139,6 +142,8 @@ int vchiq_platform_init(struct platform_ + g_cache_line_size = drvdata->cache_line_size; + g_fragments_size = 2 * g_cache_line_size; + ++ g_use_36bit_addrs = (dev->dma_pfn_offset == 0); ++ + /* Allocate space for the channels in coherent memory */ + slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE); + frag_mem_size = PAGE_ALIGN(g_fragments_size * MAX_FRAGMENTS); +@@ -150,14 +155,21 @@ int vchiq_platform_init(struct platform_ + return -ENOMEM; + } + ++ if (!IS_VC_SAFE(slot_phys)) { ++ dev_err(dev, "allocated DMA memory %pad is not VC-safe\n", ++ &slot_phys); ++ return -ENOMEM; ++ } ++ + WARN_ON(((unsigned long)slot_mem & (PAGE_SIZE - 1)) != 0); ++ channelbase = VC_SAFE(slot_phys); + + vchiq_slot_zero = vchiq_init_slots(slot_mem, slot_mem_size); + if (!vchiq_slot_zero) + return -EINVAL; + + vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] = +- (int)slot_phys + slot_mem_size; ++ channelbase + slot_mem_size; + vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] = + MAX_FRAGMENTS; + +@@ -193,7 +205,6 @@ int vchiq_platform_init(struct platform_ + } + + /* Send the base address of the slots to VideoCore */ +- channelbase = slot_phys; + err = rpi_firmware_property(fw, RPI_FIRMWARE_VCHIQ_INIT, + &channelbase, sizeof(channelbase)); + if (err || channelbase) { +@@ -282,7 +293,7 @@ vchiq_prepare_bulk_data(VCHIQ_BULK_T *bu + return VCHIQ_ERROR; + + bulk->handle = memhandle; +- bulk->data = (void *)(unsigned long)pagelistinfo->dma_addr; ++ bulk->data = (void *)VC_SAFE(pagelistinfo->dma_addr); + + /* + * Store the pagelistinfo address in remote_data, +@@ -570,25 +581,60 @@ create_pagelist(char __user *buf, size_t + + /* Combine adjacent blocks for performance */ + k = 0; +- for_each_sg(scatterlist, sg, dma_buffers, i) { +- u32 len = sg_dma_len(sg); +- u32 addr = sg_dma_address(sg); +- +- /* Note: addrs is the address + page_count - 1 +- * The firmware expects blocks after the first to be page- +- * aligned and a multiple of the page size +- */ +- WARN_ON(len == 0); +- WARN_ON(i && (i != (dma_buffers - 1)) && (len & ~PAGE_MASK)); +- WARN_ON(i && (addr & ~PAGE_MASK)); +- if (k > 0 && +- ((addrs[k - 1] & PAGE_MASK) + +- (((addrs[k - 1] & ~PAGE_MASK) + 1) << PAGE_SHIFT)) +- == (addr & PAGE_MASK)) +- addrs[k - 1] += ((len + PAGE_SIZE - 1) >> PAGE_SHIFT); +- else +- addrs[k++] = (addr & PAGE_MASK) | +- (((len + PAGE_SIZE - 1) >> PAGE_SHIFT) - 1); ++ if (g_use_36bit_addrs) { ++ for_each_sg(scatterlist, sg, dma_buffers, i) { ++ u32 len = sg_dma_len(sg); ++ u64 addr = sg_dma_address(sg); ++ u32 page_id = (u32)((addr >> 4) & ~0xff); ++ u32 sg_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT; ++ ++ /* Note: addrs is the address + page_count - 1 ++ * The firmware expects blocks after the first to be page- ++ * aligned and a multiple of the page size ++ */ ++ WARN_ON(len == 0); ++ WARN_ON(i && ++ (i != (dma_buffers - 1)) && (len & ~PAGE_MASK)); ++ WARN_ON(i && (addr & ~PAGE_MASK)); ++ WARN_ON(upper_32_bits(addr) > 0xf); ++ if (k > 0 && ++ ((addrs[k - 1] & ~0xff) + ++ (((addrs[k - 1] & 0xff) + 1) << 8) ++ == page_id)) { ++ u32 inc_pages = min(sg_pages, ++ 0xff - (addrs[k - 1] & 0xff)); ++ addrs[k - 1] += inc_pages; ++ page_id += inc_pages << 8; ++ sg_pages -= inc_pages; ++ } ++ while (sg_pages) { ++ u32 inc_pages = min(sg_pages, 0x100u); ++ addrs[k++] = page_id | (inc_pages - 1); ++ page_id += inc_pages << 8; ++ sg_pages -= inc_pages; ++ } ++ } ++ } else { ++ for_each_sg(scatterlist, sg, dma_buffers, i) { ++ u32 len = sg_dma_len(sg); ++ u32 addr = VC_SAFE(sg_dma_address(sg)); ++ u32 new_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT; ++ ++ /* Note: addrs is the address + page_count - 1 ++ * The firmware expects blocks after the first to be page- ++ * aligned and a multiple of the page size ++ */ ++ WARN_ON(len == 0); ++ WARN_ON(i && (i != (dma_buffers - 1)) && (len & ~PAGE_MASK)); ++ WARN_ON(i && (addr & ~PAGE_MASK)); ++ if (k > 0 && ++ ((addrs[k - 1] & PAGE_MASK) + ++ (((addrs[k - 1] & ~PAGE_MASK) + 1) << PAGE_SHIFT)) ++ == (addr & PAGE_MASK)) ++ addrs[k - 1] += new_pages; ++ else ++ addrs[k++] = (addr & PAGE_MASK) | (new_pages - 1); ++ } + } + + /* Partial cache lines (fragments) require special measures */ +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -181,6 +181,11 @@ static struct vchiq_drvdata bcm2836_drvd + .cache_line_size = 64, + }; + ++static struct vchiq_drvdata bcm2838_drvdata = { ++ .cache_line_size = 64, ++ .use_36bit_addrs = true, ++}; ++ + static const char *const ioctl_names[] = { + "CONNECT", + "SHUTDOWN", +@@ -3618,6 +3623,7 @@ vchiq_register_child(struct platform_dev + static const struct of_device_id vchiq_of_match[] = { + { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata }, + { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata }, ++ { .compatible = "brcm,bcm2838-vchiq", .data = &bcm2838_drvdata }, + {}, + }; + MODULE_DEVICE_TABLE(of, vchiq_of_match); +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h +@@ -125,6 +125,7 @@ typedef struct vchiq_arm_state_struct { + + struct vchiq_drvdata { + const unsigned int cache_line_size; ++ const bool use_36bit_addrs; + struct rpi_firmware *fw; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0546-bcm2835-pcm.c-Support-multichannel-audio.patch b/target/linux/brcm2708/patches-4.19/950-0546-bcm2835-pcm.c-Support-multichannel-audio.patch new file mode 100644 index 000000000..e79433f15 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0546-bcm2835-pcm.c-Support-multichannel-audio.patch @@ -0,0 +1,46 @@ +From d1712d177a85f00eaf359d9b479841bb21239adb Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 30 Apr 2019 19:15:30 +0100 +Subject: [PATCH 546/703] bcm2835-pcm.c: Support multichannel audio + +--- + .../vc04_services/bcm2835-audio/bcm2835-pcm.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +--- a/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c ++++ b/drivers/staging/vc04_services/bcm2835-audio/bcm2835-pcm.c +@@ -14,9 +14,9 @@ static const struct snd_pcm_hardware snd + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, +- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000, + .rate_min = 8000, +- .rate_max = 48000, ++ .rate_max = 192000, + .channels_min = 1, + .channels_max = 2, + .buffer_bytes_max = 128 * 1024, +@@ -31,15 +31,16 @@ static const struct snd_pcm_hardware snd + SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_DRAIN_TRIGGER | SNDRV_PCM_INFO_SYNC_APPLPTR), + .formats = SNDRV_PCM_FMTBIT_S16_LE, +- .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | +- SNDRV_PCM_RATE_48000, ++ .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | ++ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | ++ SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, + .rate_min = 44100, +- .rate_max = 48000, ++ .rate_max = 192000, + .channels_min = 2, +- .channels_max = 2, +- .buffer_bytes_max = 128 * 1024, ++ .channels_max = 8, ++ .buffer_bytes_max = 512 * 1024, + .period_bytes_min = 1 * 1024, +- .period_bytes_max = 128 * 1024, ++ .period_bytes_max = 512 * 1024, + .periods_min = 1, + .periods_max = 128, + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0547-bcmgenet-constrain-max-DMA-burst-length.patch b/target/linux/brcm2708/patches-4.19/950-0547-bcmgenet-constrain-max-DMA-burst-length.patch new file mode 100644 index 000000000..8cc5acc63 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0547-bcmgenet-constrain-max-DMA-burst-length.patch @@ -0,0 +1,20 @@ +From 9c341c10cd2ad2a61f084dc222fd380ed1687f50 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Wed, 12 Sep 2018 14:44:53 +0100 +Subject: [PATCH 547/703] bcmgenet: constrain max DMA burst length + +--- + drivers/net/ethernet/broadcom/genet/bcmgenet.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h ++++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h +@@ -31,7 +31,7 @@ + #define ENET_PAD 8 + #define ENET_MAX_MTU_SIZE (ETH_DATA_LEN + ETH_HLEN + VLAN_HLEN + \ + ENET_BRCM_TAG_LEN + ETH_FCS_LEN + ENET_PAD) +-#define DMA_MAX_BURST_LENGTH 0x10 ++#define DMA_MAX_BURST_LENGTH 0x08 + + /* misc. configuration */ + #define CLEAR_ALL_HFB 0xFF diff --git a/target/linux/brcm2708/patches-4.19/950-0548-bcmgenet-Better-coalescing-parameter-defaults.patch b/target/linux/brcm2708/patches-4.19/950-0548-bcmgenet-Better-coalescing-parameter-defaults.patch new file mode 100644 index 000000000..939c8cde0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0548-bcmgenet-Better-coalescing-parameter-defaults.patch @@ -0,0 +1,43 @@ +From 8d30a996253c537f4978910aabf1e098bac8fa1a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 27 Mar 2019 13:45:46 +0000 +Subject: [PATCH 548/703] bcmgenet: Better coalescing parameter defaults + +Set defaults for TX and RX packet coalescing to be equivalent to: + + # ethtool -C eth0 tx-frames 10 + # ethtool -C eth0 rx-usecs 50 + +This may be something we want to set via DT parameters in the +future. + +Signed-off-by: Phil Elwell +--- + drivers/net/ethernet/broadcom/genet/bcmgenet.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c ++++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c +@@ -2147,7 +2147,7 @@ static void bcmgenet_init_tx_ring(struct + + bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX); + bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_CONS_INDEX); +- bcmgenet_tdma_ring_writel(priv, index, 1, DMA_MBUF_DONE_THRESH); ++ bcmgenet_tdma_ring_writel(priv, index, 10, DMA_MBUF_DONE_THRESH); + /* Disable rate control for now */ + bcmgenet_tdma_ring_writel(priv, index, flow_period_val, + TDMA_FLOW_PERIOD); +@@ -3576,9 +3576,12 @@ static int bcmgenet_probe(struct platfor + netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1); + + /* Set default coalescing parameters */ +- for (i = 0; i < priv->hw_params->rx_queues; i++) ++ for (i = 0; i < priv->hw_params->rx_queues; i++) { + priv->rx_rings[i].rx_max_coalesced_frames = 1; ++ priv->rx_rings[i].rx_coalesce_usecs = 50; ++ } + priv->rx_rings[DESC_INDEX].rx_max_coalesced_frames = 1; ++ priv->rx_rings[DESC_INDEX].rx_coalesce_usecs = 50; + + /* libphy will determine the link state */ + netif_carrier_off(dev); diff --git a/target/linux/brcm2708/patches-4.19/950-0549-net-genet-enable-link-energy-detect-powerdown-for-ex.patch b/target/linux/brcm2708/patches-4.19/950-0549-net-genet-enable-link-energy-detect-powerdown-for-ex.patch new file mode 100644 index 000000000..bd8a0278e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0549-net-genet-enable-link-energy-detect-powerdown-for-ex.patch @@ -0,0 +1,34 @@ +From 03bd32474bf378c1537775970b35c7081779aec4 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 14 May 2019 17:17:59 +0100 +Subject: [PATCH 549/703] net: genet: enable link energy detect powerdown for + external PHYs + +There are several warts surrounding bcmgenet_mii_probe() as this +function is called from ndo_open, but it's calling registration-type +functions. The probe should be called at probe time and refactored +such that the PHY device data can be extracted to limit the scope +of this flag to Broadcom PHYs. + +For now, pass this flag in as it puts our attached PHY into a low-power +state when disconnected. + +Signed-off-by: Jonathan Bell +--- + drivers/net/ethernet/broadcom/genet/bcmmii.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c ++++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c +@@ -280,7 +280,10 @@ int bcmgenet_mii_probe(struct net_device + int ret; + + /* Communicate the integrated PHY revision */ +- phy_flags = priv->gphy_rev; ++ if (priv->internal_phy) ++ phy_flags = priv->gphy_rev; ++ else ++ phy_flags = PHY_BRCM_AUTO_PWRDWN_ENABLE; + + /* Initialize link state variables that bcmgenet_mii_setup() uses */ + priv->old_link = -1; diff --git a/target/linux/brcm2708/patches-4.19/950-0550-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch b/target/linux/brcm2708/patches-4.19/950-0550-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch new file mode 100644 index 000000000..ebb636efd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0550-phy-broadcom-split-out-the-BCM54213PE-from-the-BCM54.patch @@ -0,0 +1,73 @@ +From 845295c21d9123f24a33bcb683f02fa7f3c7648e Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 14 May 2019 17:00:41 +0100 +Subject: [PATCH 550/703] phy: broadcom: split out the BCM54213PE from the + BCM54210E IDs + +The last nibble is a revision ID, and the 54213pe is a later rev +than the 54210e. Running the 54210e setup code on a 54213pe results +in a broken RGMII interface. + +Signed-off-by: Jonathan Bell +--- + drivers/net/phy/broadcom.c | 17 ++++++++++++++--- + include/linux/brcmphy.h | 1 + + 2 files changed, 15 insertions(+), 3 deletions(-) + +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -222,7 +222,8 @@ static void bcm54xx_adjust_rxrefclk(stru + /* Abort if we are using an untested phy. */ + if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 && + BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 && +- BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M) ++ BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M && ++ BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54213PE) + return; + + val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3); +@@ -604,7 +605,7 @@ static struct phy_driver broadcom_driver + .config_intr = bcm_phy_config_intr, + }, { + .phy_id = PHY_ID_BCM54210E, +- .phy_id_mask = 0xfffffff0, ++ .phy_id_mask = 0xffffffff, + .name = "Broadcom BCM54210E", + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_INTERRUPT, +@@ -612,6 +613,15 @@ static struct phy_driver broadcom_driver + .ack_interrupt = bcm_phy_ack_intr, + .config_intr = bcm_phy_config_intr, + }, { ++ .phy_id = PHY_ID_BCM54213PE, ++ .phy_id_mask = 0xffffffff, ++ .name = "Broadcom BCM54213PE", ++ .features = PHY_GBIT_FEATURES, ++ .flags = PHY_HAS_INTERRUPT, ++ .config_init = bcm54xx_config_init, ++ .ack_interrupt = bcm_phy_ack_intr, ++ .config_intr = bcm_phy_config_intr, ++}, { + .phy_id = PHY_ID_BCM5461, + .phy_id_mask = 0xfffffff0, + .name = "Broadcom BCM5461", +@@ -748,7 +758,8 @@ module_phy_driver(broadcom_drivers); + static struct mdio_device_id __maybe_unused broadcom_tbl[] = { + { PHY_ID_BCM5411, 0xfffffff0 }, + { PHY_ID_BCM5421, 0xfffffff0 }, +- { PHY_ID_BCM54210E, 0xfffffff0 }, ++ { PHY_ID_BCM54210E, 0xffffffff }, ++ { PHY_ID_BCM54213PE, 0xffffffff }, + { PHY_ID_BCM5461, 0xfffffff0 }, + { PHY_ID_BCM54612E, 0xfffffff0 }, + { PHY_ID_BCM54616S, 0xfffffff0 }, +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -20,6 +20,7 @@ + #define PHY_ID_BCM5411 0x00206070 + #define PHY_ID_BCM5421 0x002060e0 + #define PHY_ID_BCM54210E 0x600d84a0 ++#define PHY_ID_BCM54213PE 0x600d84a2 + #define PHY_ID_BCM5464 0x002060b0 + #define PHY_ID_BCM5461 0x002060c0 + #define PHY_ID_BCM54612E 0x03625e60 diff --git a/target/linux/brcm2708/patches-4.19/950-0551-phy-bcm54213pe-configure-the-LED-outputs-to-be-more-.patch b/target/linux/brcm2708/patches-4.19/950-0551-phy-bcm54213pe-configure-the-LED-outputs-to-be-more-.patch new file mode 100644 index 000000000..e60d125cd --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0551-phy-bcm54213pe-configure-the-LED-outputs-to-be-more-.patch @@ -0,0 +1,64 @@ +From 5353102f2d7e2f61cca4014aacfa3ac9a71aaeea Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Fri, 17 May 2019 13:31:21 +0100 +Subject: [PATCH 551/703] phy: bcm54213pe: configure the LED outputs to be more + user-friendly + +The default state was both LEDs indicating link speed. + +Change the default configuration to +- Amber: 1000/100 link speed indication +- Green: link present + activity indication + +Signed-off-by: Jonathan Bell +--- + drivers/net/phy/broadcom.c | 17 +++++++++++++++++ + include/linux/brcmphy.h | 4 ++++ + 2 files changed, 21 insertions(+) + +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -52,6 +52,21 @@ static int bcm54210e_config_init(struct + return 0; + } + ++static void bcm54213pe_config_init(struct phy_device *phydev) ++{ ++ u16 val; ++ ++ /* Enable ACT+LINK indication on ACTIVITY trigger */ ++ val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_LEDCTL); ++ val |= BCM54XX_SHD_LEDCTL_ACTLINK_EN; ++ bcm_phy_write_shadow(phydev, BCM54XX_SHD_LEDCTL, val); ++ ++ /* Set ACTIVITY on LED "1" output, LINKSPD[1] on LED "3" output */ ++ val = BCM5482_SHD_LEDS1_LED1(BCM_LED_SRC_ACTIVITYLED) | ++ BCM5482_SHD_LEDS1_LED3(BCM_LED_SRC_LINKSPD1); ++ bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val); ++} ++ + static int bcm54612e_config_init(struct phy_device *phydev) + { + int reg; +@@ -310,6 +325,8 @@ static int bcm54xx_config_init(struct ph + err = bcm54210e_config_init(phydev); + if (err) + return err; ++ } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54213PE) { ++ bcm54213pe_config_init(phydev); + } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54612E) { + err = bcm54612e_config_init(phydev); + if (err) +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -168,6 +168,10 @@ + #define BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002 + #define BCM54XX_SHD_SCR3_TRDDAPD 0x0004 + ++/* 01001: Additional LED trigger options */ ++#define BCM54XX_SHD_LEDCTL 0x09 ++#define BCM54XX_SHD_LEDCTL_ACTLINK_EN 0x0010 ++ + /* 01010: Auto Power-Down */ + #define BCM54XX_SHD_APD 0x0a + #define BCM_APD_CLR_MASK 0xFE9F /* clear bits 5, 6 & 8 */ diff --git a/target/linux/brcm2708/patches-4.19/950-0552-dwc_otg-Choose-appropriate-IRQ-handover-strategy.patch b/target/linux/brcm2708/patches-4.19/950-0552-dwc_otg-Choose-appropriate-IRQ-handover-strategy.patch new file mode 100644 index 000000000..54e0679a5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0552-dwc_otg-Choose-appropriate-IRQ-handover-strategy.patch @@ -0,0 +1,181 @@ +From 9a7fd87f8f2a28cee05a847266a5a168a3d8c0dd Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 21 May 2019 13:36:52 +0100 +Subject: [PATCH 552/703] dwc_otg: Choose appropriate IRQ handover strategy + +2711 has no MPHI peripheral, but the ARM Control block can fake +interrupts. Use the size of the DTB "mphi" reg block to determine +which is required. + +Signed-off-by: Phil Elwell +--- + drivers/usb/host/dwc_otg/dwc_otg_driver.c | 9 +++-- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 21 ++++++---- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h | 2 + + drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 12 ++++-- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 41 +++++++++++++------- + drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 3 ++ + 6 files changed, 60 insertions(+), 28 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_driver.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_driver.c +@@ -806,14 +806,15 @@ static int dwc_otg_driver_probe( + if (!request_mem_region(_dev->resource[1].start, + _dev->resource[1].end - _dev->resource[1].start + 1, + "dwc_otg")) { +- dev_dbg(&_dev->dev, "error reserving mapped memory\n"); +- retval = -EFAULT; +- goto fail; +- } ++ dev_dbg(&_dev->dev, "error reserving mapped memory\n"); ++ retval = -EFAULT; ++ goto fail; ++ } + + dwc_otg_device->os_dep.mphi_base = ioremap_nocache(_dev->resource[1].start, + _dev->resource[1].end - + _dev->resource[1].start + 1); ++ dwc_otg_device->os_dep.use_swirq = (_dev->resource[1].end - _dev->resource[1].start) == 0x200; + } + + #else +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c +@@ -1347,8 +1347,12 @@ void notrace dwc_otg_fiq_fsm(struct fiq_ + /* We got an interrupt, didn't handle it. */ + if (kick_irq) { + state->mphi_int_count++; +- FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); +- FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); ++ if (state->mphi_regs.swirq_set) { ++ FIQ_WRITE(state->mphi_regs.swirq_set, 1); ++ } else { ++ FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); ++ FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); ++ } + + } + state->fiq_done++; +@@ -1406,11 +1410,14 @@ void notrace dwc_otg_fiq_nop(struct fiq_ + state->mphi_int_count++; + gintmsk.d32 &= state->gintmsk_saved.d32; + FIQ_WRITE(state->dwc_regs_base + GINTMSK, gintmsk.d32); +- /* Force a clear before another dummy send */ +- FIQ_WRITE(state->mphi_regs.intstat, (1<<29)); +- FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); +- FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); +- ++ if (state->mphi_regs.swirq_set) { ++ FIQ_WRITE(state->mphi_regs.swirq_set, 1); ++ } else { ++ /* Force a clear before another dummy send */ ++ FIQ_WRITE(state->mphi_regs.intstat, (1<<29)); ++ FIQ_WRITE(state->mphi_regs.outdda, state->dummy_send_dma); ++ FIQ_WRITE(state->mphi_regs.outddb, (1<<29)); ++ } + } + state->fiq_done++; + mb(); +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.h +@@ -118,6 +118,8 @@ typedef struct { + volatile void* outdda; + volatile void* outddb; + volatile void* intstat; ++ volatile void* swirq_set; ++ volatile void* swirq_clr; + } mphi_regs_t; + + enum fiq_debug_level { +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +@@ -220,16 +220,20 @@ exit_handler_routine: + + /* The FIQ could have sneaked another interrupt in. If so, don't clear MPHI */ + if ((gintmsk_new.d32 == ~0) && (haintmsk_new.d32 == 0x0000FFFF)) { ++ if (dwc_otg_hcd->fiq_state->mphi_regs.swirq_clr) { ++ DWC_WRITE_REG32(dwc_otg_hcd->fiq_state->mphi_regs.swirq_clr, 1); ++ } else { + DWC_WRITE_REG32(dwc_otg_hcd->fiq_state->mphi_regs.intstat, (1<<16)); +- if (dwc_otg_hcd->fiq_state->mphi_int_count >= 50) { +- fiq_print(FIQDBG_INT, dwc_otg_hcd->fiq_state, "MPHI CLR"); ++ } ++ if (dwc_otg_hcd->fiq_state->mphi_int_count >= 50) { ++ fiq_print(FIQDBG_INT, dwc_otg_hcd->fiq_state, "MPHI CLR"); + DWC_WRITE_REG32(dwc_otg_hcd->fiq_state->mphi_regs.ctrl, ((1<<31) + (1<<16))); + while (!(DWC_READ_REG32(dwc_otg_hcd->fiq_state->mphi_regs.ctrl) & (1 << 17))) + ; + DWC_WRITE_REG32(dwc_otg_hcd->fiq_state->mphi_regs.ctrl, (1<<31)); + dwc_otg_hcd->fiq_state->mphi_int_count = 0; +- } +- int_done++; ++ } ++ int_done++; + } + haintmsk.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->haintmsk); + /* Re-enable interrupts that the FIQ masked (first time round) */ +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -474,22 +474,37 @@ static void hcd_init_fiq(void *cookie) + set_fiq_regs(®s); + #endif + +- //Set the mphi periph to the required registers +- dwc_otg_hcd->fiq_state->mphi_regs.base = otg_dev->os_dep.mphi_base; +- dwc_otg_hcd->fiq_state->mphi_regs.ctrl = otg_dev->os_dep.mphi_base + 0x4c; +- dwc_otg_hcd->fiq_state->mphi_regs.outdda = otg_dev->os_dep.mphi_base + 0x28; +- dwc_otg_hcd->fiq_state->mphi_regs.outddb = otg_dev->os_dep.mphi_base + 0x2c; +- dwc_otg_hcd->fiq_state->mphi_regs.intstat = otg_dev->os_dep.mphi_base + 0x50; + dwc_otg_hcd->fiq_state->dwc_regs_base = otg_dev->os_dep.base; +- DWC_WARN("MPHI regs_base at %px", dwc_otg_hcd->fiq_state->mphi_regs.base); +- //Enable mphi peripheral +- writel((1<<31),dwc_otg_hcd->fiq_state->mphi_regs.ctrl); ++ //Set the mphi periph to the required registers ++ dwc_otg_hcd->fiq_state->mphi_regs.base = otg_dev->os_dep.mphi_base; ++ if (otg_dev->os_dep.use_swirq) { ++ dwc_otg_hcd->fiq_state->mphi_regs.swirq_set = ++ otg_dev->os_dep.mphi_base + 0x1f0; ++ dwc_otg_hcd->fiq_state->mphi_regs.swirq_clr = ++ otg_dev->os_dep.mphi_base + 0x1f4; ++ DWC_WARN("Fake MPHI regs_base at 0x%08x", ++ (int)dwc_otg_hcd->fiq_state->mphi_regs.base); ++ } else { ++ dwc_otg_hcd->fiq_state->mphi_regs.ctrl = ++ otg_dev->os_dep.mphi_base + 0x4c; ++ dwc_otg_hcd->fiq_state->mphi_regs.outdda ++ = otg_dev->os_dep.mphi_base + 0x28; ++ dwc_otg_hcd->fiq_state->mphi_regs.outddb ++ = otg_dev->os_dep.mphi_base + 0x2c; ++ dwc_otg_hcd->fiq_state->mphi_regs.intstat ++ = otg_dev->os_dep.mphi_base + 0x50; ++ DWC_WARN("MPHI regs_base at %px", ++ dwc_otg_hcd->fiq_state->mphi_regs.base); ++ ++ //Enable mphi peripheral ++ writel((1<<31),dwc_otg_hcd->fiq_state->mphi_regs.ctrl); + #ifdef DEBUG +- if (readl(dwc_otg_hcd->fiq_state->mphi_regs.ctrl) & 0x80000000) +- DWC_WARN("MPHI periph has been enabled"); +- else +- DWC_WARN("MPHI periph has NOT been enabled"); ++ if (readl(dwc_otg_hcd->fiq_state->mphi_regs.ctrl) & 0x80000000) ++ DWC_WARN("MPHI periph has been enabled"); ++ else ++ DWC_WARN("MPHI periph has NOT been enabled"); + #endif ++ } + // Enable FIQ interrupt from USB peripheral + #ifdef CONFIG_ARM64 + irq = otg_dev->os_dep.fiq_num; +--- a/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h ++++ b/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h +@@ -102,6 +102,9 @@ typedef struct os_dependent { + /** Base address for MPHI peripheral */ + void *mphi_base; + ++ /** mphi_base actually points to the SWIRQ block */ ++ bool use_swirq; ++ + /** IRQ number (<0 if not valid) */ + int irq_num; + diff --git a/target/linux/brcm2708/patches-4.19/950-0553-usb-xhci-Disable-the-XHCI-5-second-timeout.patch b/target/linux/brcm2708/patches-4.19/950-0553-usb-xhci-Disable-the-XHCI-5-second-timeout.patch new file mode 100644 index 000000000..c5d4e6bf9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0553-usb-xhci-Disable-the-XHCI-5-second-timeout.patch @@ -0,0 +1,29 @@ +From 2957990a8291f860ca5bbbc58d2b28aaf6acd28e Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Fri, 22 Mar 2019 09:47:14 +0000 +Subject: [PATCH 553/703] usb: xhci: Disable the XHCI 5 second timeout + +If the VL805 EEPROM has not been programmed then boot will hang for five +seconds. The timeout seems to be arbitrary and is an unecessary +delay on the first boot. Remove the timeout. + +This is common code and probably can't be upstreamed unless the timeout +can be configurable somehow or perhaps the XHCI driver can be skipped +on the first boot. +--- + drivers/usb/host/xhci.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -196,8 +196,9 @@ int xhci_reset(struct xhci_hcd *xhci) + if (xhci->quirks & XHCI_INTEL_HOST) + udelay(1000); + ++ // Hack: reduce handshake timeout from 10s 0.5s due to unprogrammed vl805 + ret = xhci_handshake(&xhci->op_regs->command, +- CMD_RESET, 0, 10 * 1000 * 1000); ++ CMD_RESET, 0, 500 * 1000); + if (ret) + return ret; + diff --git a/target/linux/brcm2708/patches-4.19/950-0554-usb-xhci-Show-that-the-VIA-VL805-supports-LPM.patch b/target/linux/brcm2708/patches-4.19/950-0554-usb-xhci-Show-that-the-VIA-VL805-supports-LPM.patch new file mode 100644 index 000000000..d4065fb32 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0554-usb-xhci-Show-that-the-VIA-VL805-supports-LPM.patch @@ -0,0 +1,23 @@ +From 42738c082b40c372dcaebfae4dcbd3b3251cb37f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 23 May 2019 15:08:30 +0100 +Subject: [PATCH 554/703] usb: xhci: Show that the VIA VL805 supports LPM + +Signed-off-by: Phil Elwell +--- + drivers/usb/host/xhci-pci.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -222,6 +222,10 @@ static void xhci_pci_quirks(struct devic + pdev->device == 0x3432) + xhci->quirks |= XHCI_BROKEN_STREAMS; + ++ if (pdev->vendor == PCI_VENDOR_ID_VIA && ++ pdev->device == 0x3483) ++ xhci->quirks |= XHCI_LPM_SUPPORT; ++ + if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && + pdev->device == 0x1042) + xhci->quirks |= XHCI_BROKEN_STREAMS; diff --git a/target/linux/brcm2708/patches-4.19/950-0555-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.mousep.patch b/target/linux/brcm2708/patches-4.19/950-0555-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.mousep.patch new file mode 100644 index 000000000..efb83ac32 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0555-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.mousep.patch @@ -0,0 +1,122 @@ +From dd2f4acbdd9731757fe9aedd11164d67a785e25c Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Thu, 30 May 2019 10:38:40 +0100 +Subject: [PATCH 555/703] usb: xhci: hack xhci_urb_enqueue to support + hid.mousepoll behaviour + +xHCI creates endpoint contexts directly from the device's endpoint +data, so submitting URBs with urb->interval different from the hardware +interval has no effect. + +Add an explicit reconfiguration of the endpoint context when requested, +which will happen only when the interval is different from the cached +value. In practice, the reconfiguration only happens on the first URB +submitted for the endpoint. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/host/xhci.c | 86 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 86 insertions(+) + +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -1416,6 +1416,87 @@ command_cleanup: + } + + /* ++ * RPI: Fixup endpoint intervals when requested ++ * - Check interval versus the (cached) endpoint context ++ * - set the endpoint interval to the new value ++ * - force an endpoint configure command ++ */ ++static void xhci_fixup_interval(struct xhci_hcd *xhci, struct urb *urb, ++ unsigned int slot_id, unsigned int ep_index) ++{ ++ struct xhci_ep_ctx *ep_ctx_out, *ep_ctx_in; ++ struct xhci_command *command; ++ struct xhci_input_control_ctx *ctrl_ctx; ++ struct xhci_virt_device *vdev; ++ int xhci_interval, ep_interval; ++ int ret; ++ unsigned long flags; ++ u32 ep_info_tmp; ++ ++ spin_lock_irqsave(&xhci->lock, flags); ++ ++ vdev = xhci->devs[slot_id]; ++ /* Get context-derived endpoint interval */ ++ ep_ctx_out = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index); ++ ep_ctx_in = xhci_get_ep_ctx(xhci, vdev->in_ctx, ep_index); ++ xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx_out->ep_info)); ++ ep_interval = urb->interval * 8; ++ ++ if (ep_interval == xhci_interval) { ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ return; ++ } ++ ++ xhci_dbg(xhci, "Fixup interval ep_interval=%d xhci_interval=%d\n", ++ ep_interval, xhci_interval); ++ command = xhci_alloc_command_with_ctx(xhci, true, GFP_ATOMIC); ++ if (!command) { ++ /* Failure here is benign, poll at the original rate */ ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ return; ++ } ++ ++ /* xHCI uses exponents for intervals... */ ++ xhci_interval = fls(ep_interval) - 1; ++ xhci_interval = clamp_val(xhci_interval, 3, 10); ++ ep_info_tmp = le32_to_cpu(ep_ctx_out->ep_info); ++ ep_info_tmp &= ~EP_INTERVAL(255); ++ ep_info_tmp |= EP_INTERVAL(xhci_interval); ++ ++ /* Keep the endpoint context up-to-date while issuing the command. */ ++ xhci_endpoint_copy(xhci, vdev->in_ctx, ++ vdev->out_ctx, ep_index); ++ ep_ctx_in->ep_info = cpu_to_le32(ep_info_tmp); ++ ++ /* ++ * We need to drop the lock, so take an explicit copy ++ * of the ep context. ++ */ ++ xhci_endpoint_copy(xhci, command->in_ctx, vdev->in_ctx, ep_index); ++ ++ ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); ++ if (!ctrl_ctx) { ++ xhci_warn(xhci, ++ "%s: Could not get input context, bad type.\n", ++ __func__); ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ xhci_free_command(xhci, command); ++ return; ++ } ++ ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index); ++ ctrl_ctx->drop_flags = 0; ++ ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ ++ ret = xhci_configure_endpoint(xhci, urb->dev, command, ++ false, false); ++ if (ret) ++ xhci_warn(xhci, "%s: Configure endpoint failed: %d\n", ++ __func__, ret); ++ xhci_free_command(xhci, command); ++} ++ ++/* + * non-error returns are a promise to giveback() the urb later + * we drop ownership so next owner (or urb unlink) can get it + */ +@@ -1483,6 +1564,11 @@ static int xhci_urb_enqueue(struct usb_h + } + } + ++ if (usb_endpoint_xfer_int(&urb->ep->desc) && ++ (urb->dev->speed == USB_SPEED_FULL || ++ urb->dev->speed == USB_SPEED_LOW)) ++ xhci_fixup_interval(xhci, urb, slot_id, ep_index); ++ + spin_lock_irqsave(&xhci->lock, flags); + + if (xhci->xhc_state & XHCI_STATE_DYING) { diff --git a/target/linux/brcm2708/patches-4.19/950-0556-pinctrl-bcm2835-Add-support-for-BCM2838.patch b/target/linux/brcm2708/patches-4.19/950-0556-pinctrl-bcm2835-Add-support-for-BCM2838.patch new file mode 100644 index 000000000..617f3fe9b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0556-pinctrl-bcm2835-Add-support-for-BCM2838.patch @@ -0,0 +1,90 @@ +From 9d0c6b7b815e9c8d578299446a28c3ed54700464 Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Wed, 9 Jan 2019 14:43:36 +0000 +Subject: [PATCH 556/703] pinctrl-bcm2835: Add support for BCM2838 + +GPIO configuration on BCM2838 is largely the same as BCM2835 except for +the pull up/down configuration. The old mechanism has been replaced +by new registers which don't require the fixed delay. + +Detect BCN2838 at run-time and use the new mechanism. Backwards +compatibility for the device-tree configuration has been retained. +--- + drivers/pinctrl/bcm/pinctrl-bcm2835.c | 58 ++++++++++++++++++++------- + 1 file changed, 44 insertions(+), 14 deletions(-) + +--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c ++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +@@ -67,6 +67,12 @@ + #define GPPUD 0x94 /* Pin Pull-up/down Enable */ + #define GPPUDCLK0 0x98 /* Pin Pull-up/down Enable Clock */ + ++/* 2711 has a different mechanism for pin pull-up/down/enable */ ++#define GPPUPPDN0 0xe4 /* Pin pull-up/down for pins 15:0 */ ++#define GPPUPPDN1 0xe8 /* Pin pull-up/down for pins 31:16 */ ++#define GPPUPPDN2 0xec /* Pin pull-up/down for pins 47:32 */ ++#define GPPUPPDN3 0xf0 /* Pin pull-up/down for pins 57:48 */ ++ + #define FSEL_REG(p) (GPFSEL0 + (((p) / 10) * 4)) + #define FSEL_SHIFT(p) (((p) % 10) * 3) + #define GPIO_REG_OFFSET(p) ((p) / 32) +@@ -917,21 +923,45 @@ static void bcm2835_pull_config_set(stru + unsigned int pin, unsigned int arg) + { + u32 off, bit; ++ /* BCM2835, BCM2836 & BCM2837 return 'gpio' for this unused register */ ++ int is_2835 = bcm2835_gpio_rd(pc, GPPUPPDN3) == 0x6770696f; + +- off = GPIO_REG_OFFSET(pin); +- bit = GPIO_REG_SHIFT(pin); +- +- bcm2835_gpio_wr(pc, GPPUD, arg & 3); +- /* +- * BCM2835 datasheet say to wait 150 cycles, but not of what. +- * But the VideoCore firmware delay for this operation +- * based nearly on the same amount of VPU cycles and this clock +- * runs at 250 MHz. +- */ +- udelay(1); +- bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit)); +- udelay(1); +- bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0); ++ if (is_2835) { ++ off = GPIO_REG_OFFSET(pin); ++ bit = GPIO_REG_SHIFT(pin); ++ /* ++ * BCM2835 datasheet say to wait 150 cycles, but not of what. ++ * But the VideoCore firmware delay for this operation ++ * based nearly on the same amount of VPU cycles and this clock ++ * runs at 250 MHz. ++ */ ++ bcm2835_gpio_wr(pc, GPPUD, arg & 3); ++ udelay(1); ++ bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), BIT(bit)); ++ udelay(1); ++ bcm2835_gpio_wr(pc, GPPUDCLK0 + (off * 4), 0); ++ } else { ++ u32 reg; ++ int lsb; ++ ++ off = (pin >> 4); ++ if (off > 3) ++ return; ++ lsb = (pin & 0xf) << 1; ++ ++ /* The up/down semantics are reversed compared to BCM2835. ++ * Instead of updating all the device tree files, translate the ++ * values here. ++ */ ++ if (arg == 2) ++ arg = 1; ++ else if (arg == 1) ++ arg = 2; ++ reg = bcm2835_gpio_rd(pc, GPPUPPDN0 + (off *4)); ++ reg &= ~(0x3 << lsb); ++ reg |= (arg & 3) << lsb; ++ bcm2835_gpio_wr(pc, GPPUPPDN0 + (off * 4), reg); ++ } + } + + static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev, diff --git a/target/linux/brcm2708/patches-4.19/950-0557-spi-bcm2835-enable-shared-interrupt-support.patch b/target/linux/brcm2708/patches-4.19/950-0557-spi-bcm2835-enable-shared-interrupt-support.patch new file mode 100644 index 000000000..698134562 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0557-spi-bcm2835-enable-shared-interrupt-support.patch @@ -0,0 +1,35 @@ +From 6dc0f30ee18404547a2ca94fd11914ea0d75841f Mon Sep 17 00:00:00 2001 +From: Martin Sperl +Date: Mon, 13 May 2019 11:05:27 +0000 +Subject: [PATCH 557/703] spi: bcm2835: enable shared interrupt support + +Add shared interrupt support for this driver. + +Signed-off-by: Martin Sperl +--- + drivers/spi/spi-bcm2835.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/spi/spi-bcm2835.c ++++ b/drivers/spi/spi-bcm2835.c +@@ -150,6 +150,10 @@ static irqreturn_t bcm2835_spi_interrupt + struct spi_master *master = dev_id; + struct bcm2835_spi *bs = spi_master_get_devdata(master); + ++ /* check if we got interrupt enabled */ ++ if (!(bcm2835_rd(bs, BCM2835_SPI_CS) & BCM2835_SPI_CS_INTR)) ++ return IRQ_NONE; ++ + /* Read as many bytes as possible from FIFO */ + bcm2835_rd_fifo(bs); + /* Write as many bytes as possible to FIFO */ +@@ -755,7 +759,8 @@ static int bcm2835_spi_probe(struct plat + bcm2835_wr(bs, BCM2835_SPI_CS, + BCM2835_SPI_CS_CLEAR_RX | BCM2835_SPI_CS_CLEAR_TX); + +- err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, 0, ++ err = devm_request_irq(&pdev->dev, bs->irq, bcm2835_spi_interrupt, ++ IRQF_SHARED, + dev_name(&pdev->dev), master); + if (err) { + dev_err(&pdev->dev, "could not request IRQ: %d\n", err); diff --git a/target/linux/brcm2708/patches-4.19/950-0558-drivers-char-add-chardev-for-mmap-ing-Argon-control-.patch b/target/linux/brcm2708/patches-4.19/950-0558-drivers-char-add-chardev-for-mmap-ing-Argon-control-.patch new file mode 100644 index 000000000..2b3ea3254 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0558-drivers-char-add-chardev-for-mmap-ing-Argon-control-.patch @@ -0,0 +1,320 @@ +From 0a0ebc37b25830162918aa31278b2f7857b8032b Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Thu, 9 May 2019 14:30:37 +0100 +Subject: [PATCH 558/703] drivers: char: add chardev for mmap'ing Argon control + registers + +Based on the gpiomem driver, allow mapping of the decoder register +spaces such that userspace can access control/status registers. +This driver is intended for use with a custom ffmpeg backend accelerator +prior to a v4l2 driver being written. + +Signed-off-by: Jonathan Bell +--- + drivers/char/broadcom/Kconfig | 8 + + drivers/char/broadcom/Makefile | 1 + + drivers/char/broadcom/argon-mem.c | 277 ++++++++++++++++++++++++++++++ + 3 files changed, 286 insertions(+) + create mode 100644 drivers/char/broadcom/argon-mem.c + +--- a/drivers/char/broadcom/Kconfig ++++ b/drivers/char/broadcom/Kconfig +@@ -49,3 +49,11 @@ config BCM2835_SMI_DEV + This driver provides a character device interface (ioctl + read/write) to + Broadcom's Secondary Memory interface. The low-level functionality is provided + by the SMI driver itself. ++ ++config ARGON_MEM ++ tristate "Character device driver for the Argon decoder hardware" ++ default n ++ help ++ This driver provides a character device interface for memory-map operations ++ so userspace tools can access the control and status registers of the Argon ++ video decoder hardware. +--- a/drivers/char/broadcom/Makefile ++++ b/drivers/char/broadcom/Makefile +@@ -4,3 +4,4 @@ obj-$(CONFIG_BCM_VC_SM) += vc_sm + + obj-$(CONFIG_BCM2835_DEVGPIOMEM)+= bcm2835-gpiomem.o + obj-$(CONFIG_BCM2835_SMI_DEV) += bcm2835_smi_dev.o ++obj-$(CONFIG_ARGON_MEM) += argon-mem.o +--- /dev/null ++++ b/drivers/char/broadcom/argon-mem.c +@@ -0,0 +1,277 @@ ++/** ++ * argon-mem.c - character device access to the Argon decoder registers ++ * ++ * Based on bcm2835-gpiomem.c. Provides IO memory access to the decoder ++ * register blocks such that ffmpeg plugins can access the hardware. ++ * ++ * Jonathan Bell ++ * Copyright (c) 2019, Raspberry Pi (Trading) Ltd. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "argon-mem" ++#define DEVICE_MINOR 0 ++ ++struct argon_mem_priv { ++ dev_t devid; ++ struct class *class; ++ struct cdev argon_mem_cdev; ++ unsigned long regs_phys; ++ unsigned long mem_window_len; ++ struct device *dev; ++ const char *name; ++}; ++ ++static int argon_mem_open(struct inode *inode, struct file *file) ++{ ++ int dev = iminor(inode); ++ int ret = 0; ++ struct argon_mem_priv *priv; ++ if (dev != DEVICE_MINOR) ++ ret = -ENXIO; ++ ++ priv = container_of(inode->i_cdev, struct argon_mem_priv, ++ argon_mem_cdev); ++ if (!priv) ++ return -EINVAL; ++ file->private_data = priv; ++ return ret; ++} ++ ++static int argon_mem_release(struct inode *inode, struct file *file) ++{ ++ int dev = iminor(inode); ++ int ret = 0; ++ ++ if (dev != DEVICE_MINOR) ++ ret = -ENXIO; ++ ++ return ret; ++} ++ ++static const struct vm_operations_struct argon_mem_vm_ops = { ++#ifdef CONFIG_HAVE_IOREMAP_PROT ++ .access = generic_access_phys ++#endif ++}; ++ ++static int argon_mem_mmap(struct file *file, struct vm_area_struct *vma) ++{ ++ struct argon_mem_priv *priv; ++ unsigned long pages; ++ ++ priv = file->private_data; ++ pages = priv->regs_phys >> PAGE_SHIFT; ++ /* ++ * The address decode is far larger than the actual number of registers. ++ * Just map the whole lot in. ++ */ ++ vma->vm_page_prot = phys_mem_access_prot(file, pages, ++ priv->mem_window_len, ++ vma->vm_page_prot); ++ vma->vm_ops = &argon_mem_vm_ops; ++ if (remap_pfn_range(vma, vma->vm_start, ++ pages, ++ priv->mem_window_len, ++ vma->vm_page_prot)) { ++ return -EAGAIN; ++ } ++ return 0; ++} ++ ++static const struct file_operations ++argon_mem_fops = { ++ .owner = THIS_MODULE, ++ .open = argon_mem_open, ++ .release = argon_mem_release, ++ .mmap = argon_mem_mmap, ++}; ++ ++static const struct of_device_id argon_mem_of_match[]; ++static int argon_mem_probe(struct platform_device *pdev) ++{ ++ int err; ++ void *ptr_err; ++ const struct of_device_id *id; ++ struct device *dev = &pdev->dev; ++ struct device *argon_mem_dev; ++ struct resource *ioresource; ++ struct argon_mem_priv *priv; ++ ++ ++ /* Allocate buffers and instance data */ ++ ++ priv = kzalloc(sizeof(struct argon_mem_priv), GFP_KERNEL); ++ ++ if (!priv) { ++ err = -ENOMEM; ++ goto failed_inst_alloc; ++ } ++ platform_set_drvdata(pdev, priv); ++ ++ priv->dev = dev; ++ id = of_match_device(argon_mem_of_match, dev); ++ if (!id) ++ return -EINVAL; ++ priv->name = id->data; ++ ++ ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (ioresource) { ++ priv->regs_phys = ioresource->start; ++ priv->mem_window_len = ioresource->end - ioresource->start; ++ } else { ++ dev_err(priv->dev, "failed to get IO resource"); ++ err = -ENOENT; ++ goto failed_get_resource; ++ } ++ ++ /* Create character device entries */ ++ ++ err = alloc_chrdev_region(&priv->devid, ++ DEVICE_MINOR, 1, priv->name); ++ if (err != 0) { ++ dev_err(priv->dev, "unable to allocate device number"); ++ goto failed_alloc_chrdev; ++ } ++ cdev_init(&priv->argon_mem_cdev, &argon_mem_fops); ++ priv->argon_mem_cdev.owner = THIS_MODULE; ++ err = cdev_add(&priv->argon_mem_cdev, priv->devid, 1); ++ if (err != 0) { ++ dev_err(priv->dev, "unable to register device"); ++ goto failed_cdev_add; ++ } ++ ++ /* Create sysfs entries */ ++ ++ priv->class = class_create(THIS_MODULE, priv->name); ++ ptr_err = priv->class; ++ if (IS_ERR(ptr_err)) ++ goto failed_class_create; ++ ++ argon_mem_dev = device_create(priv->class, NULL, ++ priv->devid, NULL, ++ priv->name); ++ ptr_err = argon_mem_dev; ++ if (IS_ERR(ptr_err)) ++ goto failed_device_create; ++ ++ dev_info(priv->dev, "%s initialised: Registers at 0x%08lx length 0x%08lx", ++ priv->name, priv->regs_phys, priv->mem_window_len); ++ ++ return 0; ++ ++failed_device_create: ++ class_destroy(priv->class); ++failed_class_create: ++ cdev_del(&priv->argon_mem_cdev); ++ err = PTR_ERR(ptr_err); ++failed_cdev_add: ++ unregister_chrdev_region(priv->devid, 1); ++failed_alloc_chrdev: ++failed_get_resource: ++ kfree(priv); ++failed_inst_alloc: ++ dev_err(priv->dev, "could not load argon_mem"); ++ return err; ++} ++ ++static int argon_mem_remove(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct argon_mem_priv *priv = platform_get_drvdata(pdev); ++ ++ device_destroy(priv->class, priv->devid); ++ class_destroy(priv->class); ++ cdev_del(&priv->argon_mem_cdev); ++ unregister_chrdev_region(priv->devid, 1); ++ kfree(priv); ++ ++ dev_info(dev, "%s driver removed - OK", priv->name); ++ return 0; ++} ++ ++static const char argon_hevc_name[] = "argon-hevcmem"; ++static const char argon_h264_name[] = "argon-h264mem"; ++static const char argon_vp9_name[] = "argon-vp9mem"; ++static const char argon_intc_name[] = "argon-intcmem"; ++ ++static const struct of_device_id argon_mem_of_match[] = { ++ { ++ .compatible = "raspberrypi,argon-hevc-decoder", ++ .data = &argon_hevc_name, ++ }, ++ { ++ .compatible = "raspberrypi,argon-h264-decoder", ++ .data = &argon_h264_name, ++ }, ++ { ++ .compatible = "raspberrypi,argon-vp9-decoder", ++ .data = &argon_vp9_name, ++ }, ++ /* The "intc" is included as this block of hardware contains the ++ * "frame done" status flags. ++ */ ++ { ++ .compatible = "raspberrypi,argon-local-intc", ++ .data = &argon_intc_name, ++ }, ++ { /* sentinel */ }, ++}; ++ ++MODULE_DEVICE_TABLE(of, argon_mem_of_match); ++ ++static struct platform_driver argon_mem_driver = { ++ .probe = argon_mem_probe, ++ .remove = argon_mem_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = argon_mem_of_match, ++ }, ++}; ++ ++module_platform_driver(argon_mem_driver); ++ ++MODULE_ALIAS("platform:argon-mem"); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Driver for accessing Argon decoder registers from userspace"); ++MODULE_AUTHOR("Jonathan Bell "); diff --git a/target/linux/brcm2708/patches-4.19/950-0559-clk-bcm2835-Don-t-wait-for-pllh-lock.patch b/target/linux/brcm2708/patches-4.19/950-0559-clk-bcm2835-Don-t-wait-for-pllh-lock.patch new file mode 100644 index 000000000..b4c7afd87 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0559-clk-bcm2835-Don-t-wait-for-pllh-lock.patch @@ -0,0 +1,38 @@ +From 258c43d5303a3afe7c416b4fa9875bdbd3470131 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 23 Jan 2019 16:11:50 +0000 +Subject: [PATCH 559/703] clk-bcm2835: Don't wait for pllh lock + +Signed-off-by: Phil Elwell +--- + drivers/clk/bcm/clk-bcm2835.c | 18 ++++++++++-------- + 1 file changed, 10 insertions(+), 8 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -627,15 +627,17 @@ static int bcm2835_pll_on(struct clk_hw + spin_unlock(&cprman->regs_lock); + + /* Wait for the PLL to lock. */ +- timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS); +- while (!(cprman_read(cprman, CM_LOCK) & data->lock_mask)) { +- if (ktime_after(ktime_get(), timeout)) { +- dev_err(cprman->dev, "%s: couldn't lock PLL\n", +- clk_hw_get_name(hw)); +- return -ETIMEDOUT; +- } ++ if (strcmp(data->name, "pllh")) { ++ timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS); ++ while (!(cprman_read(cprman, CM_LOCK) & data->lock_mask)) { ++ if (ktime_after(ktime_get(), timeout)) { ++ dev_err(cprman->dev, "%s: couldn't lock PLL\n", ++ clk_hw_get_name(hw)); ++ return -ETIMEDOUT; ++ } + +- cpu_relax(); ++ cpu_relax(); ++ } + } + + cprman_write(cprman, data->a2w_ctrl_reg, diff --git a/target/linux/brcm2708/patches-4.19/950-0560-bcm2835-pm-Move-bcm2835-watchdog-s-DT-probe-to-an-MF.patch b/target/linux/brcm2708/patches-4.19/950-0560-bcm2835-pm-Move-bcm2835-watchdog-s-DT-probe-to-an-MF.patch new file mode 100644 index 000000000..8953ef8ec --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0560-bcm2835-pm-Move-bcm2835-watchdog-s-DT-probe-to-an-MF.patch @@ -0,0 +1,200 @@ +From 2dbc6987e9ef3130c9a72422f3f06b8edd06d88a Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 12 Dec 2018 15:51:47 -0800 +Subject: [PATCH 560/703] bcm2835-pm: Move bcm2835-watchdog's DT probe to an + MFD. + +The PM block that the wdt driver was binding to actually has multiple +features we want to expose (power domains, reset, watchdog). Move the +DT attachment to a MFD driver and make WDT probe against MFD. + +Signed-off-by: Eric Anholt +Reviewed-by: Guenter Roeck +Acked-by: Stefan Wahren +Signed-off-by: Stefan Wahren +(cherry picked from commit 5e6acc3e678ed3db746ab4fb53a980861cd711b6) +--- + drivers/mfd/Makefile | 1 + + drivers/mfd/bcm2835-pm.c | 64 ++++++++++++++++++++++++++++++++++ + drivers/watchdog/bcm2835_wdt.c | 26 +++++--------- + include/linux/mfd/bcm2835-pm.h | 13 +++++++ + 4 files changed, 87 insertions(+), 17 deletions(-) + create mode 100644 drivers/mfd/bcm2835-pm.c + create mode 100644 include/linux/mfd/bcm2835-pm.h + +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -10,6 +10,7 @@ obj-$(CONFIG_MFD_88PM805) += 88pm805.o 8 + obj-$(CONFIG_MFD_ACT8945A) += act8945a.o + obj-$(CONFIG_MFD_SM501) += sm501.o + obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o ++obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o + obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o + obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o + cros_ec_core-objs := cros_ec.o +--- /dev/null ++++ b/drivers/mfd/bcm2835-pm.c +@@ -0,0 +1,64 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * PM MFD driver for Broadcom BCM2835 ++ * ++ * This driver binds to the PM block and creates the MFD device for ++ * the WDT driver. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static const struct mfd_cell bcm2835_pm_devs[] = { ++ { .name = "bcm2835-wdt" }, ++}; ++ ++static int bcm2835_pm_probe(struct platform_device *pdev) ++{ ++ struct resource *res; ++ struct device *dev = &pdev->dev; ++ struct bcm2835_pm *pm; ++ ++ pm = devm_kzalloc(dev, sizeof(*pm), GFP_KERNEL); ++ if (!pm) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, pm); ++ ++ pm->dev = dev; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ pm->base = devm_ioremap_resource(dev, res); ++ if (IS_ERR(pm->base)) ++ return PTR_ERR(pm->base); ++ ++ return devm_mfd_add_devices(dev, -1, ++ bcm2835_pm_devs, ARRAY_SIZE(bcm2835_pm_devs), ++ NULL, 0, NULL); ++} ++ ++static const struct of_device_id bcm2835_pm_of_match[] = { ++ { .compatible = "brcm,bcm2835-pm-wdt", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, bcm2835_pm_of_match); ++ ++static struct platform_driver bcm2835_pm_driver = { ++ .probe = bcm2835_pm_probe, ++ .driver = { ++ .name = "bcm2835-pm", ++ .of_match_table = bcm2835_pm_of_match, ++ }, ++}; ++module_platform_driver(bcm2835_pm_driver); ++ ++MODULE_AUTHOR("Eric Anholt "); ++MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM MFD"); ++MODULE_LICENSE("GPL"); +--- a/drivers/watchdog/bcm2835_wdt.c ++++ b/drivers/watchdog/bcm2835_wdt.c +@@ -12,6 +12,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -41,6 +42,8 @@ struct bcm2835_wdt { + spinlock_t lock; + }; + ++static struct bcm2835_wdt *bcm2835_power_off_wdt; ++ + static unsigned int heartbeat; + static bool nowayout = WATCHDOG_NOWAYOUT; + +@@ -163,10 +166,7 @@ static struct watchdog_device bcm2835_wd + */ + static void bcm2835_power_off(void) + { +- struct device_node *np = +- of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt"); +- struct platform_device *pdev = of_find_device_by_node(np); +- struct bcm2835_wdt *wdt = platform_get_drvdata(pdev); ++ struct bcm2835_wdt *wdt = bcm2835_power_off_wdt; + + /* Partition 63 tells the firmware that this is a halt */ + __bcm2835_restart(wdt, 63); +@@ -174,7 +174,7 @@ static void bcm2835_power_off(void) + + static int bcm2835_wdt_probe(struct platform_device *pdev) + { +- struct resource *res; ++ struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent); + struct device *dev = &pdev->dev; + struct bcm2835_wdt *wdt; + int err; +@@ -186,10 +186,7 @@ static int bcm2835_wdt_probe(struct plat + + spin_lock_init(&wdt->lock); + +- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- wdt->base = devm_ioremap_resource(dev, res); +- if (IS_ERR(wdt->base)) +- return PTR_ERR(wdt->base); ++ wdt->base = pm->base; + + watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt); + watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev); +@@ -216,8 +213,10 @@ static int bcm2835_wdt_probe(struct plat + return err; + } + +- if (pm_power_off == NULL) ++ if (pm_power_off == NULL) { + pm_power_off = bcm2835_power_off; ++ bcm2835_power_off_wdt = wdt; ++ } + + dev_info(dev, "Broadcom BCM2835 watchdog timer"); + return 0; +@@ -231,18 +230,11 @@ static int bcm2835_wdt_remove(struct pla + return 0; + } + +-static const struct of_device_id bcm2835_wdt_of_match[] = { +- { .compatible = "brcm,bcm2835-pm-wdt", }, +- {}, +-}; +-MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match); +- + static struct platform_driver bcm2835_wdt_driver = { + .probe = bcm2835_wdt_probe, + .remove = bcm2835_wdt_remove, + .driver = { + .name = "bcm2835-wdt", +- .of_match_table = bcm2835_wdt_of_match, + }, + }; + module_platform_driver(bcm2835_wdt_driver); +--- /dev/null ++++ b/include/linux/mfd/bcm2835-pm.h +@@ -0,0 +1,13 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++ ++#ifndef BCM2835_MFD_PM_H ++#define BCM2835_MFD_PM_H ++ ++#include ++ ++struct bcm2835_pm { ++ struct device *dev; ++ void __iomem *base; ++}; ++ ++#endif /* BCM2835_MFD_PM_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0561-soc-bcm-bcm2835-pm-Add-support-for-power-domains-und.patch b/target/linux/brcm2708/patches-4.19/950-0561-soc-bcm-bcm2835-pm-Add-support-for-power-domains-und.patch new file mode 100644 index 000000000..db6a8d0c6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0561-soc-bcm-bcm2835-pm-Add-support-for-power-domains-und.patch @@ -0,0 +1,825 @@ +From c3005e0dbe1f7f6d93833d5a43b12866873a312f Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 12 Dec 2018 15:51:48 -0800 +Subject: [PATCH 561/703] soc: bcm: bcm2835-pm: Add support for power domains + under a new binding. + +This provides a free software alternative to raspberrypi-power.c's +firmware calls to manage power domains. It also exposes a reset line, +where previously the vc4 driver had to try to force power off the +domain in order to trigger a reset. + +Signed-off-by: Eric Anholt +Acked-by: Rob Herring +Acked-by: Stefan Wahren +Signed-off-by: Stefan Wahren +(cherry picked from commit 670c672608a1ffcbc7ac0f872734843593bb8b15) +--- + drivers/mfd/bcm2835-pm.c | 36 +- + drivers/soc/bcm/Kconfig | 11 + + drivers/soc/bcm/Makefile | 1 + + drivers/soc/bcm/bcm2835-power.c | 661 +++++++++++++++++++++++++++ + include/dt-bindings/soc/bcm2835-pm.h | 28 ++ + include/linux/mfd/bcm2835-pm.h | 1 + + 6 files changed, 734 insertions(+), 4 deletions(-) + create mode 100644 drivers/soc/bcm/bcm2835-power.c + create mode 100644 include/dt-bindings/soc/bcm2835-pm.h + +--- a/drivers/mfd/bcm2835-pm.c ++++ b/drivers/mfd/bcm2835-pm.c +@@ -3,7 +3,7 @@ + * PM MFD driver for Broadcom BCM2835 + * + * This driver binds to the PM block and creates the MFD device for +- * the WDT driver. ++ * the WDT and power drivers. + */ + + #include +@@ -21,11 +21,16 @@ static const struct mfd_cell bcm2835_pm_ + { .name = "bcm2835-wdt" }, + }; + ++static const struct mfd_cell bcm2835_power_devs[] = { ++ { .name = "bcm2835-power" }, ++}; ++ + static int bcm2835_pm_probe(struct platform_device *pdev) + { + struct resource *res; + struct device *dev = &pdev->dev; + struct bcm2835_pm *pm; ++ int ret; + + pm = devm_kzalloc(dev, sizeof(*pm), GFP_KERNEL); + if (!pm) +@@ -39,13 +44,36 @@ static int bcm2835_pm_probe(struct platf + if (IS_ERR(pm->base)) + return PTR_ERR(pm->base); + +- return devm_mfd_add_devices(dev, -1, +- bcm2835_pm_devs, ARRAY_SIZE(bcm2835_pm_devs), +- NULL, 0, NULL); ++ ret = devm_mfd_add_devices(dev, -1, ++ bcm2835_pm_devs, ARRAY_SIZE(bcm2835_pm_devs), ++ NULL, 0, NULL); ++ if (ret) ++ return ret; ++ ++ /* We'll use the presence of the AXI ASB regs in the ++ * bcm2835-pm binding as the key for whether we can reference ++ * the full PM register range and support power domains. ++ */ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (res) { ++ pm->asb = devm_ioremap_resource(dev, res); ++ if (IS_ERR(pm->asb)) ++ return PTR_ERR(pm->asb); ++ ++ ret = devm_mfd_add_devices(dev, -1, ++ bcm2835_power_devs, ++ ARRAY_SIZE(bcm2835_power_devs), ++ NULL, 0, NULL); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; + } + + static const struct of_device_id bcm2835_pm_of_match[] = { + { .compatible = "brcm,bcm2835-pm-wdt", }, ++ { .compatible = "brcm,bcm2835-pm", }, + {}, + }; + MODULE_DEVICE_TABLE(of, bcm2835_pm_of_match); +--- a/drivers/soc/bcm/Kconfig ++++ b/drivers/soc/bcm/Kconfig +@@ -1,5 +1,16 @@ + menu "Broadcom SoC drivers" + ++config BCM2835_POWER ++ bool "BCM2835 power domain driver" ++ depends on ARCH_BCM2835 || (COMPILE_TEST && OF) ++ select PM_GENERIC_DOMAINS if PM ++ select RESET_CONTROLLER ++ help ++ This enables support for the BCM2835 power domains and reset ++ controller. Any usage of power domains by the Raspberry Pi ++ firmware means that Linux usage of the same power domain ++ must be accessed using the RASPBERRYPI_POWER driver ++ + config RASPBERRYPI_POWER + bool "Raspberry Pi power domain driver" + depends on ARCH_BCM2835 || (COMPILE_TEST && OF) +--- a/drivers/soc/bcm/Makefile ++++ b/drivers/soc/bcm/Makefile +@@ -1,2 +1,3 @@ ++obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o + obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o + obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/ +--- /dev/null ++++ b/drivers/soc/bcm/bcm2835-power.c +@@ -0,0 +1,661 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Power domain driver for Broadcom BCM2835 ++ * ++ * Copyright (C) 2018 Broadcom ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PM_GNRIC 0x00 ++#define PM_AUDIO 0x04 ++#define PM_STATUS 0x18 ++#define PM_RSTC 0x1c ++#define PM_RSTS 0x20 ++#define PM_WDOG 0x24 ++#define PM_PADS0 0x28 ++#define PM_PADS2 0x2c ++#define PM_PADS3 0x30 ++#define PM_PADS4 0x34 ++#define PM_PADS5 0x38 ++#define PM_PADS6 0x3c ++#define PM_CAM0 0x44 ++#define PM_CAM0_LDOHPEN BIT(2) ++#define PM_CAM0_LDOLPEN BIT(1) ++#define PM_CAM0_CTRLEN BIT(0) ++ ++#define PM_CAM1 0x48 ++#define PM_CAM1_LDOHPEN BIT(2) ++#define PM_CAM1_LDOLPEN BIT(1) ++#define PM_CAM1_CTRLEN BIT(0) ++ ++#define PM_CCP2TX 0x4c ++#define PM_CCP2TX_LDOEN BIT(1) ++#define PM_CCP2TX_CTRLEN BIT(0) ++ ++#define PM_DSI0 0x50 ++#define PM_DSI0_LDOHPEN BIT(2) ++#define PM_DSI0_LDOLPEN BIT(1) ++#define PM_DSI0_CTRLEN BIT(0) ++ ++#define PM_DSI1 0x54 ++#define PM_DSI1_LDOHPEN BIT(2) ++#define PM_DSI1_LDOLPEN BIT(1) ++#define PM_DSI1_CTRLEN BIT(0) ++ ++#define PM_HDMI 0x58 ++#define PM_HDMI_RSTDR BIT(19) ++#define PM_HDMI_LDOPD BIT(1) ++#define PM_HDMI_CTRLEN BIT(0) ++ ++#define PM_USB 0x5c ++/* The power gates must be enabled with this bit before enabling the LDO in the ++ * USB block. ++ */ ++#define PM_USB_CTRLEN BIT(0) ++ ++#define PM_PXLDO 0x60 ++#define PM_PXBG 0x64 ++#define PM_DFT 0x68 ++#define PM_SMPS 0x6c ++#define PM_XOSC 0x70 ++#define PM_SPAREW 0x74 ++#define PM_SPARER 0x78 ++#define PM_AVS_RSTDR 0x7c ++#define PM_AVS_STAT 0x80 ++#define PM_AVS_EVENT 0x84 ++#define PM_AVS_INTEN 0x88 ++#define PM_DUMMY 0xfc ++ ++#define PM_IMAGE 0x108 ++#define PM_GRAFX 0x10c ++#define PM_PROC 0x110 ++#define PM_ENAB BIT(12) ++#define PM_ISPRSTN BIT(8) ++#define PM_H264RSTN BIT(7) ++#define PM_PERIRSTN BIT(6) ++#define PM_V3DRSTN BIT(6) ++#define PM_ISFUNC BIT(5) ++#define PM_MRDONE BIT(4) ++#define PM_MEMREP BIT(3) ++#define PM_ISPOW BIT(2) ++#define PM_POWOK BIT(1) ++#define PM_POWUP BIT(0) ++#define PM_INRUSH_SHIFT 13 ++#define PM_INRUSH_3_5_MA 0 ++#define PM_INRUSH_5_MA 1 ++#define PM_INRUSH_10_MA 2 ++#define PM_INRUSH_20_MA 3 ++#define PM_INRUSH_MASK (3 << PM_INRUSH_SHIFT) ++ ++#define PM_PASSWORD 0x5a000000 ++ ++#define PM_WDOG_TIME_SET 0x000fffff ++#define PM_RSTC_WRCFG_CLR 0xffffffcf ++#define PM_RSTS_HADWRH_SET 0x00000040 ++#define PM_RSTC_WRCFG_SET 0x00000030 ++#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 ++#define PM_RSTC_RESET 0x00000102 ++ ++#define PM_READ(reg) readl(power->base + (reg)) ++#define PM_WRITE(reg, val) writel(PM_PASSWORD | (val), power->base + (reg)) ++ ++#define ASB_BRDG_VERSION 0x00 ++#define ASB_CPR_CTRL 0x04 ++ ++#define ASB_V3D_S_CTRL 0x08 ++#define ASB_V3D_M_CTRL 0x0c ++#define ASB_ISP_S_CTRL 0x10 ++#define ASB_ISP_M_CTRL 0x14 ++#define ASB_H264_S_CTRL 0x18 ++#define ASB_H264_M_CTRL 0x1c ++ ++#define ASB_REQ_STOP BIT(0) ++#define ASB_ACK BIT(1) ++#define ASB_EMPTY BIT(2) ++#define ASB_FULL BIT(3) ++ ++#define ASB_AXI_BRDG_ID 0x20 ++ ++#define ASB_READ(reg) readl(power->asb + (reg)) ++#define ASB_WRITE(reg, val) writel(PM_PASSWORD | (val), power->asb + (reg)) ++ ++struct bcm2835_power_domain { ++ struct generic_pm_domain base; ++ struct bcm2835_power *power; ++ u32 domain; ++ struct clk *clk; ++}; ++ ++struct bcm2835_power { ++ struct device *dev; ++ /* PM registers. */ ++ void __iomem *base; ++ /* AXI Async bridge registers. */ ++ void __iomem *asb; ++ ++ struct genpd_onecell_data pd_xlate; ++ struct bcm2835_power_domain domains[BCM2835_POWER_DOMAIN_COUNT]; ++ struct reset_controller_dev reset; ++}; ++ ++static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) ++{ ++ u64 start = ktime_get_ns(); ++ ++ /* Enable the module's async AXI bridges. */ ++ ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP); ++ while (ASB_READ(reg) & ASB_ACK) { ++ cpu_relax(); ++ if (ktime_get_ns() - start >= 1000) ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg) ++{ ++ u64 start = ktime_get_ns(); ++ ++ /* Enable the module's async AXI bridges. */ ++ ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP); ++ while (!(ASB_READ(reg) & ASB_ACK)) { ++ cpu_relax(); ++ if (ktime_get_ns() - start >= 1000) ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static int bcm2835_power_power_off(struct bcm2835_power_domain *pd, u32 pm_reg) ++{ ++ struct bcm2835_power *power = pd->power; ++ ++ /* Enable functional isolation */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISFUNC); ++ ++ /* Enable electrical isolation */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW); ++ ++ /* Open the power switches. */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_POWUP); ++ ++ return 0; ++} ++ ++static int bcm2835_power_power_on(struct bcm2835_power_domain *pd, u32 pm_reg) ++{ ++ struct bcm2835_power *power = pd->power; ++ struct device *dev = power->dev; ++ u64 start; ++ int ret; ++ int inrush; ++ bool powok; ++ ++ /* If it was already powered on by the fw, leave it that way. */ ++ if (PM_READ(pm_reg) & PM_POWUP) ++ return 0; ++ ++ /* Enable power. Allowing too much current at once may result ++ * in POWOK never getting set, so start low and ramp it up as ++ * necessary to succeed. ++ */ ++ powok = false; ++ for (inrush = PM_INRUSH_3_5_MA; inrush <= PM_INRUSH_20_MA; inrush++) { ++ PM_WRITE(pm_reg, ++ (PM_READ(pm_reg) & ~PM_INRUSH_MASK) | ++ (inrush << PM_INRUSH_SHIFT) | ++ PM_POWUP); ++ ++ start = ktime_get_ns(); ++ while (!(powok = !!(PM_READ(pm_reg) & PM_POWOK))) { ++ cpu_relax(); ++ if (ktime_get_ns() - start >= 3000) ++ break; ++ } ++ } ++ if (!powok) { ++ dev_err(dev, "Timeout waiting for %s power OK\n", ++ pd->base.name); ++ ret = -ETIMEDOUT; ++ goto err_disable_powup; ++ } ++ ++ /* Disable electrical isolation */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISPOW); ++ ++ /* Repair memory */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_MEMREP); ++ start = ktime_get_ns(); ++ while (!(PM_READ(pm_reg) & PM_MRDONE)) { ++ cpu_relax(); ++ if (ktime_get_ns() - start >= 1000) { ++ dev_err(dev, "Timeout waiting for %s memory repair\n", ++ pd->base.name); ++ ret = -ETIMEDOUT; ++ goto err_disable_ispow; ++ } ++ } ++ ++ /* Disable functional isolation */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) | PM_ISFUNC); ++ ++ return 0; ++ ++err_disable_ispow: ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISPOW); ++err_disable_powup: ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~(PM_POWUP | PM_INRUSH_MASK)); ++ return ret; ++} ++ ++static int bcm2835_asb_power_on(struct bcm2835_power_domain *pd, ++ u32 pm_reg, ++ u32 asb_m_reg, ++ u32 asb_s_reg, ++ u32 reset_flags) ++{ ++ struct bcm2835_power *power = pd->power; ++ int ret; ++ ++ ret = clk_prepare_enable(pd->clk); ++ if (ret) { ++ dev_err(power->dev, "Failed to enable clock for %s\n", ++ pd->base.name); ++ return ret; ++ } ++ ++ /* Wait 32 clocks for reset to propagate, 1 us will be enough */ ++ udelay(1); ++ ++ clk_disable_unprepare(pd->clk); ++ ++ /* Deassert the resets. */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) | reset_flags); ++ ++ ret = clk_prepare_enable(pd->clk); ++ if (ret) { ++ dev_err(power->dev, "Failed to enable clock for %s\n", ++ pd->base.name); ++ goto err_enable_resets; ++ } ++ ++ ret = bcm2835_asb_enable(power, asb_m_reg); ++ if (ret) { ++ dev_err(power->dev, "Failed to enable ASB master for %s\n", ++ pd->base.name); ++ goto err_disable_clk; ++ } ++ ret = bcm2835_asb_enable(power, asb_s_reg); ++ if (ret) { ++ dev_err(power->dev, "Failed to enable ASB slave for %s\n", ++ pd->base.name); ++ goto err_disable_asb_master; ++ } ++ ++ return 0; ++ ++err_disable_asb_master: ++ bcm2835_asb_disable(power, asb_m_reg); ++err_disable_clk: ++ clk_disable_unprepare(pd->clk); ++err_enable_resets: ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags); ++ return ret; ++} ++ ++static int bcm2835_asb_power_off(struct bcm2835_power_domain *pd, ++ u32 pm_reg, ++ u32 asb_m_reg, ++ u32 asb_s_reg, ++ u32 reset_flags) ++{ ++ struct bcm2835_power *power = pd->power; ++ int ret; ++ ++ ret = bcm2835_asb_disable(power, asb_s_reg); ++ if (ret) { ++ dev_warn(power->dev, "Failed to disable ASB slave for %s\n", ++ pd->base.name); ++ return ret; ++ } ++ ret = bcm2835_asb_disable(power, asb_m_reg); ++ if (ret) { ++ dev_warn(power->dev, "Failed to disable ASB master for %s\n", ++ pd->base.name); ++ bcm2835_asb_enable(power, asb_s_reg); ++ return ret; ++ } ++ ++ clk_disable_unprepare(pd->clk); ++ ++ /* Assert the resets. */ ++ PM_WRITE(pm_reg, PM_READ(pm_reg) & ~reset_flags); ++ ++ return 0; ++} ++ ++static int bcm2835_power_pd_power_on(struct generic_pm_domain *domain) ++{ ++ struct bcm2835_power_domain *pd = ++ container_of(domain, struct bcm2835_power_domain, base); ++ struct bcm2835_power *power = pd->power; ++ ++ switch (pd->domain) { ++ case BCM2835_POWER_DOMAIN_GRAFX: ++ return bcm2835_power_power_on(pd, PM_GRAFX); ++ ++ case BCM2835_POWER_DOMAIN_GRAFX_V3D: ++ return bcm2835_asb_power_on(pd, PM_GRAFX, ++ ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, ++ PM_V3DRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE: ++ return bcm2835_power_power_on(pd, PM_IMAGE); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_PERI: ++ return bcm2835_asb_power_on(pd, PM_IMAGE, ++ 0, 0, ++ PM_PERIRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_ISP: ++ return bcm2835_asb_power_on(pd, PM_IMAGE, ++ ASB_ISP_M_CTRL, ASB_ISP_S_CTRL, ++ PM_ISPRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_H264: ++ return bcm2835_asb_power_on(pd, PM_IMAGE, ++ ASB_H264_M_CTRL, ASB_H264_S_CTRL, ++ PM_H264RSTN); ++ ++ case BCM2835_POWER_DOMAIN_USB: ++ PM_WRITE(PM_USB, PM_USB_CTRLEN); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_DSI0: ++ PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN); ++ PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN | PM_DSI0_LDOHPEN); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_DSI1: ++ PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN); ++ PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN | PM_DSI1_LDOHPEN); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_CCP2TX: ++ PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN); ++ PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN | PM_CCP2TX_LDOEN); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_HDMI: ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_RSTDR); ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_CTRLEN); ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_LDOPD); ++ usleep_range(100, 200); ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_RSTDR); ++ return 0; ++ ++ default: ++ dev_err(power->dev, "Invalid domain %d\n", pd->domain); ++ return -EINVAL; ++ } ++} ++ ++static int bcm2835_power_pd_power_off(struct generic_pm_domain *domain) ++{ ++ struct bcm2835_power_domain *pd = ++ container_of(domain, struct bcm2835_power_domain, base); ++ struct bcm2835_power *power = pd->power; ++ ++ switch (pd->domain) { ++ case BCM2835_POWER_DOMAIN_GRAFX: ++ return bcm2835_power_power_off(pd, PM_GRAFX); ++ ++ case BCM2835_POWER_DOMAIN_GRAFX_V3D: ++ return bcm2835_asb_power_off(pd, PM_GRAFX, ++ ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, ++ PM_V3DRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE: ++ return bcm2835_power_power_off(pd, PM_IMAGE); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_PERI: ++ return bcm2835_asb_power_off(pd, PM_IMAGE, ++ 0, 0, ++ PM_PERIRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_ISP: ++ return bcm2835_asb_power_off(pd, PM_IMAGE, ++ ASB_ISP_M_CTRL, ASB_ISP_S_CTRL, ++ PM_ISPRSTN); ++ ++ case BCM2835_POWER_DOMAIN_IMAGE_H264: ++ return bcm2835_asb_power_off(pd, PM_IMAGE, ++ ASB_H264_M_CTRL, ASB_H264_S_CTRL, ++ PM_H264RSTN); ++ ++ case BCM2835_POWER_DOMAIN_USB: ++ PM_WRITE(PM_USB, 0); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_DSI0: ++ PM_WRITE(PM_DSI0, PM_DSI0_CTRLEN); ++ PM_WRITE(PM_DSI0, 0); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_DSI1: ++ PM_WRITE(PM_DSI1, PM_DSI1_CTRLEN); ++ PM_WRITE(PM_DSI1, 0); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_CCP2TX: ++ PM_WRITE(PM_CCP2TX, PM_CCP2TX_CTRLEN); ++ PM_WRITE(PM_CCP2TX, 0); ++ return 0; ++ ++ case BCM2835_POWER_DOMAIN_HDMI: ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) | PM_HDMI_LDOPD); ++ PM_WRITE(PM_HDMI, PM_READ(PM_HDMI) & ~PM_HDMI_CTRLEN); ++ return 0; ++ ++ default: ++ dev_err(power->dev, "Invalid domain %d\n", pd->domain); ++ return -EINVAL; ++ } ++} ++ ++static void ++bcm2835_init_power_domain(struct bcm2835_power *power, ++ int pd_xlate_index, const char *name) ++{ ++ struct device *dev = power->dev; ++ struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index]; ++ ++ dom->clk = devm_clk_get(dev->parent, name); ++ ++ dom->base.name = name; ++ dom->base.power_on = bcm2835_power_pd_power_on; ++ dom->base.power_off = bcm2835_power_pd_power_off; ++ ++ dom->domain = pd_xlate_index; ++ dom->power = power; ++ ++ /* XXX: on/off at boot? */ ++ pm_genpd_init(&dom->base, NULL, true); ++ ++ power->pd_xlate.domains[pd_xlate_index] = &dom->base; ++} ++ ++/** bcm2835_reset_reset - Resets a block that has a reset line in the ++ * PM block. ++ * ++ * The consumer of the reset controller must have the power domain up ++ * -- there's no reset ability with the power domain down. To reset ++ * the sub-block, we just disable its access to memory through the ++ * ASB, reset, and re-enable. ++ */ ++static int bcm2835_reset_reset(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power, ++ reset); ++ struct bcm2835_power_domain *pd; ++ int ret; ++ ++ switch (id) { ++ case BCM2835_RESET_V3D: ++ pd = &power->domains[BCM2835_POWER_DOMAIN_GRAFX_V3D]; ++ break; ++ case BCM2835_RESET_H264: ++ pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_H264]; ++ break; ++ case BCM2835_RESET_ISP: ++ pd = &power->domains[BCM2835_POWER_DOMAIN_IMAGE_ISP]; ++ break; ++ default: ++ dev_err(power->dev, "Bad reset id %ld\n", id); ++ return -EINVAL; ++ } ++ ++ ret = bcm2835_power_pd_power_off(&pd->base); ++ if (ret) ++ return ret; ++ ++ return bcm2835_power_pd_power_on(&pd->base); ++} ++ ++static int bcm2835_reset_status(struct reset_controller_dev *rcdev, ++ unsigned long id) ++{ ++ struct bcm2835_power *power = container_of(rcdev, struct bcm2835_power, ++ reset); ++ ++ switch (id) { ++ case BCM2835_RESET_V3D: ++ return !PM_READ(PM_GRAFX & PM_V3DRSTN); ++ case BCM2835_RESET_H264: ++ return !PM_READ(PM_IMAGE & PM_H264RSTN); ++ case BCM2835_RESET_ISP: ++ return !PM_READ(PM_IMAGE & PM_ISPRSTN); ++ default: ++ return -EINVAL; ++ } ++} ++ ++const struct reset_control_ops bcm2835_reset_ops = { ++ .reset = bcm2835_reset_reset, ++ .status = bcm2835_reset_status, ++}; ++ ++static const char *const power_domain_names[] = { ++ [BCM2835_POWER_DOMAIN_GRAFX] = "grafx", ++ [BCM2835_POWER_DOMAIN_GRAFX_V3D] = "v3d", ++ ++ [BCM2835_POWER_DOMAIN_IMAGE] = "image", ++ [BCM2835_POWER_DOMAIN_IMAGE_PERI] = "peri_image", ++ [BCM2835_POWER_DOMAIN_IMAGE_H264] = "h264", ++ [BCM2835_POWER_DOMAIN_IMAGE_ISP] = "isp", ++ ++ [BCM2835_POWER_DOMAIN_USB] = "usb", ++ [BCM2835_POWER_DOMAIN_DSI0] = "dsi0", ++ [BCM2835_POWER_DOMAIN_DSI1] = "dsi1", ++ [BCM2835_POWER_DOMAIN_CAM0] = "cam0", ++ [BCM2835_POWER_DOMAIN_CAM1] = "cam1", ++ [BCM2835_POWER_DOMAIN_CCP2TX] = "ccp2tx", ++ [BCM2835_POWER_DOMAIN_HDMI] = "hdmi", ++}; ++ ++static int bcm2835_power_probe(struct platform_device *pdev) ++{ ++ struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent); ++ struct device *dev = &pdev->dev; ++ struct bcm2835_power *power; ++ static const struct { ++ int parent, child; ++ } domain_deps[] = { ++ { BCM2835_POWER_DOMAIN_GRAFX, BCM2835_POWER_DOMAIN_GRAFX_V3D }, ++ { BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_PERI }, ++ { BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_H264 }, ++ { BCM2835_POWER_DOMAIN_IMAGE, BCM2835_POWER_DOMAIN_IMAGE_ISP }, ++ { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_USB }, ++ { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 }, ++ { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 }, ++ }; ++ int ret, i; ++ u32 id; ++ ++ power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); ++ if (!power) ++ return -ENOMEM; ++ platform_set_drvdata(pdev, power); ++ ++ power->dev = dev; ++ power->base = pm->base; ++ power->asb = pm->asb; ++ ++ id = ASB_READ(ASB_AXI_BRDG_ID); ++ if (id != 0x62726467 /* "BRDG" */) { ++ dev_err(dev, "ASB register ID returned 0x%08x\n", id); ++ return -ENODEV; ++ } ++ ++ power->pd_xlate.domains = devm_kcalloc(dev, ++ ARRAY_SIZE(power_domain_names), ++ sizeof(*power->pd_xlate.domains), ++ GFP_KERNEL); ++ if (!power->pd_xlate.domains) ++ return -ENOMEM; ++ ++ power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names); ++ ++ for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) ++ bcm2835_init_power_domain(power, i, power_domain_names[i]); ++ ++ for (i = 0; i < ARRAY_SIZE(domain_deps); i++) { ++ pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base, ++ &power->domains[domain_deps[i].child].base); ++ } ++ ++ power->reset.owner = THIS_MODULE; ++ power->reset.nr_resets = BCM2835_RESET_COUNT; ++ power->reset.ops = &bcm2835_reset_ops; ++ power->reset.of_node = dev->parent->of_node; ++ ++ ret = devm_reset_controller_register(dev, &power->reset); ++ if (ret) ++ return ret; ++ ++ of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate); ++ ++ dev_info(dev, "Broadcom BCM2835 power domains driver"); ++ return 0; ++} ++ ++static int bcm2835_power_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++static struct platform_driver bcm2835_power_driver = { ++ .probe = bcm2835_power_probe, ++ .remove = bcm2835_power_remove, ++ .driver = { ++ .name = "bcm2835-power", ++ }, ++}; ++module_platform_driver(bcm2835_power_driver); ++ ++MODULE_AUTHOR("Eric Anholt "); ++MODULE_DESCRIPTION("Driver for Broadcom BCM2835 PM power domains and reset"); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/include/dt-bindings/soc/bcm2835-pm.h +@@ -0,0 +1,28 @@ ++/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ ++ ++#ifndef _DT_BINDINGS_ARM_BCM2835_PM_H ++#define _DT_BINDINGS_ARM_BCM2835_PM_H ++ ++#define BCM2835_POWER_DOMAIN_GRAFX 0 ++#define BCM2835_POWER_DOMAIN_GRAFX_V3D 1 ++#define BCM2835_POWER_DOMAIN_IMAGE 2 ++#define BCM2835_POWER_DOMAIN_IMAGE_PERI 3 ++#define BCM2835_POWER_DOMAIN_IMAGE_ISP 4 ++#define BCM2835_POWER_DOMAIN_IMAGE_H264 5 ++#define BCM2835_POWER_DOMAIN_USB 6 ++#define BCM2835_POWER_DOMAIN_DSI0 7 ++#define BCM2835_POWER_DOMAIN_DSI1 8 ++#define BCM2835_POWER_DOMAIN_CAM0 9 ++#define BCM2835_POWER_DOMAIN_CAM1 10 ++#define BCM2835_POWER_DOMAIN_CCP2TX 11 ++#define BCM2835_POWER_DOMAIN_HDMI 12 ++ ++#define BCM2835_POWER_DOMAIN_COUNT 13 ++ ++#define BCM2835_RESET_V3D 0 ++#define BCM2835_RESET_ISP 1 ++#define BCM2835_RESET_H264 2 ++ ++#define BCM2835_RESET_COUNT 3 ++ ++#endif /* _DT_BINDINGS_ARM_BCM2835_PM_H */ +--- a/include/linux/mfd/bcm2835-pm.h ++++ b/include/linux/mfd/bcm2835-pm.h +@@ -8,6 +8,7 @@ + struct bcm2835_pm { + struct device *dev; + void __iomem *base; ++ void __iomem *asb; + }; + + #endif /* BCM2835_MFD_PM_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0562-soc-bcm-bcm2835-pm-Fix-PM_IMAGE_PERI-power-domain-su.patch b/target/linux/brcm2708/patches-4.19/950-0562-soc-bcm-bcm2835-pm-Fix-PM_IMAGE_PERI-power-domain-su.patch new file mode 100644 index 000000000..6399db88e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0562-soc-bcm-bcm2835-pm-Fix-PM_IMAGE_PERI-power-domain-su.patch @@ -0,0 +1,45 @@ +From 81f47bb7d51490b62ba2fad6c0be42bf0e4e13a2 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 11 Jan 2019 17:29:10 -0800 +Subject: [PATCH 562/703] soc: bcm: bcm2835-pm: Fix PM_IMAGE_PERI power domain + support. + +We don't have ASB master/slave regs for this domain, so just skip that +step. + +Signed-off-by: Eric Anholt +Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.") +--- + drivers/soc/bcm/bcm2835-power.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/drivers/soc/bcm/bcm2835-power.c ++++ b/drivers/soc/bcm/bcm2835-power.c +@@ -150,7 +150,12 @@ struct bcm2835_power { + + static int bcm2835_asb_enable(struct bcm2835_power *power, u32 reg) + { +- u64 start = ktime_get_ns(); ++ u64 start; ++ ++ if (!reg) ++ return 0; ++ ++ start = ktime_get_ns(); + + /* Enable the module's async AXI bridges. */ + ASB_WRITE(reg, ASB_READ(reg) & ~ASB_REQ_STOP); +@@ -165,7 +170,12 @@ static int bcm2835_asb_enable(struct bcm + + static int bcm2835_asb_disable(struct bcm2835_power *power, u32 reg) + { +- u64 start = ktime_get_ns(); ++ u64 start; ++ ++ if (!reg) ++ return 0; ++ ++ start = ktime_get_ns(); + + /* Enable the module's async AXI bridges. */ + ASB_WRITE(reg, ASB_READ(reg) | ASB_REQ_STOP); diff --git a/target/linux/brcm2708/patches-4.19/950-0563-soc-bcm-bcm2835-pm-Fix-error-paths-of-initialization.patch b/target/linux/brcm2708/patches-4.19/950-0563-soc-bcm-bcm2835-pm-Fix-error-paths-of-initialization.patch new file mode 100644 index 000000000..3dec4e59b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0563-soc-bcm-bcm2835-pm-Fix-error-paths-of-initialization.patch @@ -0,0 +1,103 @@ +From 03ca911deca660a85ff285b53b1431350c77b246 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Sat, 12 Jan 2019 08:07:43 -0800 +Subject: [PATCH 563/703] soc: bcm: bcm2835-pm: Fix error paths of + initialization. + +The clock driver may probe after ours and so we need to pass the +-EPROBE_DEFER out. Fix the other error path while we're here. + +v2: Use dom->name instead of dom->gov as the flag for initialized + domains, since we aren't setting up a governor. Make sure to + clear ->clk when no clk is present in the DT. + +Signed-off-by: Eric Anholt +Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under a new binding.") +--- + drivers/soc/bcm/bcm2835-power.c | 35 ++++++++++++++++++++++++++++----- + 1 file changed, 30 insertions(+), 5 deletions(-) + +--- a/drivers/soc/bcm/bcm2835-power.c ++++ b/drivers/soc/bcm/bcm2835-power.c +@@ -485,7 +485,7 @@ static int bcm2835_power_pd_power_off(st + } + } + +-static void ++static int + bcm2835_init_power_domain(struct bcm2835_power *power, + int pd_xlate_index, const char *name) + { +@@ -493,6 +493,17 @@ bcm2835_init_power_domain(struct bcm2835 + struct bcm2835_power_domain *dom = &power->domains[pd_xlate_index]; + + dom->clk = devm_clk_get(dev->parent, name); ++ if (IS_ERR(dom->clk)) { ++ int ret = PTR_ERR(dom->clk); ++ ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ ++ /* Some domains don't have a clk, so make sure that we ++ * don't deref an error pointer later. ++ */ ++ dom->clk = NULL; ++ } + + dom->base.name = name; + dom->base.power_on = bcm2835_power_pd_power_on; +@@ -505,6 +516,8 @@ bcm2835_init_power_domain(struct bcm2835 + pm_genpd_init(&dom->base, NULL, true); + + power->pd_xlate.domains[pd_xlate_index] = &dom->base; ++ ++ return 0; + } + + /** bcm2835_reset_reset - Resets a block that has a reset line in the +@@ -602,7 +615,7 @@ static int bcm2835_power_probe(struct pl + { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM0 }, + { BCM2835_POWER_DOMAIN_IMAGE_PERI, BCM2835_POWER_DOMAIN_CAM1 }, + }; +- int ret, i; ++ int ret = 0, i; + u32 id; + + power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); +@@ -629,8 +642,11 @@ static int bcm2835_power_probe(struct pl + + power->pd_xlate.num_domains = ARRAY_SIZE(power_domain_names); + +- for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) +- bcm2835_init_power_domain(power, i, power_domain_names[i]); ++ for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { ++ ret = bcm2835_init_power_domain(power, i, power_domain_names[i]); ++ if (ret) ++ goto fail; ++ } + + for (i = 0; i < ARRAY_SIZE(domain_deps); i++) { + pm_genpd_add_subdomain(&power->domains[domain_deps[i].parent].base, +@@ -644,12 +660,21 @@ static int bcm2835_power_probe(struct pl + + ret = devm_reset_controller_register(dev, &power->reset); + if (ret) +- return ret; ++ goto fail; + + of_genpd_add_provider_onecell(dev->parent->of_node, &power->pd_xlate); + + dev_info(dev, "Broadcom BCM2835 power domains driver"); + return 0; ++ ++fail: ++ for (i = 0; i < ARRAY_SIZE(power_domain_names); i++) { ++ struct generic_pm_domain *dom = &power->domains[i].base; ++ ++ if (dom->name) ++ pm_genpd_remove(dom); ++ } ++ return ret; + } + + static int bcm2835_power_remove(struct platform_device *pdev) diff --git a/target/linux/brcm2708/patches-4.19/950-0564-soc-bcm-bcm2835-pm-Add-support-for-2711.patch b/target/linux/brcm2708/patches-4.19/950-0564-soc-bcm-bcm2835-pm-Add-support-for-2711.patch new file mode 100644 index 000000000..41fc29838 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0564-soc-bcm-bcm2835-pm-Add-support-for-2711.patch @@ -0,0 +1,102 @@ +From 4c3762f3ef917c00708650cdd532dd857ca75f04 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 11 Jan 2019 17:31:07 -0800 +Subject: [PATCH 564/703] soc: bcm: bcm2835-pm: Add support for 2711. + +Without the actual power management part any more, there's a lot less +to set up for V3D. We just need to clear the RSTN field for the power +domain, and expose the reset controller for toggling it again. + +This is definitely incomplete -- the old ISP and H264 is in the old +bridge, but since we have no consumers of it I've just done the +minimum to get V3D working. + +Signed-off-by: Eric Anholt +--- + drivers/mfd/bcm2835-pm.c | 11 +++++++++++ + drivers/soc/bcm/bcm2835-power.c | 22 ++++++++++++++++++++++ + include/linux/mfd/bcm2835-pm.h | 1 + + 3 files changed, 34 insertions(+) + +--- a/drivers/mfd/bcm2835-pm.c ++++ b/drivers/mfd/bcm2835-pm.c +@@ -50,6 +50,17 @@ static int bcm2835_pm_probe(struct platf + if (ret) + return ret; + ++ /* Map the ARGON ASB regs if present. */ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 2); ++ if (res) { ++ pm->arg_asb = devm_ioremap_resource(dev, res); ++ if (IS_ERR(pm->arg_asb)) { ++ dev_err(dev, "Failed to map ARGON ASB: %ld\n", ++ PTR_ERR(pm->arg_asb)); ++ return PTR_ERR(pm->arg_asb); ++ } ++ } ++ + /* We'll use the presence of the AXI ASB regs in the + * bcm2835-pm binding as the key for whether we can reference + * the full PM register range and support power domains. +--- a/drivers/soc/bcm/bcm2835-power.c ++++ b/drivers/soc/bcm/bcm2835-power.c +@@ -143,6 +143,8 @@ struct bcm2835_power { + /* AXI Async bridge registers. */ + void __iomem *asb; + ++ bool is_2711; ++ + struct genpd_onecell_data pd_xlate; + struct bcm2835_power_domain domains[BCM2835_POWER_DOMAIN_COUNT]; + struct reset_controller_dev reset; +@@ -192,6 +194,10 @@ static int bcm2835_power_power_off(struc + { + struct bcm2835_power *power = pd->power; + ++ /* 2711 has no power domains above the reset controller. */ ++ if (power->is_2711) ++ return 0; ++ + /* Enable functional isolation */ + PM_WRITE(pm_reg, PM_READ(pm_reg) & ~PM_ISFUNC); + +@@ -213,6 +219,10 @@ static int bcm2835_power_power_on(struct + int inrush; + bool powok; + ++ /* 2711 has no power domains above the reset controller. */ ++ if (power->is_2711) ++ return 0; ++ + /* If it was already powered on by the fw, leave it that way. */ + if (PM_READ(pm_reg) & PM_POWUP) + return 0; +@@ -627,6 +637,18 @@ static int bcm2835_power_probe(struct pl + power->base = pm->base; + power->asb = pm->asb; + ++ /* 2711 hack: the new ARGON ASB took over V3D, which is our ++ * only consumer of this driver so far. The old ASB seems to ++ * still be present with ISP and H264 bits but no V3D, but I ++ * don't know if that's real or not. The V3D is in the same ++ * place in the new ASB as the old one, so just poke the new ++ * one for now. ++ */ ++ if (pm->arg_asb) { ++ power->asb = pm->arg_asb; ++ power->is_2711 = true; ++ } ++ + id = ASB_READ(ASB_AXI_BRDG_ID); + if (id != 0x62726467 /* "BRDG" */) { + dev_err(dev, "ASB register ID returned 0x%08x\n", id); +--- a/include/linux/mfd/bcm2835-pm.h ++++ b/include/linux/mfd/bcm2835-pm.h +@@ -9,6 +9,7 @@ struct bcm2835_pm { + struct device *dev; + void __iomem *base; + void __iomem *asb; ++ void __iomem *arg_asb; + }; + + #endif /* BCM2835_MFD_PM_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0565-drm-expand-drm_syncobj_find_fence-to-support-timelin.patch b/target/linux/brcm2708/patches-4.19/950-0565-drm-expand-drm_syncobj_find_fence-to-support-timelin.patch new file mode 100644 index 000000000..d4358efd3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0565-drm-expand-drm_syncobj_find_fence-to-support-timelin.patch @@ -0,0 +1,104 @@ +From 2593714309aa6f7fb3b06ffac7ca195a50543252 Mon Sep 17 00:00:00 2001 +From: Chunming Zhou +Date: Thu, 30 Aug 2018 14:48:29 +0800 +Subject: [PATCH 565/703] drm: expand drm_syncobj_find_fence to support + timeline point v2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +we can fetch timeline point fence after expanded. +v2: The parameter fence is the result of the function and should come last. + +Signed-off-by: Chunming Zhou +Reviewed-by: Christian König +Signed-off-by: Christian König +Link: https://patchwork.freedesktop.org/patch/246541/ +(cherry picked from commit 0a6730ea27b68c7ac4171c29a816c29d26a9637a) +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +- + drivers/gpu/drm/drm_syncobj.c | 5 +++-- + drivers/gpu/drm/v3d/v3d_gem.c | 4 ++-- + drivers/gpu/drm/vc4/vc4_gem.c | 2 +- + include/drm/drm_syncobj.h | 2 +- + 5 files changed, 8 insertions(+), 7 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +@@ -1105,7 +1105,7 @@ static int amdgpu_syncobj_lookup_and_add + { + int r; + struct dma_fence *fence; +- r = drm_syncobj_find_fence(p->filp, handle, &fence); ++ r = drm_syncobj_find_fence(p->filp, handle, 0, &fence); + if (r) + return r; + +--- a/drivers/gpu/drm/drm_syncobj.c ++++ b/drivers/gpu/drm/drm_syncobj.c +@@ -235,6 +235,7 @@ static int drm_syncobj_assign_null_handl + * drm_syncobj_find_fence - lookup and reference the fence in a sync object + * @file_private: drm file private pointer + * @handle: sync object handle to lookup. ++ * @point: timeline point + * @fence: out parameter for the fence + * + * This is just a convenience function that combines drm_syncobj_find() and +@@ -245,7 +246,7 @@ static int drm_syncobj_assign_null_handl + * dma_fence_put(). + */ + int drm_syncobj_find_fence(struct drm_file *file_private, +- u32 handle, ++ u32 handle, u64 point, + struct dma_fence **fence) + { + struct drm_syncobj *syncobj = drm_syncobj_find(file_private, handle); +@@ -516,7 +517,7 @@ static int drm_syncobj_export_sync_file( + if (fd < 0) + return fd; + +- ret = drm_syncobj_find_fence(file_private, handle, &fence); ++ ret = drm_syncobj_find_fence(file_private, handle, 0, &fence); + if (ret) + goto err_put_fd; + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -521,12 +521,12 @@ v3d_submit_cl_ioctl(struct drm_device *d + kref_init(&exec->refcount); + + ret = drm_syncobj_find_fence(file_priv, args->in_sync_bcl, +- &exec->bin.in_fence); ++ 0, &exec->bin.in_fence); + if (ret == -EINVAL) + goto fail; + + ret = drm_syncobj_find_fence(file_priv, args->in_sync_rcl, +- &exec->render.in_fence); ++ 0, &exec->render.in_fence); + if (ret == -EINVAL) + goto fail; + +--- a/drivers/gpu/drm/vc4/vc4_gem.c ++++ b/drivers/gpu/drm/vc4/vc4_gem.c +@@ -1173,7 +1173,7 @@ vc4_submit_cl_ioctl(struct drm_device *d + + if (args->in_sync) { + ret = drm_syncobj_find_fence(file_priv, args->in_sync, +- &in_fence); ++ 0, &in_fence); + if (ret) + goto fail; + +--- a/include/drm/drm_syncobj.h ++++ b/include/drm/drm_syncobj.h +@@ -139,7 +139,7 @@ void drm_syncobj_remove_callback(struct + void drm_syncobj_replace_fence(struct drm_syncobj *syncobj, + struct dma_fence *fence); + int drm_syncobj_find_fence(struct drm_file *file_private, +- u32 handle, ++ u32 handle, u64 point, + struct dma_fence **fence); + void drm_syncobj_free(struct kref *kref); + int drm_syncobj_create(struct drm_syncobj **out_syncobj, uint32_t flags, diff --git a/target/linux/brcm2708/patches-4.19/950-0566-drm-v3d-Fix-a-use-after-free-race-accessing-the-sche.patch b/target/linux/brcm2708/patches-4.19/950-0566-drm-v3d-Fix-a-use-after-free-race-accessing-the-sche.patch new file mode 100644 index 000000000..f93ed3af5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0566-drm-v3d-Fix-a-use-after-free-race-accessing-the-sche.patch @@ -0,0 +1,73 @@ +From d66b36c8443b24eab7512467095f7395d01f77de Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 28 Sep 2018 16:21:23 -0700 +Subject: [PATCH 566/703] drm/v3d: Fix a use-after-free race accessing the + scheduler's fences. + +Once we push the job, the scheduler could run it and free it. So, if +we want to reference their fences, we need to grab them before then. +I haven't seen this happen in many days of conformance test runtime, +but let's still close the race. + +Signed-off-by: Eric Anholt +Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+") +Link: https://patchwork.freedesktop.org/patch/254119/ +Reviewed-by: Boris Brezillon +(cherry picked from commit 34c2c4f632f232ed2fdb66d4e42cc72d322273fe) +--- + drivers/gpu/drm/v3d/v3d_drv.h | 5 +++++ + drivers/gpu/drm/v3d/v3d_gem.c | 8 ++++++-- + 2 files changed, 11 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -198,6 +198,11 @@ struct v3d_exec_info { + */ + struct dma_fence *bin_done_fence; + ++ /* Fence for when the scheduler considers the render to be ++ * done, for when the BOs reservations should be complete. ++ */ ++ struct dma_fence *render_done_fence; ++ + struct kref refcount; + + /* This is the array of BOs that were looked up at the start of exec. */ +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -209,7 +209,7 @@ v3d_flush_caches(struct v3d_dev *v3d) + static void + v3d_attach_object_fences(struct v3d_exec_info *exec) + { +- struct dma_fence *out_fence = &exec->render.base.s_fence->finished; ++ struct dma_fence *out_fence = exec->render_done_fence; + struct v3d_bo *bo; + int i; + +@@ -409,6 +409,7 @@ v3d_exec_cleanup(struct kref *ref) + dma_fence_put(exec->render.done_fence); + + dma_fence_put(exec->bin_done_fence); ++ dma_fence_put(exec->render_done_fence); + + for (i = 0; i < exec->bo_count; i++) + drm_gem_object_put_unlocked(&exec->bo[i]->base); +@@ -572,6 +573,9 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (ret) + goto fail_unreserve; + ++ exec->render_done_fence = ++ dma_fence_get(&exec->render.base.s_fence->finished); ++ + kref_get(&exec->refcount); /* put by scheduler job completion */ + drm_sched_entity_push_job(&exec->render.base, + &v3d_priv->sched_entity[V3D_RENDER]); +@@ -585,7 +589,7 @@ v3d_submit_cl_ioctl(struct drm_device *d + sync_out = drm_syncobj_find(file_priv, args->out_sync); + if (sync_out) { + drm_syncobj_replace_fence(sync_out, +- &exec->render.base.s_fence->finished); ++ exec->render_done_fence); + drm_syncobj_put(sync_out); + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0567-drm-v3d-Add-a-little-debugfs-entry-for-measuring-the.patch b/target/linux/brcm2708/patches-4.19/950-0567-drm-v3d-Add-a-little-debugfs-entry-for-measuring-the.patch new file mode 100644 index 000000000..eb87107d4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0567-drm-v3d-Add-a-little-debugfs-entry-for-measuring-the.patch @@ -0,0 +1,106 @@ +From 50ecde652603895b0b0e22de62be36be47b83ab2 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 28 Sep 2018 16:21:24 -0700 +Subject: [PATCH 567/703] drm/v3d: Add a little debugfs entry for measuring the + core clock. + +This adds just enough performance counter support to measure the +clock. We don't have linux kernel drivers for the clock driving the +HW, and this was useful for determining that the V3D HW is running on +a slow clock, not that the driver was slow. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20180928232126.4332-2-eric@anholt.net +Reviewed-by: Boris Brezillon +(cherry picked from commit 6915c9a525e575732429c22b28eb11871a29374b) +--- + drivers/gpu/drm/v3d/v3d_debugfs.c | 35 +++++++++++++++++++++++++++++++ + drivers/gpu/drm/v3d/v3d_regs.h | 30 ++++++++++++++++++++++++++ + 2 files changed, 65 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_debugfs.c ++++ b/drivers/gpu/drm/v3d/v3d_debugfs.c +@@ -179,9 +179,44 @@ static int v3d_debugfs_bo_stats(struct s + return 0; + } + ++static int v3d_measure_clock(struct seq_file *m, void *unused) ++{ ++ struct drm_info_node *node = (struct drm_info_node *)m->private; ++ struct drm_device *dev = node->minor->dev; ++ struct v3d_dev *v3d = to_v3d_dev(dev); ++ uint32_t cycles; ++ int core = 0; ++ int measure_ms = 1000; ++ ++ if (v3d->ver >= 40) { ++ V3D_CORE_WRITE(core, V3D_V4_PCTR_0_SRC_0_3, ++ V3D_SET_FIELD(V3D_PCTR_CYCLE_COUNT, ++ V3D_PCTR_S0)); ++ V3D_CORE_WRITE(core, V3D_V4_PCTR_0_CLR, 1); ++ V3D_CORE_WRITE(core, V3D_V4_PCTR_0_EN, 1); ++ } else { ++ V3D_CORE_WRITE(core, V3D_V3_PCTR_0_PCTRS0, ++ V3D_PCTR_CYCLE_COUNT); ++ V3D_CORE_WRITE(core, V3D_V3_PCTR_0_CLR, 1); ++ V3D_CORE_WRITE(core, V3D_V3_PCTR_0_EN, ++ V3D_V3_PCTR_0_EN_ENABLE | ++ 1); ++ } ++ msleep(measure_ms); ++ cycles = V3D_CORE_READ(core, V3D_PCTR_0_PCTR0); ++ ++ seq_printf(m, "cycles: %d (%d.%d Mhz)\n", ++ cycles, ++ cycles / (measure_ms * 1000), ++ (cycles / (measure_ms * 100)) % 10); ++ ++ return 0; ++} ++ + static const struct drm_info_list v3d_debugfs_list[] = { + {"v3d_ident", v3d_v3d_debugfs_ident, 0}, + {"v3d_regs", v3d_v3d_debugfs_regs, 0}, ++ {"measure_clock", v3d_measure_clock, 0}, + {"bo_stats", v3d_debugfs_bo_stats, 0}, + }; + +--- a/drivers/gpu/drm/v3d/v3d_regs.h ++++ b/drivers/gpu/drm/v3d/v3d_regs.h +@@ -267,6 +267,36 @@ + # define V3D_PTB_BXCF_RWORDERDISA BIT(1) + # define V3D_PTB_BXCF_CLIPDISA BIT(0) + ++#define V3D_V3_PCTR_0_EN 0x00674 ++#define V3D_V3_PCTR_0_EN_ENABLE BIT(31) ++#define V3D_V4_PCTR_0_EN 0x00650 ++/* When a bit is set, resets the counter to 0. */ ++#define V3D_V3_PCTR_0_CLR 0x00670 ++#define V3D_V4_PCTR_0_CLR 0x00654 ++#define V3D_PCTR_0_OVERFLOW 0x00658 ++ ++#define V3D_V3_PCTR_0_PCTRS0 0x00684 ++#define V3D_V3_PCTR_0_PCTRS15 0x00660 ++#define V3D_V3_PCTR_0_PCTRSX(x) (V3D_V3_PCTR_0_PCTRS0 + \ ++ 4 * (x)) ++/* Each src reg muxes four counters each. */ ++#define V3D_V4_PCTR_0_SRC_0_3 0x00660 ++#define V3D_V4_PCTR_0_SRC_28_31 0x0067c ++# define V3D_PCTR_S0_MASK V3D_MASK(6, 0) ++# define V3D_PCTR_S0_SHIFT 0 ++# define V3D_PCTR_S1_MASK V3D_MASK(14, 8) ++# define V3D_PCTR_S1_SHIFT 8 ++# define V3D_PCTR_S2_MASK V3D_MASK(22, 16) ++# define V3D_PCTR_S2_SHIFT 16 ++# define V3D_PCTR_S3_MASK V3D_MASK(30, 24) ++# define V3D_PCTR_S3_SHIFT 24 ++# define V3D_PCTR_CYCLE_COUNT 32 ++ ++/* Output values of the counters. */ ++#define V3D_PCTR_0_PCTR0 0x00680 ++#define V3D_PCTR_0_PCTR31 0x006fc ++#define V3D_PCTR_0_PCTRX(x) (V3D_PCTR_0_PCTR0 + \ ++ 4 * (x)) + #define V3D_GMP_STATUS 0x00800 + # define V3D_GMP_STATUS_GMPRST BIT(31) + # define V3D_GMP_STATUS_WR_COUNT_MASK V3D_MASK(30, 24) diff --git a/target/linux/brcm2708/patches-4.19/950-0568-drm-v3d-Update-a-comment-about-what-uses-v3d_job_dep.patch b/target/linux/brcm2708/patches-4.19/950-0568-drm-v3d-Update-a-comment-about-what-uses-v3d_job_dep.patch new file mode 100644 index 000000000..71228de3d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0568-drm-v3d-Update-a-comment-about-what-uses-v3d_job_dep.patch @@ -0,0 +1,27 @@ +From 1ab9b7689ae0ba9d1f31c5da609004aa8c61a9ed Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 8 Nov 2018 08:16:52 -0800 +Subject: [PATCH 568/703] drm/v3d: Update a comment about what uses + v3d_job_dependency(). + +I merged bin and render's paths in a late refactoring. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20181108161654.19888-3-eric@anholt.net +Reviewed-by: Boris Brezillon +(cherry picked from commit e90e45f6bd45cc494a6f4cd1853c5e7cd4be7f68) +--- + drivers/gpu/drm/v3d/v3d_sched.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -39,7 +39,7 @@ v3d_job_free(struct drm_sched_job *sched + } + + /** +- * Returns the fences that the bin job depends on, one by one. ++ * Returns the fences that the bin or render job depends on, one by one. + * v3d_job_run() won't be called until all of them have been signaled. + */ + static struct dma_fence * diff --git a/target/linux/brcm2708/patches-4.19/950-0569-drm-v3d-Clean-up-the-reservation-object-setup.patch b/target/linux/brcm2708/patches-4.19/950-0569-drm-v3d-Clean-up-the-reservation-object-setup.patch new file mode 100644 index 000000000..4333ac3e7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0569-drm-v3d-Clean-up-the-reservation-object-setup.patch @@ -0,0 +1,102 @@ +From cdc1e8a4116661a965c1021cd153a8a4fa8eee82 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 8 Nov 2018 08:16:53 -0800 +Subject: [PATCH 569/703] drm/v3d: Clean up the reservation object setup. + +The extra to_v3d_bo() calls came from copying this from the vc4 +driver, which stored the cma gem object in the structs. + +v2: Fix an unused var warning + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20181108161654.19888-4-eric@anholt.net +Reviewed-by: Boris Brezillon (v1) +(cherry picked from commit 8f1cd826641d677d0f7494253ecfc3335f0bcd4e) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 33 +++++++++++---------------------- + 1 file changed, 11 insertions(+), 22 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -210,14 +210,11 @@ static void + v3d_attach_object_fences(struct v3d_exec_info *exec) + { + struct dma_fence *out_fence = exec->render_done_fence; +- struct v3d_bo *bo; + int i; + + for (i = 0; i < exec->bo_count; i++) { +- bo = to_v3d_bo(&exec->bo[i]->base); +- + /* XXX: Use shared fences for read-only objects. */ +- reservation_object_add_excl_fence(bo->resv, out_fence); ++ reservation_object_add_excl_fence(exec->bo[i]->resv, out_fence); + } + } + +@@ -228,11 +225,8 @@ v3d_unlock_bo_reservations(struct drm_de + { + int i; + +- for (i = 0; i < exec->bo_count; i++) { +- struct v3d_bo *bo = to_v3d_bo(&exec->bo[i]->base); +- +- ww_mutex_unlock(&bo->resv->lock); +- } ++ for (i = 0; i < exec->bo_count; i++) ++ ww_mutex_unlock(&exec->bo[i]->resv->lock); + + ww_acquire_fini(acquire_ctx); + } +@@ -251,13 +245,13 @@ v3d_lock_bo_reservations(struct drm_devi + { + int contended_lock = -1; + int i, ret; +- struct v3d_bo *bo; + + ww_acquire_init(acquire_ctx, &reservation_ww_class); + + retry: + if (contended_lock != -1) { +- bo = to_v3d_bo(&exec->bo[contended_lock]->base); ++ struct v3d_bo *bo = exec->bo[contended_lock]; ++ + ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock, + acquire_ctx); + if (ret) { +@@ -270,19 +264,16 @@ retry: + if (i == contended_lock) + continue; + +- bo = to_v3d_bo(&exec->bo[i]->base); +- +- ret = ww_mutex_lock_interruptible(&bo->resv->lock, acquire_ctx); ++ ret = ww_mutex_lock_interruptible(&exec->bo[i]->resv->lock, ++ acquire_ctx); + if (ret) { + int j; + +- for (j = 0; j < i; j++) { +- bo = to_v3d_bo(&exec->bo[j]->base); +- ww_mutex_unlock(&bo->resv->lock); +- } ++ for (j = 0; j < i; j++) ++ ww_mutex_unlock(&exec->bo[j]->resv->lock); + + if (contended_lock != -1 && contended_lock >= i) { +- bo = to_v3d_bo(&exec->bo[contended_lock]->base); ++ struct v3d_bo *bo = exec->bo[contended_lock]; + + ww_mutex_unlock(&bo->resv->lock); + } +@@ -303,9 +294,7 @@ retry: + * before we commit the CL to the hardware. + */ + for (i = 0; i < exec->bo_count; i++) { +- bo = to_v3d_bo(&exec->bo[i]->base); +- +- ret = reservation_object_reserve_shared(bo->resv); ++ ret = reservation_object_reserve_shared(exec->bo[i]->resv); + if (ret) { + v3d_unlock_bo_reservations(dev, exec, acquire_ctx); + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0570-drm-v3d-Add-support-for-submitting-jobs-to-the-TFU.patch b/target/linux/brcm2708/patches-4.19/950-0570-drm-v3d-Add-support-for-submitting-jobs-to-the-TFU.patch new file mode 100644 index 000000000..53c760c4f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0570-drm-v3d-Add-support-for-submitting-jobs-to-the-TFU.patch @@ -0,0 +1,802 @@ +From 60c65dc612663be7136a19a117cee5d194530600 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 28 Nov 2018 15:09:25 -0800 +Subject: [PATCH 570/703] drm/v3d: Add support for submitting jobs to the TFU. + +The TFU can copy from raster, UIF, and SAND input images to UIF output +images, with optional mipmap generation. This will certainly be +useful for media EGL image input, but is also useful immediately for +mipmap generation without bogging the V3D core down. + +For now we only run the queue 1 job deep, and don't have any hang +recovery (though I don't think we should need it, with TFU). Queuing +multiple jobs in the HW will require synchronizing the YUV coefficient +regs updates since they don't get FIFOed with the job. + +v2: Change the ioctl to IOW instead of IOWR, always set COEF0, explain + why TFU is AUTH, clarify the syncing docs, drop the unused TFU + interrupt regs (you're expected to use the hub's), don't take + &bo->base for NULL bos. +v3: Fix a little whitespace alignment (noticed by checkpatch), rebase + on drm_sched_job_cleanup() changes. + +Signed-off-by: Eric Anholt +Reviewed-by: Dave Emett (v2) +Link: https://patchwork.freedesktop.org/patch/264607/ +(cherry picked from commit 1584f16ca96ef124aad79efa3303cff5f3530e2c) +--- + drivers/gpu/drm/v3d/v3d_drv.c | 15 ++- + drivers/gpu/drm/v3d/v3d_drv.h | 32 +++++- + drivers/gpu/drm/v3d/v3d_gem.c | 178 ++++++++++++++++++++++++++++---- + drivers/gpu/drm/v3d/v3d_irq.c | 12 ++- + drivers/gpu/drm/v3d/v3d_regs.h | 49 +++++++++ + drivers/gpu/drm/v3d/v3d_sched.c | 148 ++++++++++++++++++++++---- + drivers/gpu/drm/v3d/v3d_trace.h | 20 ++++ + include/uapi/drm/v3d_drm.h | 25 +++++ + 8 files changed, 426 insertions(+), 53 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -112,10 +112,15 @@ static int v3d_get_param_ioctl(struct dr + return 0; + } + +- /* Any params that aren't just register reads would go here. */ + +- DRM_DEBUG("Unknown parameter %d\n", args->param); +- return -EINVAL; ++ switch (args->param) { ++ case DRM_V3D_PARAM_SUPPORTS_TFU: ++ args->value = 1; ++ return 0; ++ default: ++ DRM_DEBUG("Unknown parameter %d\n", args->param); ++ return -EINVAL; ++ } + } + + static int +@@ -170,7 +175,8 @@ static const struct file_operations v3d_ + /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP + * protection between clients. Note that render nodes would be be + * able to submit CLs that could access BOs from clients authenticated +- * with the master node. ++ * with the master node. The TFU doesn't use the GMP, so it would ++ * need to stay DRM_AUTH until we do buffer size/offset validation. + */ + static const struct drm_ioctl_desc v3d_drm_ioctls[] = { + DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH), +@@ -179,6 +185,7 @@ static const struct drm_ioctl_desc v3d_d + DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW), ++ DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH), + }; + + static const struct vm_operations_struct v3d_vm_ops = { +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -7,19 +7,18 @@ + #include + #include + #include ++#include "uapi/drm/v3d_drm.h" + + #define GMP_GRANULARITY (128 * 1024) + +-/* Enum for each of the V3D queues. We maintain various queue +- * tracking as an array because at some point we'll want to support +- * the TFU (texture formatting unit) as another queue. +- */ ++/* Enum for each of the V3D queues. */ + enum v3d_queue { + V3D_BIN, + V3D_RENDER, ++ V3D_TFU, + }; + +-#define V3D_MAX_QUEUES (V3D_RENDER + 1) ++#define V3D_MAX_QUEUES (V3D_TFU + 1) + + struct v3d_queue_state { + struct drm_gpu_scheduler sched; +@@ -68,6 +67,7 @@ struct v3d_dev { + + struct v3d_exec_info *bin_job; + struct v3d_exec_info *render_job; ++ struct v3d_tfu_job *tfu_job; + + struct v3d_queue_state queue[V3D_MAX_QUEUES]; + +@@ -218,6 +218,25 @@ struct v3d_exec_info { + u32 qma, qms, qts; + }; + ++struct v3d_tfu_job { ++ struct drm_sched_job base; ++ ++ struct drm_v3d_submit_tfu args; ++ ++ /* An optional fence userspace can pass in for the job to depend on. */ ++ struct dma_fence *in_fence; ++ ++ /* v3d fence to be signaled by IRQ handler when the job is complete. */ ++ struct dma_fence *done_fence; ++ ++ struct v3d_dev *v3d; ++ ++ struct kref refcount; ++ ++ /* This is the array of BOs that were looked up at the start of exec. */ ++ struct v3d_bo *bo[4]; ++}; ++ + /** + * _wait_for - magic (register) wait macro + * +@@ -281,9 +300,12 @@ int v3d_gem_init(struct drm_device *dev) + void v3d_gem_destroy(struct drm_device *dev); + int v3d_submit_cl_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); ++int v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); + int v3d_wait_bo_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + void v3d_exec_put(struct v3d_exec_info *exec); ++void v3d_tfu_job_put(struct v3d_tfu_job *exec); + void v3d_reset(struct v3d_dev *v3d); + void v3d_invalidate_caches(struct v3d_dev *v3d); + void v3d_flush_caches(struct v3d_dev *v3d); +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -207,26 +207,27 @@ v3d_flush_caches(struct v3d_dev *v3d) + } + + static void +-v3d_attach_object_fences(struct v3d_exec_info *exec) ++v3d_attach_object_fences(struct v3d_bo **bos, int bo_count, ++ struct dma_fence *fence) + { +- struct dma_fence *out_fence = exec->render_done_fence; + int i; + +- for (i = 0; i < exec->bo_count; i++) { ++ for (i = 0; i < bo_count; i++) { + /* XXX: Use shared fences for read-only objects. */ +- reservation_object_add_excl_fence(exec->bo[i]->resv, out_fence); ++ reservation_object_add_excl_fence(bos[i]->resv, fence); + } + } + + static void + v3d_unlock_bo_reservations(struct drm_device *dev, +- struct v3d_exec_info *exec, ++ struct v3d_bo **bos, ++ int bo_count, + struct ww_acquire_ctx *acquire_ctx) + { + int i; + +- for (i = 0; i < exec->bo_count; i++) +- ww_mutex_unlock(&exec->bo[i]->resv->lock); ++ for (i = 0; i < bo_count; i++) ++ ww_mutex_unlock(&bos[i]->resv->lock); + + ww_acquire_fini(acquire_ctx); + } +@@ -240,7 +241,8 @@ v3d_unlock_bo_reservations(struct drm_de + */ + static int + v3d_lock_bo_reservations(struct drm_device *dev, +- struct v3d_exec_info *exec, ++ struct v3d_bo **bos, ++ int bo_count, + struct ww_acquire_ctx *acquire_ctx) + { + int contended_lock = -1; +@@ -250,7 +252,7 @@ v3d_lock_bo_reservations(struct drm_devi + + retry: + if (contended_lock != -1) { +- struct v3d_bo *bo = exec->bo[contended_lock]; ++ struct v3d_bo *bo = bos[contended_lock]; + + ret = ww_mutex_lock_slow_interruptible(&bo->resv->lock, + acquire_ctx); +@@ -260,20 +262,20 @@ retry: + } + } + +- for (i = 0; i < exec->bo_count; i++) { ++ for (i = 0; i < bo_count; i++) { + if (i == contended_lock) + continue; + +- ret = ww_mutex_lock_interruptible(&exec->bo[i]->resv->lock, ++ ret = ww_mutex_lock_interruptible(&bos[i]->resv->lock, + acquire_ctx); + if (ret) { + int j; + + for (j = 0; j < i; j++) +- ww_mutex_unlock(&exec->bo[j]->resv->lock); ++ ww_mutex_unlock(&bos[j]->resv->lock); + + if (contended_lock != -1 && contended_lock >= i) { +- struct v3d_bo *bo = exec->bo[contended_lock]; ++ struct v3d_bo *bo = bos[contended_lock]; + + ww_mutex_unlock(&bo->resv->lock); + } +@@ -293,10 +295,11 @@ retry: + /* Reserve space for our shared (read-only) fence references, + * before we commit the CL to the hardware. + */ +- for (i = 0; i < exec->bo_count; i++) { +- ret = reservation_object_reserve_shared(exec->bo[i]->resv); ++ for (i = 0; i < bo_count; i++) { ++ ret = reservation_object_reserve_shared(bos[i]->resv); + if (ret) { +- v3d_unlock_bo_reservations(dev, exec, acquire_ctx); ++ v3d_unlock_bo_reservations(dev, bos, bo_count, ++ acquire_ctx); + return ret; + } + } +@@ -419,6 +422,33 @@ void v3d_exec_put(struct v3d_exec_info * + kref_put(&exec->refcount, v3d_exec_cleanup); + } + ++static void ++v3d_tfu_job_cleanup(struct kref *ref) ++{ ++ struct v3d_tfu_job *job = container_of(ref, struct v3d_tfu_job, ++ refcount); ++ struct v3d_dev *v3d = job->v3d; ++ unsigned int i; ++ ++ dma_fence_put(job->in_fence); ++ dma_fence_put(job->done_fence); ++ ++ for (i = 0; i < ARRAY_SIZE(job->bo); i++) { ++ if (job->bo[i]) ++ drm_gem_object_put_unlocked(&job->bo[i]->base); ++ } ++ ++ pm_runtime_mark_last_busy(v3d->dev); ++ pm_runtime_put_autosuspend(v3d->dev); ++ ++ kfree(job); ++} ++ ++void v3d_tfu_job_put(struct v3d_tfu_job *job) ++{ ++ kref_put(&job->refcount, v3d_tfu_job_cleanup); ++} ++ + int + v3d_wait_bo_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) +@@ -536,7 +566,8 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (ret) + goto fail; + +- ret = v3d_lock_bo_reservations(dev, exec, &acquire_ctx); ++ ret = v3d_lock_bo_reservations(dev, exec->bo, exec->bo_count, ++ &acquire_ctx); + if (ret) + goto fail; + +@@ -570,9 +601,10 @@ v3d_submit_cl_ioctl(struct drm_device *d + &v3d_priv->sched_entity[V3D_RENDER]); + mutex_unlock(&v3d->sched_lock); + +- v3d_attach_object_fences(exec); ++ v3d_attach_object_fences(exec->bo, exec->bo_count, ++ exec->render_done_fence); + +- v3d_unlock_bo_reservations(dev, exec, &acquire_ctx); ++ v3d_unlock_bo_reservations(dev, exec->bo, exec->bo_count, &acquire_ctx); + + /* Update the return sync object for the */ + sync_out = drm_syncobj_find(file_priv, args->out_sync); +@@ -588,12 +620,118 @@ v3d_submit_cl_ioctl(struct drm_device *d + + fail_unreserve: + mutex_unlock(&v3d->sched_lock); +- v3d_unlock_bo_reservations(dev, exec, &acquire_ctx); ++ v3d_unlock_bo_reservations(dev, exec->bo, exec->bo_count, &acquire_ctx); + fail: + v3d_exec_put(exec); + + return ret; + } ++ ++/** ++ * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D. ++ * @dev: DRM device ++ * @data: ioctl argument ++ * @file_priv: DRM file for this fd ++ * ++ * Userspace provides the register setup for the TFU, which we don't ++ * need to validate since the TFU is behind the MMU. ++ */ ++int ++v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ struct v3d_dev *v3d = to_v3d_dev(dev); ++ struct v3d_file_priv *v3d_priv = file_priv->driver_priv; ++ struct drm_v3d_submit_tfu *args = data; ++ struct v3d_tfu_job *job; ++ struct ww_acquire_ctx acquire_ctx; ++ struct drm_syncobj *sync_out; ++ struct dma_fence *sched_done_fence; ++ int ret = 0; ++ int bo_count; ++ ++ job = kcalloc(1, sizeof(*job), GFP_KERNEL); ++ if (!job) ++ return -ENOMEM; ++ ++ ret = pm_runtime_get_sync(v3d->dev); ++ if (ret < 0) { ++ kfree(job); ++ return ret; ++ } ++ ++ kref_init(&job->refcount); ++ ++ ret = drm_syncobj_find_fence(file_priv, args->in_sync, ++ 0, &job->in_fence); ++ if (ret == -EINVAL) ++ goto fail; ++ ++ job->args = *args; ++ job->v3d = v3d; ++ ++ spin_lock(&file_priv->table_lock); ++ for (bo_count = 0; bo_count < ARRAY_SIZE(job->bo); bo_count++) { ++ struct drm_gem_object *bo; ++ ++ if (!args->bo_handles[bo_count]) ++ break; ++ ++ bo = idr_find(&file_priv->object_idr, ++ args->bo_handles[bo_count]); ++ if (!bo) { ++ DRM_DEBUG("Failed to look up GEM BO %d: %d\n", ++ bo_count, args->bo_handles[bo_count]); ++ ret = -ENOENT; ++ spin_unlock(&file_priv->table_lock); ++ goto fail; ++ } ++ drm_gem_object_get(bo); ++ job->bo[bo_count] = to_v3d_bo(bo); ++ } ++ spin_unlock(&file_priv->table_lock); ++ ++ ret = v3d_lock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++ if (ret) ++ goto fail; ++ ++ mutex_lock(&v3d->sched_lock); ++ ret = drm_sched_job_init(&job->base, ++ &v3d_priv->sched_entity[V3D_TFU], ++ v3d_priv); ++ if (ret) ++ goto fail_unreserve; ++ ++ sched_done_fence = dma_fence_get(&job->base.s_fence->finished); ++ ++ kref_get(&job->refcount); /* put by scheduler job completion */ ++ drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[V3D_TFU]); ++ mutex_unlock(&v3d->sched_lock); ++ ++ v3d_attach_object_fences(job->bo, bo_count, sched_done_fence); ++ ++ v3d_unlock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++ ++ /* Update the return sync object */ ++ sync_out = drm_syncobj_find(file_priv, args->out_sync); ++ if (sync_out) { ++ drm_syncobj_replace_fence(sync_out, sched_done_fence); ++ drm_syncobj_put(sync_out); ++ } ++ dma_fence_put(sched_done_fence); ++ ++ v3d_tfu_job_put(job); ++ ++ return 0; ++ ++fail_unreserve: ++ mutex_unlock(&v3d->sched_lock); ++ v3d_unlock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++fail: ++ v3d_tfu_job_put(job); ++ ++ return ret; ++} + + int + v3d_gem_init(struct drm_device *dev) +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -4,8 +4,8 @@ + /** + * DOC: Interrupt management for the V3D engine + * +- * When we take a binning or rendering flush done interrupt, we need +- * to signal the fence for that job so that the scheduler can queue up ++ * When we take a bin, render, or TFU done interrupt, we need to ++ * signal the fence for that job so that the scheduler can queue up + * the next one and unblock any waiters. + * + * When we take the binner out of memory interrupt, we need to +@@ -23,7 +23,8 @@ + + #define V3D_HUB_IRQS ((u32)(V3D_HUB_INT_MMU_WRV | \ + V3D_HUB_INT_MMU_PTI | \ +- V3D_HUB_INT_MMU_CAP)) ++ V3D_HUB_INT_MMU_CAP | \ ++ V3D_HUB_INT_TFUC)) + + static void + v3d_overflow_mem_work(struct work_struct *work) +@@ -117,6 +118,11 @@ v3d_hub_irq(int irq, void *arg) + /* Acknowledge the interrupts we're handling here. */ + V3D_WRITE(V3D_HUB_INT_CLR, intsts); + ++ if (intsts & V3D_HUB_INT_TFUC) { ++ dma_fence_signal(v3d->tfu_job->done_fence); ++ status = IRQ_HANDLED; ++ } ++ + if (intsts & (V3D_HUB_INT_MMU_WRV | + V3D_HUB_INT_MMU_PTI | + V3D_HUB_INT_MMU_CAP)) { +--- a/drivers/gpu/drm/v3d/v3d_regs.h ++++ b/drivers/gpu/drm/v3d/v3d_regs.h +@@ -86,6 +86,55 @@ + # define V3D_TOP_GR_BRIDGE_SW_INIT_1 0x0000c + # define V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT BIT(0) + ++#define V3D_TFU_CS 0x00400 ++/* Stops current job, empties input fifo. */ ++# define V3D_TFU_CS_TFURST BIT(31) ++# define V3D_TFU_CS_CVTCT_MASK V3D_MASK(23, 16) ++# define V3D_TFU_CS_CVTCT_SHIFT 16 ++# define V3D_TFU_CS_NFREE_MASK V3D_MASK(13, 8) ++# define V3D_TFU_CS_NFREE_SHIFT 8 ++# define V3D_TFU_CS_BUSY BIT(0) ++ ++#define V3D_TFU_SU 0x00404 ++/* Interrupt when FINTTHR input slots are free (0 = disabled) */ ++# define V3D_TFU_SU_FINTTHR_MASK V3D_MASK(13, 8) ++# define V3D_TFU_SU_FINTTHR_SHIFT 8 ++/* Skips resetting the CRC at the start of CRC generation. */ ++# define V3D_TFU_SU_CRCCHAIN BIT(4) ++/* skips writes, computes CRC of the image. miplevels must be 0. */ ++# define V3D_TFU_SU_CRC BIT(3) ++# define V3D_TFU_SU_THROTTLE_MASK V3D_MASK(1, 0) ++# define V3D_TFU_SU_THROTTLE_SHIFT 0 ++ ++#define V3D_TFU_ICFG 0x00408 ++/* Interrupt when the conversion is complete. */ ++# define V3D_TFU_ICFG_IOC BIT(0) ++ ++/* Input Image Address */ ++#define V3D_TFU_IIA 0x0040c ++/* Input Chroma Address */ ++#define V3D_TFU_ICA 0x00410 ++/* Input Image Stride */ ++#define V3D_TFU_IIS 0x00414 ++/* Input Image U-Plane Address */ ++#define V3D_TFU_IUA 0x00418 ++/* Output Image Address */ ++#define V3D_TFU_IOA 0x0041c ++/* Image Output Size */ ++#define V3D_TFU_IOS 0x00420 ++/* TFU YUV Coefficient 0 */ ++#define V3D_TFU_COEF0 0x00424 ++/* Use these regs instead of the defaults. */ ++# define V3D_TFU_COEF0_USECOEF BIT(31) ++/* TFU YUV Coefficient 1 */ ++#define V3D_TFU_COEF1 0x00428 ++/* TFU YUV Coefficient 2 */ ++#define V3D_TFU_COEF2 0x0042c ++/* TFU YUV Coefficient 3 */ ++#define V3D_TFU_COEF3 0x00430 ++ ++#define V3D_TFU_CRC 0x00434 ++ + /* Per-MMU registers. */ + + #define V3D_MMUC_CONTROL 0x01000 +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -30,6 +30,12 @@ to_v3d_job(struct drm_sched_job *sched_j + return container_of(sched_job, struct v3d_job, base); + } + ++static struct v3d_tfu_job * ++to_tfu_job(struct drm_sched_job *sched_job) ++{ ++ return container_of(sched_job, struct v3d_tfu_job, base); ++} ++ + static void + v3d_job_free(struct drm_sched_job *sched_job) + { +@@ -38,6 +44,14 @@ v3d_job_free(struct drm_sched_job *sched + v3d_exec_put(job->exec); + } + ++static void ++v3d_tfu_job_free(struct drm_sched_job *sched_job) ++{ ++ struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ ++ v3d_tfu_job_put(job); ++} ++ + /** + * Returns the fences that the bin or render job depends on, one by one. + * v3d_job_run() won't be called until all of them have been signaled. +@@ -76,6 +90,27 @@ v3d_job_dependency(struct drm_sched_job + return fence; + } + ++/** ++ * Returns the fences that the TFU job depends on, one by one. ++ * v3d_tfu_job_run() won't be called until all of them have been ++ * signaled. ++ */ ++static struct dma_fence * ++v3d_tfu_job_dependency(struct drm_sched_job *sched_job, ++ struct drm_sched_entity *s_entity) ++{ ++ struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ struct dma_fence *fence; ++ ++ fence = job->in_fence; ++ if (fence) { ++ job->in_fence = NULL; ++ return fence; ++ } ++ ++ return NULL; ++} ++ + static struct dma_fence *v3d_job_run(struct drm_sched_job *sched_job) + { + struct v3d_job *job = to_v3d_job(sched_job); +@@ -147,31 +182,47 @@ static struct dma_fence *v3d_job_run(str + return fence; + } + +-static void +-v3d_job_timedout(struct drm_sched_job *sched_job) ++static struct dma_fence * ++v3d_tfu_job_run(struct drm_sched_job *sched_job) + { +- struct v3d_job *job = to_v3d_job(sched_job); +- struct v3d_exec_info *exec = job->exec; +- struct v3d_dev *v3d = exec->v3d; +- enum v3d_queue job_q = job == &exec->bin ? V3D_BIN : V3D_RENDER; +- enum v3d_queue q; +- u32 ctca = V3D_CORE_READ(0, V3D_CLE_CTNCA(job_q)); +- u32 ctra = V3D_CORE_READ(0, V3D_CLE_CTNRA(job_q)); ++ struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ struct v3d_dev *v3d = job->v3d; ++ struct drm_device *dev = &v3d->drm; ++ struct dma_fence *fence; + +- /* If the current address or return address have changed, then +- * the GPU has probably made progress and we should delay the +- * reset. This could fail if the GPU got in an infinite loop +- * in the CL, but that is pretty unlikely outside of an i-g-t +- * testcase. +- */ +- if (job->timedout_ctca != ctca || job->timedout_ctra != ctra) { +- job->timedout_ctca = ctca; +- job->timedout_ctra = ctra; ++ fence = v3d_fence_create(v3d, V3D_TFU); ++ if (IS_ERR(fence)) ++ return NULL; + +- schedule_delayed_work(&job->base.work_tdr, +- job->base.sched->timeout); +- return; ++ v3d->tfu_job = job; ++ if (job->done_fence) ++ dma_fence_put(job->done_fence); ++ job->done_fence = dma_fence_get(fence); ++ ++ trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno); ++ ++ V3D_WRITE(V3D_TFU_IIA, job->args.iia); ++ V3D_WRITE(V3D_TFU_IIS, job->args.iis); ++ V3D_WRITE(V3D_TFU_ICA, job->args.ica); ++ V3D_WRITE(V3D_TFU_IUA, job->args.iua); ++ V3D_WRITE(V3D_TFU_IOA, job->args.ioa); ++ V3D_WRITE(V3D_TFU_IOS, job->args.ios); ++ V3D_WRITE(V3D_TFU_COEF0, job->args.coef[0]); ++ if (job->args.coef[0] & V3D_TFU_COEF0_USECOEF) { ++ V3D_WRITE(V3D_TFU_COEF1, job->args.coef[1]); ++ V3D_WRITE(V3D_TFU_COEF2, job->args.coef[2]); ++ V3D_WRITE(V3D_TFU_COEF3, job->args.coef[3]); + } ++ /* ICFG kicks off the job. */ ++ V3D_WRITE(V3D_TFU_ICFG, job->args.icfg | V3D_TFU_ICFG_IOC); ++ ++ return fence; ++} ++ ++static void ++v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job *sched_job) ++{ ++ enum v3d_queue q; + + mutex_lock(&v3d->reset_lock); + +@@ -196,6 +247,41 @@ v3d_job_timedout(struct drm_sched_job *s + mutex_unlock(&v3d->reset_lock); + } + ++static void ++v3d_job_timedout(struct drm_sched_job *sched_job) ++{ ++ struct v3d_job *job = to_v3d_job(sched_job); ++ struct v3d_exec_info *exec = job->exec; ++ struct v3d_dev *v3d = exec->v3d; ++ enum v3d_queue job_q = job == &exec->bin ? V3D_BIN : V3D_RENDER; ++ u32 ctca = V3D_CORE_READ(0, V3D_CLE_CTNCA(job_q)); ++ u32 ctra = V3D_CORE_READ(0, V3D_CLE_CTNRA(job_q)); ++ ++ /* If the current address or return address have changed, then ++ * the GPU has probably made progress and we should delay the ++ * reset. This could fail if the GPU got in an infinite loop ++ * in the CL, but that is pretty unlikely outside of an i-g-t ++ * testcase. ++ */ ++ if (job->timedout_ctca != ctca || job->timedout_ctra != ctra) { ++ job->timedout_ctca = ctca; ++ job->timedout_ctra = ctra; ++ schedule_delayed_work(&job->base.work_tdr, ++ job->base.sched->timeout); ++ return; ++ } ++ ++ v3d_gpu_reset_for_timeout(v3d, sched_job); ++} ++ ++static void ++v3d_tfu_job_timedout(struct drm_sched_job *sched_job) ++{ ++ struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ ++ v3d_gpu_reset_for_timeout(job->v3d, sched_job); ++} ++ + static const struct drm_sched_backend_ops v3d_sched_ops = { + .dependency = v3d_job_dependency, + .run_job = v3d_job_run, +@@ -203,6 +289,13 @@ static const struct drm_sched_backend_op + .free_job = v3d_job_free + }; + ++static const struct drm_sched_backend_ops v3d_tfu_sched_ops = { ++ .dependency = v3d_tfu_job_dependency, ++ .run_job = v3d_tfu_job_run, ++ .timedout_job = v3d_tfu_job_timedout, ++ .free_job = v3d_tfu_job_free ++}; ++ + int + v3d_sched_init(struct v3d_dev *v3d) + { +@@ -232,6 +325,19 @@ v3d_sched_init(struct v3d_dev *v3d) + drm_sched_fini(&v3d->queue[V3D_BIN].sched); + return ret; + } ++ ++ ret = drm_sched_init(&v3d->queue[V3D_TFU].sched, ++ &v3d_tfu_sched_ops, ++ hw_jobs_limit, job_hang_limit, ++ msecs_to_jiffies(hang_limit_ms), ++ "v3d_tfu"); ++ if (ret) { ++ dev_err(v3d->dev, "Failed to create TFU scheduler: %d.", ++ ret); ++ drm_sched_fini(&v3d->queue[V3D_RENDER].sched); ++ drm_sched_fini(&v3d->queue[V3D_BIN].sched); ++ return ret; ++ } + + return 0; + } +--- a/drivers/gpu/drm/v3d/v3d_trace.h ++++ b/drivers/gpu/drm/v3d/v3d_trace.h +@@ -42,6 +42,26 @@ TRACE_EVENT(v3d_submit_cl, + __entry->ctnqea) + ); + ++TRACE_EVENT(v3d_submit_tfu, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ + TRACE_EVENT(v3d_reset_begin, + TP_PROTO(struct drm_device *dev), + TP_ARGS(dev), +--- a/include/uapi/drm/v3d_drm.h ++++ b/include/uapi/drm/v3d_drm.h +@@ -36,6 +36,7 @@ extern "C" { + #define DRM_V3D_MMAP_BO 0x03 + #define DRM_V3D_GET_PARAM 0x04 + #define DRM_V3D_GET_BO_OFFSET 0x05 ++#define DRM_V3D_SUBMIT_TFU 0x06 + + #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) + #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) +@@ -43,6 +44,7 @@ extern "C" { + #define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo) + #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) + #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) ++#define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu) + + /** + * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D +@@ -169,6 +171,7 @@ enum drm_v3d_param { + DRM_V3D_PARAM_V3D_CORE0_IDENT0, + DRM_V3D_PARAM_V3D_CORE0_IDENT1, + DRM_V3D_PARAM_V3D_CORE0_IDENT2, ++ DRM_V3D_PARAM_SUPPORTS_TFU, + }; + + struct drm_v3d_get_param { +@@ -187,6 +190,28 @@ struct drm_v3d_get_bo_offset { + __u32 offset; + }; + ++struct drm_v3d_submit_tfu { ++ __u32 icfg; ++ __u32 iia; ++ __u32 iis; ++ __u32 ica; ++ __u32 iua; ++ __u32 ioa; ++ __u32 ios; ++ __u32 coef[4]; ++ /* First handle is the output BO, following are other inputs. ++ * 0 for unused. ++ */ ++ __u32 bo_handles[4]; ++ /* sync object to block on before running the TFU job. Each TFU ++ * job will execute in the order submitted to its FD. Synchronization ++ * against rendering jobs requires using sync objects. ++ */ ++ __u32 in_sync; ++ /* Sync object to signal when the TFU job is done. */ ++ __u32 out_sync; ++}; ++ + #if defined(__cplusplus) + } + #endif diff --git a/target/linux/brcm2708/patches-4.19/950-0571-drm-v3d-Drop-the-dev-argument-to-lock-unlock-of-BO-r.patch b/target/linux/brcm2708/patches-4.19/950-0571-drm-v3d-Drop-the-dev-argument-to-lock-unlock-of-BO-r.patch new file mode 100644 index 000000000..58d9dba4f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0571-drm-v3d-Drop-the-dev-argument-to-lock-unlock-of-BO-r.patch @@ -0,0 +1,102 @@ +From ee1ef747ef5c088504b541e461d94feadac03bfa Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 28 Nov 2018 15:09:26 -0800 +Subject: [PATCH 571/703] drm/v3d: Drop the "dev" argument to lock/unlock of BO + reservations. + +They were unused, as Dave Emett noticed in TFU review. + +Signed-off-by: Eric Anholt +Cc: Dave Emett +Link: https://patchwork.freedesktop.org/patch/msgid/20181128230927.10951-2-eric@anholt.net +Reviewed-by: Daniel Vetter +(cherry picked from commit e14a07fc4b961a75f6c275d6bd670ba54fbdae14) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 20 +++++++++----------- + 1 file changed, 9 insertions(+), 11 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -219,8 +219,7 @@ v3d_attach_object_fences(struct v3d_bo * + } + + static void +-v3d_unlock_bo_reservations(struct drm_device *dev, +- struct v3d_bo **bos, ++v3d_unlock_bo_reservations(struct v3d_bo **bos, + int bo_count, + struct ww_acquire_ctx *acquire_ctx) + { +@@ -240,8 +239,7 @@ v3d_unlock_bo_reservations(struct drm_de + * to v3d, so we don't attach dma-buf fences to them. + */ + static int +-v3d_lock_bo_reservations(struct drm_device *dev, +- struct v3d_bo **bos, ++v3d_lock_bo_reservations(struct v3d_bo **bos, + int bo_count, + struct ww_acquire_ctx *acquire_ctx) + { +@@ -298,7 +296,7 @@ retry: + for (i = 0; i < bo_count; i++) { + ret = reservation_object_reserve_shared(bos[i]->resv); + if (ret) { +- v3d_unlock_bo_reservations(dev, bos, bo_count, ++ v3d_unlock_bo_reservations(bos, bo_count, + acquire_ctx); + return ret; + } +@@ -566,7 +564,7 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (ret) + goto fail; + +- ret = v3d_lock_bo_reservations(dev, exec->bo, exec->bo_count, ++ ret = v3d_lock_bo_reservations(exec->bo, exec->bo_count, + &acquire_ctx); + if (ret) + goto fail; +@@ -604,7 +602,7 @@ v3d_submit_cl_ioctl(struct drm_device *d + v3d_attach_object_fences(exec->bo, exec->bo_count, + exec->render_done_fence); + +- v3d_unlock_bo_reservations(dev, exec->bo, exec->bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx); + + /* Update the return sync object for the */ + sync_out = drm_syncobj_find(file_priv, args->out_sync); +@@ -620,7 +618,7 @@ v3d_submit_cl_ioctl(struct drm_device *d + + fail_unreserve: + mutex_unlock(&v3d->sched_lock); +- v3d_unlock_bo_reservations(dev, exec->bo, exec->bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx); + fail: + v3d_exec_put(exec); + +@@ -691,7 +689,7 @@ v3d_submit_tfu_ioctl(struct drm_device * + } + spin_unlock(&file_priv->table_lock); + +- ret = v3d_lock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++ ret = v3d_lock_bo_reservations(job->bo, bo_count, &acquire_ctx); + if (ret) + goto fail; + +@@ -710,7 +708,7 @@ v3d_submit_tfu_ioctl(struct drm_device * + + v3d_attach_object_fences(job->bo, bo_count, sched_done_fence); + +- v3d_unlock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx); + + /* Update the return sync object */ + sync_out = drm_syncobj_find(file_priv, args->out_sync); +@@ -726,7 +724,7 @@ v3d_submit_tfu_ioctl(struct drm_device * + + fail_unreserve: + mutex_unlock(&v3d->sched_lock); +- v3d_unlock_bo_reservations(dev, job->bo, bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx); + fail: + v3d_tfu_job_put(job); + diff --git a/target/linux/brcm2708/patches-4.19/950-0572-drm-v3d-Add-missing-fence-timeline-name-for-TFU.patch b/target/linux/brcm2708/patches-4.19/950-0572-drm-v3d-Add-missing-fence-timeline-name-for-TFU.patch new file mode 100644 index 000000000..1253c8b49 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0572-drm-v3d-Add-missing-fence-timeline-name-for-TFU.patch @@ -0,0 +1,37 @@ +From ffc2056239de0353374d8eb9d3022542e4ec5208 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 30 Nov 2018 16:57:59 -0800 +Subject: [PATCH 572/703] drm/v3d: Add missing fence timeline name for TFU. + +We shouldn't be returning v3d-render for our new queue. + +Signed-off-by: Eric Anholt +Fixes: 83d5139982db ("drm/v3d: Add support for submitting jobs to the TFU.") +Link: https://patchwork.freedesktop.org/patch/msgid/20181201005759.28093-6-eric@anholt.net +Reviewed-by: Dave Emett +(cherry picked from commit db176f6ba1da39ad0016c77b9775a6bb3d0ce88a) +--- + drivers/gpu/drm/v3d/v3d_fence.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_fence.c ++++ b/drivers/gpu/drm/v3d/v3d_fence.c +@@ -29,10 +29,16 @@ static const char *v3d_fence_get_timelin + { + struct v3d_fence *f = to_v3d_fence(fence); + +- if (f->queue == V3D_BIN) ++ switch (f->queue) { ++ case V3D_BIN: + return "v3d-bin"; +- else ++ case V3D_RENDER: + return "v3d-render"; ++ case V3D_TFU: ++ return "v3d-tfu"; ++ default: ++ return NULL; ++ } + } + + const struct dma_fence_ops v3d_fence_ops = { diff --git a/target/linux/brcm2708/patches-4.19/950-0573-drm-v3d-Add-more-tracepoints-for-V3D-GPU-rendering.patch b/target/linux/brcm2708/patches-4.19/950-0573-drm-v3d-Add-more-tracepoints-for-V3D-GPU-rendering.patch new file mode 100644 index 000000000..e65066c55 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0573-drm-v3d-Add-more-tracepoints-for-V3D-GPU-rendering.patch @@ -0,0 +1,205 @@ +From 5d505c19fc3fce8c17711a53287081e61418a776 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 30 Nov 2018 16:57:58 -0800 +Subject: [PATCH 573/703] drm/v3d: Add more tracepoints for V3D GPU rendering. + +The core scheduler tells us when the job is pushed to the scheduler's +queue, and I had the job_run functions saying when they actually queue +the job to the hardware. By adding tracepoints for the very top of +the ioctls and the IRQs signaling job completion, "perf record -a -e +v3d:.\* -e gpu_scheduler:.\* ; perf script" gets you a pretty +decent timeline. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20181201005759.28093-5-eric@anholt.net +Reviewed-by: Dave Emett +(cherry picked from commit 55a9b74846ed5e6219c7d81a8e1bf96f25d8ad5e) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 4 ++ + drivers/gpu/drm/v3d/v3d_irq.c | 19 +++++- + drivers/gpu/drm/v3d/v3d_trace.h | 101 ++++++++++++++++++++++++++++++++ + 3 files changed, 121 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -521,6 +521,8 @@ v3d_submit_cl_ioctl(struct drm_device *d + struct drm_syncobj *sync_out; + int ret = 0; + ++ trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end); ++ + if (args->pad != 0) { + DRM_INFO("pad must be zero: %d\n", args->pad); + return -EINVAL; +@@ -648,6 +650,8 @@ v3d_submit_tfu_ioctl(struct drm_device * + int ret = 0; + int bo_count; + ++ trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia); ++ + job = kcalloc(1, sizeof(*job), GFP_KERNEL); + if (!job) + return -ENOMEM; +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -15,6 +15,7 @@ + + #include "v3d_drv.h" + #include "v3d_regs.h" ++#include "v3d_trace.h" + + #define V3D_CORE_IRQS ((u32)(V3D_INT_OUTOMEM | \ + V3D_INT_FLDONE | \ +@@ -88,12 +89,20 @@ v3d_irq(int irq, void *arg) + } + + if (intsts & V3D_INT_FLDONE) { +- dma_fence_signal(v3d->bin_job->bin.done_fence); ++ struct v3d_fence *fence = ++ to_v3d_fence(v3d->bin_job->bin.done_fence); ++ ++ trace_v3d_bcl_irq(&v3d->drm, fence->seqno); ++ dma_fence_signal(&fence->base); + status = IRQ_HANDLED; + } + + if (intsts & V3D_INT_FRDONE) { +- dma_fence_signal(v3d->render_job->render.done_fence); ++ struct v3d_fence *fence = ++ to_v3d_fence(v3d->render_job->render.done_fence); ++ ++ trace_v3d_rcl_irq(&v3d->drm, fence->seqno); ++ dma_fence_signal(&fence->base); + status = IRQ_HANDLED; + } + +@@ -119,7 +128,11 @@ v3d_hub_irq(int irq, void *arg) + V3D_WRITE(V3D_HUB_INT_CLR, intsts); + + if (intsts & V3D_HUB_INT_TFUC) { +- dma_fence_signal(v3d->tfu_job->done_fence); ++ struct v3d_fence *fence = ++ to_v3d_fence(v3d->tfu_job->done_fence); ++ ++ trace_v3d_tfu_irq(&v3d->drm, fence->seqno); ++ dma_fence_signal(&fence->base); + status = IRQ_HANDLED; + } + +--- a/drivers/gpu/drm/v3d/v3d_trace.h ++++ b/drivers/gpu/drm/v3d/v3d_trace.h +@@ -12,6 +12,28 @@ + #define TRACE_SYSTEM v3d + #define TRACE_INCLUDE_FILE v3d_trace + ++TRACE_EVENT(v3d_submit_cl_ioctl, ++ TP_PROTO(struct drm_device *dev, u32 ct1qba, u32 ct1qea), ++ TP_ARGS(dev, ct1qba, ct1qea), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u32, ct1qba) ++ __field(u32, ct1qea) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->ct1qba = ct1qba; ++ __entry->ct1qea = ct1qea; ++ ), ++ ++ TP_printk("dev=%u, RCL 0x%08x..0x%08x", ++ __entry->dev, ++ __entry->ct1qba, ++ __entry->ct1qea) ++); ++ + TRACE_EVENT(v3d_submit_cl, + TP_PROTO(struct drm_device *dev, bool is_render, + uint64_t seqno, +@@ -42,6 +64,85 @@ TRACE_EVENT(v3d_submit_cl, + __entry->ctnqea) + ); + ++TRACE_EVENT(v3d_bcl_irq, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ ++TRACE_EVENT(v3d_rcl_irq, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ ++TRACE_EVENT(v3d_tfu_irq, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ ++TRACE_EVENT(v3d_submit_tfu_ioctl, ++ TP_PROTO(struct drm_device *dev, u32 iia), ++ TP_ARGS(dev, iia), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u32, iia) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->iia = iia; ++ ), ++ ++ TP_printk("dev=%u, IIA 0x%08x", ++ __entry->dev, ++ __entry->iia) ++); ++ + TRACE_EVENT(v3d_submit_tfu, + TP_PROTO(struct drm_device *dev, + uint64_t seqno), diff --git a/target/linux/brcm2708/patches-4.19/950-0574-drm-v3d-Drop-unused-v3d_flush_caches.patch b/target/linux/brcm2708/patches-4.19/950-0574-drm-v3d-Drop-unused-v3d_flush_caches.patch new file mode 100644 index 000000000..74d060a3e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0574-drm-v3d-Drop-unused-v3d_flush_caches.patch @@ -0,0 +1,64 @@ +From b9b60a044a52d5de6e9bc6c6703e2ac8cb7cc9c5 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 3 Dec 2018 14:24:34 -0800 +Subject: [PATCH 574/703] drm/v3d: Drop unused v3d_flush_caches(). + +Now that I've specified how the end-of-pipeline flushing should work, +we're never going to use this function. + +Signed-off-by: Eric Anholt +Reviewed-by: Dave Emett +Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-2-eric@anholt.net +(cherry picked from commit 2aa34fd5c7754824cf5488b61ac644f30d3c5c85) +--- + drivers/gpu/drm/v3d/v3d_drv.h | 1 - + drivers/gpu/drm/v3d/v3d_gem.c | 21 --------------------- + 2 files changed, 22 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -308,7 +308,6 @@ void v3d_exec_put(struct v3d_exec_info * + void v3d_tfu_job_put(struct v3d_tfu_job *exec); + void v3d_reset(struct v3d_dev *v3d); + void v3d_invalidate_caches(struct v3d_dev *v3d); +-void v3d_flush_caches(struct v3d_dev *v3d); + + /* v3d_irq.c */ + int v3d_irq_init(struct v3d_dev *v3d); +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -175,20 +175,6 @@ v3d_invalidate_slices(struct v3d_dev *v3 + V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC)); + } + +-/* Invalidates texture L2 cachelines */ +-static void +-v3d_invalidate_l2t(struct v3d_dev *v3d, int core) +-{ +- V3D_CORE_WRITE(core, +- V3D_CTL_L2TCACTL, +- V3D_L2TCACTL_L2TFLS | +- V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAR, V3D_L2TCACTL_FLM)); +- if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & +- V3D_L2TCACTL_L2TFLS), 100)) { +- DRM_ERROR("Timeout waiting for L2T invalidate\n"); +- } +-} +- + void + v3d_invalidate_caches(struct v3d_dev *v3d) + { +@@ -199,13 +185,6 @@ v3d_invalidate_caches(struct v3d_dev *v3 + v3d_flush_l2t(v3d, 0); + } + +-void +-v3d_flush_caches(struct v3d_dev *v3d) +-{ +- v3d_invalidate_l1td(v3d, 0); +- v3d_invalidate_l2t(v3d, 0); +-} +- + static void + v3d_attach_object_fences(struct v3d_bo **bos, int bo_count, + struct dma_fence *fence) diff --git a/target/linux/brcm2708/patches-4.19/950-0575-drm-v3d-Don-t-bother-flushing-L1TD-at-job-start.patch b/target/linux/brcm2708/patches-4.19/950-0575-drm-v3d-Don-t-bother-flushing-L1TD-at-job-start.patch new file mode 100644 index 000000000..2070a7186 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0575-drm-v3d-Don-t-bother-flushing-L1TD-at-job-start.patch @@ -0,0 +1,43 @@ +From 7b8186de594a27954c909cd8a9ad1ac2cc27a526 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 3 Dec 2018 14:24:35 -0800 +Subject: [PATCH 575/703] drm/v3d: Don't bother flushing L1TD at job start. + +This is the write combiner for TMU writes. You're supposed to flush +that at job end if you had dirtied any cachelines. Flushing it at job +start then doesn't make any sense. + +Signed-off-by: Eric Anholt +Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+") +Reviewed-by: Dave Emett +Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-3-eric@anholt.net +(cherry picked from commit 2e6dc3bd80478212e84addf1cafd6ec60674b884) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 12 ------------ + 1 file changed, 12 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -139,22 +139,10 @@ v3d_invalidate_l2(struct v3d_dev *v3d, i + V3D_L2CACTL_L2CENA); + } + +-static void +-v3d_invalidate_l1td(struct v3d_dev *v3d, int core) +-{ +- V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF); +- if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & +- V3D_L2TCACTL_L2TFLS), 100)) { +- DRM_ERROR("Timeout waiting for L1T write combiner flush\n"); +- } +-} +- + /* Invalidates texture L2 cachelines */ + static void + v3d_flush_l2t(struct v3d_dev *v3d, int core) + { +- v3d_invalidate_l1td(v3d, core); +- + V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, + V3D_L2TCACTL_L2TFLS | + V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM)); diff --git a/target/linux/brcm2708/patches-4.19/950-0576-drm-v3d-Drop-the-wait-for-L2T-flush-to-complete.patch b/target/linux/brcm2708/patches-4.19/950-0576-drm-v3d-Drop-the-wait-for-L2T-flush-to-complete.patch new file mode 100644 index 000000000..12da8c5da --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0576-drm-v3d-Drop-the-wait-for-L2T-flush-to-complete.patch @@ -0,0 +1,41 @@ +From 6820b2b01d69ac316786570a592cc32efc559a0e Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 3 Dec 2018 14:24:36 -0800 +Subject: [PATCH 576/703] drm/v3d: Drop the wait for L2T flush to complete. + +According to Dave, once you've started an L2T flush, all L2T accesses +will be blocked until the flush completes. This fixes a consistent +3-4ms stall between the ioctl and running the job, and 3DMMES Taiji +goes from 27fps to 110fps. + +v2: Leave a note about why we don't need to wait for completion. + +Signed-off-by: Eric Anholt +Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+") +Reviewed-by: Dave Emett +Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-4-eric@anholt.net +(cherry picked from commit 51c1b6f9eb3dbdec91b0e3c89f623e634c996bbb) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -143,13 +143,13 @@ v3d_invalidate_l2(struct v3d_dev *v3d, i + static void + v3d_flush_l2t(struct v3d_dev *v3d, int core) + { ++ /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't ++ * need to wait for completion before dispatching the job -- ++ * L2T accesses will be stalled until the flush has completed. ++ */ + V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, + V3D_L2TCACTL_L2TFLS | + V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM)); +- if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & +- V3D_L2TCACTL_L2TFLS), 100)) { +- DRM_ERROR("Timeout waiting for L2T flush\n"); +- } + } + + /* Invalidates the slice caches. These are read-only caches. */ diff --git a/target/linux/brcm2708/patches-4.19/950-0577-drm-v3d-Stop-trying-to-flush-L2C-on-V3D-3.3.patch b/target/linux/brcm2708/patches-4.19/950-0577-drm-v3d-Stop-trying-to-flush-L2C-on-V3D-3.3.patch new file mode 100644 index 000000000..e07738c36 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0577-drm-v3d-Stop-trying-to-flush-L2C-on-V3D-3.3.patch @@ -0,0 +1,45 @@ +From 861449c481eaa203998a4298d81b2fba6b34f543 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 3 Dec 2018 14:24:37 -0800 +Subject: [PATCH 577/703] drm/v3d: Stop trying to flush L2C on V3D 3.3+ + +This cache was replaced with the slice accessing the L2T in the newer +generations. Noted by Dave during review. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-5-eric@anholt.net +Reviewed-by: Dave Emett +(cherry picked from commit 7b9d2fe4350a9c12f66ad8cc78c1098226f6c3c2) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -130,10 +130,15 @@ v3d_flush_l3(struct v3d_dev *v3d) + } + } + +-/* Invalidates the (read-only) L2 cache. */ ++/* Invalidates the (read-only) L2C cache. This was the L2 cache for ++ * uniforms and instructions on V3D 3.2. ++ */ + static void +-v3d_invalidate_l2(struct v3d_dev *v3d, int core) ++v3d_invalidate_l2c(struct v3d_dev *v3d, int core) + { ++ if (v3d->ver > 32) ++ return; ++ + V3D_CORE_WRITE(core, V3D_CTL_L2CACTL, + V3D_L2CACTL_L2CCLR | + V3D_L2CACTL_L2CENA); +@@ -168,7 +173,7 @@ v3d_invalidate_caches(struct v3d_dev *v3 + { + v3d_flush_l3(v3d); + +- v3d_invalidate_l2(v3d, 0); ++ v3d_invalidate_l2c(v3d, 0); + v3d_invalidate_slices(v3d, 0); + v3d_flush_l2t(v3d, 0); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0578-drm-v3d-Invalidate-the-caches-from-the-outside-in.patch b/target/linux/brcm2708/patches-4.19/950-0578-drm-v3d-Invalidate-the-caches-from-the-outside-in.patch new file mode 100644 index 000000000..cb9d8411b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0578-drm-v3d-Invalidate-the-caches-from-the-outside-in.patch @@ -0,0 +1,36 @@ +From 022131a879deb883f4fbbbd7b5887ae6b2738172 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 3 Dec 2018 14:24:38 -0800 +Subject: [PATCH 578/703] drm/v3d: Invalidate the caches from the outside in. + +This would be a fairly obscure race, but let's make sure we don't ever +lose it. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-6-eric@anholt.net +Reviewed-by: Dave Emett +(cherry picked from commit aa5beec32e8b78bfcf621e3c3daebfb1644b6365) +--- + drivers/gpu/drm/v3d/v3d_gem.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -171,11 +171,15 @@ v3d_invalidate_slices(struct v3d_dev *v3 + void + v3d_invalidate_caches(struct v3d_dev *v3d) + { ++ /* Invalidate the caches from the outside in. That way if ++ * another CL's concurrent use of nearby memory were to pull ++ * an invalidated cacheline back in, we wouldn't leave stale ++ * data in the inner cache. ++ */ + v3d_flush_l3(v3d); +- + v3d_invalidate_l2c(v3d, 0); +- v3d_invalidate_slices(v3d, 0); + v3d_flush_l2t(v3d, 0); ++ v3d_invalidate_slices(v3d, 0); + } + + static void diff --git a/target/linux/brcm2708/patches-4.19/950-0579-drm-v3d-Fix-BO-stats-accounting-for-dma-buf-imported.patch b/target/linux/brcm2708/patches-4.19/950-0579-drm-v3d-Fix-BO-stats-accounting-for-dma-buf-imported.patch new file mode 100644 index 000000000..992804293 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0579-drm-v3d-Fix-BO-stats-accounting-for-dma-buf-imported.patch @@ -0,0 +1,40 @@ +From cc4f39930d6d1cf396c3a1f6fa45696582247ee6 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 7 Feb 2019 15:26:13 -0800 +Subject: [PATCH 579/703] drm/v3d: Fix BO stats accounting for dma-buf-imported + buffers. + +We always decrement at GEM free, so make sure we increment at GEM +creation for dma-bufs. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20190207232613.24981-1-eric@anholt.net +Reviewed-by: Daniel Vetter +Signed-off-by: Maxime Ripard +(cherry picked from commit cc3f60cfd4f2752f1bad7eaa3839855c15347abc) +--- + drivers/gpu/drm/v3d/v3d_bo.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_bo.c ++++ b/drivers/gpu/drm/v3d/v3d_bo.c +@@ -282,6 +282,7 @@ v3d_prime_import_sg_table(struct drm_dev + struct dma_buf_attachment *attach, + struct sg_table *sgt) + { ++ struct v3d_dev *v3d = to_v3d_dev(dev); + struct drm_gem_object *obj; + struct v3d_bo *bo; + +@@ -296,6 +297,11 @@ v3d_prime_import_sg_table(struct drm_dev + obj->import_attach = attach; + v3d_bo_get_pages(bo); + ++ mutex_lock(&v3d->bo_lock); ++ v3d->bo_stats.num_allocated++; ++ v3d->bo_stats.pages_allocated += obj->size >> PAGE_SHIFT; ++ mutex_unlock(&v3d->bo_lock); ++ + v3d_mmu_insert_ptes(bo); + + return obj; diff --git a/target/linux/brcm2708/patches-4.19/950-0580-drm-v3d-Update-top-level-kerneldoc-for-the-addition-.patch b/target/linux/brcm2708/patches-4.19/950-0580-drm-v3d-Update-top-level-kerneldoc-for-the-addition-.patch new file mode 100644 index 000000000..e9f8299d9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0580-drm-v3d-Update-top-level-kerneldoc-for-the-addition-.patch @@ -0,0 +1,30 @@ +From e4759dbb9968baee8a35bf2f165f6096be6aac00 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 7 Feb 2019 12:09:58 -0800 +Subject: [PATCH 580/703] drm/v3d: Update top-level kerneldoc for the addition + of TFU. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20190207201001.5730-1-eric@anholt.net +Reviewed-by: Thomas Spurden +Signed-off-by: Maxime Ripard +(cherry picked from commit fd347df16d4ed2eef565344b8f16a1134bddf185) +--- + drivers/gpu/drm/v3d/v3d_drv.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -7,9 +7,9 @@ + * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs. + * For V3D 2.x support, see the VC4 driver. + * +- * Currently only single-core rendering using the binner and renderer +- * is supported. The TFU (texture formatting unit) and V3D 4.x's CSD +- * (compute shader dispatch) are not yet supported. ++ * Currently only single-core rendering using the binner and renderer, ++ * along with TFU (texture formatting unit) rendering is supported. ++ * V3D 4.x's CSD (compute shader dispatch) is not yet supported. + */ + + #include diff --git a/target/linux/brcm2708/patches-4.19/950-0581-drm-vc4-Fix-oops-at-boot-with-firmwarekms-on-4.19.patch b/target/linux/brcm2708/patches-4.19/950-0581-drm-vc4-Fix-oops-at-boot-with-firmwarekms-on-4.19.patch new file mode 100644 index 000000000..624177db9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0581-drm-vc4-Fix-oops-at-boot-with-firmwarekms-on-4.19.patch @@ -0,0 +1,22 @@ +From 88066d8b4bd16fb094b74447684f474dd84092a9 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 4 Mar 2019 11:59:34 -0800 +Subject: [PATCH 581/703] drm/vc4: Fix oops at boot with firmwarekms on 4.19. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_kms.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -107,6 +107,9 @@ vc4_ctm_commit(struct vc4_dev *vc4, stru + struct vc4_ctm_state *ctm_state = to_vc4_ctm_state(vc4->ctm_manager.state); + struct drm_color_ctm *ctm = ctm_state->ctm; + ++ if (vc4->firmware_kms) ++ return; ++ + if (ctm_state->fifo) { + HVS_WRITE(SCALER_OLEDCOEF2, + VC4_SET_FIELD(vc4_ctm_s31_32_to_s0_9(ctm->matrix[0]), diff --git a/target/linux/brcm2708/patches-4.19/950-0582-drm-vc4-Disable-V3D-interactions-if-the-v3d-componen.patch b/target/linux/brcm2708/patches-4.19/950-0582-drm-vc4-Disable-V3D-interactions-if-the-v3d-componen.patch new file mode 100644 index 000000000..e7afa725b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0582-drm-vc4-Disable-V3D-interactions-if-the-v3d-componen.patch @@ -0,0 +1,167 @@ +From 00f06424b180f1f6a3f52df718eae07c36fc72e5 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 20 Feb 2019 13:03:41 -0800 +Subject: [PATCH 582/703] drm/vc4: Disable V3D interactions if the v3d + component didn't probe. + +One might want to use the VC4 display stack without using Mesa. +Similar to the debugfs fixes for not having all of the possible +display bits enabled, make sure you can't oops in vc4 if v3d isn't +enabled. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_drv.c | 11 +++++++++++ + drivers/gpu/drm/vc4/vc4_gem.c | 10 ++++++++++ + drivers/gpu/drm/vc4/vc4_irq.c | 9 +++++++++ + drivers/gpu/drm/vc4/vc4_perfmon.c | 18 ++++++++++++++++++ + 4 files changed, 48 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_drv.c ++++ b/drivers/gpu/drm/vc4/vc4_drv.c +@@ -71,6 +71,9 @@ static int vc4_get_param_ioctl(struct dr + if (args->pad != 0) + return -EINVAL; + ++ if (!vc4->v3d) ++ return -EINVAL; ++ + switch (args->param) { + case DRM_VC4_PARAM_V3D_IDENT0: + ret = pm_runtime_get_sync(&vc4->v3d->pdev->dev); +@@ -271,6 +274,7 @@ static int vc4_drm_bind(struct device *d + struct platform_device *pdev = to_platform_device(dev); + struct drm_device *drm; + struct vc4_dev *vc4; ++ struct device_node *node; + int ret = 0; + + dev->coherent_dma_mask = DMA_BIT_MASK(32); +@@ -279,6 +283,13 @@ static int vc4_drm_bind(struct device *d + if (!vc4) + return -ENOMEM; + ++ /* If VC4 V3D is missing, don't advertise render nodes. */ ++ node = of_find_compatible_node(NULL, NULL, "brcm,bcm2835-v3d"); ++ if (node) ++ of_node_put(node); ++ else ++ vc4_drm_driver.driver_features &= ~DRIVER_RENDER; ++ + drm = drm_dev_alloc(&vc4_drm_driver, dev); + if (IS_ERR(drm)) + return PTR_ERR(drm); +--- a/drivers/gpu/drm/vc4/vc4_gem.c ++++ b/drivers/gpu/drm/vc4/vc4_gem.c +@@ -74,6 +74,11 @@ vc4_get_hang_state_ioctl(struct drm_devi + u32 i; + int ret = 0; + ++ if (!vc4->v3d) { ++ DRM_DEBUG("VC4_GET_HANG_STATE with no VC4 V3D probed\n"); ++ return -EINVAL; ++ } ++ + spin_lock_irqsave(&vc4->job_lock, irqflags); + kernel_state = vc4->hang_state; + if (!kernel_state) { +@@ -1124,6 +1129,11 @@ vc4_submit_cl_ioctl(struct drm_device *d + struct dma_fence *in_fence; + int ret = 0; + ++ if (!vc4->v3d) { ++ DRM_DEBUG("VC4_SUBMIT_CL with no VC4 V3D probed\n"); ++ return -EINVAL; ++ } ++ + if ((args->flags & ~(VC4_SUBMIT_CL_USE_CLEAR_COLOR | + VC4_SUBMIT_CL_FIXED_RCL_ORDER | + VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X | +--- a/drivers/gpu/drm/vc4/vc4_irq.c ++++ b/drivers/gpu/drm/vc4/vc4_irq.c +@@ -229,6 +229,9 @@ vc4_irq_preinstall(struct drm_device *de + { + struct vc4_dev *vc4 = to_vc4_dev(dev); + ++ if (!vc4->v3d) ++ return; ++ + init_waitqueue_head(&vc4->job_wait_queue); + INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work); + +@@ -243,6 +246,9 @@ vc4_irq_postinstall(struct drm_device *d + { + struct vc4_dev *vc4 = to_vc4_dev(dev); + ++ if (!vc4->v3d) ++ return 0; ++ + /* Enable both the render done and out of memory interrupts. */ + V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS); + +@@ -254,6 +260,9 @@ vc4_irq_uninstall(struct drm_device *dev + { + struct vc4_dev *vc4 = to_vc4_dev(dev); + ++ if (!vc4->v3d) ++ return; ++ + /* Disable sending interrupts for our driver's IRQs. */ + V3D_WRITE(V3D_INTDIS, V3D_DRIVER_IRQS); + +--- a/drivers/gpu/drm/vc4/vc4_perfmon.c ++++ b/drivers/gpu/drm/vc4/vc4_perfmon.c +@@ -100,12 +100,18 @@ void vc4_perfmon_close_file(struct vc4_f + int vc4_perfmon_create_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) + { ++ struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_file *vc4file = file_priv->driver_priv; + struct drm_vc4_perfmon_create *req = data; + struct vc4_perfmon *perfmon; + unsigned int i; + int ret; + ++ if (!vc4->v3d) { ++ DRM_DEBUG("Creating perfmon no VC4 V3D probed\n"); ++ return -EINVAL; ++ } ++ + /* Number of monitored counters cannot exceed HW limits. */ + if (req->ncounters > DRM_VC4_MAX_PERF_COUNTERS || + !req->ncounters) +@@ -146,10 +152,16 @@ int vc4_perfmon_create_ioctl(struct drm_ + int vc4_perfmon_destroy_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) + { ++ struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_file *vc4file = file_priv->driver_priv; + struct drm_vc4_perfmon_destroy *req = data; + struct vc4_perfmon *perfmon; + ++ if (!vc4->v3d) { ++ DRM_DEBUG("Destroying perfmon no VC4 V3D probed\n"); ++ return -EINVAL; ++ } ++ + mutex_lock(&vc4file->perfmon.lock); + perfmon = idr_remove(&vc4file->perfmon.idr, req->id); + mutex_unlock(&vc4file->perfmon.lock); +@@ -164,11 +176,17 @@ int vc4_perfmon_destroy_ioctl(struct drm + int vc4_perfmon_get_values_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) + { ++ struct vc4_dev *vc4 = to_vc4_dev(dev); + struct vc4_file *vc4file = file_priv->driver_priv; + struct drm_vc4_perfmon_get_values *req = data; + struct vc4_perfmon *perfmon; + int ret; + ++ if (!vc4->v3d) { ++ DRM_DEBUG("Getting perfmon no VC4 V3D probed\n"); ++ return -EINVAL; ++ } ++ + mutex_lock(&vc4file->perfmon.lock); + perfmon = idr_find(&vc4file->perfmon.idr, req->id); + vc4_perfmon_get(perfmon); diff --git a/target/linux/brcm2708/patches-4.19/950-0583-drm-v3d-Add-support-for-V3D-v4.2.patch b/target/linux/brcm2708/patches-4.19/950-0583-drm-v3d-Add-support-for-V3D-v4.2.patch new file mode 100644 index 000000000..b84f333b4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0583-drm-v3d-Add-support-for-V3D-v4.2.patch @@ -0,0 +1,207 @@ +From 8169ec547bf6719c89c3ed88f9884bb9dd84479d Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 4 Oct 2018 17:22:43 -0700 +Subject: [PATCH 583/703] drm/v3d: Add support for V3D v4.2. + +No compatible string for it yet, just the version-dependent changes. +They've now tied the hub and the core interrupt lines into a single +interrupt line coming out of the block. It also turns out I made a +mistake in modeling the V3D v3.3 and v4.1 bridge as a part of V3D +itself -- the bridge is going away in favor of an external reset +controller in a larger HW module. + +v2: Use consistent checks for whether we're on 4.2, and fix a leak in + an error path. +v3: Use more general means of determining if the current 4.2 changes + are in place, as apparently other platforms may switch back (noted + by Dave). Update the binding doc. + +Signed-off-by: Eric Anholt +--- + .../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 11 ++++-- + drivers/gpu/drm/v3d/v3d_drv.c | 21 +++++++++--- + drivers/gpu/drm/v3d/v3d_drv.h | 2 ++ + drivers/gpu/drm/v3d/v3d_gem.c | 12 ++++++- + drivers/gpu/drm/v3d/v3d_irq.c | 34 ++++++++++++++----- + 5 files changed, 63 insertions(+), 17 deletions(-) + +--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt ++++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt +@@ -6,15 +6,20 @@ For V3D 2.x, see brcm,bcm-vc4.txt. + Required properties: + - compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d" + - reg: Physical base addresses and lengths of the register areas +-- reg-names: Names for the register areas. The "hub", "bridge", and "core0" ++- reg-names: Names for the register areas. The "hub" and "core0" + register areas are always required. The "gca" register area +- is required if the GCA cache controller is present. ++ is required if the GCA cache controller is present. The ++ "bridge" register area is required if an external reset ++ controller is not present. + - interrupts: The interrupt numbers. The first interrupt is for the hub, +- while the following interrupts are for the cores. ++ while the following interrupts are separate interrupt lines ++ for the cores (if they don't share the hub's interrupt). + See bindings/interrupt-controller/interrupts.txt + + Optional properties: + - clocks: The core clock the unit runs on ++- resets: The reset line for v3d, if not using a mapping of the bridge ++ See bindings/reset/reset.txt + + v3d { + compatible = "brcm,7268-v3d"; +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -265,10 +266,6 @@ static int v3d_platform_drm_probe(struct + v3d->pdev = pdev; + drm = &v3d->drm; + +- ret = map_regs(v3d, &v3d->bridge_regs, "bridge"); +- if (ret) +- goto dev_free; +- + ret = map_regs(v3d, &v3d->hub_regs, "hub"); + if (ret) + goto dev_free; +@@ -283,6 +280,22 @@ static int v3d_platform_drm_probe(struct + v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES); + WARN_ON(v3d->cores > 1); /* multicore not yet implemented */ + ++ v3d->reset = devm_reset_control_get_exclusive(dev, NULL); ++ if (IS_ERR(v3d->reset)) { ++ ret = PTR_ERR(v3d->reset); ++ ++ if (ret == -EPROBE_DEFER) ++ goto dev_free; ++ ++ v3d->reset = NULL; ++ ret = map_regs(v3d, &v3d->bridge_regs, "bridge"); ++ if (ret) { ++ dev_err(dev, ++ "Failed to get reset control or bridge regs\n"); ++ goto dev_free; ++ } ++ } ++ + if (v3d->ver < 41) { + ret = map_regs(v3d, &v3d->gca_regs, "gca"); + if (ret) +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -34,6 +34,7 @@ struct v3d_dev { + * and revision. + */ + int ver; ++ bool single_irq_line; + + struct device *dev; + struct platform_device *pdev; +@@ -42,6 +43,7 @@ struct v3d_dev { + void __iomem *bridge_regs; + void __iomem *gca_regs; + struct clk *clk; ++ struct reset_control *reset; + + /* Virtual and DMA addresses of the single shared page table. */ + volatile u32 *pt; +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -69,7 +70,7 @@ v3d_idle_gca(struct v3d_dev *v3d) + } + + static void +-v3d_reset_v3d(struct v3d_dev *v3d) ++v3d_reset_by_bridge(struct v3d_dev *v3d) + { + int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION); + +@@ -89,6 +90,15 @@ v3d_reset_v3d(struct v3d_dev *v3d) + V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT); + V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0); + } ++} ++ ++static void ++v3d_reset_v3d(struct v3d_dev *v3d) ++{ ++ if (v3d->reset) ++ reset_control_reset(v3d->reset); ++ else ++ v3d_reset_by_bridge(v3d); + + v3d_init_hw_state(v3d); + } +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -27,6 +27,9 @@ + V3D_HUB_INT_MMU_CAP | \ + V3D_HUB_INT_TFUC)) + ++static irqreturn_t ++v3d_hub_irq(int irq, void *arg); ++ + static void + v3d_overflow_mem_work(struct work_struct *work) + { +@@ -112,6 +115,12 @@ v3d_irq(int irq, void *arg) + if (intsts & V3D_INT_GMPV) + dev_err(v3d->dev, "GMP violation\n"); + ++ /* V3D 4.2 wires the hub and core IRQs together, so if we & ++ * didn't see the common one then check hub for MMU IRQs. ++ */ ++ if (v3d->single_irq_line && status == IRQ_NONE) ++ return v3d_hub_irq(irq, arg); ++ + return status; + } + +@@ -170,15 +179,22 @@ v3d_irq_init(struct v3d_dev *v3d) + V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS); + V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS); + +- ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), +- v3d_hub_irq, IRQF_SHARED, +- "v3d_hub", v3d); +- if (ret) +- goto fail; +- +- ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 1), +- v3d_irq, IRQF_SHARED, +- "v3d_core0", v3d); ++ if (platform_get_irq(v3d->pdev, 1) < 0) { ++ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), ++ v3d_irq, IRQF_SHARED, ++ "v3d", v3d); ++ v3d->single_irq_line = true; ++ } else { ++ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), ++ v3d_hub_irq, IRQF_SHARED, ++ "v3d_hub", v3d); ++ if (ret) ++ goto fail; ++ ++ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 1), ++ v3d_irq, IRQF_SHARED, ++ "v3d_core0", v3d); ++ } + if (ret) + goto fail; + diff --git a/target/linux/brcm2708/patches-4.19/950-0584-drm-v3d-Don-t-try-to-set-OVRTMUOUT-on-V3D-4.x.patch b/target/linux/brcm2708/patches-4.19/950-0584-drm-v3d-Don-t-try-to-set-OVRTMUOUT-on-V3D-4.x.patch new file mode 100644 index 000000000..d65ffb926 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0584-drm-v3d-Don-t-try-to-set-OVRTMUOUT-on-V3D-4.x.patch @@ -0,0 +1,42 @@ +From d4b98e9e78d87fe34b89077b9776a66f19d23856 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 16 Oct 2018 10:13:41 -0700 +Subject: [PATCH 584/703] drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x. + +The old field is gone and the register now has a different field, +QRMAXCNT for how many TMU requests get serviced before thread switch. +We were accidentally reducing it from its default of 0x3 (4 requests) +to 0x0 (1). + +v2: Skip setting the reg at all on 4.x, instead of trying to update + only the old field. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_gem.c | 3 ++- + drivers/gpu/drm/v3d/v3d_regs.h | 2 ++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -25,7 +25,8 @@ v3d_init_core(struct v3d_dev *v3d, int c + * type. If you want the default behavior, you can still put + * "2" in the indirect texture state's output_type field. + */ +- V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT); ++ if (v3d->ver < 40) ++ V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT); + + /* Whenever we flush the L2T cache, we always want to flush + * the whole thing. +--- a/drivers/gpu/drm/v3d/v3d_regs.h ++++ b/drivers/gpu/drm/v3d/v3d_regs.h +@@ -216,6 +216,8 @@ + # define V3D_IDENT2_BCG_INT BIT(28) + + #define V3D_CTL_MISCCFG 0x00018 ++# define V3D_CTL_MISCCFG_QRMAXCNT_MASK V3D_MASK(3, 1) ++# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT 1 + # define V3D_MISCCFG_OVRTMUOUT BIT(0) + + #define V3D_CTL_L2CACTL 0x00020 diff --git a/target/linux/brcm2708/patches-4.19/950-0585-drm-v3d-Make-sure-the-GPU-is-on-when-measuring-clock.patch b/target/linux/brcm2708/patches-4.19/950-0585-drm-v3d-Make-sure-the-GPU-is-on-when-measuring-clock.patch new file mode 100644 index 000000000..7daa2043f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0585-drm-v3d-Make-sure-the-GPU-is-on-when-measuring-clock.patch @@ -0,0 +1,38 @@ +From 51a1e9604fdd215581d7974a185809b1ac93adac Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 14 Jan 2019 17:26:04 -0800 +Subject: [PATCH 585/703] drm/v3d: Make sure the GPU is on when measuring + clocks. + +You'll get garbage measurements if the registers always read back +0xdeadbeef + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_debugfs.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_debugfs.c ++++ b/drivers/gpu/drm/v3d/v3d_debugfs.c +@@ -187,6 +187,11 @@ static int v3d_measure_clock(struct seq_ + uint32_t cycles; + int core = 0; + int measure_ms = 1000; ++ int ret; ++ ++ ret = pm_runtime_get_sync(v3d->dev); ++ if (ret < 0) ++ return ret; + + if (v3d->ver >= 40) { + V3D_CORE_WRITE(core, V3D_V4_PCTR_0_SRC_0_3, +@@ -210,6 +215,9 @@ static int v3d_measure_clock(struct seq_ + cycles / (measure_ms * 1000), + (cycles / (measure_ms * 100)) % 10); + ++ pm_runtime_mark_last_busy(v3d->dev); ++ pm_runtime_put_autosuspend(v3d->dev); ++ + return 0; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0586-drm-v3d-Add-support-for-2711.patch b/target/linux/brcm2708/patches-4.19/950-0586-drm-v3d-Add-support-for-2711.patch new file mode 100644 index 000000000..ad1ef90c3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0586-drm-v3d-Add-support-for-2711.patch @@ -0,0 +1,20 @@ +From 2990828736d42f8308e9ef4e5ca0e8165c952eea Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 4 Oct 2018 17:22:43 -0700 +Subject: [PATCH 586/703] drm/v3d: Add support for 2711. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_drv.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -235,6 +235,7 @@ static struct drm_driver v3d_drm_driver + static const struct of_device_id v3d_of_match[] = { + { .compatible = "brcm,7268-v3d" }, + { .compatible = "brcm,7278-v3d" }, ++ { .compatible = "brcm,2711-v3d" }, + {}, + }; + MODULE_DEVICE_TABLE(of, v3d_of_match); diff --git a/target/linux/brcm2708/patches-4.19/950-0587-drm-v3d-Skip-MMU-flush-if-the-device-is-currently-of.patch b/target/linux/brcm2708/patches-4.19/950-0587-drm-v3d-Skip-MMU-flush-if-the-device-is-currently-of.patch new file mode 100644 index 000000000..01c64d2c4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0587-drm-v3d-Skip-MMU-flush-if-the-device-is-currently-of.patch @@ -0,0 +1,52 @@ +From 2e3f1f0991163004ea441307ab52ce4ea3e068d7 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 14 Jan 2019 12:35:43 -0800 +Subject: [PATCH 587/703] drm/v3d: Skip MMU flush if the device is currently + off. + +If it's off, we know it will be reset on poweron, so the MMU won't +have any TLB cached from before this point. Avoids failed waits for +MMU flush to reply. + +Signed-off-by: Eric Anholt +(cherry picked from commit 3ee4e2e0a9e9587eacbb69b067bbc72ab2cdc47b) +--- + drivers/gpu/drm/v3d/v3d_mmu.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_mmu.c ++++ b/drivers/gpu/drm/v3d/v3d_mmu.c +@@ -18,6 +18,8 @@ + * each client. This is not yet implemented. + */ + ++#include ++ + #include "v3d_drv.h" + #include "v3d_regs.h" + +@@ -34,6 +36,14 @@ static int v3d_mmu_flush_all(struct v3d_ + { + int ret; + ++ /* Keep power on the device on until we're done with this ++ * call, but skip the flush if the device is off and will be ++ * reset when powered back on. ++ */ ++ ret = pm_runtime_get_if_in_use(v3d->dev); ++ if (ret == 0) ++ return 0; ++ + /* Make sure that another flush isn't already running when we + * start this one. + */ +@@ -61,6 +71,9 @@ static int v3d_mmu_flush_all(struct v3d_ + if (ret) + dev_err(v3d->dev, "MMUC flush wait idle failed\n"); + ++ pm_runtime_mark_last_busy(v3d->dev); ++ pm_runtime_put_autosuspend(v3d->dev); ++ + return ret; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0588-drm-v3d-Hook-up-the-runtime-PM-ops.patch b/target/linux/brcm2708/patches-4.19/950-0588-drm-v3d-Hook-up-the-runtime-PM-ops.patch new file mode 100644 index 000000000..8c0cdf496 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0588-drm-v3d-Hook-up-the-runtime-PM-ops.patch @@ -0,0 +1,34 @@ +From ee17d7708bdf44fb3e04045c661b317245d90c1a Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 14 Jan 2019 14:47:57 -0800 +Subject: [PATCH 588/703] drm/v3d: Hook up the runtime PM ops. + +In translating the runtime PM code from vc4, I missed the ".pm" +assignment to actually connect them up. Fixes missing MMU setup if +runtime PM resets V3D. + +Signed-off-by: Eric Anholt +(cherry picked from commit ca197699af29baa8236c74c53d4904ca8957ee06) +--- + drivers/gpu/drm/v3d/v3d_drv.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -66,7 +66,7 @@ static int v3d_runtime_resume(struct dev + } + #endif + +-static const struct dev_pm_ops v3d_v3d_pm_ops = { ++static const struct dev_pm_ops v3d_pm_ops = { + SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL) + }; + +@@ -371,6 +371,7 @@ static struct platform_driver v3d_platfo + .driver = { + .name = "v3d", + .of_match_table = v3d_of_match, ++ .pm = &v3d_pm_ops, + }, + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0589-drm-v3d-HACK-gut-runtime-pm-for-now.patch b/target/linux/brcm2708/patches-4.19/950-0589-drm-v3d-HACK-gut-runtime-pm-for-now.patch new file mode 100644 index 000000000..e87e3ba46 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0589-drm-v3d-HACK-gut-runtime-pm-for-now.patch @@ -0,0 +1,172 @@ +From f5ba2c027e3f21bafcbff13ec513d6a10c8dc585 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 14 Jan 2019 15:13:17 -0800 +Subject: [PATCH 589/703] drm/v3d: HACK: gut runtime pm for now. + +Something is still unstable -- on starting a new glxgears from an idle +X11, I get an MMU violation in high addresses. The CTS also failed +quite quickly. With this, CTS progresses for an hour before OOMing +(allocating some big buffers when my board only has 600MB available to +Linux) + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_debugfs.c | 16 +--------------- + drivers/gpu/drm/v3d/v3d_drv.c | 7 ------- + drivers/gpu/drm/v3d/v3d_gem.c | 20 -------------------- + 3 files changed, 1 insertion(+), 42 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_debugfs.c ++++ b/drivers/gpu/drm/v3d/v3d_debugfs.c +@@ -4,7 +4,6 @@ + #include + #include + #include +-#include + #include + #include + +@@ -100,11 +99,8 @@ static int v3d_v3d_debugfs_ident(struct + struct drm_device *dev = node->minor->dev; + struct v3d_dev *v3d = to_v3d_dev(dev); + u32 ident0, ident1, ident2, ident3, cores; +- int ret, core; ++ int core; + +- ret = pm_runtime_get_sync(v3d->dev); +- if (ret < 0) +- return ret; + + ident0 = V3D_READ(V3D_HUB_IDENT0); + ident1 = V3D_READ(V3D_HUB_IDENT1); +@@ -157,9 +153,6 @@ static int v3d_v3d_debugfs_ident(struct + (misccfg & V3D_MISCCFG_OVRTMUOUT) != 0); + } + +- pm_runtime_mark_last_busy(v3d->dev); +- pm_runtime_put_autosuspend(v3d->dev); +- + return 0; + } + +@@ -187,11 +180,6 @@ static int v3d_measure_clock(struct seq_ + uint32_t cycles; + int core = 0; + int measure_ms = 1000; +- int ret; +- +- ret = pm_runtime_get_sync(v3d->dev); +- if (ret < 0) +- return ret; + + if (v3d->ver >= 40) { + V3D_CORE_WRITE(core, V3D_V4_PCTR_0_SRC_0_3, +@@ -215,8 +203,6 @@ static int v3d_measure_clock(struct seq_ + cycles / (measure_ms * 1000), + (cycles / (measure_ms * 100)) % 10); + +- pm_runtime_mark_last_busy(v3d->dev); +- pm_runtime_put_autosuspend(v3d->dev); + + return 0; + } +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -75,7 +75,6 @@ static int v3d_get_param_ioctl(struct dr + { + struct v3d_dev *v3d = to_v3d_dev(dev); + struct drm_v3d_get_param *args = data; +- int ret; + static const u32 reg_map[] = { + [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG, + [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1, +@@ -101,15 +100,12 @@ static int v3d_get_param_ioctl(struct dr + if (args->value != 0) + return -EINVAL; + +- ret = pm_runtime_get_sync(v3d->dev); + if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 && + args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) { + args->value = V3D_CORE_READ(0, offset); + } else { + args->value = V3D_READ(offset); + } +- pm_runtime_mark_last_busy(v3d->dev); +- pm_runtime_put_autosuspend(v3d->dev); + return 0; + } + +@@ -311,9 +307,6 @@ static int v3d_platform_drm_probe(struct + goto dev_free; + } + +- pm_runtime_use_autosuspend(dev); +- pm_runtime_set_autosuspend_delay(dev, 50); +- pm_runtime_enable(dev); + + ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev); + if (ret) +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -375,7 +375,6 @@ v3d_exec_cleanup(struct kref *ref) + { + struct v3d_exec_info *exec = container_of(ref, struct v3d_exec_info, + refcount); +- struct v3d_dev *v3d = exec->v3d; + unsigned int i; + struct v3d_bo *bo, *save; + +@@ -396,9 +395,6 @@ v3d_exec_cleanup(struct kref *ref) + drm_gem_object_put_unlocked(&bo->base); + } + +- pm_runtime_mark_last_busy(v3d->dev); +- pm_runtime_put_autosuspend(v3d->dev); +- + kfree(exec); + } + +@@ -412,7 +408,6 @@ v3d_tfu_job_cleanup(struct kref *ref) + { + struct v3d_tfu_job *job = container_of(ref, struct v3d_tfu_job, + refcount); +- struct v3d_dev *v3d = job->v3d; + unsigned int i; + + dma_fence_put(job->in_fence); +@@ -423,9 +418,6 @@ v3d_tfu_job_cleanup(struct kref *ref) + drm_gem_object_put_unlocked(&job->bo[i]->base); + } + +- pm_runtime_mark_last_busy(v3d->dev); +- pm_runtime_put_autosuspend(v3d->dev); +- + kfree(job); + } + +@@ -519,12 +511,6 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (!exec) + return -ENOMEM; + +- ret = pm_runtime_get_sync(v3d->dev); +- if (ret < 0) { +- kfree(exec); +- return ret; +- } +- + kref_init(&exec->refcount); + + ret = drm_syncobj_find_fence(file_priv, args->in_sync_bcl, +@@ -643,12 +629,6 @@ v3d_submit_tfu_ioctl(struct drm_device * + if (!job) + return -ENOMEM; + +- ret = pm_runtime_get_sync(v3d->dev); +- if (ret < 0) { +- kfree(job); +- return ret; +- } +- + kref_init(&job->refcount); + + ret = drm_syncobj_find_fence(file_priv, args->in_sync, diff --git a/target/linux/brcm2708/patches-4.19/950-0590-drm-v3d-Update-to-upstream-IRQ-code.patch b/target/linux/brcm2708/patches-4.19/950-0590-drm-v3d-Update-to-upstream-IRQ-code.patch new file mode 100644 index 000000000..2cb16a97e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0590-drm-v3d-Update-to-upstream-IRQ-code.patch @@ -0,0 +1,59 @@ +From 97f75af520bb5c124641b0704ebbd171f80d0bfb Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 12 Mar 2019 09:08:10 -0700 +Subject: [PATCH 590/703] drm/v3d: Update to upstream IRQ code. + +--- + drivers/gpu/drm/v3d/v3d_irq.c | 25 +++++++++++++++---------- + 1 file changed, 15 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -168,7 +168,7 @@ v3d_hub_irq(int irq, void *arg) + int + v3d_irq_init(struct v3d_dev *v3d) + { +- int ret, core; ++ int irq1, ret, core; + + INIT_WORK(&v3d->overflow_mem_work, v3d_overflow_mem_work); + +@@ -179,24 +179,29 @@ v3d_irq_init(struct v3d_dev *v3d) + V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS); + V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS); + +- if (platform_get_irq(v3d->pdev, 1) < 0) { +- ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), ++ irq1 = platform_get_irq(v3d->pdev, 1); ++ if (irq1 == -EPROBE_DEFER) ++ return irq1; ++ if (irq1 > 0) { ++ ret = devm_request_irq(v3d->dev, irq1, + v3d_irq, IRQF_SHARED, +- "v3d", v3d); +- v3d->single_irq_line = true; +- } else { ++ "v3d_core0", v3d); ++ if (ret) ++ goto fail; + ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), + v3d_hub_irq, IRQF_SHARED, + "v3d_hub", v3d); + if (ret) + goto fail; ++ } else { ++ v3d->single_irq_line = true; + +- ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 1), ++ ret = devm_request_irq(v3d->dev, platform_get_irq(v3d->pdev, 0), + v3d_irq, IRQF_SHARED, +- "v3d_core0", v3d); ++ "v3d", v3d); ++ if (ret) ++ goto fail; + } +- if (ret) +- goto fail; + + v3d_irq_enable(v3d); + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0591-drm-v3d-Rename-the-fence-signaled-from-IRQs-to-irq_f.patch b/target/linux/brcm2708/patches-4.19/950-0591-drm-v3d-Rename-the-fence-signaled-from-IRQs-to-irq_f.patch new file mode 100644 index 000000000..c77ec0b1a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0591-drm-v3d-Rename-the-fence-signaled-from-IRQs-to-irq_f.patch @@ -0,0 +1,117 @@ +From ee870243ebbf7a8a7c5a8c24259a8c37be16b507 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 27 Dec 2018 14:04:44 -0800 +Subject: [PATCH 591/703] drm/v3d: Rename the fence signaled from IRQs to + "irq_fence". + +We have another thing called the "done fence" that tracks when the +scheduler considers the job done, and having the shared name was +confusing. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_drv.h | 4 ++-- + drivers/gpu/drm/v3d/v3d_gem.c | 6 +++--- + drivers/gpu/drm/v3d/v3d_irq.c | 6 +++--- + drivers/gpu/drm/v3d/v3d_sched.c | 12 ++++++------ + 4 files changed, 14 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -182,7 +182,7 @@ struct v3d_job { + struct dma_fence *in_fence; + + /* v3d fence to be signaled by IRQ handler when the job is complete. */ +- struct dma_fence *done_fence; ++ struct dma_fence *irq_fence; + + /* GPU virtual addresses of the start/end of the CL job. */ + u32 start, end; +@@ -229,7 +229,7 @@ struct v3d_tfu_job { + struct dma_fence *in_fence; + + /* v3d fence to be signaled by IRQ handler when the job is complete. */ +- struct dma_fence *done_fence; ++ struct dma_fence *irq_fence; + + struct v3d_dev *v3d; + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -381,8 +381,8 @@ v3d_exec_cleanup(struct kref *ref) + dma_fence_put(exec->bin.in_fence); + dma_fence_put(exec->render.in_fence); + +- dma_fence_put(exec->bin.done_fence); +- dma_fence_put(exec->render.done_fence); ++ dma_fence_put(exec->bin.irq_fence); ++ dma_fence_put(exec->render.irq_fence); + + dma_fence_put(exec->bin_done_fence); + dma_fence_put(exec->render_done_fence); +@@ -411,7 +411,7 @@ v3d_tfu_job_cleanup(struct kref *ref) + unsigned int i; + + dma_fence_put(job->in_fence); +- dma_fence_put(job->done_fence); ++ dma_fence_put(job->irq_fence); + + for (i = 0; i < ARRAY_SIZE(job->bo); i++) { + if (job->bo[i]) +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -93,7 +93,7 @@ v3d_irq(int irq, void *arg) + + if (intsts & V3D_INT_FLDONE) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->bin_job->bin.done_fence); ++ to_v3d_fence(v3d->bin_job->bin.irq_fence); + + trace_v3d_bcl_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +@@ -102,7 +102,7 @@ v3d_irq(int irq, void *arg) + + if (intsts & V3D_INT_FRDONE) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->render_job->render.done_fence); ++ to_v3d_fence(v3d->render_job->render.irq_fence); + + trace_v3d_rcl_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +@@ -138,7 +138,7 @@ v3d_hub_irq(int irq, void *arg) + + if (intsts & V3D_HUB_INT_TFUC) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->tfu_job->done_fence); ++ to_v3d_fence(v3d->tfu_job->irq_fence); + + trace_v3d_tfu_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -152,9 +152,9 @@ static struct dma_fence *v3d_job_run(str + if (IS_ERR(fence)) + return NULL; + +- if (job->done_fence) +- dma_fence_put(job->done_fence); +- job->done_fence = dma_fence_get(fence); ++ if (job->irq_fence) ++ dma_fence_put(job->irq_fence); ++ job->irq_fence = dma_fence_get(fence); + + trace_v3d_submit_cl(dev, q == V3D_RENDER, to_v3d_fence(fence)->seqno, + job->start, job->end); +@@ -195,9 +195,9 @@ v3d_tfu_job_run(struct drm_sched_job *sc + return NULL; + + v3d->tfu_job = job; +- if (job->done_fence) +- dma_fence_put(job->done_fence); +- job->done_fence = dma_fence_get(fence); ++ if (job->irq_fence) ++ dma_fence_put(job->irq_fence); ++ job->irq_fence = dma_fence_get(fence); + + trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno); + diff --git a/target/linux/brcm2708/patches-4.19/950-0592-drm-v3d-Refactor-job-management.patch b/target/linux/brcm2708/patches-4.19/950-0592-drm-v3d-Refactor-job-management.patch new file mode 100644 index 000000000..355509ba6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0592-drm-v3d-Refactor-job-management.patch @@ -0,0 +1,1104 @@ +From fe5b0a576fd25f7929e553cd11d98959af808525 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 27 Dec 2018 12:11:52 -0800 +Subject: [PATCH 592/703] drm/v3d: Refactor job management. + +The CL submission had two jobs embedded in an exec struct. When I +added TFU support, I had to replicate some of the exec stuff and some +of the job stuff. As I went to add CSD, it became clear that actually +what was in exec should just be in the two CL jobs, and it would let +us share a lot more code between the 4 queues. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_drv.h | 77 ++++---- + drivers/gpu/drm/v3d/v3d_gem.c | 331 +++++++++++++++++--------------- + drivers/gpu/drm/v3d/v3d_irq.c | 8 +- + drivers/gpu/drm/v3d/v3d_sched.c | 264 ++++++++++++++----------- + 4 files changed, 373 insertions(+), 307 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -67,8 +67,8 @@ struct v3d_dev { + + struct work_struct overflow_mem_work; + +- struct v3d_exec_info *bin_job; +- struct v3d_exec_info *render_job; ++ struct v3d_bin_job *bin_job; ++ struct v3d_render_job *render_job; + struct v3d_tfu_job *tfu_job; + + struct v3d_queue_state queue[V3D_MAX_QUEUES]; +@@ -132,7 +132,7 @@ struct v3d_bo { + struct list_head vmas; /* list of v3d_vma */ + + /* List entry for the BO's position in +- * v3d_exec_info->unref_list ++ * v3d_render_job->unref_list + */ + struct list_head unref_head; + +@@ -176,7 +176,15 @@ to_v3d_fence(struct dma_fence *fence) + struct v3d_job { + struct drm_sched_job base; + +- struct v3d_exec_info *exec; ++ struct kref refcount; ++ ++ struct v3d_dev *v3d; ++ ++ /* This is the array of BOs that were looked up at the start ++ * of submission. ++ */ ++ struct v3d_bo **bo; ++ u32 bo_count; + + /* An optional fence userspace can pass in for the job to depend on. */ + struct dma_fence *in_fence; +@@ -184,59 +192,53 @@ struct v3d_job { + /* v3d fence to be signaled by IRQ handler when the job is complete. */ + struct dma_fence *irq_fence; + ++ /* scheduler fence for when the job is considered complete and ++ * the BO reservations can be released. ++ */ ++ struct dma_fence *done_fence; ++ ++ /* Callback for the freeing of the job on refcount going to 0. */ ++ void (*free)(struct kref *ref); ++}; ++ ++struct v3d_bin_job { ++ struct v3d_job base; ++ + /* GPU virtual addresses of the start/end of the CL job. */ + u32 start, end; + + u32 timedout_ctca, timedout_ctra; +-}; + +-struct v3d_exec_info { +- struct v3d_dev *v3d; ++ /* Corresponding render job, for attaching our overflow memory. */ ++ struct v3d_render_job *render; ++ ++ /* Submitted tile memory allocation start/size, tile state. */ ++ u32 qma, qms, qts; ++}; + +- struct v3d_job bin, render; ++struct v3d_render_job { ++ struct v3d_job base; + +- /* Fence for when the scheduler considers the binner to be +- * done, for render to depend on. ++ /* Optional fence for the binner, to depend on before starting ++ * our job. + */ + struct dma_fence *bin_done_fence; + +- /* Fence for when the scheduler considers the render to be +- * done, for when the BOs reservations should be complete. +- */ +- struct dma_fence *render_done_fence; +- +- struct kref refcount; ++ /* GPU virtual addresses of the start/end of the CL job. */ ++ u32 start, end; + +- /* This is the array of BOs that were looked up at the start of exec. */ +- struct v3d_bo **bo; +- u32 bo_count; ++ u32 timedout_ctca, timedout_ctra; + + /* List of overflow BOs used in the job that need to be + * released once the job is complete. + */ + struct list_head unref_list; +- +- /* Submitted tile memory allocation start/size, tile state. */ +- u32 qma, qms, qts; + }; + + struct v3d_tfu_job { +- struct drm_sched_job base; ++ struct v3d_job base; + + struct drm_v3d_submit_tfu args; +- +- /* An optional fence userspace can pass in for the job to depend on. */ +- struct dma_fence *in_fence; +- +- /* v3d fence to be signaled by IRQ handler when the job is complete. */ +- struct dma_fence *irq_fence; +- +- struct v3d_dev *v3d; +- +- struct kref refcount; +- +- /* This is the array of BOs that were looked up at the start of exec. */ +- struct v3d_bo *bo[4]; + }; + + /** +@@ -306,8 +308,7 @@ int v3d_submit_tfu_ioctl(struct drm_devi + struct drm_file *file_priv); + int v3d_wait_bo_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); +-void v3d_exec_put(struct v3d_exec_info *exec); +-void v3d_tfu_job_put(struct v3d_tfu_job *exec); ++void v3d_job_put(struct v3d_job *job); + void v3d_reset(struct v3d_dev *v3d); + void v3d_invalidate_caches(struct v3d_dev *v3d); + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -293,11 +293,11 @@ retry: + } + + /** +- * v3d_cl_lookup_bos() - Sets up exec->bo[] with the GEM objects ++ * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects + * referenced by the job. + * @dev: DRM device + * @file_priv: DRM file for this fd +- * @exec: V3D job being set up ++ * @job: V3D job being set up + * + * The command validator needs to reference BOs by their index within + * the submitted job's BO list. This does the validation of the job's +@@ -307,18 +307,19 @@ retry: + * failure, because that will happen at v3d_exec_cleanup() time. + */ + static int +-v3d_cl_lookup_bos(struct drm_device *dev, +- struct drm_file *file_priv, +- struct drm_v3d_submit_cl *args, +- struct v3d_exec_info *exec) ++v3d_lookup_bos(struct drm_device *dev, ++ struct drm_file *file_priv, ++ struct v3d_job *job, ++ u64 bo_handles, ++ u32 bo_count) + { + u32 *handles; + int ret = 0; + int i; + +- exec->bo_count = args->bo_handle_count; ++ job->bo_count = bo_count; + +- if (!exec->bo_count) { ++ if (!job->bo_count) { + /* See comment on bo_index for why we have to check + * this. + */ +@@ -326,15 +327,15 @@ v3d_cl_lookup_bos(struct drm_device *dev + return -EINVAL; + } + +- exec->bo = kvmalloc_array(exec->bo_count, +- sizeof(struct drm_gem_cma_object *), +- GFP_KERNEL | __GFP_ZERO); +- if (!exec->bo) { ++ job->bo = kvmalloc_array(job->bo_count, ++ sizeof(struct drm_gem_cma_object *), ++ GFP_KERNEL | __GFP_ZERO); ++ if (!job->bo) { + DRM_DEBUG("Failed to allocate validated BO pointers\n"); + return -ENOMEM; + } + +- handles = kvmalloc_array(exec->bo_count, sizeof(u32), GFP_KERNEL); ++ handles = kvmalloc_array(job->bo_count, sizeof(u32), GFP_KERNEL); + if (!handles) { + ret = -ENOMEM; + DRM_DEBUG("Failed to allocate incoming GEM handles\n"); +@@ -342,15 +343,15 @@ v3d_cl_lookup_bos(struct drm_device *dev + } + + if (copy_from_user(handles, +- (void __user *)(uintptr_t)args->bo_handles, +- exec->bo_count * sizeof(u32))) { ++ (void __user *)(uintptr_t)bo_handles, ++ job->bo_count * sizeof(u32))) { + ret = -EFAULT; + DRM_DEBUG("Failed to copy in GEM handles\n"); + goto fail; + } + + spin_lock(&file_priv->table_lock); +- for (i = 0; i < exec->bo_count; i++) { ++ for (i = 0; i < job->bo_count; i++) { + struct drm_gem_object *bo = idr_find(&file_priv->object_idr, + handles[i]); + if (!bo) { +@@ -361,7 +362,7 @@ v3d_cl_lookup_bos(struct drm_device *dev + goto fail; + } + drm_gem_object_get(bo); +- exec->bo[i] = to_v3d_bo(bo); ++ job->bo[i] = to_v3d_bo(bo); + } + spin_unlock(&file_priv->table_lock); + +@@ -371,59 +372,41 @@ fail: + } + + static void +-v3d_exec_cleanup(struct kref *ref) ++v3d_job_free(struct kref *ref) + { +- struct v3d_exec_info *exec = container_of(ref, struct v3d_exec_info, +- refcount); +- unsigned int i; +- struct v3d_bo *bo, *save; +- +- dma_fence_put(exec->bin.in_fence); +- dma_fence_put(exec->render.in_fence); +- +- dma_fence_put(exec->bin.irq_fence); +- dma_fence_put(exec->render.irq_fence); +- +- dma_fence_put(exec->bin_done_fence); +- dma_fence_put(exec->render_done_fence); +- +- for (i = 0; i < exec->bo_count; i++) +- drm_gem_object_put_unlocked(&exec->bo[i]->base); +- kvfree(exec->bo); ++ struct v3d_job *job = container_of(ref, struct v3d_job, refcount); ++ int i; + +- list_for_each_entry_safe(bo, save, &exec->unref_list, unref_head) { +- drm_gem_object_put_unlocked(&bo->base); ++ for (i = 0; i < job->bo_count; i++) { ++ if (job->bo[i]) ++ drm_gem_object_put_unlocked(&job->bo[i]->base); + } ++ kvfree(job->bo); + +- kfree(exec); +-} ++ dma_fence_put(job->in_fence); ++ dma_fence_put(job->irq_fence); ++ dma_fence_put(job->done_fence); + +-void v3d_exec_put(struct v3d_exec_info *exec) +-{ +- kref_put(&exec->refcount, v3d_exec_cleanup); ++ kfree(job); + } + + static void +-v3d_tfu_job_cleanup(struct kref *ref) ++v3d_render_job_free(struct kref *ref) + { +- struct v3d_tfu_job *job = container_of(ref, struct v3d_tfu_job, +- refcount); +- unsigned int i; +- +- dma_fence_put(job->in_fence); +- dma_fence_put(job->irq_fence); ++ struct v3d_render_job *job = container_of(ref, struct v3d_render_job, ++ base.refcount); ++ struct v3d_bo *bo, *save; + +- for (i = 0; i < ARRAY_SIZE(job->bo); i++) { +- if (job->bo[i]) +- drm_gem_object_put_unlocked(&job->bo[i]->base); ++ list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) { ++ drm_gem_object_put_unlocked(&bo->base); + } + +- kfree(job); ++ v3d_job_free(ref); + } + +-void v3d_tfu_job_put(struct v3d_tfu_job *job) ++void v3d_job_put(struct v3d_job *job) + { +- kref_put(&job->refcount, v3d_tfu_job_cleanup); ++ kref_put(&job->refcount, job->free); + } + + int +@@ -476,6 +459,65 @@ v3d_wait_bo_ioctl(struct drm_device *dev + return ret; + } + ++static int ++v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv, ++ struct v3d_job *job, void (*free)(struct kref *ref), ++ u32 in_sync) ++{ ++ int ret; ++ ++ job->v3d = v3d; ++ job->free = free; ++ ++ ret = drm_syncobj_find_fence(file_priv, in_sync, 0, &job->in_fence); ++ if (ret == -EINVAL) ++ return ret; ++ ++ kref_init(&job->refcount); ++ ++ return 0; ++} ++ ++static int ++v3d_push_job(struct v3d_file_priv *v3d_priv, ++ struct v3d_job *job, enum v3d_queue queue) ++{ ++ int ret; ++ ++ ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue], ++ v3d_priv); ++ if (ret) ++ return ret; ++ ++ job->done_fence = dma_fence_get(&job->base.s_fence->finished); ++ ++ /* put by scheduler job completion */ ++ kref_get(&job->refcount); ++ ++ drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[queue]); ++ ++ return 0; ++} ++ ++static void ++v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv, ++ struct v3d_job *job, ++ struct ww_acquire_ctx *acquire_ctx, ++ u32 out_sync) ++{ ++ struct drm_syncobj *sync_out; ++ ++ v3d_attach_object_fences(job->bo, job->bo_count, job->done_fence); ++ v3d_unlock_bo_reservations(job->bo, job->bo_count, acquire_ctx); ++ ++ /* Update the return sync object for the job */ ++ sync_out = drm_syncobj_find(file_priv, out_sync); ++ if (sync_out) { ++ drm_syncobj_replace_fence(sync_out, job->done_fence); ++ drm_syncobj_put(sync_out); ++ } ++} ++ + /** + * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D. + * @dev: DRM device +@@ -495,9 +537,9 @@ v3d_submit_cl_ioctl(struct drm_device *d + struct v3d_dev *v3d = to_v3d_dev(dev); + struct v3d_file_priv *v3d_priv = file_priv->driver_priv; + struct drm_v3d_submit_cl *args = data; +- struct v3d_exec_info *exec; ++ struct v3d_bin_job *bin = NULL; ++ struct v3d_render_job *render; + struct ww_acquire_ctx acquire_ctx; +- struct drm_syncobj *sync_out; + int ret = 0; + + trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end); +@@ -507,95 +549,84 @@ v3d_submit_cl_ioctl(struct drm_device *d + return -EINVAL; + } + +- exec = kcalloc(1, sizeof(*exec), GFP_KERNEL); +- if (!exec) ++ render = kcalloc(1, sizeof(*render), GFP_KERNEL); ++ if (!render) + return -ENOMEM; + +- kref_init(&exec->refcount); ++ render->start = args->rcl_start; ++ render->end = args->rcl_end; ++ INIT_LIST_HEAD(&render->unref_list); + +- ret = drm_syncobj_find_fence(file_priv, args->in_sync_bcl, +- 0, &exec->bin.in_fence); +- if (ret == -EINVAL) +- goto fail; ++ ret = v3d_job_init(v3d, file_priv, &render->base, ++ v3d_render_job_free, args->in_sync_rcl); ++ if (ret) { ++ kfree(bin); ++ kfree(render); ++ return ret; ++ } + +- ret = drm_syncobj_find_fence(file_priv, args->in_sync_rcl, +- 0, &exec->render.in_fence); +- if (ret == -EINVAL) +- goto fail; ++ if (args->bcl_start != args->bcl_end) { ++ bin = kcalloc(1, sizeof(*bin), GFP_KERNEL); ++ if (!bin) ++ return -ENOMEM; ++ ++ ret = v3d_job_init(v3d, file_priv, &bin->base, ++ v3d_job_free, args->in_sync_bcl); ++ if (ret) { ++ v3d_job_put(&render->base); ++ return ret; ++ } + +- exec->qma = args->qma; +- exec->qms = args->qms; +- exec->qts = args->qts; +- exec->bin.exec = exec; +- exec->bin.start = args->bcl_start; +- exec->bin.end = args->bcl_end; +- exec->render.exec = exec; +- exec->render.start = args->rcl_start; +- exec->render.end = args->rcl_end; +- exec->v3d = v3d; +- INIT_LIST_HEAD(&exec->unref_list); ++ bin->start = args->bcl_start; ++ bin->end = args->bcl_end; ++ bin->qma = args->qma; ++ bin->qms = args->qms; ++ bin->qts = args->qts; ++ bin->render = render; ++ } + +- ret = v3d_cl_lookup_bos(dev, file_priv, args, exec); ++ ret = v3d_lookup_bos(dev, file_priv, &render->base, ++ args->bo_handles, args->bo_handle_count); + if (ret) + goto fail; + +- ret = v3d_lock_bo_reservations(exec->bo, exec->bo_count, ++ ret = v3d_lock_bo_reservations(render->base.bo, render->base.bo_count, + &acquire_ctx); + if (ret) + goto fail; + + mutex_lock(&v3d->sched_lock); +- if (exec->bin.start != exec->bin.end) { +- ret = drm_sched_job_init(&exec->bin.base, +- &v3d_priv->sched_entity[V3D_BIN], +- v3d_priv); ++ if (bin) { ++ ret = v3d_push_job(v3d_priv, &bin->base, V3D_BIN); + if (ret) + goto fail_unreserve; + +- exec->bin_done_fence = +- dma_fence_get(&exec->bin.base.s_fence->finished); +- +- kref_get(&exec->refcount); /* put by scheduler job completion */ +- drm_sched_entity_push_job(&exec->bin.base, +- &v3d_priv->sched_entity[V3D_BIN]); ++ render->bin_done_fence = dma_fence_get(bin->base.done_fence); + } + +- ret = drm_sched_job_init(&exec->render.base, +- &v3d_priv->sched_entity[V3D_RENDER], +- v3d_priv); ++ ret = v3d_push_job(v3d_priv, &render->base, V3D_RENDER); + if (ret) + goto fail_unreserve; +- +- exec->render_done_fence = +- dma_fence_get(&exec->render.base.s_fence->finished); +- +- kref_get(&exec->refcount); /* put by scheduler job completion */ +- drm_sched_entity_push_job(&exec->render.base, +- &v3d_priv->sched_entity[V3D_RENDER]); + mutex_unlock(&v3d->sched_lock); + +- v3d_attach_object_fences(exec->bo, exec->bo_count, +- exec->render_done_fence); +- +- v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx); +- +- /* Update the return sync object for the */ +- sync_out = drm_syncobj_find(file_priv, args->out_sync); +- if (sync_out) { +- drm_syncobj_replace_fence(sync_out, +- exec->render_done_fence); +- drm_syncobj_put(sync_out); +- } +- +- v3d_exec_put(exec); ++ v3d_attach_fences_and_unlock_reservation(file_priv, ++ &render->base, &acquire_ctx, ++ args->out_sync); ++ ++ if (bin) ++ v3d_job_put(&bin->base); ++ v3d_job_put(&render->base); + + return 0; + + fail_unreserve: + mutex_unlock(&v3d->sched_lock); +- v3d_unlock_bo_reservations(exec->bo, exec->bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(render->base.bo, ++ render->base.bo_count, &acquire_ctx); + fail: +- v3d_exec_put(exec); ++ if (bin) ++ v3d_job_put(&bin->base); ++ v3d_job_put(&render->base); + + return ret; + } +@@ -618,10 +649,7 @@ v3d_submit_tfu_ioctl(struct drm_device * + struct drm_v3d_submit_tfu *args = data; + struct v3d_tfu_job *job; + struct ww_acquire_ctx acquire_ctx; +- struct drm_syncobj *sync_out; +- struct dma_fence *sched_done_fence; + int ret = 0; +- int bo_count; + + trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia); + +@@ -629,75 +657,66 @@ v3d_submit_tfu_ioctl(struct drm_device * + if (!job) + return -ENOMEM; + +- kref_init(&job->refcount); +- +- ret = drm_syncobj_find_fence(file_priv, args->in_sync, +- 0, &job->in_fence); +- if (ret == -EINVAL) +- goto fail; ++ ret = v3d_job_init(v3d, file_priv, &job->base, ++ v3d_job_free, args->in_sync); ++ if (ret) { ++ kfree(job); ++ return ret; ++ } + ++ job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles), ++ sizeof(*job->base.bo), GFP_KERNEL); + job->args = *args; +- job->v3d = v3d; + + spin_lock(&file_priv->table_lock); +- for (bo_count = 0; bo_count < ARRAY_SIZE(job->bo); bo_count++) { ++ for (job->base.bo_count = 0; ++ job->base.bo_count < ARRAY_SIZE(args->bo_handles); ++ job->base.bo_count++) { + struct drm_gem_object *bo; + +- if (!args->bo_handles[bo_count]) ++ if (!args->bo_handles[job->base.bo_count]) + break; + + bo = idr_find(&file_priv->object_idr, +- args->bo_handles[bo_count]); ++ args->bo_handles[job->base.bo_count]); + if (!bo) { + DRM_DEBUG("Failed to look up GEM BO %d: %d\n", +- bo_count, args->bo_handles[bo_count]); ++ job->base.bo_count, ++ args->bo_handles[job->base.bo_count]); + ret = -ENOENT; + spin_unlock(&file_priv->table_lock); + goto fail; + } + drm_gem_object_get(bo); +- job->bo[bo_count] = to_v3d_bo(bo); ++ job->base.bo[job->base.bo_count] = to_v3d_bo(bo); + } + spin_unlock(&file_priv->table_lock); + +- ret = v3d_lock_bo_reservations(job->bo, bo_count, &acquire_ctx); ++ ret = v3d_lock_bo_reservations(job->base.bo, job->base.bo_count, ++ &acquire_ctx); + if (ret) + goto fail; + + mutex_lock(&v3d->sched_lock); +- ret = drm_sched_job_init(&job->base, +- &v3d_priv->sched_entity[V3D_TFU], +- v3d_priv); ++ ret = v3d_push_job(v3d_priv, &job->base, V3D_TFU); + if (ret) + goto fail_unreserve; +- +- sched_done_fence = dma_fence_get(&job->base.s_fence->finished); +- +- kref_get(&job->refcount); /* put by scheduler job completion */ +- drm_sched_entity_push_job(&job->base, &v3d_priv->sched_entity[V3D_TFU]); + mutex_unlock(&v3d->sched_lock); + +- v3d_attach_object_fences(job->bo, bo_count, sched_done_fence); +- +- v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx); +- +- /* Update the return sync object */ +- sync_out = drm_syncobj_find(file_priv, args->out_sync); +- if (sync_out) { +- drm_syncobj_replace_fence(sync_out, sched_done_fence); +- drm_syncobj_put(sync_out); +- } +- dma_fence_put(sched_done_fence); ++ v3d_attach_fences_and_unlock_reservation(file_priv, ++ &job->base, &acquire_ctx, ++ args->out_sync); + +- v3d_tfu_job_put(job); ++ v3d_job_put(&job->base); + + return 0; + + fail_unreserve: + mutex_unlock(&v3d->sched_lock); +- v3d_unlock_bo_reservations(job->bo, bo_count, &acquire_ctx); ++ v3d_unlock_bo_reservations(job->base.bo, job->base.bo_count, ++ &acquire_ctx); + fail: +- v3d_tfu_job_put(job); ++ v3d_job_put(&job->base); + + return ret; + } +@@ -755,7 +774,7 @@ v3d_gem_destroy(struct drm_device *dev) + + v3d_sched_fini(v3d); + +- /* Waiting for exec to finish would need to be done before ++ /* Waiting for jobs to finish would need to be done before + * unregistering V3D. + */ + WARN_ON(v3d->bin_job); +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -60,7 +60,7 @@ v3d_overflow_mem_work(struct work_struct + } + + drm_gem_object_get(&bo->base); +- list_add_tail(&bo->unref_head, &v3d->bin_job->unref_list); ++ list_add_tail(&bo->unref_head, &v3d->bin_job->render->unref_list); + spin_unlock_irqrestore(&v3d->job_lock, irqflags); + + V3D_CORE_WRITE(0, V3D_PTB_BPOA, bo->node.start << PAGE_SHIFT); +@@ -93,7 +93,7 @@ v3d_irq(int irq, void *arg) + + if (intsts & V3D_INT_FLDONE) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->bin_job->bin.irq_fence); ++ to_v3d_fence(v3d->bin_job->base.irq_fence); + + trace_v3d_bcl_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +@@ -102,7 +102,7 @@ v3d_irq(int irq, void *arg) + + if (intsts & V3D_INT_FRDONE) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->render_job->render.irq_fence); ++ to_v3d_fence(v3d->render_job->base.irq_fence); + + trace_v3d_rcl_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +@@ -138,7 +138,7 @@ v3d_hub_irq(int irq, void *arg) + + if (intsts & V3D_HUB_INT_TFUC) { + struct v3d_fence *fence = +- to_v3d_fence(v3d->tfu_job->irq_fence); ++ to_v3d_fence(v3d->tfu_job->base.irq_fence); + + trace_v3d_tfu_irq(&v3d->drm, fence->seqno); + dma_fence_signal(&fence->base); +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -30,39 +30,43 @@ to_v3d_job(struct drm_sched_job *sched_j + return container_of(sched_job, struct v3d_job, base); + } + +-static struct v3d_tfu_job * +-to_tfu_job(struct drm_sched_job *sched_job) ++static struct v3d_bin_job * ++to_bin_job(struct drm_sched_job *sched_job) + { +- return container_of(sched_job, struct v3d_tfu_job, base); ++ return container_of(sched_job, struct v3d_bin_job, base.base); + } + +-static void +-v3d_job_free(struct drm_sched_job *sched_job) ++static struct v3d_render_job * ++to_render_job(struct drm_sched_job *sched_job) + { +- struct v3d_job *job = to_v3d_job(sched_job); ++ return container_of(sched_job, struct v3d_render_job, base.base); ++} + +- v3d_exec_put(job->exec); ++static struct v3d_tfu_job * ++to_tfu_job(struct drm_sched_job *sched_job) ++{ ++ return container_of(sched_job, struct v3d_tfu_job, base.base); + } + + static void +-v3d_tfu_job_free(struct drm_sched_job *sched_job) ++v3d_job_free(struct drm_sched_job *sched_job) + { +- struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ struct v3d_job *job = to_v3d_job(sched_job); + +- v3d_tfu_job_put(job); ++ v3d_job_put(job); + } + + /** +- * Returns the fences that the bin or render job depends on, one by one. +- * v3d_job_run() won't be called until all of them have been signaled. ++ * Returns the fences that the job depends on, one by one. ++ * ++ * If placed in the scheduler's .dependency method, the corresponding ++ * .run_job won't be called until all of them have been signaled. + */ + static struct dma_fence * + v3d_job_dependency(struct drm_sched_job *sched_job, + struct drm_sched_entity *s_entity) + { + struct v3d_job *job = to_v3d_job(sched_job); +- struct v3d_exec_info *exec = job->exec; +- enum v3d_queue q = job == &exec->bin ? V3D_BIN : V3D_RENDER; + struct dma_fence *fence; + + fence = job->in_fence; +@@ -71,113 +75,132 @@ v3d_job_dependency(struct drm_sched_job + return fence; + } + +- if (q == V3D_RENDER) { +- /* If we had a bin job, the render job definitely depends on +- * it. We first have to wait for bin to be scheduled, so that +- * its done_fence is created. +- */ +- fence = exec->bin_done_fence; +- if (fence) { +- exec->bin_done_fence = NULL; +- return fence; +- } +- } +- +- /* XXX: Wait on a fence for switching the GMP if necessary, +- * and then do so. +- */ +- +- return fence; ++ return NULL; + } + + /** +- * Returns the fences that the TFU job depends on, one by one. +- * v3d_tfu_job_run() won't be called until all of them have been +- * signaled. ++ * Returns the fences that the render job depends on, one by one. ++ * v3d_job_run() won't be called until all of them have been signaled. + */ + static struct dma_fence * +-v3d_tfu_job_dependency(struct drm_sched_job *sched_job, +- struct drm_sched_entity *s_entity) ++v3d_render_job_dependency(struct drm_sched_job *sched_job, ++ struct drm_sched_entity *s_entity) + { +- struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ struct v3d_render_job *job = to_render_job(sched_job); + struct dma_fence *fence; + +- fence = job->in_fence; ++ fence = v3d_job_dependency(sched_job, s_entity); ++ if (fence) ++ return fence; ++ ++ /* If we had a bin job, the render job definitely depends on ++ * it. We first have to wait for bin to be scheduled, so that ++ * its done_fence is created. ++ */ ++ fence = job->bin_done_fence; + if (fence) { +- job->in_fence = NULL; ++ job->bin_done_fence = NULL; + return fence; + } + +- return NULL; ++ /* XXX: Wait on a fence for switching the GMP if necessary, ++ * and then do so. ++ */ ++ ++ return fence; + } + +-static struct dma_fence *v3d_job_run(struct drm_sched_job *sched_job) ++static struct dma_fence *v3d_bin_job_run(struct drm_sched_job *sched_job) + { +- struct v3d_job *job = to_v3d_job(sched_job); +- struct v3d_exec_info *exec = job->exec; +- enum v3d_queue q = job == &exec->bin ? V3D_BIN : V3D_RENDER; +- struct v3d_dev *v3d = exec->v3d; ++ struct v3d_bin_job *job = to_bin_job(sched_job); ++ struct v3d_dev *v3d = job->base.v3d; + struct drm_device *dev = &v3d->drm; + struct dma_fence *fence; + unsigned long irqflags; + +- if (unlikely(job->base.s_fence->finished.error)) ++ if (unlikely(job->base.base.s_fence->finished.error)) + return NULL; + + /* Lock required around bin_job update vs + * v3d_overflow_mem_work(). + */ + spin_lock_irqsave(&v3d->job_lock, irqflags); +- if (q == V3D_BIN) { +- v3d->bin_job = job->exec; ++ v3d->bin_job = job; ++ /* Clear out the overflow allocation, so we don't ++ * reuse the overflow attached to a previous job. ++ */ ++ V3D_CORE_WRITE(0, V3D_PTB_BPOS, 0); ++ spin_unlock_irqrestore(&v3d->job_lock, irqflags); ++ ++ v3d_invalidate_caches(v3d); + +- /* Clear out the overflow allocation, so we don't +- * reuse the overflow attached to a previous job. +- */ +- V3D_CORE_WRITE(0, V3D_PTB_BPOS, 0); +- } else { +- v3d->render_job = job->exec; ++ fence = v3d_fence_create(v3d, V3D_BIN); ++ if (IS_ERR(fence)) ++ return NULL; ++ ++ if (job->base.irq_fence) ++ dma_fence_put(job->base.irq_fence); ++ job->base.irq_fence = dma_fence_get(fence); ++ ++ trace_v3d_submit_cl(dev, false, to_v3d_fence(fence)->seqno, ++ job->start, job->end); ++ ++ /* Set the current and end address of the control list. ++ * Writing the end register is what starts the job. ++ */ ++ if (job->qma) { ++ V3D_CORE_WRITE(0, V3D_CLE_CT0QMA, job->qma); ++ V3D_CORE_WRITE(0, V3D_CLE_CT0QMS, job->qms); + } +- spin_unlock_irqrestore(&v3d->job_lock, irqflags); ++ if (job->qts) { ++ V3D_CORE_WRITE(0, V3D_CLE_CT0QTS, ++ V3D_CLE_CT0QTS_ENABLE | ++ job->qts); ++ } ++ V3D_CORE_WRITE(0, V3D_CLE_CT0QBA, job->start); ++ V3D_CORE_WRITE(0, V3D_CLE_CT0QEA, job->end); ++ ++ return fence; ++} ++ ++static struct dma_fence *v3d_render_job_run(struct drm_sched_job *sched_job) ++{ ++ struct v3d_render_job *job = to_render_job(sched_job); ++ struct v3d_dev *v3d = job->base.v3d; ++ struct drm_device *dev = &v3d->drm; ++ struct dma_fence *fence; ++ ++ if (unlikely(job->base.base.s_fence->finished.error)) ++ return NULL; + +- /* Can we avoid this flush when q==RENDER? We need to be +- * careful of scheduling, though -- imagine job0 rendering to +- * texture and job1 reading, and them being executed as bin0, +- * bin1, render0, render1, so that render1's flush at bin time ++ v3d->render_job = job; ++ ++ /* Can we avoid this flush? We need to be careful of ++ * scheduling, though -- imagine job0 rendering to texture and ++ * job1 reading, and them being executed as bin0, bin1, ++ * render0, render1, so that render1's flush at bin time + * wasn't enough. + */ + v3d_invalidate_caches(v3d); + +- fence = v3d_fence_create(v3d, q); ++ fence = v3d_fence_create(v3d, V3D_RENDER); + if (IS_ERR(fence)) + return NULL; + +- if (job->irq_fence) +- dma_fence_put(job->irq_fence); +- job->irq_fence = dma_fence_get(fence); ++ if (job->base.irq_fence) ++ dma_fence_put(job->base.irq_fence); ++ job->base.irq_fence = dma_fence_get(fence); + +- trace_v3d_submit_cl(dev, q == V3D_RENDER, to_v3d_fence(fence)->seqno, ++ trace_v3d_submit_cl(dev, true, to_v3d_fence(fence)->seqno, + job->start, job->end); + +- if (q == V3D_BIN) { +- if (exec->qma) { +- V3D_CORE_WRITE(0, V3D_CLE_CT0QMA, exec->qma); +- V3D_CORE_WRITE(0, V3D_CLE_CT0QMS, exec->qms); +- } +- if (exec->qts) { +- V3D_CORE_WRITE(0, V3D_CLE_CT0QTS, +- V3D_CLE_CT0QTS_ENABLE | +- exec->qts); +- } +- } else { +- /* XXX: Set the QCFG */ +- } ++ /* XXX: Set the QCFG */ + + /* Set the current and end address of the control list. + * Writing the end register is what starts the job. + */ +- V3D_CORE_WRITE(0, V3D_CLE_CTNQBA(q), job->start); +- V3D_CORE_WRITE(0, V3D_CLE_CTNQEA(q), job->end); ++ V3D_CORE_WRITE(0, V3D_CLE_CT1QBA, job->start); ++ V3D_CORE_WRITE(0, V3D_CLE_CT1QEA, job->end); + + return fence; + } +@@ -186,7 +209,7 @@ static struct dma_fence * + v3d_tfu_job_run(struct drm_sched_job *sched_job) + { + struct v3d_tfu_job *job = to_tfu_job(sched_job); +- struct v3d_dev *v3d = job->v3d; ++ struct v3d_dev *v3d = job->base.v3d; + struct drm_device *dev = &v3d->drm; + struct dma_fence *fence; + +@@ -195,9 +218,9 @@ v3d_tfu_job_run(struct drm_sched_job *sc + return NULL; + + v3d->tfu_job = job; +- if (job->irq_fence) +- dma_fence_put(job->irq_fence); +- job->irq_fence = dma_fence_get(fence); ++ if (job->base.irq_fence) ++ dma_fence_put(job->base.irq_fence); ++ job->base.irq_fence = dma_fence_get(fence); + + trace_v3d_submit_tfu(dev, to_v3d_fence(fence)->seqno); + +@@ -247,25 +270,23 @@ v3d_gpu_reset_for_timeout(struct v3d_dev + mutex_unlock(&v3d->reset_lock); + } + ++/* If the current address or return address have changed, then the GPU ++ * has probably made progress and we should delay the reset. This ++ * could fail if the GPU got in an infinite loop in the CL, but that ++ * is pretty unlikely outside of an i-g-t testcase. ++ */ + static void +-v3d_job_timedout(struct drm_sched_job *sched_job) ++v3d_cl_job_timedout(struct drm_sched_job *sched_job, enum v3d_queue q, ++ u32 *timedout_ctca, u32 *timedout_ctra) + { + struct v3d_job *job = to_v3d_job(sched_job); +- struct v3d_exec_info *exec = job->exec; +- struct v3d_dev *v3d = exec->v3d; +- enum v3d_queue job_q = job == &exec->bin ? V3D_BIN : V3D_RENDER; +- u32 ctca = V3D_CORE_READ(0, V3D_CLE_CTNCA(job_q)); +- u32 ctra = V3D_CORE_READ(0, V3D_CLE_CTNRA(job_q)); +- +- /* If the current address or return address have changed, then +- * the GPU has probably made progress and we should delay the +- * reset. This could fail if the GPU got in an infinite loop +- * in the CL, but that is pretty unlikely outside of an i-g-t +- * testcase. +- */ +- if (job->timedout_ctca != ctca || job->timedout_ctra != ctra) { +- job->timedout_ctca = ctca; +- job->timedout_ctra = ctra; ++ struct v3d_dev *v3d = job->v3d; ++ u32 ctca = V3D_CORE_READ(0, V3D_CLE_CTNCA(q)); ++ u32 ctra = V3D_CORE_READ(0, V3D_CLE_CTNRA(q)); ++ ++ if (*timedout_ctca != ctca || *timedout_ctra != ctra) { ++ *timedout_ctca = ctca; ++ *timedout_ctra = ctra; + schedule_delayed_work(&job->base.work_tdr, + job->base.sched->timeout); + return; +@@ -275,25 +296,50 @@ v3d_job_timedout(struct drm_sched_job *s + } + + static void ++v3d_bin_job_timedout(struct drm_sched_job *sched_job) ++{ ++ struct v3d_bin_job *job = to_bin_job(sched_job); ++ ++ v3d_cl_job_timedout(sched_job, V3D_BIN, ++ &job->timedout_ctca, &job->timedout_ctra); ++} ++ ++static void ++v3d_render_job_timedout(struct drm_sched_job *sched_job) ++{ ++ struct v3d_render_job *job = to_render_job(sched_job); ++ ++ v3d_cl_job_timedout(sched_job, V3D_RENDER, ++ &job->timedout_ctca, &job->timedout_ctra); ++} ++ ++static void + v3d_tfu_job_timedout(struct drm_sched_job *sched_job) + { +- struct v3d_tfu_job *job = to_tfu_job(sched_job); ++ struct v3d_job *job = to_v3d_job(sched_job); + + v3d_gpu_reset_for_timeout(job->v3d, sched_job); + } + +-static const struct drm_sched_backend_ops v3d_sched_ops = { ++static const struct drm_sched_backend_ops v3d_bin_sched_ops = { + .dependency = v3d_job_dependency, +- .run_job = v3d_job_run, +- .timedout_job = v3d_job_timedout, +- .free_job = v3d_job_free ++ .run_job = v3d_bin_job_run, ++ .timedout_job = v3d_bin_job_timedout, ++ .free_job = v3d_job_free, ++}; ++ ++static const struct drm_sched_backend_ops v3d_render_sched_ops = { ++ .dependency = v3d_render_job_dependency, ++ .run_job = v3d_render_job_run, ++ .timedout_job = v3d_render_job_timedout, ++ .free_job = v3d_job_free, + }; + + static const struct drm_sched_backend_ops v3d_tfu_sched_ops = { +- .dependency = v3d_tfu_job_dependency, ++ .dependency = v3d_job_dependency, + .run_job = v3d_tfu_job_run, + .timedout_job = v3d_tfu_job_timedout, +- .free_job = v3d_tfu_job_free ++ .free_job = v3d_job_free, + }; + + int +@@ -305,7 +351,7 @@ v3d_sched_init(struct v3d_dev *v3d) + int ret; + + ret = drm_sched_init(&v3d->queue[V3D_BIN].sched, +- &v3d_sched_ops, ++ &v3d_bin_sched_ops, + hw_jobs_limit, job_hang_limit, + msecs_to_jiffies(hang_limit_ms), + "v3d_bin"); +@@ -315,7 +361,7 @@ v3d_sched_init(struct v3d_dev *v3d) + } + + ret = drm_sched_init(&v3d->queue[V3D_RENDER].sched, +- &v3d_sched_ops, ++ &v3d_render_sched_ops, + hw_jobs_limit, job_hang_limit, + msecs_to_jiffies(hang_limit_ms), + "v3d_render"); diff --git a/target/linux/brcm2708/patches-4.19/950-0593-drm-v3d-Add-missing-implicit-synchronization.patch b/target/linux/brcm2708/patches-4.19/950-0593-drm-v3d-Add-missing-implicit-synchronization.patch new file mode 100644 index 000000000..00c8d3298 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0593-drm-v3d-Add-missing-implicit-synchronization.patch @@ -0,0 +1,279 @@ +From 50482167989066e0fb9597fe37146a0ee5bc4067 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 27 Mar 2019 17:44:40 -0700 +Subject: [PATCH 593/703] drm/v3d: Add missing implicit synchronization. + +It is the expectation of existing userspace (X11 + Mesa, in +particular) that jobs submitted to the kernel against a shared BO will +get implicitly synchronized by their submission order. If we want to +allow clever userspace to disable implicit synchronization, we should +do that under its own submit flag (as amdgpu and lima do). + +Note that we currently only implicitly sync for the rendering pass, +not binning -- if you texture-from-pixmap in the binning vertex shader +(vertex coordinate generation), you'll miss out on synchronization. + +Fixes flickering when multiple clients are running in parallel, +particularly GL apps and compositors. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_drv.h | 10 +--- + drivers/gpu/drm/v3d/v3d_gem.c | 98 ++++++++++++++++++++++++++++++--- + drivers/gpu/drm/v3d/v3d_sched.c | 45 ++------------- + 3 files changed, 96 insertions(+), 57 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -186,8 +186,9 @@ struct v3d_job { + struct v3d_bo **bo; + u32 bo_count; + +- /* An optional fence userspace can pass in for the job to depend on. */ +- struct dma_fence *in_fence; ++ struct dma_fence **deps; ++ int deps_count; ++ int deps_size; + + /* v3d fence to be signaled by IRQ handler when the job is complete. */ + struct dma_fence *irq_fence; +@@ -219,11 +220,6 @@ struct v3d_bin_job { + struct v3d_render_job { + struct v3d_job base; + +- /* Optional fence for the binner, to depend on before starting +- * our job. +- */ +- struct dma_fence *bin_done_fence; +- + /* GPU virtual addresses of the start/end of the CL job. */ + u32 start, end; + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -218,6 +218,71 @@ v3d_unlock_bo_reservations(struct v3d_bo + ww_acquire_fini(acquire_ctx); + } + ++static int ++v3d_add_dep(struct v3d_job *job, struct dma_fence *fence) ++{ ++ if (!fence) ++ return 0; ++ ++ if (job->deps_size == job->deps_count) { ++ int new_deps_size = max(job->deps_size * 2, 4); ++ struct dma_fence **new_deps = ++ krealloc(job->deps, new_deps_size * sizeof(*new_deps), ++ GFP_KERNEL); ++ if (!new_deps) { ++ dma_fence_put(fence); ++ return -ENOMEM; ++ } ++ ++ job->deps = new_deps; ++ job->deps_size = new_deps_size; ++ } ++ ++ job->deps[job->deps_count++] = fence; ++ ++ return 0; ++} ++ ++/** ++ * Adds the required implicit fences before executing the job ++ * ++ * Userspace (X11 + Mesa) requires that a job submitted against a shared BO ++ * from one fd will implicitly synchronize against previous jobs submitted ++ * against that BO from other fds. ++ * ++ * Currently we don't bother trying to track the shared BOs, and instead just ++ * sync everything. However, our synchronization is only for the render pass ++ * -- the binning stage (VS coordinate calculations) ignores implicit sync, ++ * since using shared buffers for texture coordinates seems unlikely, and ++ * implicitly syncing them would break bin/render parallelism. If we want to ++ * fix that, we should introduce a flag when VS texturing has been used in the ++ * binning stage, or a set of flags for which BOs are sampled during binning. ++ */ ++static int ++v3d_add_implicit_fences(struct v3d_job *job, struct v3d_bo *bo) ++{ ++ int i, ret, nr_fences; ++ struct dma_fence **fences; ++ ++ ret = reservation_object_get_fences_rcu(bo->resv, NULL, ++ &nr_fences, &fences); ++ if (ret || !nr_fences) ++ return ret; ++ ++ for (i = 0; i < nr_fences; i++) { ++ ret = v3d_add_dep(job, fences[i]); ++ if (ret) ++ break; ++ } ++ ++ /* Free any remaining fences after error. */ ++ for (; i < nr_fences; i++) ++ dma_fence_put(fences[i]); ++ kfree(fences); ++ ++ return ret; ++} ++ + /* Takes the reservation lock on all the BOs being referenced, so that + * at queue submit time we can update the reservations. + * +@@ -226,10 +291,11 @@ v3d_unlock_bo_reservations(struct v3d_bo + * to v3d, so we don't attach dma-buf fences to them. + */ + static int +-v3d_lock_bo_reservations(struct v3d_bo **bos, +- int bo_count, ++v3d_lock_bo_reservations(struct v3d_job *job, + struct ww_acquire_ctx *acquire_ctx) + { ++ struct v3d_bo **bos = job->bo; ++ int bo_count = job->bo_count; + int contended_lock = -1; + int i, ret; + +@@ -281,6 +347,13 @@ retry: + * before we commit the CL to the hardware. + */ + for (i = 0; i < bo_count; i++) { ++ ret = v3d_add_implicit_fences(job, bos[i]); ++ if (ret) { ++ v3d_unlock_bo_reservations(bos, bo_count, ++ acquire_ctx); ++ return ret; ++ } ++ + ret = reservation_object_reserve_shared(bos[i]->resv); + if (ret) { + v3d_unlock_bo_reservations(bos, bo_count, +@@ -383,7 +456,10 @@ v3d_job_free(struct kref *ref) + } + kvfree(job->bo); + +- dma_fence_put(job->in_fence); ++ for (i = 0; i < job->deps_count; i++) ++ dma_fence_put(job->deps[i]); ++ kfree(job->deps); ++ + dma_fence_put(job->irq_fence); + dma_fence_put(job->done_fence); + +@@ -464,15 +540,20 @@ v3d_job_init(struct v3d_dev *v3d, struct + struct v3d_job *job, void (*free)(struct kref *ref), + u32 in_sync) + { ++ struct dma_fence *in_fence = NULL; + int ret; + + job->v3d = v3d; + job->free = free; + +- ret = drm_syncobj_find_fence(file_priv, in_sync, 0, &job->in_fence); ++ ret = drm_syncobj_find_fence(file_priv, in_sync, 0, &in_fence); + if (ret == -EINVAL) + return ret; + ++ ret = v3d_add_dep(job, in_fence); ++ if (ret) ++ return ret; ++ + kref_init(&job->refcount); + + return 0; +@@ -590,8 +671,7 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (ret) + goto fail; + +- ret = v3d_lock_bo_reservations(render->base.bo, render->base.bo_count, +- &acquire_ctx); ++ ret = v3d_lock_bo_reservations(&render->base, &acquire_ctx); + if (ret) + goto fail; + +@@ -601,7 +681,8 @@ v3d_submit_cl_ioctl(struct drm_device *d + if (ret) + goto fail_unreserve; + +- render->bin_done_fence = dma_fence_get(bin->base.done_fence); ++ ret = v3d_add_dep(&render->base, ++ dma_fence_get(bin->base.done_fence)); + } + + ret = v3d_push_job(v3d_priv, &render->base, V3D_RENDER); +@@ -692,8 +773,7 @@ v3d_submit_tfu_ioctl(struct drm_device * + } + spin_unlock(&file_priv->table_lock); + +- ret = v3d_lock_bo_reservations(job->base.bo, job->base.bo_count, +- &acquire_ctx); ++ ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx); + if (ret) + goto fail; + +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -67,47 +67,10 @@ v3d_job_dependency(struct drm_sched_job + struct drm_sched_entity *s_entity) + { + struct v3d_job *job = to_v3d_job(sched_job); +- struct dma_fence *fence; +- +- fence = job->in_fence; +- if (fence) { +- job->in_fence = NULL; +- return fence; +- } +- +- return NULL; +-} + +-/** +- * Returns the fences that the render job depends on, one by one. +- * v3d_job_run() won't be called until all of them have been signaled. +- */ +-static struct dma_fence * +-v3d_render_job_dependency(struct drm_sched_job *sched_job, +- struct drm_sched_entity *s_entity) +-{ +- struct v3d_render_job *job = to_render_job(sched_job); +- struct dma_fence *fence; +- +- fence = v3d_job_dependency(sched_job, s_entity); +- if (fence) +- return fence; +- +- /* If we had a bin job, the render job definitely depends on +- * it. We first have to wait for bin to be scheduled, so that +- * its done_fence is created. +- */ +- fence = job->bin_done_fence; +- if (fence) { +- job->bin_done_fence = NULL; +- return fence; +- } +- +- /* XXX: Wait on a fence for switching the GMP if necessary, +- * and then do so. +- */ +- +- return fence; ++ if (!job->deps_count) ++ return NULL; ++ return job->deps[--job->deps_count]; + } + + static struct dma_fence *v3d_bin_job_run(struct drm_sched_job *sched_job) +@@ -329,7 +292,7 @@ static const struct drm_sched_backend_op + }; + + static const struct drm_sched_backend_ops v3d_render_sched_ops = { +- .dependency = v3d_render_job_dependency, ++ .dependency = v3d_job_dependency, + .run_job = v3d_render_job_run, + .timedout_job = v3d_render_job_timedout, + .free_job = v3d_job_free, diff --git a/target/linux/brcm2708/patches-4.19/950-0594-drm-vc4-Fix-synchronization-firmwarekms-against-GL-r.patch b/target/linux/brcm2708/patches-4.19/950-0594-drm-vc4-Fix-synchronization-firmwarekms-against-GL-r.patch new file mode 100644 index 000000000..a79426c73 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0594-drm-vc4-Fix-synchronization-firmwarekms-against-GL-r.patch @@ -0,0 +1,44 @@ +From a7b923e660e71a2d2b13a7aac36f11b9dcec9295 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 28 Mar 2019 11:58:51 -0700 +Subject: [PATCH 594/703] drm/vc4: Fix synchronization firmwarekms against GL + rendering. + +We would present the framebuffer immediately without waiting for +rendering to finish first, resulting in stuttering and flickering as a +window was dragged around when the GPU was busy enough to not just win +the race. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -15,6 +15,7 @@ + */ + + #include "drm/drm_atomic_helper.h" ++#include "drm/drm_gem_framebuffer_helper.h" + #include "drm/drm_plane_helper.h" + #include "drm/drm_crtc_helper.h" + #include "drm/drm_fourcc.h" +@@ -291,7 +292,7 @@ static const struct drm_plane_funcs vc4_ + }; + + static const struct drm_plane_helper_funcs vc4_primary_plane_helper_funcs = { +- .prepare_fb = NULL, ++ .prepare_fb = drm_gem_fb_prepare_fb, + .cleanup_fb = NULL, + .atomic_check = vc4_plane_atomic_check, + .atomic_update = vc4_primary_plane_atomic_update, +@@ -299,7 +300,7 @@ static const struct drm_plane_helper_fun + }; + + static const struct drm_plane_helper_funcs vc4_cursor_plane_helper_funcs = { +- .prepare_fb = NULL, ++ .prepare_fb = drm_gem_fb_prepare_fb, + .cleanup_fb = NULL, + .atomic_check = vc4_plane_atomic_check, + .atomic_update = vc4_cursor_plane_atomic_update, diff --git a/target/linux/brcm2708/patches-4.19/950-0595-drm-vc4-Make-sure-that-vblank-waits-work-without-v3d.patch b/target/linux/brcm2708/patches-4.19/950-0595-drm-vc4-Make-sure-that-vblank-waits-work-without-v3d.patch new file mode 100644 index 000000000..1663787f9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0595-drm-vc4-Make-sure-that-vblank-waits-work-without-v3d.patch @@ -0,0 +1,27 @@ +From 53fb5e2a9834ead04a432c266831e5fd77f96983 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Fri, 29 Mar 2019 12:04:36 -0700 +Subject: [PATCH 595/703] drm/vc4: Make sure that vblank waits work without v3d + loaded. + +This flag exists to protect legacy drivers, but when vc4's v3d doesn't +probe, it doesn't get set up by vc4_v3d.c's call of drm_irq_install. +This resulted in applications running as fast as possible, and laggy +performance from compton as it had to wait for the latest rendering by +the application for its presentation. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_kms.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -422,6 +422,7 @@ int vc4_kms_load(struct drm_device *dev) + /* Set support for vblank irq fast disable, before drm_vblank_init() */ + dev->vblank_disable_immediate = true; + ++ dev->irq_enabled = true; + ret = drm_vblank_init(dev, dev->mode_config.num_crtc); + if (ret < 0) { + dev_err(dev->dev, "failed to initialize vblank\n"); diff --git a/target/linux/brcm2708/patches-4.19/950-0596-drm-vc4-Expose-the-format-modifiers-for-firmware-kms.patch b/target/linux/brcm2708/patches-4.19/950-0596-drm-vc4-Expose-the-format-modifiers-for-firmware-kms.patch new file mode 100644 index 000000000..c33d4f228 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0596-drm-vc4-Expose-the-format-modifiers-for-firmware-kms.patch @@ -0,0 +1,80 @@ +From 3d8b2b7adbec2ea7bf9012300c5e381cb60c270e Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Mon, 18 Mar 2019 16:38:32 -0700 +Subject: [PATCH 596/703] drm/vc4: Expose the format modifiers for firmware + kms. + +This should technically not expose VC4_T_TILED on pi4. However, if we +don't expose anything, then userspace will assume that display can +handle whatever modifiers 3d can do (UIF on 2711). By exposing a +list, that will get intersected with what 3D can do so that we get T +tiling for display on 2710 and linear on 2711. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 33 +++++++++++++++++++++++++- + 1 file changed, 32 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -281,6 +281,27 @@ static void vc4_plane_destroy(struct drm + drm_plane_cleanup(plane); + } + ++static bool vc4_fkms_format_mod_supported(struct drm_plane *plane, ++ uint32_t format, ++ uint64_t modifier) ++{ ++ /* Support T_TILING for RGB formats only. */ ++ switch (format) { ++ case DRM_FORMAT_XRGB8888: ++ case DRM_FORMAT_ARGB8888: ++ switch (modifier) { ++ case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: ++ case DRM_FORMAT_MOD_LINEAR: ++ case DRM_FORMAT_MOD_BROADCOM_UIF: ++ return true; ++ default: ++ return false; ++ } ++ default: ++ return false; ++ } ++} ++ + static const struct drm_plane_funcs vc4_plane_funcs = { + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, +@@ -289,6 +310,7 @@ static const struct drm_plane_funcs vc4_ + .reset = drm_atomic_helper_plane_reset, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, ++ .format_mod_supported = vc4_fkms_format_mod_supported, + }; + + static const struct drm_plane_helper_funcs vc4_primary_plane_helper_funcs = { +@@ -316,6 +338,14 @@ static struct drm_plane *vc4_fkms_plane_ + u32 argb8888 = DRM_FORMAT_ARGB8888; + int ret = 0; + bool primary = (type == DRM_PLANE_TYPE_PRIMARY); ++ static const uint64_t modifiers[] = { ++ DRM_FORMAT_MOD_LINEAR, ++ /* VC4_T_TILED should come after linear, because we ++ * would prefer to scan out linear (less bus traffic). ++ */ ++ DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED, ++ DRM_FORMAT_MOD_INVALID, ++ }; + + vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane), + GFP_KERNEL); +@@ -327,7 +357,8 @@ static struct drm_plane *vc4_fkms_plane_ + plane = &vc4_plane->base; + ret = drm_universal_plane_init(dev, plane, 0xff, + &vc4_plane_funcs, +- primary ? &xrgb8888 : &argb8888, 1, NULL, ++ primary ? &xrgb8888 : &argb8888, 1, ++ modifiers, + type, primary ? "primary" : "cursor"); + + if (type == DRM_PLANE_TYPE_PRIMARY) { diff --git a/target/linux/brcm2708/patches-4.19/950-0597-drm-vc4-Fix-vblank-timestamping-for-firmwarekms.patch b/target/linux/brcm2708/patches-4.19/950-0597-drm-vc4-Fix-vblank-timestamping-for-firmwarekms.patch new file mode 100644 index 000000000..a2c66828f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0597-drm-vc4-Fix-vblank-timestamping-for-firmwarekms.patch @@ -0,0 +1,45 @@ +From 3b341544a3dae555d48ece948c44b3b434543077 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 2 Apr 2019 13:29:00 -0700 +Subject: [PATCH 597/703] drm/vc4: Fix vblank timestamping for firmwarekms. + +The core doesn't expect a false return from the scanoutpos function in +normal usage, so we were doing the precise vblank timestamping path +and thus "immediate" vblank disables (even though firmwarekms can't +actually disable vblanks interrupts, sigh), and the kernel would get +confused when getting timestamp info when also turning vblanks back +on. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/vc4/vc4_crtc.c | 3 --- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 6 ++++++ + 2 files changed, 6 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_crtc.c ++++ b/drivers/gpu/drm/vc4/vc4_crtc.c +@@ -133,9 +133,6 @@ bool vc4_crtc_get_scanoutpos(struct drm_ + int vblank_lines; + bool ret = false; + +- if (vc4->firmware_kms) +- return 0; +- + /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */ + + /* Get optional system timestamp before query. */ +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -673,6 +673,12 @@ static int vc4_fkms_bind(struct device * + + vc4->firmware_kms = true; + ++ /* firmware kms doesn't have precise a scanoutpos implementation, so ++ * we can't do the precise vblank timestamp mode. ++ */ ++ drm->driver->get_scanout_position = NULL; ++ drm->driver->get_vblank_timestamp = NULL; ++ + vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL); + if (!vc4_crtc) + return -ENOMEM; diff --git a/target/linux/brcm2708/patches-4.19/950-0598-gpu-vc4-fkms-Switch-to-the-newer-mailbox-frame-buffe.patch b/target/linux/brcm2708/patches-4.19/950-0598-gpu-vc4-fkms-Switch-to-the-newer-mailbox-frame-buffe.patch new file mode 100644 index 000000000..8d295de75 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0598-gpu-vc4-fkms-Switch-to-the-newer-mailbox-frame-buffe.patch @@ -0,0 +1,216 @@ +From e4aadf5daae0b3f544e5ade7ee27a5e0f83af1b0 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 26 Mar 2019 14:43:06 +0000 +Subject: [PATCH 598/703] gpu: vc4-fkms: Switch to the newer mailbox frame + buffer API. + +The old mailbox FB API was ideally deprecated but still used by +the FKMS driver. +Update to the newer API. + +NB This needs current firmware that accepts ARM allocated buffers +through the newer API. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 109 +++++++++++---------- + include/soc/bcm2835/raspberrypi-firmware.h | 10 ++ + 2 files changed, 67 insertions(+), 52 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -28,6 +28,25 @@ + #include "vc4_regs.h" + #include + ++struct fb_alloc_tags { ++ struct rpi_firmware_property_tag_header tag1; ++ u32 xres, yres; ++ struct rpi_firmware_property_tag_header tag2; ++ u32 xres_virtual, yres_virtual; ++ struct rpi_firmware_property_tag_header tag3; ++ u32 bpp; ++ struct rpi_firmware_property_tag_header tag4; ++ u32 xoffset, yoffset; ++ struct rpi_firmware_property_tag_header tag5; ++ u32 base, screen_size; ++ struct rpi_firmware_property_tag_header tag6; ++ u32 pitch; ++ struct rpi_firmware_property_tag_header tag7; ++ u32 alpha_mode; ++ struct rpi_firmware_property_tag_header tag8; ++ u32 layer; ++}; ++ + /* The firmware delivers a vblank interrupt to us through the SMI + * hardware, which has only this one register. + */ +@@ -121,45 +140,39 @@ static void vc4_primary_plane_atomic_upd + struct drm_plane_state *old_state) + { + struct vc4_dev *vc4 = to_vc4_dev(plane->dev); +- struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); +- volatile struct fbinfo_s *fbinfo = vc4_plane->fbinfo; ++ u32 format = fb->format->format; ++ struct fb_alloc_tags fbinfo = { ++ .tag1 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT, ++ 8, 0, }, ++ .xres = state->crtc_w, ++ .yres = state->crtc_h, ++ .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT, ++ 8, 0, }, ++ .xres_virtual = state->crtc_w, ++ .yres_virtual = state->crtc_h, ++ .tag3 = { RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH, 4, 0 }, ++ .bpp = 32, ++ .tag4 = { RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET, 8, 0 }, ++ .xoffset = 0, ++ .yoffset = 0, ++ .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, ++ .base = bo->paddr + fb->offsets[0], ++ .screen_size = state->crtc_w * state->crtc_h * 4, ++ .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, ++ .pitch = fb->pitches[0], ++ .tag7 = { RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE, 4, 0 }, ++ .alpha_mode = format == DRM_FORMAT_ARGB8888 ? 0 : 2, ++ .tag8 = { RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER, 4, 0 }, ++ .layer = -127, ++ }; + u32 bpp = 32; + int ret; + +- fbinfo->xres = state->crtc_w; +- fbinfo->yres = state->crtc_h; +- fbinfo->xres_virtual = state->crtc_w; +- fbinfo->yres_virtual = state->crtc_h; +- fbinfo->bpp = bpp; +- fbinfo->xoffset = state->crtc_x; +- fbinfo->yoffset = state->crtc_y; +- fbinfo->base = bo->paddr + fb->offsets[0]; +- fbinfo->pitch = fb->pitches[0]; +- + if (fb->modifier == DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED) +- fbinfo->bpp |= BIT(31); +- +- /* A bug in the firmware makes it so that if the fb->base is +- * set to nonzero, the configured pitch gets overwritten with +- * the previous pitch. So, to get the configured pitch +- * recomputed, we have to make it allocate itself a new buffer +- * in VC memory, first. +- */ +- if (vc4_plane->pitch != fb->pitches[0]) { +- u32 saved_base = fbinfo->base; +- fbinfo->base = 0; +- +- ret = rpi_firmware_transaction(vc4->firmware, +- RPI_FIRMWARE_CHAN_FB, +- vc4_plane->fbinfo_bus_addr); +- fbinfo->base = saved_base; +- +- vc4_plane->pitch = fbinfo->pitch; +- WARN_ON_ONCE(vc4_plane->pitch != fb->pitches[0]); +- } ++ fbinfo.bpp |= BIT(31); + + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] primary update %dx%d@%d +%d,%d 0x%pad/%d\n", + plane->base.id, plane->name, +@@ -168,14 +181,13 @@ static void vc4_primary_plane_atomic_upd + bpp, + state->crtc_x, + state->crtc_y, +- &fbinfo->base, ++ &fbinfo.base, + fb->pitches[0]); + +- ret = rpi_firmware_transaction(vc4->firmware, +- RPI_FIRMWARE_CHAN_FB, +- vc4_plane->fbinfo_bus_addr); +- WARN_ON_ONCE(fbinfo->pitch != fb->pitches[0]); +- WARN_ON_ONCE(fbinfo->base != bo->paddr + fb->offsets[0]); ++ ret = rpi_firmware_property_list(vc4->firmware, &fbinfo, ++ sizeof(fbinfo)); ++ WARN_ON_ONCE(fbinfo.pitch != fb->pitches[0]); ++ WARN_ON_ONCE(fbinfo.base != bo->paddr + fb->offsets[0]); + + /* If the CRTC is on (or going to be on) and we're enabled, + * then unblank. Otherwise, stay blank until CRTC enable. +@@ -332,10 +344,10 @@ static const struct drm_plane_helper_fun + static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev, + enum drm_plane_type type) + { ++ /* Primary and cursor planes only */ + struct drm_plane *plane = NULL; + struct vc4_fkms_plane *vc4_plane; +- u32 xrgb8888 = DRM_FORMAT_XRGB8888; +- u32 argb8888 = DRM_FORMAT_ARGB8888; ++ u32 formats[] = {DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888}; + int ret = 0; + bool primary = (type == DRM_PLANE_TYPE_PRIMARY); + static const uint64_t modifiers[] = { +@@ -357,22 +369,15 @@ static struct drm_plane *vc4_fkms_plane_ + plane = &vc4_plane->base; + ret = drm_universal_plane_init(dev, plane, 0xff, + &vc4_plane_funcs, +- primary ? &xrgb8888 : &argb8888, 1, +- modifiers, ++ formats, primary ? 2 : 1, modifiers, + type, primary ? "primary" : "cursor"); + +- if (type == DRM_PLANE_TYPE_PRIMARY) { +- vc4_plane->fbinfo = +- dma_alloc_coherent(dev->dev, +- sizeof(*vc4_plane->fbinfo), +- &vc4_plane->fbinfo_bus_addr, +- GFP_KERNEL); +- memset(vc4_plane->fbinfo, 0, sizeof(*vc4_plane->fbinfo)); +- ++ if (type == DRM_PLANE_TYPE_PRIMARY) + drm_plane_helper_add(plane, &vc4_primary_plane_helper_funcs); +- } else { ++ else + drm_plane_helper_add(plane, &vc4_cursor_plane_helper_funcs); +- } ++ ++ drm_plane_create_alpha_property(plane); + + return plane; + fail: +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -111,9 +111,15 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, + RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, + RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_LAYER = 0x0004000c, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_VSYNC = 0x0004000e, + RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, + RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, + RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, + RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, + RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, + RPI_FIRMWARE_FRAMEBUFFER_TEST_DEPTH = 0x00044005, +@@ -122,6 +128,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, + RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, + RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, ++ RPI_FIRMWARE_FRAMEBUFFER_TEST_LAYER = 0x0004400c, ++ RPI_FIRMWARE_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d, + RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, + RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, + RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, +@@ -134,6 +142,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, + RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, + RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER = 0x0004800c, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d, + RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, + + RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, diff --git a/target/linux/brcm2708/patches-4.19/950-0599-drm-vc4-Add-an-overlay-plane-to-vc4-firmware-kms.patch b/target/linux/brcm2708/patches-4.19/950-0599-drm-vc4-Add-an-overlay-plane-to-vc4-firmware-kms.patch new file mode 100644 index 000000000..e80a25cf9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0599-drm-vc4-Add-an-overlay-plane-to-vc4-firmware-kms.patch @@ -0,0 +1,853 @@ +From 36b8b81762806952c524da6539b76771266d79c5 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 27 Mar 2019 17:45:01 +0000 +Subject: [PATCH 599/703] drm: vc4: Add an overlay plane to vc4-firmware-kms + +This uses a new API that is exposed via the mailbox service +to stick an element straight on the screen using DispmanX. + +The primary and cursor planes have also been switched to using +the new plane API, and it supports layering based on the DRM +zpos parameter. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 518 ++++++++++++++------- + drivers/gpu/drm/vc4/vc4_kms.c | 1 + + drivers/gpu/drm/vc4/vc_image_types.h | 143 ++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 2 + + 4 files changed, 495 insertions(+), 169 deletions(-) + create mode 100644 drivers/gpu/drm/vc4/vc_image_types.h + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -26,8 +26,46 @@ + #include "linux/of_device.h" + #include "vc4_drv.h" + #include "vc4_regs.h" ++#include "vc_image_types.h" + #include + ++struct set_plane { ++ u8 display; ++ u8 plane_id; ++ u8 vc_image_type; ++ s8 layer; ++ ++ u16 width; ++ u16 height; ++ ++ u16 pitch; ++ u16 vpitch; ++ ++ u32 src_x; /* 16p16 */ ++ u32 src_y; /* 16p16 */ ++ ++ u32 src_w; /* 16p16 */ ++ u32 src_h; /* 16p16 */ ++ ++ s16 dst_x; ++ s16 dst_y; ++ ++ u16 dst_w; ++ u16 dst_h; ++ ++ u8 alpha; ++ u8 num_planes; ++ u8 is_vu; ++ u8 padding; ++ ++ u32 planes[4]; /* DMA address of each plane */ ++}; ++ ++struct mailbox_set_plane { ++ struct rpi_firmware_property_tag_header tag; ++ struct set_plane plane; ++}; ++ + struct fb_alloc_tags { + struct rpi_firmware_property_tag_header tag1; + u32 xres, yres; +@@ -47,6 +85,79 @@ struct fb_alloc_tags { + u32 layer; + }; + ++static const struct vc_image_format { ++ u32 drm; /* DRM_FORMAT_* */ ++ u32 vc_image; /* VC_IMAGE_* */ ++ u32 is_vu; ++} vc_image_formats[] = { ++ { ++ .drm = DRM_FORMAT_XRGB8888, ++ .vc_image = VC_IMAGE_XRGB8888, ++ }, ++ { ++ .drm = DRM_FORMAT_ARGB8888, ++ .vc_image = VC_IMAGE_ARGB8888, ++ }, ++/* ++ * FIXME: Need to resolve which DRM format goes to which vc_image format ++ * for the remaining RGBA and RGBX formats. ++ * { ++ * .drm = DRM_FORMAT_ABGR8888, ++ * .vc_image = VC_IMAGE_RGBA8888, ++ * }, ++ * { ++ * .drm = DRM_FORMAT_XBGR8888, ++ * .vc_image = VC_IMAGE_RGBA8888, ++ * }, ++ */ ++ { ++ .drm = DRM_FORMAT_RGB565, ++ .vc_image = VC_IMAGE_RGB565, ++ }, ++ { ++ .drm = DRM_FORMAT_RGB888, ++ .vc_image = VC_IMAGE_BGR888, ++ }, ++ { ++ .drm = DRM_FORMAT_BGR888, ++ .vc_image = VC_IMAGE_RGB888, ++ }, ++ { ++ .drm = DRM_FORMAT_YUV422, ++ .vc_image = VC_IMAGE_YUV422PLANAR, ++ }, ++ { ++ .drm = DRM_FORMAT_YUV420, ++ .vc_image = VC_IMAGE_YUV420, ++ }, ++ { ++ .drm = DRM_FORMAT_YVU420, ++ .vc_image = VC_IMAGE_YUV420, ++ .is_vu = 1, ++ }, ++ { ++ .drm = DRM_FORMAT_NV12, ++ .vc_image = VC_IMAGE_YUV420SP, ++ }, ++ { ++ .drm = DRM_FORMAT_NV21, ++ .vc_image = VC_IMAGE_YUV420SP, ++ .is_vu = 1, ++ }, ++}; ++ ++static const struct vc_image_format *vc4_get_vc_image_fmt(u32 drm_format) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) { ++ if (vc_image_formats[i].drm == drm_format) ++ return &vc_image_formats[i]; ++ } ++ ++ return NULL; ++} ++ + /* The firmware delivers a vblank interrupt to us through the SMI + * hardware, which has only this one register. + */ +@@ -113,6 +224,7 @@ struct vc4_fkms_plane { + struct fbinfo_s *fbinfo; + dma_addr_t fbinfo_bus_addr; + u32 pitch; ++ struct mailbox_set_plane mb; + }; + + static inline struct vc4_fkms_plane *to_vc4_fkms_plane(struct drm_plane *plane) +@@ -120,165 +232,183 @@ static inline struct vc4_fkms_plane *to_ + return (struct vc4_fkms_plane *)plane; + } + +-/* Turns the display on/off. */ +-static int vc4_plane_set_primary_blank(struct drm_plane *plane, bool blank) ++static int vc4_plane_set_blank(struct drm_plane *plane, bool blank) + { + struct vc4_dev *vc4 = to_vc4_dev(plane->dev); ++ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); ++ struct mailbox_set_plane blank_mb = { ++ .tag = { RPI_FIRMWARE_SET_PLANE, sizeof(struct set_plane), 0 }, ++ .plane = { ++ .display = vc4_plane->mb.plane.display, ++ .plane_id = vc4_plane->mb.plane.plane_id, ++ } ++ }; ++ int ret; + +- u32 packet = blank; +- +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] primary plane %s", ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] overlay plane %s", + plane->base.id, plane->name, + blank ? "blank" : "unblank"); + +- return rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_FRAMEBUFFER_BLANK, +- &packet, sizeof(packet)); ++ if (blank) ++ ret = rpi_firmware_property_list(vc4->firmware, &blank_mb, ++ sizeof(blank_mb)); ++ else ++ ret = rpi_firmware_property_list(vc4->firmware, &vc4_plane->mb, ++ sizeof(vc4_plane->mb)); ++ ++ WARN_ONCE(ret, "%s: firmware call failed. Please update your firmware", ++ __func__); ++ return ret; + } + +-static void vc4_primary_plane_atomic_update(struct drm_plane *plane, +- struct drm_plane_state *old_state) ++static void vc4_plane_atomic_update(struct drm_plane *plane, ++ struct drm_plane_state *old_state) + { +- struct vc4_dev *vc4 = to_vc4_dev(plane->dev); + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); +- u32 format = fb->format->format; +- struct fb_alloc_tags fbinfo = { +- .tag1 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT, +- 8, 0, }, +- .xres = state->crtc_w, +- .yres = state->crtc_h, +- .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT, +- 8, 0, }, +- .xres_virtual = state->crtc_w, +- .yres_virtual = state->crtc_h, +- .tag3 = { RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH, 4, 0 }, +- .bpp = 32, +- .tag4 = { RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET, 8, 0 }, +- .xoffset = 0, +- .yoffset = 0, +- .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, +- .base = bo->paddr + fb->offsets[0], +- .screen_size = state->crtc_w * state->crtc_h * 4, +- .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, +- .pitch = fb->pitches[0], +- .tag7 = { RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE, 4, 0 }, +- .alpha_mode = format == DRM_FORMAT_ARGB8888 ? 0 : 2, +- .tag8 = { RPI_FIRMWARE_FRAMEBUFFER_SET_LAYER, 4, 0 }, +- .layer = -127, +- }; +- u32 bpp = 32; +- int ret; ++ const struct drm_format_info *drm_fmt = fb->format; ++ const struct vc_image_format *vc_fmt = ++ vc4_get_vc_image_fmt(drm_fmt->format); ++ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); ++ struct mailbox_set_plane *mb = &vc4_plane->mb; ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(state->crtc); ++ int num_planes = fb->format->num_planes; ++ struct drm_display_mode *mode = &state->crtc->mode; + +- if (fb->modifier == DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED) +- fbinfo.bpp |= BIT(31); ++ mb->plane.vc_image_type = vc_fmt->vc_image; ++ mb->plane.width = fb->width; ++ mb->plane.height = fb->height; ++ mb->plane.pitch = fb->pitches[0]; ++ mb->plane.src_w = state->src_w; ++ mb->plane.src_h = state->src_h; ++ mb->plane.src_x = state->src_x; ++ mb->plane.src_y = state->src_y; ++ mb->plane.dst_w = state->crtc_w; ++ mb->plane.dst_h = state->crtc_h; ++ mb->plane.dst_x = state->crtc_x; ++ mb->plane.dst_y = state->crtc_y; ++ mb->plane.alpha = state->alpha >> 8; ++ mb->plane.layer = state->normalized_zpos ? ++ state->normalized_zpos : -127; ++ mb->plane.num_planes = num_planes; ++ mb->plane.is_vu = vc_fmt->is_vu; ++ mb->plane.planes[0] = bo->paddr + fb->offsets[0]; + +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] primary update %dx%d@%d +%d,%d 0x%pad/%d\n", ++ /* FIXME: If the dest rect goes off screen then clip the src rect so we ++ * don't have off-screen pixels. ++ */ ++ if (plane->type == DRM_PLANE_TYPE_CURSOR) { ++ /* There is no scaling on the cursor plane, therefore the calcs ++ * to alter the source crop as the cursor goes off the screen ++ * are simple. ++ */ ++ if (mb->plane.dst_x + mb->plane.dst_w > mode->hdisplay) { ++ mb->plane.dst_w = mode->hdisplay - mb->plane.dst_x; ++ mb->plane.src_w = (mode->hdisplay - mb->plane.dst_x) ++ << 16; ++ } ++ if (mb->plane.dst_y + mb->plane.dst_h > mode->vdisplay) { ++ mb->plane.dst_h = mode->vdisplay - mb->plane.dst_y; ++ mb->plane.src_h = (mode->vdisplay - mb->plane.dst_y) ++ << 16; ++ } ++ } ++ ++ if (num_planes > 1) { ++ /* Assume this must be YUV */ ++ /* Makes assumptions on the stride for the chroma planes as we ++ * can't easily plumb in non-standard pitches. ++ */ ++ mb->plane.planes[1] = bo->paddr + fb->offsets[1]; ++ if (num_planes > 2) ++ mb->plane.planes[2] = bo->paddr + fb->offsets[2]; ++ else ++ mb->plane.planes[2] = 0; ++ ++ /* Special case the YUV420 with U and V as line interleaved ++ * planes as we have special handling for that case. ++ */ ++ if (num_planes == 3 && ++ (fb->offsets[2] - fb->offsets[1]) == fb->pitches[1]) ++ mb->plane.vc_image_type = VC_IMAGE_YUV420_S; ++ } else { ++ mb->plane.planes[1] = 0; ++ mb->plane.planes[2] = 0; ++ } ++ mb->plane.planes[3] = 0; ++ ++ switch (fb->modifier) { ++ case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: ++ switch (mb->plane.vc_image_type) { ++ case VC_IMAGE_RGBX32: ++ mb->plane.vc_image_type = VC_IMAGE_TF_RGBX32; ++ break; ++ case VC_IMAGE_RGBA32: ++ mb->plane.vc_image_type = VC_IMAGE_TF_RGBA32; ++ break; ++ case VC_IMAGE_RGB565: ++ mb->plane.vc_image_type = VC_IMAGE_TF_RGB565; ++ break; ++ } ++ break; ++ case DRM_FORMAT_MOD_BROADCOM_SAND128: ++ mb->plane.vc_image_type = VC_IMAGE_YUV_UV; ++ mb->plane.pitch = fourcc_mod_broadcom_param(fb->modifier); ++ break; ++ } ++ ++ if (vc4_crtc) { ++ mb->plane.dst_x += vc4_crtc->overscan[0]; ++ mb->plane.dst_y += vc4_crtc->overscan[1]; ++ } ++ ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane update %dx%d@%d +dst(%d,%d, %d,%d) +src(%d,%d, %d,%d) 0x%08x/%08x/%08x/%d, alpha %u zpos %u\n", + plane->base.id, plane->name, +- state->crtc_w, +- state->crtc_h, +- bpp, ++ mb->plane.width, ++ mb->plane.height, ++ mb->plane.vc_image_type, + state->crtc_x, + state->crtc_y, +- &fbinfo.base, +- fb->pitches[0]); +- +- ret = rpi_firmware_property_list(vc4->firmware, &fbinfo, +- sizeof(fbinfo)); +- WARN_ON_ONCE(fbinfo.pitch != fb->pitches[0]); +- WARN_ON_ONCE(fbinfo.base != bo->paddr + fb->offsets[0]); +- +- /* If the CRTC is on (or going to be on) and we're enabled, ++ state->crtc_w, ++ state->crtc_h, ++ mb->plane.src_x, ++ mb->plane.src_y, ++ mb->plane.src_w, ++ mb->plane.src_h, ++ mb->plane.planes[0], ++ mb->plane.planes[1], ++ mb->plane.planes[2], ++ fb->pitches[0], ++ state->alpha, ++ state->normalized_zpos); ++ ++ /* ++ * Do NOT set now, as we haven't checked if the crtc is active or not. ++ * Set from vc4_plane_set_blank instead. ++ * ++ * If the CRTC is on (or going to be on) and we're enabled, + * then unblank. Otherwise, stay blank until CRTC enable. +- */ ++ */ + if (state->crtc->state->active) +- vc4_plane_set_primary_blank(plane, false); ++ vc4_plane_set_blank(plane, false); + } + +-static void vc4_primary_plane_atomic_disable(struct drm_plane *plane, +- struct drm_plane_state *old_state) ++static void vc4_plane_atomic_disable(struct drm_plane *plane, ++ struct drm_plane_state *old_state) + { +- vc4_plane_set_primary_blank(plane, true); +-} +- +-static void vc4_cursor_plane_atomic_update(struct drm_plane *plane, +- struct drm_plane_state *old_state) +-{ +- struct vc4_dev *vc4 = to_vc4_dev(plane->dev); ++ //struct vc4_dev *vc4 = to_vc4_dev(plane->dev); + struct drm_plane_state *state = plane->state; +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(state->crtc); +- struct drm_framebuffer *fb = state->fb; +- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0); +- dma_addr_t addr = bo->paddr + fb->offsets[0]; +- int ret; +- u32 packet_state[] = { +- state->crtc->state->active, +- state->crtc_x, +- state->crtc_y, +- 0 +- }; +- WARN_ON_ONCE(fb->pitches[0] != state->crtc_w * 4); ++ struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); + +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] update %dx%d cursor at %d,%d (0x%pad/%d)", ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane disable %dx%d@%d +%d,%d\n", + plane->base.id, plane->name, + state->crtc_w, + state->crtc_h, ++ vc4_plane->mb.plane.vc_image_type, + state->crtc_x, +- state->crtc_y, +- &addr, +- fb->pitches[0]); +- +- /* add on the top/left offsets when overscan is active */ +- if (vc4_crtc) { +- packet_state[1] += vc4_crtc->overscan[0]; +- packet_state[2] += vc4_crtc->overscan[1]; +- } +- +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_SET_CURSOR_STATE, +- &packet_state, +- sizeof(packet_state)); +- if (ret || packet_state[0] != 0) +- DRM_ERROR("Failed to set cursor state: 0x%08x\n", packet_state[0]); +- +- /* Note: When the cursor contents change, the modesetting +- * driver calls drm_mode_cursor_univeral() with +- * DRM_MODE_CURSOR_BO, which means a new fb will be allocated. +- */ +- if (!old_state || +- state->crtc_w != old_state->crtc_w || +- state->crtc_h != old_state->crtc_h || +- fb != old_state->fb) { +- u32 packet_info[] = { state->crtc_w, state->crtc_h, +- 0, /* unused */ +- addr, +- 0, 0, /* hotx, hoty */}; +- +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_SET_CURSOR_INFO, +- &packet_info, +- sizeof(packet_info)); +- if (ret || packet_info[0] != 0) +- DRM_ERROR("Failed to set cursor info: 0x%08x\n", packet_info[0]); +- } +-} +- +-static void vc4_cursor_plane_atomic_disable(struct drm_plane *plane, +- struct drm_plane_state *old_state) +-{ +- struct vc4_dev *vc4 = to_vc4_dev(plane->dev); +- u32 packet_state[] = { false, 0, 0, 0 }; +- int ret; +- +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] disabling cursor", plane->base.id, plane->name); +- +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_SET_CURSOR_STATE, +- &packet_state, +- sizeof(packet_state)); +- if (ret || packet_state[0] != 0) +- DRM_ERROR("Failed to set cursor state: 0x%08x\n", packet_state[0]); ++ state->crtc_y); ++ vc4_plane_set_blank(plane, true); + } + + static int vc4_plane_atomic_check(struct drm_plane *plane, +@@ -301,6 +431,7 @@ static bool vc4_fkms_format_mod_supporte + switch (format) { + case DRM_FORMAT_XRGB8888: + case DRM_FORMAT_ARGB8888: ++ case DRM_FORMAT_RGB565: + switch (modifier) { + case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: + case DRM_FORMAT_MOD_LINEAR: +@@ -309,8 +440,22 @@ static bool vc4_fkms_format_mod_supporte + default: + return false; + } ++ case DRM_FORMAT_NV12: ++ case DRM_FORMAT_NV21: ++ switch (fourcc_mod_broadcom_mod(modifier)) { ++ case DRM_FORMAT_MOD_LINEAR: ++ case DRM_FORMAT_MOD_BROADCOM_SAND128: ++ return true; ++ default: ++ return false; ++ } ++ case DRM_FORMAT_RGB888: ++ case DRM_FORMAT_BGR888: ++ case DRM_FORMAT_YUV422: ++ case DRM_FORMAT_YUV420: ++ case DRM_FORMAT_YVU420: + default: +- return false; ++ return (modifier == DRM_FORMAT_MOD_LINEAR); + } + } + +@@ -325,31 +470,24 @@ static const struct drm_plane_funcs vc4_ + .format_mod_supported = vc4_fkms_format_mod_supported, + }; + +-static const struct drm_plane_helper_funcs vc4_primary_plane_helper_funcs = { +- .prepare_fb = drm_gem_fb_prepare_fb, +- .cleanup_fb = NULL, +- .atomic_check = vc4_plane_atomic_check, +- .atomic_update = vc4_primary_plane_atomic_update, +- .atomic_disable = vc4_primary_plane_atomic_disable, +-}; +- +-static const struct drm_plane_helper_funcs vc4_cursor_plane_helper_funcs = { ++static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = { + .prepare_fb = drm_gem_fb_prepare_fb, + .cleanup_fb = NULL, + .atomic_check = vc4_plane_atomic_check, +- .atomic_update = vc4_cursor_plane_atomic_update, +- .atomic_disable = vc4_cursor_plane_atomic_disable, ++ .atomic_update = vc4_plane_atomic_update, ++ .atomic_disable = vc4_plane_atomic_disable, + }; + + static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev, +- enum drm_plane_type type) ++ enum drm_plane_type type, ++ u8 plane_id) + { +- /* Primary and cursor planes only */ + struct drm_plane *plane = NULL; + struct vc4_fkms_plane *vc4_plane; +- u32 formats[] = {DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB8888}; ++ u32 formats[ARRAY_SIZE(vc_image_formats)]; ++ unsigned int default_zpos; ++ u32 num_formats = 0; + int ret = 0; +- bool primary = (type == DRM_PLANE_TYPE_PRIMARY); + static const uint64_t modifiers[] = { + DRM_FORMAT_MOD_LINEAR, + /* VC4_T_TILED should come after linear, because we +@@ -358,6 +496,7 @@ static struct drm_plane *vc4_fkms_plane_ + DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED, + DRM_FORMAT_MOD_INVALID, + }; ++ int i; + + vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane), + GFP_KERNEL); +@@ -366,19 +505,48 @@ static struct drm_plane *vc4_fkms_plane_ + goto fail; + } + ++ for (i = 0; i < ARRAY_SIZE(vc_image_formats); i++) ++ formats[num_formats++] = vc_image_formats[i].drm; ++ + plane = &vc4_plane->base; + ret = drm_universal_plane_init(dev, plane, 0xff, + &vc4_plane_funcs, +- formats, primary ? 2 : 1, modifiers, +- type, primary ? "primary" : "cursor"); ++ formats, num_formats, modifiers, ++ type, NULL); + +- if (type == DRM_PLANE_TYPE_PRIMARY) +- drm_plane_helper_add(plane, &vc4_primary_plane_helper_funcs); +- else +- drm_plane_helper_add(plane, &vc4_cursor_plane_helper_funcs); ++ drm_plane_helper_add(plane, &vc4_plane_helper_funcs); + + drm_plane_create_alpha_property(plane); + ++ /* ++ * Default frame buffer setup is with FB on -127, and raspistill etc ++ * tend to drop overlays on layer 2. Cursor plane was on layer +127. ++ * ++ * For F-KMS the mailbox call allows for a s8. ++ * Remap zpos 0 to -127 for the background layer, but leave all the ++ * other layers as requested by KMS. ++ */ ++ switch (type) { ++ case DRM_PLANE_TYPE_PRIMARY: ++ default_zpos = 0; ++ break; ++ case DRM_PLANE_TYPE_OVERLAY: ++ default_zpos = 1; ++ break; ++ case DRM_PLANE_TYPE_CURSOR: ++ default_zpos = 2; ++ break; ++ } ++ drm_plane_create_zpos_property(plane, default_zpos, 0, 127); ++ ++ /* Prepare the static elements of the mailbox structure */ ++ vc4_plane->mb.tag.tag = RPI_FIRMWARE_SET_PLANE; ++ vc4_plane->mb.tag.buf_size = sizeof(struct set_plane); ++ vc4_plane->mb.tag.req_resp_size = 0; ++ vc4_plane->mb.plane.display = 0; ++ vc4_plane->mb.plane.plane_id = plane_id; ++ vc4_plane->mb.plane.layer = default_zpos ? default_zpos : -127; ++ + return plane; + fail: + if (plane) +@@ -400,19 +568,23 @@ static void vc4_crtc_disable(struct drm_ + * whether anything scans out at all, but the firmware doesn't + * give us a CRTC-level control for that. + */ +- vc4_cursor_plane_atomic_disable(crtc->cursor, crtc->cursor->state); +- vc4_plane_set_primary_blank(crtc->primary, true); ++ ++ vc4_plane_atomic_disable(crtc->cursor, crtc->cursor->state); ++ vc4_plane_atomic_disable(crtc->primary, crtc->primary->state); ++ ++ /* FIXME: Disable overlay planes */ + } + + static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { + /* Unblank the planes (if they're supposed to be displayed). */ ++ + if (crtc->primary->state->fb) +- vc4_plane_set_primary_blank(crtc->primary, false); +- if (crtc->cursor->state->fb) { +- vc4_cursor_plane_atomic_update(crtc->cursor, +- crtc->cursor->state); +- } ++ vc4_plane_set_blank(crtc->primary, false); ++ if (crtc->cursor->state->fb) ++ vc4_plane_set_blank(crtc->cursor, crtc->cursor->state); ++ ++ /* FIXME: Enable overlay planes */ + } + + static int vc4_crtc_atomic_check(struct drm_crtc *crtc, +@@ -672,8 +844,10 @@ static int vc4_fkms_bind(struct device * + struct vc4_crtc *vc4_crtc; + struct vc4_fkms_encoder *vc4_encoder; + struct drm_crtc *crtc; +- struct drm_plane *primary_plane, *cursor_plane, *destroy_plane, *temp; ++ struct drm_plane *primary_plane, *overlay_plane, *cursor_plane; ++ struct drm_plane *destroy_plane, *temp; + struct device_node *firmware_node; ++ u32 blank = 1; + int ret; + + vc4->firmware_kms = true; +@@ -702,20 +876,26 @@ static int vc4_fkms_bind(struct device * + if (IS_ERR(vc4_crtc->regs)) + return PTR_ERR(vc4_crtc->regs); + +- /* For now, we create just the primary and the legacy cursor +- * planes. We should be able to stack more planes on easily, +- * but to do that we would need to compute the bandwidth +- * requirement of the plane configuration, and reject ones +- * that will take too much. +- */ +- primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY); ++ /* Blank the firmware provided framebuffer */ ++ rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_FRAMEBUFFER_BLANK, ++ &blank, sizeof(blank)); ++ ++ primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY, 0); + if (IS_ERR(primary_plane)) { + dev_err(dev, "failed to construct primary plane\n"); + ret = PTR_ERR(primary_plane); + goto err; + } + +- cursor_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_CURSOR); ++ overlay_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_OVERLAY, 1); ++ if (IS_ERR(overlay_plane)) { ++ dev_err(dev, "failed to construct overlay plane\n"); ++ ret = PTR_ERR(overlay_plane); ++ goto err; ++ } ++ ++ cursor_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_CURSOR, 2); + if (IS_ERR(cursor_plane)) { + dev_err(dev, "failed to construct cursor plane\n"); + ret = PTR_ERR(cursor_plane); +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -435,6 +435,7 @@ int vc4_kms_load(struct drm_device *dev) + dev->mode_config.preferred_depth = 24; + dev->mode_config.async_page_flip = true; + dev->mode_config.allow_fb_modifiers = true; ++ dev->mode_config.normalize_zpos = true; + + drm_modeset_lock_init(&vc4->ctm_state_lock); + +--- /dev/null ++++ b/drivers/gpu/drm/vc4/vc_image_types.h +@@ -0,0 +1,143 @@ ++ ++/* ++ * Copyright (c) 2012, Broadcom Europe Ltd ++ * ++ * Values taken from vc_image_types.h released by Broadcom at ++ * https://github.com/raspberrypi/userland/blob/master/interface/vctypes/vc_image_types.h ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++enum { ++ VC_IMAGE_MIN = 0, //bounds for error checking ++ ++ VC_IMAGE_RGB565 = 1, ++ VC_IMAGE_1BPP, ++ VC_IMAGE_YUV420, ++ VC_IMAGE_48BPP, ++ VC_IMAGE_RGB888, ++ VC_IMAGE_8BPP, ++ /* 4bpp palettised image */ ++ VC_IMAGE_4BPP, ++ /* A separated format of 16 colour/light shorts followed by 16 z ++ * values ++ */ ++ VC_IMAGE_3D32, ++ /* 16 colours followed by 16 z values */ ++ VC_IMAGE_3D32B, ++ /* A separated format of 16 material/colour/light shorts followed by ++ * 16 z values ++ */ ++ VC_IMAGE_3D32MAT, ++ /* 32 bit format containing 18 bits of 6.6.6 RGB, 9 bits per short */ ++ VC_IMAGE_RGB2X9, ++ /* 32-bit format holding 18 bits of 6.6.6 RGB */ ++ VC_IMAGE_RGB666, ++ /* 4bpp palettised image with embedded palette */ ++ VC_IMAGE_PAL4_OBSOLETE, ++ /* 8bpp palettised image with embedded palette */ ++ VC_IMAGE_PAL8_OBSOLETE, ++ /* RGB888 with an alpha byte after each pixel */ ++ VC_IMAGE_RGBA32, ++ /* a line of Y (32-byte padded), a line of U (16-byte padded), and a ++ * line of V (16-byte padded) ++ */ ++ VC_IMAGE_YUV422, ++ /* RGB565 with a transparent patch */ ++ VC_IMAGE_RGBA565, ++ /* Compressed (4444) version of RGBA32 */ ++ VC_IMAGE_RGBA16, ++ /* VCIII codec format */ ++ VC_IMAGE_YUV_UV, ++ /* VCIII T-format RGBA8888 */ ++ VC_IMAGE_TF_RGBA32, ++ /* VCIII T-format RGBx8888 */ ++ VC_IMAGE_TF_RGBX32, ++ /* VCIII T-format float */ ++ VC_IMAGE_TF_FLOAT, ++ /* VCIII T-format RGBA4444 */ ++ VC_IMAGE_TF_RGBA16, ++ /* VCIII T-format RGB5551 */ ++ VC_IMAGE_TF_RGBA5551, ++ /* VCIII T-format RGB565 */ ++ VC_IMAGE_TF_RGB565, ++ /* VCIII T-format 8-bit luma and 8-bit alpha */ ++ VC_IMAGE_TF_YA88, ++ /* VCIII T-format 8 bit generic sample */ ++ VC_IMAGE_TF_BYTE, ++ /* VCIII T-format 8-bit palette */ ++ VC_IMAGE_TF_PAL8, ++ /* VCIII T-format 4-bit palette */ ++ VC_IMAGE_TF_PAL4, ++ /* VCIII T-format Ericsson Texture Compressed */ ++ VC_IMAGE_TF_ETC1, ++ /* RGB888 with R & B swapped */ ++ VC_IMAGE_BGR888, ++ /* RGB888 with R & B swapped, but with no pitch, i.e. no padding after ++ * each row of pixels ++ */ ++ VC_IMAGE_BGR888_NP, ++ /* Bayer image, extra defines which variant is being used */ ++ VC_IMAGE_BAYER, ++ /* General wrapper for codec images e.g. JPEG from camera */ ++ VC_IMAGE_CODEC, ++ /* VCIII codec format */ ++ VC_IMAGE_YUV_UV32, ++ /* VCIII T-format 8-bit luma */ ++ VC_IMAGE_TF_Y8, ++ /* VCIII T-format 8-bit alpha */ ++ VC_IMAGE_TF_A8, ++ /* VCIII T-format 16-bit generic sample */ ++ VC_IMAGE_TF_SHORT, ++ /* VCIII T-format 1bpp black/white */ ++ VC_IMAGE_TF_1BPP, ++ VC_IMAGE_OPENGL, ++ /* VCIII-B0 HVS YUV 4:4:4 interleaved samples */ ++ VC_IMAGE_YUV444I, ++ /* Y, U, & V planes separately (VC_IMAGE_YUV422 has them interleaved on ++ * a per line basis) ++ */ ++ VC_IMAGE_YUV422PLANAR, ++ /* 32bpp with 8bit alpha at MS byte, with R, G, B (LS byte) */ ++ VC_IMAGE_ARGB8888, ++ /* 32bpp with 8bit unused at MS byte, with R, G, B (LS byte) */ ++ VC_IMAGE_XRGB8888, ++ ++ /* interleaved 8 bit samples of Y, U, Y, V (4 flavours) */ ++ VC_IMAGE_YUV422YUYV, ++ VC_IMAGE_YUV422YVYU, ++ VC_IMAGE_YUV422UYVY, ++ VC_IMAGE_YUV422VYUY, ++ ++ /* 32bpp like RGBA32 but with unused alpha */ ++ VC_IMAGE_RGBX32, ++ /* 32bpp, corresponding to RGBA with unused alpha */ ++ VC_IMAGE_RGBX8888, ++ /* 32bpp, corresponding to BGRA with unused alpha */ ++ VC_IMAGE_BGRX8888, ++ ++ /* Y as a plane, then UV byte interleaved in plane with with same pitch, ++ * half height ++ */ ++ VC_IMAGE_YUV420SP, ++ ++ /* Y, U, & V planes separately 4:4:4 */ ++ VC_IMAGE_YUV444PLANAR, ++ ++ /* T-format 8-bit U - same as TF_Y8 buf from U plane */ ++ VC_IMAGE_TF_U8, ++ /* T-format 8-bit U - same as TF_Y8 buf from V plane */ ++ VC_IMAGE_TF_V8, ++ ++ /* YUV4:2:0 planar, 16bit values */ ++ VC_IMAGE_YUV420_16, ++ /* YUV4:2:0 codec format, 16bit values */ ++ VC_IMAGE_YUV_UV_16, ++ /* YUV4:2:0 with U,V in side-by-side format */ ++ VC_IMAGE_YUV420_S, ++ ++ VC_IMAGE_MAX, /* bounds for error checking */ ++ VC_IMAGE_FORCE_ENUM_16BIT = 0xffff, ++}; +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -148,6 +148,8 @@ enum rpi_firmware_property_tag { + + RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, + ++ RPI_FIRMWARE_SET_PLANE = 0x00048015, ++ + RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, + RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0600-drm-vc4-Increase-max-screen-size-to-4096x4096.patch b/target/linux/brcm2708/patches-4.19/950-0600-drm-vc4-Increase-max-screen-size-to-4096x4096.patch new file mode 100644 index 000000000..e004c477b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0600-drm-vc4-Increase-max-screen-size-to-4096x4096.patch @@ -0,0 +1,26 @@ +From 519f7cae9e7120bb3abc13d33ace4f7438d140bc Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 3 Apr 2019 15:20:05 +0100 +Subject: [PATCH 600/703] drm: vc4: Increase max screen size to 4096x4096. + +We now should support 4k screens, therefore this limit needs to +be increased. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_kms.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -429,8 +429,8 @@ int vc4_kms_load(struct drm_device *dev) + return ret; + } + +- dev->mode_config.max_width = 2048; +- dev->mode_config.max_height = 2048; ++ dev->mode_config.max_width = 4096; ++ dev->mode_config.max_height = 4096; + dev->mode_config.funcs = &vc4_mode_funcs; + dev->mode_config.preferred_depth = 24; + dev->mode_config.async_page_flip = true; diff --git a/target/linux/brcm2708/patches-4.19/950-0601-drm-vc4-Add-support-for-multiple-displays-to-fkms.patch b/target/linux/brcm2708/patches-4.19/950-0601-drm-vc4-Add-support-for-multiple-displays-to-fkms.patch new file mode 100644 index 000000000..ff69f4eb9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0601-drm-vc4-Add-support-for-multiple-displays-to-fkms.patch @@ -0,0 +1,280 @@ +From f4dee6e8ddab28130160a4dba535dca167e69f13 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 3 Apr 2019 17:15:45 +0100 +Subject: [PATCH 601/703] drm: vc4: Add support for multiple displays to fkms + +There is a slightly nasty hack in that all crtcs share the +same SMI interrupt from the firmware. This seems to currently +work well enough, but ought to be fixed at a later date. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 160 +++++++++++++++++-------- + 1 file changed, 113 insertions(+), 47 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -29,6 +29,8 @@ + #include "vc_image_types.h" + #include + ++#define PLANES_PER_CRTC 3 ++ + struct set_plane { + u8 display; + u8 plane_id; +@@ -175,6 +177,7 @@ struct vc4_crtc { + struct drm_pending_vblank_event *event; + u32 overscan[4]; + bool vblank_enabled; ++ u32 display_number; + }; + + static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc) +@@ -480,6 +483,7 @@ static const struct drm_plane_helper_fun + + static struct drm_plane *vc4_fkms_plane_init(struct drm_device *dev, + enum drm_plane_type type, ++ u8 display_num, + u8 plane_id) + { + struct drm_plane *plane = NULL; +@@ -543,7 +547,7 @@ static struct drm_plane *vc4_fkms_plane_ + vc4_plane->mb.tag.tag = RPI_FIRMWARE_SET_PLANE; + vc4_plane->mb.tag.buf_size = sizeof(struct set_plane); + vc4_plane->mb.tag.req_resp_size = 0; +- vc4_plane->mb.plane.display = 0; ++ vc4_plane->mb.plane.display = display_num; + vc4_plane->mb.plane.plane_id = plane_id; + vc4_plane->mb.plane.layer = default_zpos ? default_zpos : -127; + +@@ -630,16 +634,20 @@ static void vc4_crtc_handle_page_flip(st + + static irqreturn_t vc4_crtc_irq_handler(int irq, void *data) + { +- struct vc4_crtc *vc4_crtc = data; +- u32 stat = readl(vc4_crtc->regs + SMICS); ++ struct vc4_crtc **crtc_list = data; ++ int i; ++ u32 stat = readl(crtc_list[0]->regs + SMICS); + irqreturn_t ret = IRQ_NONE; + + if (stat & SMICS_INTERRUPTS) { +- writel(0, vc4_crtc->regs + SMICS); +- if (vc4_crtc->vblank_enabled) +- drm_crtc_handle_vblank(&vc4_crtc->base); +- vc4_crtc_handle_page_flip(vc4_crtc); +- ret = IRQ_HANDLED; ++ writel(0, crtc_list[0]->regs + SMICS); ++ ++ for (i = 0; crtc_list[i]; i++) { ++ if (crtc_list[i]->vblank_enabled) ++ drm_crtc_handle_vblank(&crtc_list[i]->base); ++ vc4_crtc_handle_page_flip(crtc_list[i]); ++ ret = IRQ_HANDLED; ++ } + } + + return ret; +@@ -836,66 +844,55 @@ static const struct drm_encoder_helper_f + .disable = vc4_fkms_encoder_disable, + }; + +-static int vc4_fkms_bind(struct device *dev, struct device *master, void *data) ++static int vc4_fkms_create_screen(struct device *dev, struct drm_device *drm, ++ int display_idx, int display_ref, ++ struct vc4_crtc **ret_crtc) + { +- struct platform_device *pdev = to_platform_device(dev); +- struct drm_device *drm = dev_get_drvdata(master); + struct vc4_dev *vc4 = to_vc4_dev(drm); + struct vc4_crtc *vc4_crtc; + struct vc4_fkms_encoder *vc4_encoder; + struct drm_crtc *crtc; + struct drm_plane *primary_plane, *overlay_plane, *cursor_plane; + struct drm_plane *destroy_plane, *temp; +- struct device_node *firmware_node; + u32 blank = 1; + int ret; + +- vc4->firmware_kms = true; +- +- /* firmware kms doesn't have precise a scanoutpos implementation, so +- * we can't do the precise vblank timestamp mode. +- */ +- drm->driver->get_scanout_position = NULL; +- drm->driver->get_vblank_timestamp = NULL; +- + vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL); + if (!vc4_crtc) + return -ENOMEM; + crtc = &vc4_crtc->base; + +- firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0); +- vc4->firmware = rpi_firmware_get(firmware_node); +- if (!vc4->firmware) { +- DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n"); +- return -EPROBE_DEFER; +- } +- of_node_put(firmware_node); +- +- /* Map the SMI interrupt reg */ +- vc4_crtc->regs = vc4_ioremap_regs(pdev, 0); +- if (IS_ERR(vc4_crtc->regs)) +- return PTR_ERR(vc4_crtc->regs); ++ vc4_crtc->display_number = display_ref; + + /* Blank the firmware provided framebuffer */ + rpi_firmware_property(vc4->firmware, + RPI_FIRMWARE_FRAMEBUFFER_BLANK, + &blank, sizeof(blank)); + +- primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY, 0); ++ primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY, ++ display_ref, ++ 0 + (display_idx * PLANES_PER_CRTC) ++ ); + if (IS_ERR(primary_plane)) { + dev_err(dev, "failed to construct primary plane\n"); + ret = PTR_ERR(primary_plane); + goto err; + } + +- overlay_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_OVERLAY, 1); ++ overlay_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_OVERLAY, ++ display_ref, ++ 1 + (display_idx * PLANES_PER_CRTC) ++ ); + if (IS_ERR(overlay_plane)) { + dev_err(dev, "failed to construct overlay plane\n"); + ret = PTR_ERR(overlay_plane); + goto err; + } + +- cursor_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_CURSOR, 2); ++ cursor_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_CURSOR, ++ display_ref, ++ 2 + (display_idx * PLANES_PER_CRTC) ++ ); + if (IS_ERR(cursor_plane)) { + dev_err(dev, "failed to construct cursor plane\n"); + ret = PTR_ERR(cursor_plane); +@@ -922,13 +919,6 @@ static int vc4_fkms_bind(struct device * + goto err_destroy_encoder; + } + +- writel(0, vc4_crtc->regs + SMICS); +- ret = devm_request_irq(dev, platform_get_irq(pdev, 0), +- vc4_crtc_irq_handler, 0, "vc4 firmware kms", +- vc4_crtc); +- if (ret) +- goto err_destroy_connector; +- + ret = rpi_firmware_property(vc4->firmware, + RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN, + &vc4_crtc->overscan, +@@ -938,7 +928,7 @@ static int vc4_fkms_bind(struct device * + memset(&vc4_crtc->overscan, 0, sizeof(vc4_crtc->overscan)); + } + +- platform_set_drvdata(pdev, vc4_crtc); ++ *ret_crtc = vc4_crtc; + + return 0; + +@@ -955,15 +945,91 @@ err: + return ret; + } + ++static int vc4_fkms_bind(struct device *dev, struct device *master, void *data) ++{ ++ struct platform_device *pdev = to_platform_device(dev); ++ struct drm_device *drm = dev_get_drvdata(master); ++ struct vc4_dev *vc4 = to_vc4_dev(drm); ++ struct device_node *firmware_node; ++ struct vc4_crtc **crtc_list; ++ u32 num_displays, display_num; ++ int ret; ++ const u32 display_num_lookup[] = {2, 7, 1}; ++ ++ vc4->firmware_kms = true; ++ ++ /* firmware kms doesn't have precise a scanoutpos implementation, so ++ * we can't do the precise vblank timestamp mode. ++ */ ++ drm->driver->get_scanout_position = NULL; ++ drm->driver->get_vblank_timestamp = NULL; ++ ++ firmware_node = of_parse_phandle(dev->of_node, "brcm,firmware", 0); ++ vc4->firmware = rpi_firmware_get(firmware_node); ++ if (!vc4->firmware) { ++ DRM_DEBUG("Failed to get Raspberry Pi firmware reference.\n"); ++ return -EPROBE_DEFER; ++ } ++ of_node_put(firmware_node); ++ ++ ret = rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS, ++ &num_displays, sizeof(u32)); ++ ++ /* If we fail to get the number of displays, or it returns 0, then ++ * assume old firmware that doesn't have the mailbox call, so just ++ * set one display ++ */ ++ if (ret || num_displays == 0) { ++ num_displays = 1; ++ DRM_WARN("Unable to determine number of displays's. Assuming 1\n"); ++ ret = 0; ++ } ++ ++ /* Allocate a list, with space for a NULL on the end */ ++ crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1), ++ GFP_KERNEL); ++ if (!crtc_list) ++ return -ENOMEM; ++ ++ for (display_num = 0; display_num < num_displays; display_num++) { ++ ret = vc4_fkms_create_screen(dev, drm, display_num, ++ display_num_lookup[display_num], ++ &crtc_list[display_num]); ++ if (ret) ++ DRM_ERROR("Oh dear, failed to create display %u\n", ++ display_num); ++ } ++ ++ /* Map the SMI interrupt reg */ ++ crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0); ++ if (IS_ERR(crtc_list[0]->regs)) ++ DRM_ERROR("Oh dear, failed to map registers\n"); ++ ++ writel(0, crtc_list[0]->regs + SMICS); ++ ret = devm_request_irq(dev, platform_get_irq(pdev, 0), ++ vc4_crtc_irq_handler, 0, "vc4 firmware kms", ++ crtc_list); ++ if (ret) ++ DRM_ERROR("Oh dear, failed to register IRQ\n"); ++ ++ platform_set_drvdata(pdev, crtc_list); ++ ++ return 0; ++} ++ + static void vc4_fkms_unbind(struct device *dev, struct device *master, + void *data) + { + struct platform_device *pdev = to_platform_device(dev); +- struct vc4_crtc *vc4_crtc = dev_get_drvdata(dev); ++ struct vc4_crtc **crtc_list = dev_get_drvdata(dev); ++ int i; + +- vc4_fkms_connector_destroy(vc4_crtc->connector); +- vc4_fkms_encoder_destroy(vc4_crtc->encoder); +- drm_crtc_cleanup(&vc4_crtc->base); ++ for (i = 0; crtc_list[i]; i++) { ++ vc4_fkms_connector_destroy(crtc_list[i]->connector); ++ vc4_fkms_encoder_destroy(crtc_list[i]->encoder); ++ drm_crtc_cleanup(&crtc_list[i]->base); ++ } + + platform_set_drvdata(pdev, NULL); + } diff --git a/target/linux/brcm2708/patches-4.19/950-0602-drm-vc4-Fix-build-warning.patch b/target/linux/brcm2708/patches-4.19/950-0602-drm-vc4-Fix-build-warning.patch new file mode 100644 index 000000000..05fd757b7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0602-drm-vc4-Fix-build-warning.patch @@ -0,0 +1,21 @@ +From 56ac34a516982f51f7a0678f185bcb80f5070a0e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 5 Apr 2019 17:21:56 +0100 +Subject: [PATCH 602/703] drm: vc4: Fix build warning + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -932,8 +932,6 @@ static int vc4_fkms_create_screen(struct + + return 0; + +-err_destroy_connector: +- vc4_fkms_connector_destroy(vc4_crtc->connector); + err_destroy_encoder: + vc4_fkms_encoder_destroy(vc4_crtc->encoder); + list_for_each_entry_safe(destroy_plane, temp, diff --git a/target/linux/brcm2708/patches-4.19/950-0603-drm-vc4-Select-display-to-blank-during-initialisatio.patch b/target/linux/brcm2708/patches-4.19/950-0603-drm-vc4-Select-display-to-blank-during-initialisatio.patch new file mode 100644 index 000000000..0c40f8824 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0603-drm-vc4-Select-display-to-blank-during-initialisatio.patch @@ -0,0 +1,54 @@ +From 2ec4f853916551a57f574b988162b589e3331359 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 5 Apr 2019 17:23:15 +0100 +Subject: [PATCH 603/703] drm: vc4: Select display to blank during + initialisation + +Otherwise the rainbow splash screen remained in the display list + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 18 ++++++++++++++---- + 1 file changed, 14 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -87,6 +87,13 @@ struct fb_alloc_tags { + u32 layer; + }; + ++struct mailbox_blank_display { ++ struct rpi_firmware_property_tag_header tag1; ++ u32 display; ++ struct rpi_firmware_property_tag_header tag2; ++ u32 blank; ++}; ++ + static const struct vc_image_format { + u32 drm; /* DRM_FORMAT_* */ + u32 vc_image; /* VC_IMAGE_* */ +@@ -854,7 +861,12 @@ static int vc4_fkms_create_screen(struct + struct drm_crtc *crtc; + struct drm_plane *primary_plane, *overlay_plane, *cursor_plane; + struct drm_plane *destroy_plane, *temp; +- u32 blank = 1; ++ struct mailbox_blank_display blank = { ++ .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, }, ++ .display = display_idx, ++ .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_BLANK, 4, 0, }, ++ .blank = 1, ++ }; + int ret; + + vc4_crtc = devm_kzalloc(dev, sizeof(*vc4_crtc), GFP_KERNEL); +@@ -865,9 +877,7 @@ static int vc4_fkms_create_screen(struct + vc4_crtc->display_number = display_ref; + + /* Blank the firmware provided framebuffer */ +- rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_FRAMEBUFFER_BLANK, +- &blank, sizeof(blank)); ++ rpi_firmware_property_list(vc4->firmware, &blank, sizeof(blank)); + + primary_plane = vc4_fkms_plane_init(drm, DRM_PLANE_TYPE_PRIMARY, + display_ref, diff --git a/target/linux/brcm2708/patches-4.19/950-0604-drm-vc4-Remove-now-unused-structure.patch b/target/linux/brcm2708/patches-4.19/950-0604-drm-vc4-Remove-now-unused-structure.patch new file mode 100644 index 000000000..fa75bc4d1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0604-drm-vc4-Remove-now-unused-structure.patch @@ -0,0 +1,41 @@ +From 8b4aa15c2c83d84b3f8e94412af3a03061c8878d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 5 Apr 2019 17:24:20 +0100 +Subject: [PATCH 604/703] drm: vc4: Remove now unused structure. + +Cleaning up structure that was unused after +fbb59a2 drm: vc4: Add an overlay plane to vc4-firmware-kms + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 19 ------------------- + 1 file changed, 19 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -68,25 +68,6 @@ struct mailbox_set_plane { + struct set_plane plane; + }; + +-struct fb_alloc_tags { +- struct rpi_firmware_property_tag_header tag1; +- u32 xres, yres; +- struct rpi_firmware_property_tag_header tag2; +- u32 xres_virtual, yres_virtual; +- struct rpi_firmware_property_tag_header tag3; +- u32 bpp; +- struct rpi_firmware_property_tag_header tag4; +- u32 xoffset, yoffset; +- struct rpi_firmware_property_tag_header tag5; +- u32 base, screen_size; +- struct rpi_firmware_property_tag_header tag6; +- u32 pitch; +- struct rpi_firmware_property_tag_header tag7; +- u32 alpha_mode; +- struct rpi_firmware_property_tag_header tag8; +- u32 layer; +-}; +- + struct mailbox_blank_display { + struct rpi_firmware_property_tag_header tag1; + u32 display; diff --git a/target/linux/brcm2708/patches-4.19/950-0605-drm-vc4-Query-the-display-ID-for-each-display-in-FKM.patch b/target/linux/brcm2708/patches-4.19/950-0605-drm-vc4-Query-the-display-ID-for-each-display-in-FKM.patch new file mode 100644 index 000000000..b470a3bf6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0605-drm-vc4-Query-the-display-ID-for-each-display-in-FKM.patch @@ -0,0 +1,58 @@ +From 9b3747e9bdce9beb84bec50e7ad06af365e50173 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 9 Apr 2019 12:37:28 +0100 +Subject: [PATCH 605/703] drm: vc4: Query the display ID for each display in + FKMS + +Replace the hard coded list of display IDs for a mailbox call +that returns the display ID for each display that has been +detected. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 16 +++++++++++++--- + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 2 files changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -943,7 +943,7 @@ static int vc4_fkms_bind(struct device * + struct vc4_crtc **crtc_list; + u32 num_displays, display_num; + int ret; +- const u32 display_num_lookup[] = {2, 7, 1}; ++ u32 display_id; + + vc4->firmware_kms = true; + +@@ -982,8 +982,18 @@ static int vc4_fkms_bind(struct device * + return -ENOMEM; + + for (display_num = 0; display_num < num_displays; display_num++) { +- ret = vc4_fkms_create_screen(dev, drm, display_num, +- display_num_lookup[display_num], ++ display_id = display_num; ++ ret = rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID, ++ &display_id, sizeof(display_id)); ++ /* FIXME: Determine the correct error handling here. ++ * Should we fail to create the one "screen" but keep the ++ * others, or fail the whole thing? ++ */ ++ if (ret) ++ DRM_ERROR("Failed to get display id %u\n", display_num); ++ ++ ret = vc4_fkms_create_screen(dev, drm, display_num, display_id, + &crtc_list[display_num]); + if (ret) + DRM_ERROR("Oh dear, failed to create display %u\n", +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -117,6 +117,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, + RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, + RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016, + RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, + RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, + RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, diff --git a/target/linux/brcm2708/patches-4.19/950-0606-drm-vc4-Set-the-display-number-when-querying-the-dis.patch b/target/linux/brcm2708/patches-4.19/950-0606-drm-vc4-Set-the-display-number-when-querying-the-dis.patch new file mode 100644 index 000000000..36c5081ac --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0606-drm-vc4-Set-the-display-number-when-querying-the-dis.patch @@ -0,0 +1,103 @@ +From d00d0711df4da66465ba5086e99c5936ea3b9577 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 9 Apr 2019 14:00:07 +0100 +Subject: [PATCH 606/703] drm/vc4: Set the display number when querying the + display resolution + +Without this the two displays got set to the same resolution. +(Requires a firmware bug fix to work). + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 37 +++++++++++++++++++------- + 1 file changed, 27 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -75,6 +75,13 @@ struct mailbox_blank_display { + u32 blank; + }; + ++struct mailbox_get_width_height { ++ struct rpi_firmware_property_tag_header tag1; ++ u32 display; ++ struct rpi_firmware_property_tag_header tag2; ++ u32 wh[2]; ++}; ++ + static const struct vc_image_format { + u32 drm; /* DRM_FORMAT_* */ + u32 vc_image; /* VC_IMAGE_* */ +@@ -192,6 +199,7 @@ struct vc4_fkms_connector { + * hook. + */ + struct drm_encoder *encoder; ++ u32 display_idx; + }; + + static inline struct vc4_fkms_connector * +@@ -723,21 +731,27 @@ vc4_fkms_connector_detect(struct drm_con + static int vc4_fkms_connector_get_modes(struct drm_connector *connector) + { + struct drm_device *dev = connector->dev; ++ struct vc4_fkms_connector *fkms_connector = ++ to_vc4_fkms_connector(connector); + struct vc4_dev *vc4 = to_vc4_dev(dev); +- u32 wh[2] = {0, 0}; +- int ret; + struct drm_display_mode *mode; ++ struct mailbox_get_width_height wh = { ++ .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, }, ++ .display = fkms_connector->display_idx, ++ .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT, ++ 8, 0, }, ++ }; ++ int ret; ++ ++ ret = rpi_firmware_property_list(vc4->firmware, &wh, sizeof(wh)); + +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT, +- &wh, sizeof(wh)); + if (ret) { + DRM_ERROR("Failed to get screen size: %d (0x%08x 0x%08x)\n", +- ret, wh[0], wh[1]); ++ ret, wh.wh[0], wh.wh[1]); + return 0; + } + +- mode = drm_cvt_mode(dev, wh[0], wh[1], 60 /* vrefresh */, ++ mode = drm_cvt_mode(dev, wh.wh[0], wh.wh[1], 60 /* vrefresh */, + 0, 0, false); + drm_mode_probed_add(connector, mode); + +@@ -772,8 +786,9 @@ static const struct drm_connector_helper + .best_encoder = vc4_fkms_connector_best_encoder, + }; + +-static struct drm_connector *vc4_fkms_connector_init(struct drm_device *dev, +- struct drm_encoder *encoder) ++static struct drm_connector * ++vc4_fkms_connector_init(struct drm_device *dev, struct drm_encoder *encoder, ++ u32 display_idx) + { + struct drm_connector *connector = NULL; + struct vc4_fkms_connector *fkms_connector; +@@ -788,6 +803,7 @@ static struct drm_connector *vc4_fkms_co + connector = &fkms_connector->base; + + fkms_connector->encoder = encoder; ++ fkms_connector->display_idx = display_idx; + + drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, + DRM_MODE_CONNECTOR_HDMIA); +@@ -904,7 +920,8 @@ static int vc4_fkms_create_screen(struct + drm_encoder_helper_add(&vc4_encoder->base, + &vc4_fkms_encoder_helper_funcs); + +- vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base); ++ vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base, ++ display_idx); + if (IS_ERR(vc4_crtc->connector)) { + ret = PTR_ERR(vc4_crtc->connector); + goto err_destroy_encoder; diff --git a/target/linux/brcm2708/patches-4.19/950-0607-drm-vc4-Need-to-call-drm_crtc_vblank_-on-off-from-vc.patch b/target/linux/brcm2708/patches-4.19/950-0607-drm-vc4-Need-to-call-drm_crtc_vblank_-on-off-from-vc.patch new file mode 100644 index 000000000..a50401279 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0607-drm-vc4-Need-to-call-drm_crtc_vblank_-on-off-from-vc.patch @@ -0,0 +1,46 @@ +From 7129a308f4716a416f3e0fdd5f565457ed3bde03 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 9 Apr 2019 18:14:44 +0100 +Subject: [PATCH 607/703] drm: vc4: Need to call drm_crtc_vblank_[on|off] from + vc4_crtc_[en|dis]able + +vblank needs to be enabled and disabled by the driver to avoid the +DRM framework complaining in the kernel log. + +vc4_fkms_disable_vblank needs to signal that we don't want vblank +callbacks too. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -562,6 +562,8 @@ static void vc4_crtc_mode_set_nofb(struc + + static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ drm_crtc_vblank_off(crtc); ++ + /* Always turn the planes off on CRTC disable. In DRM, planes + * are enabled/disabled through the update/disable hooks + * above, and the CRTC enable/disable independently controls +@@ -577,6 +579,7 @@ static void vc4_crtc_disable(struct drm_ + + static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ drm_crtc_vblank_on(crtc); + /* Unblank the planes (if they're supposed to be displayed). */ + + if (crtc->primary->state->fb) +@@ -673,6 +676,9 @@ static int vc4_fkms_enable_vblank(struct + + static void vc4_fkms_disable_vblank(struct drm_crtc *crtc) + { ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ ++ vc4_crtc->vblank_enabled = false; + } + + static const struct drm_crtc_funcs vc4_crtc_funcs = { diff --git a/target/linux/brcm2708/patches-4.19/950-0608-drm-vc4-Add-support-for-H-V-flips-on-each-plane-for-.patch b/target/linux/brcm2708/patches-4.19/950-0608-drm-vc4-Add-support-for-H-V-flips-on-each-plane-for-.patch new file mode 100644 index 000000000..6d789b089 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0608-drm-vc4-Add-support-for-H-V-flips-on-each-plane-for-.patch @@ -0,0 +1,86 @@ +From 9887c3c6ada2620592687b520e778980bc32c256 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 9 Apr 2019 17:19:51 +0100 +Subject: [PATCH 608/703] drm: vc4: Add support for H & V flips on each plane + for FKMS + +They are near zero cost options for the HVS, therefore they +may as well be implemented, and it allows us to invert the +DSI display. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 36 ++++++++++++++++++++++++++ + 1 file changed, 36 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -61,8 +61,21 @@ struct set_plane { + u8 padding; + + u32 planes[4]; /* DMA address of each plane */ ++ ++ u32 transform; + }; + ++/* Values for the transform field */ ++#define TRANSFORM_NO_ROTATE 0 ++#define TRANSFORM_ROTATE_180 BIT(1) ++#define TRANSFORM_FLIP_HRIZ BIT(16) ++#define TRANSFORM_FLIP_VERT BIT(17) ++ ++#define SUPPORTED_ROTATIONS (DRM_MODE_ROTATE_0 | \ ++ DRM_MODE_ROTATE_180 | \ ++ DRM_MODE_REFLECT_X | \ ++ DRM_MODE_REFLECT_Y) ++ + struct mailbox_set_plane { + struct rpi_firmware_property_tag_header tag; + struct set_plane plane; +@@ -274,6 +287,7 @@ static void vc4_plane_atomic_update(stru + struct vc4_crtc *vc4_crtc = to_vc4_crtc(state->crtc); + int num_planes = fb->format->num_planes; + struct drm_display_mode *mode = &state->crtc->mode; ++ unsigned int rotation = SUPPORTED_ROTATIONS; + + mb->plane.vc_image_type = vc_fmt->vc_image; + mb->plane.width = fb->width; +@@ -294,6 +308,24 @@ static void vc4_plane_atomic_update(stru + mb->plane.is_vu = vc_fmt->is_vu; + mb->plane.planes[0] = bo->paddr + fb->offsets[0]; + ++ rotation = drm_rotation_simplify(state->rotation, rotation); ++ ++ switch (rotation) { ++ default: ++ case DRM_MODE_ROTATE_0: ++ mb->plane.transform = TRANSFORM_NO_ROTATE; ++ break; ++ case DRM_MODE_ROTATE_180: ++ mb->plane.transform = TRANSFORM_ROTATE_180; ++ break; ++ case DRM_MODE_REFLECT_X: ++ mb->plane.transform = TRANSFORM_FLIP_HRIZ; ++ break; ++ case DRM_MODE_REFLECT_Y: ++ mb->plane.transform = TRANSFORM_FLIP_VERT; ++ break; ++ } ++ + /* FIXME: If the dest rect goes off screen then clip the src rect so we + * don't have off-screen pixels. + */ +@@ -514,9 +546,13 @@ static struct drm_plane *vc4_fkms_plane_ + formats, num_formats, modifiers, + type, NULL); + ++ /* FIXME: Do we need to be checking return values from all these calls? ++ */ + drm_plane_helper_add(plane, &vc4_plane_helper_funcs); + + drm_plane_create_alpha_property(plane); ++ drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, ++ SUPPORTED_ROTATIONS); + + /* + * Default frame buffer setup is with FB on -127, and raspistill etc diff --git a/target/linux/brcm2708/patches-4.19/950-0609-drm-vc4-Remove-unused-vc4_fkms_cancel_page_flip-func.patch b/target/linux/brcm2708/patches-4.19/950-0609-drm-vc4-Remove-unused-vc4_fkms_cancel_page_flip-func.patch new file mode 100644 index 000000000..2443c04d4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0609-drm-vc4-Remove-unused-vc4_fkms_cancel_page_flip-func.patch @@ -0,0 +1,56 @@ +From 335909eb24aba8b42738895ae2fe7d24c67ec466 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 10 Apr 2019 17:35:05 +0100 +Subject: [PATCH 609/703] drm: vc4: Remove unused vc4_fkms_cancel_page_flip + function + +"32a3dbe drm/vc4: Nuke preclose hook" removed vc4_cancel_page_flip, +but vc4_fkms_cancel_page_flip was still be added to with the +fkms driver, even though it was never called. +Nuke it too. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_drv.h | 1 - + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 20 -------------------- + 2 files changed, 21 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -724,7 +724,6 @@ extern const struct dma_fence_ops vc4_fe + + /* vc4_firmware_kms.c */ + extern struct platform_driver vc4_firmware_kms_driver; +-void vc4_fkms_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); + + /* vc4_gem.c */ + void vc4_gem_init(struct drm_device *dev); +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -739,26 +739,6 @@ static const struct drm_crtc_helper_func + .atomic_flush = vc4_crtc_atomic_flush, + }; + +-/* Frees the page flip event when the DRM device is closed with the +- * event still outstanding. +- */ +-void vc4_fkms_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file) +-{ +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); +- struct drm_device *dev = crtc->dev; +- unsigned long flags; +- +- spin_lock_irqsave(&dev->event_lock, flags); +- +- if (vc4_crtc->event && vc4_crtc->event->base.file_priv == file) { +- kfree(&vc4_crtc->event->base); +- drm_crtc_vblank_put(crtc); +- vc4_crtc->event = NULL; +- } +- +- spin_unlock_irqrestore(&dev->event_lock, flags); +-} +- + static const struct of_device_id vc4_firmware_kms_dt_match[] = { + { .compatible = "raspberrypi,rpi-firmware-kms" }, + {} diff --git a/target/linux/brcm2708/patches-4.19/950-0610-drm-vc4-Iterate-over-all-planes-in-vc4_crtc_-dis-en-.patch b/target/linux/brcm2708/patches-4.19/950-0610-drm-vc4-Iterate-over-all-planes-in-vc4_crtc_-dis-en-.patch new file mode 100644 index 000000000..42c1a93f6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0610-drm-vc4-Iterate-over-all-planes-in-vc4_crtc_-dis-en-.patch @@ -0,0 +1,57 @@ +From 1aadf149d0be5b0cab5425845a21cbfd35618119 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 10 Apr 2019 17:42:37 +0100 +Subject: [PATCH 610/703] drm: vc4: Iterate over all planes in + vc4_crtc_[dis|en]able + +Fixes a FIXME where the overlay plane wouldn't be restored. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 20 +++++++++++--------- + 1 file changed, 11 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -598,6 +598,8 @@ static void vc4_crtc_mode_set_nofb(struc + + static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ struct drm_plane *plane; ++ + drm_crtc_vblank_off(crtc); + + /* Always turn the planes off on CRTC disable. In DRM, planes +@@ -607,23 +609,23 @@ static void vc4_crtc_disable(struct drm_ + * give us a CRTC-level control for that. + */ + +- vc4_plane_atomic_disable(crtc->cursor, crtc->cursor->state); +- vc4_plane_atomic_disable(crtc->primary, crtc->primary->state); +- +- /* FIXME: Disable overlay planes */ ++ drm_atomic_crtc_for_each_plane(plane, crtc) ++ vc4_plane_atomic_disable(plane, plane->state); + } + + static void vc4_crtc_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { ++ struct drm_plane *plane; ++ + drm_crtc_vblank_on(crtc); ++ + /* Unblank the planes (if they're supposed to be displayed). */ ++ drm_atomic_crtc_for_each_plane(plane, crtc) ++ if (plane->state->fb) ++ vc4_plane_set_blank(plane, plane->state->visible); ++} + +- if (crtc->primary->state->fb) +- vc4_plane_set_blank(crtc->primary, false); +- if (crtc->cursor->state->fb) +- vc4_plane_set_blank(crtc->cursor, crtc->cursor->state); + +- /* FIXME: Enable overlay planes */ + } + + static int vc4_crtc_atomic_check(struct drm_crtc *crtc, diff --git a/target/linux/brcm2708/patches-4.19/950-0611-drm-vc4-Bring-fkms-into-line-with-kms-in-blocking-do.patch b/target/linux/brcm2708/patches-4.19/950-0611-drm-vc4-Bring-fkms-into-line-with-kms-in-blocking-do.patch new file mode 100644 index 000000000..54f44f0c3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0611-drm-vc4-Bring-fkms-into-line-with-kms-in-blocking-do.patch @@ -0,0 +1,47 @@ +From 6b36249bd9c3399d4b8552c7557406586dc31521 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 10 Apr 2019 17:43:57 +0100 +Subject: [PATCH 611/703] drm: vc4: Bring fkms into line with kms in blocking + doublescan modes + +Implement vc4_crtc_mode_valid so that it blocks doublescan modes + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 15 +++++++++++++-- + 1 file changed, 13 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -625,7 +625,17 @@ static void vc4_crtc_enable(struct drm_c + vc4_plane_set_blank(plane, plane->state->visible); + } + ++static enum drm_mode_status ++vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) ++{ ++ /* Do not allow doublescan modes from user space */ ++ if (mode->flags & DRM_MODE_FLAG_DBLSCAN) { ++ DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n", ++ crtc->base.id); ++ return MODE_NO_DBLESCAN; ++ } + ++ return MODE_OK; + } + + static int vc4_crtc_atomic_check(struct drm_crtc *crtc, +@@ -735,10 +745,11 @@ static const struct drm_crtc_funcs vc4_c + + static const struct drm_crtc_helper_funcs vc4_crtc_helper_funcs = { + .mode_set_nofb = vc4_crtc_mode_set_nofb, +- .atomic_disable = vc4_crtc_disable, +- .atomic_enable = vc4_crtc_enable, ++ .mode_valid = vc4_crtc_mode_valid, + .atomic_check = vc4_crtc_atomic_check, + .atomic_flush = vc4_crtc_atomic_flush, ++ .atomic_enable = vc4_crtc_enable, ++ .atomic_disable = vc4_crtc_disable, + }; + + static const struct of_device_id vc4_firmware_kms_dt_match[] = { diff --git a/target/linux/brcm2708/patches-4.19/950-0612-drm-vc4-Increase-max_width-height-to-7680.patch b/target/linux/brcm2708/patches-4.19/950-0612-drm-vc4-Increase-max_width-height-to-7680.patch new file mode 100644 index 000000000..8bf6ff91c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0612-drm-vc4-Increase-max_width-height-to-7680.patch @@ -0,0 +1,27 @@ +From 64a1a6d813cea64ee9dafca163e62542dce04399 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 29 Apr 2019 18:45:00 +0100 +Subject: [PATCH 612/703] drm: vc4: Increase max_width/height to 7680. + +There are some limits still being investigated that stop +us going up to 8192, but 7680 is sufficient for dual 4k +displays. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_kms.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -429,8 +429,8 @@ int vc4_kms_load(struct drm_device *dev) + return ret; + } + +- dev->mode_config.max_width = 4096; +- dev->mode_config.max_height = 4096; ++ dev->mode_config.max_width = 7680; ++ dev->mode_config.max_height = 7680; + dev->mode_config.funcs = &vc4_mode_funcs; + dev->mode_config.preferred_depth = 24; + dev->mode_config.async_page_flip = true; diff --git a/target/linux/brcm2708/patches-4.19/950-0613-drm-vc4-FKMS-reads-the-EDID-from-fw-and-supports-mod.patch b/target/linux/brcm2708/patches-4.19/950-0613-drm-vc4-FKMS-reads-the-EDID-from-fw-and-supports-mod.patch new file mode 100644 index 000000000..3e4e9e7c1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0613-drm-vc4-FKMS-reads-the-EDID-from-fw-and-supports-mod.patch @@ -0,0 +1,557 @@ +From 9dccdfcd48e7adb46af440cec26df2d8146afefb Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 9 Apr 2019 18:23:41 +0100 +Subject: [PATCH 613/703] drm: vc4: FKMS reads the EDID from fw, and supports + mode setting + +This extends FKMS to read the EDID from the display, and support +requesting a particular mode via KMS. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 334 ++++++++++++++++++--- + include/soc/bcm2835/raspberrypi-firmware.h | 2 + + 2 files changed, 302 insertions(+), 34 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -88,11 +88,60 @@ struct mailbox_blank_display { + u32 blank; + }; + +-struct mailbox_get_width_height { ++struct mailbox_get_edid { + struct rpi_firmware_property_tag_header tag1; +- u32 display; +- struct rpi_firmware_property_tag_header tag2; +- u32 wh[2]; ++ u32 block; ++ u32 display_number; ++ u8 edid[128]; ++}; ++ ++struct set_timings { ++ u8 display; ++ u8 padding; ++ u16 video_id_code; ++ ++ u32 clock; /* in kHz */ ++ ++ u16 hdisplay; ++ u16 hsync_start; ++ ++ u16 hsync_end; ++ u16 htotal; ++ ++ u16 hskew; ++ u16 vdisplay; ++ ++ u16 vsync_start; ++ u16 vsync_end; ++ ++ u16 vtotal; ++ u16 vscan; ++ ++ u16 vrefresh; ++ u16 padding2; ++ ++ u32 flags; ++#define TIMINGS_FLAGS_H_SYNC_POS BIT(0) ++#define TIMINGS_FLAGS_H_SYNC_NEG 0 ++#define TIMINGS_FLAGS_V_SYNC_POS BIT(1) ++#define TIMINGS_FLAGS_V_SYNC_NEG 0 ++ ++#define TIMINGS_FLAGS_ASPECT_MASK GENMASK(7, 4) ++#define TIMINGS_FLAGS_ASPECT_NONE (0 << 4) ++#define TIMINGS_FLAGS_ASPECT_4_3 (1 << 4) ++#define TIMINGS_FLAGS_ASPECT_16_9 (2 << 4) ++#define TIMINGS_FLAGS_ASPECT_64_27 (3 << 4) ++#define TIMINGS_FLAGS_ASPECT_256_135 (4 << 4) ++ ++/* Limited range RGB flag. Not set corresponds to full range. */ ++#define TIMINGS_FLAGS_RGB_LIMITED BIT(8) ++/* DVI monitor, therefore disable infoframes. Not set corresponds to HDMI. */ ++#define TIMINGS_FLAGS_DVI BIT(9) ++}; ++ ++struct mailbox_set_mode { ++ struct rpi_firmware_property_tag_header tag1; ++ struct set_timings timings; + }; + + static const struct vc_image_format { +@@ -186,6 +235,7 @@ struct vc4_crtc { + u32 overscan[4]; + bool vblank_enabled; + u32 display_number; ++ u32 display_type; + }; + + static inline struct vc4_crtc *to_vc4_crtc(struct drm_crtc *crtc) +@@ -195,6 +245,8 @@ static inline struct vc4_crtc *to_vc4_cr + + struct vc4_fkms_encoder { + struct drm_encoder base; ++ bool hdmi_monitor; ++ bool rgb_range_selectable; + }; + + static inline struct vc4_fkms_encoder * +@@ -212,7 +264,9 @@ struct vc4_fkms_connector { + * hook. + */ + struct drm_encoder *encoder; +- u32 display_idx; ++ struct vc4_dev *vc4_dev; ++ u32 display_number; ++ u32 display_type; + }; + + static inline struct vc4_fkms_connector * +@@ -221,6 +275,26 @@ to_vc4_fkms_connector(struct drm_connect + return container_of(connector, struct vc4_fkms_connector, base); + } + ++static u32 vc4_get_display_type(u32 display_number) ++{ ++ const u32 display_types[] = { ++ /* The firmware display (DispmanX) IDs map to specific types in ++ * a fixed manner. ++ */ ++ DRM_MODE_ENCODER_DSI, /* MAIN_LCD */ ++ DRM_MODE_ENCODER_DSI, /* AUX_LCD */ ++ DRM_MODE_ENCODER_TMDS, /* HDMI0 */ ++ DRM_MODE_ENCODER_TVDAC, /* VEC */ ++ DRM_MODE_ENCODER_NONE, /* FORCE_LCD */ ++ DRM_MODE_ENCODER_NONE, /* FORCE_TV */ ++ DRM_MODE_ENCODER_NONE, /* FORCE_OTHER */ ++ DRM_MODE_ENCODER_TMDS, /* HDMI1 */ ++ DRM_MODE_ENCODER_NONE, /* FORCE_TV2 */ ++ }; ++ return display_number > ARRAY_SIZE(display_types) - 1 ? ++ DRM_MODE_ENCODER_NONE : display_types[display_number]; ++} ++ + /* Firmware's structure for making an FB mbox call. */ + struct fbinfo_s { + u32 xres, yres, xres_virtual, yres_virtual; +@@ -255,10 +329,15 @@ static int vc4_plane_set_blank(struct dr + .plane_id = vc4_plane->mb.plane.plane_id, + } + }; ++ static const char * const plane_types[] = { ++ "overlay", ++ "primary", ++ "cursor" ++ }; + int ret; + +- DRM_DEBUG_ATOMIC("[PLANE:%d:%s] overlay plane %s", +- plane->base.id, plane->name, ++ DRM_DEBUG_ATOMIC("[PLANE:%d:%s] %s plane %s", ++ plane->base.id, plane->name, plane_types[plane->type], + blank ? "blank" : "unblank"); + + if (blank) +@@ -593,13 +672,102 @@ fail: + + static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) + { +- /* Everyting is handled in the planes. */ ++ struct drm_device *dev = crtc->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(dev); ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ struct drm_display_mode *mode = &crtc->state->adjusted_mode; ++ struct vc4_fkms_encoder *vc4_encoder = ++ to_vc4_fkms_encoder(vc4_crtc->encoder); ++ struct mailbox_set_mode mb = { ++ .tag1 = { RPI_FIRMWARE_SET_TIMING, ++ sizeof(struct set_timings), 0}, ++ }; ++ union hdmi_infoframe frame; ++ int ret; ++ ++ ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi, mode, false); ++ if (ret < 0) { ++ DRM_ERROR("couldn't fill AVI infoframe\n"); ++ return; ++ } ++ ++ DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u\n", ++ vc4_crtc->display_number, mode->name, mode->clock, ++ mode->hdisplay, mode->hsync_start, mode->hsync_end, ++ mode->htotal, mode->hskew, mode->vdisplay, ++ mode->vsync_start, mode->vsync_end, mode->vtotal, ++ mode->vscan, mode->vrefresh, mode->picture_aspect_ratio); ++ mb.timings.display = vc4_crtc->display_number; ++ ++ mb.timings.video_id_code = frame.avi.video_code; ++ ++ mb.timings.clock = mode->clock; ++ mb.timings.hdisplay = mode->hdisplay; ++ mb.timings.hsync_start = mode->hsync_start; ++ mb.timings.hsync_end = mode->hsync_end; ++ mb.timings.htotal = mode->htotal; ++ mb.timings.hskew = mode->hskew; ++ mb.timings.vdisplay = mode->vdisplay; ++ mb.timings.vsync_start = mode->vsync_start; ++ mb.timings.vsync_end = mode->vsync_end; ++ mb.timings.vtotal = mode->vtotal; ++ mb.timings.vscan = mode->vscan; ++ mb.timings.vrefresh = 0; ++ mb.timings.flags = 0; ++ if (mode->flags & DRM_MODE_FLAG_PHSYNC) ++ mb.timings.flags |= TIMINGS_FLAGS_H_SYNC_POS; ++ if (mode->flags & DRM_MODE_FLAG_PVSYNC) ++ mb.timings.flags |= TIMINGS_FLAGS_V_SYNC_POS; ++ ++ switch (frame.avi.picture_aspect) { ++ default: ++ case HDMI_PICTURE_ASPECT_NONE: ++ mode->flags |= TIMINGS_FLAGS_ASPECT_NONE; ++ break; ++ case HDMI_PICTURE_ASPECT_4_3: ++ mode->flags |= TIMINGS_FLAGS_ASPECT_4_3; ++ break; ++ case HDMI_PICTURE_ASPECT_16_9: ++ mode->flags |= TIMINGS_FLAGS_ASPECT_16_9; ++ break; ++ case HDMI_PICTURE_ASPECT_64_27: ++ mode->flags |= TIMINGS_FLAGS_ASPECT_64_27; ++ break; ++ case HDMI_PICTURE_ASPECT_256_135: ++ mode->flags |= TIMINGS_FLAGS_ASPECT_256_135; ++ break; ++ } ++ ++ if (!vc4_encoder->hdmi_monitor) ++ mb.timings.flags |= TIMINGS_FLAGS_DVI; ++ else if (drm_default_rgb_quant_range(mode) == ++ HDMI_QUANTIZATION_RANGE_LIMITED) ++ mb.timings.flags |= TIMINGS_FLAGS_RGB_LIMITED; ++ ++ /* ++ FIXME: To implement ++ switch(mode->flag & DRM_MODE_FLAG_3D_MASK) { ++ case DRM_MODE_FLAG_3D_NONE: ++ case DRM_MODE_FLAG_3D_FRAME_PACKING: ++ case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: ++ case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: ++ case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: ++ case DRM_MODE_FLAG_3D_L_DEPTH: ++ case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: ++ case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: ++ case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: ++ } ++ */ ++ ++ ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb)); + } + + static void vc4_crtc_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state) + { + struct drm_plane *plane; + ++ DRM_DEBUG_KMS("[CRTC:%d] vblanks off.\n", ++ crtc->base.id); + drm_crtc_vblank_off(crtc); + + /* Always turn the planes off on CRTC disable. In DRM, planes +@@ -617,6 +785,8 @@ static void vc4_crtc_enable(struct drm_c + { + struct drm_plane *plane; + ++ DRM_DEBUG_KMS("[CRTC:%d] vblanks on.\n", ++ crtc->base.id); + drm_crtc_vblank_on(crtc); + + /* Unblank the planes (if they're supposed to be displayed). */ +@@ -635,12 +805,20 @@ vc4_crtc_mode_valid(struct drm_crtc *crt + return MODE_NO_DBLESCAN; + } + ++ /* Limit the pixel clock until we can get dynamic HDMI 2.0 scrambling ++ * working. ++ */ ++ if (mode->clock > 340000) ++ return MODE_CLOCK_HIGH; ++ + return MODE_OK; + } + + static int vc4_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_crtc_state *state) + { ++ DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_check.\n", ++ crtc->base.id); + return 0; + } + +@@ -650,6 +828,8 @@ static void vc4_crtc_atomic_flush(struct + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + struct drm_device *dev = crtc->dev; + ++ DRM_DEBUG_KMS("[CRTC:%d] crtc_atomic_flush.\n", ++ crtc->base.id); + if (crtc->state->event) { + unsigned long flags; + +@@ -717,6 +897,8 @@ static int vc4_fkms_enable_vblank(struct + { + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + ++ DRM_DEBUG_KMS("[CRTC:%d] enable_vblank.\n", ++ crtc->base.id); + vc4_crtc->vblank_enabled = true; + + return 0; +@@ -726,6 +908,8 @@ static void vc4_fkms_disable_vblank(stru + { + struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); + ++ DRM_DEBUG_KMS("[CRTC:%d] disable_vblank.\n", ++ crtc->base.id); + vc4_crtc->vblank_enabled = false; + } + +@@ -760,36 +944,92 @@ static const struct of_device_id vc4_fir + static enum drm_connector_status + vc4_fkms_connector_detect(struct drm_connector *connector, bool force) + { ++ DRM_DEBUG_KMS("connector detect.\n"); + return connector_status_connected; + } + +-static int vc4_fkms_connector_get_modes(struct drm_connector *connector) ++static int vc4_fkms_get_edid_block(void *data, u8 *buf, unsigned int block, ++ size_t len) + { +- struct drm_device *dev = connector->dev; + struct vc4_fkms_connector *fkms_connector = +- to_vc4_fkms_connector(connector); +- struct vc4_dev *vc4 = to_vc4_dev(dev); +- struct drm_display_mode *mode; +- struct mailbox_get_width_height wh = { +- .tag1 = {RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, 4, 0, }, +- .display = fkms_connector->display_idx, +- .tag2 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT, +- 8, 0, }, ++ (struct vc4_fkms_connector *)data; ++ struct vc4_dev *vc4 = fkms_connector->vc4_dev; ++ struct mailbox_get_edid mb = { ++ .tag1 = { RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY, ++ 128 + 8, 0 }, ++ .block = block, ++ .display_number = fkms_connector->display_number, + }; +- int ret; ++ int ret = 0; ++ ++ ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb)); ++ ++ if (!ret) ++ memcpy(buf, mb.edid, len); ++ ++ return ret; ++} ++ ++static int vc4_fkms_connector_get_modes(struct drm_connector *connector) ++{ ++ struct vc4_fkms_connector *fkms_connector = ++ to_vc4_fkms_connector(connector); ++ struct drm_encoder *encoder = fkms_connector->encoder; ++ struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder); ++ int ret = 0; ++ struct edid *edid; ++ ++ edid = drm_do_get_edid(connector, vc4_fkms_get_edid_block, ++ fkms_connector); ++ ++ /* FIXME: Can we do CEC? ++ * cec_s_phys_addr_from_edid(vc4->hdmi->cec_adap, edid); ++ * if (!edid) ++ * return -ENODEV; ++ */ ++ ++ vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid); + +- ret = rpi_firmware_property_list(vc4->firmware, &wh, sizeof(wh)); ++ if (edid && edid->input & DRM_EDID_INPUT_DIGITAL) { ++ vc4_encoder->rgb_range_selectable = ++ drm_rgb_quant_range_selectable(edid); ++ } ++ ++ drm_connector_update_edid_property(connector, edid); ++ ret = drm_add_edid_modes(connector, edid); ++ kfree(edid); ++ ++ return ret; ++} ++ ++/* FIXME: Read LCD mode from the firmware. This is the DSI panel resolution. */ ++static const struct drm_display_mode lcd_mode = { ++ DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, ++ 25979400 / 1000, ++ 800, 800 + 1, 800 + 1 + 2, 800 + 1 + 2 + 46, 0, ++ 480, 480 + 7, 480 + 7 + 2, 480 + 7 + 2 + 21, 0, ++ DRM_MODE_FLAG_INTERLACE) ++}; ++ ++static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector) ++{ ++ //struct vc4_fkms_connector *fkms_connector = ++ // to_vc4_fkms_connector(connector); ++ //struct drm_encoder *encoder = fkms_connector->encoder; ++ //struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder); ++ struct drm_display_mode *mode; ++ //int ret = 0; + +- if (ret) { +- DRM_ERROR("Failed to get screen size: %d (0x%08x 0x%08x)\n", +- ret, wh.wh[0], wh.wh[1]); +- return 0; ++ mode = drm_mode_duplicate(connector->dev, ++ &lcd_mode); ++ if (!mode) { ++ DRM_ERROR("Failed to create a new display mode\n"); ++ return -ENOMEM; + } + +- mode = drm_cvt_mode(dev, wh.wh[0], wh.wh[1], 60 /* vrefresh */, +- 0, 0, false); + drm_mode_probed_add(connector, mode); + ++ /* We have one mode */ + return 1; + } + +@@ -798,11 +1038,14 @@ vc4_fkms_connector_best_encoder(struct d + { + struct vc4_fkms_connector *fkms_connector = + to_vc4_fkms_connector(connector); ++ DRM_DEBUG_KMS("best_connector.\n"); + return fkms_connector->encoder; + } + + static void vc4_fkms_connector_destroy(struct drm_connector *connector) + { ++ DRM_DEBUG_KMS("[CONNECTOR:%d] destroy.\n", ++ connector->base.id); + drm_connector_unregister(connector); + drm_connector_cleanup(connector); + } +@@ -821,14 +1064,22 @@ static const struct drm_connector_helper + .best_encoder = vc4_fkms_connector_best_encoder, + }; + ++static const struct drm_connector_helper_funcs vc4_fkms_lcd_conn_helper_funcs = { ++ .get_modes = vc4_fkms_lcd_connector_get_modes, ++ .best_encoder = vc4_fkms_connector_best_encoder, ++}; ++ + static struct drm_connector * + vc4_fkms_connector_init(struct drm_device *dev, struct drm_encoder *encoder, +- u32 display_idx) ++ u32 display_num) + { + struct drm_connector *connector = NULL; + struct vc4_fkms_connector *fkms_connector; ++ struct vc4_dev *vc4_dev = to_vc4_dev(dev); + int ret = 0; + ++ DRM_DEBUG_KMS("connector_init, display_num %u\n", display_num); ++ + fkms_connector = devm_kzalloc(dev->dev, sizeof(*fkms_connector), + GFP_KERNEL); + if (!fkms_connector) { +@@ -838,11 +1089,21 @@ vc4_fkms_connector_init(struct drm_devic + connector = &fkms_connector->base; + + fkms_connector->encoder = encoder; +- fkms_connector->display_idx = display_idx; +- +- drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, +- DRM_MODE_CONNECTOR_HDMIA); +- drm_connector_helper_add(connector, &vc4_fkms_connector_helper_funcs); ++ fkms_connector->display_number = display_num; ++ fkms_connector->display_type = vc4_get_display_type(display_num); ++ fkms_connector->vc4_dev = vc4_dev; ++ ++ if (fkms_connector->display_type == DRM_MODE_ENCODER_DSI) { ++ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, ++ DRM_MODE_CONNECTOR_DSI); ++ drm_connector_helper_add(connector, ++ &vc4_fkms_lcd_conn_helper_funcs); ++ } else { ++ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, ++ DRM_MODE_CONNECTOR_HDMIA); ++ drm_connector_helper_add(connector, ++ &vc4_fkms_connector_helper_funcs); ++ } + + connector->polled = (DRM_CONNECTOR_POLL_CONNECT | + DRM_CONNECTOR_POLL_DISCONNECT); +@@ -863,6 +1124,7 @@ vc4_fkms_connector_init(struct drm_devic + + static void vc4_fkms_encoder_destroy(struct drm_encoder *encoder) + { ++ DRM_DEBUG_KMS("Encoder_destroy\n"); + drm_encoder_cleanup(encoder); + } + +@@ -872,10 +1134,12 @@ static const struct drm_encoder_funcs vc + + static void vc4_fkms_encoder_enable(struct drm_encoder *encoder) + { ++ DRM_DEBUG_KMS("Encoder_enable\n"); + } + + static void vc4_fkms_encoder_disable(struct drm_encoder *encoder) + { ++ DRM_DEBUG_KMS("Encoder_disable\n"); + } + + static const struct drm_encoder_helper_funcs vc4_fkms_encoder_helper_funcs = { +@@ -907,6 +1171,7 @@ static int vc4_fkms_create_screen(struct + crtc = &vc4_crtc->base; + + vc4_crtc->display_number = display_ref; ++ vc4_crtc->display_type = vc4_get_display_type(display_ref); + + /* Blank the firmware provided framebuffer */ + rpi_firmware_property_list(vc4->firmware, &blank, sizeof(blank)); +@@ -950,13 +1215,14 @@ static int vc4_fkms_create_screen(struct + return -ENOMEM; + vc4_crtc->encoder = &vc4_encoder->base; + vc4_encoder->base.possible_crtcs |= drm_crtc_mask(crtc) ; ++ + drm_encoder_init(drm, &vc4_encoder->base, &vc4_fkms_encoder_funcs, +- DRM_MODE_ENCODER_TMDS, NULL); ++ vc4_crtc->display_type, NULL); + drm_encoder_helper_add(&vc4_encoder->base, + &vc4_fkms_encoder_helper_funcs); + + vc4_crtc->connector = vc4_fkms_connector_init(drm, &vc4_encoder->base, +- display_idx); ++ display_ref); + if (IS_ERR(vc4_crtc->connector)) { + ret = PTR_ERR(vc4_crtc->connector); + goto err_destroy_encoder; +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -78,6 +78,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, + RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020, + RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021, ++ RPI_FIRMWARE_GET_EDID_BLOCK_DISPLAY = 0x00030023, + RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030, + RPI_FIRMWARE_GET_THROTTLED = 0x00030046, + RPI_FIRMWARE_GET_CLOCK_MEASURED = 0x00030047, +@@ -150,6 +151,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, + + RPI_FIRMWARE_SET_PLANE = 0x00048015, ++ RPI_FIRMWARE_SET_TIMING = 0x00048017, + + RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, + RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, diff --git a/target/linux/brcm2708/patches-4.19/950-0614-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch b/target/linux/brcm2708/patches-4.19/950-0614-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch new file mode 100644 index 000000000..f4780aecf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0614-clk-bcm2835-Add-support-for-setting-leaf-clock-rates.patch @@ -0,0 +1,53 @@ +From ace78bef08082eb8971b87b28525926cd86b68c1 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 2 May 2019 15:11:05 -0700 +Subject: [PATCH 614/703] clk: bcm2835: Add support for setting leaf clock + rates while running. + +As long as you wait for !BUSY, you can do glitch-free updates of clock +rate while the clock is running. + +Signed-off-by: Eric Anholt +--- + drivers/clk/bcm/clk-bcm2835.c | 22 +++++++++++++--------- + 1 file changed, 13 insertions(+), 9 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1097,15 +1097,19 @@ static int bcm2835_clock_set_rate(struct + + spin_lock(&cprman->regs_lock); + +- /* +- * Setting up frac support +- * +- * In principle it is recommended to stop/start the clock first, +- * but as we set CLK_SET_RATE_GATE during registration of the +- * clock this requirement should be take care of by the +- * clk-framework. ++ ctl = cprman_read(cprman, data->ctl_reg); ++ ++ /* If the clock is running, we have to pause clock generation while ++ * updating the control and div regs. This is glitchless (no clock ++ * signals generated faster than the rate) but each reg access is two ++ * OSC cycles so the clock will slow down for a moment. + */ +- ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC; ++ if (ctl & CM_ENABLE) { ++ cprman_write(cprman, data->ctl_reg, ctl & ~CM_ENABLE); ++ bcm2835_clock_wait_busy(clock); ++ } ++ ++ ctl &= ~CM_FRAC; + ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0; + cprman_write(cprman, data->ctl_reg, ctl); + +@@ -1475,7 +1479,7 @@ static struct clk_hw *bcm2835_register_c + init.ops = &bcm2835_vpu_clock_clk_ops; + } else { + init.ops = &bcm2835_clock_clk_ops; +- init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; ++ init.flags |= CLK_SET_PARENT_GATE; + + /* If the clock wasn't actually enabled at boot, it's not + * critical. diff --git a/target/linux/brcm2708/patches-4.19/950-0615-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch b/target/linux/brcm2708/patches-4.19/950-0615-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch new file mode 100644 index 000000000..a8e32fd73 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0615-clk-bcm2835-Allow-reparenting-leaf-clocks-while-they.patch @@ -0,0 +1,71 @@ +From bfdd7752d7503203300ce8359103b11b961611cf Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 2 May 2019 15:24:04 -0700 +Subject: [PATCH 615/703] clk: bcm2835: Allow reparenting leaf clocks while + they're running. + +This falls under the same "we can reprogram glitch-free as long as we +pause generation" rule as updating the div/frac fields. This can be +used for runtime reclocking of V3D to manage power leakage. + +Signed-off-by: Eric Anholt +--- + drivers/clk/bcm/clk-bcm2835.c | 19 ++++++++++++++++--- + 1 file changed, 16 insertions(+), 3 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1086,8 +1086,10 @@ static int bcm2835_clock_on(struct clk_h + return 0; + } + +-static int bcm2835_clock_set_rate(struct clk_hw *hw, +- unsigned long rate, unsigned long parent_rate) ++static int bcm2835_clock_set_rate_and_parent(struct clk_hw *hw, ++ unsigned long rate, ++ unsigned long parent_rate, ++ u8 parent) + { + struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); + struct bcm2835_cprman *cprman = clock->cprman; +@@ -1109,6 +1111,11 @@ static int bcm2835_clock_set_rate(struct + bcm2835_clock_wait_busy(clock); + } + ++ if (parent != 0xff) { ++ ctl &= ~(CM_SRC_MASK << CM_SRC_SHIFT); ++ ctl |= parent << CM_SRC_SHIFT; ++ } ++ + ctl &= ~CM_FRAC; + ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0; + cprman_write(cprman, data->ctl_reg, ctl); +@@ -1120,6 +1127,12 @@ static int bcm2835_clock_set_rate(struct + return 0; + } + ++static int bcm2835_clock_set_rate(struct clk_hw *hw, ++ unsigned long rate, unsigned long parent_rate) ++{ ++ return bcm2835_clock_set_rate_and_parent(hw, rate, parent_rate, 0xff); ++} ++ + static bool + bcm2835_clk_is_pllc(struct clk_hw *hw) + { +@@ -1303,6 +1316,7 @@ static const struct clk_ops bcm2835_cloc + .unprepare = bcm2835_clock_off, + .recalc_rate = bcm2835_clock_get_rate, + .set_rate = bcm2835_clock_set_rate, ++ .set_rate_and_parent = bcm2835_clock_set_rate_and_parent, + .determine_rate = bcm2835_clock_determine_rate, + .set_parent = bcm2835_clock_set_parent, + .get_parent = bcm2835_clock_get_parent, +@@ -1479,7 +1493,6 @@ static struct clk_hw *bcm2835_register_c + init.ops = &bcm2835_vpu_clock_clk_ops; + } else { + init.ops = &bcm2835_clock_clk_ops; +- init.flags |= CLK_SET_PARENT_GATE; + + /* If the clock wasn't actually enabled at boot, it's not + * critical. diff --git a/target/linux/brcm2708/patches-4.19/950-0616-drm-v3d-Add-support-for-compute-shader-dispatch.patch b/target/linux/brcm2708/patches-4.19/950-0616-drm-v3d-Add-support-for-compute-shader-dispatch.patch new file mode 100644 index 000000000..48bbddb42 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0616-drm-v3d-Add-support-for-compute-shader-dispatch.patch @@ -0,0 +1,897 @@ +From d607c1cfefb38ae7a75ac057afff275e89cff691 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Tue, 16 Apr 2019 15:58:54 -0700 +Subject: [PATCH 616/703] drm/v3d: Add support for compute shader dispatch. + +The compute shader dispatch interface is pretty simple -- just pass in +the regs that userspace has passed us, with no CLs to run. However, +with no CL to run it means that we need to do manual cache flushing of +the L2 after the HW execution completes (for SSBO, atomic, and +image_load_store writes that are the output of compute shaders). + +This doesn't yet expose the L2 cache's ability to have a region of the +address space not write back to memory (which could be used for +shared_var storage). + +So far, the Mesa side has been tested on V3D v4.2 simpenrose (passing +the ES31 tests), and on the kernel side on 7278 (failing atomic +compswap tests in a way that doesn't reproduce on simpenrose). + +v2: Fix excessive allocation for the clean_job (reported by Dan + Carpenter). Keep refs on jobs until clean_job is finished, to + avoid spurious MMU errors if the output BOs are freed by userspace + before L2 cleaning is finished. + +Signed-off-by: Eric Anholt +Link: https://patchwork.freedesktop.org/patch/msgid/20190416225856.20264-4-eric@anholt.net +Acked-by: Rob Clark +--- + drivers/gpu/drm/v3d/v3d_debugfs.c | 22 +++++ + drivers/gpu/drm/v3d/v3d_drv.c | 10 +- + drivers/gpu/drm/v3d/v3d_drv.h | 28 +++++- + drivers/gpu/drm/v3d/v3d_fence.c | 2 + + drivers/gpu/drm/v3d/v3d_gem.c | 156 +++++++++++++++++++++++++++++- + drivers/gpu/drm/v3d/v3d_irq.c | 16 ++- + drivers/gpu/drm/v3d/v3d_regs.h | 73 ++++++++++++++ + drivers/gpu/drm/v3d/v3d_sched.c | 121 +++++++++++++++++++++-- + drivers/gpu/drm/v3d/v3d_trace.h | 94 ++++++++++++++++++ + include/uapi/drm/v3d_drm.h | 28 ++++++ + 10 files changed, 531 insertions(+), 19 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_debugfs.c ++++ b/drivers/gpu/drm/v3d/v3d_debugfs.c +@@ -57,6 +57,17 @@ static const struct v3d_reg_def v3d_core + REGDEF(V3D_GMP_VIO_ADDR), + }; + ++static const struct v3d_reg_def v3d_csd_reg_defs[] = { ++ REGDEF(V3D_CSD_STATUS), ++ REGDEF(V3D_CSD_CURRENT_CFG0), ++ REGDEF(V3D_CSD_CURRENT_CFG1), ++ REGDEF(V3D_CSD_CURRENT_CFG2), ++ REGDEF(V3D_CSD_CURRENT_CFG3), ++ REGDEF(V3D_CSD_CURRENT_CFG4), ++ REGDEF(V3D_CSD_CURRENT_CFG5), ++ REGDEF(V3D_CSD_CURRENT_CFG6), ++}; ++ + static int v3d_v3d_debugfs_regs(struct seq_file *m, void *unused) + { + struct drm_info_node *node = (struct drm_info_node *)m->private; +@@ -88,6 +99,17 @@ static int v3d_v3d_debugfs_regs(struct s + V3D_CORE_READ(core, + v3d_core_reg_defs[i].reg)); + } ++ ++ if (v3d_has_csd(v3d)) { ++ for (i = 0; i < ARRAY_SIZE(v3d_csd_reg_defs); i++) { ++ seq_printf(m, "core %d %s (0x%04x): 0x%08x\n", ++ core, ++ v3d_csd_reg_defs[i].name, ++ v3d_csd_reg_defs[i].reg, ++ V3D_CORE_READ(core, ++ v3d_csd_reg_defs[i].reg)); ++ } ++ } + } + + return 0; +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -7,9 +7,9 @@ + * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs. + * For V3D 2.x support, see the VC4 driver. + * +- * Currently only single-core rendering using the binner and renderer, +- * along with TFU (texture formatting unit) rendering is supported. +- * V3D 4.x's CSD (compute shader dispatch) is not yet supported. ++ * The V3D GPU includes a tiled render (composed of a bin and render ++ * pipelines), the TFU (texture formatting unit), and the CSD (compute ++ * shader dispatch). + */ + + #include +@@ -114,6 +114,9 @@ static int v3d_get_param_ioctl(struct dr + case DRM_V3D_PARAM_SUPPORTS_TFU: + args->value = 1; + return 0; ++ case DRM_V3D_PARAM_SUPPORTS_CSD: ++ args->value = v3d_has_csd(v3d); ++ return 0; + default: + DRM_DEBUG("Unknown parameter %d\n", args->param); + return -EINVAL; +@@ -183,6 +186,7 @@ static const struct drm_ioctl_desc v3d_d + DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH), ++ DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH), + }; + + static const struct vm_operations_struct v3d_vm_ops = { +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -16,9 +16,11 @@ enum v3d_queue { + V3D_BIN, + V3D_RENDER, + V3D_TFU, ++ V3D_CSD, ++ V3D_CACHE_CLEAN, + }; + +-#define V3D_MAX_QUEUES (V3D_TFU + 1) ++#define V3D_MAX_QUEUES (V3D_CACHE_CLEAN + 1) + + struct v3d_queue_state { + struct drm_gpu_scheduler sched; +@@ -70,6 +72,7 @@ struct v3d_dev { + struct v3d_bin_job *bin_job; + struct v3d_render_job *render_job; + struct v3d_tfu_job *tfu_job; ++ struct v3d_csd_job *csd_job; + + struct v3d_queue_state queue[V3D_MAX_QUEUES]; + +@@ -92,6 +95,12 @@ struct v3d_dev { + */ + struct mutex sched_lock; + ++ /* Lock taken during a cache clean and when initiating an L2 ++ * flush, to keep L2 flushes from interfering with the ++ * synchronous L2 cleans. ++ */ ++ struct mutex cache_clean_lock; ++ + struct { + u32 num_allocated; + u32 pages_allocated; +@@ -104,6 +113,12 @@ to_v3d_dev(struct drm_device *dev) + return (struct v3d_dev *)dev->dev_private; + } + ++static inline bool ++v3d_has_csd(struct v3d_dev *v3d) ++{ ++ return v3d->ver >= 41; ++} ++ + /* The per-fd struct, which tracks the MMU mappings. */ + struct v3d_file_priv { + struct v3d_dev *v3d; +@@ -237,6 +252,14 @@ struct v3d_tfu_job { + struct drm_v3d_submit_tfu args; + }; + ++struct v3d_csd_job { ++ struct v3d_job base; ++ ++ u32 timedout_batches; ++ ++ struct drm_v3d_submit_csd args; ++}; ++ + /** + * _wait_for - magic (register) wait macro + * +@@ -302,11 +325,14 @@ int v3d_submit_cl_ioctl(struct drm_devic + struct drm_file *file_priv); + int v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); ++int v3d_submit_csd_ioctl(struct drm_device *dev, void *data, ++ struct drm_file *file_priv); + int v3d_wait_bo_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + void v3d_job_put(struct v3d_job *job); + void v3d_reset(struct v3d_dev *v3d); + void v3d_invalidate_caches(struct v3d_dev *v3d); ++void v3d_clean_caches(struct v3d_dev *v3d); + + /* v3d_irq.c */ + int v3d_irq_init(struct v3d_dev *v3d); +--- a/drivers/gpu/drm/v3d/v3d_fence.c ++++ b/drivers/gpu/drm/v3d/v3d_fence.c +@@ -36,6 +36,8 @@ static const char *v3d_fence_get_timelin + return "v3d-render"; + case V3D_TFU: + return "v3d-tfu"; ++ case V3D_CSD: ++ return "v3d-csd"; + default: + return NULL; + } +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -162,10 +162,52 @@ v3d_flush_l2t(struct v3d_dev *v3d, int c + /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't + * need to wait for completion before dispatching the job -- + * L2T accesses will be stalled until the flush has completed. ++ * However, we do need to make sure we don't try to trigger a ++ * new flush while the L2_CLEAN queue is trying to ++ * synchronously clean after a job. + */ ++ mutex_lock(&v3d->cache_clean_lock); + V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, + V3D_L2TCACTL_L2TFLS | + V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM)); ++ mutex_unlock(&v3d->cache_clean_lock); ++} ++ ++/* Cleans texture L1 and L2 cachelines (writing back dirty data). ++ * ++ * For cleaning, which happens from the CACHE_CLEAN queue after CSD has ++ * executed, we need to make sure that the clean is done before ++ * signaling job completion. So, we synchronously wait before ++ * returning, and we make sure that L2 invalidates don't happen in the ++ * meantime to confuse our are-we-done checks. ++ */ ++void ++v3d_clean_caches(struct v3d_dev *v3d) ++{ ++ struct drm_device *dev = &v3d->drm; ++ int core = 0; ++ ++ trace_v3d_cache_clean_begin(dev); ++ ++ V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF); ++ if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & ++ V3D_L2TCACTL_L2TFLS), 100)) { ++ DRM_ERROR("Timeout waiting for L1T write combiner flush\n"); ++ } ++ ++ mutex_lock(&v3d->cache_clean_lock); ++ V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, ++ V3D_L2TCACTL_L2TFLS | ++ V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM)); ++ ++ if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) & ++ V3D_L2TCACTL_L2TFLS), 100)) { ++ DRM_ERROR("Timeout waiting for L2T clean\n"); ++ } ++ ++ mutex_unlock(&v3d->cache_clean_lock); ++ ++ trace_v3d_cache_clean_end(dev); + } + + /* Invalidates the slice caches. These are read-only caches. */ +@@ -584,7 +626,8 @@ static void + v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv, + struct v3d_job *job, + struct ww_acquire_ctx *acquire_ctx, +- u32 out_sync) ++ u32 out_sync, ++ struct dma_fence *done_fence) + { + struct drm_syncobj *sync_out; + +@@ -594,7 +637,7 @@ v3d_attach_fences_and_unlock_reservation + /* Update the return sync object for the job */ + sync_out = drm_syncobj_find(file_priv, out_sync); + if (sync_out) { +- drm_syncobj_replace_fence(sync_out, job->done_fence); ++ drm_syncobj_replace_fence(sync_out, done_fence); + drm_syncobj_put(sync_out); + } + } +@@ -691,8 +734,10 @@ v3d_submit_cl_ioctl(struct drm_device *d + mutex_unlock(&v3d->sched_lock); + + v3d_attach_fences_and_unlock_reservation(file_priv, +- &render->base, &acquire_ctx, +- args->out_sync); ++ &render->base, ++ &acquire_ctx, ++ args->out_sync, ++ render->base.done_fence); + + if (bin) + v3d_job_put(&bin->base); +@@ -785,7 +830,8 @@ v3d_submit_tfu_ioctl(struct drm_device * + + v3d_attach_fences_and_unlock_reservation(file_priv, + &job->base, &acquire_ctx, +- args->out_sync); ++ args->out_sync, ++ job->base.done_fence); + + v3d_job_put(&job->base); + +@@ -801,6 +847,105 @@ fail: + return ret; + } + ++/** ++ * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D. ++ * @dev: DRM device ++ * @data: ioctl argument ++ * @file_priv: DRM file for this fd ++ * ++ * Userspace provides the register setup for the CSD, which we don't ++ * need to validate since the CSD is behind the MMU. ++ */ ++int ++v3d_submit_csd_ioctl(struct drm_device *dev, void *data, ++ struct drm_file *file_priv) ++{ ++ struct v3d_dev *v3d = to_v3d_dev(dev); ++ struct v3d_file_priv *v3d_priv = file_priv->driver_priv; ++ struct drm_v3d_submit_csd *args = data; ++ struct v3d_csd_job *job; ++ struct v3d_job *clean_job; ++ struct ww_acquire_ctx acquire_ctx; ++ int ret; ++ ++ trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]); ++ ++ if (!v3d_has_csd(v3d)) { ++ DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n"); ++ return -EINVAL; ++ } ++ ++ job = kcalloc(1, sizeof(*job), GFP_KERNEL); ++ if (!job) ++ return -ENOMEM; ++ ++ ret = v3d_job_init(v3d, file_priv, &job->base, ++ v3d_job_free, args->in_sync); ++ if (ret) { ++ kfree(job); ++ return ret; ++ } ++ ++ clean_job = kcalloc(1, sizeof(*clean_job), GFP_KERNEL); ++ if (!clean_job) { ++ v3d_job_put(&job->base); ++ kfree(job); ++ return -ENOMEM; ++ } ++ ++ ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0); ++ if (ret) { ++ v3d_job_put(&job->base); ++ kfree(clean_job); ++ return ret; ++ } ++ ++ job->args = *args; ++ ++ ret = v3d_lookup_bos(dev, file_priv, clean_job, ++ args->bo_handles, args->bo_handle_count); ++ if (ret) ++ goto fail; ++ ++ ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx); ++ if (ret) ++ goto fail; ++ ++ mutex_lock(&v3d->sched_lock); ++ ret = v3d_push_job(v3d_priv, &job->base, V3D_CSD); ++ if (ret) ++ goto fail_unreserve; ++ ++ ret = v3d_add_dep(clean_job, dma_fence_get(job->base.done_fence)); ++ if (ret) ++ goto fail_unreserve; ++ ret = v3d_push_job(v3d_priv, clean_job, V3D_CACHE_CLEAN); ++ if (ret) ++ goto fail_unreserve; ++ mutex_unlock(&v3d->sched_lock); ++ ++ v3d_attach_fences_and_unlock_reservation(file_priv, ++ clean_job, ++ &acquire_ctx, ++ args->out_sync, ++ clean_job->done_fence); ++ ++ v3d_job_put(&job->base); ++ v3d_job_put(clean_job); ++ ++ return 0; ++ ++fail_unreserve: ++ mutex_unlock(&v3d->sched_lock); ++ v3d_unlock_bo_reservations(clean_job->bo, clean_job->bo_count, ++ &acquire_ctx); ++fail: ++ v3d_job_put(&job->base); ++ v3d_job_put(clean_job); ++ ++ return ret; ++} ++ + int + v3d_gem_init(struct drm_device *dev) + { +@@ -816,6 +961,7 @@ v3d_gem_init(struct drm_device *dev) + mutex_init(&v3d->bo_lock); + mutex_init(&v3d->reset_lock); + mutex_init(&v3d->sched_lock); ++ mutex_init(&v3d->cache_clean_lock); + + /* Note: We don't allocate address 0. Various bits of HW + * treat 0 as special, such as the occlusion query counters +--- a/drivers/gpu/drm/v3d/v3d_irq.c ++++ b/drivers/gpu/drm/v3d/v3d_irq.c +@@ -4,9 +4,9 @@ + /** + * DOC: Interrupt management for the V3D engine + * +- * When we take a bin, render, or TFU done interrupt, we need to +- * signal the fence for that job so that the scheduler can queue up +- * the next one and unblock any waiters. ++ * When we take a bin, render, TFU done, or CSD done interrupt, we ++ * need to signal the fence for that job so that the scheduler can ++ * queue up the next one and unblock any waiters. + * + * When we take the binner out of memory interrupt, we need to + * allocate some new memory and pass it to the binner so that the +@@ -20,6 +20,7 @@ + #define V3D_CORE_IRQS ((u32)(V3D_INT_OUTOMEM | \ + V3D_INT_FLDONE | \ + V3D_INT_FRDONE | \ ++ V3D_INT_CSDDONE | \ + V3D_INT_GMPV)) + + #define V3D_HUB_IRQS ((u32)(V3D_HUB_INT_MMU_WRV | \ +@@ -108,6 +109,15 @@ v3d_irq(int irq, void *arg) + dma_fence_signal(&fence->base); + status = IRQ_HANDLED; + } ++ ++ if (intsts & V3D_INT_CSDDONE) { ++ struct v3d_fence *fence = ++ to_v3d_fence(v3d->csd_job->base.irq_fence); ++ ++ trace_v3d_csd_irq(&v3d->drm, fence->seqno); ++ dma_fence_signal(&fence->base); ++ status = IRQ_HANDLED; ++ } + + /* We shouldn't be triggering these if we have GMP in + * always-allowed mode. +--- a/drivers/gpu/drm/v3d/v3d_regs.h ++++ b/drivers/gpu/drm/v3d/v3d_regs.h +@@ -238,8 +238,11 @@ + #define V3D_CTL_L2TCACTL 0x00030 + # define V3D_L2TCACTL_TMUWCF BIT(8) + # define V3D_L2TCACTL_L2T_NO_WM BIT(4) ++/* Invalidates cache lines. */ + # define V3D_L2TCACTL_FLM_FLUSH 0 ++/* Removes cachelines without writing dirty lines back. */ + # define V3D_L2TCACTL_FLM_CLEAR 1 ++/* Writes out dirty cachelines and marks them clean, but doesn't invalidate. */ + # define V3D_L2TCACTL_FLM_CLEAN 2 + # define V3D_L2TCACTL_FLM_MASK V3D_MASK(2, 1) + # define V3D_L2TCACTL_FLM_SHIFT 1 +@@ -255,6 +258,8 @@ + #define V3D_CTL_INT_MSK_CLR 0x00064 + # define V3D_INT_QPU_MASK V3D_MASK(27, 16) + # define V3D_INT_QPU_SHIFT 16 ++# define V3D_INT_CSDDONE BIT(7) ++# define V3D_INT_PCTR BIT(6) + # define V3D_INT_GMPV BIT(5) + # define V3D_INT_TRFB BIT(4) + # define V3D_INT_SPILLUSE BIT(3) +@@ -374,4 +379,72 @@ + #define V3D_GMP_PRESERVE_LOAD 0x00818 + #define V3D_GMP_VALID_LINES 0x00820 + ++#define V3D_CSD_STATUS 0x00900 ++# define V3D_CSD_STATUS_NUM_COMPLETED_MASK V3D_MASK(11, 4) ++# define V3D_CSD_STATUS_NUM_COMPLETED_SHIFT 4 ++# define V3D_CSD_STATUS_NUM_ACTIVE_MASK V3D_MASK(3, 2) ++# define V3D_CSD_STATUS_NUM_ACTIVE_SHIFT 2 ++# define V3D_CSD_STATUS_HAVE_CURRENT_DISPATCH BIT(1) ++# define V3D_CSD_STATUS_HAVE_QUEUED_DISPATCH BIT(0) ++ ++#define V3D_CSD_QUEUED_CFG0 0x00904 ++# define V3D_CSD_QUEUED_CFG0_NUM_WGS_X_MASK V3D_MASK(31, 16) ++# define V3D_CSD_QUEUED_CFG0_NUM_WGS_X_SHIFT 16 ++# define V3D_CSD_QUEUED_CFG0_WG_X_OFFSET_MASK V3D_MASK(15, 0) ++# define V3D_CSD_QUEUED_CFG0_WG_X_OFFSET_SHIFT 0 ++ ++#define V3D_CSD_QUEUED_CFG1 0x00908 ++# define V3D_CSD_QUEUED_CFG1_NUM_WGS_Y_MASK V3D_MASK(31, 16) ++# define V3D_CSD_QUEUED_CFG1_NUM_WGS_Y_SHIFT 16 ++# define V3D_CSD_QUEUED_CFG1_WG_Y_OFFSET_MASK V3D_MASK(15, 0) ++# define V3D_CSD_QUEUED_CFG1_WG_Y_OFFSET_SHIFT 0 ++ ++#define V3D_CSD_QUEUED_CFG2 0x0090c ++# define V3D_CSD_QUEUED_CFG2_NUM_WGS_Z_MASK V3D_MASK(31, 16) ++# define V3D_CSD_QUEUED_CFG2_NUM_WGS_Z_SHIFT 16 ++# define V3D_CSD_QUEUED_CFG2_WG_Z_OFFSET_MASK V3D_MASK(15, 0) ++# define V3D_CSD_QUEUED_CFG2_WG_Z_OFFSET_SHIFT 0 ++ ++#define V3D_CSD_QUEUED_CFG3 0x00910 ++# define V3D_CSD_QUEUED_CFG3_OVERLAP_WITH_PREV BIT(26) ++# define V3D_CSD_QUEUED_CFG3_MAX_SG_ID_MASK V3D_MASK(25, 20) ++# define V3D_CSD_QUEUED_CFG3_MAX_SG_ID_SHIFT 20 ++# define V3D_CSD_QUEUED_CFG3_BATCHES_PER_SG_M1_MASK V3D_MASK(19, 12) ++# define V3D_CSD_QUEUED_CFG3_BATCHES_PER_SG_M1_SHIFT 12 ++# define V3D_CSD_QUEUED_CFG3_WGS_PER_SG_MASK V3D_MASK(11, 8) ++# define V3D_CSD_QUEUED_CFG3_WGS_PER_SG_SHIFT 8 ++# define V3D_CSD_QUEUED_CFG3_WG_SIZE_MASK V3D_MASK(7, 0) ++# define V3D_CSD_QUEUED_CFG3_WG_SIZE_SHIFT 0 ++ ++/* Number of batches, minus 1 */ ++#define V3D_CSD_QUEUED_CFG4 0x00914 ++ ++/* Shader address, pnan, singleseg, threading, like a shader record. */ ++#define V3D_CSD_QUEUED_CFG5 0x00918 ++ ++/* Uniforms address (4 byte aligned) */ ++#define V3D_CSD_QUEUED_CFG6 0x0091c ++ ++#define V3D_CSD_CURRENT_CFG0 0x00920 ++#define V3D_CSD_CURRENT_CFG1 0x00924 ++#define V3D_CSD_CURRENT_CFG2 0x00928 ++#define V3D_CSD_CURRENT_CFG3 0x0092c ++#define V3D_CSD_CURRENT_CFG4 0x00930 ++#define V3D_CSD_CURRENT_CFG5 0x00934 ++#define V3D_CSD_CURRENT_CFG6 0x00938 ++ ++#define V3D_CSD_CURRENT_ID0 0x0093c ++# define V3D_CSD_CURRENT_ID0_WG_X_MASK V3D_MASK(31, 16) ++# define V3D_CSD_CURRENT_ID0_WG_X_SHIFT 16 ++# define V3D_CSD_CURRENT_ID0_WG_IN_SG_MASK V3D_MASK(11, 8) ++# define V3D_CSD_CURRENT_ID0_WG_IN_SG_SHIFT 8 ++# define V3D_CSD_CURRENT_ID0_L_IDX_MASK V3D_MASK(7, 0) ++# define V3D_CSD_CURRENT_ID0_L_IDX_SHIFT 0 ++ ++#define V3D_CSD_CURRENT_ID1 0x00940 ++# define V3D_CSD_CURRENT_ID0_WG_Z_MASK V3D_MASK(31, 16) ++# define V3D_CSD_CURRENT_ID0_WG_Z_SHIFT 16 ++# define V3D_CSD_CURRENT_ID0_WG_Y_MASK V3D_MASK(15, 0) ++# define V3D_CSD_CURRENT_ID0_WG_Y_SHIFT 0 ++ + #endif /* V3D_REGS_H */ +--- a/drivers/gpu/drm/v3d/v3d_sched.c ++++ b/drivers/gpu/drm/v3d/v3d_sched.c +@@ -48,6 +48,12 @@ to_tfu_job(struct drm_sched_job *sched_j + return container_of(sched_job, struct v3d_tfu_job, base.base); + } + ++static struct v3d_csd_job * ++to_csd_job(struct drm_sched_job *sched_job) ++{ ++ return container_of(sched_job, struct v3d_csd_job, base.base); ++} ++ + static void + v3d_job_free(struct drm_sched_job *sched_job) + { +@@ -205,6 +211,48 @@ v3d_tfu_job_run(struct drm_sched_job *sc + return fence; + } + ++static struct dma_fence * ++v3d_csd_job_run(struct drm_sched_job *sched_job) ++{ ++ struct v3d_csd_job *job = to_csd_job(sched_job); ++ struct v3d_dev *v3d = job->base.v3d; ++ struct drm_device *dev = &v3d->drm; ++ struct dma_fence *fence; ++ int i; ++ ++ v3d->csd_job = job; ++ ++ v3d_invalidate_caches(v3d); ++ ++ fence = v3d_fence_create(v3d, V3D_CSD); ++ if (IS_ERR(fence)) ++ return NULL; ++ ++ if (job->base.irq_fence) ++ dma_fence_put(job->base.irq_fence); ++ job->base.irq_fence = dma_fence_get(fence); ++ ++ trace_v3d_submit_csd(dev, to_v3d_fence(fence)->seqno); ++ ++ for (i = 1; i <= 6; i++) ++ V3D_CORE_WRITE(0, V3D_CSD_QUEUED_CFG0 + 4 * i, job->args.cfg[i]); ++ /* CFG0 write kicks off the job. */ ++ V3D_CORE_WRITE(0, V3D_CSD_QUEUED_CFG0, job->args.cfg[0]); ++ ++ return fence; ++} ++ ++static struct dma_fence * ++v3d_cache_clean_job_run(struct drm_sched_job *sched_job) ++{ ++ struct v3d_job *job = to_v3d_job(sched_job); ++ struct v3d_dev *v3d = job->v3d; ++ ++ v3d_clean_caches(v3d); ++ ++ return NULL; ++} ++ + static void + v3d_gpu_reset_for_timeout(struct v3d_dev *v3d, struct drm_sched_job *sched_job) + { +@@ -277,13 +325,31 @@ v3d_render_job_timedout(struct drm_sched + } + + static void +-v3d_tfu_job_timedout(struct drm_sched_job *sched_job) ++v3d_generic_job_timedout(struct drm_sched_job *sched_job) + { + struct v3d_job *job = to_v3d_job(sched_job); + + v3d_gpu_reset_for_timeout(job->v3d, sched_job); + } + ++static void ++v3d_csd_job_timedout(struct drm_sched_job *sched_job) ++{ ++ struct v3d_csd_job *job = to_csd_job(sched_job); ++ struct v3d_dev *v3d = job->base.v3d; ++ u32 batches = V3D_CORE_READ(0, V3D_CSD_CURRENT_CFG4); ++ ++ /* If we've made progress, skip reset and let the timer get ++ * rearmed. ++ */ ++ if (job->timedout_batches != batches) { ++ job->timedout_batches = batches; ++ return; ++ } ++ ++ v3d_gpu_reset_for_timeout(v3d, sched_job); ++} ++ + static const struct drm_sched_backend_ops v3d_bin_sched_ops = { + .dependency = v3d_job_dependency, + .run_job = v3d_bin_job_run, +@@ -301,10 +367,24 @@ static const struct drm_sched_backend_op + static const struct drm_sched_backend_ops v3d_tfu_sched_ops = { + .dependency = v3d_job_dependency, + .run_job = v3d_tfu_job_run, +- .timedout_job = v3d_tfu_job_timedout, ++ .timedout_job = v3d_generic_job_timedout, + .free_job = v3d_job_free, + }; + ++static const struct drm_sched_backend_ops v3d_csd_sched_ops = { ++ .dependency = v3d_job_dependency, ++ .run_job = v3d_csd_job_run, ++ .timedout_job = v3d_csd_job_timedout, ++ .free_job = v3d_job_free ++}; ++ ++static const struct drm_sched_backend_ops v3d_cache_clean_sched_ops = { ++ .dependency = v3d_job_dependency, ++ .run_job = v3d_cache_clean_job_run, ++ .timedout_job = v3d_generic_job_timedout, ++ .free_job = v3d_job_free ++}; ++ + int + v3d_sched_init(struct v3d_dev *v3d) + { +@@ -331,7 +411,7 @@ v3d_sched_init(struct v3d_dev *v3d) + if (ret) { + dev_err(v3d->dev, "Failed to create render scheduler: %d.", + ret); +- drm_sched_fini(&v3d->queue[V3D_BIN].sched); ++ v3d_sched_fini(v3d); + return ret; + } + +@@ -343,11 +423,36 @@ v3d_sched_init(struct v3d_dev *v3d) + if (ret) { + dev_err(v3d->dev, "Failed to create TFU scheduler: %d.", + ret); +- drm_sched_fini(&v3d->queue[V3D_RENDER].sched); +- drm_sched_fini(&v3d->queue[V3D_BIN].sched); ++ v3d_sched_fini(v3d); + return ret; + } + ++ if (v3d_has_csd(v3d)) { ++ ret = drm_sched_init(&v3d->queue[V3D_CSD].sched, ++ &v3d_csd_sched_ops, ++ hw_jobs_limit, job_hang_limit, ++ msecs_to_jiffies(hang_limit_ms), ++ "v3d_csd"); ++ if (ret) { ++ dev_err(v3d->dev, "Failed to create CSD scheduler: %d.", ++ ret); ++ v3d_sched_fini(v3d); ++ return ret; ++ } ++ ++ ret = drm_sched_init(&v3d->queue[V3D_CACHE_CLEAN].sched, ++ &v3d_cache_clean_sched_ops, ++ hw_jobs_limit, job_hang_limit, ++ msecs_to_jiffies(hang_limit_ms), ++ "v3d_cache_clean"); ++ if (ret) { ++ dev_err(v3d->dev, "Failed to create CACHE_CLEAN scheduler: %d.", ++ ret); ++ v3d_sched_fini(v3d); ++ return ret; ++ } ++ } ++ + return 0; + } + +@@ -356,6 +461,8 @@ v3d_sched_fini(struct v3d_dev *v3d) + { + enum v3d_queue q; + +- for (q = 0; q < V3D_MAX_QUEUES; q++) +- drm_sched_fini(&v3d->queue[q].sched); ++ for (q = 0; q < V3D_MAX_QUEUES; q++) { ++ if (v3d->queue[q].sched.ops) ++ drm_sched_fini(&v3d->queue[q].sched); ++ } + } +--- a/drivers/gpu/drm/v3d/v3d_trace.h ++++ b/drivers/gpu/drm/v3d/v3d_trace.h +@@ -124,6 +124,26 @@ TRACE_EVENT(v3d_tfu_irq, + __entry->seqno) + ); + ++TRACE_EVENT(v3d_csd_irq, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ + TRACE_EVENT(v3d_submit_tfu_ioctl, + TP_PROTO(struct drm_device *dev, u32 iia), + TP_ARGS(dev, iia), +@@ -163,6 +183,80 @@ TRACE_EVENT(v3d_submit_tfu, + __entry->seqno) + ); + ++TRACE_EVENT(v3d_submit_csd_ioctl, ++ TP_PROTO(struct drm_device *dev, u32 cfg5, u32 cfg6), ++ TP_ARGS(dev, cfg5, cfg6), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u32, cfg5) ++ __field(u32, cfg6) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->cfg5 = cfg5; ++ __entry->cfg6 = cfg6; ++ ), ++ ++ TP_printk("dev=%u, CFG5 0x%08x, CFG6 0x%08x", ++ __entry->dev, ++ __entry->cfg5, ++ __entry->cfg6) ++); ++ ++TRACE_EVENT(v3d_submit_csd, ++ TP_PROTO(struct drm_device *dev, ++ uint64_t seqno), ++ TP_ARGS(dev, seqno), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ __field(u64, seqno) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ __entry->seqno = seqno; ++ ), ++ ++ TP_printk("dev=%u, seqno=%llu", ++ __entry->dev, ++ __entry->seqno) ++); ++ ++TRACE_EVENT(v3d_cache_clean_begin, ++ TP_PROTO(struct drm_device *dev), ++ TP_ARGS(dev), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ ), ++ ++ TP_printk("dev=%u", ++ __entry->dev) ++); ++ ++TRACE_EVENT(v3d_cache_clean_end, ++ TP_PROTO(struct drm_device *dev), ++ TP_ARGS(dev), ++ ++ TP_STRUCT__entry( ++ __field(u32, dev) ++ ), ++ ++ TP_fast_assign( ++ __entry->dev = dev->primary->index; ++ ), ++ ++ TP_printk("dev=%u", ++ __entry->dev) ++); ++ + TRACE_EVENT(v3d_reset_begin, + TP_PROTO(struct drm_device *dev), + TP_ARGS(dev), +--- a/include/uapi/drm/v3d_drm.h ++++ b/include/uapi/drm/v3d_drm.h +@@ -37,6 +37,7 @@ extern "C" { + #define DRM_V3D_GET_PARAM 0x04 + #define DRM_V3D_GET_BO_OFFSET 0x05 + #define DRM_V3D_SUBMIT_TFU 0x06 ++#define DRM_V3D_SUBMIT_CSD 0x07 + + #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) + #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) +@@ -45,6 +46,7 @@ extern "C" { + #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) + #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) + #define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu) ++#define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd) + + /** + * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D +@@ -172,6 +174,7 @@ enum drm_v3d_param { + DRM_V3D_PARAM_V3D_CORE0_IDENT1, + DRM_V3D_PARAM_V3D_CORE0_IDENT2, + DRM_V3D_PARAM_SUPPORTS_TFU, ++ DRM_V3D_PARAM_SUPPORTS_CSD, + }; + + struct drm_v3d_get_param { +@@ -212,6 +215,31 @@ struct drm_v3d_submit_tfu { + __u32 out_sync; + }; + ++/* Submits a compute shader for dispatch. This job will block on any ++ * previous compute shaders submitted on this fd, and any other ++ * synchronization must be performed with in_sync/out_sync. ++ */ ++struct drm_v3d_submit_csd { ++ __u32 cfg[7]; ++ __u32 coef[4]; ++ ++ /* Pointer to a u32 array of the BOs that are referenced by the job. ++ */ ++ __u64 bo_handles; ++ ++ /* Number of BO handles passed in (size is that times 4). */ ++ __u32 bo_handle_count; ++ ++ /* sync object to block on before running the CSD job. Each ++ * CSD job will execute in the order submitted to its FD. ++ * Synchronization against rendering/TFU jobs or CSD from ++ * other fds requires using sync objects. ++ */ ++ __u32 in_sync; ++ /* Sync object to signal when the CSD job is done. */ ++ __u32 out_sync; ++}; ++ + #if defined(__cplusplus) + } + #endif diff --git a/target/linux/brcm2708/patches-4.19/950-0617-drm-v3d-Clock-V3D-down-when-not-in-use.patch b/target/linux/brcm2708/patches-4.19/950-0617-drm-v3d-Clock-V3D-down-when-not-in-use.patch new file mode 100644 index 000000000..7472b6915 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0617-drm-v3d-Clock-V3D-down-when-not-in-use.patch @@ -0,0 +1,157 @@ +From 167429373da6ab4f3f498013277eb5545d6f0c64 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Thu, 2 May 2019 13:22:53 -0700 +Subject: [PATCH 617/703] drm/v3d: Clock V3D down when not in use. + +My various attempts at re-enabling runtime PM have failed, so just +crank the clock down when V3D is idle to reduce power consumption. + +Signed-off-by: Eric Anholt +--- + drivers/gpu/drm/v3d/v3d_drv.c | 18 +++++++++++++ + drivers/gpu/drm/v3d/v3d_drv.h | 6 +++++ + drivers/gpu/drm/v3d/v3d_gem.c | 49 +++++++++++++++++++++++++++++++++++ + 3 files changed, 73 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -297,6 +297,21 @@ static int v3d_platform_drm_probe(struct + } + } + ++ v3d->clk = devm_clk_get(dev, NULL); ++ if (IS_ERR(v3d->clk)) { ++ if (ret != -EPROBE_DEFER) ++ dev_err(dev, "Failed to get clock\n"); ++ goto dev_free; ++ } ++ v3d->clk_up_rate = clk_get_rate(v3d->clk); ++ /* For downclocking, drop it to the minimum frequency we can get from ++ * the CPRMAN clock generator dividing off our parent. The divider is ++ * 4 bits, but ask for just higher than that so that rounding doesn't ++ * make cprman reject our rate. ++ */ ++ v3d->clk_down_rate = ++ (clk_get_rate(clk_get_parent(v3d->clk)) / (1 << 4)) + 10000; ++ + if (v3d->ver < 41) { + ret = map_regs(v3d, &v3d->gca_regs, "gca"); + if (ret) +@@ -331,6 +346,9 @@ static int v3d_platform_drm_probe(struct + if (ret) + goto irq_disable; + ++ ret = clk_set_rate(v3d->clk, v3d->clk_down_rate); ++ WARN_ON_ONCE(ret != 0); ++ + return 0; + + irq_disable: +--- a/drivers/gpu/drm/v3d/v3d_drv.h ++++ b/drivers/gpu/drm/v3d/v3d_drv.h +@@ -45,6 +45,12 @@ struct v3d_dev { + void __iomem *bridge_regs; + void __iomem *gca_regs; + struct clk *clk; ++ struct delayed_work clk_down_work; ++ unsigned long clk_up_rate, clk_down_rate; ++ struct mutex clk_lock; ++ u32 clk_refcount; ++ bool clk_up; ++ + struct reset_control *reset; + + /* Virtual and DMA addresses of the single shared page table. */ +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -3,6 +3,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -17,6 +18,47 @@ + #include "v3d_trace.h" + + static void ++v3d_clock_down_work(struct work_struct *work) ++{ ++ struct v3d_dev *v3d = ++ container_of(work, struct v3d_dev, clk_down_work.work); ++ int ret; ++ ++ ret = clk_set_rate(v3d->clk, v3d->clk_down_rate); ++ v3d->clk_up = false; ++ WARN_ON_ONCE(ret != 0); ++} ++ ++static void ++v3d_clock_up_get(struct v3d_dev *v3d) ++{ ++ mutex_lock(&v3d->clk_lock); ++ if (v3d->clk_refcount++ == 0) { ++ cancel_delayed_work_sync(&v3d->clk_down_work); ++ if (!v3d->clk_up) { ++ int ret; ++ ++ ret = clk_set_rate(v3d->clk, v3d->clk_up_rate); ++ WARN_ON_ONCE(ret != 0); ++ v3d->clk_up = true; ++ } ++ } ++ mutex_unlock(&v3d->clk_lock); ++} ++ ++static void ++v3d_clock_up_put(struct v3d_dev *v3d) ++{ ++ mutex_lock(&v3d->clk_lock); ++ if (--v3d->clk_refcount == 0) { ++ schedule_delayed_work(&v3d->clk_down_work, ++ msecs_to_jiffies(100)); ++ } ++ mutex_unlock(&v3d->clk_lock); ++} ++ ++ ++static void + v3d_init_core(struct v3d_dev *v3d, int core) + { + /* Set OVRTMUOUT, which means that the texture sampler uniform +@@ -490,6 +532,7 @@ static void + v3d_job_free(struct kref *ref) + { + struct v3d_job *job = container_of(ref, struct v3d_job, refcount); ++ struct v3d_dev *v3d = job->v3d; + int i; + + for (i = 0; i < job->bo_count; i++) { +@@ -505,6 +548,8 @@ v3d_job_free(struct kref *ref) + dma_fence_put(job->irq_fence); + dma_fence_put(job->done_fence); + ++ v3d_clock_up_put(v3d); ++ + kfree(job); + } + +@@ -596,6 +641,7 @@ v3d_job_init(struct v3d_dev *v3d, struct + if (ret) + return ret; + ++ v3d_clock_up_get(v3d); + kref_init(&job->refcount); + + return 0; +@@ -963,6 +1009,9 @@ v3d_gem_init(struct drm_device *dev) + mutex_init(&v3d->sched_lock); + mutex_init(&v3d->cache_clean_lock); + ++ mutex_init(&v3d->clk_lock); ++ INIT_DELAYED_WORK(&v3d->clk_down_work, v3d_clock_down_work); ++ + /* Note: We don't allocate address 0. Various bits of HW + * treat 0 as special, such as the occlusion query counters + * where 0 means "disabled". diff --git a/target/linux/brcm2708/patches-4.19/950-0618-HACK-clk-bcm2835-Add-BCM2838_CLOCK_EMMC2-support.patch b/target/linux/brcm2708/patches-4.19/950-0618-HACK-clk-bcm2835-Add-BCM2838_CLOCK_EMMC2-support.patch new file mode 100644 index 000000000..8fcc570c0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0618-HACK-clk-bcm2835-Add-BCM2838_CLOCK_EMMC2-support.patch @@ -0,0 +1,72 @@ +From 00f31bede51da02552b235fc93d35f357f13378a Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Thu, 2 May 2019 23:42:29 +0200 +Subject: [PATCH 618/703] HACK: clk-bcm2835: Add BCM2838_CLOCK_EMMC2 support + +The new BCM2838 supports an additional emmc2 clock. So add a new +compatible to register this clock only for BCM2838. + +Signed-off-by: Stefan Wahren +--- + drivers/clk/bcm/clk-bcm2835.c | 20 ++++++++++++++++++-- + include/dt-bindings/clock/bcm2835.h | 2 ++ + 2 files changed, 20 insertions(+), 2 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -124,6 +124,8 @@ + #define CM_AVEODIV 0x1bc + #define CM_EMMCCTL 0x1c0 + #define CM_EMMCDIV 0x1c4 ++#define CM_EMMC2CTL 0x1d0 ++#define CM_EMMC2DIV 0x1d4 + + /* General bits for the CM_*CTL regs */ + # define CM_ENABLE BIT(4) +@@ -2047,6 +2049,15 @@ static const struct bcm2835_clk_desc clk + .frac_bits = 8, + .tcnt_mux = 39), + ++ /* EMMC2 clock (only available for BCM2838) */ ++ [BCM2838_CLOCK_EMMC2] = REGISTER_PER_CLK( ++ .name = "emmc2", ++ .ctl_reg = CM_EMMC2CTL, ++ .div_reg = CM_EMMC2DIV, ++ .int_bits = 4, ++ .frac_bits = 8, ++ .tcnt_mux = 42), ++ + /* General purpose (GPIO) clocks */ + [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK( + .name = "gp0", +@@ -2276,8 +2287,12 @@ static int bcm2835_clk_probe(struct plat + + for (i = 0; i < asize; i++) { + desc = &clk_desc_array[i]; +- if (desc->clk_register && desc->data) +- hws[i] = desc->clk_register(cprman, desc->data); ++ if (desc->clk_register && desc->data) { ++ if ((i != BCM2838_CLOCK_EMMC2) || ++ of_device_is_compatible(fw_node, "brcm,bcm2838-cprman")) { ++ hws[i] = desc->clk_register(cprman, desc->data); ++ } ++ } + } + + ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk); +@@ -2297,6 +2312,7 @@ static int bcm2835_clk_probe(struct plat + + static const struct of_device_id bcm2835_clk_of_match[] = { + { .compatible = "brcm,bcm2835-cprman", }, ++ { .compatible = "brcm,bcm2838-cprman", }, + {} + }; + MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match); +--- a/include/dt-bindings/clock/bcm2835.h ++++ b/include/dt-bindings/clock/bcm2835.h +@@ -66,3 +66,5 @@ + #define BCM2835_CLOCK_DSI1E 48 + #define BCM2835_CLOCK_DSI0P 49 + #define BCM2835_CLOCK_DSI1P 50 ++ ++#define BCM2838_CLOCK_EMMC2 51 diff --git a/target/linux/brcm2708/patches-4.19/950-0619-drm-vc4-firmware-kms-Remove-incorrect-overscan-suppo.patch b/target/linux/brcm2708/patches-4.19/950-0619-drm-vc4-firmware-kms-Remove-incorrect-overscan-suppo.patch new file mode 100644 index 000000000..09b93e505 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0619-drm-vc4-firmware-kms-Remove-incorrect-overscan-suppo.patch @@ -0,0 +1,55 @@ +From 7e50ab877c14dff56f0836d6b79d9f6964b5e8b1 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 3 May 2019 13:58:03 +0100 +Subject: [PATCH 619/703] drm: vc4-firmware-kms: Remove incorrect overscan + support. + +The overscan support was required for the old mailbox API +in order to match up the cursor and frame buffer planes. +With the newer API directly talking to dispmanx there is no +difference, therefore FKMS does not need to make any +adjustments. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 15 --------------- + 1 file changed, 15 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -232,7 +232,6 @@ struct vc4_crtc { + void __iomem *regs; + + struct drm_pending_vblank_event *event; +- u32 overscan[4]; + bool vblank_enabled; + u32 display_number; + u32 display_type; +@@ -468,11 +467,6 @@ static void vc4_plane_atomic_update(stru + break; + } + +- if (vc4_crtc) { +- mb->plane.dst_x += vc4_crtc->overscan[0]; +- mb->plane.dst_y += vc4_crtc->overscan[1]; +- } +- + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] plane update %dx%d@%d +dst(%d,%d, %d,%d) +src(%d,%d, %d,%d) 0x%08x/%08x/%08x/%d, alpha %u zpos %u\n", + plane->base.id, plane->name, + mb->plane.width, +@@ -1228,15 +1222,6 @@ static int vc4_fkms_create_screen(struct + goto err_destroy_encoder; + } + +- ret = rpi_firmware_property(vc4->firmware, +- RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN, +- &vc4_crtc->overscan, +- sizeof(vc4_crtc->overscan)); +- if (ret) { +- DRM_ERROR("Failed to get overscan state: 0x%08x\n", vc4_crtc->overscan[0]); +- memset(&vc4_crtc->overscan, 0, sizeof(vc4_crtc->overscan)); +- } +- + *ret_crtc = vc4_crtc; + + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0620-drm-vc4-Log-flags-in-fkms-mode-set.patch b/target/linux/brcm2708/patches-4.19/950-0620-drm-vc4-Log-flags-in-fkms-mode-set.patch new file mode 100644 index 000000000..2f342df00 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0620-drm-vc4-Log-flags-in-fkms-mode-set.patch @@ -0,0 +1,31 @@ +From 5ab2c06953f0ef6da029ced94ca7468057e7ecb3 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 7 May 2019 12:13:34 +0100 +Subject: [PATCH 620/703] drm: vc4: Log flags in fkms mode set + +The flags contain info such as limited/full range RGB, aspect +ratio, and a fwe other useful things. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -685,12 +685,13 @@ static void vc4_crtc_mode_set_nofb(struc + return; + } + +- DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u\n", ++ DRM_DEBUG_KMS("Setting mode for display num %u mode name %s, clk %d, h(disp %d, start %d, end %d, total %d, skew %d) v(disp %d, start %d, end %d, total %d, scan %d), vrefresh %d, par %u, flags 0x%04x\n", + vc4_crtc->display_number, mode->name, mode->clock, + mode->hdisplay, mode->hsync_start, mode->hsync_end, + mode->htotal, mode->hskew, mode->vdisplay, + mode->vsync_start, mode->vsync_end, mode->vtotal, +- mode->vscan, mode->vrefresh, mode->picture_aspect_ratio); ++ mode->vscan, mode->vrefresh, mode->picture_aspect_ratio, ++ mode->flags); + mb.timings.display = vc4_crtc->display_number; + + mb.timings.video_id_code = frame.avi.video_code; diff --git a/target/linux/brcm2708/patches-4.19/950-0621-drm-vc4-firmware-kms-Fix-DSI-display-support.patch b/target/linux/brcm2708/patches-4.19/950-0621-drm-vc4-firmware-kms-Fix-DSI-display-support.patch new file mode 100644 index 000000000..c878270a7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0621-drm-vc4-firmware-kms-Fix-DSI-display-support.patch @@ -0,0 +1,25 @@ +From 5812f56a56140b70c110c22824d196c6abb866be Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 16 May 2019 17:49:42 +0100 +Subject: [PATCH 621/703] drm: vc4-firmware-kms: Fix DSI display support + +The mode was incorrectly listed as interlaced, which was then +rejected. +Correct this and FKMS works with the DSI display. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -1003,7 +1003,7 @@ static const struct drm_display_mode lcd + 25979400 / 1000, + 800, 800 + 1, 800 + 1 + 2, 800 + 1 + 2 + 46, 0, + 480, 480 + 7, 480 + 7 + 2, 480 + 7 + 2 + 21, 0, +- DRM_MODE_FLAG_INTERLACE) ++ 0) + }; + + static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector) diff --git a/target/linux/brcm2708/patches-4.19/950-0622-drm-vc4-Probe-DPI-DSI-timings-from-the-firmware.patch b/target/linux/brcm2708/patches-4.19/950-0622-drm-vc4-Probe-DPI-DSI-timings-from-the-firmware.patch new file mode 100644 index 000000000..5c4eb0d32 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0622-drm-vc4-Probe-DPI-DSI-timings-from-the-firmware.patch @@ -0,0 +1,120 @@ +From d5db7a4a6af4b3281ac2ef1023de68e4f6250516 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 21 May 2019 11:50:00 +0100 +Subject: [PATCH 622/703] drm: vc4: Probe DPI/DSI timings from the firmware + +For DPI and DSI displays query the firmware as to the configuration +and add it as the only mode for DRM. + +In theory we can add plumbing for setting the DPI/DSI mode from +KMS, but this is not being added at present as the support frameworks +aren't present in the firmware. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 60 ++++++++++++++++++---- + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 2 files changed, 51 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -280,7 +280,7 @@ static u32 vc4_get_display_type(u32 disp + /* The firmware display (DispmanX) IDs map to specific types in + * a fixed manner. + */ +- DRM_MODE_ENCODER_DSI, /* MAIN_LCD */ ++ DRM_MODE_ENCODER_DSI, /* MAIN_LCD - DSI or DPI */ + DRM_MODE_ENCODER_DSI, /* AUX_LCD */ + DRM_MODE_ENCODER_TMDS, /* HDMI0 */ + DRM_MODE_ENCODER_TVDAC, /* VEC */ +@@ -362,7 +362,6 @@ static void vc4_plane_atomic_update(stru + vc4_get_vc_image_fmt(drm_fmt->format); + struct vc4_fkms_plane *vc4_plane = to_vc4_fkms_plane(plane); + struct mailbox_set_plane *mb = &vc4_plane->mb; +- struct vc4_crtc *vc4_crtc = to_vc4_crtc(state->crtc); + int num_planes = fb->format->num_planes; + struct drm_display_mode *mode = &state->crtc->mode; + unsigned int rotation = SUPPORTED_ROTATIONS; +@@ -997,7 +996,9 @@ static int vc4_fkms_connector_get_modes( + return ret; + } + +-/* FIXME: Read LCD mode from the firmware. This is the DSI panel resolution. */ ++/* This is the DSI panel resolution. Use this as a default should the firmware ++ * not respond to our request for the timings. ++ */ + static const struct drm_display_mode lcd_mode = { + DRM_MODE("800x480", DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, + 25979400 / 1000, +@@ -1008,15 +1009,54 @@ static const struct drm_display_mode lcd + + static int vc4_fkms_lcd_connector_get_modes(struct drm_connector *connector) + { +- //struct vc4_fkms_connector *fkms_connector = +- // to_vc4_fkms_connector(connector); +- //struct drm_encoder *encoder = fkms_connector->encoder; +- //struct vc4_fkms_encoder *vc4_encoder = to_vc4_fkms_encoder(encoder); ++ struct vc4_fkms_connector *fkms_connector = ++ to_vc4_fkms_connector(connector); ++ struct vc4_dev *vc4 = fkms_connector->vc4_dev; + struct drm_display_mode *mode; +- //int ret = 0; ++ struct mailbox_set_mode mb = { ++ .tag1 = { RPI_FIRMWARE_GET_DISPLAY_TIMING, ++ sizeof(struct set_timings), 0}, ++ .timings = { .display = fkms_connector->display_number }, ++ }; ++ struct drm_display_mode fw_mode; ++ int ret = 0; ++ ++ ret = rpi_firmware_property_list(vc4->firmware, &mb, sizeof(mb)); ++ if (!ret) { ++ /* Equivalent to DRM_MODE macro. */ ++ memset(&fw_mode, 0, sizeof(fw_mode)); ++ strncpy(fw_mode.name, "LCD_MODE", sizeof(fw_mode.name)); ++ fw_mode.status = 0; ++ fw_mode.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; ++ fw_mode.clock = mb.timings.clock; ++ fw_mode.hdisplay = mb.timings.hdisplay; ++ fw_mode.hsync_start = mb.timings.hsync_start; ++ fw_mode.hsync_end = mb.timings.hsync_end; ++ fw_mode.htotal = mb.timings.htotal; ++ fw_mode.hskew = 0; ++ fw_mode.vdisplay = mb.timings.vdisplay; ++ fw_mode.vsync_start = mb.timings.vsync_start; ++ fw_mode.vsync_end = mb.timings.vsync_end; ++ fw_mode.vtotal = mb.timings.vtotal; ++ fw_mode.vscan = mb.timings.vscan; ++ if (mb.timings.flags & TIMINGS_FLAGS_H_SYNC_POS) ++ fw_mode.flags |= DRM_MODE_FLAG_PHSYNC; ++ else ++ fw_mode.flags |= DRM_MODE_FLAG_NHSYNC; ++ if (mb.timings.flags & TIMINGS_FLAGS_V_SYNC_POS) ++ fw_mode.flags |= DRM_MODE_FLAG_PVSYNC; ++ else ++ fw_mode.flags |= DRM_MODE_FLAG_NVSYNC; ++ ++ fw_mode.base.type = DRM_MODE_OBJECT_MODE; ++ ++ mode = drm_mode_duplicate(connector->dev, ++ &fw_mode); ++ } else { ++ mode = drm_mode_duplicate(connector->dev, ++ &lcd_mode); ++ } + +- mode = drm_mode_duplicate(connector->dev, +- &lcd_mode); + if (!mode) { + DRM_ERROR("Failed to create a new display mode\n"); + return -ENOMEM; +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -151,6 +151,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, + + RPI_FIRMWARE_SET_PLANE = 0x00048015, ++ RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017, + RPI_FIRMWARE_SET_TIMING = 0x00048017, + + RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, diff --git a/target/linux/brcm2708/patches-4.19/950-0623-drm-vc4-handle-the-case-where-there-are-no-available.patch b/target/linux/brcm2708/patches-4.19/950-0623-drm-vc4-handle-the-case-where-there-are-no-available.patch new file mode 100644 index 000000000..d54a78f56 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0623-drm-vc4-handle-the-case-where-there-are-no-available.patch @@ -0,0 +1,67 @@ +From 124d768ec6f79f42bdcde24801e2315c4d2d7632 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 28 May 2019 13:56:06 +0100 +Subject: [PATCH 623/703] drm: vc4: handle the case where there are no + available displays + +It's reasonable for the firmware to return zero as the number of +attached displays. Handle this case as otherwise drm thinks that +the DSI panel is attached, which is nonsense. + +Signed-off-by: Jonathan Bell +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 32 +++++++++++++++----------- + 1 file changed, 18 insertions(+), 14 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -1309,13 +1309,13 @@ static int vc4_fkms_bind(struct device * + RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS, + &num_displays, sizeof(u32)); + +- /* If we fail to get the number of displays, or it returns 0, then ++ /* If we fail to get the number of displays, then + * assume old firmware that doesn't have the mailbox call, so just + * set one display + */ +- if (ret || num_displays == 0) { ++ if (ret) { + num_displays = 1; +- DRM_WARN("Unable to determine number of displays's. Assuming 1\n"); ++ DRM_WARN("Unable to determine number of displays - assuming 1\n"); + ret = 0; + } + +@@ -1344,17 +1344,21 @@ static int vc4_fkms_bind(struct device * + display_num); + } + +- /* Map the SMI interrupt reg */ +- crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0); +- if (IS_ERR(crtc_list[0]->regs)) +- DRM_ERROR("Oh dear, failed to map registers\n"); +- +- writel(0, crtc_list[0]->regs + SMICS); +- ret = devm_request_irq(dev, platform_get_irq(pdev, 0), +- vc4_crtc_irq_handler, 0, "vc4 firmware kms", +- crtc_list); +- if (ret) +- DRM_ERROR("Oh dear, failed to register IRQ\n"); ++ if (num_displays > 0) { ++ /* Map the SMI interrupt reg */ ++ crtc_list[0]->regs = vc4_ioremap_regs(pdev, 0); ++ if (IS_ERR(crtc_list[0]->regs)) ++ DRM_ERROR("Oh dear, failed to map registers\n"); ++ ++ writel(0, crtc_list[0]->regs + SMICS); ++ ret = devm_request_irq(dev, platform_get_irq(pdev, 0), ++ vc4_crtc_irq_handler, 0, ++ "vc4 firmware kms", crtc_list); ++ if (ret) ++ DRM_ERROR("Oh dear, failed to register IRQ\n"); ++ } else { ++ DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n"); ++ } + + platform_set_drvdata(pdev, crtc_list); + diff --git a/target/linux/brcm2708/patches-4.19/950-0624-drm-vc4-Support-the-VEC-in-FKMS.patch b/target/linux/brcm2708/patches-4.19/950-0624-drm-vc4-Support-the-VEC-in-FKMS.patch new file mode 100644 index 000000000..8ca3e91d1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0624-drm-vc4-Support-the-VEC-in-FKMS.patch @@ -0,0 +1,62 @@ +From 1627c1be944a27b3b2f06d8d2b9dacf917c0ff67 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 24 May 2019 17:59:01 +0100 +Subject: [PATCH 624/703] drm/vc4: Support the VEC in FKMS + +Extends the DPI/DSI support to also report the VEC output +which supports interlacing too. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -125,6 +125,7 @@ struct set_timings { + #define TIMINGS_FLAGS_H_SYNC_NEG 0 + #define TIMINGS_FLAGS_V_SYNC_POS BIT(1) + #define TIMINGS_FLAGS_V_SYNC_NEG 0 ++#define TIMINGS_FLAGS_INTERLACE BIT(2) + + #define TIMINGS_FLAGS_ASPECT_MASK GENMASK(7, 4) + #define TIMINGS_FLAGS_ASPECT_NONE (0 << 4) +@@ -1047,6 +1048,12 @@ static int vc4_fkms_lcd_connector_get_mo + fw_mode.flags |= DRM_MODE_FLAG_PVSYNC; + else + fw_mode.flags |= DRM_MODE_FLAG_NVSYNC; ++ if (mb.timings.flags & TIMINGS_FLAGS_V_SYNC_POS) ++ fw_mode.flags |= DRM_MODE_FLAG_PVSYNC; ++ else ++ fw_mode.flags |= DRM_MODE_FLAG_NVSYNC; ++ if (mb.timings.flags & TIMINGS_FLAGS_INTERLACE) ++ fw_mode.flags |= DRM_MODE_FLAG_INTERLACE; + + fw_mode.base.type = DRM_MODE_OBJECT_MODE; + +@@ -1133,17 +1140,24 @@ vc4_fkms_connector_init(struct drm_devic + DRM_MODE_CONNECTOR_DSI); + drm_connector_helper_add(connector, + &vc4_fkms_lcd_conn_helper_funcs); ++ connector->interlace_allowed = 0; ++ } else if (fkms_connector->display_type == DRM_MODE_ENCODER_TVDAC) { ++ drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, ++ DRM_MODE_CONNECTOR_Composite); ++ drm_connector_helper_add(connector, ++ &vc4_fkms_lcd_conn_helper_funcs); ++ connector->interlace_allowed = 1; + } else { + drm_connector_init(dev, connector, &vc4_fkms_connector_funcs, + DRM_MODE_CONNECTOR_HDMIA); + drm_connector_helper_add(connector, + &vc4_fkms_connector_helper_funcs); ++ connector->interlace_allowed = 0; + } + + connector->polled = (DRM_CONNECTOR_POLL_CONNECT | + DRM_CONNECTOR_POLL_DISCONNECT); + +- connector->interlace_allowed = 0; + connector->doublescan_allowed = 0; + + drm_connector_attach_encoder(connector, encoder); diff --git a/target/linux/brcm2708/patches-4.19/950-0625-drm-vc4-Fixup-typo-when-setting-HDMI-aspect-ratio.patch b/target/linux/brcm2708/patches-4.19/950-0625-drm-vc4-Fixup-typo-when-setting-HDMI-aspect-ratio.patch new file mode 100644 index 000000000..35fab4ce7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0625-drm-vc4-Fixup-typo-when-setting-HDMI-aspect-ratio.patch @@ -0,0 +1,39 @@ +From 8fa80c9aeab3fac843be81d1dda0e87042367d34 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 7 May 2019 15:00:02 +0100 +Subject: [PATCH 625/703] drm: vc4: Fixup typo when setting HDMI aspect ratio + +Assignment was to the wrong structure. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -717,19 +717,19 @@ static void vc4_crtc_mode_set_nofb(struc + switch (frame.avi.picture_aspect) { + default: + case HDMI_PICTURE_ASPECT_NONE: +- mode->flags |= TIMINGS_FLAGS_ASPECT_NONE; ++ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_NONE; + break; + case HDMI_PICTURE_ASPECT_4_3: +- mode->flags |= TIMINGS_FLAGS_ASPECT_4_3; ++ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_4_3; + break; + case HDMI_PICTURE_ASPECT_16_9: +- mode->flags |= TIMINGS_FLAGS_ASPECT_16_9; ++ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_16_9; + break; + case HDMI_PICTURE_ASPECT_64_27: +- mode->flags |= TIMINGS_FLAGS_ASPECT_64_27; ++ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_64_27; + break; + case HDMI_PICTURE_ASPECT_256_135: +- mode->flags |= TIMINGS_FLAGS_ASPECT_256_135; ++ mb.timings.flags |= TIMINGS_FLAGS_ASPECT_256_135; + break; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0626-drm-vc4-Correct-SAND-support-for-FKMS.patch b/target/linux/brcm2708/patches-4.19/950-0626-drm-vc4-Correct-SAND-support-for-FKMS.patch new file mode 100644 index 000000000..9e6aa3c18 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0626-drm-vc4-Correct-SAND-support-for-FKMS.patch @@ -0,0 +1,40 @@ +From b974397afb8ba0a0e11146886686163dfd4a3664 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 29 May 2019 15:44:11 +0100 +Subject: [PATCH 626/703] drm/vc4: Correct SAND support for FKMS. + +It was accepting NV21 which doesn't map through, but +also wasn't advertising the modifier so nothing would know +to request it. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -545,7 +545,6 @@ static bool vc4_fkms_format_mod_supporte + return false; + } + case DRM_FORMAT_NV12: +- case DRM_FORMAT_NV21: + switch (fourcc_mod_broadcom_mod(modifier)) { + case DRM_FORMAT_MOD_LINEAR: + case DRM_FORMAT_MOD_BROADCOM_SAND128: +@@ -553,6 +552,7 @@ static bool vc4_fkms_format_mod_supporte + default: + return false; + } ++ case DRM_FORMAT_NV21: + case DRM_FORMAT_RGB888: + case DRM_FORMAT_BGR888: + case DRM_FORMAT_YUV422: +@@ -599,6 +599,7 @@ static struct drm_plane *vc4_fkms_plane_ + * would prefer to scan out linear (less bus traffic). + */ + DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED, ++ DRM_FORMAT_MOD_BROADCOM_SAND128, + DRM_FORMAT_MOD_INVALID, + }; + int i; diff --git a/target/linux/brcm2708/patches-4.19/950-0627-drm-vc4-fkms-to-query-the-VPU-for-HDMI-clock-limits.patch b/target/linux/brcm2708/patches-4.19/950-0627-drm-vc4-fkms-to-query-the-VPU-for-HDMI-clock-limits.patch new file mode 100644 index 000000000..b5111db67 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0627-drm-vc4-fkms-to-query-the-VPU-for-HDMI-clock-limits.patch @@ -0,0 +1,134 @@ +From 4a720b86a1ef014dcaa6e55deec883312ca3afce Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 30 May 2019 13:56:15 +0100 +Subject: [PATCH 627/703] drm/vc4: fkms to query the VPU for HDMI clock limits + +The VPU has configured clocks for 4k (or not) via config.txt, +and will limit the choice of video modes based on that. +Make fkms query it for these limits too to avoid selecting modes +that can not be handled by the current clock setup. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_drv.h | 1 + + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 48 ++++++++++++++++++++++ + include/soc/bcm2835/raspberrypi-firmware.h | 1 + + 3 files changed, 50 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_drv.h ++++ b/drivers/gpu/drm/vc4/vc4_drv.h +@@ -77,6 +77,7 @@ struct vc4_dev { + struct vc4_dsi *dsi1; + struct vc4_vec *vec; + struct vc4_txp *txp; ++ struct vc4_fkms *fkms; + + struct vc4_hang_state *hang_state; + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -29,6 +29,14 @@ + #include "vc_image_types.h" + #include + ++struct get_display_cfg { ++ u32 max_pixel_clock[2]; //Max pixel clock for each display ++}; ++ ++struct vc4_fkms { ++ struct get_display_cfg cfg; ++}; ++ + #define PLANES_PER_CRTC 3 + + struct set_plane { +@@ -794,6 +802,11 @@ static void vc4_crtc_enable(struct drm_c + static enum drm_mode_status + vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode) + { ++ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); ++ struct drm_device *dev = crtc->dev; ++ struct vc4_dev *vc4 = to_vc4_dev(dev); ++ struct vc4_fkms *fkms = vc4->fkms; ++ + /* Do not allow doublescan modes from user space */ + if (mode->flags & DRM_MODE_FLAG_DBLSCAN) { + DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n", +@@ -801,6 +814,22 @@ vc4_crtc_mode_valid(struct drm_crtc *crt + return MODE_NO_DBLESCAN; + } + ++ /* Limit the pixel clock based on the HDMI clock limits from the ++ * firmware ++ */ ++ switch (vc4_crtc->display_number) { ++ case 2: /* HDMI0 */ ++ if (fkms->cfg.max_pixel_clock[0] && ++ mode->clock > fkms->cfg.max_pixel_clock[0]) ++ return MODE_CLOCK_HIGH; ++ break; ++ case 7: /* HDMI1 */ ++ if (fkms->cfg.max_pixel_clock[1] && ++ mode->clock > fkms->cfg.max_pixel_clock[1]) ++ return MODE_CLOCK_HIGH; ++ break; ++ } ++ + /* Limit the pixel clock until we can get dynamic HDMI 2.0 scrambling + * working. + */ +@@ -1301,11 +1330,16 @@ static int vc4_fkms_bind(struct device * + struct device_node *firmware_node; + struct vc4_crtc **crtc_list; + u32 num_displays, display_num; ++ struct vc4_fkms *fkms; + int ret; + u32 display_id; + + vc4->firmware_kms = true; + ++ fkms = devm_kzalloc(dev, sizeof(*fkms), GFP_KERNEL); ++ if (!fkms) ++ return -ENOMEM; ++ + /* firmware kms doesn't have precise a scanoutpos implementation, so + * we can't do the precise vblank timestamp mode. + */ +@@ -1334,6 +1368,18 @@ static int vc4_fkms_bind(struct device * + ret = 0; + } + ++ ret = rpi_firmware_property(vc4->firmware, ++ RPI_FIRMWARE_GET_DISPLAY_CFG, ++ &fkms->cfg, sizeof(fkms->cfg)); ++ ++ if (ret) ++ return -EINVAL; ++ /* The firmware works in Hz. This will be compared against kHz, so div ++ * 1000 now rather than multiple times later. ++ */ ++ fkms->cfg.max_pixel_clock[0] /= 1000; ++ fkms->cfg.max_pixel_clock[1] /= 1000; ++ + /* Allocate a list, with space for a NULL on the end */ + crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1), + GFP_KERNEL); +@@ -1375,6 +1421,8 @@ static int vc4_fkms_bind(struct device * + DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n"); + } + ++ vc4->fkms = fkms; ++ + platform_set_drvdata(pdev, crtc_list); + + return 0; +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -153,6 +153,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_SET_PLANE = 0x00048015, + RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017, + RPI_FIRMWARE_SET_TIMING = 0x00048017, ++ RPI_FIRMWARE_GET_DISPLAY_CFG = 0x00040018, + + RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, + RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, diff --git a/target/linux/brcm2708/patches-4.19/950-0628-drm-vc4-Max-resolution-of-7680-is-conditional-on-bei.patch b/target/linux/brcm2708/patches-4.19/950-0628-drm-vc4-Max-resolution-of-7680-is-conditional-on-bei.patch new file mode 100644 index 000000000..56e17a428 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0628-drm-vc4-Max-resolution-of-7680-is-conditional-on-bei.patch @@ -0,0 +1,38 @@ +From 78bd1c0169850a388fd7a45af6dd566613403a8e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 30 May 2019 15:55:15 +0100 +Subject: [PATCH 628/703] drm/vc4: Max resolution of 7680 is conditional on + being Pi4 + +The max resolution had been increased from 2048 to 7680 for all +platforms. This code is common with Pi0-3 which have a max render +target for GL of 2048, therefore the increased resolution has to +be conditional on the platform. +Switch based on whether the bcm2835-v3d node is found, as that is +not present on Pi4. (There is a potential configuration on Pi0-3 +with no v3d, but this is very unlikely). + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_kms.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_kms.c +@@ -429,8 +429,14 @@ int vc4_kms_load(struct drm_device *dev) + return ret; + } + +- dev->mode_config.max_width = 7680; +- dev->mode_config.max_height = 7680; ++ if (!drm_core_check_feature(dev, DRIVER_RENDER)) { ++ /* No V3D as part of vc4. Assume this is Pi4. */ ++ dev->mode_config.max_width = 7680; ++ dev->mode_config.max_height = 7680; ++ } else { ++ dev->mode_config.max_width = 2048; ++ dev->mode_config.max_height = 2048; ++ } + dev->mode_config.funcs = &vc4_mode_funcs; + dev->mode_config.preferred_depth = 24; + dev->mode_config.async_page_flip = true; diff --git a/target/linux/brcm2708/patches-4.19/950-0629-staging-vc-sm-cma-Remove-obsolete-comment-and-make-f.patch b/target/linux/brcm2708/patches-4.19/950-0629-staging-vc-sm-cma-Remove-obsolete-comment-and-make-f.patch new file mode 100644 index 000000000..92f3682b5 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0629-staging-vc-sm-cma-Remove-obsolete-comment-and-make-f.patch @@ -0,0 +1,28 @@ +From a493861ab01161aedb611793c87456dc1394bec6 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 10 Dec 2018 17:35:58 +0000 +Subject: [PATCH 629/703] staging: vc-sm-cma: Remove obsolete comment and make + function static + +Removes obsolete comment about wanting to pass a function +pointer into mmal-vchiq as we now do. +As the function is passed as a function pointer, the function itself +can be static. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -594,8 +594,7 @@ error: + return ret; + } + +-/* FIXME: Pass a function pointer to this into vc_vchi_sm.c */ +-void ++static void + vc_sm_vpu_event(struct sm_instance *instance, struct vc_sm_result_t *reply, + int reply_len) + { diff --git a/target/linux/brcm2708/patches-4.19/950-0630-staging-vc-sm-cma-Add-in-allocation-for-VPU-requests.patch b/target/linux/brcm2708/patches-4.19/950-0630-staging-vc-sm-cma-Add-in-allocation-for-VPU-requests.patch new file mode 100644 index 000000000..3c4c3d6e4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0630-staging-vc-sm-cma-Add-in-allocation-for-VPU-requests.patch @@ -0,0 +1,1206 @@ +From 904c0d6a47b181b134a3626bfd93b456ec6b411d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 21 Dec 2018 16:50:53 +0000 +Subject: [PATCH 630/703] staging: vc-sm-cma: Add in allocation for VPU + requests. + +Module has to change from tristate to bool as all CMA functions +are boolean. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/Kconfig | 4 +- + .../staging/vc04_services/vc-sm-cma/Makefile | 2 +- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 642 +++++++++++++++--- + .../staging/vc04_services/vc-sm-cma/vc_sm.h | 30 +- + .../vc04_services/vc-sm-cma/vc_sm_cma.c | 99 +++ + .../vc04_services/vc-sm-cma/vc_sm_cma.h | 39 ++ + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 10 + + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.h | 4 + + .../vc04_services/vc-sm-cma/vc_sm_defs.h | 2 + + 9 files changed, 723 insertions(+), 109 deletions(-) + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c + create mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h + +--- a/drivers/staging/vc04_services/vc-sm-cma/Kconfig ++++ b/drivers/staging/vc04_services/vc-sm-cma/Kconfig +@@ -1,6 +1,6 @@ + config BCM_VC_SM_CMA +- tristate "VideoCore Shared Memory (CMA) driver" +- depends on BCM2835_VCHIQ ++ bool "VideoCore Shared Memory (CMA) driver" ++ depends on BCM2835_VCHIQ && DMA_CMA + select RBTREE + select DMA_SHARED_BUFFER + help +--- a/drivers/staging/vc04_services/vc-sm-cma/Makefile ++++ b/drivers/staging/vc04_services/vc-sm-cma/Makefile +@@ -3,6 +3,6 @@ ccflags-y += -Idrivers/staging/vc04_serv + ccflags-y += -D__VCCOREVER__=0 + + vc-sm-cma-$(CONFIG_BCM_VC_SM_CMA) := \ +- vc_sm.o vc_sm_cma_vchi.o ++ vc_sm.o vc_sm_cma_vchi.o vc_sm_cma.o + + obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma.o +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -9,10 +9,21 @@ + * and taking some code for CMA/dmabuf handling from the Android Ion + * driver (Google/Linaro). + * +- * This is cut down version to only support import of dma_bufs from +- * other kernel drivers. A more complete implementation of the old +- * vmcs_sm functionality can follow later. + * ++ * This driver has 3 main uses: ++ * 1) Allocating buffers for the kernel or userspace that can be shared with the ++ * VPU. ++ * 2) Importing dmabufs from elsewhere for sharing with the VPU. ++ * 3) Allocating buffers for use by the VPU. ++ * ++ * In the first and second cases the native handle is a dmabuf. Releasing the ++ * resource inherently comes from releasing the dmabuf, and this will trigger ++ * unmapping on the VPU. The underlying allocation and our buffer structure are ++ * retained until the VPU has confirmed that it has finished with it. ++ * ++ * For the VPU allocations the VPU is responsible for triggering the release, ++ * and therefore the released message decrements the dma_buf refcount (with the ++ * VPU mapping having already been marked as released). + */ + + /* ---- Include Files ----------------------------------------------------- */ +@@ -39,6 +50,7 @@ + #include "vc_sm_cma_vchi.h" + + #include "vc_sm.h" ++#include "vc_sm_cma.h" + #include "vc_sm_knl.h" + + /* ---- Private Constants and Types --------------------------------------- */ +@@ -72,6 +84,7 @@ struct sm_state_t { + struct platform_device *pdev; + + struct sm_instance *sm_handle; /* Handle for videocore service. */ ++ struct cma *cma_heap; + + spinlock_t kernelid_map_lock; /* Spinlock protecting kernelid_map */ + struct idr kernelid_map; +@@ -80,6 +93,7 @@ struct sm_state_t { + struct list_head buffer_list; /* List of buffer. */ + + struct vc_sm_privdata_t *data_knl; /* Kernel internal data tracking. */ ++ struct vc_sm_privdata_t *vpu_allocs; /* All allocations from the VPU */ + struct dentry *dir_root; /* Debug fs entries root. */ + struct sm_pde_t dir_state; /* Debug fs entries state sub-tree. */ + +@@ -89,6 +103,12 @@ struct sm_state_t { + u32 int_trans_id; /* Interrupted transaction. */ + }; + ++struct vc_sm_dma_buf_attachment { ++ struct device *dev; ++ struct sg_table *table; ++ struct list_head list; ++}; ++ + /* ---- Private Variables ----------------------------------------------- */ + + static struct sm_state_t *sm_state; +@@ -172,12 +192,14 @@ static int vc_sm_cma_global_state_show(s + resource->size); + seq_printf(s, " DMABUF %p\n", + resource->dma_buf); +- seq_printf(s, " ATTACH %p\n", +- resource->attach); ++ if (resource->imported) { ++ seq_printf(s, " ATTACH %p\n", ++ resource->import.attach); ++ seq_printf(s, " SGT %p\n", ++ resource->import.sgt); ++ } + seq_printf(s, " SG_TABLE %p\n", + resource->sg_table); +- seq_printf(s, " SGT %p\n", +- resource->sgt); + seq_printf(s, " DMA_ADDR %pad\n", + &resource->dma_addr); + seq_printf(s, " VC_HANDLE %08x\n", +@@ -209,17 +231,33 @@ static void vc_sm_add_resource(struct vc + } + + /* +- * Release an allocation. +- * All refcounting is done via the dma buf object. ++ * Cleans up imported dmabuf. + */ +-static void vc_sm_release_resource(struct vc_sm_buffer *buffer, int force) ++static void vc_sm_clean_up_dmabuf(struct vc_sm_buffer *buffer) + { +- mutex_lock(&sm_state->map_lock); +- mutex_lock(&buffer->lock); ++ if (!buffer->imported) ++ return; + +- pr_debug("[%s]: buffer %p (name %s, size %zu)\n", +- __func__, buffer, buffer->name, buffer->size); ++ /* Handle cleaning up imported dmabufs */ ++ mutex_lock(&buffer->lock); ++ if (buffer->import.sgt) { ++ dma_buf_unmap_attachment(buffer->import.attach, ++ buffer->import.sgt, ++ DMA_BIDIRECTIONAL); ++ buffer->import.sgt = NULL; ++ } ++ if (buffer->import.attach) { ++ dma_buf_detach(buffer->dma_buf, buffer->import.attach); ++ buffer->import.attach = NULL; ++ } ++ mutex_unlock(&buffer->lock); ++} + ++/* ++ * Instructs VPU to decrement the refcount on a buffer. ++ */ ++static void vc_sm_vpu_free(struct vc_sm_buffer *buffer) ++{ + if (buffer->vc_handle && buffer->vpu_state == VPU_MAPPED) { + struct vc_sm_free_t free = { buffer->vc_handle, 0 }; + int status = vc_sm_cma_vchi_free(sm_state->sm_handle, &free, +@@ -230,17 +268,32 @@ static void vc_sm_release_resource(struc + } + + if (sm_state->require_released_callback) { +- /* Need to wait for the VPU to confirm the free */ ++ /* Need to wait for the VPU to confirm the free. */ + + /* Retain a reference on this until the VPU has + * released it + */ + buffer->vpu_state = VPU_UNMAPPING; +- goto defer; ++ } else { ++ buffer->vpu_state = VPU_NOT_MAPPED; ++ buffer->vc_handle = 0; + } +- buffer->vpu_state = VPU_NOT_MAPPED; +- buffer->vc_handle = 0; + } ++} ++ ++/* ++ * Release an allocation. ++ * All refcounting is done via the dma buf object. ++ * ++ * Must be called with the mutex held. The function will either release the ++ * mutex (if defering the release) or destroy it. The caller must therefore not ++ * reuse the buffer on return. ++ */ ++static void vc_sm_release_resource(struct vc_sm_buffer *buffer) ++{ ++ pr_debug("[%s]: buffer %p (name %s, size %zu)\n", ++ __func__, buffer, buffer->name, buffer->size); ++ + if (buffer->vc_handle) { + /* We've sent the unmap request but not had the response. */ + pr_err("[%s]: Waiting for VPU unmap response on %p\n", +@@ -248,45 +301,43 @@ static void vc_sm_release_resource(struc + goto defer; + } + if (buffer->in_use) { +- /* Don't release dmabuf here - we await the release */ ++ /* dmabuf still in use - we await the release */ + pr_err("[%s]: buffer %p is still in use\n", + __func__, buffer); + goto defer; + } + +- /* Handle cleaning up imported dmabufs */ +- if (buffer->sgt) { +- dma_buf_unmap_attachment(buffer->attach, buffer->sgt, +- DMA_BIDIRECTIONAL); +- buffer->sgt = NULL; +- } +- if (buffer->attach) { +- dma_buf_detach(buffer->dma_buf, buffer->attach); +- buffer->attach = NULL; +- } +- +- /* Release the dma_buf (whether ours or imported) */ +- if (buffer->import_dma_buf) { +- dma_buf_put(buffer->import_dma_buf); +- buffer->import_dma_buf = NULL; +- buffer->dma_buf = NULL; +- } else if (buffer->dma_buf) { +- dma_buf_put(buffer->dma_buf); +- buffer->dma_buf = NULL; ++ /* Release the allocation (whether imported dmabuf or CMA allocation) */ ++ if (buffer->imported) { ++ pr_debug("%s: Release imported dmabuf %p\n", __func__, ++ buffer->import.dma_buf); ++ if (buffer->import.dma_buf) ++ dma_buf_put(buffer->import.dma_buf); ++ else ++ pr_err("%s: Imported dmabuf already been put for buf %p\n", ++ __func__, buffer); ++ buffer->import.dma_buf = NULL; ++ } else { ++ if (buffer->sg_table) { ++ /* Our own allocation that we need to dma_unmap_sg */ ++ dma_unmap_sg(&sm_state->pdev->dev, ++ buffer->sg_table->sgl, ++ buffer->sg_table->nents, ++ DMA_BIDIRECTIONAL); ++ } ++ pr_debug("%s: Release our allocation\n", __func__); ++ vc_sm_cma_buffer_free(&buffer->alloc); ++ pr_debug("%s: Release our allocation - done\n", __func__); + } + +- if (buffer->sg_table && !buffer->import_dma_buf) { +- /* Our own allocation that we need to dma_unmap_sg */ +- dma_unmap_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, +- buffer->sg_table->nents, DMA_BIDIRECTIONAL); +- } + +- /* Free the local resource. Start by removing it from the list */ +- buffer->private = NULL; ++ /* Free our buffer. Start by removing it from the list */ ++ mutex_lock(&sm_state->map_lock); + list_del(&buffer->global_buffer_list); ++ mutex_unlock(&sm_state->map_lock); + ++ pr_debug("%s: Release our allocation - done\n", __func__); + mutex_unlock(&buffer->lock); +- mutex_unlock(&sm_state->map_lock); + + mutex_destroy(&buffer->lock); + +@@ -295,7 +346,7 @@ static void vc_sm_release_resource(struc + + defer: + mutex_unlock(&buffer->lock); +- mutex_unlock(&sm_state->map_lock); ++ return; + } + + /* Create support for private data tracking. */ +@@ -317,16 +368,267 @@ static struct vc_sm_privdata_t *vc_sm_cm + return file_data; + } + ++static struct sg_table *dup_sg_table(struct sg_table *table) ++{ ++ struct sg_table *new_table; ++ int ret, i; ++ struct scatterlist *sg, *new_sg; ++ ++ new_table = kzalloc(sizeof(*new_table), GFP_KERNEL); ++ if (!new_table) ++ return ERR_PTR(-ENOMEM); ++ ++ ret = sg_alloc_table(new_table, table->nents, GFP_KERNEL); ++ if (ret) { ++ kfree(new_table); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ new_sg = new_table->sgl; ++ for_each_sg(table->sgl, sg, table->nents, i) { ++ memcpy(new_sg, sg, sizeof(*sg)); ++ sg->dma_address = 0; ++ new_sg = sg_next(new_sg); ++ } ++ ++ return new_table; ++} ++ ++static void free_duped_table(struct sg_table *table) ++{ ++ sg_free_table(table); ++ kfree(table); ++} ++ ++/* Dma buf operations for use with our own allocations */ ++ ++static int vc_sm_dma_buf_attach(struct dma_buf *dmabuf, ++ struct dma_buf_attachment *attachment) ++ ++{ ++ struct vc_sm_dma_buf_attachment *a; ++ struct sg_table *table; ++ struct vc_sm_buffer *buf = dmabuf->priv; ++ ++ a = kzalloc(sizeof(*a), GFP_KERNEL); ++ if (!a) ++ return -ENOMEM; ++ ++ table = dup_sg_table(buf->sg_table); ++ if (IS_ERR(table)) { ++ kfree(a); ++ return -ENOMEM; ++ } ++ ++ a->table = table; ++ INIT_LIST_HEAD(&a->list); ++ ++ attachment->priv = a; ++ ++ mutex_lock(&buf->lock); ++ list_add(&a->list, &buf->attachments); ++ mutex_unlock(&buf->lock); ++ pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); ++ ++ return 0; ++} ++ ++static void vc_sm_dma_buf_detatch(struct dma_buf *dmabuf, ++ struct dma_buf_attachment *attachment) ++{ ++ struct vc_sm_dma_buf_attachment *a = attachment->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; ++ ++ pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); ++ free_duped_table(a->table); ++ mutex_lock(&buf->lock); ++ list_del(&a->list); ++ mutex_unlock(&buf->lock); ++ ++ kfree(a); ++} ++ ++static struct sg_table *vc_sm_map_dma_buf(struct dma_buf_attachment *attachment, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_dma_buf_attachment *a = attachment->priv; ++ struct sg_table *table; ++ ++ table = a->table; ++ ++ if (!dma_map_sg(attachment->dev, table->sgl, table->nents, ++ direction)) ++ return ERR_PTR(-ENOMEM); ++ ++ pr_debug("%s attachment %p\n", __func__, attachment); ++ return table; ++} ++ ++static void vc_sm_unmap_dma_buf(struct dma_buf_attachment *attachment, ++ struct sg_table *table, ++ enum dma_data_direction direction) ++{ ++ pr_debug("%s attachment %p\n", __func__, attachment); ++ dma_unmap_sg(attachment->dev, table->sgl, table->nents, direction); ++} ++ ++static int vc_sm_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) ++{ ++ struct vc_sm_buffer *buf = dmabuf->priv; ++ struct sg_table *table = buf->sg_table; ++ unsigned long addr = vma->vm_start; ++ unsigned long offset = vma->vm_pgoff * PAGE_SIZE; ++ struct scatterlist *sg; ++ int i; ++ int ret = 0; ++ ++ pr_debug("%s dmabuf %p, buf %p, vm_start %08lX\n", __func__, dmabuf, ++ buf, addr); ++ ++ mutex_lock(&buf->lock); ++ ++ /* now map it to userspace */ ++ for_each_sg(table->sgl, sg, table->nents, i) { ++ struct page *page = sg_page(sg); ++ unsigned long remainder = vma->vm_end - addr; ++ unsigned long len = sg->length; ++ ++ if (offset >= sg->length) { ++ offset -= sg->length; ++ continue; ++ } else if (offset) { ++ page += offset / PAGE_SIZE; ++ len = sg->length - offset; ++ offset = 0; ++ } ++ len = min(len, remainder); ++ ret = remap_pfn_range(vma, addr, page_to_pfn(page), len, ++ vma->vm_page_prot); ++ if (ret) ++ break; ++ addr += len; ++ if (addr >= vma->vm_end) ++ break; ++ } ++ mutex_unlock(&buf->lock); ++ ++ if (ret) ++ pr_err("%s: failure mapping buffer to userspace\n", ++ __func__); ++ ++ return ret; ++} ++ ++static void vc_sm_dma_buf_release(struct dma_buf *dmabuf) ++{ ++ struct vc_sm_buffer *buffer; ++ ++ if (!dmabuf) ++ return; ++ ++ buffer = (struct vc_sm_buffer *)dmabuf->priv; ++ ++ mutex_lock(&buffer->lock); ++ ++ pr_debug("%s dmabuf %p, buffer %p\n", __func__, dmabuf, buffer); ++ ++ buffer->in_use = 0; ++ ++ /* Unmap on the VPU */ ++ vc_sm_vpu_free(buffer); ++ pr_debug("%s vpu_free done\n", __func__); ++ ++ /* Unmap our dma_buf object (the vc_sm_buffer remains until released ++ * on the VPU). ++ */ ++ vc_sm_clean_up_dmabuf(buffer); ++ pr_debug("%s clean_up dmabuf done\n", __func__); ++ ++ vc_sm_release_resource(buffer); ++ pr_debug("%s done\n", __func__); ++} ++ ++static int vc_sm_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *buf; ++ struct vc_sm_dma_buf_attachment *a; ++ ++ if (!dmabuf) ++ return -EFAULT; ++ ++ buf = dmabuf->priv; ++ if (!buf) ++ return -EFAULT; ++ ++ mutex_lock(&buf->lock); ++ ++ list_for_each_entry(a, &buf->attachments, list) { ++ dma_sync_sg_for_cpu(a->dev, a->table->sgl, a->table->nents, ++ direction); ++ } ++ mutex_unlock(&buf->lock); ++ ++ return 0; ++} ++ ++static int vc_sm_dma_buf_end_cpu_access(struct dma_buf *dmabuf, ++ enum dma_data_direction direction) ++{ ++ struct vc_sm_buffer *buf; ++ struct vc_sm_dma_buf_attachment *a; ++ ++ if (!dmabuf) ++ return -EFAULT; ++ buf = dmabuf->priv; ++ if (!buf) ++ return -EFAULT; ++ ++ mutex_lock(&buf->lock); ++ ++ list_for_each_entry(a, &buf->attachments, list) { ++ dma_sync_sg_for_device(a->dev, a->table->sgl, a->table->nents, ++ direction); ++ } ++ mutex_unlock(&buf->lock); ++ ++ return 0; ++} ++ ++static void *vc_sm_dma_buf_kmap(struct dma_buf *dmabuf, unsigned long offset) ++{ ++ /* FIXME */ ++ return NULL; ++} ++ ++static void vc_sm_dma_buf_kunmap(struct dma_buf *dmabuf, unsigned long offset, ++ void *ptr) ++{ ++ /* FIXME */ ++} ++ ++static const struct dma_buf_ops dma_buf_ops = { ++ .map_dma_buf = vc_sm_map_dma_buf, ++ .unmap_dma_buf = vc_sm_unmap_dma_buf, ++ .mmap = vc_sm_dmabuf_mmap, ++ .release = vc_sm_dma_buf_release, ++ .attach = vc_sm_dma_buf_attach, ++ .detach = vc_sm_dma_buf_detatch, ++ .begin_cpu_access = vc_sm_dma_buf_begin_cpu_access, ++ .end_cpu_access = vc_sm_dma_buf_end_cpu_access, ++ .map = vc_sm_dma_buf_kmap, ++ .unmap = vc_sm_dma_buf_kunmap, ++}; + /* Dma_buf operations for chaining through to an imported dma_buf */ + static + int vc_sm_import_dma_buf_attach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return -EINVAL; +- return res->import_dma_buf->ops->attach(res->import_dma_buf, ++ return buf->import.dma_buf->ops->attach(buf->import.dma_buf, + attachment); + } + +@@ -334,22 +636,23 @@ static + void vc_sm_import_dma_buf_detatch(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return; +- res->import_dma_buf->ops->detach(res->import_dma_buf, attachment); ++ buf->import.dma_buf->ops->detach(buf->import.dma_buf, attachment); + } + + static + struct sg_table *vc_sm_import_map_dma_buf(struct dma_buf_attachment *attachment, + enum dma_data_direction direction) + { +- struct vc_sm_buffer *res = attachment->dmabuf->priv; ++ struct vc_sm_buffer *buf = attachment->dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return NULL; +- return res->import_dma_buf->ops->map_dma_buf(attachment, direction); ++ return buf->import.dma_buf->ops->map_dma_buf(attachment, ++ direction); + } + + static +@@ -357,87 +660,88 @@ void vc_sm_import_unmap_dma_buf(struct d + struct sg_table *table, + enum dma_data_direction direction) + { +- struct vc_sm_buffer *res = attachment->dmabuf->priv; ++ struct vc_sm_buffer *buf = attachment->dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return; +- res->import_dma_buf->ops->unmap_dma_buf(attachment, table, direction); ++ buf->import.dma_buf->ops->unmap_dma_buf(attachment, table, direction); + } + + static + int vc_sm_import_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- pr_debug("%s: mmap dma_buf %p, res %p, imported db %p\n", __func__, +- dmabuf, res, res->import_dma_buf); +- if (!res->import_dma_buf) { ++ pr_debug("%s: mmap dma_buf %p, buf %p, imported db %p\n", __func__, ++ dmabuf, buf, buf->import.dma_buf); ++ if (!buf->imported) { + pr_err("%s: mmap dma_buf %p- not an imported buffer\n", + __func__, dmabuf); + return -EINVAL; + } +- return res->import_dma_buf->ops->mmap(res->import_dma_buf, vma); ++ return buf->import.dma_buf->ops->mmap(buf->import.dma_buf, vma); + } + + static + void vc_sm_import_dma_buf_release(struct dma_buf *dmabuf) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + + pr_debug("%s: Relasing dma_buf %p\n", __func__, dmabuf); +- if (!res->import_dma_buf) ++ mutex_lock(&buf->lock); ++ if (!buf->imported) + return; + +- res->in_use = 0; ++ buf->in_use = 0; + +- vc_sm_release_resource(res, 0); ++ vc_sm_vpu_free(buf); ++ ++ vc_sm_release_resource(buf); + } + + static + void *vc_sm_import_dma_buf_kmap(struct dma_buf *dmabuf, + unsigned long offset) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return NULL; +- return res->import_dma_buf->ops->map(res->import_dma_buf, +- offset); ++ return buf->import.dma_buf->ops->map(buf->import.dma_buf, offset); + } + + static + void vc_sm_import_dma_buf_kunmap(struct dma_buf *dmabuf, + unsigned long offset, void *ptr) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return; +- res->import_dma_buf->ops->unmap(res->import_dma_buf, +- offset, ptr); ++ buf->import.dma_buf->ops->unmap(buf->import.dma_buf, offset, ptr); + } + + static + int vc_sm_import_dma_buf_begin_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return -EINVAL; +- return res->import_dma_buf->ops->begin_cpu_access(res->import_dma_buf, +- direction); ++ return buf->import.dma_buf->ops->begin_cpu_access(buf->import.dma_buf, ++ direction); + } + + static + int vc_sm_import_dma_buf_end_cpu_access(struct dma_buf *dmabuf, + enum dma_data_direction direction) + { +- struct vc_sm_buffer *res = dmabuf->priv; ++ struct vc_sm_buffer *buf = dmabuf->priv; + +- if (!res->import_dma_buf) ++ if (!buf->imported) + return -EINVAL; +- return res->import_dma_buf->ops->end_cpu_access(res->import_dma_buf, ++ return buf->import.dma_buf->ops->end_cpu_access(buf->import.dma_buf, + direction); + } + +@@ -516,9 +820,8 @@ vc_sm_cma_import_dmabuf_internal(struct + memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, + sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); + +- pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %pad, size %u\n", +- __func__, import.name, import.type, &dma_addr, +- import.size); ++ pr_debug("[%s]: attempt to import \"%s\" data - type %u, addr %pad, size %u.\n", ++ __func__, import.name, import.type, &dma_addr, import.size); + + /* Allocate the videocore buffer. */ + status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, +@@ -548,12 +851,14 @@ vc_sm_cma_import_dmabuf_internal(struct + buffer->size = import.size; + buffer->vpu_state = VPU_MAPPED; + +- buffer->import_dma_buf = dma_buf; ++ buffer->imported = 1; ++ buffer->import.dma_buf = dma_buf; + +- buffer->attach = attach; +- buffer->sgt = sgt; ++ buffer->import.attach = attach; ++ buffer->import.sgt = sgt; + buffer->dma_addr = dma_addr; + buffer->in_use = 1; ++ buffer->kernel_id = import.kernel_id; + + /* + * We're done - we need to export a new dmabuf chaining through most +@@ -594,6 +899,91 @@ error: + return ret; + } + ++static int vc_sm_cma_vpu_alloc(u32 size, uint32_t align, const char *name, ++ u32 mem_handle, struct vc_sm_buffer **ret_buffer) ++{ ++ DEFINE_DMA_BUF_EXPORT_INFO(exp_info); ++ struct vc_sm_buffer *buffer = NULL; ++ int aligned_size; ++ int ret = 0; ++ ++ /* Align to the user requested align */ ++ aligned_size = ALIGN(size, align); ++ /* and then to a page boundary */ ++ aligned_size = PAGE_ALIGN(aligned_size); ++ ++ if (!aligned_size) ++ return -EINVAL; ++ ++ /* Allocate local buffer to track this allocation. */ ++ buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); ++ if (!buffer) ++ return -ENOMEM; ++ ++ mutex_init(&buffer->lock); ++ ++ if (vc_sm_cma_buffer_allocate(sm_state->cma_heap, &buffer->alloc, ++ aligned_size)) { ++ pr_err("[%s]: cma alloc of %d bytes failed\n", ++ __func__, aligned_size); ++ ret = -ENOMEM; ++ goto error; ++ } ++ buffer->sg_table = buffer->alloc.sg_table; ++ ++ pr_debug("[%s]: cma alloc of %d bytes success\n", ++ __func__, aligned_size); ++ ++ if (dma_map_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, ++ buffer->sg_table->nents, DMA_BIDIRECTIONAL) <= 0) { ++ pr_err("[%s]: dma_map_sg failed\n", __func__); ++ goto error; ++ } ++ ++ INIT_LIST_HEAD(&buffer->attachments); ++ ++ memcpy(buffer->name, name, ++ min(sizeof(buffer->name), strlen(name))); ++ ++ exp_info.ops = &dma_buf_ops; ++ exp_info.size = aligned_size; ++ exp_info.flags = O_RDWR; ++ exp_info.priv = buffer; ++ ++ buffer->dma_buf = dma_buf_export(&exp_info); ++ if (IS_ERR(buffer->dma_buf)) { ++ ret = PTR_ERR(buffer->dma_buf); ++ goto error; ++ } ++ buffer->dma_addr = (uint32_t)sg_dma_address(buffer->sg_table->sgl); ++ if ((buffer->dma_addr & 0xC0000000) != 0xC0000000) { ++ pr_err("%s: Expecting an uncached alias for dma_addr %pad\n", ++ __func__, &buffer->dma_addr); ++ buffer->dma_addr |= 0xC0000000; ++ } ++ buffer->private = sm_state->vpu_allocs; ++ ++ buffer->vc_handle = mem_handle; ++ buffer->vpu_state = VPU_MAPPED; ++ buffer->vpu_allocated = 1; ++ buffer->size = size; ++ /* ++ * Create an ID that will be passed along with our message so ++ * that when we service the release reply, we can look up which ++ * resource is being released. ++ */ ++ buffer->kernel_id = get_kernel_id(buffer); ++ ++ vc_sm_add_resource(sm_state->vpu_allocs, buffer); ++ ++ *ret_buffer = buffer; ++ return 0; ++error: ++ if (buffer) ++ vc_sm_release_resource(buffer); ++ return ret; ++} ++ + static void + vc_sm_vpu_event(struct sm_instance *instance, struct vc_sm_result_t *reply, + int reply_len) +@@ -612,21 +1002,61 @@ vc_sm_vpu_event(struct sm_instance *inst + struct vc_sm_released *release = (struct vc_sm_released *)reply; + struct vc_sm_buffer *buffer = + lookup_kernel_id(release->kernel_id); ++ if (!buffer) { ++ pr_err("%s: VC released a buffer that is already released, kernel_id %d\n", ++ __func__, release->kernel_id); ++ break; ++ } ++ mutex_lock(&buffer->lock); + +- /* +- * FIXME: Need to check buffer is still valid and allocated +- * before continuing +- */ + pr_debug("%s: Released addr %08x, size %u, id %08x, mem_handle %08x\n", + __func__, release->addr, release->size, + release->kernel_id, release->vc_handle); +- mutex_lock(&buffer->lock); ++ + buffer->vc_handle = 0; + buffer->vpu_state = VPU_NOT_MAPPED; +- mutex_unlock(&buffer->lock); + free_kernel_id(release->kernel_id); + +- vc_sm_release_resource(buffer, 0); ++ if (buffer->vpu_allocated) { ++ /* VPU allocation, so release the dmabuf which will ++ * trigger the clean up. ++ */ ++ mutex_unlock(&buffer->lock); ++ dma_buf_put(buffer->dma_buf); ++ } else { ++ vc_sm_release_resource(buffer); ++ } ++ } ++ break; ++ case VC_SM_MSG_TYPE_VC_MEM_REQUEST: ++ { ++ struct vc_sm_buffer *buffer = NULL; ++ struct vc_sm_vc_mem_request *req = ++ (struct vc_sm_vc_mem_request *)reply; ++ struct vc_sm_vc_mem_request_result reply; ++ int ret; ++ ++ pr_debug("%s: Request %u bytes of memory, align %d name %s, trans_id %08x\n", ++ __func__, req->size, req->align, req->name, ++ req->trans_id); ++ ret = vc_sm_cma_vpu_alloc(req->size, req->align, req->name, ++ req->vc_handle, &buffer); ++ ++ reply.trans_id = req->trans_id; ++ if (!ret) { ++ reply.addr = buffer->dma_addr; ++ reply.kernel_id = buffer->kernel_id; ++ pr_debug("%s: Allocated resource buffer %p, addr %pad\n", ++ __func__, buffer, &buffer->dma_addr); ++ } else { ++ pr_err("%s: Allocation failed size %u, name %s, vc_handle %u\n", ++ __func__, req->size, req->name, req->vc_handle); ++ reply.addr = 0; ++ reply.kernel_id = 0; ++ } ++ vc_sm_vchi_client_vc_mem_req_reply(sm_state->sm_handle, &reply, ++ &sm_state->int_trans_id); ++ break; + } + break; + default: +@@ -645,6 +1075,14 @@ static void vc_sm_connected_init(void) + + pr_info("[%s]: start\n", __func__); + ++ if (vc_sm_cma_add_heaps(&sm_state->cma_heap) || ++ !sm_state->cma_heap) { ++ pr_err("[%s]: failed to initialise CMA heaps\n", ++ __func__); ++ ret = -EIO; ++ goto err_free_mem; ++ } ++ + /* + * Initialize and create a VCHI connection for the shared memory service + * running on videocore. +@@ -696,7 +1134,7 @@ static void vc_sm_connected_init(void) + goto err_remove_shared_memory; + } + +- version.version = 1; ++ version.version = 2; + ret = vc_sm_cma_vchi_client_version(sm_state->sm_handle, &version, + &version_result, + &sm_state->int_trans_id); +@@ -768,7 +1206,7 @@ static int bcm2835_vc_sm_cma_remove(stru + int vc_sm_cma_int_handle(void *handle) + { + struct dma_buf *dma_buf = (struct dma_buf *)handle; +- struct vc_sm_buffer *res; ++ struct vc_sm_buffer *buf; + + /* Validate we can work with this device. */ + if (!sm_state || !handle) { +@@ -776,8 +1214,8 @@ int vc_sm_cma_int_handle(void *handle) + return 0; + } + +- res = (struct vc_sm_buffer *)dma_buf->priv; +- return res->vc_handle; ++ buf = (struct vc_sm_buffer *)dma_buf->priv; ++ return buf->vc_handle; + } + EXPORT_SYMBOL_GPL(vc_sm_cma_int_handle); + +@@ -804,7 +1242,7 @@ EXPORT_SYMBOL_GPL(vc_sm_cma_free); + int vc_sm_cma_import_dmabuf(struct dma_buf *src_dmabuf, void **handle) + { + struct dma_buf *new_dma_buf; +- struct vc_sm_buffer *res; ++ struct vc_sm_buffer *buf; + int ret; + + /* Validate we can work with this device. */ +@@ -818,7 +1256,7 @@ int vc_sm_cma_import_dmabuf(struct dma_b + + if (!ret) { + pr_debug("%s: imported to ptr %p\n", __func__, new_dma_buf); +- res = (struct vc_sm_buffer *)new_dma_buf->priv; ++ buf = (struct vc_sm_buffer *)new_dma_buf->priv; + + /* Assign valid handle at this time.*/ + *handle = new_dma_buf; +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.h +@@ -21,6 +21,8 @@ + #include + #include + ++#include "vc_sm_cma.h" ++ + #define VC_SM_MAX_NAME_LEN 32 + + enum vc_sm_vpu_mapping_state { +@@ -29,31 +31,51 @@ enum vc_sm_vpu_mapping_state { + VPU_UNMAPPING + }; + ++struct vc_sm_imported { ++ struct dma_buf *dma_buf; ++ struct dma_buf_attachment *attach; ++ struct sg_table *sgt; ++}; ++ + struct vc_sm_buffer { + struct list_head global_buffer_list; /* Global list of buffers. */ + ++ /* Index in the kernel_id idr so that we can find the ++ * mmal_msg_context again when servicing the VCHI reply. ++ */ ++ int kernel_id; ++ + size_t size; + + /* Lock over all the following state for this buffer */ + struct mutex lock; +- struct sg_table *sg_table; + struct list_head attachments; + + char name[VC_SM_MAX_NAME_LEN]; + + int in_use:1; /* Kernel is still using this resource */ ++ int imported:1; /* Imported dmabuf */ ++ ++ struct sg_table *sg_table; + + enum vc_sm_vpu_mapping_state vpu_state; + u32 vc_handle; /* VideoCore handle for this buffer */ ++ int vpu_allocated; /* ++ * The VPU made this allocation. Release the ++ * local dma_buf when the VPU releases the ++ * resource. ++ */ + + /* DMABUF related fields */ +- struct dma_buf *import_dma_buf; + struct dma_buf *dma_buf; +- struct dma_buf_attachment *attach; +- struct sg_table *sgt; + dma_addr_t dma_addr; + + struct vc_sm_privdata_t *private; ++ ++ union { ++ struct vc_sm_cma_alloc_data alloc; ++ struct vc_sm_imported import; ++ }; + }; + + #endif +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c +@@ -0,0 +1,99 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * ++ * Based on the Android ION allocator ++ * Copyright (C) Linaro 2012 ++ * Author: for ST-Ericsson. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "vc_sm_cma.h" ++ ++/* CMA heap operations functions */ ++int vc_sm_cma_buffer_allocate(struct cma *cma_heap, ++ struct vc_sm_cma_alloc_data *buffer, ++ unsigned long len) ++{ ++ /* len should already be page aligned */ ++ unsigned long num_pages = len / PAGE_SIZE; ++ struct sg_table *table; ++ struct page *pages; ++ int ret; ++ ++ pages = cma_alloc(cma_heap, num_pages, 0, GFP_KERNEL); ++ if (!pages) ++ return -ENOMEM; ++ ++ table = kmalloc(sizeof(*table), GFP_KERNEL); ++ if (!table) ++ goto err; ++ ++ ret = sg_alloc_table(table, 1, GFP_KERNEL); ++ if (ret) ++ goto free_mem; ++ ++ sg_set_page(table->sgl, pages, len, 0); ++ ++ buffer->priv_virt = pages; ++ buffer->sg_table = table; ++ buffer->cma_heap = cma_heap; ++ buffer->num_pages = num_pages; ++ return 0; ++ ++free_mem: ++ kfree(table); ++err: ++ cma_release(cma_heap, pages, num_pages); ++ return -ENOMEM; ++} ++ ++void vc_sm_cma_buffer_free(struct vc_sm_cma_alloc_data *buffer) ++{ ++ struct cma *cma_heap = buffer->cma_heap; ++ struct page *pages = buffer->priv_virt; ++ ++ /* release memory */ ++ if (cma_heap) ++ cma_release(cma_heap, pages, buffer->num_pages); ++ ++ /* release sg table */ ++ if (buffer->sg_table) { ++ sg_free_table(buffer->sg_table); ++ kfree(buffer->sg_table); ++ buffer->sg_table = NULL; ++ } ++} ++ ++int __vc_sm_cma_add_heaps(struct cma *cma, void *priv) ++{ ++ struct cma **heap = (struct cma **)priv; ++ const char *name = cma_get_name(cma); ++ ++ if (!(*heap)) { ++ phys_addr_t phys_addr = cma_get_base(cma); ++ ++ pr_debug("%s: Adding cma heap %s (start %pap, size %lu) for use by vcsm\n", ++ __func__, name, &phys_addr, cma_get_size(cma)); ++ *heap = cma; ++ } else { ++ pr_err("%s: Ignoring heap %s as already set\n", ++ __func__, name); ++ } ++ ++ return 0; ++} ++ ++int vc_sm_cma_add_heaps(struct cma **cma_heap) ++{ ++ cma_for_each_area(__vc_sm_cma_add_heaps, cma_heap); ++ return 0; ++} +--- /dev/null ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * VideoCore Shared Memory CMA allocator ++ * ++ * Copyright: 2018, Raspberry Pi (Trading) Ltd ++ * ++ * Based on the Android ION allocator ++ * Copyright (C) Linaro 2012 ++ * Author: for ST-Ericsson. ++ * ++ * This software is licensed under the terms of the GNU General Public ++ * License version 2, as published by the Free Software Foundation, and ++ * may be copied, distributed, and modified under those terms. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++#ifndef VC_SM_CMA_H ++#define VC_SM_CMA_H ++ ++struct vc_sm_cma_alloc_data { ++ struct cma *cma_heap; ++ unsigned long num_pages; ++ void *priv_virt; ++ struct sg_table *sg_table; ++}; ++ ++int vc_sm_cma_buffer_allocate(struct cma *cma_heap, ++ struct vc_sm_cma_alloc_data *buffer, ++ unsigned long len); ++void vc_sm_cma_buffer_free(struct vc_sm_cma_alloc_data *buffer); ++ ++int vc_sm_cma_add_heaps(struct cma **cma_heap); ++ ++#endif +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -500,3 +500,13 @@ int vc_sm_cma_vchi_client_version(struct + msg, sizeof(*msg), NULL, 0, + cur_trans_id, 0); + } ++ ++int vc_sm_vchi_client_vc_mem_req_reply(struct sm_instance *handle, ++ struct vc_sm_vc_mem_request_result *msg, ++ uint32_t *cur_trans_id) ++{ ++ return vc_sm_cma_vchi_send_msg(handle, ++ VC_SM_MSG_TYPE_VC_MEM_REQUEST_REPLY, ++ msg, sizeof(*msg), 0, 0, cur_trans_id, ++ 0); ++} +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.h +@@ -56,4 +56,8 @@ int vc_sm_cma_vchi_client_version(struct + struct vc_sm_result_t *result, + u32 *cur_trans_id); + ++int vc_sm_vchi_client_vc_mem_req_reply(struct sm_instance *handle, ++ struct vc_sm_vc_mem_request_result *msg, ++ uint32_t *cur_trans_id); ++ + #endif /* __VC_SM_CMA_VCHI_H__INCLUDED__ */ +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_defs.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_defs.h +@@ -264,6 +264,8 @@ struct vc_sm_vc_mem_request { + u32 align; + /* resource name (for easier tracking) */ + char name[VC_SM_RESOURCE_NAME]; ++ /* VPU handle for the resource */ ++ u32 vc_handle; + }; + + /* Response from the kernel to provide the VPU with some memory */ diff --git a/target/linux/brcm2708/patches-4.19/950-0631-staging-vc-sm-cma-Update-TODO.patch b/target/linux/brcm2708/patches-4.19/950-0631-staging-vc-sm-cma-Update-TODO.patch new file mode 100644 index 000000000..f5937b29c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0631-staging-vc-sm-cma-Update-TODO.patch @@ -0,0 +1,20 @@ +From 2de0580b775aa8ff923d70ca84e8688b28dd2ced Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 11 Mar 2019 16:38:32 +0000 +Subject: [PATCH 631/703] staging: vc-sm-cma: Update TODO. + +The driver is already a platform driver, so that can be +deleted from the TODO. +There are no known issues that need to be resolved. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/TODO | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/TODO ++++ b/drivers/staging/vc04_services/vc-sm-cma/TODO +@@ -1,2 +1 @@ +-1) Convert to a platform driver. +- ++No currently outstanding tasks except some clean-up. diff --git a/target/linux/brcm2708/patches-4.19/950-0632-staging-vc-sm-cma-Add-in-userspace-allocation-API.patch b/target/linux/brcm2708/patches-4.19/950-0632-staging-vc-sm-cma-Add-in-userspace-allocation-API.patch new file mode 100644 index 000000000..8125fe7b2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0632-staging-vc-sm-cma-Add-in-userspace-allocation-API.patch @@ -0,0 +1,675 @@ +From 2cd18cda345cadbc702520602cbf41dee0774cc0 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 11 Mar 2019 16:35:23 +0000 +Subject: [PATCH 632/703] staging: vc-sm-cma: Add in userspace allocation API + +Replacing the functionality from the older vc-sm driver, +add in a userspace API that allows allocation of buffers, +and importing of dma-bufs. +The driver hands out dma-buf fds, therefore much of the +handling around lifespan and odd mmaps from the old driver +goes away. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 371 ++++++++++++++++-- + .../vc04_services/vc-sm-cma/vc_sm_cma.c | 3 +- + .../vc04_services/vc-sm-cma/vc_sm_cma.h | 2 +- + include/linux/broadcom/vc_sm_cma_ioctl.h | 87 ++++ + 4 files changed, 435 insertions(+), 28 deletions(-) + create mode 100644 include/linux/broadcom/vc_sm_cma_ioctl.h + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -36,6 +36,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -52,6 +53,7 @@ + #include "vc_sm.h" + #include "vc_sm_cma.h" + #include "vc_sm_knl.h" ++#include + + /* ---- Private Constants and Types --------------------------------------- */ + +@@ -83,6 +85,8 @@ struct sm_pde_t { + struct sm_state_t { + struct platform_device *pdev; + ++ struct miscdevice misc_dev; ++ + struct sm_instance *sm_handle; /* Handle for videocore service. */ + struct cma *cma_heap; + +@@ -346,7 +350,6 @@ static void vc_sm_release_resource(struc + + defer: + mutex_unlock(&buffer->lock); +- return; + } + + /* Create support for private data tracking. */ +@@ -381,7 +384,7 @@ static struct sg_table *dup_sg_table(str + ret = sg_alloc_table(new_table, table->nents, GFP_KERNEL); + if (ret) { + kfree(new_table); +- return ERR_PTR(-ENOMEM); ++ return ERR_PTR(ret); + } + + new_sg = new_table->sgl; +@@ -417,7 +420,7 @@ static int vc_sm_dma_buf_attach(struct d + table = dup_sg_table(buf->sg_table); + if (IS_ERR(table)) { + kfree(a); +- return -ENOMEM; ++ return PTR_ERR(table); + } + + a->table = table; +@@ -433,8 +436,8 @@ static int vc_sm_dma_buf_attach(struct d + return 0; + } + +-static void vc_sm_dma_buf_detatch(struct dma_buf *dmabuf, +- struct dma_buf_attachment *attachment) ++static void vc_sm_dma_buf_detach(struct dma_buf *dmabuf, ++ struct dma_buf_attachment *attachment) + { + struct vc_sm_dma_buf_attachment *a = attachment->priv; + struct vc_sm_buffer *buf = dmabuf->priv; +@@ -544,6 +547,9 @@ static void vc_sm_dma_buf_release(struct + vc_sm_clean_up_dmabuf(buffer); + pr_debug("%s clean_up dmabuf done\n", __func__); + ++ /* buffer->lock will be destroyed by vc_sm_release_resource if finished ++ * with, otherwise unlocked. Do NOT unlock here. ++ */ + vc_sm_release_resource(buffer); + pr_debug("%s done\n", __func__); + } +@@ -613,7 +619,7 @@ static const struct dma_buf_ops dma_buf_ + .mmap = vc_sm_dmabuf_mmap, + .release = vc_sm_dma_buf_release, + .attach = vc_sm_dma_buf_attach, +- .detach = vc_sm_dma_buf_detatch, ++ .detach = vc_sm_dma_buf_detach, + .begin_cpu_access = vc_sm_dma_buf_begin_cpu_access, + .end_cpu_access = vc_sm_dma_buf_end_cpu_access, + .map = vc_sm_dma_buf_kmap, +@@ -762,6 +768,7 @@ static const struct dma_buf_ops dma_buf_ + int + vc_sm_cma_import_dmabuf_internal(struct vc_sm_privdata_t *private, + struct dma_buf *dma_buf, ++ int fd, + struct dma_buf **imported_buf) + { + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); +@@ -775,10 +782,15 @@ vc_sm_cma_import_dmabuf_internal(struct + int status; + + /* Setup our allocation parameters */ +- pr_debug("%s: importing dma_buf %p\n", __func__, dma_buf); ++ pr_debug("%s: importing dma_buf %p/fd %d\n", __func__, dma_buf, fd); + +- get_dma_buf(dma_buf); +- dma_buf = dma_buf; ++ if (fd < 0) ++ get_dma_buf(dma_buf); ++ else ++ dma_buf = dma_buf_get(fd); ++ ++ if (!dma_buf) ++ return -EINVAL; + + attach = dma_buf_attach(dma_buf, &sm_state->pdev->dev); + if (IS_ERR(attach)) { +@@ -921,6 +933,10 @@ static int vc_sm_cma_vpu_alloc(u32 size, + return -ENOMEM; + + mutex_init(&buffer->lock); ++ /* Acquire the mutex as vc_sm_release_resource will release it in the ++ * error path. ++ */ ++ mutex_lock(&buffer->lock); + + if (vc_sm_cma_buffer_allocate(sm_state->cma_heap, &buffer->alloc, + aligned_size)) { +@@ -976,6 +992,8 @@ static int vc_sm_cma_vpu_alloc(u32 size, + + vc_sm_add_resource(sm_state->vpu_allocs, buffer); + ++ mutex_unlock(&buffer->lock); ++ + *ret_buffer = buffer; + return 0; + error: +@@ -1065,6 +1083,297 @@ vc_sm_vpu_event(struct sm_instance *inst + } + } + ++/* Userspace handling */ ++/* ++ * Open the device. Creates a private state to help track all allocation ++ * associated with this device. ++ */ ++static int vc_sm_cma_open(struct inode *inode, struct file *file) ++{ ++ /* Make sure the device was started properly. */ ++ if (!sm_state) { ++ pr_err("[%s]: invalid device\n", __func__); ++ return -EPERM; ++ } ++ ++ file->private_data = vc_sm_cma_create_priv_data(current->tgid); ++ if (!file->private_data) { ++ pr_err("[%s]: failed to create data tracker\n", __func__); ++ ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++/* ++ * Close the vcsm-cma device. ++ * All allocations are file descriptors to the dmabuf objects, so we will get ++ * the clean up request on those as those are cleaned up. ++ */ ++static int vc_sm_cma_release(struct inode *inode, struct file *file) ++{ ++ struct vc_sm_privdata_t *file_data = ++ (struct vc_sm_privdata_t *)file->private_data; ++ int ret = 0; ++ ++ /* Make sure the device was started properly. */ ++ if (!sm_state || !file_data) { ++ pr_err("[%s]: invalid device\n", __func__); ++ ret = -EPERM; ++ goto out; ++ } ++ ++ pr_debug("[%s]: using private data %p\n", __func__, file_data); ++ ++ /* Terminate the private data. */ ++ kfree(file_data); ++ ++out: ++ return ret; ++} ++ ++/* ++ * Allocate a shared memory handle and block. ++ * Allocation is from CMA, and then imported into the VPU mappings. ++ */ ++int vc_sm_cma_ioctl_alloc(struct vc_sm_privdata_t *private, ++ struct vc_sm_cma_ioctl_alloc *ioparam) ++{ ++ DEFINE_DMA_BUF_EXPORT_INFO(exp_info); ++ struct vc_sm_buffer *buffer = NULL; ++ struct vc_sm_import import = { 0 }; ++ struct vc_sm_import_result result = { 0 }; ++ struct dma_buf *dmabuf = NULL; ++ int aligned_size; ++ int ret = 0; ++ int status; ++ int fd = -1; ++ ++ aligned_size = PAGE_ALIGN(ioparam->size); ++ ++ if (!aligned_size) ++ return -EINVAL; ++ ++ /* Allocate local buffer to track this allocation. */ ++ buffer = kzalloc(sizeof(*buffer), GFP_KERNEL); ++ if (!buffer) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ if (vc_sm_cma_buffer_allocate(sm_state->cma_heap, &buffer->alloc, ++ aligned_size)) { ++ pr_err("[%s]: cma alloc of %d bytes failed\n", ++ __func__, aligned_size); ++ kfree(buffer); ++ return -ENOMEM; ++ } ++ buffer->sg_table = buffer->alloc.sg_table; ++ ++ if (dma_map_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, ++ buffer->sg_table->nents, DMA_BIDIRECTIONAL) <= 0) { ++ pr_err("[%s]: dma_map_sg failed\n", __func__); ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ import.type = VC_SM_ALLOC_NON_CACHED; ++ import.allocator = current->tgid; ++ ++ if (*ioparam->name) ++ memcpy(import.name, ioparam->name, sizeof(import.name) - 1); ++ else ++ memcpy(import.name, VC_SM_RESOURCE_NAME_DEFAULT, ++ sizeof(VC_SM_RESOURCE_NAME_DEFAULT)); ++ ++ mutex_init(&buffer->lock); ++ INIT_LIST_HEAD(&buffer->attachments); ++ memcpy(buffer->name, import.name, ++ min(sizeof(buffer->name), sizeof(import.name) - 1)); ++ ++ exp_info.ops = &dma_buf_ops; ++ exp_info.size = aligned_size; ++ exp_info.flags = O_RDWR; ++ exp_info.priv = buffer; ++ ++ dmabuf = dma_buf_export(&exp_info); ++ if (IS_ERR(dmabuf)) { ++ ret = PTR_ERR(dmabuf); ++ goto error; ++ } ++ buffer->dma_buf = dmabuf; ++ ++ import.addr = (uint32_t)sg_dma_address(buffer->sg_table->sgl); ++ import.size = aligned_size; ++ import.kernel_id = (uint32_t)buffer; ++ ++ /* Wrap it into a videocore buffer. */ ++ status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, ++ &sm_state->int_trans_id); ++ if (status == -EINTR) { ++ pr_debug("[%s]: requesting import memory action restart (trans_id: %u)\n", ++ __func__, sm_state->int_trans_id); ++ ret = -ERESTARTSYS; ++ private->restart_sys = -EINTR; ++ private->int_action = VC_SM_MSG_TYPE_IMPORT; ++ goto error; ++ } else if (status || !result.res_handle) { ++ pr_err("[%s]: failed to import memory on videocore (status: %u, trans_id: %u)\n", ++ __func__, status, sm_state->int_trans_id); ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ /* Keep track of the buffer we created. */ ++ buffer->private = private; ++ buffer->vc_handle = result.res_handle; ++ buffer->size = import.size; ++ buffer->dma_addr = import.addr; ++ buffer->vpu_state = VPU_MAPPED; ++ //buffer->res_cached = ioparam->cached; ++ ++ fd = dma_buf_fd(dmabuf, O_CLOEXEC); ++ if (fd < 0) ++ goto error; ++ ++ vc_sm_add_resource(private, buffer); ++ ++ pr_debug("[%s]: Added resource as fd %d, buffer %p, private %p, dma_addr %pad\n", ++ __func__, fd, buffer, private, &buffer->dma_addr); ++ ++ /* We're done */ ++ ioparam->handle = fd; ++ ioparam->vc_handle = buffer->vc_handle; ++ ioparam->dma_addr = buffer->dma_addr; ++ return 0; ++ ++error: ++ if (buffer) { ++ pr_err("[%s]: something failed - cleanup. ret %d\n", __func__, ++ ret); ++ ++ dma_buf_put(dmabuf); ++ } ++ return ret; ++} ++ ++static long vc_sm_cma_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int ret = 0; ++ unsigned int cmdnr = _IOC_NR(cmd); ++ struct vc_sm_privdata_t *file_data = ++ (struct vc_sm_privdata_t *)file->private_data; ++ ++ /* Validate we can work with this device. */ ++ if (!sm_state || !file_data) { ++ pr_err("[%s]: invalid device\n", __func__); ++ return -EPERM; ++ } ++ ++ pr_debug("[%s]: cmd %x tgid %u, owner %u\n", __func__, cmdnr, ++ current->tgid, file_data->pid); ++ ++ /* Action is a re-post of a previously interrupted action? */ ++ if (file_data->restart_sys == -EINTR) { ++ struct vc_sm_action_clean_t action_clean; ++ ++ pr_debug("[%s]: clean up of action %u (trans_id: %u) following EINTR\n", ++ __func__, file_data->int_action, ++ file_data->int_trans_id); ++ ++ action_clean.res_action = file_data->int_action; ++ action_clean.action_trans_id = file_data->int_trans_id; ++ ++ file_data->restart_sys = 0; ++ } ++ ++ /* Now process the command. */ ++ switch (cmdnr) { ++ /* New memory allocation. ++ */ ++ case VC_SM_CMA_CMD_ALLOC: ++ { ++ struct vc_sm_cma_ioctl_alloc ioparam; ++ ++ /* Get the parameter data. */ ++ if (copy_from_user ++ (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { ++ pr_err("[%s]: failed to copy-from-user for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ break; ++ } ++ ++ ret = vc_sm_cma_ioctl_alloc(file_data, &ioparam); ++ if (!ret && ++ (copy_to_user((void *)arg, &ioparam, ++ sizeof(ioparam)) != 0)) { ++ /* FIXME: Release allocation */ ++ pr_err("[%s]: failed to copy-to-user for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ } ++ break; ++ } ++ ++ case VC_SM_CMA_CMD_IMPORT_DMABUF: ++ { ++ struct vc_sm_cma_ioctl_import_dmabuf ioparam; ++ struct dma_buf *new_dmabuf; ++ ++ /* Get the parameter data. */ ++ if (copy_from_user ++ (&ioparam, (void *)arg, sizeof(ioparam)) != 0) { ++ pr_err("[%s]: failed to copy-from-user for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ break; ++ } ++ ++ ret = vc_sm_cma_import_dmabuf_internal(file_data, ++ NULL, ++ ioparam.dmabuf_fd, ++ &new_dmabuf); ++ ++ if (!ret) { ++ struct vc_sm_buffer *buf = new_dmabuf->priv; ++ ++ ioparam.size = buf->size; ++ ioparam.handle = dma_buf_fd(new_dmabuf, ++ O_CLOEXEC); ++ ioparam.vc_handle = buf->vc_handle; ++ ioparam.dma_addr = buf->dma_addr; ++ ++ if (ioparam.handle < 0 || ++ (copy_to_user((void *)arg, &ioparam, ++ sizeof(ioparam)) != 0)) { ++ dma_buf_put(new_dmabuf); ++ /* FIXME: Release allocation */ ++ ret = -EFAULT; ++ } ++ } ++ break; ++ } ++ ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* Device operations that we managed in this driver. */ ++static const struct file_operations vc_sm_ops = { ++ .owner = THIS_MODULE, ++ .unlocked_ioctl = vc_sm_cma_ioctl, ++ .open = vc_sm_cma_open, ++ .release = vc_sm_cma_release, ++}; ++ ++/* Driver load/unload functions */ + /* Videocore connected. */ + static void vc_sm_connected_init(void) + { +@@ -1075,12 +1384,11 @@ static void vc_sm_connected_init(void) + + pr_info("[%s]: start\n", __func__); + +- if (vc_sm_cma_add_heaps(&sm_state->cma_heap) || +- !sm_state->cma_heap) { +- pr_err("[%s]: failed to initialise CMA heaps\n", ++ vc_sm_cma_add_heaps(&sm_state->cma_heap); ++ if (!sm_state->cma_heap) { ++ pr_err("[%s]: failed to initialise CMA heap\n", + __func__); +- ret = -EIO; +- goto err_free_mem; ++ return; + } + + /* +@@ -1092,8 +1400,7 @@ static void vc_sm_connected_init(void) + pr_err("[%s]: failed to initialise VCHI instance (ret=%d)\n", + __func__, ret); + +- ret = -EIO; +- goto err_failed; ++ return; + } + + ret = vchi_connect(NULL, 0, vchi_instance); +@@ -1101,8 +1408,7 @@ static void vc_sm_connected_init(void) + pr_err("[%s]: failed to connect VCHI instance (ret=%d)\n", + __func__, ret); + +- ret = -EIO; +- goto err_failed; ++ return; + } + + /* Initialize an instance of the shared memory service. */ +@@ -1112,8 +1418,7 @@ static void vc_sm_connected_init(void) + pr_err("[%s]: failed to initialize shared memory service\n", + __func__); + +- ret = -EPERM; +- goto err_failed; ++ return; + } + + /* Create a debug fs directory entry (root). */ +@@ -1127,11 +1432,22 @@ static void vc_sm_connected_init(void) + + INIT_LIST_HEAD(&sm_state->buffer_list); + ++ /* Create a shared memory device. */ ++ sm_state->misc_dev.minor = MISC_DYNAMIC_MINOR; ++ sm_state->misc_dev.name = DEVICE_NAME; ++ sm_state->misc_dev.fops = &vc_sm_ops; ++ sm_state->misc_dev.parent = NULL; ++ ret = misc_register(&sm_state->misc_dev); ++ if (ret) { ++ pr_err("vcsm-cma: failed to register misc device.\n"); ++ goto err_remove_debugfs; ++ } ++ + sm_state->data_knl = vc_sm_cma_create_priv_data(0); + if (!sm_state->data_knl) { + pr_err("[%s]: failed to create kernel private data tracker\n", + __func__); +- goto err_remove_shared_memory; ++ goto err_remove_misc_dev; + } + + version.version = 2; +@@ -1148,11 +1464,13 @@ static void vc_sm_connected_init(void) + pr_info("[%s]: installed successfully\n", __func__); + return; + +-err_remove_shared_memory: ++err_remove_misc_dev: ++ misc_deregister(&sm_state->misc_dev); ++err_remove_debugfs: + debugfs_remove_recursive(sm_state->dir_root); + vc_sm_cma_vchi_stop(&sm_state->sm_handle); +-err_failed: +- pr_info("[%s]: failed, ret %d\n", __func__, ret); ++ ++ return; + } + + /* Driver loading. */ +@@ -1184,6 +1502,8 @@ static int bcm2835_vc_sm_cma_remove(stru + { + pr_debug("[%s]: start\n", __func__); + if (sm_inited) { ++ misc_deregister(&sm_state->misc_dev); ++ + /* Remove all proc entries. */ + debugfs_remove_recursive(sm_state->dir_root); + +@@ -1202,6 +1522,7 @@ static int bcm2835_vc_sm_cma_remove(stru + return 0; + } + ++/* Kernel API calls */ + /* Get an internal resource handle mapped from the external one. */ + int vc_sm_cma_int_handle(void *handle) + { +@@ -1252,7 +1573,7 @@ int vc_sm_cma_import_dmabuf(struct dma_b + } + + ret = vc_sm_cma_import_dmabuf_internal(sm_state->data_knl, src_dmabuf, +- &new_dma_buf); ++ -1, &new_dma_buf); + + if (!ret) { + pr_debug("%s: imported to ptr %p\n", __func__, new_dma_buf); +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c +@@ -92,8 +92,7 @@ int __vc_sm_cma_add_heaps(struct cma *cm + return 0; + } + +-int vc_sm_cma_add_heaps(struct cma **cma_heap) ++void vc_sm_cma_add_heaps(struct cma **cma_heap) + { + cma_for_each_area(__vc_sm_cma_add_heaps, cma_heap); +- return 0; + } +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h +@@ -34,6 +34,6 @@ int vc_sm_cma_buffer_allocate(struct cma + unsigned long len); + void vc_sm_cma_buffer_free(struct vc_sm_cma_alloc_data *buffer); + +-int vc_sm_cma_add_heaps(struct cma **cma_heap); ++void vc_sm_cma_add_heaps(struct cma **cma_heap); + + #endif +--- /dev/null ++++ b/include/linux/broadcom/vc_sm_cma_ioctl.h +@@ -0,0 +1,87 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++ ++/* ++ * Copyright 2019 Raspberry Pi (Trading) Ltd. All rights reserved. ++ * ++ * Based on vmcs_sm_ioctl.h Copyright Broadcom Corporation. ++ */ ++ ++#ifndef __VC_SM_CMA_IOCTL_H ++#define __VC_SM_CMA_IOCTL_H ++ ++/* ---- Include Files ---------------------------------------------------- */ ++ ++#if defined(__KERNEL__) ++#include /* Needed for standard types */ ++#else ++#include ++#endif ++ ++#include ++ ++/* ---- Constants and Types ---------------------------------------------- */ ++ ++#define VC_SM_CMA_RESOURCE_NAME 32 ++#define VC_SM_CMA_RESOURCE_NAME_DEFAULT "sm-host-resource" ++ ++/* Type define used to create unique IOCTL number */ ++#define VC_SM_CMA_MAGIC_TYPE 'J' ++ ++/* IOCTL commands on /dev/vc-sm-cma */ ++enum vc_sm_cma_cmd_e { ++ VC_SM_CMA_CMD_ALLOC = 0x5A, /* Start at 0x5A arbitrarily */ ++ ++ VC_SM_CMA_CMD_IMPORT_DMABUF, ++ ++ VC_SM_CMA_CMD_LAST /* Do not delete */ ++}; ++ ++/* Cache type supported, conveniently matches the user space definition in ++ * user-vcsm.h. ++ */ ++enum vc_sm_cma_cache_e { ++ VC_SM_CMA_CACHE_NONE, ++ VC_SM_CMA_CACHE_HOST, ++ VC_SM_CMA_CACHE_VC, ++ VC_SM_CMA_CACHE_BOTH, ++}; ++ ++/* IOCTL Data structures */ ++struct vc_sm_cma_ioctl_alloc { ++ /* user -> kernel */ ++ __u32 size; ++ __u32 num; ++ __u32 cached; /* enum vc_sm_cma_cache_e */ ++ __u32 pad; ++ __u8 name[VC_SM_CMA_RESOURCE_NAME]; ++ ++ /* kernel -> user */ ++ __s32 handle; ++ __u32 vc_handle; ++ __u64 dma_addr; ++}; ++ ++struct vc_sm_cma_ioctl_import_dmabuf { ++ /* user -> kernel */ ++ __s32 dmabuf_fd; ++ __u32 cached; /* enum vc_sm_cma_cache_e */ ++ __u8 name[VC_SM_CMA_RESOURCE_NAME]; ++ ++ /* kernel -> user */ ++ __s32 handle; ++ __u32 vc_handle; ++ __u32 size; ++ __u32 pad; ++ __u64 dma_addr; ++}; ++ ++/* IOCTL numbers */ ++#define VC_SM_CMA_IOCTL_MEM_ALLOC\ ++ _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_ALLOC,\ ++ struct vc_sm_cma_ioctl_alloc) ++ ++#define VC_SM_CMA_IOCTL_MEM_IMPORT_DMABUF\ ++ _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_IMPORT_DMABUF,\ ++ struct vc_sm_cma_ioctl_import_dmabuf) ++ ++#endif /* __VC_SM_CMA_IOCTL_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0633-staging-vcsm-cma-Add-cache-control-ioctls.patch b/target/linux/brcm2708/patches-4.19/950-0633-staging-vcsm-cma-Add-cache-control-ioctls.patch new file mode 100644 index 000000000..b79563513 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0633-staging-vcsm-cma-Add-cache-control-ioctls.patch @@ -0,0 +1,245 @@ +From 8859e85097f9e1bbc86b8818e24abc3c36c45b15 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 20 Mar 2019 10:40:00 +0000 +Subject: [PATCH 633/703] staging: vcsm-cma: Add cache control ioctls + +The old driver allowed for direct cache manipulation and that +was used by various clients. Replicate here. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 141 +++++++++++++++++- + include/linux/broadcom/vc_sm_cma_ioctl.h | 27 ++++ + 2 files changed, 165 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -46,6 +46,7 @@ + #include + #include + #include ++#include + + #include "vchiq_connected.h" + #include "vc_sm_cma_vchi.h" +@@ -1258,6 +1259,99 @@ error: + return ret; + } + ++/* Converts VCSM_CACHE_OP_* to an operating function. */ ++static void (*cache_op_to_func(const unsigned int cache_op)) ++ (const void*, const void*) ++{ ++ switch (cache_op) { ++ case VC_SM_CACHE_OP_NOP: ++ return NULL; ++ ++ case VC_SM_CACHE_OP_INV: ++ return dmac_inv_range; ++ ++ case VC_SM_CACHE_OP_CLEAN: ++ return dmac_clean_range; ++ ++ case VC_SM_CACHE_OP_FLUSH: ++ return dmac_flush_range; ++ ++ default: ++ pr_err("[%s]: Invalid cache_op: 0x%08x\n", __func__, cache_op); ++ return NULL; ++ } ++} ++ ++/* ++ * Clean/invalid/flush cache of which buffer is already pinned (i.e. accessed). ++ */ ++static int clean_invalid_contig_2d(const void __user *addr, ++ const size_t block_count, ++ const size_t block_size, ++ const size_t stride, ++ const unsigned int cache_op) ++{ ++ size_t i; ++ void (*op_fn)(const void *start, const void *end); ++ ++ if (!block_size) { ++ pr_err("[%s]: size cannot be 0\n", __func__); ++ return -EINVAL; ++ } ++ ++ op_fn = cache_op_to_func(cache_op); ++ if (!op_fn) ++ return -EINVAL; ++ ++ for (i = 0; i < block_count; i ++, addr += stride) ++ op_fn(addr, addr + block_size); ++ ++ return 0; ++} ++ ++static int vc_sm_cma_clean_invalid2(unsigned int cmdnr, unsigned long arg) ++{ ++ struct vc_sm_cma_ioctl_clean_invalid2 ioparam; ++ struct vc_sm_cma_ioctl_clean_invalid_block *block = NULL; ++ int i, ret = 0; ++ ++ /* Get parameter data. */ ++ if (copy_from_user(&ioparam, (void *)arg, sizeof(ioparam))) { ++ pr_err("[%s]: failed to copy-from-user header for cmd %x\n", ++ __func__, cmdnr); ++ return -EFAULT; ++ } ++ block = kmalloc(ioparam.op_count * sizeof(*block), GFP_KERNEL); ++ if (!block) ++ return -EFAULT; ++ ++ if (copy_from_user(block, (void *)(arg + sizeof(ioparam)), ++ ioparam.op_count * sizeof(*block)) != 0) { ++ pr_err("[%s]: failed to copy-from-user payload for cmd %x\n", ++ __func__, cmdnr); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ for (i = 0; i < ioparam.op_count; i++) { ++ const struct vc_sm_cma_ioctl_clean_invalid_block * const op = block + i; ++ ++ if (op->invalidate_mode == VC_SM_CACHE_OP_NOP) ++ continue; ++ ++ ret = clean_invalid_contig_2d((void __user *)op->start_address, ++ op->block_count, op->block_size, ++ op->inter_block_stride, ++ op->invalidate_mode); ++ if (ret) ++ break; ++ } ++out: ++ kfree(block); ++ ++ return ret; ++} ++ + static long vc_sm_cma_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) + { +@@ -1272,9 +1366,6 @@ static long vc_sm_cma_ioctl(struct file + return -EPERM; + } + +- pr_debug("[%s]: cmd %x tgid %u, owner %u\n", __func__, cmdnr, +- current->tgid, file_data->pid); +- + /* Action is a re-post of a previously interrupted action? */ + if (file_data->restart_sys == -EINTR) { + struct vc_sm_action_clean_t action_clean; +@@ -1357,7 +1448,18 @@ static long vc_sm_cma_ioctl(struct file + break; + } + ++ /* ++ * Flush/Invalidate the cache for a given mapping. ++ * Blocks must be pinned (i.e. accessed) before this call. ++ */ ++ case VC_SM_CMA_CMD_CLEAN_INVALID2: ++ ret = vc_sm_cma_clean_invalid2(cmdnr, arg); ++ break; ++ + default: ++ pr_debug("[%s]: cmd %x tgid %u, owner %u\n", __func__, cmdnr, ++ current->tgid, file_data->pid); ++ + ret = -EINVAL; + break; + } +@@ -1365,10 +1467,43 @@ static long vc_sm_cma_ioctl(struct file + return ret; + } + ++#ifdef CONFIG_COMPAT ++struct vc_sm_cma_ioctl_clean_invalid2_32 { ++ u32 op_count; ++ struct vc_sm_cma_ioctl_clean_invalid_block { ++ u16 invalidate_mode; ++ u16 block_count; ++ compat_uptr_t start_address; ++ u32 block_size; ++ u32 inter_block_stride; ++ } s[0]; ++}; ++ ++#define VC_SM_CMA_CMD_CLEAN_INVALID2_32\ ++ _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_CLEAN_INVALID2,\ ++ struct vc_sm_cma_ioctl_clean_invalid2) ++ ++static long vc_sm_cma_compat_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ switch (cmd) { ++ case VC_SM_CMA_CMD_CLEAN_INVALID2_32: ++ /* FIXME */ ++ break; ++ ++ default: ++ return vc_sm_cma_compat_ioctl(file, cmd, arg); ++ } ++} ++#endif ++ + /* Device operations that we managed in this driver. */ + static const struct file_operations vc_sm_ops = { + .owner = THIS_MODULE, + .unlocked_ioctl = vc_sm_cma_ioctl, ++#ifdef CONFIG_COMPAT ++ .compat_ioctl = vc_sm_cma_compat_ioctl, ++#endif + .open = vc_sm_cma_open, + .release = vc_sm_cma_release, + }; +--- a/include/linux/broadcom/vc_sm_cma_ioctl.h ++++ b/include/linux/broadcom/vc_sm_cma_ioctl.h +@@ -33,6 +33,8 @@ enum vc_sm_cma_cmd_e { + + VC_SM_CMA_CMD_IMPORT_DMABUF, + ++ VC_SM_CMA_CMD_CLEAN_INVALID2, ++ + VC_SM_CMA_CMD_LAST /* Do not delete */ + }; + +@@ -75,6 +77,27 @@ struct vc_sm_cma_ioctl_import_dmabuf { + __u64 dma_addr; + }; + ++/* ++ * Cache functions to be set to struct vc_sm_cma_ioctl_clean_invalid2 ++ * invalidate_mode. ++ */ ++#define VC_SM_CACHE_OP_NOP 0x00 ++#define VC_SM_CACHE_OP_INV 0x01 ++#define VC_SM_CACHE_OP_CLEAN 0x02 ++#define VC_SM_CACHE_OP_FLUSH 0x03 ++ ++struct vc_sm_cma_ioctl_clean_invalid2 { ++ __u32 op_count; ++ __u32 pad; ++ struct vc_sm_cma_ioctl_clean_invalid_block { ++ __u32 invalidate_mode; ++ __u32 block_count; ++ void * __user start_address; ++ __u32 block_size; ++ __u32 inter_block_stride; ++ } s[0]; ++}; ++ + /* IOCTL numbers */ + #define VC_SM_CMA_IOCTL_MEM_ALLOC\ + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_ALLOC,\ +@@ -84,4 +107,8 @@ struct vc_sm_cma_ioctl_import_dmabuf { + _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_IMPORT_DMABUF,\ + struct vc_sm_cma_ioctl_import_dmabuf) + ++#define VC_SM_CMA_IOCTL_MEM_CLEAN_INVALID2\ ++ _IOR(VC_SM_CMA_MAGIC_TYPE, VC_SM_CMA_CMD_CLEAN_INVALID2,\ ++ struct vc_sm_cma_ioctl_clean_invalid2) ++ + #endif /* __VC_SM_CMA_IOCTL_H */ diff --git a/target/linux/brcm2708/patches-4.19/950-0634-staging-vcsm-cma-Alter-dev-node-permissions-to-0666.patch b/target/linux/brcm2708/patches-4.19/950-0634-staging-vcsm-cma-Alter-dev-node-permissions-to-0666.patch new file mode 100644 index 000000000..ee794465b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0634-staging-vcsm-cma-Alter-dev-node-permissions-to-0666.patch @@ -0,0 +1,24 @@ +From efb4b8384a21a1542bc4c26063752180dda79c0b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 13 May 2019 16:47:54 +0100 +Subject: [PATCH 634/703] staging: vcsm-cma: Alter dev node permissions to 0666 + +Until the udev rules are updated, open up access to this node by +default. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -1572,6 +1572,8 @@ static void vc_sm_connected_init(void) + sm_state->misc_dev.name = DEVICE_NAME; + sm_state->misc_dev.fops = &vc_sm_ops; + sm_state->misc_dev.parent = NULL; ++ /* Temporarily set as 666 until udev rules have been sorted */ ++ sm_state->misc_dev.mode = 0666; + ret = misc_register(&sm_state->misc_dev); + if (ret) { + pr_err("vcsm-cma: failed to register misc device.\n"); diff --git a/target/linux/brcm2708/patches-4.19/950-0635-staging-vcsm-cma-Drop-logging-level-on-messages-in-v.patch b/target/linux/brcm2708/patches-4.19/950-0635-staging-vcsm-cma-Drop-logging-level-on-messages-in-v.patch new file mode 100644 index 000000000..113289b3a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0635-staging-vcsm-cma-Drop-logging-level-on-messages-in-v.patch @@ -0,0 +1,33 @@ +From 800cd6716ba60faf5f1782935c12b12943237de4 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 16 May 2019 15:17:19 +0100 +Subject: [PATCH 635/703] staging: vcsm-cma: Drop logging level on messages in + vc_sm_release_resource + +They weren't errors but were logged as such. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 7 +++---- + 1 file changed, 3 insertions(+), 4 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -301,14 +301,13 @@ static void vc_sm_release_resource(struc + + if (buffer->vc_handle) { + /* We've sent the unmap request but not had the response. */ +- pr_err("[%s]: Waiting for VPU unmap response on %p\n", +- __func__, buffer); ++ pr_debug("[%s]: Waiting for VPU unmap response on %p\n", ++ __func__, buffer); + goto defer; + } + if (buffer->in_use) { + /* dmabuf still in use - we await the release */ +- pr_err("[%s]: buffer %p is still in use\n", +- __func__, buffer); ++ pr_debug("[%s]: buffer %p is still in use\n", __func__, buffer); + goto defer; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0636-staging-vcsm-cma-Fixup-the-alloc-code-handling-of-ke.patch b/target/linux/brcm2708/patches-4.19/950-0636-staging-vcsm-cma-Fixup-the-alloc-code-handling-of-ke.patch new file mode 100644 index 000000000..ba334b5af --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0636-staging-vcsm-cma-Fixup-the-alloc-code-handling-of-ke.patch @@ -0,0 +1,35 @@ +From bc7d2e33c324c77c13ecc7699342a72f52cf0789 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 22 May 2019 15:40:37 +0100 +Subject: [PATCH 636/703] staging: vcsm-cma: Fixup the alloc code handling of + kernel_id + +The allocation code had been copied in from an old branch prior +to having added the IDR for 64bit support. It was therefore pushing +a pointer into the kernel_id field instead of an IDR handle, the +lookup therefore failed, and we never released the buffer. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -1206,7 +1206,7 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + + import.addr = (uint32_t)sg_dma_address(buffer->sg_table->sgl); + import.size = aligned_size; +- import.kernel_id = (uint32_t)buffer; ++ import.kernel_id = get_kernel_id(buffer); + + /* Wrap it into a videocore buffer. */ + status = vc_sm_cma_vchi_import(sm_state->sm_handle, &import, &result, +@@ -1231,6 +1231,7 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + buffer->size = import.size; + buffer->dma_addr = import.addr; + buffer->vpu_state = VPU_MAPPED; ++ buffer->kernel_id = import.kernel_id; + //buffer->res_cached = ioparam->cached; + + fd = dma_buf_fd(dmabuf, O_CLOEXEC); diff --git a/target/linux/brcm2708/patches-4.19/950-0637-Pulled-in-the-multi-frame-buffer-support-from-the-Pi.patch b/target/linux/brcm2708/patches-4.19/950-0637-Pulled-in-the-multi-frame-buffer-support-from-the-Pi.patch new file mode 100644 index 000000000..3dfcca408 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0637-Pulled-in-the-multi-frame-buffer-support-from-the-Pi.patch @@ -0,0 +1,925 @@ +From 03f6bc683489b9652491d981b83448863230068c Mon Sep 17 00:00:00 2001 +From: James Hughes +Date: Thu, 14 Mar 2019 13:27:54 +0000 +Subject: [PATCH 637/703] Pulled in the multi frame buffer support from the Pi3 + repo + +--- + drivers/video/fbdev/bcm2708_fb.c | 580 +++++++++++++++------ + include/soc/bcm2835/raspberrypi-firmware.h | 4 + + 2 files changed, 432 insertions(+), 152 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -2,6 +2,7 @@ + * linux/drivers/video/bcm2708_fb.c + * + * Copyright (C) 2010 Broadcom ++ * Copyright (C) 2018 Raspberry Pi (Trading) Ltd + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive +@@ -13,6 +14,7 @@ + * Copyright 1999-2001 Jeff Garzik + * + */ ++ + #include + #include + #include +@@ -36,6 +38,7 @@ + #include + #include + #include ++#include + + //#define BCM2708_FB_DEBUG + #define MODULE_NAME "bcm2708_fb" +@@ -82,62 +85,139 @@ struct bcm2708_fb_stats { + u32 dma_irqs; + }; + ++struct vc4_display_settings_t { ++ u32 display_num; ++ u32 width; ++ u32 height; ++ u32 pitch; ++ u32 depth; ++ u32 virtual_width; ++ u32 virtual_height; ++ u32 virtual_width_offset; ++ u32 virtual_height_offset; ++ unsigned long fb_bus_address; ++}; ++ ++struct bcm2708_fb_dev; ++ + struct bcm2708_fb { + struct fb_info fb; + struct platform_device *dev; +- struct rpi_firmware *fw; + u32 cmap[16]; + u32 gpu_cmap[256]; ++ struct dentry *debugfs_dir; ++ struct dentry *debugfs_subdir; ++ unsigned long fb_bus_address; ++ struct { u32 base, length; } gpu; ++ struct vc4_display_settings_t display_settings; ++ struct debugfs_regset32 screeninfo_regset; ++ struct bcm2708_fb_dev *fbdev; ++ unsigned int image_size; ++ dma_addr_t dma_addr; ++ void *cpuaddr; ++}; ++ ++#define MAX_FRAMEBUFFERS 3 ++ ++struct bcm2708_fb_dev { ++ int firmware_supports_multifb; ++ /* Protects the DMA system from multiple FB access */ ++ struct mutex dma_mutex; + int dma_chan; + int dma_irq; + void __iomem *dma_chan_base; +- void *cb_base; /* DMA control blocks */ +- dma_addr_t cb_handle; +- struct dentry *debugfs_dir; + wait_queue_head_t dma_waitq; +- struct bcm2708_fb_stats stats; +- unsigned long fb_bus_address; +- struct { u32 base, length; } gpu; ++ bool disable_arm_alloc; ++ struct bcm2708_fb_stats dma_stats; ++ void *cb_base; /* DMA control blocks */ ++ dma_addr_t cb_handle; ++ int instance_count; ++ int num_displays; ++ struct rpi_firmware *fw; ++ struct bcm2708_fb displays[MAX_FRAMEBUFFERS]; + }; + + #define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) + + static void bcm2708_fb_debugfs_deinit(struct bcm2708_fb *fb) + { +- debugfs_remove_recursive(fb->debugfs_dir); +- fb->debugfs_dir = NULL; ++ debugfs_remove_recursive(fb->debugfs_subdir); ++ fb->debugfs_subdir = NULL; ++ ++ fb->fbdev->instance_count--; ++ ++ if (!fb->fbdev->instance_count) { ++ debugfs_remove_recursive(fb->debugfs_dir); ++ fb->debugfs_dir = NULL; ++ } + } + + static int bcm2708_fb_debugfs_init(struct bcm2708_fb *fb) + { ++ char buf[3]; ++ struct bcm2708_fb_dev *fbdev = fb->fbdev; ++ + static struct debugfs_reg32 stats_registers[] = { +- { +- "dma_copies", +- offsetof(struct bcm2708_fb_stats, dma_copies) +- }, +- { +- "dma_irqs", +- offsetof(struct bcm2708_fb_stats, dma_irqs) +- }, ++ {"dma_copies", offsetof(struct bcm2708_fb_stats, dma_copies)}, ++ {"dma_irqs", offsetof(struct bcm2708_fb_stats, dma_irqs)}, + }; + +- fb->debugfs_dir = debugfs_create_dir(DRIVER_NAME, NULL); ++ static struct debugfs_reg32 screeninfo[] = { ++ {"width", offsetof(struct fb_var_screeninfo, xres)}, ++ {"height", offsetof(struct fb_var_screeninfo, yres)}, ++ {"bpp", offsetof(struct fb_var_screeninfo, bits_per_pixel)}, ++ {"xres_virtual", offsetof(struct fb_var_screeninfo, xres_virtual)}, ++ {"yres_virtual", offsetof(struct fb_var_screeninfo, yres_virtual)}, ++ {"xoffset", offsetof(struct fb_var_screeninfo, xoffset)}, ++ {"yoffset", offsetof(struct fb_var_screeninfo, yoffset)}, ++ }; ++ ++ fb->debugfs_dir = debugfs_lookup(DRIVER_NAME, NULL); ++ ++ if (!fb->debugfs_dir) ++ fb->debugfs_dir = debugfs_create_dir(DRIVER_NAME, NULL); ++ + if (!fb->debugfs_dir) { +- pr_warn("%s: could not create debugfs entry\n", +- __func__); ++ dev_warn(fb->fb.dev, "%s: could not create debugfs folder\n", ++ __func__); ++ return -EFAULT; ++ } ++ ++ snprintf(buf, sizeof(buf), "%u", fb->display_settings.display_num); ++ ++ fb->debugfs_subdir = debugfs_create_dir(buf, fb->debugfs_dir); ++ ++ if (!fb->debugfs_subdir) { ++ dev_warn(fb->fb.dev, "%s: could not create debugfs entry %u\n", ++ __func__, fb->display_settings.display_num); + return -EFAULT; + } + +- fb->stats.regset.regs = stats_registers; +- fb->stats.regset.nregs = ARRAY_SIZE(stats_registers); +- fb->stats.regset.base = &fb->stats; +- +- if (!debugfs_create_regset32("stats", 0444, fb->debugfs_dir, +- &fb->stats.regset)) { +- pr_warn("%s: could not create statistics registers\n", +- __func__); ++ fbdev->dma_stats.regset.regs = stats_registers; ++ fbdev->dma_stats.regset.nregs = ARRAY_SIZE(stats_registers); ++ fbdev->dma_stats.regset.base = &fbdev->dma_stats; ++ ++ if (!debugfs_create_regset32("dma_stats", 0444, fb->debugfs_subdir, ++ &fbdev->dma_stats.regset)) { ++ dev_warn(fb->fb.dev, "%s: could not create statistics registers\n", ++ __func__); ++ goto fail; ++ } ++ ++ fb->screeninfo_regset.regs = screeninfo; ++ fb->screeninfo_regset.nregs = ARRAY_SIZE(screeninfo); ++ fb->screeninfo_regset.base = &fb->fb.var; ++ ++ if (!debugfs_create_regset32("screeninfo", 0444, fb->debugfs_subdir, ++ &fb->screeninfo_regset)) { ++ dev_warn(fb->fb.dev, ++ "%s: could not create dimensions registers\n", ++ __func__); + goto fail; + } ++ ++ fbdev->instance_count++; ++ + return 0; + + fail: +@@ -145,6 +225,20 @@ fail: + return -EFAULT; + } + ++static void set_display_num(struct bcm2708_fb *fb) ++{ ++ if (fb && fb->fbdev && fb->fbdev->firmware_supports_multifb) { ++ u32 tmp = fb->display_settings.display_num; ++ ++ if (rpi_firmware_property(fb->fbdev->fw, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_DISPLAY_NUM, ++ &tmp, ++ sizeof(tmp))) ++ dev_warn_once(fb->fb.dev, ++ "Set display number call failed. Old GPU firmware?"); ++ } ++} ++ + static int bcm2708_fb_set_bitfields(struct fb_var_screeninfo *var) + { + int ret = 0; +@@ -222,11 +316,11 @@ static int bcm2708_fb_check_var(struct f + struct fb_info *info) + { + /* info input, var output */ +- print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", ++ print_debug("%s(%p) %ux%u (%ux%u), %ul, %u\n", + __func__, info, info->var.xres, info->var.yres, + info->var.xres_virtual, info->var.yres_virtual, +- (int)info->screen_size, info->var.bits_per_pixel); +- print_debug("%s(%p) %dx%d (%dx%d), %d\n", __func__, var, var->xres, ++ info->screen_size, info->var.bits_per_pixel); ++ print_debug("%s(%p) %ux%u (%ux%u), %u\n", __func__, var, var->xres, + var->yres, var->xres_virtual, var->yres_virtual, + var->bits_per_pixel); + +@@ -283,23 +377,96 @@ static int bcm2708_fb_set_par(struct fb_ + .xoffset = info->var.xoffset, + .yoffset = info->var.yoffset, + .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, +- .base = 0, +- .screen_size = 0, +- .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH, 4, 0 }, +- .pitch = 0, ++ /* base and screen_size will be initialised later */ ++ .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, ++ /* pitch will be initialised later */ + }; +- int ret; ++ int ret, image_size; ++ + +- print_debug("%s(%p) %dx%d (%dx%d), %d, %d\n", __func__, info, ++ print_debug("%s(%p) %dx%d (%dx%d), %d, %d (display %d)\n", __func__, ++ info, + info->var.xres, info->var.yres, info->var.xres_virtual, + info->var.yres_virtual, (int)info->screen_size, +- info->var.bits_per_pixel); ++ info->var.bits_per_pixel, value); ++ ++ /* Need to set the display number to act on first ++ * Cannot do it in the tag list because on older firmware the call ++ * will fail and stop the rest of the list being executed. ++ * We can ignore this call failing as the default at other end is 0 ++ */ ++ set_display_num(fb); ++ ++ /* Try allocating our own buffer. We can specify all the parameters */ ++ image_size = ((info->var.xres * info->var.yres) * ++ info->var.bits_per_pixel) >> 3; ++ ++ if (!fb->fbdev->disable_arm_alloc && ++ (image_size != fb->image_size || !fb->dma_addr)) { ++ if (fb->dma_addr) { ++ dma_free_coherent(info->device, fb->image_size, ++ fb->cpuaddr, fb->dma_addr); ++ fb->image_size = 0; ++ fb->cpuaddr = NULL; ++ fb->dma_addr = 0; ++ } ++ ++ fb->cpuaddr = dma_alloc_coherent(info->device, image_size, ++ &fb->dma_addr, GFP_KERNEL); ++ ++ if (!fb->cpuaddr) { ++ fb->dma_addr = 0; ++ fb->fbdev->disable_arm_alloc = true; ++ } else { ++ fb->image_size = image_size; ++ } ++ } ++ ++ if (fb->cpuaddr) { ++ fbinfo.base = fb->dma_addr; ++ fbinfo.screen_size = image_size; ++ fbinfo.pitch = (info->var.xres * info->var.bits_per_pixel) >> 3; ++ ++ ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo, ++ sizeof(fbinfo)); ++ if (ret || fbinfo.base != fb->dma_addr) { ++ /* Firmware either failed, or assigned a different base ++ * address (ie it doesn't support being passed an FB ++ * allocation). ++ * Destroy the allocation, and don't try again. ++ */ ++ dma_free_coherent(info->device, fb->image_size, ++ fb->cpuaddr, fb->dma_addr); ++ fb->image_size = 0; ++ fb->cpuaddr = NULL; ++ fb->dma_addr = 0; ++ fb->fbdev->disable_arm_alloc = true; ++ } ++ } else { ++ /* Our allocation failed - drop into the old scheme of ++ * allocation by the VPU. ++ */ ++ ret = -ENOMEM; ++ } + +- ret = rpi_firmware_property_list(fb->fw, &fbinfo, sizeof(fbinfo)); + if (ret) { +- dev_err(info->device, +- "Failed to allocate GPU framebuffer (%d)\n", ret); +- return ret; ++ /* Old scheme: ++ * - FRAMEBUFFER_ALLOCATE passes 0 for base and screen_size. ++ * - GET_PITCH instead of SET_PITCH. ++ */ ++ fbinfo.base = 0; ++ fbinfo.screen_size = 0; ++ fbinfo.tag6.tag = RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH; ++ fbinfo.pitch = 0; ++ ++ ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo, ++ sizeof(fbinfo)); ++ if (ret) { ++ dev_err(info->device, ++ "Failed to allocate GPU framebuffer (%d)\n", ++ ret); ++ return ret; ++ } + } + + if (info->var.bits_per_pixel <= 8) +@@ -314,9 +481,17 @@ static int bcm2708_fb_set_par(struct fb_ + fb->fb.fix.smem_start = fbinfo.base; + fb->fb.fix.smem_len = fbinfo.pitch * fbinfo.yres_virtual; + fb->fb.screen_size = fbinfo.screen_size; +- if (fb->fb.screen_base) +- iounmap(fb->fb.screen_base); +- fb->fb.screen_base = ioremap_wc(fbinfo.base, fb->fb.screen_size); ++ ++ if (!fb->dma_addr) { ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ ++ fb->fb.screen_base = ioremap_wc(fbinfo.base, ++ fb->fb.screen_size); ++ } else { ++ fb->fb.screen_base = fb->cpuaddr; ++ } ++ + if (!fb->fb.screen_base) { + /* the console may currently be locked */ + console_trylock(); +@@ -374,7 +549,10 @@ static int bcm2708_fb_setcolreg(unsigned + packet->length = regno + 1; + memcpy(packet->cmap, fb->gpu_cmap, + sizeof(packet->cmap)); +- ret = rpi_firmware_property(fb->fw, ++ ++ set_display_num(fb); ++ ++ ret = rpi_firmware_property(fb->fbdev->fw, + RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE, + packet, + (2 + packet->length) * sizeof(u32)); +@@ -413,8 +591,11 @@ static int bcm2708_fb_blank(int blank_mo + return -EINVAL; + } + +- ret = rpi_firmware_property(fb->fw, RPI_FIRMWARE_FRAMEBUFFER_BLANK, ++ set_display_num(fb); ++ ++ ret = rpi_firmware_property(fb->fbdev->fw, RPI_FIRMWARE_FRAMEBUFFER_BLANK, + &value, sizeof(value)); ++ + if (ret) + dev_err(info->device, "%s(%d) failed: %d\n", __func__, + blank_mode, ret); +@@ -431,7 +612,7 @@ static int bcm2708_fb_pan_display(struct + info->var.yoffset = var->yoffset; + result = bcm2708_fb_set_par(info); + if (result != 0) +- pr_err("%s(%d,%d) returns=%d\n", __func__, var->xoffset, ++ pr_err("%s(%u,%u) returns=%d\n", __func__, var->xoffset, + var->yoffset, result); + return result; + } +@@ -439,8 +620,9 @@ static int bcm2708_fb_pan_display(struct + static void dma_memcpy(struct bcm2708_fb *fb, dma_addr_t dst, dma_addr_t src, + int size) + { +- int burst_size = (fb->dma_chan == 0) ? 8 : 2; +- struct bcm2708_dma_cb *cb = fb->cb_base; ++ struct bcm2708_fb_dev *fbdev = fb->fbdev; ++ struct bcm2708_dma_cb *cb = fbdev->cb_base; ++ int burst_size = (fbdev->dma_chan == 0) ? 8 : 2; + + cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH | + BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH | +@@ -453,21 +635,27 @@ static void dma_memcpy(struct bcm2708_fb + cb->pad[1] = 0; + cb->next = 0; + ++ // Not sure what to do if this gets a signal whilst waiting ++ if (mutex_lock_interruptible(&fbdev->dma_mutex)) ++ return; ++ + if (size < dma_busy_wait_threshold) { +- bcm_dma_start(fb->dma_chan_base, fb->cb_handle); +- bcm_dma_wait_idle(fb->dma_chan_base); ++ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle); ++ bcm_dma_wait_idle(fbdev->dma_chan_base); + } else { +- void __iomem *dma_chan = fb->dma_chan_base; ++ void __iomem *local_dma_chan = fbdev->dma_chan_base; + + cb->info |= BCM2708_DMA_INT_EN; +- bcm_dma_start(fb->dma_chan_base, fb->cb_handle); +- while (bcm_dma_is_busy(dma_chan)) { +- wait_event_interruptible(fb->dma_waitq, +- !bcm_dma_is_busy(dma_chan)); ++ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle); ++ while (bcm_dma_is_busy(local_dma_chan)) { ++ wait_event_interruptible(fbdev->dma_waitq, ++ !bcm_dma_is_busy(local_dma_chan)); + } +- fb->stats.dma_irqs++; ++ fbdev->dma_stats.dma_irqs++; + } +- fb->stats.dma_copies++; ++ fbdev->dma_stats.dma_copies++; ++ ++ mutex_unlock(&fbdev->dma_mutex); + } + + /* address with no aliases */ +@@ -542,10 +730,13 @@ static int bcm2708_ioctl(struct fb_info + + switch (cmd) { + case FBIO_WAITFORVSYNC: +- ret = rpi_firmware_property(fb->fw, ++ set_display_num(fb); ++ ++ ret = rpi_firmware_property(fb->fbdev->fw, + RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC, + &dummy, sizeof(dummy)); + break; ++ + case FBIODMACOPY: + { + struct fb_dmacopy ioparam; +@@ -615,23 +806,22 @@ static int bcm2708_compat_ioctl(struct f + static void bcm2708_fb_fillrect(struct fb_info *info, + const struct fb_fillrect *rect) + { +- /* (is called) print_debug("bcm2708_fb_fillrect\n"); */ + cfb_fillrect(info, rect); + } + + /* A helper function for configuring dma control block */ + static void set_dma_cb(struct bcm2708_dma_cb *cb, +- int burst_size, +- dma_addr_t dst, +- int dst_stride, +- dma_addr_t src, +- int src_stride, +- int w, +- int h) ++ int burst_size, ++ dma_addr_t dst, ++ int dst_stride, ++ dma_addr_t src, ++ int src_stride, ++ int w, ++ int h) + { + cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH | +- BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH | +- BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE; ++ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH | ++ BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE; + cb->dst = dst; + cb->src = src; + /* +@@ -649,15 +839,19 @@ static void bcm2708_fb_copyarea(struct f + const struct fb_copyarea *region) + { + struct bcm2708_fb *fb = to_bcm2708(info); +- struct bcm2708_dma_cb *cb = fb->cb_base; ++ struct bcm2708_fb_dev *fbdev = fb->fbdev; ++ struct bcm2708_dma_cb *cb = fbdev->cb_base; + int bytes_per_pixel = (info->var.bits_per_pixel + 7) >> 3; + + /* Channel 0 supports larger bursts and is a bit faster */ +- int burst_size = (fb->dma_chan == 0) ? 8 : 2; ++ int burst_size = (fbdev->dma_chan == 0) ? 8 : 2; + int pixels = region->width * region->height; + +- /* Fallback to cfb_copyarea() if we don't like something */ +- if (bytes_per_pixel > 4 || ++ /* If DMA is currently in use (ie being used on another FB), then ++ * rather than wait for it to finish, just use the cfb_copyarea ++ */ ++ if (!mutex_trylock(&fbdev->dma_mutex) || ++ bytes_per_pixel > 4 || + info->var.xres * info->var.yres > 1920 * 1200 || + region->width <= 0 || region->width > info->var.xres || + region->height <= 0 || region->height > info->var.yres || +@@ -684,8 +878,8 @@ static void bcm2708_fb_copyarea(struct f + * 1920x1200 resolution at 32bpp pixel depth. + */ + int y; +- dma_addr_t control_block_pa = fb->cb_handle; +- dma_addr_t scratchbuf = fb->cb_handle + 16 * 1024; ++ dma_addr_t control_block_pa = fbdev->cb_handle; ++ dma_addr_t scratchbuf = fbdev->cb_handle + 16 * 1024; + int scanline_size = bytes_per_pixel * region->width; + int scanlines_per_cb = (64 * 1024 - 16 * 1024) / scanline_size; + +@@ -735,10 +929,10 @@ static void bcm2708_fb_copyarea(struct f + } + set_dma_cb(cb, burst_size, + fb->fb_bus_address + dy * fb->fb.fix.line_length + +- bytes_per_pixel * region->dx, ++ bytes_per_pixel * region->dx, + stride, + fb->fb_bus_address + sy * fb->fb.fix.line_length + +- bytes_per_pixel * region->sx, ++ bytes_per_pixel * region->sx, + stride, + region->width * bytes_per_pixel, + region->height); +@@ -748,32 +942,33 @@ static void bcm2708_fb_copyarea(struct f + cb->next = 0; + + if (pixels < dma_busy_wait_threshold) { +- bcm_dma_start(fb->dma_chan_base, fb->cb_handle); +- bcm_dma_wait_idle(fb->dma_chan_base); ++ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle); ++ bcm_dma_wait_idle(fbdev->dma_chan_base); + } else { +- void __iomem *dma_chan = fb->dma_chan_base; ++ void __iomem *local_dma_chan = fbdev->dma_chan_base; + + cb->info |= BCM2708_DMA_INT_EN; +- bcm_dma_start(fb->dma_chan_base, fb->cb_handle); +- while (bcm_dma_is_busy(dma_chan)) { +- wait_event_interruptible(fb->dma_waitq, +- !bcm_dma_is_busy(dma_chan)); ++ bcm_dma_start(fbdev->dma_chan_base, fbdev->cb_handle); ++ while (bcm_dma_is_busy(local_dma_chan)) { ++ wait_event_interruptible(fbdev->dma_waitq, ++ !bcm_dma_is_busy(local_dma_chan)); + } +- fb->stats.dma_irqs++; ++ fbdev->dma_stats.dma_irqs++; + } +- fb->stats.dma_copies++; ++ fbdev->dma_stats.dma_copies++; ++ ++ mutex_unlock(&fbdev->dma_mutex); + } + + static void bcm2708_fb_imageblit(struct fb_info *info, + const struct fb_image *image) + { +- /* (is called) print_debug("bcm2708_fb_imageblit\n"); */ + cfb_imageblit(info, image); + } + + static irqreturn_t bcm2708_fb_dma_irq(int irq, void *cxt) + { +- struct bcm2708_fb *fb = cxt; ++ struct bcm2708_fb_dev *fbdev = cxt; + + /* FIXME: should read status register to check if this is + * actually interrupting us or not, in case this interrupt +@@ -783,9 +978,9 @@ static irqreturn_t bcm2708_fb_dma_irq(in + */ + + /* acknowledge the interrupt */ +- writel(BCM2708_DMA_INT, fb->dma_chan_base + BCM2708_DMA_CS); ++ writel(BCM2708_DMA_INT, fbdev->dma_chan_base + BCM2708_DMA_CS); + +- wake_up(&fb->dma_waitq); ++ wake_up(&fbdev->dma_waitq); + return IRQ_HANDLED; + } + +@@ -821,11 +1016,23 @@ static int bcm2708_fb_register(struct bc + fb->fb.fix.ywrapstep = 0; + fb->fb.fix.accel = FB_ACCEL_NONE; + +- fb->fb.var.xres = fbwidth; +- fb->fb.var.yres = fbheight; +- fb->fb.var.xres_virtual = fbwidth; +- fb->fb.var.yres_virtual = fbheight; +- fb->fb.var.bits_per_pixel = fbdepth; ++ /* If we have data from the VC4 on FB's, use that, otherwise use the ++ * module parameters ++ */ ++ if (fb->display_settings.width) { ++ fb->fb.var.xres = fb->display_settings.width; ++ fb->fb.var.yres = fb->display_settings.height; ++ fb->fb.var.xres_virtual = fb->fb.var.xres; ++ fb->fb.var.yres_virtual = fb->fb.var.yres; ++ fb->fb.var.bits_per_pixel = fb->display_settings.depth; ++ } else { ++ fb->fb.var.xres = fbwidth; ++ fb->fb.var.yres = fbheight; ++ fb->fb.var.xres_virtual = fbwidth; ++ fb->fb.var.yres_virtual = fbheight; ++ fb->fb.var.bits_per_pixel = fbdepth; ++ } ++ + fb->fb.var.vmode = FB_VMODE_NONINTERLACED; + fb->fb.var.activate = FB_ACTIVATE_NOW; + fb->fb.var.nonstd = 0; +@@ -841,26 +1048,23 @@ static int bcm2708_fb_register(struct bc + fb->fb.monspecs.dclkmax = 100000000; + + bcm2708_fb_set_bitfields(&fb->fb.var); +- init_waitqueue_head(&fb->dma_waitq); + + /* + * Allocate colourmap. + */ +- + fb_set_var(&fb->fb, &fb->fb.var); ++ + ret = bcm2708_fb_set_par(&fb->fb); ++ + if (ret) + return ret; + +- print_debug("BCM2708FB: registering framebuffer (%dx%d@%d) (%d)\n", +- fbwidth, fbheight, fbdepth, fbswap); +- + ret = register_framebuffer(&fb->fb); +- print_debug("BCM2708FB: register framebuffer (%d)\n", ret); ++ + if (ret == 0) + goto out; + +- print_debug("BCM2708FB: cannot register framebuffer (%d)\n", ret); ++ dev_warn(fb->fb.dev, "Unable to register framebuffer (%d)\n", ret); + out: + return ret; + } +@@ -869,10 +1073,18 @@ static int bcm2708_fb_probe(struct platf + { + struct device_node *fw_np; + struct rpi_firmware *fw; +- struct bcm2708_fb *fb; +- int ret; ++ int ret, i; ++ u32 num_displays; ++ struct bcm2708_fb_dev *fbdev; ++ struct { u32 base, length; } gpu_mem; ++ ++ fbdev = devm_kzalloc(&dev->dev, sizeof(*fbdev), GFP_KERNEL); ++ ++ if (!fbdev) ++ return -ENOMEM; + + fw_np = of_parse_phandle(dev->dev.of_node, "firmware", 0); ++ + /* Remove comment when booting without Device Tree is no longer supported + * if (!fw_np) { + * dev_err(&dev->dev, "Missing firmware node\n"); +@@ -880,90 +1092,154 @@ static int bcm2708_fb_probe(struct platf + * } + */ + fw = rpi_firmware_get(fw_np); ++ fbdev->fw = fw; ++ + if (!fw) + return -EPROBE_DEFER; + +- fb = kzalloc(sizeof(*fb), GFP_KERNEL); +- if (!fb) { +- ret = -ENOMEM; +- goto free_region; ++ ret = rpi_firmware_property(fw, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS, ++ &num_displays, sizeof(u32)); ++ ++ /* If we fail to get the number of displays, or it returns 0, then ++ * assume old firmware that doesn't have the mailbox call, so just ++ * set one display ++ */ ++ if (ret || num_displays == 0) { ++ num_displays = 1; ++ dev_err(&dev->dev, ++ "Unable to determine number of FB's. Assuming 1\n"); ++ ret = 0; ++ } else { ++ fbdev->firmware_supports_multifb = 1; + } + +- fb->fw = fw; +- bcm2708_fb_debugfs_init(fb); ++ if (num_displays > MAX_FRAMEBUFFERS) { ++ dev_warn(&dev->dev, ++ "More displays reported from firmware than supported in driver (%u vs %u)", ++ num_displays, MAX_FRAMEBUFFERS); ++ num_displays = MAX_FRAMEBUFFERS; ++ } + +- fb->cb_base = dma_alloc_writecombine(&dev->dev, SZ_64K, +- &fb->cb_handle, GFP_KERNEL); +- if (!fb->cb_base) { ++ dev_info(&dev->dev, "FB found %d display(s)\n", num_displays); ++ ++ /* Set up the DMA information. Note we have just one set of DMA ++ * parameters to work with all the FB's so requires synchronising when ++ * being used ++ */ ++ ++ mutex_init(&fbdev->dma_mutex); ++ ++ fbdev->cb_base = dma_alloc_writecombine(&dev->dev, SZ_64K, ++ &fbdev->cb_handle, ++ GFP_KERNEL); ++ if (!fbdev->cb_base) { + dev_err(&dev->dev, "cannot allocate DMA CBs\n"); + ret = -ENOMEM; + goto free_fb; + } + +- pr_info("BCM2708FB: allocated DMA memory %pad\n", &fb->cb_handle); +- + ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK, +- &fb->dma_chan_base, &fb->dma_irq); ++ &fbdev->dma_chan_base, ++ &fbdev->dma_irq); + if (ret < 0) { +- dev_err(&dev->dev, "couldn't allocate a DMA channel\n"); ++ dev_err(&dev->dev, "Couldn't allocate a DMA channel\n"); + goto free_cb; + } +- fb->dma_chan = ret; ++ fbdev->dma_chan = ret; + +- ret = request_irq(fb->dma_irq, bcm2708_fb_dma_irq, +- 0, "bcm2708_fb dma", fb); ++ ret = request_irq(fbdev->dma_irq, bcm2708_fb_dma_irq, ++ 0, "bcm2708_fb DMA", fbdev); + if (ret) { +- pr_err("%s: failed to request DMA irq\n", __func__); ++ dev_err(&dev->dev, ++ "Failed to request DMA irq\n"); + goto free_dma_chan; + } + +- pr_info("BCM2708FB: allocated DMA channel %d\n", fb->dma_chan); ++ rpi_firmware_property(fbdev->fw, ++ RPI_FIRMWARE_GET_VC_MEMORY, ++ &gpu_mem, sizeof(gpu_mem)); ++ ++ for (i = 0; i < num_displays; i++) { ++ struct bcm2708_fb *fb = &fbdev->displays[i]; ++ ++ fb->display_settings.display_num = i; ++ fb->dev = dev; ++ fb->fb.device = &dev->dev; ++ fb->fbdev = fbdev; ++ ++ fb->gpu.base = gpu_mem.base; ++ fb->gpu.length = gpu_mem.length; ++ ++ if (fbdev->firmware_supports_multifb) { ++ ret = rpi_firmware_property(fw, ++ RPI_FIRMWARE_FRAMEBUFFER_GET_DISPLAY_SETTINGS, ++ &fb->display_settings, ++ GET_DISPLAY_SETTINGS_PAYLOAD_SIZE); ++ } else { ++ memset(&fb->display_settings, 0, ++ sizeof(fb->display_settings)); ++ } ++ ++ ret = bcm2708_fb_register(fb); + +- fb->dev = dev; +- fb->fb.device = &dev->dev; ++ if (ret == 0) { ++ bcm2708_fb_debugfs_init(fb); + +- /* failure here isn't fatal, but we'll fail in vc_mem_copy if +- * fb->gpu is not valid +- */ +- rpi_firmware_property(fb->fw, RPI_FIRMWARE_GET_VC_MEMORY, &fb->gpu, +- sizeof(fb->gpu)); ++ fbdev->num_displays++; + +- ret = bcm2708_fb_register(fb); +- if (ret == 0) { +- platform_set_drvdata(dev, fb); +- goto out; ++ dev_info(&dev->dev, ++ "Registered framebuffer for display %u, size %ux%u\n", ++ fb->display_settings.display_num, ++ fb->fb.var.xres, ++ fb->fb.var.yres); ++ } else { ++ // Use this to flag if this FB entry is in use. ++ fb->fbdev = NULL; ++ } ++ } ++ ++ // Did we actually successfully create any FB's? ++ if (fbdev->num_displays) { ++ init_waitqueue_head(&fbdev->dma_waitq); ++ platform_set_drvdata(dev, fbdev); ++ return ret; + } + + free_dma_chan: +- bcm_dma_chan_free(fb->dma_chan); ++ bcm_dma_chan_free(fbdev->dma_chan); + free_cb: +- dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle); ++ dma_free_writecombine(&dev->dev, SZ_64K, fbdev->cb_base, ++ fbdev->cb_handle); + free_fb: +- kfree(fb); +-free_region: + dev_err(&dev->dev, "probe failed, err %d\n", ret); +-out: ++ + return ret; + } + + static int bcm2708_fb_remove(struct platform_device *dev) + { +- struct bcm2708_fb *fb = platform_get_drvdata(dev); ++ struct bcm2708_fb_dev *fbdev = platform_get_drvdata(dev); ++ int i; + + platform_set_drvdata(dev, NULL); + +- if (fb->fb.screen_base) +- iounmap(fb->fb.screen_base); +- unregister_framebuffer(&fb->fb); +- +- dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle); +- bcm_dma_chan_free(fb->dma_chan); +- +- bcm2708_fb_debugfs_deinit(fb); ++ for (i = 0; i < fbdev->num_displays; i++) { ++ if (fbdev->displays[i].fb.screen_base) ++ iounmap(fbdev->displays[i].fb.screen_base); ++ ++ if (fbdev->displays[i].fbdev) { ++ unregister_framebuffer(&fbdev->displays[i].fb); ++ bcm2708_fb_debugfs_deinit(&fbdev->displays[i]); ++ } ++ } + +- free_irq(fb->dma_irq, fb); ++ dma_free_writecombine(&dev->dev, SZ_64K, fbdev->cb_base, ++ fbdev->cb_handle); ++ bcm_dma_chan_free(fbdev->dma_chan); ++ free_irq(fbdev->dma_irq, fbdev); + +- kfree(fb); ++ mutex_destroy(&fbdev->dma_mutex); + + return 0; + } +@@ -978,10 +1254,10 @@ static struct platform_driver bcm2708_fb + .probe = bcm2708_fb_probe, + .remove = bcm2708_fb_remove, + .driver = { +- .name = DRIVER_NAME, +- .owner = THIS_MODULE, +- .of_match_table = bcm2708_fb_of_match_table, +- }, ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = bcm2708_fb_of_match_table, ++ }, + }; + + static int __init bcm2708_fb_init(void) +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -138,9 +138,11 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, + RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, + RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, ++ RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, + RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, + RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, + RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, ++ + RPI_FIRMWARE_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, + RPI_FIRMWARE_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, + RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, +@@ -159,6 +161,8 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, + }; + ++#define GET_DISPLAY_SETTINGS_PAYLOAD_SIZE 64 ++ + #if IS_ENABLED(CONFIG_RASPBERRYPI_FIRMWARE) + int rpi_firmware_property(struct rpi_firmware *fw, + u32 tag, void *data, size_t len); diff --git a/target/linux/brcm2708/patches-4.19/950-0638-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch b/target/linux/brcm2708/patches-4.19/950-0638-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch new file mode 100644 index 000000000..3ab4a8cf4 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0638-ARM-dts-bcm283x-Move-BCM2835-6-7-specific-to-bcm2835.patch @@ -0,0 +1,189 @@ +From ba24f07c814a4d0527fa5821834cded70ac705be Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sun, 19 May 2019 12:26:21 +0200 +Subject: [PATCH 638/703] ARM: dts: bcm283x: Move BCM2835/6/7 specific to + bcm2835-common.dtsi + +We want all common BCM2835/6/7/8 functions in bcm283x.dtsi and all +BCM2835/6/7 specific in the new bcm2835-common.dtsi. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-common.dtsi | 53 +++++++++++++++++++++++++++ + arch/arm/boot/dts/bcm2835.dtsi | 1 + + arch/arm/boot/dts/bcm2836.dtsi | 1 + + arch/arm/boot/dts/bcm2837.dtsi | 1 + + arch/arm/boot/dts/bcm283x.dtsi | 43 +--------------------- + 5 files changed, 57 insertions(+), 42 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2835-common.dtsi + +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -0,0 +1,53 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++/* This include file covers the common peripherals and configuration between ++ * bcm2835, bcm2836 and bcm2837 implementations. ++ */ ++ ++/ { ++ soc { ++ timer@7e003000 { ++ compatible = "brcm,bcm2835-system-timer"; ++ reg = <0x7e003000 0x1000>; ++ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; ++ /* This could be a reference to BCM2835_CLOCK_TIMER, ++ * but we don't have the driver using the common clock ++ * support yet. ++ */ ++ clock-frequency = <1000000>; ++ }; ++ ++ intc: interrupt-controller@7e00b200 { ++ compatible = "brcm,bcm2835-armctrl-ic"; ++ reg = <0x7e00b200 0x200>; ++ interrupt-controller; ++ #interrupt-cells = <2>; ++ }; ++ ++ thermal: thermal@7e212000 { ++ compatible = "brcm,bcm2835-thermal"; ++ reg = <0x7e212000 0x8>; ++ clocks = <&clocks BCM2835_CLOCK_TSENS>; ++ #thermal-sensor-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ v3d: v3d@7ec00000 { ++ compatible = "brcm,bcm2835-v3d"; ++ reg = <0x7ec00000 0x1000>; ++ interrupts = <1 10>; ++ }; ++ }; ++}; ++ ++&gpio { ++ i2c_slave_gpio18: i2c_slave_gpio18 { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = ; ++ }; ++ ++ jtag_gpio4: jtag_gpio4 { ++ brcm,pins = <4 5 6 12 13>; ++ brcm,function = ; ++ }; ++}; +--- a/arch/arm/boot/dts/bcm2835.dtsi ++++ b/arch/arm/boot/dts/bcm2835.dtsi +@@ -1,5 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + #include "bcm283x.dtsi" ++#include "bcm2835-common.dtsi" + + / { + compatible = "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2836.dtsi ++++ b/arch/arm/boot/dts/bcm2836.dtsi +@@ -1,5 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + #include "bcm283x.dtsi" ++#include "bcm2835-common.dtsi" + + / { + compatible = "brcm,bcm2836"; +--- a/arch/arm/boot/dts/bcm2837.dtsi ++++ b/arch/arm/boot/dts/bcm2837.dtsi +@@ -1,4 +1,5 @@ + #include "bcm283x.dtsi" ++#include "bcm2835-common.dtsi" + + / { + compatible = "brcm,bcm2837"; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -55,17 +55,6 @@ + #address-cells = <1>; + #size-cells = <1>; + +- timer@7e003000 { +- compatible = "brcm,bcm2835-system-timer"; +- reg = <0x7e003000 0x1000>; +- interrupts = <1 0>, <1 1>, <1 2>, <1 3>; +- /* This could be a reference to BCM2835_CLOCK_TIMER, +- * but we don't have the driver using the common clock +- * support yet. +- */ +- clock-frequency = <1000000>; +- }; +- + txp@7e004000 { + compatible = "brcm,bcm2835-txp"; + reg = <0x7e004000 0x20>; +@@ -113,13 +102,6 @@ + brcm,dma-channel-mask = <0x7f35>; + }; + +- intc: interrupt-controller@7e00b200 { +- compatible = "brcm,bcm2835-armctrl-ic"; +- reg = <0x7e00b200 0x200>; +- interrupt-controller; +- #interrupt-cells = <2>; +- }; +- + watchdog@7e100000 { + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; + #power-domain-cells = <1>; +@@ -183,8 +165,7 @@ + interrupt-controller; + #interrupt-cells = <2>; + +- /* Defines pin muxing groups according to +- * BCM2835-ARM-Peripherals.pdf page 102. ++ /* Defines common pin muxing groups + * + * While each pin can have its mux selected + * for various functions individually, some +@@ -262,15 +243,7 @@ + brcm,pins = <44 45>; + brcm,function = ; + }; +- i2c_slave_gpio18: i2c_slave_gpio18 { +- brcm,pins = <18 19 20 21>; +- brcm,function = ; +- }; + +- jtag_gpio4: jtag_gpio4 { +- brcm,pins = <4 5 6 12 13>; +- brcm,function = ; +- }; + jtag_gpio22: jtag_gpio22 { + brcm,pins = <22 23 24 25 26 27>; + brcm,function = ; +@@ -487,14 +460,6 @@ + + }; + +- thermal: thermal@7e212000 { +- compatible = "brcm,bcm2835-thermal"; +- reg = <0x7e212000 0x8>; +- clocks = <&clocks BCM2835_CLOCK_TSENS>; +- #thermal-sensor-cells = <0>; +- status = "disabled"; +- }; +- + aux: aux@7e215000 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; +@@ -660,12 +625,6 @@ + phy-names = "usb2-phy"; + }; + +- v3d: v3d@7ec00000 { +- compatible = "brcm,bcm2835-v3d"; +- reg = <0x7ec00000 0x1000>; +- interrupts = <1 10>; +- }; +- + vc4: gpu { + compatible = "brcm,bcm2835-vc4"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0639-ARM-dts-Add-bcm2711-rpi-4-b.dts-and-components.patch b/target/linux/brcm2708/patches-4.19/950-0639-ARM-dts-Add-bcm2711-rpi-4-b.dts-and-components.patch new file mode 100644 index 000000000..66643563d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0639-ARM-dts-Add-bcm2711-rpi-4-b.dts-and-components.patch @@ -0,0 +1,1129 @@ +From 4671029bae38c2057890e60ac26263f982775152 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 May 2019 13:54:21 +0100 +Subject: [PATCH 639/703] ARM: dts: Add bcm2711-rpi-4-b.dts and components + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 320 ++++++++++++ + arch/arm/boot/dts/bcm2711.dtsi | 50 ++ + arch/arm/boot/dts/bcm2838.dtsi | 724 ++++++++++++++++++++++++++ + 4 files changed, 1095 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts + create mode 100644 arch/arm/boot/dts/bcm2711.dtsi + create mode 100644 arch/arm/boot/dts/bcm2838.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2708-rpi-zero-w.dtb \ + bcm2709-rpi-2-b.dtb \ + bcm2710-rpi-3-b.dtb \ ++ bcm2711-rpi-4-b.dtb \ + bcm2710-rpi-3-b-plus.dtb \ + bcm2710-rpi-cm3.dtb + +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -0,0 +1,320 @@ ++/dts-v1/; ++ ++#include "bcm2711.dtsi" ++ ++/ { ++ compatible = "raspberrypi,4-model-b", "brcm,bcm2838", "brcm,bcm2837"; ++ model = "Raspberry Pi 4 Model B"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0>; ++ }; ++ ++ chosen { ++ bootargs = "8250.nr_uarts=1 cma=64M"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ mmc0 = &emmc2; ++ mmc1 = &mmcnr; ++ mmc2 = &sdhost; ++ /delete-property/ ethernet; ++ /delete-property/ intc; ++ ethernet0 = &genet; ++ }; ++}; ++ ++&soc { ++ virtgpio: virtgpio { ++ compatible = "brcm,bcm2835-virtgpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; ++}; ++ ++&mmcnr { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&firmware { ++ expgpio: expgpio { ++ compatible = "raspberrypi,firmware-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ status = "okay"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins &bt_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++// ============================================= ++// Board specific stuff here ++ ++/ { ++ ++ sd_io_1v8_reg: sd_io_1v8_reg { ++ status = "okay"; ++ compatible = "regulator-gpio"; ++ vin-supply = <&vdd_5v0_reg>; ++ regulator-name = "vdd-sd-io"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-settling-time-us = <5000>; ++ ++ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ }; ++}; ++ ++&sdhost { ++ status = "disabled"; ++}; ++ ++&emmc2 { ++ status = "okay"; ++ broken-cd; ++ vqmmc-supply = <&sd_io_1v8_reg>; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 42 0>; ++ }; ++ ++ pwr_led: pwr { ++ label = "led1"; ++ linux,default-trigger = "input"; ++ gpios = <&expgpio 2 0>; ++ }; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++&sdhost_gpio48 { ++ brcm,pins = <22 23 24 25 26 27>; ++ brcm,function = ; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = ; ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = ; ++ }; ++ ++ spi3_pins: spi3_pins { ++ brcm,pins = <1 2 3>; ++ brcm,function = ; ++ }; ++ ++ spi3_cs_pins: spi3_cs_pins { ++ brcm,pins = <0 24>; ++ brcm,function = ; ++ }; ++ ++ spi4_pins: spi4_pins { ++ brcm,pins = <5 6 7>; ++ brcm,function = ; ++ }; ++ ++ spi4_cs_pins: spi4_cs_pins { ++ brcm,pins = <4 25>; ++ brcm,function = ; ++ }; ++ ++ spi5_pins: spi5_pins { ++ brcm,pins = <13 14 15>; ++ brcm,function = ; ++ }; ++ ++ spi5_cs_pins: spi5_cs_pins { ++ brcm,pins = <12 26>; ++ brcm,function = ; ++ }; ++ ++ spi6_pins: spi6_pins { ++ brcm,pins = <19 20 21>; ++ brcm,function = ; ++ }; ++ ++ spi6_cs_pins: spi6_cs_pins { ++ brcm,pins = <18 27>; ++ brcm,function = ; ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = ; ++ }; ++ ++ i2c3_pins: i2c3 { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ }; ++ ++ i2c4_pins: i2c4 { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ }; ++ ++ i2c5_pins: i2c5 { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ }; ++ ++ i2c6_pins: i2c6 { ++ brcm,pins = <22 23>; ++ brcm,function = ; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = ; ++ }; ++ ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = ; // alt3 = SD1 ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ bt_pins: bt_pins { ++ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 ++ // to fool pinctrl ++ brcm,function = <0>; ++ brcm,pull = <2>; ++ }; ++ ++ uart0_pins: uart0_pins { ++ brcm,pins = <32 33>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart1_pins: uart1_pins { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ ++ uart2_pins: uart2_pins { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart3_pins: uart3_pins { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart4_pins: uart4_pins { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart5_pins: uart5_pins { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ audio_pins: audio_pins { ++ brcm,pins = <40 41>; ++ brcm,function = <4>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ ++ pwr_led_gpio = <&pwr_led>,"gpios:4"; ++ pwr_led_activelow = <&pwr_led>,"gpios:8"; ++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -0,0 +1,50 @@ ++#include "bcm2838.dtsi" ++#include "bcm270x.dtsi" ++#include "bcm2708-rpi.dtsi" ++ ++/ { ++ soc { ++ /delete-node/ mailbox@7e00b840; ++ /delete-node/ v3d@7ec00000; ++ }; ++ ++ __overrides__ { ++ arm_freq; ++ }; ++}; ++ ++&dma { ++ brcm,dma-channel-mask = <0x7ef5>; ++}; ++ ++&txp { ++ interrupts = ; ++}; ++ ++&firmwarekms { ++ interrupts = ; ++}; ++ ++&smi { ++ interrupts = ; ++}; ++ ++&mmc { ++ interrupts = ; ++}; ++ ++&mmcnr { ++ interrupts = ; ++}; ++ ++&usb { ++ reg = <0x7e980000 0x10000>, ++ <0x7e00b200 0x200>; ++ interrupts = , ++ ; ++}; ++ ++&gpio { ++ interrupts = , ++ ; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -0,0 +1,724 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include "bcm283x.dtsi" ++ ++#include ++#include ++ ++/ { ++ compatible = "brcm,bcm2838", "brcm,bcm2837"; ++ ++ interrupt-parent = <&gicv2>; ++ ++ soc { ++ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, ++ <0x7c000000 0x0 0xfc000000 0x02000000>, ++ <0x40000000 0x0 0xff800000 0x00800000>; ++ /* Emulate a contiguous 30-bit address range for DMA */ ++ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; ++ ++ /delete-node/ mailbox@7e00b840; ++ /delete-node/ interrupt-controller@7e00f300; ++ ++ local_intc: local_intc@40000000 { ++ compatible = "brcm,bcm2836-l1-intc"; ++ reg = <0x40000000 0x100>; ++ }; ++ ++ gicv2: gic400@40041000 { ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ compatible = "arm,gic-400"; ++ reg = <0x40041000 0x1000>, ++ <0x40042000 0x2000>, ++ <0x40046000 0x2000>, ++ <0x40048000 0x2000>; ++ }; ++ ++ thermal: thermal@7d5d2200 { ++ compatible = "brcm,avs-tmon-bcm2838"; ++ reg = <0x7d5d2200 0x2c>; ++ interrupts = ; ++ interrupt-names = "tmon"; ++ clocks = <&clocks BCM2835_CLOCK_TSENS>; ++ #thermal-sensor-cells = <0>; ++ status = "okay"; ++ }; ++ ++ pm: watchdog@7e100000 { ++ reg = <0x7e100000 0x114>, ++ <0x7e00a000 0x24>, ++ <0x7ec11000 0x20>; ++ }; ++ ++ rng@7e104000 { ++ interrupts = ; ++ }; ++ ++ uart2: serial@7e201400 { ++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ reg = <0x7e201400 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@7e201600 { ++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ reg = <0x7e201600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@7e201800 { ++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ reg = <0x7e201800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@7e201a00 { ++ compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ reg = <0x7e201a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ spi@7e204000 { ++ reg = <0x7e204000 0x0200>; ++ interrupts = ; ++ }; ++ ++ spi3: spi@7e204600 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204600 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi4: spi@7e204800 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204800 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi5: spi@7e204a00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204a00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi6: spi@7e204c00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204c00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@7e205600 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e205600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@7e205800 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e205800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@7e205a00 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e205a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c6: i2c@7e205c00 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e205c00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pixelvalve@7e206000 { ++ interrupts = ; ++ }; ++ ++ pixelvalve@7e207000 { ++ interrupts = ; ++ }; ++ ++ emmc2: emmc2@7e340000 { ++ compatible = "brcm,bcm2711-emmc2"; ++ status = "okay"; ++ interrupts = ; ++ clocks = <&clocks BCM2838_CLOCK_EMMC2>; ++ reg = <0x7e340000 0x100>; ++ }; ++ ++ hvs@7e400000 { ++ interrupts = ; ++ }; ++ ++ pixelvalve@7e807000 { ++ interrupts = ; ++ }; ++ }; ++ ++ arm-pmu { ++ /* ++ * N.B. the A72 PMU support only exists in arch/arm64, hence ++ * the fallback to the A53 version. ++ */ ++ compatible = "arm,cortex-a72-pmu", "arm,cortex-a53-pmu"; ++ interrupts = , ++ , ++ , ++ ; ++ }; ++ ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ arm,cpu-registers-not-fw-configured; ++ always-on; ++ }; ++ ++ cpus: cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <0>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000d8>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <1>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e0>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <2>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e8>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <3>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000f0>; ++ }; ++ }; ++ ++ v3dbus { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges = <0x7c500000 0x0 0xfc500000 0x03300000>, ++ <0x40000000 0x0 0xff800000 0x00800000>; ++ dma-ranges = <0x00000000 0x0 0x00000000 0x3c000000>; ++ ++ v3d: v3d@7ec04000 { ++ compatible = "brcm,2711-v3d"; ++ reg = ++ <0x7ec00000 0x4000>, ++ <0x7ec04000 0x4000>; ++ reg-names = "hub", "core0"; ++ ++ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; ++ resets = <&pm BCM2835_RESET_V3D>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>; ++ interrupts = ; ++ status = "okay"; ++ }; ++ }; ++ ++ scb: scb { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, ++ <0x0 0x40000000 0x0 0xff800000 0x00800000>, ++ <0x6 0x00000000 0x6 0x00000000 0x40000000>, ++ <0x0 0x00000000 0x0 0x00000000 0xfc000000>; ++ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; ++ ++ pcie_0: pcie@7d500000 { ++ reg = <0x0 0x7d500000 0x9310>, ++ <0x0 0x7e00f300 0x20>; ++ msi-controller; ++ msi-parent = <&pcie_0>; ++ #address-cells = <3>; ++ #interrupt-cells = <1>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x01>; ++ compatible = "brcm,bcm7211-pcie", "brcm,bcm7445-pcie", ++ "brcm,pci-plat-dev"; ++ max-link-speed = <2>; ++ tot-num-pcie = <1>; ++ linux,pci-domain = <0>; ++ interrupts = , ++ ; ++ interrupt-names = "pcie", "msi"; ++ interrupt-map-mask = <0x0 0x0 0x0 0x7>; ++ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 2 &gicv2 GIC_SPI 144 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 3 &gicv2 GIC_SPI 145 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 4 &gicv2 GIC_SPI 146 ++ IRQ_TYPE_LEVEL_HIGH>; ++ ++ /* Map outbound accesses from scb:0x6_00000000-03ffffff ++ * to pci:0x0_f8000000-fbffffff ++ */ ++ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 ++ 0x0 0x04000000>; ++ /* Map inbound accesses from pci:0x0_00000000..ffffffff ++ * to scb:0x0_00000000-ffffffff ++ */ ++ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 ++ 0x1 0x00000000>; ++ status = "okay"; ++ }; ++ ++ genet: genet@7d580000 { ++ compatible = "brcm,genet-v5"; ++ reg = <0x0 0x7d580000 0x10000>; ++ status = "okay"; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ interrupts = , ++ ; ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii"; ++ mdio@e14 { ++ #address-cells = <0x0>; ++ #size-cells = <0x1>; ++ compatible = "brcm,genet-mdio-v5"; ++ reg = <0xe14 0x8>; ++ reg-names = "mdio"; ++ phy1: genet-phy@0 { ++ compatible = ++ "ethernet-phy-ieee802.3-c22"; ++ /* No interrupts - use PHY_POLL */ ++ max-speed = <1000>; ++ reg = <0x1>; ++ }; ++ }; ++ }; ++ ++ xhci: xhci@7e9c0000 { ++ compatible = "generic-xhci"; ++ status = "disabled"; ++ reg = <0x0 0x7e9c0000 0x100000>; ++ interrupts = ; ++ }; ++ ++ vchiq: mailbox@7e00b840 { ++ compatible = "brcm,bcm2838-vchiq"; ++ reg = <0 0x7e00b840 0x3c>; ++ interrupts = ; ++ }; ++ ++ hevc-decoder@7eb00000 { ++ compatible = "raspberrypi,argon-hevc-decoder"; ++ reg = <0x0 0x7eb00000 0x10000>; ++ status = "okay"; ++ }; ++ ++ argon-local-intc@7eb10000 { ++ compatible = "raspberrypi,argon-local-intc"; ++ reg = <0x0 0x7eb10000 0x1000>; ++ status = "okay"; ++ interrupts = ; ++ }; ++ ++ h264-decoder@7eb20000 { ++ compatible = "raspberrypi,argon-h264-decoder"; ++ reg = <0x0 0x7eb20000 0x10000>; ++ status = "okay"; ++ }; ++ ++ vp9-decoder@7eb30000 { ++ compatible = "raspberrypi,argon-vp9-decoder"; ++ reg = <0x0 0x7eb30000 0x10000>; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++&clk_osc { ++ clock-frequency = <54000000>; ++}; ++ ++&clocks { ++ compatible = "brcm,bcm2838-cprman"; ++}; ++ ++&cpu_thermal { ++ coefficients = <(-487) 410040>; ++}; ++ ++&dsi0 { ++ interrupts = ; ++}; ++ ++&dsi1 { ++ interrupts = ; ++}; ++ ++&gpio { ++ gpclk0_gpio49: gpclk0_gpio49 { ++ brcm,pins = <49>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ gpclk1_gpio50: gpclk1_gpio50 { ++ brcm,pins = <50>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ gpclk2_gpio51: gpclk2_gpio51 { ++ brcm,pins = <51>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c0_gpio46: i2c0_gpio46 { ++ brcm,pins = <46 47>; ++ brcm,function = ; ++ }; ++ i2c1_gpio46: i2c1_gpio46 { ++ brcm,pins = <46 47>; ++ brcm,function = ; ++ }; ++ i2c3_gpio2: i2c3_gpio2 { ++ brcm,pins = <2 3>; ++ brcm,function = ; ++ }; ++ i2c3_gpio4: i2c3_gpio4 { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ }; ++ i2c4_gpio6: i2c4_gpio6 { ++ brcm,pins = <6 7>; ++ brcm,function = ; ++ }; ++ i2c4_gpio8: i2c4_gpio8 { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ }; ++ i2c5_gpio10: i2c5_gpio10 { ++ brcm,pins = <10 11>; ++ brcm,function = ; ++ }; ++ i2c5_gpio12: i2c5_gpio12 { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ }; ++ i2c6_gpio0: i2c6_gpio0 { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ }; ++ i2c6_gpio22: i2c6_gpio22 { ++ brcm,pins = <22 23>; ++ brcm,function = ; ++ }; ++ i2c_slave_gpio8: i2c_slave_gpio8 { ++ brcm,pins = <8 9 10 11>; ++ brcm,function = ; ++ }; ++ ++ jtag_gpio48: jtag_gpio48 { ++ brcm,pins = <48 49 50 51 52 53>; ++ brcm,function = ; ++ }; ++ ++ mii_gpio28: mii_gpio28 { ++ brcm,pins = <28 29 30 31>; ++ brcm,function = ; ++ }; ++ mii_gpio36: mii_gpio36 { ++ brcm,pins = <36 37 38 39>; ++ brcm,function = ; ++ }; ++ ++ pcm_gpio50: pcm_gpio50 { ++ brcm,pins = <50 51 52 53>; ++ brcm,function = ; ++ }; ++ ++ pwm0_gpio52: pwm0_gpio52 { ++ brcm,pins = <52>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ pwm1_gpio53: pwm1_gpio53 { ++ brcm,pins = <53>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ /* The following group consists of: ++ * RGMII_START_STOP ++ * RGMII_RX_OK ++ */ ++ rgmii_gpio35: rgmii_gpio35 { ++ brcm,pins = <35 36>; ++ brcm,function = ; ++ }; ++ rgmii_irq_gpio34: rgmii_irq_gpio34 { ++ brcm,pins = <34>; ++ brcm,function = ; ++ }; ++ rgmii_irq_gpio39: rgmii_irq_gpio39 { ++ brcm,pins = <39>; ++ brcm,function = ; ++ }; ++ rgmii_mdio_gpio28: rgmii_mdio_gpio28 { ++ brcm,pins = <28 29>; ++ brcm,function = ; ++ }; ++ rgmii_mdio_gpio37: rgmii_mdio_gpio37 { ++ brcm,pins = <37 38>; ++ brcm,function = ; ++ }; ++ ++ spi0_gpio46: spi0_gpio46 { ++ brcm,pins = <46 47 48 49>; ++ brcm,function = ; ++ }; ++ spi2_gpio46: spi2_gpio46 { ++ brcm,pins = <46 47 48 49 50>; ++ brcm,function = ; ++ }; ++ spi3_gpio0: spi3_gpio0 { ++ brcm,pins = <0 1 2 3>; ++ brcm,function = ; ++ }; ++ spi4_gpio4: spi4_gpio4 { ++ brcm,pins = <4 5 6 7>; ++ brcm,function = ; ++ }; ++ spi5_gpio12: spi5_gpio12 { ++ brcm,pins = <12 13 14 15>; ++ brcm,function = ; ++ }; ++ spi6_gpio18: spi6_gpio18 { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = ; ++ }; ++ ++ uart2_gpio0: uart2_gpio0 { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { ++ brcm,pins = <2 3>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart3_gpio4: uart3_gpio4 { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { ++ brcm,pins = <6 7>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart4_gpio8: uart4_gpio8 { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { ++ brcm,pins = <10 11>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart5_gpio12: uart5_gpio12 { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { ++ brcm,pins = <14 15>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++}; ++ ++&vec { ++ interrupts = ; ++}; ++ ++&usb { ++ interrupts = ; ++}; ++ ++&hdmi { ++ interrupts = , ++ ; ++}; ++ ++&uart1 { ++ interrupts = ; ++}; ++ ++&spi1 { ++ interrupts = ; ++}; ++ ++&spi2 { ++ interrupts = ; ++}; ++ ++&csi0 { ++ interrupts = ; ++}; ++ ++&csi1 { ++ interrupts = ; ++}; ++ ++&sdhci { ++ interrupts = ; ++}; ++ ++&i2c0 { ++ interrupts = ; ++}; ++ ++&i2c1 { ++ interrupts = ; ++}; ++ ++&i2c2 { ++ interrupts = ; ++}; ++ ++&gpio { ++ interrupts = , ++ , ++ , ++ ; ++}; ++ ++&mailbox { ++ interrupts = ; ++}; ++ ++&rng { ++ compatible = "brcm,bcm2838-rng200"; ++}; ++ ++&sdhost { ++ interrupts = ; ++}; ++ ++&uart0 { ++ interrupts = ; ++}; ++ ++&dma { ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , /* dmalite 7 */ ++ , /* dmalite 8 */ ++ , /* dmalite 9 */ ++ , /* dmalite 10 */ ++ /* DMA4 - 40 bit DMA engines */ ++ , /* dma4 11 */ ++ , /* dma4 12 */ ++ , /* dma4 13 */ ++ ; /* dma4 14 */ ++ interrupt-names = "dma0", ++ "dma1", ++ "dma2", ++ "dma3", ++ "dma4", ++ "dma5", ++ "dma6", ++ "dma7", ++ "dma8", ++ "dma9", ++ "dma10", ++ "dma11", ++ "dma12", ++ "dma13", ++ "dma14"; ++ brcm,dma-channel-mask = <0x7ef5>; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0640-overlays-Add-i2c3-6-and-uart2-5-overlays.patch b/target/linux/brcm2708/patches-4.19/950-0640-overlays-Add-i2c3-6-and-uart2-5-overlays.patch new file mode 100644 index 000000000..a08074597 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0640-overlays-Add-i2c3-6-and-uart2-5-overlays.patch @@ -0,0 +1,359 @@ +From 3f7bbc703820266e75c079e5553289d969fe0ed7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 30 May 2019 16:44:24 +0100 +Subject: [PATCH 640/703] overlays: Add i2c3-6 and uart2-5 overlays + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 8 +++ + arch/arm/boot/dts/overlays/README | 52 ++++++++++++++++++++ + arch/arm/boot/dts/overlays/i2c3-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/i2c4-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/i2c5-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/i2c6-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/uart2-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/uart3-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/uart4-overlay.dts | 27 ++++++++++ + arch/arm/boot/dts/overlays/uart5-overlay.dts | 27 ++++++++++ + 10 files changed, 276 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/uart2-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/uart3-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/uart4-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/uart5-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -65,6 +65,10 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + i2c-sensor.dtbo \ + i2c0-bcm2708.dtbo \ + i2c1-bcm2708.dtbo \ ++ i2c3.dtbo \ ++ i2c4.dtbo \ ++ i2c5.dtbo \ ++ i2c6.dtbo \ + i2s-gpio28-31.dtbo \ + ilitek251x.dtbo \ + iqaudio-codec.dtbo \ +@@ -149,6 +153,10 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + tpm-slb9670.dtbo \ + uart0.dtbo \ + uart1.dtbo \ ++ uart2.dtbo \ ++ uart3.dtbo \ ++ uart4.dtbo \ ++ uart5.dtbo \ + udrc.dtbo \ + upstream.dtbo \ + vc4-fkms-v3d.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1137,6 +1137,34 @@ Params: sda1_pin GPIO pin + "yes") + + ++Name: i2c3 ++Info: Enable the i2c3 bus ++Load: dtoverlay=i2c3, ++Params: pins_2_3 Use GPIOs 2 and 3 ++ pins_4_5 Use GPIOs 4 and 5 (default) ++ ++ ++Name: i2c4 ++Info: Enable the i2c4 bus ++Load: dtoverlay=i2c4, ++Params: pins_6_7 Use GPIOs 6 and 7 ++ pins_8_9 Use GPIOs 8 and 9 (default) ++ ++ ++Name: i2c5 ++Info: Enable the i2c5 bus ++Load: dtoverlay=i2c5, ++Params: pins_10_11 Use GPIOs 10 and 11 ++ pins_12_13 Use GPIOs 12 and 13 (default) ++ ++ ++Name: i2c6 ++Info: Enable the i2c6 bus ++Load: dtoverlay=i2c6, ++Params: pins_0_1 Use GPIOs 0 and 1 ++ pins_22_23 Use GPIOs 22 and 23 (default) ++ ++ + Name: i2s-gpio28-31 + Info: move I2S function block to GPIO 28 to 31 + Load: dtoverlay=i2s-gpio28-31 +@@ -2199,6 +2227,30 @@ Params: txd1_pin GPIO pin + rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15) + + ++Name: uart2 ++Info: Enable uart 2 on GPIOs 0-3 ++Load: dtoverlay=uart2, ++Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off) ++ ++ ++Name: uart3 ++Info: Enable uart 3 on GPIOs 4-7 ++Load: dtoverlay=uart3, ++Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off) ++ ++ ++Name: uart4 ++Info: Enable uart 4 on GPIOs 8-11 ++Load: dtoverlay=uart4, ++Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off) ++ ++ ++Name: uart5 ++Info: Enable uart 5 on GPIOs 12-15 ++Load: dtoverlay=uart5, ++Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off) ++ ++ + Name: udrc + Info: Configures the NW Digital Radio UDRC Hat + Load: dtoverlay=udrc,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i2c3-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&i2c3>; ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c3_pins>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c3_pins>; ++ __dormant__ { ++ brcm,pins = <2 3>; ++ }; ++ }; ++ ++ __overrides__ { ++ pins_2_3 = <0>,"=1"; ++ pins_4_5 = <0>,"!1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i2c4-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&i2c4>; ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c4_pins>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c4_pins>; ++ __dormant__ { ++ brcm,pins = <6 7>; ++ }; ++ }; ++ ++ __overrides__ { ++ pins_6_7 = <0>,"=1"; ++ pins_8_9 = <0>,"!1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&i2c5>; ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c5_pins>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c5_pins>; ++ __dormant__ { ++ brcm,pins = <10 11>; ++ }; ++ }; ++ ++ __overrides__ { ++ pins_10_11 = <0>,"=1"; ++ pins_12_13 = <0>,"!1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/i2c6-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&i2c6>; ++ __overlay__ { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c6_pins>; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c6_pins>; ++ __dormant__ { ++ brcm,pins = <0 1>; ++ }; ++ }; ++ ++ __overrides__ { ++ pins_0_1 = <0>,"=1"; ++ pins_22_23 = <0>,"!1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&uart2>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart2_pins>; ++ __dormant__ { ++ brcm,pins = <0 1 2 3>; ++ brcm,pull = <0 2 2 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ ctsrts = <0>,"=1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&uart3>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart3_pins>; ++ __dormant__ { ++ brcm,pins = <4 5 6 7>; ++ brcm,pull = <0 2 2 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ ctsrts = <0>,"=1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&uart4>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart4_pins>; ++ __dormant__ { ++ brcm,pins = <8 9 10 11>; ++ brcm,pull = <0 2 2 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ ctsrts = <0>,"=1"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&uart5>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart5_pins>; ++ __dormant__ { ++ brcm,pins = <12 13 14 15>; ++ brcm,pull = <0 2 2 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ ctsrts = <0>,"=1"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0641-spi-devicetree-add-overlays-for-spi-3-to-6.patch b/target/linux/brcm2708/patches-4.19/950-0641-spi-devicetree-add-overlays-for-spi-3-to-6.patch new file mode 100644 index 000000000..f20cd10d3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0641-spi-devicetree-add-overlays-for-spi-3-to-6.patch @@ -0,0 +1,581 @@ +From 075cb9a202526c4d4e712fda5db598c28ae74e4a Mon Sep 17 00:00:00 2001 +From: Martin Sperl +Date: Sun, 12 May 2019 16:17:08 +0000 +Subject: [PATCH 641/703] spi: devicetree: add overlays for spi 3 to 6 + +Signed-off-by: Martin Sperl +--- + arch/arm/boot/dts/overlays/Makefile | 8 ++ + arch/arm/boot/dts/overlays/README | 104 ++++++++++++++++++ + .../boot/dts/overlays/spi3-1cs-overlay.dts | 44 ++++++++ + .../boot/dts/overlays/spi3-2cs-overlay.dts | 56 ++++++++++ + .../boot/dts/overlays/spi4-1cs-overlay.dts | 44 ++++++++ + .../boot/dts/overlays/spi4-2cs-overlay.dts | 56 ++++++++++ + .../boot/dts/overlays/spi5-1cs-overlay.dts | 44 ++++++++ + .../boot/dts/overlays/spi5-2cs-overlay.dts | 56 ++++++++++ + .../boot/dts/overlays/spi6-1cs-overlay.dts | 44 ++++++++ + .../boot/dts/overlays/spi6-2cs-overlay.dts | 56 ++++++++++ + 10 files changed, 512 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -144,6 +144,14 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + spi2-1cs.dtbo \ + spi2-2cs.dtbo \ + spi2-3cs.dtbo \ ++ spi3-1cs.dtbo \ ++ spi3-2cs.dtbo \ ++ spi4-1cs.dtbo \ ++ spi4-2cs.dtbo \ ++ spi5-1cs.dtbo \ ++ spi5-2cs.dtbo \ ++ spi6-1cs.dtbo \ ++ spi6-2cs.dtbo \ + ssd1306.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2085,6 +2085,110 @@ Params: cs0_pin GPIO pin + is 'okay' or enabled). + + ++Name: spi3-1cs ++Info: Enables spi3 with a single chip select (CS) line and associated spidev ++ dev node. The gpio pin number for the CS line and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi3-1cs,= ++Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev3.0 (default ++ is 'on' or enabled). ++ ++ ++Name: spi3-2cs ++Info: Enables spi3 with two chip select (CS) lines and associated spidev ++ dev nodes. The gpio pin numbers for the CS lines and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi3-2cs,= ++Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0). ++ cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev3.0 (default ++ is 'on' or enabled). ++ cs1_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev3.1 (default ++ is 'on' or enabled). ++ ++ ++Name: spi4-1cs ++Info: Enables spi4 with a single chip select (CS) line and associated spidev ++ dev node. The gpio pin number for the CS line and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi4-1cs,= ++Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev4.0 (default ++ is 'on' or enabled). ++ ++ ++Name: spi4-2cs ++Info: Enables spi4 with two chip select (CS) lines and associated spidev ++ dev nodes. The gpio pin numbers for the CS lines and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi4-2cs,= ++Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0). ++ cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev4.0 (default ++ is 'on' or enabled). ++ cs1_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev4.1 (default ++ is 'on' or enabled). ++ ++ ++Name: spi5-1cs ++Info: Enables spi5 with a single chip select (CS) line and associated spidev ++ dev node. The gpio pin numbers for the CS lines and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi5-1cs,= ++Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev5.0 (default ++ is 'on' or enabled). ++ ++ ++Name: spi5-2cs ++Info: Enables spi5 with two chip select (CS) lines and associated spidev ++ dev nodes. The gpio pin numbers for the CS lines and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi5-2cs,= ++Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0). ++ cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev5.0 (default ++ is 'on' or enabled). ++ cs1_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev5.1 (default ++ is 'on' or enabled). ++ ++ ++Name: spi6-1cs ++Info: Enables spi6 with a single chip select (CS) line and associated spidev ++ dev node. The gpio pin number for the CS line and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi6-1cs,= ++Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev6.0 (default ++ is 'on' or enabled). ++ ++ ++Name: spi6-2cs ++Info: Enables spi6 with two chip select (CS) lines and associated spidev ++ dev nodes. The gpio pin numbers for the CS lines and spidev device node ++ creation are configurable. ++Load: dtoverlay=spi6-2cs,= ++Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0). ++ cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1). ++ cs0_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev6.0 (default ++ is 'on' or enabled). ++ cs1_spidev Set to 'off' to prevent the creation of a ++ userspace device node /dev/spidev6.1 (default ++ is 'on' or enabled). ++ ++ + Name: ssd1306 + Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer. + Load: dtoverlay=ssd1306,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts +@@ -0,0 +1,44 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi3_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <0>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi3>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi3_pins &spi3_cs_pins>; ++ cs-gpios = <&gpio 0 1>; ++ status = "okay"; ++ ++ spidev3_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs0_spidev = <&spidev3_0>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts +@@ -0,0 +1,56 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi3_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <0 24>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi3>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi3_pins &spi3_cs_pins>; ++ cs-gpios = <&gpio 0 1>, <&gpio 24 1>; ++ status = "okay"; ++ ++ spidev3_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ ++ spidev3_1: spidev@1 { ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ cs0_spidev = <&spidev3_0>,"status"; ++ cs1_spidev = <&spidev3_1>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts +@@ -0,0 +1,44 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi4_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <4>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi4>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi4_pins &spi4_cs_pins>; ++ cs-gpios = <&gpio 4 1>; ++ status = "okay"; ++ ++ spidev4_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs0_spidev = <&spidev4_0>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts +@@ -0,0 +1,56 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi4_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <4 25>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi4>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi4_pins &spi4_cs_pins>; ++ cs-gpios = <&gpio 4 1>, <&gpio 25 1>; ++ status = "okay"; ++ ++ spidev4_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ ++ spidev4_1: spidev@1 { ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ cs0_spidev = <&spidev4_0>,"status"; ++ cs1_spidev = <&spidev4_1>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts +@@ -0,0 +1,44 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi5_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <12>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi5>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi5_pins &spi5_cs_pins>; ++ cs-gpios = <&gpio 12 1>; ++ status = "okay"; ++ ++ spidev5_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs0_spidev = <&spidev5_0>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts +@@ -0,0 +1,56 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi5_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <12 26>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi5>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi5_pins &spi5_cs_pins>; ++ cs-gpios = <&gpio 12 1>, <&gpio 26 1>; ++ status = "okay"; ++ ++ spidev5_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ ++ spidev5_1: spidev@1 { ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ cs0_spidev = <&spidev5_0>,"status"; ++ cs1_spidev = <&spidev5_1>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts +@@ -0,0 +1,44 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi6_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <18>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi6>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi6_pins &spi6_cs_pins>; ++ cs-gpios = <&gpio 18 1>; ++ status = "okay"; ++ ++ spidev6_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs0_spidev = <&spidev6_0>,"status"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts +@@ -0,0 +1,56 @@ ++/dts-v1/; ++/plugin/; ++ ++ ++/ { ++ compatible = "brcm,bcm2838"; ++ ++ fragment@0 { ++ target = <&spi6_cs_pins>; ++ frag0: __overlay__ { ++ brcm,pins = <18 27>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi6>; ++ frag1: __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi6_pins &spi6_cs_pins>; ++ cs-gpios = <&gpio 18 1>, <&gpio 27 1>; ++ status = "okay"; ++ ++ spidev6_0: spidev@0 { ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ ++ spidev6_1: spidev@1 { ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ cs0_pin = <&frag0>,"brcm,pins:0", ++ <&frag1>,"cs-gpios:4"; ++ cs1_pin = <&frag0>,"brcm,pins:4", ++ <&frag1>,"cs-gpios:16"; ++ cs0_spidev = <&spidev6_0>,"status"; ++ cs1_spidev = <&spidev6_1>,"status"; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0642-overlays-Add-the-spi-gpio40-45-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0642-overlays-Add-the-spi-gpio40-45-overlay.patch new file mode 100644 index 000000000..53508b260 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0642-overlays-Add-the-spi-gpio40-45-overlay.patch @@ -0,0 +1,80 @@ +From 14cd6256f49abbf230edc0c7a963f5e780255e98 Mon Sep 17 00:00:00 2001 +From: Tim Gover +Date: Tue, 22 Jan 2019 10:49:41 +0000 +Subject: [PATCH 642/703] overlays: Add the spi-gpio40-45 overlay + +The 2711 B0 boot EEPROM is programmed via SPI0 on GPIO +pins 40-43 CS0. Add a device tree overlay to optionally +change the SPI0 pinmux from the external GPIO pins to +the boot EEPROM pins. +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 ++++ + .../dts/overlays/spi-gpio40-45-overlay.dts | 36 +++++++++++++++++++ + 3 files changed, 43 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -135,6 +135,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + smi-dev.dtbo \ + smi-nand.dtbo \ + spi-gpio35-39.dtbo \ ++ spi-gpio40-45.dtbo \ + spi-rtc.dtbo \ + spi0-cs.dtbo \ + spi0-hw-cs.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1967,6 +1967,12 @@ Load: dtoverlay=spi-gpio35-39 + Params: + + ++Name: spi-gpio40-45 ++Info: Move SPI function block to GPIOs 40 to 45 ++Load: dtoverlay=spi-gpio40-45 ++Params: ++ ++ + Name: spi-rtc + Info: Adds support for a number of SPI Real Time Clock devices + Load: dtoverlay=spi-rtc,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts +@@ -0,0 +1,36 @@ ++/* ++ * Boot EEPROM overlay ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spi0_cs_pins>; ++ __overlay__ { ++ brcm,pins = <45 44 43>; ++ brcm,function = <1>; /* output */ ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spi0_pins>; ++ __overlay__ { ++ brcm,pins = <40 41 42>; ++ brcm,function = <3>; /* alt4 */ ++ status = "okay"; ++ }; ++ }; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0643-config-Permit-LPAE-and-PCIE_BRCMSTB-on-BCM2835.patch b/target/linux/brcm2708/patches-4.19/950-0643-config-Permit-LPAE-and-PCIE_BRCMSTB-on-BCM2835.patch new file mode 100644 index 000000000..aa8bd7786 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0643-config-Permit-LPAE-and-PCIE_BRCMSTB-on-BCM2835.patch @@ -0,0 +1,44 @@ +From fde90a0d1ca0b9a7dc0a7beec2ef60ec71b5cc7d Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 4 Sep 2018 11:50:25 +0100 +Subject: [PATCH 643/703] config: Permit LPAE and PCIE_BRCMSTB on BCM2835 + +--- + arch/arm/mach-bcm/Kconfig | 4 ++++ + drivers/pci/controller/Kconfig | 4 ++-- + 2 files changed, 6 insertions(+), 2 deletions(-) + +--- a/arch/arm/mach-bcm/Kconfig ++++ b/arch/arm/mach-bcm/Kconfig +@@ -161,6 +161,7 @@ config ARCH_BCM2835 + select GPIOLIB + select ARM_AMBA + select ARM_ERRATA_411920 if ARCH_MULTI_V6 ++ select ARM_GIC + select ARM_TIMER_SP804 + select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 + select TIMER_OF +@@ -169,6 +170,9 @@ config ARCH_BCM2835 + select PINCTRL + select PINCTRL_BCM2835 + select MFD_SYSCON if ARCH_MULTI_V7 ++ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE ++ select ZONE_DMA if ARM_LPAE ++ select MFD_CORE + help + This enables support for the Broadcom BCM2835 and BCM2836 SoCs. + This SoC is used in the Raspberry Pi and Roku 2 devices. +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -280,9 +280,9 @@ config VMD + + config PCIE_BRCMSTB + tristate "Broadcom Brcmstb PCIe platform host driver" +- depends on ARCH_BRCMSTB || BMIPS_GENERIC ++ depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM2835 + depends on OF +- depends on SOC_BRCMSTB ++ depends on SOC_BRCMSTB || ARCH_BCM2835 + default ARCH_BRCMSTB || BMIPS_GENERIC + help + Adds support for Broadcom Settop Box PCIe host controller. diff --git a/target/linux/brcm2708/patches-4.19/950-0644-configs-Add-bcm2711_defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0644-configs-Add-bcm2711_defconfig.patch new file mode 100644 index 000000000..a81354df7 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0644-configs-Add-bcm2711_defconfig.patch @@ -0,0 +1,1343 @@ +From 5ae8b0086763f26a25da24133eca8ecd3e5ef5a5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 May 2019 15:40:21 +0100 +Subject: [PATCH 644/703] configs: Add bcm2711_defconfig + +--- + arch/arm/configs/bcm2711_defconfig | 1330 ++++++++++++++++++++++++++++ + 1 file changed, 1330 insertions(+) + create mode 100644 arch/arm/configs/bcm2711_defconfig + +--- /dev/null ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -0,0 +1,1330 @@ ++CONFIG_LOCALVERSION="-v7l" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_GENERIC_IRQ_DEBUGFS=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT_VOLUNTARY=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y ++CONFIG_IKCONFIG=m ++CONFIG_IKCONFIG_PROC=y ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CPUSETS=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EMBEDDED=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_PROFILING=y ++CONFIG_ARCH_BCM=y ++CONFIG_ARCH_BCM2835=y ++CONFIG_ARM_LPAE=y ++# CONFIG_CACHE_L2X0 is not set ++CONFIG_PCI=y ++CONFIG_PCI_MSI=y ++CONFIG_PCIE_BRCMSTB=y ++CONFIG_SMP=y ++CONFIG_HIGHMEM=y ++CONFIG_UACCESS_WITH_MEMCPY=y ++CONFIG_SECCOMP=y ++# CONFIG_ATAGS is not set ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_VFP=y ++CONFIG_NEON=y ++CONFIG_KERNEL_MODE_NEON=y ++# CONFIG_SUSPEND is not set ++CONFIG_PM=y ++CONFIG_RASPBERRYPI_FIRMWARE=y ++CONFIG_ARM_CRYPTO=y ++CONFIG_CRYPTO_SHA1_ARM_NEON=m ++CONFIG_CRYPTO_AES_ARM=m ++CONFIG_CRYPTO_AES_ARM_BS=m ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_BINFMT_MISC=m ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_CMA=y ++CONFIG_ZSMALLOC=m ++CONFIG_PGTABLE_MAPPING=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_MULTIPLE_TABLES=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_IP_ROUTE_VERBOSE=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE_DEMUX=m ++CONFIG_NET_IPGRE=m ++CONFIG_IP_MROUTE=y ++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IP_PIMSM_V1=y ++CONFIG_IP_PIMSM_V2=y ++CONFIG_SYN_COOKIES=y ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++CONFIG_INET_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m ++CONFIG_IPV6=m ++CONFIG_IPV6_ROUTER_PREF=y ++CONFIG_IPV6_ROUTE_INFO=y ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_SIT_6RD=y ++CONFIG_IPV6_TUNNEL=m ++CONFIG_IPV6_MULTIPLE_TABLES=y ++CONFIG_IPV6_SUBTREES=y ++CONFIG_IPV6_MROUTE=y ++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IPV6_PIMSM_V2=y ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_ZONES=y ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_TIMESTAMP=y ++CONFIG_NF_CONNTRACK_AMANDA=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NETFILTER_XT_SET=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TPROXY=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_SET=m ++CONFIG_IP_SET_BITMAP_IP=m ++CONFIG_IP_SET_BITMAP_IPMAC=m ++CONFIG_IP_SET_BITMAP_PORT=m ++CONFIG_IP_SET_HASH_IP=m ++CONFIG_IP_SET_HASH_IPPORT=m ++CONFIG_IP_SET_HASH_IPPORTIP=m ++CONFIG_IP_SET_HASH_IPPORTNET=m ++CONFIG_IP_SET_HASH_NET=m ++CONFIG_IP_SET_HASH_NETPORT=m ++CONFIG_IP_SET_HASH_NETIFACE=m ++CONFIG_IP_SET_LIST_SET=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_PROTO_ESP=y ++CONFIG_IP_VS_PROTO_AH=y ++CONFIG_IP_VS_PROTO_SCTP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_WRR=m ++CONFIG_IP_VS_LC=m ++CONFIG_IP_VS_WLC=m ++CONFIG_IP_VS_LBLC=m ++CONFIG_IP_VS_LBLCR=m ++CONFIG_IP_VS_DH=m ++CONFIG_IP_VS_SH=m ++CONFIG_IP_VS_SED=m ++CONFIG_IP_VS_NQ=m ++CONFIG_IP_VS_FTP=m ++CONFIG_IP_VS_PE_SIP=m ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_NAT=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RPFILTER=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_HL=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m ++CONFIG_IP6_NF_NAT=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++CONFIG_BRIDGE_EBT_IP6=m ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_NFLOG=m ++CONFIG_SCTP_COOKIE_HMAC_SHA1=y ++CONFIG_ATM=m ++CONFIG_L2TP=m ++CONFIG_L2TP_V3=y ++CONFIG_L2TP_IP=m ++CONFIG_L2TP_ETH=m ++CONFIG_BRIDGE=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_ATALK=m ++CONFIG_6LOWPAN=m ++CONFIG_IEEE802154=m ++CONFIG_IEEE802154_6LOWPAN=m ++CONFIG_MAC802154=m ++CONFIG_NET_SCHED=y ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_ATM=m ++CONFIG_NET_SCH_PRIO=m ++CONFIG_NET_SCH_MULTIQ=m ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFB=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++CONFIG_NET_SCH_DRR=m ++CONFIG_NET_SCH_MQPRIO=m ++CONFIG_NET_SCH_CHOKE=m ++CONFIG_NET_SCH_QFQ=m ++CONFIG_NET_SCH_CODEL=m ++CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_FQ=m ++CONFIG_NET_SCH_HHF=m ++CONFIG_NET_SCH_PIE=m ++CONFIG_NET_SCH_INGRESS=m ++CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++CONFIG_NET_CLS_FLOW=m ++CONFIG_NET_CLS_CGROUP=m ++CONFIG_NET_EMATCH=y ++CONFIG_NET_EMATCH_CMP=m ++CONFIG_NET_EMATCH_NBYTE=m ++CONFIG_NET_EMATCH_U32=m ++CONFIG_NET_EMATCH_META=m ++CONFIG_NET_EMATCH_TEXT=m ++CONFIG_NET_EMATCH_IPSET=m ++CONFIG_NET_CLS_ACT=y ++CONFIG_NET_ACT_POLICE=m ++CONFIG_NET_ACT_GACT=m ++CONFIG_GACT_PROB=y ++CONFIG_NET_ACT_MIRRED=m ++CONFIG_NET_ACT_IPT=m ++CONFIG_NET_ACT_NAT=m ++CONFIG_NET_ACT_PEDIT=m ++CONFIG_NET_ACT_SIMP=m ++CONFIG_NET_ACT_SKBEDIT=m ++CONFIG_NET_ACT_CSUM=m ++CONFIG_BATMAN_ADV=m ++CONFIG_OPENVSWITCH=m ++CONFIG_NET_PKTGEN=m ++CONFIG_HAMRADIO=y ++CONFIG_AX25=m ++CONFIG_NETROM=m ++CONFIG_ROSE=m ++CONFIG_MKISS=m ++CONFIG_6PACK=m ++CONFIG_BPQETHER=m ++CONFIG_BAYCOM_SER_FDX=m ++CONFIG_BAYCOM_SER_HDX=m ++CONFIG_YAM=m ++CONFIG_CAN=m ++CONFIG_CAN_VCAN=m ++CONFIG_CAN_SLCAN=m ++CONFIG_CAN_MCP251X=m ++CONFIG_CAN_GS_USB=m ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_6LOWPAN=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIUART=m ++CONFIG_BT_HCIUART_3WIRE=y ++CONFIG_BT_HCIUART_BCM=y ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_BT_WILINK=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_RFKILL=m ++CONFIG_RFKILL_INPUT=y ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_DMA_CMA=y ++CONFIG_CMA_SIZE_MBYTES=5 ++CONFIG_MTD=m ++CONFIG_MTD_BLOCK=m ++CONFIG_MTD_M25P80=m ++CONFIG_MTD_BLOCK2MTD=m ++CONFIG_MTD_NAND=m ++CONFIG_MTD_SPI_NOR=m ++CONFIG_MTD_UBI=m ++CONFIG_OF_CONFIGFS=y ++CONFIG_ZRAM=m ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_DRBD=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_ATA_OVER_ETH=m ++CONFIG_EEPROM_AT24=m ++CONFIG_TI_ST=m ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_CHR_DEV_ST=m ++CONFIG_CHR_DEV_OSST=m ++CONFIG_BLK_DEV_SR=m ++CONFIG_CHR_DEV_SG=m ++CONFIG_SCSI_ISCSI_ATTRS=y ++CONFIG_ISCSI_TCP=m ++CONFIG_ISCSI_BOOT_SYSFS=m ++CONFIG_MD=y ++CONFIG_MD_LINEAR=m ++CONFIG_BLK_DEV_DM=m ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m ++CONFIG_DM_MIRROR=m ++CONFIG_DM_LOG_USERSPACE=m ++CONFIG_DM_RAID=m ++CONFIG_DM_ZERO=m ++CONFIG_DM_DELAY=m ++CONFIG_NETDEVICES=y ++CONFIG_BONDING=m ++CONFIG_DUMMY=m ++CONFIG_IFB=m ++CONFIG_MACVLAN=m ++CONFIG_IPVLAN=m ++CONFIG_VXLAN=m ++CONFIG_NETCONSOLE=m ++CONFIG_TUN=m ++CONFIG_VETH=m ++CONFIG_BCMGENET=y ++CONFIG_ENC28J60=m ++CONFIG_QCA7000_SPI=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_BROADCOM_PHY=y ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOATM=m ++CONFIG_PPPOE=m ++CONFIG_PPPOL2TP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_SLIP_SMART=y ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=y ++CONFIG_USB_LAN78XX=y ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX88179_178A=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_CDC_NCM=m ++CONFIG_USB_NET_HUAWEI_CDC_NCM=m ++CONFIG_USB_NET_CDC_MBIM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SR9700=m ++CONFIG_USB_NET_SR9800=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_USB_HSO=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_USB=m ++CONFIG_AR5523=m ++CONFIG_AT76C50X_USB=m ++CONFIG_B43=m ++# CONFIG_B43_PHY_N is not set ++CONFIG_B43LEGACY=m ++CONFIG_BRCMFMAC=m ++CONFIG_BRCMFMAC_USB=y ++CONFIG_BRCMDBG=y ++CONFIG_HOSTAP=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_MT7601U=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT3573=y ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RT2800USB_RT55XX=y ++CONFIG_RT2800USB_UNKNOWN=y ++CONFIG_RTL8187=m ++CONFIG_RTL8192CU=m ++CONFIG_RTL8XXXU=m ++CONFIG_USB_ZD1201=m ++CONFIG_ZD1211RW=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_IEEE802154_AT86RF230=m ++CONFIG_IEEE802154_MRF24J40=m ++CONFIG_IEEE802154_CC2520=m ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_KEYBOARD_ATKBD is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_MATRIX=m ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_JOYSTICK=y ++CONFIG_JOYSTICK_IFORCE=m ++CONFIG_JOYSTICK_IFORCE_USB=y ++CONFIG_JOYSTICK_XPAD=m ++CONFIG_JOYSTICK_XPAD_FF=y ++CONFIG_JOYSTICK_XPAD_LEDS=y ++CONFIG_JOYSTICK_PSXPAD_SPI=m ++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y ++CONFIG_JOYSTICK_RPISENSE=m ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_ADS7846=m ++CONFIG_TOUCHSCREEN_EGALAX=m ++CONFIG_TOUCHSCREEN_EXC3000=m ++CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_EDT_FT5X06=m ++CONFIG_TOUCHSCREEN_RPI_FT5406=m ++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m ++CONFIG_TOUCHSCREEN_STMPE=m ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_BRCM_CHAR_DRIVERS=y ++CONFIG_BCM_VCIO=y ++CONFIG_BCM_VC_SM=y ++CONFIG_BCM2835_DEVGPIOMEM=y ++CONFIG_ARGON_MEM=m ++# CONFIG_LEGACY_PTYS is not set ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++# CONFIG_SERIAL_8250_DMA is not set ++CONFIG_SERIAL_8250_NR_UARTS=1 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=0 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_BCM2835AUX=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_SERIAL_SC16IS7XX=m ++CONFIG_SERIAL_SC16IS7XX_SPI=y ++CONFIG_SERIAL_DEV_BUS=m ++CONFIG_TTY_PRINTK=y ++CONFIG_HW_RANDOM=y ++CONFIG_RAW_DRIVER=y ++CONFIG_I2C=y ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_BCM2708=m ++CONFIG_I2C_BCM2835=m ++CONFIG_I2C_GPIO=m ++CONFIG_I2C_ROBOTFUZZ_OSIF=m ++CONFIG_I2C_TINY_USB=m ++CONFIG_SPI=y ++CONFIG_SPI_BCM2835=m ++CONFIG_SPI_BCM2835AUX=m ++CONFIG_SPI_SPIDEV=m ++CONFIG_SPI_SLAVE=y ++CONFIG_PPS=m ++CONFIG_PPS_CLIENT_LDISC=m ++CONFIG_PPS_CLIENT_GPIO=m ++CONFIG_PINCTRL_MCP23S08=m ++CONFIG_GPIO_BCM_VIRT=y ++CONFIG_GPIO_MOCKUP=m ++CONFIG_GPIO_PCF857X=m ++CONFIG_GPIO_ARIZONA=m ++CONFIG_GPIO_STMPE=y ++CONFIG_W1=m ++CONFIG_W1_MASTER_DS2490=m ++CONFIG_W1_MASTER_DS2482=m ++CONFIG_W1_MASTER_DS1WM=m ++CONFIG_W1_MASTER_GPIO=m ++CONFIG_W1_SLAVE_THERM=m ++CONFIG_W1_SLAVE_SMEM=m ++CONFIG_W1_SLAVE_DS2408=m ++CONFIG_W1_SLAVE_DS2413=m ++CONFIG_W1_SLAVE_DS2406=m ++CONFIG_W1_SLAVE_DS2423=m ++CONFIG_W1_SLAVE_DS2431=m ++CONFIG_W1_SLAVE_DS2433=m ++CONFIG_W1_SLAVE_DS2438=m ++CONFIG_W1_SLAVE_DS2780=m ++CONFIG_W1_SLAVE_DS2781=m ++CONFIG_W1_SLAVE_DS28E04=m ++CONFIG_POWER_RESET=y ++CONFIG_POWER_RESET_GPIO=y ++CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_GAUGE_LTC2941=m ++CONFIG_HWMON=m ++CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_JC42=m ++CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RPI_POE_FAN=m ++CONFIG_SENSORS_SHT21=m ++CONFIG_SENSORS_SHT3x=m ++CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_ADS1015=m ++CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_TMP102=m ++CONFIG_THERMAL=y ++CONFIG_BCM2835_THERMAL=y ++CONFIG_BRCMSTB_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_GPIO_WATCHDOG=m ++CONFIG_BCM2835_WDT=y ++CONFIG_MFD_STMPE=y ++CONFIG_STMPE_SPI=y ++CONFIG_MFD_ARIZONA_I2C=m ++CONFIG_MFD_ARIZONA_SPI=m ++CONFIG_MFD_WM5102=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=m ++CONFIG_REGULATOR_ARIZONA_LDO1=m ++CONFIG_REGULATOR_ARIZONA_MICSUPP=m ++CONFIG_REGULATOR_GPIO=y ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y ++CONFIG_VIDEO_V4L2_SUBDEV_API=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_M5602=m ++CONFIG_USB_STV06XX=m ++CONFIG_USB_GL860=m ++CONFIG_USB_GSPCA_BENQ=m ++CONFIG_USB_GSPCA_CONEX=m ++CONFIG_USB_GSPCA_CPIA1=m ++CONFIG_USB_GSPCA_DTCS033=m ++CONFIG_USB_GSPCA_ETOMS=m ++CONFIG_USB_GSPCA_FINEPIX=m ++CONFIG_USB_GSPCA_JEILINJ=m ++CONFIG_USB_GSPCA_JL2005BCD=m ++CONFIG_USB_GSPCA_KINECT=m ++CONFIG_USB_GSPCA_KONICA=m ++CONFIG_USB_GSPCA_MARS=m ++CONFIG_USB_GSPCA_MR97310A=m ++CONFIG_USB_GSPCA_NW80X=m ++CONFIG_USB_GSPCA_OV519=m ++CONFIG_USB_GSPCA_OV534=m ++CONFIG_USB_GSPCA_OV534_9=m ++CONFIG_USB_GSPCA_PAC207=m ++CONFIG_USB_GSPCA_PAC7302=m ++CONFIG_USB_GSPCA_PAC7311=m ++CONFIG_USB_GSPCA_SE401=m ++CONFIG_USB_GSPCA_SN9C2028=m ++CONFIG_USB_GSPCA_SN9C20X=m ++CONFIG_USB_GSPCA_SONIXB=m ++CONFIG_USB_GSPCA_SONIXJ=m ++CONFIG_USB_GSPCA_SPCA500=m ++CONFIG_USB_GSPCA_SPCA501=m ++CONFIG_USB_GSPCA_SPCA505=m ++CONFIG_USB_GSPCA_SPCA506=m ++CONFIG_USB_GSPCA_SPCA508=m ++CONFIG_USB_GSPCA_SPCA561=m ++CONFIG_USB_GSPCA_SPCA1528=m ++CONFIG_USB_GSPCA_SQ905=m ++CONFIG_USB_GSPCA_SQ905C=m ++CONFIG_USB_GSPCA_SQ930X=m ++CONFIG_USB_GSPCA_STK014=m ++CONFIG_USB_GSPCA_STK1135=m ++CONFIG_USB_GSPCA_STV0680=m ++CONFIG_USB_GSPCA_SUNPLUS=m ++CONFIG_USB_GSPCA_T613=m ++CONFIG_USB_GSPCA_TOPRO=m ++CONFIG_USB_GSPCA_TV8532=m ++CONFIG_USB_GSPCA_VC032X=m ++CONFIG_USB_GSPCA_VICAM=m ++CONFIG_USB_GSPCA_XIRLINK_CIT=m ++CONFIG_USB_GSPCA_ZC3XX=m ++CONFIG_USB_PWC=m ++CONFIG_VIDEO_CPIA2=m ++CONFIG_USB_ZR364XX=m ++CONFIG_USB_STKWEBCAM=m ++CONFIG_USB_S2255=m ++CONFIG_VIDEO_USBTV=m ++CONFIG_VIDEO_PVRUSB2=m ++CONFIG_VIDEO_HDPVR=m ++CONFIG_VIDEO_USBVISION=m ++CONFIG_VIDEO_STK1160_COMMON=m ++CONFIG_VIDEO_GO7007=m ++CONFIG_VIDEO_GO7007_USB=m ++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m ++CONFIG_VIDEO_AU0828=m ++CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9035=m ++CONFIG_DVB_USB_ANYSEE=m ++CONFIG_DVB_USB_AU6610=m ++CONFIG_DVB_USB_AZ6007=m ++CONFIG_DVB_USB_CE6230=m ++CONFIG_DVB_USB_EC168=m ++CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_DVBSKY=m ++CONFIG_SMS_USB_DRV=m ++CONFIG_DVB_B2C2_FLEXCOP_USB=m ++CONFIG_DVB_AS102=m ++CONFIG_VIDEO_EM28XX=m ++CONFIG_VIDEO_EM28XX_V4L2=m ++CONFIG_VIDEO_EM28XX_ALSA=m ++CONFIG_VIDEO_EM28XX_DVB=m ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_VIDEO_BCM2835_UNICAM=m ++CONFIG_RADIO_SI470X=m ++CONFIG_USB_SI470X=m ++CONFIG_I2C_SI470X=m ++CONFIG_RADIO_SI4713=m ++CONFIG_I2C_SI4713=m ++CONFIG_USB_MR800=m ++CONFIG_USB_DSBR=m ++CONFIG_RADIO_SHARK=m ++CONFIG_RADIO_SHARK2=m ++CONFIG_USB_KEENE=m ++CONFIG_USB_MA901=m ++CONFIG_RADIO_TEA5764=m ++CONFIG_RADIO_SAA7706H=m ++CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL1273=m ++CONFIG_RADIO_WL128X=m ++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set ++CONFIG_VIDEO_UDA1342=m ++CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_ADV7180=m ++CONFIG_VIDEO_TC358743=m ++CONFIG_VIDEO_TVP5150=m ++CONFIG_VIDEO_TW2804=m ++CONFIG_VIDEO_TW9903=m ++CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV5647=m ++CONFIG_VIDEO_OV7640=m ++CONFIG_VIDEO_MT9V011=m ++CONFIG_DRM=m ++CONFIG_DRM_LOAD_EDID_FIRMWARE=y ++CONFIG_DRM_UDL=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m ++CONFIG_DRM_V3D=m ++CONFIG_DRM_VC4=m ++CONFIG_DRM_TINYDRM=m ++CONFIG_TINYDRM_MI0283QT=m ++CONFIG_TINYDRM_REPAPER=m ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FB_UDL=m ++CONFIG_FB_SIMPLE=y ++CONFIG_FB_SSD1307=m ++CONFIG_FB_RPISENSE=m ++# CONFIG_BACKLIGHT_GENERIC is not set ++CONFIG_BACKLIGHT_RPI=m ++CONFIG_BACKLIGHT_GPIO=m ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_CAIAQ_INPUT=y ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SND_USB_HIFACE=m ++CONFIG_SND_SOC=m ++CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m ++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m ++CONFIG_SND_BCM2708_SOC_RPI_DAC=m ++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m ++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m ++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_DIGIDAC1_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m ++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m ++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m ++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m ++CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_ADAU1701=m ++CONFIG_SND_SOC_ADAU7002=m ++CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_SPDIF=m ++CONFIG_SND_SOC_WM8804_I2C=m ++CONFIG_SND_SIMPLE_CARD=m ++CONFIG_HID_BATTERY_STRENGTH=y ++CONFIG_HIDRAW=y ++CONFIG_UHID=m ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_ASUS=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_BETOP_FF=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_ELO=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_GEMBIRD=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_LOGITECH_DJ=m ++CONFIG_LOGITECH_FF=y ++CONFIG_LOGIRUMBLEPAD2_FF=y ++CONFIG_LOGIG940_FF=y ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_SONY_FF=y ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THINGM=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_XINMO=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_PRINTER=m ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=y ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USBIP_CORE=m ++CONFIG_USBIP_VHCI_HCD=m ++CONFIG_USBIP_HOST=m ++CONFIG_USB_DWC2=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_F81232=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_METRO=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_XSENS_MT=m ++CONFIG_USB_SERIAL_WISHBONE=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_QT2=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_USB_ATM=m ++CONFIG_USB_SPEEDTOUCH=m ++CONFIG_USB_CXACRU=m ++CONFIG_USB_UEAGLEATM=m ++CONFIG_USB_XUSBATM=m ++CONFIG_USB_GADGET=m ++CONFIG_USB_CONFIGFS=m ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++CONFIG_USB_CONFIGFS_OBEX=y ++CONFIG_USB_CONFIGFS_NCM=y ++CONFIG_USB_CONFIGFS_ECM=y ++CONFIG_USB_CONFIGFS_ECM_SUBSET=y ++CONFIG_USB_CONFIGFS_RNDIS=y ++CONFIG_USB_CONFIGFS_EEM=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_USB_CONFIGFS_F_UAC1=y ++CONFIG_USB_CONFIGFS_F_UAC2=y ++CONFIG_USB_CONFIGFS_F_MIDI=y ++CONFIG_USB_CONFIGFS_F_HID=y ++CONFIG_USB_CONFIGFS_F_UVC=y ++CONFIG_USB_CONFIGFS_F_PRINTER=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_AUDIO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_USB_MIDI_GADGET=m ++CONFIG_USB_G_PRINTER=m ++CONFIG_USB_CDC_COMPOSITE=m ++CONFIG_USB_G_ACM_MS=m ++CONFIG_USB_G_MULTI=m ++CONFIG_USB_G_HID=m ++CONFIG_USB_G_WEBCAM=m ++CONFIG_MMC=y ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_BCM2835_MMC=y ++CONFIG_MMC_BCM2835_DMA=y ++CONFIG_MMC_BCM2835_SDHOST=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_IPROC=y ++CONFIG_MMC_SPI=m ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_ONESHOT=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_TRANSIENT=m ++CONFIG_LEDS_TRIGGER_CAMERA=m ++CONFIG_LEDS_TRIGGER_INPUT=y ++CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_RTC_CLASS=y ++# CONFIG_RTC_HCTOSYS is not set ++CONFIG_RTC_DRV_ABX80X=m ++CONFIG_RTC_DRV_DS1307=m ++CONFIG_RTC_DRV_DS1374=m ++CONFIG_RTC_DRV_DS1672=m ++CONFIG_RTC_DRV_MAX6900=m ++CONFIG_RTC_DRV_RS5C372=m ++CONFIG_RTC_DRV_ISL1208=m ++CONFIG_RTC_DRV_ISL12022=m ++CONFIG_RTC_DRV_X1205=m ++CONFIG_RTC_DRV_PCF8523=m ++CONFIG_RTC_DRV_PCF8563=m ++CONFIG_RTC_DRV_PCF8583=m ++CONFIG_RTC_DRV_M41T80=m ++CONFIG_RTC_DRV_BQ32K=m ++CONFIG_RTC_DRV_S35390A=m ++CONFIG_RTC_DRV_FM3130=m ++CONFIG_RTC_DRV_RX8581=m ++CONFIG_RTC_DRV_RX8025=m ++CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_M41T93=m ++CONFIG_RTC_DRV_M41T94=m ++CONFIG_RTC_DRV_DS1302=m ++CONFIG_RTC_DRV_DS1305=m ++CONFIG_RTC_DRV_DS1390=m ++CONFIG_RTC_DRV_R9701=m ++CONFIG_RTC_DRV_RX4581=m ++CONFIG_RTC_DRV_RS5C348=m ++CONFIG_RTC_DRV_MAX6902=m ++CONFIG_RTC_DRV_PCF2123=m ++CONFIG_RTC_DRV_DS3232=m ++CONFIG_RTC_DRV_PCF2127=m ++CONFIG_RTC_DRV_RV3029C2=m ++CONFIG_DMADEVICES=y ++CONFIG_DMA_BCM2835=y ++CONFIG_DMA_BCM2708=y ++CONFIG_UIO=m ++CONFIG_UIO_PDRV_GENIRQ=m ++CONFIG_STAGING=y ++CONFIG_PRISM2_USB=m ++CONFIG_R8712U=m ++CONFIG_R8188EU=m ++CONFIG_VT6656=m ++CONFIG_SPEAKUP=m ++CONFIG_SPEAKUP_SYNTH_SOFT=m ++CONFIG_STAGING_MEDIA=y ++CONFIG_FB_TFT=m ++CONFIG_FB_TFT_AGM1264K_FL=m ++CONFIG_FB_TFT_BD663474=m ++CONFIG_FB_TFT_HX8340BN=m ++CONFIG_FB_TFT_HX8347D=m ++CONFIG_FB_TFT_HX8353D=m ++CONFIG_FB_TFT_HX8357D=m ++CONFIG_FB_TFT_ILI9163=m ++CONFIG_FB_TFT_ILI9320=m ++CONFIG_FB_TFT_ILI9325=m ++CONFIG_FB_TFT_ILI9340=m ++CONFIG_FB_TFT_ILI9341=m ++CONFIG_FB_TFT_ILI9481=m ++CONFIG_FB_TFT_ILI9486=m ++CONFIG_FB_TFT_PCD8544=m ++CONFIG_FB_TFT_RA8875=m ++CONFIG_FB_TFT_S6D02A1=m ++CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SSD1289=m ++CONFIG_FB_TFT_SSD1306=m ++CONFIG_FB_TFT_SSD1331=m ++CONFIG_FB_TFT_SSD1351=m ++CONFIG_FB_TFT_ST7735R=m ++CONFIG_FB_TFT_ST7789V=m ++CONFIG_FB_TFT_TINYLCD=m ++CONFIG_FB_TFT_TLS8204=m ++CONFIG_FB_TFT_UC1701=m ++CONFIG_FB_TFT_UPD161704=m ++CONFIG_FB_TFT_WATTEROTT=m ++CONFIG_FB_FLEX=m ++CONFIG_FB_TFT_FBTFT_DEVICE=m ++CONFIG_BCM2835_VCHIQ=y ++CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m ++CONFIG_MAILBOX=y ++CONFIG_BCM2835_MBOX=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_BCM2835_POWER=y ++CONFIG_RASPBERRYPI_POWER=y ++CONFIG_EXTCON=m ++CONFIG_EXTCON_ARIZONA=m ++CONFIG_IIO=m ++CONFIG_IIO_BUFFER_CB=m ++CONFIG_MCP320X=m ++CONFIG_MCP3422=m ++CONFIG_DHT11=m ++CONFIG_HDC100X=m ++CONFIG_HTU21=m ++CONFIG_TSL4531=m ++CONFIG_VEML6070=m ++CONFIG_BMP280=m ++CONFIG_PWM_BCM2835=m ++CONFIG_PWM_PCA9685=m ++CONFIG_GENERIC_PHY=y ++CONFIG_RPI_AXIPERF=m ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_F2FS_FS=y ++CONFIG_FANOTIFY=y ++CONFIG_QFMT_V1=m ++CONFIG_QFMT_V2=m ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_OVERLAY_FS=m ++CONFIG_FSCACHE=y ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_HISTOGRAM=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_NTFS_RW=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_ECRYPT_FS=m ++CONFIG_HFS_FS=m ++CONFIG_HFSPLUS_FS=m ++CONFIG_JFFS2_FS=m ++CONFIG_JFFS2_SUMMARY=y ++CONFIG_UBIFS_FS=m ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_SWAP=y ++CONFIG_NFS_V4_1=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_NFSD=m ++CONFIG_NFSD_V3_ACL=y ++CONFIG_NFSD_V4=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_UPCALL=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_CIFS_ACL=y ++CONFIG_CIFS_DFS_UPCALL=y ++CONFIG_CIFS_FSCACHE=y ++CONFIG_9P_FS=m ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_DLM=m ++CONFIG_CRYPTO_USER=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_CTS=m ++CONFIG_CRYPTO_XTS=m ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_LZ4=m ++CONFIG_CRYPTO_USER_API_SKCIPHER=m ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y ++CONFIG_PRINTK_TIME=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_DETECT_HUNG_TASK=y ++# CONFIG_RCU_TRACE is not set ++CONFIG_LATENCYTOP=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++# CONFIG_UPROBE_EVENTS is not set ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y diff --git a/target/linux/brcm2708/patches-4.19/950-0645-2711-Add-basic-64-bit-support.patch b/target/linux/brcm2708/patches-4.19/950-0645-2711-Add-basic-64-bit-support.patch new file mode 100644 index 000000000..c82eef690 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0645-2711-Add-basic-64-bit-support.patch @@ -0,0 +1,1329 @@ +From 45c6bd73ebe19c29ccdd6f56b52b0f03c9aed562 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 8 Mar 2019 21:12:39 +0000 +Subject: [PATCH 645/703] 2711: Add basic 64-bit support + +This commit adds initial support for 64-bit 2711 builds. However, +it will only work as much as it does if the Pi4 RAM is limited to +1GB - more than that and several things break (SD card, coherent +allocations, etc.) + +Signed-off-by: Phil Elwell +--- + arch/arm64/boot/dts/broadcom/Makefile | 1 + + .../boot/dts/broadcom/bcm2711-rpi-4-b.dts | 3 + + arch/arm64/configs/bcm2711_defconfig | 1291 +++++++++++++++++ + 3 files changed, 1295 insertions(+) + create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts + create mode 100644 arch/arm64/configs/bcm2711_defconfig + +--- a/arch/arm64/boot/dts/broadcom/Makefile ++++ b/arch/arm64/boot/dts/broadcom/Makefile +@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp + bcm2837-rpi-3-b-plus.dtb + dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb ++dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb + dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-cm3.dtb + dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts +@@ -0,0 +1,3 @@ ++#define RPI364 ++ ++#include "../../../../arm/boot/dts/bcm2711-rpi-4-b.dts" +--- /dev/null ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -0,0 +1,1291 @@ ++CONFIG_LOCALVERSION="-v8" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_GENERIC_IRQ_DEBUGFS=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_PREEMPT=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y ++CONFIG_IKCONFIG=m ++CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CPUSETS=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_NAMESPACES=y ++CONFIG_USER_NS=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_EMBEDDED=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_PROFILING=y ++CONFIG_ARCH_BCM2835=y ++CONFIG_PCI=y ++CONFIG_PCIE_BRCMSTB=y ++# CONFIG_CAVIUM_ERRATUM_22375 is not set ++# CONFIG_CAVIUM_ERRATUM_23154 is not set ++# CONFIG_CAVIUM_ERRATUM_27456 is not set ++CONFIG_SECCOMP=y ++CONFIG_ARMV8_DEPRECATED=y ++CONFIG_SWP_EMULATION=y ++CONFIG_CP15_BARRIER_EMULATION=y ++CONFIG_SETEND_EMULATION=y ++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" ++CONFIG_COMPAT=y ++# CONFIG_SUSPEND is not set ++CONFIG_PM=y ++CONFIG_CPU_IDLE=y ++CONFIG_ARM_CPUIDLE=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y ++CONFIG_RASPBERRYPI_FIRMWARE=y ++CONFIG_ARM64_CRYPTO=y ++CONFIG_CRYPTO_AES_ARM64_BS=m ++CONFIG_KPROBES=y ++CONFIG_JUMP_LABEL=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y ++CONFIG_BINFMT_MISC=m ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_CMA=y ++CONFIG_ZSMALLOC=m ++CONFIG_PGTABLE_MAPPING=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_MULTIPLE_TABLES=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_IP_ROUTE_VERBOSE=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE_DEMUX=m ++CONFIG_NET_IPGRE=m ++CONFIG_IP_MROUTE=y ++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IP_PIMSM_V1=y ++CONFIG_IP_PIMSM_V2=y ++CONFIG_SYN_COOKIES=y ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++CONFIG_INET_DIAG=m ++CONFIG_TCP_CONG_ADVANCED=y ++CONFIG_TCP_CONG_BBR=m ++CONFIG_IPV6=m ++CONFIG_IPV6_ROUTER_PREF=y ++CONFIG_IPV6_ROUTE_INFO=y ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_SIT_6RD=y ++CONFIG_IPV6_TUNNEL=m ++CONFIG_IPV6_MULTIPLE_TABLES=y ++CONFIG_IPV6_SUBTREES=y ++CONFIG_IPV6_MROUTE=y ++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IPV6_PIMSM_V2=y ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_ZONES=y ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_TIMESTAMP=y ++CONFIG_NF_CONNTRACK_AMANDA=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NETFILTER_XT_SET=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TPROXY=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_SET=m ++CONFIG_IP_SET_BITMAP_IP=m ++CONFIG_IP_SET_BITMAP_IPMAC=m ++CONFIG_IP_SET_BITMAP_PORT=m ++CONFIG_IP_SET_HASH_IP=m ++CONFIG_IP_SET_HASH_IPPORT=m ++CONFIG_IP_SET_HASH_IPPORTIP=m ++CONFIG_IP_SET_HASH_IPPORTNET=m ++CONFIG_IP_SET_HASH_NET=m ++CONFIG_IP_SET_HASH_NETPORT=m ++CONFIG_IP_SET_HASH_NETIFACE=m ++CONFIG_IP_SET_LIST_SET=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_PROTO_ESP=y ++CONFIG_IP_VS_PROTO_AH=y ++CONFIG_IP_VS_PROTO_SCTP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_WRR=m ++CONFIG_IP_VS_LC=m ++CONFIG_IP_VS_WLC=m ++CONFIG_IP_VS_LBLC=m ++CONFIG_IP_VS_LBLCR=m ++CONFIG_IP_VS_DH=m ++CONFIG_IP_VS_SH=m ++CONFIG_IP_VS_SED=m ++CONFIG_IP_VS_NQ=m ++CONFIG_IP_VS_FTP=m ++CONFIG_IP_VS_PE_SIP=m ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_RPFILTER=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_NAT=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RPFILTER=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_HL=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m ++CONFIG_IP6_NF_NAT=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++CONFIG_BRIDGE_EBT_IP6=m ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_NFLOG=m ++CONFIG_SCTP_COOKIE_HMAC_SHA1=y ++CONFIG_ATM=m ++CONFIG_L2TP=m ++CONFIG_L2TP_V3=y ++CONFIG_L2TP_IP=m ++CONFIG_L2TP_ETH=m ++CONFIG_BRIDGE=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_ATALK=m ++CONFIG_6LOWPAN=m ++CONFIG_IEEE802154=m ++CONFIG_IEEE802154_6LOWPAN=m ++CONFIG_MAC802154=m ++CONFIG_NET_SCHED=y ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_ATM=m ++CONFIG_NET_SCH_PRIO=m ++CONFIG_NET_SCH_MULTIQ=m ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFB=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++CONFIG_NET_SCH_DRR=m ++CONFIG_NET_SCH_MQPRIO=m ++CONFIG_NET_SCH_CHOKE=m ++CONFIG_NET_SCH_QFQ=m ++CONFIG_NET_SCH_CODEL=m ++CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_FQ=m ++CONFIG_NET_SCH_HHF=m ++CONFIG_NET_SCH_PIE=m ++CONFIG_NET_SCH_INGRESS=m ++CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++CONFIG_NET_CLS_FLOW=m ++CONFIG_NET_CLS_CGROUP=m ++CONFIG_NET_EMATCH=y ++CONFIG_NET_EMATCH_CMP=m ++CONFIG_NET_EMATCH_NBYTE=m ++CONFIG_NET_EMATCH_U32=m ++CONFIG_NET_EMATCH_META=m ++CONFIG_NET_EMATCH_TEXT=m ++CONFIG_NET_EMATCH_IPSET=m ++CONFIG_NET_CLS_ACT=y ++CONFIG_NET_ACT_POLICE=m ++CONFIG_NET_ACT_GACT=m ++CONFIG_GACT_PROB=y ++CONFIG_NET_ACT_MIRRED=m ++CONFIG_NET_ACT_IPT=m ++CONFIG_NET_ACT_NAT=m ++CONFIG_NET_ACT_PEDIT=m ++CONFIG_NET_ACT_SIMP=m ++CONFIG_NET_ACT_SKBEDIT=m ++CONFIG_NET_ACT_CSUM=m ++CONFIG_BATMAN_ADV=m ++CONFIG_OPENVSWITCH=m ++CONFIG_NET_PKTGEN=m ++CONFIG_HAMRADIO=y ++CONFIG_AX25=m ++CONFIG_NETROM=m ++CONFIG_ROSE=m ++CONFIG_MKISS=m ++CONFIG_6PACK=m ++CONFIG_BPQETHER=m ++CONFIG_BAYCOM_SER_FDX=m ++CONFIG_BAYCOM_SER_HDX=m ++CONFIG_YAM=m ++CONFIG_CAN=m ++CONFIG_CAN_VCAN=m ++CONFIG_CAN_SLCAN=m ++CONFIG_CAN_MCP251X=m ++CONFIG_CAN_GS_USB=m ++CONFIG_BT=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_6LOWPAN=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIUART=m ++CONFIG_BT_HCIUART_3WIRE=y ++CONFIG_BT_HCIUART_BCM=y ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_BT_WILINK=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_RFKILL=m ++CONFIG_RFKILL_INPUT=y ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_DMA_CMA=y ++CONFIG_CMA_SIZE_MBYTES=5 ++CONFIG_MTD=m ++CONFIG_MTD_BLOCK=m ++CONFIG_MTD_M25P80=m ++CONFIG_MTD_BLOCK2MTD=m ++CONFIG_MTD_NAND=m ++CONFIG_MTD_SPI_NOR=m ++CONFIG_MTD_UBI=m ++CONFIG_OF_CONFIGFS=y ++CONFIG_ZRAM=m ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_DRBD=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_ATA_OVER_ETH=m ++CONFIG_EEPROM_AT24=m ++CONFIG_TI_ST=m ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_CHR_DEV_ST=m ++CONFIG_CHR_DEV_OSST=m ++CONFIG_BLK_DEV_SR=m ++CONFIG_CHR_DEV_SG=m ++CONFIG_SCSI_ISCSI_ATTRS=y ++CONFIG_ISCSI_TCP=m ++CONFIG_ISCSI_BOOT_SYSFS=m ++CONFIG_MD=y ++CONFIG_MD_LINEAR=m ++CONFIG_BLK_DEV_DM=m ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++CONFIG_DM_THIN_PROVISIONING=m ++CONFIG_DM_CACHE=m ++CONFIG_DM_MIRROR=m ++CONFIG_DM_LOG_USERSPACE=m ++CONFIG_DM_RAID=m ++CONFIG_DM_ZERO=m ++CONFIG_DM_DELAY=m ++CONFIG_NETDEVICES=y ++CONFIG_BONDING=m ++CONFIG_DUMMY=m ++CONFIG_IFB=m ++CONFIG_MACVLAN=m ++CONFIG_IPVLAN=m ++CONFIG_VXLAN=m ++CONFIG_NETCONSOLE=m ++CONFIG_TUN=m ++CONFIG_VETH=m ++CONFIG_BCMGENET=y ++CONFIG_ENC28J60=m ++CONFIG_QCA7000_SPI=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_BROADCOM_PHY=y ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOATM=m ++CONFIG_PPPOE=m ++CONFIG_PPPOL2TP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_SLIP_SMART=y ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=y ++CONFIG_USB_LAN78XX=y ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX88179_178A=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_CDC_NCM=m ++CONFIG_USB_NET_HUAWEI_CDC_NCM=m ++CONFIG_USB_NET_CDC_MBIM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SR9700=m ++CONFIG_USB_NET_SR9800=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_USB_HSO=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_USB=m ++CONFIG_AR5523=m ++CONFIG_AT76C50X_USB=m ++CONFIG_B43=m ++# CONFIG_B43_PHY_N is not set ++CONFIG_B43LEGACY=m ++CONFIG_BRCMFMAC=m ++CONFIG_BRCMFMAC_USB=y ++CONFIG_BRCMDBG=y ++CONFIG_HOSTAP=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_MT7601U=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT3573=y ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RT2800USB_RT55XX=y ++CONFIG_RT2800USB_UNKNOWN=y ++CONFIG_RTL8187=m ++CONFIG_RTL8192CU=m ++CONFIG_RTL8XXXU=m ++CONFIG_USB_ZD1201=m ++CONFIG_ZD1211RW=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_IEEE802154_AT86RF230=m ++CONFIG_IEEE802154_MRF24J40=m ++CONFIG_IEEE802154_CC2520=m ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_KEYBOARD_ATKBD is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_MATRIX=m ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_JOYSTICK=y ++CONFIG_JOYSTICK_IFORCE=m ++CONFIG_JOYSTICK_IFORCE_USB=y ++CONFIG_JOYSTICK_XPAD=m ++CONFIG_JOYSTICK_XPAD_FF=y ++CONFIG_JOYSTICK_XPAD_LEDS=y ++CONFIG_JOYSTICK_PSXPAD_SPI=m ++CONFIG_JOYSTICK_PSXPAD_SPI_FF=y ++CONFIG_JOYSTICK_RPISENSE=m ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_ADS7846=m ++CONFIG_TOUCHSCREEN_EGALAX=m ++CONFIG_TOUCHSCREEN_EXC3000=m ++CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_EDT_FT5X06=m ++CONFIG_TOUCHSCREEN_RPI_FT5406=m ++CONFIG_TOUCHSCREEN_USB_COMPOSITE=m ++CONFIG_TOUCHSCREEN_STMPE=m ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_BRCM_CHAR_DRIVERS=y ++CONFIG_BCM_VCIO=y ++CONFIG_BCM2835_DEVGPIOMEM=y ++# CONFIG_BCM2835_SMI_DEV is not set ++# CONFIG_LEGACY_PTYS is not set ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set ++CONFIG_SERIAL_8250_CONSOLE=y ++# CONFIG_SERIAL_8250_DMA is not set ++CONFIG_SERIAL_8250_NR_UARTS=1 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=0 ++CONFIG_SERIAL_8250_EXTENDED=y ++CONFIG_SERIAL_8250_SHARE_IRQ=y ++CONFIG_SERIAL_8250_BCM2835AUX=y ++CONFIG_SERIAL_OF_PLATFORM=y ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_SERIAL_SC16IS7XX=m ++CONFIG_SERIAL_SC16IS7XX_SPI=y ++CONFIG_SERIAL_DEV_BUS=m ++CONFIG_TTY_PRINTK=y ++CONFIG_HW_RANDOM=y ++# CONFIG_HW_RANDOM_BCM2835 is not set ++CONFIG_RAW_DRIVER=y ++CONFIG_I2C=y ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_BCM2708=m ++CONFIG_I2C_BCM2835=m ++CONFIG_I2C_GPIO=m ++CONFIG_I2C_ROBOTFUZZ_OSIF=m ++CONFIG_I2C_TINY_USB=m ++CONFIG_SPI=y ++CONFIG_SPI_BCM2835=m ++CONFIG_SPI_BCM2835AUX=m ++CONFIG_SPI_SPIDEV=m ++CONFIG_SPI_SLAVE=y ++CONFIG_PPS_CLIENT_LDISC=m ++CONFIG_PPS_CLIENT_GPIO=m ++CONFIG_PINCTRL_MCP23S08=m ++CONFIG_GPIO_BCM_VIRT=y ++CONFIG_GPIO_MOCKUP=m ++CONFIG_GPIO_PCF857X=m ++CONFIG_GPIO_ARIZONA=m ++CONFIG_GPIO_STMPE=y ++CONFIG_W1=m ++CONFIG_W1_MASTER_DS2490=m ++CONFIG_W1_MASTER_DS2482=m ++CONFIG_W1_MASTER_DS1WM=m ++CONFIG_W1_MASTER_GPIO=m ++CONFIG_W1_SLAVE_THERM=m ++CONFIG_W1_SLAVE_SMEM=m ++CONFIG_W1_SLAVE_DS2408=m ++CONFIG_W1_SLAVE_DS2413=m ++CONFIG_W1_SLAVE_DS2406=m ++CONFIG_W1_SLAVE_DS2423=m ++CONFIG_W1_SLAVE_DS2431=m ++CONFIG_W1_SLAVE_DS2433=m ++CONFIG_W1_SLAVE_DS2438=m ++CONFIG_W1_SLAVE_DS2780=m ++CONFIG_W1_SLAVE_DS2781=m ++CONFIG_W1_SLAVE_DS28E04=m ++CONFIG_POWER_RESET_GPIO=y ++CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_GAUGE_LTC2941=m ++CONFIG_HWMON=m ++CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_JC42=m ++CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_SHT21=m ++CONFIG_SENSORS_SHT3x=m ++CONFIG_SENSORS_SHTC1=m ++CONFIG_SENSORS_ADS1015=m ++CONFIG_SENSORS_INA2XX=m ++CONFIG_SENSORS_TMP102=m ++CONFIG_THERMAL=y ++CONFIG_BCM2835_THERMAL=y ++CONFIG_WATCHDOG=y ++CONFIG_GPIO_WATCHDOG=m ++CONFIG_BCM2835_WDT=y ++CONFIG_MFD_STMPE=y ++CONFIG_STMPE_SPI=y ++CONFIG_MFD_ARIZONA_I2C=m ++CONFIG_MFD_ARIZONA_SPI=m ++CONFIG_MFD_WM5102=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=m ++CONFIG_REGULATOR_ARIZONA_LDO1=m ++CONFIG_REGULATOR_ARIZONA_MICSUPP=m ++CONFIG_REGULATOR_GPIO=y ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_M5602=m ++CONFIG_USB_STV06XX=m ++CONFIG_USB_GL860=m ++CONFIG_USB_GSPCA_BENQ=m ++CONFIG_USB_GSPCA_CONEX=m ++CONFIG_USB_GSPCA_CPIA1=m ++CONFIG_USB_GSPCA_DTCS033=m ++CONFIG_USB_GSPCA_ETOMS=m ++CONFIG_USB_GSPCA_FINEPIX=m ++CONFIG_USB_GSPCA_JEILINJ=m ++CONFIG_USB_GSPCA_JL2005BCD=m ++CONFIG_USB_GSPCA_KINECT=m ++CONFIG_USB_GSPCA_KONICA=m ++CONFIG_USB_GSPCA_MARS=m ++CONFIG_USB_GSPCA_MR97310A=m ++CONFIG_USB_GSPCA_NW80X=m ++CONFIG_USB_GSPCA_OV519=m ++CONFIG_USB_GSPCA_OV534=m ++CONFIG_USB_GSPCA_OV534_9=m ++CONFIG_USB_GSPCA_PAC207=m ++CONFIG_USB_GSPCA_PAC7302=m ++CONFIG_USB_GSPCA_PAC7311=m ++CONFIG_USB_GSPCA_SE401=m ++CONFIG_USB_GSPCA_SN9C2028=m ++CONFIG_USB_GSPCA_SN9C20X=m ++CONFIG_USB_GSPCA_SONIXB=m ++CONFIG_USB_GSPCA_SONIXJ=m ++CONFIG_USB_GSPCA_SPCA500=m ++CONFIG_USB_GSPCA_SPCA501=m ++CONFIG_USB_GSPCA_SPCA505=m ++CONFIG_USB_GSPCA_SPCA506=m ++CONFIG_USB_GSPCA_SPCA508=m ++CONFIG_USB_GSPCA_SPCA561=m ++CONFIG_USB_GSPCA_SPCA1528=m ++CONFIG_USB_GSPCA_SQ905=m ++CONFIG_USB_GSPCA_SQ905C=m ++CONFIG_USB_GSPCA_SQ930X=m ++CONFIG_USB_GSPCA_STK014=m ++CONFIG_USB_GSPCA_STK1135=m ++CONFIG_USB_GSPCA_STV0680=m ++CONFIG_USB_GSPCA_SUNPLUS=m ++CONFIG_USB_GSPCA_T613=m ++CONFIG_USB_GSPCA_TOPRO=m ++CONFIG_USB_GSPCA_TV8532=m ++CONFIG_USB_GSPCA_VC032X=m ++CONFIG_USB_GSPCA_VICAM=m ++CONFIG_USB_GSPCA_XIRLINK_CIT=m ++CONFIG_USB_GSPCA_ZC3XX=m ++CONFIG_USB_PWC=m ++CONFIG_VIDEO_CPIA2=m ++CONFIG_USB_ZR364XX=m ++CONFIG_USB_STKWEBCAM=m ++CONFIG_USB_S2255=m ++CONFIG_VIDEO_USBTV=m ++CONFIG_VIDEO_PVRUSB2=m ++CONFIG_VIDEO_HDPVR=m ++CONFIG_VIDEO_USBVISION=m ++CONFIG_VIDEO_STK1160_COMMON=m ++CONFIG_VIDEO_GO7007=m ++CONFIG_VIDEO_GO7007_USB=m ++CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m ++CONFIG_VIDEO_AU0828=m ++CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9035=m ++CONFIG_DVB_USB_ANYSEE=m ++CONFIG_DVB_USB_AU6610=m ++CONFIG_DVB_USB_AZ6007=m ++CONFIG_DVB_USB_CE6230=m ++CONFIG_DVB_USB_EC168=m ++CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_DVBSKY=m ++CONFIG_SMS_USB_DRV=m ++CONFIG_DVB_B2C2_FLEXCOP_USB=m ++CONFIG_DVB_AS102=m ++CONFIG_VIDEO_EM28XX=m ++CONFIG_VIDEO_EM28XX_V4L2=m ++CONFIG_VIDEO_EM28XX_ALSA=m ++CONFIG_VIDEO_EM28XX_DVB=m ++CONFIG_V4L_PLATFORM_DRIVERS=y ++CONFIG_RADIO_SI470X=m ++CONFIG_USB_SI470X=m ++CONFIG_I2C_SI470X=m ++CONFIG_RADIO_SI4713=m ++CONFIG_I2C_SI4713=m ++CONFIG_USB_MR800=m ++CONFIG_USB_DSBR=m ++CONFIG_RADIO_SHARK=m ++CONFIG_RADIO_SHARK2=m ++CONFIG_USB_KEENE=m ++CONFIG_USB_MA901=m ++CONFIG_RADIO_TEA5764=m ++CONFIG_RADIO_SAA7706H=m ++CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL1273=m ++CONFIG_RADIO_WL128X=m ++# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set ++CONFIG_VIDEO_UDA1342=m ++CONFIG_VIDEO_SONY_BTF_MPX=m ++CONFIG_VIDEO_TVP5150=m ++CONFIG_VIDEO_TW2804=m ++CONFIG_VIDEO_TW9903=m ++CONFIG_VIDEO_TW9906=m ++CONFIG_VIDEO_OV7640=m ++CONFIG_VIDEO_MT9V011=m ++CONFIG_DRM=m ++CONFIG_DRM_LOAD_EDID_FIRMWARE=y ++CONFIG_DRM_UDL=m ++CONFIG_DRM_PANEL_SIMPLE=m ++CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m ++CONFIG_DRM_VC4=m ++CONFIG_DRM_TINYDRM=m ++CONFIG_TINYDRM_MI0283QT=m ++CONFIG_TINYDRM_REPAPER=m ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FB_UDL=m ++CONFIG_FB_SSD1307=m ++CONFIG_FB_RPISENSE=m ++# CONFIG_BACKLIGHT_GENERIC is not set ++CONFIG_BACKLIGHT_RPI=m ++CONFIG_BACKLIGHT_GPIO=m ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_CAIAQ_INPUT=y ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SND_USB_HIFACE=m ++CONFIG_SND_SOC=m ++CONFIG_SND_BCM2835_SOC_I2S=m ++CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m ++CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m ++CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m ++CONFIG_SND_BCM2708_SOC_RPI_DAC=m ++CONFIG_SND_BCM2708_SOC_RPI_PROTO=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m ++CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m ++CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m ++CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m ++CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_DIGIDAC1_SOUNDCARD=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m ++CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC_PLUS=m ++CONFIG_SND_BCM2708_SOC_ALLO_BOSS_DAC=m ++CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m ++CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m ++CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m ++CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_ADAU1701=m ++CONFIG_SND_SOC_ADAU7002=m ++CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_SPDIF=m ++CONFIG_SND_SOC_WM8804_I2C=m ++CONFIG_SND_SIMPLE_CARD=m ++CONFIG_HID_BATTERY_STRENGTH=y ++CONFIG_HIDRAW=y ++CONFIG_UHID=m ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_ASUS=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_BETOP_FF=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_ELO=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_GEMBIRD=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_LOGITECH_DJ=m ++CONFIG_LOGITECH_FF=y ++CONFIG_LOGIRUMBLEPAD2_FF=y ++CONFIG_LOGIG940_FF=y ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_SONY_FF=y ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THINGM=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_XINMO=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_PRINTER=m ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USBIP_CORE=m ++CONFIG_USBIP_VHCI_HCD=m ++CONFIG_USBIP_HOST=m ++CONFIG_USB_DWC2=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_F81232=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_METRO=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_XSENS_MT=m ++CONFIG_USB_SERIAL_WISHBONE=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_QT2=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_USB_ATM=m ++CONFIG_USB_SPEEDTOUCH=m ++CONFIG_USB_CXACRU=m ++CONFIG_USB_UEAGLEATM=m ++CONFIG_USB_XUSBATM=m ++CONFIG_USB_GADGET=m ++CONFIG_USB_ZERO=m ++CONFIG_USB_AUDIO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_MASS_STORAGE=m ++CONFIG_USB_G_SERIAL=m ++CONFIG_USB_MIDI_GADGET=m ++CONFIG_USB_G_PRINTER=m ++CONFIG_USB_CDC_COMPOSITE=m ++CONFIG_USB_G_ACM_MS=m ++CONFIG_USB_G_MULTI=m ++CONFIG_USB_G_HID=m ++CONFIG_USB_G_WEBCAM=m ++CONFIG_MMC=y ++CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_SDHCI_BCM2711=y ++CONFIG_MMC_BCM2835_MMC=y ++CONFIG_MMC_BCM2835_DMA=y ++CONFIG_MMC_BCM2835_SDHOST=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SPI=m ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_ONESHOT=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_TRANSIENT=m ++CONFIG_LEDS_TRIGGER_CAMERA=m ++CONFIG_LEDS_TRIGGER_INPUT=y ++CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_RTC_CLASS=y ++# CONFIG_RTC_HCTOSYS is not set ++CONFIG_RTC_DRV_ABX80X=m ++CONFIG_RTC_DRV_DS1307=m ++CONFIG_RTC_DRV_DS1374=m ++CONFIG_RTC_DRV_DS1672=m ++CONFIG_RTC_DRV_MAX6900=m ++CONFIG_RTC_DRV_RS5C372=m ++CONFIG_RTC_DRV_ISL1208=m ++CONFIG_RTC_DRV_ISL12022=m ++CONFIG_RTC_DRV_X1205=m ++CONFIG_RTC_DRV_PCF8523=m ++CONFIG_RTC_DRV_PCF8563=m ++CONFIG_RTC_DRV_PCF8583=m ++CONFIG_RTC_DRV_M41T80=m ++CONFIG_RTC_DRV_BQ32K=m ++CONFIG_RTC_DRV_S35390A=m ++CONFIG_RTC_DRV_FM3130=m ++CONFIG_RTC_DRV_RX8581=m ++CONFIG_RTC_DRV_RX8025=m ++CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_M41T93=m ++CONFIG_RTC_DRV_M41T94=m ++CONFIG_RTC_DRV_DS1302=m ++CONFIG_RTC_DRV_DS1305=m ++CONFIG_RTC_DRV_DS1390=m ++CONFIG_RTC_DRV_R9701=m ++CONFIG_RTC_DRV_RX4581=m ++CONFIG_RTC_DRV_RS5C348=m ++CONFIG_RTC_DRV_MAX6902=m ++CONFIG_RTC_DRV_PCF2123=m ++CONFIG_RTC_DRV_DS3232=m ++CONFIG_RTC_DRV_PCF2127=m ++CONFIG_RTC_DRV_RV3029C2=m ++CONFIG_DMADEVICES=y ++CONFIG_DMA_BCM2835=y ++CONFIG_DMA_BCM2708=y ++CONFIG_UIO=m ++CONFIG_UIO_PDRV_GENIRQ=m ++CONFIG_STAGING=y ++CONFIG_PRISM2_USB=m ++CONFIG_R8712U=m ++CONFIG_R8188EU=m ++CONFIG_VT6656=m ++CONFIG_SPEAKUP=m ++CONFIG_SPEAKUP_SYNTH_SOFT=m ++CONFIG_STAGING_MEDIA=y ++CONFIG_FB_TFT=m ++CONFIG_FB_TFT_AGM1264K_FL=m ++CONFIG_FB_TFT_BD663474=m ++CONFIG_FB_TFT_HX8340BN=m ++CONFIG_FB_TFT_HX8347D=m ++CONFIG_FB_TFT_HX8353D=m ++CONFIG_FB_TFT_HX8357D=m ++CONFIG_FB_TFT_ILI9163=m ++CONFIG_FB_TFT_ILI9320=m ++CONFIG_FB_TFT_ILI9325=m ++CONFIG_FB_TFT_ILI9340=m ++CONFIG_FB_TFT_ILI9341=m ++CONFIG_FB_TFT_ILI9481=m ++CONFIG_FB_TFT_ILI9486=m ++CONFIG_FB_TFT_PCD8544=m ++CONFIG_FB_TFT_RA8875=m ++CONFIG_FB_TFT_S6D02A1=m ++CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SSD1289=m ++CONFIG_FB_TFT_SSD1306=m ++CONFIG_FB_TFT_SSD1331=m ++CONFIG_FB_TFT_SSD1351=m ++CONFIG_FB_TFT_ST7735R=m ++CONFIG_FB_TFT_ST7789V=m ++CONFIG_FB_TFT_TINYLCD=m ++CONFIG_FB_TFT_TLS8204=m ++CONFIG_FB_TFT_UC1701=m ++CONFIG_FB_TFT_UPD161704=m ++CONFIG_FB_TFT_WATTEROTT=m ++CONFIG_FB_FLEX=m ++CONFIG_FB_TFT_FBTFT_DEVICE=m ++CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m ++CONFIG_MAILBOX=y ++CONFIG_BCM2835_MBOX=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_RASPBERRYPI_POWER=y ++CONFIG_EXTCON=m ++CONFIG_EXTCON_ARIZONA=m ++CONFIG_IIO=m ++CONFIG_IIO_BUFFER_CB=m ++CONFIG_MCP320X=m ++CONFIG_MCP3422=m ++CONFIG_DHT11=m ++CONFIG_HDC100X=m ++CONFIG_HTU21=m ++CONFIG_TSL4531=m ++CONFIG_VEML6070=m ++CONFIG_BMP280=m ++CONFIG_PWM_BCM2835=m ++CONFIG_PWM_PCA9685=m ++CONFIG_GENERIC_PHY=y ++CONFIG_RPI_AXIPERF=m ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_F2FS_FS=y ++CONFIG_FANOTIFY=y ++CONFIG_QFMT_V1=m ++CONFIG_QFMT_V2=m ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_OVERLAY_FS=m ++CONFIG_FSCACHE=y ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_HISTOGRAM=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_NTFS_RW=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_ECRYPT_FS=m ++CONFIG_HFS_FS=m ++CONFIG_HFSPLUS_FS=m ++CONFIG_JFFS2_FS=m ++CONFIG_JFFS2_SUMMARY=y ++CONFIG_UBIFS_FS=m ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_NFS_SWAP=y ++CONFIG_NFS_V4_1=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_NFSD=m ++CONFIG_NFSD_V3_ACL=y ++CONFIG_NFSD_V4=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_UPCALL=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_CIFS_ACL=y ++CONFIG_CIFS_DFS_UPCALL=y ++CONFIG_CIFS_FSCACHE=y ++CONFIG_9P_FS=m ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_DLM=m ++CONFIG_CRYPTO_USER=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_CTS=m ++CONFIG_CRYPTO_XTS=m ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_LZ4=m ++CONFIG_CRYPTO_USER_API_SKCIPHER=m ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y ++CONFIG_PRINTK_TIME=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_LATENCYTOP=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y diff --git a/target/linux/brcm2708/patches-4.19/950-0646-config-Add-NF_TABLES-support.patch b/target/linux/brcm2708/patches-4.19/950-0646-config-Add-NF_TABLES-support.patch new file mode 100644 index 000000000..efbf2b9b2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0646-config-Add-NF_TABLES-support.patch @@ -0,0 +1,87 @@ +From d5a3a06dce60efe829fd644448bbab8c10368f8a Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Mon, 3 Jun 2019 14:57:56 +0100 +Subject: [PATCH 646/703] config: Add NF_TABLES support + +--- + arch/arm/configs/bcm2711_defconfig | 48 ++++++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +--- a/arch/arm/configs/bcm2711_defconfig ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -133,6 +133,36 @@ CONFIG_NF_CONNTRACK_SANE=m + CONFIG_NF_CONNTRACK_SIP=m + CONFIG_NF_CONNTRACK_TFTP=m + CONFIG_NF_CT_NETLINK=m ++CONFIG_NF_TABLES=m ++CONFIG_NF_TABLES_SET=m ++CONFIG_NF_TABLES_INET=y ++CONFIG_NF_TABLES_NETDEV=y ++CONFIG_NFT_NUMGEN=m ++CONFIG_NFT_CT=m ++CONFIG_NFT_FLOW_OFFLOAD=m ++CONFIG_NFT_COUNTER=m ++CONFIG_NFT_CONNLIMIT=m ++CONFIG_NFT_LOG=m ++CONFIG_NFT_LIMIT=m ++CONFIG_NFT_MASQ=m ++CONFIG_NFT_REDIR=m ++CONFIG_NFT_NAT=m ++CONFIG_NFT_TUNNEL=m ++CONFIG_NFT_OBJREF=m ++CONFIG_NFT_QUEUE=m ++CONFIG_NFT_QUOTA=m ++CONFIG_NFT_REJECT=m ++CONFIG_NFT_COMPAT=m ++CONFIG_NFT_HASH=m ++CONFIG_NFT_FIB_INET=m ++CONFIG_NFT_SOCKET=m ++CONFIG_NFT_OSF=m ++CONFIG_NFT_TPROXY=m ++CONFIG_NFT_DUP_NETDEV=m ++CONFIG_NFT_FWD_NETDEV=m ++CONFIG_NFT_FIB_NETDEV=m ++CONFIG_NF_FLOW_TABLE_INET=m ++CONFIG_NF_FLOW_TABLE=m + CONFIG_NETFILTER_XT_SET=m + CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m + CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +@@ -220,6 +250,14 @@ CONFIG_IP_VS_SED=m + CONFIG_IP_VS_NQ=m + CONFIG_IP_VS_FTP=m + CONFIG_IP_VS_PE_SIP=m ++CONFIG_NFT_CHAIN_ROUTE_IPV4=m ++CONFIG_NFT_DUP_IPV4=m ++CONFIG_NFT_FIB_IPV4=m ++CONFIG_NF_TABLES_ARP=y ++CONFIG_NF_FLOW_TABLE_IPV4=m ++CONFIG_NFT_CHAIN_NAT_IPV4=m ++CONFIG_NFT_MASQ_IPV4=m ++CONFIG_NFT_REDIR_IPV4=m + CONFIG_IP_NF_IPTABLES=m + CONFIG_IP_NF_MATCH_AH=m + CONFIG_IP_NF_MATCH_ECN=m +@@ -239,6 +277,13 @@ CONFIG_IP_NF_RAW=m + CONFIG_IP_NF_ARPTABLES=m + CONFIG_IP_NF_ARPFILTER=m + CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_NFT_CHAIN_ROUTE_IPV6=m ++CONFIG_NFT_CHAIN_NAT_IPV6=m ++CONFIG_NFT_MASQ_IPV6=m ++CONFIG_NFT_REDIR_IPV6=m ++CONFIG_NFT_DUP_IPV6=m ++CONFIG_NFT_FIB_IPV6=m ++CONFIG_NF_FLOW_TABLE_IPV6=m + CONFIG_IP6_NF_IPTABLES=m + CONFIG_IP6_NF_MATCH_AH=m + CONFIG_IP6_NF_MATCH_EUI64=m +@@ -257,6 +302,9 @@ CONFIG_IP6_NF_RAW=m + CONFIG_IP6_NF_NAT=m + CONFIG_IP6_NF_TARGET_MASQUERADE=m + CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_NF_TABLES_BRIDGE=y ++CONFIG_NFT_BRIDGE_REJECT=m ++CONFIG_NF_LOG_BRIDGE=m + CONFIG_BRIDGE_NF_EBTABLES=m + CONFIG_BRIDGE_EBT_BROUTE=m + CONFIG_BRIDGE_EBT_T_FILTER=m diff --git a/target/linux/brcm2708/patches-4.19/950-0647-bcm2711_defconfig-add-xhci-platform-support.patch b/target/linux/brcm2708/patches-4.19/950-0647-bcm2711_defconfig-add-xhci-platform-support.patch new file mode 100644 index 000000000..8ba5dab05 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0647-bcm2711_defconfig-add-xhci-platform-support.patch @@ -0,0 +1,20 @@ +From ad2c4e0c73a9de7f06e891faf57ebf868fde6b24 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Mon, 3 Jun 2019 15:33:02 +0100 +Subject: [PATCH 647/703] bcm2711_defconfig: add xhci platform support + +Signed-off-by: Jonathan Bell +--- + arch/arm/configs/bcm2711_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/configs/bcm2711_defconfig ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -983,6 +983,7 @@ CONFIG_USB=y + CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + CONFIG_USB_MON=m + CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_PLATFORM=y + CONFIG_USB_DWCOTG=y + CONFIG_USB_PRINTER=m + CONFIG_USB_STORAGE=y diff --git a/target/linux/brcm2708/patches-4.19/950-0648-ARM-dts-bcm283x-Correct-vchiq-compatible-string-2840.patch b/target/linux/brcm2708/patches-4.19/950-0648-ARM-dts-bcm283x-Correct-vchiq-compatible-string-2840.patch new file mode 100644 index 000000000..6a1bae2bb --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0648-ARM-dts-bcm283x-Correct-vchiq-compatible-string-2840.patch @@ -0,0 +1,76 @@ +From 99c805aa346cf88fba8b26eb1093192bcc822986 Mon Sep 17 00:00:00 2001 +From: 6by9 <6by9@users.noreply.github.com> +Date: Wed, 30 Jan 2019 14:22:03 +0000 +Subject: [PATCH 648/703] ARM: dts: bcm283x: Correct vchiq compatible string + (#2840) + +commit 499770ede3f829e80539f46b59b5f460dc327aa6 upstream. + +To allow VCHIQ to determine the correct cache line size, use the new +"brcm,bcm2836-vchiq" compatible string on BCM2836 and BCM2837. + +Signed-off-by: Phil Elwell +Acked-by: Stefan Wahren +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +- + arch/arm/boot/dts/bcm2836-rpi.dtsi | 6 ++++++ + arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 2 +- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 2 +- + 5 files changed, 10 insertions(+), 4 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2836-rpi.dtsi + +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -30,7 +30,7 @@ + #power-domain-cells = <1>; + }; + +- mailbox@7e00b840 { ++ vchiq: mailbox@7e00b840 { + compatible = "brcm,bcm2835-vchiq"; + reg = <0x7e00b840 0x3c>; + interrupts = <0 2>; +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + /dts-v1/; + #include "bcm2836.dtsi" +-#include "bcm2835-rpi.dtsi" ++#include "bcm2836-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2836-rpi.dtsi +@@ -0,0 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include "bcm2835-rpi.dtsi" ++ ++&vchiq { ++ compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq"; ++}; +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + /dts-v1/; + #include "bcm2837.dtsi" +-#include "bcm2835-rpi.dtsi" ++#include "bcm2836-rpi.dtsi" + #include "bcm283x-rpi-lan7515.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" + +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0 + /dts-v1/; + #include "bcm2837.dtsi" +-#include "bcm2835-rpi.dtsi" ++#include "bcm2836-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" diff --git a/target/linux/brcm2708/patches-4.19/950-0649-arm-dts-Change-downstream-vchiq-compatible-string.patch b/target/linux/brcm2708/patches-4.19/950-0649-arm-dts-Change-downstream-vchiq-compatible-string.patch new file mode 100644 index 000000000..ca71d01a8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0649-arm-dts-Change-downstream-vchiq-compatible-string.patch @@ -0,0 +1,59 @@ +From 4ef78a596dcde685022fde07c4cb5bc993ce7aa3 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 6 Feb 2019 20:45:16 +0000 +Subject: [PATCH 649/703] arm: dts: Change downstream vchiq compatible string + +The new cache line size mechanism requires a different vchiq compatible +string on BCM2836 and BCM2837, but the downstream dts files didn't +inherit the upstream changes. + +See: https://github.com/raspberrypi/linux/issues/2643 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 2 +- + arch/arm/boot/dts/bcm2709-rpi.dtsi | 5 +++++ + arch/arm/boot/dts/bcm2709.dtsi | 2 +- + arch/arm/boot/dts/bcm2710.dtsi | 2 +- + 4 files changed, 8 insertions(+), 3 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2709-rpi.dtsi + +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -68,7 +68,7 @@ + status = "disabled"; + }; + +- mailbox@7e00b840 { ++ vchiq: mailbox@7e00b840 { + compatible = "brcm,bcm2835-vchiq"; + reg = <0x7e00b840 0x3c>; + interrupts = <0 2>; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2709-rpi.dtsi +@@ -0,0 +1,5 @@ ++#include "bcm2708-rpi.dtsi" ++ ++&vchiq { ++ compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq"; ++}; +--- a/arch/arm/boot/dts/bcm2709.dtsi ++++ b/arch/arm/boot/dts/bcm2709.dtsi +@@ -1,6 +1,6 @@ + #include "bcm2836.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2708-rpi.dtsi" ++#include "bcm2709-rpi.dtsi" + + / { + soc { +--- a/arch/arm/boot/dts/bcm2710.dtsi ++++ b/arch/arm/boot/dts/bcm2710.dtsi +@@ -1,6 +1,6 @@ + #include "bcm2837.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2708-rpi.dtsi" ++#include "bcm2709-rpi.dtsi" + + / { + compatible = "brcm,bcm2837", "brcm,bcm2836"; diff --git a/target/linux/brcm2708/patches-4.19/950-0650-bcm2835-dma-Add-proper-40-bit-DMA-support.patch b/target/linux/brcm2708/patches-4.19/950-0650-bcm2835-dma-Add-proper-40-bit-DMA-support.patch new file mode 100644 index 000000000..0f50f3352 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0650-bcm2835-dma-Add-proper-40-bit-DMA-support.patch @@ -0,0 +1,1018 @@ +From 511ed7aad02f375c8a5cc3c847e6b5fc4bf4a620 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 4 Apr 2019 13:33:47 +0100 +Subject: [PATCH 650/703] bcm2835-dma: Add proper 40-bit DMA support + +The 40-bit additions are not fully tested, but it should be +capable of supporting both 40-bit memcpy on BCM2711 and regular +Lite channels on BCM2835. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2838.dtsi | 33 +- + drivers/dma/bcm2835-dma.c | 426 ++++++++++++++----- + drivers/pci/controller/pcie-brcmstb-bounce.c | 30 +- + drivers/pci/controller/pcie-brcmstb-bounce.h | 21 +- + drivers/pci/controller/pcie-brcmstb.c | 23 +- + 5 files changed, 395 insertions(+), 138 deletions(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -372,6 +372,23 @@ + }; + }; + ++ dma40: dma@7e007b00 { ++ compatible = "brcm,bcm2838-dma"; ++ reg = <0x0 0x7e007b00 0x400>; ++ interrupts = ++ , /* dma4 11 */ ++ , /* dma4 12 */ ++ , /* dma4 13 */ ++ ; /* dma4 14 */ ++ interrupt-names = "dma11", ++ "dma12", ++ "dma13", ++ "dma14"; ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x7000>; ++ }; ++ /* DMA4 - 40 bit DMA engines */ ++ + xhci: xhci@7e9c0000 { + compatible = "generic-xhci"; + status = "disabled"; +@@ -689,6 +706,7 @@ + }; + + &dma { ++ reg = <0x7e007000 0xb00>; + interrupts = , + , + , +@@ -699,12 +717,7 @@ + , /* dmalite 7 */ + , /* dmalite 8 */ + , /* dmalite 9 */ +- , /* dmalite 10 */ +- /* DMA4 - 40 bit DMA engines */ +- , /* dma4 11 */ +- , /* dma4 12 */ +- , /* dma4 13 */ +- ; /* dma4 14 */ ++ ; /* dmalite 10 */ + interrupt-names = "dma0", + "dma1", + "dma2", +@@ -715,10 +728,6 @@ + "dma7", + "dma8", + "dma9", +- "dma10", +- "dma11", +- "dma12", +- "dma13", +- "dma14"; +- brcm,dma-channel-mask = <0x7ef5>; ++ "dma10"; ++ brcm,dma-channel-mask = <0x01f5>; + }; +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -50,12 +50,18 @@ + #define BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED 14 + #define BCM2835_DMA_CHAN_NAME_SIZE 8 + #define BCM2835_DMA_BULK_MASK BIT(0) ++#define BCM2838_DMA_MEMCPY_CHAN 14 ++ ++struct bcm2835_dma_cfg_data { ++ u32 chan_40bit_mask; ++}; + + struct bcm2835_dmadev { + struct dma_device ddev; + spinlock_t lock; + void __iomem *base; + struct device_dma_parameters dma_parms; ++ const struct bcm2835_dma_cfg_data *cfg_data; + }; + + struct bcm2835_dma_cb { +@@ -100,6 +106,7 @@ struct bcm2835_chan { + unsigned int irq_flags; + + bool is_lite_channel; ++ bool is_40bit_channel; + }; + + struct bcm2835_desc { +@@ -189,7 +196,8 @@ struct bcm2835_desc { + #define BCM2835_DMA_DATA_TYPE_S128 16 + + /* Valid only for channels 0 - 14, 15 has its own base address */ +-#define BCM2835_DMA_CHAN(n) ((n) << 8) /* Base address */ ++#define BCM2835_DMA_CHAN_SIZE 0x100 ++#define BCM2835_DMA_CHAN(n) ((n) * BCM2835_DMA_CHAN_SIZE) /* Base address */ + #define BCM2835_DMA_CHANIO(base, n) ((base) + BCM2835_DMA_CHAN(n)) + + /* the max dma length for different channels */ +@@ -200,7 +208,7 @@ struct bcm2835_desc { + #define BCM2838_DMA40_CS 0x00 + #define BCM2838_DMA40_CB 0x04 + #define BCM2838_DMA40_DEBUG 0x0c +-#define BCM2858_DMA40_TI 0x10 ++#define BCM2838_DMA40_TI 0x10 + #define BCM2838_DMA40_SRC 0x14 + #define BCM2838_DMA40_SRCI 0x18 + #define BCM2838_DMA40_DEST 0x1c +@@ -209,32 +217,97 @@ struct bcm2835_desc { + #define BCM2838_DMA40_NEXT_CB 0x28 + #define BCM2838_DMA40_DEBUG2 0x2c + +-#define BCM2838_DMA40_CS_ACTIVE BIT(0) +-#define BCM2838_DMA40_CS_END BIT(1) ++#define BCM2838_DMA40_ACTIVE BIT(0) ++#define BCM2838_DMA40_END BIT(1) ++#define BCM2838_DMA40_INT BIT(2) ++#define BCM2838_DMA40_DREQ BIT(3) /* DREQ state */ ++#define BCM2838_DMA40_RD_PAUSED BIT(4) /* Reading is paused */ ++#define BCM2838_DMA40_WR_PAUSED BIT(5) /* Writing is paused */ ++#define BCM2838_DMA40_DREQ_PAUSED BIT(6) /* Is paused by DREQ flow control */ ++#define BCM2838_DMA40_WAITING_FOR_WRITES BIT(7) /* Waiting for last write */ ++#define BCM2838_DMA40_ERR BIT(10) ++#define BCM2838_DMA40_QOS(x) (((x) & 0x1f) << 16) ++#define BCM2838_DMA40_PANIC_QOS(x) (((x) & 0x1f) << 20) ++#define BCM2838_DMA40_WAIT_FOR_WRITES BIT(28) ++#define BCM2838_DMA40_DISDEBUG BIT(29) ++#define BCM2838_DMA40_ABORT BIT(30) ++#define BCM2838_DMA40_HALT BIT(31) ++#define BCM2838_DMA40_CS_FLAGS(x) (x & (BCM2838_DMA40_QOS(15) | \ ++ BCM2838_DMA40_PANIC_QOS(15) | \ ++ BCM2838_DMA40_WAIT_FOR_WRITES | \ ++ BCM2838_DMA40_DISDEBUG)) ++ ++/* Transfer information bits */ ++#define BCM2838_DMA40_INTEN BIT(0) ++#define BCM2838_DMA40_TDMODE BIT(1) /* 2D-Mode */ ++#define BCM2838_DMA40_WAIT_RESP BIT(2) /* wait for AXI write to be acked */ ++#define BCM2838_DMA40_WAIT_RD_RESP BIT(3) /* wait for AXI read to complete */ ++#define BCM2838_DMA40_PER_MAP(x) ((x & 31) << 9) /* REQ source */ ++#define BCM2838_DMA40_S_DREQ BIT(14) /* enable SREQ for source */ ++#define BCM2838_DMA40_D_DREQ BIT(15) /* enable DREQ for destination */ ++#define BCM2838_DMA40_S_WAIT(x) ((x & 0xff) << 16) /* add DMA read-wait cycles */ ++#define BCM2838_DMA40_D_WAIT(x) ((x & 0xff) << 24) /* add DMA write-wait cycles */ + +-#define BCM2838_DMA40_CS_QOS(x) (((x) & 0x1f) << 16) +-#define BCM2838_DMA40_CS_PANIC_QOS(x) (((x) & 0x1f) << 20) +-#define BCM2838_DMA40_CS_WRITE_WAIT BIT(28) ++/* debug register bits */ ++#define BCM2838_DMA40_DEBUG_WRITE_ERR BIT(0) ++#define BCM2838_DMA40_DEBUG_FIFO_ERR BIT(1) ++#define BCM2838_DMA40_DEBUG_READ_ERR BIT(2) ++#define BCM2838_DMA40_DEBUG_READ_CB_ERR BIT(3) ++#define BCM2838_DMA40_DEBUG_IN_ON_ERR BIT(8) ++#define BCM2838_DMA40_DEBUG_ABORT_ON_ERR BIT(9) ++#define BCM2838_DMA40_DEBUG_HALT_ON_ERR BIT(10) ++#define BCM2838_DMA40_DEBUG_DISABLE_CLK_GATE BIT(11) ++#define BCM2838_DMA40_DEBUG_RSTATE_SHIFT 14 ++#define BCM2838_DMA40_DEBUG_RSTATE_BITS 4 ++#define BCM2838_DMA40_DEBUG_WSTATE_SHIFT 18 ++#define BCM2838_DMA40_DEBUG_WSTATE_BITS 4 ++#define BCM2838_DMA40_DEBUG_RESET BIT(23) ++#define BCM2838_DMA40_DEBUG_ID_SHIFT 24 ++#define BCM2838_DMA40_DEBUG_ID_BITS 4 ++#define BCM2838_DMA40_DEBUG_VERSION_SHIFT 28 ++#define BCM2838_DMA40_DEBUG_VERSION_BITS 4 ++ ++/* Valid only for channels 0 - 3 (11 - 14) */ ++#define BCM2838_DMA40_CHAN(n) (((n) + 11) << 8) /* Base address */ ++#define BCM2838_DMA40_CHANIO(base, n) ((base) + BCM2838_DMA_CHAN(n)) + +-#define BCM2838_DMA40_BURST_LEN(x) ((((x) - 1) & 0xf) << 8) +-#define BCM2838_DMA40_INC BIT(12) +-#define BCM2838_DMA40_SIZE_128 (2 << 13) ++/* the max dma length for different channels */ ++#define MAX_DMA40_LEN SZ_1G + +-#define BCM2838_DMA40_MEMCPY_QOS \ +- (BCM2838_DMA40_CS_QOS(0x0) | \ +- BCM2838_DMA40_CS_PANIC_QOS(0x0) | \ +- BCM2838_DMA40_CS_WRITE_WAIT) ++#define BCM2838_DMA40_BURST_LEN(x) ((min(x,16) - 1) << 8) ++#define BCM2838_DMA40_INC BIT(12) ++#define BCM2838_DMA40_SIZE_32 (0 << 13) ++#define BCM2838_DMA40_SIZE_64 (1 << 13) ++#define BCM2838_DMA40_SIZE_128 (2 << 13) ++#define BCM2838_DMA40_SIZE_256 (3 << 13) ++#define BCM2838_DMA40_IGNORE BIT(15) ++#define BCM2838_DMA40_STRIDE(x) ((x) << 16) /* For 2D mode */ ++ ++#define BCM2838_DMA40_MEMCPY_FLAGS \ ++ (BCM2838_DMA40_QOS(0) | \ ++ BCM2838_DMA40_PANIC_QOS(0) | \ ++ BCM2838_DMA40_WAIT_FOR_WRITES | \ ++ BCM2838_DMA40_DISDEBUG) + + #define BCM2838_DMA40_MEMCPY_XFER_INFO \ + (BCM2838_DMA40_SIZE_128 | \ + BCM2838_DMA40_INC | \ + BCM2838_DMA40_BURST_LEN(16)) + ++struct bcm2835_dmadev *memcpy_parent; + static void __iomem *memcpy_chan; + static struct bcm2838_dma40_scb *memcpy_scb; + static dma_addr_t memcpy_scb_dma; + DEFINE_SPINLOCK(memcpy_lock); + ++static const struct bcm2835_dma_cfg_data bcm2835_dma_cfg = { ++ .chan_40bit_mask = 0, ++}; ++ ++static const struct bcm2835_dma_cfg_data bcm2838_dma_cfg = { ++ .chan_40bit_mask = BIT(11) | BIT(12) | BIT(13) | BIT(14), ++}; ++ + static inline size_t bcm2835_dma_max_frame_length(struct bcm2835_chan *c) + { + /* lite and normal channels have different max frame length */ +@@ -264,6 +337,32 @@ static inline struct bcm2835_desc *to_bc + return container_of(t, struct bcm2835_desc, vd.tx); + } + ++static inline uint32_t to_bcm2838_ti(uint32_t info) ++{ ++ return ((info & BCM2835_DMA_INT_EN) ? BCM2838_DMA40_INTEN : 0) | ++ ((info & BCM2835_DMA_WAIT_RESP) ? BCM2838_DMA40_WAIT_RESP : 0) | ++ ((info & BCM2835_DMA_S_DREQ) ? ++ (BCM2838_DMA40_S_DREQ | BCM2838_DMA40_WAIT_RD_RESP) : 0) | ++ ((info & BCM2835_DMA_D_DREQ) ? BCM2838_DMA40_D_DREQ : 0) | ++ BCM2838_DMA40_PER_MAP((info >> 16) & 0x1f); ++} ++ ++static inline uint32_t to_bcm2838_srci(uint32_t info) ++{ ++ return ((info & BCM2835_DMA_S_INC) ? BCM2838_DMA40_INC : 0); ++} ++ ++static inline uint32_t to_bcm2838_dsti(uint32_t info) ++{ ++ return ((info & BCM2835_DMA_D_INC) ? BCM2838_DMA40_INC : 0); ++} ++ ++static inline uint32_t to_bcm2838_cbaddr(dma_addr_t addr) ++{ ++ BUG_ON(addr & 0x1f); ++ return (addr >> 5); ++} ++ + static void bcm2835_dma_free_cb_chain(struct bcm2835_desc *desc) + { + size_t i; +@@ -282,45 +381,53 @@ static void bcm2835_dma_desc_free(struct + } + + static void bcm2835_dma_create_cb_set_length( +- struct bcm2835_chan *chan, ++ struct bcm2835_chan *c, + struct bcm2835_dma_cb *control_block, + size_t len, + size_t period_len, + size_t *total_len, + u32 finalextrainfo) + { +- size_t max_len = bcm2835_dma_max_frame_length(chan); ++ size_t max_len = bcm2835_dma_max_frame_length(c); ++ uint32_t cb_len; + + /* set the length taking lite-channel limitations into account */ +- control_block->length = min_t(u32, len, max_len); ++ cb_len = min_t(u32, len, max_len); + +- /* finished if we have no period_length */ +- if (!period_len) +- return; ++ if (period_len) { ++ /* ++ * period_len means: that we need to generate ++ * transfers that are terminating at every ++ * multiple of period_len - this is typically ++ * used to set the interrupt flag in info ++ * which is required during cyclic transfers ++ */ + +- /* +- * period_len means: that we need to generate +- * transfers that are terminating at every +- * multiple of period_len - this is typically +- * used to set the interrupt flag in info +- * which is required during cyclic transfers +- */ ++ /* have we filled in period_length yet? */ ++ if (*total_len + cb_len < period_len) { ++ /* update number of bytes in this period so far */ ++ *total_len += cb_len; ++ } else { ++ /* calculate the length that remains to reach period_len */ ++ cb_len = period_len - *total_len; + +- /* have we filled in period_length yet? */ +- if (*total_len + control_block->length < period_len) { +- /* update number of bytes in this period so far */ +- *total_len += control_block->length; +- return; ++ /* reset total_length for next period */ ++ *total_len = 0; ++ } + } + +- /* calculate the length that remains to reach period_length */ +- control_block->length = period_len - *total_len; +- +- /* reset total_length for next period */ +- *total_len = 0; +- +- /* add extrainfo bits in info */ +- control_block->info |= finalextrainfo; ++ if (c->is_40bit_channel) { ++ struct bcm2838_dma40_scb *scb = ++ (struct bcm2838_dma40_scb *)control_block; ++ ++ scb->len = cb_len; ++ /* add extrainfo bits to ti */ ++ scb->ti |= to_bcm2838_ti(finalextrainfo); ++ } else { ++ control_block->length = cb_len; ++ /* add extrainfo bits to info */ ++ control_block->info |= finalextrainfo; ++ } + } + + static inline size_t bcm2835_dma_count_frames_for_sg( +@@ -343,7 +450,7 @@ static inline size_t bcm2835_dma_count_f + /** + * bcm2835_dma_create_cb_chain - create a control block and fills data in + * +- * @chan: the @dma_chan for which we run this ++ * @c: the @bcm2835_chan for which we run this + * @direction: the direction in which we transfer + * @cyclic: it is a cyclic transfer + * @info: the default info bits to apply per controlblock +@@ -361,12 +468,11 @@ static inline size_t bcm2835_dma_count_f + * @gfp: the GFP flag to use for allocation + */ + static struct bcm2835_desc *bcm2835_dma_create_cb_chain( +- struct dma_chan *chan, enum dma_transfer_direction direction, ++ struct bcm2835_chan *c, enum dma_transfer_direction direction, + bool cyclic, u32 info, u32 finalextrainfo, size_t frames, + dma_addr_t src, dma_addr_t dst, size_t buf_len, + size_t period_len, gfp_t gfp) + { +- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + size_t len = buf_len, total_len; + size_t frame; + struct bcm2835_desc *d; +@@ -399,11 +505,23 @@ static struct bcm2835_desc *bcm2835_dma_ + + /* fill in the control block */ + control_block = cb_entry->cb; +- control_block->info = info; +- control_block->src = src; +- control_block->dst = dst; +- control_block->stride = 0; +- control_block->next = 0; ++ if (c->is_40bit_channel) { ++ struct bcm2838_dma40_scb *scb = ++ (struct bcm2838_dma40_scb *)control_block; ++ scb->ti = to_bcm2838_ti(info); ++ scb->src = lower_32_bits(src); ++ scb->srci= upper_32_bits(src) | to_bcm2838_srci(info); ++ scb->dst = lower_32_bits(dst); ++ scb->dsti = upper_32_bits(dst) | to_bcm2838_dsti(info); ++ scb->next_cb = 0; ++ } else { ++ control_block->info = info; ++ control_block->src = src; ++ control_block->dst = dst; ++ control_block->stride = 0; ++ control_block->next = 0; ++ } ++ + /* set up length in control_block if requested */ + if (buf_len) { + /* calculate length honoring period_length */ +@@ -417,7 +535,10 @@ static struct bcm2835_desc *bcm2835_dma_ + } + + /* link this the last controlblock */ +- if (frame) ++ if (frame && c->is_40bit_channel) ++ d->cb_list[frame - 1].cb->next = ++ to_bcm2838_cbaddr(cb_entry->paddr); ++ if (frame && !c->is_40bit_channel) + d->cb_list[frame - 1].cb->next = cb_entry->paddr; + + /* update src and dst and length */ +@@ -431,7 +552,14 @@ static struct bcm2835_desc *bcm2835_dma_ + } + + /* the last frame requires extra flags */ +- d->cb_list[d->frames - 1].cb->info |= finalextrainfo; ++ if (c->is_40bit_channel) { ++ struct bcm2838_dma40_scb *scb = ++ (struct bcm2838_dma40_scb *)d->cb_list[d->frames-1].cb; ++ ++ scb->ti |= to_bcm2838_ti(finalextrainfo); ++ } else { ++ d->cb_list[d->frames - 1].cb->info |= finalextrainfo; ++ } + + /* detect a size missmatch */ + if (buf_len && (d->size != buf_len)) +@@ -445,28 +573,51 @@ error_cb: + } + + static void bcm2835_dma_fill_cb_chain_with_sg( +- struct dma_chan *chan, ++ struct bcm2835_chan *c, + enum dma_transfer_direction direction, + struct bcm2835_cb_entry *cb, + struct scatterlist *sgl, + unsigned int sg_len) + { +- struct bcm2835_chan *c = to_bcm2835_dma_chan(chan); + size_t len, max_len; + unsigned int i; + dma_addr_t addr; + struct scatterlist *sgent; + ++ pr_err("dma_fill_chain_with_sg(ch %d, dir %d):\n", c->ch, direction); ++ + max_len = bcm2835_dma_max_frame_length(c); + for_each_sg(sgl, sgent, sg_len, i) { +- for (addr = sg_dma_address(sgent), len = sg_dma_len(sgent); +- len > 0; +- addr += cb->cb->length, len -= cb->cb->length, cb++) { +- if (direction == DMA_DEV_TO_MEM) +- cb->cb->dst = addr; +- else +- cb->cb->src = addr; +- cb->cb->length = min(len, max_len); ++ if (c->is_40bit_channel) { ++ struct bcm2838_dma40_scb *scb = ++ (struct bcm2838_dma40_scb *)cb->cb; ++ for (addr = sg_dma_address(sgent), ++ len = sg_dma_len(sgent); ++ len > 0; ++ addr += scb->len, len -= scb->len, scb++) { ++ if (direction == DMA_DEV_TO_MEM) { ++ scb->dst = lower_32_bits(addr); ++ scb->dsti = upper_32_bits(addr) | BCM2838_DMA40_INC; ++ } else { ++ scb->src = lower_32_bits(addr); ++ scb->srci = upper_32_bits(addr) | BCM2838_DMA40_INC; ++ } ++ scb->len = min(len, max_len); ++ pr_err(" %llx, %x\n", (u64)addr, scb->len); ++ } ++ } else { ++ for (addr = sg_dma_address(sgent), ++ len = sg_dma_len(sgent); ++ len > 0; ++ addr += cb->cb->length, len -= cb->cb->length, ++ cb++) { ++ if (direction == DMA_DEV_TO_MEM) ++ cb->cb->dst = addr; ++ else ++ cb->cb->src = addr; ++ cb->cb->length = min(len, max_len); ++ pr_err(" %llx, %x\n", (u64)addr, cb->cb->length); ++ } + } + } + } +@@ -475,6 +626,10 @@ static int bcm2835_dma_abort(struct bcm2 + { + void __iomem *chan_base = c->chan_base; + long int timeout = 10000; ++ u32 wait_mask = BCM2835_DMA_WAITING_FOR_WRITES; ++ ++ if (c->is_40bit_channel) ++ wait_mask = BCM2838_DMA40_WAITING_FOR_WRITES; + + /* + * A zero control block address means the channel is idle. +@@ -487,8 +642,7 @@ static int bcm2835_dma_abort(struct bcm2 + writel(0, chan_base + BCM2835_DMA_CS); + + /* Wait for any current AXI transfer to complete */ +- while ((readl(chan_base + BCM2835_DMA_CS) & +- BCM2835_DMA_WAITING_FOR_WRITES) && --timeout) ++ while ((readl(chan_base + BCM2835_DMA_CS) & wait_mask) && --timeout) + cpu_relax(); + + /* Peripheral might be stuck and fail to signal AXI write responses */ +@@ -505,6 +659,7 @@ static void bcm2835_dma_start_desc(struc + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + ++ pr_err("dma_start_desc(%px)\n", vd); + if (!vd) { + c->desc = NULL; + return; +@@ -514,9 +669,16 @@ static void bcm2835_dma_start_desc(struc + + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + +- writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR); +- writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq), +- c->chan_base + BCM2835_DMA_CS); ++ if (c->is_40bit_channel) { ++ writel(to_bcm2838_cbaddr(d->cb_list[0].paddr), ++ c->chan_base + BCM2838_DMA40_CB); ++ writel(BCM2838_DMA40_ACTIVE | BCM2838_DMA40_CS_FLAGS(c->dreq), ++ c->chan_base + BCM2838_DMA40_CS); ++ } else { ++ writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR); ++ writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq), ++ c->chan_base + BCM2835_DMA_CS); ++ } + } + + static irqreturn_t bcm2835_dma_callback(int irq, void *data) +@@ -544,7 +706,8 @@ static irqreturn_t bcm2835_dma_callback( + * will remain idle despite the ACTIVE flag being set. + */ + writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE | +- BCM2835_DMA_CS_FLAGS(c->dreq), ++ (c->is_40bit_channel ? BCM2838_DMA40_CS_FLAGS(c->dreq) : ++ BCM2835_DMA_CS_FLAGS(c->dreq)), + c->chan_base + BCM2835_DMA_CS); + + d = c->desc; +@@ -643,9 +806,17 @@ static enum dma_status bcm2835_dma_tx_st + struct bcm2835_desc *d = c->desc; + dma_addr_t pos; + +- if (d->dir == DMA_MEM_TO_DEV) ++ if (d->dir == DMA_MEM_TO_DEV && c->is_40bit_channel) ++ pos = readl(c->chan_base + BCM2838_DMA40_SRC) + ++ ((readl(c->chan_base + BCM2838_DMA40_SRCI) & ++ 0xff) << 8); ++ else if (d->dir == DMA_MEM_TO_DEV && !c->is_40bit_channel) + pos = readl(c->chan_base + BCM2835_DMA_SOURCE_AD); +- else if (d->dir == DMA_DEV_TO_MEM) ++ else if (d->dir == DMA_DEV_TO_MEM && c->is_40bit_channel) ++ pos = readl(c->chan_base + BCM2838_DMA40_DEST) + ++ ((readl(c->chan_base + BCM2838_DMA40_DESTI) & ++ 0xff) << 8); ++ else if (d->dir == DMA_DEV_TO_MEM && !c->is_40bit_channel) + pos = readl(c->chan_base + BCM2835_DMA_DEST_AD); + else + pos = 0; +@@ -691,7 +862,7 @@ static struct dma_async_tx_descriptor *b + frames = bcm2835_dma_frames_for_length(len, max_len); + + /* allocate the CB chain - this also fills in the pointers */ +- d = bcm2835_dma_create_cb_chain(chan, DMA_MEM_TO_MEM, false, ++ d = bcm2835_dma_create_cb_chain(c, DMA_MEM_TO_MEM, false, + info, extra, frames, + src, dst, len, 0, GFP_KERNEL); + if (!d) +@@ -726,11 +897,21 @@ static struct dma_async_tx_descriptor *b + if (c->cfg.src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) + return NULL; + src = c->cfg.src_addr; ++ /* ++ * One would think it ought to be possible to get the physical ++ * to dma address mapping information from the dma-ranges DT ++ * property, but I've not found a way yet that doesn't involve ++ * open-coding the whole thing. ++ */ ++ if (c->is_40bit_channel) ++ src |= 0x400000000ull; + info |= BCM2835_DMA_S_DREQ | BCM2835_DMA_D_INC; + } else { + if (c->cfg.dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES) + return NULL; + dst = c->cfg.dst_addr; ++ if (c->is_40bit_channel) ++ dst |= 0x400000000ull; + info |= BCM2835_DMA_D_DREQ | BCM2835_DMA_S_INC; + } + +@@ -738,7 +919,7 @@ static struct dma_async_tx_descriptor *b + frames = bcm2835_dma_count_frames_for_sg(c, sgl, sg_len); + + /* allocate the CB chain */ +- d = bcm2835_dma_create_cb_chain(chan, direction, false, ++ d = bcm2835_dma_create_cb_chain(c, direction, false, + info, extra, + frames, src, dst, 0, 0, + GFP_KERNEL); +@@ -746,7 +927,7 @@ static struct dma_async_tx_descriptor *b + return NULL; + + /* fill in frames with scatterlist pointers */ +- bcm2835_dma_fill_cb_chain_with_sg(chan, direction, d->cb_list, ++ bcm2835_dma_fill_cb_chain_with_sg(c, direction, d->cb_list, + sgl, sg_len); + + return vchan_tx_prep(&c->vc, &d->vd, flags); +@@ -815,7 +996,7 @@ static struct dma_async_tx_descriptor *b + * note that we need to use GFP_NOWAIT, as the ALSA i2s dmaengine + * implementation calls prep_dma_cyclic with interrupts disabled. + */ +- d = bcm2835_dma_create_cb_chain(chan, direction, true, ++ d = bcm2835_dma_create_cb_chain(c, direction, true, + info, extra, + frames, src, dst, buf_len, + period_len, GFP_NOWAIT); +@@ -823,7 +1004,8 @@ static struct dma_async_tx_descriptor *b + return NULL; + + /* wrap around into a loop */ +- d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr; ++ d->cb_list[d->frames - 1].cb->next = c->is_40bit_channel ? ++ to_bcm2838_cbaddr(d->cb_list[0].paddr) : d->cb_list[0].paddr; + + return vchan_tx_prep(&c->vc, &d->vd, flags); + } +@@ -899,9 +1081,11 @@ static int bcm2835_dma_chan_init(struct + c->irq_number = irq; + c->irq_flags = irq_flags; + +- /* check in DEBUG register if this is a LITE channel */ +- if (readl(c->chan_base + BCM2835_DMA_DEBUG) & +- BCM2835_DMA_DEBUG_LITE) ++ /* check for 40bit and lite channels */ ++ if (d->cfg_data->chan_40bit_mask & BIT(chan_id)) ++ c->is_40bit_channel = true; ++ else if (readl(c->chan_base + BCM2835_DMA_DEBUG) & ++ BCM2835_DMA_DEBUG_LITE) + c->is_lite_channel = true; + + return 0; +@@ -918,18 +1102,16 @@ static void bcm2835_dma_free(struct bcm2 + } + } + +-int bcm2838_dma40_memcpy_init(struct device *dev) ++int bcm2838_dma40_memcpy_init(void) + { +- if (memcpy_scb) +- return 0; ++ if (!memcpy_parent) ++ return -EPROBE_DEFER; + +- memcpy_scb = dma_alloc_coherent(dev, sizeof(*memcpy_scb), +- &memcpy_scb_dma, GFP_KERNEL); ++ if (!memcpy_chan) ++ return -EINVAL; + +- if (!memcpy_scb) { +- pr_err("bcm2838_dma40_memcpy_init failed!\n"); ++ if (!memcpy_scb) + return -ENOMEM; +- } + + return 0; + } +@@ -956,20 +1138,22 @@ void bcm2838_dma40_memcpy(dma_addr_t dst + scb->next_cb = 0; + + writel((u32)(memcpy_scb_dma >> 5), memcpy_chan + BCM2838_DMA40_CB); +- writel(BCM2838_DMA40_MEMCPY_QOS + BCM2838_DMA40_CS_ACTIVE, ++ writel(BCM2838_DMA40_MEMCPY_FLAGS + BCM2838_DMA40_ACTIVE, + memcpy_chan + BCM2838_DMA40_CS); ++ + /* Poll for completion */ +- while (!(readl(memcpy_chan + BCM2838_DMA40_CS) & BCM2838_DMA40_CS_END)) ++ while (!(readl(memcpy_chan + BCM2838_DMA40_CS) & BCM2838_DMA40_END)) + cpu_relax(); + +- writel(BCM2838_DMA40_CS_END, memcpy_chan + BCM2838_DMA40_CS); ++ writel(BCM2838_DMA40_END, memcpy_chan + BCM2838_DMA40_CS); + + spin_unlock_irqrestore(&memcpy_lock, flags); + } + EXPORT_SYMBOL(bcm2838_dma40_memcpy); + + static const struct of_device_id bcm2835_dma_of_match[] = { +- { .compatible = "brcm,bcm2835-dma", }, ++ { .compatible = "brcm,bcm2835-dma", .data = &bcm2835_dma_cfg }, ++ { .compatible = "brcm,bcm2838-dma", .data = &bcm2838_dma_cfg }, + {}, + }; + MODULE_DEVICE_TABLE(of, bcm2835_dma_of_match); +@@ -1001,6 +1185,8 @@ static int bcm2835_dma_probe(struct plat + int irq_flags; + uint32_t chans_available; + char chan_name[BCM2835_DMA_CHAN_NAME_SIZE]; ++ const struct of_device_id *of_id; ++ int chan_count, chan_start, chan_end; + + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; +@@ -1020,9 +1206,13 @@ static int bcm2835_dma_probe(struct plat + base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); +- rc = bcm_dmaman_probe(pdev, base, BCM2835_DMA_BULK_MASK); +- if (rc) +- dev_err(&pdev->dev, "Failed to initialize the legacy API\n"); ++ ++ /* The set of channels can be split across multiple instances. */ ++ chan_start = ((u32)base / BCM2835_DMA_CHAN_SIZE) & 0xf; ++ base -= BCM2835_DMA_CHAN(chan_start); ++ chan_count = resource_size(res) / BCM2835_DMA_CHAN_SIZE; ++ chan_end = min(chan_start + chan_count, ++ BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED + 1); + + od->base = base; + +@@ -1052,6 +1242,14 @@ static int bcm2835_dma_probe(struct plat + + platform_set_drvdata(pdev, od); + ++ of_id = of_match_node(bcm2835_dma_of_match, pdev->dev.of_node); ++ if (!of_id) { ++ dev_err(&pdev->dev, "Failed to match compatible string\n"); ++ return -EINVAL; ++ } ++ ++ od->cfg_data = of_id->data; ++ + /* Request DMA channel mask from device tree */ + if (of_property_read_u32(pdev->dev.of_node, + "brcm,dma-channel-mask", +@@ -1061,18 +1259,34 @@ static int bcm2835_dma_probe(struct plat + goto err_no_dma; + } + +- /* Channel 0 is used by the legacy API */ +- chans_available &= ~BCM2835_DMA_BULK_MASK; ++ /* One channel is reserved for the legacy API */ ++ if (chans_available & BCM2835_DMA_BULK_MASK) { ++ rc = bcm_dmaman_probe(pdev, base, ++ chans_available & BCM2835_DMA_BULK_MASK); ++ if (rc) ++ dev_err(&pdev->dev, ++ "Failed to initialize the legacy API\n"); ++ ++ chans_available &= ~BCM2835_DMA_BULK_MASK; ++ } + +- /* We can't use channels 11-13 yet */ +- chans_available &= ~(BIT(11) | BIT(12) | BIT(13)); ++ /* And possibly one for the 40-bit DMA memcpy API */ ++ if (chans_available & od->cfg_data->chan_40bit_mask & ++ BIT(BCM2838_DMA_MEMCPY_CHAN)) { ++ memcpy_parent = od; ++ memcpy_chan = BCM2835_DMA_CHANIO(base, BCM2838_DMA_MEMCPY_CHAN); ++ memcpy_scb = dma_alloc_coherent(memcpy_parent->ddev.dev, ++ sizeof(*memcpy_scb), ++ &memcpy_scb_dma, GFP_KERNEL); ++ if (!memcpy_scb) ++ dev_warn(&pdev->dev, ++ "Failed to allocated memcpy scb\n"); + +- /* Grab channel 14 for the 40-bit DMA memcpy */ +- chans_available &= ~BIT(14); +- memcpy_chan = BCM2835_DMA_CHANIO(base, 14); ++ chans_available &= ~BIT(BCM2838_DMA_MEMCPY_CHAN); ++ } + + /* get irqs for each channel that we support */ +- for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) { ++ for (i = chan_start; i < chan_end; i++) { + /* skip masked out channels */ + if (!(chans_available & (1 << i))) { + irq[i] = -1; +@@ -1095,13 +1309,17 @@ static int bcm2835_dma_probe(struct plat + irq[i] = platform_get_irq(pdev, i < 11 ? i : 11); + } + ++ chan_count = 0; ++ + /* get irqs for each channel */ +- for (i = 0; i <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; i++) { ++ for (i = chan_start; i < chan_end; i++) { + /* skip channels without irq */ + if (irq[i] < 0) + continue; + + /* check if there are other channels that also use this irq */ ++ /* FIXME: This will fail if interrupts are shared across ++ instances */ + irq_flags = 0; + for (j = 0; j <= BCM2835_DMA_MAX_DMA_CHAN_SUPPORTED; j++) + if ((i != j) && (irq[j] == irq[i])) { +@@ -1113,9 +1331,10 @@ static int bcm2835_dma_probe(struct plat + rc = bcm2835_dma_chan_init(od, i, irq[i], irq_flags); + if (rc) + goto err_no_dma; ++ chan_count++; + } + +- dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", i); ++ dev_dbg(&pdev->dev, "Initialized %i DMA channels\n", chan_count); + + /* Device-tree DMA controller registration */ + rc = of_dma_controller_register(pdev->dev.of_node, +@@ -1147,6 +1366,13 @@ static int bcm2835_dma_remove(struct pla + + bcm_dmaman_remove(pdev); + dma_async_device_unregister(&od->ddev); ++ if (memcpy_parent == od) { ++ dma_free_coherent(&pdev->dev, sizeof(*memcpy_scb), memcpy_scb, ++ memcpy_scb_dma); ++ memcpy_parent = NULL; ++ memcpy_scb = NULL; ++ memcpy_chan = NULL; ++ } + bcm2835_dma_free(od); + + return 0; +--- a/drivers/pci/controller/pcie-brcmstb-bounce.c ++++ b/drivers/pci/controller/pcie-brcmstb-bounce.c +@@ -91,7 +91,7 @@ struct dmabounce_device_info { + + static struct dmabounce_device_info *g_dmabounce_device_info; + +-extern int bcm2838_dma40_memcpy_init(struct device *dev); ++extern int bcm2838_dma40_memcpy_init(void); + extern void bcm2838_dma40_memcpy(dma_addr_t dst, dma_addr_t src, size_t size); + + #ifdef STATS +@@ -471,9 +471,9 @@ static const struct dma_map_ops dmabounc + .mapping_error = dmabounce_mapping_error, + }; + +-int brcm_pcie_bounce_register_dev(struct device *dev, +- unsigned long buffer_size, +- dma_addr_t threshold) ++int brcm_pcie_bounce_init(struct device *dev, ++ unsigned long buffer_size, ++ dma_addr_t threshold) + { + struct dmabounce_device_info *device_info; + int ret; +@@ -482,9 +482,9 @@ int brcm_pcie_bounce_register_dev(struct + if (g_dmabounce_device_info) + return -EBUSY; + +- ret = bcm2838_dma40_memcpy_init(dev); ++ ret = bcm2838_dma40_memcpy_init(); + if (ret) +- return ret; ++ return ret; + + device_info = kmalloc(sizeof(struct dmabounce_device_info), GFP_ATOMIC); + if (!device_info) { +@@ -515,9 +515,8 @@ int brcm_pcie_bounce_register_dev(struct + device_create_file(dev, &dev_attr_dmabounce_stats)); + + g_dmabounce_device_info = device_info; +- set_dma_ops(dev, &dmabounce_ops); + +- dev_info(dev, "dmabounce: registered device - %ld kB, threshold %pad\n", ++ dev_info(dev, "dmabounce: initialised - %ld kB, threshold %pad\n", + buffer_size / 1024, &threshold); + + return 0; +@@ -526,14 +525,13 @@ int brcm_pcie_bounce_register_dev(struct + kfree(device_info); + return ret; + } +-EXPORT_SYMBOL(brcm_pcie_bounce_register_dev); ++EXPORT_SYMBOL(brcm_pcie_bounce_init); + +-void brcm_pcie_bounce_unregister_dev(struct device *dev) ++void brcm_pcie_bounce_uninit(struct device *dev) + { + struct dmabounce_device_info *device_info = g_dmabounce_device_info; + + g_dmabounce_device_info = NULL; +- set_dma_ops(dev, NULL); + + if (!device_info) { + dev_warn(dev, +@@ -554,10 +552,16 @@ void brcm_pcie_bounce_unregister_dev(str + device_remove_file(dev, &dev_attr_dmabounce_stats)); + + kfree(device_info); ++} ++EXPORT_SYMBOL(brcm_pcie_bounce_uninit); ++ ++int brcm_pcie_bounce_register_dev(struct device *dev) ++{ ++ set_dma_ops(dev, &dmabounce_ops); + +- dev_info(dev, "dmabounce: device unregistered\n"); ++ return 0; + } +-EXPORT_SYMBOL(brcm_pcie_bounce_unregister_dev); ++EXPORT_SYMBOL(brcm_pcie_bounce_register_dev); + + MODULE_AUTHOR("Phil Elwell "); + MODULE_DESCRIPTION("Dedicate DMA bounce support for pcie-brcmstb"); +--- a/drivers/pci/controller/pcie-brcmstb-bounce.h ++++ b/drivers/pci/controller/pcie-brcmstb-bounce.h +@@ -8,21 +8,26 @@ + + #ifdef CONFIG_ARM + +-int brcm_pcie_bounce_register_dev(struct device *dev, unsigned long buffer_size, +- dma_addr_t threshold); +- +-int brcm_pcie_bounce_unregister_dev(struct device *dev); ++int brcm_pcie_bounce_init(struct device *dev, unsigned long buffer_size, ++ dma_addr_t threshold); ++int brcm_pcie_bounce_uninit(struct device *dev); ++int brcm_pcie_bounce_register_dev(struct device *dev); + + #else + +-static inline int brcm_pcie_bounce_register_dev(struct device *dev, +- unsigned long buffer_size, +- dma_addr_t threshold) ++static inline int brcm_pcie_bounce_init(struct device *dev, ++ unsigned long buffer_size, ++ dma_addr_t threshold) ++{ ++ return 0; ++} ++ ++static inline int brcm_pcie_bounce_uninit(struct device *dev) + { + return 0; + } + +-static inline int brcm_pcie_bounce_unregister_dev(struct device *dev) ++static inline int brcm_pcie_bounce_register_dev(struct device *dev) + { + return 0; + } +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -650,6 +650,7 @@ static void brcm_set_dma_ops(struct devi + + static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, + unsigned int val); ++ + static int brcmstb_platform_notifier(struct notifier_block *nb, + unsigned long event, void *__dev) + { +@@ -663,12 +664,11 @@ static int brcmstb_platform_notifier(str + strcmp(dev->kobj.name, rc_name)) { + int ret; + +- ret = brcm_pcie_bounce_register_dev(dev, bounce_buffer, +- (dma_addr_t)bounce_threshold); ++ ret = brcm_pcie_bounce_register_dev(dev); + if (ret) { + dev_err(dev, + "brcm_pcie_bounce_register_dev() failed: %d\n", +- ret); ++ ret); + return ret; + } + } +@@ -681,8 +681,6 @@ static int brcmstb_platform_notifier(str + brcm_pcie_perst_set(g_pcie, 1); + msleep(100); + brcm_pcie_perst_set(g_pcie, 0); +- } else if (max_pfn > (bounce_threshold/PAGE_SIZE)) { +- brcm_pcie_bounce_unregister_dev(dev); + } + return NOTIFY_OK; + +@@ -1718,6 +1716,7 @@ static int brcm_pcie_probe(struct platfo + void __iomem *base; + struct pci_host_bridge *bridge; + struct pci_bus *child; ++ extern unsigned long max_pfn; + + bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); + if (!bridge) +@@ -1753,6 +1752,20 @@ static int brcm_pcie_probe(struct platfo + if (IS_ERR(base)) + return PTR_ERR(base); + ++ /* To Do: Add hardware check if this ever gets fixed */ ++ if (max_pfn > (bounce_threshold/PAGE_SIZE)) { ++ int ret; ++ ret = brcm_pcie_bounce_init(&pdev->dev, bounce_buffer, ++ (dma_addr_t)bounce_threshold); ++ if (ret) { ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "could not init bounce buffers: %d\n", ++ ret); ++ return ret; ++ } ++ } ++ + pcie->clk = of_clk_get_by_name(dn, "sw_pcie"); + if (IS_ERR(pcie->clk)) { + dev_warn(&pdev->dev, "could not get clock\n"); diff --git a/target/linux/brcm2708/patches-4.19/950-0651-BCM270X_DT-Leave-bulk-channel-in-dma-channel-mask.patch b/target/linux/brcm2708/patches-4.19/950-0651-BCM270X_DT-Leave-bulk-channel-in-dma-channel-mask.patch new file mode 100644 index 000000000..cc306b142 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0651-BCM270X_DT-Leave-bulk-channel-in-dma-channel-mask.patch @@ -0,0 +1,27 @@ +From 9f8ebf6f517f48041ccb16b80493537eb8522738 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 5 Jun 2019 21:32:03 +0100 +Subject: [PATCH 651/703] BCM270X_DT: Leave bulk channel in dma channel mask + +The updated bcm2835-dma driver does not require the BULK channel +to be removed from the set of available channels, as provided by +dma-channel-mask. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 4 ---- + 1 file changed, 4 deletions(-) + +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -124,10 +124,6 @@ + }; + }; + +-&dma { +- brcm,dma-channel-mask = <0x7f34>; +-}; +- + &hdmi { + power-domains = <&power RPI_POWER_DOMAIN_HDMI>; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0652-SQUASH-bcm2835-dma-Remove-debugging.patch b/target/linux/brcm2708/patches-4.19/950-0652-SQUASH-bcm2835-dma-Remove-debugging.patch new file mode 100644 index 000000000..ec2f7c9a1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0652-SQUASH-bcm2835-dma-Remove-debugging.patch @@ -0,0 +1,45 @@ +From b7780ddb8e7f651f247dfccba05bdc75727abc3c Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 6 Jun 2019 09:35:08 +0100 +Subject: [PATCH 652/703] SQUASH: bcm2835-dma: Remove debugging + +Signed-off-by: Phil Elwell +--- + drivers/dma/bcm2835-dma.c | 5 ----- + 1 file changed, 5 deletions(-) + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -584,8 +584,6 @@ static void bcm2835_dma_fill_cb_chain_wi + dma_addr_t addr; + struct scatterlist *sgent; + +- pr_err("dma_fill_chain_with_sg(ch %d, dir %d):\n", c->ch, direction); +- + max_len = bcm2835_dma_max_frame_length(c); + for_each_sg(sgl, sgent, sg_len, i) { + if (c->is_40bit_channel) { +@@ -603,7 +601,6 @@ static void bcm2835_dma_fill_cb_chain_wi + scb->srci = upper_32_bits(addr) | BCM2838_DMA40_INC; + } + scb->len = min(len, max_len); +- pr_err(" %llx, %x\n", (u64)addr, scb->len); + } + } else { + for (addr = sg_dma_address(sgent), +@@ -616,7 +613,6 @@ static void bcm2835_dma_fill_cb_chain_wi + else + cb->cb->src = addr; + cb->cb->length = min(len, max_len); +- pr_err(" %llx, %x\n", (u64)addr, cb->cb->length); + } + } + } +@@ -659,7 +655,6 @@ static void bcm2835_dma_start_desc(struc + struct virt_dma_desc *vd = vchan_next_desc(&c->vc); + struct bcm2835_desc *d; + +- pr_err("dma_start_desc(%px)\n", vd); + if (!vd) { + c->desc = NULL; + return; diff --git a/target/linux/brcm2708/patches-4.19/950-0653-defconfig-Update-bcm2711-to-match-bcm2709-on-extra-m.patch b/target/linux/brcm2708/patches-4.19/950-0653-defconfig-Update-bcm2711-to-match-bcm2709-on-extra-m.patch new file mode 100644 index 000000000..31f70e2b0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0653-defconfig-Update-bcm2711-to-match-bcm2709-on-extra-m.patch @@ -0,0 +1,300 @@ +From 72ea8706ae509fb2d85c3eac6190e3fb43a6dc0f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 6 Jun 2019 15:22:29 +0100 +Subject: [PATCH 653/703] defconfig: Update bcm2711 to match bcm2709 on extra + modules + +Lots of things like USB DVB tuners were missing from the +defconfig. +Resync it with bcm2709_defconfig + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2711_defconfig | 97 ++++++++++++++++++++++++++++++ + 1 file changed, 97 insertions(+) + +--- a/arch/arm/configs/bcm2711_defconfig ++++ b/arch/arm/configs/bcm2711_defconfig +@@ -14,6 +14,9 @@ CONFIG_TASK_XACCT=y + CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y ++CONFIG_MEMCG=y ++CONFIG_BLK_CGROUP=y ++CONFIG_CGROUP_PIDS=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y +@@ -65,8 +68,10 @@ CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y ++CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y ++CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_BINFMT_MISC=m + CONFIG_CLEANCACHE=y + CONFIG_FRONTSWAP=y +@@ -95,6 +100,7 @@ CONFIG_IP_MROUTE_MULTIPLE_TABLES=y + CONFIG_IP_PIMSM_V1=y + CONFIG_IP_PIMSM_V2=y + CONFIG_SYN_COOKIES=y ++CONFIG_NET_IPVTI=m + CONFIG_INET_AH=m + CONFIG_INET_ESP=m + CONFIG_INET_IPCOMP=m +@@ -214,6 +220,7 @@ CONFIG_NETFILTER_XT_MATCH_QUOTA=m + CONFIG_NETFILTER_XT_MATCH_RATEEST=m + CONFIG_NETFILTER_XT_MATCH_REALM=m + CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m + CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m +@@ -520,6 +527,7 @@ CONFIG_USB_RTL8150=m + CONFIG_USB_RTL8152=y + CONFIG_USB_LAN78XX=y + CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m + CONFIG_USB_NET_AX88179_178A=m + CONFIG_USB_NET_CDCETHER=m + CONFIG_USB_NET_CDC_EEM=m +@@ -573,6 +581,8 @@ CONFIG_LIBERTAS_THINFIRM_USB=m + CONFIG_MWIFIEX=m + CONFIG_MWIFIEX_SDIO=m + CONFIG_MT7601U=m ++CONFIG_MT76x0U=m ++CONFIG_MT76x2U=m + CONFIG_RT2X00=m + CONFIG_RT2500USB=m + CONFIG_RT73USB=m +@@ -613,6 +623,7 @@ CONFIG_TOUCHSCREEN_ADS7846=m + CONFIG_TOUCHSCREEN_EGALAX=m + CONFIG_TOUCHSCREEN_EXC3000=m + CONFIG_TOUCHSCREEN_GOODIX=m ++CONFIG_TOUCHSCREEN_ILI210X=m + CONFIG_TOUCHSCREEN_EDT_FT5X06=m + CONFIG_TOUCHSCREEN_RPI_FT5406=m + CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +@@ -657,8 +668,13 @@ CONFIG_SERIAL_DEV_BUS=m + CONFIG_TTY_PRINTK=y + CONFIG_HW_RANDOM=y + CONFIG_RAW_DRIVER=y ++CONFIG_TCG_TPM=m ++CONFIG_TCG_TIS_SPI=m + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_MUX=m ++CONFIG_I2C_MUX_GPMUX=m ++CONFIG_I2C_MUX_PCA954x=m + CONFIG_I2C_BCM2708=m + CONFIG_I2C_BCM2835=m + CONFIG_I2C_GPIO=m +@@ -667,6 +683,7 @@ CONFIG_I2C_TINY_USB=m + CONFIG_SPI=y + CONFIG_SPI_BCM2835=m + CONFIG_SPI_BCM2835AUX=m ++CONFIG_SPI_GPIO=m + CONFIG_SPI_SPIDEV=m + CONFIG_SPI_SLAVE=y + CONFIG_PPS=m +@@ -698,11 +715,14 @@ CONFIG_W1_SLAVE_DS28E04=m + CONFIG_POWER_RESET=y + CONFIG_POWER_RESET_GPIO=y + CONFIG_BATTERY_DS2760=m ++CONFIG_BATTERY_MAX17040=m + CONFIG_BATTERY_GAUGE_LTC2941=m + CONFIG_HWMON=m + CONFIG_SENSORS_DS1621=m ++CONFIG_SENSORS_GPIO_FAN=m + CONFIG_SENSORS_JC42=m + CONFIG_SENSORS_LM75=m ++CONFIG_SENSORS_RASPBERRYPI_HWMON=m + CONFIG_SENSORS_RPI_POE_FAN=m + CONFIG_SENSORS_SHT21=m + CONFIG_SENSORS_SHT3x=m +@@ -726,6 +746,31 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=m + CONFIG_REGULATOR_ARIZONA_LDO1=m + CONFIG_REGULATOR_ARIZONA_MICSUPP=m + CONFIG_REGULATOR_GPIO=y ++CONFIG_RC_CORE=y ++CONFIG_LIRC=y ++CONFIG_RC_DECODERS=y ++CONFIG_IR_NEC_DECODER=m ++CONFIG_IR_RC5_DECODER=m ++CONFIG_IR_RC6_DECODER=m ++CONFIG_IR_JVC_DECODER=m ++CONFIG_IR_SONY_DECODER=m ++CONFIG_IR_SANYO_DECODER=m ++CONFIG_IR_SHARP_DECODER=m ++CONFIG_IR_MCE_KBD_DECODER=m ++CONFIG_IR_XMP_DECODER=m ++CONFIG_IR_IMON_DECODER=m ++CONFIG_RC_DEVICES=y ++CONFIG_RC_ATI_REMOTE=m ++CONFIG_IR_IMON=m ++CONFIG_IR_MCEUSB=m ++CONFIG_IR_REDRAT3=m ++CONFIG_IR_STREAMZAP=m ++CONFIG_IR_IGUANA=m ++CONFIG_IR_TTUSBIR=m ++CONFIG_RC_LOOPBACK=m ++CONFIG_IR_GPIO_CIR=m ++CONFIG_IR_GPIO_TX=m ++CONFIG_IR_PWM_TX=m + CONFIG_MEDIA_SUPPORT=m + CONFIG_MEDIA_CAMERA_SUPPORT=y + CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +@@ -797,7 +842,40 @@ CONFIG_VIDEO_GO7007=m + CONFIG_VIDEO_GO7007_USB=m + CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m + CONFIG_VIDEO_AU0828=m ++CONFIG_VIDEO_AU0828_RC=y ++CONFIG_VIDEO_CX231XX=m ++CONFIG_VIDEO_CX231XX_ALSA=m ++CONFIG_VIDEO_CX231XX_DVB=m ++CONFIG_VIDEO_TM6000=m ++CONFIG_VIDEO_TM6000_ALSA=m ++CONFIG_VIDEO_TM6000_DVB=m ++CONFIG_DVB_USB=m ++CONFIG_DVB_USB_A800=m ++CONFIG_DVB_USB_DIBUSB_MB=m ++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y ++CONFIG_DVB_USB_DIBUSB_MC=m ++CONFIG_DVB_USB_DIB0700=m ++CONFIG_DVB_USB_UMT_010=m ++CONFIG_DVB_USB_CXUSB=m ++CONFIG_DVB_USB_M920X=m ++CONFIG_DVB_USB_DIGITV=m ++CONFIG_DVB_USB_VP7045=m ++CONFIG_DVB_USB_VP702X=m ++CONFIG_DVB_USB_GP8PSK=m ++CONFIG_DVB_USB_NOVA_T_USB2=m ++CONFIG_DVB_USB_TTUSB2=m ++CONFIG_DVB_USB_DTT200U=m ++CONFIG_DVB_USB_OPERA1=m ++CONFIG_DVB_USB_AF9005=m ++CONFIG_DVB_USB_AF9005_REMOTE=m ++CONFIG_DVB_USB_PCTV452E=m ++CONFIG_DVB_USB_DW2102=m ++CONFIG_DVB_USB_CINERGY_T2=m ++CONFIG_DVB_USB_DTV5100=m ++CONFIG_DVB_USB_AZ6027=m ++CONFIG_DVB_USB_TECHNISAT_USB2=m + CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9015=m + CONFIG_DVB_USB_AF9035=m + CONFIG_DVB_USB_ANYSEE=m + CONFIG_DVB_USB_AU6610=m +@@ -805,7 +883,9 @@ CONFIG_DVB_USB_AZ6007=m + CONFIG_DVB_USB_CE6230=m + CONFIG_DVB_USB_EC168=m + CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_LME2510=m + CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_RTL28XXU=m + CONFIG_DVB_USB_DVBSKY=m + CONFIG_SMS_USB_DRV=m + CONFIG_DVB_B2C2_FLEXCOP_USB=m +@@ -900,9 +980,11 @@ CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_CODEC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC=m + CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI=m ++CONFIG_SND_BCM2708_SOC_I_SABRE_Q2M=m + CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m + CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m + CONFIG_SND_AUDIOINJECTOR_OCTO_SOUNDCARD=m ++CONFIG_SND_AUDIOSENSE_PI=m + CONFIG_SND_DIGIDAC1_SOUNDCARD=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m + CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m +@@ -913,10 +995,14 @@ CONFIG_SND_BCM2708_SOC_ALLO_DIGIONE=m + CONFIG_SND_BCM2708_SOC_ALLO_KATANA_DAC=m + CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m + CONFIG_SND_PISOUND=m ++CONFIG_SND_SOC_AD193X_SPI=m ++CONFIG_SND_SOC_AD193X_I2C=m + CONFIG_SND_SOC_ADAU1701=m + CONFIG_SND_SOC_ADAU7002=m + CONFIG_SND_SOC_AK4554=m ++CONFIG_SND_SOC_CS4265=m + CONFIG_SND_SOC_CS4271_I2C=m ++CONFIG_SND_SOC_ICS43432=m + CONFIG_SND_SOC_SPDIF=m + CONFIG_SND_SOC_WM8804_I2C=m + CONFIG_SND_SIMPLE_CARD=m +@@ -929,6 +1015,7 @@ CONFIG_HID_APPLE=m + CONFIG_HID_ASUS=m + CONFIG_HID_BELKIN=m + CONFIG_HID_BETOP_FF=m ++CONFIG_HID_BIGBEN_FF=m + CONFIG_HID_CHERRY=m + CONFIG_HID_CHICONY=m + CONFIG_HID_CYPRESS=m +@@ -986,6 +1073,7 @@ CONFIG_USB_XHCI_HCD=y + CONFIG_USB_XHCI_PLATFORM=y + CONFIG_USB_DWCOTG=y + CONFIG_USB_PRINTER=m ++CONFIG_USB_TMC=m + CONFIG_USB_STORAGE=y + CONFIG_USB_STORAGE_REALTEK=m + CONFIG_USB_STORAGE_DATAFAB=m +@@ -1006,6 +1094,7 @@ CONFIG_USB_MICROTEK=m + CONFIG_USBIP_CORE=m + CONFIG_USBIP_VHCI_HCD=m + CONFIG_USBIP_HOST=m ++CONFIG_USBIP_VUDC=m + CONFIG_USB_DWC2=m + CONFIG_USB_SERIAL=m + CONFIG_USB_SERIAL_GENERIC=y +@@ -1122,6 +1211,8 @@ CONFIG_MMC_SDHCI_IPROC=y + CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_PCA963X=m ++CONFIG_LEDS_IS31FL32XX=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y + CONFIG_LEDS_TRIGGER_HEARTBEAT=y +@@ -1133,6 +1224,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=m + CONFIG_LEDS_TRIGGER_CAMERA=m + CONFIG_LEDS_TRIGGER_INPUT=y + CONFIG_LEDS_TRIGGER_PANIC=y ++CONFIG_LEDS_TRIGGER_NETDEV=m + CONFIG_RTC_CLASS=y + # CONFIG_RTC_HCTOSYS is not set + CONFIG_RTC_DRV_ABX80X=m +@@ -1154,6 +1246,7 @@ CONFIG_RTC_DRV_FM3130=m + CONFIG_RTC_DRV_RX8581=m + CONFIG_RTC_DRV_RX8025=m + CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_RV3028=m + CONFIG_RTC_DRV_M41T93=m + CONFIG_RTC_DRV_M41T94=m + CONFIG_RTC_DRV_DS1302=m +@@ -1170,6 +1263,8 @@ CONFIG_RTC_DRV_RV3029C2=m + CONFIG_DMADEVICES=y + CONFIG_DMA_BCM2835=y + CONFIG_DMA_BCM2708=y ++CONFIG_AUXDISPLAY=y ++CONFIG_HD44780=m + CONFIG_UIO=m + CONFIG_UIO_PDRV_GENIRQ=m + CONFIG_STAGING=y +@@ -1198,6 +1293,7 @@ CONFIG_FB_TFT_PCD8544=m + CONFIG_FB_TFT_RA8875=m + CONFIG_FB_TFT_S6D02A1=m + CONFIG_FB_TFT_S6D1121=m ++CONFIG_FB_TFT_SH1106=m + CONFIG_FB_TFT_SSD1289=m + CONFIG_FB_TFT_SSD1306=m + CONFIG_FB_TFT_SSD1331=m +@@ -1229,6 +1325,7 @@ CONFIG_MCP3422=m + CONFIG_DHT11=m + CONFIG_HDC100X=m + CONFIG_HTU21=m ++CONFIG_INV_MPU6050_I2C=m + CONFIG_TSL4531=m + CONFIG_VEML6070=m + CONFIG_BMP280=m diff --git a/target/linux/brcm2708/patches-4.19/950-0654-dts-Include-CSI-lane-config-for-csi1.patch b/target/linux/brcm2708/patches-4.19/950-0654-dts-Include-CSI-lane-config-for-csi1.patch new file mode 100644 index 000000000..a18c59d86 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0654-dts-Include-CSI-lane-config-for-csi1.patch @@ -0,0 +1,23 @@ +From e38baaa7198fc28f746a6b72c5cb125920d5145b Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 31 May 2019 17:57:26 +0100 +Subject: [PATCH 654/703] dts: Include CSI lane config for csi1 + +Without the include the peripheral is configured to have 0 +data lanes, which doesn't allow much data to be passed. + +Signed-off-by: Dave Stevenson +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2711.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,4-model-b", "brcm,bcm2838", "brcm,bcm2837"; diff --git a/target/linux/brcm2708/patches-4.19/950-0655-drm-vc4-Fix-T-format-modifiers-in-FKMS.patch b/target/linux/brcm2708/patches-4.19/950-0655-drm-vc4-Fix-T-format-modifiers-in-FKMS.patch new file mode 100644 index 000000000..9f24da54b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0655-drm-vc4-Fix-T-format-modifiers-in-FKMS.patch @@ -0,0 +1,28 @@ +From 07455c93159c15c8838f53716210713376db7065 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 7 Jun 2019 11:31:21 +0100 +Subject: [PATCH 655/703] drm/vc4: Fix T-format modifiers in FKMS. + +The wrong vc_image formats were being checked for in the switch +statement. Correct these. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -458,10 +458,10 @@ static void vc4_plane_atomic_update(stru + switch (fb->modifier) { + case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: + switch (mb->plane.vc_image_type) { +- case VC_IMAGE_RGBX32: ++ case VC_IMAGE_XRGB8888: + mb->plane.vc_image_type = VC_IMAGE_TF_RGBX32; + break; +- case VC_IMAGE_RGBA32: ++ case VC_IMAGE_ARGB8888: + mb->plane.vc_image_type = VC_IMAGE_TF_RGBA32; + break; + case VC_IMAGE_RGB565: diff --git a/target/linux/brcm2708/patches-4.19/950-0656-defconfigs-Add-FB_SIMPLE-to-both-bcmrpi-and-bcm2709-.patch b/target/linux/brcm2708/patches-4.19/950-0656-defconfigs-Add-FB_SIMPLE-to-both-bcmrpi-and-bcm2709-.patch new file mode 100644 index 000000000..2702717ff --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0656-defconfigs-Add-FB_SIMPLE-to-both-bcmrpi-and-bcm2709-.patch @@ -0,0 +1,36 @@ +From db56c3edb3b30f3884537bca47019e7a715a4333 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 7 Jun 2019 11:35:01 +0100 +Subject: [PATCH 656/703] defconfigs: Add FB_SIMPLE to both bcmrpi and bcm2709 + configs + +The firmware sets up simple fb should one of the KMS drivers +be enabled, but the driver isn't being built. +Add it to the build. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2709_defconfig | 1 + + arch/arm/configs/bcmrpi_defconfig | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -928,6 +928,7 @@ CONFIG_TINYDRM_REPAPER=m + CONFIG_FB=y + CONFIG_FB_BCM2708=y + CONFIG_FB_UDL=m ++CONFIG_FB_SIMPLE=y + CONFIG_FB_SSD1307=m + CONFIG_FB_RPISENSE=m + # CONFIG_BACKLIGHT_GENERIC is not set +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -920,6 +920,7 @@ CONFIG_TINYDRM_REPAPER=m + CONFIG_FB=y + CONFIG_FB_BCM2708=y + CONFIG_FB_UDL=m ++CONFIG_FB_SIMPLE=y + CONFIG_FB_SSD1307=m + CONFIG_FB_RPISENSE=m + # CONFIG_BACKLIGHT_GENERIC is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0657-bcm2711-dts-Disable-the-v3d-node-by-default.patch b/target/linux/brcm2708/patches-4.19/950-0657-bcm2711-dts-Disable-the-v3d-node-by-default.patch new file mode 100644 index 000000000..45a095844 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0657-bcm2711-dts-Disable-the-v3d-node-by-default.patch @@ -0,0 +1,23 @@ +From cacc213626d0435a7c9dd1192e0757c082ed048b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 10 Jun 2019 17:22:44 +0100 +Subject: [PATCH 657/703] bcm2711 dts: Disable the v3d node by default + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -13,6 +13,10 @@ + }; + }; + ++&v3d { ++ status = "disabled"; ++}; ++ + &dma { + brcm,dma-channel-mask = <0x7ef5>; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0658-drm-vc4-Remove-340MHz-clock-limit-from-FKMS-now-scra.patch b/target/linux/brcm2708/patches-4.19/950-0658-drm-vc4-Remove-340MHz-clock-limit-from-FKMS-now-scra.patch new file mode 100644 index 000000000..24173b98e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0658-drm-vc4-Remove-340MHz-clock-limit-from-FKMS-now-scra.patch @@ -0,0 +1,29 @@ +From e63e050360bfe8d06552ed5fb0f037d8f18b61bc Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 10 Jun 2019 16:32:51 +0100 +Subject: [PATCH 658/703] drm/vc4: Remove 340MHz clock limit from FKMS now + scrambling issues resolved + +Firmware TMDS scrambling is now being correctly configured, so +we can use it. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 6 ------ + 1 file changed, 6 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -830,12 +830,6 @@ vc4_crtc_mode_valid(struct drm_crtc *crt + break; + } + +- /* Limit the pixel clock until we can get dynamic HDMI 2.0 scrambling +- * working. +- */ +- if (mode->clock > 340000) +- return MODE_CLOCK_HIGH; +- + return MODE_OK; + } + diff --git a/target/linux/brcm2708/patches-4.19/950-0659-Revert-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.patch b/target/linux/brcm2708/patches-4.19/950-0659-Revert-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.patch new file mode 100644 index 000000000..c4e3d0fef --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0659-Revert-usb-xhci-hack-xhci_urb_enqueue-to-support-hid.patch @@ -0,0 +1,113 @@ +From e019f0ccbfab3caccd5c5a8434c48e0a3b8e12cc Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Fri, 7 Jun 2019 14:50:12 +0100 +Subject: [PATCH 659/703] Revert "usb: xhci: hack xhci_urb_enqueue to support + hid.mousepoll behaviour" + +This reverts commit 1cf1071a79f320bc4497a3ade77431f04442eb17. +--- + drivers/usb/host/xhci.c | 86 ----------------------------------------- + 1 file changed, 86 deletions(-) + +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -1416,87 +1416,6 @@ command_cleanup: + } + + /* +- * RPI: Fixup endpoint intervals when requested +- * - Check interval versus the (cached) endpoint context +- * - set the endpoint interval to the new value +- * - force an endpoint configure command +- */ +-static void xhci_fixup_interval(struct xhci_hcd *xhci, struct urb *urb, +- unsigned int slot_id, unsigned int ep_index) +-{ +- struct xhci_ep_ctx *ep_ctx_out, *ep_ctx_in; +- struct xhci_command *command; +- struct xhci_input_control_ctx *ctrl_ctx; +- struct xhci_virt_device *vdev; +- int xhci_interval, ep_interval; +- int ret; +- unsigned long flags; +- u32 ep_info_tmp; +- +- spin_lock_irqsave(&xhci->lock, flags); +- +- vdev = xhci->devs[slot_id]; +- /* Get context-derived endpoint interval */ +- ep_ctx_out = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index); +- ep_ctx_in = xhci_get_ep_ctx(xhci, vdev->in_ctx, ep_index); +- xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx_out->ep_info)); +- ep_interval = urb->interval * 8; +- +- if (ep_interval == xhci_interval) { +- spin_unlock_irqrestore(&xhci->lock, flags); +- return; +- } +- +- xhci_dbg(xhci, "Fixup interval ep_interval=%d xhci_interval=%d\n", +- ep_interval, xhci_interval); +- command = xhci_alloc_command_with_ctx(xhci, true, GFP_ATOMIC); +- if (!command) { +- /* Failure here is benign, poll at the original rate */ +- spin_unlock_irqrestore(&xhci->lock, flags); +- return; +- } +- +- /* xHCI uses exponents for intervals... */ +- xhci_interval = fls(ep_interval) - 1; +- xhci_interval = clamp_val(xhci_interval, 3, 10); +- ep_info_tmp = le32_to_cpu(ep_ctx_out->ep_info); +- ep_info_tmp &= ~EP_INTERVAL(255); +- ep_info_tmp |= EP_INTERVAL(xhci_interval); +- +- /* Keep the endpoint context up-to-date while issuing the command. */ +- xhci_endpoint_copy(xhci, vdev->in_ctx, +- vdev->out_ctx, ep_index); +- ep_ctx_in->ep_info = cpu_to_le32(ep_info_tmp); +- +- /* +- * We need to drop the lock, so take an explicit copy +- * of the ep context. +- */ +- xhci_endpoint_copy(xhci, command->in_ctx, vdev->in_ctx, ep_index); +- +- ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); +- if (!ctrl_ctx) { +- xhci_warn(xhci, +- "%s: Could not get input context, bad type.\n", +- __func__); +- spin_unlock_irqrestore(&xhci->lock, flags); +- xhci_free_command(xhci, command); +- return; +- } +- ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index); +- ctrl_ctx->drop_flags = 0; +- +- spin_unlock_irqrestore(&xhci->lock, flags); +- +- ret = xhci_configure_endpoint(xhci, urb->dev, command, +- false, false); +- if (ret) +- xhci_warn(xhci, "%s: Configure endpoint failed: %d\n", +- __func__, ret); +- xhci_free_command(xhci, command); +-} +- +-/* + * non-error returns are a promise to giveback() the urb later + * we drop ownership so next owner (or urb unlink) can get it + */ +@@ -1564,11 +1483,6 @@ static int xhci_urb_enqueue(struct usb_h + } + } + +- if (usb_endpoint_xfer_int(&urb->ep->desc) && +- (urb->dev->speed == USB_SPEED_FULL || +- urb->dev->speed == USB_SPEED_LOW)) +- xhci_fixup_interval(xhci, urb, slot_id, ep_index); +- + spin_lock_irqsave(&xhci->lock, flags); + + if (xhci->xhc_state & XHCI_STATE_DYING) { diff --git a/target/linux/brcm2708/patches-4.19/950-0660-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch b/target/linux/brcm2708/patches-4.19/950-0660-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch new file mode 100644 index 000000000..714377e90 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0660-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch @@ -0,0 +1,104 @@ +From 8a6b7be03aaf91419a6dbc91dba10cf6e7f6eb73 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 11 Jun 2019 10:55:00 +0100 +Subject: [PATCH 660/703] usb: add plumbing for updating interrupt endpoint + interval state + +xHCI caches device and endpoint data after the interface is configured, +so an explicit command needs to be issued for any device driver wanting +to alter the polling interval of an endpoint. + +Add usb_fixup_endpoint() to allow drivers to do this. The fixup must be +called after calculating endpoint bandwidth requirements but before any +URBs are submitted. + +If polling intervals are shortened, any bandwidth reservations are no +longer valid but in practice polling intervals are only ever relaxed. + +Limit the scope to interrupt transfers for now. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/core/hcd.c | 10 ++++++++++ + drivers/usb/core/message.c | 15 +++++++++++++++ + include/linux/usb.h | 2 ++ + include/linux/usb/hcd.h | 7 +++++++ + 4 files changed, 34 insertions(+) + +--- a/drivers/usb/core/hcd.c ++++ b/drivers/usb/core/hcd.c +@@ -2071,6 +2071,16 @@ reset: + return ret; + } + ++void usb_hcd_fixup_endpoint(struct usb_device *udev, ++ struct usb_host_endpoint *ep, int interval) ++{ ++ struct usb_hcd *hcd; ++ ++ hcd = bus_to_hcd(udev->bus); ++ if (hcd->driver->fixup_endpoint) ++ hcd->driver->fixup_endpoint(hcd, udev, ep, interval); ++} ++ + /* Disables the endpoint: synchronizes with the hcd to make sure all + * endpoint state is gone from hardware. usb_hcd_flush_endpoint() must + * have been called previously. Use for set_configuration, set_interface, +--- a/drivers/usb/core/message.c ++++ b/drivers/usb/core/message.c +@@ -1113,6 +1113,21 @@ static void remove_intf_ep_devs(struct u + intf->ep_devs_created = 0; + } + ++void usb_fixup_endpoint(struct usb_device *dev, int epaddr, int interval) ++{ ++ unsigned int epnum = epaddr & USB_ENDPOINT_NUMBER_MASK; ++ struct usb_host_endpoint *ep; ++ ++ if (usb_endpoint_out(epaddr)) ++ ep = dev->ep_out[epnum]; ++ else ++ ep = dev->ep_in[epnum]; ++ ++ if (ep && usb_endpoint_xfer_int(&ep->desc)) ++ usb_hcd_fixup_endpoint(dev, ep, interval); ++} ++EXPORT_SYMBOL_GPL(usb_fixup_endpoint); ++ + /** + * usb_disable_endpoint -- Disable an endpoint by address + * @dev: the device whose endpoint is being disabled +--- a/include/linux/usb.h ++++ b/include/linux/usb.h +@@ -1809,6 +1809,8 @@ extern int usb_clear_halt(struct usb_dev + extern int usb_reset_configuration(struct usb_device *dev); + extern int usb_set_interface(struct usb_device *dev, int ifnum, int alternate); + extern void usb_reset_endpoint(struct usb_device *dev, unsigned int epaddr); ++extern void usb_fixup_endpoint(struct usb_device *dev, int epaddr, ++ int interval); + + /* this request isn't really synchronous, but it belongs with the others */ + extern int usb_driver_set_configuration(struct usb_device *udev, int config); +--- a/include/linux/usb/hcd.h ++++ b/include/linux/usb/hcd.h +@@ -379,6 +379,11 @@ struct hc_driver { + * or bandwidth constraints. + */ + void (*reset_bandwidth)(struct usb_hcd *, struct usb_device *); ++ /* Override the endpoint-derived interval ++ * (if there is any cached hardware state). ++ */ ++ void (*fixup_endpoint)(struct usb_hcd *hcd, struct usb_device *udev, ++ struct usb_host_endpoint *ep, int interval); + /* Returns the hardware-chosen device address */ + int (*address_device)(struct usb_hcd *, struct usb_device *udev); + /* prepares the hardware to send commands to the device */ +@@ -435,6 +440,8 @@ extern void usb_hcd_unmap_urb_setup_for_ + extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *); + extern void usb_hcd_flush_endpoint(struct usb_device *udev, + struct usb_host_endpoint *ep); ++extern void usb_hcd_fixup_endpoint(struct usb_device *udev, ++ struct usb_host_endpoint *ep, int interval); + extern void usb_hcd_disable_endpoint(struct usb_device *udev, + struct usb_host_endpoint *ep); + extern void usb_hcd_reset_endpoint(struct usb_device *udev, diff --git a/target/linux/brcm2708/patches-4.19/950-0661-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/brcm2708/patches-4.19/950-0661-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch new file mode 100644 index 000000000..6b3e4e161 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0661-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch @@ -0,0 +1,129 @@ +From ef57358754e9ab16429739d0ea1e479967ad4a40 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 11 Jun 2019 11:33:39 +0100 +Subject: [PATCH 661/703] xhci: implement xhci_fixup_endpoint for interval + adjustments + +Must be called in a non-atomic context, after the endpoint +has been registered with the hardware via xhci_add_endpoint +and before the first URB is submitted for the endpoint. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/host/xhci.c | 98 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 98 insertions(+) + +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -1416,6 +1416,103 @@ command_cleanup: + } + + /* ++ * RPI: Fixup endpoint intervals when requested ++ * - Check interval versus the (cached) endpoint context ++ * - set the endpoint interval to the new value ++ * - force an endpoint configure command ++ * XXX: bandwidth is not recalculated. We should probably do that. ++ */ ++static void xhci_fixup_endpoint(struct usb_hcd *hcd, struct usb_device *udev, ++ struct usb_host_endpoint *ep, int interval) ++{ ++ struct xhci_hcd *xhci; ++ struct xhci_ep_ctx *ep_ctx_out, *ep_ctx_in; ++ struct xhci_command *command; ++ struct xhci_input_control_ctx *ctrl_ctx; ++ struct xhci_virt_device *vdev; ++ int xhci_interval; ++ int ret; ++ int ep_index; ++ unsigned long flags; ++ u32 ep_info_tmp; ++ ++ xhci = hcd_to_xhci(hcd); ++ ep_index = xhci_get_endpoint_index(&ep->desc); ++ ++ /* FS/LS interval translations */ ++ if ((udev->speed == USB_SPEED_FULL || ++ udev->speed == USB_SPEED_LOW)) ++ interval *= 8; ++ ++ mutex_lock(&xhci->mutex); ++ ++ spin_lock_irqsave(&xhci->lock, flags); ++ ++ vdev = xhci->devs[udev->slot_id]; ++ /* Get context-derived endpoint interval */ ++ ep_ctx_out = xhci_get_ep_ctx(xhci, vdev->out_ctx, ep_index); ++ ep_ctx_in = xhci_get_ep_ctx(xhci, vdev->in_ctx, ep_index); ++ xhci_interval = EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx_out->ep_info)); ++ ++ if (interval == xhci_interval) { ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ mutex_unlock(&xhci->mutex); ++ return; ++ } ++ ++ xhci_dbg(xhci, "Fixup interval=%d xhci_interval=%d\n", ++ interval, xhci_interval); ++ command = xhci_alloc_command_with_ctx(xhci, true, GFP_ATOMIC); ++ if (!command) { ++ /* Failure here is benign, poll at the original rate */ ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ mutex_unlock(&xhci->mutex); ++ return; ++ } ++ ++ /* xHCI uses exponents for intervals... */ ++ xhci_interval = fls(interval) - 1; ++ xhci_interval = clamp_val(xhci_interval, 3, 10); ++ ep_info_tmp = le32_to_cpu(ep_ctx_out->ep_info); ++ ep_info_tmp &= ~EP_INTERVAL(255); ++ ep_info_tmp |= EP_INTERVAL(xhci_interval); ++ ++ /* Keep the endpoint context up-to-date while issuing the command. */ ++ xhci_endpoint_copy(xhci, vdev->in_ctx, ++ vdev->out_ctx, ep_index); ++ ep_ctx_in->ep_info = cpu_to_le32(ep_info_tmp); ++ ++ /* ++ * We need to drop the lock, so take an explicit copy ++ * of the ep context. ++ */ ++ xhci_endpoint_copy(xhci, command->in_ctx, vdev->in_ctx, ep_index); ++ ++ ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx); ++ if (!ctrl_ctx) { ++ xhci_warn(xhci, ++ "%s: Could not get input context, bad type.\n", ++ __func__); ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ xhci_free_command(xhci, command); ++ mutex_unlock(&xhci->mutex); ++ return; ++ } ++ ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index); ++ ctrl_ctx->drop_flags = 0; ++ ++ spin_unlock_irqrestore(&xhci->lock, flags); ++ ++ ret = xhci_configure_endpoint(xhci, udev, command, ++ false, false); ++ if (ret) ++ xhci_warn(xhci, "%s: Configure endpoint failed: %d\n", ++ __func__, ret); ++ xhci_free_command(xhci, command); ++ mutex_unlock(&xhci->mutex); ++} ++ ++/* + * non-error returns are a promise to giveback() the urb later + * we drop ownership so next owner (or urb unlink) can get it + */ +@@ -5180,6 +5277,7 @@ static const struct hc_driver xhci_hc_dr + .endpoint_reset = xhci_endpoint_reset, + .check_bandwidth = xhci_check_bandwidth, + .reset_bandwidth = xhci_reset_bandwidth, ++ .fixup_endpoint = xhci_fixup_endpoint, + .address_device = xhci_address_device, + .enable_device = xhci_enable_device, + .update_hub_device = xhci_update_hub_device, diff --git a/target/linux/brcm2708/patches-4.19/950-0662-usbhid-call-usb_fixup_endpoint-after-mangling-interv.patch b/target/linux/brcm2708/patches-4.19/950-0662-usbhid-call-usb_fixup_endpoint-after-mangling-interv.patch new file mode 100644 index 000000000..31e06f5a9 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0662-usbhid-call-usb_fixup_endpoint-after-mangling-interv.patch @@ -0,0 +1,23 @@ +From df99e61b9b0ce2018cb796f1b7b3298fd583c196 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 11 Jun 2019 11:42:03 +0100 +Subject: [PATCH 662/703] usbhid: call usb_fixup_endpoint after mangling + intervals + +Lets the mousepoll override mechanism work with xhci. + +Signed-off-by: Jonathan Bell +--- + drivers/hid/usbhid/hid-core.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/hid/usbhid/hid-core.c ++++ b/drivers/hid/usbhid/hid-core.c +@@ -1118,6 +1118,7 @@ static int usbhid_start(struct hid_devic + interval = hid_kbpoll_interval; + break; + } ++ usb_fixup_endpoint(dev, endpoint->bEndpointAddress, interval); + + ret = -ENOMEM; + if (usb_endpoint_dir_in(endpoint)) { diff --git a/target/linux/brcm2708/patches-4.19/950-0663-drm-vc4-Add-status-of-which-display-is-updated-throu.patch b/target/linux/brcm2708/patches-4.19/950-0663-drm-vc4-Add-status-of-which-display-is-updated-throu.patch new file mode 100644 index 000000000..fbc037648 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0663-drm-vc4-Add-status-of-which-display-is-updated-throu.patch @@ -0,0 +1,85 @@ +From 6d90716cd7eac0219310ec8ba8a07e585db05932 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 4 Jun 2019 12:14:30 +0100 +Subject: [PATCH 663/703] drm: vc4: Add status of which display is updated + through vblank + +Previously multiple displays were slaved off the same SMI +interrupt, triggered by HVS channel 1 (HDMI0). +This doesn't work if you only have a DPI or DSI screen (HVS channel +0), and gives slightly erroneous results with dual HDMI as the +events for HDMI1 are incorrect. + +Use SMIDSW0 and SMIDSW1 registers to denote which display has +triggered the vblank. +Handling should be backwards compatible with older firmware. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 41 ++++++++++++++++++++++---- + 1 file changed, 36 insertions(+), 5 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -230,8 +230,13 @@ static const struct vc_image_format *vc4 + * hardware, which has only this one register. + */ + #define SMICS 0x0 ++#define SMIDSW0 0x14 ++#define SMIDSW1 0x1C + #define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11)) + ++/* Flag to denote that the firmware is giving multiple display callbacks */ ++#define SMI_NEW 0xabcd0000 ++ + #define vc4_crtc vc4_kms_crtc + #define to_vc4_crtc to_vc4_kms_crtc + struct vc4_crtc { +@@ -884,16 +889,42 @@ static irqreturn_t vc4_crtc_irq_handler( + int i; + u32 stat = readl(crtc_list[0]->regs + SMICS); + irqreturn_t ret = IRQ_NONE; ++ u32 chan; + + if (stat & SMICS_INTERRUPTS) { + writel(0, crtc_list[0]->regs + SMICS); + +- for (i = 0; crtc_list[i]; i++) { +- if (crtc_list[i]->vblank_enabled) +- drm_crtc_handle_vblank(&crtc_list[i]->base); +- vc4_crtc_handle_page_flip(crtc_list[i]); +- ret = IRQ_HANDLED; ++ chan = readl(crtc_list[0]->regs + SMIDSW0); ++ ++ if ((chan & 0xFFFF0000) != SMI_NEW) { ++ /* Older firmware. Treat the one interrupt as vblank/ ++ * complete for all crtcs. ++ */ ++ for (i = 0; crtc_list[i]; i++) { ++ if (crtc_list[i]->vblank_enabled) ++ drm_crtc_handle_vblank(&crtc_list[i]->base); ++ vc4_crtc_handle_page_flip(crtc_list[i]); ++ } ++ } else { ++ if (chan & 1) { ++ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW0); ++ if (crtc_list[0]->vblank_enabled) ++ drm_crtc_handle_vblank(&crtc_list[0]->base); ++ vc4_crtc_handle_page_flip(crtc_list[0]); ++ } ++ ++ /* Check for the secondary display too */ ++ chan = readl(crtc_list[0]->regs + SMIDSW1); ++ ++ if (chan & 1) { ++ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW1); ++ if (crtc_list[1]->vblank_enabled) ++ drm_crtc_handle_vblank(&crtc_list[1]->base); ++ vc4_crtc_handle_page_flip(crtc_list[1]); ++ } + } ++ ++ ret = IRQ_HANDLED; + } + + return ret; diff --git a/target/linux/brcm2708/patches-4.19/950-0664-drm-vc4-In-FKMS-look-at-the-modifiers-correctly-for-.patch b/target/linux/brcm2708/patches-4.19/950-0664-drm-vc4-In-FKMS-look-at-the-modifiers-correctly-for-.patch new file mode 100644 index 000000000..cd2f7bd04 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0664-drm-vc4-In-FKMS-look-at-the-modifiers-correctly-for-.patch @@ -0,0 +1,36 @@ +From da7972664ce5c26a876d092d8161901985f9fa8f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 12 Jun 2019 17:13:21 +0100 +Subject: [PATCH 664/703] drm/vc4: In FKMS look at the modifiers correctly for + SAND + +Incorrect masking was used in the switch for the modifier, +therefore for SAND (which puts the column pitch in the +modifier) it didn't match. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -460,7 +460,7 @@ static void vc4_plane_atomic_update(stru + } + mb->plane.planes[3] = 0; + +- switch (fb->modifier) { ++ switch (fourcc_mod_broadcom_mod(fb->modifier)) { + case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED: + switch (mb->plane.vc_image_type) { + case VC_IMAGE_XRGB8888: +@@ -476,6 +476,9 @@ static void vc4_plane_atomic_update(stru + break; + case DRM_FORMAT_MOD_BROADCOM_SAND128: + mb->plane.vc_image_type = VC_IMAGE_YUV_UV; ++ /* Note that the column pitch is passed across in lines, not ++ * bytes. ++ */ + mb->plane.pitch = fourcc_mod_broadcom_param(fb->modifier); + break; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0665-arm-dts-Fix-Pi4-PWR-LED-configuration.patch b/target/linux/brcm2708/patches-4.19/950-0665-arm-dts-Fix-Pi4-PWR-LED-configuration.patch new file mode 100644 index 000000000..e3b343f6c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0665-arm-dts-Fix-Pi4-PWR-LED-configuration.patch @@ -0,0 +1,29 @@ +From 119a795378e218aef556999cdeb7ebb44e5fa106 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 17 Jun 2019 10:06:55 +0100 +Subject: [PATCH 665/703] arm: dts: Fix Pi4 PWR LED configuration + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -126,13 +126,13 @@ + act_led: act { + label = "led0"; + linux,default-trigger = "mmc0"; +- gpios = <&gpio 42 0>; ++ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; + }; + + pwr_led: pwr { + label = "led1"; +- linux,default-trigger = "input"; +- gpios = <&expgpio 2 0>; ++ linux,default-trigger = "default-on"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; + }; + }; + diff --git a/target/linux/brcm2708/patches-4.19/950-0666-bcm2838.dtsi-Correct-gic400-memory-address-ranges.patch b/target/linux/brcm2708/patches-4.19/950-0666-bcm2838.dtsi-Correct-gic400-memory-address-ranges.patch new file mode 100644 index 000000000..6946235d3 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0666-bcm2838.dtsi-Correct-gic400-memory-address-ranges.patch @@ -0,0 +1,23 @@ +From 8514b037813eddea0ecc044978a36fe815a29b01 Mon Sep 17 00:00:00 2001 +From: dp111 +Date: Sat, 15 Jun 2019 18:19:50 +0100 +Subject: [PATCH 666/703] bcm2838.dtsi : Correct gic400 memory address ranges + +It appears to me the addresses for the gic400 are slightly wrong . See section 3.2 https://static.docs.arm.com/ddi0471/a/DDI0471A_gic400_r0p0_trm.pdf +--- + arch/arm/boot/dts/bcm2838.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -30,8 +30,8 @@ + compatible = "arm,gic-400"; + reg = <0x40041000 0x1000>, + <0x40042000 0x2000>, +- <0x40046000 0x2000>, +- <0x40048000 0x2000>; ++ <0x40044000 0x2000>, ++ <0x40046000 0x2000>; + }; + + thermal: thermal@7d5d2200 { diff --git a/target/linux/brcm2708/patches-4.19/950-0667-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch b/target/linux/brcm2708/patches-4.19/950-0667-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch new file mode 100644 index 000000000..19d8d3305 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0667-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch @@ -0,0 +1,51 @@ +From 9d6d168d99226d7f31cb1ba56ada37913ebd690a Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 18 Jun 2019 12:15:50 +0100 +Subject: [PATCH 667/703] staging: vchiq: Use the old dma controller for OF + config on platform devices + +vchiq on Pi4 is no longer under the soc node, therefore it +doesn't get the dma-ranges for the VPU. + +Switch to using the configuration of the old dma controller as +that will set the dma-ranges correctly. + +Signed-off-by: Dave Stevenson +--- + .../interface/vchiq_arm/vchiq_arm.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3599,6 +3599,7 @@ vchiq_register_child(struct platform_dev + { + struct platform_device_info pdevinfo; + struct platform_device *new_dev; ++ struct device_node *np; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + +@@ -3612,10 +3613,20 @@ vchiq_register_child(struct platform_dev + return NULL; + + /* +- * We want the dma-ranges etc to be copied from the parent VCHIQ device +- * to be passed on to the children too. ++ * We want the dma-ranges etc to be copied from a device with the ++ * correct dma-ranges for the VPU. ++ * VCHIQ on Pi4 is now under scb which doesn't get those dma-ranges. ++ * Take the "dma" node as going to be suitable as it sees the world ++ * through the same eyes as the VPU. + */ +- of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); ++ np = of_find_node_by_path("dma"); ++ if (!np) ++ np = pdev->dev.of_node; ++ ++ of_dma_configure(&new_dev->dev, np, true); ++ ++ if (np != pdev->dev.of_node) ++ of_node_put(np); + + return new_dev; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0668-drm-vc4-Limit-fkms-to-modes-85Hz.patch b/target/linux/brcm2708/patches-4.19/950-0668-drm-vc4-Limit-fkms-to-modes-85Hz.patch new file mode 100644 index 000000000..314357e4c --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0668-drm-vc4-Limit-fkms-to-modes-85Hz.patch @@ -0,0 +1,26 @@ +From 912084a11b3b27c771dddfaf670fdf35433c969f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 18 Jun 2019 21:37:45 +0100 +Subject: [PATCH 668/703] drm/vc4: Limit fkms to modes <= 85Hz + +Selecting 1080p100 and 120 has very limited gain, but don't want +to block VGA85 and similar. + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -822,6 +822,10 @@ vc4_crtc_mode_valid(struct drm_crtc *crt + return MODE_NO_DBLESCAN; + } + ++ /* Disable refresh rates > 85Hz as limited gain from them */ ++ if (drm_mode_vrefresh(mode) > 85) ++ return MODE_BAD_VVALUE; ++ + /* Limit the pixel clock based on the HDMI clock limits from the + * firmware + */ diff --git a/target/linux/brcm2708/patches-4.19/950-0669-arm-bcm2835-Add-bcm2838-compatible-string.patch b/target/linux/brcm2708/patches-4.19/950-0669-arm-bcm2835-Add-bcm2838-compatible-string.patch new file mode 100644 index 000000000..364d8b517 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0669-arm-bcm2835-Add-bcm2838-compatible-string.patch @@ -0,0 +1,20 @@ +From 7142fbe9edf1c608d788569cb399aa075f2ee837 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 11 Jun 2019 17:38:28 +0100 +Subject: [PATCH 669/703] arm: bcm2835: Add bcm2838 compatible string. + +Signed-off-by: Phil Elwell +--- + arch/arm/mach-bcm/board_bcm2835.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/mach-bcm/board_bcm2835.c ++++ b/arch/arm/mach-bcm/board_bcm2835.c +@@ -118,6 +118,7 @@ static const char * const bcm2835_compat + #ifdef CONFIG_ARCH_MULTI_V7 + "brcm,bcm2836", + "brcm,bcm2837", ++ "brcm,bcm2838", + #endif + NULL + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0670-arm-dts-Improve-the-bcm27xx-inclusion-hierarchy.patch b/target/linux/brcm2708/patches-4.19/950-0670-arm-dts-Improve-the-bcm27xx-inclusion-hierarchy.patch new file mode 100644 index 000000000..74fd795a0 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0670-arm-dts-Improve-the-bcm27xx-inclusion-hierarchy.patch @@ -0,0 +1,490 @@ +From c0cff263c6927ed494f81fcde6bf6fe00e33271b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 4 Jun 2019 16:22:22 +0100 +Subject: [PATCH 670/703] arm: dts: Improve the bcm27xx inclusion hierarchy + +1) The top-level .dts files now include parallel chains of bcm27xx.dtsi + and bcm27xx-rpi.dtsi files, with no cross-inclusion between the two + chains. + +2) Move definitions and deletions to the point of maximum commonality + to reduce redundancy. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-b.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 1 + + arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi-zero.dts | 1 + + arch/arm/boot/dts/bcm2708-rpi.dtsi | 63 +++++++--------------- + arch/arm/boot/dts/bcm2708.dtsi | 1 - + arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 1 + + arch/arm/boot/dts/bcm2709.dtsi | 1 - + arch/arm/boot/dts/bcm270x.dtsi | 18 +------ + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 1 + + arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 1 + + arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 1 + + arch/arm/boot/dts/bcm2710.dtsi | 1 - + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 15 ++++-- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 7 +++ + arch/arm/boot/dts/bcm2711.dtsi | 10 ---- + arch/arm/boot/dts/bcm2835-rpi.dtsi | 16 ++++++ + arch/arm/boot/dts/bcm2838.dtsi | 33 ++++++++---- + arch/arm/boot/dts/bcm283x.dtsi | 2 +- + 20 files changed, 86 insertions(+), 90 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi + +--- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2708.dtsi" ++#include "bcm2708-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2708.dtsi" ++#include "bcm2708-rpi.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi +@@ -1,4 +1,5 @@ + #include "bcm2708.dtsi" ++#include "bcm2708-rpi.dtsi" + + &leds { + act_led: act { +--- a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2708.dtsi" ++#include "bcm2708-rpi.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { +--- a/arch/arm/boot/dts/bcm2708-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2708.dtsi" ++#include "bcm2708-rpi.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -1,6 +1,6 @@ +-/* Downstream version of bcm2835-rpi.dtsi */ ++/* Downstream modifications to bcm2835-rpi.dtsi */ + +-#include ++#include "bcm2835-rpi.dtsi" + + / { + memory { +@@ -49,29 +49,10 @@ + reg = <0x7e200000 0x1000>; + }; + +- firmware: firmware { +- compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; +- #address-cells = <0>; +- #size-cells = <0>; +- mboxes = <&mailbox>; +- }; +- +- power: power { +- compatible = "raspberrypi,bcm2835-power"; +- firmware = <&firmware>; +- #power-domain-cells = <1>; +- }; +- + fb: fb { + compatible = "brcm,bcm2708-fb"; + firmware = <&firmware>; +- status = "disabled"; +- }; +- +- vchiq: mailbox@7e00b840 { +- compatible = "brcm,bcm2835-vchiq"; +- reg = <0x7e00b840 0x3c>; +- interrupts = <0 2>; ++ status = "okay"; + }; + + vcsm: vcsm { +@@ -91,10 +72,6 @@ + sound: sound { + status = "disabled"; + }; +- +- txp: txp@7e004000 { +- status = "disabled"; +- }; + }; + + __overrides__ { +@@ -125,11 +102,23 @@ + }; + + &hdmi { +- power-domains = <&power RPI_POWER_DOMAIN_HDMI>; ++ status = "disabled"; + }; + +-&usb { +- power-domains = <&power RPI_POWER_DOMAIN_USB>; ++&txp { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "disabled"; ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; + }; + + &clocks { +@@ -141,16 +130,8 @@ sdhost_pins: &sdhost_gpio48 { + }; + + &sdhost { +- pinctrl-names = "default"; +- pinctrl-0 = <&sdhost_gpio48>; +- bus-width = <4>; + brcm,overclock-50 = <0>; + brcm,pio-limit = <1>; +- status = "okay"; +-}; +- +-&fb { +- status = "okay"; + }; + + &cpu_thermal { +@@ -160,11 +141,3 @@ sdhost_pins: &sdhost_gpio48 { + &vec { + status = "disabled"; + }; +- +-&csi0 { +- power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; +-}; +- +-&csi1 { +- power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; +-}; +--- a/arch/arm/boot/dts/bcm2708.dtsi ++++ b/arch/arm/boot/dts/bcm2708.dtsi +@@ -1,6 +1,5 @@ + #include "bcm2835.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2708-rpi.dtsi" + + / { + /delete-node/ cpus; +--- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2709.dtsi" ++#include "bcm2709-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2709.dtsi ++++ b/arch/arm/boot/dts/bcm2709.dtsi +@@ -1,6 +1,5 @@ + #include "bcm2836.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2709-rpi.dtsi" + + / { + soc { +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -68,7 +68,7 @@ + + /delete-node/ sdhci@7e300000; + +- mmc: mmc@7e300000 { ++ sdhci: mmc: mmc@7e300000 { + compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci"; + reg = <0x7e300000 0x100>; + interrupts = <2 30>; +@@ -152,22 +152,6 @@ + }; + }; + +- vdd_5v0_reg: fixedregulator_5v0 { +- compatible = "regulator-fixed"; +- regulator-name = "5v0"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- }; +- +- vdd_3v3_reg: fixedregulator_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- + __overrides__ { + cam0-pwdn-ctrl; + cam0-pwdn; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2710.dtsi" ++#include "bcm2709-rpi.dtsi" + #include "bcm283x-rpi-lan7515.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2710.dtsi" ++#include "bcm2709-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts +@@ -1,6 +1,7 @@ + /dts-v1/; + + #include "bcm2710.dtsi" ++#include "bcm2709-rpi.dtsi" + #include "bcm283x-rpi-csi0-2lane.dtsi" + #include "bcm283x-rpi-csi1-4lane.dtsi" + +--- a/arch/arm/boot/dts/bcm2710.dtsi ++++ b/arch/arm/boot/dts/bcm2710.dtsi +@@ -1,6 +1,5 @@ + #include "bcm2837.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2709-rpi.dtsi" + + / { + compatible = "brcm,bcm2837", "brcm,bcm2836"; +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -1,13 +1,12 @@ + /dts-v1/; + + #include "bcm2711.dtsi" ++#include "bcm2711-rpi.dtsi" + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { +- compatible = "raspberrypi,4-model-b", "brcm,bcm2838", "brcm,bcm2837"; ++ compatible = "raspberrypi,4-model-b", "brcm,bcm2838"; + model = "Raspberry Pi 4 Model B"; +- #address-cells = <2>; +- #size-cells = <1>; + + memory { + device_type = "memory"; +@@ -48,10 +47,18 @@ + }; + + &firmware { +- expgpio: expgpio { ++ expgpio: gpio { + compatible = "raspberrypi,firmware-gpio"; + gpio-controller; + #gpio-cells = <2>; ++ gpio-line-names = "BT_ON", ++ "WL_ON", ++ "PWR_LED_OFF", ++ "GLOBAL_RESET", ++ "VDD_SD_IO_SEL", ++ "CAM_GPIO", ++ "", ++ ""; + status = "okay"; + }; + }; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi +@@ -0,0 +1,7 @@ ++#include "bcm2708-rpi.dtsi" ++#include "bcm2838-rpi.dtsi" ++ ++&v3d { ++ /* Undo the overwriting by bcm270x.dtsi */ ++ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; ++}; +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -1,10 +1,8 @@ + #include "bcm2838.dtsi" + #include "bcm270x.dtsi" +-#include "bcm2708-rpi.dtsi" + + / { + soc { +- /delete-node/ mailbox@7e00b840; + /delete-node/ v3d@7ec00000; + }; + +@@ -17,14 +15,6 @@ + status = "disabled"; + }; + +-&dma { +- brcm,dma-channel-mask = <0x7ef5>; +-}; +- +-&txp { +- interrupts = ; +-}; +- + &firmwarekms { + interrupts = ; + }; +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -36,6 +36,22 @@ + interrupts = <0 2>; + }; + }; ++ ++ vdd_3v3_reg: fixedregulator_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ vdd_5v0_reg: fixedregulator_5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; + }; + + &gpio { +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -5,7 +5,10 @@ + #include + + / { +- compatible = "brcm,bcm2838", "brcm,bcm2837"; ++ compatible = "brcm,bcm2838"; ++ ++ #address-cells = <2>; ++ #size-cells = <1>; + + interrupt-parent = <&gicv2>; + +@@ -16,8 +19,8 @@ + /* Emulate a contiguous 30-bit address range for DMA */ + dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; + +- /delete-node/ mailbox@7e00b840; + /delete-node/ interrupt-controller@7e00f300; ++ /delete-node/ v3d@7ec00000; + + local_intc: local_intc@40000000 { + compatible = "brcm,bcm2836-l1-intc"; +@@ -191,6 +194,16 @@ + interrupts = ; + }; + ++ pwm1: pwm@7e20c800 { ++ compatible = "brcm,bcm2835-pwm"; ++ reg = <0x7e20c800 0x28>; ++ clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clock-rates = <10000000>; ++ #pwm-cells = <2>; ++ status = "disabled"; ++ }; ++ + emmc2: emmc2@7e340000 { + compatible = "brcm,bcm2711-emmc2"; + status = "okay"; +@@ -385,7 +398,7 @@ + "dma13", + "dma14"; + #dma-cells = <1>; +- brcm,dma-channel-mask = <0x7000>; ++ brcm,dma-channel-mask = <0x7800>; + }; + /* DMA4 - 40 bit DMA engines */ + +@@ -396,12 +409,6 @@ + interrupts = ; + }; + +- vchiq: mailbox@7e00b840 { +- compatible = "brcm,bcm2838-vchiq"; +- reg = <0 0x7e00b840 0x3c>; +- interrupts = ; +- }; +- + hevc-decoder@7eb00000 { + compatible = "raspberrypi,argon-hevc-decoder"; + reg = <0x0 0x7eb00000 0x10000>; +@@ -450,6 +457,8 @@ + }; + + &gpio { ++ compatible = "brcm,bcm2838-gpio", "brcm,bcm2835-gpio"; ++ + gpclk0_gpio49: gpclk0_gpio49 { + brcm,pins = <49>; + brcm,function = ; +@@ -729,5 +738,9 @@ + "dma8", + "dma9", + "dma10"; +- brcm,dma-channel-mask = <0x01f5>; ++ brcm,dma-channel-mask = <0x07f5>; ++}; ++ ++&txp { ++ interrupts = ; + }; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -55,7 +55,7 @@ + #address-cells = <1>; + #size-cells = <1>; + +- txp@7e004000 { ++ txp: txp@7e004000 { + compatible = "brcm,bcm2835-txp"; + reg = <0x7e004000 0x20>; + interrupts = <1 11>; diff --git a/target/linux/brcm2708/patches-4.19/950-0671-arm-dts-First-draft-of-upstream-Pi4-DTS.patch b/target/linux/brcm2708/patches-4.19/950-0671-arm-dts-First-draft-of-upstream-Pi4-DTS.patch new file mode 100644 index 000000000..fe71dd1e1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0671-arm-dts-First-draft-of-upstream-Pi4-DTS.patch @@ -0,0 +1,176 @@ +From 575145094f904ca3c50e07f69a4ffaea902eadd7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 11 Jun 2019 18:08:05 +0100 +Subject: [PATCH 671/703] arm: dts: First draft of upstream Pi4 DTS + +I've attempted to follow the upstream conventions in the DT commits, +but this is just presented here initially as a talking point. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 118 ++++++++++++++++++++++++++ + arch/arm/boot/dts/bcm2838-rpi.dtsi | 25 ++++++ + 3 files changed, 144 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2838-rpi-4-b.dts + create mode 100644 arch/arm/boot/dts/bcm2838-rpi.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2836-rpi-2-b.dtb \ + bcm2837-rpi-3-b.dtb \ + bcm2837-rpi-3-b-plus.dtb \ ++ bcm2838-rpi-4-b.dtb \ + bcm2835-rpi-zero.dtb \ + bcm2835-rpi-zero-w.dtb + dtb-$(CONFIG_ARCH_BCM_5301X) += \ +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts +@@ -0,0 +1,118 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/dts-v1/; ++#include "bcm2838.dtsi" ++#include "bcm2835-rpi.dtsi" ++#include "bcm2838-rpi.dtsi" ++ ++/ { ++ compatible = "raspberrypi,4-model-b", "brcm,bcm2838"; ++ model = "Raspberry Pi 4 Model B"; ++ ++ chosen { ++ /* 8250 auxiliary UART instead of pl011 */ ++ stdout-path = "serial1:115200n8"; ++ }; ++ ++ memory { ++ reg = <0 0 0x40000000>; ++ }; ++ ++ leds { ++ act { ++ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ pwr { ++ label = "PWR"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ sd_io_1v8_reg: sd_io_1v8_reg { ++ status = "okay"; ++ compatible = "regulator-gpio"; ++ vin-supply = <&vdd_5v0_reg>; ++ regulator-name = "vdd-sd-io"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-settling-time-us = <5000>; ++ ++ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ }; ++}; ++ ++&firmware { ++ expgpio: gpio { ++ compatible = "raspberrypi,firmware-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ gpio-line-names = "BT_ON", ++ "WL_ON", ++ "PWR_LED_OFF", ++ "GLOBAL_RESET", ++ "VDD_SD_IO_SEL", ++ "CAM_GPIO", ++ "", ++ ""; ++ status = "okay"; ++ }; ++}; ++ ++&pwm1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>; ++ status = "okay"; ++}; ++ ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio34>; ++ status = "okay"; ++ bus-width = <4>; ++ non-removable; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* EMMC2 is used to drive the SD card */ ++&emmc2 { ++ status = "okay"; ++ broken-cd; ++ vqmmc-supply = <&sd_io_1v8_reg>; ++}; ++ ++/* uart0 communicates with the BT module */ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <2000000>; ++ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++/* uart1 is mapped to the pin header */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_gpio14>; ++ status = "okay"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2838-rpi.dtsi +@@ -0,0 +1,25 @@ ++// SPDX-License-Identifier: GPL-2.0 ++ ++/ { ++ soc { ++ /delete-node/ mailbox@7e00b840; ++ }; ++}; ++ ++&scb { ++ vchiq: mailbox@7e00b840 { ++ compatible = "brcm,bcm2838-vchiq"; ++ reg = <0 0x7e00b840 0x3c>; ++ interrupts = ; ++ }; ++}; ++ ++&dma { ++ /* The VPU firmware uses DMA channel 11 for VCHIQ */ ++ brcm,dma-channel-mask = <0x1f5>; ++}; ++ ++&dma40 { ++ /* The VPU firmware DMA channel 11 for VCHIQ */ ++ brcm,dma-channel-mask = <0x7000>; ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0672-overlays-Fix-compatible-string-for-ds1307-RTC.patch b/target/linux/brcm2708/patches-4.19/950-0672-overlays-Fix-compatible-string-for-ds1307-RTC.patch new file mode 100644 index 000000000..bab6d3449 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0672-overlays-Fix-compatible-string-for-ds1307-RTC.patch @@ -0,0 +1,28 @@ +From c39c0e9e9c90dc39b5190d3673b88af7cb126e75 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 17 Jun 2019 14:36:12 +0100 +Subject: [PATCH 672/703] overlays: Fix compatible string for ds1307 RTC + +Kernels since 4.19 have required the correct manufacture name in the +compatible string for I2C devices, and unfortunately the one for the +Dallas/Maxim DS1307 should have been "dallas,ds1307" and not +"maxim,ds1307". + +See: https://github.com/raspberrypi/linux/issues/3013 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -30,7 +30,7 @@ + status = "okay"; + + ds1307: ds1307@68 { +- compatible = "maxim,ds1307"; ++ compatible = "dallas,ds1307"; + reg = <0x68>; + status = "okay"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0673-overlays-Fix-further-maxim-ds1307-references.patch b/target/linux/brcm2708/patches-4.19/950-0673-overlays-Fix-further-maxim-ds1307-references.patch new file mode 100644 index 000000000..4a7601d56 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0673-overlays-Fix-further-maxim-ds1307-references.patch @@ -0,0 +1,47 @@ +From c29c9843fd16b4df1dc21ff7e1243f680f41e2a9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 18 Jun 2019 11:16:13 +0100 +Subject: [PATCH 673/703] overlays: Fix further maxim,ds1307 references + +See: https://github.com/raspberrypi/linux/issues/3013 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/balena-fin-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/tinylcd35-overlay.dts | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts ++++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts +@@ -84,7 +84,7 @@ + + // rtc clock + ds1307: ds1307@68 { +- compatible = "maxim,ds1307"; ++ compatible = "dallas,ds1307"; + reg = <0x68>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts +@@ -46,7 +46,7 @@ + status = "okay"; + + ds1307: ds1307@68 { +- compatible = "maxim,ds1307"; ++ compatible = "dallas,ds1307"; + reg = <0x68>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts ++++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts +@@ -155,7 +155,7 @@ + status = "okay"; + + ds1307: ds1307@68 { +- compatible = "maxim,ds1307"; ++ compatible = "dallas,ds1307"; + reg = <0x68>; + status = "okay"; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0674-overlays-Cosmetic-change-to-upstream-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0674-overlays-Cosmetic-change-to-upstream-overlay.patch new file mode 100644 index 000000000..5e6f18ca1 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0674-overlays-Cosmetic-change-to-upstream-overlay.patch @@ -0,0 +1,25 @@ +From 7ab24b7d5ceb098af03e95c0cd261fa89d077cd3 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 18 Jun 2019 11:19:59 +0100 +Subject: [PATCH 674/703] overlays: Cosmetic change to upstream overlay + +The dwc2 overlay no longer uses the dwc2_usb label, and the latest +ovmerge (which generates the upstream overlay) removes unused labels. +Update the checked-in version to match. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/upstream-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -113,7 +113,7 @@ + target = <&usb>; + #address-cells = <1>; + #size-cells = <1>; +- dwc2_usb: __overlay__ { ++ __overlay__ { + compatible = "brcm,bcm2835-usb"; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; diff --git a/target/linux/brcm2708/patches-4.19/950-0675-w1-ds2805-rename-w1_family-struct-fixing-c-p-typo.patch b/target/linux/brcm2708/patches-4.19/950-0675-w1-ds2805-rename-w1_family-struct-fixing-c-p-typo.patch new file mode 100644 index 000000000..ff0d8f113 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0675-w1-ds2805-rename-w1_family-struct-fixing-c-p-typo.patch @@ -0,0 +1,44 @@ +From 5b1cc85a28180a73cbe56be7913ae03ea9a42d2f Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Sat, 25 May 2019 10:45:38 +0200 +Subject: [PATCH 675/703] w1: ds2805: rename w1_family struct, fixing c-p typo + +commit 0e3743d870711ae4daf1e7170c8d9381564e244d upstream. + +The ds2805 has a structure named: w1_family_2d, which surely +comes from a w1_ds2431 module. This commit fixes this name to +prevent confusion and mark a correct family name. + +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2805.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/w1/slaves/w1_ds2805.c ++++ b/drivers/w1/slaves/w1_ds2805.c +@@ -288,7 +288,7 @@ static struct w1_family_ops w1_f0d_fops + .remove_slave = w1_f0d_remove_slave, + }; + +-static struct w1_family w1_family_2d = { ++static struct w1_family w1_family_0d = { + .fid = W1_EEPROM_DS2805, + .fops = &w1_f0d_fops, + }; +@@ -296,13 +296,13 @@ static struct w1_family w1_family_2d = { + static int __init w1_f0d_init(void) + { + pr_info("%s()\n", __func__); +- return w1_register_family(&w1_family_2d); ++ return w1_register_family(&w1_family_0d); + } + + static void __exit w1_f0d_fini(void) + { + pr_info("%s()\n", __func__); +- w1_unregister_family(&w1_family_2d); ++ w1_unregister_family(&w1_family_0d); + } + + module_init(w1_f0d_init); diff --git a/target/linux/brcm2708/patches-4.19/950-0676-w1-ds2413-output_write-cosmetic-fixes-simplify.patch b/target/linux/brcm2708/patches-4.19/950-0676-w1-ds2413-output_write-cosmetic-fixes-simplify.patch new file mode 100644 index 000000000..83158746f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0676-w1-ds2413-output_write-cosmetic-fixes-simplify.patch @@ -0,0 +1,64 @@ +From b6d4c7b839620c8d955b1887ed71c3911df90684 Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Mon, 20 May 2019 09:05:55 +0200 +Subject: [PATCH 676/703] w1: ds2413: output_write() cosmetic fixes / simplify + +commit ae2ee27aa985232f66421d7cd1c7f4b87c7dba7d upstream. + +Make the output_write simpler. +Based on Jean-Francois Dagenais code from: +49695ac46861 ("w1: ds2408: reset on output_write retry with readback") + +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2413.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/drivers/w1/slaves/w1_ds2413.c ++++ b/drivers/w1/slaves/w1_ds2413.c +@@ -69,6 +69,7 @@ static ssize_t output_write(struct file + struct w1_slave *sl = kobj_to_w1_slave(kobj); + u8 w1_buf[3]; + unsigned int retries = W1_F3A_RETRIES; ++ ssize_t bytes_written = -EIO; + + if (count != 1 || off != 0) + return -EFAULT; +@@ -78,7 +79,7 @@ static ssize_t output_write(struct file + dev_dbg(&sl->dev, "mutex locked"); + + if (w1_reset_select_slave(sl)) +- goto error; ++ goto out; + + /* according to the DS2413 datasheet the most significant 6 bits + should be set to "1"s, so do it now */ +@@ -91,18 +92,20 @@ static ssize_t output_write(struct file + w1_write_block(sl->master, w1_buf, 3); + + if (w1_read_8(sl->master) == W1_F3A_SUCCESS_CONFIRM_BYTE) { +- mutex_unlock(&sl->master->bus_mutex); +- dev_dbg(&sl->dev, "mutex unlocked, retries:%d", retries); +- return 1; ++ bytes_written = 1; ++ goto out; + } + if (w1_reset_resume_command(sl->master)) +- goto error; ++ goto out; /* unrecoverable error */ ++ ++ dev_warn(&sl->dev, "PIO_ACCESS_WRITE error, retries left: %d\n", retries); + } + +-error: ++out: + mutex_unlock(&sl->master->bus_mutex); +- dev_dbg(&sl->dev, "mutex unlocked in error, retries:%d", retries); +- return -EIO; ++ dev_dbg(&sl->dev, "%s, mutex unlocked, retries: %d\n", ++ (bytes_written > 0) ? "succeeded" : "error", retries); ++ return bytes_written; + } + + static BIN_ATTR(output, S_IRUGO | S_IWUSR | S_IWGRP, NULL, output_write, 1); diff --git a/target/linux/brcm2708/patches-4.19/950-0677-w1-ds2413-add-retry-support-to-state_read.patch b/target/linux/brcm2708/patches-4.19/950-0677-w1-ds2413-add-retry-support-to-state_read.patch new file mode 100644 index 000000000..9bcca00f8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0677-w1-ds2413-add-retry-support-to-state_read.patch @@ -0,0 +1,74 @@ +From f88a22ce466ccac98bf4aa1c38d36b0e0bb52adb Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Mon, 20 May 2019 09:05:56 +0200 +Subject: [PATCH 677/703] w1: ds2413: add retry support to state_read() + +commit c50d09a86172073f55ebac0b92ad5a75907d64e7 upstream. + +The state_read() was calling PIO_ACCESS_READ once and bail out if it +failed for this first time. +This commit is improving this to trying more times before it give up, +similarly as the write call is currently doing. + +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2413.c | 37 +++++++++++++++++++++++------------ + 1 file changed, 24 insertions(+), 13 deletions(-) + +--- a/drivers/w1/slaves/w1_ds2413.c ++++ b/drivers/w1/slaves/w1_ds2413.c +@@ -30,6 +30,9 @@ static ssize_t state_read(struct file *f + size_t count) + { + struct w1_slave *sl = kobj_to_w1_slave(kobj); ++ unsigned int retries = W1_F3A_RETRIES; ++ ssize_t bytes_read = -EIO; ++ + dev_dbg(&sl->dev, + "Reading %s kobj: %p, off: %0#10x, count: %zu, buff addr: %p", + bin_attr->attr.name, kobj, (unsigned int)off, count, buf); +@@ -42,22 +45,30 @@ static ssize_t state_read(struct file *f + mutex_lock(&sl->master->bus_mutex); + dev_dbg(&sl->dev, "mutex locked"); + +- if (w1_reset_select_slave(sl)) { +- mutex_unlock(&sl->master->bus_mutex); +- return -EIO; +- } ++ if (w1_reset_select_slave(sl)) ++ goto out; + +- w1_write_8(sl->master, W1_F3A_FUNC_PIO_ACCESS_READ); +- *buf = w1_read_8(sl->master); ++ while (retries--) { ++ w1_write_8(sl->master, W1_F3A_FUNC_PIO_ACCESS_READ); + +- mutex_unlock(&sl->master->bus_mutex); +- dev_dbg(&sl->dev, "mutex unlocked"); ++ *buf = w1_read_8(sl->master); ++ /* check for correct complement */ ++ if ((*buf & 0x0F) == ((~*buf >> 4) & 0x0F)) { ++ bytes_read = 1; ++ goto out; ++ } ++ ++ if (w1_reset_resume_command(sl->master)) ++ goto out; /* unrecoverable error */ + +- /* check for correct complement */ +- if ((*buf & 0x0F) != ((~*buf >> 4) & 0x0F)) +- return -EIO; +- else +- return 1; ++ dev_warn(&sl->dev, "PIO_ACCESS_READ error, retries left: %d\n", retries); ++ } ++ ++out: ++ mutex_unlock(&sl->master->bus_mutex); ++ dev_dbg(&sl->dev, "%s, mutex unlocked, retries: %d\n", ++ (bytes_read > 0) ? "succeeded" : "error", retries); ++ return bytes_read; + } + + static BIN_ATTR_RO(state, 1); diff --git a/target/linux/brcm2708/patches-4.19/950-0678-w1-ds2413-when-the-slave-is-not-responding-during-re.patch b/target/linux/brcm2708/patches-4.19/950-0678-w1-ds2413-when-the-slave-is-not-responding-during-re.patch new file mode 100644 index 000000000..c3b0c5d30 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0678-w1-ds2413-when-the-slave-is-not-responding-during-re.patch @@ -0,0 +1,56 @@ +From 1808665b2b2e06d6f14762eb0ab82d65e3af3e2b Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Wed, 22 May 2019 12:40:53 +0200 +Subject: [PATCH 678/703] w1: ds2413: when the slave is not responding during + read, select it again + +commit 3856032a0628e6b94badb9131a706dda185e071d upstream. + +The protocol is not allowing to obtain a byte of 0xff for PIO_ACCESS_READ +call. It is very likely that the slave was not addressed properly and +it is just not respoding (leaving the bus in logic high state) during +the read of sampled PIO value. +We cannot just call w1_reset_resume_command() because the problem will +persist, instead try selecting (addressing) the slave again. + +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2413.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +--- a/drivers/w1/slaves/w1_ds2413.c ++++ b/drivers/w1/slaves/w1_ds2413.c +@@ -24,6 +24,7 @@ + #define W1_F3A_FUNC_PIO_ACCESS_READ 0xF5 + #define W1_F3A_FUNC_PIO_ACCESS_WRITE 0x5A + #define W1_F3A_SUCCESS_CONFIRM_BYTE 0xAA ++#define W1_F3A_INVALID_PIO_STATE 0xFF + + static ssize_t state_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, loff_t off, +@@ -45,6 +46,7 @@ static ssize_t state_read(struct file *f + mutex_lock(&sl->master->bus_mutex); + dev_dbg(&sl->dev, "mutex locked"); + ++next: + if (w1_reset_select_slave(sl)) + goto out; + +@@ -52,10 +54,15 @@ static ssize_t state_read(struct file *f + w1_write_8(sl->master, W1_F3A_FUNC_PIO_ACCESS_READ); + + *buf = w1_read_8(sl->master); +- /* check for correct complement */ + if ((*buf & 0x0F) == ((~*buf >> 4) & 0x0F)) { ++ /* complement is correct */ + bytes_read = 1; + goto out; ++ } else if (*buf == W1_F3A_INVALID_PIO_STATE) { ++ /* slave didn't respond, try to select it again */ ++ dev_warn(&sl->dev, "slave device did not respond to PIO_ACCESS_READ, " \ ++ "reselecting, retries left: %d\n", retries); ++ goto next; + } + + if (w1_reset_resume_command(sl->master)) diff --git a/target/linux/brcm2708/patches-4.19/950-0679-w1-ds2413-fix-state-byte-comparision.patch b/target/linux/brcm2708/patches-4.19/950-0679-w1-ds2413-fix-state-byte-comparision.patch new file mode 100644 index 000000000..154a60c9a --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0679-w1-ds2413-fix-state-byte-comparision.patch @@ -0,0 +1,48 @@ +From 7a5972e019d1f4cef5ea50b9077b43f097b23084 Mon Sep 17 00:00:00 2001 +From: Mariusz Bialonczyk +Date: Thu, 30 May 2019 09:51:25 +0200 +Subject: [PATCH 679/703] w1: ds2413: fix state byte comparision + +commit aacd152ecd7b18af5d2d96dea9e7284c1c93abea upstream. + +This commit is fixing a smatch warning: +drivers/w1/slaves/w1_ds2413.c:61 state_read() warn: impossible condition '(*buf == 255) => ((-128)-127 == 255)' +by creating additional u8 variable for the bus reading and comparision + +Reported-by: kbuild test robot +Reported-by: Dan Carpenter +Cc: Dan Carpenter +Fixes: 3856032a0628 ("w1: ds2413: when the slave is not responding during read, select it again") +Signed-off-by: Mariusz Bialonczyk +Signed-off-by: Greg Kroah-Hartman +--- + drivers/w1/slaves/w1_ds2413.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/w1/slaves/w1_ds2413.c ++++ b/drivers/w1/slaves/w1_ds2413.c +@@ -33,6 +33,7 @@ static ssize_t state_read(struct file *f + struct w1_slave *sl = kobj_to_w1_slave(kobj); + unsigned int retries = W1_F3A_RETRIES; + ssize_t bytes_read = -EIO; ++ u8 state; + + dev_dbg(&sl->dev, + "Reading %s kobj: %p, off: %0#10x, count: %zu, buff addr: %p", +@@ -53,12 +54,13 @@ next: + while (retries--) { + w1_write_8(sl->master, W1_F3A_FUNC_PIO_ACCESS_READ); + +- *buf = w1_read_8(sl->master); +- if ((*buf & 0x0F) == ((~*buf >> 4) & 0x0F)) { ++ state = w1_read_8(sl->master); ++ if ((state & 0x0F) == ((~state >> 4) & 0x0F)) { + /* complement is correct */ ++ *buf = state; + bytes_read = 1; + goto out; +- } else if (*buf == W1_F3A_INVALID_PIO_STATE) { ++ } else if (state == W1_F3A_INVALID_PIO_STATE) { + /* slave didn't respond, try to select it again */ + dev_warn(&sl->dev, "slave device did not respond to PIO_ACCESS_READ, " \ + "reselecting, retries left: %d\n", retries); diff --git a/target/linux/brcm2708/patches-4.19/950-0680-drm-vc4_dsi-Fix-DMA-channel-and-memory-leak-in-vc4-3.patch b/target/linux/brcm2708/patches-4.19/950-0680-drm-vc4_dsi-Fix-DMA-channel-and-memory-leak-in-vc4-3.patch new file mode 100644 index 000000000..2b87deca8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0680-drm-vc4_dsi-Fix-DMA-channel-and-memory-leak-in-vc4-3.patch @@ -0,0 +1,135 @@ +From 47ac9aac7067b0415ed2ffe7251a5bfc05114b41 Mon Sep 17 00:00:00 2001 +From: Chris Miller +Date: Wed, 26 Jun 2019 10:40:30 +0100 +Subject: [PATCH 680/703] drm: vc4_dsi: Fix DMA channel and memory leak in vc4 + (#3012) + +Signed-off-by: Chris G Miller +--- + drivers/gpu/drm/vc4/vc4_dsi.c | 35 ++++++++++++++++++++++++----------- + 1 file changed, 24 insertions(+), 11 deletions(-) + +--- a/drivers/gpu/drm/vc4/vc4_dsi.c ++++ b/drivers/gpu/drm/vc4/vc4_dsi.c +@@ -1536,9 +1536,11 @@ static int vc4_dsi_bind(struct device *d + /* DSI1 has a broken AXI slave that doesn't respond to writes + * from the ARM. It does handle writes from the DMA engine, + * so set up a channel for talking to it. ++ * Where possible managed resource providers are used, but the DMA channel ++ * must - if acquired - be explicitly released prior to taking an error exit path. + */ + if (dsi->port == 1) { +- dsi->reg_dma_mem = dma_alloc_coherent(dev, 4, ++ dsi->reg_dma_mem = dmam_alloc_coherent(dev, 4, + &dsi->reg_dma_paddr, + GFP_KERNEL); + if (!dsi->reg_dma_mem) { +@@ -1557,6 +1559,8 @@ static int vc4_dsi_bind(struct device *d + return ret; + } + ++ /* From here on, any error exits must release the dma channel */ ++ + /* Get the physical address of the device's registers. The + * struct resource for the regs gives us the bus address + * instead. +@@ -1583,7 +1587,7 @@ static int vc4_dsi_bind(struct device *d + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get interrupt: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + + dsi->escape_clock = devm_clk_get(dev, "escape"); +@@ -1591,7 +1595,7 @@ static int vc4_dsi_bind(struct device *d + ret = PTR_ERR(dsi->escape_clock); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get escape clock: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + + dsi->pll_phy_clock = devm_clk_get(dev, "phy"); +@@ -1599,7 +1603,7 @@ static int vc4_dsi_bind(struct device *d + ret = PTR_ERR(dsi->pll_phy_clock); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get phy clock: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + + dsi->pixel_clock = devm_clk_get(dev, "pixel"); +@@ -1607,7 +1611,7 @@ static int vc4_dsi_bind(struct device *d + ret = PTR_ERR(dsi->pixel_clock); + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get pixel clock: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + + ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0, +@@ -1622,26 +1626,28 @@ static int vc4_dsi_bind(struct device *d + if (ret == -ENODEV) + return 0; + +- return ret; ++ goto rel_dma_exit; + } + + if (panel) { + dsi->bridge = devm_drm_panel_bridge_add(dev, panel, + DRM_MODE_CONNECTOR_DSI); +- if (IS_ERR(dsi->bridge)) +- return PTR_ERR(dsi->bridge); ++ if (IS_ERR(dsi->bridge)){ ++ ret = PTR_ERR(dsi->bridge); ++ goto rel_dma_exit; ++ } + } + + /* The esc clock rate is supposed to always be 100Mhz. */ + ret = clk_set_rate(dsi->escape_clock, 100 * 1000000); + if (ret) { + dev_err(dev, "Failed to set esc clock: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + + ret = vc4_dsi_init_phy_clocks(dsi); + if (ret) +- return ret; ++ goto rel_dma_exit; + + if (dsi->port == 1) + vc4->dsi1 = dsi; +@@ -1653,7 +1659,7 @@ static int vc4_dsi_bind(struct device *d + ret = drm_bridge_attach(dsi->encoder, dsi->bridge, NULL); + if (ret) { + dev_err(dev, "bridge attach failed: %d\n", ret); +- return ret; ++ goto rel_dma_exit; + } + /* Disable the atomic helper calls into the bridge. We + * manually call the bridge pre_enable / enable / etc. calls +@@ -1665,6 +1671,11 @@ static int vc4_dsi_bind(struct device *d + pm_runtime_enable(dev); + + return 0; ++ ++rel_dma_exit: ++ dma_release_channel(dsi->reg_dma_chan); ++ ++ return ret; + } + + static void vc4_dsi_unbind(struct device *dev, struct device *master, +@@ -1679,6 +1690,8 @@ static void vc4_dsi_unbind(struct device + + vc4_dsi_encoder_destroy(dsi->encoder); + ++ dma_release_channel(dsi->reg_dma_chan); ++ + if (dsi->port == 1) + vc4->dsi1 = NULL; + } diff --git a/target/linux/brcm2708/patches-4.19/950-0681-video-bcm2708_fb-Revert-cma-allocation-attempt.patch b/target/linux/brcm2708/patches-4.19/950-0681-video-bcm2708_fb-Revert-cma-allocation-attempt.patch new file mode 100644 index 000000000..d34736362 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0681-video-bcm2708_fb-Revert-cma-allocation-attempt.patch @@ -0,0 +1,159 @@ +From d14f0987d0a03c122f6a713df8969109a6213333 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 19 Jun 2019 03:55:50 +0100 +Subject: [PATCH 681/703] video/bcm2708_fb: Revert cma allocation attempt + +"4600e91 Pulled in the multi frame buffer support from the Pi3 repo" +pulled back in the code for allocating the framebuffer from the CMA +heap. +Revert it again. + +Signed-off-by: Dave Stevenson +--- + drivers/video/fbdev/bcm2708_fb.c | 101 +++------------------ + include/soc/bcm2835/raspberrypi-firmware.h | 1 - + 2 files changed, 13 insertions(+), 89 deletions(-) + +--- a/drivers/video/fbdev/bcm2708_fb.c ++++ b/drivers/video/fbdev/bcm2708_fb.c +@@ -112,9 +112,6 @@ struct bcm2708_fb { + struct vc4_display_settings_t display_settings; + struct debugfs_regset32 screeninfo_regset; + struct bcm2708_fb_dev *fbdev; +- unsigned int image_size; +- dma_addr_t dma_addr; +- void *cpuaddr; + }; + + #define MAX_FRAMEBUFFERS 3 +@@ -377,12 +374,12 @@ static int bcm2708_fb_set_par(struct fb_ + .xoffset = info->var.xoffset, + .yoffset = info->var.yoffset, + .tag5 = { RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE, 8, 0 }, +- /* base and screen_size will be initialised later */ +- .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH, 4, 0 }, +- /* pitch will be initialised later */ ++ .base = 0, ++ .screen_size = 0, ++ .tag6 = { RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH, 4, 0 }, ++ .pitch = 0, + }; +- int ret, image_size; +- ++ int ret; + + print_debug("%s(%p) %dx%d (%dx%d), %d, %d (display %d)\n", __func__, + info, +@@ -397,76 +394,12 @@ static int bcm2708_fb_set_par(struct fb_ + */ + set_display_num(fb); + +- /* Try allocating our own buffer. We can specify all the parameters */ +- image_size = ((info->var.xres * info->var.yres) * +- info->var.bits_per_pixel) >> 3; +- +- if (!fb->fbdev->disable_arm_alloc && +- (image_size != fb->image_size || !fb->dma_addr)) { +- if (fb->dma_addr) { +- dma_free_coherent(info->device, fb->image_size, +- fb->cpuaddr, fb->dma_addr); +- fb->image_size = 0; +- fb->cpuaddr = NULL; +- fb->dma_addr = 0; +- } +- +- fb->cpuaddr = dma_alloc_coherent(info->device, image_size, +- &fb->dma_addr, GFP_KERNEL); +- +- if (!fb->cpuaddr) { +- fb->dma_addr = 0; +- fb->fbdev->disable_arm_alloc = true; +- } else { +- fb->image_size = image_size; +- } +- } +- +- if (fb->cpuaddr) { +- fbinfo.base = fb->dma_addr; +- fbinfo.screen_size = image_size; +- fbinfo.pitch = (info->var.xres * info->var.bits_per_pixel) >> 3; +- +- ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo, +- sizeof(fbinfo)); +- if (ret || fbinfo.base != fb->dma_addr) { +- /* Firmware either failed, or assigned a different base +- * address (ie it doesn't support being passed an FB +- * allocation). +- * Destroy the allocation, and don't try again. +- */ +- dma_free_coherent(info->device, fb->image_size, +- fb->cpuaddr, fb->dma_addr); +- fb->image_size = 0; +- fb->cpuaddr = NULL; +- fb->dma_addr = 0; +- fb->fbdev->disable_arm_alloc = true; +- } +- } else { +- /* Our allocation failed - drop into the old scheme of +- * allocation by the VPU. +- */ +- ret = -ENOMEM; +- } +- ++ ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo, ++ sizeof(fbinfo)); + if (ret) { +- /* Old scheme: +- * - FRAMEBUFFER_ALLOCATE passes 0 for base and screen_size. +- * - GET_PITCH instead of SET_PITCH. +- */ +- fbinfo.base = 0; +- fbinfo.screen_size = 0; +- fbinfo.tag6.tag = RPI_FIRMWARE_FRAMEBUFFER_GET_PITCH; +- fbinfo.pitch = 0; +- +- ret = rpi_firmware_property_list(fb->fbdev->fw, &fbinfo, +- sizeof(fbinfo)); +- if (ret) { +- dev_err(info->device, +- "Failed to allocate GPU framebuffer (%d)\n", +- ret); +- return ret; +- } ++ dev_err(info->device, ++ "Failed to allocate GPU framebuffer (%d)\n", ret); ++ return ret; + } + + if (info->var.bits_per_pixel <= 8) +@@ -481,17 +414,9 @@ static int bcm2708_fb_set_par(struct fb_ + fb->fb.fix.smem_start = fbinfo.base; + fb->fb.fix.smem_len = fbinfo.pitch * fbinfo.yres_virtual; + fb->fb.screen_size = fbinfo.screen_size; +- +- if (!fb->dma_addr) { +- if (fb->fb.screen_base) +- iounmap(fb->fb.screen_base); +- +- fb->fb.screen_base = ioremap_wc(fbinfo.base, +- fb->fb.screen_size); +- } else { +- fb->fb.screen_base = fb->cpuaddr; +- } +- ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ fb->fb.screen_base = ioremap_wc(fbinfo.base, fb->fb.screen_size); + if (!fb->fb.screen_base) { + /* the console may currently be locked */ + console_trylock(); +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -138,7 +138,6 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, + RPI_FIRMWARE_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, + RPI_FIRMWARE_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, +- RPI_FIRMWARE_FRAMEBUFFER_SET_PITCH = 0x00048008, + RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, + RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, + RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, diff --git a/target/linux/brcm2708/patches-4.19/950-0682-drm-vc4-Add-support-for-color-encoding-on-YUV-planes.patch b/target/linux/brcm2708/patches-4.19/950-0682-drm-vc4-Add-support-for-color-encoding-on-YUV-planes.patch new file mode 100644 index 000000000..ca0124bab --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0682-drm-vc4-Add-support-for-color-encoding-on-YUV-planes.patch @@ -0,0 +1,110 @@ +From 5edffe06ee9b72d3fb56853d0652dd9cdc02e44d Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 24 Jun 2019 02:29:40 +0100 +Subject: [PATCH 682/703] drm/vc4: Add support for color encoding on YUV planes + +Adds signalling for BT601/709/2020, and limited/full range +(on BT601). + +Signed-off-by: Dave Stevenson +--- + drivers/gpu/drm/vc4/vc4_firmware_kms.c | 32 +++++++++++++++++++++++++- + drivers/gpu/drm/vc4/vc_image_types.h | 28 ++++++++++++++++++++++ + 2 files changed, 59 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c ++++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c +@@ -66,7 +66,7 @@ struct set_plane { + u8 alpha; + u8 num_planes; + u8 is_vu; +- u8 padding; ++ u8 color_encoding; + + u32 planes[4]; /* DMA address of each plane */ + +@@ -454,6 +454,28 @@ static void vc4_plane_atomic_update(stru + if (num_planes == 3 && + (fb->offsets[2] - fb->offsets[1]) == fb->pitches[1]) + mb->plane.vc_image_type = VC_IMAGE_YUV420_S; ++ ++ switch (state->color_encoding) { ++ default: ++ case DRM_COLOR_YCBCR_BT601: ++ if (state->color_range == DRM_COLOR_YCBCR_LIMITED_RANGE) ++ mb->plane.color_encoding = ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT601; ++ else ++ mb->plane.color_encoding = ++ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF; ++ break; ++ case DRM_COLOR_YCBCR_BT709: ++ /* Currently no support for a full range BT709 */ ++ mb->plane.color_encoding = ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT709; ++ break; ++ case DRM_COLOR_YCBCR_BT2020: ++ /* Currently no support for a full range BT2020 */ ++ mb->plane.color_encoding = ++ VC_IMAGE_YUVINFO_CSC_REC_2020; ++ break; ++ } + } else { + mb->plane.planes[1] = 0; + mb->plane.planes[2] = 0; +@@ -643,6 +665,14 @@ static struct drm_plane *vc4_fkms_plane_ + drm_plane_create_alpha_property(plane); + drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0, + SUPPORTED_ROTATIONS); ++ drm_plane_create_color_properties(plane, ++ BIT(DRM_COLOR_YCBCR_BT601) | ++ BIT(DRM_COLOR_YCBCR_BT709) | ++ BIT(DRM_COLOR_YCBCR_BT2020), ++ BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | ++ BIT(DRM_COLOR_YCBCR_FULL_RANGE), ++ DRM_COLOR_YCBCR_BT709, ++ DRM_COLOR_YCBCR_LIMITED_RANGE); + + /* + * Default frame buffer setup is with FB on -127, and raspistill etc +--- a/drivers/gpu/drm/vc4/vc_image_types.h ++++ b/drivers/gpu/drm/vc4/vc_image_types.h +@@ -4,6 +4,8 @@ + * + * Values taken from vc_image_types.h released by Broadcom at + * https://github.com/raspberrypi/userland/blob/master/interface/vctypes/vc_image_types.h ++ * and vc_image_structs.h at ++ * https://github.com/raspberrypi/userland/blob/master/interface/vctypes/vc_image_structs.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as +@@ -141,3 +143,29 @@ enum { + VC_IMAGE_MAX, /* bounds for error checking */ + VC_IMAGE_FORCE_ENUM_16BIT = 0xffff, + }; ++ ++enum { ++ /* Unknown or unset - defaults to BT601 interstitial */ ++ VC_IMAGE_YUVINFO_UNSPECIFIED = 0, ++ ++ /* colour-space conversions data [4 bits] */ ++ ++ /* ITU-R BT.601-5 [SDTV] (compatible with VideoCore-II) */ ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT601 = 1, ++ /* ITU-R BT.709-3 [HDTV] */ ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT709 = 2, ++ /* JPEG JFIF */ ++ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF = 3, ++ /* Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */ ++ VC_IMAGE_YUVINFO_CSC_FCC = 4, ++ /* Society of Motion Picture and Television Engineers 240M (1999) */ ++ VC_IMAGE_YUVINFO_CSC_SMPTE_240M = 5, ++ /* ITU-R BT.470-2 System M */ ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT470_2_M = 6, ++ /* ITU-R BT.470-2 System B,G */ ++ VC_IMAGE_YUVINFO_CSC_ITUR_BT470_2_BG = 7, ++ /* JPEG JFIF, but with 16..255 luma */ ++ VC_IMAGE_YUVINFO_CSC_JPEG_JFIF_Y16_255 = 8, ++ /* Rec 2020 */ ++ VC_IMAGE_YUVINFO_CSC_REC_2020 = 9, ++}; diff --git a/target/linux/brcm2708/patches-4.19/950-0683-configs-Drop-V4L2-camera-and-codec-drivers-from-bcmr.patch b/target/linux/brcm2708/patches-4.19/950-0683-configs-Drop-V4L2-camera-and-codec-drivers-from-bcmr.patch new file mode 100644 index 000000000..9755ccd59 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0683-configs-Drop-V4L2-camera-and-codec-drivers-from-bcmr.patch @@ -0,0 +1,25 @@ +From 3467b4cfdf72b5b6f4c5a493be9c3d632aa72211 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 28 Jun 2019 16:05:25 +0100 +Subject: [PATCH 683/703] configs: Drop V4L2 camera and codec drivers from + bcmrpi3_defconfig + +They rely on mmal_vchiq, which in turn wants vc-sm-cma. +vc-sm-cma needs some attention for 64 bit, so drop it for now. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1086,8 +1086,6 @@ CONFIG_FB_TFT_WATTEROTT=m + CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m +-CONFIG_VIDEO_BCM2835=m +-CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0684-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM2835.patch b/target/linux/brcm2708/patches-4.19/950-0684-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM2835.patch new file mode 100644 index 000000000..b30cce42d --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0684-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM2835.patch @@ -0,0 +1,49 @@ +From 548a9808b61de74ad57e904d4952bfbfaabf89a7 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 28 Jun 2019 22:44:09 +0100 +Subject: [PATCH 684/703] configs: arm64/bcm2711: Remove CONFIG_VIDEO_BCM2835 + +Undefine CONFIG_VIDEO_BCM2835 until it builds for arm64. + +See: https://github.com/raspberrypi/linux/issues/3024 +See: https://github.com/raspberrypi/linux/pull/3030 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcm2709_defconfig | 2 +- + arch/arm64/configs/bcm2711_defconfig | 2 -- + 2 files changed, 1 insertion(+), 3 deletions(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -16,11 +16,11 @@ CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y + CONFIG_MEMCG=y + CONFIG_BLK_CGROUP=y ++CONFIG_CGROUP_PIDS=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y +-CONFIG_CGROUP_PIDS=y + CONFIG_NAMESPACES=y + CONFIG_USER_NS=y + CONFIG_SCHED_AUTOGROUP=y +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -1031,7 +1031,6 @@ CONFIG_USB_G_HID=m + CONFIG_USB_G_WEBCAM=m + CONFIG_MMC=y + CONFIG_MMC_BLOCK_MINORS=32 +-CONFIG_MMC_SDHCI_BCM2711=y + CONFIG_MMC_BCM2835_MMC=y + CONFIG_MMC_BCM2835_DMA=y + CONFIG_MMC_BCM2835_SDHOST=y +@@ -1130,7 +1129,6 @@ CONFIG_FB_TFT_WATTEROTT=m + CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m +-CONFIG_VIDEO_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0685-arm-dts-Add-coherent_pool-1M-to-Pi-4-bootargs.patch b/target/linux/brcm2708/patches-4.19/950-0685-arm-dts-Add-coherent_pool-1M-to-Pi-4-bootargs.patch new file mode 100644 index 000000000..e08928ba8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0685-arm-dts-Add-coherent_pool-1M-to-Pi-4-bootargs.patch @@ -0,0 +1,28 @@ +From bce3d83c8d1b9e2cab6001f079287ca79912a2fa Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 2 Jul 2019 17:13:05 +0100 +Subject: [PATCH 685/703] arm: dts: Add coherent_pool=1M to Pi 4 bootargs + +Downstream Raspberry Pi dts files add "coherent_pool=1M" to the kernel +command line to aid the dwc_otg driver, but this excluded Pi 4 which +uses a new XCHI interface instead. UAS also benefits from a larger +coherent_pool value, so replicate the addition in bcm2711-rpi-4-b.dts. + +See: https://github.com/raspberrypi/linux/pull/3040 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -14,7 +14,7 @@ + }; + + chosen { +- bootargs = "8250.nr_uarts=1 cma=64M"; ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M"; + }; + + aliases { diff --git a/target/linux/brcm2708/patches-4.19/950-0686-configs-Enable-USB_CONFIGFS-m-in-bcmrpi_defconfig.patch b/target/linux/brcm2708/patches-4.19/950-0686-configs-Enable-USB_CONFIGFS-m-in-bcmrpi_defconfig.patch new file mode 100644 index 000000000..9c9f076fc --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0686-configs-Enable-USB_CONFIGFS-m-in-bcmrpi_defconfig.patch @@ -0,0 +1,22 @@ +From 31ddd6caf3ac6c77b6b2e30acc2551c8597a969b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 2 Jul 2019 21:25:59 +0100 +Subject: [PATCH 686/703] configs: Enable USB_CONFIGFS=m in bcmrpi_defconfig + +See: https://github.com/raspberrypi/linux/issues/3042 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcmrpi_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1150,6 +1150,7 @@ CONFIG_USB_CXACRU=m + CONFIG_USB_UEAGLEATM=m + CONFIG_USB_XUSBATM=m + CONFIG_USB_GADGET=m ++CONFIG_USB_CONFIGFS=m + CONFIG_USB_ZERO=m + CONFIG_USB_AUDIO=m + CONFIG_USB_ETH=m diff --git a/target/linux/brcm2708/patches-4.19/950-0687-configs-And-all-the-other-USB_CONFIGFS-options.patch b/target/linux/brcm2708/patches-4.19/950-0687-configs-And-all-the-other-USB_CONFIGFS-options.patch new file mode 100644 index 000000000..b511bf263 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0687-configs-And-all-the-other-USB_CONFIGFS-options.patch @@ -0,0 +1,40 @@ +From 04958bf394a778098ead8eedb27c51c44f58ef21 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 2 Jul 2019 21:43:13 +0100 +Subject: [PATCH 687/703] configs: And all the other USB_CONFIGFS options + +And all Rabbit's friends-and-relations. + +See: https://github.com/raspberrypi/linux/issues/3042 + +Signed-off-by: Phil Elwell +--- + arch/arm/configs/bcmrpi_defconfig | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/arch/arm/configs/bcmrpi_defconfig ++++ b/arch/arm/configs/bcmrpi_defconfig +@@ -1151,6 +1151,23 @@ CONFIG_USB_UEAGLEATM=m + CONFIG_USB_XUSBATM=m + CONFIG_USB_GADGET=m + CONFIG_USB_CONFIGFS=m ++CONFIG_USB_CONFIGFS_SERIAL=y ++CONFIG_USB_CONFIGFS_ACM=y ++CONFIG_USB_CONFIGFS_OBEX=y ++CONFIG_USB_CONFIGFS_NCM=y ++CONFIG_USB_CONFIGFS_ECM=y ++CONFIG_USB_CONFIGFS_ECM_SUBSET=y ++CONFIG_USB_CONFIGFS_RNDIS=y ++CONFIG_USB_CONFIGFS_EEM=y ++CONFIG_USB_CONFIGFS_MASS_STORAGE=y ++CONFIG_USB_CONFIGFS_F_LB_SS=y ++CONFIG_USB_CONFIGFS_F_FS=y ++CONFIG_USB_CONFIGFS_F_UAC1=y ++CONFIG_USB_CONFIGFS_F_UAC2=y ++CONFIG_USB_CONFIGFS_F_MIDI=y ++CONFIG_USB_CONFIGFS_F_HID=y ++CONFIG_USB_CONFIGFS_F_UVC=y ++CONFIG_USB_CONFIGFS_F_PRINTER=y + CONFIG_USB_ZERO=m + CONFIG_USB_AUDIO=m + CONFIG_USB_ETH=m diff --git a/target/linux/brcm2708/patches-4.19/950-0688-configs-arm64-bcm2711-Add-MMC_SDHCI_IPROC.patch b/target/linux/brcm2708/patches-4.19/950-0688-configs-arm64-bcm2711-Add-MMC_SDHCI_IPROC.patch new file mode 100644 index 000000000..3dc471956 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0688-configs-arm64-bcm2711-Add-MMC_SDHCI_IPROC.patch @@ -0,0 +1,24 @@ +From efdc8dd4cb2e2d607f2c1cc0689faa6590c164f2 Mon Sep 17 00:00:00 2001 +From: Andrei Gherzan +Date: Wed, 3 Jul 2019 13:53:29 +0100 +Subject: [PATCH 688/703] configs: arm64/bcm2711: Add MMC_SDHCI_IPROC + +This driver is used in the device tree for the emmc2 node. + +See #3032 + +Signed-off-by: Andrei Gherzan +--- + arch/arm64/configs/bcm2711_defconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -1036,6 +1036,7 @@ CONFIG_MMC_BCM2835_DMA=y + CONFIG_MMC_BCM2835_SDHOST=y + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_IPROC=y + CONFIG_MMC_SPI=m + CONFIG_LEDS_CLASS=y + CONFIG_LEDS_GPIO=y diff --git a/target/linux/brcm2708/patches-4.19/950-0689-overlays-Correct-gpio-fan-gpio-flags-for-4.19.patch b/target/linux/brcm2708/patches-4.19/950-0689-overlays-Correct-gpio-fan-gpio-flags-for-4.19.patch new file mode 100644 index 000000000..ad8eb7aaf --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0689-overlays-Correct-gpio-fan-gpio-flags-for-4.19.patch @@ -0,0 +1,30 @@ +From feace5977af2dc38e4b089b52f6915e538cdf9e9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 3 Jul 2019 20:37:14 +0100 +Subject: [PATCH 689/703] overlays: Correct gpio-fan gpio flags for 4.19 + +The gpio-fan overlay was submitted for the 4.14 kernel where the second +value in the Device Tree gpios declaration was ignored (thanks to an +old-style driver), allowing the fan-control output to be active-high +even though the declaration appears to request it be active-low. +The gpio-fan driver in 4.19 uses GPIO descriptors and honours the +active-low flag that the overlay (accidentally?) supplies. + +Change/correct the flags field to mark the GPIO as active-high. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/gpio-fan-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts +@@ -45,7 +45,7 @@ + __overlay__ { + fan0: gpio-fan@0 { + compatible = "gpio-fan"; +- gpios = <&gpio 12 1>; ++ gpios = <&gpio 12 0>; + gpio-fan,speed-map = <0 0>, + <5000 1>; + #cooling-cells = <2>; diff --git a/target/linux/brcm2708/patches-4.19/950-0690-staging-vcsm-cma-Remove-cache-manipulation-ioctl-fro.patch b/target/linux/brcm2708/patches-4.19/950-0690-staging-vcsm-cma-Remove-cache-manipulation-ioctl-fro.patch new file mode 100644 index 000000000..191891679 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0690-staging-vcsm-cma-Remove-cache-manipulation-ioctl-fro.patch @@ -0,0 +1,78 @@ +From fbcf72909974b3dda42a292013c349647bcfa945 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 25 Jun 2019 00:29:44 +0100 +Subject: [PATCH 690/703] staging: vcsm-cma: Remove cache manipulation ioctl + from ARM64 + +The cache flushing ioctls are used by the Pi3 HEVC hw-assisted +decoder as it needs finer grained flushing control than dma_ops +allow. +These cache calls are not present for ARM64, therefore disable +them. We are not actively supporting 64bit kernels at present, +and the use case of the HEVC decoder is fairly limited. + +Signed-off-by: Dave Stevenson +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -1259,6 +1259,7 @@ error: + return ret; + } + ++#ifndef CONFIG_ARM64 + /* Converts VCSM_CACHE_OP_* to an operating function. */ + static void (*cache_op_to_func(const unsigned int cache_op)) + (const void*, const void*) +@@ -1351,6 +1352,7 @@ out: + + return ret; + } ++#endif + + static long vc_sm_cma_ioctl(struct file *file, unsigned int cmd, + unsigned long arg) +@@ -1448,6 +1450,7 @@ static long vc_sm_cma_ioctl(struct file + break; + } + ++#ifndef CONFIG_ARM64 + /* + * Flush/Invalidate the cache for a given mapping. + * Blocks must be pinned (i.e. accessed) before this call. +@@ -1455,6 +1458,7 @@ static long vc_sm_cma_ioctl(struct file + case VC_SM_CMA_CMD_CLEAN_INVALID2: + ret = vc_sm_cma_clean_invalid2(cmdnr, arg); + break; ++#endif + + default: + pr_debug("[%s]: cmd %x tgid %u, owner %u\n", __func__, cmdnr, +@@ -1467,6 +1471,7 @@ static long vc_sm_cma_ioctl(struct file + return ret; + } + ++#ifndef CONFIG_ARM64 + #ifdef CONFIG_COMPAT + struct vc_sm_cma_ioctl_clean_invalid2_32 { + u32 op_count; +@@ -1496,14 +1501,17 @@ static long vc_sm_cma_compat_ioctl(struc + } + } + #endif ++#endif + + /* Device operations that we managed in this driver. */ + static const struct file_operations vc_sm_ops = { + .owner = THIS_MODULE, + .unlocked_ioctl = vc_sm_cma_ioctl, ++#ifndef CONFIG_ARM64 + #ifdef CONFIG_COMPAT + .compat_ioctl = vc_sm_cma_compat_ioctl, + #endif ++#endif + .open = vc_sm_cma_open, + .release = vc_sm_cma_release, + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0691-staging-vcsm-cma-Rework-to-use-dma-APIs-not-CMA.patch b/target/linux/brcm2708/patches-4.19/950-0691-staging-vcsm-cma-Rework-to-use-dma-APIs-not-CMA.patch new file mode 100644 index 000000000..84ab727f6 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0691-staging-vcsm-cma-Rework-to-use-dma-APIs-not-CMA.patch @@ -0,0 +1,758 @@ +From 6c3a3d85c8877cb506d8a646fea01a97695fab14 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 1 Jul 2019 11:57:25 +0100 +Subject: [PATCH 691/703] staging: vcsm-cma: Rework to use dma APIs, not CMA + +Due to a misunderstanding of the DMA mapping APIs, I made +the wrong decision on how to implement this. + +Rework to use dma_alloc_coherent instead of the CMA +API. This also allows it to be built as a module easily. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/Kconfig | 4 +- + .../staging/vc04_services/vc-sm-cma/Makefile | 2 +- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 291 ++++++++++-------- + .../staging/vc04_services/vc-sm-cma/vc_sm.h | 13 +- + .../vc04_services/vc-sm-cma/vc_sm_cma.c | 98 ------ + .../vc04_services/vc-sm-cma/vc_sm_cma.h | 39 --- + 6 files changed, 168 insertions(+), 279 deletions(-) + delete mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c + delete mode 100644 drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h + +--- a/drivers/staging/vc04_services/vc-sm-cma/Kconfig ++++ b/drivers/staging/vc04_services/vc-sm-cma/Kconfig +@@ -1,6 +1,6 @@ + config BCM_VC_SM_CMA +- bool "VideoCore Shared Memory (CMA) driver" +- depends on BCM2835_VCHIQ && DMA_CMA ++ tristate "VideoCore Shared Memory (CMA) driver" ++ depends on BCM2835_VCHIQ + select RBTREE + select DMA_SHARED_BUFFER + help +--- a/drivers/staging/vc04_services/vc-sm-cma/Makefile ++++ b/drivers/staging/vc04_services/vc-sm-cma/Makefile +@@ -3,6 +3,6 @@ ccflags-y += -Idrivers/staging/vc04_serv + ccflags-y += -D__VCCOREVER__=0 + + vc-sm-cma-$(CONFIG_BCM_VC_SM_CMA) := \ +- vc_sm.o vc_sm_cma_vchi.o vc_sm_cma.o ++ vc_sm.o vc_sm_cma_vchi.o + + obj-$(CONFIG_BCM_VC_SM_CMA) += vc-sm-cma.o +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -6,8 +6,8 @@ + * Dave Stevenson + * + * Based on vmcs_sm driver from Broadcom Corporation for some API, +- * and taking some code for CMA/dmabuf handling from the Android Ion +- * driver (Google/Linaro). ++ * and taking some code for buffer allocation and dmabuf handling from ++ * videobuf2. + * + * + * This driver has 3 main uses: +@@ -52,7 +52,6 @@ + #include "vc_sm_cma_vchi.h" + + #include "vc_sm.h" +-#include "vc_sm_cma.h" + #include "vc_sm_knl.h" + #include + +@@ -89,7 +88,6 @@ struct sm_state_t { + struct miscdevice misc_dev; + + struct sm_instance *sm_handle; /* Handle for videocore service. */ +- struct cma *cma_heap; + + spinlock_t kernelid_map_lock; /* Spinlock protecting kernelid_map */ + struct idr kernelid_map; +@@ -110,8 +108,9 @@ struct sm_state_t { + + struct vc_sm_dma_buf_attachment { + struct device *dev; +- struct sg_table *table; ++ struct sg_table sg_table; + struct list_head list; ++ enum dma_data_direction dma_dir; + }; + + /* ---- Private Variables ----------------------------------------------- */ +@@ -202,9 +201,10 @@ static int vc_sm_cma_global_state_show(s + resource->import.attach); + seq_printf(s, " SGT %p\n", + resource->import.sgt); ++ } else { ++ seq_printf(s, " SGT %p\n", ++ resource->alloc.sg_table); + } +- seq_printf(s, " SG_TABLE %p\n", +- resource->sg_table); + seq_printf(s, " DMA_ADDR %pad\n", + &resource->dma_addr); + seq_printf(s, " VC_HANDLE %08x\n", +@@ -296,8 +296,9 @@ static void vc_sm_vpu_free(struct vc_sm_ + */ + static void vc_sm_release_resource(struct vc_sm_buffer *buffer) + { +- pr_debug("[%s]: buffer %p (name %s, size %zu)\n", +- __func__, buffer, buffer->name, buffer->size); ++ pr_debug("[%s]: buffer %p (name %s, size %zu), imported %u\n", ++ __func__, buffer, buffer->name, buffer->size, ++ buffer->imported); + + if (buffer->vc_handle) { + /* We've sent the unmap request but not had the response. */ +@@ -313,8 +314,6 @@ static void vc_sm_release_resource(struc + + /* Release the allocation (whether imported dmabuf or CMA allocation) */ + if (buffer->imported) { +- pr_debug("%s: Release imported dmabuf %p\n", __func__, +- buffer->import.dma_buf); + if (buffer->import.dma_buf) + dma_buf_put(buffer->import.dma_buf); + else +@@ -322,16 +321,8 @@ static void vc_sm_release_resource(struc + __func__, buffer); + buffer->import.dma_buf = NULL; + } else { +- if (buffer->sg_table) { +- /* Our own allocation that we need to dma_unmap_sg */ +- dma_unmap_sg(&sm_state->pdev->dev, +- buffer->sg_table->sgl, +- buffer->sg_table->nents, +- DMA_BIDIRECTIONAL); +- } +- pr_debug("%s: Release our allocation\n", __func__); +- vc_sm_cma_buffer_free(&buffer->alloc); +- pr_debug("%s: Release our allocation - done\n", __func__); ++ dma_free_coherent(&sm_state->pdev->dev, buffer->size, ++ buffer->cookie, buffer->dma_addr); + } + + +@@ -371,38 +362,6 @@ static struct vc_sm_privdata_t *vc_sm_cm + return file_data; + } + +-static struct sg_table *dup_sg_table(struct sg_table *table) +-{ +- struct sg_table *new_table; +- int ret, i; +- struct scatterlist *sg, *new_sg; +- +- new_table = kzalloc(sizeof(*new_table), GFP_KERNEL); +- if (!new_table) +- return ERR_PTR(-ENOMEM); +- +- ret = sg_alloc_table(new_table, table->nents, GFP_KERNEL); +- if (ret) { +- kfree(new_table); +- return ERR_PTR(ret); +- } +- +- new_sg = new_table->sgl; +- for_each_sg(table->sgl, sg, table->nents, i) { +- memcpy(new_sg, sg, sizeof(*sg)); +- sg->dma_address = 0; +- new_sg = sg_next(new_sg); +- } +- +- return new_table; +-} +- +-static void free_duped_table(struct sg_table *table) +-{ +- sg_free_table(table); +- kfree(table); +-} +- + /* Dma buf operations for use with our own allocations */ + + static int vc_sm_dma_buf_attach(struct dma_buf *dmabuf, +@@ -410,28 +369,45 @@ static int vc_sm_dma_buf_attach(struct d + + { + struct vc_sm_dma_buf_attachment *a; +- struct sg_table *table; ++ struct sg_table *sgt; + struct vc_sm_buffer *buf = dmabuf->priv; ++ struct scatterlist *rd, *wr; ++ int ret, i; + + a = kzalloc(sizeof(*a), GFP_KERNEL); + if (!a) + return -ENOMEM; + +- table = dup_sg_table(buf->sg_table); +- if (IS_ERR(table)) { ++ pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); ++ ++ mutex_lock(&buf->lock); ++ ++ INIT_LIST_HEAD(&a->list); ++ ++ sgt = &a->sg_table; ++ ++ /* Copy the buf->base_sgt scatter list to the attachment, as we can't ++ * map the same scatter list to multiple attachments at the same time. ++ */ ++ ret = sg_alloc_table(sgt, buf->alloc.sg_table->orig_nents, GFP_KERNEL); ++ if (ret) { + kfree(a); +- return PTR_ERR(table); ++ return -ENOMEM; + } + +- a->table = table; +- INIT_LIST_HEAD(&a->list); ++ rd = buf->alloc.sg_table->sgl; ++ wr = sgt->sgl; ++ for (i = 0; i < sgt->orig_nents; ++i) { ++ sg_set_page(wr, sg_page(rd), rd->length, rd->offset); ++ rd = sg_next(rd); ++ wr = sg_next(wr); ++ } + ++ a->dma_dir = DMA_NONE; + attachment->priv = a; + +- mutex_lock(&buf->lock); + list_add(&a->list, &buf->attachments); + mutex_unlock(&buf->lock); +- pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); + + return 0; + } +@@ -441,9 +417,20 @@ static void vc_sm_dma_buf_detach(struct + { + struct vc_sm_dma_buf_attachment *a = attachment->priv; + struct vc_sm_buffer *buf = dmabuf->priv; ++ struct sg_table *sgt; + + pr_debug("%s dmabuf %p attachment %p\n", __func__, dmabuf, attachment); +- free_duped_table(a->table); ++ if (!a) ++ return; ++ ++ sgt = &a->sg_table; ++ ++ /* release the scatterlist cache */ ++ if (a->dma_dir != DMA_NONE) ++ dma_unmap_sg(attachment->dev, sgt->sgl, sgt->orig_nents, ++ a->dma_dir); ++ sg_free_table(sgt); ++ + mutex_lock(&buf->lock); + list_del(&a->list); + mutex_unlock(&buf->lock); +@@ -455,13 +442,38 @@ static struct sg_table *vc_sm_map_dma_bu + enum dma_data_direction direction) + { + struct vc_sm_dma_buf_attachment *a = attachment->priv; ++ /* stealing dmabuf mutex to serialize map/unmap operations */ ++ struct mutex *lock = &attachment->dmabuf->lock; + struct sg_table *table; + +- table = a->table; ++ mutex_lock(lock); ++ pr_debug("%s attachment %p\n", __func__, attachment); ++ table = &a->sg_table; ++ ++ /* return previously mapped sg table */ ++ if (a->dma_dir == direction) { ++ mutex_unlock(lock); ++ return table; ++ } ++ ++ /* release any previous cache */ ++ if (a->dma_dir != DMA_NONE) { ++ dma_unmap_sg(attachment->dev, table->sgl, table->orig_nents, ++ a->dma_dir); ++ a->dma_dir = DMA_NONE; ++ } ++ ++ /* mapping to the client with new direction */ ++ table->nents = dma_map_sg(attachment->dev, table->sgl, ++ table->orig_nents, direction); ++ if (!table->nents) { ++ pr_err("failed to map scatterlist\n"); ++ mutex_unlock(lock); ++ return ERR_PTR(-EIO); ++ } + +- if (!dma_map_sg(attachment->dev, table->sgl, table->nents, +- direction)) +- return ERR_PTR(-ENOMEM); ++ a->dma_dir = direction; ++ mutex_unlock(lock); + + pr_debug("%s attachment %p\n", __func__, attachment); + return table; +@@ -478,41 +490,26 @@ static void vc_sm_unmap_dma_buf(struct d + static int vc_sm_dmabuf_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma) + { + struct vc_sm_buffer *buf = dmabuf->priv; +- struct sg_table *table = buf->sg_table; +- unsigned long addr = vma->vm_start; +- unsigned long offset = vma->vm_pgoff * PAGE_SIZE; +- struct scatterlist *sg; +- int i; +- int ret = 0; ++ int ret; + + pr_debug("%s dmabuf %p, buf %p, vm_start %08lX\n", __func__, dmabuf, +- buf, addr); ++ buf, vma->vm_start); + + mutex_lock(&buf->lock); + + /* now map it to userspace */ +- for_each_sg(table->sgl, sg, table->nents, i) { +- struct page *page = sg_page(sg); +- unsigned long remainder = vma->vm_end - addr; +- unsigned long len = sg->length; ++ vma->vm_pgoff = 0; + +- if (offset >= sg->length) { +- offset -= sg->length; +- continue; +- } else if (offset) { +- page += offset / PAGE_SIZE; +- len = sg->length - offset; +- offset = 0; +- } +- len = min(len, remainder); +- ret = remap_pfn_range(vma, addr, page_to_pfn(page), len, +- vma->vm_page_prot); +- if (ret) +- break; +- addr += len; +- if (addr >= vma->vm_end) +- break; ++ ret = dma_mmap_coherent(&sm_state->pdev->dev, vma, buf->cookie, ++ buf->dma_addr, buf->size); ++ ++ if (ret) { ++ pr_err("Remapping memory failed, error: %d\n", ret); ++ return ret; + } ++ ++ vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; ++ + mutex_unlock(&buf->lock); + + if (ret) +@@ -570,8 +567,8 @@ static int vc_sm_dma_buf_begin_cpu_acces + mutex_lock(&buf->lock); + + list_for_each_entry(a, &buf->attachments, list) { +- dma_sync_sg_for_cpu(a->dev, a->table->sgl, a->table->nents, +- direction); ++ dma_sync_sg_for_cpu(a->dev, a->sg_table.sgl, ++ a->sg_table.nents, direction); + } + mutex_unlock(&buf->lock); + +@@ -593,8 +590,8 @@ static int vc_sm_dma_buf_end_cpu_access( + mutex_lock(&buf->lock); + + list_for_each_entry(a, &buf->attachments, list) { +- dma_sync_sg_for_device(a->dev, a->table->sgl, a->table->nents, +- direction); ++ dma_sync_sg_for_device(a->dev, a->sg_table.sgl, ++ a->sg_table.nents, direction); + } + mutex_unlock(&buf->lock); + +@@ -625,7 +622,9 @@ static const struct dma_buf_ops dma_buf_ + .map = vc_sm_dma_buf_kmap, + .unmap = vc_sm_dma_buf_kunmap, + }; ++ + /* Dma_buf operations for chaining through to an imported dma_buf */ ++ + static + int vc_sm_import_dma_buf_attach(struct dma_buf *dmabuf, + struct dma_buf_attachment *attachment) +@@ -819,7 +818,7 @@ vc_sm_cma_import_dmabuf_internal(struct + + import.type = VC_SM_ALLOC_NON_CACHED; + dma_addr = sg_dma_address(sgt->sgl); +- import.addr = (uint32_t)dma_addr; ++ import.addr = (u32)dma_addr; + if ((import.addr & 0xC0000000) != 0xC0000000) { + pr_err("%s: Expecting an uncached alias for dma_addr %pad\n", + __func__, &dma_addr); +@@ -911,11 +910,12 @@ error: + return ret; + } + +-static int vc_sm_cma_vpu_alloc(u32 size, uint32_t align, const char *name, ++static int vc_sm_cma_vpu_alloc(u32 size, u32 align, const char *name, + u32 mem_handle, struct vc_sm_buffer **ret_buffer) + { + DEFINE_DMA_BUF_EXPORT_INFO(exp_info); + struct vc_sm_buffer *buffer = NULL; ++ struct sg_table *sgt; + int aligned_size; + int ret = 0; + +@@ -938,23 +938,34 @@ static int vc_sm_cma_vpu_alloc(u32 size, + */ + mutex_lock(&buffer->lock); + +- if (vc_sm_cma_buffer_allocate(sm_state->cma_heap, &buffer->alloc, +- aligned_size)) { +- pr_err("[%s]: cma alloc of %d bytes failed\n", ++ buffer->cookie = dma_alloc_coherent(&sm_state->pdev->dev, ++ aligned_size, &buffer->dma_addr, ++ GFP_KERNEL); ++ if (!buffer->cookie) { ++ pr_err("[%s]: dma_alloc_coherent alloc of %d bytes failed\n", + __func__, aligned_size); + ret = -ENOMEM; + goto error; + } +- buffer->sg_table = buffer->alloc.sg_table; + +- pr_debug("[%s]: cma alloc of %d bytes success\n", ++ pr_debug("[%s]: alloc of %d bytes success\n", + __func__, aligned_size); + +- if (dma_map_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, +- buffer->sg_table->nents, DMA_BIDIRECTIONAL) <= 0) { +- pr_err("[%s]: dma_map_sg failed\n", __func__); ++ sgt = kmalloc(sizeof(*sgt), GFP_KERNEL); ++ if (!sgt) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ ret = dma_get_sgtable(&sm_state->pdev->dev, sgt, buffer->cookie, ++ buffer->dma_addr, buffer->size); ++ if (ret < 0) { ++ pr_err("failed to get scatterlist from DMA API\n"); ++ kfree(sgt); ++ ret = -ENOMEM; + goto error; + } ++ buffer->alloc.sg_table = sgt; + + INIT_LIST_HEAD(&buffer->attachments); + +@@ -971,10 +982,10 @@ static int vc_sm_cma_vpu_alloc(u32 size, + ret = PTR_ERR(buffer->dma_buf); + goto error; + } +- buffer->dma_addr = (uint32_t)sg_dma_address(buffer->sg_table->sgl); ++ buffer->dma_addr = (u32)sg_dma_address(buffer->alloc.sg_table->sgl); + if ((buffer->dma_addr & 0xC0000000) != 0xC0000000) { +- pr_err("%s: Expecting an uncached alias for dma_addr %pad\n", +- __func__, &buffer->dma_addr); ++ pr_warn_once("%s: Expecting an uncached alias for dma_addr %pad\n", ++ __func__, &buffer->dma_addr); + buffer->dma_addr |= 0xC0000000; + } + buffer->private = sm_state->vpu_allocs; +@@ -1145,6 +1156,7 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + struct vc_sm_import import = { 0 }; + struct vc_sm_import_result result = { 0 }; + struct dma_buf *dmabuf = NULL; ++ struct sg_table *sgt; + int aligned_size; + int ret = 0; + int status; +@@ -1162,18 +1174,13 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + goto error; + } + +- if (vc_sm_cma_buffer_allocate(sm_state->cma_heap, &buffer->alloc, +- aligned_size)) { +- pr_err("[%s]: cma alloc of %d bytes failed\n", ++ buffer->cookie = dma_alloc_coherent(&sm_state->pdev->dev, ++ aligned_size, ++ &buffer->dma_addr, ++ GFP_KERNEL); ++ if (!buffer->cookie) { ++ pr_err("[%s]: dma_alloc_coherent alloc of %d bytes failed\n", + __func__, aligned_size); +- kfree(buffer); +- return -ENOMEM; +- } +- buffer->sg_table = buffer->alloc.sg_table; +- +- if (dma_map_sg(&sm_state->pdev->dev, buffer->sg_table->sgl, +- buffer->sg_table->nents, DMA_BIDIRECTIONAL) <= 0) { +- pr_err("[%s]: dma_map_sg failed\n", __func__); + ret = -ENOMEM; + goto error; + } +@@ -1204,7 +1211,7 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + } + buffer->dma_buf = dmabuf; + +- import.addr = (uint32_t)sg_dma_address(buffer->sg_table->sgl); ++ import.addr = buffer->dma_addr; + import.size = aligned_size; + import.kernel_id = get_kernel_id(buffer); + +@@ -1229,10 +1236,25 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + buffer->private = private; + buffer->vc_handle = result.res_handle; + buffer->size = import.size; +- buffer->dma_addr = import.addr; + buffer->vpu_state = VPU_MAPPED; + buffer->kernel_id = import.kernel_id; +- //buffer->res_cached = ioparam->cached; ++ ++ sgt = kmalloc(sizeof(*sgt), GFP_KERNEL); ++ if (!sgt) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ ret = dma_get_sgtable(&sm_state->pdev->dev, sgt, buffer->cookie, ++ buffer->dma_addr, buffer->size); ++ if (ret < 0) { ++ /* FIXME: error handling */ ++ pr_err("failed to get scatterlist from DMA API\n"); ++ kfree(sgt); ++ ret = -ENOMEM; ++ goto error; ++ } ++ buffer->alloc.sg_table = sgt; + + fd = dma_buf_fd(dmabuf, O_CLOEXEC); + if (fd < 0) +@@ -1250,11 +1272,19 @@ int vc_sm_cma_ioctl_alloc(struct vc_sm_p + return 0; + + error: +- if (buffer) { +- pr_err("[%s]: something failed - cleanup. ret %d\n", __func__, +- ret); ++ pr_err("[%s]: something failed - cleanup. ret %d\n", __func__, ret); + ++ if (dmabuf) { ++ /* dmabuf has been exported, therefore allow dmabuf cleanup to ++ * deal with this ++ */ + dma_buf_put(dmabuf); ++ } else { ++ /* No dmabuf, therefore just free the buffer here */ ++ if (buffer->cookie) ++ dma_free_coherent(&sm_state->pdev->dev, buffer->size, ++ buffer->cookie, buffer->dma_addr); ++ kfree(buffer); + } + return ret; + } +@@ -1527,13 +1557,6 @@ static void vc_sm_connected_init(void) + + pr_info("[%s]: start\n", __func__); + +- vc_sm_cma_add_heaps(&sm_state->cma_heap); +- if (!sm_state->cma_heap) { +- pr_err("[%s]: failed to initialise CMA heap\n", +- __func__); +- return; +- } +- + /* + * Initialize and create a VCHI connection for the shared memory service + * running on videocore. +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.h ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.h +@@ -21,8 +21,6 @@ + #include + #include + +-#include "vc_sm_cma.h" +- + #define VC_SM_MAX_NAME_LEN 32 + + enum vc_sm_vpu_mapping_state { +@@ -31,6 +29,12 @@ enum vc_sm_vpu_mapping_state { + VPU_UNMAPPING + }; + ++struct vc_sm_alloc_data { ++ unsigned long num_pages; ++ void *priv_virt; ++ struct sg_table *sg_table; ++}; ++ + struct vc_sm_imported { + struct dma_buf *dma_buf; + struct dma_buf_attachment *attach; +@@ -56,8 +60,6 @@ struct vc_sm_buffer { + int in_use:1; /* Kernel is still using this resource */ + int imported:1; /* Imported dmabuf */ + +- struct sg_table *sg_table; +- + enum vc_sm_vpu_mapping_state vpu_state; + u32 vc_handle; /* VideoCore handle for this buffer */ + int vpu_allocated; /* +@@ -69,11 +71,12 @@ struct vc_sm_buffer { + /* DMABUF related fields */ + struct dma_buf *dma_buf; + dma_addr_t dma_addr; ++ void *cookie; + + struct vc_sm_privdata_t *private; + + union { +- struct vc_sm_cma_alloc_data alloc; ++ struct vc_sm_alloc_data alloc; + struct vc_sm_imported import; + }; + }; +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.c ++++ /dev/null +@@ -1,98 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * VideoCore Shared Memory CMA allocator +- * +- * Copyright: 2018, Raspberry Pi (Trading) Ltd +- * +- * Based on the Android ION allocator +- * Copyright (C) Linaro 2012 +- * Author: for ST-Ericsson. +- * +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-#include "vc_sm_cma.h" +- +-/* CMA heap operations functions */ +-int vc_sm_cma_buffer_allocate(struct cma *cma_heap, +- struct vc_sm_cma_alloc_data *buffer, +- unsigned long len) +-{ +- /* len should already be page aligned */ +- unsigned long num_pages = len / PAGE_SIZE; +- struct sg_table *table; +- struct page *pages; +- int ret; +- +- pages = cma_alloc(cma_heap, num_pages, 0, GFP_KERNEL); +- if (!pages) +- return -ENOMEM; +- +- table = kmalloc(sizeof(*table), GFP_KERNEL); +- if (!table) +- goto err; +- +- ret = sg_alloc_table(table, 1, GFP_KERNEL); +- if (ret) +- goto free_mem; +- +- sg_set_page(table->sgl, pages, len, 0); +- +- buffer->priv_virt = pages; +- buffer->sg_table = table; +- buffer->cma_heap = cma_heap; +- buffer->num_pages = num_pages; +- return 0; +- +-free_mem: +- kfree(table); +-err: +- cma_release(cma_heap, pages, num_pages); +- return -ENOMEM; +-} +- +-void vc_sm_cma_buffer_free(struct vc_sm_cma_alloc_data *buffer) +-{ +- struct cma *cma_heap = buffer->cma_heap; +- struct page *pages = buffer->priv_virt; +- +- /* release memory */ +- if (cma_heap) +- cma_release(cma_heap, pages, buffer->num_pages); +- +- /* release sg table */ +- if (buffer->sg_table) { +- sg_free_table(buffer->sg_table); +- kfree(buffer->sg_table); +- buffer->sg_table = NULL; +- } +-} +- +-int __vc_sm_cma_add_heaps(struct cma *cma, void *priv) +-{ +- struct cma **heap = (struct cma **)priv; +- const char *name = cma_get_name(cma); +- +- if (!(*heap)) { +- phys_addr_t phys_addr = cma_get_base(cma); +- +- pr_debug("%s: Adding cma heap %s (start %pap, size %lu) for use by vcsm\n", +- __func__, name, &phys_addr, cma_get_size(cma)); +- *heap = cma; +- } else { +- pr_err("%s: Ignoring heap %s as already set\n", +- __func__, name); +- } +- +- return 0; +-} +- +-void vc_sm_cma_add_heaps(struct cma **cma_heap) +-{ +- cma_for_each_area(__vc_sm_cma_add_heaps, cma_heap); +-} +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma.h ++++ /dev/null +@@ -1,39 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +- +-/* +- * VideoCore Shared Memory CMA allocator +- * +- * Copyright: 2018, Raspberry Pi (Trading) Ltd +- * +- * Based on the Android ION allocator +- * Copyright (C) Linaro 2012 +- * Author: for ST-Ericsson. +- * +- * This software is licensed under the terms of the GNU General Public +- * License version 2, as published by the Free Software Foundation, and +- * may be copied, distributed, and modified under those terms. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- */ +-#ifndef VC_SM_CMA_H +-#define VC_SM_CMA_H +- +-struct vc_sm_cma_alloc_data { +- struct cma *cma_heap; +- unsigned long num_pages; +- void *priv_virt; +- struct sg_table *sg_table; +-}; +- +-int vc_sm_cma_buffer_allocate(struct cma *cma_heap, +- struct vc_sm_cma_alloc_data *buffer, +- unsigned long len); +-void vc_sm_cma_buffer_free(struct vc_sm_cma_alloc_data *buffer); +- +-void vc_sm_cma_add_heaps(struct cma **cma_heap); +- +-#endif diff --git a/target/linux/brcm2708/patches-4.19/950-0692-Revert-configs-Drop-V4L2-camera-and-codec-drivers-fr.patch b/target/linux/brcm2708/patches-4.19/950-0692-Revert-configs-Drop-V4L2-camera-and-codec-drivers-fr.patch new file mode 100644 index 000000000..39c7e5505 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0692-Revert-configs-Drop-V4L2-camera-and-codec-drivers-fr.patch @@ -0,0 +1,26 @@ +From 5268102a3b9f7fc36e18e4cc913f42218a578487 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 1 Jul 2019 12:00:27 +0100 +Subject: [PATCH 692/703] Revert "configs: Drop V4L2 camera and codec drivers + from bcmrpi3_defconfig" + +This reverts commit e8a66b4f610b3a20bae8f706256d230135916c26. + +The issues are now resolved. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcmrpi3_defconfig | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/configs/bcmrpi3_defconfig ++++ b/arch/arm64/configs/bcmrpi3_defconfig +@@ -1086,6 +1086,8 @@ CONFIG_FB_TFT_WATTEROTT=m + CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m ++CONFIG_VIDEO_CODEC_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0693-Revert-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM.patch b/target/linux/brcm2708/patches-4.19/950-0693-Revert-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM.patch new file mode 100644 index 000000000..af326ce9b --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0693-Revert-configs-arm64-bcm2711-Remove-CONFIG_VIDEO_BCM.patch @@ -0,0 +1,49 @@ +From 0e02c0b0f706a76e117298e7d4c6b730eeeed80c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 1 Jul 2019 12:06:54 +0100 +Subject: [PATCH 693/703] Revert "configs: arm64/bcm2711: Remove + CONFIG_VIDEO_BCM2835" + +This reverts commit 9d1deec93fa8b1b4953ff5e9210349f3c85b9a8d. + +The issues are resolved, so reenable. + +Signed-off-by: Dave Stevenson +--- + arch/arm/configs/bcm2709_defconfig | 2 +- + arch/arm64/configs/bcm2711_defconfig | 2 ++ + 2 files changed, 3 insertions(+), 1 deletion(-) + +--- a/arch/arm/configs/bcm2709_defconfig ++++ b/arch/arm/configs/bcm2709_defconfig +@@ -16,11 +16,11 @@ CONFIG_IKCONFIG=m + CONFIG_IKCONFIG_PROC=y + CONFIG_MEMCG=y + CONFIG_BLK_CGROUP=y +-CONFIG_CGROUP_PIDS=y + CONFIG_CGROUP_FREEZER=y + CONFIG_CPUSETS=y + CONFIG_CGROUP_DEVICE=y + CONFIG_CGROUP_CPUACCT=y ++CONFIG_CGROUP_PIDS=y + CONFIG_NAMESPACES=y + CONFIG_USER_NS=y + CONFIG_SCHED_AUTOGROUP=y +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -1031,6 +1031,7 @@ CONFIG_USB_G_HID=m + CONFIG_USB_G_WEBCAM=m + CONFIG_MMC=y + CONFIG_MMC_BLOCK_MINORS=32 ++CONFIG_MMC_SDHCI_BCM2711=y + CONFIG_MMC_BCM2835_MMC=y + CONFIG_MMC_BCM2835_DMA=y + CONFIG_MMC_BCM2835_SDHOST=y +@@ -1130,6 +1131,7 @@ CONFIG_FB_TFT_WATTEROTT=m + CONFIG_FB_FLEX=m + CONFIG_FB_TFT_FBTFT_DEVICE=m + CONFIG_SND_BCM2835=m ++CONFIG_VIDEO_BCM2835=m + CONFIG_MAILBOX=y + CONFIG_BCM2835_MBOX=y + # CONFIG_IOMMU_SUPPORT is not set diff --git a/target/linux/brcm2708/patches-4.19/950-0694-staging-vc-sm-cma-Fix-the-few-remaining-coding-style.patch b/target/linux/brcm2708/patches-4.19/950-0694-staging-vc-sm-cma-Fix-the-few-remaining-coding-style.patch new file mode 100644 index 000000000..8cbdc4210 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0694-staging-vc-sm-cma-Fix-the-few-remaining-coding-style.patch @@ -0,0 +1,188 @@ +From af55660301d90af33724086223cd1c005c6af4ec Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 2 Jul 2019 17:19:04 +0100 +Subject: [PATCH 694/703] staging: vc-sm-cma: Fix the few remaining coding + style issues + +Fix a few minor checkpatch complaints to make the driver clean + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/vc-sm-cma/vc_sm.c | 6 +- + .../vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 128 +++++++++--------- + 2 files changed, 65 insertions(+), 69 deletions(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm.c +@@ -325,7 +325,6 @@ static void vc_sm_release_resource(struc + buffer->cookie, buffer->dma_addr); + } + +- + /* Free our buffer. Start by removing it from the list */ + mutex_lock(&sm_state->map_lock); + list_del(&buffer->global_buffer_list); +@@ -1365,7 +1364,8 @@ static int vc_sm_cma_clean_invalid2(unsi + } + + for (i = 0; i < ioparam.op_count; i++) { +- const struct vc_sm_cma_ioctl_clean_invalid_block * const op = block + i; ++ const struct vc_sm_cma_ioctl_clean_invalid_block * const op = ++ block + i; + + if (op->invalidate_mode == VC_SM_CACHE_OP_NOP) + continue; +@@ -1637,8 +1637,6 @@ err_remove_misc_dev: + err_remove_debugfs: + debugfs_remove_recursive(sm_state->dir_root); + vc_sm_cma_vchi_stop(&sm_state->sm_handle); +- +- return; + } + + /* Driver loading. */ +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -188,79 +188,77 @@ static int vc_sm_cma_vchi_videocore_io(v + if (svc_use) + vchi_service_release(instance->vchi_handle[0]); + svc_use = 0; +- if (!wait_for_completion_interruptible(&instance->io_cmplt)) { +- vchi_service_use(instance->vchi_handle[0]); +- svc_use = 1; +- +- do { +- /* +- * Get new command and move it to response list +- */ +- mutex_lock(&instance->lock); +- if (list_empty(&instance->cmd_list)) { +- /* no more commands to process */ +- mutex_unlock(&instance->lock); +- break; +- } +- cmd = +- list_first_entry(&instance->cmd_list, +- struct sm_cmd_rsp_blk, +- head); +- list_move(&cmd->head, &instance->rsp_list); +- cmd->sent = 1; +- mutex_unlock(&instance->lock); + +- /* Send the command */ +- status = bcm2835_vchi_msg_queue( +- instance->vchi_handle[0], +- cmd->msg, cmd->length); +- if (status) { +- pr_err("%s: failed to queue message (%d)", +- __func__, status); +- } +- +- /* If no reply is needed then we're done */ +- if (!cmd->wait) { +- mutex_lock(&instance->lock); +- list_del(&cmd->head); +- mutex_unlock(&instance->lock); +- vc_vchi_cmd_delete(instance, cmd); +- continue; +- } +- +- if (status) { +- complete(&cmd->cmplt); +- continue; +- } +- +- } while (1); +- +- while (!vchi_msg_peek(instance->vchi_handle[0], +- (void **)&reply, &reply_len, +- VCHI_FLAGS_NONE)) { +- if (reply->trans_id & 0x80000000) { +- /* Async event or cmd from the VPU */ +- if (instance->vpu_event) +- instance->vpu_event( +- instance, reply, +- reply_len); +- } else { +- vc_sm_cma_vchi_rx_ack(instance, cmd, +- reply, reply_len); +- } ++ if (wait_for_completion_interruptible(&instance->io_cmplt)) ++ continue; + +- vchi_msg_remove(instance->vchi_handle[0]); +- } ++ vchi_service_use(instance->vchi_handle[0]); ++ svc_use = 1; + +- /* Go through the dead list and free them */ ++ do { ++ /* ++ * Get new command and move it to response list ++ */ + mutex_lock(&instance->lock); +- list_for_each_entry_safe(cmd, cmd_tmp, +- &instance->dead_list, head) { ++ if (list_empty(&instance->cmd_list)) { ++ /* no more commands to process */ ++ mutex_unlock(&instance->lock); ++ break; ++ } ++ cmd = list_first_entry(&instance->cmd_list, ++ struct sm_cmd_rsp_blk, head); ++ list_move(&cmd->head, &instance->rsp_list); ++ cmd->sent = 1; ++ mutex_unlock(&instance->lock); ++ ++ /* Send the command */ ++ status = ++ bcm2835_vchi_msg_queue(instance->vchi_handle[0], ++ cmd->msg, cmd->length); ++ if (status) { ++ pr_err("%s: failed to queue message (%d)", ++ __func__, status); ++ } ++ ++ /* If no reply is needed then we're done */ ++ if (!cmd->wait) { ++ mutex_lock(&instance->lock); + list_del(&cmd->head); ++ mutex_unlock(&instance->lock); + vc_vchi_cmd_delete(instance, cmd); ++ continue; + } +- mutex_unlock(&instance->lock); ++ ++ if (status) { ++ complete(&cmd->cmplt); ++ continue; ++ } ++ ++ } while (1); ++ ++ while (!vchi_msg_peek(instance->vchi_handle[0], (void **)&reply, ++ &reply_len, VCHI_FLAGS_NONE)) { ++ if (reply->trans_id & 0x80000000) { ++ /* Async event or cmd from the VPU */ ++ if (instance->vpu_event) ++ instance->vpu_event(instance, reply, ++ reply_len); ++ } else { ++ vc_sm_cma_vchi_rx_ack(instance, cmd, reply, ++ reply_len); ++ } ++ ++ vchi_msg_remove(instance->vchi_handle[0]); ++ } ++ ++ /* Go through the dead list and free them */ ++ mutex_lock(&instance->lock); ++ list_for_each_entry_safe(cmd, cmd_tmp, &instance->dead_list, ++ head) { ++ list_del(&cmd->head); ++ vc_vchi_cmd_delete(instance, cmd); + } ++ mutex_unlock(&instance->lock); + } + + return 0; diff --git a/target/linux/brcm2708/patches-4.19/950-0695-configs-Drop-MMC_SDHCI_BCM2711-from-arm64-bcm2711_de.patch b/target/linux/brcm2708/patches-4.19/950-0695-configs-Drop-MMC_SDHCI_BCM2711-from-arm64-bcm2711_de.patch new file mode 100644 index 000000000..ba0de643e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0695-configs-Drop-MMC_SDHCI_BCM2711-from-arm64-bcm2711_de.patch @@ -0,0 +1,23 @@ +From ba55985a050750483553584ebf6b587f4e6b7f91 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Thu, 4 Jul 2019 11:52:43 +0100 +Subject: [PATCH 695/703] configs: Drop MMC_SDHCI_BCM2711 from + arm64/bcm2711_defconfig + +Apparently this is a vestigial setting and should be removed. + +Signed-off-by: Dave Stevenson +--- + arch/arm64/configs/bcm2711_defconfig | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm64/configs/bcm2711_defconfig ++++ b/arch/arm64/configs/bcm2711_defconfig +@@ -1031,7 +1031,6 @@ CONFIG_USB_G_HID=m + CONFIG_USB_G_WEBCAM=m + CONFIG_MMC=y + CONFIG_MMC_BLOCK_MINORS=32 +-CONFIG_MMC_SDHCI_BCM2711=y + CONFIG_MMC_BCM2835_MMC=y + CONFIG_MMC_BCM2835_DMA=y + CONFIG_MMC_BCM2835_SDHOST=y diff --git a/target/linux/brcm2708/patches-4.19/950-0696-Revert-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-bu.patch b/target/linux/brcm2708/patches-4.19/950-0696-Revert-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-bu.patch new file mode 100644 index 000000000..5bc0e98c8 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0696-Revert-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-bu.patch @@ -0,0 +1,55 @@ +From 41079f8602ae082b78e33e7d326ff5f57b7d76e8 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Fri, 28 Jun 2019 11:30:49 +0100 +Subject: [PATCH 696/703] Revert "media: vb2: Allow reqbufs(0) with "in use" + MMAP buffers" + +This reverts commit a2c73e18c1f657de6d654f51effa0a94863abbd8. +An alternative version was accepted upstream. Revert this patch to +apply that one. + +Signed-off-by: Dave Stevenson +--- + .../media/common/videobuf2/videobuf2-core.c | 23 +++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/media/common/videobuf2/videobuf2-core.c ++++ b/drivers/media/common/videobuf2/videobuf2-core.c +@@ -550,6 +550,20 @@ bool vb2_buffer_in_use(struct vb2_queue + } + EXPORT_SYMBOL(vb2_buffer_in_use); + ++/* ++ * __buffers_in_use() - return true if any buffers on the queue are in use and ++ * the queue cannot be freed (by the means of REQBUFS(0)) call ++ */ ++static bool __buffers_in_use(struct vb2_queue *q) ++{ ++ unsigned int buffer; ++ for (buffer = 0; buffer < q->num_buffers; ++buffer) { ++ if (vb2_buffer_in_use(q, q->bufs[buffer])) ++ return true; ++ } ++ return false; ++} ++ + void vb2_core_querybuf(struct vb2_queue *q, unsigned int index, void *pb) + { + call_void_bufop(q, fill_user_buffer, q->bufs[index], pb); +@@ -661,7 +675,16 @@ int vb2_core_reqbufs(struct vb2_queue *q + + if (*count == 0 || q->num_buffers != 0 || + (q->memory != VB2_MEMORY_UNKNOWN && q->memory != memory)) { ++ /* ++ * We already have buffers allocated, so first check if they ++ * are not in use and can be freed. ++ */ + mutex_lock(&q->mmap_lock); ++ if (q->memory == VB2_MEMORY_MMAP && __buffers_in_use(q)) { ++ mutex_unlock(&q->mmap_lock); ++ dprintk(1, "memory in use, cannot free\n"); ++ return -EBUSY; ++ } + + /* + * Call queue_cancel to clean up any buffers in the PREPARED or diff --git a/target/linux/brcm2708/patches-4.19/950-0697-media-videodev2.h-add-new-capabilities-for-buffer-ty.patch b/target/linux/brcm2708/patches-4.19/950-0697-media-videodev2.h-add-new-capabilities-for-buffer-ty.patch new file mode 100644 index 000000000..e313ace89 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0697-media-videodev2.h-add-new-capabilities-for-buffer-ty.patch @@ -0,0 +1,136 @@ +From e9ec6de11c358ff3bc389cfa0003544c60f859ef Mon Sep 17 00:00:00 2001 +From: Hans Verkuil +Date: Thu, 23 Aug 2018 09:56:22 -0400 +Subject: [PATCH 697/703] media: videodev2.h: add new capabilities for buffer + types + +Upstream commit f35f5d72e70e6b91389eb98fcabf43b79f40587f + +VIDIOC_REQBUFS and VIDIOC_CREATE_BUFFERS will return capabilities +telling userspace what the given buffer type is capable of. + +Signed-off-by: Hans Verkuil +Reviewed-by: Tomasz Figa +Acked-by: Sakari Ailus +Signed-off-by: Mauro Carvalho Chehab +--- + .../media/uapi/v4l/vidioc-create-bufs.rst | 14 ++++++- + .../media/uapi/v4l/vidioc-reqbufs.rst | 42 ++++++++++++++++++- + include/uapi/linux/videodev2.h | 13 +++++- + 3 files changed, 65 insertions(+), 4 deletions(-) + +--- a/Documentation/media/uapi/v4l/vidioc-create-bufs.rst ++++ b/Documentation/media/uapi/v4l/vidioc-create-bufs.rst +@@ -102,7 +102,19 @@ than the number requested. + - ``format`` + - Filled in by the application, preserved by the driver. + * - __u32 +- - ``reserved``\ [8] ++ - ``capabilities`` ++ - Set by the driver. If 0, then the driver doesn't support ++ capabilities. In that case all you know is that the driver is ++ guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support ++ other :c:type:`v4l2_memory` types. It will not support any others ++ capabilities. See :ref:`here ` for a list of the ++ capabilities. ++ ++ If you want to just query the capabilities without making any ++ other changes, then set ``count`` to 0, ``memory`` to ++ ``V4L2_MEMORY_MMAP`` and ``format.type`` to the buffer type. ++ * - __u32 ++ - ``reserved``\ [7] + - A place holder for future extensions. Drivers and applications + must set the array to zero. + +--- a/Documentation/media/uapi/v4l/vidioc-reqbufs.rst ++++ b/Documentation/media/uapi/v4l/vidioc-reqbufs.rst +@@ -88,10 +88,50 @@ any DMA in progress, an implicit + ``V4L2_MEMORY_DMABUF`` or ``V4L2_MEMORY_USERPTR``. See + :c:type:`v4l2_memory`. + * - __u32 +- - ``reserved``\ [2] ++ - ``capabilities`` ++ - Set by the driver. If 0, then the driver doesn't support ++ capabilities. In that case all you know is that the driver is ++ guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support ++ other :c:type:`v4l2_memory` types. It will not support any others ++ capabilities. ++ ++ If you want to query the capabilities with a minimum of side-effects, ++ then this can be called with ``count`` set to 0, ``memory`` set to ++ ``V4L2_MEMORY_MMAP`` and ``type`` set to the buffer type. This will ++ free any previously allocated buffers, so this is typically something ++ that will be done at the start of the application. ++ * - __u32 ++ - ``reserved``\ [1] + - A place holder for future extensions. Drivers and applications + must set the array to zero. + ++.. tabularcolumns:: |p{6.1cm}|p{2.2cm}|p{8.7cm}| ++ ++.. _v4l2-buf-capabilities: ++.. _V4L2-BUF-CAP-SUPPORTS-MMAP: ++.. _V4L2-BUF-CAP-SUPPORTS-USERPTR: ++.. _V4L2-BUF-CAP-SUPPORTS-DMABUF: ++.. _V4L2-BUF-CAP-SUPPORTS-REQUESTS: ++ ++.. cssclass:: longtable ++ ++.. flat-table:: V4L2 Buffer Capabilities Flags ++ :header-rows: 0 ++ :stub-columns: 0 ++ :widths: 3 1 4 ++ ++ * - ``V4L2_BUF_CAP_SUPPORTS_MMAP`` ++ - 0x00000001 ++ - This buffer type supports the ``V4L2_MEMORY_MMAP`` streaming mode. ++ * - ``V4L2_BUF_CAP_SUPPORTS_USERPTR`` ++ - 0x00000002 ++ - This buffer type supports the ``V4L2_MEMORY_USERPTR`` streaming mode. ++ * - ``V4L2_BUF_CAP_SUPPORTS_DMABUF`` ++ - 0x00000004 ++ - This buffer type supports the ``V4L2_MEMORY_DMABUF`` streaming mode. ++ * - ``V4L2_BUF_CAP_SUPPORTS_REQUESTS`` ++ - 0x00000008 ++ - This buffer type supports :ref:`requests `. + + Return Value + ============ +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -872,9 +872,16 @@ struct v4l2_requestbuffers { + __u32 count; + __u32 type; /* enum v4l2_buf_type */ + __u32 memory; /* enum v4l2_memory */ +- __u32 reserved[2]; ++ __u32 capabilities; ++ __u32 reserved[1]; + }; + ++/* capabilities for struct v4l2_requestbuffers and v4l2_create_buffers */ ++#define V4L2_BUF_CAP_SUPPORTS_MMAP (1 << 0) ++#define V4L2_BUF_CAP_SUPPORTS_USERPTR (1 << 1) ++#define V4L2_BUF_CAP_SUPPORTS_DMABUF (1 << 2) ++#define V4L2_BUF_CAP_SUPPORTS_REQUESTS (1 << 3) ++ + /** + * struct v4l2_plane - plane info for multi-planar buffers + * @bytesused: number of bytes occupied by data in the plane (payload) +@@ -2318,6 +2325,7 @@ struct v4l2_dbg_chip_info { + * return: number of created buffers + * @memory: enum v4l2_memory; buffer memory type + * @format: frame format, for which buffers are requested ++ * @capabilities: capabilities of this buffer type. + * @reserved: future extensions + */ + struct v4l2_create_buffers { +@@ -2325,7 +2333,8 @@ struct v4l2_create_buffers { + __u32 count; + __u32 memory; + struct v4l2_format format; +- __u32 reserved[8]; ++ __u32 capabilities; ++ __u32 reserved[7]; + }; + + /* diff --git a/target/linux/brcm2708/patches-4.19/950-0698-media-vb2-set-reqbufs-create_bufs-capabilities.patch b/target/linux/brcm2708/patches-4.19/950-0698-media-vb2-set-reqbufs-create_bufs-capabilities.patch new file mode 100644 index 000000000..9f46b9307 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0698-media-vb2-set-reqbufs-create_bufs-capabilities.patch @@ -0,0 +1,190 @@ +From af748ce92996933030288a0f85ca4775ad71edb0 Mon Sep 17 00:00:00 2001 +From: Hans Verkuil +Date: Thu, 23 Aug 2018 10:18:35 -0400 +Subject: [PATCH 698/703] media: vb2: set reqbufs/create_bufs capabilities + +Upstream commit e5079cf11373e4cc98be8b1072aece429eb2d4d2. + +Set the capabilities field of v4l2_requestbuffers and v4l2_create_buffers. + +The various mapping modes were easy, but for signaling the request capability +a new 'supports_requests' bitfield was added to videobuf2-core.h (and set in +vim2m and vivid). Drivers have to set this bitfield for any queue where +requests are supported. + +Signed-off-by: Hans Verkuil +Reviewed-by: Tomasz Figa +Acked-by: Sakari Ailus +Signed-off-by: Mauro Carvalho Chehab + +Minor modifications required on the backport +--- + drivers/media/common/videobuf2/videobuf2-v4l2.c | 17 +++++++++++++++++ + drivers/media/platform/vim2m.c | 1 + + drivers/media/platform/vivid/vivid-core.c | 5 +++++ + drivers/media/v4l2-core/v4l2-compat-ioctl32.c | 4 +++- + drivers/media/v4l2-core/v4l2-ioctl.c | 4 ++-- + include/media/videobuf2-core.h | 2 ++ + 6 files changed, 30 insertions(+), 3 deletions(-) + +--- a/drivers/media/common/videobuf2/videobuf2-v4l2.c ++++ b/drivers/media/common/videobuf2/videobuf2-v4l2.c +@@ -482,10 +482,24 @@ int vb2_querybuf(struct vb2_queue *q, st + } + EXPORT_SYMBOL(vb2_querybuf); + ++static void fill_buf_caps(struct vb2_queue *q, u32 *caps) ++{ ++ *caps = 0; ++ if (q->io_modes & VB2_MMAP) ++ *caps |= V4L2_BUF_CAP_SUPPORTS_MMAP; ++ if (q->io_modes & VB2_USERPTR) ++ *caps |= V4L2_BUF_CAP_SUPPORTS_USERPTR; ++ if (q->io_modes & VB2_DMABUF) ++ *caps |= V4L2_BUF_CAP_SUPPORTS_DMABUF; ++ if (q->supports_requests) ++ *caps |= V4L2_BUF_CAP_SUPPORTS_REQUESTS; ++} ++ + int vb2_reqbufs(struct vb2_queue *q, struct v4l2_requestbuffers *req) + { + int ret = vb2_verify_memory_type(q, req->memory, req->type); + ++ fill_buf_caps(q, &req->capabilities); + return ret ? ret : vb2_core_reqbufs(q, req->memory, &req->count); + } + EXPORT_SYMBOL_GPL(vb2_reqbufs); +@@ -513,6 +527,7 @@ int vb2_create_bufs(struct vb2_queue *q, + int ret = vb2_verify_memory_type(q, create->memory, f->type); + unsigned i; + ++ fill_buf_caps(q, &create->capabilities); + create->index = q->num_buffers; + if (create->count == 0) + return ret != -EBUSY ? ret : 0; +@@ -713,6 +728,7 @@ int vb2_ioctl_reqbufs(struct file *file, + struct video_device *vdev = video_devdata(file); + int res = vb2_verify_memory_type(vdev->queue, p->memory, p->type); + ++ fill_buf_caps(vdev->queue, &p->capabilities); + if (res) + return res; + if (vb2_queue_is_busy(vdev, file)) +@@ -734,6 +750,7 @@ int vb2_ioctl_create_bufs(struct file *f + p->format.type); + + p->index = vdev->queue->num_buffers; ++ fill_buf_caps(vdev->queue, &p->capabilities); + /* + * If count == 0, then just check if memory and type are valid. + * Any -EBUSY result from vb2_verify_memory_type can be mapped to 0. +--- a/drivers/media/platform/vim2m.c ++++ b/drivers/media/platform/vim2m.c +@@ -841,6 +841,7 @@ static int queue_init(void *priv, struct + src_vq->mem_ops = &vb2_vmalloc_memops; + src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY; + src_vq->lock = &ctx->dev->dev_mutex; ++ src_vq->supports_requests = true; + + ret = vb2_queue_init(src_vq); + if (ret) +--- a/drivers/media/platform/vivid/vivid-core.c ++++ b/drivers/media/platform/vivid/vivid-core.c +@@ -1060,6 +1060,7 @@ static int vivid_create_instance(struct + q->min_buffers_needed = 2; + q->lock = &dev->mutex; + q->dev = dev->v4l2_dev.dev; ++ q->supports_requests = true; + + ret = vb2_queue_init(q); + if (ret) +@@ -1080,6 +1081,7 @@ static int vivid_create_instance(struct + q->min_buffers_needed = 2; + q->lock = &dev->mutex; + q->dev = dev->v4l2_dev.dev; ++ q->supports_requests = true; + + ret = vb2_queue_init(q); + if (ret) +@@ -1100,6 +1102,7 @@ static int vivid_create_instance(struct + q->min_buffers_needed = 2; + q->lock = &dev->mutex; + q->dev = dev->v4l2_dev.dev; ++ q->supports_requests = true; + + ret = vb2_queue_init(q); + if (ret) +@@ -1120,6 +1123,7 @@ static int vivid_create_instance(struct + q->min_buffers_needed = 2; + q->lock = &dev->mutex; + q->dev = dev->v4l2_dev.dev; ++ q->supports_requests = true; + + ret = vb2_queue_init(q); + if (ret) +@@ -1139,6 +1143,7 @@ static int vivid_create_instance(struct + q->min_buffers_needed = 8; + q->lock = &dev->mutex; + q->dev = dev->v4l2_dev.dev; ++ q->supports_requests = true; + + ret = vb2_queue_init(q); + if (ret) +--- a/drivers/media/v4l2-core/v4l2-compat-ioctl32.c ++++ b/drivers/media/v4l2-core/v4l2-compat-ioctl32.c +@@ -251,7 +251,8 @@ struct v4l2_create_buffers32 { + __u32 count; + __u32 memory; /* enum v4l2_memory */ + struct v4l2_format32 format; +- __u32 reserved[8]; ++ __u32 capabilities; ++ __u32 reserved[7]; + }; + + static int __bufsize_v4l2_format(struct v4l2_format32 __user *p32, u32 *size) +@@ -411,6 +412,7 @@ static int put_v4l2_create32(struct v4l2 + if (!access_ok(VERIFY_WRITE, p32, sizeof(*p32)) || + copy_in_user(p32, p64, + offsetof(struct v4l2_create_buffers32, format)) || ++ assign_in_user(&p32->capabilities, &p64->capabilities) || + copy_in_user(p32->reserved, p64->reserved, sizeof(p64->reserved))) + return -EFAULT; + return __put_v4l2_format32(&p64->format, &p32->format); +--- a/drivers/media/v4l2-core/v4l2-ioctl.c ++++ b/drivers/media/v4l2-core/v4l2-ioctl.c +@@ -1879,7 +1879,7 @@ static int v4l_reqbufs(const struct v4l2 + if (ret) + return ret; + +- CLEAR_AFTER_FIELD(p, memory); ++ CLEAR_AFTER_FIELD(p, capabilities); + + return ops->vidioc_reqbufs(file, fh, p); + } +@@ -1920,7 +1920,7 @@ static int v4l_create_bufs(const struct + if (ret) + return ret; + +- CLEAR_AFTER_FIELD(create, format); ++ CLEAR_AFTER_FIELD(create, capabilities); + + v4l_sanitize_format(&create->format); + +--- a/include/media/videobuf2-core.h ++++ b/include/media/videobuf2-core.h +@@ -449,6 +449,7 @@ struct vb2_buf_ops { + * @quirk_poll_must_check_waiting_for_buffers: Return %EPOLLERR at poll when QBUF + * has not been called. This is a vb1 idiom that has been adopted + * also by vb2. ++ * @supports_requests: this queue supports the Request API. + * @lock: pointer to a mutex that protects the &struct vb2_queue. The + * driver can set this to a mutex to let the v4l2 core serialize + * the queuing ioctls. If the driver wants to handle locking +@@ -516,6 +517,7 @@ struct vb2_queue { + unsigned fileio_write_immediately:1; + unsigned allow_zero_bytesused:1; + unsigned quirk_poll_must_check_waiting_for_buffers:1; ++ unsigned supports_requests:1; + + struct mutex *lock; + void *owner; diff --git a/target/linux/brcm2708/patches-4.19/950-0699-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch b/target/linux/brcm2708/patches-4.19/950-0699-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch new file mode 100644 index 000000000..0ee04e6c2 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0699-media-vb2-Allow-reqbufs-0-with-in-use-MMAP-buffers.patch @@ -0,0 +1,130 @@ +From b0102490b31330eb694a7956e1874e172ad07ec1 Mon Sep 17 00:00:00 2001 +From: John Sheu +Date: Thu, 15 Nov 2018 10:57:16 -0500 +Subject: [PATCH 699/703] media: vb2: Allow reqbufs(0) with "in use" MMAP + buffers + +Upstream commit d644cca50f366cd109845ae92e37c09ed79adf81 + +Videobuf2 presently does not allow VIDIOC_REQBUFS to destroy outstanding +buffers if the queue is of type V4L2_MEMORY_MMAP, and if the buffers are +considered "in use". This is different behavior than for other memory +types and prevents us from deallocating buffers in following two cases: + +1) There are outstanding mmap()ed views on the buffer. However even if + we put the buffer in reqbufs(0), there will be remaining references, + due to vma .open/close() adjusting vb2 buffer refcount appropriately. + This means that the buffer will be in fact freed only when the last + mmap()ed view is unmapped. + +2) Buffer has been exported as a DMABUF. Refcount of the vb2 buffer + is managed properly by VB2 DMABUF ops, i.e. incremented on DMABUF + get and decremented on DMABUF release. This means that the buffer + will be alive until all importers release it. + +Considering both cases above, there does not seem to be any need to +prevent reqbufs(0) operation, because buffer lifetime is already +properly managed by both mmap() and DMABUF code paths. Let's remove it +and allow userspace freeing the queue (and potentially allocating a new +one) even though old buffers might be still in processing. + +To let userspace know that the kernel now supports orphaning buffers +that are still in use, add a new V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS +to be set by reqbufs and create_bufs. + +[p.zabel@pengutronix.de: added V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS, + updated documentation, and added back debug message] + +Signed-off-by: John Sheu +Reviewed-by: Pawel Osciak +Signed-off-by: Tomasz Figa +Signed-off-by: Philipp Zabel +Acked-by: Sakari Ailus +Signed-off-by: Hans Verkuil +[hverkuil-cisco@xs4all.nl: added V4L2-BUF-CAP-SUPPORTS-ORPHANED-BUFS ref] +Signed-off-by: Mauro Carvalho Chehab +--- + Documentation/media/uapi/v4l/vidioc-reqbufs.rst | 17 ++++++++++++++--- + drivers/media/common/videobuf2/videobuf2-core.c | 8 +++----- + drivers/media/common/videobuf2/videobuf2-v4l2.c | 2 +- + include/uapi/linux/videodev2.h | 1 + + 4 files changed, 19 insertions(+), 9 deletions(-) + +--- a/Documentation/media/uapi/v4l/vidioc-reqbufs.rst ++++ b/Documentation/media/uapi/v4l/vidioc-reqbufs.rst +@@ -59,9 +59,14 @@ When the I/O method is not supported the + code. + + Applications can call :ref:`VIDIOC_REQBUFS` again to change the number of +-buffers, however this cannot succeed when any buffers are still mapped. +-A ``count`` value of zero frees all buffers, after aborting or finishing +-any DMA in progress, an implicit ++buffers. Note that if any buffers are still mapped or exported via DMABUF, ++then :ref:`VIDIOC_REQBUFS` can only succeed if the ++``V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS`` capability is set. Otherwise ++:ref:`VIDIOC_REQBUFS` will return the ``EBUSY`` error code. ++If ``V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS`` is set, then these buffers are ++orphaned and will be freed when they are unmapped or when the exported DMABUF ++fds are closed. A ``count`` value of zero frees or orphans all buffers, after ++aborting or finishing any DMA in progress, an implicit + :ref:`VIDIOC_STREAMOFF `. + + +@@ -112,6 +117,7 @@ any DMA in progress, an implicit + .. _V4L2-BUF-CAP-SUPPORTS-USERPTR: + .. _V4L2-BUF-CAP-SUPPORTS-DMABUF: + .. _V4L2-BUF-CAP-SUPPORTS-REQUESTS: ++.. _V4L2-BUF-CAP-SUPPORTS-ORPHANED-BUFS: + + .. cssclass:: longtable + +@@ -132,6 +138,11 @@ any DMA in progress, an implicit + * - ``V4L2_BUF_CAP_SUPPORTS_REQUESTS`` + - 0x00000008 + - This buffer type supports :ref:`requests `. ++ * - ``V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS`` ++ - 0x00000010 ++ - The kernel allows calling :ref:`VIDIOC_REQBUFS` while buffers are still ++ mapped or exported via DMABUF. These orphaned buffers will be freed ++ when they are unmapped or when the exported DMABUF fds are closed. + + Return Value + ============ +--- a/drivers/media/common/videobuf2/videobuf2-core.c ++++ b/drivers/media/common/videobuf2/videobuf2-core.c +@@ -680,11 +680,9 @@ int vb2_core_reqbufs(struct vb2_queue *q + * are not in use and can be freed. + */ + mutex_lock(&q->mmap_lock); +- if (q->memory == VB2_MEMORY_MMAP && __buffers_in_use(q)) { +- mutex_unlock(&q->mmap_lock); +- dprintk(1, "memory in use, cannot free\n"); +- return -EBUSY; +- } ++ if (debug && q->memory == VB2_MEMORY_MMAP && ++ __buffers_in_use(q)) ++ dprintk(1, "memory in use, orphaning buffers\n"); + + /* + * Call queue_cancel to clean up any buffers in the PREPARED or +--- a/drivers/media/common/videobuf2/videobuf2-v4l2.c ++++ b/drivers/media/common/videobuf2/videobuf2-v4l2.c +@@ -484,7 +484,7 @@ EXPORT_SYMBOL(vb2_querybuf); + + static void fill_buf_caps(struct vb2_queue *q, u32 *caps) + { +- *caps = 0; ++ *caps = V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS; + if (q->io_modes & VB2_MMAP) + *caps |= V4L2_BUF_CAP_SUPPORTS_MMAP; + if (q->io_modes & VB2_USERPTR) +--- a/include/uapi/linux/videodev2.h ++++ b/include/uapi/linux/videodev2.h +@@ -881,6 +881,7 @@ struct v4l2_requestbuffers { + #define V4L2_BUF_CAP_SUPPORTS_USERPTR (1 << 1) + #define V4L2_BUF_CAP_SUPPORTS_DMABUF (1 << 2) + #define V4L2_BUF_CAP_SUPPORTS_REQUESTS (1 << 3) ++#define V4L2_BUF_CAP_SUPPORTS_ORPHANED_BUFS (1 << 4) + + /** + * struct v4l2_plane - plane info for multi-planar buffers diff --git a/target/linux/brcm2708/patches-4.19/950-0700-overlays-Add-real-parameters-to-the-rpi-poe-overlay.patch b/target/linux/brcm2708/patches-4.19/950-0700-overlays-Add-real-parameters-to-the-rpi-poe-overlay.patch new file mode 100644 index 000000000..e89931251 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0700-overlays-Add-real-parameters-to-the-rpi-poe-overlay.patch @@ -0,0 +1,33 @@ +From 3476202ad0c40d466df8c82798b0ccb0a5e6ed8f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 5 Jul 2019 09:22:10 +0100 +Subject: [PATCH 700/703] overlays: Add real parameters to the rpi-poe overlay + +As a result of being loaded by the POE HAT EEPROM, the rpi-poe overlay +doesn't expose parameters in the usual way; instead it adds them to +the base Device Tree, and the user is expected to use "dtparam=..." +to access them. + +To make the documentation correct and to protect users who load the +overlay explicitly, expecting to be able to use the parameters, add +real parameters to the overlay as well. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/rpi-poe-overlay.dts | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts +@@ -60,4 +60,11 @@ + poe_fan_temp1_hyst = <&trip1>,"hysteresis:0"; + }; + }; ++ ++ __overrides__ { ++ poe_fan_temp0 = <&trip0>,"temperature:0"; ++ poe_fan_temp0_hyst = <&trip0>,"hysteresis:0"; ++ poe_fan_temp1 = <&trip1>,"temperature:0"; ++ poe_fan_temp1_hyst = <&trip1>,"hysteresis:0"; ++ }; + }; diff --git a/target/linux/brcm2708/patches-4.19/950-0701-overlays-Rename-pi3-overlays-to-be-less-model-specif.patch b/target/linux/brcm2708/patches-4.19/950-0701-overlays-Rename-pi3-overlays-to-be-less-model-specif.patch new file mode 100644 index 000000000..ef614a4ee --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0701-overlays-Rename-pi3-overlays-to-be-less-model-specif.patch @@ -0,0 +1,587 @@ +From 2683773c8d2092083bafbc64fe7e6a25c48b8f5f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 5 Jul 2019 14:49:22 +0100 +Subject: [PATCH 701/703] overlays: Rename pi3- overlays to be less + model-specific (#3052) + +Rename the various pi3- overlays to be more generic, listing +the devices they apply to in the README. The original names are +retained for backwards compatibility as files that just include +the new versions - the README marks them as being deprecated. + +See: https://github.com/raspberrypi/firmware/issues/1174 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/Makefile | 4 + + arch/arm/boot/dts/overlays/README | 97 ++++++++++++------- + .../arm/boot/dts/overlays/act-led-overlay.dts | 27 ++++++ + .../boot/dts/overlays/disable-bt-overlay.dts | 55 +++++++++++ + .../dts/overlays/disable-wifi-overlay.dts | 20 ++++ + .../boot/dts/overlays/miniuart-bt-overlay.dts | 74 ++++++++++++++ + .../boot/dts/overlays/pi3-act-led-overlay.dts | 28 +----- + .../dts/overlays/pi3-disable-bt-overlay.dts | 56 +---------- + .../dts/overlays/pi3-disable-wifi-overlay.dts | 21 +--- + .../dts/overlays/pi3-miniuart-bt-overlay.dts | 75 +------------- + 10 files changed, 246 insertions(+), 211 deletions(-) + create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -1,6 +1,7 @@ + # Overlays for the Raspberry Pi platform + + dtbo-$(CONFIG_ARCH_BCM2835) += \ ++ act-led.dtbo \ + adau1977-adc.dtbo \ + adau7002-simple.dtbo \ + ads1015.dtbo \ +@@ -26,6 +27,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + dht11.dtbo \ + dionaudio-loco.dtbo \ + dionaudio-loco-v2.dtbo \ ++ disable-bt.dtbo \ ++ disable-wifi.dtbo \ + dpi18.dtbo \ + dpi24.dtbo \ + draws.dtbo \ +@@ -91,6 +94,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + media-center.dtbo \ + midi-uart0.dtbo \ + midi-uart1.dtbo \ ++ miniuart-bt.dtbo \ + mmc.dtbo \ + mpu6050.dtbo \ + mz61581.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -180,14 +180,16 @@ Params: + + act_led_activelow Set to "on" to invert the sense of the LED + (default "off") +- N.B. For Pi3 see pi3-act-led overlay. ++ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led ++ overlay. + + act_led_gpio Set which GPIO to use for the activity LED + (in case you want to connect it to an external + device) + (default "16" on a non-Plus board, "47" on a + Plus or Pi 2) +- N.B. For Pi3 see pi3-act-led overlay. ++ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led ++ overlay. + + pwr_led_trigger + pwr_led_activelow +@@ -205,6 +207,23 @@ Params: + and the other i2c baudrate parameters. + + ++Name: act-led ++Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can ++ only be accessed from the VPU. There is a special driver for this with a ++ separate DT node, which has the unfortunate consequence of breaking the ++ act_led_gpio and act_led_activelow dtparams. ++ This overlay changes the GPIO controller back to the standard one and ++ restores the dtparams. ++Load: dtoverlay=act-led,= ++Params: activelow Set to "on" to invert the sense of the LED ++ (default "off") ++ ++ gpio Set which GPIO to use for the activity LED ++ (in case you want to connect it to an external ++ device) ++ REQUIRED ++ ++ + Name: adau1977-adc + Info: Overlay for activation of ADAU1977 ADC codec over I2C for control + and I2S for data. +@@ -509,6 +528,21 @@ Params: 24db_digital_gain Allow ga + that does not result in clipping/distortion!) + + ++Name: disable-bt ++Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring ++ UART0/ttyAMA0 over GPIOs 14 & 15. ++ N.B. To disable the systemd service that initialises the modem so it ++ doesn't use the UART, use 'sudo systemctl disable hciuart'. ++Load: dtoverlay=disable-bt ++Params: ++ ++ ++Name: disable-wifi ++Info: Disable onboard WiFi on Pi 3B, 3B+, 3A+, 4B and Zero W. ++Load: dtoverlay=disable-wifi ++Params: ++ ++ + Name: dpi18 + Info: Overlay for a generic 18-bit DPI display + This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output +@@ -1447,6 +1481,20 @@ Load: dtoverlay=midi-uart1 + Params: + + ++Name: miniuart-bt ++Info: Switch the onboard Bluetooth function on Pi 3B, 3B+, 3A+, 4B and Zero W ++ to use the mini-UART (ttyS0) and restore UART0/ttyAMA0 over GPIOs 14 & ++ 15. Note that this may reduce the maximum usable baudrate. ++ N.B. It is also necessary to edit /lib/systemd/system/hciuart.service ++ and replace ttyAMA0 with ttyS0, unless using Raspbian or another ++ distribution with udev rules that create /dev/serial0 and /dev/serial1, ++ in which case use /dev/serial1 instead because it will always be ++ correct. Furthermore, you must also set core_freq and core_freq_min to ++ the same value in config.txt or the miniuart will not work. ++Load: dtoverlay=miniuart-bt ++Params: ++ ++ + Name: mmc + Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock + Load: dtoverlay=mmc,= +@@ -1509,48 +1557,27 @@ Params: panel Display + + + Name: pi3-act-led +-Info: Pi3 uses a GPIO expander to drive the LEDs which can only be accessed +- from the VPU. There is a special driver for this with a separate DT +- node, which has the unfortunate consequence of breaking the +- act_led_gpio and act_led_activelow dtparams. +- This overlay changes the GPIO controller back to the standard one and +- restores the dtparams. +-Load: dtoverlay=pi3-act-led,= +-Params: activelow Set to "on" to invert the sense of the LED +- (default "off") +- +- gpio Set which GPIO to use for the activity LED +- (in case you want to connect it to an external +- device) +- REQUIRED ++Info: This overlay has been renamed act-led, keeping pi3-act-led as an alias ++ for backwards compatibility. ++Load: + + + Name: pi3-disable-bt +-Info: Disable Pi3 Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15 +- N.B. To disable the systemd service that initialises the modem so it +- doesn't use the UART, use 'sudo systemctl disable hciuart'. +-Load: dtoverlay=pi3-disable-bt +-Params: ++Info: This overlay has been renamed disable-bt, keeping pi3-disable-bt as an ++ alias for backwards compatibility. ++Load: + + + Name: pi3-disable-wifi +-Info: Disable Pi3 onboard WiFi +-Load: dtoverlay=pi3-disable-wifi +-Params: ++Info: This overlay has been renamed disable-wifi, keeping pi3-disable-wifi as ++ an alias for backwards compatibility. ++Load: + + + Name: pi3-miniuart-bt +-Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore +- UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum +- usable baudrate. +- N.B. It is also necessary to edit /lib/systemd/system/hciuart.service +- and replace ttyAMA0 with ttyS0, unless you have a system with udev rules +- that create /dev/serial0 and /dev/serial1, in which case use +- /dev/serial1 instead because it will always be correct. Furthermore, +- you must also set core_freq=250 in config.txt or the miniuart will not +- work. +-Load: dtoverlay=pi3-miniuart-bt +-Params: ++Info: This overlay has been renamed miniuart-bt, keeping pi3-miniuart-bt as ++ an alias for backwards compatibility. ++Load: + + + Name: pibell +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/act-led-overlay.dts +@@ -0,0 +1,27 @@ ++/dts-v1/; ++/plugin/; ++ ++/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed ++ from the VPU. There is a special driver for this with a separate DT node, ++ which has the unfortunate consequence of breaking the act_led_gpio and ++ act_led_activelow dtparams. ++ ++ This overlay changes the GPIO controller back to the standard one and ++ restores the dtparams. ++*/ ++ ++/{ ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&act_led>; ++ frag0: __overlay__ { ++ gpios = <&gpio 0 0>; ++ }; ++ }; ++ ++ __overrides__ { ++ gpio = <&frag0>,"gpios:4"; ++ activelow = <&frag0>,"gpios:8"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts +@@ -0,0 +1,55 @@ ++/dts-v1/; ++/plugin/; ++ ++/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15. ++ To disable the systemd service that initialises the modem so it doesn't use ++ the UART: ++ ++ sudo systemctl disable hciuart ++*/ ++ ++/{ ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&uart1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart0>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&uart0_pins>; ++ __overlay__ { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&bt_pins>; ++ __overlay__ { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "/aliases"; ++ __overlay__ { ++ serial0 = "/soc/serial@7e201000"; ++ serial1 = "/soc/serial@7e215040"; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts +@@ -0,0 +1,20 @@ ++/dts-v1/; ++/plugin/; ++ ++/{ ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&mmc>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&mmcnr>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts +@@ -0,0 +1,74 @@ ++/dts-v1/; ++/plugin/; ++ ++/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore ++ UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum ++ usable baudrate. ++ ++ It is also necessary to edit /lib/systemd/system/hciuart.service and ++ replace ttyAMA0 with ttyS0, unless you have a system with udev rules ++ that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1 ++ instead because it will always be correct. ++ ++ If cmdline.txt uses the alias serial0 to refer to the user-accessable port ++ then the firmware will replace with the appropriate port whether or not ++ this overlay is used. ++*/ ++ ++/{ ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&uart0>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&uart1>; ++ __overlay__ { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>; ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&uart0_pins>; ++ __overlay__ { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&uart1_pins>; ++ __overlay__ { ++ brcm,pins = <32 33>; ++ brcm,function = <2>; /* alt5=UART1 */ ++ brcm,pull = <0 2>; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&gpio>; ++ __overlay__ { ++ fake_bt_cts: fake_bt_cts { ++ brcm,pins = <31>; ++ brcm,function = <1>; /* output */ ++ }; ++ }; ++ }; ++ ++ fragment@5 { ++ target-path = "/aliases"; ++ __overlay__ { ++ serial0 = "/soc/serial@7e201000"; ++ serial1 = "/soc/serial@7e215040"; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-act-led-overlay.dts +@@ -1,27 +1 @@ +-/dts-v1/; +-/plugin/; +- +-/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed +- from the VPU. There is a special driver for this with a separate DT node, +- which has the unfortunate consequence of breaking the act_led_gpio and +- act_led_activelow dtparams. +- +- This overlay changes the GPIO controller back to the standard one and +- restores the dtparams. +-*/ +- +-/{ +- compatible = "brcm,bcm2835"; +- +- fragment@0 { +- target = <&act_led>; +- frag0: __overlay__ { +- gpios = <&gpio 0 0>; +- }; +- }; +- +- __overrides__ { +- gpio = <&frag0>,"gpios:4"; +- activelow = <&frag0>,"gpios:8"; +- }; +-}; ++#include "act-led-overlay.dts" +--- a/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-bt-overlay.dts +@@ -1,55 +1 @@ +-/dts-v1/; +-/plugin/; +- +-/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15. +- To disable the systemd service that initialises the modem so it doesn't use +- the UART: +- +- sudo systemctl disable hciuart +-*/ +- +-/{ +- compatible = "brcm,bcm2835"; +- +- fragment@0 { +- target = <&uart1>; +- __overlay__ { +- status = "disabled"; +- }; +- }; +- +- fragment@1 { +- target = <&uart0>; +- __overlay__ { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins>; +- status = "okay"; +- }; +- }; +- +- fragment@2 { +- target = <&uart0_pins>; +- __overlay__ { +- brcm,pins; +- brcm,function; +- brcm,pull; +- }; +- }; +- +- fragment@3 { +- target = <&bt_pins>; +- __overlay__ { +- brcm,pins; +- brcm,function; +- brcm,pull; +- }; +- }; +- +- fragment@4 { +- target-path = "/aliases"; +- __overlay__ { +- serial0 = "/soc/serial@7e201000"; +- serial1 = "/soc/serial@7e215040"; +- }; +- }; +-}; ++#include "disable-bt-overlay.dts" +--- a/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts +@@ -1,20 +1 @@ +-/dts-v1/; +-/plugin/; +- +-/{ +- compatible = "brcm,bcm2835"; +- +- fragment@0 { +- target = <&mmc>; +- __overlay__ { +- status = "disabled"; +- }; +- }; +- +- fragment@1 { +- target = <&mmcnr>; +- __overlay__ { +- status = "disabled"; +- }; +- }; +-}; ++#include "disable-wifi-overlay.dts" +--- a/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pi3-miniuart-bt-overlay.dts +@@ -1,74 +1 @@ +-/dts-v1/; +-/plugin/; +- +-/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore +- UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum +- usable baudrate. +- +- It is also necessary to edit /lib/systemd/system/hciuart.service and +- replace ttyAMA0 with ttyS0, unless you have a system with udev rules +- that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1 +- instead because it will always be correct. +- +- If cmdline.txt uses the alias serial0 to refer to the user-accessable port +- then the firmware will replace with the appropriate port whether or not +- this overlay is used. +-*/ +- +-/{ +- compatible = "brcm,bcm2835"; +- +- fragment@0 { +- target = <&uart0>; +- __overlay__ { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins>; +- status = "okay"; +- }; +- }; +- +- fragment@1 { +- target = <&uart1>; +- __overlay__ { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>; +- status = "okay"; +- }; +- }; +- +- fragment@2 { +- target = <&uart0_pins>; +- __overlay__ { +- brcm,pins; +- brcm,function; +- brcm,pull; +- }; +- }; +- +- fragment@3 { +- target = <&uart1_pins>; +- __overlay__ { +- brcm,pins = <32 33>; +- brcm,function = <2>; /* alt5=UART1 */ +- brcm,pull = <0 2>; +- }; +- }; +- +- fragment@4 { +- target = <&gpio>; +- __overlay__ { +- fake_bt_cts: fake_bt_cts { +- brcm,pins = <31>; +- brcm,function = <1>; /* output */ +- }; +- }; +- }; +- +- fragment@5 { +- target-path = "/aliases"; +- __overlay__ { +- serial0 = "/soc/serial@7e201000"; +- serial1 = "/soc/serial@7e215040"; +- }; +- }; +-}; ++#include "miniuart-bt-overlay.dts" diff --git a/target/linux/brcm2708/patches-4.19/950-0702-i2c-bcm2835-Move-IRQ-request-after-clock-code-in-pro.patch b/target/linux/brcm2708/patches-4.19/950-0702-i2c-bcm2835-Move-IRQ-request-after-clock-code-in-pro.patch new file mode 100644 index 000000000..6215f3e6e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0702-i2c-bcm2835-Move-IRQ-request-after-clock-code-in-pro.patch @@ -0,0 +1,66 @@ +From 4baf16fc6d22fd948a597993d858d4de0c5b3bcc Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Fri, 21 Jun 2019 03:52:49 -0700 +Subject: [PATCH 702/703] i2c: bcm2835: Move IRQ request after clock code in + probe + +Commit 4a5cfa39465cad25dd736d7ceba8a5d32eea4ecc upstream. + +If any of the clock code in the probe fails and returns, the IRQ +will not be freed. Moving the IRQ request to last allows it to +be freed on any errors further up in the probe function. devm_ +calls can apparently not be used because there are some potential +race conditions that will arise. + +Fixes: bebff81fb8b9 ("i2c: bcm2835: Model Divider in CCF") +Signed-off-by: Annaliese McDermond +Acked-by: Stefan Wahren +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-bcm2835.c | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +--- a/drivers/i2c/busses/i2c-bcm2835.c ++++ b/drivers/i2c/busses/i2c-bcm2835.c +@@ -521,20 +521,6 @@ static int bcm2835_i2c_probe(struct plat + if (IS_ERR(i2c_dev->regs)) + return PTR_ERR(i2c_dev->regs); + +- irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); +- if (!irq) { +- dev_err(&pdev->dev, "No IRQ resource\n"); +- return -ENODEV; +- } +- i2c_dev->irq = irq->start; +- +- ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED, +- dev_name(&pdev->dev), i2c_dev); +- if (ret) { +- dev_err(&pdev->dev, "Could not request IRQ\n"); +- return -ENODEV; +- } +- + mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0); + + bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev); +@@ -564,6 +550,20 @@ static int bcm2835_i2c_probe(struct plat + return ret; + } + ++ irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ if (!irq) { ++ dev_err(&pdev->dev, "No IRQ resource\n"); ++ return -ENODEV; ++ } ++ i2c_dev->irq = irq->start; ++ ++ ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED, ++ dev_name(&pdev->dev), i2c_dev); ++ if (ret) { ++ dev_err(&pdev->dev, "Could not request IRQ\n"); ++ return -ENODEV; ++ } ++ + adap = &i2c_dev->adapter; + i2c_set_adapdata(adap, i2c_dev); + adap->owner = THIS_MODULE; diff --git a/target/linux/brcm2708/patches-4.19/950-0703-i2c-bcm2835-Ensure-clock-exists-when-probing.patch b/target/linux/brcm2708/patches-4.19/950-0703-i2c-bcm2835-Ensure-clock-exists-when-probing.patch new file mode 100644 index 000000000..9748e434f --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/950-0703-i2c-bcm2835-Ensure-clock-exists-when-probing.patch @@ -0,0 +1,72 @@ +From c08dfc37750b965a410c11eb157c0c0d75a13b88 Mon Sep 17 00:00:00 2001 +From: Annaliese McDermond +Date: Fri, 21 Jun 2019 03:52:50 -0700 +Subject: [PATCH 703/703] i2c: bcm2835: Ensure clock exists when probing + +Commit 9de93b04df16b055824e3f1f13fedb90fbcf2e4f upstream. + +Probe function fails to recognize that upstream clock actually +doesn't yet exist because clock driver has not been initialized. +Actually try to go get the clock and test for its existence +before trying to set up a downstream clock based upon it. + +This fixes a bug that causes the i2c driver not to work with +monolithic kernels. + +Fixes: bebff81fb8b9 ("i2c: bcm2835: Model Divider in CCF") +Signed-off-by: Annaliese McDermond +Acked-by: Stefan Wahren +Signed-off-by: Wolfram Sang +--- + drivers/i2c/busses/i2c-bcm2835.c | 16 ++++++++++++---- + 1 file changed, 12 insertions(+), 4 deletions(-) + +--- a/drivers/i2c/busses/i2c-bcm2835.c ++++ b/drivers/i2c/busses/i2c-bcm2835.c +@@ -244,15 +244,18 @@ static const struct clk_ops clk_bcm2835_ + }; + + static struct clk *bcm2835_i2c_register_div(struct device *dev, +- const char *mclk_name, ++ struct clk *mclk, + struct bcm2835_i2c_dev *i2c_dev) + { + struct clk_init_data init; + struct clk_bcm2835_i2c *priv; + char name[32]; ++ const char *mclk_name; + + snprintf(name, sizeof(name), "%s_div", dev_name(dev)); + ++ mclk_name = __clk_get_name(mclk); ++ + init.ops = &clk_bcm2835_i2c_ops; + init.name = name; + init.parent_names = (const char* []) { mclk_name }; +@@ -505,8 +508,8 @@ static int bcm2835_i2c_probe(struct plat + struct resource *mem, *irq; + int ret; + struct i2c_adapter *adap; +- const char *mclk_name; + struct clk *bus_clk; ++ struct clk *mclk; + u32 bus_clk_rate; + + i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); +@@ -521,9 +524,14 @@ static int bcm2835_i2c_probe(struct plat + if (IS_ERR(i2c_dev->regs)) + return PTR_ERR(i2c_dev->regs); + +- mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0); ++ mclk = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(mclk)) { ++ if (PTR_ERR(mclk) != -EPROBE_DEFER) ++ dev_err(&pdev->dev, "Could not get clock\n"); ++ return PTR_ERR(mclk); ++ } + +- bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev); ++ bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk, i2c_dev); + + if (IS_ERR(bus_clk)) { + dev_err(&pdev->dev, "Could not register clock\n"); diff --git a/target/linux/brcm2708/patches-4.19/960-add-rasbperrypi-compatible.patch b/target/linux/brcm2708/patches-4.19/960-add-rasbperrypi-compatible.patch new file mode 100644 index 000000000..002b4b32e --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/960-add-rasbperrypi-compatible.patch @@ -0,0 +1,51 @@ +--- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts +@@ -6,6 +6,7 @@ + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { ++ compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; + model = "Raspberry Pi Model B+"; + }; + +--- a/arch/arm/boot/dts/bcm2708-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts +@@ -6,6 +6,7 @@ + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { ++ compatible = "raspberrypi,model-b", "brcm,bcm2835"; + model = "Raspberry Pi Model B"; + }; + +--- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts ++++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts +@@ -5,6 +5,7 @@ + #include "bcm283x-rpi-csi1-4lane.dtsi" + + / { ++ compatible = "raspberrypi,compute-module", "brcm,bcm2835"; + model = "Raspberry Pi Compute Module"; + }; + +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts +@@ -6,7 +6,7 @@ + #include "bcm283x-rpi-csi1-2lane.dtsi" + + / { +- compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ++ compatible = "raspberrypi,3-model-b", "brcm,bcm2837", "brcm,bcm2836"; + model = "Raspberry Pi 3 Model B"; + + chosen { +--- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts +@@ -6,6 +6,7 @@ + #include "bcm283x-rpi-csi1-4lane.dtsi" + + / { ++ compatible = "raspberrypi,3-compute-module", "brcm,bcm2837"; + model = "Raspberry Pi Compute Module 3"; + }; + diff --git a/target/linux/brcm2708/patches-4.19/961-add-arm64-platform-kconfig-mfd-core.patch b/target/linux/brcm2708/patches-4.19/961-add-arm64-platform-kconfig-mfd-core.patch new file mode 100644 index 000000000..bc4b45b92 --- /dev/null +++ b/target/linux/brcm2708/patches-4.19/961-add-arm64-platform-kconfig-mfd-core.patch @@ -0,0 +1,10 @@ +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -25,6 +25,7 @@ config ARCH_BCM2835 + select ARM_AMBA + select ARM_TIMER_SP804 + select HAVE_ARM_ARCH_TIMER ++ select MFD_CORE + help + This enables support for the Broadcom BCM2837 SoC. + This SoC is used in the Raspberry Pi 3 device. diff --git a/target/linux/brcm2708/patches-4.9/030-pinctrl-bcm2835-add-pull-defines-to-dt-bindings.patch b/target/linux/brcm2708/patches-4.9/030-pinctrl-bcm2835-add-pull-defines-to-dt-bindings.patch deleted file mode 100644 index e300cf6a3..000000000 --- a/target/linux/brcm2708/patches-4.9/030-pinctrl-bcm2835-add-pull-defines-to-dt-bindings.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 396a3529800af0817c6af2eb65c542588a1f7fb7 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:17 +0200 -Subject: [PATCH] pinctrl: bcm2835: add pull defines to dt bindings - -Also delete (unused) private enum from driver. -The pull defines can be used instead if needed. - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Linus Walleij -Acked-by: Stefan Wahren ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------ - include/dt-bindings/pinctrl/bcm2835.h | 5 +++++ - 2 files changed, 5 insertions(+), 6 deletions(-) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param { - BCM2835_PINCONF_PARAM_PULL, - }; - --enum bcm2835_pinconf_pull { -- BCM2835_PINCONFIG_PULL_NONE, -- BCM2835_PINCONFIG_PULL_DOWN, -- BCM2835_PINCONFIG_PULL_UP, --}; -- - #define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_)) - #define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16) - #define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff) ---- a/include/dt-bindings/pinctrl/bcm2835.h -+++ b/include/dt-bindings/pinctrl/bcm2835.h -@@ -24,4 +24,9 @@ - #define BCM2835_FSEL_ALT2 6 - #define BCM2835_FSEL_ALT3 7 - -+/* brcm,pull property */ -+#define BCM2835_PUD_OFF 0 -+#define BCM2835_PUD_DOWN 1 -+#define BCM2835_PUD_UP 2 -+ - #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */ diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch deleted file mode 100644 index ac9bd2ba0..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0001-ARM-dts-bcm283x-Define-standard-pinctrl-groups-in-th.patch +++ /dev/null @@ -1,235 +0,0 @@ -From 21ff843931b2e5a9b628ac56fd0f2e4355890096 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 19 Sep 2016 10:43:18 +0200 -Subject: [PATCH] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio - node. - -The BCM2835-ARM-Peripherals.pdf documentation specifies what the -function selects do for the pins, and there are a bunch of obvious -groupings to be made. With these created, we'll be able to replace -bcm2835-rpi.dtsi's main "set all of these pins to alt0" with -references to specific groups we want enabled. - -Also add pinctrl groups for emmc and sdhost. - -Based on patches by Eric Anholt, with fixups by Gerd Hoffmann. - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 203 insertions(+) - ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -137,6 +137,209 @@ - - interrupt-controller; - #interrupt-cells = <2>; -+ -+ /* Defines pin muxing groups according to -+ * BCM2835-ARM-Peripherals.pdf page 102. -+ * -+ * While each pin can have its mux selected -+ * for various functions individually, some -+ * groups only make sense to switch to a -+ * particular function together. -+ */ -+ dpi_gpio0: dpi_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19 -+ 20 21 22 23 24 25 26 27>; -+ brcm,function = ; -+ }; -+ emmc_gpio22: emmc_gpio22 { -+ brcm,pins = <22 23 24 25 26 27>; -+ brcm,function = ; -+ }; -+ emmc_gpio34: emmc_gpio34 { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ emmc_gpio48: emmc_gpio48 { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = ; -+ }; -+ -+ gpclk0_gpio4: gpclk0_gpio4 { -+ brcm,pins = <4>; -+ brcm,function = ; -+ }; -+ gpclk1_gpio5: gpclk1_gpio5 { -+ brcm,pins = <5>; -+ brcm,function = ; -+ }; -+ gpclk1_gpio42: gpclk1_gpio42 { -+ brcm,pins = <42>; -+ brcm,function = ; -+ }; -+ gpclk1_gpio44: gpclk1_gpio44 { -+ brcm,pins = <44>; -+ brcm,function = ; -+ }; -+ gpclk2_gpio6: gpclk2_gpio6 { -+ brcm,pins = <6>; -+ brcm,function = ; -+ }; -+ gpclk2_gpio43: gpclk2_gpio43 { -+ brcm,pins = <43>; -+ brcm,function = ; -+ }; -+ -+ i2c0_gpio0: i2c0_gpio0 { -+ brcm,pins = <0 1>; -+ brcm,function = ; -+ }; -+ i2c0_gpio32: i2c0_gpio32 { -+ brcm,pins = <32 34>; -+ brcm,function = ; -+ }; -+ i2c0_gpio44: i2c0_gpio44 { -+ brcm,pins = <44 45>; -+ brcm,function = ; -+ }; -+ i2c1_gpio2: i2c1_gpio2 { -+ brcm,pins = <2 3>; -+ brcm,function = ; -+ }; -+ i2c1_gpio44: i2c1_gpio44 { -+ brcm,pins = <44 45>; -+ brcm,function = ; -+ }; -+ i2c_slave_gpio18: i2c_slave_gpio18 { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = ; -+ }; -+ -+ jtag_gpio4: jtag_gpio4 { -+ brcm,pins = <4 5 6 12 13>; -+ brcm,function = ; -+ }; -+ jtag_gpio22: jtag_gpio22 { -+ brcm,pins = <22 23 24 25 26 27>; -+ brcm,function = ; -+ }; -+ -+ pcm_gpio18: pcm_gpio18 { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = ; -+ }; -+ pcm_gpio28: pcm_gpio28 { -+ brcm,pins = <28 29 30 31>; -+ brcm,function = ; -+ }; -+ -+ pwm0_gpio12: pwm0_gpio12 { -+ brcm,pins = <12>; -+ brcm,function = ; -+ }; -+ pwm0_gpio18: pwm0_gpio18 { -+ brcm,pins = <18>; -+ brcm,function = ; -+ }; -+ pwm0_gpio40: pwm0_gpio40 { -+ brcm,pins = <40>; -+ brcm,function = ; -+ }; -+ pwm1_gpio13: pwm1_gpio13 { -+ brcm,pins = <13>; -+ brcm,function = ; -+ }; -+ pwm1_gpio19: pwm1_gpio19 { -+ brcm,pins = <19>; -+ brcm,function = ; -+ }; -+ pwm1_gpio41: pwm1_gpio41 { -+ brcm,pins = <41>; -+ brcm,function = ; -+ }; -+ pwm1_gpio45: pwm1_gpio45 { -+ brcm,pins = <45>; -+ brcm,function = ; -+ }; -+ -+ sdhost_gpio48: sdhost_gpio48 { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = ; -+ }; -+ -+ spi0_gpio7: spi0_gpio7 { -+ brcm,pins = <7 8 9 10 11>; -+ brcm,function = ; -+ }; -+ spi0_gpio35: spi0_gpio35 { -+ brcm,pins = <35 36 37 38 39>; -+ brcm,function = ; -+ }; -+ spi1_gpio16: spi1_gpio16 { -+ brcm,pins = <16 17 18 19 20 21>; -+ brcm,function = ; -+ }; -+ spi2_gpio40: spi2_gpio40 { -+ brcm,pins = <40 41 42 43 44 45>; -+ brcm,function = ; -+ }; -+ -+ uart0_gpio14: uart0_gpio14 { -+ brcm,pins = <14 15>; -+ brcm,function = ; -+ }; -+ /* Separate from the uart0_gpio14 group -+ * because it conflicts with spi1_gpio16, and -+ * people often run uart0 on the two pins -+ * without flow contrl. -+ */ -+ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { -+ brcm,pins = <16 17>; -+ brcm,function = ; -+ }; -+ uart0_gpio30: uart0_gpio30 { -+ brcm,pins = <30 31>; -+ brcm,function = ; -+ }; -+ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { -+ brcm,pins = <32 33>; -+ brcm,function = ; -+ }; -+ -+ uart1_gpio14: uart1_gpio14 { -+ brcm,pins = <14 15>; -+ brcm,function = ; -+ }; -+ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 { -+ brcm,pins = <16 17>; -+ brcm,function = ; -+ }; -+ uart1_gpio32: uart1_gpio32 { -+ brcm,pins = <32 33>; -+ brcm,function = ; -+ }; -+ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { -+ brcm,pins = <30 31>; -+ brcm,function = ; -+ }; -+ uart1_gpio36: uart1_gpio36 { -+ brcm,pins = <36 37 38 39>; -+ brcm,function = ; -+ }; -+ uart1_gpio40: uart1_gpio40 { -+ brcm,pins = <40 41>; -+ brcm,function = ; -+ }; -+ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 { -+ brcm,pins = <42 43>; -+ brcm,function = ; -+ }; - }; - - uart0: serial@7e201000 { diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0002-ARM-dts-bcm283x-add-pinctrl-group-to-pwm-drop-pins-f.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0002-ARM-dts-bcm283x-add-pinctrl-group-to-pwm-drop-pins-f.patch deleted file mode 100644 index edff9e414..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0002-ARM-dts-bcm283x-add-pinctrl-group-to-pwm-drop-pins-f.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 14e0ea34058ce13794877206f05a6ab5034e147b Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:19 +0200 -Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from - &gpio - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -39,7 +39,7 @@ - }; - - alt0: alt0 { -- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>; -+ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15>; - brcm,function = ; - }; - -@@ -69,6 +69,8 @@ - }; - - &pwm { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>; - status = "okay"; - }; - diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0003-ARM-dts-bcm283x-add-pinctrl-group-to-i2c0-drop-pins-.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0003-ARM-dts-bcm283x-add-pinctrl-group-to-i2c0-drop-pins-.patch deleted file mode 100644 index 602faf1a9..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0003-ARM-dts-bcm283x-add-pinctrl-group-to-i2c0-drop-pins-.patch +++ /dev/null @@ -1,33 +0,0 @@ -From e6e199712008374edb4de979e74ae5acb1f40845 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:20 +0200 -Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from - &gpio - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -39,7 +39,7 @@ - }; - - alt0: alt0 { -- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15>; -+ brcm,pins = <2 3 4 5 7 8 9 10 11 14 15>; - brcm,function = ; - }; - -@@ -50,6 +50,8 @@ - }; - - &i2c0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_gpio0>; - status = "okay"; - clock-frequency = <100000>; - }; diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0004-ARM-dts-bcm283x-add-pinctrl-group-to-i2c1-drop-pins-.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0004-ARM-dts-bcm283x-add-pinctrl-group-to-i2c1-drop-pins-.patch deleted file mode 100644 index ad883b157..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0004-ARM-dts-bcm283x-add-pinctrl-group-to-i2c1-drop-pins-.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 4eb65cbfa721db9d7bbe2f76e8b1909fa0320273 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:21 +0200 -Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from - &gpio - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -39,7 +39,7 @@ - }; - - alt0: alt0 { -- brcm,pins = <2 3 4 5 7 8 9 10 11 14 15>; -+ brcm,pins = <4 5 7 8 9 10 11 14 15>; - brcm,function = ; - }; - -@@ -57,6 +57,8 @@ - }; - - &i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_gpio2>; - status = "okay"; - clock-frequency = <100000>; - }; diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0005-ARM-dts-bcm283x-add-pinctrl-group-to-sdhci-drop-pins.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0005-ARM-dts-bcm283x-add-pinctrl-group-to-sdhci-drop-pins.patch deleted file mode 100644 index b54c2b41a..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0005-ARM-dts-bcm283x-add-pinctrl-group-to-sdhci-drop-pins.patch +++ /dev/null @@ -1,33 +0,0 @@ -From f8bef3619bb219ed27dfe11cd20547e5b709650a Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:22 +0200 -Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins - from &gpio - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -44,7 +44,7 @@ - }; - - alt3: alt3 { -- brcm,pins = <48 49 50 51 52 53>; -+ brcm,pins = <>; - brcm,function = ; - }; - }; -@@ -68,6 +68,8 @@ - }; - - &sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio48>; - status = "okay"; - bus-width = <4>; - }; diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0006-ARM-dts-bcm283x-drop-alt3-from-gpio.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0006-ARM-dts-bcm283x-drop-alt3-from-gpio.patch deleted file mode 100644 index 26a75cfe9..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0006-ARM-dts-bcm283x-drop-alt3-from-gpio.patch +++ /dev/null @@ -1,112 +0,0 @@ -From a6d962aeb22fbf73c023334bdf55dc45c9fd7dba Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Mon, 19 Sep 2016 10:43:23 +0200 -Subject: [PATCH] ARM: dts: bcm283x: drop alt3 from &gpio - -As the alt3 group has no pins left drop it from &gpio. - -Signed-off-by: Gerd Hoffmann -Signed-off-by: Eric Anholt -Acked-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 ----- - arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +- - 8 files changed, 7 insertions(+), 12 deletions(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -22,7 +22,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ - i2s_alt0: i2s_alt0 { ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -15,7 +15,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; - - /* I2S interface */ - i2s_alt2: i2s_alt2 { ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -23,7 +23,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ - i2s_alt0: i2s_alt0 { ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -16,7 +16,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; - - /* I2S interface */ - i2s_alt2: i2s_alt2 { ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -16,7 +16,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &alt3>; -+ pinctrl-0 = <&gpioout &alt0>; - }; - - &hdmi { ---- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -@@ -26,7 +26,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ - i2s_alt0: i2s_alt0 { ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -42,11 +42,6 @@ - brcm,pins = <4 5 7 8 9 10 11 14 15>; - brcm,function = ; - }; -- -- alt3: alt3 { -- brcm,pins = <>; -- brcm,function = ; -- }; - }; - - &i2c0 { ---- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -@@ -27,7 +27,7 @@ - }; - - &gpio { -- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>; -+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ - i2s_alt0: i2s_alt0 { diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0008-ARM-bcm2835-dts-add-thermal-node-to-device-tree-of-b.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0008-ARM-bcm2835-dts-add-thermal-node-to-device-tree-of-b.patch deleted file mode 100644 index e561e058e..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0008-ARM-bcm2835-dts-add-thermal-node-to-device-tree-of-b.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 43bac4133f405b67857e4c985aecc44a57233bfe Mon Sep 17 00:00:00 2001 -From: Martin Sperl -Date: Wed, 2 Nov 2016 10:18:23 +0000 -Subject: [PATCH] ARM: bcm2835: dts: add thermal node to device-tree of bcm283x - -Add the node for the thermal sensor of the bcm2835-soc -to the device tree. - -Signed-off-by: Martin Sperl -Reviewed-by: Eric Anholt -Acked-by: Stefan Wahren - -Changelog: -V1 -> V5: generic settings is shared in bcm283x.dtsi, but disabled - moved the compatible string to the SOC specific dtsi - for arm and arm64 -V5 -> V6: fix remove 0x prefix from thermal@0x7e212000 - -Note: there is no arm/boot/dts/bcm2837.dtsi as of now, - so the 32-bit rpi3 dt is not modified. -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm2836.dtsi | 6 ++++++ - arch/arm/boot/dts/bcm283x.dtsi | 7 +++++++ - 3 files changed, 19 insertions(+) - ---- a/arch/arm/boot/dts/bcm2835.dtsi -+++ b/arch/arm/boot/dts/bcm2835.dtsi -@@ -23,3 +23,9 @@ - }; - }; - }; -+ -+/* enable thermal sensor with the correct compatible property set */ -+&thermal { -+ compatible = "brcm,bcm2835-thermal"; -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm2836.dtsi -+++ b/arch/arm/boot/dts/bcm2836.dtsi -@@ -76,3 +76,9 @@ - interrupt-parent = <&local_intc>; - interrupts = <8>; - }; -+ -+/* enable thermal sensor with the correct compatible property set */ -+&thermal { -+ compatible = "brcm,bcm2836-thermal"; -+ status = "okay"; -+}; ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -395,6 +395,13 @@ - interrupts = <2 14>; /* pwa1 */ - }; - -+ thermal: thermal@7e212000 { -+ compatible = "brcm,bcm2835-thermal"; -+ reg = <0x7e212000 0x8>; -+ clocks = <&clocks BCM2835_CLOCK_TSENS>; -+ status = "disabled"; -+ }; -+ - aux: aux@0x7e215000 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <1>; diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0009-ARM-bcm2835-Add-names-for-the-Raspberry-Pi-GPIO-line.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0009-ARM-bcm2835-Add-names-for-the-Raspberry-Pi-GPIO-line.patch deleted file mode 100644 index da6c3b624..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0009-ARM-bcm2835-Add-names-for-the-Raspberry-Pi-GPIO-line.patch +++ /dev/null @@ -1,414 +0,0 @@ -From 731b26a6ac17f24057c559361c6d0cb7cb79baed Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Thu, 6 Oct 2016 13:15:02 +0200 -Subject: [PATCH] ARM: bcm2835: Add names for the Raspberry Pi GPIO lines - -The idea is to give useful names to GPIO lines that an implementer -will be using from userspace, e.g. for maker type projects. These are -user-visible using tools/gpio/lsgpio.c - -v2: Major rewrite by anholt: Flatten each GPIO line to a line in the - file for better diffing, prefix all expansion header pins with - "P" or "P5HEADER_P" and drop the mostly-unused - GPIO_GEN names in favor of GPIO, fix - extra '[]' on a couple of lines, fix locations of SD_CARD_DETECT, - CAM_GPIO and STATUS_LED, fix HDMI_HPD polarities, rewrite A+ using - unreleased schematics. - -v3: More changes by anholt: Drop P / P5HEADER - prefixes. I had been skeptical about adding them, and was - convinced to drop them by Gottfried (who probably has more - experience with GPIOs in educational contexts than the rest of - us). Also drop [] brackets for "is pinmuxed", which didn't seem - to clarify, and were ambiguous for things like the SPI_*-labeled - pins which may or may not actually be pinmuxed to SPI. - -v4: Rename B+'s SDA0/SCL0 to match the other boards, despite the - naming on its schematic. - -Signed-off-by: Linus Walleij -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 65 +++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm2835-rpi-a.dts | 67 ++++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 66 +++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 66 +++++++++++++++++++++++++++++++ - arch/arm/boot/dts/bcm2835-rpi-b.dts | 67 ++++++++++++++++++++++++++++++++ - 5 files changed, 331 insertions(+) - ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -22,6 +22,71 @@ - }; - - &gpio { -+ /* -+ * This is based on the unreleased schematic for the Model A+. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "NC", /* GPIO31 */ -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "PWR_LOW_N", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", /* GPIO40 */ -+ "CAM_GPIO0", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -15,6 +15,73 @@ - }; - - &gpio { -+ /* -+ * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf -+ * RPI00021 sheet 02 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "CAM_CLK", -+ "LAN_RUN", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "NC", /* GPIO12 */ -+ "NC", /* GPIO13 */ -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "STATUS_LED_N", -+ "GPIO17", -+ "GPIO18", -+ "NC", /* GPIO19 */ -+ "NC", /* GPIO20 */ -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "NC", /* GPIO26 */ -+ "CAM_GPIO", -+ /* Binary number representing build/revision */ -+ "CONFIG0", -+ "CONFIG1", -+ "CONFIG2", -+ "CONFIG3", -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "NC", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", -+ "HDMI_HPD_P", -+ "SD_CARD_DET", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; - - /* I2S interface */ ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -23,6 +23,72 @@ - }; - - &gpio { -+ /* -+ * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf -+ * RPI-BPLUS sheet 1 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "LAN_RUN", /* GPIO31 */ -+ "CAM_GPIO1", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "PWR_LOW_N", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", /* GPIO40 */ -+ "CAM_GPIO0", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "ETHCLK", /* GPIO44 */ -+ "PWM1_OUT", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -16,6 +16,72 @@ - }; - - &gpio { -+ /* -+ * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf -+ * RPI00022 sheet 02 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "CAM_CLK", -+ "LAN_RUN", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "NC", /* GPIO12 */ -+ "NC", /* GPIO13 */ -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "STATUS_LED_N", -+ "GPIO17", -+ "GPIO18", -+ "NC", /* GPIO19 */ -+ "NC", /* GPIO20 */ -+ "CAM_GPIO", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "NC", /* GPIO26 */ -+ "GPIO27", -+ "GPIO28", -+ "GPIO29", -+ "GPIO30", -+ "GPIO31", -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "NC", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", -+ "HDMI_HPD_P", -+ "SD_CARD_DET", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0 &i2s_alt2>; - - /* I2S interface */ ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -16,6 +16,73 @@ - }; - - &gpio { -+ /* -+ * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf -+ * RPI00021 sheet 02 -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "CAM_CLK", -+ "LAN_RUN", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "NC", /* GPIO12 */ -+ "NC", /* GPIO13 */ -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "STATUS_LED_N", -+ "GPIO17", -+ "GPIO18", -+ "NC", /* GPIO19 */ -+ "NC", /* GPIO20 */ -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "NC", /* GPIO26 */ -+ "CAM_GPIO", -+ /* Binary number representing build/revision */ -+ "CONFIG0", -+ "CONFIG1", -+ "CONFIG2", -+ "CONFIG3", -+ "NC", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "PWM0_OUT", -+ "NC", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "PWM1_OUT", -+ "HDMI_HPD_P", -+ "SD_CARD_DET", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0>; - }; - diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0010-ARM-bcm2835-Fix-names-for-the-Raspberry-Pi-GPIO-line.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0010-ARM-bcm2835-Fix-names-for-the-Raspberry-Pi-GPIO-line.patch deleted file mode 100644 index 83448f239..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0010-ARM-bcm2835-Fix-names-for-the-Raspberry-Pi-GPIO-line.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 6b9170887e1b912b657dab4597f8b44ae4dbdf50 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 16 Nov 2016 17:52:06 +0000 -Subject: [PATCH] ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines - -There are some differences between the schematics and the official firmware -DTS [1]. So based on these additional information the following has been -changed: - -* use consistent "CAM_GPIO1" for camera LED -* use consistent "CAM_GPIO0" for camera shutdown -* add "USB_LIMIT" for USB current limit (0=600mA, 1=1200mA) - -[1] - https://github.com/raspberrypi/firmware/blob/master/extra/dt-blob.dts - -Signed-off-by: Stefan Wahren -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 ++-- - arch/arm/boot/dts/bcm2835-rpi-a.dts | 4 ++-- - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +- - arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 ++-- - 4 files changed, 7 insertions(+), 7 deletions(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -63,13 +63,13 @@ - "SCL0", - "NC", /* GPIO30 */ - "NC", /* GPIO31 */ -- "NC", /* GPIO32 */ -+ "CAM_GPIO1", /* GPIO32 */ - "NC", /* GPIO33 */ - "NC", /* GPIO34 */ - "PWR_LOW_N", /* GPIO35 */ - "NC", /* GPIO36 */ - "NC", /* GPIO37 */ -- "NC", /* GPIO38 */ -+ "USB_LIMIT", /* GPIO38 */ - "NC", /* GPIO39 */ - "PWM0_OUT", /* GPIO40 */ - "CAM_GPIO0", /* GPIO41 */ ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -29,7 +29,7 @@ - "SDA1", - "SCL1", - "GPIO_GCLK", -- "CAM_CLK", -+ "CAM_GPIO1", - "LAN_RUN", - "SPI_CE1_N", - "SPI_CE0_N", -@@ -52,7 +52,7 @@ - "GPIO24", - "GPIO25", - "NC", /* GPIO26 */ -- "CAM_GPIO", -+ "CAM_GPIO0", - /* Binary number representing build/revision */ - "CONFIG0", - "CONFIG1", ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -71,7 +71,7 @@ - "PWR_LOW_N", /* GPIO35 */ - "NC", /* GPIO36 */ - "NC", /* GPIO37 */ -- "NC", /* GPIO38 */ -+ "USB_LIMIT", /* GPIO38 */ - "NC", /* GPIO39 */ - "PWM0_OUT", /* GPIO40 */ - "CAM_GPIO0", /* GPIO41 */ ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -30,7 +30,7 @@ - "SDA1", - "SCL1", - "GPIO_GCLK", -- "CAM_CLK", -+ "CAM_GPIO1", - "LAN_RUN", - "SPI_CE1_N", - "SPI_CE0_N", -@@ -53,7 +53,7 @@ - "GPIO24", - "GPIO25", - "NC", /* GPIO26 */ -- "CAM_GPIO", -+ "CAM_GPIO0", - /* Binary number representing build/revision */ - "CONFIG0", - "CONFIG1", diff --git a/target/linux/brcm2708/patches-4.9/031-v4.10-0011-ARM-bcm2835-Add-names-for-the-RPi-Zero-GPIO-lines.patch b/target/linux/brcm2708/patches-4.9/031-v4.10-0011-ARM-bcm2835-Add-names-for-the-RPi-Zero-GPIO-lines.patch deleted file mode 100644 index 5beef8ecb..000000000 --- a/target/linux/brcm2708/patches-4.9/031-v4.10-0011-ARM-bcm2835-Add-names-for-the-RPi-Zero-GPIO-lines.patch +++ /dev/null @@ -1,91 +0,0 @@ -From 3a1689ea752436917c5ce4487527ed6c444630ee Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 16 Nov 2016 17:52:07 +0000 -Subject: [PATCH] ARM: bcm2835: Add names for the RPi Zero GPIO lines - -This adds the GPIO names for the Raspberry Pi Zero. The GPIO lines -of the RPi Zero are almost identical to the Model A+ except: - -* GPIO 35, 38, 40 and 45 are not connected -* Status LED is active low - -Signed-off-by: Stefan Wahren -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi-zero.dts | 65 ++++++++++++++++++++++++++++++++++ - 1 file changed, 65 insertions(+) - ---- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -@@ -26,6 +26,71 @@ - }; - - &gpio { -+ /* -+ * This is based on the official GPU firmware DT blob. -+ * -+ * Legend: -+ * "NC" = not connected (no rail from the SoC) -+ * "FOO" = GPIO line named "FOO" on the schematic -+ * "FOO_N" = GPIO line named "FOO" on schematic, active low -+ */ -+ gpio-line-names = "SDA0", -+ "SCL0", -+ "SDA1", -+ "SCL1", -+ "GPIO_GCLK", -+ "GPIO5", -+ "GPIO6", -+ "SPI_CE1_N", -+ "SPI_CE0_N", -+ "SPI_MISO", -+ "SPI_MOSI", -+ "SPI_SCLK", -+ "GPIO12", -+ "GPIO13", -+ /* Serial port */ -+ "TXD0", -+ "RXD0", -+ "GPIO16", -+ "GPIO17", -+ "GPIO18", -+ "GPIO19", -+ "GPIO20", -+ "GPIO21", -+ "GPIO22", -+ "GPIO23", -+ "GPIO24", -+ "GPIO25", -+ "GPIO26", -+ "GPIO27", -+ "SDA0", -+ "SCL0", -+ "NC", /* GPIO30 */ -+ "NC", /* GPIO31 */ -+ "CAM_GPIO1", /* GPIO32 */ -+ "NC", /* GPIO33 */ -+ "NC", /* GPIO34 */ -+ "NC", /* GPIO35 */ -+ "NC", /* GPIO36 */ -+ "NC", /* GPIO37 */ -+ "NC", /* GPIO38 */ -+ "NC", /* GPIO39 */ -+ "NC", /* GPIO40 */ -+ "CAM_GPIO0", /* GPIO41 */ -+ "NC", /* GPIO42 */ -+ "NC", /* GPIO43 */ -+ "NC", /* GPIO44 */ -+ "NC", /* GPIO45 */ -+ "HDMI_HPD_N", -+ "STATUS_LED_N", -+ /* Used by SD Card */ -+ "SD_CLK_R", -+ "SD_CMD_R", -+ "SD_DATA0_R", -+ "SD_DATA1_R", -+ "SD_DATA2_R", -+ "SD_DATA3_R"; -+ - pinctrl-0 = <&gpioout &alt0 &i2s_alt0>; - - /* I2S interface */ diff --git a/target/linux/brcm2708/patches-4.9/032-v4.11-0001-ARM-dts-bcm283x-Add-VEC-node-in-bcm283x.dtsi.patch b/target/linux/brcm2708/patches-4.9/032-v4.11-0001-ARM-dts-bcm283x-Add-VEC-node-in-bcm283x.dtsi.patch deleted file mode 100644 index 17e9b3e3f..000000000 --- a/target/linux/brcm2708/patches-4.9/032-v4.11-0001-ARM-dts-bcm283x-Add-VEC-node-in-bcm283x.dtsi.patch +++ /dev/null @@ -1,30 +0,0 @@ -From b899c45208d6f204a6da9a1132577993eeecf0fb Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:12 +0100 -Subject: [PATCH] ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi - -Add the VEC (Video EnCoder) node definition in bcm283x.dtsi. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -481,6 +481,14 @@ - status = "disabled"; - }; - -+ vec: vec@7e806000 { -+ compatible = "brcm,bcm2835-vec"; -+ reg = <0x7e806000 0x1000>; -+ clocks = <&clocks BCM2835_CLOCK_VEC>; -+ interrupts = <2 27>; -+ status = "disabled"; -+ }; -+ - pixelvalve@7e807000 { - compatible = "brcm,bcm2835-pixelvalve2"; - reg = <0x7e807000 0x100>; diff --git a/target/linux/brcm2708/patches-4.9/032-v4.11-0002-ARM-dts-bcm283x-Enable-the-VEC-IP-on-all-RaspberryPi.patch b/target/linux/brcm2708/patches-4.9/032-v4.11-0002-ARM-dts-bcm283x-Enable-the-VEC-IP-on-all-RaspberryPi.patch deleted file mode 100644 index 3362fbb83..000000000 --- a/target/linux/brcm2708/patches-4.9/032-v4.11-0002-ARM-dts-bcm283x-Enable-the-VEC-IP-on-all-RaspberryPi.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 5ab1a37c6027c114a87a1ae32cfc5ef303d643c5 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:13 +0100 -Subject: [PATCH] ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi - boards - -Enable the VEC IP on all RaspberryPi boards. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -87,3 +87,8 @@ - power-domains = <&power RPI_POWER_DOMAIN_HDMI>; - status = "okay"; - }; -+ -+&vec { -+ power-domains = <&power RPI_POWER_DOMAIN_VEC>; -+ status = "okay"; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0010-serial-8250-Don-t-crash-when-nr_uarts-is-0.patch b/target/linux/brcm2708/patches-4.9/950-0010-serial-8250-Don-t-crash-when-nr_uarts-is-0.patch deleted file mode 100644 index 447f1ce08..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0010-serial-8250-Don-t-crash-when-nr_uarts-is-0.patch +++ /dev/null @@ -1,20 +0,0 @@ -From cc016c1876877aa42a84cc9c0c89af1b7410ff67 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 30 Jun 2015 14:12:42 +0100 -Subject: [PATCH] serial: 8250: Don't crash when nr_uarts is 0 - ---- - drivers/tty/serial/8250/8250_core.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/tty/serial/8250/8250_core.c -+++ b/drivers/tty/serial/8250/8250_core.c -@@ -509,6 +509,8 @@ static void __init serial8250_isa_init_p - - if (nr_uarts > UART_NR) - nr_uarts = UART_NR; -+ if (!nr_uarts) -+ return; - - for (i = 0; i < nr_uarts; i++) { - struct uart_8250_port *up = &serial8250_ports[i]; diff --git a/target/linux/brcm2708/patches-4.9/950-0012-pinctrl-bcm2835-Fix-interrupt-handling-for-GPIOs-28-.patch b/target/linux/brcm2708/patches-4.9/950-0012-pinctrl-bcm2835-Fix-interrupt-handling-for-GPIOs-28-.patch deleted file mode 100644 index 6eae4e682..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0012-pinctrl-bcm2835-Fix-interrupt-handling-for-GPIOs-28-.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 6f92d02f7af5a9b5ed5ded7dbeb18bf2bbb2ad85 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 24 Feb 2015 13:40:50 +0000 -Subject: [PATCH] pinctrl-bcm2835: Fix interrupt handling for GPIOs 28-31 and - 46-53 - -Contrary to the documentation, the BCM2835 GPIO controller actually has -four interrupt lines - one each for the three IRQ groups and one common. Rather -confusingly, the GPIO interrupt groups don't correspond directly with the GPIO -control banks. Instead, GPIOs 0-27 generate IRQ GPIO0, 28-45 GPIO1 and -46-53 GPIO2. - -Awkwardly, the GPIOS for IRQ GPIO1 straddle two 32-entry GPIO banks, so it is -cleaner to split out a function to process the interrupts for a single GPIO -bank. - -This bug has only just been observed because GPIOs above 27 can only be -accessed on an old Raspberry Pi with the optional P5 header fitted, where -the pins are often used for I2S instead. ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 51 ++++++++++++++++++++++++++--------- - 1 file changed, 39 insertions(+), 12 deletions(-) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -47,6 +47,7 @@ - #define MODULE_NAME "pinctrl-bcm2835" - #define BCM2835_NUM_GPIOS 54 - #define BCM2835_NUM_BANKS 2 -+#define BCM2835_NUM_IRQS 3 - - #define BCM2835_PIN_BITMAP_SZ \ - DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8) -@@ -82,13 +83,13 @@ enum bcm2835_pinconf_param { - - struct bcm2835_gpio_irqdata { - struct bcm2835_pinctrl *pc; -- int bank; -+ int irqgroup; - }; - - struct bcm2835_pinctrl { - struct device *dev; - void __iomem *base; -- int irq[BCM2835_NUM_BANKS]; -+ int irq[BCM2835_NUM_IRQS]; - - /* note: locking assumes each bank will have its own unsigned long */ - unsigned long enabled_irq_map[BCM2835_NUM_BANKS]; -@@ -99,7 +100,7 @@ struct bcm2835_pinctrl { - struct gpio_chip gpio_chip; - struct pinctrl_gpio_range gpio_range; - -- struct bcm2835_gpio_irqdata irq_data[BCM2835_NUM_BANKS]; -+ struct bcm2835_gpio_irqdata irq_data[BCM2835_NUM_IRQS]; - spinlock_t irq_lock[BCM2835_NUM_BANKS]; - }; - -@@ -385,17 +386,16 @@ static struct gpio_chip bcm2835_gpio_chi - .can_sleep = false, - }; - --static irqreturn_t bcm2835_gpio_irq_handler(int irq, void *dev_id) -+static int bcm2835_gpio_irq_handle_bank(struct bcm2835_pinctrl *pc, -+ unsigned int bank, u32 mask) - { -- struct bcm2835_gpio_irqdata *irqdata = dev_id; -- struct bcm2835_pinctrl *pc = irqdata->pc; -- int bank = irqdata->bank; - unsigned long events; - unsigned offset; - unsigned gpio; - unsigned int type; - - events = bcm2835_gpio_rd(pc, GPEDS0 + bank * 4); -+ events &= mask; - events &= pc->enabled_irq_map[bank]; - for_each_set_bit(offset, &events, 32) { - gpio = (32 * bank) + offset; -@@ -403,7 +403,30 @@ static irqreturn_t bcm2835_gpio_irq_hand - - generic_handle_irq(irq_linear_revmap(pc->irq_domain, gpio)); - } -- return events ? IRQ_HANDLED : IRQ_NONE; -+ -+ return (events != 0); -+} -+ -+static irqreturn_t bcm2835_gpio_irq_handler(int irq, void *dev_id) -+{ -+ struct bcm2835_gpio_irqdata *irqdata = dev_id; -+ struct bcm2835_pinctrl *pc = irqdata->pc; -+ int handled = 0; -+ -+ switch (irqdata->irqgroup) { -+ case 0: /* IRQ0 covers GPIOs 0-27 */ -+ handled = bcm2835_gpio_irq_handle_bank(pc, 0, 0x0fffffff); -+ break; -+ case 1: /* IRQ1 covers GPIOs 28-45 */ -+ handled = bcm2835_gpio_irq_handle_bank(pc, 0, 0xf0000000) | -+ bcm2835_gpio_irq_handle_bank(pc, 1, 0x00003fff); -+ break; -+ case 2: /* IRQ2 covers GPIOs 46-53 */ -+ handled = bcm2835_gpio_irq_handle_bank(pc, 1, 0x003fc000); -+ break; -+ } -+ -+ return handled ? IRQ_HANDLED : IRQ_NONE; - } - - static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc, -@@ -992,8 +1015,6 @@ static int bcm2835_pinctrl_probe(struct - for (i = 0; i < BCM2835_NUM_BANKS; i++) { - unsigned long events; - unsigned offset; -- int len; -- char *name; - - /* clear event detection flags */ - bcm2835_gpio_wr(pc, GPREN0 + i * 4, 0); -@@ -1008,10 +1029,15 @@ static int bcm2835_pinctrl_probe(struct - for_each_set_bit(offset, &events, 32) - bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset)); - -+ spin_lock_init(&pc->irq_lock[i]); -+ } -+ -+ for (i = 0; i < BCM2835_NUM_IRQS; i++) { -+ int len; -+ char *name; - pc->irq[i] = irq_of_parse_and_map(np, i); - pc->irq_data[i].pc = pc; -- pc->irq_data[i].bank = i; -- spin_lock_init(&pc->irq_lock[i]); -+ pc->irq_data[i].irqgroup = i; - - len = strlen(dev_name(pc->dev)) + 16; - name = devm_kzalloc(pc->dev, len, GFP_KERNEL); -@@ -1068,6 +1094,7 @@ static struct platform_driver bcm2835_pi - .remove = bcm2835_pinctrl_remove, - .driver = { - .name = MODULE_NAME, -+ .owner = THIS_MODULE, - .of_match_table = bcm2835_pinctrl_match, - }, - }; diff --git a/target/linux/brcm2708/patches-4.9/950-0013-pinctrl-bcm2835-Only-request-the-interrupts-listed-i.patch b/target/linux/brcm2708/patches-4.9/950-0013-pinctrl-bcm2835-Only-request-the-interrupts-listed-i.patch deleted file mode 100644 index 6c365cc8e..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0013-pinctrl-bcm2835-Only-request-the-interrupts-listed-i.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6b37913f47f5fbd2748ea9abfb9a17fcfb1b5d29 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 26 Feb 2015 09:58:22 +0000 -Subject: [PATCH] pinctrl-bcm2835: Only request the interrupts listed in the - DTB - -Although the GPIO controller can generate three interrupts (four counting -the common one), the device tree files currently only specify two. In the -absence of the third, simply don't register that interrupt (as opposed to -registering 0), which has the effect of making it impossible to generate -interrupts for GPIOs 46-53 which, since they share pins with the SD card -interface, is unlikely to be a problem. ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -1036,6 +1036,8 @@ static int bcm2835_pinctrl_probe(struct - int len; - char *name; - pc->irq[i] = irq_of_parse_and_map(np, i); -+ if (pc->irq[i] == 0) -+ break; - pc->irq_data[i].pc = pc; - pc->irq_data[i].irqgroup = i; - diff --git a/target/linux/brcm2708/patches-4.9/950-0014-pinctrl-bcm2835-Return-pins-to-inputs-when-freed.patch b/target/linux/brcm2708/patches-4.9/950-0014-pinctrl-bcm2835-Return-pins-to-inputs-when-freed.patch deleted file mode 100644 index 072961488..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0014-pinctrl-bcm2835-Return-pins-to-inputs-when-freed.patch +++ /dev/null @@ -1,41 +0,0 @@ -From e64023aab5addf920379e9f919d7c5cd4c8d0981 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 6 May 2016 12:32:47 +0100 -Subject: [PATCH] pinctrl-bcm2835: Return pins to inputs when freed - -When dynamically unloading overlays, it is important that freed pins are -restored to being inputs to prevent functions from being enabled in -multiple places at once. - -Signed-off-by: Phil Elwell ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -838,6 +838,16 @@ static const struct pinctrl_ops bcm2835_ - .dt_free_map = bcm2835_pctl_dt_free_map, - }; - -+static int bcm2835_pmx_free(struct pinctrl_dev *pctldev, -+ unsigned offset) -+{ -+ struct bcm2835_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev); -+ -+ /* disable by setting to GPIO_IN */ -+ bcm2835_pinctrl_fsel_set(pc, offset, BCM2835_FSEL_GPIO_IN); -+ return 0; -+} -+ - static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev) - { - return BCM2835_FSEL_COUNT; -@@ -897,6 +907,7 @@ static int bcm2835_pmx_gpio_set_directio - } - - static const struct pinmux_ops bcm2835_pmx_ops = { -+ .free = bcm2835_pmx_free, - .get_functions_count = bcm2835_pmx_get_functions_count, - .get_function_name = bcm2835_pmx_get_function_name, - .get_function_groups = bcm2835_pmx_get_function_groups, diff --git a/target/linux/brcm2708/patches-4.9/950-0020-firmware-Updated-mailbox-header.patch b/target/linux/brcm2708/patches-4.9/950-0020-firmware-Updated-mailbox-header.patch deleted file mode 100644 index 37eb15439..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0020-firmware-Updated-mailbox-header.patch +++ /dev/null @@ -1,63 +0,0 @@ -From e4edca57f8db4d03ad4dc82dd6761c0142ab310d Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 25 Jan 2016 17:25:12 +0000 -Subject: [PATCH] firmware: Updated mailbox header - ---- - include/soc/bcm2835/raspberrypi-firmware.h | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -63,6 +63,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_GET_MIN_VOLTAGE = 0x00030008, - RPI_FIRMWARE_GET_TURBO = 0x00030009, - RPI_FIRMWARE_GET_MAX_TEMPERATURE = 0x0003000a, -+ RPI_FIRMWARE_GET_STC = 0x0003000b, - RPI_FIRMWARE_ALLOCATE_MEMORY = 0x0003000c, - RPI_FIRMWARE_LOCK_MEMORY = 0x0003000d, - RPI_FIRMWARE_UNLOCK_MEMORY = 0x0003000e, -@@ -72,12 +73,15 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_SET_ENABLE_QPU = 0x00030012, - RPI_FIRMWARE_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, - RPI_FIRMWARE_GET_EDID_BLOCK = 0x00030020, -+ RPI_FIRMWARE_GET_CUSTOMER_OTP = 0x00030021, - RPI_FIRMWARE_GET_DOMAIN_STATE = 0x00030030, - RPI_FIRMWARE_SET_CLOCK_STATE = 0x00038001, - RPI_FIRMWARE_SET_CLOCK_RATE = 0x00038002, - RPI_FIRMWARE_SET_VOLTAGE = 0x00038003, - RPI_FIRMWARE_SET_TURBO = 0x00038009, -+ RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021, - RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030, -+ RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042, - - /* Dispmanx TAGS */ - RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, -@@ -91,6 +95,8 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, - RPI_FIRMWARE_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, - RPI_FIRMWARE_FRAMEBUFFER_GET_PALETTE = 0x0004000b, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, -+ RPI_FIRMWARE_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, - RPI_FIRMWARE_FRAMEBUFFER_RELEASE = 0x00048001, - RPI_FIRMWARE_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, - RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, -@@ -100,6 +106,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, - RPI_FIRMWARE_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, - RPI_FIRMWARE_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, -+ RPI_FIRMWARE_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, - RPI_FIRMWARE_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, - RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, - RPI_FIRMWARE_FRAMEBUFFER_SET_DEPTH = 0x00048005, -@@ -108,6 +115,10 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, - RPI_FIRMWARE_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, - RPI_FIRMWARE_FRAMEBUFFER_SET_PALETTE = 0x0004800b, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_VSYNC = 0x0004800e, -+ RPI_FIRMWARE_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, -+ -+ RPI_FIRMWARE_VCHIQ_INIT = 0x00048010, - - RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001, - RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001, diff --git a/target/linux/brcm2708/patches-4.9/950-0027-bcm2835-rng-Avoid-initialising-if-already-enabled.patch b/target/linux/brcm2708/patches-4.9/950-0027-bcm2835-rng-Avoid-initialising-if-already-enabled.patch deleted file mode 100644 index 97309da0e..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0027-bcm2835-rng-Avoid-initialising-if-already-enabled.patch +++ /dev/null @@ -1,26 +0,0 @@ -From ecba31015228961644ad8e17bcf132eea9c7a7f3 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Tue, 6 Dec 2016 17:05:39 +0000 -Subject: [PATCH] bcm2835-rng: Avoid initialising if already enabled - -Avoids the 0x40000 cycles of warmup again if firmware has already used it ---- - drivers/char/hw_random/bcm2835-rng.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - ---- a/drivers/char/hw_random/bcm2835-rng.c -+++ b/drivers/char/hw_random/bcm2835-rng.c -@@ -102,9 +102,10 @@ static int bcm2835_rng_probe(struct plat - rng_setup(rng_base); - - /* set warm-up count & enable */ -- __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS); -- __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL); -- -+ if (!(__raw_readl(rng_base + RNG_CTRL) & RNG_RBGEN)) { -+ __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS); -+ __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL); -+ } - /* register driver */ - err = hwrng_register(&bcm2835_rng_ops); - if (err) { diff --git a/target/linux/brcm2708/patches-4.9/950-0029-BCM2835_DT-Fix-I2S-register-map.patch b/target/linux/brcm2708/patches-4.9/950-0029-BCM2835_DT-Fix-I2S-register-map.patch deleted file mode 100644 index c193ef916..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0029-BCM2835_DT-Fix-I2S-register-map.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 317560a92ebfdac14df54b6a242dd8f5ecc1fd58 Mon Sep 17 00:00:00 2001 -From: Robert Tiemann -Date: Mon, 20 Jul 2015 11:01:25 +0200 -Subject: [PATCH] BCM2835_DT: Fix I2S register map - ---- - Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt | 4 ++-- - Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - ---- a/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt -+++ b/Documentation/devicetree/bindings/dma/brcm,bcm2835-dma.txt -@@ -74,8 +74,8 @@ Example: - - bcm2835_i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; -- reg = < 0x7e203000 0x20>, -- < 0x7e101098 0x02>; -+ reg = < 0x7e203000 0x24>, -+ < 0x7e101098 0x08>; - - dmas = <&dma 2>, - <&dma 3>; ---- a/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt -+++ b/Documentation/devicetree/bindings/sound/brcm,bcm2835-i2s.txt -@@ -16,8 +16,8 @@ Example: - - bcm2835_i2s: i2s@7e203000 { - compatible = "brcm,bcm2835-i2s"; -- reg = <0x7e203000 0x20>, -- <0x7e101098 0x02>; -+ reg = <0x7e203000 0x24>, -+ <0x7e101098 0x08>; - - dmas = <&dma 2>, - <&dma 3>; diff --git a/target/linux/brcm2708/patches-4.9/950-0036-mmc-Add-MMC_QUIRK_ERASE_BROKEN-for-some-cards.patch b/target/linux/brcm2708/patches-4.9/950-0036-mmc-Add-MMC_QUIRK_ERASE_BROKEN-for-some-cards.patch deleted file mode 100644 index d84a0fe89..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0036-mmc-Add-MMC_QUIRK_ERASE_BROKEN-for-some-cards.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 6d11059a087b8101cf34a09a1e3342bb4f1576de Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 11 May 2016 12:50:33 +0100 -Subject: [PATCH] mmc: Add MMC_QUIRK_ERASE_BROKEN for some cards - -Some SD cards have been found that corrupt data when small blocks -are erased. Add a quirk to indicate that ERASE should not be used, -and set it for cards of that type. - -Signed-off-by: Phil Elwell - -mmc: Apply QUIRK_BROKEN_ERASE to other capacities - -Signed-off-by: Phil Elwell - -mmc: Add card_quirks module parameter, log quirks - -Use mmc_block.card_quirks to override the quirks for all SD or MMC -cards. The value is a bitfield using the bit positions defined in -include/linux/mmc/card.h. If the module parameter is placed in the -kernel command line (or bootargs) stored on the card then, assuming the -device only has one SD card interface, the override effectively becomes -card-specific. - -Signed-off-by: Phil Elwell ---- - drivers/mmc/card/block.c | 39 ++++++++++++++++++++++++++++++++++++--- - drivers/mmc/core/core.c | 3 ++- - include/linux/mmc/card.h | 3 +++ - 3 files changed, 41 insertions(+), 4 deletions(-) - ---- a/drivers/mmc/card/block.c -+++ b/drivers/mmc/card/block.c -@@ -135,6 +135,13 @@ enum { - module_param(perdev_minors, int, 0444); - MODULE_PARM_DESC(perdev_minors, "Minors numbers to allocate per device"); - -+/* -+ * Allow quirks to be overridden for the current card -+ */ -+static char *card_quirks; -+module_param(card_quirks, charp, 0644); -+MODULE_PARM_DESC(card_quirks, "Force the use of the indicated quirks (a bitfield)"); -+ - static inline int mmc_blk_part_switch(struct mmc_card *card, - struct mmc_blk_data *md); - static int get_card_status(struct mmc_card *card, u32 *status, int retries); -@@ -2573,6 +2580,17 @@ static const struct mmc_fixup blk_fixups - MMC_FIXUP("V10016", CID_MANFID_KINGSTON, CID_OEMID_ANY, add_quirk_mmc, - MMC_QUIRK_TRIM_BROKEN), - -+ /* -+ * On some Kingston SD cards, multiple erases of less than 64 -+ * sectors can cause corruption. -+ */ -+ MMC_FIXUP("SD16G", 0x41, 0x3432, add_quirk_mmc, -+ MMC_QUIRK_ERASE_BROKEN), -+ MMC_FIXUP("SD32G", 0x41, 0x3432, add_quirk_mmc, -+ MMC_QUIRK_ERASE_BROKEN), -+ MMC_FIXUP("SD64G", 0x41, 0x3432, add_quirk_mmc, -+ MMC_QUIRK_ERASE_BROKEN), -+ - END_FIXUP - }; - -@@ -2580,6 +2598,7 @@ static int mmc_blk_probe(struct mmc_card - { - struct mmc_blk_data *md, *part_md; - char cap_str[10]; -+ char quirk_str[24]; - - /* - * Check that the card supports the command class(es) we need. -@@ -2587,7 +2606,16 @@ static int mmc_blk_probe(struct mmc_card - if (!(card->csd.cmdclass & CCC_BLOCK_READ)) - return -ENODEV; - -- mmc_fixup_device(card, blk_fixups); -+ if (card_quirks) { -+ unsigned long quirks; -+ if (kstrtoul(card_quirks, 0, &quirks) == 0) -+ card->quirks = (unsigned int)quirks; -+ else -+ pr_err("mmc_block: Invalid card_quirks parameter '%s'\n", -+ card_quirks); -+ } -+ else -+ mmc_fixup_device(card, blk_fixups); - - md = mmc_blk_alloc(card); - if (IS_ERR(md)) -@@ -2595,9 +2623,14 @@ static int mmc_blk_probe(struct mmc_card - - string_get_size((u64)get_capacity(md->disk), 512, STRING_UNITS_2, - cap_str, sizeof(cap_str)); -- pr_info("%s: %s %s %s %s\n", -+ if (card->quirks) -+ snprintf(quirk_str, sizeof(quirk_str), -+ " (quirks 0x%08x)", card->quirks); -+ else -+ quirk_str[0] = '\0'; -+ pr_info("%s: %s %s %s%s%s\n", - md->disk->disk_name, mmc_card_id(card), mmc_card_name(card), -- cap_str, md->read_only ? "(ro)" : ""); -+ cap_str, md->read_only ? " (ro)" : "", quirk_str); - - if (mmc_blk_alloc_parts(card, md)) - goto out; ---- a/drivers/mmc/core/core.c -+++ b/drivers/mmc/core/core.c -@@ -2409,7 +2409,8 @@ EXPORT_SYMBOL(mmc_erase); - int mmc_can_erase(struct mmc_card *card) - { - if ((card->host->caps & MMC_CAP_ERASE) && -- (card->csd.cmdclass & CCC_ERASE) && card->erase_size) -+ (card->csd.cmdclass & CCC_ERASE) && card->erase_size && -+ !(card->quirks & MMC_QUIRK_ERASE_BROKEN)) - return 1; - return 0; - } ---- a/include/linux/mmc/card.h -+++ b/include/linux/mmc/card.h -@@ -283,6 +283,9 @@ struct mmc_card { - #define MMC_QUIRK_BROKEN_HPI (1<<13) /* Disable broken HPI support */ - - -+#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */ -+ -+ - unsigned int erase_size; /* erase size in sectors */ - unsigned int erase_shift; /* if erase unit is power 2 */ - unsigned int pref_erase; /* in sectors */ diff --git a/target/linux/brcm2708/patches-4.9/950-0037-cma-Add-vc_cma-driver-to-enable-use-of-CMA.patch b/target/linux/brcm2708/patches-4.9/950-0037-cma-Add-vc_cma-driver-to-enable-use-of-CMA.patch deleted file mode 100644 index 50bad76c5..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0037-cma-Add-vc_cma-driver-to-enable-use-of-CMA.patch +++ /dev/null @@ -1,1319 +0,0 @@ -From 4d96064d4c95d73d22563cea403eccd72e7b0da0 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Wed, 3 Jul 2013 00:31:47 +0100 -Subject: [PATCH] cma: Add vc_cma driver to enable use of CMA -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: popcornmix - -vc_cma: Make the vc_cma area the default contiguous DMA area - -vc_cma: Provide empty functions when module is not built - -Providing empty functions saves the users from guarding the -function call with an #if clause. -Move __init markings from prototypes to functions. - -Signed-off-by: Noralf Trønnes ---- - drivers/char/Kconfig | 2 + - drivers/char/Makefile | 1 + - drivers/char/broadcom/Kconfig | 15 + - drivers/char/broadcom/Makefile | 1 + - drivers/char/broadcom/vc_cma/Makefile | 7 + - drivers/char/broadcom/vc_cma/vc_cma.c | 1193 +++++++++++++++++++++++++++++++++ - include/linux/broadcom/vc_cma.h | 36 + - 7 files changed, 1255 insertions(+) - create mode 100644 drivers/char/broadcom/Kconfig - create mode 100644 drivers/char/broadcom/Makefile - create mode 100644 drivers/char/broadcom/vc_cma/Makefile - create mode 100644 drivers/char/broadcom/vc_cma/vc_cma.c - create mode 100644 include/linux/broadcom/vc_cma.h - ---- a/drivers/char/Kconfig -+++ b/drivers/char/Kconfig -@@ -4,6 +4,8 @@ - - menu "Character devices" - -+source "drivers/char/broadcom/Kconfig" -+ - source "drivers/tty/Kconfig" - - config DEVMEM ---- a/drivers/char/Makefile -+++ b/drivers/char/Makefile -@@ -60,3 +60,4 @@ js-rtc-y = rtc.o - obj-$(CONFIG_TILE_SROM) += tile-srom.o - obj-$(CONFIG_XILLYBUS) += xillybus/ - obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o -+obj-$(CONFIG_BRCM_CHAR_DRIVERS) += broadcom/ ---- /dev/null -+++ b/drivers/char/broadcom/Kconfig -@@ -0,0 +1,15 @@ -+# -+# Broadcom char driver config -+# -+ -+menuconfig BRCM_CHAR_DRIVERS -+ bool "Broadcom Char Drivers" -+ help -+ Broadcom's char drivers -+ -+config BCM_VC_CMA -+ bool "Videocore CMA" -+ depends on CMA && BRCM_CHAR_DRIVERS && BCM2708_VCHIQ -+ default n -+ help -+ Helper for videocore CMA access. ---- /dev/null -+++ b/drivers/char/broadcom/Makefile -@@ -0,0 +1 @@ -+obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ ---- /dev/null -+++ b/drivers/char/broadcom/vc_cma/Makefile -@@ -0,0 +1,7 @@ -+ccflags-$(CONFIG_BCM_VC_CMA) += -Wall -Wstrict-prototypes -Wno-trigraphs -Werror -+ccflags-$(CONFIG_BCM_VC_CMA) += -Iinclude/linux/broadcom -Idrivers/staging/vc04_services -Idrivers/staging/vc04_services/interface/vchi -Idrivers/staging/vc04_services/interface/vchiq_arm -+ccflags-$(CONFIG_BCM_VC_CMA) += -D__KERNEL__ -D__linux__ -+ -+obj-$(CONFIG_BCM_VC_CMA) += vc-cma.o -+ -+vc-cma-objs := vc_cma.o ---- /dev/null -+++ b/drivers/char/broadcom/vc_cma/vc_cma.c -@@ -0,0 +1,1193 @@ -+/** -+ * Copyright (c) 2010-2012 Broadcom. All rights reserved. -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions -+ * are met: -+ * 1. Redistributions of source code must retain the above copyright -+ * notice, this list of conditions, and the following disclaimer, -+ * without modification. -+ * 2. Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * 3. The names of the above-listed copyright holders may not be used -+ * to endorse or promote products derived from this software without -+ * specific prior written permission. -+ * -+ * ALTERNATIVELY, this software may be distributed under the terms of the -+ * GNU General Public License ("GPL") version 2, as published by the Free -+ * Software Foundation. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS -+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, -+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR -+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR -+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, -+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, -+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR -+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF -+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING -+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "vc_cma.h" -+ -+#include "vchiq_util.h" -+#include "vchiq_connected.h" -+//#include "debug_sym.h" -+//#include "vc_mem.h" -+ -+#define DRIVER_NAME "vc-cma" -+ -+#define LOG_DBG(fmt, ...) \ -+ if (vc_cma_debug) \ -+ printk(KERN_INFO fmt "\n", ##__VA_ARGS__) -+#define LOG_INFO(fmt, ...) \ -+ printk(KERN_INFO fmt "\n", ##__VA_ARGS__) -+#define LOG_ERR(fmt, ...) \ -+ printk(KERN_ERR fmt "\n", ##__VA_ARGS__) -+ -+#define VC_CMA_FOURCC VCHIQ_MAKE_FOURCC('C', 'M', 'A', ' ') -+#define VC_CMA_VERSION 2 -+ -+#define VC_CMA_CHUNK_ORDER 6 /* 256K */ -+#define VC_CMA_CHUNK_SIZE (4096 << VC_CMA_CHUNK_ORDER) -+#define VC_CMA_MAX_PARAMS_PER_MSG \ -+ ((VCHIQ_MAX_MSG_SIZE - sizeof(unsigned short))/sizeof(unsigned short)) -+#define VC_CMA_RESERVE_COUNT_MAX 16 -+ -+#define PAGES_PER_CHUNK (VC_CMA_CHUNK_SIZE / PAGE_SIZE) -+ -+#define VCADDR_TO_PHYSADDR(vcaddr) (mm_vc_mem_phys_addr + vcaddr) -+ -+#define loud_error(...) \ -+ LOG_ERR("===== " __VA_ARGS__) -+ -+enum { -+ VC_CMA_MSG_QUIT, -+ VC_CMA_MSG_OPEN, -+ VC_CMA_MSG_TICK, -+ VC_CMA_MSG_ALLOC, /* chunk count */ -+ VC_CMA_MSG_FREE, /* chunk, chunk, ... */ -+ VC_CMA_MSG_ALLOCATED, /* chunk, chunk, ... */ -+ VC_CMA_MSG_REQUEST_ALLOC, /* chunk count */ -+ VC_CMA_MSG_REQUEST_FREE, /* chunk count */ -+ VC_CMA_MSG_RESERVE, /* bytes lo, bytes hi */ -+ VC_CMA_MSG_UPDATE_RESERVE, -+ VC_CMA_MSG_MAX -+}; -+ -+struct cma_msg { -+ unsigned short type; -+ unsigned short params[VC_CMA_MAX_PARAMS_PER_MSG]; -+}; -+ -+struct vc_cma_reserve_user { -+ unsigned int pid; -+ unsigned int reserve; -+}; -+ -+/* Device (/dev) related variables */ -+static dev_t vc_cma_devnum; -+static struct class *vc_cma_class; -+static struct cdev vc_cma_cdev; -+static int vc_cma_inited; -+static int vc_cma_debug; -+ -+/* Proc entry */ -+static struct proc_dir_entry *vc_cma_proc_entry; -+ -+phys_addr_t vc_cma_base; -+struct page *vc_cma_base_page; -+unsigned int vc_cma_size; -+EXPORT_SYMBOL(vc_cma_size); -+unsigned int vc_cma_initial; -+unsigned int vc_cma_chunks; -+unsigned int vc_cma_chunks_used; -+unsigned int vc_cma_chunks_reserved; -+ -+ -+void *vc_cma_dma_alloc; -+unsigned int vc_cma_dma_size; -+ -+static int in_loud_error; -+ -+unsigned int vc_cma_reserve_total; -+unsigned int vc_cma_reserve_count; -+struct vc_cma_reserve_user vc_cma_reserve_users[VC_CMA_RESERVE_COUNT_MAX]; -+static DEFINE_SEMAPHORE(vc_cma_reserve_mutex); -+static DEFINE_SEMAPHORE(vc_cma_worker_queue_push_mutex); -+ -+static u64 vc_cma_dma_mask = DMA_BIT_MASK(32); -+static struct platform_device vc_cma_device = { -+ .name = "vc-cma", -+ .id = 0, -+ .dev = { -+ .dma_mask = &vc_cma_dma_mask, -+ .coherent_dma_mask = DMA_BIT_MASK(32), -+ }, -+}; -+ -+static VCHIQ_INSTANCE_T cma_instance; -+static VCHIQ_SERVICE_HANDLE_T cma_service; -+static VCHIU_QUEUE_T cma_msg_queue; -+static struct task_struct *cma_worker; -+ -+static int vc_cma_set_reserve(unsigned int reserve, unsigned int pid); -+static int vc_cma_alloc_chunks(int num_chunks, struct cma_msg *reply); -+static VCHIQ_STATUS_T cma_service_callback(VCHIQ_REASON_T reason, -+ VCHIQ_HEADER_T * header, -+ VCHIQ_SERVICE_HANDLE_T service, -+ void *bulk_userdata); -+static void send_vc_msg(unsigned short type, -+ unsigned short param1, unsigned short param2); -+static bool send_worker_msg(VCHIQ_HEADER_T * msg); -+ -+static int early_vc_cma_mem(char *p) -+{ -+ unsigned int new_size; -+ printk(KERN_NOTICE "early_vc_cma_mem(%s)", p); -+ vc_cma_size = memparse(p, &p); -+ vc_cma_initial = vc_cma_size; -+ if (*p == '/') -+ vc_cma_size = memparse(p + 1, &p); -+ if (*p == '@') -+ vc_cma_base = memparse(p + 1, &p); -+ -+ new_size = (vc_cma_size - ((-vc_cma_base) & (VC_CMA_CHUNK_SIZE - 1))) -+ & ~(VC_CMA_CHUNK_SIZE - 1); -+ if (new_size > vc_cma_size) -+ vc_cma_size = 0; -+ vc_cma_initial = (vc_cma_initial + VC_CMA_CHUNK_SIZE - 1) -+ & ~(VC_CMA_CHUNK_SIZE - 1); -+ if (vc_cma_initial > vc_cma_size) -+ vc_cma_initial = vc_cma_size; -+ vc_cma_base = (vc_cma_base + VC_CMA_CHUNK_SIZE - 1) -+ & ~(VC_CMA_CHUNK_SIZE - 1); -+ -+ printk(KERN_NOTICE " -> initial %x, size %x, base %x", vc_cma_initial, -+ vc_cma_size, (unsigned int)vc_cma_base); -+ -+ return 0; -+} -+ -+early_param("vc-cma-mem", early_vc_cma_mem); -+ -+void __init vc_cma_early_init(void) -+{ -+ LOG_DBG("vc_cma_early_init - vc_cma_chunks = %d", vc_cma_chunks); -+ if (vc_cma_size) { -+ int rc = platform_device_register(&vc_cma_device); -+ LOG_DBG("platform_device_register -> %d", rc); -+ } -+} -+ -+void __init vc_cma_reserve(void) -+{ -+ /* if vc_cma_size is set, then declare vc CMA area of the same -+ * size from the end of memory -+ */ -+ if (vc_cma_size) { -+ if (dma_declare_contiguous(&vc_cma_device.dev, vc_cma_size, -+ vc_cma_base, 0) == 0) { -+ if (!dev_get_cma_area(NULL)) { -+ /* There is no default CMA area - make this -+ the default */ -+ struct cma *vc_cma_area = dev_get_cma_area( -+ &vc_cma_device.dev); -+ dma_contiguous_set_default(vc_cma_area); -+ LOG_INFO("vc_cma_reserve - using vc_cma as " -+ "the default contiguous DMA area"); -+ } -+ } else { -+ LOG_ERR("vc_cma: dma_declare_contiguous(%x,%x) failed", -+ vc_cma_size, (unsigned int)vc_cma_base); -+ vc_cma_size = 0; -+ } -+ } -+ vc_cma_chunks = vc_cma_size / VC_CMA_CHUNK_SIZE; -+} -+ -+/**************************************************************************** -+* -+* vc_cma_open -+* -+***************************************************************************/ -+ -+static int vc_cma_open(struct inode *inode, struct file *file) -+{ -+ (void)inode; -+ (void)file; -+ -+ return 0; -+} -+ -+/**************************************************************************** -+* -+* vc_cma_release -+* -+***************************************************************************/ -+ -+static int vc_cma_release(struct inode *inode, struct file *file) -+{ -+ (void)inode; -+ (void)file; -+ -+ vc_cma_set_reserve(0, current->tgid); -+ -+ return 0; -+} -+ -+/**************************************************************************** -+* -+* vc_cma_ioctl -+* -+***************************************************************************/ -+ -+static long vc_cma_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ int rc = 0; -+ -+ (void)cmd; -+ (void)arg; -+ -+ switch (cmd) { -+ case VC_CMA_IOC_RESERVE: -+ rc = vc_cma_set_reserve((unsigned int)arg, current->tgid); -+ if (rc >= 0) -+ rc = 0; -+ break; -+ default: -+ LOG_ERR("vc-cma: Unknown ioctl %x", cmd); -+ return -ENOTTY; -+ } -+ -+ return rc; -+} -+ -+/**************************************************************************** -+* -+* File Operations for the driver. -+* -+***************************************************************************/ -+ -+static const struct file_operations vc_cma_fops = { -+ .owner = THIS_MODULE, -+ .open = vc_cma_open, -+ .release = vc_cma_release, -+ .unlocked_ioctl = vc_cma_ioctl, -+}; -+ -+/**************************************************************************** -+* -+* vc_cma_proc_open -+* -+***************************************************************************/ -+ -+static int vc_cma_show_info(struct seq_file *m, void *v) -+{ -+ int i; -+ -+ seq_printf(m, "Videocore CMA:\n"); -+ seq_printf(m, " Base : %08x\n", (unsigned int)vc_cma_base); -+ seq_printf(m, " Length : %08x\n", vc_cma_size); -+ seq_printf(m, " Initial : %08x\n", vc_cma_initial); -+ seq_printf(m, " Chunk size : %08x\n", VC_CMA_CHUNK_SIZE); -+ seq_printf(m, " Chunks : %4d (%d bytes)\n", -+ (int)vc_cma_chunks, -+ (int)(vc_cma_chunks * VC_CMA_CHUNK_SIZE)); -+ seq_printf(m, " Used : %4d (%d bytes)\n", -+ (int)vc_cma_chunks_used, -+ (int)(vc_cma_chunks_used * VC_CMA_CHUNK_SIZE)); -+ seq_printf(m, " Reserved : %4d (%d bytes)\n", -+ (unsigned int)vc_cma_chunks_reserved, -+ (int)(vc_cma_chunks_reserved * VC_CMA_CHUNK_SIZE)); -+ -+ for (i = 0; i < vc_cma_reserve_count; i++) { -+ struct vc_cma_reserve_user *user = &vc_cma_reserve_users[i]; -+ seq_printf(m, " PID %5d: %d bytes\n", user->pid, -+ user->reserve); -+ } -+ seq_printf(m, " dma_alloc : %p (%d pages)\n", -+ vc_cma_dma_alloc ? page_address(vc_cma_dma_alloc) : 0, -+ vc_cma_dma_size); -+ -+ seq_printf(m, "\n"); -+ -+ return 0; -+} -+ -+static int vc_cma_proc_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, vc_cma_show_info, NULL); -+} -+ -+/**************************************************************************** -+* -+* vc_cma_proc_write -+* -+***************************************************************************/ -+ -+static int vc_cma_proc_write(struct file *file, -+ const char __user *buffer, -+ size_t size, loff_t *ppos) -+{ -+ int rc = -EFAULT; -+ char input_str[20]; -+ -+ memset(input_str, 0, sizeof(input_str)); -+ -+ if (size > sizeof(input_str)) { -+ LOG_ERR("%s: input string length too long", __func__); -+ goto out; -+ } -+ -+ if (copy_from_user(input_str, buffer, size - 1)) { -+ LOG_ERR("%s: failed to get input string", __func__); -+ goto out; -+ } -+#define ALLOC_STR "alloc" -+#define FREE_STR "free" -+#define DEBUG_STR "debug" -+#define RESERVE_STR "reserve" -+#define DMA_ALLOC_STR "dma_alloc" -+#define DMA_FREE_STR "dma_free" -+ if (strncmp(input_str, ALLOC_STR, strlen(ALLOC_STR)) == 0) { -+ int alloc_size; -+ char *p = input_str + strlen(ALLOC_STR); -+ -+ while (*p == ' ') -+ p++; -+ alloc_size = memparse(p, NULL); -+ LOG_INFO("/proc/vc-cma: alloc %d", alloc_size); -+ if (alloc_size) -+ send_vc_msg(VC_CMA_MSG_REQUEST_FREE, -+ alloc_size / VC_CMA_CHUNK_SIZE, 0); -+ else -+ LOG_ERR("invalid size '%s'", p); -+ rc = size; -+ } else if (strncmp(input_str, FREE_STR, strlen(FREE_STR)) == 0) { -+ int alloc_size; -+ char *p = input_str + strlen(FREE_STR); -+ -+ while (*p == ' ') -+ p++; -+ alloc_size = memparse(p, NULL); -+ LOG_INFO("/proc/vc-cma: free %d", alloc_size); -+ if (alloc_size) -+ send_vc_msg(VC_CMA_MSG_REQUEST_ALLOC, -+ alloc_size / VC_CMA_CHUNK_SIZE, 0); -+ else -+ LOG_ERR("invalid size '%s'", p); -+ rc = size; -+ } else if (strncmp(input_str, DEBUG_STR, strlen(DEBUG_STR)) == 0) { -+ char *p = input_str + strlen(DEBUG_STR); -+ while (*p == ' ') -+ p++; -+ if ((strcmp(p, "on") == 0) || (strcmp(p, "1") == 0)) -+ vc_cma_debug = 1; -+ else if ((strcmp(p, "off") == 0) || (strcmp(p, "0") == 0)) -+ vc_cma_debug = 0; -+ LOG_INFO("/proc/vc-cma: debug %s", vc_cma_debug ? "on" : "off"); -+ rc = size; -+ } else if (strncmp(input_str, RESERVE_STR, strlen(RESERVE_STR)) == 0) { -+ int alloc_size; -+ int reserved; -+ char *p = input_str + strlen(RESERVE_STR); -+ while (*p == ' ') -+ p++; -+ alloc_size = memparse(p, NULL); -+ -+ reserved = vc_cma_set_reserve(alloc_size, current->tgid); -+ rc = (reserved >= 0) ? size : reserved; -+ } else if (strncmp(input_str, DMA_ALLOC_STR, strlen(DMA_ALLOC_STR)) == 0) { -+ int alloc_size; -+ char *p = input_str + strlen(DMA_ALLOC_STR); -+ while (*p == ' ') -+ p++; -+ alloc_size = memparse(p, NULL); -+ -+ if (vc_cma_dma_alloc) { -+ dma_release_from_contiguous(NULL, vc_cma_dma_alloc, -+ vc_cma_dma_size); -+ vc_cma_dma_alloc = NULL; -+ vc_cma_dma_size = 0; -+ } -+ vc_cma_dma_alloc = dma_alloc_from_contiguous(NULL, alloc_size, 0); -+ vc_cma_dma_size = (vc_cma_dma_alloc ? alloc_size : 0); -+ if (vc_cma_dma_alloc) -+ LOG_INFO("dma_alloc(%d pages) -> %p", alloc_size, page_address(vc_cma_dma_alloc)); -+ else -+ LOG_ERR("dma_alloc(%d pages) failed", alloc_size); -+ rc = size; -+ } else if (strncmp(input_str, DMA_FREE_STR, strlen(DMA_FREE_STR)) == 0) { -+ if (vc_cma_dma_alloc) { -+ dma_release_from_contiguous(NULL, vc_cma_dma_alloc, -+ vc_cma_dma_size); -+ vc_cma_dma_alloc = NULL; -+ vc_cma_dma_size = 0; -+ } -+ rc = size; -+ } -+ -+out: -+ return rc; -+} -+ -+/**************************************************************************** -+* -+* File Operations for /proc interface. -+* -+***************************************************************************/ -+ -+static const struct file_operations vc_cma_proc_fops = { -+ .open = vc_cma_proc_open, -+ .read = seq_read, -+ .write = vc_cma_proc_write, -+ .llseek = seq_lseek, -+ .release = single_release -+}; -+ -+static int vc_cma_set_reserve(unsigned int reserve, unsigned int pid) -+{ -+ struct vc_cma_reserve_user *user = NULL; -+ int delta = 0; -+ int i; -+ -+ if (down_interruptible(&vc_cma_reserve_mutex)) -+ return -ERESTARTSYS; -+ -+ for (i = 0; i < vc_cma_reserve_count; i++) { -+ if (pid == vc_cma_reserve_users[i].pid) { -+ user = &vc_cma_reserve_users[i]; -+ delta = reserve - user->reserve; -+ if (reserve) -+ user->reserve = reserve; -+ else { -+ /* Remove this entry by copying downwards */ -+ while ((i + 1) < vc_cma_reserve_count) { -+ user[0].pid = user[1].pid; -+ user[0].reserve = user[1].reserve; -+ user++; -+ i++; -+ } -+ vc_cma_reserve_count--; -+ user = NULL; -+ } -+ break; -+ } -+ } -+ -+ if (reserve && !user) { -+ if (vc_cma_reserve_count == VC_CMA_RESERVE_COUNT_MAX) { -+ LOG_ERR("vc-cma: Too many reservations - " -+ "increase CMA_RESERVE_COUNT_MAX"); -+ up(&vc_cma_reserve_mutex); -+ return -EBUSY; -+ } -+ user = &vc_cma_reserve_users[vc_cma_reserve_count]; -+ user->pid = pid; -+ user->reserve = reserve; -+ delta = reserve; -+ vc_cma_reserve_count++; -+ } -+ -+ vc_cma_reserve_total += delta; -+ -+ send_vc_msg(VC_CMA_MSG_RESERVE, -+ vc_cma_reserve_total & 0xffff, vc_cma_reserve_total >> 16); -+ -+ send_worker_msg((VCHIQ_HEADER_T *) VC_CMA_MSG_UPDATE_RESERVE); -+ -+ LOG_DBG("/proc/vc-cma: reserve %d (PID %d) - total %u", -+ reserve, pid, vc_cma_reserve_total); -+ -+ up(&vc_cma_reserve_mutex); -+ -+ return vc_cma_reserve_total; -+} -+ -+static VCHIQ_STATUS_T cma_service_callback(VCHIQ_REASON_T reason, -+ VCHIQ_HEADER_T * header, -+ VCHIQ_SERVICE_HANDLE_T service, -+ void *bulk_userdata) -+{ -+ switch (reason) { -+ case VCHIQ_MESSAGE_AVAILABLE: -+ if (!send_worker_msg(header)) -+ return VCHIQ_RETRY; -+ break; -+ case VCHIQ_SERVICE_CLOSED: -+ LOG_DBG("CMA service closed"); -+ break; -+ default: -+ LOG_ERR("Unexpected CMA callback reason %d", reason); -+ break; -+ } -+ return VCHIQ_SUCCESS; -+} -+ -+static void send_vc_msg(unsigned short type, -+ unsigned short param1, unsigned short param2) -+{ -+ unsigned short msg[] = { type, param1, param2 }; -+ VCHIQ_ELEMENT_T elem = { &msg, sizeof(msg) }; -+ VCHIQ_STATUS_T ret; -+ vchiq_use_service(cma_service); -+ ret = vchiq_queue_message(cma_service, &elem, 1); -+ vchiq_release_service(cma_service); -+ if (ret != VCHIQ_SUCCESS) -+ LOG_ERR("vchiq_queue_message returned %x", ret); -+} -+ -+static bool send_worker_msg(VCHIQ_HEADER_T * msg) -+{ -+ if (down_interruptible(&vc_cma_worker_queue_push_mutex)) -+ return false; -+ vchiu_queue_push(&cma_msg_queue, msg); -+ up(&vc_cma_worker_queue_push_mutex); -+ return true; -+} -+ -+static int vc_cma_alloc_chunks(int num_chunks, struct cma_msg *reply) -+{ -+ int i; -+ for (i = 0; i < num_chunks; i++) { -+ struct page *chunk; -+ unsigned int chunk_num; -+ uint8_t *chunk_addr; -+ size_t chunk_size = PAGES_PER_CHUNK << PAGE_SHIFT; -+ -+ chunk = dma_alloc_from_contiguous(&vc_cma_device.dev, -+ PAGES_PER_CHUNK, -+ VC_CMA_CHUNK_ORDER); -+ if (!chunk) -+ break; -+ -+ chunk_addr = page_address(chunk); -+ dmac_flush_range(chunk_addr, chunk_addr + chunk_size); -+ outer_inv_range(__pa(chunk_addr), __pa(chunk_addr) + -+ chunk_size); -+ -+ chunk_num = -+ (page_to_phys(chunk) - vc_cma_base) / VC_CMA_CHUNK_SIZE; -+ BUG_ON(((page_to_phys(chunk) - vc_cma_base) % -+ VC_CMA_CHUNK_SIZE) != 0); -+ if (chunk_num >= vc_cma_chunks) { -+ phys_addr_t _pa = vc_cma_base + vc_cma_size - 1; -+ LOG_ERR("%s: ===============================", -+ __func__); -+ LOG_ERR("%s: chunk phys %x, vc_cma %pa-%pa - " -+ "bad SPARSEMEM configuration?", -+ __func__, (unsigned int)page_to_phys(chunk), -+ &vc_cma_base, &_pa); -+ LOG_ERR("%s: dev->cma_area = %p", __func__, -+ (void*)0/*vc_cma_device.dev.cma_area*/); -+ LOG_ERR("%s: ===============================", -+ __func__); -+ break; -+ } -+ reply->params[i] = chunk_num; -+ vc_cma_chunks_used++; -+ } -+ -+ if (i < num_chunks) { -+ LOG_ERR("%s: dma_alloc_from_contiguous failed " -+ "for %x bytes (alloc %d of %d, %d free)", -+ __func__, VC_CMA_CHUNK_SIZE, i, -+ num_chunks, vc_cma_chunks - vc_cma_chunks_used); -+ num_chunks = i; -+ } -+ -+ LOG_DBG("CMA allocated %d chunks -> %d used", -+ num_chunks, vc_cma_chunks_used); -+ reply->type = VC_CMA_MSG_ALLOCATED; -+ -+ { -+ VCHIQ_ELEMENT_T elem = { -+ reply, -+ offsetof(struct cma_msg, params[0]) + -+ num_chunks * sizeof(reply->params[0]) -+ }; -+ VCHIQ_STATUS_T ret; -+ vchiq_use_service(cma_service); -+ ret = vchiq_queue_message(cma_service, &elem, 1); -+ vchiq_release_service(cma_service); -+ if (ret != VCHIQ_SUCCESS) -+ LOG_ERR("vchiq_queue_message return " "%x", ret); -+ } -+ -+ return num_chunks; -+} -+ -+static int cma_worker_proc(void *param) -+{ -+ static struct cma_msg reply; -+ (void)param; -+ -+ while (1) { -+ VCHIQ_HEADER_T *msg; -+ static struct cma_msg msg_copy; -+ struct cma_msg *cma_msg = &msg_copy; -+ int type, msg_size; -+ -+ msg = vchiu_queue_pop(&cma_msg_queue); -+ if ((unsigned int)msg >= VC_CMA_MSG_MAX) { -+ msg_size = msg->size; -+ memcpy(&msg_copy, msg->data, msg_size); -+ type = cma_msg->type; -+ vchiq_release_message(cma_service, msg); -+ } else { -+ msg_size = 0; -+ type = (int)msg; -+ if (type == VC_CMA_MSG_QUIT) -+ break; -+ else if (type == VC_CMA_MSG_UPDATE_RESERVE) { -+ msg = NULL; -+ cma_msg = NULL; -+ } else { -+ BUG(); -+ continue; -+ } -+ } -+ -+ switch (type) { -+ case VC_CMA_MSG_ALLOC:{ -+ int num_chunks, free_chunks; -+ num_chunks = cma_msg->params[0]; -+ free_chunks = -+ vc_cma_chunks - vc_cma_chunks_used; -+ LOG_DBG("CMA_MSG_ALLOC(%d chunks)", num_chunks); -+ if (num_chunks > VC_CMA_MAX_PARAMS_PER_MSG) { -+ LOG_ERR -+ ("CMA_MSG_ALLOC - chunk count (%d) " -+ "exceeds VC_CMA_MAX_PARAMS_PER_MSG (%d)", -+ num_chunks, -+ VC_CMA_MAX_PARAMS_PER_MSG); -+ num_chunks = VC_CMA_MAX_PARAMS_PER_MSG; -+ } -+ -+ if (num_chunks > free_chunks) { -+ LOG_ERR -+ ("CMA_MSG_ALLOC - chunk count (%d) " -+ "exceeds free chunks (%d)", -+ num_chunks, free_chunks); -+ num_chunks = free_chunks; -+ } -+ -+ vc_cma_alloc_chunks(num_chunks, &reply); -+ } -+ break; -+ -+ case VC_CMA_MSG_FREE:{ -+ int chunk_count = -+ (msg_size - -+ offsetof(struct cma_msg, -+ params)) / -+ sizeof(cma_msg->params[0]); -+ int i; -+ BUG_ON(chunk_count <= 0); -+ -+ LOG_DBG("CMA_MSG_FREE(%d chunks - %x, ...)", -+ chunk_count, cma_msg->params[0]); -+ for (i = 0; i < chunk_count; i++) { -+ int chunk_num = cma_msg->params[i]; -+ struct page *page = vc_cma_base_page + -+ chunk_num * PAGES_PER_CHUNK; -+ if (chunk_num >= vc_cma_chunks) { -+ LOG_ERR -+ ("CMA_MSG_FREE - chunk %d of %d" -+ " (value %x) exceeds maximum " -+ "(%x)", i, chunk_count, -+ chunk_num, -+ vc_cma_chunks - 1); -+ break; -+ } -+ -+ if (!dma_release_from_contiguous -+ (&vc_cma_device.dev, page, -+ PAGES_PER_CHUNK)) { -+ phys_addr_t _pa = page_to_phys(page); -+ LOG_ERR -+ ("CMA_MSG_FREE - failed to " -+ "release chunk %d (phys %pa, " -+ "page %x)", chunk_num, -+ &_pa, -+ (unsigned int)page); -+ } -+ vc_cma_chunks_used--; -+ } -+ LOG_DBG("CMA released %d chunks -> %d used", -+ i, vc_cma_chunks_used); -+ } -+ break; -+ -+ case VC_CMA_MSG_UPDATE_RESERVE:{ -+ int chunks_needed = -+ ((vc_cma_reserve_total + VC_CMA_CHUNK_SIZE - -+ 1) -+ / VC_CMA_CHUNK_SIZE) - -+ vc_cma_chunks_reserved; -+ -+ LOG_DBG -+ ("CMA_MSG_UPDATE_RESERVE(%d chunks needed)", -+ chunks_needed); -+ -+ /* Cap the reservations to what is available */ -+ if (chunks_needed > 0) { -+ if (chunks_needed > -+ (vc_cma_chunks - -+ vc_cma_chunks_used)) -+ chunks_needed = -+ (vc_cma_chunks - -+ vc_cma_chunks_used); -+ -+ chunks_needed = -+ vc_cma_alloc_chunks(chunks_needed, -+ &reply); -+ } -+ -+ LOG_DBG -+ ("CMA_MSG_UPDATE_RESERVE(%d chunks allocated)", -+ chunks_needed); -+ vc_cma_chunks_reserved += chunks_needed; -+ } -+ break; -+ -+ default: -+ LOG_ERR("unexpected msg type %d", type); -+ break; -+ } -+ } -+ -+ LOG_DBG("quitting..."); -+ return 0; -+} -+ -+/**************************************************************************** -+* -+* vc_cma_connected_init -+* -+* This function is called once the videocore has been connected. -+* -+***************************************************************************/ -+ -+static void vc_cma_connected_init(void) -+{ -+ VCHIQ_SERVICE_PARAMS_T service_params; -+ -+ LOG_DBG("vc_cma_connected_init"); -+ -+ if (!vchiu_queue_init(&cma_msg_queue, 16)) { -+ LOG_ERR("could not create CMA msg queue"); -+ goto fail_queue; -+ } -+ -+ if (vchiq_initialise(&cma_instance) != VCHIQ_SUCCESS) -+ goto fail_vchiq_init; -+ -+ vchiq_connect(cma_instance); -+ -+ service_params.fourcc = VC_CMA_FOURCC; -+ service_params.callback = cma_service_callback; -+ service_params.userdata = NULL; -+ service_params.version = VC_CMA_VERSION; -+ service_params.version_min = VC_CMA_VERSION; -+ -+ if (vchiq_open_service(cma_instance, &service_params, -+ &cma_service) != VCHIQ_SUCCESS) { -+ LOG_ERR("failed to open service - already in use?"); -+ goto fail_vchiq_open; -+ } -+ -+ vchiq_release_service(cma_service); -+ -+ cma_worker = kthread_create(cma_worker_proc, NULL, "cma_worker"); -+ if (!cma_worker) { -+ LOG_ERR("could not create CMA worker thread"); -+ goto fail_worker; -+ } -+ set_user_nice(cma_worker, -20); -+ wake_up_process(cma_worker); -+ -+ return; -+ -+fail_worker: -+ vchiq_close_service(cma_service); -+fail_vchiq_open: -+ vchiq_shutdown(cma_instance); -+fail_vchiq_init: -+ vchiu_queue_delete(&cma_msg_queue); -+fail_queue: -+ return; -+} -+ -+void -+loud_error_header(void) -+{ -+ if (in_loud_error) -+ return; -+ -+ LOG_ERR("============================================================" -+ "================"); -+ LOG_ERR("============================================================" -+ "================"); -+ LOG_ERR("====="); -+ -+ in_loud_error = 1; -+} -+ -+void -+loud_error_footer(void) -+{ -+ if (!in_loud_error) -+ return; -+ -+ LOG_ERR("====="); -+ LOG_ERR("============================================================" -+ "================"); -+ LOG_ERR("============================================================" -+ "================"); -+ -+ in_loud_error = 0; -+} -+ -+#if 1 -+static int check_cma_config(void) { return 1; } -+#else -+static int -+read_vc_debug_var(VC_MEM_ACCESS_HANDLE_T handle, -+ const char *symbol, -+ void *buf, size_t bufsize) -+{ -+ VC_MEM_ADDR_T vcMemAddr; -+ size_t vcMemSize; -+ uint8_t *mapAddr; -+ off_t vcMapAddr; -+ -+ if (!LookupVideoCoreSymbol(handle, symbol, -+ &vcMemAddr, -+ &vcMemSize)) { -+ loud_error_header(); -+ loud_error( -+ "failed to find VC symbol \"%s\".", -+ symbol); -+ loud_error_footer(); -+ return 0; -+ } -+ -+ if (vcMemSize != bufsize) { -+ loud_error_header(); -+ loud_error( -+ "VC symbol \"%s\" is the wrong size.", -+ symbol); -+ loud_error_footer(); -+ return 0; -+ } -+ -+ vcMapAddr = (off_t)vcMemAddr & VC_MEM_TO_ARM_ADDR_MASK; -+ vcMapAddr += mm_vc_mem_phys_addr; -+ mapAddr = ioremap_nocache(vcMapAddr, vcMemSize); -+ if (mapAddr == 0) { -+ loud_error_header(); -+ loud_error( -+ "failed to ioremap \"%s\" @ 0x%x " -+ "(phys: 0x%x, size: %u).", -+ symbol, -+ (unsigned int)vcMapAddr, -+ (unsigned int)vcMemAddr, -+ (unsigned int)vcMemSize); -+ loud_error_footer(); -+ return 0; -+ } -+ -+ memcpy(buf, mapAddr, bufsize); -+ iounmap(mapAddr); -+ -+ return 1; -+} -+ -+ -+static int -+check_cma_config(void) -+{ -+ VC_MEM_ACCESS_HANDLE_T mem_hndl; -+ VC_MEM_ADDR_T mempool_start; -+ VC_MEM_ADDR_T mempool_end; -+ VC_MEM_ADDR_T mempool_offline_start; -+ VC_MEM_ADDR_T mempool_offline_end; -+ VC_MEM_ADDR_T cam_alloc_base; -+ VC_MEM_ADDR_T cam_alloc_size; -+ VC_MEM_ADDR_T cam_alloc_end; -+ int success = 0; -+ -+ if (OpenVideoCoreMemory(&mem_hndl) != 0) -+ goto out; -+ -+ /* Read the relevant VideoCore variables */ -+ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_START", -+ &mempool_start, -+ sizeof(mempool_start))) -+ goto close; -+ -+ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_END", -+ &mempool_end, -+ sizeof(mempool_end))) -+ goto close; -+ -+ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_OFFLINE_START", -+ &mempool_offline_start, -+ sizeof(mempool_offline_start))) -+ goto close; -+ -+ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_OFFLINE_END", -+ &mempool_offline_end, -+ sizeof(mempool_offline_end))) -+ goto close; -+ -+ if (!read_vc_debug_var(mem_hndl, "cam_alloc_base", -+ &cam_alloc_base, -+ sizeof(cam_alloc_base))) -+ goto close; -+ -+ if (!read_vc_debug_var(mem_hndl, "cam_alloc_size", -+ &cam_alloc_size, -+ sizeof(cam_alloc_size))) -+ goto close; -+ -+ cam_alloc_end = cam_alloc_base + cam_alloc_size; -+ -+ success = 1; -+ -+ /* Now the sanity checks */ -+ if (!mempool_offline_start) -+ mempool_offline_start = mempool_start; -+ if (!mempool_offline_end) -+ mempool_offline_end = mempool_end; -+ -+ if (VCADDR_TO_PHYSADDR(mempool_offline_start) != vc_cma_base) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_OFFLINE_START(%x -> %lx) doesn't match " -+ "vc_cma_base(%x)", -+ mempool_offline_start, -+ VCADDR_TO_PHYSADDR(mempool_offline_start), -+ vc_cma_base); -+ success = 0; -+ } -+ -+ if (VCADDR_TO_PHYSADDR(mempool_offline_end) != -+ (vc_cma_base + vc_cma_size)) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_OFFLINE_END(%x -> %lx) doesn't match " -+ "vc_cma_base(%x) + vc_cma_size(%x) = %x", -+ mempool_offline_start, -+ VCADDR_TO_PHYSADDR(mempool_offline_end), -+ vc_cma_base, vc_cma_size, vc_cma_base + vc_cma_size); -+ success = 0; -+ } -+ -+ if (mempool_end < mempool_start) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_END(%x) must not be before " -+ "__MEMPOOL_START(%x)", -+ mempool_end, -+ mempool_start); -+ success = 0; -+ } -+ -+ if (mempool_offline_end < mempool_offline_start) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_OFFLINE_END(%x) must not be before " -+ "__MEMPOOL_OFFLINE_START(%x)", -+ mempool_offline_end, -+ mempool_offline_start); -+ success = 0; -+ } -+ -+ if (mempool_offline_start < mempool_start) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_OFFLINE_START(%x) must not be before " -+ "__MEMPOOL_START(%x)", -+ mempool_offline_start, -+ mempool_start); -+ success = 0; -+ } -+ -+ if (mempool_offline_end > mempool_end) { -+ loud_error_header(); -+ loud_error( -+ "__MEMPOOL_OFFLINE_END(%x) must not be after " -+ "__MEMPOOL_END(%x)", -+ mempool_offline_end, -+ mempool_end); -+ success = 0; -+ } -+ -+ if ((cam_alloc_base < mempool_end) && -+ (cam_alloc_end > mempool_start)) { -+ loud_error_header(); -+ loud_error( -+ "cam_alloc pool(%x-%x) overlaps " -+ "mempool(%x-%x)", -+ cam_alloc_base, cam_alloc_end, -+ mempool_start, mempool_end); -+ success = 0; -+ } -+ -+ loud_error_footer(); -+ -+close: -+ CloseVideoCoreMemory(mem_hndl); -+ -+out: -+ return success; -+} -+#endif -+ -+static int vc_cma_init(void) -+{ -+ int rc = -EFAULT; -+ struct device *dev; -+ -+ if (!check_cma_config()) -+ goto out_release; -+ -+ LOG_INFO("vc-cma: Videocore CMA driver"); -+ LOG_INFO("vc-cma: vc_cma_base = %pa", &vc_cma_base); -+ LOG_INFO("vc-cma: vc_cma_size = 0x%08x (%u MiB)", -+ vc_cma_size, vc_cma_size / (1024 * 1024)); -+ LOG_INFO("vc-cma: vc_cma_initial = 0x%08x (%u MiB)", -+ vc_cma_initial, vc_cma_initial / (1024 * 1024)); -+ -+ vc_cma_base_page = phys_to_page(vc_cma_base); -+ -+ if (vc_cma_chunks) { -+ int chunks_needed = vc_cma_initial / VC_CMA_CHUNK_SIZE; -+ -+ for (vc_cma_chunks_used = 0; -+ vc_cma_chunks_used < chunks_needed; vc_cma_chunks_used++) { -+ struct page *chunk; -+ chunk = dma_alloc_from_contiguous(&vc_cma_device.dev, -+ PAGES_PER_CHUNK, -+ VC_CMA_CHUNK_ORDER); -+ if (!chunk) -+ break; -+ BUG_ON(((page_to_phys(chunk) - vc_cma_base) % -+ VC_CMA_CHUNK_SIZE) != 0); -+ } -+ if (vc_cma_chunks_used != chunks_needed) { -+ LOG_ERR("%s: dma_alloc_from_contiguous failed (%d " -+ "bytes, allocation %d of %d)", -+ __func__, VC_CMA_CHUNK_SIZE, -+ vc_cma_chunks_used, chunks_needed); -+ goto out_release; -+ } -+ -+ vchiq_add_connected_callback(vc_cma_connected_init); -+ } -+ -+ rc = alloc_chrdev_region(&vc_cma_devnum, 0, 1, DRIVER_NAME); -+ if (rc < 0) { -+ LOG_ERR("%s: alloc_chrdev_region failed (rc=%d)", __func__, rc); -+ goto out_release; -+ } -+ -+ cdev_init(&vc_cma_cdev, &vc_cma_fops); -+ rc = cdev_add(&vc_cma_cdev, vc_cma_devnum, 1); -+ if (rc != 0) { -+ LOG_ERR("%s: cdev_add failed (rc=%d)", __func__, rc); -+ goto out_unregister; -+ } -+ -+ vc_cma_class = class_create(THIS_MODULE, DRIVER_NAME); -+ if (IS_ERR(vc_cma_class)) { -+ rc = PTR_ERR(vc_cma_class); -+ LOG_ERR("%s: class_create failed (rc=%d)", __func__, rc); -+ goto out_cdev_del; -+ } -+ -+ dev = device_create(vc_cma_class, NULL, vc_cma_devnum, NULL, -+ DRIVER_NAME); -+ if (IS_ERR(dev)) { -+ rc = PTR_ERR(dev); -+ LOG_ERR("%s: device_create failed (rc=%d)", __func__, rc); -+ goto out_class_destroy; -+ } -+ -+ vc_cma_proc_entry = proc_create(DRIVER_NAME, 0444, NULL, &vc_cma_proc_fops); -+ if (vc_cma_proc_entry == NULL) { -+ rc = -EFAULT; -+ LOG_ERR("%s: proc_create failed", __func__); -+ goto out_device_destroy; -+ } -+ -+ vc_cma_inited = 1; -+ return 0; -+ -+out_device_destroy: -+ device_destroy(vc_cma_class, vc_cma_devnum); -+ -+out_class_destroy: -+ class_destroy(vc_cma_class); -+ vc_cma_class = NULL; -+ -+out_cdev_del: -+ cdev_del(&vc_cma_cdev); -+ -+out_unregister: -+ unregister_chrdev_region(vc_cma_devnum, 1); -+ -+out_release: -+ /* It is tempting to try to clean up by calling -+ dma_release_from_contiguous for all allocated chunks, but it isn't -+ a very safe thing to do. If vc_cma_initial is non-zero it is because -+ VideoCore is already using that memory, so giving it back to Linux -+ is likely to be fatal. -+ */ -+ return -1; -+} -+ -+/**************************************************************************** -+* -+* vc_cma_exit -+* -+***************************************************************************/ -+ -+static void __exit vc_cma_exit(void) -+{ -+ LOG_DBG("%s: called", __func__); -+ -+ if (vc_cma_inited) { -+ remove_proc_entry(DRIVER_NAME, NULL); -+ device_destroy(vc_cma_class, vc_cma_devnum); -+ class_destroy(vc_cma_class); -+ cdev_del(&vc_cma_cdev); -+ unregister_chrdev_region(vc_cma_devnum, 1); -+ } -+} -+ -+module_init(vc_cma_init); -+module_exit(vc_cma_exit); -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Broadcom Corporation"); ---- /dev/null -+++ b/include/linux/broadcom/vc_cma.h -@@ -0,0 +1,36 @@ -+/***************************************************************************** -+* Copyright 2012 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#if !defined( VC_CMA_H ) -+#define VC_CMA_H -+ -+#include -+ -+#define VC_CMA_IOC_MAGIC 0xc5 -+ -+#define VC_CMA_IOC_RESERVE _IO(VC_CMA_IOC_MAGIC, 0) -+ -+#ifdef __KERNEL__ -+ -+#ifdef CONFIG_BCM_VC_CMA -+void vc_cma_early_init(void); -+void vc_cma_reserve(void); -+#else -+static inline void vc_cma_early_init(void) { } -+static inline void vc_cma_reserve(void) { } -+#endif -+ -+#endif -+ -+#endif /* VC_CMA_H */ diff --git a/target/linux/brcm2708/patches-4.9/950-0038-bcm2708-alsa-sound-driver.patch b/target/linux/brcm2708/patches-4.9/950-0038-bcm2708-alsa-sound-driver.patch deleted file mode 100644 index 58b45dec6..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0038-bcm2708-alsa-sound-driver.patch +++ /dev/null @@ -1,2715 +0,0 @@ -From 41a90e24c272c84fb8c6d23ac451f0c725dcded6 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 26 Mar 2012 22:15:50 +0100 -Subject: [PATCH] bcm2708: alsa sound driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: popcornmix - -alsa: add mmap support and some cleanups to bcm2835 ALSA driver - -snd-bcm2835: Add support for spdif/hdmi passthrough - -This adds a dedicated subdevice which can be used for passthrough of non-audio -formats (ie encoded a52) through the hdmi audio link. In addition to this -driver extension an appropriate card config is required to make alsa-lib -support the AES parameters for this device. - -snd-bcm2708: Add mutex, improve logging - -Fix for ALSA driver crash - -Avoids an issue when closing and opening vchiq where a message can arrive before service handle has been written - -alsa: reduce severity of expected warning message - -snd-bcm2708: Fix dmesg spam for non-error case - -alsa: Ensure mutexes are released through error paths - -alsa: Make interrupted close paths quieter - -BCM270x: Add onboard sound device to Device Tree - -Add Device Tree support to alsa driver. -Add device to Device Tree. -Don't add platform devices when booting in DT mode. - -Signed-off-by: Noralf Trønnes - -bcm2835: access controls under the audio mutex - -I don't think the ALSA framework provides any kind of automatic -synchronization within the control callbacks. We most likely need -to ensure this manually, so add locking around all access to shared -mutable data. In particular, bcm2835_audio_set_ctls() should -probably always be called under our own audio lock. - -snd-bcm2835: Don't allow responses from VC to be interrupted by user signals - -There should always be a response, and retry after a signal interruption is not handled, so don't report -we are interruptible. - -See: https://github.com/raspberrypi/linux/issues/1560 - -snd-bcm2835: Use bcm2835_hw params in preallocate ---- - sound/arm/Kconfig | 7 + - sound/arm/Makefile | 5 + - sound/arm/bcm2835-ctl.c | 350 +++++++++++++++ - sound/arm/bcm2835-pcm.c | 563 +++++++++++++++++++++++ - sound/arm/bcm2835-vchiq.c | 889 +++++++++++++++++++++++++++++++++++++ - sound/arm/bcm2835.c | 511 +++++++++++++++++++++ - sound/arm/bcm2835.h | 167 +++++++ - sound/arm/vc_vchi_audioserv_defs.h | 116 +++++ - 8 files changed, 2608 insertions(+) - create mode 100755 sound/arm/bcm2835-ctl.c - create mode 100755 sound/arm/bcm2835-pcm.c - create mode 100755 sound/arm/bcm2835-vchiq.c - create mode 100644 sound/arm/bcm2835.c - create mode 100755 sound/arm/bcm2835.h - create mode 100644 sound/arm/vc_vchi_audioserv_defs.h - ---- a/sound/arm/Kconfig -+++ b/sound/arm/Kconfig -@@ -32,6 +32,13 @@ config SND_PXA2XX_AC97 - Say Y or M if you want to support any AC97 codec attached to - the PXA2xx AC97 interface. - -+config SND_BCM2835 -+ tristate "BCM2835 ALSA driver" -+ depends on ARCH_BCM2835 && BCM2708_VCHIQ && SND -+ select SND_PCM -+ help -+ Say Y or M if you want to support BCM2835 Alsa pcm card driver -+ - endif # SND_ARM - - config SND_PXA2XX_LIB ---- a/sound/arm/Makefile -+++ b/sound/arm/Makefile -@@ -14,3 +14,8 @@ snd-pxa2xx-lib-$(CONFIG_SND_PXA2XX_LIB_A - - obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o - snd-pxa2xx-ac97-objs := pxa2xx-ac97.o -+ -+obj-$(CONFIG_SND_BCM2835) += snd-bcm2835.o -+snd-bcm2835-objs := bcm2835.o bcm2835-ctl.o bcm2835-pcm.o bcm2835-vchiq.o -+ -+ccflags-y += -Idrivers/staging/vc04_services -Idrivers/staging/vc04_services/interface/vcos/linuxkernel -D__VCCOREVER__=0x04000000 ---- /dev/null -+++ b/sound/arm/bcm2835-ctl.c -@@ -0,0 +1,350 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "bcm2835.h" -+ -+/* volume maximum and minimum in terms of 0.01dB */ -+#define CTRL_VOL_MAX 400 -+#define CTRL_VOL_MIN -10239 /* originally -10240 */ -+ -+ -+static int snd_bcm2835_ctl_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ audio_info(" ... IN\n"); -+ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = CTRL_VOL_MIN; -+ uinfo->value.integer.max = CTRL_VOL_MAX; /* 2303 */ -+ } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = AUDIO_DEST_MAX-1; -+ } -+ audio_info(" ... OUT\n"); -+ return 0; -+} -+ -+/* toggles mute on or off depending on the value of nmute, and returns -+ * 1 if the mute value was changed, otherwise 0 -+ */ -+static int toggle_mute(struct bcm2835_chip *chip, int nmute) -+{ -+ /* if settings are ok, just return 0 */ -+ if(chip->mute == nmute) -+ return 0; -+ -+ /* if the sound is muted then we need to unmute */ -+ if(chip->mute == CTRL_VOL_MUTE) -+ { -+ chip->volume = chip->old_volume; /* copy the old volume back */ -+ audio_info("Unmuting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); -+ } -+ else /* otherwise we mute */ -+ { -+ chip->old_volume = chip->volume; -+ chip->volume = 26214; /* set volume to minimum level AKA mute */ -+ audio_info("Muting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); -+ } -+ -+ chip->mute = nmute; -+ return 1; -+} -+ -+static int snd_bcm2835_ctl_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ BUG_ON(!chip && !(chip->avail_substreams & AVAIL_SUBSTREAMS_MASK)); -+ -+ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) -+ ucontrol->value.integer.value[0] = chip2alsa(chip->volume); -+ else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) -+ ucontrol->value.integer.value[0] = chip->mute; -+ else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) -+ ucontrol->value.integer.value[0] = chip->dest; -+ -+ mutex_unlock(&chip->audio_mutex); -+ return 0; -+} -+ -+static int snd_bcm2835_ctl_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ int changed = 0; -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { -+ audio_info("Volume change attempted.. volume = %d new_volume = %d\n", chip->volume, (int)ucontrol->value.integer.value[0]); -+ if (chip->mute == CTRL_VOL_MUTE) { -+ /* changed = toggle_mute(chip, CTRL_VOL_UNMUTE); */ -+ changed = 1; /* should return 0 to signify no change but the mixer takes this as the opposite sign (no idea why) */ -+ goto unlock; -+ } -+ if (changed -+ || (ucontrol->value.integer.value[0] != chip2alsa(chip->volume))) { -+ -+ chip->volume = alsa2chip(ucontrol->value.integer.value[0]); -+ changed = 1; -+ } -+ -+ } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { -+ /* Now implemented */ -+ audio_info(" Mute attempted\n"); -+ changed = toggle_mute(chip, ucontrol->value.integer.value[0]); -+ -+ } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { -+ if (ucontrol->value.integer.value[0] != chip->dest) { -+ chip->dest = ucontrol->value.integer.value[0]; -+ changed = 1; -+ } -+ } -+ -+ if (changed) { -+ if (bcm2835_audio_set_ctls(chip)) -+ printk(KERN_ERR "Failed to set ALSA controls..\n"); -+ } -+ -+unlock: -+ mutex_unlock(&chip->audio_mutex); -+ return changed; -+} -+ -+static DECLARE_TLV_DB_SCALE(snd_bcm2835_db_scale, CTRL_VOL_MIN, 1, 1); -+ -+static struct snd_kcontrol_new snd_bcm2835_ctl[] = { -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PCM Playback Volume", -+ .index = 0, -+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, -+ .private_value = PCM_PLAYBACK_VOLUME, -+ .info = snd_bcm2835_ctl_info, -+ .get = snd_bcm2835_ctl_get, -+ .put = snd_bcm2835_ctl_put, -+ .count = 1, -+ .tlv = {.p = snd_bcm2835_db_scale} -+ }, -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PCM Playback Switch", -+ .index = 0, -+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, -+ .private_value = PCM_PLAYBACK_MUTE, -+ .info = snd_bcm2835_ctl_info, -+ .get = snd_bcm2835_ctl_get, -+ .put = snd_bcm2835_ctl_put, -+ .count = 1, -+ }, -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PCM Playback Route", -+ .index = 0, -+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, -+ .private_value = PCM_PLAYBACK_DEVICE, -+ .info = snd_bcm2835_ctl_info, -+ .get = snd_bcm2835_ctl_get, -+ .put = snd_bcm2835_ctl_put, -+ .count = 1, -+ }, -+}; -+ -+static int snd_bcm2835_spdif_default_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; -+ uinfo->count = 1; -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_default_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ int i; -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ for (i = 0; i < 4; i++) -+ ucontrol->value.iec958.status[i] = -+ (chip->spdif_status >> (i * 8)) && 0xff; -+ -+ mutex_unlock(&chip->audio_mutex); -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_default_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ unsigned int val = 0; -+ int i, change; -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ for (i = 0; i < 4; i++) -+ val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); -+ -+ change = val != chip->spdif_status; -+ chip->spdif_status = val; -+ -+ mutex_unlock(&chip->audio_mutex); -+ return change; -+} -+ -+static int snd_bcm2835_spdif_mask_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; -+ uinfo->count = 1; -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_mask_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ /* bcm2835 supports only consumer mode and sets all other format flags -+ * automatically. So the only thing left is signalling non-audio -+ * content */ -+ ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO; -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_stream_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; -+ uinfo->count = 1; -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_stream_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ int i; -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ for (i = 0; i < 4; i++) -+ ucontrol->value.iec958.status[i] = -+ (chip->spdif_status >> (i * 8)) & 0xff; -+ -+ mutex_unlock(&chip->audio_mutex); -+ return 0; -+} -+ -+static int snd_bcm2835_spdif_stream_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); -+ unsigned int val = 0; -+ int i, change; -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ for (i = 0; i < 4; i++) -+ val |= (unsigned int)ucontrol->value.iec958.status[i] << (i * 8); -+ change = val != chip->spdif_status; -+ chip->spdif_status = val; -+ -+ mutex_unlock(&chip->audio_mutex); -+ return change; -+} -+ -+static struct snd_kcontrol_new snd_bcm2835_spdif[] = { -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), -+ .info = snd_bcm2835_spdif_default_info, -+ .get = snd_bcm2835_spdif_default_get, -+ .put = snd_bcm2835_spdif_default_put -+ }, -+ { -+ .access = SNDRV_CTL_ELEM_ACCESS_READ, -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), -+ .info = snd_bcm2835_spdif_mask_info, -+ .get = snd_bcm2835_spdif_mask_get, -+ }, -+ { -+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | -+ SNDRV_CTL_ELEM_ACCESS_INACTIVE, -+ .iface = SNDRV_CTL_ELEM_IFACE_PCM, -+ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), -+ .info = snd_bcm2835_spdif_stream_info, -+ .get = snd_bcm2835_spdif_stream_get, -+ .put = snd_bcm2835_spdif_stream_put, -+ }, -+}; -+ -+int snd_bcm2835_new_ctl(bcm2835_chip_t * chip) -+{ -+ int err; -+ unsigned int idx; -+ -+ strcpy(chip->card->mixername, "Broadcom Mixer"); -+ for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_ctl); idx++) { -+ err = -+ snd_ctl_add(chip->card, -+ snd_ctl_new1(&snd_bcm2835_ctl[idx], chip)); -+ if (err < 0) -+ return err; -+ } -+ for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_spdif); idx++) { -+ err = snd_ctl_add(chip->card, -+ snd_ctl_new1(&snd_bcm2835_spdif[idx], chip)); -+ if (err < 0) -+ return err; -+ } -+ return 0; -+} ---- /dev/null -+++ b/sound/arm/bcm2835-pcm.c -@@ -0,0 +1,563 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#include -+#include -+ -+#include -+ -+#include "bcm2835.h" -+ -+/* hardware definition */ -+static struct snd_pcm_hardware snd_bcm2835_playback_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | -+ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), -+ .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, -+ .rate_min = 8000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 2, -+ .buffer_bytes_max = 128 * 1024, -+ .period_bytes_min = 1 * 1024, -+ .period_bytes_max = 128 * 1024, -+ .periods_min = 1, -+ .periods_max = 128, -+}; -+ -+static struct snd_pcm_hardware snd_bcm2835_playback_spdif_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | -+ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_44100 | -+ SNDRV_PCM_RATE_48000, -+ .rate_min = 44100, -+ .rate_max = 48000, -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 128 * 1024, -+ .period_bytes_min = 1 * 1024, -+ .period_bytes_max = 128 * 1024, -+ .periods_min = 1, -+ .periods_max = 128, -+}; -+ -+static void snd_bcm2835_playback_free(struct snd_pcm_runtime *runtime) -+{ -+ audio_info("Freeing up alsa stream here ..\n"); -+ if (runtime->private_data) -+ kfree(runtime->private_data); -+ runtime->private_data = NULL; -+} -+ -+static irqreturn_t bcm2835_playback_fifo_irq(int irq, void *dev_id) -+{ -+ bcm2835_alsa_stream_t *alsa_stream = (bcm2835_alsa_stream_t *) dev_id; -+ uint32_t consumed = 0; -+ int new_period = 0; -+ -+ audio_info(" .. IN\n"); -+ -+ audio_info("alsa_stream=%p substream=%p\n", alsa_stream, -+ alsa_stream ? alsa_stream->substream : 0); -+ -+ if (alsa_stream->open) -+ consumed = bcm2835_audio_retrieve_buffers(alsa_stream); -+ -+ /* We get called only if playback was triggered, So, the number of buffers we retrieve in -+ * each iteration are the buffers that have been played out already -+ */ -+ -+ if (alsa_stream->period_size) { -+ if ((alsa_stream->pos / alsa_stream->period_size) != -+ ((alsa_stream->pos + consumed) / alsa_stream->period_size)) -+ new_period = 1; -+ } -+ audio_debug("updating pos cur: %d + %d max:%d period_bytes:%d, hw_ptr: %d new_period:%d\n", -+ alsa_stream->pos, -+ consumed, -+ alsa_stream->buffer_size, -+ (int)(alsa_stream->period_size*alsa_stream->substream->runtime->periods), -+ frames_to_bytes(alsa_stream->substream->runtime, alsa_stream->substream->runtime->status->hw_ptr), -+ new_period); -+ if (alsa_stream->buffer_size) { -+ alsa_stream->pos += consumed &~ (1<<30); -+ alsa_stream->pos %= alsa_stream->buffer_size; -+ } -+ -+ if (alsa_stream->substream) { -+ if (new_period) -+ snd_pcm_period_elapsed(alsa_stream->substream); -+ } else { -+ audio_warning(" unexpected NULL substream\n"); -+ } -+ audio_info(" .. OUT\n"); -+ -+ return IRQ_HANDLED; -+} -+ -+/* open callback */ -+static int snd_bcm2835_playback_open_generic( -+ struct snd_pcm_substream *substream, int spdif) -+{ -+ bcm2835_chip_t *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream; -+ int idx; -+ int err; -+ -+ audio_info(" .. IN (%d)\n", substream->number); -+ -+ if(mutex_lock_interruptible(&chip->audio_mutex)) -+ { -+ audio_error("Interrupted whilst waiting for lock\n"); -+ return -EINTR; -+ } -+ audio_info("Alsa open (%d)\n", substream->number); -+ idx = substream->number; -+ -+ if (spdif && chip->opened != 0) { -+ err = -EBUSY; -+ goto out; -+ } -+ else if (!spdif && (chip->opened & (1 << idx))) { -+ err = -EBUSY; -+ goto out; -+ } -+ if (idx > MAX_SUBSTREAMS) { -+ audio_error -+ ("substream(%d) device doesn't exist max(%d) substreams allowed\n", -+ idx, MAX_SUBSTREAMS); -+ err = -ENODEV; -+ goto out; -+ } -+ -+ /* Check if we are ready */ -+ if (!(chip->avail_substreams & (1 << idx))) { -+ /* We are not ready yet */ -+ audio_error("substream(%d) device is not ready yet\n", idx); -+ err = -EAGAIN; -+ goto out; -+ } -+ -+ alsa_stream = kzalloc(sizeof(bcm2835_alsa_stream_t), GFP_KERNEL); -+ if (alsa_stream == NULL) { -+ err = -ENOMEM; -+ goto out; -+ } -+ -+ /* Initialise alsa_stream */ -+ alsa_stream->chip = chip; -+ alsa_stream->substream = substream; -+ alsa_stream->idx = idx; -+ -+ sema_init(&alsa_stream->buffers_update_sem, 0); -+ sema_init(&alsa_stream->control_sem, 0); -+ spin_lock_init(&alsa_stream->lock); -+ -+ /* Enabled in start trigger, called on each "fifo irq" after that */ -+ alsa_stream->enable_fifo_irq = 0; -+ alsa_stream->fifo_irq_handler = bcm2835_playback_fifo_irq; -+ -+ err = bcm2835_audio_open(alsa_stream); -+ if (err != 0) { -+ kfree(alsa_stream); -+ goto out; -+ } -+ runtime->private_data = alsa_stream; -+ runtime->private_free = snd_bcm2835_playback_free; -+ if (spdif) { -+ runtime->hw = snd_bcm2835_playback_spdif_hw; -+ } else { -+ /* clear spdif status, as we are not in spdif mode */ -+ chip->spdif_status = 0; -+ runtime->hw = snd_bcm2835_playback_hw; -+ } -+ /* minimum 16 bytes alignment (for vchiq bulk transfers) */ -+ snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, -+ 16); -+ -+ chip->alsa_stream[idx] = alsa_stream; -+ -+ chip->opened |= (1 << idx); -+ alsa_stream->open = 1; -+ alsa_stream->draining = 1; -+ -+out: -+ mutex_unlock(&chip->audio_mutex); -+ -+ audio_info(" .. OUT =%d\n", err); -+ -+ return err; -+} -+ -+static int snd_bcm2835_playback_open(struct snd_pcm_substream *substream) -+{ -+ return snd_bcm2835_playback_open_generic(substream, 0); -+} -+ -+static int snd_bcm2835_playback_spdif_open(struct snd_pcm_substream *substream) -+{ -+ return snd_bcm2835_playback_open_generic(substream, 1); -+} -+ -+/* close callback */ -+static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) -+{ -+ /* the hardware-specific codes will be here */ -+ -+ bcm2835_chip_t *chip; -+ struct snd_pcm_runtime *runtime; -+ bcm2835_alsa_stream_t *alsa_stream; -+ -+ audio_info(" .. IN\n"); -+ -+ chip = snd_pcm_substream_chip(substream); -+ if(mutex_lock_interruptible(&chip->audio_mutex)) -+ { -+ audio_error("Interrupted whilst waiting for lock\n"); -+ return -EINTR; -+ } -+ runtime = substream->runtime; -+ alsa_stream = runtime->private_data; -+ -+ audio_info("Alsa close\n"); -+ -+ /* -+ * Call stop if it's still running. This happens when app -+ * is force killed and we don't get a stop trigger. -+ */ -+ if (alsa_stream->running) { -+ int err; -+ err = bcm2835_audio_stop(alsa_stream); -+ alsa_stream->running = 0; -+ if (err != 0) -+ audio_error(" Failed to STOP alsa device\n"); -+ } -+ -+ alsa_stream->period_size = 0; -+ alsa_stream->buffer_size = 0; -+ -+ if (alsa_stream->open) { -+ alsa_stream->open = 0; -+ bcm2835_audio_close(alsa_stream); -+ } -+ if (alsa_stream->chip) -+ alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; -+ /* -+ * Do not free up alsa_stream here, it will be freed up by -+ * runtime->private_free callback we registered in *_open above -+ */ -+ -+ chip->opened &= ~(1 << substream->number); -+ -+ mutex_unlock(&chip->audio_mutex); -+ audio_info(" .. OUT\n"); -+ -+ return 0; -+} -+ -+/* hw_params callback */ -+static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ int err; -+ -+ audio_info(" .. IN\n"); -+ -+ err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); -+ if (err < 0) { -+ audio_error -+ (" pcm_lib_malloc failed to allocated pages for buffers\n"); -+ return err; -+ } -+ -+ alsa_stream->channels = params_channels(params); -+ alsa_stream->params_rate = params_rate(params); -+ alsa_stream->pcm_format_width = snd_pcm_format_width(params_format (params)); -+ audio_info(" .. OUT\n"); -+ -+ return err; -+} -+ -+/* hw_free callback */ -+static int snd_bcm2835_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ audio_info(" .. IN\n"); -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+/* prepare callback */ -+static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ bcm2835_chip_t *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ int channels; -+ int err; -+ -+ audio_info(" .. IN\n"); -+ -+ if (mutex_lock_interruptible(&chip->audio_mutex)) -+ return -EINTR; -+ -+ /* notify the vchiq that it should enter spdif passthrough mode by -+ * setting channels=0 (see -+ * https://github.com/raspberrypi/linux/issues/528) */ -+ if (chip->spdif_status & IEC958_AES0_NONAUDIO) -+ channels = 0; -+ else -+ channels = alsa_stream->channels; -+ -+ err = bcm2835_audio_set_params(alsa_stream, channels, -+ alsa_stream->params_rate, -+ alsa_stream->pcm_format_width); -+ if (err < 0) { -+ audio_error(" error setting hw params\n"); -+ } -+ -+ bcm2835_audio_setup(alsa_stream); -+ -+ /* in preparation of the stream, set the controls (volume level) of the stream */ -+ bcm2835_audio_set_ctls(alsa_stream->chip); -+ -+ -+ memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); -+ -+ alsa_stream->pcm_indirect.hw_buffer_size = -+ alsa_stream->pcm_indirect.sw_buffer_size = -+ snd_pcm_lib_buffer_bytes(substream); -+ -+ alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); -+ alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); -+ alsa_stream->pos = 0; -+ -+ audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", -+ alsa_stream->buffer_size, alsa_stream->period_size, -+ alsa_stream->pos, runtime->frame_bits); -+ -+ mutex_unlock(&chip->audio_mutex); -+ audio_info(" .. OUT\n"); -+ return 0; -+} -+ -+static void snd_bcm2835_pcm_transfer(struct snd_pcm_substream *substream, -+ struct snd_pcm_indirect *rec, size_t bytes) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ void *src = (void *)(substream->runtime->dma_area + rec->sw_data); -+ int err; -+ -+ err = bcm2835_audio_write(alsa_stream, bytes, src); -+ if (err) -+ audio_error(" Failed to transfer to alsa device (%d)\n", err); -+ -+} -+ -+static int snd_bcm2835_pcm_ack(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ struct snd_pcm_indirect *pcm_indirect = &alsa_stream->pcm_indirect; -+ -+ pcm_indirect->hw_queue_size = runtime->hw.buffer_bytes_max; -+ snd_pcm_indirect_playback_transfer(substream, pcm_indirect, -+ snd_bcm2835_pcm_transfer); -+ return 0; -+} -+ -+/* trigger callback */ -+static int snd_bcm2835_pcm_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ int err = 0; -+ -+ audio_info(" .. IN\n"); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ audio_debug("bcm2835_AUDIO_TRIGGER_START running=%d\n", -+ alsa_stream->running); -+ if (!alsa_stream->running) { -+ err = bcm2835_audio_start(alsa_stream); -+ if (err == 0) { -+ alsa_stream->pcm_indirect.hw_io = -+ alsa_stream->pcm_indirect.hw_data = -+ bytes_to_frames(runtime, -+ alsa_stream->pos); -+ substream->ops->ack(substream); -+ alsa_stream->running = 1; -+ alsa_stream->draining = 1; -+ } else { -+ audio_error(" Failed to START alsa device (%d)\n", err); -+ } -+ } -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ audio_debug -+ ("bcm2835_AUDIO_TRIGGER_STOP running=%d draining=%d\n", -+ alsa_stream->running, runtime->status->state == SNDRV_PCM_STATE_DRAINING); -+ if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) { -+ audio_info("DRAINING\n"); -+ alsa_stream->draining = 1; -+ } else { -+ audio_info("DROPPING\n"); -+ alsa_stream->draining = 0; -+ } -+ if (alsa_stream->running) { -+ err = bcm2835_audio_stop(alsa_stream); -+ if (err != 0) -+ audio_error(" Failed to STOP alsa device (%d)\n", err); -+ alsa_stream->running = 0; -+ } -+ break; -+ default: -+ err = -EINVAL; -+ } -+ -+ audio_info(" .. OUT\n"); -+ return err; -+} -+ -+/* pointer callback */ -+static snd_pcm_uframes_t -+snd_bcm2835_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; -+ -+ audio_info(" .. IN\n"); -+ -+ audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, -+ frames_to_bytes(runtime, runtime->status->hw_ptr), -+ frames_to_bytes(runtime, runtime->control->appl_ptr), -+ alsa_stream->pos); -+ -+ audio_info(" .. OUT\n"); -+ return snd_pcm_indirect_playback_pointer(substream, -+ &alsa_stream->pcm_indirect, -+ alsa_stream->pos); -+} -+ -+static int snd_bcm2835_pcm_lib_ioctl(struct snd_pcm_substream *substream, -+ unsigned int cmd, void *arg) -+{ -+ int ret = snd_pcm_lib_ioctl(substream, cmd, arg); -+ audio_info(" .. substream=%p, cmd=%d, arg=%p (%x) ret=%d\n", substream, -+ cmd, arg, arg ? *(unsigned *)arg : 0, ret); -+ return ret; -+} -+ -+/* operators */ -+static struct snd_pcm_ops snd_bcm2835_playback_ops = { -+ .open = snd_bcm2835_playback_open, -+ .close = snd_bcm2835_playback_close, -+ .ioctl = snd_bcm2835_pcm_lib_ioctl, -+ .hw_params = snd_bcm2835_pcm_hw_params, -+ .hw_free = snd_bcm2835_pcm_hw_free, -+ .prepare = snd_bcm2835_pcm_prepare, -+ .trigger = snd_bcm2835_pcm_trigger, -+ .pointer = snd_bcm2835_pcm_pointer, -+ .ack = snd_bcm2835_pcm_ack, -+}; -+ -+static struct snd_pcm_ops snd_bcm2835_playback_spdif_ops = { -+ .open = snd_bcm2835_playback_spdif_open, -+ .close = snd_bcm2835_playback_close, -+ .ioctl = snd_bcm2835_pcm_lib_ioctl, -+ .hw_params = snd_bcm2835_pcm_hw_params, -+ .hw_free = snd_bcm2835_pcm_hw_free, -+ .prepare = snd_bcm2835_pcm_prepare, -+ .trigger = snd_bcm2835_pcm_trigger, -+ .pointer = snd_bcm2835_pcm_pointer, -+ .ack = snd_bcm2835_pcm_ack, -+}; -+ -+/* create a pcm device */ -+int snd_bcm2835_new_pcm(bcm2835_chip_t * chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ audio_info(" .. IN\n"); -+ mutex_init(&chip->audio_mutex); -+ if(mutex_lock_interruptible(&chip->audio_mutex)) -+ { -+ audio_error("Interrupted whilst waiting for lock\n"); -+ return -EINTR; -+ } -+ err = -+ snd_pcm_new(chip->card, "bcm2835 ALSA", 0, MAX_SUBSTREAMS, 0, &pcm); -+ if (err < 0) -+ goto out; -+ pcm->private_data = chip; -+ strcpy(pcm->name, "bcm2835 ALSA"); -+ chip->pcm = pcm; -+ chip->dest = AUDIO_DEST_AUTO; -+ chip->volume = alsa2chip(0); -+ chip->mute = CTRL_VOL_UNMUTE; /*disable mute on startup */ -+ /* set operators */ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &snd_bcm2835_playback_ops); -+ -+ /* pre-allocation of buffers */ -+ /* NOTE: this may fail */ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, -+ snd_dma_continuous_data (GFP_KERNEL), -+ snd_bcm2835_playback_hw.buffer_bytes_max, snd_bcm2835_playback_hw.buffer_bytes_max); -+ -+ -+out: -+ mutex_unlock(&chip->audio_mutex); -+ audio_info(" .. OUT\n"); -+ -+ return 0; -+} -+ -+int snd_bcm2835_new_spdif_pcm(bcm2835_chip_t * chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ audio_info(" .. IN\n"); -+ if(mutex_lock_interruptible(&chip->audio_mutex)) -+ { -+ audio_error("Interrupted whilst waiting for lock\n"); -+ return -EINTR; -+ } -+ err = snd_pcm_new(chip->card, "bcm2835 ALSA", 1, 1, 0, &pcm); -+ if (err < 0) -+ goto out; -+ -+ pcm->private_data = chip; -+ strcpy(pcm->name, "bcm2835 IEC958/HDMI"); -+ chip->pcm_spdif = pcm; -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &snd_bcm2835_playback_spdif_ops); -+ -+ /* pre-allocation of buffers */ -+ /* NOTE: this may fail */ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, -+ snd_dma_continuous_data (GFP_KERNEL), -+ snd_bcm2835_playback_spdif_hw.buffer_bytes_max, snd_bcm2835_playback_spdif_hw.buffer_bytes_max); -+out: -+ mutex_unlock(&chip->audio_mutex); -+ audio_info(" .. OUT\n"); -+ -+ return 0; -+} ---- /dev/null -+++ b/sound/arm/bcm2835-vchiq.c -@@ -0,0 +1,889 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "bcm2835.h" -+ -+/* ---- Include Files -------------------------------------------------------- */ -+ -+#include "interface/vchi/vchi.h" -+#include "vc_vchi_audioserv_defs.h" -+ -+/* ---- Private Constants and Types ------------------------------------------ */ -+ -+#define BCM2835_AUDIO_STOP 0 -+#define BCM2835_AUDIO_START 1 -+#define BCM2835_AUDIO_WRITE 2 -+ -+/* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ -+#ifdef AUDIO_DEBUG_ENABLE -+ #define LOG_ERR( fmt, arg... ) pr_err( "%s:%d " fmt, __func__, __LINE__, ##arg) -+ #define LOG_WARN( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) -+ #define LOG_INFO( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) -+ #define LOG_DBG( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) -+#else -+ #define LOG_ERR( fmt, arg... ) pr_err( "%s:%d " fmt, __func__, __LINE__, ##arg) -+ #define LOG_WARN( fmt, arg... ) -+ #define LOG_INFO( fmt, arg... ) -+ #define LOG_DBG( fmt, arg... ) -+#endif -+ -+typedef struct opaque_AUDIO_INSTANCE_T { -+ uint32_t num_connections; -+ VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; -+ struct completion msg_avail_comp; -+ struct mutex vchi_mutex; -+ bcm2835_alsa_stream_t *alsa_stream; -+ int32_t result; -+ short peer_version; -+} AUDIO_INSTANCE_T; -+ -+bool force_bulk = false; -+ -+/* ---- Private Variables ---------------------------------------------------- */ -+ -+/* ---- Private Function Prototypes ------------------------------------------ */ -+ -+/* ---- Private Functions ---------------------------------------------------- */ -+ -+static int bcm2835_audio_stop_worker(bcm2835_alsa_stream_t * alsa_stream); -+static int bcm2835_audio_start_worker(bcm2835_alsa_stream_t * alsa_stream); -+static int bcm2835_audio_write_worker(bcm2835_alsa_stream_t *alsa_stream, -+ uint32_t count, void *src); -+ -+typedef struct { -+ struct work_struct my_work; -+ bcm2835_alsa_stream_t *alsa_stream; -+ int cmd; -+ void *src; -+ uint32_t count; -+} my_work_t; -+ -+static void my_wq_function(struct work_struct *work) -+{ -+ my_work_t *w = (my_work_t *) work; -+ int ret = -9; -+ LOG_DBG(" .. IN %p:%d\n", w->alsa_stream, w->cmd); -+ switch (w->cmd) { -+ case BCM2835_AUDIO_START: -+ ret = bcm2835_audio_start_worker(w->alsa_stream); -+ break; -+ case BCM2835_AUDIO_STOP: -+ ret = bcm2835_audio_stop_worker(w->alsa_stream); -+ break; -+ case BCM2835_AUDIO_WRITE: -+ ret = bcm2835_audio_write_worker(w->alsa_stream, w->count, -+ w->src); -+ break; -+ default: -+ LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->cmd); -+ break; -+ } -+ kfree((void *)work); -+ LOG_DBG(" .. OUT %d\n", ret); -+} -+ -+int bcm2835_audio_start(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ int ret = -1; -+ LOG_DBG(" .. IN\n"); -+ if (alsa_stream->my_wq) { -+ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); -+ /*--- Queue some work (item 1) ---*/ -+ if (work) { -+ INIT_WORK((struct work_struct *)work, my_wq_function); -+ work->alsa_stream = alsa_stream; -+ work->cmd = BCM2835_AUDIO_START; -+ if (queue_work -+ (alsa_stream->my_wq, (struct work_struct *)work)) -+ ret = 0; -+ } else -+ LOG_ERR(" .. Error: NULL work kmalloc\n"); -+ } -+ LOG_DBG(" .. OUT %d\n", ret); -+ return ret; -+} -+ -+int bcm2835_audio_stop(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ int ret = -1; -+ LOG_DBG(" .. IN\n"); -+ if (alsa_stream->my_wq) { -+ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); -+ /*--- Queue some work (item 1) ---*/ -+ if (work) { -+ INIT_WORK((struct work_struct *)work, my_wq_function); -+ work->alsa_stream = alsa_stream; -+ work->cmd = BCM2835_AUDIO_STOP; -+ if (queue_work -+ (alsa_stream->my_wq, (struct work_struct *)work)) -+ ret = 0; -+ } else -+ LOG_ERR(" .. Error: NULL work kmalloc\n"); -+ } -+ LOG_DBG(" .. OUT %d\n", ret); -+ return ret; -+} -+ -+int bcm2835_audio_write(bcm2835_alsa_stream_t *alsa_stream, -+ uint32_t count, void *src) -+{ -+ int ret = -1; -+ LOG_DBG(" .. IN\n"); -+ if (alsa_stream->my_wq) { -+ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); -+ /*--- Queue some work (item 1) ---*/ -+ if (work) { -+ INIT_WORK((struct work_struct *)work, my_wq_function); -+ work->alsa_stream = alsa_stream; -+ work->cmd = BCM2835_AUDIO_WRITE; -+ work->src = src; -+ work->count = count; -+ if (queue_work -+ (alsa_stream->my_wq, (struct work_struct *)work)) -+ ret = 0; -+ } else -+ LOG_ERR(" .. Error: NULL work kmalloc\n"); -+ } -+ LOG_DBG(" .. OUT %d\n", ret); -+ return ret; -+} -+ -+void my_workqueue_init(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ alsa_stream->my_wq = alloc_workqueue("my_queue", WQ_HIGHPRI, 1); -+ return; -+} -+ -+void my_workqueue_quit(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ if (alsa_stream->my_wq) { -+ flush_workqueue(alsa_stream->my_wq); -+ destroy_workqueue(alsa_stream->my_wq); -+ alsa_stream->my_wq = NULL; -+ } -+ return; -+} -+ -+static void audio_vchi_callback(void *param, -+ const VCHI_CALLBACK_REASON_T reason, -+ void *msg_handle) -+{ -+ AUDIO_INSTANCE_T *instance = (AUDIO_INSTANCE_T *) param; -+ int32_t status; -+ int32_t msg_len; -+ VC_AUDIO_MSG_T m; -+ LOG_DBG(" .. IN instance=%p, handle=%p, alsa=%p, reason=%d, handle=%p\n", -+ instance, instance ? instance->vchi_handle[0] : NULL, instance ? instance->alsa_stream : NULL, reason, msg_handle); -+ -+ if (reason != VCHI_CALLBACK_MSG_AVAILABLE) { -+ return; -+ } -+ if (!instance) { -+ LOG_ERR(" .. instance is null\n"); -+ BUG(); -+ return; -+ } -+ if (!instance->vchi_handle[0]) { -+ LOG_ERR(" .. instance->vchi_handle[0] is null\n"); -+ BUG(); -+ return; -+ } -+ status = vchi_msg_dequeue(instance->vchi_handle[0], -+ &m, sizeof m, &msg_len, VCHI_FLAGS_NONE); -+ if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { -+ LOG_DBG -+ (" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", -+ instance, m.u.result.success); -+ instance->result = m.u.result.success; -+ complete(&instance->msg_avail_comp); -+ } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { -+ bcm2835_alsa_stream_t *alsa_stream = instance->alsa_stream; -+ irq_handler_t callback = (irq_handler_t) m.u.complete.callback; -+ LOG_DBG -+ (" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_COMPLETE, complete=%d\n", -+ instance, m.u.complete.count); -+ if (alsa_stream && callback) { -+ atomic_add(m.u.complete.count, &alsa_stream->retrieved); -+ callback(0, alsa_stream); -+ } else { -+ LOG_ERR(" .. unexpected alsa_stream=%p, callback=%p\n", -+ alsa_stream, callback); -+ } -+ } else { -+ LOG_ERR(" .. unexpected m.type=%d\n", m.type); -+ } -+ LOG_DBG(" .. OUT\n"); -+} -+ -+static AUDIO_INSTANCE_T *vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, -+ VCHI_CONNECTION_T ** -+ vchi_connections, -+ uint32_t num_connections) -+{ -+ uint32_t i; -+ AUDIO_INSTANCE_T *instance; -+ int status; -+ -+ LOG_DBG("%s: start", __func__); -+ -+ if (num_connections > VCHI_MAX_NUM_CONNECTIONS) { -+ LOG_ERR("%s: unsupported number of connections %u (max=%u)\n", -+ __func__, num_connections, VCHI_MAX_NUM_CONNECTIONS); -+ -+ return NULL; -+ } -+ /* Allocate memory for this instance */ -+ instance = kmalloc(sizeof(*instance), GFP_KERNEL); -+ if (!instance) -+ return NULL; -+ -+ memset(instance, 0, sizeof(*instance)); -+ instance->num_connections = num_connections; -+ -+ /* Create a lock for exclusive, serialized VCHI connection access */ -+ mutex_init(&instance->vchi_mutex); -+ /* Open the VCHI service connections */ -+ for (i = 0; i < num_connections; i++) { -+ SERVICE_CREATION_T params = { -+ VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), -+ VC_AUDIO_SERVER_NAME, // 4cc service code -+ vchi_connections[i], // passed in fn pointers -+ 0, // rx fifo size (unused) -+ 0, // tx fifo size (unused) -+ audio_vchi_callback, // service callback -+ instance, // service callback parameter -+ 1, //TODO: remove VCOS_FALSE, // unaligned bulk recieves -+ 1, //TODO: remove VCOS_FALSE, // unaligned bulk transmits -+ 0 // want crc check on bulk transfers -+ }; -+ -+ LOG_DBG("%s: about to open %i\n", __func__, i); -+ status = vchi_service_open(vchi_instance, ¶ms, -+ &instance->vchi_handle[i]); -+ LOG_DBG("%s: opened %i: %p=%d\n", __func__, i, instance->vchi_handle[i], status); -+ if (status) { -+ LOG_ERR -+ ("%s: failed to open VCHI service connection (status=%d)\n", -+ __func__, status); -+ -+ goto err_close_services; -+ } -+ /* Finished with the service for now */ -+ vchi_service_release(instance->vchi_handle[i]); -+ } -+ -+ LOG_DBG("%s: okay\n", __func__); -+ return instance; -+ -+err_close_services: -+ for (i = 0; i < instance->num_connections; i++) { -+ LOG_ERR("%s: closing %i: %p\n", __func__, i, instance->vchi_handle[i]); -+ if (instance->vchi_handle[i]) -+ vchi_service_close(instance->vchi_handle[i]); -+ } -+ -+ kfree(instance); -+ LOG_ERR("%s: error\n", __func__); -+ -+ return NULL; -+} -+ -+static int32_t vc_vchi_audio_deinit(AUDIO_INSTANCE_T * instance) -+{ -+ uint32_t i; -+ -+ LOG_DBG(" .. IN\n"); -+ -+ if (instance == NULL) { -+ LOG_ERR("%s: invalid handle %p\n", __func__, instance); -+ -+ return -1; -+ } -+ -+ LOG_DBG(" .. about to lock (%d)\n", instance->num_connections); -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ -+ /* Close all VCHI service connections */ -+ for (i = 0; i < instance->num_connections; i++) { -+ int32_t success; -+ LOG_DBG(" .. %i:closing %p\n", i, instance->vchi_handle[i]); -+ vchi_service_use(instance->vchi_handle[i]); -+ -+ success = vchi_service_close(instance->vchi_handle[i]); -+ if (success != 0) { -+ LOG_DBG -+ ("%s: failed to close VCHI service connection (status=%d)\n", -+ __func__, success); -+ } -+ } -+ -+ mutex_unlock(&instance->vchi_mutex); -+ -+ kfree(instance); -+ -+ LOG_DBG(" .. OUT\n"); -+ -+ return 0; -+} -+ -+static int bcm2835_audio_open_connection(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ static VCHI_INSTANCE_T vchi_instance; -+ static VCHI_CONNECTION_T *vchi_connection; -+ static int initted; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ LOG_INFO("%s: start\n", __func__); -+ BUG_ON(instance); -+ if (instance) { -+ LOG_ERR("%s: VCHI instance already open (%p)\n", -+ __func__, instance); -+ instance->alsa_stream = alsa_stream; -+ alsa_stream->instance = instance; -+ ret = 0; // xxx todo -1; -+ goto err_free_mem; -+ } -+ -+ /* Initialize and create a VCHI connection */ -+ if (!initted) { -+ ret = vchi_initialise(&vchi_instance); -+ if (ret != 0) { -+ LOG_ERR("%s: failed to initialise VCHI instance (ret=%d)\n", -+ __func__, ret); -+ -+ ret = -EIO; -+ goto err_free_mem; -+ } -+ ret = vchi_connect(NULL, 0, vchi_instance); -+ if (ret != 0) { -+ LOG_ERR("%s: failed to connect VCHI instance (ret=%d)\n", -+ __func__, ret); -+ -+ ret = -EIO; -+ goto err_free_mem; -+ } -+ initted = 1; -+ } -+ -+ /* Initialize an instance of the audio service */ -+ instance = vc_vchi_audio_init(vchi_instance, &vchi_connection, 1); -+ -+ if (instance == NULL) { -+ LOG_ERR("%s: failed to initialize audio service\n", __func__); -+ -+ ret = -EPERM; -+ goto err_free_mem; -+ } -+ -+ instance->alsa_stream = alsa_stream; -+ alsa_stream->instance = instance; -+ -+ LOG_DBG(" success !\n"); -+err_free_mem: -+ LOG_DBG(" .. OUT\n"); -+ -+ return ret; -+} -+ -+int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ AUDIO_INSTANCE_T *instance; -+ VC_AUDIO_MSG_T m; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ my_workqueue_init(alsa_stream); -+ -+ ret = bcm2835_audio_open_connection(alsa_stream); -+ if (ret != 0) { -+ ret = -1; -+ goto exit; -+ } -+ instance = alsa_stream->instance; -+ LOG_DBG(" instance (%p)\n", instance); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ m.type = VC_AUDIO_MSG_TYPE_OPEN; -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+exit: -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+static int bcm2835_audio_set_ctls_chan(bcm2835_alsa_stream_t * alsa_stream, -+ bcm2835_chip_t * chip) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ LOG_INFO -+ (" Setting ALSA dest(%d), volume(%d)\n", chip->dest, chip->volume); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ instance->result = -1; -+ -+ m.type = VC_AUDIO_MSG_TYPE_CONTROL; -+ m.u.control.dest = chip->dest; -+ m.u.control.volume = chip->volume; -+ -+ /* Create the message available completion */ -+ init_completion(&instance->msg_avail_comp); -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ /* We are expecting a reply from the videocore */ -+ wait_for_completion(&instance->msg_avail_comp); -+ -+ if (instance->result != 0) { -+ LOG_ERR("%s: result=%d\n", __func__, instance->result); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+int bcm2835_audio_set_ctls(bcm2835_chip_t * chip) -+{ -+ int i; -+ int ret = 0; -+ LOG_DBG(" .. IN\n"); -+ LOG_DBG(" Setting ALSA dest(%d), volume(%d)\n", chip->dest, chip->volume); -+ -+ /* change ctls for all substreams */ -+ for (i = 0; i < MAX_SUBSTREAMS; i++) { -+ if (chip->avail_substreams & (1 << i)) { -+ if (!chip->alsa_stream[i]) -+ { -+ LOG_DBG(" No ALSA stream available?! %i:%p (%x)\n", i, chip->alsa_stream[i], chip->avail_substreams); -+ ret = 0; -+ } -+ else if (bcm2835_audio_set_ctls_chan /* returns 0 on success */ -+ (chip->alsa_stream[i], chip) != 0) -+ { -+ LOG_ERR("Couldn't set the controls for stream %d\n", i); -+ ret = -1; -+ } -+ else LOG_DBG(" Controls set for stream %d\n", i); -+ } -+ } -+ LOG_DBG(" .. OUT ret=%d\n", ret); -+ return ret; -+} -+ -+int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream, -+ uint32_t channels, uint32_t samplerate, -+ uint32_t bps) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ LOG_INFO -+ (" Setting ALSA channels(%d), samplerate(%d), bits-per-sample(%d)\n", -+ channels, samplerate, bps); -+ -+ /* resend ctls - alsa_stream may not have been open when first send */ -+ ret = bcm2835_audio_set_ctls_chan(alsa_stream, alsa_stream->chip); -+ if (ret != 0) { -+ LOG_ERR(" Alsa controls not supported\n"); -+ return -EINVAL; -+ } -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ instance->result = -1; -+ -+ m.type = VC_AUDIO_MSG_TYPE_CONFIG; -+ m.u.config.channels = channels; -+ m.u.config.samplerate = samplerate; -+ m.u.config.bps = bps; -+ -+ /* Create the message available completion */ -+ init_completion(&instance->msg_avail_comp); -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ /* We are expecting a reply from the videocore */ -+ wait_for_completion(&instance->msg_avail_comp); -+ -+ if (instance->result != 0) { -+ LOG_ERR("%s: result=%d", __func__, instance->result); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+int bcm2835_audio_setup(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ LOG_DBG(" .. IN\n"); -+ -+ LOG_DBG(" .. OUT\n"); -+ -+ return 0; -+} -+ -+static int bcm2835_audio_start_worker(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ m.type = VC_AUDIO_MSG_TYPE_START; -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+static int bcm2835_audio_stop_worker(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ m.type = VC_AUDIO_MSG_TYPE_STOP; -+ m.u.stop.draining = alsa_stream->draining; -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ LOG_DBG(" .. IN\n"); -+ -+ my_workqueue_quit(alsa_stream); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ m.type = VC_AUDIO_MSG_TYPE_CLOSE; -+ -+ /* Create the message available completion */ -+ init_completion(&instance->msg_avail_comp); -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ ret = -1; -+ goto unlock; -+ } -+ -+ /* We are expecting a reply from the videocore */ -+ wait_for_completion(&instance->msg_avail_comp); -+ -+ if (instance->result != 0) { -+ LOG_ERR("%s: failed result (result=%d)\n", -+ __func__, instance->result); -+ -+ ret = -1; -+ goto unlock; -+ } -+ -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ -+ /* Stop the audio service */ -+ if (instance) { -+ vc_vchi_audio_deinit(instance); -+ alsa_stream->instance = NULL; -+ } -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+int bcm2835_audio_write_worker(bcm2835_alsa_stream_t *alsa_stream, -+ uint32_t count, void *src) -+{ -+ VC_AUDIO_MSG_T m; -+ AUDIO_INSTANCE_T *instance = alsa_stream->instance; -+ int32_t success; -+ int ret; -+ -+ LOG_DBG(" .. IN\n"); -+ -+ LOG_INFO(" Writing %d bytes from %p\n", count, src); -+ -+ if(mutex_lock_interruptible(&instance->vchi_mutex)) -+ { -+ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); -+ return -EINTR; -+ } -+ vchi_service_use(instance->vchi_handle[0]); -+ -+ if ( instance->peer_version==0 && vchi_get_peer_version(instance->vchi_handle[0], &instance->peer_version) == 0 ) { -+ LOG_DBG("%s: client version %d connected\n", __func__, instance->peer_version); -+ } -+ m.type = VC_AUDIO_MSG_TYPE_WRITE; -+ m.u.write.count = count; -+ // old version uses bulk, new version uses control -+ m.u.write.max_packet = instance->peer_version < 2 || force_bulk ? 0:4000; -+ m.u.write.callback = alsa_stream->fifo_irq_handler; -+ m.u.write.cookie = alsa_stream; -+ m.u.write.silence = src == NULL; -+ -+ /* Send the message to the videocore */ -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ &m, sizeof m, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (success != 0) { -+ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ if (!m.u.write.silence) { -+ if (m.u.write.max_packet == 0) { -+ /* Send the message to the videocore */ -+ success = vchi_bulk_queue_transmit(instance->vchi_handle[0], -+ src, count, -+ 0 * -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED -+ + -+ 1 * -+ VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, -+ NULL); -+ } else { -+ while (count > 0) { -+ int bytes = min((int)m.u.write.max_packet, (int)count); -+ success = vchi_msg_queue(instance->vchi_handle[0], -+ src, bytes, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ src = (char *)src + bytes; -+ count -= bytes; -+ } -+ } -+ if (success != 0) { -+ LOG_ERR -+ ("%s: failed on vchi_bulk_queue_transmit (status=%d)\n", -+ __func__, success); -+ -+ ret = -1; -+ goto unlock; -+ } -+ } -+ ret = 0; -+ -+unlock: -+ vchi_service_release(instance->vchi_handle[0]); -+ mutex_unlock(&instance->vchi_mutex); -+ LOG_DBG(" .. OUT\n"); -+ return ret; -+} -+ -+/** -+ * Returns all buffers from arm->vc -+ */ -+void bcm2835_audio_flush_buffers(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ LOG_DBG(" .. IN\n"); -+ LOG_DBG(" .. OUT\n"); -+ return; -+} -+ -+/** -+ * Forces VC to flush(drop) its filled playback buffers and -+ * return them the us. (VC->ARM) -+ */ -+void bcm2835_audio_flush_playback_buffers(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ LOG_DBG(" .. IN\n"); -+ LOG_DBG(" .. OUT\n"); -+} -+ -+uint32_t bcm2835_audio_retrieve_buffers(bcm2835_alsa_stream_t * alsa_stream) -+{ -+ uint32_t count = atomic_read(&alsa_stream->retrieved); -+ atomic_sub(count, &alsa_stream->retrieved); -+ return count; -+} -+ -+module_param(force_bulk, bool, 0444); -+MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); ---- /dev/null -+++ b/sound/arm/bcm2835.c -@@ -0,0 +1,511 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include "bcm2835.h" -+ -+/* module parameters (see "Module Parameters") */ -+/* SNDRV_CARDS: maximum number of cards supported by this module */ -+static int index[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = -1 }; -+static char *id[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = NULL }; -+static int enable[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = 1 }; -+ -+/* HACKY global pointers needed for successive probes to work : ssp -+ * But compared against the changes we will have to do in VC audio_ipc code -+ * to export 8 audio_ipc devices as a single IPC device and then monitor all -+ * four devices in a thread, this gets things done quickly and should be easier -+ * to debug if we run into issues -+ */ -+ -+static struct snd_card *g_card = NULL; -+static bcm2835_chip_t *g_chip = NULL; -+ -+static int snd_bcm2835_free(bcm2835_chip_t * chip) -+{ -+ kfree(chip); -+ return 0; -+} -+ -+/* component-destructor -+ * (see "Management of Cards and Components") -+ */ -+static int snd_bcm2835_dev_free(struct snd_device *device) -+{ -+ return snd_bcm2835_free(device->device_data); -+} -+ -+/* chip-specific constructor -+ * (see "Management of Cards and Components") -+ */ -+static int snd_bcm2835_create(struct snd_card *card, -+ struct platform_device *pdev, -+ bcm2835_chip_t ** rchip) -+{ -+ bcm2835_chip_t *chip; -+ int err; -+ static struct snd_device_ops ops = { -+ .dev_free = snd_bcm2835_dev_free, -+ }; -+ -+ *rchip = NULL; -+ -+ chip = kzalloc(sizeof(*chip), GFP_KERNEL); -+ if (chip == NULL) -+ return -ENOMEM; -+ -+ chip->card = card; -+ -+ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); -+ if (err < 0) { -+ snd_bcm2835_free(chip); -+ return err; -+ } -+ -+ *rchip = chip; -+ return 0; -+} -+ -+static int snd_bcm2835_alsa_probe_dt(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ bcm2835_chip_t *chip; -+ struct snd_card *card; -+ u32 numchans; -+ int err, i; -+ -+ err = of_property_read_u32(dev->of_node, "brcm,pwm-channels", -+ &numchans); -+ if (err) { -+ dev_err(dev, "Failed to get DT property 'brcm,pwm-channels'"); -+ return err; -+ } -+ -+ if (numchans == 0 || numchans > MAX_SUBSTREAMS) { -+ numchans = MAX_SUBSTREAMS; -+ dev_warn(dev, "Illegal 'brcm,pwm-channels' value, will use %u\n", -+ numchans); -+ } -+ -+ err = snd_card_new(&pdev->dev, -1, NULL, THIS_MODULE, 0, &card); -+ if (err) { -+ dev_err(dev, "Failed to create soundcard structure\n"); -+ return err; -+ } -+ -+ snd_card_set_dev(card, dev); -+ strcpy(card->driver, "bcm2835"); -+ strcpy(card->shortname, "bcm2835 ALSA"); -+ sprintf(card->longname, "%s", card->shortname); -+ -+ err = snd_bcm2835_create(card, pdev, &chip); -+ if (err < 0) { -+ dev_err(dev, "Failed to create bcm2835 chip\n"); -+ goto err_free; -+ } -+ -+ err = snd_bcm2835_new_pcm(chip); -+ if (err < 0) { -+ dev_err(dev, "Failed to create new bcm2835 pcm device\n"); -+ goto err_free; -+ } -+ -+ err = snd_bcm2835_new_spdif_pcm(chip); -+ if (err < 0) { -+ dev_err(dev, "Failed to create new bcm2835 spdif pcm device\n"); -+ goto err_free; -+ } -+ -+ err = snd_bcm2835_new_ctl(chip); -+ if (err < 0) { -+ dev_err(dev, "Failed to create new bcm2835 ctl\n"); -+ goto err_free; -+ } -+ -+ for (i = 0; i < numchans; i++) { -+ chip->avail_substreams |= (1 << i); -+ chip->pdev[i] = pdev; -+ } -+ -+ err = snd_card_register(card); -+ if (err) { -+ dev_err(dev, "Failed to register bcm2835 ALSA card \n"); -+ goto err_free; -+ } -+ -+ g_card = card; -+ g_chip = chip; -+ platform_set_drvdata(pdev, card); -+ audio_info("bcm2835 ALSA card created with %u channels\n", numchans); -+ -+ return 0; -+ -+err_free: -+ snd_card_free(card); -+ -+ return err; -+} -+ -+static int snd_bcm2835_alsa_probe(struct platform_device *pdev) -+{ -+ static int dev; -+ bcm2835_chip_t *chip; -+ struct snd_card *card; -+ int err; -+ -+ if (pdev->dev.of_node) -+ return snd_bcm2835_alsa_probe_dt(pdev); -+ -+ if (dev >= MAX_SUBSTREAMS) -+ return -ENODEV; -+ -+ if (!enable[dev]) { -+ dev++; -+ return -ENOENT; -+ } -+ -+ if (dev > 0) -+ goto add_register_map; -+ -+ err = snd_card_new(&pdev->dev, index[dev], id[dev], THIS_MODULE, 0, &g_card); -+ if (err < 0) -+ goto out; -+ -+ snd_card_set_dev(g_card, &pdev->dev); -+ strcpy(g_card->driver, "bcm2835"); -+ strcpy(g_card->shortname, "bcm2835 ALSA"); -+ sprintf(g_card->longname, "%s", g_card->shortname); -+ -+ err = snd_bcm2835_create(g_card, pdev, &chip); -+ if (err < 0) { -+ dev_err(&pdev->dev, "Failed to create bcm2835 chip\n"); -+ goto out_bcm2835_create; -+ } -+ -+ g_chip = chip; -+ err = snd_bcm2835_new_pcm(chip); -+ if (err < 0) { -+ dev_err(&pdev->dev, "Failed to create new BCM2835 pcm device\n"); -+ goto out_bcm2835_new_pcm; -+ } -+ -+ err = snd_bcm2835_new_spdif_pcm(chip); -+ if (err < 0) { -+ dev_err(&pdev->dev, "Failed to create new BCM2835 spdif pcm device\n"); -+ goto out_bcm2835_new_spdif; -+ } -+ -+ err = snd_bcm2835_new_ctl(chip); -+ if (err < 0) { -+ dev_err(&pdev->dev, "Failed to create new BCM2835 ctl\n"); -+ goto out_bcm2835_new_ctl; -+ } -+ -+add_register_map: -+ card = g_card; -+ chip = g_chip; -+ -+ BUG_ON(!(card && chip)); -+ -+ chip->avail_substreams |= (1 << dev); -+ chip->pdev[dev] = pdev; -+ -+ if (dev == 0) { -+ err = snd_card_register(card); -+ if (err < 0) { -+ dev_err(&pdev->dev, -+ "Failed to register bcm2835 ALSA card \n"); -+ goto out_card_register; -+ } -+ platform_set_drvdata(pdev, card); -+ audio_info("bcm2835 ALSA card created!\n"); -+ } else { -+ audio_info("bcm2835 ALSA chip created!\n"); -+ platform_set_drvdata(pdev, (void *)dev); -+ } -+ -+ dev++; -+ -+ return 0; -+ -+out_card_register: -+out_bcm2835_new_ctl: -+out_bcm2835_new_spdif: -+out_bcm2835_new_pcm: -+out_bcm2835_create: -+ BUG_ON(!g_card); -+ if (snd_card_free(g_card)) -+ dev_err(&pdev->dev, "Failed to free Registered alsa card\n"); -+ g_card = NULL; -+out: -+ dev = SNDRV_CARDS; /* stop more avail_substreams from being probed */ -+ dev_err(&pdev->dev, "BCM2835 ALSA Probe failed !!\n"); -+ return err; -+} -+ -+static int snd_bcm2835_alsa_remove(struct platform_device *pdev) -+{ -+ uint32_t idx; -+ void *drv_data; -+ -+ drv_data = platform_get_drvdata(pdev); -+ -+ if (drv_data == (void *)g_card) { -+ /* This is the card device */ -+ snd_card_free((struct snd_card *)drv_data); -+ g_card = NULL; -+ g_chip = NULL; -+ } else { -+ idx = (uint32_t) drv_data; -+ if (g_card != NULL) { -+ BUG_ON(!g_chip); -+ /* We pass chip device numbers in audio ipc devices -+ * other than the one we registered our card with -+ */ -+ idx = (uint32_t) drv_data; -+ BUG_ON(!idx || idx > MAX_SUBSTREAMS); -+ g_chip->avail_substreams &= ~(1 << idx); -+ /* There should be atleast one substream registered -+ * after we are done here, as it wil be removed when -+ * the *remove* is called for the card device -+ */ -+ BUG_ON(!g_chip->avail_substreams); -+ } -+ } -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int snd_bcm2835_alsa_suspend(struct platform_device *pdev, -+ pm_message_t state) -+{ -+ return 0; -+} -+ -+static int snd_bcm2835_alsa_resume(struct platform_device *pdev) -+{ -+ return 0; -+} -+ -+#endif -+ -+static const struct of_device_id snd_bcm2835_of_match_table[] = { -+ { .compatible = "brcm,bcm2835-audio", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_bcm2835_of_match_table); -+ -+static struct platform_driver bcm2835_alsa0_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD0", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_bcm2835_of_match_table, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa1_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD1", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa2_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD2", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa3_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD3", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa4_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD4", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa5_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD5", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa6_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD6", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static struct platform_driver bcm2835_alsa7_driver = { -+ .probe = snd_bcm2835_alsa_probe, -+ .remove = snd_bcm2835_alsa_remove, -+#ifdef CONFIG_PM -+ .suspend = snd_bcm2835_alsa_suspend, -+ .resume = snd_bcm2835_alsa_resume, -+#endif -+ .driver = { -+ .name = "bcm2835_AUD7", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int bcm2835_alsa_device_init(void) -+{ -+ int err; -+ err = platform_driver_register(&bcm2835_alsa0_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto out; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa1_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_0; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa2_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_1; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa3_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_2; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa4_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_3; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa5_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_4; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa6_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_5; -+ } -+ -+ err = platform_driver_register(&bcm2835_alsa7_driver); -+ if (err) { -+ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); -+ goto unregister_6; -+ } -+ -+ return 0; -+ -+unregister_6: -+ platform_driver_unregister(&bcm2835_alsa6_driver); -+unregister_5: -+ platform_driver_unregister(&bcm2835_alsa5_driver); -+unregister_4: -+ platform_driver_unregister(&bcm2835_alsa4_driver); -+unregister_3: -+ platform_driver_unregister(&bcm2835_alsa3_driver); -+unregister_2: -+ platform_driver_unregister(&bcm2835_alsa2_driver); -+unregister_1: -+ platform_driver_unregister(&bcm2835_alsa1_driver); -+unregister_0: -+ platform_driver_unregister(&bcm2835_alsa0_driver); -+out: -+ return err; -+} -+ -+static void bcm2835_alsa_device_exit(void) -+{ -+ platform_driver_unregister(&bcm2835_alsa0_driver); -+ platform_driver_unregister(&bcm2835_alsa1_driver); -+ platform_driver_unregister(&bcm2835_alsa2_driver); -+ platform_driver_unregister(&bcm2835_alsa3_driver); -+ platform_driver_unregister(&bcm2835_alsa4_driver); -+ platform_driver_unregister(&bcm2835_alsa5_driver); -+ platform_driver_unregister(&bcm2835_alsa6_driver); -+ platform_driver_unregister(&bcm2835_alsa7_driver); -+} -+ -+late_initcall(bcm2835_alsa_device_init); -+module_exit(bcm2835_alsa_device_exit); -+ -+MODULE_AUTHOR("Dom Cobley"); -+MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:bcm2835_alsa"); ---- /dev/null -+++ b/sound/arm/bcm2835.h -@@ -0,0 +1,167 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#ifndef __SOUND_ARM_BCM2835_H -+#define __SOUND_ARM_BCM2835_H -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+#define AUDIO_DEBUG_ENABLE -+#define AUDIO_VERBOSE_DEBUG_ENABLE -+*/ -+ -+/* Debug macros */ -+ -+#ifdef AUDIO_DEBUG_ENABLE -+#ifdef AUDIO_VERBOSE_DEBUG_ENABLE -+ -+#define audio_debug(fmt, arg...) \ -+ printk(KERN_INFO"%s:%d " fmt, __func__, __LINE__, ##arg) -+ -+#define audio_info(fmt, arg...) \ -+ printk(KERN_INFO"%s:%d " fmt, __func__, __LINE__, ##arg) -+ -+#else -+ -+#define audio_debug(fmt, arg...) -+ -+#define audio_info(fmt, arg...) -+ -+#endif /* AUDIO_VERBOSE_DEBUG_ENABLE */ -+ -+#else -+ -+#define audio_debug(fmt, arg...) -+ -+#define audio_info(fmt, arg...) -+ -+#endif /* AUDIO_DEBUG_ENABLE */ -+ -+#define audio_error(fmt, arg...) \ -+ printk(KERN_ERR"%s:%d " fmt, __func__, __LINE__, ##arg) -+ -+#define audio_warning(fmt, arg...) \ -+ printk(KERN_WARNING"%s:%d " fmt, __func__, __LINE__, ##arg) -+ -+#define audio_alert(fmt, arg...) \ -+ printk(KERN_ALERT"%s:%d " fmt, __func__, __LINE__, ##arg) -+ -+#define MAX_SUBSTREAMS (8) -+#define AVAIL_SUBSTREAMS_MASK (0xff) -+enum { -+ CTRL_VOL_MUTE, -+ CTRL_VOL_UNMUTE -+}; -+ -+/* macros for alsa2chip and chip2alsa, instead of functions */ -+ -+#define alsa2chip(vol) (uint)(-((vol << 8) / 100)) /* convert alsa to chip volume (defined as macro rather than function call) */ -+#define chip2alsa(vol) -((vol * 100) >> 8) /* convert chip to alsa volume */ -+ -+/* Some constants for values .. */ -+typedef enum { -+ AUDIO_DEST_AUTO = 0, -+ AUDIO_DEST_HEADPHONES = 1, -+ AUDIO_DEST_HDMI = 2, -+ AUDIO_DEST_MAX, -+} SND_BCM2835_ROUTE_T; -+ -+typedef enum { -+ PCM_PLAYBACK_VOLUME, -+ PCM_PLAYBACK_MUTE, -+ PCM_PLAYBACK_DEVICE, -+} SND_BCM2835_CTRL_T; -+ -+/* definition of the chip-specific record */ -+typedef struct bcm2835_chip { -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_pcm *pcm_spdif; -+ /* Bitmat for valid reg_base and irq numbers */ -+ uint32_t avail_substreams; -+ struct platform_device *pdev[MAX_SUBSTREAMS]; -+ struct bcm2835_alsa_stream *alsa_stream[MAX_SUBSTREAMS]; -+ -+ int volume; -+ int old_volume; /* stores the volume value whist muted */ -+ int dest; -+ int mute; -+ -+ unsigned int opened; -+ unsigned int spdif_status; -+ struct mutex audio_mutex; -+} bcm2835_chip_t; -+ -+typedef struct bcm2835_alsa_stream { -+ bcm2835_chip_t *chip; -+ struct snd_pcm_substream *substream; -+ struct snd_pcm_indirect pcm_indirect; -+ -+ struct semaphore buffers_update_sem; -+ struct semaphore control_sem; -+ spinlock_t lock; -+ volatile uint32_t control; -+ volatile uint32_t status; -+ -+ int open; -+ int running; -+ int draining; -+ -+ int channels; -+ int params_rate; -+ int pcm_format_width; -+ -+ unsigned int pos; -+ unsigned int buffer_size; -+ unsigned int period_size; -+ -+ uint32_t enable_fifo_irq; -+ irq_handler_t fifo_irq_handler; -+ -+ atomic_t retrieved; -+ struct opaque_AUDIO_INSTANCE_T *instance; -+ struct workqueue_struct *my_wq; -+ int idx; -+} bcm2835_alsa_stream_t; -+ -+int snd_bcm2835_new_ctl(bcm2835_chip_t * chip); -+int snd_bcm2835_new_pcm(bcm2835_chip_t * chip); -+int snd_bcm2835_new_spdif_pcm(bcm2835_chip_t * chip); -+ -+int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream); -+int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream); -+int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream, -+ uint32_t channels, uint32_t samplerate, -+ uint32_t bps); -+int bcm2835_audio_setup(bcm2835_alsa_stream_t * alsa_stream); -+int bcm2835_audio_start(bcm2835_alsa_stream_t * alsa_stream); -+int bcm2835_audio_stop(bcm2835_alsa_stream_t * alsa_stream); -+int bcm2835_audio_set_ctls(bcm2835_chip_t * chip); -+int bcm2835_audio_write(bcm2835_alsa_stream_t * alsa_stream, uint32_t count, -+ void *src); -+uint32_t bcm2835_audio_retrieve_buffers(bcm2835_alsa_stream_t * alsa_stream); -+void bcm2835_audio_flush_buffers(bcm2835_alsa_stream_t * alsa_stream); -+void bcm2835_audio_flush_playback_buffers(bcm2835_alsa_stream_t * alsa_stream); -+ -+#endif /* __SOUND_ARM_BCM2835_H */ ---- /dev/null -+++ b/sound/arm/vc_vchi_audioserv_defs.h -@@ -0,0 +1,116 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#ifndef _VC_AUDIO_DEFS_H_ -+#define _VC_AUDIO_DEFS_H_ -+ -+#define VC_AUDIOSERV_MIN_VER 1 -+#define VC_AUDIOSERV_VER 2 -+ -+// FourCC code used for VCHI connection -+#define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS") -+ -+// Maximum message length -+#define VC_AUDIO_MAX_MSG_LEN (sizeof( VC_AUDIO_MSG_T )) -+ -+// List of screens that are currently supported -+// All message types supported for HOST->VC direction -+typedef enum { -+ VC_AUDIO_MSG_TYPE_RESULT, // Generic result -+ VC_AUDIO_MSG_TYPE_COMPLETE, // Generic result -+ VC_AUDIO_MSG_TYPE_CONFIG, // Configure audio -+ VC_AUDIO_MSG_TYPE_CONTROL, // Configure audio -+ VC_AUDIO_MSG_TYPE_OPEN, // Configure audio -+ VC_AUDIO_MSG_TYPE_CLOSE, // Configure audio -+ VC_AUDIO_MSG_TYPE_START, // Configure audio -+ VC_AUDIO_MSG_TYPE_STOP, // Configure audio -+ VC_AUDIO_MSG_TYPE_WRITE, // Configure audio -+ VC_AUDIO_MSG_TYPE_MAX -+} VC_AUDIO_MSG_TYPE; -+ -+// configure the audio -+typedef struct { -+ uint32_t channels; -+ uint32_t samplerate; -+ uint32_t bps; -+ -+} VC_AUDIO_CONFIG_T; -+ -+typedef struct { -+ uint32_t volume; -+ uint32_t dest; -+ -+} VC_AUDIO_CONTROL_T; -+ -+// audio -+typedef struct { -+ uint32_t dummy; -+ -+} VC_AUDIO_OPEN_T; -+ -+// audio -+typedef struct { -+ uint32_t dummy; -+ -+} VC_AUDIO_CLOSE_T; -+// audio -+typedef struct { -+ uint32_t dummy; -+ -+} VC_AUDIO_START_T; -+// audio -+typedef struct { -+ uint32_t draining; -+ -+} VC_AUDIO_STOP_T; -+ -+// configure the write audio samples -+typedef struct { -+ uint32_t count; // in bytes -+ void *callback; -+ void *cookie; -+ uint16_t silence; -+ uint16_t max_packet; -+} VC_AUDIO_WRITE_T; -+ -+// Generic result for a request (VC->HOST) -+typedef struct { -+ int32_t success; // Success value -+ -+} VC_AUDIO_RESULT_T; -+ -+// Generic result for a request (VC->HOST) -+typedef struct { -+ int32_t count; // Success value -+ void *callback; -+ void *cookie; -+} VC_AUDIO_COMPLETE_T; -+ -+// Message header for all messages in HOST->VC direction -+typedef struct { -+ int32_t type; // Message type (VC_AUDIO_MSG_TYPE) -+ union { -+ VC_AUDIO_CONFIG_T config; -+ VC_AUDIO_CONTROL_T control; -+ VC_AUDIO_OPEN_T open; -+ VC_AUDIO_CLOSE_T close; -+ VC_AUDIO_START_T start; -+ VC_AUDIO_STOP_T stop; -+ VC_AUDIO_WRITE_T write; -+ VC_AUDIO_RESULT_T result; -+ VC_AUDIO_COMPLETE_T complete; -+ } u; -+} VC_AUDIO_MSG_T; -+ -+#endif // _VC_AUDIO_DEFS_H_ diff --git a/target/linux/brcm2708/patches-4.9/950-0045-lirc-added-support-for-RaspberryPi-GPIO.patch b/target/linux/brcm2708/patches-4.9/950-0045-lirc-added-support-for-RaspberryPi-GPIO.patch deleted file mode 100644 index 0cbc1c45a..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0045-lirc-added-support-for-RaspberryPi-GPIO.patch +++ /dev/null @@ -1,855 +0,0 @@ -From 277c109833c1d78543bec0723ab42f4c79937df9 Mon Sep 17 00:00:00 2001 -From: Aron Szabo -Date: Sat, 16 Jun 2012 12:15:55 +0200 -Subject: [PATCH] lirc: added support for RaspberryPi GPIO - -lirc_rpi: Use read_current_timer to determine transmitter delay. Thanks to jjmz and others -See: https://github.com/raspberrypi/linux/issues/525 - -lirc: Remove restriction on gpio pins that can be used with lirc - -Compute Module, for example could use different pins - -lirc_rpi: Add parameter to specify input pin pull - -Depending on the connected IR circuitry it might be desirable to change the -gpios internal pull from it pull-down default behaviour. Add a module -parameter to allow the user to set it explicitly. - -Signed-off-by: Julian Scheel - -lirc-rpi: Use the higher-level irq control functions - -This module used to access the irq_chip methods of the -gpio controller directly, rather than going through the -standard enable_irq/irq_set_irq_type functions. This -caused problems on pinctrl-bcm2835 which only implements -the irq_enable/disable methods and not irq_unmask/mask. - -lirc-rpi: Correct the interrupt usage - -1) Correct the use of enable_irq (i.e. don't call it so often) -2) Correct the shutdown sequence. -3) Avoid a bcm2708_gpio driver quirk by setting the irq flags earlier - -lirc-rpi: use getnstimeofday instead of read_current_timer - -read_current_timer isn't guaranteed to return values in -microseconds, and indeed it doesn't on a Pi2. - -Issue: linux#827 - -lirc-rpi: Add device tree support, and a suitable overlay - -The overlay supports DT parameters that match the old module -parameters, except that gpio_in_pull should be set using the -strings "up", "down" or "off". - -lirc-rpi: Also support pinctrl-bcm2835 in non-DT mode - -fix auto-sense in lirc_rpi driver - -On a Raspberry Pi 2, the lirc_rpi driver might receive spurious -interrupts and change it's low-active / high-active setting. -When this happens, the IR remote control stops working. - -This patch disables this auto-detection if the 'sense' parameter -was set in the device tree, making the driver robust to such -spurious interrupts. ---- - drivers/staging/media/lirc/Kconfig | 6 + - drivers/staging/media/lirc/Makefile | 1 + - drivers/staging/media/lirc/lirc_rpi.c | 734 ++++++++++++++++++++++++++++++++++ - include/linux/platform_data/bcm2708.h | 23 ++ - 4 files changed, 764 insertions(+) - create mode 100644 drivers/staging/media/lirc/lirc_rpi.c - create mode 100644 include/linux/platform_data/bcm2708.h - ---- a/drivers/staging/media/lirc/Kconfig -+++ b/drivers/staging/media/lirc/Kconfig -@@ -32,6 +32,12 @@ config LIRC_PARALLEL - help - Driver for Homebrew Parallel Port Receivers - -+config LIRC_RPI -+ tristate "Homebrew GPIO Port Receiver/Transmitter for the RaspberryPi" -+ depends on LIRC -+ help -+ Driver for Homebrew GPIO Port Receiver/Transmitter for the RaspberryPi -+ - config LIRC_SASEM - tristate "Sasem USB IR Remote" - depends on LIRC && USB ---- a/drivers/staging/media/lirc/Makefile -+++ b/drivers/staging/media/lirc/Makefile -@@ -6,6 +6,7 @@ - obj-$(CONFIG_LIRC_BT829) += lirc_bt829.o - obj-$(CONFIG_LIRC_IMON) += lirc_imon.o - obj-$(CONFIG_LIRC_PARALLEL) += lirc_parallel.o -+obj-$(CONFIG_LIRC_RPI) += lirc_rpi.o - obj-$(CONFIG_LIRC_SASEM) += lirc_sasem.o - obj-$(CONFIG_LIRC_SERIAL) += lirc_serial.o - obj-$(CONFIG_LIRC_SIR) += lirc_sir.o ---- /dev/null -+++ b/drivers/staging/media/lirc/lirc_rpi.c -@@ -0,0 +1,734 @@ -+/* -+ * lirc_rpi.c -+ * -+ * lirc_rpi - Device driver that records pulse- and pause-lengths -+ * (space-lengths) (just like the lirc_serial driver does) -+ * between GPIO interrupt events on the Raspberry Pi. -+ * Lots of code has been taken from the lirc_serial module, -+ * so I would like say thanks to the authors. -+ * -+ * Copyright (C) 2012 Aron Robert Szabo , -+ * Michael Bishop -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define LIRC_DRIVER_NAME "lirc_rpi" -+#define RBUF_LEN 256 -+#define LIRC_TRANSMITTER_LATENCY 50 -+ -+#ifndef MAX_UDELAY_MS -+#define MAX_UDELAY_US 5000 -+#else -+#define MAX_UDELAY_US (MAX_UDELAY_MS*1000) -+#endif -+ -+#define dprintk(fmt, args...) \ -+ do { \ -+ if (debug) \ -+ printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ -+ fmt, ## args); \ -+ } while (0) -+ -+/* module parameters */ -+ -+/* set the default GPIO input pin */ -+static int gpio_in_pin = 18; -+/* set the default pull behaviour for input pin */ -+static int gpio_in_pull = BCM2708_PULL_DOWN; -+/* set the default GPIO output pin */ -+static int gpio_out_pin = 17; -+/* enable debugging messages */ -+static bool debug; -+/* -1 = auto, 0 = active high, 1 = active low */ -+static int sense = -1; -+/* use softcarrier by default */ -+static bool softcarrier = 1; -+/* 0 = do not invert output, 1 = invert output */ -+static bool invert = 0; -+ -+struct gpio_chip *gpiochip; -+static int irq_num; -+static int auto_sense = 1; -+ -+/* forward declarations */ -+static long send_pulse(unsigned long length); -+static void send_space(long length); -+static void lirc_rpi_exit(void); -+ -+static struct platform_device *lirc_rpi_dev; -+static struct timeval lasttv = { 0, 0 }; -+static struct lirc_buffer rbuf; -+static spinlock_t lock; -+ -+/* initialized/set in init_timing_params() */ -+static unsigned int freq = 38000; -+static unsigned int duty_cycle = 50; -+static unsigned long period; -+static unsigned long pulse_width; -+static unsigned long space_width; -+ -+static void safe_udelay(unsigned long usecs) -+{ -+ while (usecs > MAX_UDELAY_US) { -+ udelay(MAX_UDELAY_US); -+ usecs -= MAX_UDELAY_US; -+ } -+ udelay(usecs); -+} -+ -+static unsigned long read_current_us(void) -+{ -+ struct timespec now; -+ getnstimeofday(&now); -+ return (now.tv_sec * 1000000) + (now.tv_nsec/1000); -+} -+ -+static int init_timing_params(unsigned int new_duty_cycle, -+ unsigned int new_freq) -+{ -+ if (1000 * 1000000L / new_freq * new_duty_cycle / 100 <= -+ LIRC_TRANSMITTER_LATENCY) -+ return -EINVAL; -+ if (1000 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <= -+ LIRC_TRANSMITTER_LATENCY) -+ return -EINVAL; -+ duty_cycle = new_duty_cycle; -+ freq = new_freq; -+ period = 1000 * 1000000L / freq; -+ pulse_width = period * duty_cycle / 100; -+ space_width = period - pulse_width; -+ dprintk("in init_timing_params, freq=%d pulse=%ld, " -+ "space=%ld\n", freq, pulse_width, space_width); -+ return 0; -+} -+ -+static long send_pulse_softcarrier(unsigned long length) -+{ -+ int flag; -+ unsigned long actual, target; -+ unsigned long actual_us, initial_us, target_us; -+ -+ length *= 1000; -+ -+ actual = 0; target = 0; flag = 0; -+ actual_us = read_current_us(); -+ -+ while (actual < length) { -+ if (flag) { -+ gpiochip->set(gpiochip, gpio_out_pin, invert); -+ target += space_width; -+ } else { -+ gpiochip->set(gpiochip, gpio_out_pin, !invert); -+ target += pulse_width; -+ } -+ initial_us = actual_us; -+ target_us = actual_us + (target - actual) / 1000; -+ /* -+ * Note - we've checked in ioctl that the pulse/space -+ * widths are big enough so that d is > 0 -+ */ -+ if ((int)(target_us - actual_us) > 0) -+ udelay(target_us - actual_us); -+ actual_us = read_current_us(); -+ actual += (actual_us - initial_us) * 1000; -+ flag = !flag; -+ } -+ return (actual-length) / 1000; -+} -+ -+static long send_pulse(unsigned long length) -+{ -+ if (length <= 0) -+ return 0; -+ -+ if (softcarrier) { -+ return send_pulse_softcarrier(length); -+ } else { -+ gpiochip->set(gpiochip, gpio_out_pin, !invert); -+ safe_udelay(length); -+ return 0; -+ } -+} -+ -+static void send_space(long length) -+{ -+ gpiochip->set(gpiochip, gpio_out_pin, invert); -+ if (length <= 0) -+ return; -+ safe_udelay(length); -+} -+ -+static void rbwrite(int l) -+{ -+ if (lirc_buffer_full(&rbuf)) { -+ /* no new signals will be accepted */ -+ dprintk("Buffer overrun\n"); -+ return; -+ } -+ lirc_buffer_write(&rbuf, (void *)&l); -+} -+ -+static void frbwrite(int l) -+{ -+ /* simple noise filter */ -+ static int pulse, space; -+ static unsigned int ptr; -+ -+ if (ptr > 0 && (l & PULSE_BIT)) { -+ pulse += l & PULSE_MASK; -+ if (pulse > 250) { -+ rbwrite(space); -+ rbwrite(pulse | PULSE_BIT); -+ ptr = 0; -+ pulse = 0; -+ } -+ return; -+ } -+ if (!(l & PULSE_BIT)) { -+ if (ptr == 0) { -+ if (l > 20000) { -+ space = l; -+ ptr++; -+ return; -+ } -+ } else { -+ if (l > 20000) { -+ space += pulse; -+ if (space > PULSE_MASK) -+ space = PULSE_MASK; -+ space += l; -+ if (space > PULSE_MASK) -+ space = PULSE_MASK; -+ pulse = 0; -+ return; -+ } -+ rbwrite(space); -+ rbwrite(pulse | PULSE_BIT); -+ ptr = 0; -+ pulse = 0; -+ } -+ } -+ rbwrite(l); -+} -+ -+static irqreturn_t irq_handler(int i, void *blah, struct pt_regs *regs) -+{ -+ struct timeval tv; -+ long deltv; -+ int data; -+ int signal; -+ -+ /* use the GPIO signal level */ -+ signal = gpiochip->get(gpiochip, gpio_in_pin); -+ -+ if (sense != -1) { -+ /* get current time */ -+ do_gettimeofday(&tv); -+ -+ /* calc time since last interrupt in microseconds */ -+ deltv = tv.tv_sec-lasttv.tv_sec; -+ if (tv.tv_sec < lasttv.tv_sec || -+ (tv.tv_sec == lasttv.tv_sec && -+ tv.tv_usec < lasttv.tv_usec)) { -+ printk(KERN_WARNING LIRC_DRIVER_NAME -+ ": AIEEEE: your clock just jumped backwards\n"); -+ printk(KERN_WARNING LIRC_DRIVER_NAME -+ ": %d %d %lx %lx %lx %lx\n", signal, sense, -+ tv.tv_sec, lasttv.tv_sec, -+ tv.tv_usec, lasttv.tv_usec); -+ data = PULSE_MASK; -+ } else if (deltv > 15) { -+ data = PULSE_MASK; /* really long time */ -+ if (!(signal^sense)) { -+ /* sanity check */ -+ printk(KERN_DEBUG LIRC_DRIVER_NAME -+ ": AIEEEE: %d %d %lx %lx %lx %lx\n", -+ signal, sense, tv.tv_sec, lasttv.tv_sec, -+ tv.tv_usec, lasttv.tv_usec); -+ /* -+ * detecting pulse while this -+ * MUST be a space! -+ */ -+ if (auto_sense) { -+ sense = sense ? 0 : 1; -+ } -+ } -+ } else { -+ data = (int) (deltv*1000000 + -+ (tv.tv_usec - lasttv.tv_usec)); -+ } -+ frbwrite(signal^sense ? data : (data|PULSE_BIT)); -+ lasttv = tv; -+ wake_up_interruptible(&rbuf.wait_poll); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int is_right_chip(struct gpio_chip *chip, void *data) -+{ -+ dprintk("is_right_chip %s %d\n", chip->label, strcmp(data, chip->label)); -+ -+ if (strcmp(data, chip->label) == 0) -+ return 1; -+ return 0; -+} -+ -+static inline int read_bool_property(const struct device_node *np, -+ const char *propname, -+ bool *out_value) -+{ -+ u32 value = 0; -+ int err = of_property_read_u32(np, propname, &value); -+ if (err == 0) -+ *out_value = (value != 0); -+ return err; -+} -+ -+static void read_pin_settings(struct device_node *node) -+{ -+ u32 pin; -+ int index; -+ -+ for (index = 0; -+ of_property_read_u32_index( -+ node, -+ "brcm,pins", -+ index, -+ &pin) == 0; -+ index++) { -+ u32 function; -+ int err; -+ err = of_property_read_u32_index( -+ node, -+ "brcm,function", -+ index, -+ &function); -+ if (err == 0) { -+ if (function == 1) /* Output */ -+ gpio_out_pin = pin; -+ else if (function == 0) /* Input */ -+ gpio_in_pin = pin; -+ } -+ } -+} -+ -+static int init_port(void) -+{ -+ int i, nlow, nhigh; -+ struct device_node *node; -+ -+ node = lirc_rpi_dev->dev.of_node; -+ -+ gpiochip = gpiochip_find("bcm2708_gpio", is_right_chip); -+ -+ /* -+ * Because of the lack of a setpull function, only support -+ * pinctrl-bcm2835 if using device tree. -+ */ -+ if (!gpiochip && node) -+ gpiochip = gpiochip_find("pinctrl-bcm2835", is_right_chip); -+ -+ if (!gpiochip) { -+ pr_err(LIRC_DRIVER_NAME ": gpio chip not found!\n"); -+ return -ENODEV; -+ } -+ -+ if (node) { -+ struct device_node *pins_node; -+ -+ pins_node = of_parse_phandle(node, "pinctrl-0", 0); -+ if (!pins_node) { -+ printk(KERN_ERR LIRC_DRIVER_NAME -+ ": pinctrl settings not found!\n"); -+ return -EINVAL; -+ } -+ -+ read_pin_settings(pins_node); -+ -+ of_property_read_u32(node, "rpi,sense", &sense); -+ -+ read_bool_property(node, "rpi,softcarrier", &softcarrier); -+ -+ read_bool_property(node, "rpi,invert", &invert); -+ -+ read_bool_property(node, "rpi,debug", &debug); -+ -+ } else { -+ return -EINVAL; -+ } -+ -+ gpiochip->set(gpiochip, gpio_out_pin, invert); -+ -+ irq_num = gpiochip->to_irq(gpiochip, gpio_in_pin); -+ dprintk("to_irq %d\n", irq_num); -+ -+ /* if pin is high, then this must be an active low receiver. */ -+ if (sense == -1) { -+ /* wait 1/2 sec for the power supply */ -+ msleep(500); -+ -+ /* -+ * probe 9 times every 0.04s, collect "votes" for -+ * active high/low -+ */ -+ nlow = 0; -+ nhigh = 0; -+ for (i = 0; i < 9; i++) { -+ if (gpiochip->get(gpiochip, gpio_in_pin)) -+ nlow++; -+ else -+ nhigh++; -+ msleep(40); -+ } -+ sense = (nlow >= nhigh ? 1 : 0); -+ printk(KERN_INFO LIRC_DRIVER_NAME -+ ": auto-detected active %s receiver on GPIO pin %d\n", -+ sense ? "low" : "high", gpio_in_pin); -+ } else { -+ printk(KERN_INFO LIRC_DRIVER_NAME -+ ": manually using active %s receiver on GPIO pin %d\n", -+ sense ? "low" : "high", gpio_in_pin); -+ auto_sense = 0; -+ } -+ -+ return 0; -+} -+ -+// called when the character device is opened -+static int set_use_inc(void *data) -+{ -+ int result; -+ -+ /* initialize timestamp */ -+ do_gettimeofday(&lasttv); -+ -+ result = request_irq(irq_num, -+ (irq_handler_t) irq_handler, -+ IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING, -+ LIRC_DRIVER_NAME, (void*) 0); -+ -+ switch (result) { -+ case -EBUSY: -+ printk(KERN_ERR LIRC_DRIVER_NAME -+ ": IRQ %d is busy\n", -+ irq_num); -+ return -EBUSY; -+ case -EINVAL: -+ printk(KERN_ERR LIRC_DRIVER_NAME -+ ": Bad irq number or handler\n"); -+ return -EINVAL; -+ default: -+ dprintk("Interrupt %d obtained\n", -+ irq_num); -+ break; -+ }; -+ -+ /* initialize pulse/space widths */ -+ init_timing_params(duty_cycle, freq); -+ -+ return 0; -+} -+ -+static void set_use_dec(void *data) -+{ -+ /* GPIO Pin Falling/Rising Edge Detect Disable */ -+ irq_set_irq_type(irq_num, 0); -+ disable_irq(irq_num); -+ -+ free_irq(irq_num, (void *) 0); -+ -+ dprintk(KERN_INFO LIRC_DRIVER_NAME -+ ": freed IRQ %d\n", irq_num); -+} -+ -+static ssize_t lirc_write(struct file *file, const char *buf, -+ size_t n, loff_t *ppos) -+{ -+ int i, count; -+ unsigned long flags; -+ long delta = 0; -+ int *wbuf; -+ -+ count = n / sizeof(int); -+ if (n % sizeof(int) || count % 2 == 0) -+ return -EINVAL; -+ wbuf = memdup_user(buf, n); -+ if (IS_ERR(wbuf)) -+ return PTR_ERR(wbuf); -+ spin_lock_irqsave(&lock, flags); -+ -+ for (i = 0; i < count; i++) { -+ if (i%2) -+ send_space(wbuf[i] - delta); -+ else -+ delta = send_pulse(wbuf[i]); -+ } -+ gpiochip->set(gpiochip, gpio_out_pin, invert); -+ -+ spin_unlock_irqrestore(&lock, flags); -+ kfree(wbuf); -+ return n; -+} -+ -+static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) -+{ -+ int result; -+ __u32 value; -+ -+ switch (cmd) { -+ case LIRC_GET_SEND_MODE: -+ return -ENOIOCTLCMD; -+ break; -+ -+ case LIRC_SET_SEND_MODE: -+ result = get_user(value, (__u32 *) arg); -+ if (result) -+ return result; -+ /* only LIRC_MODE_PULSE supported */ -+ if (value != LIRC_MODE_PULSE) -+ return -ENOSYS; -+ break; -+ -+ case LIRC_GET_LENGTH: -+ return -ENOSYS; -+ break; -+ -+ case LIRC_SET_SEND_DUTY_CYCLE: -+ dprintk("SET_SEND_DUTY_CYCLE\n"); -+ result = get_user(value, (__u32 *) arg); -+ if (result) -+ return result; -+ if (value <= 0 || value > 100) -+ return -EINVAL; -+ return init_timing_params(value, freq); -+ break; -+ -+ case LIRC_SET_SEND_CARRIER: -+ dprintk("SET_SEND_CARRIER\n"); -+ result = get_user(value, (__u32 *) arg); -+ if (result) -+ return result; -+ if (value > 500000 || value < 20000) -+ return -EINVAL; -+ return init_timing_params(duty_cycle, value); -+ break; -+ -+ default: -+ return lirc_dev_fop_ioctl(filep, cmd, arg); -+ } -+ return 0; -+} -+ -+static const struct file_operations lirc_fops = { -+ .owner = THIS_MODULE, -+ .write = lirc_write, -+ .unlocked_ioctl = lirc_ioctl, -+ .read = lirc_dev_fop_read, -+ .poll = lirc_dev_fop_poll, -+ .open = lirc_dev_fop_open, -+ .release = lirc_dev_fop_close, -+ .llseek = no_llseek, -+}; -+ -+static struct lirc_driver driver = { -+ .name = LIRC_DRIVER_NAME, -+ .minor = -1, -+ .code_length = 1, -+ .sample_rate = 0, -+ .data = NULL, -+ .add_to_buf = NULL, -+ .rbuf = &rbuf, -+ .set_use_inc = set_use_inc, -+ .set_use_dec = set_use_dec, -+ .fops = &lirc_fops, -+ .dev = NULL, -+ .owner = THIS_MODULE, -+}; -+ -+static const struct of_device_id lirc_rpi_of_match[] = { -+ { .compatible = "rpi,lirc-rpi", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, lirc_rpi_of_match); -+ -+static struct platform_driver lirc_rpi_driver = { -+ .driver = { -+ .name = LIRC_DRIVER_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(lirc_rpi_of_match), -+ }, -+}; -+ -+static int __init lirc_rpi_init(void) -+{ -+ struct device_node *node; -+ int result; -+ -+ /* Init read buffer. */ -+ result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN); -+ if (result < 0) -+ return -ENOMEM; -+ -+ result = platform_driver_register(&lirc_rpi_driver); -+ if (result) { -+ printk(KERN_ERR LIRC_DRIVER_NAME -+ ": lirc register returned %d\n", result); -+ goto exit_buffer_free; -+ } -+ -+ node = of_find_compatible_node(NULL, NULL, -+ lirc_rpi_of_match[0].compatible); -+ -+ if (node) { -+ /* DT-enabled */ -+ lirc_rpi_dev = of_find_device_by_node(node); -+ WARN_ON(lirc_rpi_dev->dev.of_node != node); -+ of_node_put(node); -+ } -+ else { -+ lirc_rpi_dev = platform_device_alloc(LIRC_DRIVER_NAME, 0); -+ if (!lirc_rpi_dev) { -+ result = -ENOMEM; -+ goto exit_driver_unregister; -+ } -+ -+ result = platform_device_add(lirc_rpi_dev); -+ if (result) -+ goto exit_device_put; -+ } -+ -+ return 0; -+ -+ exit_device_put: -+ platform_device_put(lirc_rpi_dev); -+ -+ exit_driver_unregister: -+ platform_driver_unregister(&lirc_rpi_driver); -+ -+ exit_buffer_free: -+ lirc_buffer_free(&rbuf); -+ -+ return result; -+} -+ -+static void lirc_rpi_exit(void) -+{ -+ if (!lirc_rpi_dev->dev.of_node) -+ platform_device_unregister(lirc_rpi_dev); -+ platform_driver_unregister(&lirc_rpi_driver); -+ lirc_buffer_free(&rbuf); -+} -+ -+static int __init lirc_rpi_init_module(void) -+{ -+ int result; -+ -+ result = lirc_rpi_init(); -+ if (result) -+ return result; -+ -+ result = init_port(); -+ if (result < 0) -+ goto exit_rpi; -+ -+ driver.features = LIRC_CAN_SET_SEND_DUTY_CYCLE | -+ LIRC_CAN_SET_SEND_CARRIER | -+ LIRC_CAN_SEND_PULSE | -+ LIRC_CAN_REC_MODE2; -+ -+ driver.dev = &lirc_rpi_dev->dev; -+ driver.minor = lirc_register_driver(&driver); -+ -+ if (driver.minor < 0) { -+ printk(KERN_ERR LIRC_DRIVER_NAME -+ ": device registration failed with %d\n", result); -+ result = -EIO; -+ goto exit_rpi; -+ } -+ -+ printk(KERN_INFO LIRC_DRIVER_NAME ": driver registered!\n"); -+ -+ return 0; -+ -+ exit_rpi: -+ lirc_rpi_exit(); -+ -+ return result; -+} -+ -+static void __exit lirc_rpi_exit_module(void) -+{ -+ lirc_unregister_driver(driver.minor); -+ -+ gpio_free(gpio_out_pin); -+ gpio_free(gpio_in_pin); -+ -+ lirc_rpi_exit(); -+ -+ printk(KERN_INFO LIRC_DRIVER_NAME ": cleaned up module\n"); -+} -+ -+module_init(lirc_rpi_init_module); -+module_exit(lirc_rpi_exit_module); -+ -+MODULE_DESCRIPTION("Infra-red receiver and blaster driver for Raspberry Pi GPIO."); -+MODULE_AUTHOR("Aron Robert Szabo "); -+MODULE_AUTHOR("Michael Bishop "); -+MODULE_LICENSE("GPL"); -+ -+module_param(gpio_out_pin, int, S_IRUGO); -+MODULE_PARM_DESC(gpio_out_pin, "GPIO output/transmitter pin number of the BCM" -+ " processor. (default 17"); -+ -+module_param(gpio_in_pin, int, S_IRUGO); -+MODULE_PARM_DESC(gpio_in_pin, "GPIO input pin number of the BCM processor." -+ " (default 18"); -+ -+module_param(gpio_in_pull, int, S_IRUGO); -+MODULE_PARM_DESC(gpio_in_pull, "GPIO input pin pull configuration." -+ " (0 = off, 1 = up, 2 = down, default down)"); -+ -+module_param(sense, int, S_IRUGO); -+MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit" -+ " (0 = active high, 1 = active low )"); -+ -+module_param(softcarrier, bool, S_IRUGO); -+MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)"); -+ -+module_param(invert, bool, S_IRUGO); -+MODULE_PARM_DESC(invert, "Invert output (0 = off, 1 = on, default off"); -+ -+module_param(debug, bool, S_IRUGO | S_IWUSR); -+MODULE_PARM_DESC(debug, "Enable debugging messages"); ---- /dev/null -+++ b/include/linux/platform_data/bcm2708.h -@@ -0,0 +1,23 @@ -+/* -+ * include/linux/platform_data/bcm2708.h -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * (C) 2014 Julian Scheel -+ * -+ */ -+#ifndef __BCM2708_H_ -+#define __BCM2708_H_ -+ -+typedef enum { -+ BCM2708_PULL_OFF, -+ BCM2708_PULL_UP, -+ BCM2708_PULL_DOWN -+} bcm2708_gpio_pull_t; -+ -+extern int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset, -+ bcm2708_gpio_pull_t value); -+ -+#endif diff --git a/target/linux/brcm2708/patches-4.9/950-0047-Added-hwmon-thermal-driver-for-reporting-core-temper.patch b/target/linux/brcm2708/patches-4.9/950-0047-Added-hwmon-thermal-driver-for-reporting-core-temper.patch deleted file mode 100644 index cbae56b4b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0047-Added-hwmon-thermal-driver-for-reporting-core-temper.patch +++ /dev/null @@ -1,161 +0,0 @@ -From 3c847bc6c9d6f4115c82943c869c55244b39a5c4 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Tue, 26 Mar 2013 19:24:24 +0000 -Subject: [PATCH] Added hwmon/thermal driver for reporting core temperature. - Thanks Dorian -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -BCM270x: Move thermal sensor to Device Tree - -Add Device Tree support to bcm2835-thermal driver. -Add thermal sensor device to Device Tree. -Don't add platform device when booting in DT mode. - -Signed-off-by: Noralf Trønnes ---- - drivers/thermal/Kconfig | 7 +++ - drivers/thermal/Makefile | 1 + - drivers/thermal/bcm2835-thermal.c | 109 ++++++++++++++++++++++++++++++++++++++ - 3 files changed, 117 insertions(+) - create mode 100644 drivers/thermal/bcm2835-thermal.c - ---- a/drivers/thermal/Kconfig -+++ b/drivers/thermal/Kconfig -@@ -302,6 +302,13 @@ config INTEL_POWERCLAMP - enforce idle time which results in more package C-state residency. The - user interface is exposed via generic thermal framework. - -+config THERMAL_BCM2835 -+ depends on RASPBERRYPI_FIRMWARE -+ tristate "BCM2835 Thermal Driver" -+ help -+ This will enable temperature monitoring for the Broadcom BCM2835 -+ chip. If built as a module, it will be called 'bcm2835-thermal'. -+ - config X86_PKG_TEMP_THERMAL - tristate "X86 package temperature thermal driver" - depends on X86_THERMAL_VECTOR ---- a/drivers/thermal/Makefile -+++ b/drivers/thermal/Makefile -@@ -42,6 +42,7 @@ obj-$(CONFIG_MAX77620_THERMAL) += max776 - obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o - obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o - obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o -+obj-$(CONFIG_THERMAL_BCM2835) += bcm2835-thermal.o - obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o - obj-$(CONFIG_INTEL_SOC_DTS_IOSF_CORE) += intel_soc_dts_iosf.o - obj-$(CONFIG_INTEL_SOC_DTS_THERMAL) += intel_soc_dts_thermal.o ---- /dev/null -+++ b/drivers/thermal/bcm2835-thermal.c -@@ -0,0 +1,109 @@ -+/***************************************************************************** -+* Copyright 2011 Broadcom Corporation. All rights reserved. -+* -+* Unless you and Broadcom execute a separate written software license -+* agreement governing use of this software, this software is licensed to you -+* under the terms of the GNU General Public License version 2, available at -+* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). -+* -+* Notwithstanding the above, under no circumstances may you combine this -+* software in any way with any other Broadcom software provided under a -+* license other than the GPL, without Broadcom's express prior written -+* consent. -+*****************************************************************************/ -+ -+#include -+#include -+#include -+#include -+ -+static int bcm2835_thermal_get_property(struct thermal_zone_device *tz, -+ int *temp, u32 tag) -+{ -+ struct rpi_firmware *fw = tz->devdata; -+ struct { -+ u32 id; -+ u32 val; -+ } packet; -+ int ret; -+ -+ *temp = 0; -+ packet.id = 0; -+ ret = rpi_firmware_property(fw, tag, &packet, sizeof(packet)); -+ if (ret) { -+ dev_err(&tz->device, "Failed to get temperature\n"); -+ return ret; -+ } -+ -+ *temp = packet.val; -+ dev_dbg(&tz->device, "%stemp=%d\n", -+ tag == RPI_FIRMWARE_GET_MAX_TEMPERATURE ? "max" : "", *temp); -+ -+ return 0; -+} -+ -+static int bcm2835_thermal_get_temp(struct thermal_zone_device *tz, -+ int *temp) -+{ -+ return bcm2835_thermal_get_property(tz, temp, -+ RPI_FIRMWARE_GET_TEMPERATURE); -+} -+ -+static struct thermal_zone_device_ops ops = { -+ .get_temp = bcm2835_thermal_get_temp, -+}; -+ -+static int bcm2835_thermal_probe(struct platform_device *pdev) -+{ -+ struct device_node *fw_np; -+ struct rpi_firmware *fw; -+ struct thermal_zone_device *tz; -+ -+ fw_np = of_parse_phandle(pdev->dev.of_node, "firmware", 0); -+ if (!fw_np) { -+ dev_err(&pdev->dev, "Missing firmware node\n"); -+ return -ENOENT; -+ } -+ fw = rpi_firmware_get(fw_np); -+ if (!fw) -+ return -EPROBE_DEFER; -+ -+ tz = thermal_zone_device_register("bcm2835_thermal", 0, 0, fw, &ops, -+ NULL, 0, 0); -+ if (IS_ERR(tz)) { -+ dev_err(&pdev->dev, "Failed to register the thermal device\n"); -+ return PTR_ERR(tz); -+ } -+ -+ platform_set_drvdata(pdev, tz); -+ -+ return 0; -+} -+ -+static int bcm2835_thermal_remove(struct platform_device *pdev) -+{ -+ thermal_zone_device_unregister(platform_get_drvdata(pdev)); -+ -+ return 0; -+} -+ -+static const struct of_device_id bcm2835_thermal_of_match_table[] = { -+ { .compatible = "brcm,bcm2835-thermal", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, bcm2835_thermal_of_match_table); -+ -+static struct platform_driver bcm2835_thermal_driver = { -+ .probe = bcm2835_thermal_probe, -+ .remove = bcm2835_thermal_remove, -+ .driver = { -+ .name = "bcm2835_thermal", -+ .of_match_table = bcm2835_thermal_of_match_table, -+ }, -+}; -+module_platform_driver(bcm2835_thermal_driver); -+ -+MODULE_AUTHOR("Dorian Peake"); -+MODULE_AUTHOR("Noralf Trønnes"); -+MODULE_DESCRIPTION("Thermal driver for bcm2835 chip"); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm2708/patches-4.9/950-0051-bcm2835-add-v4l2-camera-device.patch b/target/linux/brcm2708/patches-4.9/950-0051-bcm2835-add-v4l2-camera-device.patch deleted file mode 100644 index e6baeabfd..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0051-bcm2835-add-v4l2-camera-device.patch +++ /dev/null @@ -1,7695 +0,0 @@ -From 88f7fe5348a24191969b07537b38449a83369d32 Mon Sep 17 00:00:00 2001 -From: Vincent Sanders -Date: Wed, 30 Jan 2013 12:45:18 +0000 -Subject: [PATCH] bcm2835: add v4l2 camera device - -- Supports raw YUV capture, preview, JPEG and H264. -- Uses videobuf2 for data transfer, using dma_buf. -- Uses 3.6.10 timestamping -- Camera power based on use -- Uses immutable input mode on video encoder - -Signed-off-by: Daniel Stone -Signed-off-by: Luke Diamand - -V4L2: Fixes from 6by9 - -V4L2: Fix EV values. Add manual shutter speed control - -V4L2 EV values should be in units of 1/1000. Corrected. -Add support for V4L2_CID_EXPOSURE_ABSOLUTE which should -give manual shutter control. Requires manual exposure mode -to be selected first. - -Signed-off-by: Dave Stevenson - -V4L2: Correct JPEG Q-factor range - -Should be 1-100, not 0-100 - -Signed-off-by: Dave Stevenson - -V4L2: Fix issue of driver jamming if STREAMON failed. - -Fix issue where the driver was left in a partially enabled -state if STREAMON failed, and would then reject many IOCTLs -as it thought it was streaming. - -Signed-off-by: Dave Stevenson - -V4L2: Fix ISO controls. - -Driver was passing the index to the GPU, and not the desired -ISO value. - -Signed-off-by: Dave Stevenson - -V4L2: Add flicker avoidance controls - -Add support for V4L2_CID_POWER_LINE_FREQUENCY to set flicker -avoidance frequencies. - -Signed-off-by: Dave Stevenson - -V4L2: Add support for frame rate control. - -Add support for frame rate (or time per frame as V4L2 -inverts it) control via s_parm. - -Signed-off-by: Dave Stevenson - -V4L2: Improve G_FBUF handling so we pass conformance - -Return some sane numbers for get framebuffer so that -we pass conformance. - -Signed-off-by: Dave Stevenson - -V4L2: Fix information advertised through g_vidfmt - -Width and height were being stored based on incorrect -values. - -Signed-off-by: Dave Stevenson - -V4L2: Add support for inline H264 headers - -Add support for V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER -to control H264 inline headers. -Requires firmware fix to work correctly, otherwise format -has to be set to H264 before this parameter is set. - -Signed-off-by: Dave Stevenson - -V4L2: Fix JPEG timestamp issue - -JPEG images were coming through from the GPU with timestamp -of 0. Detect this and give current system time instead -of some invalid value. - -Signed-off-by: Dave Stevenson - -V4L2: Fix issue when switching down JPEG resolution. - -JPEG buffer size calculation is based on input resolution. -Input resolution was being configured after output port -format. Caused failures if switching from one JPEG resolution -to a smaller one. - -Signed-off-by: Dave Stevenson - -V4L2: Enable MJPEG encoding - -Requires GPU firmware update to support MJPEG encoder. - -Signed-off-by: Dave Stevenson - -V4L2: Correct flag settings for compressed formats - -Set flags field correctly on enum_fmt_vid_cap for compressed -image formats. - -Signed-off-by: Dave Stevenson - -V4L2: H264 profile & level ctrls, FPS control and auto exp pri - -Several control handling updates. -H264 profile and level controls. -Timeperframe/FPS reworked to add V4L2_CID_EXPOSURE_AUTO_PRIORITY to -select whether AE is allowed to override the framerate specified. - -Signed-off-by: Dave Stevenson - -V4L2: Correct BGR24 to RGB24 in format table - -Signed-off-by: Dave Stevenson - -V4L2: Add additional pixel formats. Correct colourspace - -Adds the other flavours of YUYV, and NV12. -Corrects the overlay advertised colourspace. - -Signed-off-by: Dave Stevenson - -V4L2: Drop logging msg from info to debug - -Signed-off-by: Dave Stevenson - -V4L2: Initial pass at scene modes. - -Only supports exposure mode and metering modes. - -Signed-off-by: Dave Stevenson - -V4L2: Add manual white balance control. - -Adds support for V4L2_CID_RED_BALANCE and -V4L2_CID_BLUE_BALANCE. Only has an effect if -V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE has -V4L2_WHITE_BALANCE_MANUAL selected. - -Signed-off-by: Dave Stevenson - -config: Enable V4L / MMAL driver - -V4L2: Increase the MMAL timeout to 3sec - -MJPEG codec flush is now taking longer and results -in a kernel panic if the driver has stopped waiting for -the result when it finally completes. -Increase the timeout value from 1 to 3secs. - -Signed-off-by: Dave Stevenson - -V4L2: Add support for setting H264_I_PERIOD - -Adds support for the parameter V4L2_CID_MPEG_VIDEO_H264_I_PERIOD -to set the frequency with which I frames are produced. - -Signed-off-by: Dave Stevenson - -V4L2: Enable GPU function for removing padding from images. - -GPU can now support arbitrary strides, although may require -additional processing to achieve it. Enable this feature -so that the images delivered are the size requested. - -Signed-off-by: Dave Stevenson - -V4L2: Add support for V4L2_PIX_FMT_BGR32 - -Signed-off-by: Dave Stevenson - -V4L2: Set the colourspace to avoid odd YUV-RGB conversions - -Removes the amiguity from the conversion routines and stops -them dropping back to the SD vs HD choice of coeffs. - -Signed-off-by: Dave Stevenson - -V4L2: Make video/still threshold a run-time param - -Move the define for at what resolution the driver -switches from a video mode capture to a stills mode -capture to module parameters. - -Signed-off-by: Dave Stevenson - -V4L2: Fix incorrect pool sizing - -Signed-off-by: Dave Stevenson - -V4L2: Add option to disable enum_framesizes. - -Gstreamer's handling of a driver that advertises -V4L2_FRMSIZE_TYPE_STEPWISE to define the supported -resolutions is broken. See bug -https://bugzilla.gnome.org/show_bug.cgi?id=726521 - -Optional parameter of gst_v4l2src_is_broken added. -If non-zero, the driver claims not to support that -ioctl, and gstreamer should be happy again (it -guesses a set of defaults for itself). - -Signed-off-by: Dave Stevenson - -V4L2: Add support for more image formats - -Adds YVU420 (YV12), YVU420SP (NV21), and BGR888. - -Signed-off-by: Dave Stevenson - -V4L2: Extend range for V4L2_CID_MPEG_VIDEO_H264_I_PERIOD - -Request to extend the range from the fairly arbitrary -1000 frames (33 seconds at 30fps). Extend out to the -max range supported (int32 value). -Also allow 0, which is handled by the codec as only -send an I-frame on the first frame and never again. -There may be an exception if it detects a significant -scene change, but there's no easy way around that. - -Signed-off-by: Dave Stevenson - -bcm2835-camera: stop_streaming now has a void return - -BCM2835-V4L2: Fix compliance test failures - -VIDIOC_TRY_FMT and VIDIOC_S_FMT tests were faling due -to reporting V4L2_COLORSPACE_JPEG when the colour -format wasn't V4L2_PIX_FMT_JPEG. -Now reports V4L2_COLORSPACE_SMPTE170M for YUV formats. - -bcm2835 camera planar/packed stride length - -Added a field to the mmal_fmt struct used to compute the bytes per line -when using a particular format. This results in the correct stride being -calculated even when the format is planar. - -Signed-off-by: Garrett Wilson - -bcm2835: camera: check for scene not being found - -static analysis by cppcheck detected some potential NULL pointer -dereference issues: - -[drivers/media/platform/bcm2835/controls.c:854]: (error) Possible null - pointer dereference: scene - (and lines 858, 859 too) - -it is possible that scene is not found because of an invalue ctrl->val -and is therefore NULL and hence causing a null pointer dereference. - -Signed-off-by: Colin Ian King - -bcm2835: memcpy port data to m rather than rmsg - -static analysis by cppcheck detected a memcpy to rmsg which is -not actually initialized at that point. The memcpy should be copying -to variable m instead. - -Signed-off-by: Colin Ian King - -BCM2835-V4L2: Return buffers to videobuf2 on shutdown - -https://github.com/raspberrypi/linux/issues/817 -Fixes the kernel warning from videobuf2 as buffers -are now returned as they are being flushed on -stop_streaming. - -squash: Fixup bcm2835-camera for changes in kernel 4.4 api - -v4l2: Fix up driver to upstream timestamp changes - -bcm2835-camera: fix a bug in computation of frame timestamp - -Fixes #1318 - -V4L2 driver updates (#1393) - -* BCM2835-V4L2: Correct ISO control and add V4L2_CID_ISO_SENSITIVITY_AUTO - -https://github.com/raspberrypi/linux/issues/1251 - -V4L2_CID_ISO_SENSITIVITY was not advertising ISO*1000 as it should. -V4L2_CID_ISO_SENSITIVITY_AUTO was not implemented, so was taking -V4L2_CID_ISO_SENSITIVITY as 0 for auto mode. -Still accepts 0 for auto, but also abides by the new parameter. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -* BCM2835-V4L2: Add a video_nr parameter. - -Adds a kernel parameter "video_nr" to specify the preferred -/dev/videoX device node. -https://www.raspberrypi.org/forums/viewtopic.php?f=38&t=136120&p=905545 - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -* BCM2835-V4L2: Add support for multiple cameras - -Ask GPU on load how many cameras have been detected, and -enumerate that number of devices. -Only applicable on the Compute Module as no other device -exposes multiple CSI2 interfaces. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -* BCM2835-V4L2: Add control of the overlay location and alpha. - -Actually do something useful in vidioc_s_fmt_vid_overlay and -vidioc_try_fmt_vid_overlay, rather than effectively having -read-only fields. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -* BCM2835-V4L2: V4L2-Compliance failure fix - -VIDIOC_TRY_FMT was failing due to bytesperline not -being set correctly by default. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -* BCM2835-V4L2: Make all module parameters static - -Clean up to correct variable scope - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -V4L2: Request maximum resolution from GPU - -Get resolution information about the sensors from the GPU -and advertise it correctly. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -BCM2835-V4L2: Increase minimum resolution to 32x32 - -https://github.com/raspberrypi/linux/issues/1498 showed -up that 16x16 is failing to work on the GPU for some reason. - -GPU bug being tracked on -https://github.com/raspberrypi/firmware/issues/607 -Workaround here by increasing minimum resolution via V4L2 -to 32x32. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -[media]: bcm2835-camera: fix compilation error - -There is an error when compiling rpi-4.6.y branch: - CC [M] drivers/media/platform/bcm2835/bcm2835-camera.o -drivers/media/platform/bcm2835/bcm2835-camera.c:639:17: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types] - .queue_setup = queue_setup, - ^ -drivers/media/platform/bcm2835/bcm2835-camera.c:639:17: note: (near initialization for 'bm2835_mmal_video_qops.queue_setup') - -The const void *parg in setup_queue callback is not needed since commit: -df9ecb0cad14b952a2865f8b3af86b2bbadfab45. -This commit removes it. - -Signed-off-by: Slawomir Stepien - -bcm2835-camera: Fix max/min error when looping over cameras/resolutions - -See: https://github.com/raspberrypi/linux/issues/1447#issuecomment-221303506 - -BCM2835-V4L2: Correct handling for BGR24 vs RGB24. - -There was a bug in the GPU firmware that had reversed these -two formats. -Detect the old firmware, and reverse the formats if necessary. - -Signed-off-by: Dave Stevenson <6by9@users.noreply.github.com> - -BCM2835-v4l2: Fix a conformance test failure - -Format ioctls: - test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK - warn: v4l2-test-formats.cpp(1195): S_PARM is supported but - doesn't report V4L2_CAP_TIMEPERFRAME. - fail: v4l2-test-formats.cpp(1118): node->has_frmintervals - && !cap->capability ---- - Documentation/video4linux/bcm2835-v4l2.txt | 60 + - drivers/media/platform/Kconfig | 2 + - drivers/media/platform/Makefile | 2 + - drivers/media/platform/bcm2835/Kconfig | 25 + - drivers/media/platform/bcm2835/Makefile | 5 + - drivers/media/platform/bcm2835/bcm2835-camera.c | 2016 ++++++++++++++++++++++ - drivers/media/platform/bcm2835/bcm2835-camera.h | 145 ++ - drivers/media/platform/bcm2835/controls.c | 1345 +++++++++++++++ - drivers/media/platform/bcm2835/mmal-common.h | 53 + - drivers/media/platform/bcm2835/mmal-encodings.h | 127 ++ - drivers/media/platform/bcm2835/mmal-msg-common.h | 50 + - drivers/media/platform/bcm2835/mmal-msg-format.h | 81 + - drivers/media/platform/bcm2835/mmal-msg-port.h | 107 ++ - drivers/media/platform/bcm2835/mmal-msg.h | 404 +++++ - drivers/media/platform/bcm2835/mmal-parameters.h | 689 ++++++++ - drivers/media/platform/bcm2835/mmal-vchiq.c | 1916 ++++++++++++++++++++ - drivers/media/platform/bcm2835/mmal-vchiq.h | 178 ++ - 17 files changed, 7205 insertions(+) - create mode 100644 Documentation/video4linux/bcm2835-v4l2.txt - create mode 100644 drivers/media/platform/bcm2835/Kconfig - create mode 100644 drivers/media/platform/bcm2835/Makefile - create mode 100644 drivers/media/platform/bcm2835/bcm2835-camera.c - create mode 100644 drivers/media/platform/bcm2835/bcm2835-camera.h - create mode 100644 drivers/media/platform/bcm2835/controls.c - create mode 100644 drivers/media/platform/bcm2835/mmal-common.h - create mode 100644 drivers/media/platform/bcm2835/mmal-encodings.h - create mode 100644 drivers/media/platform/bcm2835/mmal-msg-common.h - create mode 100644 drivers/media/platform/bcm2835/mmal-msg-format.h - create mode 100644 drivers/media/platform/bcm2835/mmal-msg-port.h - create mode 100644 drivers/media/platform/bcm2835/mmal-msg.h - create mode 100644 drivers/media/platform/bcm2835/mmal-parameters.h - create mode 100644 drivers/media/platform/bcm2835/mmal-vchiq.c - create mode 100644 drivers/media/platform/bcm2835/mmal-vchiq.h - ---- /dev/null -+++ b/Documentation/video4linux/bcm2835-v4l2.txt -@@ -0,0 +1,60 @@ -+ -+BCM2835 (aka Raspberry Pi) V4L2 driver -+====================================== -+ -+1. Copyright -+============ -+ -+Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ -+2. License -+========== -+ -+This program is free software; you can redistribute it and/or modify -+it under the terms of the GNU General Public License as published by -+the Free Software Foundation; either version 2 of the License, or -+(at your option) any later version. -+ -+This program is distributed in the hope that it will be useful, -+but WITHOUT ANY WARRANTY; without even the implied warranty of -+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+GNU General Public License for more details. -+ -+You should have received a copy of the GNU General Public License -+along with this program; if not, write to the Free Software -+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ -+3. Quick Start -+============== -+ -+You need a version 1.0 or later of v4l2-ctl, available from: -+ git://git.linuxtv.org/v4l-utils.git -+ -+$ sudo modprobe bcm2835-v4l2 -+ -+Turn on the overlay: -+ -+$ v4l2-ctl --overlay=1 -+ -+Turn off the overlay: -+ -+$ v4l2-ctl --overlay=0 -+ -+Set the capture format for video: -+ -+$ v4l2-ctl --set-fmt-video=width=1920,height=1088,pixelformat=4 -+ -+(Note: 1088 not 1080). -+ -+Capture: -+ -+$ v4l2-ctl --stream-mmap=3 --stream-count=100 --stream-to=somefile.h264 -+ -+Stills capture: -+ -+$ v4l2-ctl --set-fmt-video=width=2592,height=1944,pixelformat=3 -+$ v4l2-ctl --stream-mmap=3 --stream-count=1 --stream-to=somefile.jpg -+ -+List of available formats: -+ -+$ v4l2-ctl --list-formats ---- a/drivers/media/platform/Kconfig -+++ b/drivers/media/platform/Kconfig -@@ -11,6 +11,8 @@ menuconfig V4L_PLATFORM_DRIVERS - - if V4L_PLATFORM_DRIVERS - -+source "drivers/media/platform/bcm2835/Kconfig" -+ - source "drivers/media/platform/marvell-ccic/Kconfig" - - config VIDEO_VIA_CAMERA ---- a/drivers/media/platform/Makefile -+++ b/drivers/media/platform/Makefile -@@ -2,6 +2,8 @@ - # Makefile for the video capture/playback device drivers. - # - -+obj-$(CONFIG_VIDEO_BCM2835) += bcm2835/ -+ - obj-$(CONFIG_VIDEO_M32R_AR_M64278) += arv.o - - obj-$(CONFIG_VIDEO_VIA_CAMERA) += via-camera.o ---- /dev/null -+++ b/drivers/media/platform/bcm2835/Kconfig -@@ -0,0 +1,25 @@ -+# Broadcom VideoCore IV v4l2 camera support -+ -+config VIDEO_BCM2835 -+ bool "Broadcom BCM2835 camera interface driver" -+ depends on VIDEO_V4L2 && ARCH_BCM2835 -+ ---help--- -+ Say Y here to enable camera host interface devices for -+ Broadcom BCM2835 SoC. This operates over the VCHIQ interface -+ to a service running on VideoCore. -+ -+ -+if VIDEO_BCM2835 -+ -+config VIDEO_BCM2835_MMAL -+ tristate "Broadcom BM2835 MMAL camera interface driver" -+ depends on BCM2708_VCHIQ -+ select VIDEOBUF2_VMALLOC -+ ---help--- -+ This is a V4L2 driver for the Broadcom BCM2835 MMAL camera host interface -+ -+ To compile this driver as a module, choose M here: the -+ module will be called bcm2835-v4l2.o -+ -+ -+endif # VIDEO_BM2835 ---- /dev/null -+++ b/drivers/media/platform/bcm2835/Makefile -@@ -0,0 +1,5 @@ -+bcm2835-v4l2-objs := bcm2835-camera.o controls.o mmal-vchiq.o -+ -+obj-$(CONFIG_VIDEO_BCM2835_MMAL) += bcm2835-v4l2.o -+ -+ccflags-$(CONFIG_VIDEO_BCM2835) += -Idrivers/staging/vc04_services -Idrivers/staging/vc04_services/interface/vcos/linuxkernel -D__VCCOREVER__=0x04000000 ---- /dev/null -+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c -@@ -0,0 +1,2016 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mmal-common.h" -+#include "mmal-encodings.h" -+#include "mmal-vchiq.h" -+#include "mmal-msg.h" -+#include "mmal-parameters.h" -+#include "bcm2835-camera.h" -+ -+#define BM2835_MMAL_VERSION "0.0.2" -+#define BM2835_MMAL_MODULE_NAME "bcm2835-v4l2" -+#define MIN_WIDTH 32 -+#define MIN_HEIGHT 32 -+#define MIN_BUFFER_SIZE (80*1024) -+ -+#define MAX_VIDEO_MODE_WIDTH 1280 -+#define MAX_VIDEO_MODE_HEIGHT 720 -+ -+#define MAX_BCM2835_CAMERAS 2 -+ -+MODULE_DESCRIPTION("Broadcom 2835 MMAL video capture"); -+MODULE_AUTHOR("Vincent Sanders"); -+MODULE_LICENSE("GPL"); -+MODULE_VERSION(BM2835_MMAL_VERSION); -+ -+int bcm2835_v4l2_debug; -+module_param_named(debug, bcm2835_v4l2_debug, int, 0644); -+MODULE_PARM_DESC(bcm2835_v4l2_debug, "Debug level 0-2"); -+ -+#define UNSET (-1) -+static int video_nr[] = {[0 ... (MAX_BCM2835_CAMERAS - 1)] = UNSET }; -+module_param_array(video_nr, int, NULL, 0644); -+MODULE_PARM_DESC(video_nr, "videoX start numbers, -1 is autodetect"); -+ -+static int max_video_width = MAX_VIDEO_MODE_WIDTH; -+static int max_video_height = MAX_VIDEO_MODE_HEIGHT; -+module_param(max_video_width, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); -+MODULE_PARM_DESC(max_video_width, "Threshold for video mode"); -+module_param(max_video_height, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); -+MODULE_PARM_DESC(max_video_height, "Threshold for video mode"); -+ -+/* Gstreamer bug https://bugzilla.gnome.org/show_bug.cgi?id=726521 -+ * v4l2src does bad (and actually wrong) things when the vidioc_enum_framesizes -+ * function says type V4L2_FRMSIZE_TYPE_STEPWISE, which we do by default. -+ * It's happier if we just don't say anything at all, when it then -+ * sets up a load of defaults that it thinks might work. -+ * If gst_v4l2src_is_broken is non-zero, then we remove the function from -+ * our function table list (actually switch to an alternate set, but same -+ * result). -+ */ -+static int gst_v4l2src_is_broken; -+module_param(gst_v4l2src_is_broken, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH); -+MODULE_PARM_DESC(gst_v4l2src_is_broken, "If non-zero, enable workaround for Gstreamer"); -+ -+/* global device data array */ -+static struct bm2835_mmal_dev *gdev[MAX_BCM2835_CAMERAS]; -+ -+#define FPS_MIN 1 -+#define FPS_MAX 90 -+ -+/* timeperframe: min/max and default */ -+static const struct v4l2_fract -+ tpf_min = {.numerator = 1, .denominator = FPS_MAX}, -+ tpf_max = {.numerator = 1, .denominator = FPS_MIN}, -+ tpf_default = {.numerator = 1000, .denominator = 30000}; -+ -+/* video formats */ -+static struct mmal_fmt formats[] = { -+ { -+ .name = "4:2:0, planar, YUV", -+ .fourcc = V4L2_PIX_FMT_YUV420, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_I420, -+ .depth = 12, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 1, -+ }, -+ { -+ .name = "4:2:2, packed, YUYV", -+ .fourcc = V4L2_PIX_FMT_YUYV, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_YUYV, -+ .depth = 16, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 2, -+ }, -+ { -+ .name = "RGB24 (LE)", -+ .fourcc = V4L2_PIX_FMT_RGB24, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_RGB24, -+ .depth = 24, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 3, -+ }, -+ { -+ .name = "JPEG", -+ .fourcc = V4L2_PIX_FMT_JPEG, -+ .flags = V4L2_FMT_FLAG_COMPRESSED, -+ .mmal = MMAL_ENCODING_JPEG, -+ .depth = 8, -+ .mmal_component = MMAL_COMPONENT_IMAGE_ENCODE, -+ .ybbp = 0, -+ }, -+ { -+ .name = "H264", -+ .fourcc = V4L2_PIX_FMT_H264, -+ .flags = V4L2_FMT_FLAG_COMPRESSED, -+ .mmal = MMAL_ENCODING_H264, -+ .depth = 8, -+ .mmal_component = MMAL_COMPONENT_VIDEO_ENCODE, -+ .ybbp = 0, -+ }, -+ { -+ .name = "MJPEG", -+ .fourcc = V4L2_PIX_FMT_MJPEG, -+ .flags = V4L2_FMT_FLAG_COMPRESSED, -+ .mmal = MMAL_ENCODING_MJPEG, -+ .depth = 8, -+ .mmal_component = MMAL_COMPONENT_VIDEO_ENCODE, -+ .ybbp = 0, -+ }, -+ { -+ .name = "4:2:2, packed, YVYU", -+ .fourcc = V4L2_PIX_FMT_YVYU, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_YVYU, -+ .depth = 16, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 2, -+ }, -+ { -+ .name = "4:2:2, packed, VYUY", -+ .fourcc = V4L2_PIX_FMT_VYUY, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_VYUY, -+ .depth = 16, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 2, -+ }, -+ { -+ .name = "4:2:2, packed, UYVY", -+ .fourcc = V4L2_PIX_FMT_UYVY, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_UYVY, -+ .depth = 16, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 2, -+ }, -+ { -+ .name = "4:2:0, planar, NV12", -+ .fourcc = V4L2_PIX_FMT_NV12, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_NV12, -+ .depth = 12, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 1, -+ }, -+ { -+ .name = "RGB24 (BE)", -+ .fourcc = V4L2_PIX_FMT_BGR24, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_BGR24, -+ .depth = 24, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 3, -+ }, -+ { -+ .name = "4:2:0, planar, YVU", -+ .fourcc = V4L2_PIX_FMT_YVU420, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_YV12, -+ .depth = 12, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 1, -+ }, -+ { -+ .name = "4:2:0, planar, NV21", -+ .fourcc = V4L2_PIX_FMT_NV21, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_NV21, -+ .depth = 12, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 1, -+ }, -+ { -+ .name = "RGB32 (BE)", -+ .fourcc = V4L2_PIX_FMT_BGR32, -+ .flags = 0, -+ .mmal = MMAL_ENCODING_BGRA, -+ .depth = 32, -+ .mmal_component = MMAL_COMPONENT_CAMERA, -+ .ybbp = 4, -+ }, -+}; -+ -+static struct mmal_fmt *get_format(struct v4l2_format *f) -+{ -+ struct mmal_fmt *fmt; -+ unsigned int k; -+ -+ for (k = 0; k < ARRAY_SIZE(formats); k++) { -+ fmt = &formats[k]; -+ if (fmt->fourcc == f->fmt.pix.pixelformat) -+ break; -+ } -+ -+ if (k == ARRAY_SIZE(formats)) -+ return NULL; -+ -+ return &formats[k]; -+} -+ -+/* ------------------------------------------------------------------ -+ Videobuf queue operations -+ ------------------------------------------------------------------*/ -+ -+static int queue_setup(struct vb2_queue *vq, -+ unsigned int *nbuffers, unsigned int *nplanes, -+ unsigned int sizes[], struct device *alloc_ctxs[]) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); -+ unsigned long size; -+ -+ /* refuse queue setup if port is not configured */ -+ if (dev->capture.port == NULL) { -+ v4l2_err(&dev->v4l2_dev, -+ "%s: capture port not configured\n", __func__); -+ return -EINVAL; -+ } -+ -+ size = dev->capture.port->current_buffer.size; -+ if (size == 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "%s: capture port buffer size is zero\n", __func__); -+ return -EINVAL; -+ } -+ -+ if (*nbuffers < (dev->capture.port->current_buffer.num + 2)) -+ *nbuffers = (dev->capture.port->current_buffer.num + 2); -+ -+ *nplanes = 1; -+ -+ sizes[0] = size; -+ -+ /* -+ * videobuf2-vmalloc allocator is context-less so no need to set -+ * alloc_ctxs array. -+ */ -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", -+ __func__, dev); -+ -+ return 0; -+} -+ -+static int buffer_prepare(struct vb2_buffer *vb) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); -+ unsigned long size; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", -+ __func__, dev); -+ -+ BUG_ON(dev->capture.port == NULL); -+ BUG_ON(dev->capture.fmt == NULL); -+ -+ size = dev->capture.stride * dev->capture.height; -+ if (vb2_plane_size(vb, 0) < size) { -+ v4l2_err(&dev->v4l2_dev, -+ "%s data will not fit into plane (%lu < %lu)\n", -+ __func__, vb2_plane_size(vb, 0), size); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static inline bool is_capturing(struct bm2835_mmal_dev *dev) -+{ -+ return dev->capture.camera_port == -+ &dev-> -+ component[MMAL_COMPONENT_CAMERA]->output[MMAL_CAMERA_PORT_CAPTURE]; -+} -+ -+static void buffer_cb(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ int status, -+ struct mmal_buffer *buf, -+ unsigned long length, u32 mmal_flags, s64 dts, s64 pts) -+{ -+ struct bm2835_mmal_dev *dev = port->cb_ctx; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: status:%d, buf:%p, length:%lu, flags %u, pts %lld\n", -+ __func__, status, buf, length, mmal_flags, pts); -+ -+ if (status != 0) { -+ /* error in transfer */ -+ if (buf != NULL) { -+ /* there was a buffer with the error so return it */ -+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); -+ } -+ return; -+ } else if (length == 0) { -+ /* stream ended */ -+ if (buf != NULL) { -+ /* this should only ever happen if the port is -+ * disabled and there are buffers still queued -+ */ -+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); -+ pr_debug("Empty buffer"); -+ } else if (dev->capture.frame_count) { -+ /* grab another frame */ -+ if (is_capturing(dev)) { -+ pr_debug("Grab another frame"); -+ vchiq_mmal_port_parameter_set( -+ instance, -+ dev->capture. -+ camera_port, -+ MMAL_PARAMETER_CAPTURE, -+ &dev->capture. -+ frame_count, -+ sizeof(dev->capture.frame_count)); -+ } -+ } else { -+ /* signal frame completion */ -+ complete(&dev->capture.frame_cmplt); -+ } -+ } else { -+ if (dev->capture.frame_count) { -+ if (dev->capture.vc_start_timestamp != -1 && -+ pts != 0) { -+ struct timeval timestamp; -+ s64 runtime_us = pts - -+ dev->capture.vc_start_timestamp; -+ u32 div = 0; -+ u32 rem = 0; -+ -+ div = -+ div_u64_rem(runtime_us, USEC_PER_SEC, &rem); -+ timestamp.tv_sec = -+ dev->capture.kernel_start_ts.tv_sec + div; -+ timestamp.tv_usec = -+ dev->capture.kernel_start_ts.tv_usec + rem; -+ -+ if (timestamp.tv_usec >= -+ USEC_PER_SEC) { -+ timestamp.tv_sec++; -+ timestamp.tv_usec -= -+ USEC_PER_SEC; -+ } -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Convert start time %d.%06d and %llu " -+ "with offset %llu to %d.%06d\n", -+ (int)dev->capture.kernel_start_ts. -+ tv_sec, -+ (int)dev->capture.kernel_start_ts. -+ tv_usec, -+ dev->capture.vc_start_timestamp, pts, -+ (int)timestamp.tv_sec, -+ (int)timestamp.tv_usec); -+ buf->vb.vb2_buf.timestamp = timestamp.tv_sec * 1000000000ULL + -+ timestamp.tv_usec * 1000ULL; -+ } else { -+ buf->vb.vb2_buf.timestamp = ktime_get_ns(); -+ } -+ -+ vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); -+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); -+ -+ if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && -+ is_capturing(dev)) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Grab another frame as buffer has EOS"); -+ vchiq_mmal_port_parameter_set( -+ instance, -+ dev->capture. -+ camera_port, -+ MMAL_PARAMETER_CAPTURE, -+ &dev->capture. -+ frame_count, -+ sizeof(dev->capture.frame_count)); -+ } -+ } else { -+ /* signal frame completion */ -+ vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); -+ complete(&dev->capture.frame_cmplt); -+ } -+ } -+} -+ -+static int enable_camera(struct bm2835_mmal_dev *dev) -+{ -+ int ret; -+ if (!dev->camera_use_count) { -+ ret = vchiq_mmal_port_parameter_set( -+ dev->instance, -+ &dev->component[MMAL_COMPONENT_CAMERA]->control, -+ MMAL_PARAMETER_CAMERA_NUM, &dev->camera_num, -+ sizeof(dev->camera_num)); -+ if (ret < 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed setting camera num, ret %d\n", ret); -+ return -EINVAL; -+ } -+ -+ ret = vchiq_mmal_component_enable( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_CAMERA]); -+ if (ret < 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed enabling camera, ret %d\n", ret); -+ return -EINVAL; -+ } -+ } -+ dev->camera_use_count++; -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, "enabled camera (refcount %d)\n", -+ dev->camera_use_count); -+ return 0; -+} -+ -+static int disable_camera(struct bm2835_mmal_dev *dev) -+{ -+ int ret; -+ if (!dev->camera_use_count) { -+ v4l2_err(&dev->v4l2_dev, -+ "Disabled the camera when already disabled\n"); -+ return -EINVAL; -+ } -+ dev->camera_use_count--; -+ if (!dev->camera_use_count) { -+ unsigned int i = 0xFFFFFFFF; -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Disabling camera\n"); -+ ret = -+ vchiq_mmal_component_disable( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_CAMERA]); -+ if (ret < 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed disabling camera, ret %d\n", ret); -+ return -EINVAL; -+ } -+ vchiq_mmal_port_parameter_set( -+ dev->instance, -+ &dev->component[MMAL_COMPONENT_CAMERA]->control, -+ MMAL_PARAMETER_CAMERA_NUM, &i, -+ sizeof(i)); -+ } -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Camera refcount now %d\n", dev->camera_use_count); -+ return 0; -+} -+ -+static void buffer_queue(struct vb2_buffer *vb) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vb->vb2_queue); -+ struct vb2_v4l2_buffer *vb2 = to_vb2_v4l2_buffer(vb); -+ struct mmal_buffer *buf = container_of(vb2, struct mmal_buffer, vb); -+ int ret; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: dev:%p buf:%p\n", __func__, dev, buf); -+ -+ buf->buffer = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); -+ buf->buffer_size = vb2_plane_size(&buf->vb.vb2_buf, 0); -+ -+ ret = vchiq_mmal_submit_buffer(dev->instance, dev->capture.port, buf); -+ if (ret < 0) -+ v4l2_err(&dev->v4l2_dev, "%s: error submitting buffer\n", -+ __func__); -+} -+ -+static int start_streaming(struct vb2_queue *vq, unsigned int count) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); -+ int ret; -+ int parameter_size; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", -+ __func__, dev); -+ -+ /* ensure a format has actually been set */ -+ if (dev->capture.port == NULL) -+ return -EINVAL; -+ -+ if (enable_camera(dev) < 0) { -+ v4l2_err(&dev->v4l2_dev, "Failed to enable camera\n"); -+ return -EINVAL; -+ } -+ -+ /*init_completion(&dev->capture.frame_cmplt); */ -+ -+ /* enable frame capture */ -+ dev->capture.frame_count = 1; -+ -+ /* if the preview is not already running, wait for a few frames for AGC -+ * to settle down. -+ */ -+ if (!dev->component[MMAL_COMPONENT_PREVIEW]->enabled) -+ msleep(300); -+ -+ /* enable the connection from camera to encoder (if applicable) */ -+ if (dev->capture.camera_port != dev->capture.port -+ && dev->capture.camera_port) { -+ ret = vchiq_mmal_port_enable(dev->instance, -+ dev->capture.camera_port, NULL); -+ if (ret) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed to enable encode tunnel - error %d\n", -+ ret); -+ return -1; -+ } -+ } -+ -+ /* Get VC timestamp at this point in time */ -+ parameter_size = sizeof(dev->capture.vc_start_timestamp); -+ if (vchiq_mmal_port_parameter_get(dev->instance, -+ dev->capture.camera_port, -+ MMAL_PARAMETER_SYSTEM_TIME, -+ &dev->capture.vc_start_timestamp, -+ ¶meter_size)) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed to get VC start time - update your VC f/w\n"); -+ -+ /* Flag to indicate just to rely on kernel timestamps */ -+ dev->capture.vc_start_timestamp = -1; -+ } else -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Start time %lld size %d\n", -+ dev->capture.vc_start_timestamp, parameter_size); -+ -+ v4l2_get_timestamp(&dev->capture.kernel_start_ts); -+ -+ /* enable the camera port */ -+ dev->capture.port->cb_ctx = dev; -+ ret = -+ vchiq_mmal_port_enable(dev->instance, dev->capture.port, buffer_cb); -+ if (ret) { -+ v4l2_err(&dev->v4l2_dev, -+ "Failed to enable capture port - error %d. " -+ "Disabling camera port again\n", ret); -+ -+ vchiq_mmal_port_disable(dev->instance, -+ dev->capture.camera_port); -+ if (disable_camera(dev) < 0) { -+ v4l2_err(&dev->v4l2_dev, "Failed to disable camera\n"); -+ return -EINVAL; -+ } -+ return -1; -+ } -+ -+ /* capture the first frame */ -+ vchiq_mmal_port_parameter_set(dev->instance, -+ dev->capture.camera_port, -+ MMAL_PARAMETER_CAPTURE, -+ &dev->capture.frame_count, -+ sizeof(dev->capture.frame_count)); -+ return 0; -+} -+ -+/* abort streaming and wait for last buffer */ -+static void stop_streaming(struct vb2_queue *vq) -+{ -+ int ret; -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "%s: dev:%p\n", -+ __func__, dev); -+ -+ init_completion(&dev->capture.frame_cmplt); -+ dev->capture.frame_count = 0; -+ -+ /* ensure a format has actually been set */ -+ if (dev->capture.port == NULL) { -+ v4l2_err(&dev->v4l2_dev, -+ "no capture port - stream not started?\n"); -+ return; -+ } -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "stopping capturing\n"); -+ -+ /* stop capturing frames */ -+ vchiq_mmal_port_parameter_set(dev->instance, -+ dev->capture.camera_port, -+ MMAL_PARAMETER_CAPTURE, -+ &dev->capture.frame_count, -+ sizeof(dev->capture.frame_count)); -+ -+ /* wait for last frame to complete */ -+ ret = wait_for_completion_timeout(&dev->capture.frame_cmplt, HZ); -+ if (ret <= 0) -+ v4l2_err(&dev->v4l2_dev, -+ "error %d waiting for frame completion\n", ret); -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "disabling connection\n"); -+ -+ /* disable the connection from camera to encoder */ -+ ret = vchiq_mmal_port_disable(dev->instance, dev->capture.camera_port); -+ if (!ret && dev->capture.camera_port != dev->capture.port) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "disabling port\n"); -+ ret = vchiq_mmal_port_disable(dev->instance, dev->capture.port); -+ } else if (dev->capture.camera_port != dev->capture.port) { -+ v4l2_err(&dev->v4l2_dev, "port_disable failed, error %d\n", -+ ret); -+ } -+ -+ if (disable_camera(dev) < 0) -+ v4l2_err(&dev->v4l2_dev, "Failed to disable camera\n"); -+} -+ -+static void bm2835_mmal_lock(struct vb2_queue *vq) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); -+ mutex_lock(&dev->mutex); -+} -+ -+static void bm2835_mmal_unlock(struct vb2_queue *vq) -+{ -+ struct bm2835_mmal_dev *dev = vb2_get_drv_priv(vq); -+ mutex_unlock(&dev->mutex); -+} -+ -+static struct vb2_ops bm2835_mmal_video_qops = { -+ .queue_setup = queue_setup, -+ .buf_prepare = buffer_prepare, -+ .buf_queue = buffer_queue, -+ .start_streaming = start_streaming, -+ .stop_streaming = stop_streaming, -+ .wait_prepare = bm2835_mmal_unlock, -+ .wait_finish = bm2835_mmal_lock, -+}; -+ -+/* ------------------------------------------------------------------ -+ IOCTL operations -+ ------------------------------------------------------------------*/ -+ -+static int set_overlay_params(struct bm2835_mmal_dev *dev, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ struct mmal_parameter_displayregion prev_config = { -+ .set = MMAL_DISPLAY_SET_LAYER | MMAL_DISPLAY_SET_ALPHA | -+ MMAL_DISPLAY_SET_DEST_RECT | MMAL_DISPLAY_SET_FULLSCREEN, -+ .layer = PREVIEW_LAYER, -+ .alpha = dev->overlay.global_alpha, -+ .fullscreen = 0, -+ .dest_rect = { -+ .x = dev->overlay.w.left, -+ .y = dev->overlay.w.top, -+ .width = dev->overlay.w.width, -+ .height = dev->overlay.w.height, -+ }, -+ }; -+ ret = vchiq_mmal_port_parameter_set(dev->instance, port, -+ MMAL_PARAMETER_DISPLAYREGION, -+ &prev_config, sizeof(prev_config)); -+ -+ return ret; -+} -+ -+/* overlay ioctl */ -+static int vidioc_enum_fmt_vid_overlay(struct file *file, void *priv, -+ struct v4l2_fmtdesc *f) -+{ -+ struct mmal_fmt *fmt; -+ -+ if (f->index >= ARRAY_SIZE(formats)) -+ return -EINVAL; -+ -+ fmt = &formats[f->index]; -+ -+ strlcpy(f->description, fmt->name, sizeof(f->description)); -+ f->pixelformat = fmt->fourcc; -+ f->flags = fmt->flags; -+ -+ return 0; -+} -+ -+static int vidioc_g_fmt_vid_overlay(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ -+ f->fmt.win = dev->overlay; -+ -+ return 0; -+} -+ -+static int vidioc_try_fmt_vid_overlay(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ -+ f->fmt.win.field = V4L2_FIELD_NONE; -+ f->fmt.win.chromakey = 0; -+ f->fmt.win.clips = NULL; -+ f->fmt.win.clipcount = 0; -+ f->fmt.win.bitmap = NULL; -+ -+ v4l_bound_align_image(&f->fmt.win.w.width, MIN_WIDTH, dev->max_width, 1, -+ &f->fmt.win.w.height, MIN_HEIGHT, dev->max_height, -+ 1, 0); -+ v4l_bound_align_image(&f->fmt.win.w.left, MIN_WIDTH, dev->max_width, 1, -+ &f->fmt.win.w.top, MIN_HEIGHT, dev->max_height, -+ 1, 0); -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Overlay: Now w/h %dx%d l/t %dx%d\n", -+ f->fmt.win.w.width, f->fmt.win.w.height, -+ f->fmt.win.w.left, f->fmt.win.w.top); -+ -+ v4l2_dump_win_format(1, -+ bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ &f->fmt.win, -+ __func__); -+ return 0; -+} -+ -+static int vidioc_s_fmt_vid_overlay(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ -+ vidioc_try_fmt_vid_overlay(file, priv, f); -+ -+ dev->overlay = f->fmt.win; -+ if (dev->component[MMAL_COMPONENT_PREVIEW]->enabled) { -+ set_overlay_params(dev, -+ &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]); -+ } -+ -+ return 0; -+} -+ -+static int vidioc_overlay(struct file *file, void *f, unsigned int on) -+{ -+ int ret; -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ struct vchiq_mmal_port *src; -+ struct vchiq_mmal_port *dst; -+ if ((on && dev->component[MMAL_COMPONENT_PREVIEW]->enabled) || -+ (!on && !dev->component[MMAL_COMPONENT_PREVIEW]->enabled)) -+ return 0; /* already in requested state */ -+ -+ src = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_PREVIEW]; -+ -+ if (!on) { -+ /* disconnect preview ports and disable component */ -+ ret = vchiq_mmal_port_disable(dev->instance, src); -+ if (!ret) -+ ret = -+ vchiq_mmal_port_connect_tunnel(dev->instance, src, -+ NULL); -+ if (ret >= 0) -+ ret = vchiq_mmal_component_disable( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_PREVIEW]); -+ -+ disable_camera(dev); -+ return ret; -+ } -+ -+ /* set preview port format and connect it to output */ -+ dst = &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]; -+ -+ ret = vchiq_mmal_port_set_format(dev->instance, src); -+ if (ret < 0) -+ goto error; -+ -+ ret = set_overlay_params(dev, dst); -+ if (ret < 0) -+ goto error; -+ -+ if (enable_camera(dev) < 0) -+ goto error; -+ -+ ret = vchiq_mmal_component_enable( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_PREVIEW]); -+ if (ret < 0) -+ goto error; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, "connecting %p to %p\n", -+ src, dst); -+ ret = vchiq_mmal_port_connect_tunnel(dev->instance, src, dst); -+ if (!ret) -+ ret = vchiq_mmal_port_enable(dev->instance, src, NULL); -+error: -+ return ret; -+} -+ -+static int vidioc_g_fbuf(struct file *file, void *fh, -+ struct v4l2_framebuffer *a) -+{ -+ /* The video overlay must stay within the framebuffer and can't be -+ positioned independently. */ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ struct vchiq_mmal_port *preview_port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_PREVIEW]; -+ -+ a->capability = V4L2_FBUF_CAP_EXTERNOVERLAY | -+ V4L2_FBUF_CAP_GLOBAL_ALPHA; -+ a->flags = V4L2_FBUF_FLAG_OVERLAY; -+ a->fmt.width = preview_port->es.video.width; -+ a->fmt.height = preview_port->es.video.height; -+ a->fmt.pixelformat = V4L2_PIX_FMT_YUV420; -+ a->fmt.bytesperline = preview_port->es.video.width; -+ a->fmt.sizeimage = (preview_port->es.video.width * -+ preview_port->es.video.height * 3)>>1; -+ a->fmt.colorspace = V4L2_COLORSPACE_SMPTE170M; -+ -+ return 0; -+} -+ -+/* input ioctls */ -+static int vidioc_enum_input(struct file *file, void *priv, -+ struct v4l2_input *inp) -+{ -+ /* only a single camera input */ -+ if (inp->index != 0) -+ return -EINVAL; -+ -+ inp->type = V4L2_INPUT_TYPE_CAMERA; -+ sprintf(inp->name, "Camera %u", inp->index); -+ return 0; -+} -+ -+static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) -+{ -+ *i = 0; -+ return 0; -+} -+ -+static int vidioc_s_input(struct file *file, void *priv, unsigned int i) -+{ -+ if (i != 0) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+/* capture ioctls */ -+static int vidioc_querycap(struct file *file, void *priv, -+ struct v4l2_capability *cap) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ u32 major; -+ u32 minor; -+ -+ vchiq_mmal_version(dev->instance, &major, &minor); -+ -+ strcpy(cap->driver, "bm2835 mmal"); -+ snprintf(cap->card, sizeof(cap->card), "mmal service %d.%d", -+ major, minor); -+ -+ snprintf(cap->bus_info, sizeof(cap->bus_info), -+ "platform:%s", dev->v4l2_dev.name); -+ cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OVERLAY | -+ V4L2_CAP_STREAMING | V4L2_CAP_READWRITE; -+ cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS; -+ -+ return 0; -+} -+ -+static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, -+ struct v4l2_fmtdesc *f) -+{ -+ struct mmal_fmt *fmt; -+ -+ if (f->index >= ARRAY_SIZE(formats)) -+ return -EINVAL; -+ -+ fmt = &formats[f->index]; -+ -+ strlcpy(f->description, fmt->name, sizeof(f->description)); -+ f->pixelformat = fmt->fourcc; -+ f->flags = fmt->flags; -+ -+ return 0; -+} -+ -+static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ -+ f->fmt.pix.width = dev->capture.width; -+ f->fmt.pix.height = dev->capture.height; -+ f->fmt.pix.field = V4L2_FIELD_NONE; -+ f->fmt.pix.pixelformat = dev->capture.fmt->fourcc; -+ f->fmt.pix.bytesperline = dev->capture.stride; -+ f->fmt.pix.sizeimage = dev->capture.buffersize; -+ -+ if (dev->capture.fmt->fourcc == V4L2_PIX_FMT_RGB24) -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB; -+ else if (dev->capture.fmt->fourcc == V4L2_PIX_FMT_JPEG) -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_JPEG; -+ else -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; -+ f->fmt.pix.priv = 0; -+ -+ v4l2_dump_pix_format(1, bcm2835_v4l2_debug, &dev->v4l2_dev, &f->fmt.pix, -+ __func__); -+ return 0; -+} -+ -+static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ struct mmal_fmt *mfmt; -+ -+ mfmt = get_format(f); -+ if (!mfmt) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Fourcc format (0x%08x) unknown.\n", -+ f->fmt.pix.pixelformat); -+ f->fmt.pix.pixelformat = formats[0].fourcc; -+ mfmt = get_format(f); -+ } -+ -+ f->fmt.pix.field = V4L2_FIELD_NONE; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Clipping/aligning %dx%d format %08X\n", -+ f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.pixelformat); -+ -+ v4l_bound_align_image(&f->fmt.pix.width, MIN_WIDTH, dev->max_width, 1, -+ &f->fmt.pix.height, MIN_HEIGHT, dev->max_height, -+ 1, 0); -+ f->fmt.pix.bytesperline = f->fmt.pix.width * mfmt->ybbp; -+ -+ /* Image buffer has to be padded to allow for alignment, even though -+ * we then remove that padding before delivering the buffer. -+ */ -+ f->fmt.pix.sizeimage = ((f->fmt.pix.height+15)&~15) * -+ (((f->fmt.pix.width+31)&~31) * mfmt->depth) >> 3; -+ -+ if ((mfmt->flags & V4L2_FMT_FLAG_COMPRESSED) && -+ f->fmt.pix.sizeimage < MIN_BUFFER_SIZE) -+ f->fmt.pix.sizeimage = MIN_BUFFER_SIZE; -+ -+ if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB; -+ else if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_JPEG) -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_JPEG; -+ else -+ f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; -+ f->fmt.pix.priv = 0; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Now %dx%d format %08X\n", -+ f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.pixelformat); -+ -+ v4l2_dump_pix_format(1, bcm2835_v4l2_debug, &dev->v4l2_dev, &f->fmt.pix, -+ __func__); -+ return 0; -+} -+ -+static int mmal_setup_components(struct bm2835_mmal_dev *dev, -+ struct v4l2_format *f) -+{ -+ int ret; -+ struct vchiq_mmal_port *port = NULL, *camera_port = NULL; -+ struct vchiq_mmal_component *encode_component = NULL; -+ struct mmal_fmt *mfmt = get_format(f); -+ -+ BUG_ON(!mfmt); -+ -+ if (dev->capture.encode_component) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "vid_cap - disconnect previous tunnel\n"); -+ -+ /* Disconnect any previous connection */ -+ vchiq_mmal_port_connect_tunnel(dev->instance, -+ dev->capture.camera_port, NULL); -+ dev->capture.camera_port = NULL; -+ ret = vchiq_mmal_component_disable(dev->instance, -+ dev->capture. -+ encode_component); -+ if (ret) -+ v4l2_err(&dev->v4l2_dev, -+ "Failed to disable encode component %d\n", -+ ret); -+ -+ dev->capture.encode_component = NULL; -+ } -+ /* format dependant port setup */ -+ switch (mfmt->mmal_component) { -+ case MMAL_COMPONENT_CAMERA: -+ /* Make a further decision on port based on resolution */ -+ if (f->fmt.pix.width <= max_video_width -+ && f->fmt.pix.height <= max_video_height) -+ camera_port = port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_VIDEO]; -+ else -+ camera_port = port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_CAPTURE]; -+ break; -+ case MMAL_COMPONENT_IMAGE_ENCODE: -+ encode_component = dev->component[MMAL_COMPONENT_IMAGE_ENCODE]; -+ port = &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->output[0]; -+ camera_port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_CAPTURE]; -+ break; -+ case MMAL_COMPONENT_VIDEO_ENCODE: -+ encode_component = dev->component[MMAL_COMPONENT_VIDEO_ENCODE]; -+ port = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; -+ camera_port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_VIDEO]; -+ break; -+ default: -+ break; -+ } -+ -+ if (!port) -+ return -EINVAL; -+ -+ if (encode_component) -+ camera_port->format.encoding = MMAL_ENCODING_OPAQUE; -+ else -+ camera_port->format.encoding = mfmt->mmal; -+ -+ if (dev->rgb_bgr_swapped) { -+ if (camera_port->format.encoding == MMAL_ENCODING_RGB24) -+ camera_port->format.encoding = MMAL_ENCODING_BGR24; -+ else if (camera_port->format.encoding == MMAL_ENCODING_BGR24) -+ camera_port->format.encoding = MMAL_ENCODING_RGB24; -+ } -+ -+ camera_port->format.encoding_variant = 0; -+ camera_port->es.video.width = f->fmt.pix.width; -+ camera_port->es.video.height = f->fmt.pix.height; -+ camera_port->es.video.crop.x = 0; -+ camera_port->es.video.crop.y = 0; -+ camera_port->es.video.crop.width = f->fmt.pix.width; -+ camera_port->es.video.crop.height = f->fmt.pix.height; -+ camera_port->es.video.frame_rate.num = 0; -+ camera_port->es.video.frame_rate.den = 1; -+ camera_port->es.video.color_space = MMAL_COLOR_SPACE_JPEG_JFIF; -+ -+ ret = vchiq_mmal_port_set_format(dev->instance, camera_port); -+ -+ if (!ret -+ && camera_port == -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_VIDEO]) { -+ bool overlay_enabled = -+ !!dev->component[MMAL_COMPONENT_PREVIEW]->enabled; -+ struct vchiq_mmal_port *preview_port = -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_PREVIEW]; -+ /* Preview and encode ports need to match on resolution */ -+ if (overlay_enabled) { -+ /* Need to disable the overlay before we can update -+ * the resolution -+ */ -+ ret = -+ vchiq_mmal_port_disable(dev->instance, -+ preview_port); -+ if (!ret) -+ ret = -+ vchiq_mmal_port_connect_tunnel( -+ dev->instance, -+ preview_port, -+ NULL); -+ } -+ preview_port->es.video.width = f->fmt.pix.width; -+ preview_port->es.video.height = f->fmt.pix.height; -+ preview_port->es.video.crop.x = 0; -+ preview_port->es.video.crop.y = 0; -+ preview_port->es.video.crop.width = f->fmt.pix.width; -+ preview_port->es.video.crop.height = f->fmt.pix.height; -+ preview_port->es.video.frame_rate.num = -+ dev->capture.timeperframe.denominator; -+ preview_port->es.video.frame_rate.den = -+ dev->capture.timeperframe.numerator; -+ ret = vchiq_mmal_port_set_format(dev->instance, preview_port); -+ if (overlay_enabled) { -+ ret = vchiq_mmal_port_connect_tunnel( -+ dev->instance, -+ preview_port, -+ &dev->component[MMAL_COMPONENT_PREVIEW]->input[0]); -+ if (!ret) -+ ret = vchiq_mmal_port_enable(dev->instance, -+ preview_port, -+ NULL); -+ } -+ } -+ -+ if (ret) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s failed to set format %dx%d %08X\n", __func__, -+ f->fmt.pix.width, f->fmt.pix.height, -+ f->fmt.pix.pixelformat); -+ /* ensure capture is not going to be tried */ -+ dev->capture.port = NULL; -+ } else { -+ if (encode_component) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "vid_cap - set up encode comp\n"); -+ -+ /* configure buffering */ -+ camera_port->current_buffer.size = -+ camera_port->recommended_buffer.size; -+ camera_port->current_buffer.num = -+ camera_port->recommended_buffer.num; -+ -+ ret = -+ vchiq_mmal_port_connect_tunnel( -+ dev->instance, -+ camera_port, -+ &encode_component->input[0]); -+ if (ret) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "%s failed to create connection\n", -+ __func__); -+ /* ensure capture is not going to be tried */ -+ dev->capture.port = NULL; -+ } else { -+ port->es.video.width = f->fmt.pix.width; -+ port->es.video.height = f->fmt.pix.height; -+ port->es.video.crop.x = 0; -+ port->es.video.crop.y = 0; -+ port->es.video.crop.width = f->fmt.pix.width; -+ port->es.video.crop.height = f->fmt.pix.height; -+ port->es.video.frame_rate.num = -+ dev->capture.timeperframe.denominator; -+ port->es.video.frame_rate.den = -+ dev->capture.timeperframe.numerator; -+ -+ port->format.encoding = mfmt->mmal; -+ port->format.encoding_variant = 0; -+ /* Set any encoding specific parameters */ -+ switch (mfmt->mmal_component) { -+ case MMAL_COMPONENT_VIDEO_ENCODE: -+ port->format.bitrate = -+ dev->capture.encode_bitrate; -+ break; -+ case MMAL_COMPONENT_IMAGE_ENCODE: -+ /* Could set EXIF parameters here */ -+ break; -+ default: -+ break; -+ } -+ ret = vchiq_mmal_port_set_format(dev->instance, -+ port); -+ if (ret) -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "%s failed to set format %dx%d fmt %08X\n", -+ __func__, -+ f->fmt.pix.width, -+ f->fmt.pix.height, -+ f->fmt.pix.pixelformat -+ ); -+ } -+ -+ if (!ret) { -+ ret = vchiq_mmal_component_enable( -+ dev->instance, -+ encode_component); -+ if (ret) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "%s Failed to enable encode components\n", -+ __func__); -+ } -+ } -+ if (!ret) { -+ /* configure buffering */ -+ port->current_buffer.num = 1; -+ port->current_buffer.size = -+ f->fmt.pix.sizeimage; -+ if (port->format.encoding == -+ MMAL_ENCODING_JPEG) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "JPG - buf size now %d was %d\n", -+ f->fmt.pix.sizeimage, -+ port->current_buffer.size); -+ port->current_buffer.size = -+ (f->fmt.pix.sizeimage < -+ (100 << 10)) -+ ? (100 << 10) : f->fmt.pix. -+ sizeimage; -+ } -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "vid_cap - cur_buf.size set to %d\n", -+ f->fmt.pix.sizeimage); -+ port->current_buffer.alignment = 0; -+ } -+ } else { -+ /* configure buffering */ -+ camera_port->current_buffer.num = 1; -+ camera_port->current_buffer.size = f->fmt.pix.sizeimage; -+ camera_port->current_buffer.alignment = 0; -+ } -+ -+ if (!ret) { -+ dev->capture.fmt = mfmt; -+ dev->capture.stride = f->fmt.pix.bytesperline; -+ dev->capture.width = camera_port->es.video.crop.width; -+ dev->capture.height = camera_port->es.video.crop.height; -+ dev->capture.buffersize = port->current_buffer.size; -+ -+ /* select port for capture */ -+ dev->capture.port = port; -+ dev->capture.camera_port = camera_port; -+ dev->capture.encode_component = encode_component; -+ v4l2_dbg(1, bcm2835_v4l2_debug, -+ &dev->v4l2_dev, -+ "Set dev->capture.fmt %08X, %dx%d, stride %d, size %d", -+ port->format.encoding, -+ dev->capture.width, dev->capture.height, -+ dev->capture.stride, dev->capture.buffersize); -+ } -+ } -+ -+ /* todo: Need to convert the vchiq/mmal error into a v4l2 error. */ -+ return ret; -+} -+ -+static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, -+ struct v4l2_format *f) -+{ -+ int ret; -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ struct mmal_fmt *mfmt; -+ -+ /* try the format to set valid parameters */ -+ ret = vidioc_try_fmt_vid_cap(file, priv, f); -+ if (ret) { -+ v4l2_err(&dev->v4l2_dev, -+ "vid_cap - vidioc_try_fmt_vid_cap failed\n"); -+ return ret; -+ } -+ -+ /* if a capture is running refuse to set format */ -+ if (vb2_is_busy(&dev->capture.vb_vidq)) { -+ v4l2_info(&dev->v4l2_dev, "%s device busy\n", __func__); -+ return -EBUSY; -+ } -+ -+ /* If the format is unsupported v4l2 says we should switch to -+ * a supported one and not return an error. */ -+ mfmt = get_format(f); -+ if (!mfmt) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Fourcc format (0x%08x) unknown.\n", -+ f->fmt.pix.pixelformat); -+ f->fmt.pix.pixelformat = formats[0].fourcc; -+ mfmt = get_format(f); -+ } -+ -+ ret = mmal_setup_components(dev, f); -+ if (ret != 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "%s: failed to setup mmal components: %d\n", -+ __func__, ret); -+ ret = -EINVAL; -+ } -+ -+ return ret; -+} -+ -+int vidioc_enum_framesizes(struct file *file, void *fh, -+ struct v4l2_frmsizeenum *fsize) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ static const struct v4l2_frmsize_stepwise sizes = { -+ MIN_WIDTH, 0, 2, -+ MIN_HEIGHT, 0, 2 -+ }; -+ int i; -+ -+ if (fsize->index) -+ return -EINVAL; -+ for (i = 0; i < ARRAY_SIZE(formats); i++) -+ if (formats[i].fourcc == fsize->pixel_format) -+ break; -+ if (i == ARRAY_SIZE(formats)) -+ return -EINVAL; -+ fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; -+ fsize->stepwise = sizes; -+ fsize->stepwise.max_width = dev->max_width; -+ fsize->stepwise.max_height = dev->max_height; -+ return 0; -+} -+ -+/* timeperframe is arbitrary and continous */ -+static int vidioc_enum_frameintervals(struct file *file, void *priv, -+ struct v4l2_frmivalenum *fival) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ int i; -+ -+ if (fival->index) -+ return -EINVAL; -+ -+ for (i = 0; i < ARRAY_SIZE(formats); i++) -+ if (formats[i].fourcc == fival->pixel_format) -+ break; -+ if (i == ARRAY_SIZE(formats)) -+ return -EINVAL; -+ -+ /* regarding width & height - we support any within range */ -+ if (fival->width < MIN_WIDTH || fival->width > dev->max_width || -+ fival->height < MIN_HEIGHT || fival->height > dev->max_height) -+ return -EINVAL; -+ -+ fival->type = V4L2_FRMIVAL_TYPE_CONTINUOUS; -+ -+ /* fill in stepwise (step=1.0 is requred by V4L2 spec) */ -+ fival->stepwise.min = tpf_min; -+ fival->stepwise.max = tpf_max; -+ fival->stepwise.step = (struct v4l2_fract) {1, 1}; -+ -+ return 0; -+} -+ -+static int vidioc_g_parm(struct file *file, void *priv, -+ struct v4l2_streamparm *parm) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ -+ if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; -+ -+ parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; -+ parm->parm.capture.timeperframe = dev->capture.timeperframe; -+ parm->parm.capture.readbuffers = 1; -+ return 0; -+} -+ -+#define FRACT_CMP(a, OP, b) \ -+ ((u64)(a).numerator * (b).denominator OP \ -+ (u64)(b).numerator * (a).denominator) -+ -+static int vidioc_s_parm(struct file *file, void *priv, -+ struct v4l2_streamparm *parm) -+{ -+ struct bm2835_mmal_dev *dev = video_drvdata(file); -+ struct v4l2_fract tpf; -+ struct mmal_parameter_rational fps_param; -+ -+ if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) -+ return -EINVAL; -+ -+ tpf = parm->parm.capture.timeperframe; -+ -+ /* tpf: {*, 0} resets timing; clip to [min, max]*/ -+ tpf = tpf.denominator ? tpf : tpf_default; -+ tpf = FRACT_CMP(tpf, <, tpf_min) ? tpf_min : tpf; -+ tpf = FRACT_CMP(tpf, >, tpf_max) ? tpf_max : tpf; -+ -+ dev->capture.timeperframe = tpf; -+ parm->parm.capture.timeperframe = tpf; -+ parm->parm.capture.readbuffers = 1; -+ parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; -+ -+ fps_param.num = 0; /* Select variable fps, and then use -+ * FPS_RANGE to select the actual limits. -+ */ -+ fps_param.den = 1; -+ set_framerate_params(dev); -+ -+ return 0; -+} -+ -+static const struct v4l2_ioctl_ops camera0_ioctl_ops = { -+ /* overlay */ -+ .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt_vid_overlay, -+ .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_vid_overlay, -+ .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_vid_overlay, -+ .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_vid_overlay, -+ .vidioc_overlay = vidioc_overlay, -+ .vidioc_g_fbuf = vidioc_g_fbuf, -+ -+ /* inputs */ -+ .vidioc_enum_input = vidioc_enum_input, -+ .vidioc_g_input = vidioc_g_input, -+ .vidioc_s_input = vidioc_s_input, -+ -+ /* capture */ -+ .vidioc_querycap = vidioc_querycap, -+ .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, -+ .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, -+ .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, -+ .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, -+ -+ /* buffer management */ -+ .vidioc_reqbufs = vb2_ioctl_reqbufs, -+ .vidioc_create_bufs = vb2_ioctl_create_bufs, -+ .vidioc_prepare_buf = vb2_ioctl_prepare_buf, -+ .vidioc_querybuf = vb2_ioctl_querybuf, -+ .vidioc_qbuf = vb2_ioctl_qbuf, -+ .vidioc_dqbuf = vb2_ioctl_dqbuf, -+ .vidioc_enum_framesizes = vidioc_enum_framesizes, -+ .vidioc_enum_frameintervals = vidioc_enum_frameintervals, -+ .vidioc_g_parm = vidioc_g_parm, -+ .vidioc_s_parm = vidioc_s_parm, -+ .vidioc_streamon = vb2_ioctl_streamon, -+ .vidioc_streamoff = vb2_ioctl_streamoff, -+ -+ .vidioc_log_status = v4l2_ctrl_log_status, -+ .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, -+ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, -+}; -+ -+static const struct v4l2_ioctl_ops camera0_ioctl_ops_gstreamer = { -+ /* overlay */ -+ .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt_vid_overlay, -+ .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_vid_overlay, -+ .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_vid_overlay, -+ .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_vid_overlay, -+ .vidioc_overlay = vidioc_overlay, -+ .vidioc_g_fbuf = vidioc_g_fbuf, -+ -+ /* inputs */ -+ .vidioc_enum_input = vidioc_enum_input, -+ .vidioc_g_input = vidioc_g_input, -+ .vidioc_s_input = vidioc_s_input, -+ -+ /* capture */ -+ .vidioc_querycap = vidioc_querycap, -+ .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, -+ .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, -+ .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, -+ .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, -+ -+ /* buffer management */ -+ .vidioc_reqbufs = vb2_ioctl_reqbufs, -+ .vidioc_create_bufs = vb2_ioctl_create_bufs, -+ .vidioc_prepare_buf = vb2_ioctl_prepare_buf, -+ .vidioc_querybuf = vb2_ioctl_querybuf, -+ .vidioc_qbuf = vb2_ioctl_qbuf, -+ .vidioc_dqbuf = vb2_ioctl_dqbuf, -+ /* Remove this function ptr to fix gstreamer bug -+ .vidioc_enum_framesizes = vidioc_enum_framesizes, */ -+ .vidioc_enum_frameintervals = vidioc_enum_frameintervals, -+ .vidioc_g_parm = vidioc_g_parm, -+ .vidioc_s_parm = vidioc_s_parm, -+ .vidioc_streamon = vb2_ioctl_streamon, -+ .vidioc_streamoff = vb2_ioctl_streamoff, -+ -+ .vidioc_log_status = v4l2_ctrl_log_status, -+ .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, -+ .vidioc_unsubscribe_event = v4l2_event_unsubscribe, -+}; -+ -+/* ------------------------------------------------------------------ -+ Driver init/finalise -+ ------------------------------------------------------------------*/ -+ -+static const struct v4l2_file_operations camera0_fops = { -+ .owner = THIS_MODULE, -+ .open = v4l2_fh_open, -+ .release = vb2_fop_release, -+ .read = vb2_fop_read, -+ .poll = vb2_fop_poll, -+ .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */ -+ .mmap = vb2_fop_mmap, -+}; -+ -+static struct video_device vdev_template = { -+ .name = "camera0", -+ .fops = &camera0_fops, -+ .ioctl_ops = &camera0_ioctl_ops, -+ .release = video_device_release_empty, -+}; -+ -+/* Returns the number of cameras, and also the max resolution supported -+ * by those cameras. -+ */ -+static int get_num_cameras(struct vchiq_mmal_instance *instance, -+ unsigned int resolutions[][2], int num_resolutions) -+{ -+ int ret; -+ struct vchiq_mmal_component *cam_info_component; -+ struct mmal_parameter_camera_info_t cam_info = {0}; -+ int param_size = sizeof(cam_info); -+ int i; -+ -+ /* create a camera_info component */ -+ ret = vchiq_mmal_component_init(instance, "camera_info", -+ &cam_info_component); -+ if (ret < 0) -+ /* Unusual failure - let's guess one camera. */ -+ return 1; -+ -+ if (vchiq_mmal_port_parameter_get(instance, -+ &cam_info_component->control, -+ MMAL_PARAMETER_CAMERA_INFO, -+ &cam_info, -+ ¶m_size)) { -+ pr_info("Failed to get camera info\n"); -+ } -+ for (i = 0; -+ i < (cam_info.num_cameras > num_resolutions ? -+ num_resolutions : -+ cam_info.num_cameras); -+ i++) { -+ resolutions[i][0] = cam_info.cameras[i].max_width; -+ resolutions[i][1] = cam_info.cameras[i].max_height; -+ } -+ -+ vchiq_mmal_component_finalise(instance, -+ cam_info_component); -+ -+ return cam_info.num_cameras; -+} -+ -+static int set_camera_parameters(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *camera, -+ struct bm2835_mmal_dev *dev) -+{ -+ int ret; -+ struct mmal_parameter_camera_config cam_config = { -+ .max_stills_w = dev->max_width, -+ .max_stills_h = dev->max_height, -+ .stills_yuv422 = 1, -+ .one_shot_stills = 1, -+ .max_preview_video_w = (max_video_width > 1920) ? -+ max_video_width : 1920, -+ .max_preview_video_h = (max_video_height > 1088) ? -+ max_video_height : 1088, -+ .num_preview_video_frames = 3, -+ .stills_capture_circular_buffer_height = 0, -+ .fast_preview_resume = 0, -+ .use_stc_timestamp = MMAL_PARAM_TIMESTAMP_MODE_RAW_STC -+ }; -+ -+ ret = vchiq_mmal_port_parameter_set(instance, &camera->control, -+ MMAL_PARAMETER_CAMERA_CONFIG, -+ &cam_config, sizeof(cam_config)); -+ return ret; -+} -+ -+#define MAX_SUPPORTED_ENCODINGS 20 -+ -+/* MMAL instance and component init */ -+static int __init mmal_init(struct bm2835_mmal_dev *dev) -+{ -+ int ret; -+ struct mmal_es_format *format; -+ u32 bool_true = 1; -+ u32 supported_encodings[MAX_SUPPORTED_ENCODINGS]; -+ int param_size; -+ struct vchiq_mmal_component *camera; -+ -+ ret = vchiq_mmal_init(&dev->instance); -+ if (ret < 0) -+ return ret; -+ -+ /* get the camera component ready */ -+ ret = vchiq_mmal_component_init(dev->instance, "ril.camera", -+ &dev->component[MMAL_COMPONENT_CAMERA]); -+ if (ret < 0) -+ goto unreg_mmal; -+ -+ camera = dev->component[MMAL_COMPONENT_CAMERA]; -+ if (camera->outputs < MMAL_CAMERA_PORT_COUNT) { -+ ret = -EINVAL; -+ goto unreg_camera; -+ } -+ -+ ret = set_camera_parameters(dev->instance, -+ camera, -+ dev); -+ if (ret < 0) -+ goto unreg_camera; -+ -+ /* There was an error in the firmware that meant the camera component -+ * produced BGR instead of RGB. -+ * This is now fixed, but in order to support the old firmwares, we -+ * have to check. -+ */ -+ dev->rgb_bgr_swapped = true; -+ param_size = sizeof(supported_encodings); -+ ret = vchiq_mmal_port_parameter_get(dev->instance, -+ &camera->output[MMAL_CAMERA_PORT_CAPTURE], -+ MMAL_PARAMETER_SUPPORTED_ENCODINGS, -+ &supported_encodings, -+ ¶m_size); -+ if (ret == 0) { -+ int i; -+ -+ for (i = 0; i < param_size/sizeof(u32); i++) { -+ if (supported_encodings[i] == MMAL_ENCODING_BGR24) { -+ /* Found BGR24 first - old firmware. */ -+ break; -+ } -+ if (supported_encodings[i] == MMAL_ENCODING_RGB24) { -+ /* Found RGB24 first -+ * new firmware, so use RGB24. -+ */ -+ dev->rgb_bgr_swapped = false; -+ break; -+ } -+ } -+ } -+ format = &camera->output[MMAL_CAMERA_PORT_PREVIEW].format; -+ -+ format->encoding = MMAL_ENCODING_OPAQUE; -+ format->encoding_variant = MMAL_ENCODING_I420; -+ -+ format->es->video.width = 1024; -+ format->es->video.height = 768; -+ format->es->video.crop.x = 0; -+ format->es->video.crop.y = 0; -+ format->es->video.crop.width = 1024; -+ format->es->video.crop.height = 768; -+ format->es->video.frame_rate.num = 0; /* Rely on fps_range */ -+ format->es->video.frame_rate.den = 1; -+ -+ format = &camera->output[MMAL_CAMERA_PORT_VIDEO].format; -+ -+ format->encoding = MMAL_ENCODING_OPAQUE; -+ format->encoding_variant = MMAL_ENCODING_I420; -+ -+ format->es->video.width = 1024; -+ format->es->video.height = 768; -+ format->es->video.crop.x = 0; -+ format->es->video.crop.y = 0; -+ format->es->video.crop.width = 1024; -+ format->es->video.crop.height = 768; -+ format->es->video.frame_rate.num = 0; /* Rely on fps_range */ -+ format->es->video.frame_rate.den = 1; -+ -+ vchiq_mmal_port_parameter_set(dev->instance, -+ &camera->output[MMAL_CAMERA_PORT_VIDEO], -+ MMAL_PARAMETER_NO_IMAGE_PADDING, -+ &bool_true, sizeof(bool_true)); -+ -+ format = &camera->output[MMAL_CAMERA_PORT_CAPTURE].format; -+ -+ format->encoding = MMAL_ENCODING_OPAQUE; -+ -+ format->es->video.width = 2592; -+ format->es->video.height = 1944; -+ format->es->video.crop.x = 0; -+ format->es->video.crop.y = 0; -+ format->es->video.crop.width = 2592; -+ format->es->video.crop.height = 1944; -+ format->es->video.frame_rate.num = 0; /* Rely on fps_range */ -+ format->es->video.frame_rate.den = 1; -+ -+ dev->capture.width = format->es->video.width; -+ dev->capture.height = format->es->video.height; -+ dev->capture.fmt = &formats[0]; -+ dev->capture.encode_component = NULL; -+ dev->capture.timeperframe = tpf_default; -+ dev->capture.enc_profile = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH; -+ dev->capture.enc_level = V4L2_MPEG_VIDEO_H264_LEVEL_4_0; -+ -+ vchiq_mmal_port_parameter_set(dev->instance, -+ &camera->output[MMAL_CAMERA_PORT_CAPTURE], -+ MMAL_PARAMETER_NO_IMAGE_PADDING, -+ &bool_true, sizeof(bool_true)); -+ -+ /* get the preview component ready */ -+ ret = vchiq_mmal_component_init( -+ dev->instance, "ril.video_render", -+ &dev->component[MMAL_COMPONENT_PREVIEW]); -+ if (ret < 0) -+ goto unreg_camera; -+ -+ if (dev->component[MMAL_COMPONENT_PREVIEW]->inputs < 1) { -+ ret = -EINVAL; -+ pr_debug("too few input ports %d needed %d\n", -+ dev->component[MMAL_COMPONENT_PREVIEW]->inputs, 1); -+ goto unreg_preview; -+ } -+ -+ /* get the image encoder component ready */ -+ ret = vchiq_mmal_component_init( -+ dev->instance, "ril.image_encode", -+ &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]); -+ if (ret < 0) -+ goto unreg_preview; -+ -+ if (dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs < 1) { -+ ret = -EINVAL; -+ v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", -+ dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->inputs, -+ 1); -+ goto unreg_image_encoder; -+ } -+ -+ /* get the video encoder component ready */ -+ ret = vchiq_mmal_component_init(dev->instance, "ril.video_encode", -+ &dev-> -+ component[MMAL_COMPONENT_VIDEO_ENCODE]); -+ if (ret < 0) -+ goto unreg_image_encoder; -+ -+ if (dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs < 1) { -+ ret = -EINVAL; -+ v4l2_err(&dev->v4l2_dev, "too few input ports %d needed %d\n", -+ dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->inputs, -+ 1); -+ goto unreg_vid_encoder; -+ } -+ -+ { -+ struct vchiq_mmal_port *encoder_port = -+ &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; -+ encoder_port->format.encoding = MMAL_ENCODING_H264; -+ ret = vchiq_mmal_port_set_format(dev->instance, -+ encoder_port); -+ } -+ -+ { -+ unsigned int enable = 1; -+ vchiq_mmal_port_parameter_set( -+ dev->instance, -+ &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->control, -+ MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT, -+ &enable, sizeof(enable)); -+ -+ vchiq_mmal_port_parameter_set(dev->instance, -+ &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->control, -+ MMAL_PARAMETER_MINIMISE_FRAGMENTATION, -+ &enable, -+ sizeof(enable)); -+ } -+ ret = bm2835_mmal_set_all_camera_controls(dev); -+ if (ret < 0) -+ goto unreg_vid_encoder; -+ -+ return 0; -+ -+unreg_vid_encoder: -+ pr_err("Cleanup: Destroy video encoder\n"); -+ vchiq_mmal_component_finalise( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_VIDEO_ENCODE]); -+ -+unreg_image_encoder: -+ pr_err("Cleanup: Destroy image encoder\n"); -+ vchiq_mmal_component_finalise( -+ dev->instance, -+ dev->component[MMAL_COMPONENT_IMAGE_ENCODE]); -+ -+unreg_preview: -+ pr_err("Cleanup: Destroy video render\n"); -+ vchiq_mmal_component_finalise(dev->instance, -+ dev->component[MMAL_COMPONENT_PREVIEW]); -+ -+unreg_camera: -+ pr_err("Cleanup: Destroy camera\n"); -+ vchiq_mmal_component_finalise(dev->instance, -+ dev->component[MMAL_COMPONENT_CAMERA]); -+ -+unreg_mmal: -+ vchiq_mmal_finalise(dev->instance); -+ return ret; -+} -+ -+static int __init bm2835_mmal_init_device(struct bm2835_mmal_dev *dev, -+ struct video_device *vfd) -+{ -+ int ret; -+ -+ *vfd = vdev_template; -+ if (gst_v4l2src_is_broken) { -+ v4l2_info(&dev->v4l2_dev, -+ "Work-around for gstreamer issue is active.\n"); -+ vfd->ioctl_ops = &camera0_ioctl_ops_gstreamer; -+ } -+ -+ vfd->v4l2_dev = &dev->v4l2_dev; -+ -+ vfd->lock = &dev->mutex; -+ -+ vfd->queue = &dev->capture.vb_vidq; -+ -+ /* video device needs to be able to access instance data */ -+ video_set_drvdata(vfd, dev); -+ -+ ret = video_register_device(vfd, -+ VFL_TYPE_GRABBER, -+ video_nr[dev->camera_num]); -+ if (ret < 0) -+ return ret; -+ -+ v4l2_info(vfd->v4l2_dev, -+ "V4L2 device registered as %s - stills mode > %dx%d\n", -+ video_device_node_name(vfd), max_video_width, max_video_height); -+ -+ return 0; -+} -+ -+void bcm2835_cleanup_instance(struct bm2835_mmal_dev *dev) -+{ -+ if (!dev) -+ return; -+ -+ v4l2_info(&dev->v4l2_dev, "unregistering %s\n", -+ video_device_node_name(&dev->vdev)); -+ -+ video_unregister_device(&dev->vdev); -+ -+ if (dev->capture.encode_component) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "mmal_exit - disconnect tunnel\n"); -+ vchiq_mmal_port_connect_tunnel(dev->instance, -+ dev->capture.camera_port, NULL); -+ vchiq_mmal_component_disable(dev->instance, -+ dev->capture.encode_component); -+ } -+ vchiq_mmal_component_disable(dev->instance, -+ dev->component[MMAL_COMPONENT_CAMERA]); -+ -+ vchiq_mmal_component_finalise(dev->instance, -+ dev-> -+ component[MMAL_COMPONENT_VIDEO_ENCODE]); -+ -+ vchiq_mmal_component_finalise(dev->instance, -+ dev-> -+ component[MMAL_COMPONENT_IMAGE_ENCODE]); -+ -+ vchiq_mmal_component_finalise(dev->instance, -+ dev->component[MMAL_COMPONENT_PREVIEW]); -+ -+ vchiq_mmal_component_finalise(dev->instance, -+ dev->component[MMAL_COMPONENT_CAMERA]); -+ -+ v4l2_ctrl_handler_free(&dev->ctrl_handler); -+ -+ v4l2_device_unregister(&dev->v4l2_dev); -+ -+ kfree(dev); -+} -+ -+static struct v4l2_format default_v4l2_format = { -+ .fmt.pix.pixelformat = V4L2_PIX_FMT_JPEG, -+ .fmt.pix.width = 1024, -+ .fmt.pix.bytesperline = 0, -+ .fmt.pix.height = 768, -+ .fmt.pix.sizeimage = 1024*768, -+}; -+ -+static int __init bm2835_mmal_init(void) -+{ -+ int ret; -+ struct bm2835_mmal_dev *dev; -+ struct vb2_queue *q; -+ int camera; -+ unsigned int num_cameras; -+ struct vchiq_mmal_instance *instance; -+ unsigned int resolutions[MAX_BCM2835_CAMERAS][2]; -+ -+ ret = vchiq_mmal_init(&instance); -+ if (ret < 0) -+ return ret; -+ -+ num_cameras = get_num_cameras(instance, -+ resolutions, -+ MAX_BCM2835_CAMERAS); -+ if (num_cameras > MAX_BCM2835_CAMERAS) -+ num_cameras = MAX_BCM2835_CAMERAS; -+ -+ for (camera = 0; camera < num_cameras; camera++) { -+ dev = kzalloc(sizeof(struct bm2835_mmal_dev), GFP_KERNEL); -+ if (!dev) -+ return -ENOMEM; -+ -+ dev->camera_num = camera; -+ dev->max_width = resolutions[camera][0]; -+ dev->max_height = resolutions[camera][1]; -+ -+ /* setup device defaults */ -+ dev->overlay.w.left = 150; -+ dev->overlay.w.top = 50; -+ dev->overlay.w.width = 1024; -+ dev->overlay.w.height = 768; -+ dev->overlay.clipcount = 0; -+ dev->overlay.field = V4L2_FIELD_NONE; -+ dev->overlay.global_alpha = 255; -+ -+ dev->capture.fmt = &formats[3]; /* JPEG */ -+ -+ /* v4l device registration */ -+ snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), -+ "%s", BM2835_MMAL_MODULE_NAME); -+ ret = v4l2_device_register(NULL, &dev->v4l2_dev); -+ if (ret) -+ goto free_dev; -+ -+ /* setup v4l controls */ -+ ret = bm2835_mmal_init_controls(dev, &dev->ctrl_handler); -+ if (ret < 0) -+ goto unreg_dev; -+ dev->v4l2_dev.ctrl_handler = &dev->ctrl_handler; -+ -+ /* mmal init */ -+ dev->instance = instance; -+ ret = mmal_init(dev); -+ if (ret < 0) -+ goto unreg_dev; -+ -+ /* initialize queue */ -+ q = &dev->capture.vb_vidq; -+ memset(q, 0, sizeof(*q)); -+ q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; -+ q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ; -+ q->drv_priv = dev; -+ q->buf_struct_size = sizeof(struct mmal_buffer); -+ q->ops = &bm2835_mmal_video_qops; -+ q->mem_ops = &vb2_vmalloc_memops; -+ q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; -+ ret = vb2_queue_init(q); -+ if (ret < 0) -+ goto unreg_dev; -+ -+ /* v4l2 core mutex used to protect all fops and v4l2 ioctls. */ -+ mutex_init(&dev->mutex); -+ -+ /* initialise video devices */ -+ ret = bm2835_mmal_init_device(dev, &dev->vdev); -+ if (ret < 0) -+ goto unreg_dev; -+ -+ /* Really want to call vidioc_s_fmt_vid_cap with the default -+ * format, but currently the APIs don't join up. -+ */ -+ ret = mmal_setup_components(dev, &default_v4l2_format); -+ if (ret < 0) { -+ v4l2_err(&dev->v4l2_dev, -+ "%s: could not setup components\n", __func__); -+ goto unreg_dev; -+ } -+ -+ v4l2_info(&dev->v4l2_dev, -+ "Broadcom 2835 MMAL video capture ver %s loaded.\n", -+ BM2835_MMAL_VERSION); -+ -+ gdev[camera] = dev; -+ } -+ return 0; -+ -+unreg_dev: -+ v4l2_ctrl_handler_free(&dev->ctrl_handler); -+ v4l2_device_unregister(&dev->v4l2_dev); -+ -+free_dev: -+ kfree(dev); -+ -+ for ( ; camera > 0; camera--) { -+ bcm2835_cleanup_instance(gdev[camera]); -+ gdev[camera] = NULL; -+ } -+ pr_info("%s: error %d while loading driver\n", -+ BM2835_MMAL_MODULE_NAME, ret); -+ -+ return ret; -+} -+ -+static void __exit bm2835_mmal_exit(void) -+{ -+ int camera; -+ struct vchiq_mmal_instance *instance = gdev[0]->instance; -+ -+ for (camera = 0; camera < MAX_BCM2835_CAMERAS; camera++) { -+ bcm2835_cleanup_instance(gdev[camera]); -+ gdev[camera] = NULL; -+ } -+ vchiq_mmal_finalise(instance); -+} -+ -+module_init(bm2835_mmal_init); -+module_exit(bm2835_mmal_exit); ---- /dev/null -+++ b/drivers/media/platform/bcm2835/bcm2835-camera.h -@@ -0,0 +1,145 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ * -+ * core driver device -+ */ -+ -+#define V4L2_CTRL_COUNT 29 /* number of v4l controls */ -+ -+enum { -+ MMAL_COMPONENT_CAMERA = 0, -+ MMAL_COMPONENT_PREVIEW, -+ MMAL_COMPONENT_IMAGE_ENCODE, -+ MMAL_COMPONENT_VIDEO_ENCODE, -+ MMAL_COMPONENT_COUNT -+}; -+ -+enum { -+ MMAL_CAMERA_PORT_PREVIEW = 0, -+ MMAL_CAMERA_PORT_VIDEO, -+ MMAL_CAMERA_PORT_CAPTURE, -+ MMAL_CAMERA_PORT_COUNT -+}; -+ -+#define PREVIEW_LAYER 2 -+ -+extern int bcm2835_v4l2_debug; -+ -+struct bm2835_mmal_dev { -+ /* v4l2 devices */ -+ struct v4l2_device v4l2_dev; -+ struct video_device vdev; -+ struct mutex mutex; -+ -+ /* controls */ -+ struct v4l2_ctrl_handler ctrl_handler; -+ struct v4l2_ctrl *ctrls[V4L2_CTRL_COUNT]; -+ enum v4l2_scene_mode scene_mode; -+ struct mmal_colourfx colourfx; -+ int hflip; -+ int vflip; -+ int red_gain; -+ int blue_gain; -+ enum mmal_parameter_exposuremode exposure_mode_user; -+ enum v4l2_exposure_auto_type exposure_mode_v4l2_user; -+ /* active exposure mode may differ if selected via a scene mode */ -+ enum mmal_parameter_exposuremode exposure_mode_active; -+ enum mmal_parameter_exposuremeteringmode metering_mode; -+ unsigned int manual_shutter_speed; -+ bool exp_auto_priority; -+ bool manual_iso_enabled; -+ uint32_t iso; -+ -+ /* allocated mmal instance and components */ -+ struct vchiq_mmal_instance *instance; -+ struct vchiq_mmal_component *component[MMAL_COMPONENT_COUNT]; -+ int camera_use_count; -+ -+ struct v4l2_window overlay; -+ -+ struct { -+ unsigned int width; /* width */ -+ unsigned int height; /* height */ -+ unsigned int stride; /* stride */ -+ unsigned int buffersize; /* buffer size with padding */ -+ struct mmal_fmt *fmt; -+ struct v4l2_fract timeperframe; -+ -+ /* H264 encode bitrate */ -+ int encode_bitrate; -+ /* H264 bitrate mode. CBR/VBR */ -+ int encode_bitrate_mode; -+ /* H264 profile */ -+ enum v4l2_mpeg_video_h264_profile enc_profile; -+ /* H264 level */ -+ enum v4l2_mpeg_video_h264_level enc_level; -+ /* JPEG Q-factor */ -+ int q_factor; -+ -+ struct vb2_queue vb_vidq; -+ -+ /* VC start timestamp for streaming */ -+ s64 vc_start_timestamp; -+ /* Kernel start timestamp for streaming */ -+ struct timeval kernel_start_ts; -+ -+ struct vchiq_mmal_port *port; /* port being used for capture */ -+ /* camera port being used for capture */ -+ struct vchiq_mmal_port *camera_port; -+ /* component being used for encode */ -+ struct vchiq_mmal_component *encode_component; -+ /* number of frames remaining which driver should capture */ -+ unsigned int frame_count; -+ /* last frame completion */ -+ struct completion frame_cmplt; -+ -+ } capture; -+ -+ unsigned int camera_num; -+ unsigned int max_width; -+ unsigned int max_height; -+ unsigned int rgb_bgr_swapped; -+}; -+ -+int bm2835_mmal_init_controls( -+ struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl_handler *hdl); -+ -+int bm2835_mmal_set_all_camera_controls(struct bm2835_mmal_dev *dev); -+int set_framerate_params(struct bm2835_mmal_dev *dev); -+ -+/* Debug helpers */ -+ -+#define v4l2_dump_pix_format(level, debug, dev, pix_fmt, desc) \ -+{ \ -+ v4l2_dbg(level, debug, dev, \ -+"%s: w %u h %u field %u pfmt 0x%x bpl %u sz_img %u colorspace 0x%x priv %u\n", \ -+ desc == NULL ? "" : desc, \ -+ (pix_fmt)->width, (pix_fmt)->height, (pix_fmt)->field, \ -+ (pix_fmt)->pixelformat, (pix_fmt)->bytesperline, \ -+ (pix_fmt)->sizeimage, (pix_fmt)->colorspace, (pix_fmt)->priv); \ -+} -+#define v4l2_dump_win_format(level, debug, dev, win_fmt, desc) \ -+{ \ -+ v4l2_dbg(level, debug, dev, \ -+"%s: w %u h %u l %u t %u field %u chromakey %06X clip %p " \ -+"clipcount %u bitmap %p\n", \ -+ desc == NULL ? "" : desc, \ -+ (win_fmt)->w.width, (win_fmt)->w.height, \ -+ (win_fmt)->w.left, (win_fmt)->w.top, \ -+ (win_fmt)->field, \ -+ (win_fmt)->chromakey, \ -+ (win_fmt)->clips, (win_fmt)->clipcount, \ -+ (win_fmt)->bitmap); \ -+} ---- /dev/null -+++ b/drivers/media/platform/bcm2835/controls.c -@@ -0,0 +1,1345 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mmal-common.h" -+#include "mmal-vchiq.h" -+#include "mmal-parameters.h" -+#include "bcm2835-camera.h" -+ -+/* The supported V4L2_CID_AUTO_EXPOSURE_BIAS values are from -4.0 to +4.0. -+ * MMAL values are in 1/6th increments so the MMAL range is -24 to +24. -+ * V4L2 docs say value "is expressed in terms of EV, drivers should interpret -+ * the values as 0.001 EV units, where the value 1000 stands for +1 EV." -+ * V4L2 is limited to a max of 32 values in a menu, so count in 1/3rds from -+ * -4 to +4 -+ */ -+static const s64 ev_bias_qmenu[] = { -+ -4000, -3667, -3333, -+ -3000, -2667, -2333, -+ -2000, -1667, -1333, -+ -1000, -667, -333, -+ 0, 333, 667, -+ 1000, 1333, 1667, -+ 2000, 2333, 2667, -+ 3000, 3333, 3667, -+ 4000 -+}; -+ -+/* Supported ISO values (*1000) -+ * ISOO = auto ISO -+ */ -+static const s64 iso_qmenu[] = { -+ 0, 100000, 200000, 400000, 800000, -+}; -+static const uint32_t iso_values[] = { -+ 0, 100, 200, 400, 800, -+}; -+ -+static const s64 mains_freq_qmenu[] = { -+ V4L2_CID_POWER_LINE_FREQUENCY_DISABLED, -+ V4L2_CID_POWER_LINE_FREQUENCY_50HZ, -+ V4L2_CID_POWER_LINE_FREQUENCY_60HZ, -+ V4L2_CID_POWER_LINE_FREQUENCY_AUTO -+}; -+ -+/* Supported video encode modes */ -+static const s64 bitrate_mode_qmenu[] = { -+ (s64)V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, -+ (s64)V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, -+}; -+ -+enum bm2835_mmal_ctrl_type { -+ MMAL_CONTROL_TYPE_STD, -+ MMAL_CONTROL_TYPE_STD_MENU, -+ MMAL_CONTROL_TYPE_INT_MENU, -+ MMAL_CONTROL_TYPE_CLUSTER, /* special cluster entry */ -+}; -+ -+struct bm2835_mmal_v4l2_ctrl; -+ -+typedef int(bm2835_mmal_v4l2_ctrl_cb)( -+ struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl); -+ -+struct bm2835_mmal_v4l2_ctrl { -+ u32 id; /* v4l2 control identifier */ -+ enum bm2835_mmal_ctrl_type type; -+ /* control minimum value or -+ * mask for MMAL_CONTROL_TYPE_STD_MENU */ -+ s32 min; -+ s32 max; /* maximum value of control */ -+ s32 def; /* default value of control */ -+ s32 step; /* step size of the control */ -+ const s64 *imenu; /* integer menu array */ -+ u32 mmal_id; /* mmal parameter id */ -+ bm2835_mmal_v4l2_ctrl_cb *setter; -+ bool ignore_errors; -+}; -+ -+struct v4l2_to_mmal_effects_setting { -+ u32 v4l2_effect; -+ u32 mmal_effect; -+ s32 col_fx_enable; -+ s32 col_fx_fixed_cbcr; -+ u32 u; -+ u32 v; -+ u32 num_effect_params; -+ u32 effect_params[MMAL_MAX_IMAGEFX_PARAMETERS]; -+}; -+ -+static const struct v4l2_to_mmal_effects_setting -+ v4l2_to_mmal_effects_values[] = { -+ { V4L2_COLORFX_NONE, MMAL_PARAM_IMAGEFX_NONE, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_BW, MMAL_PARAM_IMAGEFX_NONE, -+ 1, 0, 128, 128, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SEPIA, MMAL_PARAM_IMAGEFX_NONE, -+ 1, 0, 87, 151, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_NEGATIVE, MMAL_PARAM_IMAGEFX_NEGATIVE, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_EMBOSS, MMAL_PARAM_IMAGEFX_EMBOSS, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SKETCH, MMAL_PARAM_IMAGEFX_SKETCH, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SKY_BLUE, MMAL_PARAM_IMAGEFX_PASTEL, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_GRASS_GREEN, MMAL_PARAM_IMAGEFX_WATERCOLOUR, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SKIN_WHITEN, MMAL_PARAM_IMAGEFX_WASHEDOUT, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_VIVID, MMAL_PARAM_IMAGEFX_SATURATION, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_AQUA, MMAL_PARAM_IMAGEFX_NONE, -+ 1, 0, 171, 121, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_ART_FREEZE, MMAL_PARAM_IMAGEFX_HATCH, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SILHOUETTE, MMAL_PARAM_IMAGEFX_FILM, -+ 0, 0, 0, 0, 0, {0, 0, 0, 0, 0} }, -+ { V4L2_COLORFX_SOLARIZATION, MMAL_PARAM_IMAGEFX_SOLARIZE, -+ 0, 0, 0, 0, 5, {1, 128, 160, 160, 48} }, -+ { V4L2_COLORFX_ANTIQUE, MMAL_PARAM_IMAGEFX_COLOURBALANCE, -+ 0, 0, 0, 0, 3, {108, 274, 238, 0, 0} }, -+ { V4L2_COLORFX_SET_CBCR, MMAL_PARAM_IMAGEFX_NONE, -+ 1, 1, 0, 0, 0, {0, 0, 0, 0, 0} } -+}; -+ -+struct v4l2_mmal_scene_config { -+ enum v4l2_scene_mode v4l2_scene; -+ enum mmal_parameter_exposuremode exposure_mode; -+ enum mmal_parameter_exposuremeteringmode metering_mode; -+}; -+ -+static const struct v4l2_mmal_scene_config scene_configs[] = { -+ /* V4L2_SCENE_MODE_NONE automatically added */ -+ { -+ V4L2_SCENE_MODE_NIGHT, -+ MMAL_PARAM_EXPOSUREMODE_NIGHT, -+ MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE -+ }, -+ { -+ V4L2_SCENE_MODE_SPORTS, -+ MMAL_PARAM_EXPOSUREMODE_SPORTS, -+ MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE -+ }, -+}; -+ -+/* control handlers*/ -+ -+static int ctrl_set_rational(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ struct mmal_parameter_rational rational_value; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ rational_value.num = ctrl->val; -+ rational_value.den = 100; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &rational_value, -+ sizeof(rational_value)); -+} -+ -+static int ctrl_set_value(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ u32_value = ctrl->val; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_iso(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *control; -+ -+ if (ctrl->val > mmal_ctrl->max || ctrl->val < mmal_ctrl->min) -+ return 1; -+ -+ if (ctrl->id == V4L2_CID_ISO_SENSITIVITY) -+ dev->iso = iso_values[ctrl->val]; -+ else if (ctrl->id == V4L2_CID_ISO_SENSITIVITY_AUTO) -+ dev->manual_iso_enabled = -+ (ctrl->val == V4L2_ISO_SENSITIVITY_MANUAL ? -+ true : -+ false); -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ if (dev->manual_iso_enabled) -+ u32_value = dev->iso; -+ else -+ u32_value = 0; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ MMAL_PARAMETER_ISO, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_value_ev(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ s32 s32_value; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ s32_value = (ctrl->val-12)*2; /* Convert from index to 1/6ths */ -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &s32_value, sizeof(s32_value)); -+} -+ -+static int ctrl_set_rotate(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret; -+ u32 u32_value; -+ struct vchiq_mmal_component *camera; -+ -+ camera = dev->component[MMAL_COMPONENT_CAMERA]; -+ -+ u32_value = ((ctrl->val % 360) / 90) * 90; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[0], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ if (ret < 0) -+ return ret; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[1], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ if (ret < 0) -+ return ret; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[2], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ -+ return ret; -+} -+ -+static int ctrl_set_flip(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret; -+ u32 u32_value; -+ struct vchiq_mmal_component *camera; -+ -+ if (ctrl->id == V4L2_CID_HFLIP) -+ dev->hflip = ctrl->val; -+ else -+ dev->vflip = ctrl->val; -+ -+ camera = dev->component[MMAL_COMPONENT_CAMERA]; -+ -+ if (dev->hflip && dev->vflip) -+ u32_value = MMAL_PARAM_MIRROR_BOTH; -+ else if (dev->hflip) -+ u32_value = MMAL_PARAM_MIRROR_HORIZONTAL; -+ else if (dev->vflip) -+ u32_value = MMAL_PARAM_MIRROR_VERTICAL; -+ else -+ u32_value = MMAL_PARAM_MIRROR_NONE; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[0], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ if (ret < 0) -+ return ret; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[1], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ if (ret < 0) -+ return ret; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, &camera->output[2], -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ -+ return ret; -+ -+} -+ -+static int ctrl_set_exposure(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ enum mmal_parameter_exposuremode exp_mode = dev->exposure_mode_user; -+ u32 shutter_speed = 0; -+ struct vchiq_mmal_port *control; -+ int ret = 0; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ if (mmal_ctrl->mmal_id == MMAL_PARAMETER_SHUTTER_SPEED) { -+ /* V4L2 is in 100usec increments. -+ * MMAL is 1usec. -+ */ -+ dev->manual_shutter_speed = ctrl->val * 100; -+ } else if (mmal_ctrl->mmal_id == MMAL_PARAMETER_EXPOSURE_MODE) { -+ switch (ctrl->val) { -+ case V4L2_EXPOSURE_AUTO: -+ exp_mode = MMAL_PARAM_EXPOSUREMODE_AUTO; -+ break; -+ -+ case V4L2_EXPOSURE_MANUAL: -+ exp_mode = MMAL_PARAM_EXPOSUREMODE_OFF; -+ break; -+ } -+ dev->exposure_mode_user = exp_mode; -+ dev->exposure_mode_v4l2_user = ctrl->val; -+ } else if (mmal_ctrl->id == V4L2_CID_EXPOSURE_AUTO_PRIORITY) { -+ dev->exp_auto_priority = ctrl->val; -+ } -+ -+ if (dev->scene_mode == V4L2_SCENE_MODE_NONE) { -+ if (exp_mode == MMAL_PARAM_EXPOSUREMODE_OFF) -+ shutter_speed = dev->manual_shutter_speed; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_SHUTTER_SPEED, -+ &shutter_speed, -+ sizeof(shutter_speed)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_EXPOSURE_MODE, -+ &exp_mode, -+ sizeof(u32)); -+ dev->exposure_mode_active = exp_mode; -+ } -+ /* exposure_dynamic_framerate (V4L2_CID_EXPOSURE_AUTO_PRIORITY) should -+ * always apply irrespective of scene mode. -+ */ -+ ret += set_framerate_params(dev); -+ -+ return ret; -+} -+ -+static int ctrl_set_metering_mode(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ switch (ctrl->val) { -+ case V4L2_EXPOSURE_METERING_AVERAGE: -+ dev->metering_mode = MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE; -+ break; -+ -+ case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED: -+ dev->metering_mode = MMAL_PARAM_EXPOSUREMETERINGMODE_BACKLIT; -+ break; -+ -+ case V4L2_EXPOSURE_METERING_SPOT: -+ dev->metering_mode = MMAL_PARAM_EXPOSUREMETERINGMODE_SPOT; -+ break; -+ -+ /* todo matrix weighting not added to Linux API till 3.9 -+ case V4L2_EXPOSURE_METERING_MATRIX: -+ dev->metering_mode = MMAL_PARAM_EXPOSUREMETERINGMODE_MATRIX; -+ break; -+ */ -+ -+ } -+ -+ if (dev->scene_mode == V4L2_SCENE_MODE_NONE) { -+ struct vchiq_mmal_port *control; -+ u32 u32_value = dev->metering_mode; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+ } else -+ return 0; -+} -+ -+static int ctrl_set_flicker_avoidance(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ switch (ctrl->val) { -+ case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED: -+ u32_value = MMAL_PARAM_FLICKERAVOID_OFF; -+ break; -+ case V4L2_CID_POWER_LINE_FREQUENCY_50HZ: -+ u32_value = MMAL_PARAM_FLICKERAVOID_50HZ; -+ break; -+ case V4L2_CID_POWER_LINE_FREQUENCY_60HZ: -+ u32_value = MMAL_PARAM_FLICKERAVOID_60HZ; -+ break; -+ case V4L2_CID_POWER_LINE_FREQUENCY_AUTO: -+ u32_value = MMAL_PARAM_FLICKERAVOID_AUTO; -+ break; -+ } -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_awb_mode(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ switch (ctrl->val) { -+ case V4L2_WHITE_BALANCE_MANUAL: -+ u32_value = MMAL_PARAM_AWBMODE_OFF; -+ break; -+ -+ case V4L2_WHITE_BALANCE_AUTO: -+ u32_value = MMAL_PARAM_AWBMODE_AUTO; -+ break; -+ -+ case V4L2_WHITE_BALANCE_INCANDESCENT: -+ u32_value = MMAL_PARAM_AWBMODE_INCANDESCENT; -+ break; -+ -+ case V4L2_WHITE_BALANCE_FLUORESCENT: -+ u32_value = MMAL_PARAM_AWBMODE_FLUORESCENT; -+ break; -+ -+ case V4L2_WHITE_BALANCE_FLUORESCENT_H: -+ u32_value = MMAL_PARAM_AWBMODE_TUNGSTEN; -+ break; -+ -+ case V4L2_WHITE_BALANCE_HORIZON: -+ u32_value = MMAL_PARAM_AWBMODE_HORIZON; -+ break; -+ -+ case V4L2_WHITE_BALANCE_DAYLIGHT: -+ u32_value = MMAL_PARAM_AWBMODE_SUNLIGHT; -+ break; -+ -+ case V4L2_WHITE_BALANCE_FLASH: -+ u32_value = MMAL_PARAM_AWBMODE_FLASH; -+ break; -+ -+ case V4L2_WHITE_BALANCE_CLOUDY: -+ u32_value = MMAL_PARAM_AWBMODE_CLOUDY; -+ break; -+ -+ case V4L2_WHITE_BALANCE_SHADE: -+ u32_value = MMAL_PARAM_AWBMODE_SHADE; -+ break; -+ -+ } -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_awb_gains(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ struct vchiq_mmal_port *control; -+ struct mmal_parameter_awbgains gains; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ if (ctrl->id == V4L2_CID_RED_BALANCE) -+ dev->red_gain = ctrl->val; -+ else if (ctrl->id == V4L2_CID_BLUE_BALANCE) -+ dev->blue_gain = ctrl->val; -+ -+ gains.r_gain.num = dev->red_gain; -+ gains.b_gain.num = dev->blue_gain; -+ gains.r_gain.den = gains.b_gain.den = 1000; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, control, -+ mmal_ctrl->mmal_id, -+ &gains, sizeof(gains)); -+} -+ -+static int ctrl_set_image_effect(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret = -EINVAL; -+ int i, j; -+ struct vchiq_mmal_port *control; -+ struct mmal_parameter_imagefx_parameters imagefx; -+ -+ for (i = 0; i < ARRAY_SIZE(v4l2_to_mmal_effects_values); i++) { -+ if (ctrl->val == v4l2_to_mmal_effects_values[i].v4l2_effect) { -+ -+ imagefx.effect = -+ v4l2_to_mmal_effects_values[i].mmal_effect; -+ imagefx.num_effect_params = -+ v4l2_to_mmal_effects_values[i].num_effect_params; -+ -+ if (imagefx.num_effect_params > MMAL_MAX_IMAGEFX_PARAMETERS) -+ imagefx.num_effect_params = MMAL_MAX_IMAGEFX_PARAMETERS; -+ -+ for (j = 0; j < imagefx.num_effect_params; j++) -+ imagefx.effect_parameter[j] = -+ v4l2_to_mmal_effects_values[i].effect_params[j]; -+ -+ dev->colourfx.enable = -+ v4l2_to_mmal_effects_values[i].col_fx_enable; -+ if (!v4l2_to_mmal_effects_values[i].col_fx_fixed_cbcr) { -+ dev->colourfx.u = -+ v4l2_to_mmal_effects_values[i].u; -+ dev->colourfx.v = -+ v4l2_to_mmal_effects_values[i].v; -+ } -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ ret = vchiq_mmal_port_parameter_set( -+ dev->instance, control, -+ MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS, -+ &imagefx, sizeof(imagefx)); -+ if (ret) -+ goto exit; -+ -+ ret = vchiq_mmal_port_parameter_set( -+ dev->instance, control, -+ MMAL_PARAMETER_COLOUR_EFFECT, -+ &dev->colourfx, sizeof(dev->colourfx)); -+ } -+ } -+ -+exit: -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "mmal_ctrl:%p ctrl id:0x%x ctrl val:%d imagefx:0x%x color_effect:%s u:%d v:%d ret %d(%d)\n", -+ mmal_ctrl, ctrl->id, ctrl->val, imagefx.effect, -+ dev->colourfx.enable ? "true" : "false", -+ dev->colourfx.u, dev->colourfx.v, -+ ret, (ret == 0 ? 0 : -EINVAL)); -+ return (ret == 0 ? 0 : EINVAL); -+} -+ -+static int ctrl_set_colfx(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret = -EINVAL; -+ struct vchiq_mmal_port *control; -+ -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ dev->colourfx.enable = (ctrl->val & 0xff00) >> 8; -+ dev->colourfx.enable = ctrl->val & 0xff; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, control, -+ MMAL_PARAMETER_COLOUR_EFFECT, -+ &dev->colourfx, sizeof(dev->colourfx)); -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: After: mmal_ctrl:%p ctrl id:0x%x ctrl val:%d ret %d(%d)\n", -+ __func__, mmal_ctrl, ctrl->id, ctrl->val, ret, -+ (ret == 0 ? 0 : -EINVAL)); -+ return (ret == 0 ? 0 : EINVAL); -+} -+ -+static int ctrl_set_bitrate(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret; -+ struct vchiq_mmal_port *encoder_out; -+ -+ dev->capture.encode_bitrate = ctrl->val; -+ -+ encoder_out = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, encoder_out, -+ mmal_ctrl->mmal_id, -+ &ctrl->val, sizeof(ctrl->val)); -+ ret = 0; -+ return ret; -+} -+ -+static int ctrl_set_bitrate_mode(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 bitrate_mode; -+ struct vchiq_mmal_port *encoder_out; -+ -+ encoder_out = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; -+ -+ dev->capture.encode_bitrate_mode = ctrl->val; -+ switch (ctrl->val) { -+ default: -+ case V4L2_MPEG_VIDEO_BITRATE_MODE_VBR: -+ bitrate_mode = MMAL_VIDEO_RATECONTROL_VARIABLE; -+ break; -+ case V4L2_MPEG_VIDEO_BITRATE_MODE_CBR: -+ bitrate_mode = MMAL_VIDEO_RATECONTROL_CONSTANT; -+ break; -+ } -+ -+ vchiq_mmal_port_parameter_set(dev->instance, encoder_out, -+ mmal_ctrl->mmal_id, -+ &bitrate_mode, -+ sizeof(bitrate_mode)); -+ return 0; -+} -+ -+static int ctrl_set_image_encode_output(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *jpeg_out; -+ -+ jpeg_out = &dev->component[MMAL_COMPONENT_IMAGE_ENCODE]->output[0]; -+ -+ u32_value = ctrl->val; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, jpeg_out, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_video_encode_param_output(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ u32 u32_value; -+ struct vchiq_mmal_port *vid_enc_ctl; -+ -+ vid_enc_ctl = &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0]; -+ -+ u32_value = ctrl->val; -+ -+ return vchiq_mmal_port_parameter_set(dev->instance, vid_enc_ctl, -+ mmal_ctrl->mmal_id, -+ &u32_value, sizeof(u32_value)); -+} -+ -+static int ctrl_set_video_encode_profile_level(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ struct mmal_parameter_video_profile param; -+ int ret = 0; -+ -+ if (ctrl->id == V4L2_CID_MPEG_VIDEO_H264_PROFILE) { -+ switch (ctrl->val) { -+ case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: -+ case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE: -+ case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: -+ case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: -+ dev->capture.enc_profile = ctrl->val; -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ } else if (ctrl->id == V4L2_CID_MPEG_VIDEO_H264_LEVEL) { -+ switch (ctrl->val) { -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_0: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1B: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_1: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_2: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_3: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_0: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_1: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_2: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_0: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: -+ case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: -+ dev->capture.enc_level = ctrl->val; -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ } -+ -+ if (!ret) { -+ switch (dev->capture.enc_profile) { -+ case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: -+ param.profile = MMAL_VIDEO_PROFILE_H264_BASELINE; -+ break; -+ case V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE: -+ param.profile = -+ MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE; -+ break; -+ case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: -+ param.profile = MMAL_VIDEO_PROFILE_H264_MAIN; -+ break; -+ case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: -+ param.profile = MMAL_VIDEO_PROFILE_H264_HIGH; -+ break; -+ default: -+ /* Should never get here */ -+ break; -+ } -+ -+ switch (dev->capture.enc_level) { -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_0: -+ param.level = MMAL_VIDEO_LEVEL_H264_1; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1B: -+ param.level = MMAL_VIDEO_LEVEL_H264_1b; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_1: -+ param.level = MMAL_VIDEO_LEVEL_H264_11; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_2: -+ param.level = MMAL_VIDEO_LEVEL_H264_12; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_1_3: -+ param.level = MMAL_VIDEO_LEVEL_H264_13; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_0: -+ param.level = MMAL_VIDEO_LEVEL_H264_2; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_1: -+ param.level = MMAL_VIDEO_LEVEL_H264_21; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_2_2: -+ param.level = MMAL_VIDEO_LEVEL_H264_22; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_0: -+ param.level = MMAL_VIDEO_LEVEL_H264_3; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: -+ param.level = MMAL_VIDEO_LEVEL_H264_31; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: -+ param.level = MMAL_VIDEO_LEVEL_H264_32; -+ break; -+ case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: -+ param.level = MMAL_VIDEO_LEVEL_H264_4; -+ break; -+ default: -+ /* Should never get here */ -+ break; -+ } -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, -+ &dev->component[MMAL_COMPONENT_VIDEO_ENCODE]->output[0], -+ mmal_ctrl->mmal_id, -+ ¶m, sizeof(param)); -+ } -+ return ret; -+} -+ -+static int ctrl_set_scene_mode(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl *ctrl, -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl) -+{ -+ int ret = 0; -+ int shutter_speed; -+ struct vchiq_mmal_port *control; -+ -+ v4l2_dbg(0, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "scene mode selected %d, was %d\n", ctrl->val, -+ dev->scene_mode); -+ control = &dev->component[MMAL_COMPONENT_CAMERA]->control; -+ -+ if (ctrl->val == dev->scene_mode) -+ return 0; -+ -+ if (ctrl->val == V4L2_SCENE_MODE_NONE) { -+ /* Restore all user selections */ -+ dev->scene_mode = V4L2_SCENE_MODE_NONE; -+ -+ if (dev->exposure_mode_user == MMAL_PARAM_EXPOSUREMODE_OFF) -+ shutter_speed = dev->manual_shutter_speed; -+ else -+ shutter_speed = 0; -+ -+ v4l2_dbg(0, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: scene mode none: shut_speed %d, exp_mode %d, metering %d\n", -+ __func__, shutter_speed, dev->exposure_mode_user, -+ dev->metering_mode); -+ ret = vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_SHUTTER_SPEED, -+ &shutter_speed, -+ sizeof(shutter_speed)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_EXPOSURE_MODE, -+ &dev->exposure_mode_user, -+ sizeof(u32)); -+ dev->exposure_mode_active = dev->exposure_mode_user; -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_EXP_METERING_MODE, -+ &dev->metering_mode, -+ sizeof(u32)); -+ ret += set_framerate_params(dev); -+ } else { -+ /* Set up scene mode */ -+ int i; -+ const struct v4l2_mmal_scene_config *scene = NULL; -+ int shutter_speed; -+ enum mmal_parameter_exposuremode exposure_mode; -+ enum mmal_parameter_exposuremeteringmode metering_mode; -+ -+ for (i = 0; i < ARRAY_SIZE(scene_configs); i++) { -+ if (scene_configs[i].v4l2_scene == -+ ctrl->val) { -+ scene = &scene_configs[i]; -+ break; -+ } -+ } -+ if (!scene) -+ return -EINVAL; -+ if (i >= ARRAY_SIZE(scene_configs)) -+ return -EINVAL; -+ -+ /* Set all the values */ -+ dev->scene_mode = ctrl->val; -+ -+ if (scene->exposure_mode == MMAL_PARAM_EXPOSUREMODE_OFF) -+ shutter_speed = dev->manual_shutter_speed; -+ else -+ shutter_speed = 0; -+ exposure_mode = scene->exposure_mode; -+ metering_mode = scene->metering_mode; -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: scene mode none: shut_speed %d, exp_mode %d, metering %d\n", -+ __func__, shutter_speed, exposure_mode, metering_mode); -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, control, -+ MMAL_PARAMETER_SHUTTER_SPEED, -+ &shutter_speed, -+ sizeof(shutter_speed)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ control, -+ MMAL_PARAMETER_EXPOSURE_MODE, -+ &exposure_mode, -+ sizeof(u32)); -+ dev->exposure_mode_active = exposure_mode; -+ ret += vchiq_mmal_port_parameter_set(dev->instance, control, -+ MMAL_PARAMETER_EXPOSURE_MODE, -+ &exposure_mode, -+ sizeof(u32)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, control, -+ MMAL_PARAMETER_EXP_METERING_MODE, -+ &metering_mode, -+ sizeof(u32)); -+ ret += set_framerate_params(dev); -+ } -+ if (ret) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "%s: Setting scene to %d, ret=%d\n", -+ __func__, ctrl->val, ret); -+ ret = -EINVAL; -+ } -+ return 0; -+} -+ -+static int bm2835_mmal_s_ctrl(struct v4l2_ctrl *ctrl) -+{ -+ struct bm2835_mmal_dev *dev = -+ container_of(ctrl->handler, struct bm2835_mmal_dev, -+ ctrl_handler); -+ const struct bm2835_mmal_v4l2_ctrl *mmal_ctrl = ctrl->priv; -+ int ret; -+ -+ if ((mmal_ctrl == NULL) || -+ (mmal_ctrl->id != ctrl->id) || -+ (mmal_ctrl->setter == NULL)) { -+ pr_warn("mmal_ctrl:%p ctrl id:%d\n", mmal_ctrl, ctrl->id); -+ return -EINVAL; -+ } -+ -+ ret = mmal_ctrl->setter(dev, ctrl, mmal_ctrl); -+ if (ret) -+ pr_warn("ctrl id:%d/MMAL param %08X- returned ret %d\n", -+ ctrl->id, mmal_ctrl->mmal_id, ret); -+ if (mmal_ctrl->ignore_errors) -+ ret = 0; -+ return ret; -+} -+ -+static const struct v4l2_ctrl_ops bm2835_mmal_ctrl_ops = { -+ .s_ctrl = bm2835_mmal_s_ctrl, -+}; -+ -+ -+ -+static const struct bm2835_mmal_v4l2_ctrl v4l2_ctrls[V4L2_CTRL_COUNT] = { -+ { -+ V4L2_CID_SATURATION, MMAL_CONTROL_TYPE_STD, -+ -100, 100, 0, 1, NULL, -+ MMAL_PARAMETER_SATURATION, -+ &ctrl_set_rational, -+ false -+ }, -+ { -+ V4L2_CID_SHARPNESS, MMAL_CONTROL_TYPE_STD, -+ -100, 100, 0, 1, NULL, -+ MMAL_PARAMETER_SHARPNESS, -+ &ctrl_set_rational, -+ false -+ }, -+ { -+ V4L2_CID_CONTRAST, MMAL_CONTROL_TYPE_STD, -+ -100, 100, 0, 1, NULL, -+ MMAL_PARAMETER_CONTRAST, -+ &ctrl_set_rational, -+ false -+ }, -+ { -+ V4L2_CID_BRIGHTNESS, MMAL_CONTROL_TYPE_STD, -+ 0, 100, 50, 1, NULL, -+ MMAL_PARAMETER_BRIGHTNESS, -+ &ctrl_set_rational, -+ false -+ }, -+ { -+ V4L2_CID_ISO_SENSITIVITY, MMAL_CONTROL_TYPE_INT_MENU, -+ 0, ARRAY_SIZE(iso_qmenu) - 1, 0, 1, iso_qmenu, -+ MMAL_PARAMETER_ISO, -+ &ctrl_set_iso, -+ false -+ }, -+ { -+ V4L2_CID_ISO_SENSITIVITY_AUTO, MMAL_CONTROL_TYPE_STD_MENU, -+ 0, 1, V4L2_ISO_SENSITIVITY_AUTO, 1, NULL, -+ MMAL_PARAMETER_ISO, -+ &ctrl_set_iso, -+ false -+ }, -+ { -+ V4L2_CID_IMAGE_STABILIZATION, MMAL_CONTROL_TYPE_STD, -+ 0, 1, 0, 1, NULL, -+ MMAL_PARAMETER_VIDEO_STABILISATION, -+ &ctrl_set_value, -+ false -+ }, -+/* { -+ 0, MMAL_CONTROL_TYPE_CLUSTER, 3, 1, 0, NULL, 0, NULL -+ }, */ -+ { -+ V4L2_CID_EXPOSURE_AUTO, MMAL_CONTROL_TYPE_STD_MENU, -+ ~0x03, 3, V4L2_EXPOSURE_AUTO, 0, NULL, -+ MMAL_PARAMETER_EXPOSURE_MODE, -+ &ctrl_set_exposure, -+ false -+ }, -+/* todo this needs mixing in with set exposure -+ { -+ V4L2_CID_SCENE_MODE, MMAL_CONTROL_TYPE_STD_MENU, -+ }, -+ */ -+ { -+ V4L2_CID_EXPOSURE_ABSOLUTE, MMAL_CONTROL_TYPE_STD, -+ /* Units of 100usecs */ -+ 1, 1*1000*10, 100*10, 1, NULL, -+ MMAL_PARAMETER_SHUTTER_SPEED, -+ &ctrl_set_exposure, -+ false -+ }, -+ { -+ V4L2_CID_AUTO_EXPOSURE_BIAS, MMAL_CONTROL_TYPE_INT_MENU, -+ 0, ARRAY_SIZE(ev_bias_qmenu) - 1, -+ (ARRAY_SIZE(ev_bias_qmenu)+1)/2 - 1, 0, ev_bias_qmenu, -+ MMAL_PARAMETER_EXPOSURE_COMP, -+ &ctrl_set_value_ev, -+ false -+ }, -+ { -+ V4L2_CID_EXPOSURE_AUTO_PRIORITY, MMAL_CONTROL_TYPE_STD, -+ 0, 1, -+ 0, 1, NULL, -+ 0, /* Dummy MMAL ID as it gets mapped into FPS range*/ -+ &ctrl_set_exposure, -+ false -+ }, -+ { -+ V4L2_CID_EXPOSURE_METERING, -+ MMAL_CONTROL_TYPE_STD_MENU, -+ ~0x7, 2, V4L2_EXPOSURE_METERING_AVERAGE, 0, NULL, -+ MMAL_PARAMETER_EXP_METERING_MODE, -+ &ctrl_set_metering_mode, -+ false -+ }, -+ { -+ V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE, -+ MMAL_CONTROL_TYPE_STD_MENU, -+ ~0x3ff, 9, V4L2_WHITE_BALANCE_AUTO, 0, NULL, -+ MMAL_PARAMETER_AWB_MODE, -+ &ctrl_set_awb_mode, -+ false -+ }, -+ { -+ V4L2_CID_RED_BALANCE, MMAL_CONTROL_TYPE_STD, -+ 1, 7999, 1000, 1, NULL, -+ MMAL_PARAMETER_CUSTOM_AWB_GAINS, -+ &ctrl_set_awb_gains, -+ false -+ }, -+ { -+ V4L2_CID_BLUE_BALANCE, MMAL_CONTROL_TYPE_STD, -+ 1, 7999, 1000, 1, NULL, -+ MMAL_PARAMETER_CUSTOM_AWB_GAINS, -+ &ctrl_set_awb_gains, -+ false -+ }, -+ { -+ V4L2_CID_COLORFX, MMAL_CONTROL_TYPE_STD_MENU, -+ 0, 15, V4L2_COLORFX_NONE, 0, NULL, -+ MMAL_PARAMETER_IMAGE_EFFECT, -+ &ctrl_set_image_effect, -+ false -+ }, -+ { -+ V4L2_CID_COLORFX_CBCR, MMAL_CONTROL_TYPE_STD, -+ 0, 0xffff, 0x8080, 1, NULL, -+ MMAL_PARAMETER_COLOUR_EFFECT, -+ &ctrl_set_colfx, -+ false -+ }, -+ { -+ V4L2_CID_ROTATE, MMAL_CONTROL_TYPE_STD, -+ 0, 360, 0, 90, NULL, -+ MMAL_PARAMETER_ROTATION, -+ &ctrl_set_rotate, -+ false -+ }, -+ { -+ V4L2_CID_HFLIP, MMAL_CONTROL_TYPE_STD, -+ 0, 1, 0, 1, NULL, -+ MMAL_PARAMETER_MIRROR, -+ &ctrl_set_flip, -+ false -+ }, -+ { -+ V4L2_CID_VFLIP, MMAL_CONTROL_TYPE_STD, -+ 0, 1, 0, 1, NULL, -+ MMAL_PARAMETER_MIRROR, -+ &ctrl_set_flip, -+ false -+ }, -+ { -+ V4L2_CID_MPEG_VIDEO_BITRATE_MODE, MMAL_CONTROL_TYPE_STD_MENU, -+ 0, ARRAY_SIZE(bitrate_mode_qmenu) - 1, -+ 0, 0, bitrate_mode_qmenu, -+ MMAL_PARAMETER_RATECONTROL, -+ &ctrl_set_bitrate_mode, -+ false -+ }, -+ { -+ V4L2_CID_MPEG_VIDEO_BITRATE, MMAL_CONTROL_TYPE_STD, -+ 25*1000, 25*1000*1000, 10*1000*1000, 25*1000, NULL, -+ MMAL_PARAMETER_VIDEO_BIT_RATE, -+ &ctrl_set_bitrate, -+ false -+ }, -+ { -+ V4L2_CID_JPEG_COMPRESSION_QUALITY, MMAL_CONTROL_TYPE_STD, -+ 1, 100, -+ 30, 1, NULL, -+ MMAL_PARAMETER_JPEG_Q_FACTOR, -+ &ctrl_set_image_encode_output, -+ false -+ }, -+ { -+ V4L2_CID_POWER_LINE_FREQUENCY, MMAL_CONTROL_TYPE_STD_MENU, -+ 0, ARRAY_SIZE(mains_freq_qmenu) - 1, -+ 1, 1, NULL, -+ MMAL_PARAMETER_FLICKER_AVOID, -+ &ctrl_set_flicker_avoidance, -+ false -+ }, -+ { -+ V4L2_CID_MPEG_VIDEO_REPEAT_SEQ_HEADER, MMAL_CONTROL_TYPE_STD, -+ 0, 1, -+ 0, 1, NULL, -+ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER, -+ &ctrl_set_video_encode_param_output, -+ true /* Errors ignored as requires latest firmware to work */ -+ }, -+ { -+ V4L2_CID_MPEG_VIDEO_H264_PROFILE, -+ MMAL_CONTROL_TYPE_STD_MENU, -+ ~((1<ctrls[c]) && (v4l2_ctrls[c].setter)) { -+ ret = v4l2_ctrls[c].setter(dev, dev->ctrls[c], -+ &v4l2_ctrls[c]); -+ if (!v4l2_ctrls[c].ignore_errors && ret) { -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Failed when setting default values for ctrl %d\n", -+ c); -+ break; -+ } -+ } -+ } -+ return ret; -+} -+ -+int set_framerate_params(struct bm2835_mmal_dev *dev) -+{ -+ struct mmal_parameter_fps_range fps_range; -+ int ret; -+ -+ if ((dev->exposure_mode_active != MMAL_PARAM_EXPOSUREMODE_OFF) && -+ (dev->exp_auto_priority)) { -+ /* Variable FPS. Define min FPS as 1fps. -+ * Max as max defined FPS. -+ */ -+ fps_range.fps_low.num = 1; -+ fps_range.fps_low.den = 1; -+ fps_range.fps_high.num = dev->capture.timeperframe.denominator; -+ fps_range.fps_high.den = dev->capture.timeperframe.numerator; -+ } else { -+ /* Fixed FPS - set min and max to be the same */ -+ fps_range.fps_low.num = fps_range.fps_high.num = -+ dev->capture.timeperframe.denominator; -+ fps_range.fps_low.den = fps_range.fps_high.den = -+ dev->capture.timeperframe.numerator; -+ } -+ -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Set fps range to %d/%d to %d/%d\n", -+ fps_range.fps_low.num, -+ fps_range.fps_low.den, -+ fps_range.fps_high.num, -+ fps_range.fps_high.den -+ ); -+ -+ ret = vchiq_mmal_port_parameter_set(dev->instance, -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_PREVIEW], -+ MMAL_PARAMETER_FPS_RANGE, -+ &fps_range, sizeof(fps_range)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_VIDEO], -+ MMAL_PARAMETER_FPS_RANGE, -+ &fps_range, sizeof(fps_range)); -+ ret += vchiq_mmal_port_parameter_set(dev->instance, -+ &dev->component[MMAL_COMPONENT_CAMERA]-> -+ output[MMAL_CAMERA_PORT_CAPTURE], -+ MMAL_PARAMETER_FPS_RANGE, -+ &fps_range, sizeof(fps_range)); -+ if (ret) -+ v4l2_dbg(0, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Failed to set fps ret %d\n", -+ ret); -+ -+ return ret; -+ -+} -+ -+int bm2835_mmal_init_controls(struct bm2835_mmal_dev *dev, -+ struct v4l2_ctrl_handler *hdl) -+{ -+ int c; -+ const struct bm2835_mmal_v4l2_ctrl *ctrl; -+ -+ v4l2_ctrl_handler_init(hdl, V4L2_CTRL_COUNT); -+ -+ for (c = 0; c < V4L2_CTRL_COUNT; c++) { -+ ctrl = &v4l2_ctrls[c]; -+ -+ switch (ctrl->type) { -+ case MMAL_CONTROL_TYPE_STD: -+ dev->ctrls[c] = v4l2_ctrl_new_std(hdl, -+ &bm2835_mmal_ctrl_ops, ctrl->id, -+ ctrl->min, ctrl->max, ctrl->step, ctrl->def); -+ break; -+ -+ case MMAL_CONTROL_TYPE_STD_MENU: -+ { -+ int mask = ctrl->min; -+ -+ if (ctrl->id == V4L2_CID_SCENE_MODE) { -+ /* Special handling to work out the mask -+ * value based on the scene_configs array -+ * at runtime. Reduces the chance of -+ * mismatches. -+ */ -+ int i; -+ mask = 1<ctrls[c] = v4l2_ctrl_new_std_menu(hdl, -+ &bm2835_mmal_ctrl_ops, ctrl->id, -+ ctrl->max, mask, ctrl->def); -+ break; -+ } -+ -+ case MMAL_CONTROL_TYPE_INT_MENU: -+ dev->ctrls[c] = v4l2_ctrl_new_int_menu(hdl, -+ &bm2835_mmal_ctrl_ops, ctrl->id, -+ ctrl->max, ctrl->def, ctrl->imenu); -+ break; -+ -+ case MMAL_CONTROL_TYPE_CLUSTER: -+ /* skip this entry when constructing controls */ -+ continue; -+ } -+ -+ if (hdl->error) -+ break; -+ -+ dev->ctrls[c]->priv = (void *)ctrl; -+ } -+ -+ if (hdl->error) { -+ pr_err("error adding control %d/%d id 0x%x\n", c, -+ V4L2_CTRL_COUNT, ctrl->id); -+ return hdl->error; -+ } -+ -+ for (c = 0; c < V4L2_CTRL_COUNT; c++) { -+ ctrl = &v4l2_ctrls[c]; -+ -+ switch (ctrl->type) { -+ case MMAL_CONTROL_TYPE_CLUSTER: -+ v4l2_ctrl_auto_cluster(ctrl->min, -+ &dev->ctrls[c+1], -+ ctrl->max, -+ ctrl->def); -+ break; -+ -+ case MMAL_CONTROL_TYPE_STD: -+ case MMAL_CONTROL_TYPE_STD_MENU: -+ case MMAL_CONTROL_TYPE_INT_MENU: -+ break; -+ } -+ -+ } -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-common.h -@@ -0,0 +1,53 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ * -+ * MMAL structures -+ * -+ */ -+ -+#define MMAL_FOURCC(a, b, c, d) ((a) | (b << 8) | (c << 16) | (d << 24)) -+#define MMAL_MAGIC MMAL_FOURCC('m', 'm', 'a', 'l') -+ -+/** Special value signalling that time is not known */ -+#define MMAL_TIME_UNKNOWN (1LL<<63) -+ -+/* mapping between v4l and mmal video modes */ -+struct mmal_fmt { -+ char *name; -+ u32 fourcc; /* v4l2 format id */ -+ int flags; /* v4l2 flags field */ -+ u32 mmal; -+ int depth; -+ u32 mmal_component; /* MMAL component index to be used to encode */ -+ u32 ybbp; /* depth of first Y plane for planar formats */ -+}; -+ -+/* buffer for one video frame */ -+struct mmal_buffer { -+ /* v4l buffer data -- must be first */ -+ struct vb2_v4l2_buffer vb; -+ -+ /* list of buffers available */ -+ struct list_head list; -+ -+ void *buffer; /* buffer pointer */ -+ unsigned long buffer_size; /* size of allocated buffer */ -+}; -+ -+/* */ -+struct mmal_colourfx { -+ s32 enable; -+ u32 u; -+ u32 v; -+}; ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-encodings.h -@@ -0,0 +1,127 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+#ifndef MMAL_ENCODINGS_H -+#define MMAL_ENCODINGS_H -+ -+#define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4') -+#define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3') -+#define MMAL_ENCODING_MP4V MMAL_FOURCC('M', 'P', '4', 'V') -+#define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V') -+#define MMAL_ENCODING_MP1V MMAL_FOURCC('M', 'P', '1', 'V') -+#define MMAL_ENCODING_WMV3 MMAL_FOURCC('W', 'M', 'V', '3') -+#define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2') -+#define MMAL_ENCODING_WMV1 MMAL_FOURCC('W', 'M', 'V', '1') -+#define MMAL_ENCODING_WVC1 MMAL_FOURCC('W', 'V', 'C', '1') -+#define MMAL_ENCODING_VP8 MMAL_FOURCC('V', 'P', '8', ' ') -+#define MMAL_ENCODING_VP7 MMAL_FOURCC('V', 'P', '7', ' ') -+#define MMAL_ENCODING_VP6 MMAL_FOURCC('V', 'P', '6', ' ') -+#define MMAL_ENCODING_THEORA MMAL_FOURCC('T', 'H', 'E', 'O') -+#define MMAL_ENCODING_SPARK MMAL_FOURCC('S', 'P', 'R', 'K') -+#define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G') -+ -+#define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G') -+#define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ') -+#define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ') -+#define MMAL_ENCODING_PPM MMAL_FOURCC('P', 'P', 'M', ' ') -+#define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ') -+#define MMAL_ENCODING_BMP MMAL_FOURCC('B', 'M', 'P', ' ') -+ -+#define MMAL_ENCODING_I420 MMAL_FOURCC('I', '4', '2', '0') -+#define MMAL_ENCODING_I420_SLICE MMAL_FOURCC('S', '4', '2', '0') -+#define MMAL_ENCODING_YV12 MMAL_FOURCC('Y', 'V', '1', '2') -+#define MMAL_ENCODING_I422 MMAL_FOURCC('I', '4', '2', '2') -+#define MMAL_ENCODING_I422_SLICE MMAL_FOURCC('S', '4', '2', '2') -+#define MMAL_ENCODING_YUYV MMAL_FOURCC('Y', 'U', 'Y', 'V') -+#define MMAL_ENCODING_YVYU MMAL_FOURCC('Y', 'V', 'Y', 'U') -+#define MMAL_ENCODING_UYVY MMAL_FOURCC('U', 'Y', 'V', 'Y') -+#define MMAL_ENCODING_VYUY MMAL_FOURCC('V', 'Y', 'U', 'Y') -+#define MMAL_ENCODING_NV12 MMAL_FOURCC('N', 'V', '1', '2') -+#define MMAL_ENCODING_NV21 MMAL_FOURCC('N', 'V', '2', '1') -+#define MMAL_ENCODING_ARGB MMAL_FOURCC('A', 'R', 'G', 'B') -+#define MMAL_ENCODING_RGBA MMAL_FOURCC('R', 'G', 'B', 'A') -+#define MMAL_ENCODING_ABGR MMAL_FOURCC('A', 'B', 'G', 'R') -+#define MMAL_ENCODING_BGRA MMAL_FOURCC('B', 'G', 'R', 'A') -+#define MMAL_ENCODING_RGB16 MMAL_FOURCC('R', 'G', 'B', '2') -+#define MMAL_ENCODING_RGB24 MMAL_FOURCC('R', 'G', 'B', '3') -+#define MMAL_ENCODING_RGB32 MMAL_FOURCC('R', 'G', 'B', '4') -+#define MMAL_ENCODING_BGR16 MMAL_FOURCC('B', 'G', 'R', '2') -+#define MMAL_ENCODING_BGR24 MMAL_FOURCC('B', 'G', 'R', '3') -+#define MMAL_ENCODING_BGR32 MMAL_FOURCC('B', 'G', 'R', '4') -+ -+/** SAND Video (YUVUV128) format, native format understood by VideoCore. -+ * This format is *not* opaque - if requested you will receive full frames -+ * of YUV_UV video. -+ */ -+#define MMAL_ENCODING_YUVUV128 MMAL_FOURCC('S', 'A', 'N', 'D') -+ -+/** VideoCore opaque image format, image handles are returned to -+ * the host but not the actual image data. -+ */ -+#define MMAL_ENCODING_OPAQUE MMAL_FOURCC('O', 'P', 'Q', 'V') -+ -+/** An EGL image handle -+ */ -+#define MMAL_ENCODING_EGL_IMAGE MMAL_FOURCC('E', 'G', 'L', 'I') -+ -+/* }@ */ -+ -+/** \name Pre-defined audio encodings */ -+/* @{ */ -+#define MMAL_ENCODING_PCM_UNSIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'U') -+#define MMAL_ENCODING_PCM_UNSIGNED_LE MMAL_FOURCC('p', 'c', 'm', 'u') -+#define MMAL_ENCODING_PCM_SIGNED_BE MMAL_FOURCC('P', 'C', 'M', 'S') -+#define MMAL_ENCODING_PCM_SIGNED_LE MMAL_FOURCC('p', 'c', 'm', 's') -+#define MMAL_ENCODING_PCM_FLOAT_BE MMAL_FOURCC('P', 'C', 'M', 'F') -+#define MMAL_ENCODING_PCM_FLOAT_LE MMAL_FOURCC('p', 'c', 'm', 'f') -+ -+/* Pre-defined H264 encoding variants */ -+ -+/** ISO 14496-10 Annex B byte stream format */ -+#define MMAL_ENCODING_VARIANT_H264_DEFAULT 0 -+/** ISO 14496-15 AVC stream format */ -+#define MMAL_ENCODING_VARIANT_H264_AVC1 MMAL_FOURCC('A', 'V', 'C', '1') -+/** Implicitly delineated NAL units without emulation prevention */ -+#define MMAL_ENCODING_VARIANT_H264_RAW MMAL_FOURCC('R', 'A', 'W', ' ') -+ -+ -+/** \defgroup MmalColorSpace List of pre-defined video color spaces -+ * This defines a list of common color spaces. This list isn't exhaustive and -+ * is only provided as a convenience to avoid clients having to use FourCC -+ * codes directly. However components are allowed to define and use their own -+ * FourCC codes. -+ */ -+/* @{ */ -+ -+/** Unknown color space */ -+#define MMAL_COLOR_SPACE_UNKNOWN 0 -+/** ITU-R BT.601-5 [SDTV] */ -+#define MMAL_COLOR_SPACE_ITUR_BT601 MMAL_FOURCC('Y', '6', '0', '1') -+/** ITU-R BT.709-3 [HDTV] */ -+#define MMAL_COLOR_SPACE_ITUR_BT709 MMAL_FOURCC('Y', '7', '0', '9') -+/** JPEG JFIF */ -+#define MMAL_COLOR_SPACE_JPEG_JFIF MMAL_FOURCC('Y', 'J', 'F', 'I') -+/** Title 47 Code of Federal Regulations (2003) 73.682 (a) (20) */ -+#define MMAL_COLOR_SPACE_FCC MMAL_FOURCC('Y', 'F', 'C', 'C') -+/** Society of Motion Picture and Television Engineers 240M (1999) */ -+#define MMAL_COLOR_SPACE_SMPTE240M MMAL_FOURCC('Y', '2', '4', '0') -+/** ITU-R BT.470-2 System M */ -+#define MMAL_COLOR_SPACE_BT470_2_M MMAL_FOURCC('Y', '_', '_', 'M') -+/** ITU-R BT.470-2 System BG */ -+#define MMAL_COLOR_SPACE_BT470_2_BG MMAL_FOURCC('Y', '_', 'B', 'G') -+/** JPEG JFIF, but with 16..255 luma */ -+#define MMAL_COLOR_SPACE_JFIF_Y16_255 MMAL_FOURCC('Y', 'Y', '1', '6') -+/* @} MmalColorSpace List */ -+ -+#endif /* MMAL_ENCODINGS_H */ ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-msg-common.h -@@ -0,0 +1,50 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+#ifndef MMAL_MSG_COMMON_H -+#define MMAL_MSG_COMMON_H -+ -+enum mmal_msg_status { -+ MMAL_MSG_STATUS_SUCCESS = 0, /**< Success */ -+ MMAL_MSG_STATUS_ENOMEM, /**< Out of memory */ -+ MMAL_MSG_STATUS_ENOSPC, /**< Out of resources other than memory */ -+ MMAL_MSG_STATUS_EINVAL, /**< Argument is invalid */ -+ MMAL_MSG_STATUS_ENOSYS, /**< Function not implemented */ -+ MMAL_MSG_STATUS_ENOENT, /**< No such file or directory */ -+ MMAL_MSG_STATUS_ENXIO, /**< No such device or address */ -+ MMAL_MSG_STATUS_EIO, /**< I/O error */ -+ MMAL_MSG_STATUS_ESPIPE, /**< Illegal seek */ -+ MMAL_MSG_STATUS_ECORRUPT, /**< Data is corrupt \attention */ -+ MMAL_MSG_STATUS_ENOTREADY, /**< Component is not ready */ -+ MMAL_MSG_STATUS_ECONFIG, /**< Component is not configured */ -+ MMAL_MSG_STATUS_EISCONN, /**< Port is already connected */ -+ MMAL_MSG_STATUS_ENOTCONN, /**< Port is disconnected */ -+ MMAL_MSG_STATUS_EAGAIN, /**< Resource temporarily unavailable. */ -+ MMAL_MSG_STATUS_EFAULT, /**< Bad address */ -+}; -+ -+struct mmal_rect { -+ s32 x; /**< x coordinate (from left) */ -+ s32 y; /**< y coordinate (from top) */ -+ s32 width; /**< width */ -+ s32 height; /**< height */ -+}; -+ -+struct mmal_rational { -+ s32 num; /**< Numerator */ -+ s32 den; /**< Denominator */ -+}; -+ -+#endif /* MMAL_MSG_COMMON_H */ ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-msg-format.h -@@ -0,0 +1,81 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+#ifndef MMAL_MSG_FORMAT_H -+#define MMAL_MSG_FORMAT_H -+ -+#include "mmal-msg-common.h" -+ -+/* MMAL_ES_FORMAT_T */ -+ -+ -+struct mmal_audio_format { -+ u32 channels; /**< Number of audio channels */ -+ u32 sample_rate; /**< Sample rate */ -+ -+ u32 bits_per_sample; /**< Bits per sample */ -+ u32 block_align; /**< Size of a block of data */ -+}; -+ -+struct mmal_video_format { -+ u32 width; /**< Width of frame in pixels */ -+ u32 height; /**< Height of frame in rows of pixels */ -+ struct mmal_rect crop; /**< Visible region of the frame */ -+ struct mmal_rational frame_rate; /**< Frame rate */ -+ struct mmal_rational par; /**< Pixel aspect ratio */ -+ -+ /* FourCC specifying the color space of the video stream. See the -+ * \ref MmalColorSpace "pre-defined color spaces" for some examples. -+ */ -+ u32 color_space; -+}; -+ -+struct mmal_subpicture_format { -+ u32 x_offset; -+ u32 y_offset; -+}; -+ -+union mmal_es_specific_format { -+ struct mmal_audio_format audio; -+ struct mmal_video_format video; -+ struct mmal_subpicture_format subpicture; -+}; -+ -+/** Definition of an elementary stream format (MMAL_ES_FORMAT_T) */ -+struct mmal_es_format { -+ u32 type; /* enum mmal_es_type */ -+ -+ u32 encoding; /* FourCC specifying encoding of the elementary stream.*/ -+ u32 encoding_variant; /* FourCC specifying the specific -+ * encoding variant of the elementary -+ * stream. -+ */ -+ -+ union mmal_es_specific_format *es; /* TODO: pointers in -+ * message serialisation?!? -+ */ -+ /* Type specific -+ * information for the -+ * elementary stream -+ */ -+ -+ u32 bitrate; /**< Bitrate in bits per second */ -+ u32 flags; /**< Flags describing properties of the elementary stream. */ -+ -+ u32 extradata_size; /**< Size of the codec specific data */ -+ u8 *extradata; /**< Codec specific data */ -+}; -+ -+#endif /* MMAL_MSG_FORMAT_H */ ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-msg-port.h -@@ -0,0 +1,107 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+/* MMAL_PORT_TYPE_T */ -+enum mmal_port_type { -+ MMAL_PORT_TYPE_UNKNOWN = 0, /**< Unknown port type */ -+ MMAL_PORT_TYPE_CONTROL, /**< Control port */ -+ MMAL_PORT_TYPE_INPUT, /**< Input port */ -+ MMAL_PORT_TYPE_OUTPUT, /**< Output port */ -+ MMAL_PORT_TYPE_CLOCK, /**< Clock port */ -+}; -+ -+/** The port is pass-through and doesn't need buffer headers allocated */ -+#define MMAL_PORT_CAPABILITY_PASSTHROUGH 0x01 -+/** The port wants to allocate the buffer payloads. -+ * This signals a preference that payload allocation should be done -+ * on this port for efficiency reasons. */ -+#define MMAL_PORT_CAPABILITY_ALLOCATION 0x02 -+/** The port supports format change events. -+ * This applies to input ports and is used to let the client know -+ * whether the port supports being reconfigured via a format -+ * change event (i.e. without having to disable the port). */ -+#define MMAL_PORT_CAPABILITY_SUPPORTS_EVENT_FORMAT_CHANGE 0x04 -+ -+/* mmal port structure (MMAL_PORT_T) -+ * -+ * most elements are informational only, the pointer values for -+ * interogation messages are generally provided as additional -+ * strucures within the message. When used to set values only teh -+ * buffer_num, buffer_size and userdata parameters are writable. -+ */ -+struct mmal_port { -+ void *priv; /* Private member used by the framework */ -+ const char *name; /* Port name. Used for debugging purposes (RO) */ -+ -+ u32 type; /* Type of the port (RO) enum mmal_port_type */ -+ u16 index; /* Index of the port in its type list (RO) */ -+ u16 index_all; /* Index of the port in the list of all ports (RO) */ -+ -+ u32 is_enabled; /* Indicates whether the port is enabled or not (RO) */ -+ struct mmal_es_format *format; /* Format of the elementary stream */ -+ -+ u32 buffer_num_min; /* Minimum number of buffers the port -+ * requires (RO). This is set by the -+ * component. -+ */ -+ -+ u32 buffer_size_min; /* Minimum size of buffers the port -+ * requires (RO). This is set by the -+ * component. -+ */ -+ -+ u32 buffer_alignment_min; /* Minimum alignment requirement for -+ * the buffers (RO). A value of -+ * zero means no special alignment -+ * requirements. This is set by the -+ * component. -+ */ -+ -+ u32 buffer_num_recommended; /* Number of buffers the port -+ * recommends for optimal -+ * performance (RO). A value of -+ * zero means no special -+ * recommendation. This is set -+ * by the component. -+ */ -+ -+ u32 buffer_size_recommended; /* Size of buffers the port -+ * recommends for optimal -+ * performance (RO). A value of -+ * zero means no special -+ * recommendation. This is set -+ * by the component. -+ */ -+ -+ u32 buffer_num; /* Actual number of buffers the port will use. -+ * This is set by the client. -+ */ -+ -+ u32 buffer_size; /* Actual maximum size of the buffers that -+ * will be sent to the port. This is set by -+ * the client. -+ */ -+ -+ void *component; /* Component this port belongs to (Read Only) */ -+ -+ void *userdata; /* Field reserved for use by the client */ -+ -+ u32 capabilities; /* Flags describing the capabilities of a -+ * port (RO). Bitwise combination of \ref -+ * portcapabilities "Port capabilities" -+ * values. -+ */ -+ -+}; ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-msg.h -@@ -0,0 +1,404 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+/* all the data structures which serialise the MMAL protocol. note -+ * these are directly mapped onto the recived message data. -+ * -+ * BEWARE: They seem to *assume* pointers are u32 and that there is no -+ * structure padding! -+ * -+ * NOTE: this implementation uses kernel types to ensure sizes. Rather -+ * than assigning values to enums to force their size the -+ * implementation uses fixed size types and not the enums (though the -+ * comments have the actual enum type -+ */ -+ -+#define VC_MMAL_VER 15 -+#define VC_MMAL_MIN_VER 10 -+#define VC_MMAL_SERVER_NAME MAKE_FOURCC("mmal") -+ -+/* max total message size is 512 bytes */ -+#define MMAL_MSG_MAX_SIZE 512 -+/* with six 32bit header elements max payload is therefore 488 bytes */ -+#define MMAL_MSG_MAX_PAYLOAD 488 -+ -+#include "mmal-msg-common.h" -+#include "mmal-msg-format.h" -+#include "mmal-msg-port.h" -+ -+enum mmal_msg_type { -+ MMAL_MSG_TYPE_QUIT = 1, -+ MMAL_MSG_TYPE_SERVICE_CLOSED, -+ MMAL_MSG_TYPE_GET_VERSION, -+ MMAL_MSG_TYPE_COMPONENT_CREATE, -+ MMAL_MSG_TYPE_COMPONENT_DESTROY, /* 5 */ -+ MMAL_MSG_TYPE_COMPONENT_ENABLE, -+ MMAL_MSG_TYPE_COMPONENT_DISABLE, -+ MMAL_MSG_TYPE_PORT_INFO_GET, -+ MMAL_MSG_TYPE_PORT_INFO_SET, -+ MMAL_MSG_TYPE_PORT_ACTION, /* 10 */ -+ MMAL_MSG_TYPE_BUFFER_FROM_HOST, -+ MMAL_MSG_TYPE_BUFFER_TO_HOST, -+ MMAL_MSG_TYPE_GET_STATS, -+ MMAL_MSG_TYPE_PORT_PARAMETER_SET, -+ MMAL_MSG_TYPE_PORT_PARAMETER_GET, /* 15 */ -+ MMAL_MSG_TYPE_EVENT_TO_HOST, -+ MMAL_MSG_TYPE_GET_CORE_STATS_FOR_PORT, -+ MMAL_MSG_TYPE_OPAQUE_ALLOCATOR, -+ MMAL_MSG_TYPE_CONSUME_MEM, -+ MMAL_MSG_TYPE_LMK, /* 20 */ -+ MMAL_MSG_TYPE_OPAQUE_ALLOCATOR_DESC, -+ MMAL_MSG_TYPE_DRM_GET_LHS32, -+ MMAL_MSG_TYPE_DRM_GET_TIME, -+ MMAL_MSG_TYPE_BUFFER_FROM_HOST_ZEROLEN, -+ MMAL_MSG_TYPE_PORT_FLUSH, /* 25 */ -+ MMAL_MSG_TYPE_HOST_LOG, -+ MMAL_MSG_TYPE_MSG_LAST -+}; -+ -+/* port action request messages differ depending on the action type */ -+enum mmal_msg_port_action_type { -+ MMAL_MSG_PORT_ACTION_TYPE_UNKNOWN = 0, /* Unkown action */ -+ MMAL_MSG_PORT_ACTION_TYPE_ENABLE, /* Enable a port */ -+ MMAL_MSG_PORT_ACTION_TYPE_DISABLE, /* Disable a port */ -+ MMAL_MSG_PORT_ACTION_TYPE_FLUSH, /* Flush a port */ -+ MMAL_MSG_PORT_ACTION_TYPE_CONNECT, /* Connect ports */ -+ MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, /* Disconnect ports */ -+ MMAL_MSG_PORT_ACTION_TYPE_SET_REQUIREMENTS, /* Set buffer requirements*/ -+}; -+ -+struct mmal_msg_header { -+ u32 magic; -+ u32 type; /** enum mmal_msg_type */ -+ -+ /* Opaque handle to the control service */ -+ struct mmal_control_service *control_service; -+ -+ struct mmal_msg_context *context; /** a u32 per message context */ -+ u32 status; /** The status of the vchiq operation */ -+ u32 padding; -+}; -+ -+/* Send from VC to host to report version */ -+struct mmal_msg_version { -+ u32 flags; -+ u32 major; -+ u32 minor; -+ u32 minimum; -+}; -+ -+/* request to VC to create component */ -+struct mmal_msg_component_create { -+ void *client_component; /* component context */ -+ char name[128]; -+ u32 pid; /* For debug */ -+}; -+ -+/* reply from VC to component creation request */ -+struct mmal_msg_component_create_reply { -+ u32 status; /** enum mmal_msg_status - how does this differ to -+ * the one in the header? -+ */ -+ u32 component_handle; /* VideoCore handle for component */ -+ u32 input_num; /* Number of input ports */ -+ u32 output_num; /* Number of output ports */ -+ u32 clock_num; /* Number of clock ports */ -+}; -+ -+/* request to VC to destroy a component */ -+struct mmal_msg_component_destroy { -+ u32 component_handle; -+}; -+ -+struct mmal_msg_component_destroy_reply { -+ u32 status; /** The component destruction status */ -+}; -+ -+ -+/* request and reply to VC to enable a component */ -+struct mmal_msg_component_enable { -+ u32 component_handle; -+}; -+ -+struct mmal_msg_component_enable_reply { -+ u32 status; /** The component enable status */ -+}; -+ -+ -+/* request and reply to VC to disable a component */ -+struct mmal_msg_component_disable { -+ u32 component_handle; -+}; -+ -+struct mmal_msg_component_disable_reply { -+ u32 status; /** The component disable status */ -+}; -+ -+/* request to VC to get port information */ -+struct mmal_msg_port_info_get { -+ u32 component_handle; /* component handle port is associated with */ -+ u32 port_type; /* enum mmal_msg_port_type */ -+ u32 index; /* port index to query */ -+}; -+ -+/* reply from VC to get port info request */ -+struct mmal_msg_port_info_get_reply { -+ u32 status; /** enum mmal_msg_status */ -+ u32 component_handle; /* component handle port is associated with */ -+ u32 port_type; /* enum mmal_msg_port_type */ -+ u32 port_index; /* port indexed in query */ -+ s32 found; /* unused */ -+ u32 port_handle; /**< Handle to use for this port */ -+ struct mmal_port port; -+ struct mmal_es_format format; /* elementry stream format */ -+ union mmal_es_specific_format es; /* es type specific data */ -+ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; /* es extra data */ -+}; -+ -+/* request to VC to set port information */ -+struct mmal_msg_port_info_set { -+ u32 component_handle; -+ u32 port_type; /* enum mmal_msg_port_type */ -+ u32 port_index; /* port indexed in query */ -+ struct mmal_port port; -+ struct mmal_es_format format; -+ union mmal_es_specific_format es; -+ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; -+}; -+ -+/* reply from VC to port info set request */ -+struct mmal_msg_port_info_set_reply { -+ u32 status; -+ u32 component_handle; /* component handle port is associated with */ -+ u32 port_type; /* enum mmal_msg_port_type */ -+ u32 index; /* port indexed in query */ -+ s32 found; /* unused */ -+ u32 port_handle; /**< Handle to use for this port */ -+ struct mmal_port port; -+ struct mmal_es_format format; -+ union mmal_es_specific_format es; -+ u8 extradata[MMAL_FORMAT_EXTRADATA_MAX_SIZE]; -+}; -+ -+ -+/* port action requests that take a mmal_port as a parameter */ -+struct mmal_msg_port_action_port { -+ u32 component_handle; -+ u32 port_handle; -+ u32 action; /* enum mmal_msg_port_action_type */ -+ struct mmal_port port; -+}; -+ -+/* port action requests that take handles as a parameter */ -+struct mmal_msg_port_action_handle { -+ u32 component_handle; -+ u32 port_handle; -+ u32 action; /* enum mmal_msg_port_action_type */ -+ u32 connect_component_handle; -+ u32 connect_port_handle; -+}; -+ -+struct mmal_msg_port_action_reply { -+ u32 status; /** The port action operation status */ -+}; -+ -+ -+ -+ -+/* MMAL buffer transfer */ -+ -+/** Size of space reserved in a buffer message for short messages. */ -+#define MMAL_VC_SHORT_DATA 128 -+ -+/** Signals that the current payload is the end of the stream of data */ -+#define MMAL_BUFFER_HEADER_FLAG_EOS (1<<0) -+/** Signals that the start of the current payload starts a frame */ -+#define MMAL_BUFFER_HEADER_FLAG_FRAME_START (1<<1) -+/** Signals that the end of the current payload ends a frame */ -+#define MMAL_BUFFER_HEADER_FLAG_FRAME_END (1<<2) -+/** Signals that the current payload contains only complete frames (>1) */ -+#define MMAL_BUFFER_HEADER_FLAG_FRAME \ -+ (MMAL_BUFFER_HEADER_FLAG_FRAME_START|MMAL_BUFFER_HEADER_FLAG_FRAME_END) -+/** Signals that the current payload is a keyframe (i.e. self decodable) */ -+#define MMAL_BUFFER_HEADER_FLAG_KEYFRAME (1<<3) -+/** Signals a discontinuity in the stream of data (e.g. after a seek). -+ * Can be used for instance by a decoder to reset its state */ -+#define MMAL_BUFFER_HEADER_FLAG_DISCONTINUITY (1<<4) -+/** Signals a buffer containing some kind of config data for the component -+ * (e.g. codec config data) */ -+#define MMAL_BUFFER_HEADER_FLAG_CONFIG (1<<5) -+/** Signals an encrypted payload */ -+#define MMAL_BUFFER_HEADER_FLAG_ENCRYPTED (1<<6) -+/** Signals a buffer containing side information */ -+#define MMAL_BUFFER_HEADER_FLAG_CODECSIDEINFO (1<<7) -+/** Signals a buffer which is the snapshot/postview image from a stills -+ * capture -+ */ -+#define MMAL_BUFFER_HEADER_FLAGS_SNAPSHOT (1<<8) -+/** Signals a buffer which contains data known to be corrupted */ -+#define MMAL_BUFFER_HEADER_FLAG_CORRUPTED (1<<9) -+/** Signals that a buffer failed to be transmitted */ -+#define MMAL_BUFFER_HEADER_FLAG_TRANSMISSION_FAILED (1<<10) -+ -+struct mmal_driver_buffer { -+ u32 magic; -+ u32 component_handle; -+ u32 port_handle; -+ void *client_context; -+}; -+ -+/* buffer header */ -+struct mmal_buffer_header { -+ struct mmal_buffer_header *next; /* next header */ -+ void *priv; /* framework private data */ -+ u32 cmd; -+ void *data; -+ u32 alloc_size; -+ u32 length; -+ u32 offset; -+ u32 flags; -+ s64 pts; -+ s64 dts; -+ void *type; -+ void *user_data; -+}; -+ -+struct mmal_buffer_header_type_specific { -+ union { -+ struct { -+ u32 planes; -+ u32 offset[4]; -+ u32 pitch[4]; -+ u32 flags; -+ } video; -+ } u; -+}; -+ -+struct mmal_msg_buffer_from_host { -+ /* The front 32 bytes of the buffer header are copied -+ * back to us in the reply to allow for context. This -+ * area is used to store two mmal_driver_buffer structures to -+ * allow for multiple concurrent service users. -+ */ -+ /* control data */ -+ struct mmal_driver_buffer drvbuf; -+ -+ /* referenced control data for passthrough buffer management */ -+ struct mmal_driver_buffer drvbuf_ref; -+ struct mmal_buffer_header buffer_header; /* buffer header itself */ -+ struct mmal_buffer_header_type_specific buffer_header_type_specific; -+ s32 is_zero_copy; -+ s32 has_reference; -+ -+ /** allows short data to be xfered in control message */ -+ u32 payload_in_message; -+ u8 short_data[MMAL_VC_SHORT_DATA]; -+}; -+ -+ -+/* port parameter setting */ -+ -+#define MMAL_WORKER_PORT_PARAMETER_SPACE 96 -+ -+struct mmal_msg_port_parameter_set { -+ u32 component_handle; /* component */ -+ u32 port_handle; /* port */ -+ u32 id; /* Parameter ID */ -+ u32 size; /* Parameter size */ -+ uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; -+}; -+ -+struct mmal_msg_port_parameter_set_reply { -+ u32 status; /** enum mmal_msg_status todo: how does this -+ * differ to the one in the header? -+ */ -+}; -+ -+/* port parameter getting */ -+ -+struct mmal_msg_port_parameter_get { -+ u32 component_handle; /* component */ -+ u32 port_handle; /* port */ -+ u32 id; /* Parameter ID */ -+ u32 size; /* Parameter size */ -+}; -+ -+struct mmal_msg_port_parameter_get_reply { -+ u32 status; /* Status of mmal_port_parameter_get call */ -+ u32 id; /* Parameter ID */ -+ u32 size; /* Parameter size */ -+ uint32_t value[MMAL_WORKER_PORT_PARAMETER_SPACE]; -+}; -+ -+/* event messages */ -+#define MMAL_WORKER_EVENT_SPACE 256 -+ -+struct mmal_msg_event_to_host { -+ void *client_component; /* component context */ -+ -+ u32 port_type; -+ u32 port_num; -+ -+ u32 cmd; -+ u32 length; -+ u8 data[MMAL_WORKER_EVENT_SPACE]; -+ struct mmal_buffer_header *delayed_buffer; -+}; -+ -+/* all mmal messages are serialised through this structure */ -+struct mmal_msg { -+ /* header */ -+ struct mmal_msg_header h; -+ /* payload */ -+ union { -+ struct mmal_msg_version version; -+ -+ struct mmal_msg_component_create component_create; -+ struct mmal_msg_component_create_reply component_create_reply; -+ -+ struct mmal_msg_component_destroy component_destroy; -+ struct mmal_msg_component_destroy_reply component_destroy_reply; -+ -+ struct mmal_msg_component_enable component_enable; -+ struct mmal_msg_component_enable_reply component_enable_reply; -+ -+ struct mmal_msg_component_disable component_disable; -+ struct mmal_msg_component_disable_reply component_disable_reply; -+ -+ struct mmal_msg_port_info_get port_info_get; -+ struct mmal_msg_port_info_get_reply port_info_get_reply; -+ -+ struct mmal_msg_port_info_set port_info_set; -+ struct mmal_msg_port_info_set_reply port_info_set_reply; -+ -+ struct mmal_msg_port_action_port port_action_port; -+ struct mmal_msg_port_action_handle port_action_handle; -+ struct mmal_msg_port_action_reply port_action_reply; -+ -+ struct mmal_msg_buffer_from_host buffer_from_host; -+ -+ struct mmal_msg_port_parameter_set port_parameter_set; -+ struct mmal_msg_port_parameter_set_reply -+ port_parameter_set_reply; -+ struct mmal_msg_port_parameter_get -+ port_parameter_get; -+ struct mmal_msg_port_parameter_get_reply -+ port_parameter_get_reply; -+ -+ struct mmal_msg_event_to_host event_to_host; -+ -+ u8 payload[MMAL_MSG_MAX_PAYLOAD]; -+ } u; -+}; ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-parameters.h -@@ -0,0 +1,689 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ */ -+ -+/* common parameters */ -+ -+/** @name Parameter groups -+ * Parameters are divided into groups, and then allocated sequentially within -+ * a group using an enum. -+ * @{ -+ */ -+ -+/** Common parameter ID group, used with many types of component. */ -+#define MMAL_PARAMETER_GROUP_COMMON (0<<16) -+/** Camera-specific parameter ID group. */ -+#define MMAL_PARAMETER_GROUP_CAMERA (1<<16) -+/** Video-specific parameter ID group. */ -+#define MMAL_PARAMETER_GROUP_VIDEO (2<<16) -+/** Audio-specific parameter ID group. */ -+#define MMAL_PARAMETER_GROUP_AUDIO (3<<16) -+/** Clock-specific parameter ID group. */ -+#define MMAL_PARAMETER_GROUP_CLOCK (4<<16) -+/** Miracast-specific parameter ID group. */ -+#define MMAL_PARAMETER_GROUP_MIRACAST (5<<16) -+ -+/* Common parameters */ -+enum mmal_parameter_common_type { -+ MMAL_PARAMETER_UNUSED /**< Never a valid parameter ID */ -+ = MMAL_PARAMETER_GROUP_COMMON, -+ MMAL_PARAMETER_SUPPORTED_ENCODINGS, /**< MMAL_PARAMETER_ENCODING_T */ -+ MMAL_PARAMETER_URI, /**< MMAL_PARAMETER_URI_T */ -+ -+ /** MMAL_PARAMETER_CHANGE_EVENT_REQUEST_T */ -+ MMAL_PARAMETER_CHANGE_EVENT_REQUEST, -+ -+ /** MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_ZERO_COPY, -+ -+ /**< MMAL_PARAMETER_BUFFER_REQUIREMENTS_T */ -+ MMAL_PARAMETER_BUFFER_REQUIREMENTS, -+ -+ MMAL_PARAMETER_STATISTICS, /**< MMAL_PARAMETER_STATISTICS_T */ -+ MMAL_PARAMETER_CORE_STATISTICS, /**< MMAL_PARAMETER_CORE_STATISTICS_T */ -+ MMAL_PARAMETER_MEM_USAGE, /**< MMAL_PARAMETER_MEM_USAGE_T */ -+ MMAL_PARAMETER_BUFFER_FLAG_FILTER, /**< MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_SEEK, /**< MMAL_PARAMETER_SEEK_T */ -+ MMAL_PARAMETER_POWERMON_ENABLE, /**< MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_LOGGING, /**< MMAL_PARAMETER_LOGGING_T */ -+ MMAL_PARAMETER_SYSTEM_TIME, /**< MMAL_PARAMETER_UINT64_T */ -+ MMAL_PARAMETER_NO_IMAGE_PADDING /**< MMAL_PARAMETER_BOOLEAN_T */ -+}; -+ -+/* camera parameters */ -+ -+enum mmal_parameter_camera_type { -+ /* 0 */ -+ /** @ref MMAL_PARAMETER_THUMBNAIL_CONFIG_T */ -+ MMAL_PARAMETER_THUMBNAIL_CONFIGURATION -+ = MMAL_PARAMETER_GROUP_CAMERA, -+ MMAL_PARAMETER_CAPTURE_QUALITY, /**< Unused? */ -+ MMAL_PARAMETER_ROTATION, /**< @ref MMAL_PARAMETER_INT32_T */ -+ MMAL_PARAMETER_EXIF_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_EXIF, /**< @ref MMAL_PARAMETER_EXIF_T */ -+ MMAL_PARAMETER_AWB_MODE, /**< @ref MMAL_PARAM_AWBMODE_T */ -+ MMAL_PARAMETER_IMAGE_EFFECT, /**< @ref MMAL_PARAMETER_IMAGEFX_T */ -+ MMAL_PARAMETER_COLOUR_EFFECT, /**< @ref MMAL_PARAMETER_COLOURFX_T */ -+ MMAL_PARAMETER_FLICKER_AVOID, /**< @ref MMAL_PARAMETER_FLICKERAVOID_T */ -+ MMAL_PARAMETER_FLASH, /**< @ref MMAL_PARAMETER_FLASH_T */ -+ MMAL_PARAMETER_REDEYE, /**< @ref MMAL_PARAMETER_REDEYE_T */ -+ MMAL_PARAMETER_FOCUS, /**< @ref MMAL_PARAMETER_FOCUS_T */ -+ MMAL_PARAMETER_FOCAL_LENGTHS, /**< Unused? */ -+ MMAL_PARAMETER_EXPOSURE_COMP, /**< @ref MMAL_PARAMETER_INT32_T */ -+ MMAL_PARAMETER_ZOOM, /**< @ref MMAL_PARAMETER_SCALEFACTOR_T */ -+ MMAL_PARAMETER_MIRROR, /**< @ref MMAL_PARAMETER_MIRROR_T */ -+ -+ /* 0x10 */ -+ MMAL_PARAMETER_CAMERA_NUM, /**< @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_CAPTURE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_EXPOSURE_MODE, /**< @ref MMAL_PARAMETER_EXPOSUREMODE_T */ -+ MMAL_PARAMETER_EXP_METERING_MODE, /**< @ref MMAL_PARAMETER_EXPOSUREMETERINGMODE_T */ -+ MMAL_PARAMETER_FOCUS_STATUS, /**< @ref MMAL_PARAMETER_FOCUS_STATUS_T */ -+ MMAL_PARAMETER_CAMERA_CONFIG, /**< @ref MMAL_PARAMETER_CAMERA_CONFIG_T */ -+ MMAL_PARAMETER_CAPTURE_STATUS, /**< @ref MMAL_PARAMETER_CAPTURE_STATUS_T */ -+ MMAL_PARAMETER_FACE_TRACK, /**< @ref MMAL_PARAMETER_FACE_TRACK_T */ -+ MMAL_PARAMETER_DRAW_BOX_FACES_AND_FOCUS, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_JPEG_Q_FACTOR, /**< @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_FRAME_RATE, /**< @ref MMAL_PARAMETER_FRAME_RATE_T */ -+ MMAL_PARAMETER_USE_STC, /**< @ref MMAL_PARAMETER_CAMERA_STC_MODE_T */ -+ MMAL_PARAMETER_CAMERA_INFO, /**< @ref MMAL_PARAMETER_CAMERA_INFO_T */ -+ MMAL_PARAMETER_VIDEO_STABILISATION, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_FACE_TRACK_RESULTS, /**< @ref MMAL_PARAMETER_FACE_TRACK_RESULTS_T */ -+ MMAL_PARAMETER_ENABLE_RAW_CAPTURE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ -+ /* 0x20 */ -+ MMAL_PARAMETER_DPF_FILE, /**< @ref MMAL_PARAMETER_URI_T */ -+ MMAL_PARAMETER_ENABLE_DPF_FILE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_DPF_FAIL_IS_FATAL, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_CAPTURE_MODE, /**< @ref MMAL_PARAMETER_CAPTUREMODE_T */ -+ MMAL_PARAMETER_FOCUS_REGIONS, /**< @ref MMAL_PARAMETER_FOCUS_REGIONS_T */ -+ MMAL_PARAMETER_INPUT_CROP, /**< @ref MMAL_PARAMETER_INPUT_CROP_T */ -+ MMAL_PARAMETER_SENSOR_INFORMATION, /**< @ref MMAL_PARAMETER_SENSOR_INFORMATION_T */ -+ MMAL_PARAMETER_FLASH_SELECT, /**< @ref MMAL_PARAMETER_FLASH_SELECT_T */ -+ MMAL_PARAMETER_FIELD_OF_VIEW, /**< @ref MMAL_PARAMETER_FIELD_OF_VIEW_T */ -+ MMAL_PARAMETER_HIGH_DYNAMIC_RANGE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_DYNAMIC_RANGE_COMPRESSION, /**< @ref MMAL_PARAMETER_DRC_T */ -+ MMAL_PARAMETER_ALGORITHM_CONTROL, /**< @ref MMAL_PARAMETER_ALGORITHM_CONTROL_T */ -+ MMAL_PARAMETER_SHARPNESS, /**< @ref MMAL_PARAMETER_RATIONAL_T */ -+ MMAL_PARAMETER_CONTRAST, /**< @ref MMAL_PARAMETER_RATIONAL_T */ -+ MMAL_PARAMETER_BRIGHTNESS, /**< @ref MMAL_PARAMETER_RATIONAL_T */ -+ MMAL_PARAMETER_SATURATION, /**< @ref MMAL_PARAMETER_RATIONAL_T */ -+ -+ /* 0x30 */ -+ MMAL_PARAMETER_ISO, /**< @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_ANTISHAKE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ -+ /** @ref MMAL_PARAMETER_IMAGEFX_PARAMETERS_T */ -+ MMAL_PARAMETER_IMAGE_EFFECT_PARAMETERS, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_CAMERA_BURST_CAPTURE, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_CAMERA_MIN_ISO, -+ -+ /** @ref MMAL_PARAMETER_CAMERA_USE_CASE_T */ -+ MMAL_PARAMETER_CAMERA_USE_CASE, -+ -+ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_CAPTURE_STATS_PASS, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_CAMERA_CUSTOM_SENSOR_CONFIG, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_ENABLE_REGISTER_FILE, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_REGISTER_FAIL_IS_FATAL, -+ -+ /** @ref MMAL_PARAMETER_CONFIGFILE_T */ -+ MMAL_PARAMETER_CONFIGFILE_REGISTERS, -+ -+ /** @ref MMAL_PARAMETER_CONFIGFILE_CHUNK_T */ -+ MMAL_PARAMETER_CONFIGFILE_CHUNK_REGISTERS, -+ MMAL_PARAMETER_JPEG_ATTACH_LOG, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_ZERO_SHUTTER_LAG, /**< @ref MMAL_PARAMETER_ZEROSHUTTERLAG_T */ -+ MMAL_PARAMETER_FPS_RANGE, /**< @ref MMAL_PARAMETER_FPS_RANGE_T */ -+ MMAL_PARAMETER_CAPTURE_EXPOSURE_COMP, /**< @ref MMAL_PARAMETER_INT32_T */ -+ -+ /* 0x40 */ -+ MMAL_PARAMETER_SW_SHARPEN_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_FLASH_REQUIRED, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_SW_SATURATION_DISABLE, /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_SHUTTER_SPEED, /**< Takes a @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_CUSTOM_AWB_GAINS, /**< Takes a @ref MMAL_PARAMETER_AWB_GAINS_T */ -+}; -+ -+struct mmal_parameter_rational { -+ s32 num; /**< Numerator */ -+ s32 den; /**< Denominator */ -+}; -+ -+enum mmal_parameter_camera_config_timestamp_mode { -+ MMAL_PARAM_TIMESTAMP_MODE_ZERO = 0, /* Always timestamp frames as 0 */ -+ MMAL_PARAM_TIMESTAMP_MODE_RAW_STC, /* Use the raw STC value -+ * for the frame timestamp -+ */ -+ MMAL_PARAM_TIMESTAMP_MODE_RESET_STC, /* Use the STC timestamp -+ * but subtract the -+ * timestamp of the first -+ * frame sent to give a -+ * zero based timestamp. -+ */ -+}; -+ -+struct mmal_parameter_fps_range { -+ /**< Low end of the permitted framerate range */ -+ struct mmal_parameter_rational fps_low; -+ /**< High end of the permitted framerate range */ -+ struct mmal_parameter_rational fps_high; -+}; -+ -+ -+/* camera configuration parameter */ -+struct mmal_parameter_camera_config { -+ /* Parameters for setting up the image pools */ -+ u32 max_stills_w; /* Max size of stills capture */ -+ u32 max_stills_h; -+ u32 stills_yuv422; /* Allow YUV422 stills capture */ -+ u32 one_shot_stills; /* Continuous or one shot stills captures. */ -+ -+ u32 max_preview_video_w; /* Max size of the preview or video -+ * capture frames -+ */ -+ u32 max_preview_video_h; -+ u32 num_preview_video_frames; -+ -+ /** Sets the height of the circular buffer for stills capture. */ -+ u32 stills_capture_circular_buffer_height; -+ -+ /** Allows preview/encode to resume as fast as possible after the stills -+ * input frame has been received, and then processes the still frame in -+ * the background whilst preview/encode has resumed. -+ * Actual mode is controlled by MMAL_PARAMETER_CAPTURE_MODE. -+ */ -+ u32 fast_preview_resume; -+ -+ /** Selects algorithm for timestamping frames if -+ * there is no clock component connected. -+ * enum mmal_parameter_camera_config_timestamp_mode -+ */ -+ s32 use_stc_timestamp; -+}; -+ -+ -+enum mmal_parameter_exposuremode { -+ MMAL_PARAM_EXPOSUREMODE_OFF, -+ MMAL_PARAM_EXPOSUREMODE_AUTO, -+ MMAL_PARAM_EXPOSUREMODE_NIGHT, -+ MMAL_PARAM_EXPOSUREMODE_NIGHTPREVIEW, -+ MMAL_PARAM_EXPOSUREMODE_BACKLIGHT, -+ MMAL_PARAM_EXPOSUREMODE_SPOTLIGHT, -+ MMAL_PARAM_EXPOSUREMODE_SPORTS, -+ MMAL_PARAM_EXPOSUREMODE_SNOW, -+ MMAL_PARAM_EXPOSUREMODE_BEACH, -+ MMAL_PARAM_EXPOSUREMODE_VERYLONG, -+ MMAL_PARAM_EXPOSUREMODE_FIXEDFPS, -+ MMAL_PARAM_EXPOSUREMODE_ANTISHAKE, -+ MMAL_PARAM_EXPOSUREMODE_FIREWORKS, -+}; -+ -+enum mmal_parameter_exposuremeteringmode { -+ MMAL_PARAM_EXPOSUREMETERINGMODE_AVERAGE, -+ MMAL_PARAM_EXPOSUREMETERINGMODE_SPOT, -+ MMAL_PARAM_EXPOSUREMETERINGMODE_BACKLIT, -+ MMAL_PARAM_EXPOSUREMETERINGMODE_MATRIX, -+}; -+ -+enum mmal_parameter_awbmode { -+ MMAL_PARAM_AWBMODE_OFF, -+ MMAL_PARAM_AWBMODE_AUTO, -+ MMAL_PARAM_AWBMODE_SUNLIGHT, -+ MMAL_PARAM_AWBMODE_CLOUDY, -+ MMAL_PARAM_AWBMODE_SHADE, -+ MMAL_PARAM_AWBMODE_TUNGSTEN, -+ MMAL_PARAM_AWBMODE_FLUORESCENT, -+ MMAL_PARAM_AWBMODE_INCANDESCENT, -+ MMAL_PARAM_AWBMODE_FLASH, -+ MMAL_PARAM_AWBMODE_HORIZON, -+}; -+ -+enum mmal_parameter_imagefx { -+ MMAL_PARAM_IMAGEFX_NONE, -+ MMAL_PARAM_IMAGEFX_NEGATIVE, -+ MMAL_PARAM_IMAGEFX_SOLARIZE, -+ MMAL_PARAM_IMAGEFX_POSTERIZE, -+ MMAL_PARAM_IMAGEFX_WHITEBOARD, -+ MMAL_PARAM_IMAGEFX_BLACKBOARD, -+ MMAL_PARAM_IMAGEFX_SKETCH, -+ MMAL_PARAM_IMAGEFX_DENOISE, -+ MMAL_PARAM_IMAGEFX_EMBOSS, -+ MMAL_PARAM_IMAGEFX_OILPAINT, -+ MMAL_PARAM_IMAGEFX_HATCH, -+ MMAL_PARAM_IMAGEFX_GPEN, -+ MMAL_PARAM_IMAGEFX_PASTEL, -+ MMAL_PARAM_IMAGEFX_WATERCOLOUR, -+ MMAL_PARAM_IMAGEFX_FILM, -+ MMAL_PARAM_IMAGEFX_BLUR, -+ MMAL_PARAM_IMAGEFX_SATURATION, -+ MMAL_PARAM_IMAGEFX_COLOURSWAP, -+ MMAL_PARAM_IMAGEFX_WASHEDOUT, -+ MMAL_PARAM_IMAGEFX_POSTERISE, -+ MMAL_PARAM_IMAGEFX_COLOURPOINT, -+ MMAL_PARAM_IMAGEFX_COLOURBALANCE, -+ MMAL_PARAM_IMAGEFX_CARTOON, -+}; -+ -+enum MMAL_PARAM_FLICKERAVOID_T { -+ MMAL_PARAM_FLICKERAVOID_OFF, -+ MMAL_PARAM_FLICKERAVOID_AUTO, -+ MMAL_PARAM_FLICKERAVOID_50HZ, -+ MMAL_PARAM_FLICKERAVOID_60HZ, -+ MMAL_PARAM_FLICKERAVOID_MAX = 0x7FFFFFFF -+}; -+ -+struct mmal_parameter_awbgains { -+ struct mmal_parameter_rational r_gain; /**< Red gain */ -+ struct mmal_parameter_rational b_gain; /**< Blue gain */ -+}; -+ -+/** Manner of video rate control */ -+enum mmal_parameter_rate_control_mode { -+ MMAL_VIDEO_RATECONTROL_DEFAULT, -+ MMAL_VIDEO_RATECONTROL_VARIABLE, -+ MMAL_VIDEO_RATECONTROL_CONSTANT, -+ MMAL_VIDEO_RATECONTROL_VARIABLE_SKIP_FRAMES, -+ MMAL_VIDEO_RATECONTROL_CONSTANT_SKIP_FRAMES -+}; -+ -+enum mmal_video_profile { -+ MMAL_VIDEO_PROFILE_H263_BASELINE, -+ MMAL_VIDEO_PROFILE_H263_H320CODING, -+ MMAL_VIDEO_PROFILE_H263_BACKWARDCOMPATIBLE, -+ MMAL_VIDEO_PROFILE_H263_ISWV2, -+ MMAL_VIDEO_PROFILE_H263_ISWV3, -+ MMAL_VIDEO_PROFILE_H263_HIGHCOMPRESSION, -+ MMAL_VIDEO_PROFILE_H263_INTERNET, -+ MMAL_VIDEO_PROFILE_H263_INTERLACE, -+ MMAL_VIDEO_PROFILE_H263_HIGHLATENCY, -+ MMAL_VIDEO_PROFILE_MP4V_SIMPLE, -+ MMAL_VIDEO_PROFILE_MP4V_SIMPLESCALABLE, -+ MMAL_VIDEO_PROFILE_MP4V_CORE, -+ MMAL_VIDEO_PROFILE_MP4V_MAIN, -+ MMAL_VIDEO_PROFILE_MP4V_NBIT, -+ MMAL_VIDEO_PROFILE_MP4V_SCALABLETEXTURE, -+ MMAL_VIDEO_PROFILE_MP4V_SIMPLEFACE, -+ MMAL_VIDEO_PROFILE_MP4V_SIMPLEFBA, -+ MMAL_VIDEO_PROFILE_MP4V_BASICANIMATED, -+ MMAL_VIDEO_PROFILE_MP4V_HYBRID, -+ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDREALTIME, -+ MMAL_VIDEO_PROFILE_MP4V_CORESCALABLE, -+ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCODING, -+ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDCORE, -+ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSCALABLE, -+ MMAL_VIDEO_PROFILE_MP4V_ADVANCEDSIMPLE, -+ MMAL_VIDEO_PROFILE_H264_BASELINE, -+ MMAL_VIDEO_PROFILE_H264_MAIN, -+ MMAL_VIDEO_PROFILE_H264_EXTENDED, -+ MMAL_VIDEO_PROFILE_H264_HIGH, -+ MMAL_VIDEO_PROFILE_H264_HIGH10, -+ MMAL_VIDEO_PROFILE_H264_HIGH422, -+ MMAL_VIDEO_PROFILE_H264_HIGH444, -+ MMAL_VIDEO_PROFILE_H264_CONSTRAINED_BASELINE, -+ MMAL_VIDEO_PROFILE_DUMMY = 0x7FFFFFFF -+}; -+ -+enum mmal_video_level { -+ MMAL_VIDEO_LEVEL_H263_10, -+ MMAL_VIDEO_LEVEL_H263_20, -+ MMAL_VIDEO_LEVEL_H263_30, -+ MMAL_VIDEO_LEVEL_H263_40, -+ MMAL_VIDEO_LEVEL_H263_45, -+ MMAL_VIDEO_LEVEL_H263_50, -+ MMAL_VIDEO_LEVEL_H263_60, -+ MMAL_VIDEO_LEVEL_H263_70, -+ MMAL_VIDEO_LEVEL_MP4V_0, -+ MMAL_VIDEO_LEVEL_MP4V_0b, -+ MMAL_VIDEO_LEVEL_MP4V_1, -+ MMAL_VIDEO_LEVEL_MP4V_2, -+ MMAL_VIDEO_LEVEL_MP4V_3, -+ MMAL_VIDEO_LEVEL_MP4V_4, -+ MMAL_VIDEO_LEVEL_MP4V_4a, -+ MMAL_VIDEO_LEVEL_MP4V_5, -+ MMAL_VIDEO_LEVEL_MP4V_6, -+ MMAL_VIDEO_LEVEL_H264_1, -+ MMAL_VIDEO_LEVEL_H264_1b, -+ MMAL_VIDEO_LEVEL_H264_11, -+ MMAL_VIDEO_LEVEL_H264_12, -+ MMAL_VIDEO_LEVEL_H264_13, -+ MMAL_VIDEO_LEVEL_H264_2, -+ MMAL_VIDEO_LEVEL_H264_21, -+ MMAL_VIDEO_LEVEL_H264_22, -+ MMAL_VIDEO_LEVEL_H264_3, -+ MMAL_VIDEO_LEVEL_H264_31, -+ MMAL_VIDEO_LEVEL_H264_32, -+ MMAL_VIDEO_LEVEL_H264_4, -+ MMAL_VIDEO_LEVEL_H264_41, -+ MMAL_VIDEO_LEVEL_H264_42, -+ MMAL_VIDEO_LEVEL_H264_5, -+ MMAL_VIDEO_LEVEL_H264_51, -+ MMAL_VIDEO_LEVEL_DUMMY = 0x7FFFFFFF -+}; -+ -+struct mmal_parameter_video_profile { -+ enum mmal_video_profile profile; -+ enum mmal_video_level level; -+}; -+ -+/* video parameters */ -+ -+enum mmal_parameter_video_type { -+ /** @ref MMAL_DISPLAYREGION_T */ -+ MMAL_PARAMETER_DISPLAYREGION = MMAL_PARAMETER_GROUP_VIDEO, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ -+ MMAL_PARAMETER_SUPPORTED_PROFILES, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_PROFILE_T */ -+ MMAL_PARAMETER_PROFILE, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_INTRAPERIOD, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_RATECONTROL_T */ -+ MMAL_PARAMETER_RATECONTROL, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_NALUNITFORMAT_T */ -+ MMAL_PARAMETER_NALUNITFORMAT, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_MINIMISE_FRAGMENTATION, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. -+ * Setting the value to zero resets to the default (one slice per frame). -+ */ -+ MMAL_PARAMETER_MB_ROWS_PER_SLICE, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION_T */ -+ MMAL_PARAMETER_VIDEO_LEVEL_EXTENSION, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_EEDE_ENABLE_T */ -+ MMAL_PARAMETER_VIDEO_EEDE_ENABLE, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE_T */ -+ MMAL_PARAMETER_VIDEO_EEDE_LOSSRATE, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. Request an I-frame. */ -+ MMAL_PARAMETER_VIDEO_REQUEST_I_FRAME, -+ /** @ref MMAL_PARAMETER_VIDEO_INTRA_REFRESH_T */ -+ MMAL_PARAMETER_VIDEO_INTRA_REFRESH, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ -+ MMAL_PARAMETER_VIDEO_IMMUTABLE_INPUT, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. Run-time bit rate control */ -+ MMAL_PARAMETER_VIDEO_BIT_RATE, -+ -+ /** @ref MMAL_PARAMETER_FRAME_RATE_T */ -+ MMAL_PARAMETER_VIDEO_FRAME_RATE, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_MIN_QUANT, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_MAX_QUANT, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_RC_MODEL, -+ -+ MMAL_PARAMETER_EXTRA_BUFFERS, /**< @ref MMAL_PARAMETER_UINT32_T. */ -+ /** @ref MMAL_PARAMETER_UINT32_T. -+ * Changing this parameter from the default can reduce frame rate -+ * because image buffers need to be re-pitched. -+ */ -+ MMAL_PARAMETER_VIDEO_ALIGN_HORIZ, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. -+ * Changing this parameter from the default can reduce frame rate -+ * because image buffers need to be re-pitched. -+ */ -+ MMAL_PARAMETER_VIDEO_ALIGN_VERT, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ -+ MMAL_PARAMETER_VIDEO_DROPPABLE_PFRAMES, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_INITIAL_QUANT, -+ -+ /**< @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_QP_P, -+ -+ /**< @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_RC_SLICE_DQUANT, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_FRAME_LIMIT_BITS, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_PEAK_RATE, -+ -+ /* H264 specific parameters */ -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_DISABLE_CABAC, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_LATENCY, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_AU_DELIMITERS, -+ -+ /** @ref MMAL_PARAMETER_UINT32_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_DEBLOCK_IDC, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_ENCODER_H264_MB_INTRA_MODES_T. */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_MB_INTRA_MODE, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_HEADER_ON_OPEN, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_PRECODE_FOR_QP, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_DRM_INIT_INFO_T. */ -+ MMAL_PARAMETER_VIDEO_DRM_INIT_INFO, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_TIMESTAMP_FIFO, -+ -+ /** @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_DECODE_ERROR_CONCEALMENT, -+ -+ /** @ref MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER_T. */ -+ MMAL_PARAMETER_VIDEO_DRM_PROTECT_BUFFER, -+ -+ /** @ref MMAL_PARAMETER_BYTES_T */ -+ MMAL_PARAMETER_VIDEO_DECODE_CONFIG_VD3, -+ -+ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_VCL_HRD_PARAMETERS, -+ -+ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_H264_LOW_DELAY_HRD_FLAG, -+ -+ /**< @ref MMAL_PARAMETER_BOOLEAN_T */ -+ MMAL_PARAMETER_VIDEO_ENCODE_INLINE_HEADER -+}; -+ -+/** Valid mirror modes */ -+enum mmal_parameter_mirror { -+ MMAL_PARAM_MIRROR_NONE, -+ MMAL_PARAM_MIRROR_VERTICAL, -+ MMAL_PARAM_MIRROR_HORIZONTAL, -+ MMAL_PARAM_MIRROR_BOTH, -+}; -+ -+enum mmal_parameter_displaytransform { -+ MMAL_DISPLAY_ROT0 = 0, -+ MMAL_DISPLAY_MIRROR_ROT0 = 1, -+ MMAL_DISPLAY_MIRROR_ROT180 = 2, -+ MMAL_DISPLAY_ROT180 = 3, -+ MMAL_DISPLAY_MIRROR_ROT90 = 4, -+ MMAL_DISPLAY_ROT270 = 5, -+ MMAL_DISPLAY_ROT90 = 6, -+ MMAL_DISPLAY_MIRROR_ROT270 = 7, -+}; -+ -+enum mmal_parameter_displaymode { -+ MMAL_DISPLAY_MODE_FILL = 0, -+ MMAL_DISPLAY_MODE_LETTERBOX = 1, -+}; -+ -+enum mmal_parameter_displayset { -+ MMAL_DISPLAY_SET_NONE = 0, -+ MMAL_DISPLAY_SET_NUM = 1, -+ MMAL_DISPLAY_SET_FULLSCREEN = 2, -+ MMAL_DISPLAY_SET_TRANSFORM = 4, -+ MMAL_DISPLAY_SET_DEST_RECT = 8, -+ MMAL_DISPLAY_SET_SRC_RECT = 0x10, -+ MMAL_DISPLAY_SET_MODE = 0x20, -+ MMAL_DISPLAY_SET_PIXEL = 0x40, -+ MMAL_DISPLAY_SET_NOASPECT = 0x80, -+ MMAL_DISPLAY_SET_LAYER = 0x100, -+ MMAL_DISPLAY_SET_COPYPROTECT = 0x200, -+ MMAL_DISPLAY_SET_ALPHA = 0x400, -+}; -+ -+struct mmal_parameter_displayregion { -+ /** Bitfield that indicates which fields are set and should be -+ * used. All other fields will maintain their current value. -+ * \ref MMAL_DISPLAYSET_T defines the bits that can be -+ * combined. -+ */ -+ u32 set; -+ -+ /** Describes the display output device, with 0 typically -+ * being a directly connected LCD display. The actual values -+ * will depend on the hardware. Code using hard-wired numbers -+ * (e.g. 2) is certain to fail. -+ */ -+ -+ u32 display_num; -+ /** Indicates that we are using the full device screen area, -+ * rather than a window of the display. If zero, then -+ * dest_rect is used to specify a region of the display to -+ * use. -+ */ -+ -+ s32 fullscreen; -+ /** Indicates any rotation or flipping used to map frames onto -+ * the natural display orientation. -+ */ -+ u32 transform; /* enum mmal_parameter_displaytransform */ -+ -+ /** Where to display the frame within the screen, if -+ * fullscreen is zero. -+ */ -+ struct vchiq_mmal_rect dest_rect; -+ -+ /** Indicates which area of the frame to display. If all -+ * values are zero, the whole frame will be used. -+ */ -+ struct vchiq_mmal_rect src_rect; -+ -+ /** If set to non-zero, indicates that any display scaling -+ * should disregard the aspect ratio of the frame region being -+ * displayed. -+ */ -+ s32 noaspect; -+ -+ /** Indicates how the image should be scaled to fit the -+ * display. \code MMAL_DISPLAY_MODE_FILL \endcode indicates -+ * that the image should fill the screen by potentially -+ * cropping the frames. Setting \code mode \endcode to \code -+ * MMAL_DISPLAY_MODE_LETTERBOX \endcode indicates that all the -+ * source region should be displayed and black bars added if -+ * necessary. -+ */ -+ u32 mode; /* enum mmal_parameter_displaymode */ -+ -+ /** If non-zero, defines the width of a source pixel relative -+ * to \code pixel_y \endcode. If zero, then pixels default to -+ * being square. -+ */ -+ u32 pixel_x; -+ -+ /** If non-zero, defines the height of a source pixel relative -+ * to \code pixel_x \endcode. If zero, then pixels default to -+ * being square. -+ */ -+ u32 pixel_y; -+ -+ /** Sets the relative depth of the images, with greater values -+ * being in front of smaller values. -+ */ -+ u32 layer; -+ -+ /** Set to non-zero to ensure copy protection is used on -+ * output. -+ */ -+ s32 copyprotect_required; -+ -+ /** Level of opacity of the layer, where zero is fully -+ * transparent and 255 is fully opaque. -+ */ -+ u32 alpha; -+}; -+ -+#define MMAL_MAX_IMAGEFX_PARAMETERS 5 -+ -+struct mmal_parameter_imagefx_parameters { -+ enum mmal_parameter_imagefx effect; -+ u32 num_effect_params; -+ u32 effect_parameter[MMAL_MAX_IMAGEFX_PARAMETERS]; -+}; -+ -+#define MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS 4 -+#define MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES 2 -+#define MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN 16 -+ -+struct mmal_parameter_camera_info_camera_t { -+ u32 port_id; -+ u32 max_width; -+ u32 max_height; -+ u32 lens_present; -+ u8 camera_name[MMAL_PARAMETER_CAMERA_INFO_MAX_STR_LEN]; -+}; -+ -+enum mmal_parameter_camera_info_flash_type_t { -+ /* Make values explicit to ensure they match values in config ini */ -+ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_XENON = 0, -+ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_LED = 1, -+ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_OTHER = 2, -+ MMAL_PARAMETER_CAMERA_INFO_FLASH_TYPE_MAX = 0x7FFFFFFF -+}; -+ -+struct mmal_parameter_camera_info_flash_t { -+ enum mmal_parameter_camera_info_flash_type_t flash_type; -+}; -+ -+struct mmal_parameter_camera_info_t { -+ u32 num_cameras; -+ u32 num_flashes; -+ struct mmal_parameter_camera_info_camera_t -+ cameras[MMAL_PARAMETER_CAMERA_INFO_MAX_CAMERAS]; -+ struct mmal_parameter_camera_info_flash_t -+ flashes[MMAL_PARAMETER_CAMERA_INFO_MAX_FLASHES]; -+}; ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-vchiq.c -@@ -0,0 +1,1916 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ * -+ * V4L2 driver MMAL vchiq interface code -+ */ -+ -+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mmal-common.h" -+#include "mmal-vchiq.h" -+#include "mmal-msg.h" -+ -+#define USE_VCHIQ_ARM -+#include "interface/vchi/vchi.h" -+ -+/* maximum number of components supported */ -+#define VCHIQ_MMAL_MAX_COMPONENTS 4 -+ -+/*#define FULL_MSG_DUMP 1*/ -+ -+#ifdef DEBUG -+static const char *const msg_type_names[] = { -+ "UNKNOWN", -+ "QUIT", -+ "SERVICE_CLOSED", -+ "GET_VERSION", -+ "COMPONENT_CREATE", -+ "COMPONENT_DESTROY", -+ "COMPONENT_ENABLE", -+ "COMPONENT_DISABLE", -+ "PORT_INFO_GET", -+ "PORT_INFO_SET", -+ "PORT_ACTION", -+ "BUFFER_FROM_HOST", -+ "BUFFER_TO_HOST", -+ "GET_STATS", -+ "PORT_PARAMETER_SET", -+ "PORT_PARAMETER_GET", -+ "EVENT_TO_HOST", -+ "GET_CORE_STATS_FOR_PORT", -+ "OPAQUE_ALLOCATOR", -+ "CONSUME_MEM", -+ "LMK", -+ "OPAQUE_ALLOCATOR_DESC", -+ "DRM_GET_LHS32", -+ "DRM_GET_TIME", -+ "BUFFER_FROM_HOST_ZEROLEN", -+ "PORT_FLUSH", -+ "HOST_LOG", -+}; -+#endif -+ -+static const char *const port_action_type_names[] = { -+ "UNKNOWN", -+ "ENABLE", -+ "DISABLE", -+ "FLUSH", -+ "CONNECT", -+ "DISCONNECT", -+ "SET_REQUIREMENTS", -+}; -+ -+#if defined(DEBUG) -+#if defined(FULL_MSG_DUMP) -+#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) \ -+ do { \ -+ pr_debug(TITLE" type:%s(%d) length:%d\n", \ -+ msg_type_names[(MSG)->h.type], \ -+ (MSG)->h.type, (MSG_LEN)); \ -+ print_hex_dump(KERN_DEBUG, "<h.type], \ -+ (MSG)->h.type, (MSG_LEN)); \ -+ } -+#endif -+#else -+#define DBG_DUMP_MSG(MSG, MSG_LEN, TITLE) -+#endif -+ -+/* normal message context */ -+struct mmal_msg_context { -+ union { -+ struct { -+ /* work struct for defered callback - must come first */ -+ struct work_struct work; -+ /* mmal instance */ -+ struct vchiq_mmal_instance *instance; -+ /* mmal port */ -+ struct vchiq_mmal_port *port; -+ /* actual buffer used to store bulk reply */ -+ struct mmal_buffer *buffer; -+ /* amount of buffer used */ -+ unsigned long buffer_used; -+ /* MMAL buffer flags */ -+ u32 mmal_flags; -+ /* Presentation and Decode timestamps */ -+ s64 pts; -+ s64 dts; -+ -+ int status; /* context status */ -+ -+ } bulk; /* bulk data */ -+ -+ struct { -+ /* message handle to release */ -+ VCHI_HELD_MSG_T msg_handle; -+ /* pointer to received message */ -+ struct mmal_msg *msg; -+ /* received message length */ -+ u32 msg_len; -+ /* completion upon reply */ -+ struct completion cmplt; -+ } sync; /* synchronous response */ -+ } u; -+ -+}; -+ -+struct vchiq_mmal_instance { -+ VCHI_SERVICE_HANDLE_T handle; -+ -+ /* ensure serialised access to service */ -+ struct mutex vchiq_mutex; -+ -+ /* ensure serialised access to bulk operations */ -+ struct mutex bulk_mutex; -+ -+ /* vmalloc page to receive scratch bulk xfers into */ -+ void *bulk_scratch; -+ -+ /* component to use next */ -+ int component_idx; -+ struct vchiq_mmal_component component[VCHIQ_MMAL_MAX_COMPONENTS]; -+}; -+ -+static struct mmal_msg_context *get_msg_context(struct vchiq_mmal_instance -+ *instance) -+{ -+ struct mmal_msg_context *msg_context; -+ -+ /* todo: should this be allocated from a pool to avoid kmalloc */ -+ msg_context = kmalloc(sizeof(*msg_context), GFP_KERNEL); -+ memset(msg_context, 0, sizeof(*msg_context)); -+ -+ return msg_context; -+} -+ -+static void release_msg_context(struct mmal_msg_context *msg_context) -+{ -+ kfree(msg_context); -+} -+ -+/* deals with receipt of event to host message */ -+static void event_to_host_cb(struct vchiq_mmal_instance *instance, -+ struct mmal_msg *msg, u32 msg_len) -+{ -+ pr_debug("unhandled event\n"); -+ pr_debug("component:%p port type:%d num:%d cmd:0x%x length:%d\n", -+ msg->u.event_to_host.client_component, -+ msg->u.event_to_host.port_type, -+ msg->u.event_to_host.port_num, -+ msg->u.event_to_host.cmd, msg->u.event_to_host.length); -+} -+ -+/* workqueue scheduled callback -+ * -+ * we do this because it is important we do not call any other vchiq -+ * sync calls from witin the message delivery thread -+ */ -+static void buffer_work_cb(struct work_struct *work) -+{ -+ struct mmal_msg_context *msg_context = (struct mmal_msg_context *)work; -+ -+ msg_context->u.bulk.port->buffer_cb(msg_context->u.bulk.instance, -+ msg_context->u.bulk.port, -+ msg_context->u.bulk.status, -+ msg_context->u.bulk.buffer, -+ msg_context->u.bulk.buffer_used, -+ msg_context->u.bulk.mmal_flags, -+ msg_context->u.bulk.dts, -+ msg_context->u.bulk.pts); -+ -+ /* release message context */ -+ release_msg_context(msg_context); -+} -+ -+/* enqueue a bulk receive for a given message context */ -+static int bulk_receive(struct vchiq_mmal_instance *instance, -+ struct mmal_msg *msg, -+ struct mmal_msg_context *msg_context) -+{ -+ unsigned long rd_len; -+ unsigned long flags = 0; -+ int ret; -+ -+ /* bulk mutex stops other bulk operations while we have a -+ * receive in progress - released in callback -+ */ -+ ret = mutex_lock_interruptible(&instance->bulk_mutex); -+ if (ret != 0) -+ return ret; -+ -+ rd_len = msg->u.buffer_from_host.buffer_header.length; -+ -+ /* take buffer from queue */ -+ spin_lock_irqsave(&msg_context->u.bulk.port->slock, flags); -+ if (list_empty(&msg_context->u.bulk.port->buffers)) { -+ spin_unlock_irqrestore(&msg_context->u.bulk.port->slock, flags); -+ pr_err("buffer list empty trying to submit bulk receive\n"); -+ -+ /* todo: this is a serious error, we should never have -+ * commited a buffer_to_host operation to the mmal -+ * port without the buffer to back it up (underflow -+ * handling) and there is no obvious way to deal with -+ * this - how is the mmal servie going to react when -+ * we fail to do the xfer and reschedule a buffer when -+ * it arrives? perhaps a starved flag to indicate a -+ * waiting bulk receive? -+ */ -+ -+ mutex_unlock(&instance->bulk_mutex); -+ -+ return -EINVAL; -+ } -+ -+ msg_context->u.bulk.buffer = -+ list_entry(msg_context->u.bulk.port->buffers.next, -+ struct mmal_buffer, list); -+ list_del(&msg_context->u.bulk.buffer->list); -+ -+ spin_unlock_irqrestore(&msg_context->u.bulk.port->slock, flags); -+ -+ /* ensure we do not overrun the available buffer */ -+ if (rd_len > msg_context->u.bulk.buffer->buffer_size) { -+ rd_len = msg_context->u.bulk.buffer->buffer_size; -+ pr_warn("short read as not enough receive buffer space\n"); -+ /* todo: is this the correct response, what happens to -+ * the rest of the message data? -+ */ -+ } -+ -+ /* store length */ -+ msg_context->u.bulk.buffer_used = rd_len; -+ msg_context->u.bulk.mmal_flags = -+ msg->u.buffer_from_host.buffer_header.flags; -+ msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts; -+ msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts; -+ -+ // only need to flush L1 cache here, as VCHIQ takes care of the L2 -+ // cache. -+ __cpuc_flush_dcache_area(msg_context->u.bulk.buffer->buffer, rd_len); -+ -+ /* queue the bulk submission */ -+ vchi_service_use(instance->handle); -+ ret = vchi_bulk_queue_receive(instance->handle, -+ msg_context->u.bulk.buffer->buffer, -+ /* Actual receive needs to be a multiple -+ * of 4 bytes -+ */ -+ (rd_len + 3) & ~3, -+ VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, -+ msg_context); -+ -+ vchi_service_release(instance->handle); -+ -+ if (ret != 0) { -+ /* callback will not be clearing the mutex */ -+ mutex_unlock(&instance->bulk_mutex); -+ } -+ -+ return ret; -+} -+ -+/* enque a dummy bulk receive for a given message context */ -+static int dummy_bulk_receive(struct vchiq_mmal_instance *instance, -+ struct mmal_msg_context *msg_context) -+{ -+ int ret; -+ -+ /* bulk mutex stops other bulk operations while we have a -+ * receive in progress - released in callback -+ */ -+ ret = mutex_lock_interruptible(&instance->bulk_mutex); -+ if (ret != 0) -+ return ret; -+ -+ /* zero length indicates this was a dummy transfer */ -+ msg_context->u.bulk.buffer_used = 0; -+ -+ /* queue the bulk submission */ -+ vchi_service_use(instance->handle); -+ -+ ret = vchi_bulk_queue_receive(instance->handle, -+ instance->bulk_scratch, -+ 8, -+ VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE | -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, -+ msg_context); -+ -+ vchi_service_release(instance->handle); -+ -+ if (ret != 0) { -+ /* callback will not be clearing the mutex */ -+ mutex_unlock(&instance->bulk_mutex); -+ } -+ -+ return ret; -+} -+ -+/* data in message, memcpy from packet into output buffer */ -+static int inline_receive(struct vchiq_mmal_instance *instance, -+ struct mmal_msg *msg, -+ struct mmal_msg_context *msg_context) -+{ -+ unsigned long flags = 0; -+ -+ /* take buffer from queue */ -+ spin_lock_irqsave(&msg_context->u.bulk.port->slock, flags); -+ if (list_empty(&msg_context->u.bulk.port->buffers)) { -+ spin_unlock_irqrestore(&msg_context->u.bulk.port->slock, flags); -+ pr_err("buffer list empty trying to receive inline\n"); -+ -+ /* todo: this is a serious error, we should never have -+ * commited a buffer_to_host operation to the mmal -+ * port without the buffer to back it up (with -+ * underflow handling) and there is no obvious way to -+ * deal with this. Less bad than the bulk case as we -+ * can just drop this on the floor but...unhelpful -+ */ -+ return -EINVAL; -+ } -+ -+ msg_context->u.bulk.buffer = -+ list_entry(msg_context->u.bulk.port->buffers.next, -+ struct mmal_buffer, list); -+ list_del(&msg_context->u.bulk.buffer->list); -+ -+ spin_unlock_irqrestore(&msg_context->u.bulk.port->slock, flags); -+ -+ memcpy(msg_context->u.bulk.buffer->buffer, -+ msg->u.buffer_from_host.short_data, -+ msg->u.buffer_from_host.payload_in_message); -+ -+ msg_context->u.bulk.buffer_used = -+ msg->u.buffer_from_host.payload_in_message; -+ -+ return 0; -+} -+ -+/* queue the buffer availability with MMAL_MSG_TYPE_BUFFER_FROM_HOST */ -+static int -+buffer_from_host(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, struct mmal_buffer *buf) -+{ -+ struct mmal_msg_context *msg_context; -+ struct mmal_msg m; -+ int ret; -+ -+ pr_debug("instance:%p buffer:%p\n", instance->handle, buf); -+ -+ /* bulk mutex stops other bulk operations while we -+ * have a receive in progress -+ */ -+ if (mutex_lock_interruptible(&instance->bulk_mutex)) -+ return -EINTR; -+ -+ /* get context */ -+ msg_context = get_msg_context(instance); -+ if (msg_context == NULL) -+ return -ENOMEM; -+ -+ /* store bulk message context for when data arrives */ -+ msg_context->u.bulk.instance = instance; -+ msg_context->u.bulk.port = port; -+ msg_context->u.bulk.buffer = NULL; /* not valid until bulk xfer */ -+ msg_context->u.bulk.buffer_used = 0; -+ -+ /* initialise work structure ready to schedule callback */ -+ INIT_WORK(&msg_context->u.bulk.work, buffer_work_cb); -+ -+ /* prep the buffer from host message */ -+ memset(&m, 0xbc, sizeof(m)); /* just to make debug clearer */ -+ -+ m.h.type = MMAL_MSG_TYPE_BUFFER_FROM_HOST; -+ m.h.magic = MMAL_MAGIC; -+ m.h.context = msg_context; -+ m.h.status = 0; -+ -+ /* drvbuf is our private data passed back */ -+ m.u.buffer_from_host.drvbuf.magic = MMAL_MAGIC; -+ m.u.buffer_from_host.drvbuf.component_handle = port->component->handle; -+ m.u.buffer_from_host.drvbuf.port_handle = port->handle; -+ m.u.buffer_from_host.drvbuf.client_context = msg_context; -+ -+ /* buffer header */ -+ m.u.buffer_from_host.buffer_header.cmd = 0; -+ m.u.buffer_from_host.buffer_header.data = buf->buffer; -+ m.u.buffer_from_host.buffer_header.alloc_size = buf->buffer_size; -+ m.u.buffer_from_host.buffer_header.length = 0; /* nothing used yet */ -+ m.u.buffer_from_host.buffer_header.offset = 0; /* no offset */ -+ m.u.buffer_from_host.buffer_header.flags = 0; /* no flags */ -+ m.u.buffer_from_host.buffer_header.pts = MMAL_TIME_UNKNOWN; -+ m.u.buffer_from_host.buffer_header.dts = MMAL_TIME_UNKNOWN; -+ -+ /* clear buffer type sepecific data */ -+ memset(&m.u.buffer_from_host.buffer_header_type_specific, 0, -+ sizeof(m.u.buffer_from_host.buffer_header_type_specific)); -+ -+ /* no payload in message */ -+ m.u.buffer_from_host.payload_in_message = 0; -+ -+ vchi_service_use(instance->handle); -+ -+ ret = vchi_msg_queue(instance->handle, &m, -+ sizeof(struct mmal_msg_header) + -+ sizeof(m.u.buffer_from_host), -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ if (ret != 0) { -+ release_msg_context(msg_context); -+ /* todo: is this correct error value? */ -+ } -+ -+ vchi_service_release(instance->handle); -+ -+ mutex_unlock(&instance->bulk_mutex); -+ -+ return ret; -+} -+ -+/* submit a buffer to the mmal sevice -+ * -+ * the buffer_from_host uses size data from the ports next available -+ * mmal_buffer and deals with there being no buffer available by -+ * incrementing the underflow for later -+ */ -+static int port_buffer_from_host(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ struct mmal_buffer *buf; -+ unsigned long flags = 0; -+ -+ if (!port->enabled) -+ return -EINVAL; -+ -+ /* peek buffer from queue */ -+ spin_lock_irqsave(&port->slock, flags); -+ if (list_empty(&port->buffers)) { -+ port->buffer_underflow++; -+ spin_unlock_irqrestore(&port->slock, flags); -+ return -ENOSPC; -+ } -+ -+ buf = list_entry(port->buffers.next, struct mmal_buffer, list); -+ -+ spin_unlock_irqrestore(&port->slock, flags); -+ -+ /* issue buffer to mmal service */ -+ ret = buffer_from_host(instance, port, buf); -+ if (ret) { -+ pr_err("adding buffer header failed\n"); -+ /* todo: how should this be dealt with */ -+ } -+ -+ return ret; -+} -+ -+/* deals with receipt of buffer to host message */ -+static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, -+ struct mmal_msg *msg, u32 msg_len) -+{ -+ struct mmal_msg_context *msg_context; -+ -+ pr_debug("buffer_to_host_cb: instance:%p msg:%p msg_len:%d\n", -+ instance, msg, msg_len); -+ -+ if (msg->u.buffer_from_host.drvbuf.magic == MMAL_MAGIC) { -+ msg_context = msg->u.buffer_from_host.drvbuf.client_context; -+ } else { -+ pr_err("MMAL_MSG_TYPE_BUFFER_TO_HOST with bad magic\n"); -+ return; -+ } -+ -+ if (msg->h.status != MMAL_MSG_STATUS_SUCCESS) { -+ /* message reception had an error */ -+ pr_warn("error %d in reply\n", msg->h.status); -+ -+ msg_context->u.bulk.status = msg->h.status; -+ -+ } else if (msg->u.buffer_from_host.buffer_header.length == 0) { -+ /* empty buffer */ -+ if (msg->u.buffer_from_host.buffer_header.flags & -+ MMAL_BUFFER_HEADER_FLAG_EOS) { -+ msg_context->u.bulk.status = -+ dummy_bulk_receive(instance, msg_context); -+ if (msg_context->u.bulk.status == 0) -+ return; /* successful bulk submission, bulk -+ * completion will trigger callback -+ */ -+ } else { -+ /* do callback with empty buffer - not EOS though */ -+ msg_context->u.bulk.status = 0; -+ msg_context->u.bulk.buffer_used = 0; -+ } -+ } else if (msg->u.buffer_from_host.payload_in_message == 0) { -+ /* data is not in message, queue a bulk receive */ -+ msg_context->u.bulk.status = -+ bulk_receive(instance, msg, msg_context); -+ if (msg_context->u.bulk.status == 0) -+ return; /* successful bulk submission, bulk -+ * completion will trigger callback -+ */ -+ -+ /* failed to submit buffer, this will end badly */ -+ pr_err("error %d on bulk submission\n", -+ msg_context->u.bulk.status); -+ -+ } else if (msg->u.buffer_from_host.payload_in_message <= -+ MMAL_VC_SHORT_DATA) { -+ /* data payload within message */ -+ msg_context->u.bulk.status = inline_receive(instance, msg, -+ msg_context); -+ } else { -+ pr_err("message with invalid short payload\n"); -+ -+ /* signal error */ -+ msg_context->u.bulk.status = -EINVAL; -+ msg_context->u.bulk.buffer_used = -+ msg->u.buffer_from_host.payload_in_message; -+ } -+ -+ /* replace the buffer header */ -+ port_buffer_from_host(instance, msg_context->u.bulk.port); -+ -+ /* schedule the port callback */ -+ schedule_work(&msg_context->u.bulk.work); -+} -+ -+static void bulk_receive_cb(struct vchiq_mmal_instance *instance, -+ struct mmal_msg_context *msg_context) -+{ -+ /* bulk receive operation complete */ -+ mutex_unlock(&msg_context->u.bulk.instance->bulk_mutex); -+ -+ /* replace the buffer header */ -+ port_buffer_from_host(msg_context->u.bulk.instance, -+ msg_context->u.bulk.port); -+ -+ msg_context->u.bulk.status = 0; -+ -+ /* schedule the port callback */ -+ schedule_work(&msg_context->u.bulk.work); -+} -+ -+static void bulk_abort_cb(struct vchiq_mmal_instance *instance, -+ struct mmal_msg_context *msg_context) -+{ -+ pr_err("%s: bulk ABORTED msg_context:%p\n", __func__, msg_context); -+ -+ /* bulk receive operation complete */ -+ mutex_unlock(&msg_context->u.bulk.instance->bulk_mutex); -+ -+ /* replace the buffer header */ -+ port_buffer_from_host(msg_context->u.bulk.instance, -+ msg_context->u.bulk.port); -+ -+ msg_context->u.bulk.status = -EINTR; -+ -+ schedule_work(&msg_context->u.bulk.work); -+} -+ -+/* incoming event service callback */ -+static void service_callback(void *param, -+ const VCHI_CALLBACK_REASON_T reason, -+ void *bulk_ctx) -+{ -+ struct vchiq_mmal_instance *instance = param; -+ int status; -+ u32 msg_len; -+ struct mmal_msg *msg; -+ VCHI_HELD_MSG_T msg_handle; -+ -+ if (!instance) { -+ pr_err("Message callback passed NULL instance\n"); -+ return; -+ } -+ -+ switch (reason) { -+ case VCHI_CALLBACK_MSG_AVAILABLE: -+ status = vchi_msg_hold(instance->handle, (void **)&msg, -+ &msg_len, VCHI_FLAGS_NONE, &msg_handle); -+ if (status) { -+ pr_err("Unable to dequeue a message (%d)\n", status); -+ break; -+ } -+ -+ DBG_DUMP_MSG(msg, msg_len, "<<< reply message"); -+ -+ /* handling is different for buffer messages */ -+ switch (msg->h.type) { -+ -+ case MMAL_MSG_TYPE_BUFFER_FROM_HOST: -+ vchi_held_msg_release(&msg_handle); -+ break; -+ -+ case MMAL_MSG_TYPE_EVENT_TO_HOST: -+ event_to_host_cb(instance, msg, msg_len); -+ vchi_held_msg_release(&msg_handle); -+ -+ break; -+ -+ case MMAL_MSG_TYPE_BUFFER_TO_HOST: -+ buffer_to_host_cb(instance, msg, msg_len); -+ vchi_held_msg_release(&msg_handle); -+ break; -+ -+ default: -+ /* messages dependant on header context to complete */ -+ -+ /* todo: the msg.context really ought to be sanity -+ * checked before we just use it, afaict it comes back -+ * and is used raw from the videocore. Perhaps it -+ * should be verified the address lies in the kernel -+ * address space. -+ */ -+ if (msg->h.context == NULL) { -+ pr_err("received message context was null!\n"); -+ vchi_held_msg_release(&msg_handle); -+ break; -+ } -+ -+ /* fill in context values */ -+ msg->h.context->u.sync.msg_handle = msg_handle; -+ msg->h.context->u.sync.msg = msg; -+ msg->h.context->u.sync.msg_len = msg_len; -+ -+ /* todo: should this check (completion_done() -+ * == 1) for no one waiting? or do we need a -+ * flag to tell us the completion has been -+ * interrupted so we can free the message and -+ * its context. This probably also solves the -+ * message arriving after interruption todo -+ * below -+ */ -+ -+ /* complete message so caller knows it happened */ -+ complete(&msg->h.context->u.sync.cmplt); -+ break; -+ } -+ -+ break; -+ -+ case VCHI_CALLBACK_BULK_RECEIVED: -+ bulk_receive_cb(instance, bulk_ctx); -+ break; -+ -+ case VCHI_CALLBACK_BULK_RECEIVE_ABORTED: -+ bulk_abort_cb(instance, bulk_ctx); -+ break; -+ -+ case VCHI_CALLBACK_SERVICE_CLOSED: -+ /* TODO: consider if this requires action if received when -+ * driver is not explicitly closing the service -+ */ -+ break; -+ -+ default: -+ pr_err("Received unhandled message reason %d\n", reason); -+ break; -+ } -+} -+ -+static int send_synchronous_mmal_msg(struct vchiq_mmal_instance *instance, -+ struct mmal_msg *msg, -+ unsigned int payload_len, -+ struct mmal_msg **msg_out, -+ VCHI_HELD_MSG_T *msg_handle_out) -+{ -+ struct mmal_msg_context msg_context; -+ int ret; -+ -+ /* payload size must not cause message to exceed max size */ -+ if (payload_len > -+ (MMAL_MSG_MAX_SIZE - sizeof(struct mmal_msg_header))) { -+ pr_err("payload length %d exceeds max:%d\n", payload_len, -+ (MMAL_MSG_MAX_SIZE - sizeof(struct mmal_msg_header))); -+ return -EINVAL; -+ } -+ -+ init_completion(&msg_context.u.sync.cmplt); -+ -+ msg->h.magic = MMAL_MAGIC; -+ msg->h.context = &msg_context; -+ msg->h.status = 0; -+ -+ DBG_DUMP_MSG(msg, (sizeof(struct mmal_msg_header) + payload_len), -+ ">>> sync message"); -+ -+ vchi_service_use(instance->handle); -+ -+ ret = vchi_msg_queue(instance->handle, -+ msg, -+ sizeof(struct mmal_msg_header) + payload_len, -+ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); -+ -+ vchi_service_release(instance->handle); -+ -+ if (ret) { -+ pr_err("error %d queuing message\n", ret); -+ return ret; -+ } -+ -+ ret = wait_for_completion_timeout(&msg_context.u.sync.cmplt, 3*HZ); -+ if (ret <= 0) { -+ pr_err("error %d waiting for sync completion\n", ret); -+ if (ret == 0) -+ ret = -ETIME; -+ /* todo: what happens if the message arrives after aborting */ -+ return ret; -+ } -+ -+ *msg_out = msg_context.u.sync.msg; -+ *msg_handle_out = msg_context.u.sync.msg_handle; -+ -+ return 0; -+} -+ -+static void dump_port_info(struct vchiq_mmal_port *port) -+{ -+ pr_debug("port handle:0x%x enabled:%d\n", port->handle, port->enabled); -+ -+ pr_debug("buffer minimum num:%d size:%d align:%d\n", -+ port->minimum_buffer.num, -+ port->minimum_buffer.size, port->minimum_buffer.alignment); -+ -+ pr_debug("buffer recommended num:%d size:%d align:%d\n", -+ port->recommended_buffer.num, -+ port->recommended_buffer.size, -+ port->recommended_buffer.alignment); -+ -+ pr_debug("buffer current values num:%d size:%d align:%d\n", -+ port->current_buffer.num, -+ port->current_buffer.size, port->current_buffer.alignment); -+ -+ pr_debug("elementry stream: type:%d encoding:0x%x varient:0x%x\n", -+ port->format.type, -+ port->format.encoding, port->format.encoding_variant); -+ -+ pr_debug(" bitrate:%d flags:0x%x\n", -+ port->format.bitrate, port->format.flags); -+ -+ if (port->format.type == MMAL_ES_TYPE_VIDEO) { -+ pr_debug -+ ("es video format: width:%d height:%d colourspace:0x%x\n", -+ port->es.video.width, port->es.video.height, -+ port->es.video.color_space); -+ -+ pr_debug(" : crop xywh %d,%d,%d,%d\n", -+ port->es.video.crop.x, -+ port->es.video.crop.y, -+ port->es.video.crop.width, port->es.video.crop.height); -+ pr_debug(" : framerate %d/%d aspect %d/%d\n", -+ port->es.video.frame_rate.num, -+ port->es.video.frame_rate.den, -+ port->es.video.par.num, port->es.video.par.den); -+ } -+} -+ -+static void port_to_mmal_msg(struct vchiq_mmal_port *port, struct mmal_port *p) -+{ -+ -+ /* todo do readonly fields need setting at all? */ -+ p->type = port->type; -+ p->index = port->index; -+ p->index_all = 0; -+ p->is_enabled = port->enabled; -+ p->buffer_num_min = port->minimum_buffer.num; -+ p->buffer_size_min = port->minimum_buffer.size; -+ p->buffer_alignment_min = port->minimum_buffer.alignment; -+ p->buffer_num_recommended = port->recommended_buffer.num; -+ p->buffer_size_recommended = port->recommended_buffer.size; -+ -+ /* only three writable fields in a port */ -+ p->buffer_num = port->current_buffer.num; -+ p->buffer_size = port->current_buffer.size; -+ p->userdata = port; -+} -+ -+static int port_info_set(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ pr_debug("setting port info port %p\n", port); -+ if (!port) -+ return -1; -+ dump_port_info(port); -+ -+ m.h.type = MMAL_MSG_TYPE_PORT_INFO_SET; -+ -+ m.u.port_info_set.component_handle = port->component->handle; -+ m.u.port_info_set.port_type = port->type; -+ m.u.port_info_set.port_index = port->index; -+ -+ port_to_mmal_msg(port, &m.u.port_info_set.port); -+ -+ /* elementry stream format setup */ -+ m.u.port_info_set.format.type = port->format.type; -+ m.u.port_info_set.format.encoding = port->format.encoding; -+ m.u.port_info_set.format.encoding_variant = -+ port->format.encoding_variant; -+ m.u.port_info_set.format.bitrate = port->format.bitrate; -+ m.u.port_info_set.format.flags = port->format.flags; -+ -+ memcpy(&m.u.port_info_set.es, &port->es, -+ sizeof(union mmal_es_specific_format)); -+ -+ m.u.port_info_set.format.extradata_size = port->format.extradata_size; -+ memcpy(&m.u.port_info_set.extradata, port->format.extradata, -+ port->format.extradata_size); -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.port_info_set), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_SET) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ /* return operation status */ -+ ret = -rmsg->u.port_info_get_reply.status; -+ -+ pr_debug("%s:result:%d component:0x%x port:%d\n", __func__, ret, -+ port->component->handle, port->handle); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+ -+} -+ -+/* use port info get message to retrive port information */ -+static int port_info_get(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ /* port info time */ -+ m.h.type = MMAL_MSG_TYPE_PORT_INFO_GET; -+ m.u.port_info_get.component_handle = port->component->handle; -+ m.u.port_info_get.port_type = port->type; -+ m.u.port_info_get.index = port->index; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.port_info_get), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_INFO_GET) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ /* return operation status */ -+ ret = -rmsg->u.port_info_get_reply.status; -+ if (ret != MMAL_MSG_STATUS_SUCCESS) -+ goto release_msg; -+ -+ if (rmsg->u.port_info_get_reply.port.is_enabled == 0) -+ port->enabled = false; -+ else -+ port->enabled = true; -+ -+ /* copy the values out of the message */ -+ port->handle = rmsg->u.port_info_get_reply.port_handle; -+ -+ /* port type and index cached to use on port info set becuase -+ * it does not use a port handle -+ */ -+ port->type = rmsg->u.port_info_get_reply.port_type; -+ port->index = rmsg->u.port_info_get_reply.port_index; -+ -+ port->minimum_buffer.num = -+ rmsg->u.port_info_get_reply.port.buffer_num_min; -+ port->minimum_buffer.size = -+ rmsg->u.port_info_get_reply.port.buffer_size_min; -+ port->minimum_buffer.alignment = -+ rmsg->u.port_info_get_reply.port.buffer_alignment_min; -+ -+ port->recommended_buffer.alignment = -+ rmsg->u.port_info_get_reply.port.buffer_alignment_min; -+ port->recommended_buffer.num = -+ rmsg->u.port_info_get_reply.port.buffer_num_recommended; -+ -+ port->current_buffer.num = rmsg->u.port_info_get_reply.port.buffer_num; -+ port->current_buffer.size = -+ rmsg->u.port_info_get_reply.port.buffer_size; -+ -+ /* stream format */ -+ port->format.type = rmsg->u.port_info_get_reply.format.type; -+ port->format.encoding = rmsg->u.port_info_get_reply.format.encoding; -+ port->format.encoding_variant = -+ rmsg->u.port_info_get_reply.format.encoding_variant; -+ port->format.bitrate = rmsg->u.port_info_get_reply.format.bitrate; -+ port->format.flags = rmsg->u.port_info_get_reply.format.flags; -+ -+ /* elementry stream format */ -+ memcpy(&port->es, -+ &rmsg->u.port_info_get_reply.es, -+ sizeof(union mmal_es_specific_format)); -+ port->format.es = &port->es; -+ -+ port->format.extradata_size = -+ rmsg->u.port_info_get_reply.format.extradata_size; -+ memcpy(port->format.extradata, -+ rmsg->u.port_info_get_reply.extradata, -+ port->format.extradata_size); -+ -+ pr_debug("received port info\n"); -+ dump_port_info(port); -+ -+release_msg: -+ -+ pr_debug("%s:result:%d component:0x%x port:%d\n", -+ __func__, ret, port->component->handle, port->handle); -+ -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* create comonent on vc */ -+static int create_component(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component, -+ const char *name) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ /* build component create message */ -+ m.h.type = MMAL_MSG_TYPE_COMPONENT_CREATE; -+ m.u.component_create.client_component = component; -+ strncpy(m.u.component_create.name, name, -+ sizeof(m.u.component_create.name)); -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.component_create), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != m.h.type) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.component_create_reply.status; -+ if (ret != MMAL_MSG_STATUS_SUCCESS) -+ goto release_msg; -+ -+ /* a valid component response received */ -+ component->handle = rmsg->u.component_create_reply.component_handle; -+ component->inputs = rmsg->u.component_create_reply.input_num; -+ component->outputs = rmsg->u.component_create_reply.output_num; -+ component->clocks = rmsg->u.component_create_reply.clock_num; -+ -+ pr_debug("Component handle:0x%x in:%d out:%d clock:%d\n", -+ component->handle, -+ component->inputs, component->outputs, component->clocks); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* destroys a component on vc */ -+static int destroy_component(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_COMPONENT_DESTROY; -+ m.u.component_destroy.component_handle = component->handle; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.component_destroy), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != m.h.type) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.component_destroy_reply.status; -+ -+release_msg: -+ -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* enable a component on vc */ -+static int enable_component(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_COMPONENT_ENABLE; -+ m.u.component_enable.component_handle = component->handle; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.component_enable), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != m.h.type) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.component_enable_reply.status; -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* disable a component on vc */ -+static int disable_component(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_COMPONENT_DISABLE; -+ m.u.component_disable.component_handle = component->handle; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.component_disable), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != m.h.type) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.component_disable_reply.status; -+ -+release_msg: -+ -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* get version of mmal implementation */ -+static int get_version(struct vchiq_mmal_instance *instance, -+ u32 *major_out, u32 *minor_out) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_GET_VERSION; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.version), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != m.h.type) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ *major_out = rmsg->u.version.major; -+ *minor_out = rmsg->u.version.minor; -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* do a port action with a port as a parameter */ -+static int port_action_port(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ enum mmal_msg_port_action_type action_type) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_PORT_ACTION; -+ m.u.port_action_port.component_handle = port->component->handle; -+ m.u.port_action_port.port_handle = port->handle; -+ m.u.port_action_port.action = action_type; -+ -+ port_to_mmal_msg(port, &m.u.port_action_port.port); -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.port_action_port), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.port_action_reply.status; -+ -+ pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d)\n", -+ __func__, -+ ret, port->component->handle, port->handle, -+ port_action_type_names[action_type], action_type); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* do a port action with handles as parameters */ -+static int port_action_handle(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ enum mmal_msg_port_action_type action_type, -+ u32 connect_component_handle, -+ u32 connect_port_handle) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_PORT_ACTION; -+ -+ m.u.port_action_handle.component_handle = port->component->handle; -+ m.u.port_action_handle.port_handle = port->handle; -+ m.u.port_action_handle.action = action_type; -+ -+ m.u.port_action_handle.connect_component_handle = -+ connect_component_handle; -+ m.u.port_action_handle.connect_port_handle = connect_port_handle; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(m.u.port_action_handle), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_ACTION) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.port_action_reply.status; -+ -+ pr_debug("%s:result:%d component:0x%x port:%d action:%s(%d)" \ -+ " connect component:0x%x connect port:%d\n", -+ __func__, -+ ret, port->component->handle, port->handle, -+ port_action_type_names[action_type], -+ action_type, connect_component_handle, connect_port_handle); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+static int port_parameter_set(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter_id, void *value, u32 value_size) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_SET; -+ -+ m.u.port_parameter_set.component_handle = port->component->handle; -+ m.u.port_parameter_set.port_handle = port->handle; -+ m.u.port_parameter_set.id = parameter_id; -+ m.u.port_parameter_set.size = (2 * sizeof(u32)) + value_size; -+ memcpy(&m.u.port_parameter_set.value, value, value_size); -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ (4 * sizeof(u32)) + value_size, -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_SET) { -+ /* got an unexpected message type in reply */ -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.port_parameter_set_reply.status; -+ -+ pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", -+ __func__, -+ ret, port->component->handle, port->handle, parameter_id); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+static int port_parameter_get(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter_id, void *value, u32 *value_size) -+{ -+ int ret; -+ struct mmal_msg m; -+ struct mmal_msg *rmsg; -+ VCHI_HELD_MSG_T rmsg_handle; -+ -+ m.h.type = MMAL_MSG_TYPE_PORT_PARAMETER_GET; -+ -+ m.u.port_parameter_get.component_handle = port->component->handle; -+ m.u.port_parameter_get.port_handle = port->handle; -+ m.u.port_parameter_get.id = parameter_id; -+ m.u.port_parameter_get.size = (2 * sizeof(u32)) + *value_size; -+ -+ ret = send_synchronous_mmal_msg(instance, &m, -+ sizeof(struct -+ mmal_msg_port_parameter_get), -+ &rmsg, &rmsg_handle); -+ if (ret) -+ return ret; -+ -+ if (rmsg->h.type != MMAL_MSG_TYPE_PORT_PARAMETER_GET) { -+ /* got an unexpected message type in reply */ -+ pr_err("Incorrect reply type %d\n", rmsg->h.type); -+ ret = -EINVAL; -+ goto release_msg; -+ } -+ -+ ret = -rmsg->u.port_parameter_get_reply.status; -+ if (ret) { -+ /* Copy only as much as we have space for -+ * but report true size of parameter -+ */ -+ memcpy(value, &rmsg->u.port_parameter_get_reply.value, -+ *value_size); -+ *value_size = rmsg->u.port_parameter_get_reply.size; -+ } else -+ memcpy(value, &rmsg->u.port_parameter_get_reply.value, -+ rmsg->u.port_parameter_get_reply.size); -+ -+ pr_debug("%s:result:%d component:0x%x port:%d parameter:%d\n", __func__, -+ ret, port->component->handle, port->handle, parameter_id); -+ -+release_msg: -+ vchi_held_msg_release(&rmsg_handle); -+ -+ return ret; -+} -+ -+/* disables a port and drains buffers from it */ -+static int port_disable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ struct list_head *q, *buf_head; -+ unsigned long flags = 0; -+ -+ if (!port->enabled) -+ return 0; -+ -+ port->enabled = false; -+ -+ ret = port_action_port(instance, port, -+ MMAL_MSG_PORT_ACTION_TYPE_DISABLE); -+ if (ret == 0) { -+ -+ /* drain all queued buffers on port */ -+ spin_lock_irqsave(&port->slock, flags); -+ -+ list_for_each_safe(buf_head, q, &port->buffers) { -+ struct mmal_buffer *mmalbuf; -+ mmalbuf = list_entry(buf_head, struct mmal_buffer, -+ list); -+ list_del(buf_head); -+ if (port->buffer_cb) -+ port->buffer_cb(instance, -+ port, 0, mmalbuf, 0, 0, -+ MMAL_TIME_UNKNOWN, -+ MMAL_TIME_UNKNOWN); -+ } -+ -+ spin_unlock_irqrestore(&port->slock, flags); -+ -+ ret = port_info_get(instance, port); -+ } -+ -+ return ret; -+} -+ -+/* enable a port */ -+static int port_enable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ unsigned int hdr_count; -+ struct list_head *buf_head; -+ int ret; -+ -+ if (port->enabled) -+ return 0; -+ -+ /* ensure there are enough buffers queued to cover the buffer headers */ -+ if (port->buffer_cb != NULL) { -+ hdr_count = 0; -+ list_for_each(buf_head, &port->buffers) { -+ hdr_count++; -+ } -+ if (hdr_count < port->current_buffer.num) -+ return -ENOSPC; -+ } -+ -+ ret = port_action_port(instance, port, -+ MMAL_MSG_PORT_ACTION_TYPE_ENABLE); -+ if (ret) -+ goto done; -+ -+ port->enabled = true; -+ -+ if (port->buffer_cb) { -+ /* send buffer headers to videocore */ -+ hdr_count = 1; -+ list_for_each(buf_head, &port->buffers) { -+ struct mmal_buffer *mmalbuf; -+ mmalbuf = list_entry(buf_head, struct mmal_buffer, -+ list); -+ ret = buffer_from_host(instance, port, mmalbuf); -+ if (ret) -+ goto done; -+ -+ hdr_count++; -+ if (hdr_count > port->current_buffer.num) -+ break; -+ } -+ } -+ -+ ret = port_info_get(instance, port); -+ -+done: -+ return ret; -+} -+ -+/* ------------------------------------------------------------------ -+ * Exported API -+ *------------------------------------------------------------------*/ -+ -+int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ ret = port_info_set(instance, port); -+ if (ret) -+ goto release_unlock; -+ -+ /* read what has actually been set */ -+ ret = port_info_get(instance, port); -+ -+release_unlock: -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+ -+} -+ -+int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter, void *value, u32 value_size) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ ret = port_parameter_set(instance, port, parameter, value, value_size); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter, void *value, u32 *value_size) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ ret = port_parameter_get(instance, port, parameter, value, value_size); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+/* enable a port -+ * -+ * enables a port and queues buffers for satisfying callbacks if we -+ * provide a callback handler -+ */ -+int vchiq_mmal_port_enable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ vchiq_mmal_buffer_cb buffer_cb) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ /* already enabled - noop */ -+ if (port->enabled) { -+ ret = 0; -+ goto unlock; -+ } -+ -+ port->buffer_cb = buffer_cb; -+ -+ ret = port_enable(instance, port); -+ -+unlock: -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ if (!port->enabled) { -+ mutex_unlock(&instance->vchiq_mutex); -+ return 0; -+ } -+ -+ ret = port_disable(instance, port); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+/* ports will be connected in a tunneled manner so data buffers -+ * are not handled by client. -+ */ -+int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *src, -+ struct vchiq_mmal_port *dst) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ /* disconnect ports if connected */ -+ if (src->connected != NULL) { -+ ret = port_disable(instance, src); -+ if (ret) { -+ pr_err("failed disabling src port(%d)\n", ret); -+ goto release_unlock; -+ } -+ -+ /* do not need to disable the destination port as they -+ * are connected and it is done automatically -+ */ -+ -+ ret = port_action_handle(instance, src, -+ MMAL_MSG_PORT_ACTION_TYPE_DISCONNECT, -+ src->connected->component->handle, -+ src->connected->handle); -+ if (ret < 0) { -+ pr_err("failed disconnecting src port\n"); -+ goto release_unlock; -+ } -+ src->connected->enabled = false; -+ src->connected = NULL; -+ } -+ -+ if (dst == NULL) { -+ /* do not make new connection */ -+ ret = 0; -+ pr_debug("not making new connection\n"); -+ goto release_unlock; -+ } -+ -+ /* copy src port format to dst */ -+ dst->format.encoding = src->format.encoding; -+ dst->es.video.width = src->es.video.width; -+ dst->es.video.height = src->es.video.height; -+ dst->es.video.crop.x = src->es.video.crop.x; -+ dst->es.video.crop.y = src->es.video.crop.y; -+ dst->es.video.crop.width = src->es.video.crop.width; -+ dst->es.video.crop.height = src->es.video.crop.height; -+ dst->es.video.frame_rate.num = src->es.video.frame_rate.num; -+ dst->es.video.frame_rate.den = src->es.video.frame_rate.den; -+ -+ /* set new format */ -+ ret = port_info_set(instance, dst); -+ if (ret) { -+ pr_debug("setting port info failed\n"); -+ goto release_unlock; -+ } -+ -+ /* read what has actually been set */ -+ ret = port_info_get(instance, dst); -+ if (ret) { -+ pr_debug("read back port info failed\n"); -+ goto release_unlock; -+ } -+ -+ /* connect two ports together */ -+ ret = port_action_handle(instance, src, -+ MMAL_MSG_PORT_ACTION_TYPE_CONNECT, -+ dst->component->handle, dst->handle); -+ if (ret < 0) { -+ pr_debug("connecting port %d:%d to %d:%d failed\n", -+ src->component->handle, src->handle, -+ dst->component->handle, dst->handle); -+ goto release_unlock; -+ } -+ src->connected = dst; -+ -+release_unlock: -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ struct mmal_buffer *buffer) -+{ -+ unsigned long flags = 0; -+ -+ spin_lock_irqsave(&port->slock, flags); -+ list_add_tail(&buffer->list, &port->buffers); -+ spin_unlock_irqrestore(&port->slock, flags); -+ -+ /* the port previously underflowed because it was missing a -+ * mmal_buffer which has just been added, submit that buffer -+ * to the mmal service. -+ */ -+ if (port->buffer_underflow) { -+ port_buffer_from_host(instance, port); -+ port->buffer_underflow--; -+ } -+ -+ return 0; -+} -+ -+/* Initialise a mmal component and its ports -+ * -+ */ -+int vchiq_mmal_component_init(struct vchiq_mmal_instance *instance, -+ const char *name, -+ struct vchiq_mmal_component **component_out) -+{ -+ int ret; -+ int idx; /* port index */ -+ struct vchiq_mmal_component *component; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ if (instance->component_idx == VCHIQ_MMAL_MAX_COMPONENTS) { -+ ret = -EINVAL; /* todo is this correct error? */ -+ goto unlock; -+ } -+ -+ component = &instance->component[instance->component_idx]; -+ -+ ret = create_component(instance, component, name); -+ if (ret < 0) -+ goto unlock; -+ -+ /* ports info needs gathering */ -+ component->control.type = MMAL_PORT_TYPE_CONTROL; -+ component->control.index = 0; -+ component->control.component = component; -+ spin_lock_init(&component->control.slock); -+ INIT_LIST_HEAD(&component->control.buffers); -+ ret = port_info_get(instance, &component->control); -+ if (ret < 0) -+ goto release_component; -+ -+ for (idx = 0; idx < component->inputs; idx++) { -+ component->input[idx].type = MMAL_PORT_TYPE_INPUT; -+ component->input[idx].index = idx; -+ component->input[idx].component = component; -+ spin_lock_init(&component->input[idx].slock); -+ INIT_LIST_HEAD(&component->input[idx].buffers); -+ ret = port_info_get(instance, &component->input[idx]); -+ if (ret < 0) -+ goto release_component; -+ } -+ -+ for (idx = 0; idx < component->outputs; idx++) { -+ component->output[idx].type = MMAL_PORT_TYPE_OUTPUT; -+ component->output[idx].index = idx; -+ component->output[idx].component = component; -+ spin_lock_init(&component->output[idx].slock); -+ INIT_LIST_HEAD(&component->output[idx].buffers); -+ ret = port_info_get(instance, &component->output[idx]); -+ if (ret < 0) -+ goto release_component; -+ } -+ -+ for (idx = 0; idx < component->clocks; idx++) { -+ component->clock[idx].type = MMAL_PORT_TYPE_CLOCK; -+ component->clock[idx].index = idx; -+ component->clock[idx].component = component; -+ spin_lock_init(&component->clock[idx].slock); -+ INIT_LIST_HEAD(&component->clock[idx].buffers); -+ ret = port_info_get(instance, &component->clock[idx]); -+ if (ret < 0) -+ goto release_component; -+ } -+ -+ instance->component_idx++; -+ -+ *component_out = component; -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return 0; -+ -+release_component: -+ destroy_component(instance, component); -+unlock: -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+/* -+ * cause a mmal component to be destroyed -+ */ -+int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ if (component->enabled) -+ ret = disable_component(instance, component); -+ -+ ret = destroy_component(instance, component); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+/* -+ * cause a mmal component to be enabled -+ */ -+int vchiq_mmal_component_enable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ if (component->enabled) { -+ mutex_unlock(&instance->vchiq_mutex); -+ return 0; -+ } -+ -+ ret = enable_component(instance, component); -+ if (ret == 0) -+ component->enabled = true; -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+/* -+ * cause a mmal component to be enabled -+ */ -+int vchiq_mmal_component_disable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ if (!component->enabled) { -+ mutex_unlock(&instance->vchiq_mutex); -+ return 0; -+ } -+ -+ ret = disable_component(instance, component); -+ if (ret == 0) -+ component->enabled = false; -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+int vchiq_mmal_version(struct vchiq_mmal_instance *instance, -+ u32 *major_out, u32 *minor_out) -+{ -+ int ret; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ ret = get_version(instance, major_out, minor_out); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ return ret; -+} -+ -+int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance) -+{ -+ int status = 0; -+ -+ if (instance == NULL) -+ return -EINVAL; -+ -+ if (mutex_lock_interruptible(&instance->vchiq_mutex)) -+ return -EINTR; -+ -+ vchi_service_use(instance->handle); -+ -+ status = vchi_service_close(instance->handle); -+ if (status != 0) -+ pr_err("mmal-vchiq: VCHIQ close failed"); -+ -+ mutex_unlock(&instance->vchiq_mutex); -+ -+ vfree(instance->bulk_scratch); -+ -+ kfree(instance); -+ -+ return status; -+} -+ -+int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance) -+{ -+ int status; -+ struct vchiq_mmal_instance *instance; -+ static VCHI_CONNECTION_T *vchi_connection; -+ static VCHI_INSTANCE_T vchi_instance; -+ SERVICE_CREATION_T params = { -+ VCHI_VERSION_EX(VC_MMAL_VER, VC_MMAL_MIN_VER), -+ VC_MMAL_SERVER_NAME, -+ vchi_connection, -+ 0, /* rx fifo size (unused) */ -+ 0, /* tx fifo size (unused) */ -+ service_callback, -+ NULL, /* service callback parameter */ -+ 1, /* unaligned bulk receives */ -+ 1, /* unaligned bulk transmits */ -+ 0 /* want crc check on bulk transfers */ -+ }; -+ -+ /* compile time checks to ensure structure size as they are -+ * directly (de)serialised from memory. -+ */ -+ -+ /* ensure the header structure has packed to the correct size */ -+ BUILD_BUG_ON(sizeof(struct mmal_msg_header) != 24); -+ -+ /* ensure message structure does not exceed maximum length */ -+ BUILD_BUG_ON(sizeof(struct mmal_msg) > MMAL_MSG_MAX_SIZE); -+ -+ /* mmal port struct is correct size */ -+ BUILD_BUG_ON(sizeof(struct mmal_port) != 64); -+ -+ /* create a vchi instance */ -+ status = vchi_initialise(&vchi_instance); -+ if (status) { -+ pr_err("Failed to initialise VCHI instance (status=%d)\n", -+ status); -+ return -EIO; -+ } -+ -+ status = vchi_connect(NULL, 0, vchi_instance); -+ if (status) { -+ pr_err("Failed to connect VCHI instance (status=%d)\n", status); -+ return -EIO; -+ } -+ -+ instance = kmalloc(sizeof(*instance), GFP_KERNEL); -+ memset(instance, 0, sizeof(*instance)); -+ -+ mutex_init(&instance->vchiq_mutex); -+ mutex_init(&instance->bulk_mutex); -+ -+ instance->bulk_scratch = vmalloc(PAGE_SIZE); -+ -+ params.callback_param = instance; -+ -+ status = vchi_service_open(vchi_instance, ¶ms, &instance->handle); -+ if (status) { -+ pr_err("Failed to open VCHI service connection (status=%d)\n", -+ status); -+ goto err_close_services; -+ } -+ -+ vchi_service_release(instance->handle); -+ -+ *out_instance = instance; -+ -+ return 0; -+ -+err_close_services: -+ -+ vchi_service_close(instance->handle); -+ vfree(instance->bulk_scratch); -+ kfree(instance); -+ return -ENODEV; -+} ---- /dev/null -+++ b/drivers/media/platform/bcm2835/mmal-vchiq.h -@@ -0,0 +1,178 @@ -+/* -+ * Broadcom BM2835 V4L2 driver -+ * -+ * Copyright © 2013 Raspberry Pi (Trading) Ltd. -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file COPYING in the main directory of this archive -+ * for more details. -+ * -+ * Authors: Vincent Sanders -+ * Dave Stevenson -+ * Simon Mellor -+ * Luke Diamand -+ * -+ * MMAL interface to VCHIQ message passing -+ */ -+ -+#ifndef MMAL_VCHIQ_H -+#define MMAL_VCHIQ_H -+ -+#include "mmal-msg-format.h" -+ -+#define MAX_PORT_COUNT 4 -+ -+/* Maximum size of the format extradata. */ -+#define MMAL_FORMAT_EXTRADATA_MAX_SIZE 128 -+ -+struct vchiq_mmal_instance; -+ -+enum vchiq_mmal_es_type { -+ MMAL_ES_TYPE_UNKNOWN, /**< Unknown elementary stream type */ -+ MMAL_ES_TYPE_CONTROL, /**< Elementary stream of control commands */ -+ MMAL_ES_TYPE_AUDIO, /**< Audio elementary stream */ -+ MMAL_ES_TYPE_VIDEO, /**< Video elementary stream */ -+ MMAL_ES_TYPE_SUBPICTURE /**< Sub-picture elementary stream */ -+}; -+ -+/* rectangle, used lots so it gets its own struct */ -+struct vchiq_mmal_rect { -+ s32 x; -+ s32 y; -+ s32 width; -+ s32 height; -+}; -+ -+struct vchiq_mmal_port_buffer { -+ unsigned int num; /* number of buffers */ -+ u32 size; /* size of buffers */ -+ u32 alignment; /* alignment of buffers */ -+}; -+ -+struct vchiq_mmal_port; -+ -+typedef void (*vchiq_mmal_buffer_cb)( -+ struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ int status, struct mmal_buffer *buffer, -+ unsigned long length, u32 mmal_flags, s64 dts, s64 pts); -+ -+struct vchiq_mmal_port { -+ bool enabled; -+ u32 handle; -+ u32 type; /* port type, cached to use on port info set */ -+ u32 index; /* port index, cached to use on port info set */ -+ -+ /* component port belongs to, allows simple deref */ -+ struct vchiq_mmal_component *component; -+ -+ struct vchiq_mmal_port *connected; /* port conencted to */ -+ -+ /* buffer info */ -+ struct vchiq_mmal_port_buffer minimum_buffer; -+ struct vchiq_mmal_port_buffer recommended_buffer; -+ struct vchiq_mmal_port_buffer current_buffer; -+ -+ /* stream format */ -+ struct mmal_es_format format; -+ /* elementry stream format */ -+ union mmal_es_specific_format es; -+ -+ /* data buffers to fill */ -+ struct list_head buffers; -+ /* lock to serialise adding and removing buffers from list */ -+ spinlock_t slock; -+ /* count of how many buffer header refils have failed because -+ * there was no buffer to satisfy them -+ */ -+ int buffer_underflow; -+ /* callback on buffer completion */ -+ vchiq_mmal_buffer_cb buffer_cb; -+ /* callback context */ -+ void *cb_ctx; -+}; -+ -+struct vchiq_mmal_component { -+ bool enabled; -+ u32 handle; /* VideoCore handle for component */ -+ u32 inputs; /* Number of input ports */ -+ u32 outputs; /* Number of output ports */ -+ u32 clocks; /* Number of clock ports */ -+ struct vchiq_mmal_port control; /* control port */ -+ struct vchiq_mmal_port input[MAX_PORT_COUNT]; /* input ports */ -+ struct vchiq_mmal_port output[MAX_PORT_COUNT]; /* output ports */ -+ struct vchiq_mmal_port clock[MAX_PORT_COUNT]; /* clock ports */ -+}; -+ -+ -+int vchiq_mmal_init(struct vchiq_mmal_instance **out_instance); -+int vchiq_mmal_finalise(struct vchiq_mmal_instance *instance); -+ -+/* Initialise a mmal component and its ports -+* -+*/ -+int vchiq_mmal_component_init( -+ struct vchiq_mmal_instance *instance, -+ const char *name, -+ struct vchiq_mmal_component **component_out); -+ -+int vchiq_mmal_component_finalise( -+ struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component); -+ -+int vchiq_mmal_component_enable( -+ struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component); -+ -+int vchiq_mmal_component_disable( -+ struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_component *component); -+ -+ -+ -+/* enable a mmal port -+ * -+ * enables a port and if a buffer callback provided enque buffer -+ * headers as apropriate for the port. -+ */ -+int vchiq_mmal_port_enable( -+ struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ vchiq_mmal_buffer_cb buffer_cb); -+ -+/* disable a port -+ * -+ * disable a port will dequeue any pending buffers -+ */ -+int vchiq_mmal_port_disable(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port); -+ -+ -+int vchiq_mmal_port_parameter_set(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter, -+ void *value, -+ u32 value_size); -+ -+int vchiq_mmal_port_parameter_get(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ u32 parameter, -+ void *value, -+ u32 *value_size); -+ -+int vchiq_mmal_port_set_format(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port); -+ -+int vchiq_mmal_port_connect_tunnel(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *src, -+ struct vchiq_mmal_port *dst); -+ -+int vchiq_mmal_version(struct vchiq_mmal_instance *instance, -+ u32 *major_out, -+ u32 *minor_out); -+ -+int vchiq_mmal_submit_buffer(struct vchiq_mmal_instance *instance, -+ struct vchiq_mmal_port *port, -+ struct mmal_buffer *buf); -+ -+#endif /* MMAL_VCHIQ_H */ diff --git a/target/linux/brcm2708/patches-4.9/950-0053-scripts-dtc-Update-to-upstream-version-1.4.1.patch b/target/linux/brcm2708/patches-4.9/950-0053-scripts-dtc-Update-to-upstream-version-1.4.1.patch deleted file mode 100644 index ed4b27092..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0053-scripts-dtc-Update-to-upstream-version-1.4.1.patch +++ /dev/null @@ -1,2833 +0,0 @@ -From 61ad4b70c72fd7d1d3930b50e180d9727eeae150 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 10 Aug 2015 09:49:15 +0100 -Subject: [PATCH] scripts/dtc: Update to upstream version 1.4.1 - -Includes the new localfixups format. - -Signed-off-by: Phil Elwell - -scripts/dtc: Fix UMR causing corrupt dtbo overlay files - -struct fixup_entry is allocated from the heap but it's member -local_fixup_generated was never initialized. This lead to -corrupted dtbo files. - -Fix this by initializing local_fixup_generated to false. - -Signed-off-by: Matthias Reichl - -scripts/dtc: Only emit local fixups for overlays - -Signed-off-by: Phil Elwell ---- - scripts/dtc/checks.c | 106 +++++- - scripts/dtc/dtc-lexer.l | 5 + - scripts/dtc/dtc-lexer.lex.c_shipped | 537 +++++++++++++------------- - scripts/dtc/dtc-parser.tab.c_shipped | 714 ++++++++++++++++++----------------- - scripts/dtc/dtc-parser.tab.h_shipped | 46 +-- - scripts/dtc/dtc-parser.y | 22 +- - scripts/dtc/dtc.c | 9 +- - scripts/dtc/dtc.h | 40 ++ - scripts/dtc/flattree.c | 202 ++++++++++ - scripts/dtc/version_gen.h | 2 +- - 10 files changed, 1029 insertions(+), 654 deletions(-) - ---- a/scripts/dtc/checks.c -+++ b/scripts/dtc/checks.c -@@ -482,6 +482,8 @@ static void fixup_phandle_references(str - struct node *node, struct property *prop) - { - struct marker *m = prop->val.markers; -+ struct fixup *f, **fp; -+ struct fixup_entry *fe, **fep; - struct node *refnode; - cell_t phandle; - -@@ -490,11 +492,70 @@ static void fixup_phandle_references(str - - refnode = get_node_by_ref(dt, m->ref); - if (! refnode) { -- FAIL(c, "Reference to non-existent node or label \"%s\"\n", -- m->ref); -+ if (!dt->is_plugin) { -+ FAIL(c, "Reference to non-existent node or label \"%s\"\n", -+ m->ref); -+ continue; -+ } -+ -+ /* allocate fixup entry */ -+ fe = xmalloc(sizeof(*fe)); -+ -+ fe->node = node; -+ fe->prop = prop; -+ fe->offset = m->offset; -+ fe->next = NULL; -+ -+ /* search for an already existing fixup */ -+ for_each_fixup(dt, f) -+ if (strcmp(f->ref, m->ref) == 0) -+ break; -+ -+ /* no fixup found, add new */ -+ if (f == NULL) { -+ f = xmalloc(sizeof(*f)); -+ f->ref = m->ref; -+ f->entries = NULL; -+ f->next = NULL; -+ -+ /* add it to the tree */ -+ fp = &dt->fixups; -+ while (*fp) -+ fp = &(*fp)->next; -+ *fp = f; -+ } -+ -+ /* and now append fixup entry */ -+ fep = &f->entries; -+ while (*fep) -+ fep = &(*fep)->next; -+ *fep = fe; -+ -+ /* mark the entry as unresolved */ -+ *((cell_t *)(prop->val.val + m->offset)) = -+ cpu_to_fdt32(0xdeadbeef); - continue; - } - -+ /* if it's a local reference, we need to record it */ -+ if (symbol_fixup_support && dt->is_plugin) { -+ -+ /* allocate a new local fixup entry */ -+ fe = xmalloc(sizeof(*fe)); -+ -+ fe->node = node; -+ fe->prop = prop; -+ fe->offset = m->offset; -+ fe->next = NULL; -+ fe->local_fixup_generated = false; -+ -+ /* append it to the local fixups */ -+ fep = &dt->local_fixups; -+ while (*fep) -+ fep = &(*fep)->next; -+ *fep = fe; -+ } -+ - phandle = get_node_phandle(dt, refnode); - *((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle); - } -@@ -676,6 +737,45 @@ static void check_obsolete_chosen_interr - } - TREE_WARNING(obsolete_chosen_interrupt_controller, NULL); - -+static void check_auto_label_phandles(struct check *c, struct node *dt, -+ struct node *node) -+{ -+ struct label *l; -+ struct symbol *s, **sp; -+ int has_label; -+ -+ if (!symbol_fixup_support) -+ return; -+ -+ has_label = 0; -+ for_each_label(node->labels, l) { -+ has_label = 1; -+ break; -+ } -+ -+ if (!has_label) -+ return; -+ -+ /* force allocation of a phandle for this node */ -+ (void)get_node_phandle(dt, node); -+ -+ /* add the symbol */ -+ for_each_label(node->labels, l) { -+ -+ s = xmalloc(sizeof(*s)); -+ s->label = l; -+ s->node = node; -+ s->next = NULL; -+ -+ /* add it to the symbols list */ -+ sp = &dt->symbols; -+ while (*sp) -+ sp = &((*sp)->next); -+ *sp = s; -+ } -+} -+NODE_WARNING(auto_label_phandles, NULL); -+ - static struct check *check_table[] = { - &duplicate_node_names, &duplicate_property_names, - &node_name_chars, &node_name_format, &property_name_chars, -@@ -696,6 +796,8 @@ static struct check *check_table[] = { - &avoid_default_addr_size, - &obsolete_chosen_interrupt_controller, - -+ &auto_label_phandles, -+ - &always_fail, - }; - ---- a/scripts/dtc/dtc-lexer.l -+++ b/scripts/dtc/dtc-lexer.l -@@ -121,6 +121,11 @@ static void lexical_error(const char *fm - return DT_V1; - } - -+<*>"/plugin/" { -+ DPRINT("Keyword: /plugin/\n"); -+ return DT_PLUGIN; -+ } -+ - <*>"/memreserve/" { - DPRINT("Keyword: /memreserve/\n"); - BEGIN_DEFAULT(); ---- a/scripts/dtc/dtc-lexer.lex.c_shipped -+++ b/scripts/dtc/dtc-lexer.lex.c_shipped -@@ -9,7 +9,7 @@ - #define FLEX_SCANNER - #define YY_FLEX_MAJOR_VERSION 2 - #define YY_FLEX_MINOR_VERSION 5 --#define YY_FLEX_SUBMINOR_VERSION 39 -+#define YY_FLEX_SUBMINOR_VERSION 35 - #if YY_FLEX_SUBMINOR_VERSION > 0 - #define FLEX_BETA - #endif -@@ -162,12 +162,7 @@ typedef unsigned int flex_uint32_t; - typedef struct yy_buffer_state *YY_BUFFER_STATE; - #endif - --#ifndef YY_TYPEDEF_YY_SIZE_T --#define YY_TYPEDEF_YY_SIZE_T --typedef size_t yy_size_t; --#endif -- --extern yy_size_t yyleng; -+extern int yyleng; - - extern FILE *yyin, *yyout; - -@@ -176,7 +171,6 @@ extern FILE *yyin, *yyout; - #define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) -- #define YY_LINENO_REWIND_TO(ptr) - - /* Return all but the first "n" matched characters back to the input stream. */ - #define yyless(n) \ -@@ -194,6 +188,11 @@ extern FILE *yyin, *yyout; - - #define unput(c) yyunput( c, (yytext_ptr) ) - -+#ifndef YY_TYPEDEF_YY_SIZE_T -+#define YY_TYPEDEF_YY_SIZE_T -+typedef size_t yy_size_t; -+#endif -+ - #ifndef YY_STRUCT_YY_BUFFER_STATE - #define YY_STRUCT_YY_BUFFER_STATE - struct yy_buffer_state -@@ -211,7 +210,7 @@ struct yy_buffer_state - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ -- yy_size_t yy_n_chars; -+ int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to -@@ -281,8 +280,8 @@ static YY_BUFFER_STATE * yy_buffer_stack - - /* yy_hold_char holds the character lost when yytext is formed. */ - static char yy_hold_char; --static yy_size_t yy_n_chars; /* number of characters read into yy_ch_buf */ --yy_size_t yyleng; -+static int yy_n_chars; /* number of characters read into yy_ch_buf */ -+int yyleng; - - /* Points to current character in buffer. */ - static char *yy_c_buf_p = (char *) 0; -@@ -310,7 +309,7 @@ static void yy_init_buffer (YY_BUFFER_ST - - YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); - YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); --YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,yy_size_t len ); -+YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); - - void *yyalloc (yy_size_t ); - void *yyrealloc (void *,yy_size_t ); -@@ -342,7 +341,7 @@ void yyfree (void * ); - - /* Begin user sect3 */ - --#define yywrap() 1 -+#define yywrap(n) 1 - #define YY_SKIP_YYWRAP - - typedef unsigned char YY_CHAR; -@@ -373,8 +372,8 @@ static void yy_fatal_error (yyconst char - *yy_cp = '\0'; \ - (yy_c_buf_p) = yy_cp; - --#define YY_NUM_RULES 30 --#define YY_END_OF_BUFFER 31 -+#define YY_NUM_RULES 31 -+#define YY_END_OF_BUFFER 32 - /* This struct is not used in this scanner, - but its presence is necessary. */ - struct yy_trans_info -@@ -382,25 +381,26 @@ struct yy_trans_info - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; --static yyconst flex_int16_t yy_accept[159] = -+static yyconst flex_int16_t yy_accept[166] = - { 0, -- 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, -- 18, 18, 29, 29, 29, 29, 29, 29, 29, 29, -- 29, 29, 29, 29, 29, 29, 15, 16, 16, 29, -- 16, 10, 10, 18, 26, 0, 3, 0, 27, 12, -- 0, 0, 11, 0, 0, 0, 0, 0, 0, 0, -- 21, 23, 25, 24, 22, 0, 9, 28, 0, 0, -- 0, 14, 14, 16, 16, 16, 10, 10, 10, 0, -- 12, 0, 11, 0, 0, 0, 20, 0, 0, 0, -- 0, 0, 0, 0, 0, 16, 10, 10, 10, 0, -- 13, 19, 0, 0, 0, 0, 0, 0, 0, 0, -- -- 0, 16, 0, 0, 0, 0, 0, 0, 0, 0, -- 0, 16, 6, 0, 0, 0, 0, 0, 0, 2, -- 0, 0, 0, 0, 0, 0, 0, 0, 4, 17, -- 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, -- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, -- 5, 8, 0, 0, 0, 0, 7, 0 -+ 0, 0, 0, 0, 0, 0, 0, 0, 32, 30, -+ 19, 19, 30, 30, 30, 30, 30, 30, 30, 30, -+ 30, 30, 30, 30, 30, 30, 16, 17, 17, 30, -+ 17, 11, 11, 19, 27, 0, 3, 0, 28, 13, -+ 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, -+ 0, 22, 24, 26, 25, 23, 0, 10, 29, 0, -+ 0, 0, 15, 15, 17, 17, 17, 11, 11, 11, -+ 0, 13, 0, 12, 0, 0, 0, 21, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 17, 11, 11, -+ 11, 0, 14, 20, 0, 0, 0, 0, 0, 0, -+ -+ 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 17, 7, 0, 0, 0, -+ 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 4, 18, 0, 0, 5, 2, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 1, 0, 0, 0, 0, 6, 9, 0, -+ 0, 0, 0, 8, 0 - } ; - - static yyconst flex_int32_t yy_ec[256] = -@@ -416,9 +416,9 @@ static yyconst flex_int32_t yy_ec[256] = - 22, 22, 22, 22, 24, 22, 22, 25, 22, 22, - 1, 26, 27, 1, 22, 1, 21, 28, 29, 30, - -- 31, 21, 22, 22, 32, 22, 22, 33, 34, 35, -- 36, 37, 22, 38, 39, 40, 41, 42, 22, 25, -- 43, 22, 44, 45, 46, 1, 1, 1, 1, 1, -+ 31, 21, 32, 22, 33, 22, 22, 34, 35, 36, -+ 37, 38, 22, 39, 40, 41, 42, 43, 22, 25, -+ 44, 22, 45, 46, 47, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -@@ -435,163 +435,165 @@ static yyconst flex_int32_t yy_ec[256] = - 1, 1, 1, 1, 1 - } ; - --static yyconst flex_int32_t yy_meta[47] = -+static yyconst flex_int32_t yy_meta[48] = - { 0, - 1, 1, 1, 1, 1, 1, 2, 3, 1, 2, - 2, 2, 4, 5, 5, 5, 6, 1, 1, 1, - 7, 8, 8, 8, 8, 1, 1, 7, 7, 7, - 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, -- 8, 8, 8, 3, 1, 4 -+ 8, 8, 8, 8, 3, 1, 4 - } ; - --static yyconst flex_int16_t yy_base[173] = -+static yyconst flex_int16_t yy_base[180] = - { 0, -- 0, 383, 34, 382, 65, 381, 37, 105, 387, 391, -- 54, 111, 367, 110, 109, 109, 112, 41, 366, 104, -- 367, 338, 124, 117, 0, 144, 391, 0, 121, 0, -- 135, 155, 140, 179, 391, 160, 391, 379, 391, 0, -- 368, 141, 391, 167, 370, 376, 346, 103, 342, 345, -- 391, 391, 391, 391, 391, 358, 391, 391, 175, 342, -- 338, 391, 355, 0, 185, 339, 184, 347, 346, 0, -- 0, 322, 175, 357, 175, 363, 352, 324, 330, 323, -- 332, 326, 201, 324, 329, 322, 391, 333, 181, 309, -- 391, 341, 340, 313, 320, 338, 178, 311, 146, 317, -- -- 314, 315, 335, 331, 303, 300, 309, 299, 308, 188, -- 336, 335, 391, 305, 320, 281, 283, 271, 203, 288, -- 281, 271, 266, 264, 245, 242, 208, 104, 391, 391, -- 244, 218, 204, 219, 206, 224, 201, 212, 204, 229, -- 215, 208, 207, 200, 219, 391, 233, 221, 200, 181, -- 391, 391, 149, 122, 86, 41, 391, 391, 245, 251, -- 259, 263, 267, 273, 280, 284, 292, 300, 304, 310, -- 318, 326 -+ 0, 393, 35, 392, 66, 391, 38, 107, 397, 401, -+ 55, 113, 377, 112, 111, 111, 114, 42, 376, 106, -+ 377, 347, 126, 120, 0, 147, 401, 0, 124, 0, -+ 137, 158, 170, 163, 401, 153, 401, 389, 401, 0, -+ 378, 120, 401, 131, 380, 386, 355, 139, 351, 355, -+ 351, 401, 401, 401, 401, 401, 367, 401, 401, 185, -+ 350, 346, 401, 364, 0, 185, 347, 189, 356, 355, -+ 0, 0, 330, 180, 366, 141, 372, 361, 332, 338, -+ 331, 341, 334, 326, 205, 331, 337, 329, 401, 341, -+ 167, 316, 401, 349, 348, 320, 328, 346, 180, 318, -+ -+ 324, 209, 324, 320, 322, 342, 338, 309, 306, 315, -+ 305, 315, 312, 192, 342, 341, 401, 293, 306, 282, -+ 268, 252, 255, 203, 285, 282, 272, 268, 252, 233, -+ 232, 239, 208, 107, 401, 401, 238, 211, 401, 211, -+ 212, 208, 228, 203, 215, 207, 233, 222, 212, 211, -+ 203, 227, 401, 237, 225, 204, 185, 401, 401, 149, -+ 128, 88, 42, 401, 401, 253, 259, 267, 271, 275, -+ 281, 288, 292, 300, 308, 312, 318, 326, 334 - } ; - --static yyconst flex_int16_t yy_def[173] = -+static yyconst flex_int16_t yy_def[180] = - { 0, -- 158, 1, 1, 3, 158, 5, 1, 1, 158, 158, -- 158, 158, 158, 159, 160, 161, 158, 158, 158, 158, -- 162, 158, 158, 158, 163, 162, 158, 164, 165, 164, -- 164, 158, 158, 158, 158, 159, 158, 159, 158, 166, -- 158, 161, 158, 161, 167, 168, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 162, 158, 158, 158, 158, -- 158, 158, 162, 164, 165, 164, 158, 158, 158, 169, -- 166, 170, 161, 167, 167, 168, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 164, 158, 158, 169, 170, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- -- 158, 164, 158, 158, 158, 158, 158, 158, 158, 171, -- 158, 164, 158, 158, 158, 158, 158, 158, 171, 158, -- 171, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 172, 158, 158, 158, 172, 158, 172, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 0, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158 -+ 165, 1, 1, 3, 165, 5, 1, 1, 165, 165, -+ 165, 165, 165, 166, 167, 168, 165, 165, 165, 165, -+ 169, 165, 165, 165, 170, 169, 165, 171, 172, 171, -+ 171, 165, 165, 165, 165, 166, 165, 166, 165, 173, -+ 165, 168, 165, 168, 174, 175, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 169, 165, 165, 165, -+ 165, 165, 165, 169, 171, 172, 171, 165, 165, 165, -+ 176, 173, 177, 168, 174, 174, 175, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 171, 165, 165, -+ 176, 177, 165, 165, 165, 165, 165, 165, 165, 165, -+ -+ 165, 165, 165, 165, 171, 165, 165, 165, 165, 165, -+ 165, 165, 165, 178, 165, 171, 165, 165, 165, 165, -+ 165, 165, 165, 178, 165, 178, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 179, 165, 165, -+ 165, 179, 165, 179, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 0, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165 - } ; - --static yyconst flex_int16_t yy_nxt[438] = -+static yyconst flex_int16_t yy_nxt[449] = - { 0, - 10, 11, 12, 11, 13, 14, 10, 15, 16, 10, - 10, 10, 17, 10, 10, 10, 10, 18, 19, 20, - 21, 21, 21, 21, 21, 10, 10, 21, 21, 21, - 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, -- 21, 21, 21, 10, 22, 10, 24, 25, 25, 25, -- 32, 33, 33, 157, 26, 34, 34, 34, 51, 52, -- 27, 26, 26, 26, 26, 10, 11, 12, 11, 13, -- 14, 28, 15, 16, 28, 28, 28, 24, 28, 28, -- 28, 10, 18, 19, 20, 29, 29, 29, 29, 29, -- 30, 10, 29, 29, 29, 29, 29, 29, 29, 29, -- -- 29, 29, 29, 29, 29, 29, 29, 29, 10, 22, -- 10, 23, 34, 34, 34, 37, 39, 43, 32, 33, -- 33, 45, 54, 55, 46, 59, 45, 64, 156, 46, -- 64, 64, 64, 79, 44, 38, 59, 57, 134, 47, -- 135, 48, 80, 49, 47, 50, 48, 99, 61, 43, -- 50, 110, 41, 67, 67, 67, 60, 63, 63, 63, -- 57, 155, 68, 69, 63, 37, 44, 66, 67, 67, -- 67, 63, 63, 63, 63, 73, 59, 68, 69, 70, -- 34, 34, 34, 43, 75, 38, 154, 92, 83, 83, -- 83, 64, 44, 120, 64, 64, 64, 67, 67, 67, -- -- 44, 57, 99, 68, 69, 107, 68, 69, 120, 127, -- 108, 153, 152, 121, 83, 83, 83, 133, 133, 133, -- 146, 133, 133, 133, 146, 140, 140, 140, 121, 141, -- 140, 140, 140, 151, 141, 158, 150, 149, 148, 144, -- 147, 143, 142, 139, 147, 36, 36, 36, 36, 36, -- 36, 36, 36, 40, 138, 137, 136, 40, 40, 42, -- 42, 42, 42, 42, 42, 42, 42, 56, 56, 56, -- 56, 62, 132, 62, 64, 131, 130, 64, 129, 64, -- 64, 65, 128, 158, 65, 65, 65, 65, 71, 127, -- 71, 71, 74, 74, 74, 74, 74, 74, 74, 74, -- -- 76, 76, 76, 76, 76, 76, 76, 76, 89, 126, -- 89, 90, 125, 90, 90, 124, 90, 90, 119, 119, -- 119, 119, 119, 119, 119, 119, 145, 145, 145, 145, -- 145, 145, 145, 145, 123, 122, 59, 59, 118, 117, -- 116, 115, 114, 113, 45, 112, 108, 111, 109, 106, -- 105, 104, 46, 103, 91, 87, 102, 101, 100, 98, -- 97, 96, 95, 94, 93, 77, 75, 91, 88, 87, -- 86, 57, 85, 84, 57, 82, 81, 78, 77, 75, -- 72, 158, 58, 57, 53, 35, 158, 31, 23, 23, -- 9, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158 -+ 21, 21, 21, 21, 10, 22, 10, 24, 25, 25, -+ 25, 32, 33, 33, 164, 26, 34, 34, 34, 52, -+ 53, 27, 26, 26, 26, 26, 10, 11, 12, 11, -+ 13, 14, 28, 15, 16, 28, 28, 28, 24, 28, -+ 28, 28, 10, 18, 19, 20, 29, 29, 29, 29, -+ 29, 30, 10, 29, 29, 29, 29, 29, 29, 29, -+ -+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, -+ 10, 22, 10, 23, 34, 34, 34, 37, 39, 43, -+ 32, 33, 33, 45, 55, 56, 46, 60, 43, 45, -+ 65, 163, 46, 65, 65, 65, 44, 38, 60, 74, -+ 58, 47, 141, 48, 142, 44, 49, 47, 50, 48, -+ 76, 51, 62, 94, 50, 41, 44, 51, 37, 61, -+ 64, 64, 64, 58, 34, 34, 34, 64, 162, 80, -+ 67, 68, 68, 68, 64, 64, 64, 64, 38, 81, -+ 69, 70, 71, 68, 68, 68, 60, 161, 43, 69, -+ 70, 65, 69, 70, 65, 65, 65, 125, 85, 85, -+ -+ 85, 58, 68, 68, 68, 44, 102, 110, 125, 133, -+ 102, 69, 70, 111, 114, 160, 159, 126, 85, 85, -+ 85, 140, 140, 140, 140, 140, 140, 153, 126, 147, -+ 147, 147, 153, 148, 147, 147, 147, 158, 148, 165, -+ 157, 156, 155, 151, 150, 149, 146, 154, 145, 144, -+ 143, 139, 154, 36, 36, 36, 36, 36, 36, 36, -+ 36, 40, 138, 137, 136, 40, 40, 42, 42, 42, -+ 42, 42, 42, 42, 42, 57, 57, 57, 57, 63, -+ 135, 63, 65, 134, 165, 65, 133, 65, 65, 66, -+ 132, 131, 66, 66, 66, 66, 72, 130, 72, 72, -+ -+ 75, 75, 75, 75, 75, 75, 75, 75, 77, 77, -+ 77, 77, 77, 77, 77, 77, 91, 129, 91, 92, -+ 128, 92, 92, 127, 92, 92, 124, 124, 124, 124, -+ 124, 124, 124, 124, 152, 152, 152, 152, 152, 152, -+ 152, 152, 60, 60, 123, 122, 121, 120, 119, 118, -+ 117, 45, 116, 111, 115, 113, 112, 109, 108, 107, -+ 46, 106, 93, 89, 105, 104, 103, 101, 100, 99, -+ 98, 97, 96, 95, 78, 76, 93, 90, 89, 88, -+ 58, 87, 86, 58, 84, 83, 82, 79, 78, 76, -+ 73, 165, 59, 58, 54, 35, 165, 31, 23, 23, -+ -+ 9, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165 - } ; - --static yyconst flex_int16_t yy_chk[438] = -+static yyconst flex_int16_t yy_chk[449] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -- 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, -- 7, 7, 7, 156, 3, 11, 11, 11, 18, 18, -- 3, 3, 3, 3, 3, 5, 5, 5, 5, 5, -+ 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, -+ 3, 7, 7, 7, 163, 3, 11, 11, 11, 18, -+ 18, 3, 3, 3, 3, 3, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, -- 5, 8, 12, 12, 12, 14, 15, 16, 8, 8, -- 8, 17, 20, 20, 17, 23, 24, 29, 155, 24, -- 29, 29, 29, 48, 16, 14, 31, 29, 128, 17, -- 128, 17, 48, 17, 24, 17, 24, 99, 24, 42, -- 24, 99, 15, 33, 33, 33, 23, 26, 26, 26, -- 26, 154, 33, 33, 26, 36, 42, 31, 32, 32, -- 32, 26, 26, 26, 26, 44, 59, 32, 32, 32, -- 34, 34, 34, 73, 75, 36, 153, 75, 59, 59, -- 59, 65, 44, 110, 65, 65, 65, 67, 67, 67, -- -- 73, 65, 83, 89, 89, 97, 67, 67, 119, 127, -- 97, 150, 149, 110, 83, 83, 83, 133, 133, 133, -- 141, 127, 127, 127, 145, 136, 136, 136, 119, 136, -- 140, 140, 140, 148, 140, 147, 144, 143, 142, 139, -- 141, 138, 137, 135, 145, 159, 159, 159, 159, 159, -- 159, 159, 159, 160, 134, 132, 131, 160, 160, 161, -- 161, 161, 161, 161, 161, 161, 161, 162, 162, 162, -- 162, 163, 126, 163, 164, 125, 124, 164, 123, 164, -- 164, 165, 122, 121, 165, 165, 165, 165, 166, 120, -- 166, 166, 167, 167, 167, 167, 167, 167, 167, 167, -- -- 168, 168, 168, 168, 168, 168, 168, 168, 169, 118, -- 169, 170, 117, 170, 170, 116, 170, 170, 171, 171, -- 171, 171, 171, 171, 171, 171, 172, 172, 172, 172, -- 172, 172, 172, 172, 115, 114, 112, 111, 109, 108, -- 107, 106, 105, 104, 103, 102, 101, 100, 98, 96, -- 95, 94, 93, 92, 90, 88, 86, 85, 84, 82, -- 81, 80, 79, 78, 77, 76, 74, 72, 69, 68, -- 66, 63, 61, 60, 56, 50, 49, 47, 46, 45, -+ 5, 5, 5, 8, 12, 12, 12, 14, 15, 16, -+ 8, 8, 8, 17, 20, 20, 17, 23, 42, 24, -+ 29, 162, 24, 29, 29, 29, 16, 14, 31, 44, -+ 29, 17, 134, 17, 134, 42, 17, 24, 17, 24, -+ 76, 17, 24, 76, 24, 15, 44, 24, 36, 23, -+ 26, 26, 26, 26, 34, 34, 34, 26, 161, 48, -+ 31, 32, 32, 32, 26, 26, 26, 26, 36, 48, -+ 32, 32, 32, 33, 33, 33, 60, 160, 74, 91, -+ 91, 66, 33, 33, 66, 66, 66, 114, 60, 60, -+ -+ 60, 66, 68, 68, 68, 74, 85, 99, 124, 133, -+ 102, 68, 68, 99, 102, 157, 156, 114, 85, 85, -+ 85, 133, 133, 133, 140, 140, 140, 148, 124, 143, -+ 143, 143, 152, 143, 147, 147, 147, 155, 147, 154, -+ 151, 150, 149, 146, 145, 144, 142, 148, 141, 138, -+ 137, 132, 152, 166, 166, 166, 166, 166, 166, 166, -+ 166, 167, 131, 130, 129, 167, 167, 168, 168, 168, -+ 168, 168, 168, 168, 168, 169, 169, 169, 169, 170, -+ 128, 170, 171, 127, 126, 171, 125, 171, 171, 172, -+ 123, 122, 172, 172, 172, 172, 173, 121, 173, 173, -+ -+ 174, 174, 174, 174, 174, 174, 174, 174, 175, 175, -+ 175, 175, 175, 175, 175, 175, 176, 120, 176, 177, -+ 119, 177, 177, 118, 177, 177, 178, 178, 178, 178, -+ 178, 178, 178, 178, 179, 179, 179, 179, 179, 179, -+ 179, 179, 116, 115, 113, 112, 111, 110, 109, 108, -+ 107, 106, 105, 104, 103, 101, 100, 98, 97, 96, -+ 95, 94, 92, 90, 88, 87, 86, 84, 83, 82, -+ 81, 80, 79, 78, 77, 75, 73, 70, 69, 67, -+ 64, 62, 61, 57, 51, 50, 49, 47, 46, 45, - 41, 38, 22, 21, 19, 13, 9, 6, 4, 2, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, - -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158, 158, 158, 158, -- 158, 158, 158, 158, 158, 158, 158 -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, -+ 165, 165, 165, 165, 165, 165, 165, 165 - } ; - - static yy_state_type yy_last_accepting_state; -@@ -662,7 +664,7 @@ static int dts_version = 1; - static void push_input_file(const char *filename); - static bool pop_input_file(void); - static void lexical_error(const char *fmt, ...); --#line 666 "dtc-lexer.lex.c" -+#line 668 "dtc-lexer.lex.c" - - #define INITIAL 0 - #define BYTESTRING 1 -@@ -704,7 +706,7 @@ FILE *yyget_out (void ); - - void yyset_out (FILE * out_str ); - --yy_size_t yyget_leng (void ); -+int yyget_leng (void ); - - char *yyget_text (void ); - -@@ -853,6 +855,10 @@ YY_DECL - register char *yy_cp, *yy_bp; - register int yy_act; - -+#line 68 "dtc-lexer.l" -+ -+#line 861 "dtc-lexer.lex.c" -+ - if ( !(yy_init) ) - { - (yy_init) = 1; -@@ -879,11 +885,6 @@ YY_DECL - yy_load_buffer_state( ); - } - -- { --#line 68 "dtc-lexer.l" -- --#line 886 "dtc-lexer.lex.c" -- - while ( 1 ) /* loops until end-of-file is reached */ - { - yy_cp = (yy_c_buf_p); -@@ -901,7 +902,7 @@ YY_DECL - yy_match: - do - { -- register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)] ; -+ register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; -@@ -910,13 +911,13 @@ yy_match: - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; -- if ( yy_current_state >= 159 ) -+ if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; - ++yy_cp; - } -- while ( yy_current_state != 158 ); -+ while ( yy_current_state != 165 ); - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - -@@ -951,39 +952,31 @@ case 2: - YY_RULE_SETUP - #line 75 "dtc-lexer.l" - { -- char *line, *fnstart, *fnend; -- struct data fn; -+ char *line, *tmp, *fn; - /* skip text before line # */ - line = yytext; - while (!isdigit((unsigned char)*line)) - line++; -- -- /* regexp ensures that first and list " -- * in the whole yytext are those at -- * beginning and end of the filename string */ -- fnstart = memchr(yytext, '"', yyleng); -- for (fnend = yytext + yyleng - 1; -- *fnend != '"'; fnend--) -- ; -- assert(fnstart && fnend && (fnend > fnstart)); -- -- fn = data_copy_escape_string(fnstart + 1, -- fnend - fnstart - 1); -- -- /* Don't allow nuls in filenames */ -- if (memchr(fn.val, '\0', fn.len - 1)) -- lexical_error("nul in line number directive"); -- -+ /* skip digits in line # */ -+ tmp = line; -+ while (!isspace((unsigned char)*tmp)) -+ tmp++; -+ /* "NULL"-terminate line # */ -+ *tmp = '\0'; -+ /* start of filename */ -+ fn = strchr(tmp + 1, '"') + 1; -+ /* strip trailing " from filename */ -+ tmp = strchr(fn, '"'); -+ *tmp = 0; - /* -1 since #line is the number of the next line */ -- srcpos_set_line(xstrdup(fn.val), atoi(line) - 1); -- data_free(fn); -+ srcpos_set_line(xstrdup(fn), atoi(line) - 1); - } - YY_BREAK - case YY_STATE_EOF(INITIAL): - case YY_STATE_EOF(BYTESTRING): - case YY_STATE_EOF(PROPNODENAME): - case YY_STATE_EOF(V1): --#line 104 "dtc-lexer.l" -+#line 96 "dtc-lexer.l" - { - if (!pop_input_file()) { - yyterminate(); -@@ -993,7 +986,7 @@ case YY_STATE_EOF(V1): - case 3: - /* rule 3 can match eol */ - YY_RULE_SETUP --#line 110 "dtc-lexer.l" -+#line 102 "dtc-lexer.l" - { - DPRINT("String: %s\n", yytext); - yylval.data = data_copy_escape_string(yytext+1, -@@ -1003,7 +996,7 @@ YY_RULE_SETUP - YY_BREAK - case 4: - YY_RULE_SETUP --#line 117 "dtc-lexer.l" -+#line 109 "dtc-lexer.l" - { - DPRINT("Keyword: /dts-v1/\n"); - dts_version = 1; -@@ -1013,25 +1006,33 @@ YY_RULE_SETUP - YY_BREAK - case 5: - YY_RULE_SETUP --#line 124 "dtc-lexer.l" -+#line 116 "dtc-lexer.l" -+{ -+ DPRINT("Keyword: /plugin/\n"); -+ return DT_PLUGIN; -+ } -+ YY_BREAK -+case 6: -+YY_RULE_SETUP -+#line 121 "dtc-lexer.l" - { - DPRINT("Keyword: /memreserve/\n"); - BEGIN_DEFAULT(); - return DT_MEMRESERVE; - } - YY_BREAK --case 6: -+case 7: - YY_RULE_SETUP --#line 130 "dtc-lexer.l" -+#line 127 "dtc-lexer.l" - { - DPRINT("Keyword: /bits/\n"); - BEGIN_DEFAULT(); - return DT_BITS; - } - YY_BREAK --case 7: -+case 8: - YY_RULE_SETUP --#line 136 "dtc-lexer.l" -+#line 133 "dtc-lexer.l" - { - DPRINT("Keyword: /delete-property/\n"); - DPRINT("\n"); -@@ -1039,9 +1040,9 @@ YY_RULE_SETUP - return DT_DEL_PROP; - } - YY_BREAK --case 8: -+case 9: - YY_RULE_SETUP --#line 143 "dtc-lexer.l" -+#line 140 "dtc-lexer.l" - { - DPRINT("Keyword: /delete-node/\n"); - DPRINT("\n"); -@@ -1049,9 +1050,9 @@ YY_RULE_SETUP - return DT_DEL_NODE; - } - YY_BREAK --case 9: -+case 10: - YY_RULE_SETUP --#line 150 "dtc-lexer.l" -+#line 147 "dtc-lexer.l" - { - DPRINT("Label: %s\n", yytext); - yylval.labelref = xstrdup(yytext); -@@ -1059,9 +1060,9 @@ YY_RULE_SETUP - return DT_LABEL; - } - YY_BREAK --case 10: -+case 11: - YY_RULE_SETUP --#line 157 "dtc-lexer.l" -+#line 154 "dtc-lexer.l" - { - char *e; - DPRINT("Integer Literal: '%s'\n", yytext); -@@ -1069,10 +1070,7 @@ YY_RULE_SETUP - errno = 0; - yylval.integer = strtoull(yytext, &e, 0); - -- if (*e && e[strspn(e, "UL")]) { -- lexical_error("Bad integer literal '%s'", -- yytext); -- } -+ assert(!(*e) || !e[strspn(e, "UL")]); - - if (errno == ERANGE) - lexical_error("Integer literal '%s' out of range", -@@ -1084,10 +1082,10 @@ YY_RULE_SETUP - return DT_LITERAL; - } - YY_BREAK --case 11: --/* rule 11 can match eol */ -+case 12: -+/* rule 12 can match eol */ - YY_RULE_SETUP --#line 179 "dtc-lexer.l" -+#line 173 "dtc-lexer.l" - { - struct data d; - DPRINT("Character literal: %s\n", yytext); -@@ -1109,18 +1107,18 @@ YY_RULE_SETUP - return DT_CHAR_LITERAL; - } - YY_BREAK --case 12: -+case 13: - YY_RULE_SETUP --#line 200 "dtc-lexer.l" -+#line 194 "dtc-lexer.l" - { /* label reference */ - DPRINT("Ref: %s\n", yytext+1); - yylval.labelref = xstrdup(yytext+1); - return DT_REF; - } - YY_BREAK --case 13: -+case 14: - YY_RULE_SETUP --#line 206 "dtc-lexer.l" -+#line 200 "dtc-lexer.l" - { /* new-style path reference */ - yytext[yyleng-1] = '\0'; - DPRINT("Ref: %s\n", yytext+2); -@@ -1128,27 +1126,27 @@ YY_RULE_SETUP - return DT_REF; - } - YY_BREAK --case 14: -+case 15: - YY_RULE_SETUP --#line 213 "dtc-lexer.l" -+#line 207 "dtc-lexer.l" - { - yylval.byte = strtol(yytext, NULL, 16); - DPRINT("Byte: %02x\n", (int)yylval.byte); - return DT_BYTE; - } - YY_BREAK --case 15: -+case 16: - YY_RULE_SETUP --#line 219 "dtc-lexer.l" -+#line 213 "dtc-lexer.l" - { - DPRINT("/BYTESTRING\n"); - BEGIN_DEFAULT(); - return ']'; - } - YY_BREAK --case 16: -+case 17: - YY_RULE_SETUP --#line 225 "dtc-lexer.l" -+#line 219 "dtc-lexer.l" - { - DPRINT("PropNodeName: %s\n", yytext); - yylval.propnodename = xstrdup((yytext[0] == '\\') ? -@@ -1157,75 +1155,75 @@ YY_RULE_SETUP - return DT_PROPNODENAME; - } - YY_BREAK --case 17: -+case 18: - YY_RULE_SETUP --#line 233 "dtc-lexer.l" -+#line 227 "dtc-lexer.l" - { - DPRINT("Binary Include\n"); - return DT_INCBIN; - } - YY_BREAK --case 18: --/* rule 18 can match eol */ --YY_RULE_SETUP --#line 238 "dtc-lexer.l" --/* eat whitespace */ -- YY_BREAK - case 19: - /* rule 19 can match eol */ - YY_RULE_SETUP --#line 239 "dtc-lexer.l" --/* eat C-style comments */ -+#line 232 "dtc-lexer.l" -+/* eat whitespace */ - YY_BREAK - case 20: - /* rule 20 can match eol */ - YY_RULE_SETUP --#line 240 "dtc-lexer.l" --/* eat C++-style comments */ -+#line 233 "dtc-lexer.l" -+/* eat C-style comments */ - YY_BREAK - case 21: -+/* rule 21 can match eol */ - YY_RULE_SETUP --#line 242 "dtc-lexer.l" --{ return DT_LSHIFT; }; -+#line 234 "dtc-lexer.l" -+/* eat C++-style comments */ - YY_BREAK - case 22: - YY_RULE_SETUP --#line 243 "dtc-lexer.l" --{ return DT_RSHIFT; }; -+#line 236 "dtc-lexer.l" -+{ return DT_LSHIFT; }; - YY_BREAK - case 23: - YY_RULE_SETUP --#line 244 "dtc-lexer.l" --{ return DT_LE; }; -+#line 237 "dtc-lexer.l" -+{ return DT_RSHIFT; }; - YY_BREAK - case 24: - YY_RULE_SETUP --#line 245 "dtc-lexer.l" --{ return DT_GE; }; -+#line 238 "dtc-lexer.l" -+{ return DT_LE; }; - YY_BREAK - case 25: - YY_RULE_SETUP --#line 246 "dtc-lexer.l" --{ return DT_EQ; }; -+#line 239 "dtc-lexer.l" -+{ return DT_GE; }; - YY_BREAK - case 26: - YY_RULE_SETUP --#line 247 "dtc-lexer.l" --{ return DT_NE; }; -+#line 240 "dtc-lexer.l" -+{ return DT_EQ; }; - YY_BREAK - case 27: - YY_RULE_SETUP --#line 248 "dtc-lexer.l" --{ return DT_AND; }; -+#line 241 "dtc-lexer.l" -+{ return DT_NE; }; - YY_BREAK - case 28: - YY_RULE_SETUP --#line 249 "dtc-lexer.l" --{ return DT_OR; }; -+#line 242 "dtc-lexer.l" -+{ return DT_AND; }; - YY_BREAK - case 29: - YY_RULE_SETUP --#line 251 "dtc-lexer.l" -+#line 243 "dtc-lexer.l" -+{ return DT_OR; }; -+ YY_BREAK -+case 30: -+YY_RULE_SETUP -+#line 245 "dtc-lexer.l" - { - DPRINT("Char: %c (\\x%02x)\n", yytext[0], - (unsigned)yytext[0]); -@@ -1241,12 +1239,12 @@ YY_RULE_SETUP - return yytext[0]; - } - YY_BREAK --case 30: -+case 31: - YY_RULE_SETUP --#line 266 "dtc-lexer.l" -+#line 260 "dtc-lexer.l" - ECHO; - YY_BREAK --#line 1250 "dtc-lexer.lex.c" -+#line 1248 "dtc-lexer.lex.c" - - case YY_END_OF_BUFFER: - { -@@ -1376,7 +1374,6 @@ ECHO; - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ -- } /* end of user's declarations */ - } /* end of yylex */ - - /* yy_get_next_buffer - try to read in a new buffer -@@ -1432,21 +1429,21 @@ static int yy_get_next_buffer (void) - - else - { -- yy_size_t num_to_read = -+ int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ -- YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE; -+ YY_BUFFER_STATE b = YY_CURRENT_BUFFER; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { -- yy_size_t new_size = b->yy_buf_size * 2; -+ int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; -@@ -1477,7 +1474,7 @@ static int yy_get_next_buffer (void) - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), -- (yy_n_chars), num_to_read ); -+ (yy_n_chars), (size_t) num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } -@@ -1539,7 +1536,7 @@ static int yy_get_next_buffer (void) - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; -- if ( yy_current_state >= 159 ) -+ if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; -@@ -1567,13 +1564,13 @@ static int yy_get_next_buffer (void) - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; -- if ( yy_current_state >= 159 ) -+ if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; -- yy_is_jam = (yy_current_state == 158); -+ yy_is_jam = (yy_current_state == 165); - -- return yy_is_jam ? 0 : yy_current_state; -+ return yy_is_jam ? 0 : yy_current_state; - } - - #ifndef YY_NO_INPUT -@@ -1600,7 +1597,7 @@ static int yy_get_next_buffer (void) - - else - { /* need more input */ -- yy_size_t offset = (yy_c_buf_p) - (yytext_ptr); -+ int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) -@@ -1874,7 +1871,7 @@ void yypop_buffer_state (void) - */ - static void yyensure_buffer_stack (void) - { -- yy_size_t num_to_alloc; -+ int num_to_alloc; - - if (!(yy_buffer_stack)) { - -@@ -1971,12 +1968,12 @@ YY_BUFFER_STATE yy_scan_string (yyconst - * - * @return the newly allocated buffer state object. - */ --YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, yy_size_t _yybytes_len ) -+YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) - { - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; -- yy_size_t i; -+ int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = _yybytes_len + 2; -@@ -2058,7 +2055,7 @@ FILE *yyget_out (void) - /** Get the length of the current token. - * - */ --yy_size_t yyget_leng (void) -+int yyget_leng (void) - { - return yyleng; - } -@@ -2206,7 +2203,7 @@ void yyfree (void * ptr ) - - #define YYTABLES_NAME "yytables" - --#line 265 "dtc-lexer.l" -+#line 260 "dtc-lexer.l" - - - ---- a/scripts/dtc/dtc-parser.tab.c_shipped -+++ b/scripts/dtc/dtc-parser.tab.c_shipped -@@ -65,6 +65,7 @@ - #line 20 "dtc-parser.y" /* yacc.c:339 */ - - #include -+#include - - #include "dtc.h" - #include "srcpos.h" -@@ -80,7 +81,7 @@ extern void yyerror(char const *s); - extern struct boot_info *the_boot_info; - extern bool treesource_error; - --#line 84 "dtc-parser.tab.c" /* yacc.c:339 */ -+#line 85 "dtc-parser.tab.c" /* yacc.c:339 */ - - # ifndef YY_NULLPTR - # if defined __cplusplus && 201103L <= __cplusplus -@@ -116,26 +117,27 @@ extern int yydebug; - enum yytokentype - { - DT_V1 = 258, -- DT_MEMRESERVE = 259, -- DT_LSHIFT = 260, -- DT_RSHIFT = 261, -- DT_LE = 262, -- DT_GE = 263, -- DT_EQ = 264, -- DT_NE = 265, -- DT_AND = 266, -- DT_OR = 267, -- DT_BITS = 268, -- DT_DEL_PROP = 269, -- DT_DEL_NODE = 270, -- DT_PROPNODENAME = 271, -- DT_LITERAL = 272, -- DT_CHAR_LITERAL = 273, -- DT_BYTE = 274, -- DT_STRING = 275, -- DT_LABEL = 276, -- DT_REF = 277, -- DT_INCBIN = 278 -+ DT_PLUGIN = 259, -+ DT_MEMRESERVE = 260, -+ DT_LSHIFT = 261, -+ DT_RSHIFT = 262, -+ DT_LE = 263, -+ DT_GE = 264, -+ DT_EQ = 265, -+ DT_NE = 266, -+ DT_AND = 267, -+ DT_OR = 268, -+ DT_BITS = 269, -+ DT_DEL_PROP = 270, -+ DT_DEL_NODE = 271, -+ DT_PROPNODENAME = 272, -+ DT_LITERAL = 273, -+ DT_CHAR_LITERAL = 274, -+ DT_BYTE = 275, -+ DT_STRING = 276, -+ DT_LABEL = 277, -+ DT_REF = 278, -+ DT_INCBIN = 279 - }; - #endif - -@@ -144,7 +146,7 @@ extern int yydebug; - typedef union YYSTYPE YYSTYPE; - union YYSTYPE - { --#line 38 "dtc-parser.y" /* yacc.c:355 */ -+#line 39 "dtc-parser.y" /* yacc.c:355 */ - - char *propnodename; - char *labelref; -@@ -162,8 +164,9 @@ union YYSTYPE - struct node *nodelist; - struct reserve_info *re; - uint64_t integer; -+ bool is_plugin; - --#line 167 "dtc-parser.tab.c" /* yacc.c:355 */ -+#line 170 "dtc-parser.tab.c" /* yacc.c:355 */ - }; - # define YYSTYPE_IS_TRIVIAL 1 - # define YYSTYPE_IS_DECLARED 1 -@@ -192,7 +195,7 @@ int yyparse (void); - - /* Copy the second part of user declarations. */ - --#line 196 "dtc-parser.tab.c" /* yacc.c:358 */ -+#line 199 "dtc-parser.tab.c" /* yacc.c:358 */ - - #ifdef short - # undef short -@@ -439,18 +442,18 @@ union yyalloc - #define YYLAST 136 - - /* YYNTOKENS -- Number of terminals. */ --#define YYNTOKENS 47 -+#define YYNTOKENS 48 - /* YYNNTS -- Number of nonterminals. */ --#define YYNNTS 28 -+#define YYNNTS 29 - /* YYNRULES -- Number of rules. */ --#define YYNRULES 80 -+#define YYNRULES 82 - /* YYNSTATES -- Number of states. */ --#define YYNSTATES 144 -+#define YYNSTATES 147 - - /* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned - by yylex, with out-of-bounds checking. */ - #define YYUNDEFTOK 2 --#define YYMAXUTOK 278 -+#define YYMAXUTOK 279 - - #define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) -@@ -462,16 +465,16 @@ static const yytype_uint8 yytranslate[] - 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -- 2, 2, 2, 46, 2, 2, 2, 44, 40, 2, -- 32, 34, 43, 41, 33, 42, 2, 25, 2, 2, -- 2, 2, 2, 2, 2, 2, 2, 2, 37, 24, -- 35, 28, 29, 36, 2, 2, 2, 2, 2, 2, -+ 2, 2, 2, 47, 2, 2, 2, 45, 41, 2, -+ 33, 35, 44, 42, 34, 43, 2, 26, 2, 2, -+ 2, 2, 2, 2, 2, 2, 2, 2, 38, 25, -+ 36, 29, 30, 37, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -- 2, 30, 2, 31, 39, 2, 2, 2, 2, 2, -+ 2, 31, 2, 32, 40, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -- 2, 2, 2, 26, 38, 27, 45, 2, 2, 2, -+ 2, 2, 2, 27, 39, 28, 46, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, -@@ -486,22 +489,22 @@ static const yytype_uint8 yytranslate[] - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, -- 15, 16, 17, 18, 19, 20, 21, 22, 23 -+ 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 - }; - - #if YYDEBUG - /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ - static const yytype_uint16 yyrline[] = - { -- 0, 104, 104, 113, 116, 123, 127, 135, 139, 144, -- 155, 165, 180, 188, 191, 198, 202, 206, 210, 218, -- 222, 226, 230, 234, 250, 260, 268, 271, 275, 282, -- 298, 303, 322, 336, 343, 344, 345, 352, 356, 357, -- 361, 362, 366, 367, 371, 372, 376, 377, 381, 382, -- 386, 387, 388, 392, 393, 394, 395, 396, 400, 401, -- 402, 406, 407, 408, 412, 413, 422, 431, 435, 436, -- 437, 438, 443, 446, 450, 458, 461, 465, 473, 477, -- 481 -+ 0, 108, 108, 118, 121, 129, 132, 139, 143, 151, -+ 155, 160, 171, 181, 196, 204, 207, 214, 218, 222, -+ 226, 234, 238, 242, 246, 250, 266, 276, 284, 287, -+ 291, 298, 314, 319, 338, 352, 359, 360, 361, 368, -+ 372, 373, 377, 378, 382, 383, 387, 388, 392, 393, -+ 397, 398, 402, 403, 404, 408, 409, 410, 411, 412, -+ 416, 417, 418, 422, 423, 424, 428, 429, 430, 431, -+ 435, 436, 437, 438, 443, 446, 450, 458, 461, 465, -+ 473, 477, 481 - }; - #endif - -@@ -510,19 +513,19 @@ static const yytype_uint16 yyrline[] = - First, the terminals, then, starting at YYNTOKENS, nonterminals. */ - static const char *const yytname[] = - { -- "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE", "DT_LSHIFT", -- "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND", "DT_OR", -- "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME", "DT_LITERAL", -- "DT_CHAR_LITERAL", "DT_BYTE", "DT_STRING", "DT_LABEL", "DT_REF", -- "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['", "']'", -- "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'", "'+'", -- "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile", -- "memreserves", "memreserve", "devicetree", "nodedef", "proplist", -- "propdef", "propdata", "propdataprefix", "arrayprefix", "integer_prim", -- "integer_expr", "integer_trinary", "integer_or", "integer_and", -- "integer_bitor", "integer_bitxor", "integer_bitand", "integer_eq", -- "integer_rela", "integer_shift", "integer_add", "integer_mul", -- "integer_unary", "bytestring", "subnodes", "subnode", YY_NULLPTR -+ "$end", "error", "$undefined", "DT_V1", "DT_PLUGIN", "DT_MEMRESERVE", -+ "DT_LSHIFT", "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND", -+ "DT_OR", "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME", -+ "DT_LITERAL", "DT_CHAR_LITERAL", "DT_BYTE", "DT_STRING", "DT_LABEL", -+ "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['", -+ "']'", "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'", -+ "'+'", "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile", -+ "plugindecl", "memreserves", "memreserve", "devicetree", "nodedef", -+ "proplist", "propdef", "propdata", "propdataprefix", "arrayprefix", -+ "integer_prim", "integer_expr", "integer_trinary", "integer_or", -+ "integer_and", "integer_bitor", "integer_bitxor", "integer_bitand", -+ "integer_eq", "integer_rela", "integer_shift", "integer_add", -+ "integer_mul", "integer_unary", "bytestring", "subnodes", "subnode", YY_NULLPTR - }; - #endif - -@@ -533,16 +536,16 @@ static const yytype_uint16 yytoknum[] = - { - 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, - 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, -- 275, 276, 277, 278, 59, 47, 123, 125, 61, 62, -- 91, 93, 40, 44, 41, 60, 63, 58, 124, 94, -- 38, 43, 45, 42, 37, 126, 33 -+ 275, 276, 277, 278, 279, 59, 47, 123, 125, 61, -+ 62, 91, 93, 40, 44, 41, 60, 63, 58, 124, -+ 94, 38, 43, 45, 42, 37, 126, 33 - }; - # endif - --#define YYPACT_NINF -81 -+#define YYPACT_NINF -84 - - #define yypact_value_is_default(Yystate) \ -- (!!((Yystate) == (-81))) -+ (!!((Yystate) == (-84))) - - #define YYTABLE_NINF -1 - -@@ -553,21 +556,21 @@ static const yytype_uint16 yytoknum[] = - STATE-NUM. */ - static const yytype_int8 yypact[] = - { -- 16, -11, 21, 10, -81, 25, 10, 19, 10, -81, -- -81, -9, 25, -81, 2, 51, -81, -9, -9, -9, -- -81, 1, -81, -6, 50, 14, 28, 29, 36, 3, -- 58, 44, -3, -81, 47, -81, -81, 65, 68, 2, -- 2, -81, -81, -81, -81, -9, -9, -9, -9, -9, -- -9, -9, -9, -9, -9, -9, -9, -9, -9, -9, -- -9, -9, -9, -9, -81, 63, 69, 2, -81, -81, -- 50, 57, 14, 28, 29, 36, 3, 3, 58, 58, -- 58, 58, 44, 44, -3, -3, -81, -81, -81, 79, -- 80, -8, 63, -81, 72, 63, -81, -81, -9, 76, -- 77, -81, -81, -81, -81, -81, 78, -81, -81, -81, -- -81, -81, 35, 4, -81, -81, -81, -81, 86, -81, -- -81, -81, 73, -81, -81, 33, 71, 84, 39, -81, -- -81, -81, -81, -81, 41, -81, -81, -81, 25, -81, -- 74, 25, 75, -81 -+ 15, -12, 35, 42, -84, 27, 9, -84, 24, 9, -+ 43, 9, -84, -84, -10, 24, -84, 60, 44, -84, -+ -10, -10, -10, -84, 55, -84, -7, 52, 53, 51, -+ 54, 10, 2, 38, 37, -4, -84, 68, -84, -84, -+ 71, 73, 60, 60, -84, -84, -84, -84, -10, -10, -+ -10, -10, -10, -10, -10, -10, -10, -10, -10, -10, -+ -10, -10, -10, -10, -10, -10, -10, -84, 56, 72, -+ 60, -84, -84, 52, 61, 53, 51, 54, 10, 2, -+ 2, 38, 38, 38, 38, 37, 37, -4, -4, -84, -+ -84, -84, 81, 83, 34, 56, -84, 74, 56, -84, -+ -84, -10, 76, 78, -84, -84, -84, -84, -84, 79, -+ -84, -84, -84, -84, -84, -6, 3, -84, -84, -84, -+ -84, 87, -84, -84, -84, 75, -84, -84, 32, 70, -+ 86, 36, -84, -84, -84, -84, -84, 47, -84, -84, -+ -84, 24, -84, 77, 24, 80, -84 - }; - - /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. -@@ -575,37 +578,37 @@ static const yytype_int8 yypact[] = - means the default is an error. */ - static const yytype_uint8 yydefact[] = - { -- 0, 0, 0, 3, 1, 0, 0, 0, 3, 34, -- 35, 0, 0, 6, 0, 2, 4, 0, 0, 0, -- 68, 0, 37, 38, 40, 42, 44, 46, 48, 50, -- 53, 60, 63, 67, 0, 13, 7, 0, 0, 0, -- 0, 69, 70, 71, 36, 0, 0, 0, 0, 0, -+ 0, 0, 0, 3, 1, 0, 5, 4, 0, 0, -+ 0, 5, 36, 37, 0, 0, 8, 0, 2, 6, -+ 0, 0, 0, 70, 0, 39, 40, 42, 44, 46, -+ 48, 50, 52, 55, 62, 65, 69, 0, 15, 9, -+ 0, 0, 0, 0, 71, 72, 73, 38, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -- 0, 0, 0, 0, 5, 75, 0, 0, 10, 8, -- 41, 0, 43, 45, 47, 49, 51, 52, 56, 57, -- 55, 54, 58, 59, 61, 62, 65, 64, 66, 0, -- 0, 0, 0, 14, 0, 75, 11, 9, 0, 0, -- 0, 16, 26, 78, 18, 80, 0, 77, 76, 39, -- 17, 79, 0, 0, 12, 25, 15, 27, 0, 19, -- 28, 22, 0, 72, 30, 0, 0, 0, 0, 33, -- 32, 20, 31, 29, 0, 73, 74, 21, 0, 24, -- 0, 0, 0, 23 -+ 0, 0, 0, 0, 0, 0, 0, 7, 77, 0, -+ 0, 12, 10, 43, 0, 45, 47, 49, 51, 53, -+ 54, 58, 59, 57, 56, 60, 61, 63, 64, 67, -+ 66, 68, 0, 0, 0, 0, 16, 0, 77, 13, -+ 11, 0, 0, 0, 18, 28, 80, 20, 82, 0, -+ 79, 78, 41, 19, 81, 0, 0, 14, 27, 17, -+ 29, 0, 21, 30, 24, 0, 74, 32, 0, 0, -+ 0, 0, 35, 34, 22, 33, 31, 0, 75, 76, -+ 23, 0, 26, 0, 0, 0, 25 - }; - - /* YYPGOTO[NTERM-NUM]. */ - static const yytype_int8 yypgoto[] = - { -- -81, -81, 100, 104, -81, -38, -81, -80, -81, -81, -- -81, -5, 66, 13, -81, 70, 67, 81, 64, 82, -- 37, 27, 34, 38, -14, -81, 22, 24 -+ -84, -84, -84, 98, 101, -84, -41, -84, -83, -84, -+ -84, -84, -8, 63, 12, -84, 66, 67, 65, 69, -+ 82, 29, 18, 25, 26, -17, -84, 20, 28 - }; - - /* YYDEFGOTO[NTERM-NUM]. */ - static const yytype_int16 yydefgoto[] = - { -- -1, 2, 7, 8, 15, 36, 65, 93, 112, 113, -- 125, 20, 21, 22, 23, 24, 25, 26, 27, 28, -- 29, 30, 31, 32, 33, 128, 94, 95 -+ -1, 2, 6, 10, 11, 18, 39, 68, 96, 115, -+ 116, 128, 23, 24, 25, 26, 27, 28, 29, 30, -+ 31, 32, 33, 34, 35, 36, 131, 97, 98 - }; - - /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If -@@ -613,87 +616,87 @@ static const yytype_int16 yydefgoto[] = - number is the opposite. If YYTABLE_NINF, syntax error. */ - static const yytype_uint8 yytable[] = - { -- 12, 68, 69, 41, 42, 43, 45, 34, 9, 10, -- 53, 54, 104, 3, 5, 107, 101, 118, 35, 1, -- 102, 4, 61, 11, 119, 120, 121, 122, 35, 97, -- 46, 6, 55, 17, 123, 44, 18, 19, 56, 124, -- 62, 63, 9, 10, 14, 51, 52, 86, 87, 88, -- 9, 10, 48, 103, 129, 130, 115, 11, 135, 116, -- 136, 47, 131, 57, 58, 11, 37, 49, 117, 50, -- 137, 64, 38, 39, 138, 139, 40, 89, 90, 91, -- 78, 79, 80, 81, 92, 59, 60, 66, 76, 77, -- 67, 82, 83, 96, 98, 99, 100, 84, 85, 106, -- 110, 111, 114, 126, 134, 127, 133, 141, 16, 143, -- 13, 109, 71, 74, 72, 70, 105, 108, 0, 0, -- 132, 0, 0, 0, 0, 0, 0, 0, 0, 73, -- 0, 0, 75, 140, 0, 0, 142 -+ 15, 71, 72, 44, 45, 46, 48, 37, 12, 13, -+ 56, 57, 107, 3, 8, 110, 118, 121, 1, 119, -+ 54, 55, 64, 14, 122, 123, 124, 125, 120, 100, -+ 49, 9, 58, 20, 126, 4, 21, 22, 59, 127, -+ 65, 66, 12, 13, 60, 61, 5, 89, 90, 91, -+ 12, 13, 7, 106, 132, 133, 138, 14, 139, 104, -+ 40, 38, 134, 105, 50, 14, 41, 42, 140, 17, -+ 43, 92, 93, 94, 81, 82, 83, 84, 95, 62, -+ 63, 141, 142, 79, 80, 85, 86, 38, 87, 88, -+ 47, 52, 51, 67, 69, 53, 70, 99, 102, 101, -+ 103, 113, 109, 114, 117, 129, 136, 137, 130, 19, -+ 16, 144, 74, 112, 73, 146, 76, 75, 111, 0, -+ 135, 77, 0, 108, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 143, 0, 78, 145 - }; - - static const yytype_int16 yycheck[] = - { -- 5, 39, 40, 17, 18, 19, 12, 12, 17, 18, -- 7, 8, 92, 24, 4, 95, 24, 13, 26, 3, -- 28, 0, 25, 32, 20, 21, 22, 23, 26, 67, -- 36, 21, 29, 42, 30, 34, 45, 46, 35, 35, -- 43, 44, 17, 18, 25, 9, 10, 61, 62, 63, -- 17, 18, 38, 91, 21, 22, 21, 32, 19, 24, -- 21, 11, 29, 5, 6, 32, 15, 39, 33, 40, -- 31, 24, 21, 22, 33, 34, 25, 14, 15, 16, -- 53, 54, 55, 56, 21, 41, 42, 22, 51, 52, -- 22, 57, 58, 24, 37, 16, 16, 59, 60, 27, -- 24, 24, 24, 17, 20, 32, 35, 33, 8, 34, -- 6, 98, 46, 49, 47, 45, 92, 95, -1, -1, -- 125, -1, -1, -1, -1, -1, -1, -1, -1, 48, -- -1, -1, 50, 138, -1, -1, 141 -+ 8, 42, 43, 20, 21, 22, 13, 15, 18, 19, -+ 8, 9, 95, 25, 5, 98, 22, 14, 3, 25, -+ 10, 11, 26, 33, 21, 22, 23, 24, 34, 70, -+ 37, 22, 30, 43, 31, 0, 46, 47, 36, 36, -+ 44, 45, 18, 19, 6, 7, 4, 64, 65, 66, -+ 18, 19, 25, 94, 22, 23, 20, 33, 22, 25, -+ 16, 27, 30, 29, 12, 33, 22, 23, 32, 26, -+ 26, 15, 16, 17, 56, 57, 58, 59, 22, 42, -+ 43, 34, 35, 54, 55, 60, 61, 27, 62, 63, -+ 35, 40, 39, 25, 23, 41, 23, 25, 17, 38, -+ 17, 25, 28, 25, 25, 18, 36, 21, 33, 11, -+ 9, 34, 49, 101, 48, 35, 51, 50, 98, -1, -+ 128, 52, -1, 95, -1, -1, -1, -1, -1, -1, -+ -1, -1, -1, 141, -1, 53, 144 - }; - - /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing - symbol of state STATE-NUM. */ - static const yytype_uint8 yystos[] = - { -- 0, 3, 48, 24, 0, 4, 21, 49, 50, 17, -- 18, 32, 58, 50, 25, 51, 49, 42, 45, 46, -- 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, -- 68, 69, 70, 71, 58, 26, 52, 15, 21, 22, -- 25, 71, 71, 71, 34, 12, 36, 11, 38, 39, -- 40, 9, 10, 7, 8, 29, 35, 5, 6, 41, -- 42, 25, 43, 44, 24, 53, 22, 22, 52, 52, -- 62, 59, 63, 64, 65, 66, 67, 67, 68, 68, -- 68, 68, 69, 69, 70, 70, 71, 71, 71, 14, -- 15, 16, 21, 54, 73, 74, 24, 52, 37, 16, -- 16, 24, 28, 52, 54, 74, 27, 54, 73, 60, -- 24, 24, 55, 56, 24, 21, 24, 33, 13, 20, -- 21, 22, 23, 30, 35, 57, 17, 32, 72, 21, -- 22, 29, 58, 35, 20, 19, 21, 31, 33, 34, -- 58, 33, 58, 34 -+ 0, 3, 49, 25, 0, 4, 50, 25, 5, 22, -+ 51, 52, 18, 19, 33, 60, 52, 26, 53, 51, -+ 43, 46, 47, 60, 61, 62, 63, 64, 65, 66, -+ 67, 68, 69, 70, 71, 72, 73, 60, 27, 54, -+ 16, 22, 23, 26, 73, 73, 73, 35, 13, 37, -+ 12, 39, 40, 41, 10, 11, 8, 9, 30, 36, -+ 6, 7, 42, 43, 26, 44, 45, 25, 55, 23, -+ 23, 54, 54, 64, 61, 65, 66, 67, 68, 69, -+ 69, 70, 70, 70, 70, 71, 71, 72, 72, 73, -+ 73, 73, 15, 16, 17, 22, 56, 75, 76, 25, -+ 54, 38, 17, 17, 25, 29, 54, 56, 76, 28, -+ 56, 75, 62, 25, 25, 57, 58, 25, 22, 25, -+ 34, 14, 21, 22, 23, 24, 31, 36, 59, 18, -+ 33, 74, 22, 23, 30, 60, 36, 21, 20, 22, -+ 32, 34, 35, 60, 34, 60, 35 - }; - - /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ - static const yytype_uint8 yyr1[] = - { -- 0, 47, 48, 49, 49, 50, 50, 51, 51, 51, -- 51, 51, 52, 53, 53, 54, 54, 54, 54, 55, -- 55, 55, 55, 55, 55, 55, 56, 56, 56, 57, -- 57, 57, 57, 57, 58, 58, 58, 59, 60, 60, -- 61, 61, 62, 62, 63, 63, 64, 64, 65, 65, -- 66, 66, 66, 67, 67, 67, 67, 67, 68, 68, -- 68, 69, 69, 69, 70, 70, 70, 70, 71, 71, -- 71, 71, 72, 72, 72, 73, 73, 73, 74, 74, -- 74 -+ 0, 48, 49, 50, 50, 51, 51, 52, 52, 53, -+ 53, 53, 53, 53, 54, 55, 55, 56, 56, 56, -+ 56, 57, 57, 57, 57, 57, 57, 57, 58, 58, -+ 58, 59, 59, 59, 59, 59, 60, 60, 60, 61, -+ 62, 62, 63, 63, 64, 64, 65, 65, 66, 66, -+ 67, 67, 68, 68, 68, 69, 69, 69, 69, 69, -+ 70, 70, 70, 71, 71, 71, 72, 72, 72, 72, -+ 73, 73, 73, 73, 74, 74, 74, 75, 75, 75, -+ 76, 76, 76 - }; - - /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ - static const yytype_uint8 yyr2[] = - { -- 0, 2, 4, 0, 2, 4, 2, 2, 3, 4, -- 3, 4, 5, 0, 2, 4, 2, 3, 2, 2, -- 3, 4, 2, 9, 5, 2, 0, 2, 2, 3, -- 1, 2, 2, 2, 1, 1, 3, 1, 1, 5, -- 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, -- 1, 3, 3, 1, 3, 3, 3, 3, 3, 3, -- 1, 3, 3, 1, 3, 3, 3, 1, 1, 2, -- 2, 2, 0, 2, 2, 0, 2, 2, 2, 3, -- 2 -+ 0, 2, 5, 0, 2, 0, 2, 4, 2, 2, -+ 3, 4, 3, 4, 5, 0, 2, 4, 2, 3, -+ 2, 2, 3, 4, 2, 9, 5, 2, 0, 2, -+ 2, 3, 1, 2, 2, 2, 1, 1, 3, 1, -+ 1, 5, 1, 3, 1, 3, 1, 3, 1, 3, -+ 1, 3, 1, 3, 3, 1, 3, 3, 3, 3, -+ 3, 3, 1, 3, 3, 1, 3, 3, 3, 1, -+ 1, 2, 2, 2, 0, 2, 2, 0, 2, 2, -+ 2, 3, 2 - }; - - -@@ -1463,65 +1466,82 @@ yyreduce: - switch (yyn) - { - case 2: --#line 105 "dtc-parser.y" /* yacc.c:1646 */ -+#line 109 "dtc-parser.y" /* yacc.c:1646 */ - { -+ (yyvsp[0].node)->is_plugin = (yyvsp[-2].is_plugin); - the_boot_info = build_boot_info((yyvsp[-1].re), (yyvsp[0].node), - guess_boot_cpuid((yyvsp[0].node))); - } --#line 1472 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1476 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 3: --#line 113 "dtc-parser.y" /* yacc.c:1646 */ -+#line 118 "dtc-parser.y" /* yacc.c:1646 */ - { -- (yyval.re) = NULL; -+ (yyval.is_plugin) = false; - } --#line 1480 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1484 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 4: --#line 117 "dtc-parser.y" /* yacc.c:1646 */ -+#line 122 "dtc-parser.y" /* yacc.c:1646 */ - { -- (yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re)); -+ (yyval.is_plugin) = true; - } --#line 1488 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1492 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 5: --#line 124 "dtc-parser.y" /* yacc.c:1646 */ -+#line 129 "dtc-parser.y" /* yacc.c:1646 */ - { -- (yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer)); -+ (yyval.re) = NULL; - } --#line 1496 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1500 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 6: --#line 128 "dtc-parser.y" /* yacc.c:1646 */ -+#line 133 "dtc-parser.y" /* yacc.c:1646 */ -+ { -+ (yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re)); -+ } -+#line 1508 "dtc-parser.tab.c" /* yacc.c:1646 */ -+ break; -+ -+ case 7: -+#line 140 "dtc-parser.y" /* yacc.c:1646 */ -+ { -+ (yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer)); -+ } -+#line 1516 "dtc-parser.tab.c" /* yacc.c:1646 */ -+ break; -+ -+ case 8: -+#line 144 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref)); - (yyval.re) = (yyvsp[0].re); - } --#line 1505 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1525 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 7: --#line 136 "dtc-parser.y" /* yacc.c:1646 */ -+ case 9: -+#line 152 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node((yyvsp[0].node), ""); - } --#line 1513 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1533 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 8: --#line 140 "dtc-parser.y" /* yacc.c:1646 */ -+ case 10: -+#line 156 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node)); - } --#line 1521 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1541 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 9: --#line 145 "dtc-parser.y" /* yacc.c:1646 */ -+ case 11: -+#line 161 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref)); - -@@ -1532,11 +1552,11 @@ yyreduce: - ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref)); - (yyval.node) = (yyvsp[-3].node); - } --#line 1536 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1556 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 10: --#line 156 "dtc-parser.y" /* yacc.c:1646 */ -+ case 12: -+#line 172 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref)); - -@@ -1546,11 +1566,11 @@ yyreduce: - ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref)); - (yyval.node) = (yyvsp[-2].node); - } --#line 1550 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1570 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 11: --#line 166 "dtc-parser.y" /* yacc.c:1646 */ -+ case 13: -+#line 182 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref)); - -@@ -1562,100 +1582,100 @@ yyreduce: - - (yyval.node) = (yyvsp[-3].node); - } --#line 1566 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1586 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 12: --#line 181 "dtc-parser.y" /* yacc.c:1646 */ -+ case 14: -+#line 197 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist)); - } --#line 1574 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1594 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 13: --#line 188 "dtc-parser.y" /* yacc.c:1646 */ -+ case 15: -+#line 204 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.proplist) = NULL; - } --#line 1582 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1602 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 14: --#line 192 "dtc-parser.y" /* yacc.c:1646 */ -+ case 16: -+#line 208 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist)); - } --#line 1590 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1610 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 15: --#line 199 "dtc-parser.y" /* yacc.c:1646 */ -+ case 17: -+#line 215 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data)); - } --#line 1598 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1618 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 16: --#line 203 "dtc-parser.y" /* yacc.c:1646 */ -+ case 18: -+#line 219 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data); - } --#line 1606 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1626 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 17: --#line 207 "dtc-parser.y" /* yacc.c:1646 */ -+ case 19: -+#line 223 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property_delete((yyvsp[-1].propnodename)); - } --#line 1614 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1634 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 18: --#line 211 "dtc-parser.y" /* yacc.c:1646 */ -+ case 20: -+#line 227 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref)); - (yyval.prop) = (yyvsp[0].prop); - } --#line 1623 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1643 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 19: --#line 219 "dtc-parser.y" /* yacc.c:1646 */ -+ case 21: -+#line 235 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data)); - } --#line 1631 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1651 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 20: --#line 223 "dtc-parser.y" /* yacc.c:1646 */ -+ case 22: -+#line 239 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data); - } --#line 1639 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1659 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 21: --#line 227 "dtc-parser.y" /* yacc.c:1646 */ -+ case 23: -+#line 243 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data)); - } --#line 1647 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1667 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 22: --#line 231 "dtc-parser.y" /* yacc.c:1646 */ -+ case 24: -+#line 247 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref)); - } --#line 1655 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1675 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 23: --#line 235 "dtc-parser.y" /* yacc.c:1646 */ -+ case 25: -+#line 251 "dtc-parser.y" /* yacc.c:1646 */ - { - FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL); - struct data d; -@@ -1671,11 +1691,11 @@ yyreduce: - (yyval.data) = data_merge((yyvsp[-8].data), d); - fclose(f); - } --#line 1675 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1695 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 24: --#line 251 "dtc-parser.y" /* yacc.c:1646 */ -+ case 26: -+#line 267 "dtc-parser.y" /* yacc.c:1646 */ - { - FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL); - struct data d = empty_data; -@@ -1685,43 +1705,43 @@ yyreduce: - (yyval.data) = data_merge((yyvsp[-4].data), d); - fclose(f); - } --#line 1689 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1709 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 25: --#line 261 "dtc-parser.y" /* yacc.c:1646 */ -+ case 27: -+#line 277 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } --#line 1697 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1717 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 26: --#line 268 "dtc-parser.y" /* yacc.c:1646 */ -+ case 28: -+#line 284 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = empty_data; - } --#line 1705 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1725 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 27: --#line 272 "dtc-parser.y" /* yacc.c:1646 */ -+ case 29: -+#line 288 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = (yyvsp[-1].data); - } --#line 1713 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1733 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 28: --#line 276 "dtc-parser.y" /* yacc.c:1646 */ -+ case 30: -+#line 292 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } --#line 1721 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1741 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 29: --#line 283 "dtc-parser.y" /* yacc.c:1646 */ -+ case 31: -+#line 299 "dtc-parser.y" /* yacc.c:1646 */ - { - unsigned long long bits; - -@@ -1737,20 +1757,20 @@ yyreduce: - (yyval.array).data = empty_data; - (yyval.array).bits = bits; - } --#line 1741 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1761 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 30: --#line 299 "dtc-parser.y" /* yacc.c:1646 */ -+ case 32: -+#line 315 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.array).data = empty_data; - (yyval.array).bits = 32; - } --#line 1750 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1770 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 31: --#line 304 "dtc-parser.y" /* yacc.c:1646 */ -+ case 33: -+#line 320 "dtc-parser.y" /* yacc.c:1646 */ - { - if ((yyvsp[-1].array).bits < 64) { - uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1; -@@ -1769,11 +1789,11 @@ yyreduce: - - (yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits); - } --#line 1773 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1793 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 32: --#line 323 "dtc-parser.y" /* yacc.c:1646 */ -+ case 34: -+#line 339 "dtc-parser.y" /* yacc.c:1646 */ - { - uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits); - -@@ -1787,247 +1807,233 @@ yyreduce: - - (yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits); - } --#line 1791 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1811 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 33: --#line 337 "dtc-parser.y" /* yacc.c:1646 */ -+ case 35: -+#line 353 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref)); - } --#line 1799 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1819 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 36: --#line 346 "dtc-parser.y" /* yacc.c:1646 */ -+ case 38: -+#line 362 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.integer) = (yyvsp[-1].integer); - } --#line 1807 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1827 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 39: --#line 357 "dtc-parser.y" /* yacc.c:1646 */ -+ case 41: -+#line 373 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); } --#line 1813 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1833 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 41: --#line 362 "dtc-parser.y" /* yacc.c:1646 */ -+ case 43: -+#line 378 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); } --#line 1819 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1839 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 43: --#line 367 "dtc-parser.y" /* yacc.c:1646 */ -+ case 45: -+#line 383 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); } --#line 1825 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1845 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 45: --#line 372 "dtc-parser.y" /* yacc.c:1646 */ -+ case 47: -+#line 388 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); } --#line 1831 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1851 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 47: --#line 377 "dtc-parser.y" /* yacc.c:1646 */ -+ case 49: -+#line 393 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); } --#line 1837 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1857 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 49: --#line 382 "dtc-parser.y" /* yacc.c:1646 */ -+ case 51: -+#line 398 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); } --#line 1843 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1863 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 51: --#line 387 "dtc-parser.y" /* yacc.c:1646 */ -+ case 53: -+#line 403 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); } --#line 1849 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1869 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 52: --#line 388 "dtc-parser.y" /* yacc.c:1646 */ -+ case 54: -+#line 404 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); } --#line 1855 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1875 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 54: --#line 393 "dtc-parser.y" /* yacc.c:1646 */ -+ case 56: -+#line 409 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); } --#line 1861 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1881 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 55: --#line 394 "dtc-parser.y" /* yacc.c:1646 */ -+ case 57: -+#line 410 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); } --#line 1867 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1887 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 56: --#line 395 "dtc-parser.y" /* yacc.c:1646 */ -+ case 58: -+#line 411 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); } --#line 1873 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1893 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 57: --#line 396 "dtc-parser.y" /* yacc.c:1646 */ -+ case 59: -+#line 412 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); } --#line 1879 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1899 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 58: --#line 400 "dtc-parser.y" /* yacc.c:1646 */ -+ case 60: -+#line 416 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); } --#line 1885 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1905 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 59: --#line 401 "dtc-parser.y" /* yacc.c:1646 */ -+ case 61: -+#line 417 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); } --#line 1891 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1911 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 61: --#line 406 "dtc-parser.y" /* yacc.c:1646 */ -+ case 63: -+#line 422 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); } --#line 1897 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1917 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 62: --#line 407 "dtc-parser.y" /* yacc.c:1646 */ -+ case 64: -+#line 423 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); } --#line 1903 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1923 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 64: --#line 412 "dtc-parser.y" /* yacc.c:1646 */ -+ case 66: -+#line 428 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); } --#line 1909 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1929 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 65: --#line 414 "dtc-parser.y" /* yacc.c:1646 */ -- { -- if ((yyvsp[0].integer) != 0) { -- (yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer); -- } else { -- ERROR(&(yyloc), "Division by zero"); -- (yyval.integer) = 0; -- } -- } --#line 1922 "dtc-parser.tab.c" /* yacc.c:1646 */ -+ case 67: -+#line 429 "dtc-parser.y" /* yacc.c:1646 */ -+ { (yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer); } -+#line 1935 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 66: --#line 423 "dtc-parser.y" /* yacc.c:1646 */ -- { -- if ((yyvsp[0].integer) != 0) { -- (yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer); -- } else { -- ERROR(&(yyloc), "Division by zero"); -- (yyval.integer) = 0; -- } -- } --#line 1935 "dtc-parser.tab.c" /* yacc.c:1646 */ -+ case 68: -+#line 430 "dtc-parser.y" /* yacc.c:1646 */ -+ { (yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer); } -+#line 1941 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 69: -+ case 71: - #line 436 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = -(yyvsp[0].integer); } --#line 1941 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1947 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 70: -+ case 72: - #line 437 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = ~(yyvsp[0].integer); } --#line 1947 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1953 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 71: -+ case 73: - #line 438 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = !(yyvsp[0].integer); } --#line 1953 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1959 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 72: -+ case 74: - #line 443 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = empty_data; - } --#line 1961 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1967 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 73: -+ case 75: - #line 447 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte)); - } --#line 1969 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1975 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 74: -+ case 76: - #line 451 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } --#line 1977 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1983 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 75: -+ case 77: - #line 458 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.nodelist) = NULL; - } --#line 1985 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1991 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 76: -+ case 78: - #line 462 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist)); - } --#line 1993 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 1999 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 77: -+ case 79: - #line 466 "dtc-parser.y" /* yacc.c:1646 */ - { - ERROR(&(yylsp[0]), "Properties must precede subnodes"); - YYERROR; - } --#line 2002 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 2008 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 78: -+ case 80: - #line 474 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename)); - } --#line 2010 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 2016 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 79: -+ case 81: - #line 478 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename)); - } --#line 2018 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 2024 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - -- case 80: -+ case 82: - #line 482 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref)); - (yyval.node) = (yyvsp[0].node); - } --#line 2027 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 2033 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - --#line 2031 "dtc-parser.tab.c" /* yacc.c:1646 */ -+#line 2037 "dtc-parser.tab.c" /* yacc.c:1646 */ - default: break; - } - /* User semantic actions sometimes alter yychar, and that requires ---- a/scripts/dtc/dtc-parser.tab.h_shipped -+++ b/scripts/dtc/dtc-parser.tab.h_shipped -@@ -46,26 +46,27 @@ extern int yydebug; - enum yytokentype - { - DT_V1 = 258, -- DT_MEMRESERVE = 259, -- DT_LSHIFT = 260, -- DT_RSHIFT = 261, -- DT_LE = 262, -- DT_GE = 263, -- DT_EQ = 264, -- DT_NE = 265, -- DT_AND = 266, -- DT_OR = 267, -- DT_BITS = 268, -- DT_DEL_PROP = 269, -- DT_DEL_NODE = 270, -- DT_PROPNODENAME = 271, -- DT_LITERAL = 272, -- DT_CHAR_LITERAL = 273, -- DT_BYTE = 274, -- DT_STRING = 275, -- DT_LABEL = 276, -- DT_REF = 277, -- DT_INCBIN = 278 -+ DT_PLUGIN = 259, -+ DT_MEMRESERVE = 260, -+ DT_LSHIFT = 261, -+ DT_RSHIFT = 262, -+ DT_LE = 263, -+ DT_GE = 264, -+ DT_EQ = 265, -+ DT_NE = 266, -+ DT_AND = 267, -+ DT_OR = 268, -+ DT_BITS = 269, -+ DT_DEL_PROP = 270, -+ DT_DEL_NODE = 271, -+ DT_PROPNODENAME = 272, -+ DT_LITERAL = 273, -+ DT_CHAR_LITERAL = 274, -+ DT_BYTE = 275, -+ DT_STRING = 276, -+ DT_LABEL = 277, -+ DT_REF = 278, -+ DT_INCBIN = 279 - }; - #endif - -@@ -74,7 +75,7 @@ extern int yydebug; - typedef union YYSTYPE YYSTYPE; - union YYSTYPE - { --#line 38 "dtc-parser.y" /* yacc.c:1909 */ -+#line 39 "dtc-parser.y" /* yacc.c:1909 */ - - char *propnodename; - char *labelref; -@@ -92,8 +93,9 @@ union YYSTYPE - struct node *nodelist; - struct reserve_info *re; - uint64_t integer; -+ bool is_plugin; - --#line 97 "dtc-parser.tab.h" /* yacc.c:1909 */ -+#line 99 "dtc-parser.tab.h" /* yacc.c:1909 */ - }; - # define YYSTYPE_IS_TRIVIAL 1 - # define YYSTYPE_IS_DECLARED 1 ---- a/scripts/dtc/dtc-parser.y -+++ b/scripts/dtc/dtc-parser.y -@@ -19,6 +19,7 @@ - */ - %{ - #include -+#include - - #include "dtc.h" - #include "srcpos.h" -@@ -52,9 +53,11 @@ extern bool treesource_error; - struct node *nodelist; - struct reserve_info *re; - uint64_t integer; -+ bool is_plugin; - } - - %token DT_V1 -+%token DT_PLUGIN - %token DT_MEMRESERVE - %token DT_LSHIFT DT_RSHIFT DT_LE DT_GE DT_EQ DT_NE DT_AND DT_OR - %token DT_BITS -@@ -71,6 +74,7 @@ extern bool treesource_error; - - %type propdata - %type propdataprefix -+%type plugindecl - %type memreserve - %type memreserves - %type arrayprefix -@@ -101,10 +105,22 @@ extern bool treesource_error; - %% - - sourcefile: -- DT_V1 ';' memreserves devicetree -+ DT_V1 ';' plugindecl memreserves devicetree - { -- the_boot_info = build_boot_info($3, $4, -- guess_boot_cpuid($4)); -+ $5->is_plugin = $3; -+ the_boot_info = build_boot_info($4, $5, -+ guess_boot_cpuid($5)); -+ } -+ ; -+ -+plugindecl: -+ /* empty */ -+ { -+ $$ = false; -+ } -+ | DT_PLUGIN ';' -+ { -+ $$ = true; - } - ; - ---- a/scripts/dtc/dtc.c -+++ b/scripts/dtc/dtc.c -@@ -31,6 +31,7 @@ int reservenum; /* Number of memory res - int minsize; /* Minimum blob size */ - int padsize; /* Additional padding to blob */ - int phandle_format = PHANDLE_BOTH; /* Use linux,phandle or phandle properties */ -+int symbol_fixup_support = 0; - - static void fill_fullpaths(struct node *tree, const char *prefix) - { -@@ -53,7 +54,7 @@ static void fill_fullpaths(struct node * - #define FDT_VERSION(version) _FDT_VERSION(version) - #define _FDT_VERSION(version) #version - static const char usage_synopsis[] = "dtc [options] "; --static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:fb:i:H:sW:E:hv"; -+static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:fb:i:H:sW:E:@hv"; - static struct option const usage_long_opts[] = { - {"quiet", no_argument, NULL, 'q'}, - {"in-format", a_argument, NULL, 'I'}, -@@ -71,6 +72,7 @@ static struct option const usage_long_op - {"phandle", a_argument, NULL, 'H'}, - {"warning", a_argument, NULL, 'W'}, - {"error", a_argument, NULL, 'E'}, -+ {"symbols", no_argument, NULL, '@'}, - {"help", no_argument, NULL, 'h'}, - {"version", no_argument, NULL, 'v'}, - {NULL, no_argument, NULL, 0x0}, -@@ -101,6 +103,7 @@ static const char * const usage_opts_hel - "\t\tboth - Both \"linux,phandle\" and \"phandle\" properties", - "\n\tEnable/disable warnings (prefix with \"no-\")", - "\n\tEnable/disable errors (prefix with \"no-\")", -+ "\n\tEnable symbols/fixup support", - "\n\tPrint this help and exit", - "\n\tPrint version and exit", - NULL, -@@ -233,7 +236,9 @@ int main(int argc, char *argv[]) - case 'E': - parse_checks_option(false, true, optarg); - break; -- -+ case '@': -+ symbol_fixup_support = 1; -+ break; - case 'h': - usage(NULL); - default: ---- a/scripts/dtc/dtc.h -+++ b/scripts/dtc/dtc.h -@@ -54,6 +54,7 @@ extern int reservenum; /* Number of mem - extern int minsize; /* Minimum blob size */ - extern int padsize; /* Additional padding to blob */ - extern int phandle_format; /* Use linux,phandle or phandle properties */ -+extern int symbol_fixup_support;/* enable symbols & fixup support */ - - #define PHANDLE_LEGACY 0x1 - #define PHANDLE_EPAPR 0x2 -@@ -132,6 +133,26 @@ struct label { - struct label *next; - }; - -+struct fixup_entry { -+ int offset; -+ struct node *node; -+ struct property *prop; -+ struct fixup_entry *next; -+ bool local_fixup_generated; -+}; -+ -+struct fixup { -+ char *ref; -+ struct fixup_entry *entries; -+ struct fixup *next; -+}; -+ -+struct symbol { -+ struct label *label; -+ struct node *node; -+ struct symbol *next; -+}; -+ - struct property { - bool deleted; - char *name; -@@ -158,6 +179,13 @@ struct node { - int addr_cells, size_cells; - - struct label *labels; -+ -+ struct symbol *symbols; -+ struct fixup_entry *local_fixups; -+ bool emit_local_fixup_node; -+ -+ bool is_plugin; -+ struct fixup *fixups; - }; - - #define for_each_label_withdel(l0, l) \ -@@ -181,6 +209,18 @@ struct node { - for_each_child_withdel(n, c) \ - if (!(c)->deleted) - -+#define for_each_fixup(n, f) \ -+ for ((f) = (n)->fixups; (f); (f) = (f)->next) -+ -+#define for_each_fixup_entry(f, fe) \ -+ for ((fe) = (f)->entries; (fe); (fe) = (fe)->next) -+ -+#define for_each_symbol(n, s) \ -+ for ((s) = (n)->symbols; (s); (s) = (s)->next) -+ -+#define for_each_local_fixup_entry(n, fe) \ -+ for ((fe) = (n)->local_fixups; (fe); (fe) = (fe)->next) -+ - void add_label(struct label **labels, char *label); - void delete_labels(struct label **labels); - ---- a/scripts/dtc/flattree.c -+++ b/scripts/dtc/flattree.c -@@ -255,6 +255,204 @@ static int stringtable_insert(struct dat - return i; - } - -+static void emit_local_fixups(struct node *tree, struct emitter *emit, -+ void *etarget, struct data *strbuf, struct version_info *vi, -+ struct node *node) -+{ -+ struct fixup_entry *fe, *fen; -+ struct node *child; -+ int nameoff, count; -+ cell_t *buf; -+ struct data d; -+ -+ if (node->emit_local_fixup_node) { -+ -+ /* emit the external fixups (do not emit /) */ -+ if (node != tree) { -+ emit->beginnode(etarget, NULL); -+ emit->string(etarget, node->name, 0); -+ emit->align(etarget, sizeof(cell_t)); -+ } -+ -+ for_each_local_fixup_entry(tree, fe) { -+ if (fe->node != node || fe->local_fixup_generated) -+ continue; -+ -+ /* count the number of fixup entries */ -+ count = 0; -+ for_each_local_fixup_entry(tree, fen) { -+ if (fen->prop != fe->prop) -+ continue; -+ fen->local_fixup_generated = true; -+ count++; -+ } -+ -+ /* allocate buffer */ -+ buf = xmalloc(count * sizeof(cell_t)); -+ -+ /* collect all the offsets in buffer */ -+ count = 0; -+ for_each_local_fixup_entry(tree, fen) { -+ if (fen->prop != fe->prop) -+ continue; -+ fen->local_fixup_generated = true; -+ buf[count++] = cpu_to_fdt32(fen->offset); -+ } -+ d = empty_data; -+ d.len = count * sizeof(cell_t); -+ d.val = (char *)buf; -+ -+ nameoff = stringtable_insert(strbuf, fe->prop->name); -+ emit->property(etarget, fe->prop->labels); -+ emit->cell(etarget, count * sizeof(cell_t)); -+ emit->cell(etarget, nameoff); -+ -+ if ((vi->flags & FTF_VARALIGN) && -+ (count * sizeof(cell_t)) >= 8) -+ emit->align(etarget, 8); -+ -+ emit->data(etarget, d); -+ emit->align(etarget, sizeof(cell_t)); -+ -+ free(buf); -+ } -+ } -+ -+ for_each_child(node, child) -+ emit_local_fixups(tree, emit, etarget, strbuf, vi, child); -+ -+ if (node->emit_local_fixup_node && node != tree) -+ emit->endnode(etarget, tree->labels); -+} -+ -+static void emit_symbols_node(struct node *tree, struct emitter *emit, -+ void *etarget, struct data *strbuf, -+ struct version_info *vi) -+{ -+ struct symbol *sym; -+ int nameoff, vallen; -+ -+ /* do nothing if no symbols */ -+ if (!tree->symbols) -+ return; -+ -+ emit->beginnode(etarget, NULL); -+ emit->string(etarget, "__symbols__", 0); -+ emit->align(etarget, sizeof(cell_t)); -+ -+ for_each_symbol(tree, sym) { -+ -+ vallen = strlen(sym->node->fullpath); -+ -+ nameoff = stringtable_insert(strbuf, sym->label->label); -+ -+ emit->property(etarget, NULL); -+ emit->cell(etarget, vallen + 1); -+ emit->cell(etarget, nameoff); -+ -+ if ((vi->flags & FTF_VARALIGN) && vallen >= 8) -+ emit->align(etarget, 8); -+ -+ emit->string(etarget, sym->node->fullpath, -+ strlen(sym->node->fullpath)); -+ emit->align(etarget, sizeof(cell_t)); -+ } -+ -+ emit->endnode(etarget, NULL); -+} -+ -+static void emit_local_fixups_node(struct node *tree, struct emitter *emit, -+ void *etarget, struct data *strbuf, -+ struct version_info *vi) -+{ -+ struct fixup_entry *fe; -+ struct node *node; -+ -+ /* do nothing if no local fixups */ -+ if (!tree->local_fixups) -+ return; -+ -+ /* mark all nodes that need a local fixup generated (and parents) */ -+ for_each_local_fixup_entry(tree, fe) { -+ node = fe->node; -+ while (node != NULL && !node->emit_local_fixup_node) { -+ node->emit_local_fixup_node = true; -+ node = node->parent; -+ } -+ } -+ -+ /* emit the local fixups node now */ -+ emit->beginnode(etarget, NULL); -+ emit->string(etarget, "__local_fixups__", 0); -+ emit->align(etarget, sizeof(cell_t)); -+ -+ emit_local_fixups(tree, emit, etarget, strbuf, vi, tree); -+ -+ emit->endnode(etarget, tree->labels); -+} -+ -+static void emit_fixups_node(struct node *tree, struct emitter *emit, -+ void *etarget, struct data *strbuf, -+ struct version_info *vi) -+{ -+ struct fixup *f; -+ struct fixup_entry *fe; -+ char *name, *s; -+ const char *fullpath; -+ int namesz, nameoff, vallen; -+ -+ /* do nothing if no fixups */ -+ if (!tree->fixups) -+ return; -+ -+ /* emit the external fixups */ -+ emit->beginnode(etarget, NULL); -+ emit->string(etarget, "__fixups__", 0); -+ emit->align(etarget, sizeof(cell_t)); -+ -+ for_each_fixup(tree, f) { -+ -+ namesz = 0; -+ for_each_fixup_entry(f, fe) { -+ fullpath = fe->node->fullpath; -+ if (fullpath[0] == '\0') -+ fullpath = "/"; -+ namesz += strlen(fullpath) + 1; -+ namesz += strlen(fe->prop->name) + 1; -+ namesz += 32; /* space for : + '\0' */ -+ } -+ -+ name = xmalloc(namesz); -+ -+ s = name; -+ for_each_fixup_entry(f, fe) { -+ fullpath = fe->node->fullpath; -+ if (fullpath[0] == '\0') -+ fullpath = "/"; -+ snprintf(s, name + namesz - s, "%s:%s:%d", fullpath, -+ fe->prop->name, fe->offset); -+ s += strlen(s) + 1; -+ } -+ -+ nameoff = stringtable_insert(strbuf, f->ref); -+ vallen = s - name - 1; -+ -+ emit->property(etarget, NULL); -+ emit->cell(etarget, vallen + 1); -+ emit->cell(etarget, nameoff); -+ -+ if ((vi->flags & FTF_VARALIGN) && vallen >= 8) -+ emit->align(etarget, 8); -+ -+ emit->string(etarget, name, vallen); -+ emit->align(etarget, sizeof(cell_t)); -+ -+ free(name); -+ } -+ -+ emit->endnode(etarget, tree->labels); -+} -+ - static void flatten_tree(struct node *tree, struct emitter *emit, - void *etarget, struct data *strbuf, - struct version_info *vi) -@@ -310,6 +508,10 @@ static void flatten_tree(struct node *tr - flatten_tree(child, emit, etarget, strbuf, vi); - } - -+ emit_symbols_node(tree, emit, etarget, strbuf, vi); -+ emit_local_fixups_node(tree, emit, etarget, strbuf, vi); -+ emit_fixups_node(tree, emit, etarget, strbuf, vi); -+ - emit->endnode(etarget, tree->labels); - } - ---- a/scripts/dtc/version_gen.h -+++ b/scripts/dtc/version_gen.h -@@ -1 +1 @@ --#define DTC_VERSION "DTC 1.4.1-g53bf130b" -+#define DTC_VERSION "DTC 1.4.1-g25efc119" diff --git a/target/linux/brcm2708/patches-4.9/950-0058-enabling-the-realtime-clock-1-wire-chip-DS1307-and-1.patch b/target/linux/brcm2708/patches-4.9/950-0058-enabling-the-realtime-clock-1-wire-chip-DS1307-and-1.patch deleted file mode 100644 index 4c3d2b15f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0058-enabling-the-realtime-clock-1-wire-chip-DS1307-and-1.patch +++ /dev/null @@ -1,221 +0,0 @@ -From 5edc95eee5ef69d7bfe03eede0e711e8f196dedc Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Wed, 8 May 2013 11:46:50 +0100 -Subject: [PATCH] enabling the realtime clock 1-wire chip DS1307 and 1-wire on - GPIO4 (as a module) - -1-wire: Add support for configuring pin for w1-gpio kernel module -See: https://github.com/raspberrypi/linux/pull/457 - -Add bitbanging pullups, use them for w1-gpio - -Allows parasite power to work, uses module option pullup=1 - -bcm2708: Ensure 1-wire pullup is disabled by default, and expose as module parameter - -Signed-off-by: Alex J Lennon - -w1-gpio: Add gpiopin module parameter and correctly free up gpio pull-up pin, if set - -Signed-off-by: Alex J Lennon - -w1-gpio: Sort out the pullup/parasitic power tangle ---- - drivers/w1/masters/w1-gpio.c | 69 ++++++++++++++++++++++++++++++++++++++++---- - drivers/w1/w1.h | 6 ++++ - drivers/w1/w1_int.c | 14 +++++++++ - drivers/w1/w1_io.c | 18 ++++++++++-- - include/linux/w1-gpio.h | 1 + - 5 files changed, 99 insertions(+), 9 deletions(-) - ---- a/drivers/w1/masters/w1-gpio.c -+++ b/drivers/w1/masters/w1-gpio.c -@@ -23,6 +23,19 @@ - #include "../w1.h" - #include "../w1_int.h" - -+static int w1_gpio_pullup = 0; -+static int w1_gpio_pullup_orig = 0; -+module_param_named(pullup, w1_gpio_pullup, int, 0); -+MODULE_PARM_DESC(pullup, "Enable parasitic power (power on data) mode"); -+static int w1_gpio_pullup_pin = -1; -+static int w1_gpio_pullup_pin_orig = -1; -+module_param_named(extpullup, w1_gpio_pullup_pin, int, 0); -+MODULE_PARM_DESC(extpullup, "GPIO external pullup pin number"); -+static int w1_gpio_pin = -1; -+static int w1_gpio_pin_orig = -1; -+module_param_named(gpiopin, w1_gpio_pin, int, 0); -+MODULE_PARM_DESC(gpiopin, "GPIO pin number"); -+ - static u8 w1_gpio_set_pullup(void *data, int delay) - { - struct w1_gpio_platform_data *pdata = data; -@@ -67,6 +80,16 @@ static u8 w1_gpio_read_bit(void *data) - return gpio_get_value(pdata->pin) ? 1 : 0; - } - -+static void w1_gpio_bitbang_pullup(void *data, u8 on) -+{ -+ struct w1_gpio_platform_data *pdata = data; -+ -+ if (on) -+ gpio_direction_output(pdata->pin, 1); -+ else -+ gpio_direction_input(pdata->pin); -+} -+ - #if defined(CONFIG_OF) - static const struct of_device_id w1_gpio_dt_ids[] = { - { .compatible = "w1-gpio" }, -@@ -80,6 +103,7 @@ static int w1_gpio_probe_dt(struct platf - struct w1_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev); - struct device_node *np = pdev->dev.of_node; - int gpio; -+ u32 value; - - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); - if (!pdata) -@@ -88,6 +112,9 @@ static int w1_gpio_probe_dt(struct platf - if (of_get_property(np, "linux,open-drain", NULL)) - pdata->is_open_drain = 1; - -+ if (of_property_read_u32(np, "rpi,parasitic-power", &value) == 0) -+ pdata->parasitic_power = (value != 0); -+ - gpio = of_get_gpio(np, 0); - if (gpio < 0) { - if (gpio != -EPROBE_DEFER) -@@ -103,7 +130,7 @@ static int w1_gpio_probe_dt(struct platf - if (gpio == -EPROBE_DEFER) - return gpio; - /* ignore other errors as the pullup gpio is optional */ -- pdata->ext_pullup_enable_pin = gpio; -+ pdata->ext_pullup_enable_pin = (gpio >= 0) ? gpio : -1; - - pdev->dev.platform_data = pdata; - -@@ -135,6 +162,22 @@ static int w1_gpio_probe(struct platform - return -ENOMEM; - } - -+ w1_gpio_pin_orig = pdata->pin; -+ w1_gpio_pullup_pin_orig = pdata->ext_pullup_enable_pin; -+ w1_gpio_pullup_orig = pdata->parasitic_power; -+ -+ if(gpio_is_valid(w1_gpio_pin)) { -+ pdata->pin = w1_gpio_pin; -+ pdata->ext_pullup_enable_pin = -1; -+ pdata->parasitic_power = -1; -+ } -+ pdata->parasitic_power |= w1_gpio_pullup; -+ if(gpio_is_valid(w1_gpio_pullup_pin)) { -+ pdata->ext_pullup_enable_pin = w1_gpio_pullup_pin; -+ } -+ -+ dev_info(&pdev->dev, "gpio pin %d, external pullup pin %d, parasitic power %d\n", pdata->pin, pdata->ext_pullup_enable_pin, pdata->parasitic_power); -+ - err = devm_gpio_request(&pdev->dev, pdata->pin, "w1"); - if (err) { - dev_err(&pdev->dev, "gpio_request (pin) failed\n"); -@@ -164,6 +207,14 @@ static int w1_gpio_probe(struct platform - master->set_pullup = w1_gpio_set_pullup; - } - -+ if (pdata->parasitic_power) { -+ if (pdata->is_open_drain) -+ printk(KERN_ERR "w1-gpio 'pullup'(parasitic power) " -+ "option doesn't work with open drain GPIO\n"); -+ else -+ master->bitbang_pullup = w1_gpio_bitbang_pullup; -+ } -+ - err = w1_add_master_device(master); - if (err) { - dev_err(&pdev->dev, "w1_add_master device failed\n"); -@@ -194,6 +245,10 @@ static int w1_gpio_remove(struct platfor - - w1_remove_master_device(master); - -+ pdata->pin = w1_gpio_pin_orig; -+ pdata->ext_pullup_enable_pin = w1_gpio_pullup_pin_orig; -+ pdata->parasitic_power = w1_gpio_pullup_orig; -+ - return 0; - } - ---- a/drivers/w1/w1.h -+++ b/drivers/w1/w1.h -@@ -173,6 +173,12 @@ struct w1_bus_master - - u8 (*set_pullup)(void *, int); - -+ /** -+ * Turns the pullup on/off in bitbanging mode, takes an on/off argument. -+ * @return -1=Error, 0=completed -+ */ -+ void (*bitbang_pullup) (void *, u8); -+ - void (*search)(void *, struct w1_master *, - u8, w1_slave_found_callback); - }; ---- a/drivers/w1/w1_int.c -+++ b/drivers/w1/w1_int.c -@@ -122,6 +122,20 @@ int w1_add_master_device(struct w1_bus_m - return(-EINVAL); - } - -+ /* bitbanging hardware uses bitbang_pullup, other hardware uses set_pullup -+ * and takes care of timing itself */ -+ if (!master->write_byte && !master->touch_bit && master->set_pullup) { -+ printk(KERN_ERR "w1_add_master_device: set_pullup requires " -+ "write_byte or touch_bit, disabling\n"); -+ master->set_pullup = NULL; -+ } -+ -+ if (master->set_pullup && master->bitbang_pullup) { -+ printk(KERN_ERR "w1_add_master_device: set_pullup should not " -+ "be set when bitbang_pullup is used, disabling\n"); -+ master->set_pullup = NULL; -+ } -+ - /* Lock until the device is added (or not) to w1_masters. */ - mutex_lock(&w1_mlock); - /* Search for the first available id (starting at 1). */ ---- a/drivers/w1/w1_io.c -+++ b/drivers/w1/w1_io.c -@@ -134,10 +134,22 @@ static void w1_pre_write(struct w1_maste - static void w1_post_write(struct w1_master *dev) - { - if (dev->pullup_duration) { -- if (dev->enable_pullup && dev->bus_master->set_pullup) -- dev->bus_master->set_pullup(dev->bus_master->data, 0); -- else -+ if (dev->enable_pullup) { -+ if (dev->bus_master->set_pullup) { -+ dev->bus_master->set_pullup(dev-> -+ bus_master->data, -+ 0); -+ } else if (dev->bus_master->bitbang_pullup) { -+ dev->bus_master-> -+ bitbang_pullup(dev->bus_master->data, 1); - msleep(dev->pullup_duration); -+ dev->bus_master-> -+ bitbang_pullup(dev->bus_master->data, 0); -+ } -+ } else { -+ msleep(dev->pullup_duration); -+ } -+ - dev->pullup_duration = 0; - } - } ---- a/include/linux/w1-gpio.h -+++ b/include/linux/w1-gpio.h -@@ -18,6 +18,7 @@ - struct w1_gpio_platform_data { - unsigned int pin; - unsigned int is_open_drain:1; -+ unsigned int parasitic_power:1; - void (*enable_external_pullup)(int enable); - unsigned int ext_pullup_enable_pin; - unsigned int pullup_duration; diff --git a/target/linux/brcm2708/patches-4.9/950-0060-config-Enable-CONFIG_MEMCG-but-leave-it-disabled-due.patch b/target/linux/brcm2708/patches-4.9/950-0060-config-Enable-CONFIG_MEMCG-but-leave-it-disabled-due.patch deleted file mode 100644 index 5dc823336..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0060-config-Enable-CONFIG_MEMCG-but-leave-it-disabled-due.patch +++ /dev/null @@ -1,50 +0,0 @@ -From c50fe09c78e9b87137e0188139c774bd4f12dcb2 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Wed, 18 Dec 2013 22:16:19 +0000 -Subject: [PATCH] config: Enable CONFIG_MEMCG, but leave it disabled (due to - memory cost). Enable with cgroup_enable=memory. - ---- - kernel/cgroup.c | 24 +++++++++++++++++++++++- - 1 file changed, 23 insertions(+), 1 deletion(-) - ---- a/kernel/cgroup.c -+++ b/kernel/cgroup.c -@@ -5636,7 +5636,7 @@ int __init cgroup_init_early(void) - return 0; - } - --static u16 cgroup_disable_mask __initdata; -+static u16 cgroup_disable_mask __initdata = 1<<0; - - /** - * cgroup_init - cgroup initialization -@@ -6177,6 +6177,28 @@ static int __init cgroup_no_v1(char *str - } - __setup("cgroup_no_v1=", cgroup_no_v1); - -+static int __init cgroup_enable(char *str) -+{ -+ struct cgroup_subsys *ss; -+ char *token; -+ int i; -+ -+ while ((token = strsep(&str, ",")) != NULL) { -+ if (!*token) -+ continue; -+ -+ for_each_subsys(ss, i) { -+ if (strcmp(token, ss->name) && -+ strcmp(token, ss->legacy_name)) -+ continue; -+ -+ cgroup_disable_mask &= ~(1 << i); -+ } -+ } -+ return 1; -+} -+__setup("cgroup_enable=", cgroup_enable); -+ - /** - * css_tryget_online_from_dir - get corresponding css from a cgroup dentry - * @dentry: directory dentry of interest diff --git a/target/linux/brcm2708/patches-4.9/950-0061-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch b/target/linux/brcm2708/patches-4.9/950-0061-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch deleted file mode 100644 index 4a05d3131..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0061-hid-Reduce-default-mouse-polling-interval-to-60Hz.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 56f13ae9d518c5aec8736ccc639f2f5e2c3784ad Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 14 Jul 2014 22:02:09 +0100 -Subject: [PATCH] hid: Reduce default mouse polling interval to 60Hz - -Reduces overhead when using X ---- - drivers/hid/usbhid/hid-core.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - ---- a/drivers/hid/usbhid/hid-core.c -+++ b/drivers/hid/usbhid/hid-core.c -@@ -49,7 +49,7 @@ - * Module parameters. - */ - --static unsigned int hid_mousepoll_interval; -+static unsigned int hid_mousepoll_interval = ~0; - module_param_named(mousepoll, hid_mousepoll_interval, uint, 0644); - MODULE_PARM_DESC(mousepoll, "Polling interval of mice"); - -@@ -1093,8 +1093,12 @@ static int usbhid_start(struct hid_devic - } - - /* Change the polling interval of mice. */ -- if (hid->collection->usage == HID_GD_MOUSE && hid_mousepoll_interval > 0) -- interval = hid_mousepoll_interval; -+ if (hid->collection->usage == HID_GD_MOUSE) { -+ if (hid_mousepoll_interval == ~0 && interval < 16) -+ interval = 16; -+ else if (hid_mousepoll_interval != ~0 && hid_mousepoll_interval != 0) -+ interval = hid_mousepoll_interval; -+ } - - ret = -ENOMEM; - if (usb_endpoint_dir_in(endpoint)) { diff --git a/target/linux/brcm2708/patches-4.9/950-0066-ASoC-Add-support-for-HifiBerry-DAC.patch b/target/linux/brcm2708/patches-4.9/950-0066-ASoC-Add-support-for-HifiBerry-DAC.patch deleted file mode 100644 index 107ed28c1..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0066-ASoC-Add-support-for-HifiBerry-DAC.patch +++ /dev/null @@ -1,170 +0,0 @@ -From fe9fdf49ba81e28860e5367ea8bb9c6b1c6a0460 Mon Sep 17 00:00:00 2001 -From: Florian Meier -Date: Fri, 22 Nov 2013 19:19:08 +0100 -Subject: [PATCH] ASoC: Add support for HifiBerry DAC - -This adds a machine driver for the HifiBerry DAC. -It is a sound card that can -be stacked onto the Raspberry Pi. - -Signed-off-by: Florian Meier ---- - sound/soc/bcm/Kconfig | 9 ++- - sound/soc/bcm/Makefile | 4 ++ - sound/soc/bcm/hifiberry_dac.c | 124 ++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 136 insertions(+), 1 deletion(-) - create mode 100644 sound/soc/bcm/hifiberry_dac.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -15,4 +15,11 @@ config SND_SOC_CYGNUS - Say Y if you want to add support for ASoC audio on Broadcom - Cygnus chips (bcm958300, bcm958305, bcm911360) - -- If you don't know what to do here, say N. -\ No newline at end of file -+ If you don't know what to do here, say N. -+ -+config SND_BCM2708_SOC_HIFIBERRY_DAC -+ tristate "Support for HifiBerry DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM5102A -+ help -+ Say Y or M if you want to add support for HifiBerry DAC. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -8,3 +8,7 @@ snd-soc-cygnus-objs := cygnus-pcm.o cygn - - obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc-cygnus.o - -+# BCM2708 Machine Support -+snd-soc-hifiberry-dac-objs := hifiberry_dac.o -+ -+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o ---- /dev/null -+++ b/sound/soc/bcm/hifiberry_dac.c -@@ -0,0 +1,124 @@ -+/* -+ * ASoC Driver for HifiBerry DAC -+ * -+ * Author: Florian Meier -+ * Copyright 2013 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static int snd_rpi_hifiberry_dac_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ return 0; -+} -+ -+static int snd_rpi_hifiberry_dac_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_hifiberry_dac_ops = { -+ .hw_params = snd_rpi_hifiberry_dac_hw_params, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_hifiberry_dac_dai[] = { -+{ -+ .name = "HifiBerry DAC", -+ .stream_name = "HifiBerry DAC HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "pcm5102a-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "pcm5102a-codec", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_hifiberry_dac_ops, -+ .init = snd_rpi_hifiberry_dac_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_hifiberry_dac = { -+ .name = "snd_rpi_hifiberry_dac", -+ .driver_name = "HifiberryDac", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_hifiberry_dac_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_dac_dai), -+}; -+ -+static int snd_rpi_hifiberry_dac_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_hifiberry_dac.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_hifiberry_dac_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_hifiberry_dac); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_hifiberry_dac_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_hifiberry_dac); -+} -+ -+static const struct of_device_id snd_rpi_hifiberry_dac_of_match[] = { -+ { .compatible = "hifiberry,hifiberry-dac", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_dac_of_match); -+ -+static struct platform_driver snd_rpi_hifiberry_dac_driver = { -+ .driver = { -+ .name = "snd-hifiberry-dac", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_hifiberry_dac_of_match, -+ }, -+ .probe = snd_rpi_hifiberry_dac_probe, -+ .remove = snd_rpi_hifiberry_dac_remove, -+}; -+ -+module_platform_driver(snd_rpi_hifiberry_dac_driver); -+ -+MODULE_AUTHOR("Florian Meier "); -+MODULE_DESCRIPTION("ASoC Driver for HifiBerry DAC"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0067-ASoC-Add-support-for-Rpi-DAC.patch b/target/linux/brcm2708/patches-4.9/950-0067-ASoC-Add-support-for-Rpi-DAC.patch deleted file mode 100644 index 26ae5b3d7..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0067-ASoC-Add-support-for-Rpi-DAC.patch +++ /dev/null @@ -1,272 +0,0 @@ -From 3a890b43d08fbfe10895f733578f095a6449ba0b Mon Sep 17 00:00:00 2001 -From: Florian Meier -Date: Mon, 25 Jan 2016 15:48:59 +0000 -Subject: [PATCH] ASoC: Add support for Rpi-DAC - ---- - sound/soc/bcm/Kconfig | 7 +++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/rpi-dac.c | 119 ++++++++++++++++++++++++++++++++++++++++++++ - sound/soc/codecs/Kconfig | 5 ++ - sound/soc/codecs/Makefile | 2 + - sound/soc/codecs/pcm1794a.c | 69 +++++++++++++++++++++++++ - 6 files changed, 204 insertions(+) - create mode 100644 sound/soc/bcm/rpi-dac.c - create mode 100644 sound/soc/codecs/pcm1794a.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -23,3 +23,10 @@ config SND_BCM2708_SOC_HIFIBERRY_DAC - select SND_SOC_PCM5102A - help - Say Y or M if you want to add support for HifiBerry DAC. -+ -+config SND_BCM2708_SOC_RPI_DAC -+ tristate "Support for RPi-DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM1794A -+ help -+ Say Y or M if you want to add support for RPi-DAC. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -10,5 +10,7 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- - - # BCM2708 Machine Support - snd-soc-hifiberry-dac-objs := hifiberry_dac.o -+snd-soc-rpi-dac-objs := rpi-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o ---- /dev/null -+++ b/sound/soc/bcm/rpi-dac.c -@@ -0,0 +1,119 @@ -+/* -+ * ASoC Driver for RPi-DAC. -+ * -+ * Author: Florian Meier -+ * Copyright 2013 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static int snd_rpi_rpi_dac_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ return 0; -+} -+ -+static int snd_rpi_rpi_dac_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_rpi_dac_ops = { -+ .hw_params = snd_rpi_rpi_dac_hw_params, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_rpi_dac_dai[] = { -+{ -+ .name = "RPi-DAC", -+ .stream_name = "RPi-DAC HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "pcm1794a-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "pcm1794a-codec", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_rpi_dac_ops, -+ .init = snd_rpi_rpi_dac_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_rpi_dac = { -+ .name = "snd_rpi_rpi_dac", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_rpi_dac_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_rpi_dac_dai), -+}; -+ -+static int snd_rpi_rpi_dac_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_rpi_dac.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_rpi_dac_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_rpi_dac); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_rpi_dac_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_rpi_dac); -+} -+ -+static const struct of_device_id snd_rpi_rpi_dac_of_match[] = { -+ { .compatible = "rpi,rpi-dac", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_rpi_dac_of_match); -+ -+static struct platform_driver snd_rpi_rpi_dac_driver = { -+ .driver = { -+ .name = "snd-rpi-dac", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_rpi_dac_of_match, -+ }, -+ .probe = snd_rpi_rpi_dac_probe, -+ .remove = snd_rpi_rpi_dac_remove, -+}; -+ -+module_platform_driver(snd_rpi_rpi_dac_driver); -+ -+MODULE_AUTHOR("Florian Meier "); -+MODULE_DESCRIPTION("ASoC Driver for RPi-DAC"); -+MODULE_LICENSE("GPL v2"); ---- a/sound/soc/codecs/Kconfig -+++ b/sound/soc/codecs/Kconfig -@@ -98,6 +98,7 @@ config SND_SOC_ALL_CODECS - select SND_SOC_PCM1681 if I2C - select SND_SOC_PCM179X_I2C if I2C - select SND_SOC_PCM179X_SPI if SPI_MASTER -+ select SND_SOC_PCM1794A if I2C - select SND_SOC_PCM3008 - select SND_SOC_PCM3168A_I2C if I2C - select SND_SOC_PCM3168A_SPI if SPI_MASTER -@@ -689,6 +690,10 @@ config SND_SOC_RT5616 - tristate "Realtek RT5616 CODEC" - depends on I2C - -+config SND_SOC_PCM1794A -+ tristate -+ depends on I2C -+ - config SND_SOC_RT5631 - tristate "Realtek ALC5631/RT5631 CODEC" - depends on I2C ---- a/sound/soc/codecs/Makefile -+++ b/sound/soc/codecs/Makefile -@@ -93,6 +93,7 @@ snd-soc-pcm1681-objs := pcm1681.o - snd-soc-pcm179x-codec-objs := pcm179x.o - snd-soc-pcm179x-i2c-objs := pcm179x-i2c.o - snd-soc-pcm179x-spi-objs := pcm179x-spi.o -+snd-soc-pcm1794a-objs := pcm1794a.o - snd-soc-pcm3008-objs := pcm3008.o - snd-soc-pcm3168a-objs := pcm3168a.o - snd-soc-pcm3168a-i2c-objs := pcm3168a-i2c.o -@@ -325,6 +326,7 @@ obj-$(CONFIG_SND_SOC_PCM5102A) += snd-so - obj-$(CONFIG_SND_SOC_PCM512x) += snd-soc-pcm512x.o - obj-$(CONFIG_SND_SOC_PCM512x_I2C) += snd-soc-pcm512x-i2c.o - obj-$(CONFIG_SND_SOC_PCM512x_SPI) += snd-soc-pcm512x-spi.o -+obj-$(CONFIG_SND_SOC_PCM1794A) += snd-soc-pcm1794a.o - obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o - obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o - obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o ---- /dev/null -+++ b/sound/soc/codecs/pcm1794a.c -@@ -0,0 +1,69 @@ -+/* -+ * Driver for the PCM1794A codec -+ * -+ * Author: Florian Meier -+ * Copyright 2013 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+ -+#include -+#include -+#include -+ -+#include -+ -+static struct snd_soc_dai_driver pcm1794a_dai = { -+ .name = "pcm1794a-hifi", -+ .playback = { -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = SNDRV_PCM_RATE_8000_192000, -+ .formats = SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE -+ }, -+}; -+ -+static struct snd_soc_codec_driver soc_codec_dev_pcm1794a; -+ -+static int pcm1794a_probe(struct platform_device *pdev) -+{ -+ return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_pcm1794a, -+ &pcm1794a_dai, 1); -+} -+ -+static int pcm1794a_remove(struct platform_device *pdev) -+{ -+ snd_soc_unregister_codec(&pdev->dev); -+ return 0; -+} -+ -+static const struct of_device_id pcm1794a_of_match[] = { -+ { .compatible = "ti,pcm1794a", }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, pcm1794a_of_match); -+ -+static struct platform_driver pcm1794a_codec_driver = { -+ .probe = pcm1794a_probe, -+ .remove = pcm1794a_remove, -+ .driver = { -+ .name = "pcm1794a-codec", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(pcm1794a_of_match), -+ }, -+}; -+ -+module_platform_driver(pcm1794a_codec_driver); -+ -+MODULE_DESCRIPTION("ASoC PCM1794A codec driver"); -+MODULE_AUTHOR("Florian Meier "); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0068-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch b/target/linux/brcm2708/patches-4.9/950-0068-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch deleted file mode 100644 index 1be734bef..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0068-ASoC-wm8804-Implement-MCLK-configuration-options-add.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 8432dc7c8a843e7c35d7624adc6653e13dd488a7 Mon Sep 17 00:00:00 2001 -From: Daniel Matuschek -Date: Wed, 15 Jan 2014 21:41:23 +0100 -Subject: [PATCH] ASoC: wm8804: Implement MCLK configuration options, add 32bit - support WM8804 can run with PLL frequencies of 256xfs and 128xfs for most - sample rates. At 192kHz only 128xfs is supported. The existing driver selects - 128xfs automatically for some lower samples rates. By using an additional - mclk_div divider, it is now possible to control the behaviour. This allows - using 256xfs PLL frequency on all sample rates up to 96kHz. It should allow - lower jitter and better signal quality. The behavior has to be controlled by - the sound card driver, because some sample frequency share the same setting. - e.g. 192kHz and 96kHz use 24.576MHz master clock. The only difference is the - MCLK divider. - -This also added support for 32bit data. - -Signed-off-by: Daniel Matuschek ---- - sound/soc/codecs/wm8804.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/sound/soc/codecs/wm8804.c -+++ b/sound/soc/codecs/wm8804.c -@@ -304,6 +304,7 @@ static int wm8804_hw_params(struct snd_p - blen = 0x1; - break; - case 24: -+ case 32: - blen = 0x2; - break; - default: -@@ -515,7 +516,7 @@ static const struct snd_soc_dai_ops wm88 - }; - - #define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ -- SNDRV_PCM_FMTBIT_S24_LE) -+ SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE) - - #define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ - SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ -@@ -543,7 +544,7 @@ static struct snd_soc_dai_driver wm8804_ - }; - - static const struct snd_soc_codec_driver soc_codec_dev_wm8804 = { -- .idle_bias_off = true, -+ .idle_bias_off = false, - - .component_driver = { - .dapm_widgets = wm8804_dapm_widgets, diff --git a/target/linux/brcm2708/patches-4.9/950-0069-ASoC-BCM-Add-support-for-HiFiBerry-Digi.-Driver-is-b.patch b/target/linux/brcm2708/patches-4.9/950-0069-ASoC-BCM-Add-support-for-HiFiBerry-Digi.-Driver-is-b.patch deleted file mode 100644 index 5f8477cd7..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0069-ASoC-BCM-Add-support-for-HiFiBerry-Digi.-Driver-is-b.patch +++ /dev/null @@ -1,339 +0,0 @@ -From ded3c4c0c46af840159e4fc79a065d69cbb7b534 Mon Sep 17 00:00:00 2001 -From: Daniel Matuschek -Date: Wed, 15 Jan 2014 21:42:08 +0100 -Subject: [PATCH] ASoC: BCM:Add support for HiFiBerry Digi. Driver is based on - the patched WM8804 driver. - -Signed-off-by: Daniel Matuschek - -Add a parameter to turn off SPDIF output if no audio is playing - -This patch adds the paramater auto_shutdown_output to the kernel module. -Default behaviour of the module is the same, but when auto_shutdown_output -is set to 1, the SPDIF oputput will shutdown if no stream is playing. - -bugfix for 32kHz sample rate, was missing - -HiFiBerry Digi: set SPDIF status bits for sample rate - -The HiFiBerry Digi driver did not signal the sample rate in the SPDIF status bits. -While this is optional, some DACs and receivers do not accept this signal. This patch -adds the sample rate bits in the SPDIF status block. - -Added HiFiBerry Digi+ Pro driver - -Signed-off-by: Daniel Matuschek ---- - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/hifiberry_digi.c | 276 +++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 285 insertions(+) - create mode 100644 sound/soc/bcm/hifiberry_digi.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -24,6 +24,13 @@ config SND_BCM2708_SOC_HIFIBERRY_DAC - help - Say Y or M if you want to add support for HifiBerry DAC. - -+config SND_BCM2708_SOC_HIFIBERRY_DIGI -+ tristate "Support for HifiBerry Digi" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8804 -+ help -+ Say Y or M if you want to add support for HifiBerry Digi S/PDIF output board. -+ - config SND_BCM2708_SOC_RPI_DAC - tristate "Support for RPi-DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -10,7 +10,9 @@ obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc- - - # BCM2708 Machine Support - snd-soc-hifiberry-dac-objs := hifiberry_dac.o -+snd-soc-hifiberry-digi-objs := hifiberry_digi.o - snd-soc-rpi-dac-objs := rpi-dac.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o ---- /dev/null -+++ b/sound/soc/bcm/hifiberry_digi.c -@@ -0,0 +1,276 @@ -+/* -+ * ASoC Driver for HifiBerry Digi -+ * -+ * Author: Daniel Matuschek -+ * based on the HifiBerry DAC driver by Florian Meier -+ * Copyright 2013 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/wm8804.h" -+ -+static short int auto_shutdown_output = 0; -+module_param(auto_shutdown_output, short, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); -+MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped"); -+ -+#define CLK_44EN_RATE 22579200UL -+#define CLK_48EN_RATE 24576000UL -+ -+static bool snd_rpi_hifiberry_is_digipro; -+static struct gpio_desc *snd_rpi_hifiberry_clk44gpio; -+static struct gpio_desc *snd_rpi_hifiberry_clk48gpio; -+ -+static int samplerate=44100; -+ -+static uint32_t snd_rpi_hifiberry_digi_enable_clock(int sample_rate) -+{ -+ switch (sample_rate) { -+ case 11025: -+ case 22050: -+ case 44100: -+ case 88200: -+ case 176400: -+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 1); -+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 0); -+ return CLK_44EN_RATE; -+ default: -+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk48gpio, 1); -+ gpiod_set_value_cansleep(snd_rpi_hifiberry_clk44gpio, 0); -+ return CLK_48EN_RATE; -+ } -+} -+ -+ -+static int snd_rpi_hifiberry_digi_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ /* Initialize Digi+ Pro hardware */ -+ if (snd_rpi_hifiberry_is_digipro) { -+ struct snd_soc_dai_link *dai = rtd->dai_link; -+ -+ dai->name = "HiFiBerry Digi+ Pro"; -+ dai->stream_name = "HiFiBerry Digi+ Pro HiFi"; -+ } -+ -+ return 0; -+} -+ -+static int snd_rpi_hifiberry_digi_startup(struct snd_pcm_substream *substream) { -+ /* turn on digital output */ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00); -+ return 0; -+} -+ -+static void snd_rpi_hifiberry_digi_shutdown(struct snd_pcm_substream *substream) { -+ /* turn off output */ -+ if (auto_shutdown_output) { -+ /* turn off output */ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c); -+ } -+} -+ -+ -+static int snd_rpi_hifiberry_digi_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_codec *codec = rtd->codec; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ int sysclk = 27000000; /* This is fixed on this board */ -+ -+ long mclk_freq=0; -+ int mclk_div=1; -+ int sampling_freq=1; -+ -+ int ret; -+ -+ samplerate = params_rate(params); -+ -+ if (samplerate<=96000) { -+ mclk_freq=samplerate*256; -+ mclk_div=WM8804_MCLKDIV_256FS; -+ } else { -+ mclk_freq=samplerate*128; -+ mclk_div=WM8804_MCLKDIV_128FS; -+ } -+ -+ if (snd_rpi_hifiberry_is_digipro) -+ sysclk = snd_rpi_hifiberry_digi_enable_clock(samplerate); -+ -+ switch (samplerate) { -+ case 32000: -+ sampling_freq=0x03; -+ break; -+ case 44100: -+ sampling_freq=0x00; -+ break; -+ case 48000: -+ sampling_freq=0x02; -+ break; -+ case 88200: -+ sampling_freq=0x08; -+ break; -+ case 96000: -+ sampling_freq=0x0a; -+ break; -+ case 176400: -+ sampling_freq=0x0c; -+ break; -+ case 192000: -+ sampling_freq=0x0e; -+ break; -+ default: -+ dev_err(codec->dev, -+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", -+ samplerate); -+ } -+ -+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); -+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, -+ sysclk, SND_SOC_CLOCK_OUT); -+ -+ if (ret < 0) { -+ dev_err(codec->dev, -+ "Failed to set WM8804 SYSCLK: %d\n", ret); -+ return ret; -+ } -+ -+ /* Enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ /* Power on */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0); -+ -+ /* set sampling frequency status bits */ -+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai,64); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_hifiberry_digi_ops = { -+ .hw_params = snd_rpi_hifiberry_digi_hw_params, -+ .startup = snd_rpi_hifiberry_digi_startup, -+ .shutdown = snd_rpi_hifiberry_digi_shutdown, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_hifiberry_digi_dai[] = { -+{ -+ .name = "HifiBerry Digi", -+ .stream_name = "HifiBerry Digi HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "wm8804-spdif", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "wm8804.1-003b", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ .ops = &snd_rpi_hifiberry_digi_ops, -+ .init = snd_rpi_hifiberry_digi_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_hifiberry_digi = { -+ .name = "snd_rpi_hifiberry_digi", -+ .driver_name = "HifiberryDigi", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_hifiberry_digi_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_digi_dai), -+}; -+ -+static int snd_rpi_hifiberry_digi_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_hifiberry_digi.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_hifiberry_digi_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ -+ snd_rpi_hifiberry_is_digipro = 1; -+ -+ snd_rpi_hifiberry_clk44gpio = -+ devm_gpiod_get(&pdev->dev, "clock44", GPIOD_OUT_LOW); -+ if (IS_ERR(snd_rpi_hifiberry_clk44gpio)) -+ snd_rpi_hifiberry_is_digipro = 0; -+ -+ snd_rpi_hifiberry_clk48gpio = -+ devm_gpiod_get(&pdev->dev, "clock48", GPIOD_OUT_LOW); -+ if (IS_ERR(snd_rpi_hifiberry_clk48gpio)) -+ snd_rpi_hifiberry_is_digipro = 0; -+ -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_hifiberry_digi); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_hifiberry_digi_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_hifiberry_digi); -+} -+ -+static const struct of_device_id snd_rpi_hifiberry_digi_of_match[] = { -+ { .compatible = "hifiberry,hifiberry-digi", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_digi_of_match); -+ -+static struct platform_driver snd_rpi_hifiberry_digi_driver = { -+ .driver = { -+ .name = "snd-hifiberry-digi", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_hifiberry_digi_of_match, -+ }, -+ .probe = snd_rpi_hifiberry_digi_probe, -+ .remove = snd_rpi_hifiberry_digi_remove, -+}; -+ -+module_platform_driver(snd_rpi_hifiberry_digi_driver); -+ -+MODULE_AUTHOR("Daniel Matuschek "); -+MODULE_DESCRIPTION("ASoC Driver for HifiBerry Digi"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0071-iqaudio-dac-Compile-fix-untested.patch b/target/linux/brcm2708/patches-4.9/950-0071-iqaudio-dac-Compile-fix-untested.patch deleted file mode 100644 index edfb9f5e1..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0071-iqaudio-dac-Compile-fix-untested.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 711f7413d72af6328a3958eecd400bd8911af211 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 25 Jul 2016 17:06:50 +0100 -Subject: [PATCH] iqaudio-dac: Compile fix - untested - ---- - sound/soc/bcm/iqaudio-dac.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/sound/soc/bcm/iqaudio-dac.c -+++ b/sound/soc/bcm/iqaudio-dac.c -@@ -76,7 +76,11 @@ static void snd_rpi_iqaudio_gpio_unmute( - static int snd_rpi_iqaudio_set_bias_level(struct snd_soc_card *card, - struct snd_soc_dapm_context *dapm, enum snd_soc_bias_level level) - { -- struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai; -+ struct snd_soc_pcm_runtime *rtd; -+ struct snd_soc_dai *codec_dai; -+ -+ rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name); -+ codec_dai = rtd->codec_dai; - - if (dapm->dev != codec_dai->dev) - return 0; diff --git a/target/linux/brcm2708/patches-4.9/950-0074-Update-ds1307-driver-for-device-tree-support.patch b/target/linux/brcm2708/patches-4.9/950-0074-Update-ds1307-driver-for-device-tree-support.patch deleted file mode 100644 index 236e55d69..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0074-Update-ds1307-driver-for-device-tree-support.patch +++ /dev/null @@ -1,27 +0,0 @@ -From b3ff56f28a9531048812a51ded7c16a952d1ead4 Mon Sep 17 00:00:00 2001 -From: Ryan Coe -Date: Sat, 31 Jan 2015 18:25:49 -0700 -Subject: [PATCH] Update ds1307 driver for device-tree support - -Signed-off-by: Ryan Coe ---- - drivers/rtc/rtc-ds1307.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/rtc/rtc-ds1307.c -+++ b/drivers/rtc/rtc-ds1307.c -@@ -1682,6 +1682,14 @@ static int ds1307_remove(struct i2c_clie - return 0; - } - -+#ifdef CONFIG_OF -+static const struct of_device_id ds1307_of_match[] = { -+ { .compatible = "maxim,ds1307" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, ds1307_of_match); -+#endif -+ - static struct i2c_driver ds1307_driver = { - .driver = { - .name = "rtc-ds1307", diff --git a/target/linux/brcm2708/patches-4.9/950-0076-RaspiDAC3-support.patch b/target/linux/brcm2708/patches-4.9/950-0076-RaspiDAC3-support.patch deleted file mode 100644 index de68bbf6b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0076-RaspiDAC3-support.patch +++ /dev/null @@ -1,238 +0,0 @@ -From b545537294ffc7e21fcc5e0c78ea8ac20c9ecd3f Mon Sep 17 00:00:00 2001 -From: Jan Grulich -Date: Mon, 24 Aug 2015 16:03:47 +0100 -Subject: [PATCH] RaspiDAC3 support - -Signed-off-by: Jan Grulich - -config: fix RaspiDAC Rev.3x dependencies - -Change depends to SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -like the other I2S soundcard drivers. - -Signed-off-by: Matthias Reichl ---- - sound/soc/bcm/Kconfig | 8 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/raspidac3.c | 186 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 196 insertions(+) - create mode 100644 sound/soc/bcm/raspidac3.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -65,3 +65,11 @@ config SND_BCM2708_SOC_IQAUDIO_DAC - select SND_SOC_PCM512x_I2C - help - Say Y or M if you want to add support for IQaudIO-DAC. -+ -+config SND_BCM2708_SOC_RASPIDAC3 -+ tristate "Support for RaspiDAC Rev.3x" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM512x_I2C -+ select SND_SOC_TPA6130A2 -+ help -+ Say Y or M if you want to add support for RaspiDAC Rev.3x. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -16,6 +16,7 @@ snd-soc-hifiberry-digi-objs := hifiberry - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o -+snd-soc-raspidac3-objs := raspidac3.o - - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o -@@ -24,3 +25,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o ---- /dev/null -+++ b/sound/soc/bcm/raspidac3.c -@@ -0,0 +1,186 @@ -+/* -+ * ASoC Driver for RaspiDAC v3 -+ * -+ * Author: Jan Grulich -+ * Copyright 2015 -+ * based on code by Daniel Matuschek -+ * based on code by Florian Meier -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/pcm512x.h" -+#include "../codecs/tpa6130a2.h" -+ -+/* sound card init */ -+static int snd_rpi_raspidac3_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ int ret; -+ struct snd_soc_card *card = rtd->card; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08); -+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02); -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00); -+ -+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); -+ if (ret < 0) -+ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); -+ else { -+ struct snd_kcontrol *kctl; -+ -+ ret = snd_soc_limit_volume(card, -+ "TPA6130A2 Headphone Playback Volume", -+ 54); -+ if (ret < 0) -+ dev_warn(card->dev, "Failed to set TPA6130A2 volume limit: %d\n", -+ ret); -+ kctl = snd_soc_card_get_kcontrol(card, -+ "TPA6130A2 Headphone Playback Volume"); -+ if (kctl) { -+ strcpy(kctl->id.name, "Headphones Playback Volume"); -+ /* disable the volume dB scale so alsamixer works */ -+ kctl->vd[0].access = SNDRV_CTL_ELEM_ACCESS_READWRITE; -+ } -+ -+ kctl = snd_soc_card_get_kcontrol(card, -+ "TPA6130A2 Headphone Playback Switch"); -+ if (kctl) -+ strcpy(kctl->id.name, "Headphones Playback Switch"); -+ } -+ -+ return 0; -+} -+ -+/* set hw parameters */ -+static int snd_rpi_raspidac3_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ -+/* startup */ -+static int snd_rpi_raspidac3_startup(struct snd_pcm_substream *substream) { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08); -+ return 0; -+} -+ -+/* shutdown */ -+static void snd_rpi_raspidac3_shutdown(struct snd_pcm_substream *substream) { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_raspidac3_ops = { -+ .hw_params = snd_rpi_raspidac3_hw_params, -+ .startup = snd_rpi_raspidac3_startup, -+ .shutdown = snd_rpi_raspidac3_shutdown, -+}; -+ -+/* interface setup */ -+static struct snd_soc_dai_link snd_rpi_raspidac3_dai[] = { -+{ -+ .name = "RaspiDAC Rev.3x", -+ .stream_name = "RaspiDAC HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "pcm512x-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "pcm512x.1-004c", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_raspidac3_ops, -+ .init = snd_rpi_raspidac3_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_raspidac3 = { -+ .name = "RaspiDAC Rev.3x HiFi Audio Card", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_raspidac3_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_raspidac3_dai), -+}; -+ -+/* sound card test */ -+static int snd_rpi_raspidac3_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_raspidac3.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_raspidac3_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_raspidac3); -+ if (ret) -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+/* sound card disconnect */ -+static int snd_rpi_raspidac3_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_raspidac3); -+} -+ -+static const struct of_device_id raspidac3_of_match[] = { -+ { .compatible = "jg,raspidacv3", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, raspidac3_of_match); -+ -+/* sound card platform driver */ -+static struct platform_driver snd_rpi_raspidac3_driver = { -+ .driver = { -+ .name = "snd-rpi-raspidac3", -+ .owner = THIS_MODULE, -+ .of_match_table = raspidac3_of_match, -+ }, -+ .probe = snd_rpi_raspidac3_probe, -+ .remove = snd_rpi_raspidac3_remove, -+}; -+ -+module_platform_driver(snd_rpi_raspidac3_driver); -+ -+MODULE_AUTHOR("Jan Grulich "); -+MODULE_DESCRIPTION("ASoC Driver for RaspiDAC Rev.3x"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0077-Add-Support-for-JustBoom-Audio-boards.patch b/target/linux/brcm2708/patches-4.9/950-0077-Add-Support-for-JustBoom-Audio-boards.patch deleted file mode 100644 index 96545872f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0077-Add-Support-for-JustBoom-Audio-boards.patch +++ /dev/null @@ -1,446 +0,0 @@ -From 4a8ebf575ea143c14fd815ecd1f5398b6a6aee67 Mon Sep 17 00:00:00 2001 -From: Aaron Shaw -Date: Thu, 7 Apr 2016 21:26:21 +0100 -Subject: [PATCH] Add Support for JustBoom Audio boards - -justboom-dac: Adjust for ALSA API change - -As of 4.4, snd_soc_limit_volume now takes a struct snd_soc_card * -rather than a struct snd_soc_codec *. - -Signed-off-by: Phil Elwell ---- - sound/soc/bcm/Kconfig | 14 +++ - sound/soc/bcm/Makefile | 4 + - sound/soc/bcm/justboom-dac.c | 162 +++++++++++++++++++++++++++++++ - sound/soc/bcm/justboom-digi.c | 215 ++++++++++++++++++++++++++++++++++++++++++ - 4 files changed, 395 insertions(+) - create mode 100644 sound/soc/bcm/justboom-dac.c - create mode 100644 sound/soc/bcm/justboom-digi.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -59,6 +59,20 @@ config SND_BCM2708_SOC_RPI_PROTO - help - Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731). - -+config SND_BCM2708_SOC_JUSTBOOM_DAC -+ tristate "Support for JustBoom DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM512x -+ help -+ Say Y or M if you want to add support for JustBoom DAC. -+ -+config SND_BCM2708_SOC_JUSTBOOM_DIGI -+ tristate "Support for JustBoom Digi" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8804 -+ help -+ Say Y or M if you want to add support for JustBoom Digi. -+ - config SND_BCM2708_SOC_IQAUDIO_DAC - tristate "Support for IQaudIO-DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -13,6 +13,8 @@ snd-soc-hifiberry-amp-objs := hifiberry_ - snd-soc-hifiberry-dac-objs := hifiberry_dac.o - snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o - snd-soc-hifiberry-digi-objs := hifiberry_digi.o -+snd-soc-justboom-dac-objs := justboom-dac.o -+snd-soc-justboom-digi-objs := justboom-digi.o - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o -@@ -22,6 +24,8 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_A - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) += snd-soc-hifiberry-digi.o -+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DIGI) += snd-soc-justboom-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o ---- /dev/null -+++ b/sound/soc/bcm/justboom-dac.c -@@ -0,0 +1,162 @@ -+/* -+ * ASoC Driver for JustBoom DAC Raspberry Pi HAT Sound Card -+ * -+ * Author: Milan Neskovic -+ * Copyright 2016 -+ * based on code by Daniel Matuschek -+ * based on code by Florian Meier -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/pcm512x.h" -+ -+static bool digital_gain_0db_limit = true; -+ -+static int snd_rpi_justboom_dac_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_EN, 0x08, 0x08); -+ snd_soc_update_bits(codec, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02); -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08); -+ -+ if (digital_gain_0db_limit) -+ { -+ int ret; -+ struct snd_soc_card *card = rtd->card; -+ -+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); -+ if (ret < 0) -+ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); -+ } -+ -+ return 0; -+} -+ -+static int snd_rpi_justboom_dac_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ /*return snd_soc_dai_set_bclk_ratio(cpu_dai, 64);*/ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ -+static int snd_rpi_justboom_dac_startup(struct snd_pcm_substream *substream) { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x08); -+ return 0; -+} -+ -+static void snd_rpi_justboom_dac_shutdown(struct snd_pcm_substream *substream) { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, PCM512x_GPIO_CONTROL_1, 0x08,0x00); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_justboom_dac_ops = { -+ .hw_params = snd_rpi_justboom_dac_hw_params, -+ .startup = snd_rpi_justboom_dac_startup, -+ .shutdown = snd_rpi_justboom_dac_shutdown, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_justboom_dac_dai[] = { -+{ -+ .name = "JustBoom DAC", -+ .stream_name = "JustBoom DAC HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "pcm512x-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "pcm512x.1-004d", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_justboom_dac_ops, -+ .init = snd_rpi_justboom_dac_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_justboom_dac = { -+ .name = "snd_rpi_justboom_dac", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_justboom_dac_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai), -+}; -+ -+static int snd_rpi_justboom_dac_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_justboom_dac.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_dac_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ -+ digital_gain_0db_limit = !of_property_read_bool( -+ pdev->dev.of_node, "justboom,24db_digital_gain"); -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_justboom_dac); -+ if (ret) -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_justboom_dac_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_justboom_dac); -+} -+ -+static const struct of_device_id snd_rpi_justboom_dac_of_match[] = { -+ { .compatible = "justboom,justboom-dac", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_dac_of_match); -+ -+static struct platform_driver snd_rpi_justboom_dac_driver = { -+ .driver = { -+ .name = "snd-rpi-justboom-dac", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_justboom_dac_of_match, -+ }, -+ .probe = snd_rpi_justboom_dac_probe, -+ .remove = snd_rpi_justboom_dac_remove, -+}; -+ -+module_platform_driver(snd_rpi_justboom_dac_driver); -+ -+MODULE_AUTHOR("Milan Neskovic "); -+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI DAC HAT Sound Card"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/sound/soc/bcm/justboom-digi.c -@@ -0,0 +1,215 @@ -+/* -+ * ASoC Driver for JustBoom Raspberry Pi Digi HAT Sound Card -+ * -+ * Author: Milan Neskovic -+ * Copyright 2016 -+ * based on code by Daniel Matuschek -+ * based on code by Florian Meier -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/wm8804.h" -+ -+static int snd_rpi_justboom_digi_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ return 0; -+} -+ -+static int snd_rpi_justboom_digi_startup(struct snd_pcm_substream *substream) { -+ /* turn on digital output */ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00); -+ return 0; -+} -+ -+static void snd_rpi_justboom_digi_shutdown(struct snd_pcm_substream *substream) { -+ /* turn off output */ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c); -+} -+ -+static int snd_rpi_justboom_digi_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_codec *codec = rtd->codec; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ int sysclk = 27000000; /* This is fixed on this board */ -+ -+ long mclk_freq=0; -+ int mclk_div=1; -+ int sampling_freq=1; -+ -+ int ret; -+ -+ int samplerate = params_rate(params); -+ -+ if (samplerate<=96000) { -+ mclk_freq=samplerate*256; -+ mclk_div=WM8804_MCLKDIV_256FS; -+ } else { -+ mclk_freq=samplerate*128; -+ mclk_div=WM8804_MCLKDIV_128FS; -+ } -+ -+ switch (samplerate) { -+ case 32000: -+ sampling_freq=0x03; -+ break; -+ case 44100: -+ sampling_freq=0x00; -+ break; -+ case 48000: -+ sampling_freq=0x02; -+ break; -+ case 88200: -+ sampling_freq=0x08; -+ break; -+ case 96000: -+ sampling_freq=0x0a; -+ break; -+ case 176400: -+ sampling_freq=0x0c; -+ break; -+ case 192000: -+ sampling_freq=0x0e; -+ break; -+ default: -+ dev_err(codec->dev, -+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", -+ samplerate); -+ } -+ -+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); -+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, -+ sysclk, SND_SOC_CLOCK_OUT); -+ if (ret < 0) { -+ dev_err(codec->dev, -+ "Failed to set WM8804 SYSCLK: %d\n", ret); -+ return ret; -+ } -+ -+ /* Enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ /* Power on */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0); -+ -+ /* set sampling frequency status bits */ -+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai,64); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_justboom_digi_ops = { -+ .hw_params = snd_rpi_justboom_digi_hw_params, -+ .startup = snd_rpi_justboom_digi_startup, -+ .shutdown = snd_rpi_justboom_digi_shutdown, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_justboom_digi_dai[] = { -+{ -+ .name = "JustBoom Digi", -+ .stream_name = "JustBoom Digi HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "wm8804-spdif", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "wm8804.1-003b", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ .ops = &snd_rpi_justboom_digi_ops, -+ .init = snd_rpi_justboom_digi_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_justboom_digi = { -+ .name = "snd_rpi_justboom_digi", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_justboom_digi_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai), -+}; -+ -+static int snd_rpi_justboom_digi_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_justboom_digi.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_digi_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_justboom_digi); -+ if (ret) -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_justboom_digi_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_justboom_digi); -+} -+ -+static const struct of_device_id snd_rpi_justboom_digi_of_match[] = { -+ { .compatible = "justboom,justboom-digi", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_digi_of_match); -+ -+static struct platform_driver snd_rpi_justboom_digi_driver = { -+ .driver = { -+ .name = "snd-rpi-justboom-digi", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_justboom_digi_of_match, -+ }, -+ .probe = snd_rpi_justboom_digi_probe, -+ .remove = snd_rpi_justboom_digi_remove, -+}; -+ -+module_platform_driver(snd_rpi_justboom_digi_driver); -+ -+MODULE_AUTHOR("Milan Neskovic "); -+MODULE_DESCRIPTION("ASoC Driver for JustBoom PI Digi HAT Sound Card"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0078-ARM-adau1977-adc-Add-basic-machine-driver-for-adau19.patch b/target/linux/brcm2708/patches-4.9/950-0078-ARM-adau1977-adc-Add-basic-machine-driver-for-adau19.patch deleted file mode 100644 index 1b87b13ef..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0078-ARM-adau1977-adc-Add-basic-machine-driver-for-adau19.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 9bbd8a3c8378eac9e605e0f37f4005583e122527 Mon Sep 17 00:00:00 2001 -From: Andrey Grodzovsky -Date: Tue, 3 May 2016 22:10:59 -0400 -Subject: [PATCH] ARM: adau1977-adc: Add basic machine driver for adau1977 - codec driver. - -This commit adds basic support for the codec usage including: Device tree overlay, -binding I2S bus and setting I2S mode, clock source and frequency setting according -to spec. - -Signed-off-by: Andrey Grodzovsky ---- - sound/soc/bcm/Kconfig | 7 +++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/adau1977-adc.c | 125 +++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 134 insertions(+) - create mode 100644 sound/soc/bcm/adau1977-adc.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -87,3 +87,10 @@ config SND_BCM2708_SOC_RASPIDAC3 - select SND_SOC_TPA6130A2 - help - Say Y or M if you want to add support for RaspiDAC Rev.3x. -+ -+config SND_BCM2708_SOC_ADAU1977_ADC -+ tristate "Support for ADAU1977 ADC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_ADAU1977_I2C -+ help -+ Say Y or M if you want to add support for ADAU1977 ADC. ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -9,6 +9,7 @@ snd-soc-cygnus-objs := cygnus-pcm.o cygn - obj-$(CONFIG_SND_SOC_CYGNUS) += snd-soc-cygnus.o - - # BCM2708 Machine Support -+snd-soc-adau1977-adc-objs := adau1977-adc.o - snd-soc-hifiberry-amp-objs := hifiberry_amp.o - snd-soc-hifiberry-dac-objs := hifiberry_dac.o - snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o -@@ -20,6 +21,7 @@ snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o - snd-soc-raspidac3-objs := raspidac3.o - -+obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) += snd-soc-hifiberry-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o ---- /dev/null -+++ b/sound/soc/bcm/adau1977-adc.c -@@ -0,0 +1,125 @@ -+/* -+ * ASoC Driver for ADAU1977 ADC -+ * -+ * Author: Andrey Grodzovsky -+ * Copyright 2016 -+ * -+ * This file is based on hifibery_dac driver by Florian Meier. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+enum adau1977_clk_id { -+ ADAU1977_SYSCLK, -+}; -+ -+enum adau1977_sysclk_src { -+ ADAU1977_SYSCLK_SRC_MCLK, -+ ADAU1977_SYSCLK_SRC_LRCLK, -+}; -+ -+static int eval_adau1977_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ int ret; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ -+ ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 0); -+ if (ret < 0) -+ return ret; -+ -+ return snd_soc_codec_set_sysclk(rtd->codec, ADAU1977_SYSCLK, -+ ADAU1977_SYSCLK_SRC_MCLK, 11289600, SND_SOC_CLOCK_IN); -+} -+ -+static struct snd_soc_dai_link snd_rpi_adau1977_dai[] = { -+ { -+ .name = "adau1977", -+ .stream_name = "ADAU1977", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "adau1977-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "adau1977.1-0011", -+ .init = eval_adau1977_init, -+ .dai_fmt = SND_SOC_DAIFMT_I2S | -+ SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ }, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_adau1977_adc = { -+ .name = "snd_rpi_adau1977_adc", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_adau1977_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_adau1977_dai), -+}; -+ -+static int snd_adau1977_adc_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_adau1977_adc.dev = &pdev->dev; -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_adau1977_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ } -+ -+ ret = snd_soc_register_card(&snd_adau1977_adc); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_adau1977_adc_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_adau1977_adc); -+} -+ -+static const struct of_device_id snd_adau1977_adc_of_match[] = { -+ { .compatible = "adi,adau1977-adc", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, snd_adau1977_adc_of_match); -+ -+static struct platform_driver snd_adau1977_adc_driver = { -+ .driver = { -+ .name = "snd-adau1977-adc", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_adau1977_adc_of_match, -+ }, -+ .probe = snd_adau1977_adc_probe, -+ .remove = snd_adau1977_adc_remove, -+}; -+ -+module_platform_driver(snd_adau1977_adc_driver); -+ -+MODULE_AUTHOR("Andrey Grodzovsky "); -+MODULE_DESCRIPTION("ASoC Driver for ADAU1977 ADC"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0080-Add-IQAudIO-Digi-WM8804-board-support.patch b/target/linux/brcm2708/patches-4.9/950-0080-Add-IQAudIO-Digi-WM8804-board-support.patch deleted file mode 100644 index f6a23f91f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0080-Add-IQAudIO-Digi-WM8804-board-support.patch +++ /dev/null @@ -1,295 +0,0 @@ -From 5d70e6012f390d6292ea8017cebb947a003fce00 Mon Sep 17 00:00:00 2001 -From: DigitalDreamtime -Date: Thu, 30 Jun 2016 18:38:42 +0100 -Subject: [PATCH] Add IQAudIO Digi WM8804 board support - -Support IQAudIO Digi board with iqaudio_digi machine driver and - iqaudio-digi-wm8804-audio overlay. - -NB. Machine driver is a cut and paste of hifiberry_digi code, with format - and general cleanup to comply with kernel coding standards. - -Signed-off-by: DigitalDreamtime ---- - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/iqaudio_digi.c | 239 +++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 248 insertions(+) - create mode 100644 sound/soc/bcm/iqaudio_digi.c - ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -80,6 +80,13 @@ config SND_BCM2708_SOC_IQAUDIO_DAC - help - Say Y or M if you want to add support for IQaudIO-DAC. - -+config SND_BCM2708_SOC_IQAUDIO_DIGI -+ tristate "Support for IQAudIO Digi" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8804 -+ help -+ Say Y or M if you want to add support for IQAudIO Digital IO board. -+ - config SND_BCM2708_SOC_RASPIDAC3 - tristate "Support for RaspiDAC Rev.3x" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -19,6 +19,7 @@ snd-soc-justboom-digi-objs := justboom-d - snd-soc-rpi-dac-objs := rpi-dac.o - snd-soc-rpi-proto-objs := rpi-proto.o - snd-soc-iqaudio-dac-objs := iqaudio-dac.o -+snd-soc-iqaudio-digi-objs := iqaudio_digi.o - snd-soc-raspidac3-objs := raspidac3.o - snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o - -@@ -32,6 +33,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DI - obj-$(CONFIG_SND_BCM2708_SOC_RPI_DAC) += snd-soc-rpi-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o - obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) += snd-soc-iqaudio-dac.o -+obj-$(CONFIG_SND_BCM2708_SOC_IQAUDIO_DIGI) += snd-soc-iqaudio-digi.o - obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) += snd-soc-raspidac3.o - obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o - ---- /dev/null -+++ b/sound/soc/bcm/iqaudio_digi.c -@@ -0,0 +1,239 @@ -+/* -+ * ASoC Driver for IQAudIO WM8804 Digi -+ * -+ * Author: Daniel Matuschek -+ * based on the HifiBerry DAC driver by Florian Meier -+ * Copyright 2013 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/wm8804.h" -+ -+static short int auto_shutdown_output; -+module_param(auto_shutdown_output, short, -+ S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); -+MODULE_PARM_DESC(auto_shutdown_output, "Shutdown SP/DIF output if playback is stopped"); -+ -+static int snd_rpi_iqaudio_digi_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ return 0; -+} -+ -+static int snd_rpi_iqaudio_digi_startup(struct snd_pcm_substream *substream) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* turn on digital output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x00); -+ -+ return 0; -+} -+ -+static void snd_rpi_iqaudio_digi_shutdown(struct snd_pcm_substream *substream) -+{ -+ if (auto_shutdown_output) { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ /* turn off digital output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x3c, 0x3c); -+ } -+} -+ -+ -+static int snd_rpi_iqaudio_digi_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_codec *codec = rtd->codec; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ int sysclk = 27000000; /* This is fixed on this board */ -+ -+ long mclk_freq = 0; -+ int mclk_div = 1; -+ int sampling_freq = 1; -+ -+ int ret; -+ -+ int samplerate = params_rate(params); -+ -+ if (samplerate <= 96000) { -+ mclk_freq = samplerate * 256; -+ mclk_div = WM8804_MCLKDIV_256FS; -+ } else { -+ mclk_freq = samplerate * 128; -+ mclk_div = WM8804_MCLKDIV_128FS; -+ } -+ -+ switch (samplerate) { -+ case 32000: -+ sampling_freq = 0x03; -+ break; -+ case 44100: -+ sampling_freq = 0x00; -+ break; -+ case 48000: -+ sampling_freq = 0x02; -+ break; -+ case 88200: -+ sampling_freq = 0x08; -+ break; -+ case 96000: -+ sampling_freq = 0x0a; -+ break; -+ case 176400: -+ sampling_freq = 0x0c; -+ break; -+ case 192000: -+ sampling_freq = 0x0e; -+ break; -+ default: -+ dev_err(codec->dev, "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", -+ samplerate); -+ } -+ -+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); -+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, -+ sysclk, SND_SOC_CLOCK_OUT); -+ if (ret < 0) { -+ dev_err(codec->dev, "Failed to set WM8804 SYSCLK: %d\n", ret); -+ return ret; -+ } -+ -+ /* Enable TX output */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x0); -+ -+ /* Power on */ -+ snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0); -+ -+ /* set sampling frequency status bits */ -+ snd_soc_update_bits(codec, WM8804_SPDTX4, 0x0f, sampling_freq); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_iqaudio_digi_ops = { -+ .hw_params = snd_rpi_iqaudio_digi_hw_params, -+ .startup = snd_rpi_iqaudio_digi_startup, -+ .shutdown = snd_rpi_iqaudio_digi_shutdown, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_iqaudio_digi_dai[] = { -+{ -+ .name = "IQAudIO Digi", -+ .stream_name = "IQAudIO Digi HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "wm8804-spdif", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "wm8804.1-003b", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | -+ SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ .ops = &snd_rpi_iqaudio_digi_ops, -+ .init = snd_rpi_iqaudio_digi_init, -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_iqaudio_digi = { -+ .name = "IQAudIODigi", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_iqaudio_digi_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_iqaudio_digi_dai), -+}; -+ -+static int snd_rpi_iqaudio_digi_probe(struct platform_device *pdev) -+{ -+ struct snd_soc_card *card = &snd_rpi_iqaudio_digi; -+ char *prefix = "wm8804-digi,"; -+ char prop[128]; -+ struct device_node *np; -+ int ret = 0; -+ -+ snd_rpi_iqaudio_digi.dev = &pdev->dev; -+ -+ np = pdev->dev.of_node; -+ if (np) { -+ struct snd_soc_dai_link *dai = &snd_rpi_iqaudio_digi_dai[0]; -+ struct device_node *i2s_node; -+ -+ i2s_node = of_parse_phandle(np, "i2s-controller", 0); -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ -+ snprintf(prop, sizeof(prop), "%scard-name", prefix); -+ of_property_read_string(np, prop, &card->name); -+ -+ snprintf(prop, sizeof(prop), "%sdai-name", prefix); -+ of_property_read_string(np, prop, &dai->name); -+ -+ snprintf(prop, sizeof(prop), "%sdai-stream-name", prefix); -+ of_property_read_string(np, prop, &dai->stream_name); -+ } -+ -+ ret = snd_soc_register_card(card); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", -+ ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_iqaudio_digi_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_iqaudio_digi); -+} -+ -+static const struct of_device_id snd_rpi_iqaudio_digi_of_match[] = { -+ { .compatible = "iqaudio,wm8804-digi", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_iqaudio_digi_of_match); -+ -+static struct platform_driver snd_rpi_iqaudio_digi_driver = { -+ .driver = { -+ .name = "IQAudIODigi", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_iqaudio_digi_of_match, -+ }, -+ .probe = snd_rpi_iqaudio_digi_probe, -+ .remove = snd_rpi_iqaudio_digi_remove, -+}; -+ -+module_platform_driver(snd_rpi_iqaudio_digi_driver); -+ -+MODULE_AUTHOR("Daniel Matuschek "); -+MODULE_DESCRIPTION("ASoC Driver for IQAudIO WM8804 Digi"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0095-vchiq_arm-Tweak-the-logging-output.patch b/target/linux/brcm2708/patches-4.9/950-0095-vchiq_arm-Tweak-the-logging-output.patch deleted file mode 100644 index ef3c97ddc..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0095-vchiq_arm-Tweak-the-logging-output.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 60486e8778192830c0e5369d4f05954c1f7cc12c Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 7 Mar 2016 15:05:11 +0000 -Subject: [PATCH] vchiq_arm: Tweak the logging output - -Signed-off-by: Phil Elwell ---- - .../vc04_services/interface/vchiq_arm/vchiq_core.c | 31 +++++++++------------- - 1 file changed, 13 insertions(+), 18 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c -@@ -891,16 +891,14 @@ queue_message(VCHIQ_STATE_T *state, VCHI - error_count); - return VCHIQ_ERROR; - } -- if (i == 0) { -- if (SRVTRACE_ENABLED(service, -- VCHIQ_LOG_INFO)) -- vchiq_log_dump_mem("Sent", 0, -- header->data + pos, -- min(64u, -- elements[0].size)); -- } - } - -+ if (SRVTRACE_ENABLED(service, -+ VCHIQ_LOG_INFO)) -+ vchiq_log_dump_mem("Sent", 0, -+ header->data, -+ min(16, pos)); -+ - spin_lock("a_spinlock); - service_quota->message_use_count++; - -@@ -1039,16 +1037,13 @@ queue_message_sync(VCHIQ_STATE_T *state, - error_count); - return VCHIQ_ERROR; - } -- if (i == 0) { -- if (vchiq_sync_log_level >= -- VCHIQ_LOG_TRACE) -- vchiq_log_dump_mem("Sent Sync", -- 0, header->data + pos, -- min(64u, -- elements[0].size)); -- } - } - -+ if (vchiq_sync_log_level >= VCHIQ_LOG_TRACE) -+ vchiq_log_dump_mem("Sent Sync", -+ 0, header->data, -+ min(16, pos)); -+ - VCHIQ_SERVICE_STATS_INC(service, ctrl_tx_count); - VCHIQ_SERVICE_STATS_ADD(service, ctrl_tx_bytes, size); - } else { -@@ -1720,7 +1715,7 @@ parse_rx_slots(VCHIQ_STATE_T *state) - remoteport, localport, size); - if (size > 0) - vchiq_log_dump_mem("Rcvd", 0, header->data, -- min(64, size)); -+ min(16, size)); - } - - if (((unsigned int)header & VCHIQ_SLOT_MASK) + calc_stride(size) -@@ -2187,7 +2182,7 @@ sync_func(void *v) - remoteport, localport, size); - if (size > 0) - vchiq_log_dump_mem("Rcvd", 0, header->data, -- min(64, size)); -+ min(16, size)); - } - - switch (type) { diff --git a/target/linux/brcm2708/patches-4.9/950-0096-vchiq_arm-Access-the-dequeue_pending-flag-locked.patch b/target/linux/brcm2708/patches-4.9/950-0096-vchiq_arm-Access-the-dequeue_pending-flag-locked.patch deleted file mode 100644 index 71c0e304d..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0096-vchiq_arm-Access-the-dequeue_pending-flag-locked.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 64e39b18b8d51eb332a84ef79ed3ce0dd2a76808 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 23 Mar 2016 14:16:25 +0000 -Subject: [PATCH] vchiq_arm: Access the dequeue_pending flag locked - -Reading through this code looking for another problem (now found in userland) -the use of dequeue_pending outside a lock didn't seem safe. - -Signed-off-by: Phil Elwell ---- - .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 17 ++++++++++++----- - 1 file changed, 12 insertions(+), 5 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -279,6 +279,7 @@ service_callback(VCHIQ_REASON_T reason, - USER_SERVICE_T *user_service; - VCHIQ_SERVICE_T *service; - VCHIQ_INSTANCE_T instance; -+ int skip_completion = 0; - DEBUG_INITIALISE(g_state.local) - - DEBUG_TRACE(SERVICE_CALLBACK_LINE); -@@ -345,9 +346,6 @@ service_callback(VCHIQ_REASON_T reason, - user_service->msg_queue[user_service->msg_insert & - (MSG_QUEUE_SIZE - 1)] = header; - user_service->msg_insert++; -- spin_unlock(&msg_queue_spinlock); -- -- up(&user_service->insert_event); - - /* If there is a thread waiting in DEQUEUE_MESSAGE, or if - ** there is a MESSAGE_AVAILABLE in the completion queue then -@@ -356,13 +354,22 @@ service_callback(VCHIQ_REASON_T reason, - if (((user_service->message_available_pos - - instance->completion_remove) >= 0) || - user_service->dequeue_pending) { -- DEBUG_TRACE(SERVICE_CALLBACK_LINE); - user_service->dequeue_pending = 0; -- return VCHIQ_SUCCESS; -+ skip_completion = 1; - } - -+ spin_unlock(&msg_queue_spinlock); -+ -+ up(&user_service->insert_event); -+ - header = NULL; - } -+ -+ if (skip_completion) { -+ DEBUG_TRACE(SERVICE_CALLBACK_LINE); -+ return VCHIQ_SUCCESS; -+ } -+ - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - - return add_completion(instance, reason, header, user_service, diff --git a/target/linux/brcm2708/patches-4.9/950-0097-vchiq_arm-Service-callbacks-must-not-fail.patch b/target/linux/brcm2708/patches-4.9/950-0097-vchiq_arm-Service-callbacks-must-not-fail.patch deleted file mode 100644 index f60af8530..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0097-vchiq_arm-Service-callbacks-must-not-fail.patch +++ /dev/null @@ -1,26 +0,0 @@ -From e518e4dcd42f5a9e3b32a3a54c258320c4752d7e Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 23 Mar 2016 20:53:47 +0000 -Subject: [PATCH] vchiq_arm: Service callbacks must not fail - -Service callbacks are not allowed to return an error. The internal callback -that delivers events and messages to user tasks does not enqueue them if -the service is closing, but this is not an error and should not be -reported as such. - -Signed-off-by: Phil Elwell ---- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -224,7 +224,7 @@ add_completion(VCHIQ_INSTANCE_T instance - } else if (instance->closing) { - vchiq_log_info(vchiq_arm_log_level, - "service_callback closing"); -- return VCHIQ_ERROR; -+ return VCHIQ_SUCCESS; - } - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - } diff --git a/target/linux/brcm2708/patches-4.9/950-0098-vchiq_arm-Add-completion-records-under-the-mutex.patch b/target/linux/brcm2708/patches-4.9/950-0098-vchiq_arm-Add-completion-records-under-the-mutex.patch deleted file mode 100644 index 1b8647e86..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0098-vchiq_arm-Add-completion-records-under-the-mutex.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 152fc9447942bad4e2c6c1e6b86fd252689cc596 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 21 Apr 2016 13:49:32 +0100 -Subject: [PATCH] vchiq_arm: Add completion records under the mutex - -An issue was observed when flushing openmax components -which generate a large number of messages returning -buffers to host. - -We occasionally found a duplicate message from 16 -messages prior, resulting in a buffer returned twice. - -While only one thread adds completions, without the -mutex you don't get the protection of the automatic -memory barrier you get with synchronisation objects. - -Signed-off-by: Phil Elwell ---- - .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 13 ++++++++++++- - 1 file changed, 12 insertions(+), 1 deletion(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -210,6 +210,8 @@ add_completion(VCHIQ_INSTANCE_T instance - VCHIQ_COMPLETION_DATA_T *completion; - DEBUG_INITIALISE(g_state.local) - -+ mutex_lock(&instance->completion_mutex); -+ - while (instance->completion_insert == - (instance->completion_remove + MAX_COMPLETIONS)) { - /* Out of space - wait for the client */ -@@ -217,11 +219,17 @@ add_completion(VCHIQ_INSTANCE_T instance - vchiq_log_trace(vchiq_arm_log_level, - "add_completion - completion queue full"); - DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT); -+ -+ mutex_unlock(&instance->completion_mutex); - if (down_interruptible(&instance->remove_event) != 0) { - vchiq_log_info(vchiq_arm_log_level, - "service_callback interrupted"); - return VCHIQ_RETRY; -- } else if (instance->closing) { -+ } -+ -+ mutex_lock(&instance->completion_mutex); -+ if (instance->closing) { -+ mutex_unlock(&instance->completion_mutex); - vchiq_log_info(vchiq_arm_log_level, - "service_callback closing"); - return VCHIQ_SUCCESS; -@@ -254,8 +262,11 @@ add_completion(VCHIQ_INSTANCE_T instance - if (reason == VCHIQ_MESSAGE_AVAILABLE) - user_service->message_available_pos = - instance->completion_insert; -+ - instance->completion_insert++; - -+ mutex_unlock(&instance->completion_mutex); -+ - up(&instance->insert_event); - - return VCHIQ_SUCCESS; diff --git a/target/linux/brcm2708/patches-4.9/950-0099-vchiq_arm-Avoid-use-of-mutex-in-add_completion.patch b/target/linux/brcm2708/patches-4.9/950-0099-vchiq_arm-Avoid-use-of-mutex-in-add_completion.patch deleted file mode 100644 index c8cc5b783..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0099-vchiq_arm-Avoid-use-of-mutex-in-add_completion.patch +++ /dev/null @@ -1,192 +0,0 @@ -From 965475a1620ba1c4f19d6585925a40e3c749d7d1 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 20 Jun 2016 13:51:44 +0100 -Subject: [PATCH] vchiq_arm: Avoid use of mutex in add_completion - -Claiming the completion_mutex within add_completion did prevent some -messages appearing twice, but provokes a deadlock caused by vcsm using -vchiq within a page fault handler. - -Revert the use of completion_mutex, and instead fix the original -problem using more memory barriers. - -Signed-off-by: Phil Elwell ---- - .../vc04_services/interface/vchiq_arm/vchiq_arm.c | 55 +++++++++++----------- - .../vc04_services/interface/vchiq_arm/vchiq_core.c | 14 ++++-- - 2 files changed, 37 insertions(+), 32 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -64,10 +64,10 @@ - #define VCHIQ_MINOR 0 - - /* Some per-instance constants */ --#define MAX_COMPLETIONS 16 -+#define MAX_COMPLETIONS 128 - #define MAX_SERVICES 64 - #define MAX_ELEMENTS 8 --#define MSG_QUEUE_SIZE 64 -+#define MSG_QUEUE_SIZE 128 - - #define KEEPALIVE_VER 1 - #define KEEPALIVE_VER_MIN KEEPALIVE_VER -@@ -208,28 +208,24 @@ add_completion(VCHIQ_INSTANCE_T instance - void *bulk_userdata) - { - VCHIQ_COMPLETION_DATA_T *completion; -+ int insert; - DEBUG_INITIALISE(g_state.local) - -- mutex_lock(&instance->completion_mutex); -- -- while (instance->completion_insert == -- (instance->completion_remove + MAX_COMPLETIONS)) { -+ insert = instance->completion_insert; -+ while ((insert - instance->completion_remove) >= MAX_COMPLETIONS) { - /* Out of space - wait for the client */ - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - vchiq_log_trace(vchiq_arm_log_level, - "add_completion - completion queue full"); - DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT); - -- mutex_unlock(&instance->completion_mutex); - if (down_interruptible(&instance->remove_event) != 0) { - vchiq_log_info(vchiq_arm_log_level, - "service_callback interrupted"); - return VCHIQ_RETRY; - } - -- mutex_lock(&instance->completion_mutex); - if (instance->closing) { -- mutex_unlock(&instance->completion_mutex); - vchiq_log_info(vchiq_arm_log_level, - "service_callback closing"); - return VCHIQ_SUCCESS; -@@ -237,9 +233,7 @@ add_completion(VCHIQ_INSTANCE_T instance - DEBUG_TRACE(SERVICE_CALLBACK_LINE); - } - -- completion = -- &instance->completions[instance->completion_insert & -- (MAX_COMPLETIONS - 1)]; -+ completion = &instance->completions[insert & (MAX_COMPLETIONS - 1)]; - - completion->header = header; - completion->reason = reason; -@@ -260,12 +254,9 @@ add_completion(VCHIQ_INSTANCE_T instance - wmb(); - - if (reason == VCHIQ_MESSAGE_AVAILABLE) -- user_service->message_available_pos = -- instance->completion_insert; -- -- instance->completion_insert++; -+ user_service->message_available_pos = insert; - -- mutex_unlock(&instance->completion_mutex); -+ instance->completion_insert = ++insert; - - up(&instance->insert_event); - -@@ -795,6 +786,7 @@ vchiq_ioctl(struct file *file, unsigned - instance->completion_insert) - && !instance->closing) { - int rc; -+ - DEBUG_TRACE(AWAIT_COMPLETION_LINE); - mutex_unlock(&instance->completion_mutex); - rc = down_interruptible(&instance->insert_event); -@@ -809,24 +801,29 @@ vchiq_ioctl(struct file *file, unsigned - } - DEBUG_TRACE(AWAIT_COMPLETION_LINE); - -- /* A read memory barrier is needed to stop prefetch of a stale -- ** completion record -- */ -- rmb(); -- - if (ret == 0) { - int msgbufcount = args.msgbufcount; -+ int remove; -+ -+ remove = instance->completion_remove; -+ - for (ret = 0; ret < args.count; ret++) { - VCHIQ_COMPLETION_DATA_T *completion; - VCHIQ_SERVICE_T *service; - USER_SERVICE_T *user_service; - VCHIQ_HEADER_T *header; -- if (instance->completion_remove == -- instance->completion_insert) -+ -+ if (remove == instance->completion_insert) - break; -+ - completion = &instance->completions[ -- instance->completion_remove & -- (MAX_COMPLETIONS - 1)]; -+ remove & (MAX_COMPLETIONS - 1)]; -+ -+ -+ /* A read memory barrier is needed to prevent -+ ** the prefetch of a stale completion record -+ */ -+ rmb(); - - service = completion->service_userdata; - user_service = service->base.userdata; -@@ -903,7 +900,11 @@ vchiq_ioctl(struct file *file, unsigned - break; - } - -- instance->completion_remove++; -+ /* Ensure that the above copy has completed -+ ** before advancing the remove pointer. */ -+ mb(); -+ -+ instance->completion_remove = ++remove; - } - - if (msgbufcount != args.msgbufcount) { ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c -@@ -610,15 +610,15 @@ process_free_queue(VCHIQ_STATE_T *state) - BITSET_T service_found[BITSET_SIZE(VCHIQ_MAX_SERVICES)]; - int slot_queue_available; - -- /* Use a read memory barrier to ensure that any state that may have -- ** been modified by another thread is not masked by stale prefetched -- ** values. */ -- rmb(); -- - /* Find slots which have been freed by the other side, and return them - ** to the available queue. */ - slot_queue_available = state->slot_queue_available; - -+ /* Use a memory barrier to ensure that any state that may have been -+ ** modified by another thread is not masked by stale prefetched -+ ** values. */ -+ mb(); -+ - while (slot_queue_available != local->slot_queue_recycle) { - unsigned int pos; - int slot_index = local->slot_queue[slot_queue_available++ & -@@ -626,6 +626,8 @@ process_free_queue(VCHIQ_STATE_T *state) - char *data = (char *)SLOT_DATA_FROM_INDEX(state, slot_index); - int data_found = 0; - -+ rmb(); -+ - vchiq_log_trace(vchiq_core_log_level, "%d: pfq %d=%x %x %x", - state->id, slot_index, (unsigned int)data, - local->slot_queue_recycle, slot_queue_available); -@@ -741,6 +743,8 @@ process_free_queue(VCHIQ_STATE_T *state) - up(&state->data_quota_event); - } - -+ mb(); -+ - state->slot_queue_available = slot_queue_available; - up(&state->slot_available_event); - } diff --git a/target/linux/brcm2708/patches-4.9/950-0100-staging-vchi-Convert-to-current-get_user_pages-argum.patch b/target/linux/brcm2708/patches-4.9/950-0100-staging-vchi-Convert-to-current-get_user_pages-argum.patch deleted file mode 100644 index e5038ab64..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0100-staging-vchi-Convert-to-current-get_user_pages-argum.patch +++ /dev/null @@ -1,34 +0,0 @@ -From ec643be82b145a65d9c78d24eea7470b9bb6e0c4 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 3 Oct 2016 10:14:10 -0700 -Subject: [PATCH] staging/vchi: Convert to current get_user_pages() arguments. - -Signed-off-by: Eric Anholt ---- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 2 +- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 3 +-- - 2 files changed, 2 insertions(+), 3 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c -@@ -426,7 +426,7 @@ create_pagelist(char __user *buf, size_t - *need_release = 0; /* do not try and release vmalloc pages */ - } else { - down_read(&task->mm->mmap_sem); -- actual_pages = get_user_pages(task, task->mm, -+ actual_pages = get_user_pages( - (unsigned long)buf & ~(PAGE_SIZE - 1), - num_pages, - (type == PAGELIST_READ) ? FOLL_WRITE : 0, ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -1492,8 +1492,7 @@ dump_phys_mem(void *virt_addr, uint32_t - } - - down_read(¤t->mm->mmap_sem); -- rc = get_user_pages(current, /* task */ -- current->mm, /* mm */ -+ rc = get_user_pages( - (unsigned long)virt_addr, /* start */ - num_pages, /* len */ - 0, /* gup_flags */ diff --git a/target/linux/brcm2708/patches-4.9/950-0101-staging-vchi-Update-for-rename-of-page_cache_release.patch b/target/linux/brcm2708/patches-4.9/950-0101-staging-vchi-Update-for-rename-of-page_cache_release.patch deleted file mode 100644 index 5cc5ff165..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0101-staging-vchi-Update-for-rename-of-page_cache_release.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 5e8386a65d2b7fd157d2a6e2f9b8ca79011976b7 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 3 Oct 2016 10:16:03 -0700 -Subject: [PATCH] staging/vchi: Update for rename of page_cache_release() to - put_page(). - -Signed-off-by: Eric Anholt ---- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c | 4 ++-- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 2 +- - 2 files changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c -@@ -444,7 +444,7 @@ create_pagelist(char __user *buf, size_t - while (actual_pages > 0) - { - actual_pages--; -- page_cache_release(pages[actual_pages]); -+ put_page(pages[actual_pages]); - } - kfree(pagelist); - if (actual_pages == 0) -@@ -585,7 +585,7 @@ free_pagelist(PAGELIST_T *pagelist, int - offset = 0; - set_page_dirty(pg); - } -- page_cache_release(pg); -+ put_page(pg); - } - } - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -1530,7 +1530,7 @@ dump_phys_mem(void *virt_addr, uint32_t - kunmap(page); - - for (page_idx = 0; page_idx < num_pages; page_idx++) -- page_cache_release(pages[page_idx]); -+ put_page(pages[page_idx]); - - kfree(pages); - } diff --git a/target/linux/brcm2708/patches-4.9/950-0102-drivers-vchi-Remove-dependency-on-CONFIG_BROKEN.patch b/target/linux/brcm2708/patches-4.9/950-0102-drivers-vchi-Remove-dependency-on-CONFIG_BROKEN.patch deleted file mode 100644 index 8ec807e06..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0102-drivers-vchi-Remove-dependency-on-CONFIG_BROKEN.patch +++ /dev/null @@ -1,22 +0,0 @@ -From b909c0f36c535e3f3042517d1b59b9c0538cc1d0 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 3 Oct 2016 10:21:17 -0700 -Subject: [PATCH] drivers/vchi: Remove dependency on CONFIG_BROKEN. - -The driver builds now. - -Signed-off-by: Eric Anholt ---- - drivers/staging/vc04_services/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/staging/vc04_services/Kconfig -+++ b/drivers/staging/vc04_services/Kconfig -@@ -1,6 +1,6 @@ - config BCM2708_VCHIQ - tristate "Videocore VCHIQ" -- depends on RASPBERRYPI_FIRMWARE && BROKEN -+ depends on RASPBERRYPI_FIRMWARE - default y - help - Kernel to VideoCore communication interface for the diff --git a/target/linux/brcm2708/patches-4.9/950-0103-raspberrypi-firmware-Export-the-general-transaction-.patch b/target/linux/brcm2708/patches-4.9/950-0103-raspberrypi-firmware-Export-the-general-transaction-.patch deleted file mode 100644 index a316b409c..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0103-raspberrypi-firmware-Export-the-general-transaction-.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 34454ca8cf9b63b0973fb23271810461a45a9884 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 14 Sep 2016 09:16:19 +0100 -Subject: [PATCH] raspberrypi-firmware: Export the general transaction - function. - -The vc4-firmware-kms module is going to be doing the MBOX FB call. - -Signed-off-by: Eric Anholt ---- - drivers/firmware/raspberrypi.c | 3 ++- - include/soc/bcm2835/raspberrypi-firmware.h | 1 + - 2 files changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/firmware/raspberrypi.c -+++ b/drivers/firmware/raspberrypi.c -@@ -42,7 +42,7 @@ static void response_callback(struct mbo - * Sends a request to the firmware through the BCM2835 mailbox driver, - * and synchronously waits for the reply. - */ --static int -+int - rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data) - { - u32 message = MBOX_MSG(chan, data); -@@ -63,6 +63,7 @@ rpi_firmware_transaction(struct rpi_firm - - return ret; - } -+EXPORT_SYMBOL_GPL(rpi_firmware_transaction); - - /** - * rpi_firmware_property_list - Submit firmware property list ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -131,5 +131,6 @@ int rpi_firmware_property(struct rpi_fir - int rpi_firmware_property_list(struct rpi_firmware *fw, - void *data, size_t tag_size); - struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node); -+int rpi_firmware_transaction(struct rpi_firmware *fw, u32 chan, u32 data); - - #endif /* __SOC_RASPBERRY_FIRMWARE_H__ */ diff --git a/target/linux/brcm2708/patches-4.9/950-0104-raspberrypi-firmware-Define-the-MBOX-channel-in-the-.patch b/target/linux/brcm2708/patches-4.9/950-0104-raspberrypi-firmware-Define-the-MBOX-channel-in-the-.patch deleted file mode 100644 index 0b9ef7182..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0104-raspberrypi-firmware-Define-the-MBOX-channel-in-the-.patch +++ /dev/null @@ -1,21 +0,0 @@ -From bf20c77c459b00873d5862cfe7ba745a543d53de Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 14 Sep 2016 09:18:09 +0100 -Subject: [PATCH] raspberrypi-firmware: Define the MBOX channel in the header. - -Signed-off-by: Eric Anholt ---- - include/soc/bcm2835/raspberrypi-firmware.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -12,6 +12,8 @@ - #include - #include - -+#define RPI_FIRMWARE_CHAN_FB 1 -+ - struct rpi_firmware; - - enum rpi_firmware_property_status { diff --git a/target/linux/brcm2708/patches-4.9/950-0107-i2c-bcm2835-Protect-against-unexpected-TXW-RXR-inter.patch b/target/linux/brcm2708/patches-4.9/950-0107-i2c-bcm2835-Protect-against-unexpected-TXW-RXR-inter.patch deleted file mode 100644 index 0d9b165ab..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0107-i2c-bcm2835-Protect-against-unexpected-TXW-RXR-inter.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 8feb8081c74d15ce368baa42981ca98e77800c03 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Fri, 23 Sep 2016 18:24:38 +0200 -Subject: [PATCH] i2c: bcm2835: Protect against unexpected TXW/RXR interrupts -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -If an unexpected TXW or RXR interrupt occurs (msg_buf_remaining == 0), -the driver has no way to fill/drain the FIFO to stop the interrupts. -In this case the controller has to be disabled and the transfer -completed to avoid hang. - -(CLKT | ERR) and DONE interrupts are completed in their own paths, and -the controller is disabled in the transfer function after completion. -Unite the code paths and do disabling inside the interrupt routine. - -Clear interrupt status bits in the united completion path instead of -trying to do it on every interrupt which isn't necessary. -Only CLKT, ERR and DONE can be cleared that way. - -Add the status value to the error value in case of TXW/RXR errors to -distinguish them from the other S_LEN error. - -Signed-off-by: Noralf Trønnes -Reviewed-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 40 +++++++++++++++++++++++++++++++--------- - 1 file changed, 31 insertions(+), 9 deletions(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -50,8 +50,6 @@ - #define BCM2835_I2C_S_CLKT BIT(9) - #define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */ - --#define BCM2835_I2C_BITMSK_S 0x03FF -- - #define BCM2835_I2C_CDIV_MIN 0x0002 - #define BCM2835_I2C_CDIV_MAX 0xFFFE - -@@ -111,20 +109,26 @@ static void bcm2835_drain_rxfifo(struct - } - } - -+/* -+ * Note about I2C_C_CLEAR on error: -+ * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in -+ * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through -+ * the state machine to send a NACK and a STOP. Since we're setting CLEAR -+ * without I2CEN, that NACK will be hanging around queued up for next time -+ * we start the engine. -+ */ -+ - static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data) - { - struct bcm2835_i2c_dev *i2c_dev = data; - u32 val, err; - - val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S); -- val &= BCM2835_I2C_BITMSK_S; -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, val); - - err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR); - if (err) { - i2c_dev->msg_err = err; -- complete(&i2c_dev->completion); -- return IRQ_HANDLED; -+ goto complete; - } - - if (val & BCM2835_I2C_S_DONE) { -@@ -139,21 +143,38 @@ static irqreturn_t bcm2835_i2c_isr(int t - i2c_dev->msg_err = BCM2835_I2C_S_LEN; - else - i2c_dev->msg_err = 0; -- complete(&i2c_dev->completion); -- return IRQ_HANDLED; -+ goto complete; - } - - if (val & BCM2835_I2C_S_TXW) { -+ if (!i2c_dev->msg_buf_remaining) { -+ i2c_dev->msg_err = val | BCM2835_I2C_S_LEN; -+ goto complete; -+ } -+ - bcm2835_fill_txfifo(i2c_dev); - return IRQ_HANDLED; - } - - if (val & BCM2835_I2C_S_RXR) { -+ if (!i2c_dev->msg_buf_remaining) { -+ i2c_dev->msg_err = val | BCM2835_I2C_S_LEN; -+ goto complete; -+ } -+ - bcm2835_drain_rxfifo(i2c_dev); - return IRQ_HANDLED; - } - - return IRQ_NONE; -+ -+complete: -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, BCM2835_I2C_S_CLKT | -+ BCM2835_I2C_S_ERR | BCM2835_I2C_S_DONE); -+ complete(&i2c_dev->completion); -+ -+ return IRQ_HANDLED; - } - - static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev, -@@ -183,8 +204,9 @@ static int bcm2835_i2c_xfer_msg(struct b - - time_left = wait_for_completion_timeout(&i2c_dev->completion, - BCM2835_I2C_TIMEOUT); -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); - if (!time_left) { -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, -+ BCM2835_I2C_C_CLEAR); - dev_err(i2c_dev->dev, "i2c transfer timed out\n"); - return -ETIMEDOUT; - } diff --git a/target/linux/brcm2708/patches-4.9/950-0108-i2c-bcm2835-Use-dev_dbg-logging-on-transfer-errors.patch b/target/linux/brcm2708/patches-4.9/950-0108-i2c-bcm2835-Use-dev_dbg-logging-on-transfer-errors.patch deleted file mode 100644 index a3c68467b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0108-i2c-bcm2835-Use-dev_dbg-logging-on-transfer-errors.patch +++ /dev/null @@ -1,32 +0,0 @@ -From bff25210b88dc7b71ee9c2626e42a939072dec64 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Mon, 19 Sep 2016 17:19:41 +0200 -Subject: [PATCH] i2c: bcm2835: Use dev_dbg logging on transfer errors -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Writing to an AT24C32 generates on average 2x i2c transfer errors per -32-byte page write. Which amounts to a lot for a 4k write. This is due -to the fact that the chip doesn't respond during it's internal write -cycle when the at24 driver tries and retries the next write. -Only a handful drivers use dev_err() on transfer error, so switch to -dev_dbg() instead. - -Signed-off-by: Noralf Trønnes -Reviewed-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -218,7 +218,7 @@ static int bcm2835_i2c_xfer_msg(struct b - (msg->flags & I2C_M_IGNORE_NAK)) - return 0; - -- dev_err(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err); -+ dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err); - - if (i2c_dev->msg_err & BCM2835_I2C_S_ERR) - return -EREMOTEIO; diff --git a/target/linux/brcm2708/patches-4.9/950-0109-i2c-bcm2835-Can-t-support-I2C_M_IGNORE_NAK.patch b/target/linux/brcm2708/patches-4.9/950-0109-i2c-bcm2835-Can-t-support-I2C_M_IGNORE_NAK.patch deleted file mode 100644 index 65bf08fe8..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0109-i2c-bcm2835-Can-t-support-I2C_M_IGNORE_NAK.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 40c63177d4c0f4755a148503c3b8bb2192ce8c0e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Thu, 22 Sep 2016 22:05:50 +0200 -Subject: [PATCH] i2c: bcm2835: Can't support I2C_M_IGNORE_NAK -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The controller can't support this flag, so remove it. - -Documentation/i2c/i2c-protocol states that all of the message is sent: - -I2C_M_IGNORE_NAK: - Normally message is interrupted immediately if there is [NA] from the - client. Setting this flag treats any [NA] as [A], and all of - message is sent. - -From the BCM2835 ARM Peripherals datasheet: - - The ERR field is set when the slave fails to acknowledge either - its address or a data byte written to it. - -So when the controller doesn't receive an ack, it sets ERR and raises -an interrupt. In other words, the whole message is not sent. - -Signed-off-by: Noralf Trønnes -Reviewed-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 4 ---- - 1 file changed, 4 deletions(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -214,10 +214,6 @@ static int bcm2835_i2c_xfer_msg(struct b - if (likely(!i2c_dev->msg_err)) - return 0; - -- if ((i2c_dev->msg_err & BCM2835_I2C_S_ERR) && -- (msg->flags & I2C_M_IGNORE_NAK)) -- return 0; -- - dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err); - - if (i2c_dev->msg_err & BCM2835_I2C_S_ERR) diff --git a/target/linux/brcm2708/patches-4.9/950-0110-i2c-bcm2835-Add-support-for-Repeated-Start-Condition.patch b/target/linux/brcm2708/patches-4.9/950-0110-i2c-bcm2835-Add-support-for-Repeated-Start-Condition.patch deleted file mode 100644 index 9ae16e426..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0110-i2c-bcm2835-Add-support-for-Repeated-Start-Condition.patch +++ /dev/null @@ -1,181 +0,0 @@ -From db656eb11aebb0d7e4b833f9b452503ddb1351f1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Fri, 23 Sep 2016 04:54:27 +0200 -Subject: [PATCH] i2c: bcm2835: Add support for Repeated Start Condition -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Documentation/i2c/i2c-protocol states that Combined transactions should -separate messages with a Start bit and end the whole transaction with a -Stop bit. This patch adds support for issuing only a Start between -messages instead of a Stop followed by a Start. - -This implementation differs from downstream i2c-bcm2708 in 2 respects: -- it uses an interrupt to detect that the transfer is active instead - of using polling. There is no interrupt for Transfer Active, but by - not prefilling the FIFO it's possible to use the TXW interrupt. -- when resetting/disabling the controller between transfers it writes - CLEAR to the control register instead of just zero. - Using just zero gave many errors. This might be the reason why - downstream had to disable this feature and make it available with a - module parameter. - -I have run thousands of transfers to a DS1307 (rtc), MMA8451 (accel) -and AT24C32 (eeprom) in parallel without problems. - -Signed-off-by: Noralf Trønnes -Acked-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 101 ++++++++++++++++++++++++--------------- - 1 file changed, 63 insertions(+), 38 deletions(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -63,6 +63,7 @@ struct bcm2835_i2c_dev { - struct i2c_adapter adapter; - struct completion completion; - struct i2c_msg *curr_msg; -+ int num_msgs; - u32 msg_err; - u8 *msg_buf; - size_t msg_buf_remaining; -@@ -110,6 +111,45 @@ static void bcm2835_drain_rxfifo(struct - } - - /* -+ * Repeated Start Condition (Sr) -+ * The BCM2835 ARM Peripherals datasheet mentions a way to trigger a Sr when it -+ * talks about reading from a slave with 10 bit address. This is achieved by -+ * issuing a write, poll the I2CS.TA flag and wait for it to be set, and then -+ * issue a read. -+ * A comment in https://github.com/raspberrypi/linux/issues/254 shows how the -+ * firmware actually does it using polling and says that it's a workaround for -+ * a problem in the state machine. -+ * It turns out that it is possible to use the TXW interrupt to know when the -+ * transfer is active, provided the FIFO has not been prefilled. -+ */ -+ -+static void bcm2835_i2c_start_transfer(struct bcm2835_i2c_dev *i2c_dev) -+{ -+ u32 c = BCM2835_I2C_C_ST | BCM2835_I2C_C_I2CEN; -+ struct i2c_msg *msg = i2c_dev->curr_msg; -+ bool last_msg = (i2c_dev->num_msgs == 1); -+ -+ if (!i2c_dev->num_msgs) -+ return; -+ -+ i2c_dev->num_msgs--; -+ i2c_dev->msg_buf = msg->buf; -+ i2c_dev->msg_buf_remaining = msg->len; -+ -+ if (msg->flags & I2C_M_RD) -+ c |= BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR; -+ else -+ c |= BCM2835_I2C_C_INTT; -+ -+ if (last_msg) -+ c |= BCM2835_I2C_C_INTD; -+ -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr); -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len); -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c); -+} -+ -+/* - * Note about I2C_C_CLEAR on error: - * The I2C_C_CLEAR on errors will take some time to resolve -- if you were in - * non-idle state and I2C_C_READ, it sets an abort_rx flag and runs through -@@ -153,6 +193,12 @@ static irqreturn_t bcm2835_i2c_isr(int t - } - - bcm2835_fill_txfifo(i2c_dev); -+ -+ if (i2c_dev->num_msgs && !i2c_dev->msg_buf_remaining) { -+ i2c_dev->curr_msg++; -+ bcm2835_i2c_start_transfer(i2c_dev); -+ } -+ - return IRQ_HANDLED; - } - -@@ -177,30 +223,25 @@ complete: - return IRQ_HANDLED; - } - --static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev, -- struct i2c_msg *msg) -+static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], -+ int num) - { -- u32 c; -+ struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); - unsigned long time_left; -+ int i; - -- i2c_dev->curr_msg = msg; -- i2c_dev->msg_buf = msg->buf; -- i2c_dev->msg_buf_remaining = msg->len; -- reinit_completion(&i2c_dev->completion); -- -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR); -+ for (i = 0; i < (num - 1); i++) -+ if (msgs[i].flags & I2C_M_RD) { -+ dev_warn_once(i2c_dev->dev, -+ "only one read message supported, has to be last\n"); -+ return -EOPNOTSUPP; -+ } - -- if (msg->flags & I2C_M_RD) { -- c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR; -- } else { -- c = BCM2835_I2C_C_INTT; -- bcm2835_fill_txfifo(i2c_dev); -- } -- c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN; -+ i2c_dev->curr_msg = msgs; -+ i2c_dev->num_msgs = num; -+ reinit_completion(&i2c_dev->completion); - -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr); -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len); -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c); -+ bcm2835_i2c_start_transfer(i2c_dev); - - time_left = wait_for_completion_timeout(&i2c_dev->completion, - BCM2835_I2C_TIMEOUT); -@@ -211,31 +252,15 @@ static int bcm2835_i2c_xfer_msg(struct b - return -ETIMEDOUT; - } - -- if (likely(!i2c_dev->msg_err)) -- return 0; -+ if (!i2c_dev->msg_err) -+ return num; - - dev_dbg(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err); - - if (i2c_dev->msg_err & BCM2835_I2C_S_ERR) - return -EREMOTEIO; -- else -- return -EIO; --} -- --static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], -- int num) --{ -- struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); -- int i; -- int ret = 0; -- -- for (i = 0; i < num; i++) { -- ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]); -- if (ret) -- break; -- } - -- return ret ?: i; -+ return -EIO; - } - - static u32 bcm2835_i2c_func(struct i2c_adapter *adap) diff --git a/target/linux/brcm2708/patches-4.9/950-0111-i2c-bcm2835-Support-i2c-dev-ioctl-I2C_TIMEOUT.patch b/target/linux/brcm2708/patches-4.9/950-0111-i2c-bcm2835-Support-i2c-dev-ioctl-I2C_TIMEOUT.patch deleted file mode 100644 index d939c1d6f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0111-i2c-bcm2835-Support-i2c-dev-ioctl-I2C_TIMEOUT.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 0c2744e901150b27a60bded1acb058ce26709d5a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Fri, 23 Sep 2016 04:57:17 +0200 -Subject: [PATCH] i2c: bcm2835: Support i2c-dev ioctl I2C_TIMEOUT -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Use i2c_adapter->timeout for the completion timeout value. The core -default is 1 second. - -Signed-off-by: Noralf Trønnes -Reviewed-by: Eric Anholt ---- - drivers/i2c/busses/i2c-bcm2835.c | 4 +--- - 1 file changed, 1 insertion(+), 3 deletions(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -53,8 +53,6 @@ - #define BCM2835_I2C_CDIV_MIN 0x0002 - #define BCM2835_I2C_CDIV_MAX 0xFFFE - --#define BCM2835_I2C_TIMEOUT (msecs_to_jiffies(1000)) -- - struct bcm2835_i2c_dev { - struct device *dev; - void __iomem *regs; -@@ -244,7 +242,7 @@ static int bcm2835_i2c_xfer(struct i2c_a - bcm2835_i2c_start_transfer(i2c_dev); - - time_left = wait_for_completion_timeout(&i2c_dev->completion, -- BCM2835_I2C_TIMEOUT); -+ adap->timeout); - if (!time_left) { - bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, - BCM2835_I2C_C_CLEAR); diff --git a/target/linux/brcm2708/patches-4.9/950-0112-i2c-bcm2835-Add-support-for-dynamic-clock.patch b/target/linux/brcm2708/patches-4.9/950-0112-i2c-bcm2835-Add-support-for-dynamic-clock.patch deleted file mode 100644 index d287ae2cb..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0112-i2c-bcm2835-Add-support-for-dynamic-clock.patch +++ /dev/null @@ -1,117 +0,0 @@ -From ce8663f1f101f8c7b9037c31269b0b31373737ad Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= -Date: Tue, 27 Sep 2016 01:00:08 +0200 -Subject: [PATCH] i2c: bcm2835: Add support for dynamic clock -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Support a dynamic clock by reading the frequency and setting the -divisor in the transfer function instead of during probe. - -Signed-off-by: Noralf Trønnes -Reviewed-by: Martin Sperl ---- - drivers/i2c/busses/i2c-bcm2835.c | 51 +++++++++++++++++++++++++--------------- - 1 file changed, 32 insertions(+), 19 deletions(-) - ---- a/drivers/i2c/busses/i2c-bcm2835.c -+++ b/drivers/i2c/busses/i2c-bcm2835.c -@@ -58,6 +58,7 @@ struct bcm2835_i2c_dev { - void __iomem *regs; - struct clk *clk; - int irq; -+ u32 bus_clk_rate; - struct i2c_adapter adapter; - struct completion completion; - struct i2c_msg *curr_msg; -@@ -78,6 +79,30 @@ static inline u32 bcm2835_i2c_readl(stru - return readl(i2c_dev->regs + reg); - } - -+static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev) -+{ -+ u32 divider; -+ -+ divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), -+ i2c_dev->bus_clk_rate); -+ /* -+ * Per the datasheet, the register is always interpreted as an even -+ * number, by rounding down. In other words, the LSB is ignored. So, -+ * if the LSB is set, increment the divider to avoid any issue. -+ */ -+ if (divider & 1) -+ divider++; -+ if ((divider < BCM2835_I2C_CDIV_MIN) || -+ (divider > BCM2835_I2C_CDIV_MAX)) { -+ dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n"); -+ return -EINVAL; -+ } -+ -+ bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); -+ -+ return 0; -+} -+ - static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev) - { - u32 val; -@@ -226,7 +251,7 @@ static int bcm2835_i2c_xfer(struct i2c_a - { - struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap); - unsigned long time_left; -- int i; -+ int i, ret; - - for (i = 0; i < (num - 1); i++) - if (msgs[i].flags & I2C_M_RD) { -@@ -235,6 +260,10 @@ static int bcm2835_i2c_xfer(struct i2c_a - return -EOPNOTSUPP; - } - -+ ret = bcm2835_i2c_set_divider(i2c_dev); -+ if (ret) -+ return ret; -+ - i2c_dev->curr_msg = msgs; - i2c_dev->num_msgs = num; - reinit_completion(&i2c_dev->completion); -@@ -284,7 +313,6 @@ static int bcm2835_i2c_probe(struct plat - { - struct bcm2835_i2c_dev *i2c_dev; - struct resource *mem, *irq; -- u32 bus_clk_rate, divider; - int ret; - struct i2c_adapter *adap; - -@@ -308,28 +336,13 @@ static int bcm2835_i2c_probe(struct plat - } - - ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", -- &bus_clk_rate); -+ &i2c_dev->bus_clk_rate); - if (ret < 0) { - dev_warn(&pdev->dev, - "Could not read clock-frequency property\n"); -- bus_clk_rate = 100000; -+ i2c_dev->bus_clk_rate = 100000; - } - -- divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate); -- /* -- * Per the datasheet, the register is always interpreted as an even -- * number, by rounding down. In other words, the LSB is ignored. So, -- * if the LSB is set, increment the divider to avoid any issue. -- */ -- if (divider & 1) -- divider++; -- if ((divider < BCM2835_I2C_CDIV_MIN) || -- (divider > BCM2835_I2C_CDIV_MAX)) { -- dev_err(&pdev->dev, "Invalid clock-frequency\n"); -- return -ENODEV; -- } -- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider); -- - irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!irq) { - dev_err(&pdev->dev, "No IRQ resource\n"); diff --git a/target/linux/brcm2708/patches-4.9/950-0114-arm64-Add-CONFIG_ARCH_BCM2835.patch b/target/linux/brcm2708/patches-4.9/950-0114-arm64-Add-CONFIG_ARCH_BCM2835.patch deleted file mode 100644 index 34ab47e7b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0114-arm64-Add-CONFIG_ARCH_BCM2835.patch +++ /dev/null @@ -1,16 +0,0 @@ -From c3dc479ae9620756f981ad2c5afeee92295f8ea3 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Sat, 31 Dec 2016 14:15:50 +0000 -Subject: [PATCH] arm64: Add CONFIG_ARCH_BCM2835 - ---- - arch/arm64/configs/bcmrpi3_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -1332,3 +1332,4 @@ CONFIG_ARM64_CRYPTO=y - CONFIG_CRC_ITU_T=y - CONFIG_LIBCRC32C=y - CONFIG_BCM2708_VCHIQ=n -+CONFIG_ARCH_BCM2835=y diff --git a/target/linux/brcm2708/patches-4.9/950-0115-Add-support-for-Silicon-Labs-Si7013-20-21-humidity-t.patch b/target/linux/brcm2708/patches-4.9/950-0115-Add-support-for-Silicon-Labs-Si7013-20-21-humidity-t.patch deleted file mode 100644 index 119b05426..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0115-Add-support-for-Silicon-Labs-Si7013-20-21-humidity-t.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 69d0de7d07ec016f2956237ec141bb62ff7ae36c Mon Sep 17 00:00:00 2001 -From: Alex Tucker -Date: Tue, 13 Dec 2016 19:50:18 +0000 -Subject: [PATCH] Add support for Silicon Labs Si7013/20/21 - humidity/temperature sensor. - ---- - arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts | 49 +++++++++++++---------- - 1 file changed, 28 insertions(+), 21 deletions(-) - ---- a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts -+++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts -@@ -1,34 +1,41 @@ --// Definitions for a few digital barometric pressure and temperature sensors -+// Definitions for I2C based sensors using the Industrial IO interface. - /dts-v1/; - /plugin/; - - / { -- compatible = "brcm,bcm2708"; -+ compatible = "brcm,bcm2708"; - -- fragment@0 { -- target = <&i2c_arm>; -- __overlay__ { -- #address-cells = <1>; -- #size-cells = <0>; -- status = "okay"; -- -- bmp085: bmp085@77 { -- compatible = "bosch,bmp085"; -- reg = <0x77>; -- default-oversampling = <3>; -- status = "disable"; -- }; -- -- bmp280: bmp280@76 { -- compatible = "bosch,bmp280"; -- reg = <0x76>; -- status = "disable"; -- }; -- }; -- }; -+ fragment@0 { -+ target = <&i2c_arm>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ bmp085: bmp085@77 { -+ compatible = "bosch,bmp085"; -+ reg = <0x77>; -+ default-oversampling = <3>; -+ status = "disable"; -+ }; -+ -+ bmp280: bmp280@76 { -+ compatible = "bosch,bmp280"; -+ reg = <0x76>; -+ status = "disable"; -+ }; -+ -+ si7020: si7020@40 { -+ compatible = "si7020"; -+ reg = <0x40>; -+ status = "disable"; -+ }; -+ }; -+ }; - - __overrides__ { - bmp085 = <&bmp085>,"status"; - bmp280 = <&bmp280>,"status"; -+ si7020 = <&si7020>,"status"; - }; - }; diff --git a/target/linux/brcm2708/patches-4.9/950-0116-Document-the-si7020-option.patch b/target/linux/brcm2708/patches-4.9/950-0116-Document-the-si7020-option.patch deleted file mode 100644 index 0319ca43a..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0116-Document-the-si7020-option.patch +++ /dev/null @@ -1,21 +0,0 @@ -From ed753b7389b8c65af0b4266c001ef0343fb1c30e Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 3 Jan 2017 21:27:46 +0000 -Subject: [PATCH] Document the si7020 option - ---- - arch/arm/boot/dts/overlays/README | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -549,6 +549,9 @@ Params: bmp085 Select t - - bmp280 Select the Bosch sensortronic BMP280 - -+ si7020 Select the Silicon Labs Si7013/20/21 humidity/ -+ temperature sensor -+ - - Name: i2c0-bcm2708 - Info: Enable the i2c_bcm2708 driver for the i2c0 bus. Not all pin combinations diff --git a/target/linux/brcm2708/patches-4.9/950-0117-pisound-improvements.patch b/target/linux/brcm2708/patches-4.9/950-0117-pisound-improvements.patch deleted file mode 100644 index f914bfc3a..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0117-pisound-improvements.patch +++ /dev/null @@ -1,294 +0,0 @@ -From 8ed8e29b19dba95a7a6c2364c2bb32d926601713 Mon Sep 17 00:00:00 2001 -From: Giedrius Trainavicius -Date: Thu, 5 Jan 2017 02:38:16 +0200 -Subject: [PATCH] pisound improvements: - -* Added a writable sysfs object to enable scripts / user space software -to blink MIDI activity LEDs for variable duration. -* Improved hw_param constraints setting. -* Added compatibility with S16_LE sample format. -* Exposed some simple placeholder volume controls, so the card appears -in volumealsa widget. - -Signed-off-by: Giedrius Trainavicius ---- - sound/soc/bcm/pisound.c | 175 ++++++++++++++++++++++++++++++++++++++++++------ - 1 file changed, 154 insertions(+), 21 deletions(-) - ---- a/sound/soc/bcm/pisound.c -+++ b/sound/soc/bcm/pisound.c -@@ -36,6 +36,7 @@ - #include - #include - #include -+#include - - static int pisnd_spi_init(struct device *dev); - static void pisnd_spi_uninit(void); -@@ -214,6 +215,9 @@ static char g_serial_num[11]; - static char g_id[25]; - static char g_version[5]; - -+static uint8_t g_ledFlashDuration; -+static bool g_ledFlashDurationChanged; -+ - DEFINE_KFIFO(spi_fifo_in, uint8_t, FIFO_SIZE); - DEFINE_KFIFO(spi_fifo_out, uint8_t, FIFO_SIZE); - -@@ -396,8 +400,13 @@ static void pisnd_work_handler(struct wo - val = 0; - tx = 0; - -- if (kfifo_get(&spi_fifo_out, &val)) -+ if (g_ledFlashDurationChanged) { -+ tx = 0xf000 | g_ledFlashDuration; -+ g_ledFlashDuration = 0; -+ g_ledFlashDurationChanged = false; -+ } else if (kfifo_get(&spi_fifo_out, &val)) { - tx = 0x0f00 | val; -+ } - - rx = spi_transfer16(tx); - -@@ -410,6 +419,7 @@ static void pisnd_work_handler(struct wo - } while (rx != 0 - || !kfifo_is_empty(&spi_fifo_out) - || pisnd_spi_has_more() -+ || g_ledFlashDurationChanged - ); - - if (!kfifo_is_empty(&spi_fifo_in) && g_recvCallback) -@@ -569,7 +579,7 @@ static int pisnd_spi_init(struct device - } - - /* Flash the LEDs. */ -- spi_transfer16(0xf000); -+ spi_transfer16(0xf008); - - ret = pisnd_spi_gpio_irq_init(dev); - if (ret < 0) { -@@ -610,6 +620,14 @@ static void pisnd_spi_uninit(void) - pisnd_spi_gpio_uninit(); - } - -+static void pisnd_spi_flash_leds(uint8_t duration) -+{ -+ g_ledFlashDuration = duration; -+ g_ledFlashDurationChanged = true; -+ printd("schedule from spi_flash_leds\n"); -+ pisnd_schedule_process(TASK_PROCESS); -+} -+ - static void pisnd_spi_send(uint8_t val) - { - kfifo_put(&spi_fifo_out, val); -@@ -658,6 +676,83 @@ static const struct of_device_id pisound - {}, - }; - -+enum { -+ SWITCH = 0, -+ VOLUME = 1, -+}; -+ -+static int pisnd_ctl_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ if (kcontrol->private_value == SWITCH) { -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ return 0; -+ } else if (kcontrol->private_value == VOLUME) { -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 100; -+ return 0; -+ } -+ return -EINVAL; -+} -+ -+static int pisnd_ctl_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ if (kcontrol->private_value == SWITCH) { -+ ucontrol->value.integer.value[0] = 1; -+ return 0; -+ } else if (kcontrol->private_value == VOLUME) { -+ ucontrol->value.integer.value[0] = 100; -+ return 0; -+ } -+ -+ return -EINVAL; -+} -+ -+static struct snd_kcontrol_new pisnd_ctl[] = { -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PCM Playback Switch", -+ .index = 0, -+ .private_value = SWITCH, -+ .access = SNDRV_CTL_ELEM_ACCESS_READ, -+ .info = pisnd_ctl_info, -+ .get = pisnd_ctl_get, -+ }, -+ { -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PCM Playback Volume", -+ .index = 0, -+ .private_value = VOLUME, -+ .access = SNDRV_CTL_ELEM_ACCESS_READ, -+ .info = pisnd_ctl_info, -+ .get = pisnd_ctl_get, -+ }, -+}; -+ -+static int pisnd_ctl_init(struct snd_card *card) -+{ -+ int err, i; -+ -+ for (i = 0; i < ARRAY_SIZE(pisnd_ctl); ++i) { -+ err = snd_ctl_add(card, snd_ctl_new1(&pisnd_ctl[i], NULL)); -+ if (err < 0) -+ return err; -+ } -+ -+ return 0; -+} -+ -+static int pisnd_ctl_uninit(void) -+{ -+ return 0; -+} -+ - static struct gpio_desc *osr0, *osr1, *osr2; - static struct gpio_desc *reset; - static struct gpio_desc *button; -@@ -667,6 +762,14 @@ static int pisnd_hw_params( - struct snd_pcm_hw_params *params - ) - { -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ /* pisound runs on fixed 32 clock counts per channel, -+ * as generated by the master ADC. -+ */ -+ snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2); -+ - printd("rate = %d\n", params_rate(params)); - printd("ch = %d\n", params_channels(params)); - printd("bits = %u\n", -@@ -711,16 +814,6 @@ static struct snd_pcm_hw_constraint_list - .mask = 0, - }; - --static unsigned int sample_bits[] = { -- 24, 32 --}; -- --static struct snd_pcm_hw_constraint_list constraints_sample_bits = { -- .count = ARRAY_SIZE(sample_bits), -- .list = sample_bits, -- .mask = 0, --}; -- - static int pisnd_startup(struct snd_pcm_substream *substream) - { - int err = snd_pcm_hw_constraint_list( -@@ -733,11 +826,21 @@ static int pisnd_startup(struct snd_pcm_ - if (err < 0) - return err; - -- err = snd_pcm_hw_constraint_list( -+ err = snd_pcm_hw_constraint_single( - substream->runtime, -- 0, -- SNDRV_PCM_HW_PARAM_SAMPLE_BITS, -- &constraints_sample_bits -+ SNDRV_PCM_HW_PARAM_CHANNELS, -+ 2 -+ ); -+ -+ if (err < 0) -+ return err; -+ -+ err = snd_pcm_hw_constraint_mask64( -+ substream->runtime, -+ SNDRV_PCM_HW_PARAM_FORMAT, -+ SNDRV_PCM_FMTBIT_S16_LE | -+ SNDRV_PCM_FMTBIT_S24_LE | -+ SNDRV_PCM_FMTBIT_S32_LE - ); - - if (err < 0) -@@ -771,14 +874,23 @@ static int pisnd_card_probe(struct snd_s - { - int err = pisnd_midi_init(card->snd_card); - -- if (err < 0) -+ if (err < 0) { - printe("pisnd_midi_init failed: %d\n", err); -+ return err; -+ } - -- return err; -+ err = pisnd_ctl_init(card->snd_card); -+ if (err < 0) { -+ printe("pisnd_ctl_init failed: %d\n", err); -+ return err; -+ } -+ -+ return 0; - } - - static int pisnd_card_remove(struct snd_soc_card *card) - { -+ pisnd_ctl_uninit(); - pisnd_midi_uninit(); - return 0; - } -@@ -870,17 +982,38 @@ static ssize_t pisnd_version_show( - return sprintf(buf, "%s\n", pisnd_spi_get_version()); - } - -+static ssize_t pisnd_led_store( -+ struct kobject *kobj, -+ struct kobj_attribute *attr, -+ const char *buf, -+ size_t length -+ ) -+{ -+ uint32_t timeout; -+ int err; -+ -+ err = kstrtou32(buf, 10, &timeout); -+ -+ if (err == 0 && timeout <= 255) -+ pisnd_spi_flash_leds(timeout); -+ -+ return length; -+} -+ - static struct kobj_attribute pisnd_serial_attribute = -- __ATTR(serial, 0644, pisnd_serial_show, NULL); -+ __ATTR(serial, 0444, pisnd_serial_show, NULL); - static struct kobj_attribute pisnd_id_attribute = -- __ATTR(id, 0644, pisnd_id_show, NULL); -+ __ATTR(id, 0444, pisnd_id_show, NULL); - static struct kobj_attribute pisnd_version_attribute = -- __ATTR(version, 0644, pisnd_version_show, NULL); -+ __ATTR(version, 0444, pisnd_version_show, NULL); -+static struct kobj_attribute pisnd_led_attribute = -+ __ATTR(led, 0644, NULL, pisnd_led_store); - - static struct attribute *attrs[] = { - &pisnd_serial_attribute.attr, - &pisnd_id_attribute.attr, - &pisnd_version_attribute.attr, -+ &pisnd_led_attribute.attr, - NULL - }; - diff --git a/target/linux/brcm2708/patches-4.9/950-0118-Add-driver_name-property.patch b/target/linux/brcm2708/patches-4.9/950-0118-Add-driver_name-property.patch deleted file mode 100644 index bfda58aa5..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0118-Add-driver_name-property.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 341bc67d361def1f23a96c512ab6bc39f32b3601 Mon Sep 17 00:00:00 2001 -From: Aaron Shaw -Date: Tue, 10 Jan 2017 16:05:41 +0000 -Subject: [PATCH] Add driver_name property - -Add driver name property for use with 5.1 passthrough audio in LibreElec and other Kodi based OSs ---- - sound/soc/bcm/justboom-dac.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/sound/soc/bcm/justboom-dac.c -+++ b/sound/soc/bcm/justboom-dac.c -@@ -98,6 +98,7 @@ static struct snd_soc_dai_link snd_rpi_j - /* audio machine driver */ - static struct snd_soc_card snd_rpi_justboom_dac = { - .name = "snd_rpi_justboom_dac", -+ .driver_name = "JustBoomDac", - .owner = THIS_MODULE, - .dai_link = snd_rpi_justboom_dac_dai, - .num_links = ARRAY_SIZE(snd_rpi_justboom_dac_dai), diff --git a/target/linux/brcm2708/patches-4.9/950-0119-Add-driver_name-paramater.patch b/target/linux/brcm2708/patches-4.9/950-0119-Add-driver_name-paramater.patch deleted file mode 100644 index 2a3a6d806..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0119-Add-driver_name-paramater.patch +++ /dev/null @@ -1,20 +0,0 @@ -From d87b665c7e4c09bf713ef6f45ceb11a8aacbcf5e Mon Sep 17 00:00:00 2001 -From: Aaron Shaw -Date: Tue, 10 Jan 2017 16:11:04 +0000 -Subject: [PATCH] Add driver_name paramater - -Add driver_name parameter for use with 5.1 passthrough audio in LibreElec and other Kodi OSs ---- - sound/soc/bcm/justboom-digi.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/sound/soc/bcm/justboom-digi.c -+++ b/sound/soc/bcm/justboom-digi.c -@@ -154,6 +154,7 @@ static struct snd_soc_dai_link snd_rpi_j - /* audio machine driver */ - static struct snd_soc_card snd_rpi_justboom_digi = { - .name = "snd_rpi_justboom_digi", -+ .driver_name = "JustBoomDigi", - .owner = THIS_MODULE, - .dai_link = snd_rpi_justboom_digi_dai, - .num_links = ARRAY_SIZE(snd_rpi_justboom_digi_dai), diff --git a/target/linux/brcm2708/patches-4.9/950-0120-BCM270X_DT-Add-pi3-disable-wifi-overlay.patch b/target/linux/brcm2708/patches-4.9/950-0120-BCM270X_DT-Add-pi3-disable-wifi-overlay.patch deleted file mode 100644 index 4bc80bef0..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0120-BCM270X_DT-Add-pi3-disable-wifi-overlay.patch +++ /dev/null @@ -1,56 +0,0 @@ -From b76839857c9b553f52f8d14cf54a22579b362db9 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 11 Jan 2017 13:01:21 +0000 -Subject: [PATCH] BCM270X_DT: Add pi3-disable-wifi overlay - -pi3-disable-wifi is a minimal overlay to disable the onboard WiFi. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 ++++++ - arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts | 13 +++++++++++++ - 3 files changed, 20 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -51,6 +51,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - mz61581.dtbo \ - pi3-act-led.dtbo \ - pi3-disable-bt.dtbo \ -+ pi3-disable-wifi.dtbo \ - pi3-miniuart-bt.dtbo \ - piscreen.dtbo \ - piscreen2r.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -800,6 +800,12 @@ Load: dtoverlay=pi3-disable-bt - Params: - - -+Name: pi3-disable-wifi -+Info: Disable Pi3 onboard WiFi -+Load: dtoverlay=pi3-disable-wifi -+Params: -+ -+ - Name: pi3-miniuart-bt - Info: Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore - UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/pi3-disable-wifi-overlay.dts -@@ -0,0 +1,13 @@ -+/dts-v1/; -+/plugin/; -+ -+/{ -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target = <&mmc>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch b/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch deleted file mode 100644 index 346562246..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch +++ /dev/null @@ -1,401 +0,0 @@ -From fe3c34c6196cfc708a515e44dd432da0e6cc0aba Mon Sep 17 00:00:00 2001 -From: Electron752 -Date: Thu, 12 Jan 2017 07:07:08 -0800 -Subject: [PATCH] ARM64: Make it work again on 4.9 (#1790) - -* Invoke the dtc compiler with the same options used in arm mode. -* ARM64 now uses the bcm2835 platform just like ARM32. -* ARM64: Update bcmrpi3_defconfig - -Signed-off-by: Michael Zoran ---- - arch/arm64/Kconfig.platforms | 22 ------ - arch/arm64/boot/dts/broadcom/Makefile | 10 ++- - arch/arm64/boot/dts/overlays | 1 + - arch/arm64/configs/bcmrpi3_defconfig | 126 ++++++++++------------------------ - 4 files changed, 48 insertions(+), 111 deletions(-) - create mode 120000 arch/arm64/boot/dts/overlays - ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -1,27 +1,5 @@ - menu "Platform selection" - --config MACH_BCM2709 -- bool -- --config ARCH_BCM2709 -- bool "Broadcom BCM2709 family" -- select MACH_BCM2709 -- select HAVE_SMP -- select ARM_AMBA -- select COMMON_CLK -- select ARCH_HAS_CPUFREQ -- select GENERIC_CLOCKEVENTS -- select MULTI_IRQ_HANDLER -- select SPARSE_IRQ -- select MFD_SYSCON -- select VC4 -- select USE_OF -- select ARCH_REQUIRE_GPIOLIB -- select PINCTRL -- select PINCTRL_BCM2835 -- help -- This enables support for Broadcom BCM2709 boards. -- - config ARCH_SUNXI - bool "Allwinner sunxi 64-bit SoC Family" - select GENERIC_IRQ_CHIP ---- a/arch/arm64/boot/dts/broadcom/Makefile -+++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -1,7 +1,15 @@ -+# Enable fixups to support overlays on BCM2835 platforms -+ -+ifeq ($(CONFIG_ARCH_BCM2835),y) -+DTC_FLAGS ?= -@ -H epapr -+endif -+ - dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb - dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb - dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb --dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb -+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb -+ -+dts-dirs += ../overlays - - always := $(dtb-y) - subdir-y := $(dts-dirs) -diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays -new file mode 120000 -index 0000000..ded0864 ---- /dev/null -+++ b/arch/arm64/boot/dts/overlays -@@ -0,0 +1 @@ -+../../../arm/boot/dts/overlays -\ No newline at end of file ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -1,52 +1,9 @@ --# CONFIG_ARM_PATCH_PHYS_VIRT is not set --CONFIG_PHYS_OFFSET=0 - CONFIG_LOCALVERSION="-v8" - # CONFIG_LOCALVERSION_AUTO is not set --CONFIG_64BIT=y - CONFIG_SYSVIPC=y - CONFIG_POSIX_MQUEUE=y - CONFIG_NO_HZ=y - CONFIG_HIGH_RES_TIMERS=y -- --# --# ARM errata workarounds via the alternatives framework --# --CONFIG_ARM64_ERRATUM_826319=n --CONFIG_ARM64_ERRATUM_827319=n --CONFIG_ARM64_ERRATUM_824069=n --CONFIG_ARM64_ERRATUM_819472=n --CONFIG_ARM64_ERRATUM_832075=n --CONFIG_ARM64_ERRATUM_845719=n --CONFIG_ARM64_ERRATUM_843419=n --CONFIG_CAVIUM_ERRATUM_22375=n --CONFIG_CAVIUM_ERRATUM_23154=n --CONFIG_CAVIUM_ERRATUM_27456=n --CONFIG_ARM64_4K_PAGES=y --CONFIG_ARM64_VA_BITS_39=y --CONFIG_ARM64_VA_BITS=39 --CONFIG_SCHED_MC=y --CONFIG_NR_CPUS=4 --CONFIG_HOTPLUG_CPU=y --CONFIG_ARMV8_DEPRECATED=y --CONFIG_SWP_EMULATION=y --CONFIG_CP15_BARRIER_EMULATION=y --CONFIG_SETEND_EMULATION=y -- --# --# ARMv8.1 architectural features --# --CONFIG_ARM64_HW_AFDBM=y --CONFIG_ARM64_PAN=y --CONFIG_ARM64_LSE_ATOMICS=y --CONFIG_ARM64_VHE=y -- --# --# ARMv8.2 architectural features --# --CONFIG_ARM64_UAO=y --CONFIG_ARM64_MODULE_CMODEL_LARGE=n --CONFIG_RANDOMIZE_BASE=n -- - CONFIG_BSD_PROCESS_ACCT=y - CONFIG_BSD_PROCESS_ACCT_V3=y - CONFIG_TASKSTATS=y -@@ -55,7 +12,6 @@ CONFIG_TASK_XACCT=y - CONFIG_TASK_IO_ACCOUNTING=y - CONFIG_IKCONFIG=m - CONFIG_IKCONFIG_PROC=y --CONFIG_NMI_LOG_BUF_SHIFT=12 - CONFIG_MEMCG=y - CONFIG_BLK_CGROUP=y - CONFIG_CGROUP_FREEZER=y -@@ -69,54 +25,49 @@ CONFIG_BLK_DEV_INITRD=y - CONFIG_EMBEDDED=y - # CONFIG_COMPAT_BRK is not set - CONFIG_PROFILING=y --CONFIG_OPROFILE=m - CONFIG_KPROBES=y - CONFIG_JUMP_LABEL=y - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y - CONFIG_MODVERSIONS=y - CONFIG_MODULE_SRCVERSION_ALL=y --CONFIG_TRIM_UNUSED_KSYMS=y - CONFIG_BLK_DEV_THROTTLING=y - CONFIG_PARTITION_ADVANCED=y - CONFIG_MAC_PARTITION=y - CONFIG_CFQ_GROUP_IOSCHED=y --CONFIG_ARCH_BCM2709=y --# CONFIG_CACHE_L2X0 is not set --CONFIG_SMP=y --CONFIG_HAVE_ARM_ARCH_TIMER=y --CONFIG_VMSPLIT_2G=y --CONFIG_PREEMPT_VOLUNTARY=y --CONFIG_AEABI=y --CONFIG_OABI_COMPAT=y --# CONFIG_CPU_SW_DOMAIN_PAN is not set -+CONFIG_ARCH_BCM2835=y -+# CONFIG_CAVIUM_ERRATUM_22375 is not set -+# CONFIG_CAVIUM_ERRATUM_23154 is not set -+# CONFIG_CAVIUM_ERRATUM_27456 is not set -+CONFIG_SCHED_MC=y -+CONFIG_NR_CPUS=4 -+CONFIG_PREEMPT=y -+CONFIG_HZ_1000=y - CONFIG_CLEANCACHE=y - CONFIG_FRONTSWAP=y - CONFIG_CMA=y - CONFIG_ZSMALLOC=m - CONFIG_PGTABLE_MAPPING=y --CONFIG_UACCESS_WITH_MEMCPY=y - CONFIG_SECCOMP=y --# CONFIG_ATAGS is not set --CONFIG_ZBOOT_ROM_TEXT=0x0 --CONFIG_ZBOOT_ROM_BSS=0x0 -+CONFIG_ARMV8_DEPRECATED=y -+CONFIG_SWP_EMULATION=y -+CONFIG_CP15_BARRIER_EMULATION=y -+CONFIG_SETEND_EMULATION=y - CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" -+CONFIG_BINFMT_MISC=y -+CONFIG_COMPAT=y -+# CONFIG_SUSPEND is not set -+CONFIG_PM=y -+CONFIG_CPU_IDLE=y -+CONFIG_ARM_CPUIDLE=y - CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_STAT=y - CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y - CONFIG_CPU_FREQ_GOV_PERFORMANCE=y - CONFIG_CPU_FREQ_GOV_USERSPACE=y - CONFIG_CPU_FREQ_GOV_ONDEMAND=y - CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y - CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y --CONFIG_VFP=y --CONFIG_NEON=y --CONFIG_KERNEL_MODE_NEON=y --CONFIG_BINFMT_MISC=m --CONFIG_COMPAT=y --CONFIG_SYSVIPC_COMPAT=y -- --# CONFIG_SUSPEND is not set --CONFIG_PM=y - CONFIG_NET=y - CONFIG_PACKET=y - CONFIG_UNIX=y -@@ -437,6 +388,7 @@ CONFIG_BT_MRVL=m - CONFIG_BT_MRVL_SDIO=m - CONFIG_BT_ATH3K=m - CONFIG_BT_WILINK=m -+CONFIG_CFG80211=m - CONFIG_MAC80211=m - CONFIG_MAC80211_MESH=y - CONFIG_WIMAX=m -@@ -490,7 +442,6 @@ CONFIG_BONDING=m - CONFIG_DUMMY=m - CONFIG_IFB=m - CONFIG_MACVLAN=m --CONFIG_IPVLAN=m - CONFIG_VXLAN=m - CONFIG_NETCONSOLE=m - CONFIG_TUN=m -@@ -579,8 +530,6 @@ CONFIG_RT2800USB_RT3573=y - CONFIG_RT2800USB_RT53XX=y - CONFIG_RT2800USB_RT55XX=y - CONFIG_RT2800USB_UNKNOWN=y --CONFIG_RTL8187=m --CONFIG_RTL8192CU=n - CONFIG_USB_ZD1201=m - CONFIG_ZD1211RW=m - CONFIG_MAC80211_HWSIM=m -@@ -606,7 +555,7 @@ CONFIG_JOYSTICK_RPISENSE=m - CONFIG_INPUT_TOUCHSCREEN=y - CONFIG_TOUCHSCREEN_ADS7846=m - CONFIG_TOUCHSCREEN_EGALAX=m --CONFIG_TOUCHSCREEN_FT6236=m -+CONFIG_TOUCHSCREEN_EKTF2127=m - CONFIG_TOUCHSCREEN_RPI_FT5406=m - CONFIG_TOUCHSCREEN_USB_COMPOSITE=m - CONFIG_TOUCHSCREEN_STMPE=m -@@ -626,10 +575,8 @@ CONFIG_SERIO_RAW=m - CONFIG_GAMEPORT=m - CONFIG_GAMEPORT_NS558=m - CONFIG_GAMEPORT_L4=m --CONFIG_BRCM_CHAR_DRIVERS=n --CONFIG_BCM_VC_CMA=n --CONFIG_BCM_VCIO=n --CONFIG_BCM_VC_SM=n -+# CONFIG_BCM2835_DEVGPIOMEM is not set -+# CONFIG_BCM2835_SMI_DEV is not set - # CONFIG_LEGACY_PTYS is not set - # CONFIG_DEVKMEM is not set - CONFIG_SERIAL_8250=y -@@ -638,6 +585,9 @@ CONFIG_SERIAL_8250_CONSOLE=y - # CONFIG_SERIAL_8250_DMA is not set - CONFIG_SERIAL_8250_NR_UARTS=1 - CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -+CONFIG_SERIAL_8250_EXTENDED=y -+CONFIG_SERIAL_8250_SHARE_IRQ=y -+CONFIG_SERIAL_8250_BCM2835AUX=y - CONFIG_SERIAL_OF_PLATFORM=y - CONFIG_SERIAL_AMBA_PL011=y - CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -@@ -650,6 +600,7 @@ CONFIG_I2C=y - CONFIG_I2C_CHARDEV=m - CONFIG_I2C_MUX_PCA954x=m - CONFIG_I2C_BCM2708=m -+CONFIG_I2C_BCM2835=m - CONFIG_I2C_GPIO=m - CONFIG_SPI=y - CONFIG_SPI_BCM2835=m -@@ -681,13 +632,13 @@ CONFIG_W1_SLAVE_DS2780=m - CONFIG_W1_SLAVE_DS2781=m - CONFIG_W1_SLAVE_DS28E04=m - CONFIG_W1_SLAVE_BQ27000=m --CONFIG_BATTERY_DS2760=m --CONFIG_POWER_RESET=y - CONFIG_POWER_RESET_GPIO=y -+CONFIG_BATTERY_DS2760=m - CONFIG_HWMON=m - CONFIG_SENSORS_LM75=m - CONFIG_SENSORS_SHT21=m - CONFIG_SENSORS_SHTC1=m -+CONFIG_SENSORS_INA2XX=m - CONFIG_THERMAL=y - CONFIG_THERMAL_BCM2835=y - CONFIG_WATCHDOG=y -@@ -835,8 +786,6 @@ CONFIG_VIDEO_EM28XX_V4L2=m - CONFIG_VIDEO_EM28XX_ALSA=m - CONFIG_VIDEO_EM28XX_DVB=m - CONFIG_V4L_PLATFORM_DRIVERS=y --CONFIG_VIDEO_BCM2835=n --CONFIG_VIDEO_BCM2835_MMAL=n - CONFIG_RADIO_SI470X=y - CONFIG_USB_SI470X=m - CONFIG_I2C_SI470X=m -@@ -892,8 +841,6 @@ CONFIG_SND_VIRMIDI=m - CONFIG_SND_MTPAV=m - CONFIG_SND_SERIAL_U16550=m - CONFIG_SND_MPU401=m --CONFIG_SND_ARM=n --CONFIG_SND_BCM2835=n - CONFIG_SND_USB_AUDIO=m - CONFIG_SND_USB_UA101=m - CONFIG_SND_USB_CAIAQ=m -@@ -916,7 +863,10 @@ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m - CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m - CONFIG_SND_DIGIDAC1_SOUNDCARD=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m -+CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m -+CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m -+CONFIG_SND_SOC_AK4554=m - CONFIG_SND_SOC_WM8804_I2C=m - CONFIG_SND_SIMPLE_CARD=m - CONFIG_SOUND_PRIME=m -@@ -979,8 +929,6 @@ CONFIG_USB_HIDDEV=y - CONFIG_USB=y - CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - CONFIG_USB_MON=m --CONFIG_USB_DWCOTG=n --CONFIG_USB_DWC2=y - CONFIG_USB_PRINTER=m - CONFIG_USB_STORAGE=y - CONFIG_USB_STORAGE_REALTEK=m -@@ -1001,6 +949,7 @@ CONFIG_USB_MICROTEK=m - CONFIG_USBIP_CORE=m - CONFIG_USBIP_VHCI_HCD=m - CONFIG_USBIP_HOST=m -+CONFIG_USB_DWC2=y - CONFIG_USB_SERIAL=m - CONFIG_USB_SERIAL_GENERIC=y - CONFIG_USB_SERIAL_AIRCABLE=m -@@ -1096,6 +1045,7 @@ CONFIG_LEDS_TRIGGER_INPUT=y - CONFIG_LEDS_TRIGGER_PANIC=y - CONFIG_RTC_CLASS=y - # CONFIG_RTC_HCTOSYS is not set -+CONFIG_RTC_DRV_ABX80X=m - CONFIG_RTC_DRV_DS1307=m - CONFIG_RTC_DRV_DS1374=m - CONFIG_RTC_DRV_DS1672=m -@@ -1103,7 +1053,6 @@ CONFIG_RTC_DRV_MAX6900=m - CONFIG_RTC_DRV_RS5C372=m - CONFIG_RTC_DRV_ISL1208=m - CONFIG_RTC_DRV_ISL12022=m --CONFIG_RTC_DRV_ISL12057=m - CONFIG_RTC_DRV_X1205=m - CONFIG_RTC_DRV_PCF8523=m - CONFIG_RTC_DRV_PCF8563=m -@@ -1137,7 +1086,6 @@ CONFIG_STAGING=y - CONFIG_PRISM2_USB=m - CONFIG_R8712U=m - CONFIG_R8188EU=m --CONFIG_R8723AU=m - CONFIG_VT6656=m - CONFIG_SPEAKUP=m - CONFIG_SPEAKUP_SYNTH_SOFT=m -@@ -1153,6 +1101,7 @@ CONFIG_FB_TFT_BD663474=m - CONFIG_FB_TFT_HX8340BN=m - CONFIG_FB_TFT_HX8347D=m - CONFIG_FB_TFT_HX8353D=m -+CONFIG_FB_TFT_HX8357D=m - CONFIG_FB_TFT_ILI9163=m - CONFIG_FB_TFT_ILI9320=m - CONFIG_FB_TFT_ILI9325=m -@@ -1176,6 +1125,7 @@ CONFIG_FB_TFT_UPD161704=m - CONFIG_FB_TFT_WATTEROTT=m - CONFIG_FB_FLEX=m - CONFIG_FB_TFT_FBTFT_DEVICE=m -+# CONFIG_BCM2708_VCHIQ is not set - CONFIG_MAILBOX=y - CONFIG_BCM2835_MBOX=y - # CONFIG_IOMMU_SUPPORT is not set -@@ -1189,6 +1139,7 @@ CONFIG_IIO_KFIFO_BUF=m - CONFIG_MCP320X=m - CONFIG_MCP3422=m - CONFIG_DHT11=m -+CONFIG_HTU21=m - CONFIG_PWM_BCM2835=m - CONFIG_PWM_PCA9685=m - CONFIG_RASPBERRYPI_FIRMWARE=y -@@ -1309,6 +1260,7 @@ CONFIG_BOOT_PRINTK_DELAY=y - CONFIG_DEBUG_MEMORY_INIT=y - CONFIG_DETECT_HUNG_TASK=y - CONFIG_TIMER_STATS=y -+CONFIG_LATENCYTOP=y - CONFIG_IRQSOFF_TRACER=y - CONFIG_SCHED_TRACER=y - CONFIG_STACK_TRACER=y -@@ -1331,5 +1283,3 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m - CONFIG_ARM64_CRYPTO=y - CONFIG_CRC_ITU_T=y - CONFIG_LIBCRC32C=y --CONFIG_BCM2708_VCHIQ=n --CONFIG_ARCH_BCM2835=y diff --git a/target/linux/brcm2708/patches-4.9/950-0122-ARM64-Enable-Kernel-Address-Space-Randomization-1792.patch b/target/linux/brcm2708/patches-4.9/950-0122-ARM64-Enable-Kernel-Address-Space-Randomization-1792.patch deleted file mode 100644 index 423db95e9..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0122-ARM64-Enable-Kernel-Address-Space-Randomization-1792.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 6dfa60daaa0966a8e414ab0a7fd002a99001920a Mon Sep 17 00:00:00 2001 -From: Electron752 -Date: Sat, 14 Jan 2017 02:54:26 -0800 -Subject: [PATCH] ARM64: Enable Kernel Address Space Randomization (#1792) - -Randomization allows the mapping between virtual addresses and physical -address to be different on each boot. This makes it more difficult -to exploit security vulnerabilities that require knowledge of fixed -hardware addresses. - -The firmware generates a 8 byte random number during bootup and stores -it in the device tree under chosen/kaslr-seed. This number is used -to randomize the address mapping. - -This change enables this feature in the build configuration for ARM64. - -Signed-off-by: Michael Zoran ---- - arch/arm64/configs/bcmrpi3_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -53,6 +53,7 @@ CONFIG_ARMV8_DEPRECATED=y - CONFIG_SWP_EMULATION=y - CONFIG_CP15_BARRIER_EMULATION=y - CONFIG_SETEND_EMULATION=y -+CONFIG_RANDOMIZE_BASE=y - CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" - CONFIG_BINFMT_MISC=y - CONFIG_COMPAT=y diff --git a/target/linux/brcm2708/patches-4.9/950-0124-ARM64-Enable-RTL8187-RTL8192CU-wifi-in-build-config.patch b/target/linux/brcm2708/patches-4.9/950-0124-ARM64-Enable-RTL8187-RTL8192CU-wifi-in-build-config.patch deleted file mode 100644 index c947a74c5..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0124-ARM64-Enable-RTL8187-RTL8192CU-wifi-in-build-config.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 564df2de35a212639eb7e357442f35fa89bcbde4 Mon Sep 17 00:00:00 2001 -From: Michael Zoran -Date: Sun, 15 Jan 2017 07:31:59 -0800 -Subject: [PATCH] ARM64: Enable RTL8187/RTL8192CU wifi in build config - -These drivers build now, so they can be enabled back -in the build configuration just like they are for -32 bit. - -Signed-off-by: Michael Zoran ---- - arch/arm64/configs/bcmrpi3_defconfig | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -531,6 +531,8 @@ CONFIG_RT2800USB_RT3573=y - CONFIG_RT2800USB_RT53XX=y - CONFIG_RT2800USB_RT55XX=y - CONFIG_RT2800USB_UNKNOWN=y -+CONFIG_RTL8187=m -+CONFIG_RTL8192CU=m - CONFIG_USB_ZD1201=m - CONFIG_ZD1211RW=m - CONFIG_MAC80211_HWSIM=m diff --git a/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch b/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch deleted file mode 100644 index 2fd8366f4..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0125-BCM270X_DT-Add-spi0-cs-overlay.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 48eea36959fb8d854b4cf1ee4284646be5a279e0 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 16 Jan 2017 14:53:12 +0000 -Subject: [PATCH] BCM270X_DT: Add spi0-cs overlay - -The spi0-cs overlay allows the software chip selectts to be modified -using the cs0_pin and cs1_pin parameters. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 9 +++++++- - arch/arm/boot/dts/overlays/spi0-cs-overlay.dts | 29 ++++++++++++++++++++++++++ - 3 files changed, 38 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/boot/dts/overlays/spi0-cs-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -83,6 +83,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - smi-nand.dtbo \ - spi-gpio35-39.dtbo \ - spi-rtc.dtbo \ -+ spi0-cs.dtbo \ - spi0-hw-cs.dtbo \ - spi1-1cs.dtbo \ - spi1-2cs.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1138,7 +1138,7 @@ Params: - - - Name: spi-gpio35-39 --Info: move SPI function block to GPIO 35 to 39 -+Info: Move SPI function block to GPIO 35 to 39 - Load: dtoverlay=spi-gpio35-39 - Params: - -@@ -1149,6 +1149,13 @@ Load: dtoverlay=spi-rtc,= - Params: pcf2123 Select the PCF2123 device - - -+Name: spi0-cs -+Info: Allows the (software) CS pins for SPI0 to be changed -+Load: dtoverlay=spi0-cs,= -+Params: cs0_pin GPIO pin for CS0 (default 8) -+ cs1_pin GPIO pin for CS1 (default 7) -+ -+ - Name: spi0-hw-cs - Info: Re-enables hardware CS/CE (chip selects) for SPI0 - Load: dtoverlay=spi0-hw-cs ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/spi0-cs-overlay.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+ -+/ { -+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; -+ -+ fragment@0 { -+ target = <&spi0_cs_pins>; -+ frag0: __overlay__ { -+ brcm,pins = <8 7>; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ frag1: __overlay__ { -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ status = "okay"; -+ }; -+ }; -+ -+ __overrides__ { -+ cs0_pin = <&frag0>,"brcm,pins:0", -+ <&frag1>,"cs-gpios:4"; -+ cs1_pin = <&frag0>,"brcm,pins:4", -+ <&frag1>,"cs-gpios:16"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0126-spi-bcm2835-Disable-forced-software-CS.patch b/target/linux/brcm2708/patches-4.9/950-0126-spi-bcm2835-Disable-forced-software-CS.patch deleted file mode 100644 index 1d2bd29ab..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0126-spi-bcm2835-Disable-forced-software-CS.patch +++ /dev/null @@ -1,26 +0,0 @@ -From a6ef8db0e46713da43c81bc15fed01a4da0bd5a4 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 1 Jul 2016 22:09:24 +0100 -Subject: [PATCH] spi-bcm2835: Disable forced software CS - -Select software CS in bcm2708_common.dtsi, and disable the automatic -conversion in the driver to allow hardware CS to be re-enabled with an -overlay. - -See: https://github.com/raspberrypi/linux/issues/1547 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm283x.dtsi | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -371,6 +371,7 @@ - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; - }; - - i2c0: i2c@7e205000 { diff --git a/target/linux/brcm2708/patches-4.9/950-0127-config-Add-CONFIG_TCP_CONG_BBR.patch b/target/linux/brcm2708/patches-4.9/950-0127-config-Add-CONFIG_TCP_CONG_BBR.patch deleted file mode 100644 index cec560e06..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0127-config-Add-CONFIG_TCP_CONG_BBR.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 6f95da255ded5f1da673f826de07963e6a619e3d Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 16 Jan 2017 16:33:54 +0000 -Subject: [PATCH] config: Add CONFIG_TCP_CONG_BBR See: - https://github.com/raspberrypi/linux/issues/1784 - ---- - arch/arm/configs/bcm2709_defconfig | 2 ++ - arch/arm/configs/bcmrpi_defconfig | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -99,6 +99,8 @@ CONFIG_INET_XFRM_MODE_TRANSPORT=m - CONFIG_INET_XFRM_MODE_TUNNEL=m - CONFIG_INET_XFRM_MODE_BEET=m - CONFIG_INET_DIAG=m -+CONFIG_TCP_CONG_ADVANCED=y -+CONFIG_TCP_CONG_BBR=m - CONFIG_IPV6=m - CONFIG_IPV6_ROUTER_PREF=y - CONFIG_INET6_AH=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -95,6 +95,8 @@ CONFIG_INET_XFRM_MODE_TRANSPORT=m - CONFIG_INET_XFRM_MODE_TUNNEL=m - CONFIG_INET_XFRM_MODE_BEET=m - CONFIG_INET_DIAG=m -+CONFIG_TCP_CONG_ADVANCED=y -+CONFIG_TCP_CONG_BBR=m - CONFIG_IPV6=m - CONFIG_IPV6_ROUTER_PREF=y - CONFIG_INET6_AH=m diff --git a/target/linux/brcm2708/patches-4.9/950-0128-BCM270X_DT-Enable-UART0-on-CM3.patch b/target/linux/brcm2708/patches-4.9/950-0128-BCM270X_DT-Enable-UART0-on-CM3.patch deleted file mode 100644 index 4fbc443dc..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0128-BCM270X_DT-Enable-UART0-on-CM3.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 44586947e86f67ad71fdd3afca51f04fc27f3872 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 17 Jan 2017 11:34:58 +0000 -Subject: [PATCH] BCM270X_DT: Enable UART0 on CM3 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -@@ -6,6 +6,10 @@ - model = "Raspberry Pi Compute Module 3"; - }; - -+&uart0 { -+ status = "okay"; -+}; -+ - &gpio { - sdhost_pins: sdhost_pins { - brcm,pins = <48 49 50 51 52 53>; diff --git a/target/linux/brcm2708/patches-4.9/950-0129-config-Add-CONFIG_MD_M25P80-and-CONFIG_MD_SPI_NOR.patch b/target/linux/brcm2708/patches-4.9/950-0129-config-Add-CONFIG_MD_M25P80-and-CONFIG_MD_SPI_NOR.patch deleted file mode 100644 index ab5e40900..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0129-config-Add-CONFIG_MD_M25P80-and-CONFIG_MD_SPI_NOR.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 3f6ad80c79570b157d651720bf161843a360e922 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 17 Jan 2017 14:39:39 +0000 -Subject: [PATCH] config: Add CONFIG_MD_M25P80 and CONFIG_MD_SPI_NOR - -See: https://github.com/raspberrypi/linux/issues/1781 - -Signed-off-by: Phil Elwell ---- - arch/arm/configs/bcm2709_defconfig | 2 ++ - arch/arm/configs/bcmrpi_defconfig | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -406,7 +406,9 @@ CONFIG_DMA_CMA=y - CONFIG_CMA_SIZE_MBYTES=5 - CONFIG_MTD=m - CONFIG_MTD_BLOCK=m -+CONFIG_MTD_M25P80=m - CONFIG_MTD_NAND=m -+CONFIG_MTD_SPI_NOR=m - CONFIG_MTD_UBI=m - CONFIG_OF_CONFIGFS=y - CONFIG_ZRAM=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -402,7 +402,9 @@ CONFIG_DMA_CMA=y - CONFIG_CMA_SIZE_MBYTES=5 - CONFIG_MTD=m - CONFIG_MTD_BLOCK=m -+CONFIG_MTD_M25P80=m - CONFIG_MTD_NAND=m -+CONFIG_MTD_SPI_NOR=m - CONFIG_MTD_UBI=m - CONFIG_OF_CONFIGFS=y - CONFIG_ZRAM=m diff --git a/target/linux/brcm2708/patches-4.9/950-0132-ARM64-Enable-DWC_OTG-Driver-In-ARM64-Build-Config-bc.patch b/target/linux/brcm2708/patches-4.9/950-0132-ARM64-Enable-DWC_OTG-Driver-In-ARM64-Build-Config-bc.patch deleted file mode 100644 index deae274af..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0132-ARM64-Enable-DWC_OTG-Driver-In-ARM64-Build-Config-bc.patch +++ /dev/null @@ -1,21 +0,0 @@ -From ad17c9e5a03f835605560e7163e5e685a67abd1f Mon Sep 17 00:00:00 2001 -From: Michael Zoran -Date: Sat, 14 Jan 2017 21:45:03 -0800 -Subject: [PATCH] ARM64: Enable DWC_OTG Driver In ARM64 Build - Config(bcmrpi3_defconfig) - -Signed-off-by: Michael Zoran ---- - arch/arm64/configs/bcmrpi3_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -932,6 +932,7 @@ CONFIG_USB_HIDDEV=y - CONFIG_USB=y - CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - CONFIG_USB_MON=m -+CONFIG_USB_DWCOTG=y - CONFIG_USB_PRINTER=m - CONFIG_USB_STORAGE=y - CONFIG_USB_STORAGE_REALTEK=m diff --git a/target/linux/brcm2708/patches-4.9/950-0133-ARM64-Use-dwc_otg-driver-by-default-for-USB.patch b/target/linux/brcm2708/patches-4.9/950-0133-ARM64-Use-dwc_otg-driver-by-default-for-USB.patch deleted file mode 100644 index 53335b95f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0133-ARM64-Use-dwc_otg-driver-by-default-for-USB.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 4eec6ce872ac46987efeb9b9cdab0ad78a563bdb Mon Sep 17 00:00:00 2001 -From: Michael Zoran -Date: Sat, 14 Jan 2017 21:46:04 -0800 -Subject: [PATCH] ARM64: Use dwc_otg driver by default for USB. - -If it breaks on anybody, they can use the standard device tree -overlays to switch back to the dwc2 driver. - -Signed-off-by: Michael Zoran ---- - arch/arm/boot/dts/bcm2710.dtsi | 7 ------- - 1 file changed, 7 deletions(-) - ---- a/arch/arm/boot/dts/bcm2710.dtsi -+++ b/arch/arm/boot/dts/bcm2710.dtsi -@@ -146,10 +146,3 @@ - interrupts = <8>; - }; - --#ifdef RPI364 --&usb { -- compatible = "brcm,bcm2835-usb"; -- reg = <0x7e980000 0x10000>; -- interrupts = <1 9>; --}; --#endif diff --git a/target/linux/brcm2708/patches-4.9/950-0134-BCM270X_DT-Add-reference-to-audio_pins-to-CM-dtb.patch b/target/linux/brcm2708/patches-4.9/950-0134-BCM270X_DT-Add-reference-to-audio_pins-to-CM-dtb.patch deleted file mode 100644 index 63df4a037..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0134-BCM270X_DT-Add-reference-to-audio_pins-to-CM-dtb.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 8630b0b3fea31138c52ef83848ae1a047baa3855 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 23 Jan 2017 17:36:50 +0000 -Subject: [PATCH] BCM270X_DT: Add reference to audio_pins to CM dtb - -The CM1 dtb contains an empty audio_pins node, but no reference to it. -Adding the usual pinctrl reference from the audio node enables the -audremap overlay (and others) to easily turn on audio. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2708-rpi-cm.dts | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts -@@ -85,6 +85,11 @@ - pinctrl-0 = <&i2s_pins>; - }; - -+&audio { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/brcm2708/patches-4.9/950-0135-config-Add-additional-network-scheduling-modules.patch b/target/linux/brcm2708/patches-4.9/950-0135-config-Add-additional-network-scheduling-modules.patch deleted file mode 100644 index 6c50870c7..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0135-config-Add-additional-network-scheduling-modules.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 56aef4ffcf12fdede0dad012de939c5a7c9cc55b Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Wed, 25 Jan 2017 11:30:38 +0000 -Subject: [PATCH] config: Add additional network scheduling modules - ---- - arch/arm/configs/bcm2709_defconfig | 4 ++++ - arch/arm/configs/bcmrpi_defconfig | 4 ++++ - 2 files changed, 8 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -296,6 +296,7 @@ CONFIG_NET_SCHED=y - CONFIG_NET_SCH_CBQ=m - CONFIG_NET_SCH_HTB=m - CONFIG_NET_SCH_HFSC=m -+CONFIG_NET_SCH_ATM=m - CONFIG_NET_SCH_PRIO=m - CONFIG_NET_SCH_MULTIQ=m - CONFIG_NET_SCH_RED=m -@@ -312,6 +313,9 @@ CONFIG_NET_SCH_CHOKE=m - CONFIG_NET_SCH_QFQ=m - CONFIG_NET_SCH_CODEL=m - CONFIG_NET_SCH_FQ_CODEL=m -+CONFIG_NET_SCH_FQ=m -+CONFIG_NET_SCH_HHF=m -+CONFIG_NET_SCH_PIE=m - CONFIG_NET_SCH_INGRESS=m - CONFIG_NET_SCH_PLUG=m - CONFIG_NET_CLS_BASIC=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -292,6 +292,7 @@ CONFIG_NET_SCHED=y - CONFIG_NET_SCH_CBQ=m - CONFIG_NET_SCH_HTB=m - CONFIG_NET_SCH_HFSC=m -+CONFIG_NET_SCH_ATM=m - CONFIG_NET_SCH_PRIO=m - CONFIG_NET_SCH_MULTIQ=m - CONFIG_NET_SCH_RED=m -@@ -308,6 +309,9 @@ CONFIG_NET_SCH_CHOKE=m - CONFIG_NET_SCH_QFQ=m - CONFIG_NET_SCH_CODEL=m - CONFIG_NET_SCH_FQ_CODEL=m -+CONFIG_NET_SCH_FQ=m -+CONFIG_NET_SCH_HHF=m -+CONFIG_NET_SCH_PIE=m - CONFIG_NET_SCH_INGRESS=m - CONFIG_NET_SCH_PLUG=m - CONFIG_NET_CLS_BASIC=m diff --git a/target/linux/brcm2708/patches-4.9/950-0136-ASoC-A-simple-card-overlay-for-ADAU7002.patch b/target/linux/brcm2708/patches-4.9/950-0136-ASoC-A-simple-card-overlay-for-ADAU7002.patch deleted file mode 100644 index 4f122fcdb..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0136-ASoC-A-simple-card-overlay-for-ADAU7002.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 1cd1f19adbe020544e18193a006af9c71c8c82ca Mon Sep 17 00:00:00 2001 -From: chris johnson -Date: Sun, 22 Jan 2017 03:27:31 +0000 -Subject: [PATCH] ASoC: A simple-card overlay for ADAU7002 - -Usage: `dtoverlay=adau7002-simple` ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 +++ - .../boot/dts/overlays/adau7002-simple-overlay.dts | 52 ++++++++++++++++++++++ - 3 files changed, 59 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -2,6 +2,7 @@ - - dtbo-$(CONFIG_ARCH_BCM2835) += \ - adau1977-adc.dtbo \ -+ adau7002-simple.dtbo \ - ads1015.dtbo \ - ads7846.dtbo \ - akkordion-iqdacplus.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -168,6 +168,12 @@ Load: dtoverlay=adau1977-adc - Params: - - -+Name: adau7002-simple -+Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter. -+Load: dtoverlay=adau7002-simple,= -+Params: card-name Override the default, "adau7002", card name. -+ -+ - Name: ads1015 - Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C - Load: dtoverlay=ads1015,= ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts -@@ -0,0 +1,52 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ adau7002_codec: adau7002-codec { -+ #sound-dai-cells = <0>; -+ compatible = "adi,adau7002"; -+/* IOVDD-supply = <&supply>;*/ -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&sound>; -+ sound_overlay: __overlay__ { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "adau7002"; -+ simple-audio-card,bitclock-slave = <&dailink0_slave>; -+ simple-audio-card,frame-slave = <&dailink0_slave>; -+ simple-audio-card,widgets = -+ "Microphone", "Microphone Jack"; -+ simple-audio-card,routing = -+ "PDM_DAT", "Microphone Jack"; -+ status = "okay"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s>; -+ }; -+ dailink0_slave: simple-audio-card,codec { -+ sound-dai = <&adau7002_codec>; -+ }; -+ }; -+ }; -+ -+ -+ __overrides__ { -+ card-name = <&sound_overlay>,"simple-audio-card,name"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0137-config-Add-SND_SOC_ADAU7002-codec-module.patch b/target/linux/brcm2708/patches-4.9/950-0137-config-Add-SND_SOC_ADAU7002-codec-module.patch deleted file mode 100644 index e4ef715fb..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0137-config-Add-SND_SOC_ADAU7002-codec-module.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 30db626576fa53cb6a0a27311baed4dd5c296c38 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 25 Jan 2017 21:17:23 +0000 -Subject: [PATCH] config: Add SND_SOC_ADAU7002 codec module - -As there is now an overlay requiring it, build the codec module. - -Signed-off-by: Phil Elwell ---- - arch/arm/configs/bcm2709_defconfig | 1 + - arch/arm/configs/bcmrpi_defconfig | 1 + - 2 files changed, 2 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -884,6 +884,7 @@ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m -+CONFIG_SND_SOC_ADAU7002=m - CONFIG_SND_SOC_AK4554=m - CONFIG_SND_SOC_WM8804_I2C=m - CONFIG_SND_SIMPLE_CARD=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -878,6 +878,7 @@ CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m -+CONFIG_SND_SOC_ADAU7002=m - CONFIG_SND_SOC_AK4554=m - CONFIG_SND_SOC_WM8804_I2C=m - CONFIG_SND_SIMPLE_CARD=m diff --git a/target/linux/brcm2708/patches-4.9/950-0138-Add-overlay-for-mcp3008-adc-1818.patch b/target/linux/brcm2708/patches-4.9/950-0138-Add-overlay-for-mcp3008-adc-1818.patch deleted file mode 100644 index 560dc6c85..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0138-Add-overlay-for-mcp3008-adc-1818.patch +++ /dev/null @@ -1,281 +0,0 @@ -From 33800ba2a14ff23db96fe5ea6e421a731f60c52b Mon Sep 17 00:00:00 2001 -From: Scott Ellis -Date: Fri, 27 Jan 2017 06:42:42 -0500 -Subject: [PATCH] Add overlay for mcp3008 adc (#1818) - -Some example usage: - -SPI0.0 -dtparam=spi=on -dtoverlay=mcp3008:spi0-0-present - -SPI0.1 -dtparam=spi=on -dtoverlay=mcp3008:spi0-1-present - -SPI0.0 and SPI0.1 -dtparam=spi=on -dtoverlay=mcp3008:spi0-0-present,spi0-1-present - -SPI1.0 -dtparam=spi=on -dtoverlay=spi1-1cs -dtoverlay=mcp3008:spi1-0-present - -SPI1.2 -dtparam=spi=on -dtoverlay=spi1-1cs:cs0_pin=16 -dtoverlay=mcp3008:spi1-0-present - -SPI1.0 and SPI1.1 -dtoverlay=spi1-2cs -dtoverlay=mcp3008:spi1-0-present,spi1-1-present - -Changing the speed - -SPI0.0 -dtparam=spi=on -dtoverlay=mcp3008:spi0-0-present,spi0-0-speed=2000000 ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 9 ++ - arch/arm/boot/dts/overlays/mcp3008-overlay.dts | 205 +++++++++++++++++++++++++ - 3 files changed, 215 insertions(+) - create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -47,6 +47,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - mcp23s17.dtbo \ - mcp2515-can0.dtbo \ - mcp2515-can1.dtbo \ -+ mcp3008.dtbo \ - midi-uart0.dtbo \ - mmc.dtbo \ - mz61581.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -742,6 +742,15 @@ Params: oscillator Clock fr - interrupt GPIO for interrupt signal - - -+Name: mcp3008 -+Info: Configures MCP3008 A/D converters -+ For devices on spi1 or spi2, the interfaces should be enabled -+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. -+Load: dtoverlay=mcp3008,[=] -+Params: spi--present boolean, configure device at spi, cs -+ spi--speed integer, set the spi bus speed for this device -+ -+ - Name: midi-uart0 - Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets - 31.25kbaud, the frequency required for MIDI ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts -@@ -0,0 +1,205 @@ -+/* -+ * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709"; -+ -+ fragment@0 { -+ target = <&spidev0>; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev1>; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target-path = "spi1/spidev@0"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@3 { -+ target-path = "spi1/spidev@1"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@4 { -+ target-path = "spi1/spidev@2"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@5 { -+ target-path = "spi2/spidev@0"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@6 { -+ target-path = "spi2/spidev@1"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@7 { -+ target-path = "spi2/spidev@2"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@8 { -+ target = <&spi0>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_00: mcp3008@0 { -+ compatible = "mcp3008"; -+ reg = <0>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@9 { -+ target = <&spi0>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_01: mcp3008@1 { -+ compatible = "mcp3008"; -+ reg = <1>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@10 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_10: mcp3008@0 { -+ compatible = "mcp3008"; -+ reg = <0>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@11 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_11: mcp3008@1 { -+ compatible = "mcp3008"; -+ reg = <1>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@12 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_12: mcp3008@2 { -+ compatible = "mcp3008"; -+ reg = <2>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@13 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_20: mcp3008@0 { -+ compatible = "mcp3008"; -+ reg = <0>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@14 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_21: mcp3008@1 { -+ compatible = "mcp3008"; -+ reg = <1>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ fragment@15 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mcp3008_22: mcp3008@2 { -+ compatible = "mcp3008"; -+ reg = <2>; -+ spi-max-frequency = <1600000>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ spi0-0-present = <0>, "+0+8"; -+ spi0-1-present = <0>, "+1+9"; -+ spi1-0-present = <0>, "+2+10"; -+ spi1-1-present = <0>, "+3+11"; -+ spi1-2-present = <0>, "+4+12"; -+ spi2-0-present = <0>, "+5+13"; -+ spi2-1-present = <0>, "+6+14"; -+ spi2-2-present = <0>, "+7+15"; -+ spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0"; -+ spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0"; -+ spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0"; -+ spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0"; -+ spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0"; -+ spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0"; -+ spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0"; -+ spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch b/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch deleted file mode 100644 index 862f322e6..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 2ca9749f5b4326dad52756eaf5e7865504b4d374 Mon Sep 17 00:00:00 2001 -From: ED6E0F17 -Date: Fri, 3 Feb 2017 14:52:42 +0000 -Subject: [PATCH] usb: dwc2: Avoid suspending if we're in gadget mode (#1825) - -I've found when booting HiKey with the usb gadget cable attached -if I then try to connect via adb, I get an infinite spew of: - -dwc2 f72c0000.usb: dwc2_hsotg_ep_sethalt(ep ffffffc0790ecb18 ep1out, 0) -dwc2 f72c0000.usb: dwc2_hsotg_ep_sethalt(ep ffffffc0790eca18 ep1in, 0) - -It seems that the usb autosuspend is suspending the bus shortly -after bootup when the gadget cable is attached. So when adbd -then tries to use the device, it doesn't work and it then tries -to restart it over and over via the ep_sethalt calls (via -FUNCTIONFS_CLEAR_HALT ioctl). - -Chen Yu suggested this patch to avoid suspending if we're -in device mode, and it avoids the problem. - -Cc: Wei Xu -Cc: Guodong Xu -Cc: Amit Pundir -Cc: Rob Herring -Cc: John Youn -Cc: Douglas Anderson -Cc: Chen Yu -Cc: Kishon Vijay Abraham I -Cc: Felipe Balbi -Cc: Greg Kroah-Hartman -Cc: linux-usb@vger.kernel.org -Suggested-by: Chen Yu -Signed-off-by: John Stultz -Signed-off-by: John Youn -Signed-off-by: Felipe Balbi ---- - drivers/usb/dwc2/hcd.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/usb/dwc2/hcd.c -+++ b/drivers/usb/dwc2/hcd.c -@@ -4383,6 +4383,9 @@ static int _dwc2_hcd_suspend(struct usb_ - if (!HCD_HW_ACCESSIBLE(hcd)) - goto unlock; - -+ if (hsotg->op_state == OTG_STATE_B_PERIPHERAL) -+ goto unlock; -+ - if (!hsotg->core_params->hibernation) - goto skip_power_saving; - diff --git a/target/linux/brcm2708/patches-4.9/950-0140-gpio_mem-Remove-unnecessary-dev_info-output-1830.patch b/target/linux/brcm2708/patches-4.9/950-0140-gpio_mem-Remove-unnecessary-dev_info-output-1830.patch deleted file mode 100644 index 8c2d162cc..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0140-gpio_mem-Remove-unnecessary-dev_info-output-1830.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 5ff260778264ec512ea879cea455c86d515cc6ba Mon Sep 17 00:00:00 2001 -From: JamesH65 -Date: Mon, 6 Feb 2017 15:24:47 +0000 -Subject: [PATCH] gpio_mem: Remove unnecessary dev_info output (#1830) - -The open function was spamming syslog every time -called, so have removed call completely. ---- - drivers/char/broadcom/bcm2835-gpiomem.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/char/broadcom/bcm2835-gpiomem.c -+++ b/drivers/char/broadcom/bcm2835-gpiomem.c -@@ -76,8 +76,6 @@ static int bcm2835_gpiomem_open(struct i - int dev = iminor(inode); - int ret = 0; - -- dev_info(inst->dev, "gpiomem device opened."); -- - if (dev != DEVICE_MINOR) { - dev_err(inst->dev, "Unknown minor device: %d", dev); - ret = -ENXIO; diff --git a/target/linux/brcm2708/patches-4.9/950-0141-config-Enable-regulator-support.patch b/target/linux/brcm2708/patches-4.9/950-0141-config-Enable-regulator-support.patch deleted file mode 100644 index bcd766f4d..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0141-config-Enable-regulator-support.patch +++ /dev/null @@ -1,33 +0,0 @@ -From e36583656552b7827a1b9d513ec39e95efa7ce8d Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sun, 22 Jan 2017 12:49:36 +0100 -Subject: [PATCH] config: Enable regulator support - -Signed-off-by: Matthias Reichl ---- - arch/arm/configs/bcm2709_defconfig | 2 ++ - arch/arm/configs/bcmrpi_defconfig | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -664,6 +664,8 @@ CONFIG_STMPE_SPI=y - CONFIG_MFD_ARIZONA_I2C=m - CONFIG_MFD_ARIZONA_SPI=m - CONFIG_MFD_WM5102=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=m - CONFIG_MEDIA_SUPPORT=m - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -658,6 +658,8 @@ CONFIG_STMPE_SPI=y - CONFIG_MFD_ARIZONA_I2C=m - CONFIG_MFD_ARIZONA_SPI=m - CONFIG_MFD_WM5102=y -+CONFIG_REGULATOR=y -+CONFIG_REGULATOR_FIXED_VOLTAGE=m - CONFIG_MEDIA_SUPPORT=m - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_ANALOG_TV_SUPPORT=y diff --git a/target/linux/brcm2708/patches-4.9/950-0142-BCM270x-DT-expose-3.3V-and-5V-system-rails.patch b/target/linux/brcm2708/patches-4.9/950-0142-BCM270x-DT-expose-3.3V-and-5V-system-rails.patch deleted file mode 100644 index 062e6e025..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0142-BCM270x-DT-expose-3.3V-and-5V-system-rails.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 3e2cb84235e904f0c127d34705852ba7893ec9ae Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sun, 22 Jan 2017 12:49:36 +0100 -Subject: [PATCH] BCM270x DT: expose 3.3V and 5V system rails - -Signed-off-by: Matthias Reichl ---- - arch/arm/boot/dts/bcm270x.dtsi | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm/boot/dts/bcm270x.dtsi -+++ b/arch/arm/boot/dts/bcm270x.dtsi -@@ -138,4 +138,20 @@ - status = "disabled"; - }; - }; -+ -+ vdd_5v0_reg: fixedregulator_5v0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "5v0"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ vdd_3v3_reg: fixedregulator_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; - }; diff --git a/target/linux/brcm2708/patches-4.9/950-0143-BCM270x-DT-Consolidate-audio-card-overlays.patch b/target/linux/brcm2708/patches-4.9/950-0143-BCM270x-DT-Consolidate-audio-card-overlays.patch deleted file mode 100644 index 4c123b414..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0143-BCM270x-DT-Consolidate-audio-card-overlays.patch +++ /dev/null @@ -1,273 +0,0 @@ -From f134380c19eb38bc276d6d86fa575821c3493c60 Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sun, 22 Jan 2017 12:49:36 +0100 -Subject: [PATCH] BCM270x DT: Consolidate audio card overlays - -Reference 3.3V / 5V system rails instead of instantiating local -regulators. - -Add missing power supply properties for codecs where these are -required according to the DT bindings docs. - -Signed-off-by: Matthias Reichl ---- - .../arm/boot/dts/overlays/adau1977-adc-overlay.dts | 19 ++-------- - .../dts/overlays/akkordion-iqdacplus-overlay.dts | 3 ++ - .../dts/overlays/hifiberry-dacplus-overlay.dts | 3 ++ - .../boot/dts/overlays/hifiberry-digi-overlay.dts | 2 + - .../dts/overlays/hifiberry-digi-pro-overlay.dts | 2 + - arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts | 3 ++ - .../boot/dts/overlays/iqaudio-dacplus-overlay.dts | 3 ++ - .../overlays/iqaudio-digi-wm8804-audio-overlay.dts | 4 +- - .../arm/boot/dts/overlays/justboom-dac-overlay.dts | 3 ++ - .../boot/dts/overlays/justboom-digi-overlay.dts | 2 + - arch/arm/boot/dts/overlays/raspidac3-overlay.dts | 4 ++ - .../overlays/rra-digidac1-wm8741-audio-overlay.dts | 44 +++------------------- - 12 files changed, 36 insertions(+), 56 deletions(-) - ---- a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts -+++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts -@@ -6,19 +6,6 @@ - compatible = "brcm,bcm2708"; - - fragment@0 { -- target = <&soc>; -- -- __overlay__ { -- codec_supply: fixedregulator@0 { -- compatible = "regulator-fixed"; -- regulator-name = "AVDD"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- }; -- }; -- }; -- -- fragment@1 { - target = <&i2c>; - - __overlay__ { -@@ -30,19 +17,19 @@ - compatible = "adi,adau1977"; - reg = <0x11>; - reset-gpios = <&gpio 5 0>; -- AVDD-supply = <&codec_supply>; -+ AVDD-supply = <&vdd_3v3_reg>; - }; - }; - }; - -- fragment@2 { -+ fragment@1 { - target = <&i2s>; - __overlay__ { - status = "okay"; - }; - }; - -- fragment@3 { -+ fragment@2 { - target = <&sound>; - __overlay__ { - compatible = "adi,adau1977-adc"; ---- a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts -+++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts -@@ -23,6 +23,9 @@ - #sound-dai-cells = <0>; - compatible = "ti,pcm5122"; - reg = <0x4c>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -@@ -34,6 +34,9 @@ - compatible = "ti,pcm5122"; - reg = <0x4d>; - clocks = <&dacpro_osc>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts -@@ -23,6 +23,8 @@ - #sound-dai-cells = <0>; - compatible = "wlf,wm8804"; - reg = <0x3b>; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts -@@ -23,6 +23,8 @@ - #sound-dai-cells = <0>; - compatible = "wlf,wm8804"; - reg = <0x3b>; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts -+++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts -@@ -23,6 +23,9 @@ - #sound-dai-cells = <0>; - compatible = "ti,pcm5122"; - reg = <0x4c>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts -+++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts -@@ -23,6 +23,9 @@ - #sound-dai-cells = <0>; - compatible = "ti,pcm5122"; - reg = <0x4c>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts -+++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts -@@ -24,8 +24,8 @@ - compatible = "wlf,wm8804"; - reg = <0x3b>; - status = "okay"; -- // DVDD-supply = <®_3v3>; -- // PVDD-supply = <®_3v3>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ PVDD-supply = <&vdd_3v3_reg>; - }; - }; - }; ---- a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts -+++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts -@@ -23,6 +23,9 @@ - #sound-dai-cells = <0>; - compatible = "ti,pcm5122"; - reg = <0x4d>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts -+++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts -@@ -23,6 +23,8 @@ - #sound-dai-cells = <0>; - compatible = "wlf,wm8804"; - reg = <0x3b>; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/raspidac3-overlay.dts -+++ b/arch/arm/boot/dts/overlays/raspidac3-overlay.dts -@@ -23,12 +23,16 @@ - #sound-dai-cells = <0>; - compatible = "ti,pcm5122"; - reg = <0x4c>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - - tpa6130a2: tpa6130a2@60 { - compatible = "ti,tpa6130a2"; - reg = <0x60>; -+ Vdd-supply = <&vdd_3v3_reg>; - status = "okay"; - }; - }; ---- a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts -+++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts -@@ -6,45 +6,13 @@ - compatible = "brcm,bcm2708"; - - fragment@0 { -- target-path = "/"; -- __overlay__ { -- aliases { -- ldo0 = &ldo0; -- ldo1 = &ldo1; -- }; -- }; -- }; -- -- fragment@1 { -- target-path = "/soc"; -- __overlay__ { -- -- ldo1: ldo1 { -- compatible = "regulator-fixed"; -- regulator-name = "DC_5V"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- regulator-always-on; -- }; -- -- ldo0: ldo0 { -- compatible = "regulator-fixed"; -- regulator-name = "DC_3V3"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; -- }; -- }; -- -- fragment@2 { - target = <&i2s>; - __overlay__ { - status = "okay"; - }; - }; - -- fragment@3 { -+ fragment@1 { - target = <&i2c1>; - __overlay__ { - #address-cells = <1>; -@@ -56,21 +24,21 @@ - compatible = "wlf,wm8804"; - reg = <0x3b>; - status = "okay"; -- PVDD-supply = <&ldo0>; -- DVDD-supply = <&ldo0>; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; - }; - - wm8742: wm8741@1a { - compatible = "wlf,wm8741"; - reg = <0x1a>; - status = "okay"; -- AVDD-supply = <&ldo1>; -- DVDD-supply = <&ldo0>; -+ AVDD-supply = <&vdd_5v0_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; - }; - }; - }; - -- fragment@4 { -+ fragment@2 { - target = <&sound>; - __overlay__ { - compatible = "rra,digidac1-soundcard"; diff --git a/target/linux/brcm2708/patches-4.9/950-0145-config-enable-Cirrus-Logic-Audio-Card.patch b/target/linux/brcm2708/patches-4.9/950-0145-config-enable-Cirrus-Logic-Audio-Card.patch deleted file mode 100644 index be16a47d2..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0145-config-enable-Cirrus-Logic-Audio-Card.patch +++ /dev/null @@ -1,47 +0,0 @@ -From e34099818448051c8fa84634534dff081540c7b7 Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sun, 22 Jan 2017 12:49:37 +0100 -Subject: [PATCH] config: enable Cirrus Logic Audio Card - -Signed-off-by: Matthias Reichl ---- - arch/arm/configs/bcm2709_defconfig | 2 ++ - arch/arm/configs/bcmrpi_defconfig | 2 ++ - 2 files changed, 4 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -666,6 +666,7 @@ CONFIG_MFD_ARIZONA_SPI=m - CONFIG_MFD_WM5102=y - CONFIG_REGULATOR=y - CONFIG_REGULATOR_FIXED_VOLTAGE=m -+CONFIG_REGULATOR_ARIZONA=m - CONFIG_MEDIA_SUPPORT=m - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -@@ -872,6 +873,7 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m -+CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m - CONFIG_SND_BCM2708_SOC_RPI_DAC=m - CONFIG_SND_BCM2708_SOC_RPI_PROTO=m - CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -660,6 +660,7 @@ CONFIG_MFD_ARIZONA_SPI=m - CONFIG_MFD_WM5102=y - CONFIG_REGULATOR=y - CONFIG_REGULATOR_FIXED_VOLTAGE=m -+CONFIG_REGULATOR_ARIZONA=m - CONFIG_MEDIA_SUPPORT=m - CONFIG_MEDIA_CAMERA_SUPPORT=y - CONFIG_MEDIA_ANALOG_TV_SUPPORT=y -@@ -866,6 +867,7 @@ CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m - CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP=m -+CONFIG_SND_BCM2708_SOC_RPI_CIRRUS=m - CONFIG_SND_BCM2708_SOC_RPI_DAC=m - CONFIG_SND_BCM2708_SOC_RPI_PROTO=m - CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC=m diff --git a/target/linux/brcm2708/patches-4.9/950-0148-sound-Suppress-error-message-about-deferrals.patch b/target/linux/brcm2708/patches-4.9/950-0148-sound-Suppress-error-message-about-deferrals.patch deleted file mode 100644 index 52e36b533..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0148-sound-Suppress-error-message-about-deferrals.patch +++ /dev/null @@ -1,217 +0,0 @@ -From 6ebd83ad7b2bff00ad3e25811c38e73bb4201b07 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 9 Feb 2017 14:40:33 +0000 -Subject: [PATCH] sound: Suppress error message about deferrals - -Since driver load deferrals are expected and will already -have resulted in a kernel message, suppress an essentially -duplicate error message from the RPi audio board drivers. - -Signed-off-by: Phil Elwell ---- - sound/soc/bcm/adau1977-adc.c | 2 +- - sound/soc/bcm/allo-piano-dac.c | 2 +- - sound/soc/bcm/digidac1-soundcard.c | 4 ++-- - sound/soc/bcm/dionaudio_loco.c | 2 +- - sound/soc/bcm/hifiberry_amp.c | 3 +-- - sound/soc/bcm/hifiberry_dac.c | 2 +- - sound/soc/bcm/hifiberry_dacplus.c | 2 +- - sound/soc/bcm/hifiberry_digi.c | 2 +- - sound/soc/bcm/iqaudio-dac.c | 5 +++-- - sound/soc/bcm/iqaudio_digi.c | 2 +- - sound/soc/bcm/justboom-dac.c | 2 +- - sound/soc/bcm/justboom-digi.c | 2 +- - sound/soc/bcm/pisound.c | 3 ++- - sound/soc/bcm/raspidac3.c | 2 +- - sound/soc/bcm/rpi-dac.c | 2 +- - sound/soc/bcm/rpi-proto.c | 3 +-- - 16 files changed, 20 insertions(+), 20 deletions(-) - ---- a/sound/soc/bcm/adau1977-adc.c -+++ b/sound/soc/bcm/adau1977-adc.c -@@ -90,7 +90,7 @@ static int snd_adau1977_adc_probe(struct - } - - ret = snd_soc_register_card(&snd_adau1977_adc); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - - return ret; ---- a/sound/soc/bcm/allo-piano-dac.c -+++ b/sound/soc/bcm/allo-piano-dac.c -@@ -109,7 +109,7 @@ static int snd_allo_piano_dac_probe(stru - } - - ret = snd_soc_register_card(&snd_allo_piano_dac); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); - ---- a/sound/soc/bcm/digidac1-soundcard.c -+++ b/sound/soc/bcm/digidac1-soundcard.c -@@ -387,9 +387,9 @@ static int digidac1_soundcard_probe(stru - } - - ret = snd_soc_register_card(&digidac1_soundcard); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", -- ret); -+ ret); - - return ret; - } ---- a/sound/soc/bcm/dionaudio_loco.c -+++ b/sound/soc/bcm/dionaudio_loco.c -@@ -86,7 +86,7 @@ static int snd_rpi_dionaudio_loco_probe( - } - - ret = snd_soc_register_card(&snd_rpi_dionaudio_loco); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", - ret); - ---- a/sound/soc/bcm/hifiberry_amp.c -+++ b/sound/soc/bcm/hifiberry_amp.c -@@ -96,9 +96,8 @@ static int snd_rpi_hifiberry_amp_probe(s - - ret = snd_soc_register_card(&snd_rpi_hifiberry_amp); - -- if (ret != 0) { -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -- } - - return ret; - } ---- a/sound/soc/bcm/hifiberry_dac.c -+++ b/sound/soc/bcm/hifiberry_dac.c -@@ -90,7 +90,7 @@ static int snd_rpi_hifiberry_dac_probe(s - } - - ret = snd_soc_register_card(&snd_rpi_hifiberry_dac); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - - return ret; ---- a/sound/soc/bcm/hifiberry_dacplus.c -+++ b/sound/soc/bcm/hifiberry_dacplus.c -@@ -324,7 +324,7 @@ static int snd_rpi_hifiberry_dacplus_pro - } - - ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplus); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); - ---- a/sound/soc/bcm/hifiberry_digi.c -+++ b/sound/soc/bcm/hifiberry_digi.c -@@ -242,7 +242,7 @@ static int snd_rpi_hifiberry_digi_probe( - } - - ret = snd_soc_register_card(&snd_rpi_hifiberry_digi); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - - return ret; ---- a/sound/soc/bcm/iqaudio-dac.c -+++ b/sound/soc/bcm/iqaudio-dac.c -@@ -197,8 +197,9 @@ static int snd_rpi_iqaudio_dac_probe(str - - ret = snd_soc_register_card(&snd_rpi_iqaudio_dac); - if (ret) { -- dev_err(&pdev->dev, -- "snd_soc_register_card() failed: %d\n", ret); -+ if (ret != -EPROBE_DEFER) -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); - return ret; - } - ---- a/sound/soc/bcm/iqaudio_digi.c -+++ b/sound/soc/bcm/iqaudio_digi.c -@@ -204,7 +204,7 @@ static int snd_rpi_iqaudio_digi_probe(st - } - - ret = snd_soc_register_card(card); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", - ret); - ---- a/sound/soc/bcm/justboom-dac.c -+++ b/sound/soc/bcm/justboom-dac.c -@@ -128,7 +128,7 @@ static int snd_rpi_justboom_dac_probe(st - } - - ret = snd_soc_register_card(&snd_rpi_justboom_dac); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); - ---- a/sound/soc/bcm/justboom-digi.c -+++ b/sound/soc/bcm/justboom-digi.c -@@ -181,7 +181,7 @@ static int snd_rpi_justboom_digi_probe(s - } - - ret = snd_soc_register_card(&snd_rpi_justboom_digi); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); - ---- a/sound/soc/bcm/pisound.c -+++ b/sound/soc/bcm/pisound.c -@@ -1076,7 +1076,8 @@ static int pisnd_probe(struct platform_d - ret = snd_soc_register_card(&pisnd_card); - - if (ret < 0) { -- printe("snd_soc_register_card() failed: %d\n", ret); -+ if (ret != -EPROBE_DEFER) -+ printe("snd_soc_register_card() failed: %d\n", ret); - pisnd_uninit_gpio(); - kobject_put(pisnd_kobj); - pisnd_spi_uninit(); ---- a/sound/soc/bcm/raspidac3.c -+++ b/sound/soc/bcm/raspidac3.c -@@ -149,7 +149,7 @@ static int snd_rpi_raspidac3_probe(struc - } - - ret = snd_soc_register_card(&snd_rpi_raspidac3); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); - ---- a/sound/soc/bcm/rpi-dac.c -+++ b/sound/soc/bcm/rpi-dac.c -@@ -85,7 +85,7 @@ static int snd_rpi_rpi_dac_probe(struct - } - - ret = snd_soc_register_card(&snd_rpi_rpi_dac); -- if (ret) -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); - - return ret; ---- a/sound/soc/bcm/rpi-proto.c -+++ b/sound/soc/bcm/rpi-proto.c -@@ -117,10 +117,9 @@ static int snd_rpi_proto_probe(struct pl - } - - ret = snd_soc_register_card(&snd_rpi_proto); -- if (ret) { -+ if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, - "snd_soc_register_card() failed: %d\n", ret); -- } - - return ret; - } diff --git a/target/linux/brcm2708/patches-4.9/950-0150-dwc_otg-fix-summarize-urb-actual_length-for-isochron.patch b/target/linux/brcm2708/patches-4.9/950-0150-dwc_otg-fix-summarize-urb-actual_length-for-isochron.patch deleted file mode 100644 index 295db595c..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0150-dwc_otg-fix-summarize-urb-actual_length-for-isochron.patch +++ /dev/null @@ -1,28 +0,0 @@ -From f9efb72c44da2cce9cceca01c8f6118ec1605c69 Mon Sep 17 00:00:00 2001 -From: Martin Cerveny -Date: Mon, 13 Feb 2017 17:23:47 +0100 -Subject: [PATCH] dwc_otg: fix summarize urb->actual_length for isochronous - transfers - -Kernel does not copy input data of ISO transfers to userspace -if actual_length is set only in ISO transfers and not summarized -in urb->actual_length. Fixes raspberrypi/linux#903 ---- - drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c -+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c -@@ -334,10 +334,12 @@ static int _complete(dwc_otg_hcd_t * hcd - int i; - - urb->error_count = dwc_otg_hcd_urb_get_error_count(dwc_otg_urb); -+ urb->actual_length = 0; - for (i = 0; i < urb->number_of_packets; ++i) { - urb->iso_frame_desc[i].actual_length = - dwc_otg_hcd_urb_get_iso_desc_actual_length - (dwc_otg_urb, i); -+ urb->actual_length += urb->iso_frame_desc[i].actual_length; - urb->iso_frame_desc[i].status = - dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_urb, i); - } diff --git a/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch b/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch deleted file mode 100644 index 0fa32dc7b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 2988239956fddb3fb808cfb50fa8d4e68b893f3d Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Thu, 1 Dec 2016 22:00:19 +0100 -Subject: [PATCH] clk: bcm: Support rate change propagation on bcm2835 clocks - -Some peripheral clocks, like the VEC (Video EnCoder) clock need to be set -to a precise rate (in our case 108MHz). With the current implementation, -where peripheral clocks are not allowed to forward rate change requests -to their parents, it is impossible to match this requirement unless the -bootloader has configured things correctly, or a specific rate has been -assigned through the DT (with the assigned-clk-rates property). - -Add a new field to struct bcm2835_clock_data to specify which parent -clocks accept rate change propagation, and support set rate propagation -in bcm2835_clock_determine_rate(). - -Signed-off-by: Boris Brezillon -Reviewed-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit 155e8b3b0ee320ae866b97dd31eba8a1f080a772) ---- - drivers/clk/bcm/clk-bcm2835.c | 67 ++++++++++++++++++++++++++++++++++++++++--- - 1 file changed, 63 insertions(+), 4 deletions(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -436,6 +436,9 @@ struct bcm2835_clock_data { - const char *const *parents; - int num_mux_parents; - -+ /* Bitmap encoding which parents accept rate change propagation. */ -+ unsigned int set_rate_parent; -+ - u32 ctl_reg; - u32 div_reg; - -@@ -1023,10 +1026,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw) - return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0; - } - -+static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, -+ int parent_idx, -+ unsigned long rate, -+ u32 *div, -+ unsigned long *prate) -+{ -+ struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); -+ struct bcm2835_cprman *cprman = clock->cprman; -+ const struct bcm2835_clock_data *data = clock->data; -+ unsigned long best_rate; -+ u32 curdiv, mindiv, maxdiv; -+ struct clk_hw *parent; -+ -+ parent = clk_hw_get_parent_by_index(hw, parent_idx); -+ -+ if (!(BIT(parent_idx) & data->set_rate_parent)) { -+ *prate = clk_hw_get_rate(parent); -+ *div = bcm2835_clock_choose_div(hw, rate, *prate, true); -+ -+ return bcm2835_clock_rate_from_divisor(clock, *prate, -+ *div); -+ } -+ -+ if (data->frac_bits) -+ dev_warn(cprman->dev, -+ "frac bits are not used when propagating rate change"); -+ -+ /* clamp to min divider of 2 if we're dealing with a mash clock */ -+ mindiv = data->is_mash_clock ? 2 : 1; -+ maxdiv = BIT(data->int_bits) - 1; -+ -+ /* TODO: Be smart, and only test a subset of the available divisors. */ -+ for (curdiv = mindiv; curdiv <= maxdiv; curdiv++) { -+ unsigned long tmp_rate; -+ -+ tmp_rate = clk_hw_round_rate(parent, rate * curdiv); -+ tmp_rate /= curdiv; -+ if (curdiv == mindiv || -+ (tmp_rate > best_rate && tmp_rate <= rate)) -+ best_rate = tmp_rate; -+ -+ if (best_rate == rate) -+ break; -+ } -+ -+ *div = curdiv << CM_DIV_FRAC_BITS; -+ *prate = curdiv * best_rate; -+ -+ return best_rate; -+} -+ - static int bcm2835_clock_determine_rate(struct clk_hw *hw, - struct clk_rate_request *req) - { -- struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); - struct clk_hw *parent, *best_parent = NULL; - bool current_parent_is_pllc; - unsigned long rate, best_rate = 0; -@@ -1054,9 +1107,8 @@ static int bcm2835_clock_determine_rate( - if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc) - continue; - -- prate = clk_hw_get_rate(parent); -- div = bcm2835_clock_choose_div(hw, req->rate, prate, true); -- rate = bcm2835_clock_rate_from_divisor(clock, prate, div); -+ rate = bcm2835_clock_choose_div_and_prate(hw, i, req->rate, -+ &div, &prate); - if (rate > best_rate && rate <= req->rate) { - best_parent = parent; - best_prate = prate; -@@ -1277,6 +1329,13 @@ static struct clk_hw *bcm2835_register_c - if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0) - init.flags &= ~CLK_IS_CRITICAL; - -+ /* -+ * Pass the CLK_SET_RATE_PARENT flag if we are allowed to propagate -+ * rate changes on at least of the parents. -+ */ -+ if (data->set_rate_parent) -+ init.flags |= CLK_SET_RATE_PARENT; -+ - if (data->is_vpu_clock) { - init.ops = &bcm2835_vpu_clock_clk_ops; - } else { diff --git a/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch b/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch deleted file mode 100644 index bab716142..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5209e1b8f78fd1184f25cf19cf0daa58f4ad6599 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Thu, 1 Dec 2016 22:00:20 +0100 -Subject: [PATCH] clk: bcm: Allow rate change propagation to PLLH_AUX on VEC - clock - -The VEC clock requires needs to be set at exactly 108MHz. Allow rate -change propagation on PLLH_AUX to match this requirement wihtout -impacting other IPs (PLLH is currently only used by the HDMI encoder, -which cannot be enabled when the VEC encoder is enabled). - -Signed-off-by: Boris Brezillon -Reviewed-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit d86d46af84855403c00018be1c3e7bc190f2a6cd) ---- - drivers/clk/bcm/clk-bcm2835.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1876,7 +1876,12 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_VECCTL, - .div_reg = CM_VECDIV, - .int_bits = 4, -- .frac_bits = 0), -+ .frac_bits = 0, -+ /* -+ * Allow rate change propagation only on PLLH_AUX which is -+ * assigned index 7 in the parent array. -+ */ -+ .set_rate_parent = BIT(7)), - - /* dsi clocks */ - [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK( diff --git a/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch b/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch deleted file mode 100644 index a40245b8e..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 9db88c2a81a12eb2b2953ee1f9090624fcc47dab Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 12 Dec 2016 09:00:53 +0100 -Subject: [PATCH] clk: bcm: Fix 'maybe-uninitialized' warning in - bcm2835_clock_choose_div_and_prate() - -best_rate is reported as potentially uninitialized by gcc. - -Signed-off-by: Boris Brezillon -Fixes: 155e8b3b0ee3 ("clk: bcm: Support rate change propagation on bcm2835 clocks") -Reported-by: Stephen Rothwell -Reviewed-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit 2aab7a2055a1705c9e30920d95a596226999eb21) ---- - drivers/clk/bcm/clk-bcm2835.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1035,7 +1035,7 @@ static unsigned long bcm2835_clock_choos - struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); - struct bcm2835_cprman *cprman = clock->cprman; - const struct bcm2835_clock_data *data = clock->data; -- unsigned long best_rate; -+ unsigned long best_rate = 0; - u32 curdiv, mindiv, maxdiv; - struct clk_hw *parent; - diff --git a/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch b/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch deleted file mode 100644 index 842e57676..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch +++ /dev/null @@ -1,172 +0,0 @@ -From 999db52750c062708532e1357ea3942cc619794f Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 18 Jan 2017 07:31:55 +1100 -Subject: [PATCH] clk: bcm2835: Don't rate change PLLs on behalf of DSI PLL - dividers. - -Our core PLLs are intended to be configured once and left alone. With -the SET_RATE_PARENT, asking to set the PLLD_DSI1 clock rate would -change PLLD just to get closer to the requested DSI clock, thus -changing PLLD_PER, the UART and ethernet PHY clock rates downstream of -it, and breaking ethernet. - -We *do* want PLLH to change so that PLLH_AUX can be exactly the value -we want, though. Thus, we need to have a per-divider policy of -whether to pass rate changes up. - -Signed-off-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit 55486091bd1e1c5ed28c43c0d6b3392468a9adb5) ---- - drivers/clk/bcm/clk-bcm2835.c | 42 ++++++++++++++++++++++++++++-------------- - 1 file changed, 28 insertions(+), 14 deletions(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -428,6 +428,7 @@ struct bcm2835_pll_divider_data { - u32 load_mask; - u32 hold_mask; - u32 fixed_divider; -+ u32 flags; - }; - - struct bcm2835_clock_data { -@@ -1258,7 +1259,7 @@ bcm2835_register_pll_divider(struct bcm2 - init.num_parents = 1; - init.name = divider_name; - init.ops = &bcm2835_pll_divider_clk_ops; -- init.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED; -+ init.flags = data->flags | CLK_IGNORE_UNUSED; - - divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL); - if (!divider) -@@ -1481,7 +1482,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLA_CORE, - .load_mask = CM_PLLA_LOADCORE, - .hold_mask = CM_PLLA_HOLDCORE, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( - .name = "plla_per", - .source_pll = "plla", -@@ -1489,7 +1491,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLA_PER, - .load_mask = CM_PLLA_LOADPER, - .hold_mask = CM_PLLA_HOLDPER, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( - .name = "plla_dsi0", - .source_pll = "plla", -@@ -1505,7 +1508,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLA_CCP2, - .load_mask = CM_PLLA_LOADCCP2, - .hold_mask = CM_PLLA_HOLDCCP2, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - - /* PLLB is used for the ARM's clock. */ - [BCM2835_PLLB] = REGISTER_PLL( -@@ -1529,7 +1533,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLB_ARM, - .load_mask = CM_PLLB_LOADARM, - .hold_mask = CM_PLLB_HOLDARM, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - - /* - * PLLC is the core PLL, used to drive the core VPU clock. -@@ -1558,7 +1563,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLC_CORE0, - .load_mask = CM_PLLC_LOADCORE0, - .hold_mask = CM_PLLC_HOLDCORE0, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV( - .name = "pllc_core1", - .source_pll = "pllc", -@@ -1566,7 +1572,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLC_CORE1, - .load_mask = CM_PLLC_LOADCORE1, - .hold_mask = CM_PLLC_HOLDCORE1, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV( - .name = "pllc_core2", - .source_pll = "pllc", -@@ -1574,7 +1581,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLC_CORE2, - .load_mask = CM_PLLC_LOADCORE2, - .hold_mask = CM_PLLC_HOLDCORE2, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLC_PER] = REGISTER_PLL_DIV( - .name = "pllc_per", - .source_pll = "pllc", -@@ -1582,7 +1590,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLC_PER, - .load_mask = CM_PLLC_LOADPER, - .hold_mask = CM_PLLC_HOLDPER, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - - /* - * PLLD is the display PLL, used to drive DSI display panels. -@@ -1611,7 +1620,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLD_CORE, - .load_mask = CM_PLLD_LOADCORE, - .hold_mask = CM_PLLD_HOLDCORE, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLD_PER] = REGISTER_PLL_DIV( - .name = "plld_per", - .source_pll = "plld", -@@ -1619,7 +1629,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLD_PER, - .load_mask = CM_PLLD_LOADPER, - .hold_mask = CM_PLLD_HOLDPER, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( - .name = "plld_dsi0", - .source_pll = "plld", -@@ -1664,7 +1675,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLH_RCAL, - .load_mask = CM_PLLH_LOADRCAL, - .hold_mask = 0, -- .fixed_divider = 10), -+ .fixed_divider = 10, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV( - .name = "pllh_aux", - .source_pll = "pllh", -@@ -1672,7 +1684,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLH_AUX, - .load_mask = CM_PLLH_LOADAUX, - .hold_mask = 0, -- .fixed_divider = 1), -+ .fixed_divider = 1, -+ .flags = CLK_SET_RATE_PARENT), - [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( - .name = "pllh_pix", - .source_pll = "pllh", -@@ -1680,7 +1693,8 @@ static const struct bcm2835_clk_desc clk - .a2w_reg = A2W_PLLH_PIX, - .load_mask = CM_PLLH_LOADPIX, - .hold_mask = 0, -- .fixed_divider = 10), -+ .fixed_divider = 10, -+ .flags = CLK_SET_RATE_PARENT), - - /* the clocks */ - diff --git a/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch b/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch deleted file mode 100644 index 0a06cabe6..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch +++ /dev/null @@ -1,238 +0,0 @@ -From 876f8ef32ec09fb566cc6ecdf4c96a8348f135b6 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 18 Jan 2017 07:31:56 +1100 -Subject: [PATCH] clk: bcm2835: Register the DSI0/DSI1 pixel clocks. - -The DSI pixel clocks are muxed from clocks generated in the analog phy -by the DSI driver. In order to set them as parents, we need to do the -same name lookup dance on them as we do for our root oscillator. - -Signed-off-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit 8a39e9fa578229fd4604266c6ebb1a3a77d7994c) ---- - .../bindings/clock/brcm,bcm2835-cprman.txt | 15 ++- - drivers/clk/bcm/clk-bcm2835.c | 121 +++++++++++++++++++-- - include/dt-bindings/clock/bcm2835.h | 2 + - 3 files changed, 125 insertions(+), 13 deletions(-) - ---- a/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt -+++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-cprman.txt -@@ -16,7 +16,20 @@ Required properties: - - #clock-cells: Should be <1>. The permitted clock-specifier values can be - found in include/dt-bindings/clock/bcm2835.h - - reg: Specifies base physical address and size of the registers --- clocks: The external oscillator clock phandle -+- clocks: phandles to the parent clocks used as input to the module, in -+ the following order: -+ -+ - External oscillator -+ - DSI0 byte clock -+ - DSI0 DDR2 clock -+ - DSI0 DDR clock -+ - DSI1 byte clock -+ - DSI1 DDR2 clock -+ - DSI1 DDR clock -+ -+ Only external oscillator is required. The DSI clocks may -+ not be present, in which case their children will be -+ unusable. - - Example: - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -297,11 +297,32 @@ - #define LOCK_TIMEOUT_NS 100000000 - #define BCM2835_MAX_FB_RATE 1750000000u - -+/* -+ * Names of clocks used within the driver that need to be replaced -+ * with an external parent's name. This array is in the order that -+ * the clocks node in the DT references external clocks. -+ */ -+static const char *const cprman_parent_names[] = { -+ "xosc", -+ "dsi0_byte", -+ "dsi0_ddr2", -+ "dsi0_ddr", -+ "dsi1_byte", -+ "dsi1_ddr2", -+ "dsi1_ddr", -+}; -+ - struct bcm2835_cprman { - struct device *dev; - void __iomem *regs; - spinlock_t regs_lock; /* spinlock for all clocks */ -- const char *osc_name; -+ -+ /* -+ * Real names of cprman clock parents looked up through -+ * of_clk_get_parent_name(), which will be used in the -+ * parent_names[] arrays for clock registration. -+ */ -+ const char *real_parent_names[ARRAY_SIZE(cprman_parent_names)]; - - /* Must be last */ - struct clk_hw_onecell_data onecell; -@@ -913,6 +934,9 @@ static long bcm2835_clock_rate_from_divi - const struct bcm2835_clock_data *data = clock->data; - u64 temp; - -+ if (data->int_bits == 0 && data->frac_bits == 0) -+ return parent_rate; -+ - /* - * The divisor is a 12.12 fixed point field, but only some of - * the bits are populated in any given clock. -@@ -936,7 +960,12 @@ static unsigned long bcm2835_clock_get_r - struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); - struct bcm2835_cprman *cprman = clock->cprman; - const struct bcm2835_clock_data *data = clock->data; -- u32 div = cprman_read(cprman, data->div_reg); -+ u32 div; -+ -+ if (data->int_bits == 0 && data->frac_bits == 0) -+ return parent_rate; -+ -+ div = cprman_read(cprman, data->div_reg); - - return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); - } -@@ -1215,7 +1244,7 @@ static struct clk_hw *bcm2835_register_p - memset(&init, 0, sizeof(init)); - - /* All of the PLLs derive from the external oscillator. */ -- init.parent_names = &cprman->osc_name; -+ init.parent_names = &cprman->real_parent_names[0]; - init.num_parents = 1; - init.name = data->name; - init.ops = &bcm2835_pll_clk_ops; -@@ -1301,18 +1330,22 @@ static struct clk_hw *bcm2835_register_c - struct bcm2835_clock *clock; - struct clk_init_data init; - const char *parents[1 << CM_SRC_BITS]; -- size_t i; -+ size_t i, j; - int ret; - - /* -- * Replace our "xosc" references with the oscillator's -- * actual name. -+ * Replace our strings referencing parent clocks with the -+ * actual clock-output-name of the parent. - */ - for (i = 0; i < data->num_mux_parents; i++) { -- if (strcmp(data->parents[i], "xosc") == 0) -- parents[i] = cprman->osc_name; -- else -- parents[i] = data->parents[i]; -+ parents[i] = data->parents[i]; -+ -+ for (j = 0; j < ARRAY_SIZE(cprman_parent_names); j++) { -+ if (strcmp(parents[i], cprman_parent_names[j]) == 0) { -+ parents[i] = cprman->real_parent_names[j]; -+ break; -+ } -+ } - } - - memset(&init, 0, sizeof(init)); -@@ -1448,6 +1481,47 @@ static const char *const bcm2835_clock_v - __VA_ARGS__) - - /* -+ * DSI parent clocks. The DSI byte/DDR/DDR2 clocks come from the DSI -+ * analog PHY. The _inv variants are generated internally to cprman, -+ * but we don't use them so they aren't hooked up. -+ */ -+static const char *const bcm2835_clock_dsi0_parents[] = { -+ "gnd", -+ "xosc", -+ "testdebug0", -+ "testdebug1", -+ "dsi0_ddr", -+ "dsi0_ddr_inv", -+ "dsi0_ddr2", -+ "dsi0_ddr2_inv", -+ "dsi0_byte", -+ "dsi0_byte_inv", -+}; -+ -+static const char *const bcm2835_clock_dsi1_parents[] = { -+ "gnd", -+ "xosc", -+ "testdebug0", -+ "testdebug1", -+ "dsi1_ddr", -+ "dsi1_ddr_inv", -+ "dsi1_ddr2", -+ "dsi1_ddr2_inv", -+ "dsi1_byte", -+ "dsi1_byte_inv", -+}; -+ -+#define REGISTER_DSI0_CLK(...) REGISTER_CLK( \ -+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi0_parents), \ -+ .parents = bcm2835_clock_dsi0_parents, \ -+ __VA_ARGS__) -+ -+#define REGISTER_DSI1_CLK(...) REGISTER_CLK( \ -+ .num_mux_parents = ARRAY_SIZE(bcm2835_clock_dsi1_parents), \ -+ .parents = bcm2835_clock_dsi1_parents, \ -+ __VA_ARGS__) -+ -+/* - * the real definition of all the pll, pll_dividers and clocks - * these make use of the above REGISTER_* macros - */ -@@ -1910,6 +1984,18 @@ static const struct bcm2835_clk_desc clk - .div_reg = CM_DSI1EDIV, - .int_bits = 4, - .frac_bits = 8), -+ [BCM2835_CLOCK_DSI0P] = REGISTER_DSI0_CLK( -+ .name = "dsi0p", -+ .ctl_reg = CM_DSI0PCTL, -+ .div_reg = CM_DSI0PDIV, -+ .int_bits = 0, -+ .frac_bits = 0), -+ [BCM2835_CLOCK_DSI1P] = REGISTER_DSI1_CLK( -+ .name = "dsi1p", -+ .ctl_reg = CM_DSI1PCTL, -+ .div_reg = CM_DSI1PDIV, -+ .int_bits = 0, -+ .frac_bits = 0), - - /* the gates */ - -@@ -1968,8 +2054,19 @@ static int bcm2835_clk_probe(struct plat - if (IS_ERR(cprman->regs)) - return PTR_ERR(cprman->regs); - -- cprman->osc_name = of_clk_get_parent_name(dev->of_node, 0); -- if (!cprman->osc_name) -+ memcpy(cprman->real_parent_names, cprman_parent_names, -+ sizeof(cprman_parent_names)); -+ of_clk_parent_fill(dev->of_node, cprman->real_parent_names, -+ ARRAY_SIZE(cprman_parent_names)); -+ -+ /* -+ * Make sure the external oscillator has been registered. -+ * -+ * The other (DSI) clocks are not present on older device -+ * trees, which we still need to support for backwards -+ * compatibility. -+ */ -+ if (!cprman->real_parent_names[0]) - return -ENODEV; - - platform_set_drvdata(pdev, cprman); ---- a/include/dt-bindings/clock/bcm2835.h -+++ b/include/dt-bindings/clock/bcm2835.h -@@ -64,3 +64,5 @@ - #define BCM2835_CLOCK_CAM1 46 - #define BCM2835_CLOCK_DSI0E 47 - #define BCM2835_CLOCK_DSI1E 48 -+#define BCM2835_CLOCK_DSI0P 49 -+#define BCM2835_CLOCK_DSI1P 50 diff --git a/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch b/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch deleted file mode 100644 index d10f60017..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch +++ /dev/null @@ -1,346 +0,0 @@ -From 546bac0479e51024027f8c8820f912573643b101 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 18 Jan 2017 07:31:57 +1100 -Subject: [PATCH] clk: bcm2835: Add leaf clock measurement support, disabled by - default - -This proved incredibly useful during debugging of the DSI driver, to -see if our clocks were running at rate we requested. Let's leave it -here for the next person interacting with clocks on the platform (and -so that hopefully we can just hook it up to debugfs some day). - -Signed-off-by: Eric Anholt -Signed-off-by: Stephen Boyd -(cherry picked from commit 3f9195811d8d829556c4cd88d3f9e56a80d5ba60) ---- - drivers/clk/bcm/clk-bcm2835.c | 144 ++++++++++++++++++++++++++++++++++-------- - 1 file changed, 119 insertions(+), 25 deletions(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -98,7 +99,8 @@ - #define CM_SMIDIV 0x0b4 - /* no definition for 0x0b8 and 0x0bc */ - #define CM_TCNTCTL 0x0c0 --#define CM_TCNTDIV 0x0c4 -+# define CM_TCNT_SRC1_SHIFT 12 -+#define CM_TCNTCNT 0x0c4 - #define CM_TECCTL 0x0c8 - #define CM_TECDIV 0x0cc - #define CM_TD0CTL 0x0d0 -@@ -338,6 +340,61 @@ static inline u32 cprman_read(struct bcm - return readl(cprman->regs + reg); - } - -+/* Does a cycle of measuring a clock through the TCNT clock, which may -+ * source from many other clocks in the system. -+ */ -+static unsigned long bcm2835_measure_tcnt_mux(struct bcm2835_cprman *cprman, -+ u32 tcnt_mux) -+{ -+ u32 osccount = 19200; /* 1ms */ -+ u32 count; -+ ktime_t timeout; -+ -+ spin_lock(&cprman->regs_lock); -+ -+ cprman_write(cprman, CM_TCNTCTL, CM_KILL); -+ -+ cprman_write(cprman, CM_TCNTCTL, -+ (tcnt_mux & CM_SRC_MASK) | -+ (tcnt_mux >> CM_SRC_BITS) << CM_TCNT_SRC1_SHIFT); -+ -+ cprman_write(cprman, CM_OSCCOUNT, osccount); -+ -+ /* do a kind delay at the start */ -+ mdelay(1); -+ -+ /* Finish off whatever is left of OSCCOUNT */ -+ timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS); -+ while (cprman_read(cprman, CM_OSCCOUNT)) { -+ if (ktime_after(ktime_get(), timeout)) { -+ dev_err(cprman->dev, "timeout waiting for OSCCOUNT\n"); -+ count = 0; -+ goto out; -+ } -+ cpu_relax(); -+ } -+ -+ /* Wait for BUSY to clear. */ -+ timeout = ktime_add_ns(ktime_get(), LOCK_TIMEOUT_NS); -+ while (cprman_read(cprman, CM_TCNTCTL) & CM_BUSY) { -+ if (ktime_after(ktime_get(), timeout)) { -+ dev_err(cprman->dev, "timeout waiting for !BUSY\n"); -+ count = 0; -+ goto out; -+ } -+ cpu_relax(); -+ } -+ -+ count = cprman_read(cprman, CM_TCNTCNT); -+ -+ cprman_write(cprman, CM_TCNTCTL, 0); -+ -+out: -+ spin_unlock(&cprman->regs_lock); -+ -+ return count * 1000; -+} -+ - static int bcm2835_debugfs_regset(struct bcm2835_cprman *cprman, u32 base, - struct debugfs_reg32 *regs, size_t nregs, - struct dentry *dentry) -@@ -473,6 +530,8 @@ struct bcm2835_clock_data { - - bool is_vpu_clock; - bool is_mash_clock; -+ -+ u32 tcnt_mux; - }; - - struct bcm2835_gate_data { -@@ -1014,6 +1073,17 @@ static int bcm2835_clock_on(struct clk_h - CM_GATE); - spin_unlock(&cprman->regs_lock); - -+ /* Debug code to measure the clock once it's turned on to see -+ * if it's ticking at the rate we expect. -+ */ -+ if (data->tcnt_mux && false) { -+ dev_info(cprman->dev, -+ "clk %s: rate %ld, measure %ld\n", -+ data->name, -+ clk_hw_get_rate(hw), -+ bcm2835_measure_tcnt_mux(cprman, data->tcnt_mux)); -+ } -+ - return 0; - } - -@@ -1780,7 +1850,8 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_OTPCTL, - .div_reg = CM_OTPDIV, - .int_bits = 4, -- .frac_bits = 0), -+ .frac_bits = 0, -+ .tcnt_mux = 6), - /* - * Used for a 1Mhz clock for the system clocksource, and also used - * bythe watchdog timer and the camera pulse generator. -@@ -1814,13 +1885,15 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_H264CTL, - .div_reg = CM_H264DIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 1), - [BCM2835_CLOCK_ISP] = REGISTER_VPU_CLK( - .name = "isp", - .ctl_reg = CM_ISPCTL, - .div_reg = CM_ISPDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 2), - - /* - * Secondary SDRAM clock. Used for low-voltage modes when the PLL -@@ -1831,13 +1904,15 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_SDCCTL, - .div_reg = CM_SDCDIV, - .int_bits = 6, -- .frac_bits = 0), -+ .frac_bits = 0, -+ .tcnt_mux = 3), - [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK( - .name = "v3d", - .ctl_reg = CM_V3DCTL, - .div_reg = CM_V3DDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 4), - /* - * VPU clock. This doesn't have an enable bit, since it drives - * the bus for everything else, and is special so it doesn't need -@@ -1851,7 +1926,8 @@ static const struct bcm2835_clk_desc clk - .int_bits = 12, - .frac_bits = 8, - .flags = CLK_IS_CRITICAL, -- .is_vpu_clock = true), -+ .is_vpu_clock = true, -+ .tcnt_mux = 5), - - /* clocks with per parent mux */ - [BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK( -@@ -1859,19 +1935,22 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_AVEOCTL, - .div_reg = CM_AVEODIV, - .int_bits = 4, -- .frac_bits = 0), -+ .frac_bits = 0, -+ .tcnt_mux = 38), - [BCM2835_CLOCK_CAM0] = REGISTER_PER_CLK( - .name = "cam0", - .ctl_reg = CM_CAM0CTL, - .div_reg = CM_CAM0DIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 14), - [BCM2835_CLOCK_CAM1] = REGISTER_PER_CLK( - .name = "cam1", - .ctl_reg = CM_CAM1CTL, - .div_reg = CM_CAM1DIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 15), - [BCM2835_CLOCK_DFT] = REGISTER_PER_CLK( - .name = "dft", - .ctl_reg = CM_DFTCTL, -@@ -1883,7 +1962,8 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_DPICTL, - .div_reg = CM_DPIDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 17), - - /* Arasan EMMC clock */ - [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK( -@@ -1891,7 +1971,8 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_EMMCCTL, - .div_reg = CM_EMMCDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 39), - - /* General purpose (GPIO) clocks */ - [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK( -@@ -1900,7 +1981,8 @@ static const struct bcm2835_clk_desc clk - .div_reg = CM_GP0DIV, - .int_bits = 12, - .frac_bits = 12, -- .is_mash_clock = true), -+ .is_mash_clock = true, -+ .tcnt_mux = 20), - [BCM2835_CLOCK_GP1] = REGISTER_PER_CLK( - .name = "gp1", - .ctl_reg = CM_GP1CTL, -@@ -1908,7 +1990,8 @@ static const struct bcm2835_clk_desc clk - .int_bits = 12, - .frac_bits = 12, - .flags = CLK_IS_CRITICAL, -- .is_mash_clock = true), -+ .is_mash_clock = true, -+ .tcnt_mux = 21), - [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK( - .name = "gp2", - .ctl_reg = CM_GP2CTL, -@@ -1923,40 +2006,46 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_HSMCTL, - .div_reg = CM_HSMDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 22), - [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK( - .name = "pcm", - .ctl_reg = CM_PCMCTL, - .div_reg = CM_PCMDIV, - .int_bits = 12, - .frac_bits = 12, -- .is_mash_clock = true), -+ .is_mash_clock = true, -+ .tcnt_mux = 23), - [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK( - .name = "pwm", - .ctl_reg = CM_PWMCTL, - .div_reg = CM_PWMDIV, - .int_bits = 12, - .frac_bits = 12, -- .is_mash_clock = true), -+ .is_mash_clock = true, -+ .tcnt_mux = 24), - [BCM2835_CLOCK_SLIM] = REGISTER_PER_CLK( - .name = "slim", - .ctl_reg = CM_SLIMCTL, - .div_reg = CM_SLIMDIV, - .int_bits = 12, - .frac_bits = 12, -- .is_mash_clock = true), -+ .is_mash_clock = true, -+ .tcnt_mux = 25), - [BCM2835_CLOCK_SMI] = REGISTER_PER_CLK( - .name = "smi", - .ctl_reg = CM_SMICTL, - .div_reg = CM_SMIDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 27), - [BCM2835_CLOCK_UART] = REGISTER_PER_CLK( - .name = "uart", - .ctl_reg = CM_UARTCTL, - .div_reg = CM_UARTDIV, - .int_bits = 10, -- .frac_bits = 12), -+ .frac_bits = 12, -+ .tcnt_mux = 28), - - /* TV encoder clock. Only operating frequency is 108Mhz. */ - [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK( -@@ -1969,7 +2058,8 @@ static const struct bcm2835_clk_desc clk - * Allow rate change propagation only on PLLH_AUX which is - * assigned index 7 in the parent array. - */ -- .set_rate_parent = BIT(7)), -+ .set_rate_parent = BIT(7), -+ .tcnt_mux = 29), - - /* dsi clocks */ - [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK( -@@ -1977,25 +2067,29 @@ static const struct bcm2835_clk_desc clk - .ctl_reg = CM_DSI0ECTL, - .div_reg = CM_DSI0EDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 18), - [BCM2835_CLOCK_DSI1E] = REGISTER_PER_CLK( - .name = "dsi1e", - .ctl_reg = CM_DSI1ECTL, - .div_reg = CM_DSI1EDIV, - .int_bits = 4, -- .frac_bits = 8), -+ .frac_bits = 8, -+ .tcnt_mux = 19), - [BCM2835_CLOCK_DSI0P] = REGISTER_DSI0_CLK( - .name = "dsi0p", - .ctl_reg = CM_DSI0PCTL, - .div_reg = CM_DSI0PDIV, - .int_bits = 0, -- .frac_bits = 0), -+ .frac_bits = 0, -+ .tcnt_mux = 12), - [BCM2835_CLOCK_DSI1P] = REGISTER_DSI1_CLK( - .name = "dsi1p", - .ctl_reg = CM_DSI1PCTL, - .div_reg = CM_DSI1PDIV, - .int_bits = 0, -- .frac_bits = 0), -+ .frac_bits = 0, -+ .tcnt_mux = 13), - - /* the gates */ - diff --git a/target/linux/brcm2708/patches-4.9/950-0158-drm-panel-Add-support-for-the-Raspberry-Pi-7-Touchsc.patch b/target/linux/brcm2708/patches-4.9/950-0158-drm-panel-Add-support-for-the-Raspberry-Pi-7-Touchsc.patch deleted file mode 100644 index 027e5c07e..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0158-drm-panel-Add-support-for-the-Raspberry-Pi-7-Touchsc.patch +++ /dev/null @@ -1,575 +0,0 @@ -From e2d195723ec030733cdaf623c9419af5f308b230 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 26 Apr 2016 13:46:13 -0700 -Subject: [PATCH] drm/panel: Add support for the Raspberry Pi 7" Touchscreen. - -This driver communicates with the Atmel microcontroller for sequencing -the poweron of the TC358762 DSI-DPI bridge and controlling the -backlight PWM. - -The following lines are required in config.txt, to keep the firmware -from trying to bash our I2C lines and steal the DSI interrupts: - - disable_touchscreen=1 - ignore_lcd=2 - mask_gpu_interrupt1=0x1000 - -This means that the firmware won't power on the panel at boot time (no -rainbow) and the touchscreen input won't work. The native input -driver for the touchscreen still needs to be written. - -v2: Set the same default orientation as the closed source firmware - used, which is the best for viewing angle. - -Signed-off-by: Eric Anholt ---- - drivers/gpu/drm/panel/Kconfig | 8 + - drivers/gpu/drm/panel/Makefile | 1 + - .../gpu/drm/panel/panel-raspberrypi-touchscreen.c | 514 +++++++++++++++++++++ - 3 files changed, 523 insertions(+) - create mode 100644 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c - ---- a/drivers/gpu/drm/panel/Kconfig -+++ b/drivers/gpu/drm/panel/Kconfig -@@ -52,6 +52,14 @@ config DRM_PANEL_PANASONIC_VVX10F034N00 - WUXGA (1920x1200) Novatek NT1397-based DSI panel as found in some - Xperia Z2 tablets - -+config DRM_PANEL_RASPBERRYPI_TOUCHSCREEN -+ tristate "Raspberry Pi 7-inch touchscreen panel" -+ depends on DRM_MIPI_DSI -+ help -+ Say Y here if you want to enable support for the Raspberry -+ Pi 7" Touchscreen. To compile this driver as a module, -+ choose M here. -+ - config DRM_PANEL_SAMSUNG_S6E8AA0 - tristate "Samsung S6E8AA0 DSI video mode panel" - depends on OF ---- a/drivers/gpu/drm/panel/Makefile -+++ b/drivers/gpu/drm/panel/Makefile -@@ -2,6 +2,7 @@ obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel- - obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o - obj-$(CONFIG_DRM_PANEL_LG_LG4573) += panel-lg-lg4573.o - obj-$(CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00) += panel-panasonic-vvx10f034n00.o -+obj-$(CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN) += panel-raspberrypi-touchscreen.o - obj-$(CONFIG_DRM_PANEL_SAMSUNG_LD9040) += panel-samsung-ld9040.o - obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o - obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o ---- /dev/null -+++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c -@@ -0,0 +1,514 @@ -+/* -+ * Copyright © 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * Portions of this file (derived from panel-simple.c) are: -+ * -+ * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sub license, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+/** -+ * DOC: Raspberry Pi 7" touchscreen panel driver. -+ * -+ * The 7" touchscreen consists of a DPI LCD panel, a Toshiba -+ * TC358762XBG DSI-DPI bridge, and an I2C-connected Atmel ATTINY88-MUR -+ * controlling power management, the LCD PWM, and the touchscreen. -+ * -+ * This driver presents this device as a MIPI DSI panel to the DRM -+ * driver, and should expose the touchscreen as a HID device. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+/* I2C registers of the Atmel microcontroller. */ -+enum REG_ADDR { -+ REG_ID = 0x80, -+ REG_PORTA, // BIT(2) for horizontal flip, BIT(3) for vertical flip -+ REG_PORTB, -+ REG_PORTC, -+ REG_PORTD, -+ REG_POWERON, -+ REG_PWM, -+ REG_DDRA, -+ REG_DDRB, -+ REG_DDRC, -+ REG_DDRD, -+ REG_TEST, -+ REG_WR_ADDRL, -+ REG_WR_ADDRH, -+ REG_READH, -+ REG_READL, -+ REG_WRITEH, -+ REG_WRITEL, -+ REG_ID2, -+}; -+ -+/* We only turn the PWM on or off, without varying values. */ -+#define RPI_TOUCHSCREEN_MAX_BRIGHTNESS 1 -+ -+/* DSI D-PHY Layer Registers */ -+#define D0W_DPHYCONTTX 0x0004 -+#define CLW_DPHYCONTRX 0x0020 -+#define D0W_DPHYCONTRX 0x0024 -+#define D1W_DPHYCONTRX 0x0028 -+#define COM_DPHYCONTRX 0x0038 -+#define CLW_CNTRL 0x0040 -+#define D0W_CNTRL 0x0044 -+#define D1W_CNTRL 0x0048 -+#define DFTMODE_CNTRL 0x0054 -+ -+/* DSI PPI Layer Registers */ -+#define PPI_STARTPPI 0x0104 -+#define PPI_BUSYPPI 0x0108 -+#define PPI_LINEINITCNT 0x0110 -+#define PPI_LPTXTIMECNT 0x0114 -+//#define PPI_LANEENABLE 0x0134 -+//#define PPI_TX_RX_TA 0x013C -+#define PPI_CLS_ATMR 0x0140 -+#define PPI_D0S_ATMR 0x0144 -+#define PPI_D1S_ATMR 0x0148 -+#define PPI_D0S_CLRSIPOCOUNT 0x0164 -+#define PPI_D1S_CLRSIPOCOUNT 0x0168 -+#define CLS_PRE 0x0180 -+#define D0S_PRE 0x0184 -+#define D1S_PRE 0x0188 -+#define CLS_PREP 0x01A0 -+#define D0S_PREP 0x01A4 -+#define D1S_PREP 0x01A8 -+#define CLS_ZERO 0x01C0 -+#define D0S_ZERO 0x01C4 -+#define D1S_ZERO 0x01C8 -+#define PPI_CLRFLG 0x01E0 -+#define PPI_CLRSIPO 0x01E4 -+#define HSTIMEOUT 0x01F0 -+#define HSTIMEOUTENABLE 0x01F4 -+ -+/* DSI Protocol Layer Registers */ -+#define DSI_STARTDSI 0x0204 -+#define DSI_BUSYDSI 0x0208 -+#define DSI_LANEENABLE 0x0210 -+# define DSI_LANEENABLE_CLOCK BIT(0) -+# define DSI_LANEENABLE_D0 BIT(1) -+# define DSI_LANEENABLE_D1 BIT(2) -+ -+#define DSI_LANESTATUS0 0x0214 -+#define DSI_LANESTATUS1 0x0218 -+#define DSI_INTSTATUS 0x0220 -+#define DSI_INTMASK 0x0224 -+#define DSI_INTCLR 0x0228 -+#define DSI_LPTXTO 0x0230 -+#define DSI_MODE 0x0260 -+#define DSI_PAYLOAD0 0x0268 -+#define DSI_PAYLOAD1 0x026C -+#define DSI_SHORTPKTDAT 0x0270 -+#define DSI_SHORTPKTREQ 0x0274 -+#define DSI_BTASTA 0x0278 -+#define DSI_BTACLR 0x027C -+ -+/* DSI General Registers */ -+#define DSIERRCNT 0x0300 -+#define DSISIGMOD 0x0304 -+ -+/* DSI Application Layer Registers */ -+#define APLCTRL 0x0400 -+#define APLSTAT 0x0404 -+#define APLERR 0x0408 -+#define PWRMOD 0x040C -+#define RDPKTLN 0x0410 -+#define PXLFMT 0x0414 -+#define MEMWRCMD 0x0418 -+ -+/* LCDC/DPI Host Registers */ -+#define LCDCTRL 0x0420 -+#define HSR 0x0424 -+#define HDISPR 0x0428 -+#define VSR 0x042C -+#define VDISPR 0x0430 -+#define VFUEN 0x0434 -+ -+/* DBI-B Host Registers */ -+#define DBIBCTRL 0x0440 -+ -+/* SPI Master Registers */ -+#define SPICMR 0x0450 -+#define SPITCR 0x0454 -+ -+/* System Controller Registers */ -+#define SYSSTAT 0x0460 -+#define SYSCTRL 0x0464 -+#define SYSPLL1 0x0468 -+#define SYSPLL2 0x046C -+#define SYSPLL3 0x0470 -+#define SYSPMCTRL 0x047C -+ -+/* GPIO Registers */ -+#define GPIOC 0x0480 -+#define GPIOO 0x0484 -+#define GPIOI 0x0488 -+ -+/* I2C Registers */ -+#define I2CCLKCTRL 0x0490 -+ -+/* Chip/Rev Registers */ -+#define IDREG 0x04A0 -+ -+/* Debug Registers */ -+#define WCMDQUEUE 0x0500 -+#define RCMDQUEUE 0x0504 -+ -+struct rpi_touchscreen { -+ struct drm_panel base; -+ struct mipi_dsi_device *dsi; -+ struct i2c_client *bridge_i2c; -+ -+ /* Version of the firmware on the bridge chip */ -+ int atmel_ver; -+}; -+ -+static const struct drm_display_mode rpi_touchscreen_modes[] = { -+ { -+ /* The DSI PLL can only integer divide from the 2Ghz -+ * PLLD, giving us few choices. We pick a divide by 3 -+ * as our DSI HS clock, giving us a pixel clock of -+ * that divided by 24 bits. Pad out HFP to get our -+ * panel to refresh at 60Hz, even if that doesn't -+ * match the datasheet. -+ */ -+#define PIXEL_CLOCK ((2000000000 / 3) / 24) -+#define VREFRESH 60 -+#define VTOTAL (480 + 7 + 2 + 21) -+#define HACT 800 -+#define HSW 2 -+#define HBP 46 -+#define HFP ((PIXEL_CLOCK / (VTOTAL * VREFRESH)) - (HACT + HSW + HBP)) -+ -+ .clock = PIXEL_CLOCK / 1000, -+ .hdisplay = HACT, -+ .hsync_start = HACT + HFP, -+ .hsync_end = HACT + HFP + HSW, -+ .htotal = HACT + HFP + HSW + HBP, -+ .vdisplay = 480, -+ .vsync_start = 480 + 7, -+ .vsync_end = 480 + 7 + 2, -+ .vtotal = VTOTAL, -+ .vrefresh = 60, -+ }, -+}; -+ -+static struct rpi_touchscreen *panel_to_ts(struct drm_panel *panel) -+{ -+ return container_of(panel, struct rpi_touchscreen, base); -+} -+ -+static u8 rpi_touchscreen_i2c_read(struct rpi_touchscreen *ts, u8 reg) -+{ -+ return i2c_smbus_read_byte_data(ts->bridge_i2c, reg); -+} -+ -+static void rpi_touchscreen_i2c_write(struct rpi_touchscreen *ts, -+ u8 reg, u8 val) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(ts->bridge_i2c, reg, val); -+ if (ret) -+ dev_err(&ts->dsi->dev, "I2C write failed: %d\n", ret); -+} -+ -+static int rpi_touchscreen_write(struct rpi_touchscreen *ts, u16 reg, u32 val) -+{ -+#if 0 -+ /* The firmware uses LP DSI transactions like this to bring up -+ * the hardware, which should be faster than using I2C to then -+ * pass to the Toshiba. However, I was unable to get it to -+ * work. -+ */ -+ u8 msg[] = { -+ reg, -+ reg >> 8, -+ val, -+ val >> 8, -+ val >> 16, -+ val >> 24, -+ }; -+ -+ mipi_dsi_dcs_write_buffer(ts->dsi, msg, sizeof(msg)); -+#else -+ rpi_touchscreen_i2c_write(ts, REG_WR_ADDRH, reg >> 8); -+ rpi_touchscreen_i2c_write(ts, REG_WR_ADDRL, reg); -+ rpi_touchscreen_i2c_write(ts, REG_WRITEH, val >> 8); -+ rpi_touchscreen_i2c_write(ts, REG_WRITEL, val); -+#endif -+ -+ return 0; -+} -+ -+static int rpi_touchscreen_disable(struct drm_panel *panel) -+{ -+ struct rpi_touchscreen *ts = panel_to_ts(panel); -+ -+ rpi_touchscreen_i2c_write(ts, REG_PWM, 0); -+ -+ rpi_touchscreen_i2c_write(ts, REG_POWERON, 0); -+ udelay(1); -+ -+ return 0; -+} -+ -+static int rpi_touchscreen_noop(struct drm_panel *panel) -+{ -+ return 0; -+} -+ -+static int rpi_touchscreen_enable(struct drm_panel *panel) -+{ -+ struct rpi_touchscreen *ts = panel_to_ts(panel); -+ int i; -+ -+ rpi_touchscreen_i2c_write(ts, REG_POWERON, 1); -+ /* Wait for nPWRDWN to go low to indicate poweron is done. */ -+ for (i = 0; i < 100; i++) { -+ if (rpi_touchscreen_i2c_read(ts, REG_PORTB) & 1) -+ break; -+ } -+ -+ rpi_touchscreen_write(ts, DSI_LANEENABLE, -+ DSI_LANEENABLE_CLOCK | -+ DSI_LANEENABLE_D0 | -+ (ts->dsi->lanes > 1 ? DSI_LANEENABLE_D1 : 0)); -+ rpi_touchscreen_write(ts, PPI_D0S_CLRSIPOCOUNT, 0x05); -+ rpi_touchscreen_write(ts, PPI_D1S_CLRSIPOCOUNT, 0x05); -+ rpi_touchscreen_write(ts, PPI_D0S_ATMR, 0x00); -+ rpi_touchscreen_write(ts, PPI_D1S_ATMR, 0x00); -+ rpi_touchscreen_write(ts, PPI_LPTXTIMECNT, 0x03); -+ -+ rpi_touchscreen_write(ts, SPICMR, 0x00); -+ rpi_touchscreen_write(ts, LCDCTRL, 0x00100150); -+ rpi_touchscreen_write(ts, SYSCTRL, 0x040f); -+ msleep(100); -+ -+ rpi_touchscreen_write(ts, PPI_STARTPPI, 0x01); -+ rpi_touchscreen_write(ts, DSI_STARTDSI, 0x01); -+ msleep(100); -+ -+ /* Turn on the backlight. */ -+ rpi_touchscreen_i2c_write(ts, REG_PWM, 255); -+ -+ /* Default to the same orientation as the closed source -+ * firmware used for the panel. Runtime rotation -+ * configuration will be supported using VC4's plane -+ * orientation bits. -+ */ -+ rpi_touchscreen_i2c_write(ts, REG_PORTA, BIT(2)); -+ -+ return 0; -+} -+ -+static int rpi_touchscreen_get_modes(struct drm_panel *panel) -+{ -+ struct drm_connector *connector = panel->connector; -+ struct drm_device *drm = panel->drm; -+ unsigned int i, num = 0; -+ -+ for (i = 0; i < ARRAY_SIZE(rpi_touchscreen_modes); i++) { -+ const struct drm_display_mode *m = &rpi_touchscreen_modes[i]; -+ struct drm_display_mode *mode; -+ -+ mode = drm_mode_duplicate(drm, m); -+ if (!mode) { -+ dev_err(drm->dev, "failed to add mode %ux%u@%u\n", -+ m->hdisplay, m->vdisplay, m->vrefresh); -+ continue; -+ } -+ -+ mode->type |= DRM_MODE_TYPE_DRIVER; -+ -+ if (i == 0) -+ mode->type |= DRM_MODE_TYPE_PREFERRED; -+ -+ drm_mode_set_name(mode); -+ -+ drm_mode_probed_add(connector, mode); -+ num++; -+ } -+ -+ connector->display_info.bpc = 8; -+ connector->display_info.width_mm = 154; -+ connector->display_info.height_mm = 86; -+ -+ return num; -+} -+ -+static const struct drm_panel_funcs rpi_touchscreen_funcs = { -+ .disable = rpi_touchscreen_disable, -+ .unprepare = rpi_touchscreen_noop, -+ .prepare = rpi_touchscreen_noop, -+ .enable = rpi_touchscreen_enable, -+ .get_modes = rpi_touchscreen_get_modes, -+}; -+ -+static struct i2c_client *rpi_touchscreen_get_i2c(struct device *dev, -+ const char *name) -+{ -+ struct device_node *node; -+ struct i2c_client *client; -+ -+ node = of_parse_phandle(dev->of_node, name, 0); -+ if (!node) -+ return ERR_PTR(-ENODEV); -+ -+ client = of_find_i2c_device_by_node(node); -+ -+ of_node_put(node); -+ -+ return client; -+} -+ -+static int rpi_touchscreen_dsi_probe(struct mipi_dsi_device *dsi) -+{ -+ struct device *dev = &dsi->dev; -+ struct rpi_touchscreen *ts; -+ int ret, ver; -+ -+ ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL); -+ if (!ts) -+ return -ENOMEM; -+ -+ dev_set_drvdata(dev, ts); -+ -+ ts->dsi = dsi; -+ dsi->mode_flags = (MIPI_DSI_MODE_VIDEO | -+ MIPI_DSI_MODE_VIDEO_SYNC_PULSE | -+ MIPI_DSI_MODE_LPM); -+ dsi->format = MIPI_DSI_FMT_RGB888; -+ dsi->lanes = 1; -+ -+ ts->bridge_i2c = -+ rpi_touchscreen_get_i2c(dev, "raspberrypi,touchscreen-bridge"); -+ if (IS_ERR(ts->bridge_i2c)) { -+ ret = -EPROBE_DEFER; -+ return ret; -+ } -+ -+ ver = rpi_touchscreen_i2c_read(ts, REG_ID); -+ if (ver < 0) { -+ dev_err(dev, "Atmel I2C read failed: %d\n", ver); -+ return -ENODEV; -+ } -+ -+ switch (ver) { -+ case 0xde: -+ ts->atmel_ver = 1; -+ break; -+ case 0xc3: -+ ts->atmel_ver = 2; -+ break; -+ default: -+ dev_err(dev, "Unknown Atmel firmware revision: 0x%02x\n", ver); -+ return -ENODEV; -+ } -+ -+ /* Turn off at boot, so we can cleanly sequence powering on. */ -+ rpi_touchscreen_i2c_write(ts, REG_POWERON, 0); -+ -+ drm_panel_init(&ts->base); -+ ts->base.dev = dev; -+ ts->base.funcs = &rpi_touchscreen_funcs; -+ -+ ret = drm_panel_add(&ts->base); -+ if (ret < 0) -+ goto err_release_bridge; -+ -+ return mipi_dsi_attach(dsi); -+ -+err_release_bridge: -+ put_device(&ts->bridge_i2c->dev); -+ return ret; -+} -+ -+static int rpi_touchscreen_dsi_remove(struct mipi_dsi_device *dsi) -+{ -+ struct device *dev = &dsi->dev; -+ struct rpi_touchscreen *ts = dev_get_drvdata(dev); -+ int ret; -+ -+ ret = mipi_dsi_detach(dsi); -+ if (ret < 0) { -+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); -+ return ret; -+ } -+ -+ drm_panel_detach(&ts->base); -+ drm_panel_remove(&ts->base); -+ -+ put_device(&ts->bridge_i2c->dev); -+ -+ return 0; -+} -+ -+static void rpi_touchscreen_dsi_shutdown(struct mipi_dsi_device *dsi) -+{ -+ struct device *dev = &dsi->dev; -+ struct rpi_touchscreen *ts = dev_get_drvdata(dev); -+ -+ rpi_touchscreen_i2c_write(ts, REG_POWERON, 0); -+} -+ -+static const struct of_device_id rpi_touchscreen_of_match[] = { -+ { .compatible = "raspberrypi,touchscreen" }, -+ { } /* sentinel */ -+}; -+MODULE_DEVICE_TABLE(of, rpi_touchscreen_of_match); -+ -+static struct mipi_dsi_driver rpi_touchscreen_driver = { -+ .driver = { -+ .name = "raspberrypi-touchscreen", -+ .of_match_table = rpi_touchscreen_of_match, -+ }, -+ .probe = rpi_touchscreen_dsi_probe, -+ .remove = rpi_touchscreen_dsi_remove, -+ .shutdown = rpi_touchscreen_dsi_shutdown, -+}; -+module_mipi_dsi_driver(rpi_touchscreen_driver); -+ -+MODULE_AUTHOR("Eric Anholt "); -+MODULE_DESCRIPTION("Raspberry Pi 7-inch touchscreen driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0159-BCM270X-Add-the-DSI-panel-to-the-defconfig.patch b/target/linux/brcm2708/patches-4.9/950-0159-BCM270X-Add-the-DSI-panel-to-the-defconfig.patch deleted file mode 100644 index 1ba605bc3..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0159-BCM270X-Add-the-DSI-panel-to-the-defconfig.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 22f86bb2d3cb5275877fc4784d2f6c4f5cc660e9 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Thu, 2 Jun 2016 12:29:45 -0700 -Subject: [PATCH] BCM270X: Add the DSI panel to the defconfig. - -Signed-off-by: Eric Anholt ---- - arch/arm/configs/bcm2709_defconfig | 2 ++ - arch/arm/configs/bcmrpi_defconfig | 2 ++ - arch/arm64/configs/bcmrpi3_defconfig | 2 ++ - 3 files changed, 6 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -833,6 +833,8 @@ CONFIG_VIDEO_OV7640=m - CONFIG_VIDEO_MT9V011=m - CONFIG_DRM=m - CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_PANEL_SIMPLE=m -+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m - CONFIG_DRM_UDL=m - CONFIG_DRM_VC4=m - CONFIG_FB=y ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -827,6 +827,8 @@ CONFIG_VIDEO_OV7640=m - CONFIG_VIDEO_MT9V011=m - CONFIG_DRM=m - CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_PANEL_SIMPLE=m -+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m - CONFIG_DRM_UDL=m - CONFIG_DRM_VC4=m - CONFIG_FB=y ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -816,6 +816,8 @@ CONFIG_VIDEO_OV7640=m - CONFIG_VIDEO_MT9V011=m - CONFIG_DRM=m - CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_PANEL_SIMPLE=m -+CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m - CONFIG_DRM_UDL=m - CONFIG_DRM_VC4=m - CONFIG_FB=y diff --git a/target/linux/brcm2708/patches-4.9/950-0160-ARM-bcm2835-dt-Add-the-DSI-module-nodes-and-clocks.patch b/target/linux/brcm2708/patches-4.9/950-0160-ARM-bcm2835-dt-Add-the-DSI-module-nodes-and-clocks.patch deleted file mode 100644 index 285a7b353..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0160-ARM-bcm2835-dt-Add-the-DSI-module-nodes-and-clocks.patch +++ /dev/null @@ -1,101 +0,0 @@ -From fc25cd03ca1c696dacb74d2006c0f176ce800566 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 13 Dec 2016 15:15:10 -0800 -Subject: [PATCH] ARM: bcm2835: dt: Add the DSI module nodes and clocks. - -The modules stay disabled by default, and if you want to enable DSI -you'll need an overlay that connects a panel to it. - -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 8 +++++++ - arch/arm/boot/dts/bcm283x.dtsi | 49 +++++++++++++++++++++++++++++++++++--- - 2 files changed, 54 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -92,3 +92,11 @@ - power-domains = <&power RPI_POWER_DOMAIN_VEC>; - status = "okay"; - }; -+ -+&dsi0 { -+ power-domains = <&power RPI_POWER_DOMAIN_DSI0>; -+}; -+ -+&dsi1 { -+ power-domains = <&power RPI_POWER_DOMAIN_DSI1>; -+}; ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -98,10 +98,13 @@ - #clock-cells = <1>; - reg = <0x7e101000 0x2000>; - -- /* CPRMAN derives everything from the platform's -- * oscillator. -+ /* CPRMAN derives almost everything from the -+ * platform's oscillator. However, the DSI -+ * pixel clocks come from the DSI analog PHY. - */ -- clocks = <&clk_osc>; -+ clocks = <&clk_osc>, -+ <&dsi0 0>, <&dsi0 1>, <&dsi0 2>, -+ <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; - }; - - rng@7e104000 { -@@ -403,6 +406,26 @@ - status = "disabled"; - }; - -+ dsi0: dsi@7e209000 { -+ compatible = "brcm,bcm2835-dsi0"; -+ reg = <0x7e209000 0x78>; -+ interrupts = <2 4>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ -+ clocks = <&clocks BCM2835_PLLA_DSI0>, -+ <&clocks BCM2835_CLOCK_DSI0E>, -+ <&clocks BCM2835_CLOCK_DSI0P>; -+ clock-names = "phy", "escape", "pixel"; -+ -+ clock-output-names = "dsi0_byte", -+ "dsi0_ddr2", -+ "dsi0_ddr"; -+ -+ status = "disabled"; -+ }; -+ - aux: aux@0x7e215000 { - compatible = "brcm,bcm2835-aux"; - #clock-cells = <1>; -@@ -462,6 +485,26 @@ - interrupts = <2 1>; - }; - -+ dsi1: dsi@7e700000 { -+ compatible = "brcm,bcm2835-dsi1"; -+ reg = <0x7e700000 0x8c>; -+ interrupts = <2 12>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ -+ clocks = <&clocks BCM2835_PLLD_DSI1>, -+ <&clocks BCM2835_CLOCK_DSI1E>, -+ <&clocks BCM2835_CLOCK_DSI1P>; -+ clock-names = "phy", "escape", "pixel"; -+ -+ clock-output-names = "dsi1_byte", -+ "dsi1_ddr2", -+ "dsi1_ddr"; -+ -+ status = "disabled"; -+ }; -+ - i2c1: i2c@7e804000 { - compatible = "brcm,bcm2835-i2c"; - reg = <0x7e804000 0x1000>; diff --git a/target/linux/brcm2708/patches-4.9/950-0161-BCM270X-Enable-the-DSI-panel-node-in-the-VC4-overlay.patch b/target/linux/brcm2708/patches-4.9/950-0161-BCM270X-Enable-the-DSI-panel-node-in-the-VC4-overlay.patch deleted file mode 100644 index 3d65f5e26..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0161-BCM270X-Enable-the-DSI-panel-node-in-the-VC4-overlay.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 2c62d430b6b3c20867e55465e0557a1543088f09 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Thu, 2 Jun 2016 15:09:35 -0700 -Subject: [PATCH] BCM270X: Enable the DSI panel node in the VC4 overlay. - -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 5 ++++ - arch/arm/boot/dts/bcm2708-rpi-b.dts | 5 ++++ - arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 5 ++++ - arch/arm/boot/dts/bcm270x.dtsi | 27 ++++++++++++++++++++++ - arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 5 ++++ - arch/arm/boot/dts/bcm2710.dtsi | 1 - - arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts | 22 ++++++++++++++++++ - 7 files changed, 69 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -@@ -154,3 +154,8 @@ - sd_debug = <&sdhost>,"brcm,debug"; - }; - }; -+ -+&i2c_dsi { -+ gpios = <&gpio 28 0 -+ &gpio 29 0>; -+}; ---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts -@@ -144,3 +144,8 @@ - sd_debug = <&sdhost>,"brcm,debug"; - }; - }; -+ -+&i2c_dsi { -+ gpios = <&gpio 2 0 -+ &gpio 3 0>; -+}; ---- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -@@ -154,3 +154,8 @@ - sd_debug = <&sdhost>,"brcm,debug"; - }; - }; -+ -+&i2c_dsi { -+ gpios = <&gpio 28 0 -+ &gpio 29 0>; -+}; ---- a/arch/arm/boot/dts/bcm270x.dtsi -+++ b/arch/arm/boot/dts/bcm270x.dtsi -@@ -137,6 +137,29 @@ - /* Add alias */ - status = "disabled"; - }; -+ -+ i2c_dsi: i2cdsi { -+ /* We have to use i2c-gpio because the -+ * firmware is also polling another device -+ * using the only hardware I2C bus that could -+ * connect to these pins. -+ */ -+ compatible = "i2c-gpio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ pitouchscreen_bridge: bridge@45 { -+ compatible = "raspberrypi,touchscreen-bridge-i2c"; -+ reg = <0x45>; -+ }; -+ -+ pitouchscreen_touch: bridge@38 { -+ compatible = "raspberrypi,touchscreen-ts-i2c"; -+ reg = <0x38>; -+ }; -+ }; -+ - }; - - vdd_5v0_reg: fixedregulator_5v0 { -@@ -155,3 +178,7 @@ - regulator-always-on; - }; - }; -+ -+&dsi1 { -+ power-domains = <&power RPI_POWER_DOMAIN_DSI1>; -+}; ---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -@@ -201,3 +201,8 @@ - sd_debug = <&sdhost>,"brcm,debug"; - }; - }; -+ -+&i2c_dsi { -+ gpios = <&gpio 44 0 -+ &gpio 45 0>; -+}; ---- a/arch/arm/boot/dts/bcm2710.dtsi -+++ b/arch/arm/boot/dts/bcm2710.dtsi -@@ -145,4 +145,3 @@ - interrupt-parent = <&local_intc>; - interrupts = <8>; - }; -- ---- a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts -@@ -126,6 +126,28 @@ - }; - }; - -+ fragment@16 { -+ target = <&dsi1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pitouchscreen: panel@0 { -+ compatible = "raspberrypi,touchscreen"; -+ reg = <0>; -+ raspberrypi,touchscreen-bridge = <&pitouchscreen_bridge>; -+ }; -+ }; -+ }; -+ -+ fragment@17 { -+ target = <&i2c_dsi>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ - __overrides__ { - cma-256 = <0>,"+0-1-2-3-4"; - cma-192 = <0>,"-0+1-2-3-4"; diff --git a/target/linux/brcm2708/patches-4.9/950-0163-drm-vc4-Add-support-for-rendering-with-ETC1-textures.patch b/target/linux/brcm2708/patches-4.9/950-0163-drm-vc4-Add-support-for-rendering-with-ETC1-textures.patch deleted file mode 100644 index bb472b34b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0163-drm-vc4-Add-support-for-rendering-with-ETC1-textures.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 4b1b99ebbada744ef72af56b022492609feb9bba Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Thu, 3 Nov 2016 18:53:10 -0700 -Subject: [PATCH] drm/vc4: Add support for rendering with ETC1 textures. - -The validation for it ends up being quite simple, but I hadn't got -around to it before merging the driver. For backwards compatibility, -we also need to add a flag so that the userspace GL driver can easily -tell if the kernel will allow ETC1 textures (on an old kernel, it will -continue to convert to RGBA8) - -Signed-off-by: Eric Anholt -(cherry picked from commit 7154d76fedf549607afbc0d13db9aaf02da5cebf) ---- - drivers/gpu/drm/vc4/vc4_drv.c | 1 + - drivers/gpu/drm/vc4/vc4_validate.c | 7 +++++++ - include/uapi/drm/vc4_drm.h | 1 + - 3 files changed, 9 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -81,6 +81,7 @@ static int vc4_get_param_ioctl(struct dr - pm_runtime_put_autosuspend(&vc4->v3d->pdev->dev); - break; - case DRM_VC4_PARAM_SUPPORTS_BRANCHES: -+ case DRM_VC4_PARAM_SUPPORTS_ETC1: - args->value = true; - break; - default: ---- a/drivers/gpu/drm/vc4/vc4_validate.c -+++ b/drivers/gpu/drm/vc4/vc4_validate.c -@@ -644,6 +644,13 @@ reloc_tex(struct vc4_exec_info *exec, - cpp = 1; - break; - case VC4_TEXTURE_TYPE_ETC1: -+ /* ETC1 is arranged as 64-bit blocks, where each block is 4x4 -+ * pixels. -+ */ -+ cpp = 8; -+ width = (width + 3) >> 2; -+ height = (height + 3) >> 2; -+ break; - case VC4_TEXTURE_TYPE_BW1: - case VC4_TEXTURE_TYPE_A4: - case VC4_TEXTURE_TYPE_A1: ---- a/include/uapi/drm/vc4_drm.h -+++ b/include/uapi/drm/vc4_drm.h -@@ -286,6 +286,7 @@ struct drm_vc4_get_hang_state { - #define DRM_VC4_PARAM_V3D_IDENT1 1 - #define DRM_VC4_PARAM_V3D_IDENT2 2 - #define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3 -+#define DRM_VC4_PARAM_SUPPORTS_ETC1 4 - - struct drm_vc4_get_param { - __u32 param; diff --git a/target/linux/brcm2708/patches-4.9/950-0165-drm-vc4-Add-fragment-shader-threading-support.patch b/target/linux/brcm2708/patches-4.9/950-0165-drm-vc4-Add-fragment-shader-threading-support.patch deleted file mode 100644 index dd192b94b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0165-drm-vc4-Add-fragment-shader-threading-support.patch +++ /dev/null @@ -1,228 +0,0 @@ -From 8f5722ac3e42a33345bfd82b7ad6a153134a4239 Mon Sep 17 00:00:00 2001 -From: Jonas Pfeil -Date: Tue, 8 Nov 2016 00:18:39 +0100 -Subject: [PATCH] drm/vc4: Add fragment shader threading support - -FS threading brings performance improvements of 0-20% in glmark2. - -The validation code checks for thread switch signals and ensures that -the registers of the other thread are not touched, and that our clamps -are not live across thread switches. It also checks that the -threading and branching instructions do not interfere. - -(Original patch by Jonas, changes by anholt for style cleanup, -removing validation the kernel doesn't need to do, and adding the flag -for userspace). - -v2: Minor style fixes from checkpatch. - -Signed-off-by: Jonas Pfeil -Signed-off-by: Eric Anholt -(cherry picked from commit c778cc5df944291dcdb1ca7a6bb781fbc22550c5) ---- - drivers/gpu/drm/vc4/vc4_drv.c | 1 + - drivers/gpu/drm/vc4/vc4_drv.h | 2 + - drivers/gpu/drm/vc4/vc4_validate.c | 17 +++++--- - drivers/gpu/drm/vc4/vc4_validate_shaders.c | 63 ++++++++++++++++++++++++++++++ - include/uapi/drm/vc4_drm.h | 1 + - 5 files changed, 79 insertions(+), 5 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -82,6 +82,7 @@ static int vc4_get_param_ioctl(struct dr - break; - case DRM_VC4_PARAM_SUPPORTS_BRANCHES: - case DRM_VC4_PARAM_SUPPORTS_ETC1: -+ case DRM_VC4_PARAM_SUPPORTS_THREADED_FS: - args->value = true; - break; - default: ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -385,6 +385,8 @@ struct vc4_validated_shader_info { - - uint32_t num_uniform_addr_offsets; - uint32_t *uniform_addr_offsets; -+ -+ bool is_threaded; - }; - - /** ---- a/drivers/gpu/drm/vc4/vc4_validate.c -+++ b/drivers/gpu/drm/vc4/vc4_validate.c -@@ -789,11 +789,6 @@ validate_gl_shader_rec(struct drm_device - exec->shader_rec_v += roundup(packet_size, 16); - exec->shader_rec_size -= packet_size; - -- if (!(*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD)) { -- DRM_ERROR("Multi-threaded fragment shaders not supported.\n"); -- return -EINVAL; -- } -- - for (i = 0; i < shader_reloc_count; i++) { - if (src_handles[i] > exec->bo_count) { - DRM_ERROR("Shader handle %d too big\n", src_handles[i]); -@@ -810,6 +805,18 @@ validate_gl_shader_rec(struct drm_device - return -EINVAL; - } - -+ if (((*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD) == 0) != -+ to_vc4_bo(&bo[0]->base)->validated_shader->is_threaded) { -+ DRM_ERROR("Thread mode of CL and FS do not match\n"); -+ return -EINVAL; -+ } -+ -+ if (to_vc4_bo(&bo[1]->base)->validated_shader->is_threaded || -+ to_vc4_bo(&bo[2]->base)->validated_shader->is_threaded) { -+ DRM_ERROR("cs and vs cannot be threaded\n"); -+ return -EINVAL; -+ } -+ - for (i = 0; i < shader_reloc_count; i++) { - struct vc4_validated_shader_info *validated_shader; - uint32_t o = shader_reloc_offsets[i]; ---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c -+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c -@@ -83,6 +83,13 @@ struct vc4_shader_validation_state { - * basic blocks. - */ - bool needs_uniform_address_for_loop; -+ -+ /* Set when we find an instruction writing the top half of the -+ * register files. If we allowed writing the unusable regs in -+ * a threaded shader, then the other shader running on our -+ * QPU's clamp validation would be invalid. -+ */ -+ bool all_registers_used; - }; - - static uint32_t -@@ -119,6 +126,13 @@ raddr_add_a_to_live_reg_index(uint64_t i - } - - static bool -+live_reg_is_upper_half(uint32_t lri) -+{ -+ return (lri >= 16 && lri < 32) || -+ (lri >= 32 + 16 && lri < 32 + 32); -+} -+ -+static bool - is_tmu_submit(uint32_t waddr) - { - return (waddr == QPU_W_TMU0_S || -@@ -390,6 +404,9 @@ check_reg_write(struct vc4_validated_sha - } else { - validation_state->live_immediates[lri] = ~0; - } -+ -+ if (live_reg_is_upper_half(lri)) -+ validation_state->all_registers_used = true; - } - - switch (waddr) { -@@ -598,6 +615,11 @@ check_instruction_reads(struct vc4_valid - } - } - -+ if ((raddr_a >= 16 && raddr_a < 32) || -+ (raddr_b >= 16 && raddr_b < 32 && sig != QPU_SIG_SMALL_IMM)) { -+ validation_state->all_registers_used = true; -+ } -+ - return true; - } - -@@ -753,6 +775,7 @@ vc4_validate_shader(struct drm_gem_cma_o - { - bool found_shader_end = false; - int shader_end_ip = 0; -+ uint32_t last_thread_switch_ip = -3; - uint32_t ip; - struct vc4_validated_shader_info *validated_shader = NULL; - struct vc4_shader_validation_state validation_state; -@@ -785,6 +808,17 @@ vc4_validate_shader(struct drm_gem_cma_o - if (!vc4_handle_branch_target(&validation_state)) - goto fail; - -+ if (ip == last_thread_switch_ip + 3) { -+ /* Reset r0-r3 live clamp data */ -+ int i; -+ -+ for (i = 64; i < LIVE_REG_COUNT; i++) { -+ validation_state.live_min_clamp_offsets[i] = ~0; -+ validation_state.live_max_clamp_regs[i] = false; -+ validation_state.live_immediates[i] = ~0; -+ } -+ } -+ - switch (sig) { - case QPU_SIG_NONE: - case QPU_SIG_WAIT_FOR_SCOREBOARD: -@@ -794,6 +828,8 @@ vc4_validate_shader(struct drm_gem_cma_o - case QPU_SIG_LOAD_TMU1: - case QPU_SIG_PROG_END: - case QPU_SIG_SMALL_IMM: -+ case QPU_SIG_THREAD_SWITCH: -+ case QPU_SIG_LAST_THREAD_SWITCH: - if (!check_instruction_writes(validated_shader, - &validation_state)) { - DRM_ERROR("Bad write at ip %d\n", ip); -@@ -809,6 +845,18 @@ vc4_validate_shader(struct drm_gem_cma_o - shader_end_ip = ip; - } - -+ if (sig == QPU_SIG_THREAD_SWITCH || -+ sig == QPU_SIG_LAST_THREAD_SWITCH) { -+ validated_shader->is_threaded = true; -+ -+ if (ip < last_thread_switch_ip + 3) { -+ DRM_ERROR("Thread switch too soon after " -+ "last switch at ip %d\n", ip); -+ goto fail; -+ } -+ last_thread_switch_ip = ip; -+ } -+ - break; - - case QPU_SIG_LOAD_IMM: -@@ -823,6 +871,13 @@ vc4_validate_shader(struct drm_gem_cma_o - if (!check_branch(inst, validated_shader, - &validation_state, ip)) - goto fail; -+ -+ if (ip < last_thread_switch_ip + 3) { -+ DRM_ERROR("Branch in thread switch at ip %d", -+ ip); -+ goto fail; -+ } -+ - break; - default: - DRM_ERROR("Unsupported QPU signal %d at " -@@ -844,6 +899,14 @@ vc4_validate_shader(struct drm_gem_cma_o - goto fail; - } - -+ /* Might corrupt other thread */ -+ if (validated_shader->is_threaded && -+ validation_state.all_registers_used) { -+ DRM_ERROR("Shader uses threading, but uses the upper " -+ "half of the registers, too\n"); -+ goto fail; -+ } -+ - /* If we did a backwards branch and we haven't emitted a uniforms - * reset since then, we still need the uniforms stream to have the - * uniforms address available so that the backwards branch can do its ---- a/include/uapi/drm/vc4_drm.h -+++ b/include/uapi/drm/vc4_drm.h -@@ -287,6 +287,7 @@ struct drm_vc4_get_hang_state { - #define DRM_VC4_PARAM_V3D_IDENT2 2 - #define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3 - #define DRM_VC4_PARAM_SUPPORTS_ETC1 4 -+#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5 - - struct drm_vc4_get_param { - __u32 param; diff --git a/target/linux/brcm2708/patches-4.9/950-0168-drm-Add-TV-connector-states-to-drm_connector_state.patch b/target/linux/brcm2708/patches-4.9/950-0168-drm-Add-TV-connector-states-to-drm_connector_state.patch deleted file mode 100644 index 39e6f1166..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0168-drm-Add-TV-connector-states-to-drm_connector_state.patch +++ /dev/null @@ -1,148 +0,0 @@ -From 01ff94b770786a793c08fc7fcbecdd5f859a8958 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:09 +0100 -Subject: [PATCH] drm: Add TV connector states to drm_connector_state - -Some generic TV connector properties are exposed in drm_mode_config, but -they are currently handled independently in each DRM encoder driver. - -Extend the drm_connector_state to store TV related states, and modify the -drm_atomic_connector_{set,get}_property() helpers to fill the connector -state accordingly. - -Each driver is then responsible for checking and applying the new config -in its ->atomic_mode_{check,set}() operations. - -Signed-off-by: Boris Brezillon -Reviewed-by: Daniel Vetter -Signed-off-by: Eric Anholt -(cherry picked from commit 299a16b163c95fbe1e3b1e142ba9c6ce9dab2c23) ---- - drivers/gpu/drm/drm_atomic.c | 50 ++++++++++++++++++++++++++++++++++++++++++++ - include/drm/drm_connector.h | 32 ++++++++++++++++++++++++++++ - 2 files changed, 82 insertions(+) - ---- a/drivers/gpu/drm/drm_atomic.c -+++ b/drivers/gpu/drm/drm_atomic.c -@@ -989,12 +989,38 @@ int drm_atomic_connector_set_property(st - * now?) atomic writes to DPMS property: - */ - return -EINVAL; -+ } else if (property == config->tv_select_subconnector_property) { -+ state->tv.subconnector = val; -+ } else if (property == config->tv_left_margin_property) { -+ state->tv.margins.left = val; -+ } else if (property == config->tv_right_margin_property) { -+ state->tv.margins.right = val; -+ } else if (property == config->tv_top_margin_property) { -+ state->tv.margins.top = val; -+ } else if (property == config->tv_bottom_margin_property) { -+ state->tv.margins.bottom = val; -+ } else if (property == config->tv_mode_property) { -+ state->tv.mode = val; -+ } else if (property == config->tv_brightness_property) { -+ state->tv.brightness = val; -+ } else if (property == config->tv_contrast_property) { -+ state->tv.contrast = val; -+ } else if (property == config->tv_flicker_reduction_property) { -+ state->tv.flicker_reduction = val; -+ } else if (property == config->tv_overscan_property) { -+ state->tv.overscan = val; -+ } else if (property == config->tv_saturation_property) { -+ state->tv.saturation = val; -+ } else if (property == config->tv_hue_property) { -+ state->tv.hue = val; - } else if (connector->funcs->atomic_set_property) { - return connector->funcs->atomic_set_property(connector, - state, property, val); - } else { - return -EINVAL; - } -+ -+ return 0; - } - EXPORT_SYMBOL(drm_atomic_connector_set_property); - -@@ -1025,6 +1051,30 @@ drm_atomic_connector_get_property(struct - *val = (state->crtc) ? state->crtc->base.id : 0; - } else if (property == config->dpms_property) { - *val = connector->dpms; -+ } else if (property == config->tv_select_subconnector_property) { -+ *val = state->tv.subconnector; -+ } else if (property == config->tv_left_margin_property) { -+ *val = state->tv.margins.left; -+ } else if (property == config->tv_right_margin_property) { -+ *val = state->tv.margins.right; -+ } else if (property == config->tv_top_margin_property) { -+ *val = state->tv.margins.top; -+ } else if (property == config->tv_bottom_margin_property) { -+ *val = state->tv.margins.bottom; -+ } else if (property == config->tv_mode_property) { -+ *val = state->tv.mode; -+ } else if (property == config->tv_brightness_property) { -+ *val = state->tv.brightness; -+ } else if (property == config->tv_contrast_property) { -+ *val = state->tv.contrast; -+ } else if (property == config->tv_flicker_reduction_property) { -+ *val = state->tv.flicker_reduction; -+ } else if (property == config->tv_overscan_property) { -+ *val = state->tv.overscan; -+ } else if (property == config->tv_saturation_property) { -+ *val = state->tv.saturation; -+ } else if (property == config->tv_hue_property) { -+ *val = state->tv.hue; - } else if (connector->funcs->atomic_get_property) { - return connector->funcs->atomic_get_property(connector, - state, property, val); ---- a/include/drm/drm_connector.h -+++ b/include/drm/drm_connector.h -@@ -194,10 +194,40 @@ int drm_display_info_set_bus_formats(str - unsigned int num_formats); - - /** -+ * struct drm_tv_connector_state - TV connector related states -+ * @subconnector: selected subconnector -+ * @margins: left/right/top/bottom margins -+ * @mode: TV mode -+ * @brightness: brightness in percent -+ * @contrast: contrast in percent -+ * @flicker_reduction: flicker reduction in percent -+ * @overscan: overscan in percent -+ * @saturation: saturation in percent -+ * @hue: hue in percent -+ */ -+struct drm_tv_connector_state { -+ enum drm_mode_subconnector subconnector; -+ struct { -+ unsigned int left; -+ unsigned int right; -+ unsigned int top; -+ unsigned int bottom; -+ } margins; -+ unsigned int mode; -+ unsigned int brightness; -+ unsigned int contrast; -+ unsigned int flicker_reduction; -+ unsigned int overscan; -+ unsigned int saturation; -+ unsigned int hue; -+}; -+ -+/** - * struct drm_connector_state - mutable connector state - * @connector: backpointer to the connector - * @best_encoder: can be used by helpers and drivers to select the encoder - * @state: backpointer to global drm_atomic_state -+ * @tv: TV connector state - */ - struct drm_connector_state { - struct drm_connector *connector; -@@ -213,6 +243,8 @@ struct drm_connector_state { - struct drm_encoder *best_encoder; - - struct drm_atomic_state *state; -+ -+ struct drm_tv_connector_state tv; - }; - - /** diff --git a/target/linux/brcm2708/patches-4.9/950-0169-drm-Turn-DRM_MODE_SUBCONNECTOR_xx-definitions-into-a.patch b/target/linux/brcm2708/patches-4.9/950-0169-drm-Turn-DRM_MODE_SUBCONNECTOR_xx-definitions-into-a.patch deleted file mode 100644 index db82c0c5a..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0169-drm-Turn-DRM_MODE_SUBCONNECTOR_xx-definitions-into-a.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1c18e33ab3ff21703925a427e5f55075427a598c Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:08 +0100 -Subject: [PATCH] drm: Turn DRM_MODE_SUBCONNECTOR_xx definitions into an enum - -List of values like the DRM_MODE_SUBCONNECTOR_xx ones are better -represented with enums. - -Turn the DRM_MODE_SUBCONNECTOR_xx macros into an enum. - -Signed-off-by: Boris Brezillon -Suggested-by: Daniel Vetter -Reviewed-by: Daniel Vetter -Signed-off-by: Eric Anholt -(cherry picked from commit dee7a4fee730ca8908f335b6b66174cba4598ecd) ---- - include/uapi/drm/drm_mode.h | 18 ++++++++++-------- - 1 file changed, 10 insertions(+), 8 deletions(-) - ---- a/include/uapi/drm/drm_mode.h -+++ b/include/uapi/drm/drm_mode.h -@@ -220,14 +220,16 @@ struct drm_mode_get_encoder { - - /* This is for connectors with multiple signal types. */ - /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ --#define DRM_MODE_SUBCONNECTOR_Automatic 0 --#define DRM_MODE_SUBCONNECTOR_Unknown 0 --#define DRM_MODE_SUBCONNECTOR_DVID 3 --#define DRM_MODE_SUBCONNECTOR_DVIA 4 --#define DRM_MODE_SUBCONNECTOR_Composite 5 --#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 --#define DRM_MODE_SUBCONNECTOR_Component 8 --#define DRM_MODE_SUBCONNECTOR_SCART 9 -+enum drm_mode_subconnector { -+ DRM_MODE_SUBCONNECTOR_Automatic = 0, -+ DRM_MODE_SUBCONNECTOR_Unknown = 0, -+ DRM_MODE_SUBCONNECTOR_DVID = 3, -+ DRM_MODE_SUBCONNECTOR_DVIA = 4, -+ DRM_MODE_SUBCONNECTOR_Composite = 5, -+ DRM_MODE_SUBCONNECTOR_SVIDEO = 6, -+ DRM_MODE_SUBCONNECTOR_Component = 8, -+ DRM_MODE_SUBCONNECTOR_SCART = 9, -+}; - - #define DRM_MODE_CONNECTOR_Unknown 0 - #define DRM_MODE_CONNECTOR_VGA 1 diff --git a/target/linux/brcm2708/patches-4.9/950-0170-drm-vc4-Add-support-for-the-VEC-Video-Encoder-IP.patch b/target/linux/brcm2708/patches-4.9/950-0170-drm-vc4-Add-support-for-the-VEC-Video-Encoder-IP.patch deleted file mode 100644 index 0b5a85385..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0170-drm-vc4-Add-support-for-the-VEC-Video-Encoder-IP.patch +++ /dev/null @@ -1,730 +0,0 @@ -From d79cd118969fb3ad714feb834eefdddcc4348673 Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 2 Dec 2016 14:48:10 +0100 -Subject: [PATCH] drm/vc4: Add support for the VEC (Video Encoder) IP - -The VEC IP is a TV DAC, providing support for PAL and NTSC standards. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt -(cherry picked from commit e4b81f8c74c82dbc0cb0e5ceb5ef9b713b325fc9) ---- - drivers/gpu/drm/vc4/Makefile | 1 + - drivers/gpu/drm/vc4/vc4_debugfs.c | 1 + - drivers/gpu/drm/vc4/vc4_drv.c | 1 + - drivers/gpu/drm/vc4/vc4_drv.h | 5 + - drivers/gpu/drm/vc4/vc4_vec.c | 657 ++++++++++++++++++++++++++++++++++++++ - 5 files changed, 665 insertions(+) - create mode 100644 drivers/gpu/drm/vc4/vc4_vec.c - ---- a/drivers/gpu/drm/vc4/Makefile -+++ b/drivers/gpu/drm/vc4/Makefile -@@ -12,6 +12,7 @@ vc4-y := \ - vc4_kms.o \ - vc4_gem.o \ - vc4_hdmi.o \ -+ vc4_vec.o \ - vc4_hvs.o \ - vc4_irq.o \ - vc4_plane.o \ ---- a/drivers/gpu/drm/vc4/vc4_debugfs.c -+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c -@@ -19,6 +19,7 @@ static const struct drm_info_list vc4_de - {"bo_stats", vc4_bo_stats_debugfs, 0}, - {"dpi_regs", vc4_dpi_debugfs_regs, 0}, - {"hdmi_regs", vc4_hdmi_debugfs_regs, 0}, -+ {"vec_regs", vc4_vec_debugfs_regs, 0}, - {"hvs_regs", vc4_hvs_debugfs_regs, 0}, - {"crtc0_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)0}, - {"crtc1_regs", vc4_crtc_debugfs_regs, 0, (void *)(uintptr_t)1}, ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -294,6 +294,7 @@ static const struct component_master_ops - - static struct platform_driver *const component_drivers[] = { - &vc4_hdmi_driver, -+ &vc4_vec_driver, - &vc4_dpi_driver, - &vc4_hvs_driver, - &vc4_crtc_driver, ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -20,6 +20,7 @@ struct vc4_dev { - struct vc4_crtc *crtc[3]; - struct vc4_v3d *v3d; - struct vc4_dpi *dpi; -+ struct vc4_vec *vec; - - struct drm_fbdev_cma *fbdev; - -@@ -494,6 +495,10 @@ int vc4_queue_seqno_cb(struct drm_device - extern struct platform_driver vc4_hdmi_driver; - int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused); - -+/* vc4_hdmi.c */ -+extern struct platform_driver vc4_vec_driver; -+int vc4_vec_debugfs_regs(struct seq_file *m, void *unused); -+ - /* vc4_irq.c */ - irqreturn_t vc4_irq(int irq, void *arg); - void vc4_irq_preinstall(struct drm_device *dev); ---- /dev/null -+++ b/drivers/gpu/drm/vc4/vc4_vec.c -@@ -0,0 +1,657 @@ -+/* -+ * Copyright (C) 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see . -+ */ -+ -+/** -+ * DOC: VC4 SDTV module -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "vc4_drv.h" -+#include "vc4_regs.h" -+ -+/* WSE Registers */ -+#define VEC_WSE_RESET 0xc0 -+ -+#define VEC_WSE_CONTROL 0xc4 -+#define VEC_WSE_WSS_ENABLE BIT(7) -+ -+#define VEC_WSE_WSS_DATA 0xc8 -+#define VEC_WSE_VPS_DATA1 0xcc -+#define VEC_WSE_VPS_CONTROL 0xd0 -+ -+/* VEC Registers */ -+#define VEC_REVID 0x100 -+ -+#define VEC_CONFIG0 0x104 -+#define VEC_CONFIG0_YDEL_MASK GENMASK(28, 26) -+#define VEC_CONFIG0_YDEL(x) ((x) << 26) -+#define VEC_CONFIG0_CDEL_MASK GENMASK(25, 24) -+#define VEC_CONFIG0_CDEL(x) ((x) << 24) -+#define VEC_CONFIG0_PBPR_FIL BIT(18) -+#define VEC_CONFIG0_CHROMA_GAIN_MASK GENMASK(17, 16) -+#define VEC_CONFIG0_CHROMA_GAIN_UNITY (0 << 16) -+#define VEC_CONFIG0_CHROMA_GAIN_1_32 (1 << 16) -+#define VEC_CONFIG0_CHROMA_GAIN_1_16 (2 << 16) -+#define VEC_CONFIG0_CHROMA_GAIN_1_8 (3 << 16) -+#define VEC_CONFIG0_CBURST_GAIN_MASK GENMASK(14, 13) -+#define VEC_CONFIG0_CBURST_GAIN_UNITY (0 << 13) -+#define VEC_CONFIG0_CBURST_GAIN_1_128 (1 << 13) -+#define VEC_CONFIG0_CBURST_GAIN_1_64 (2 << 13) -+#define VEC_CONFIG0_CBURST_GAIN_1_32 (3 << 13) -+#define VEC_CONFIG0_CHRBW1 BIT(11) -+#define VEC_CONFIG0_CHRBW0 BIT(10) -+#define VEC_CONFIG0_SYNCDIS BIT(9) -+#define VEC_CONFIG0_BURDIS BIT(8) -+#define VEC_CONFIG0_CHRDIS BIT(7) -+#define VEC_CONFIG0_PDEN BIT(6) -+#define VEC_CONFIG0_YCDELAY BIT(4) -+#define VEC_CONFIG0_RAMPEN BIT(2) -+#define VEC_CONFIG0_YCDIS BIT(2) -+#define VEC_CONFIG0_STD_MASK GENMASK(1, 0) -+#define VEC_CONFIG0_NTSC_STD 0 -+#define VEC_CONFIG0_PAL_BDGHI_STD 1 -+#define VEC_CONFIG0_PAL_N_STD 3 -+ -+#define VEC_SCHPH 0x108 -+#define VEC_SOFT_RESET 0x10c -+#define VEC_CLMP0_START 0x144 -+#define VEC_CLMP0_END 0x148 -+#define VEC_FREQ3_2 0x180 -+#define VEC_FREQ1_0 0x184 -+ -+#define VEC_CONFIG1 0x188 -+#define VEC_CONFIG_VEC_RESYNC_OFF BIT(18) -+#define VEC_CONFIG_RGB219 BIT(17) -+#define VEC_CONFIG_CBAR_EN BIT(16) -+#define VEC_CONFIG_TC_OBB BIT(15) -+#define VEC_CONFIG1_OUTPUT_MODE_MASK GENMASK(12, 10) -+#define VEC_CONFIG1_C_Y_CVBS (0 << 10) -+#define VEC_CONFIG1_CVBS_Y_C (1 << 10) -+#define VEC_CONFIG1_PR_Y_PB (2 << 10) -+#define VEC_CONFIG1_RGB (4 << 10) -+#define VEC_CONFIG1_Y_C_CVBS (5 << 10) -+#define VEC_CONFIG1_C_CVBS_Y (6 << 10) -+#define VEC_CONFIG1_C_CVBS_CVBS (7 << 10) -+#define VEC_CONFIG1_DIS_CHR BIT(9) -+#define VEC_CONFIG1_DIS_LUMA BIT(8) -+#define VEC_CONFIG1_YCBCR_IN BIT(6) -+#define VEC_CONFIG1_DITHER_TYPE_LFSR 0 -+#define VEC_CONFIG1_DITHER_TYPE_COUNTER BIT(5) -+#define VEC_CONFIG1_DITHER_EN BIT(4) -+#define VEC_CONFIG1_CYDELAY BIT(3) -+#define VEC_CONFIG1_LUMADIS BIT(2) -+#define VEC_CONFIG1_COMPDIS BIT(1) -+#define VEC_CONFIG1_CUSTOM_FREQ BIT(0) -+ -+#define VEC_CONFIG2 0x18c -+#define VEC_CONFIG2_PROG_SCAN BIT(15) -+#define VEC_CONFIG2_SYNC_ADJ_MASK GENMASK(14, 12) -+#define VEC_CONFIG2_SYNC_ADJ(x) (((x) / 2) << 12) -+#define VEC_CONFIG2_PBPR_EN BIT(10) -+#define VEC_CONFIG2_UV_DIG_DIS BIT(6) -+#define VEC_CONFIG2_RGB_DIG_DIS BIT(5) -+#define VEC_CONFIG2_TMUX_MASK GENMASK(3, 2) -+#define VEC_CONFIG2_TMUX_DRIVE0 (0 << 2) -+#define VEC_CONFIG2_TMUX_RG_COMP (1 << 2) -+#define VEC_CONFIG2_TMUX_UV_YC (2 << 2) -+#define VEC_CONFIG2_TMUX_SYNC_YC (3 << 2) -+ -+#define VEC_INTERRUPT_CONTROL 0x190 -+#define VEC_INTERRUPT_STATUS 0x194 -+#define VEC_FCW_SECAM_B 0x198 -+#define VEC_SECAM_GAIN_VAL 0x19c -+ -+#define VEC_CONFIG3 0x1a0 -+#define VEC_CONFIG3_HORIZ_LEN_STD (0 << 0) -+#define VEC_CONFIG3_HORIZ_LEN_MPEG1_SIF (1 << 0) -+#define VEC_CONFIG3_SHAPE_NON_LINEAR BIT(1) -+ -+#define VEC_STATUS0 0x200 -+#define VEC_MASK0 0x204 -+ -+#define VEC_CFG 0x208 -+#define VEC_CFG_SG_MODE_MASK GENMASK(6, 5) -+#define VEC_CFG_SG_MODE(x) ((x) << 5) -+#define VEC_CFG_SG_EN BIT(4) -+#define VEC_CFG_VEC_EN BIT(3) -+#define VEC_CFG_MB_EN BIT(2) -+#define VEC_CFG_ENABLE BIT(1) -+#define VEC_CFG_TB_EN BIT(0) -+ -+#define VEC_DAC_TEST 0x20c -+ -+#define VEC_DAC_CONFIG 0x210 -+#define VEC_DAC_CONFIG_LDO_BIAS_CTRL(x) ((x) << 24) -+#define VEC_DAC_CONFIG_DRIVER_CTRL(x) ((x) << 16) -+#define VEC_DAC_CONFIG_DAC_CTRL(x) (x) -+ -+#define VEC_DAC_MISC 0x214 -+#define VEC_DAC_MISC_VCD_CTRL_MASK GENMASK(31, 16) -+#define VEC_DAC_MISC_VCD_CTRL(x) ((x) << 16) -+#define VEC_DAC_MISC_VID_ACT BIT(8) -+#define VEC_DAC_MISC_VCD_PWRDN BIT(6) -+#define VEC_DAC_MISC_BIAS_PWRDN BIT(5) -+#define VEC_DAC_MISC_DAC_PWRDN BIT(2) -+#define VEC_DAC_MISC_LDO_PWRDN BIT(1) -+#define VEC_DAC_MISC_DAC_RST_N BIT(0) -+ -+ -+/* General VEC hardware state. */ -+struct vc4_vec { -+ struct platform_device *pdev; -+ -+ struct drm_encoder *encoder; -+ struct drm_connector *connector; -+ -+ void __iomem *regs; -+ -+ struct clk *clock; -+ -+ const struct vc4_vec_tv_mode *tv_mode; -+}; -+ -+#define VEC_READ(offset) readl(vec->regs + (offset)) -+#define VEC_WRITE(offset, val) writel(val, vec->regs + (offset)) -+ -+/* VC4 VEC encoder KMS struct */ -+struct vc4_vec_encoder { -+ struct vc4_encoder base; -+ struct vc4_vec *vec; -+}; -+ -+static inline struct vc4_vec_encoder * -+to_vc4_vec_encoder(struct drm_encoder *encoder) -+{ -+ return container_of(encoder, struct vc4_vec_encoder, base.base); -+} -+ -+/* VC4 VEC connector KMS struct */ -+struct vc4_vec_connector { -+ struct drm_connector base; -+ struct vc4_vec *vec; -+ -+ /* Since the connector is attached to just the one encoder, -+ * this is the reference to it so we can do the best_encoder() -+ * hook. -+ */ -+ struct drm_encoder *encoder; -+}; -+ -+static inline struct vc4_vec_connector * -+to_vc4_vec_connector(struct drm_connector *connector) -+{ -+ return container_of(connector, struct vc4_vec_connector, base); -+} -+ -+enum vc4_vec_tv_mode_id { -+ VC4_VEC_TV_MODE_NTSC, -+ VC4_VEC_TV_MODE_NTSC_J, -+ VC4_VEC_TV_MODE_PAL, -+ VC4_VEC_TV_MODE_PAL_M, -+}; -+ -+struct vc4_vec_tv_mode { -+ const struct drm_display_mode *mode; -+ void (*mode_set)(struct vc4_vec *vec); -+}; -+ -+#define VEC_REG(reg) { reg, #reg } -+static const struct { -+ u32 reg; -+ const char *name; -+} vec_regs[] = { -+ VEC_REG(VEC_WSE_CONTROL), -+ VEC_REG(VEC_WSE_WSS_DATA), -+ VEC_REG(VEC_WSE_VPS_DATA1), -+ VEC_REG(VEC_WSE_VPS_CONTROL), -+ VEC_REG(VEC_REVID), -+ VEC_REG(VEC_CONFIG0), -+ VEC_REG(VEC_SCHPH), -+ VEC_REG(VEC_CLMP0_START), -+ VEC_REG(VEC_CLMP0_END), -+ VEC_REG(VEC_FREQ3_2), -+ VEC_REG(VEC_FREQ1_0), -+ VEC_REG(VEC_CONFIG1), -+ VEC_REG(VEC_CONFIG2), -+ VEC_REG(VEC_INTERRUPT_CONTROL), -+ VEC_REG(VEC_INTERRUPT_STATUS), -+ VEC_REG(VEC_FCW_SECAM_B), -+ VEC_REG(VEC_SECAM_GAIN_VAL), -+ VEC_REG(VEC_CONFIG3), -+ VEC_REG(VEC_STATUS0), -+ VEC_REG(VEC_MASK0), -+ VEC_REG(VEC_CFG), -+ VEC_REG(VEC_DAC_TEST), -+ VEC_REG(VEC_DAC_CONFIG), -+ VEC_REG(VEC_DAC_MISC), -+}; -+ -+#ifdef CONFIG_DEBUG_FS -+int vc4_vec_debugfs_regs(struct seq_file *m, void *unused) -+{ -+ struct drm_info_node *node = (struct drm_info_node *)m->private; -+ struct drm_device *dev = node->minor->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct vc4_vec *vec = vc4->vec; -+ int i; -+ -+ if (!vec) -+ return 0; -+ -+ for (i = 0; i < ARRAY_SIZE(vec_regs); i++) { -+ seq_printf(m, "%s (0x%04x): 0x%08x\n", -+ vec_regs[i].name, vec_regs[i].reg, -+ VEC_READ(vec_regs[i].reg)); -+ } -+ -+ return 0; -+} -+#endif -+ -+static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec) -+{ -+ VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN); -+ VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); -+} -+ -+static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec) -+{ -+ VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD); -+ VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); -+} -+ -+static const struct drm_display_mode ntsc_mode = { -+ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500, -+ 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0, -+ 480, 480 + 3, 480 + 3 + 3, 480 + 3 + 3 + 16, 0, -+ DRM_MODE_FLAG_INTERLACE) -+}; -+ -+static void vc4_vec_pal_mode_set(struct vc4_vec *vec) -+{ -+ VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD); -+ VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS); -+} -+ -+static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec) -+{ -+ VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD); -+ VEC_WRITE(VEC_CONFIG1, -+ VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ); -+ VEC_WRITE(VEC_FREQ3_2, 0x223b); -+ VEC_WRITE(VEC_FREQ1_0, 0x61d1); -+} -+ -+static const struct drm_display_mode pal_mode = { -+ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500, -+ 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0, -+ 576, 576 + 2, 576 + 2 + 3, 576 + 2 + 3 + 20, 0, -+ DRM_MODE_FLAG_INTERLACE) -+}; -+ -+static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] = { -+ [VC4_VEC_TV_MODE_NTSC] = { -+ .mode = &ntsc_mode, -+ .mode_set = vc4_vec_ntsc_mode_set, -+ }, -+ [VC4_VEC_TV_MODE_NTSC_J] = { -+ .mode = &ntsc_mode, -+ .mode_set = vc4_vec_ntsc_j_mode_set, -+ }, -+ [VC4_VEC_TV_MODE_PAL] = { -+ .mode = &pal_mode, -+ .mode_set = vc4_vec_pal_mode_set, -+ }, -+ [VC4_VEC_TV_MODE_PAL_M] = { -+ .mode = &pal_mode, -+ .mode_set = vc4_vec_pal_m_mode_set, -+ }, -+}; -+ -+static enum drm_connector_status -+vc4_vec_connector_detect(struct drm_connector *connector, bool force) -+{ -+ return connector_status_unknown; -+} -+ -+static void vc4_vec_connector_destroy(struct drm_connector *connector) -+{ -+ drm_connector_unregister(connector); -+ drm_connector_cleanup(connector); -+} -+ -+static int vc4_vec_connector_get_modes(struct drm_connector *connector) -+{ -+ struct drm_connector_state *state = connector->state; -+ struct drm_display_mode *mode; -+ -+ mode = drm_mode_duplicate(connector->dev, -+ vc4_vec_tv_modes[state->tv.mode].mode); -+ if (!mode) { -+ DRM_ERROR("Failed to create a new display mode\n"); -+ return -ENOMEM; -+ } -+ -+ drm_mode_probed_add(connector, mode); -+ -+ return 1; -+} -+ -+static const struct drm_connector_funcs vc4_vec_connector_funcs = { -+ .dpms = drm_atomic_helper_connector_dpms, -+ .detect = vc4_vec_connector_detect, -+ .fill_modes = drm_helper_probe_single_connector_modes, -+ .set_property = drm_atomic_helper_connector_set_property, -+ .destroy = vc4_vec_connector_destroy, -+ .reset = drm_atomic_helper_connector_reset, -+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -+}; -+ -+static const struct drm_connector_helper_funcs vc4_vec_connector_helper_funcs = { -+ .get_modes = vc4_vec_connector_get_modes, -+}; -+ -+static struct drm_connector *vc4_vec_connector_init(struct drm_device *dev, -+ struct vc4_vec *vec) -+{ -+ struct drm_connector *connector = NULL; -+ struct vc4_vec_connector *vec_connector; -+ -+ vec_connector = devm_kzalloc(dev->dev, sizeof(*vec_connector), -+ GFP_KERNEL); -+ if (!vec_connector) -+ return ERR_PTR(-ENOMEM); -+ -+ connector = &vec_connector->base; -+ connector->interlace_allowed = true; -+ -+ vec_connector->encoder = vec->encoder; -+ vec_connector->vec = vec; -+ -+ drm_connector_init(dev, connector, &vc4_vec_connector_funcs, -+ DRM_MODE_CONNECTOR_Composite); -+ drm_connector_helper_add(connector, &vc4_vec_connector_helper_funcs); -+ -+ drm_object_attach_property(&connector->base, -+ dev->mode_config.tv_mode_property, -+ VC4_VEC_TV_MODE_NTSC); -+ vec->tv_mode = &vc4_vec_tv_modes[VC4_VEC_TV_MODE_NTSC]; -+ -+ drm_mode_connector_attach_encoder(connector, vec->encoder); -+ -+ return connector; -+} -+ -+static const struct drm_encoder_funcs vc4_vec_encoder_funcs = { -+ .destroy = drm_encoder_cleanup, -+}; -+ -+static void vc4_vec_encoder_disable(struct drm_encoder *encoder) -+{ -+ struct vc4_vec_encoder *vc4_vec_encoder = to_vc4_vec_encoder(encoder); -+ struct vc4_vec *vec = vc4_vec_encoder->vec; -+ int ret; -+ -+ VEC_WRITE(VEC_CFG, 0); -+ VEC_WRITE(VEC_DAC_MISC, -+ VEC_DAC_MISC_VCD_PWRDN | -+ VEC_DAC_MISC_BIAS_PWRDN | -+ VEC_DAC_MISC_DAC_PWRDN | -+ VEC_DAC_MISC_LDO_PWRDN); -+ -+ clk_disable_unprepare(vec->clock); -+ -+ ret = pm_runtime_put(&vec->pdev->dev); -+ if (ret < 0) { -+ DRM_ERROR("Failed to release power domain: %d\n", ret); -+ return; -+ } -+} -+ -+static void vc4_vec_encoder_enable(struct drm_encoder *encoder) -+{ -+ struct vc4_vec_encoder *vc4_vec_encoder = to_vc4_vec_encoder(encoder); -+ struct vc4_vec *vec = vc4_vec_encoder->vec; -+ int ret; -+ -+ ret = pm_runtime_get_sync(&vec->pdev->dev); -+ if (ret < 0) { -+ DRM_ERROR("Failed to retain power domain: %d\n", ret); -+ return; -+ } -+ -+ /* -+ * We need to set the clock rate each time we enable the encoder -+ * because there's a chance we share the same parent with the HDMI -+ * clock, and both drivers are requesting different rates. -+ * The good news is, these 2 encoders cannot be enabled at the same -+ * time, thus preventing incompatible rate requests. -+ */ -+ ret = clk_set_rate(vec->clock, 108000000); -+ if (ret) { -+ DRM_ERROR("Failed to set clock rate: %d\n", ret); -+ return; -+ } -+ -+ ret = clk_prepare_enable(vec->clock); -+ if (ret) { -+ DRM_ERROR("Failed to turn on core clock: %d\n", ret); -+ return; -+ } -+ -+ /* Reset the different blocks */ -+ VEC_WRITE(VEC_WSE_RESET, 1); -+ VEC_WRITE(VEC_SOFT_RESET, 1); -+ -+ /* Disable the CGSM-A and WSE blocks */ -+ VEC_WRITE(VEC_WSE_CONTROL, 0); -+ -+ /* Write config common to all modes. */ -+ -+ /* -+ * Color subcarrier phase: phase = 360 * SCHPH / 256. -+ * 0x28 <=> 39.375 deg. -+ */ -+ VEC_WRITE(VEC_SCHPH, 0x28); -+ -+ /* -+ * Reset to default values. -+ */ -+ VEC_WRITE(VEC_CLMP0_START, 0xac); -+ VEC_WRITE(VEC_CLMP0_END, 0xec); -+ VEC_WRITE(VEC_CONFIG2, -+ VEC_CONFIG2_UV_DIG_DIS | VEC_CONFIG2_RGB_DIG_DIS); -+ VEC_WRITE(VEC_CONFIG3, VEC_CONFIG3_HORIZ_LEN_STD); -+ VEC_WRITE(VEC_DAC_CONFIG, -+ VEC_DAC_CONFIG_DAC_CTRL(0xc) | -+ VEC_DAC_CONFIG_DRIVER_CTRL(0xc) | -+ VEC_DAC_CONFIG_LDO_BIAS_CTRL(0x46)); -+ -+ /* Mask all interrupts. */ -+ VEC_WRITE(VEC_MASK0, 0); -+ -+ vec->tv_mode->mode_set(vec); -+ -+ VEC_WRITE(VEC_DAC_MISC, -+ VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N); -+ VEC_WRITE(VEC_CFG, VEC_CFG_VEC_EN); -+} -+ -+ -+static bool vc4_vec_encoder_mode_fixup(struct drm_encoder *encoder, -+ const struct drm_display_mode *mode, -+ struct drm_display_mode *adjusted_mode) -+{ -+ return true; -+} -+ -+static void vc4_vec_encoder_atomic_mode_set(struct drm_encoder *encoder, -+ struct drm_crtc_state *crtc_state, -+ struct drm_connector_state *conn_state) -+{ -+ struct vc4_vec_encoder *vc4_vec_encoder = to_vc4_vec_encoder(encoder); -+ struct vc4_vec *vec = vc4_vec_encoder->vec; -+ -+ vec->tv_mode = &vc4_vec_tv_modes[conn_state->tv.mode]; -+} -+ -+static int vc4_vec_encoder_atomic_check(struct drm_encoder *encoder, -+ struct drm_crtc_state *crtc_state, -+ struct drm_connector_state *conn_state) -+{ -+ const struct vc4_vec_tv_mode *vec_mode; -+ -+ vec_mode = &vc4_vec_tv_modes[conn_state->tv.mode]; -+ -+ if (conn_state->crtc && -+ !drm_mode_equal(vec_mode->mode, &crtc_state->adjusted_mode)) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static const struct drm_encoder_helper_funcs vc4_vec_encoder_helper_funcs = { -+ .disable = vc4_vec_encoder_disable, -+ .enable = vc4_vec_encoder_enable, -+ .mode_fixup = vc4_vec_encoder_mode_fixup, -+ .atomic_check = vc4_vec_encoder_atomic_check, -+ .atomic_mode_set = vc4_vec_encoder_atomic_mode_set, -+}; -+ -+static const struct of_device_id vc4_vec_dt_match[] = { -+ { .compatible = "brcm,bcm2835-vec", .data = NULL }, -+ { /* sentinel */ }, -+}; -+ -+static const char * const tv_mode_names[] = { -+ [VC4_VEC_TV_MODE_NTSC] = "NTSC", -+ [VC4_VEC_TV_MODE_NTSC_J] = "NTSC-J", -+ [VC4_VEC_TV_MODE_PAL] = "PAL", -+ [VC4_VEC_TV_MODE_PAL_M] = "PAL-M", -+}; -+ -+static int vc4_vec_bind(struct device *dev, struct device *master, void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ struct drm_device *drm = dev_get_drvdata(master); -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct vc4_vec *vec; -+ struct vc4_vec_encoder *vc4_vec_encoder; -+ int ret; -+ -+ ret = drm_mode_create_tv_properties(drm, ARRAY_SIZE(tv_mode_names), -+ tv_mode_names); -+ if (ret) -+ return ret; -+ -+ vec = devm_kzalloc(dev, sizeof(*vec), GFP_KERNEL); -+ if (!vec) -+ return -ENOMEM; -+ -+ vc4_vec_encoder = devm_kzalloc(dev, sizeof(*vc4_vec_encoder), -+ GFP_KERNEL); -+ if (!vc4_vec_encoder) -+ return -ENOMEM; -+ vc4_vec_encoder->base.type = VC4_ENCODER_TYPE_VEC; -+ vc4_vec_encoder->vec = vec; -+ vec->encoder = &vc4_vec_encoder->base.base; -+ -+ vec->pdev = pdev; -+ vec->regs = vc4_ioremap_regs(pdev, 0); -+ if (IS_ERR(vec->regs)) -+ return PTR_ERR(vec->regs); -+ -+ vec->clock = devm_clk_get(dev, NULL); -+ if (IS_ERR(vec->clock)) { -+ ret = PTR_ERR(vec->clock); -+ if (ret != -EPROBE_DEFER) -+ DRM_ERROR("Failed to get clock: %d\n", ret); -+ return ret; -+ } -+ -+ pm_runtime_enable(dev); -+ -+ drm_encoder_init(drm, vec->encoder, &vc4_vec_encoder_funcs, -+ DRM_MODE_ENCODER_TVDAC, NULL); -+ drm_encoder_helper_add(vec->encoder, &vc4_vec_encoder_helper_funcs); -+ -+ vec->connector = vc4_vec_connector_init(drm, vec); -+ if (IS_ERR(vec->connector)) { -+ ret = PTR_ERR(vec->connector); -+ goto err_destroy_encoder; -+ } -+ -+ dev_set_drvdata(dev, vec); -+ -+ vc4->vec = vec; -+ -+ return 0; -+ -+err_destroy_encoder: -+ drm_encoder_cleanup(vec->encoder); -+ pm_runtime_disable(dev); -+ -+ return ret; -+} -+ -+static void vc4_vec_unbind(struct device *dev, struct device *master, -+ void *data) -+{ -+ struct drm_device *drm = dev_get_drvdata(master); -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct vc4_vec *vec = dev_get_drvdata(dev); -+ -+ vc4_vec_connector_destroy(vec->connector); -+ drm_encoder_cleanup(vec->encoder); -+ pm_runtime_disable(dev); -+ -+ vc4->vec = NULL; -+} -+ -+static const struct component_ops vc4_vec_ops = { -+ .bind = vc4_vec_bind, -+ .unbind = vc4_vec_unbind, -+}; -+ -+static int vc4_vec_dev_probe(struct platform_device *pdev) -+{ -+ return component_add(&pdev->dev, &vc4_vec_ops); -+} -+ -+static int vc4_vec_dev_remove(struct platform_device *pdev) -+{ -+ component_del(&pdev->dev, &vc4_vec_ops); -+ return 0; -+} -+ -+struct platform_driver vc4_vec_driver = { -+ .probe = vc4_vec_dev_probe, -+ .remove = vc4_vec_dev_remove, -+ .driver = { -+ .name = "vc4_vec", -+ .of_match_table = vc4_vec_dt_match, -+ }, -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch b/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch deleted file mode 100644 index 1a425cac0..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0171-drm-vc4-Set-up-SCALER_DISPCTRL-at-boot.patch +++ /dev/null @@ -1,58 +0,0 @@ -From e79b86a0c5ccd0e8c16e31b2d494d43e997253d1 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Thu, 15 Sep 2016 15:25:23 +0100 -Subject: [PATCH] drm/vc4: Set up SCALER_DISPCTRL at boot. - -We want the HVS on, obviously, and we also want DSP3 (PV1's source) to -be muxed from HVS channel 2 like we expect in vc4_crtc.c. The -firmware wasn't setting the DSP3 mux up when both the LCD and HDMI -were disabled. - -Signed-off-by: Eric Anholt ---- - drivers/gpu/drm/vc4/vc4_hvs.c | 14 ++++++++++++++ - drivers/gpu/drm/vc4/vc4_regs.h | 3 +++ - 2 files changed, 17 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_hvs.c -+++ b/drivers/gpu/drm/vc4/vc4_hvs.c -@@ -170,6 +170,7 @@ static int vc4_hvs_bind(struct device *d - struct vc4_dev *vc4 = drm->dev_private; - struct vc4_hvs *hvs = NULL; - int ret; -+ u32 dispctrl; - - hvs = devm_kzalloc(&pdev->dev, sizeof(*hvs), GFP_KERNEL); - if (!hvs) -@@ -211,6 +212,19 @@ static int vc4_hvs_bind(struct device *d - return ret; - - vc4->hvs = hvs; -+ -+ dispctrl = HVS_READ(SCALER_DISPCTRL); -+ -+ dispctrl |= SCALER_DISPCTRL_ENABLE; -+ -+ /* Set DSP3 (PV1) to use HVS channel 2, which would otherwise -+ * be unused. -+ */ -+ dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK; -+ dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX); -+ -+ HVS_WRITE(SCALER_DISPCTRL, dispctrl); -+ - return 0; - } - ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -244,6 +244,9 @@ - # define SCALER_DISPCTRL_ENABLE BIT(31) - # define SCALER_DISPCTRL_DSP2EISLUR BIT(15) - # define SCALER_DISPCTRL_DSP1EISLUR BIT(14) -+# define SCALER_DISPCTRL_DSP3_MUX_MASK VC4_MASK(19, 18) -+# define SCALER_DISPCTRL_DSP3_MUX_SHIFT 18 -+ - /* Enables Display 0 short line and underrun contribution to - * SCALER_DISPSTAT_IRQDISP0. Note that short frame contributions are - * always enabled. diff --git a/target/linux/brcm2708/patches-4.9/950-0172-drm-vc4-Add-support-for-feeding-DSI-encoders-from-th.patch b/target/linux/brcm2708/patches-4.9/950-0172-drm-vc4-Add-support-for-feeding-DSI-encoders-from-th.patch deleted file mode 100644 index 15243a32b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0172-drm-vc4-Add-support-for-feeding-DSI-encoders-from-th.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 01ffdd37dcd3c9e526ac9135bfd289beb45f84a0 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 10 Feb 2016 16:17:29 -0800 -Subject: [PATCH] drm/vc4: Add support for feeding DSI encoders from the pixel - valve. - -We have to set a different pixel format, which tells the hardware to -use the pix_width field that's fed in sideband from the DSI encoder to -divide the "pixel" clock. - -Signed-off-by: Eric Anholt ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 33 +++++++++++++++++++-------------- - drivers/gpu/drm/vc4/vc4_regs.h | 2 ++ - 2 files changed, 21 insertions(+), 14 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -352,38 +352,40 @@ static u32 vc4_get_fifo_full_level(u32 f - } - - /* -- * Returns the clock select bit for the connector attached to the -- * CRTC. -+ * Returns the encoder attached to the CRTC. -+ * -+ * VC4 can only scan out to one encoder at a time, while the DRM core -+ * allows drivers to push pixels to more than one encoder from the -+ * same CRTC. - */ --static int vc4_get_clock_select(struct drm_crtc *crtc) -+static struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc) - { - struct drm_connector *connector; - - drm_for_each_connector(connector, crtc->dev) { - if (connector->state->crtc == crtc) { -- struct drm_encoder *encoder = connector->encoder; -- struct vc4_encoder *vc4_encoder = -- to_vc4_encoder(encoder); -- -- return vc4_encoder->clock_select; -+ return connector->encoder; - } - } - -- return -1; -+ return NULL; - } - - static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) - { - struct drm_device *dev = crtc->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc); -+ struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder); - struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); - struct drm_crtc_state *state = crtc->state; - struct drm_display_mode *mode = &state->adjusted_mode; - bool interlace = mode->flags & DRM_MODE_FLAG_INTERLACE; - u32 pixel_rep = (mode->flags & DRM_MODE_FLAG_DBLCLK) ? 2 : 1; -- u32 format = PV_CONTROL_FORMAT_24; -+ bool is_dsi = (vc4_encoder->type == VC4_ENCODER_TYPE_DSI0 || -+ vc4_encoder->type == VC4_ENCODER_TYPE_DSI1); -+ u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24; - bool debug_dump_regs = false; -- int clock_select = vc4_get_clock_select(crtc); - - if (debug_dump_regs) { - DRM_INFO("CRTC %d regs before:\n", drm_crtc_index(crtc)); -@@ -439,17 +441,19 @@ static void vc4_crtc_mode_set_nofb(struc - */ - CRTC_WRITE(PV_V_CONTROL, - PV_VCONTROL_CONTINUOUS | -+ (is_dsi ? PV_VCONTROL_DSI : 0) | - PV_VCONTROL_INTERLACE | - VC4_SET_FIELD(mode->htotal * pixel_rep / 2, - PV_VCONTROL_ODD_DELAY)); - CRTC_WRITE(PV_VSYNCD_EVEN, 0); - } else { -- CRTC_WRITE(PV_V_CONTROL, PV_VCONTROL_CONTINUOUS); -+ CRTC_WRITE(PV_V_CONTROL, -+ PV_VCONTROL_CONTINUOUS | -+ (is_dsi ? PV_VCONTROL_DSI : 0)); - } - - CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep); - -- - CRTC_WRITE(PV_CONTROL, - VC4_SET_FIELD(format, PV_CONTROL_FORMAT) | - VC4_SET_FIELD(vc4_get_fifo_full_level(format), -@@ -458,7 +462,8 @@ static void vc4_crtc_mode_set_nofb(struc - PV_CONTROL_CLR_AT_START | - PV_CONTROL_TRIGGER_UNDERFLOW | - PV_CONTROL_WAIT_HSTART | -- VC4_SET_FIELD(clock_select, PV_CONTROL_CLK_SELECT) | -+ VC4_SET_FIELD(vc4_encoder->clock_select, -+ PV_CONTROL_CLK_SELECT) | - PV_CONTROL_FIFO_CLR | - PV_CONTROL_EN); - ---- a/drivers/gpu/drm/vc4/vc4_regs.h -+++ b/drivers/gpu/drm/vc4/vc4_regs.h -@@ -190,6 +190,8 @@ - # define PV_VCONTROL_ODD_DELAY_SHIFT 6 - # define PV_VCONTROL_ODD_FIRST BIT(5) - # define PV_VCONTROL_INTERLACE BIT(4) -+# define PV_VCONTROL_DSI BIT(3) -+# define PV_VCONTROL_COMMAND BIT(2) - # define PV_VCONTROL_CONTINUOUS BIT(1) - # define PV_VCONTROL_VIDEN BIT(0) - diff --git a/target/linux/brcm2708/patches-4.9/950-0173-drm-vc4-Add-DSI-driver.patch b/target/linux/brcm2708/patches-4.9/950-0173-drm-vc4-Add-DSI-driver.patch deleted file mode 100644 index 97ae4a470..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0173-drm-vc4-Add-DSI-driver.patch +++ /dev/null @@ -1,1817 +0,0 @@ -From 38ea3f3665eaa9deedc3588196fe9ba9bb4032ec Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 10 Feb 2016 11:42:32 -0800 -Subject: [PATCH] drm/vc4: Add DSI driver - -The DSI0 and DSI1 blocks on the 2835 are related hardware blocks. -Some registers move around, and the featureset is slightly different, -as DSI1 (the 4-lane DSI) is a later version of the hardware block. -This driver doesn't yet enable DSI0, since we don't have any hardware -to test against, but it does put a lot of the register definitions and -code in place. - -Signed-off-by: Eric Anholt ---- - drivers/gpu/drm/vc4/Kconfig | 2 + - drivers/gpu/drm/vc4/Makefile | 1 + - drivers/gpu/drm/vc4/vc4_debugfs.c | 1 + - drivers/gpu/drm/vc4/vc4_drv.c | 1 + - drivers/gpu/drm/vc4/vc4_drv.h | 5 + - drivers/gpu/drm/vc4/vc4_dsi.c | 1725 +++++++++++++++++++++++++++++++++++++ - 6 files changed, 1735 insertions(+) - create mode 100644 drivers/gpu/drm/vc4/vc4_dsi.c - ---- a/drivers/gpu/drm/vc4/Kconfig -+++ b/drivers/gpu/drm/vc4/Kconfig -@@ -2,10 +2,12 @@ config DRM_VC4 - tristate "Broadcom VC4 Graphics" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on DRM -+ depends on COMMON_CLK - select DRM_KMS_HELPER - select DRM_KMS_CMA_HELPER - select DRM_GEM_CMA_HELPER - select DRM_PANEL -+ select DRM_MIPI_DSI - help - Choose this option if you have a system that has a Broadcom - VC4 GPU, such as the Raspberry Pi or other BCM2708/BCM2835. ---- a/drivers/gpu/drm/vc4/Makefile -+++ b/drivers/gpu/drm/vc4/Makefile -@@ -8,6 +8,7 @@ vc4-y := \ - vc4_crtc.o \ - vc4_drv.o \ - vc4_dpi.o \ -+ vc4_dsi.o \ - vc4_firmware_kms.o \ - vc4_kms.o \ - vc4_gem.o \ ---- a/drivers/gpu/drm/vc4/vc4_debugfs.c -+++ b/drivers/gpu/drm/vc4/vc4_debugfs.c -@@ -18,6 +18,7 @@ - static const struct drm_info_list vc4_debugfs_list[] = { - {"bo_stats", vc4_bo_stats_debugfs, 0}, - {"dpi_regs", vc4_dpi_debugfs_regs, 0}, -+ {"dsi1_regs", vc4_dsi_debugfs_regs, 0, (void *)(uintptr_t)1}, - {"hdmi_regs", vc4_hdmi_debugfs_regs, 0}, - {"vec_regs", vc4_vec_debugfs_regs, 0}, - {"hvs_regs", vc4_hvs_debugfs_regs, 0}, ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -296,6 +296,7 @@ static struct platform_driver *const com - &vc4_hdmi_driver, - &vc4_vec_driver, - &vc4_dpi_driver, -+ &vc4_dsi_driver, - &vc4_hvs_driver, - &vc4_crtc_driver, - &vc4_firmware_kms_driver, ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -20,6 +20,7 @@ struct vc4_dev { - struct vc4_crtc *crtc[3]; - struct vc4_v3d *v3d; - struct vc4_dpi *dpi; -+ struct vc4_dsi *dsi1; - struct vc4_vec *vec; - - struct drm_fbdev_cma *fbdev; -@@ -468,6 +469,10 @@ void __iomem *vc4_ioremap_regs(struct pl - extern struct platform_driver vc4_dpi_driver; - int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused); - -+/* vc4_dsi.c */ -+extern struct platform_driver vc4_dsi_driver; -+int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused); -+ - /* vc4_firmware_kms.c */ - extern struct platform_driver vc4_firmware_kms_driver; - void vc4_fkms_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); ---- /dev/null -+++ b/drivers/gpu/drm/vc4/vc4_dsi.c -@@ -0,0 +1,1725 @@ -+/* -+ * Copyright (C) 2016 Broadcom -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but WITHOUT -+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -+ * more details. -+ * -+ * You should have received a copy of the GNU General Public License along with -+ * this program. If not, see . -+ */ -+ -+/** -+ * DOC: VC4 DSI0/DSI1 module -+ * -+ * BCM2835 contains two DSI modules, DSI0 and DSI1. DSI0 is a -+ * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI -+ * controller. -+ * -+ * Most Raspberry Pi boards expose DSI1 as their "DISPLAY" connector, -+ * while the compute module brings both DSI0 and DSI1 out. -+ * -+ * This driver has been tested for DSI1 video-mode display only -+ * currently, with most of the information necessary for DSI0 -+ * hopefully present. -+ */ -+ -+#include "drm_atomic_helper.h" -+#include "drm_crtc_helper.h" -+#include "drm_edid.h" -+#include "drm_mipi_dsi.h" -+#include "drm_panel.h" -+#include "linux/clk.h" -+#include "linux/clk-provider.h" -+#include "linux/completion.h" -+#include "linux/component.h" -+#include "linux/dmaengine.h" -+#include "linux/i2c.h" -+#include "linux/of_address.h" -+#include "linux/of_platform.h" -+#include "linux/pm_runtime.h" -+#include "vc4_drv.h" -+#include "vc4_regs.h" -+ -+#define DSI_CMD_FIFO_DEPTH 16 -+#define DSI_PIX_FIFO_DEPTH 256 -+#define DSI_PIX_FIFO_WIDTH 4 -+ -+#define DSI0_CTRL 0x00 -+ -+/* Command packet control. */ -+#define DSI0_TXPKT1C 0x04 /* AKA PKTC */ -+#define DSI1_TXPKT1C 0x04 -+# define DSI_TXPKT1C_TRIG_CMD_MASK VC4_MASK(31, 24) -+# define DSI_TXPKT1C_TRIG_CMD_SHIFT 24 -+# define DSI_TXPKT1C_CMD_REPEAT_MASK VC4_MASK(23, 10) -+# define DSI_TXPKT1C_CMD_REPEAT_SHIFT 10 -+ -+# define DSI_TXPKT1C_DISPLAY_NO_MASK VC4_MASK(9, 8) -+# define DSI_TXPKT1C_DISPLAY_NO_SHIFT 8 -+/* Short, trigger, BTA, or a long packet that fits all in CMDFIFO. */ -+# define DSI_TXPKT1C_DISPLAY_NO_SHORT 0 -+/* Primary display where cmdfifo provides part of the payload and -+ * pixelvalve the rest. -+ */ -+# define DSI_TXPKT1C_DISPLAY_NO_PRIMARY 1 -+/* Secondary display where cmdfifo provides part of the payload and -+ * pixfifo the rest. -+ */ -+# define DSI_TXPKT1C_DISPLAY_NO_SECONDARY 2 -+ -+# define DSI_TXPKT1C_CMD_TX_TIME_MASK VC4_MASK(7, 6) -+# define DSI_TXPKT1C_CMD_TX_TIME_SHIFT 6 -+ -+# define DSI_TXPKT1C_CMD_CTRL_MASK VC4_MASK(5, 4) -+# define DSI_TXPKT1C_CMD_CTRL_SHIFT 4 -+/* Command only. Uses TXPKT1H and DISPLAY_NO */ -+# define DSI_TXPKT1C_CMD_CTRL_TX 0 -+/* Command with BTA for either ack or read data. */ -+# define DSI_TXPKT1C_CMD_CTRL_RX 1 -+/* Trigger according to TRIG_CMD */ -+# define DSI_TXPKT1C_CMD_CTRL_TRIG 2 -+/* BTA alone for getting error status after a command, or a TE trigger -+ * without a previous command. -+ */ -+# define DSI_TXPKT1C_CMD_CTRL_BTA 3 -+ -+# define DSI_TXPKT1C_CMD_MODE_LP BIT(3) -+# define DSI_TXPKT1C_CMD_TYPE_LONG BIT(2) -+# define DSI_TXPKT1C_CMD_TE_EN BIT(1) -+# define DSI_TXPKT1C_CMD_EN BIT(0) -+ -+/* Command packet header. */ -+#define DSI0_TXPKT1H 0x08 /* AKA PKTH */ -+#define DSI1_TXPKT1H 0x08 -+# define DSI_TXPKT1H_BC_CMDFIFO_MASK VC4_MASK(31, 24) -+# define DSI_TXPKT1H_BC_CMDFIFO_SHIFT 24 -+# define DSI_TXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8) -+# define DSI_TXPKT1H_BC_PARAM_SHIFT 8 -+# define DSI_TXPKT1H_BC_DT_MASK VC4_MASK(7, 0) -+# define DSI_TXPKT1H_BC_DT_SHIFT 0 -+ -+#define DSI0_RXPKT1H 0x0c /* AKA RX1_PKTH */ -+#define DSI1_RXPKT1H 0x14 -+# define DSI_RXPKT1H_CRC_ERR BIT(31) -+# define DSI_RXPKT1H_DET_ERR BIT(30) -+# define DSI_RXPKT1H_ECC_ERR BIT(29) -+# define DSI_RXPKT1H_COR_ERR BIT(28) -+# define DSI_RXPKT1H_INCOMP_PKT BIT(25) -+# define DSI_RXPKT1H_PKT_TYPE_LONG BIT(24) -+/* Byte count if DSI_RXPKT1H_PKT_TYPE_LONG */ -+# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8) -+# define DSI_RXPKT1H_BC_PARAM_SHIFT 8 -+/* Short return bytes if !DSI_RXPKT1H_PKT_TYPE_LONG */ -+# define DSI_RXPKT1H_SHORT_1_MASK VC4_MASK(23, 16) -+# define DSI_RXPKT1H_SHORT_1_SHIFT 16 -+# define DSI_RXPKT1H_SHORT_0_MASK VC4_MASK(15, 8) -+# define DSI_RXPKT1H_SHORT_0_SHIFT 8 -+# define DSI_RXPKT1H_DT_LP_CMD_MASK VC4_MASK(7, 0) -+# define DSI_RXPKT1H_DT_LP_CMD_SHIFT 0 -+ -+#define DSI0_RXPKT2H 0x10 /* AKA RX2_PKTH */ -+#define DSI1_RXPKT2H 0x18 -+# define DSI_RXPKT1H_DET_ERR BIT(30) -+# define DSI_RXPKT1H_ECC_ERR BIT(29) -+# define DSI_RXPKT1H_COR_ERR BIT(28) -+# define DSI_RXPKT1H_INCOMP_PKT BIT(25) -+# define DSI_RXPKT1H_BC_PARAM_MASK VC4_MASK(23, 8) -+# define DSI_RXPKT1H_BC_PARAM_SHIFT 8 -+# define DSI_RXPKT1H_DT_MASK VC4_MASK(7, 0) -+# define DSI_RXPKT1H_DT_SHIFT 0 -+ -+#define DSI0_TXPKT_CMD_FIFO 0x14 /* AKA CMD_DATAF */ -+#define DSI1_TXPKT_CMD_FIFO 0x1c -+ -+#define DSI0_DISP0_CTRL 0x18 -+# define DSI_DISP0_PIX_CLK_DIV_MASK VC4_MASK(21, 13) -+# define DSI_DISP0_PIX_CLK_DIV_SHIFT 13 -+# define DSI_DISP0_LP_STOP_CTRL_MASK VC4_MASK(12, 11) -+# define DSI_DISP0_LP_STOP_CTRL_SHIFT 11 -+# define DSI_DISP0_LP_STOP_DISABLE 0 -+# define DSI_DISP0_LP_STOP_PERLINE 1 -+# define DSI_DISP0_LP_STOP_PERFRAME 2 -+ -+/* Transmit RGB pixels and null packets only during HACTIVE, instead -+ * of going to LP-STOP. -+ */ -+# define DSI_DISP_HACTIVE_NULL BIT(10) -+/* Transmit blanking packet only during vblank, instead of allowing LP-STOP. */ -+# define DSI_DISP_VBLP_CTRL BIT(9) -+/* Transmit blanking packet only during HFP, instead of allowing LP-STOP. */ -+# define DSI_DISP_HFP_CTRL BIT(8) -+/* Transmit blanking packet only during HBP, instead of allowing LP-STOP. */ -+# define DSI_DISP_HBP_CTRL BIT(7) -+# define DSI_DISP0_CHANNEL_MASK VC4_MASK(6, 5) -+# define DSI_DISP0_CHANNEL_SHIFT 5 -+/* Enables end events for HSYNC/VSYNC, not just start events. */ -+# define DSI_DISP0_ST_END BIT(4) -+# define DSI_DISP0_PFORMAT_MASK VC4_MASK(3, 2) -+# define DSI_DISP0_PFORMAT_SHIFT 2 -+# define DSI_PFORMAT_RGB565 0 -+# define DSI_PFORMAT_RGB666_PACKED 1 -+# define DSI_PFORMAT_RGB666 2 -+# define DSI_PFORMAT_RGB888 3 -+/* Default is VIDEO mode. */ -+# define DSI_DISP0_COMMAND_MODE BIT(1) -+# define DSI_DISP0_ENABLE BIT(0) -+ -+#define DSI0_DISP1_CTRL 0x1c -+#define DSI1_DISP1_CTRL 0x2c -+/* Format of the data written to TXPKT_PIX_FIFO. */ -+# define DSI_DISP1_PFORMAT_MASK VC4_MASK(2, 1) -+# define DSI_DISP1_PFORMAT_SHIFT 1 -+# define DSI_DISP1_PFORMAT_16BIT 0 -+# define DSI_DISP1_PFORMAT_24BIT 1 -+# define DSI_DISP1_PFORMAT_32BIT_LE 2 -+# define DSI_DISP1_PFORMAT_32BIT_BE 3 -+ -+/* DISP1 is always command mode. */ -+# define DSI_DISP1_ENABLE BIT(0) -+ -+#define DSI0_TXPKT_PIX_FIFO 0x20 /* AKA PIX_FIFO */ -+ -+#define DSI0_INT_STAT 0x24 -+#define DSI0_INT_EN 0x28 -+# define DSI1_INT_PHY_D3_ULPS BIT(30) -+# define DSI1_INT_PHY_D3_STOP BIT(29) -+# define DSI1_INT_PHY_D2_ULPS BIT(28) -+# define DSI1_INT_PHY_D2_STOP BIT(27) -+# define DSI1_INT_PHY_D1_ULPS BIT(26) -+# define DSI1_INT_PHY_D1_STOP BIT(25) -+# define DSI1_INT_PHY_D0_ULPS BIT(24) -+# define DSI1_INT_PHY_D0_STOP BIT(23) -+# define DSI1_INT_FIFO_ERR BIT(22) -+# define DSI1_INT_PHY_DIR_RTF BIT(21) -+# define DSI1_INT_PHY_RXLPDT BIT(20) -+# define DSI1_INT_PHY_RXTRIG BIT(19) -+# define DSI1_INT_PHY_D0_LPDT BIT(18) -+# define DSI1_INT_PHY_DIR_FTR BIT(17) -+ -+/* Signaled when the clock lane enters the given state. */ -+# define DSI1_INT_PHY_CLOCK_ULPS BIT(16) -+# define DSI1_INT_PHY_CLOCK_HS BIT(15) -+# define DSI1_INT_PHY_CLOCK_STOP BIT(14) -+ -+/* Signaled on timeouts */ -+# define DSI1_INT_PR_TO BIT(13) -+# define DSI1_INT_TA_TO BIT(12) -+# define DSI1_INT_LPRX_TO BIT(11) -+# define DSI1_INT_HSTX_TO BIT(10) -+ -+/* Contention on a line when trying to drive the line low */ -+# define DSI1_INT_ERR_CONT_LP1 BIT(9) -+# define DSI1_INT_ERR_CONT_LP0 BIT(8) -+ -+/* Control error: incorrect line state sequence on data lane 0. */ -+# define DSI1_INT_ERR_CONTROL BIT(7) -+/* LPDT synchronization error (bits received not a multiple of 8. */ -+ -+# define DSI1_INT_ERR_SYNC_ESC BIT(6) -+/* Signaled after receiving an error packet from the display in -+ * response to a read. -+ */ -+# define DSI1_INT_RXPKT2 BIT(5) -+/* Signaled after receiving a packet. The header and optional short -+ * response will be in RXPKT1H, and a long response will be in the -+ * RXPKT_FIFO. -+ */ -+# define DSI1_INT_RXPKT1 BIT(4) -+# define DSI1_INT_TXPKT2_DONE BIT(3) -+# define DSI1_INT_TXPKT2_END BIT(2) -+/* Signaled after all repeats of TXPKT1 are transferred. */ -+# define DSI1_INT_TXPKT1_DONE BIT(1) -+/* Signaled after each TXPKT1 repeat is scheduled. */ -+# define DSI1_INT_TXPKT1_END BIT(0) -+ -+#define DSI1_INTERRUPTS_ALWAYS_ENABLED (DSI1_INT_ERR_SYNC_ESC | \ -+ DSI1_INT_ERR_CONTROL | \ -+ DSI1_INT_ERR_CONT_LP0 | \ -+ DSI1_INT_ERR_CONT_LP1 | \ -+ DSI1_INT_HSTX_TO | \ -+ DSI1_INT_LPRX_TO | \ -+ DSI1_INT_TA_TO | \ -+ DSI1_INT_PR_TO) -+ -+#define DSI0_STAT 0x2c -+#define DSI0_HSTX_TO_CNT 0x30 -+#define DSI0_LPRX_TO_CNT 0x34 -+#define DSI0_TA_TO_CNT 0x38 -+#define DSI0_PR_TO_CNT 0x3c -+#define DSI0_PHYC 0x40 -+# define DSI1_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(25, 20) -+# define DSI1_PHYC_ESC_CLK_LPDT_SHIFT 20 -+# define DSI1_PHYC_HS_CLK_CONTINUOUS BIT(18) -+# define DSI0_PHYC_ESC_CLK_LPDT_MASK VC4_MASK(17, 12) -+# define DSI0_PHYC_ESC_CLK_LPDT_SHIFT 12 -+# define DSI1_PHYC_CLANE_ULPS BIT(17) -+# define DSI1_PHYC_CLANE_ENABLE BIT(16) -+# define DSI_PHYC_DLANE3_ULPS BIT(13) -+# define DSI_PHYC_DLANE3_ENABLE BIT(12) -+# define DSI0_PHYC_HS_CLK_CONTINUOUS BIT(10) -+# define DSI0_PHYC_CLANE_ULPS BIT(9) -+# define DSI_PHYC_DLANE2_ULPS BIT(9) -+# define DSI0_PHYC_CLANE_ENABLE BIT(8) -+# define DSI_PHYC_DLANE2_ENABLE BIT(8) -+# define DSI_PHYC_DLANE1_ULPS BIT(5) -+# define DSI_PHYC_DLANE1_ENABLE BIT(4) -+# define DSI_PHYC_DLANE0_FORCE_STOP BIT(2) -+# define DSI_PHYC_DLANE0_ULPS BIT(1) -+# define DSI_PHYC_DLANE0_ENABLE BIT(0) -+ -+#define DSI0_HS_CLT0 0x44 -+#define DSI0_HS_CLT1 0x48 -+#define DSI0_HS_CLT2 0x4c -+#define DSI0_HS_DLT3 0x50 -+#define DSI0_HS_DLT4 0x54 -+#define DSI0_HS_DLT5 0x58 -+#define DSI0_HS_DLT6 0x5c -+#define DSI0_HS_DLT7 0x60 -+ -+#define DSI0_PHY_AFEC0 0x64 -+# define DSI0_PHY_AFEC0_DDR2CLK_EN BIT(26) -+# define DSI0_PHY_AFEC0_DDRCLK_EN BIT(25) -+# define DSI0_PHY_AFEC0_LATCH_ULPS BIT(24) -+# define DSI1_PHY_AFEC0_IDR_DLANE3_MASK VC4_MASK(31, 29) -+# define DSI1_PHY_AFEC0_IDR_DLANE3_SHIFT 29 -+# define DSI1_PHY_AFEC0_IDR_DLANE2_MASK VC4_MASK(28, 26) -+# define DSI1_PHY_AFEC0_IDR_DLANE2_SHIFT 26 -+# define DSI1_PHY_AFEC0_IDR_DLANE1_MASK VC4_MASK(27, 23) -+# define DSI1_PHY_AFEC0_IDR_DLANE1_SHIFT 23 -+# define DSI1_PHY_AFEC0_IDR_DLANE0_MASK VC4_MASK(22, 20) -+# define DSI1_PHY_AFEC0_IDR_DLANE0_SHIFT 20 -+# define DSI1_PHY_AFEC0_IDR_CLANE_MASK VC4_MASK(19, 17) -+# define DSI1_PHY_AFEC0_IDR_CLANE_SHIFT 17 -+# define DSI0_PHY_AFEC0_ACTRL_DLANE1_MASK VC4_MASK(23, 20) -+# define DSI0_PHY_AFEC0_ACTRL_DLANE1_SHIFT 20 -+# define DSI0_PHY_AFEC0_ACTRL_DLANE0_MASK VC4_MASK(19, 16) -+# define DSI0_PHY_AFEC0_ACTRL_DLANE0_SHIFT 16 -+# define DSI0_PHY_AFEC0_ACTRL_CLANE_MASK VC4_MASK(15, 12) -+# define DSI0_PHY_AFEC0_ACTRL_CLANE_SHIFT 12 -+# define DSI1_PHY_AFEC0_DDR2CLK_EN BIT(16) -+# define DSI1_PHY_AFEC0_DDRCLK_EN BIT(15) -+# define DSI1_PHY_AFEC0_LATCH_ULPS BIT(14) -+# define DSI1_PHY_AFEC0_RESET BIT(13) -+# define DSI1_PHY_AFEC0_PD BIT(12) -+# define DSI0_PHY_AFEC0_RESET BIT(11) -+# define DSI1_PHY_AFEC0_PD_BG BIT(11) -+# define DSI0_PHY_AFEC0_PD BIT(10) -+# define DSI1_PHY_AFEC0_PD_DLANE3 BIT(10) -+# define DSI0_PHY_AFEC0_PD_BG BIT(9) -+# define DSI1_PHY_AFEC0_PD_DLANE2 BIT(9) -+# define DSI0_PHY_AFEC0_PD_DLANE1 BIT(8) -+# define DSI1_PHY_AFEC0_PD_DLANE1 BIT(8) -+# define DSI_PHY_AFEC0_PTATADJ_MASK VC4_MASK(7, 4) -+# define DSI_PHY_AFEC0_PTATADJ_SHIFT 4 -+# define DSI_PHY_AFEC0_CTATADJ_MASK VC4_MASK(3, 0) -+# define DSI_PHY_AFEC0_CTATADJ_SHIFT 0 -+ -+#define DSI0_PHY_AFEC1 0x68 -+# define DSI0_PHY_AFEC1_IDR_DLANE1_MASK VC4_MASK(10, 8) -+# define DSI0_PHY_AFEC1_IDR_DLANE1_SHIFT 8 -+# define DSI0_PHY_AFEC1_IDR_DLANE0_MASK VC4_MASK(6, 4) -+# define DSI0_PHY_AFEC1_IDR_DLANE0_SHIFT 4 -+# define DSI0_PHY_AFEC1_IDR_CLANE_MASK VC4_MASK(2, 0) -+# define DSI0_PHY_AFEC1_IDR_CLANE_SHIFT 0 -+ -+#define DSI0_TST_SEL 0x6c -+#define DSI0_TST_MON 0x70 -+#define DSI0_ID 0x74 -+# define DSI_ID_VALUE 0x00647369 -+ -+#define DSI1_CTRL 0x00 -+# define DSI_CTRL_HS_CLKC_MASK VC4_MASK(15, 14) -+# define DSI_CTRL_HS_CLKC_SHIFT 14 -+# define DSI_CTRL_HS_CLKC_BYTE 0 -+# define DSI_CTRL_HS_CLKC_DDR2 1 -+# define DSI_CTRL_HS_CLKC_DDR 2 -+ -+# define DSI_CTRL_RX_LPDT_EOT_DISABLE BIT(13) -+# define DSI_CTRL_LPDT_EOT_DISABLE BIT(12) -+# define DSI_CTRL_HSDT_EOT_DISABLE BIT(11) -+# define DSI_CTRL_SOFT_RESET_CFG BIT(10) -+# define DSI_CTRL_CAL_BYTE BIT(9) -+# define DSI_CTRL_INV_BYTE BIT(8) -+# define DSI_CTRL_CLR_LDF BIT(7) -+# define DSI0_CTRL_CLR_PBCF BIT(6) -+# define DSI1_CTRL_CLR_RXF BIT(6) -+# define DSI0_CTRL_CLR_CPBCF BIT(5) -+# define DSI1_CTRL_CLR_PDF BIT(5) -+# define DSI0_CTRL_CLR_PDF BIT(4) -+# define DSI1_CTRL_CLR_CDF BIT(4) -+# define DSI0_CTRL_CLR_CDF BIT(3) -+# define DSI0_CTRL_CTRL2 BIT(2) -+# define DSI1_CTRL_DISABLE_DISP_CRCC BIT(2) -+# define DSI0_CTRL_CTRL1 BIT(1) -+# define DSI1_CTRL_DISABLE_DISP_ECCC BIT(1) -+# define DSI0_CTRL_CTRL0 BIT(0) -+# define DSI1_CTRL_EN BIT(0) -+# define DSI0_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \ -+ DSI0_CTRL_CLR_PBCF | \ -+ DSI0_CTRL_CLR_CPBCF | \ -+ DSI0_CTRL_CLR_PDF | \ -+ DSI0_CTRL_CLR_CDF) -+# define DSI1_CTRL_RESET_FIFOS (DSI_CTRL_CLR_LDF | \ -+ DSI1_CTRL_CLR_RXF | \ -+ DSI1_CTRL_CLR_PDF | \ -+ DSI1_CTRL_CLR_CDF) -+ -+#define DSI1_TXPKT2C 0x0c -+#define DSI1_TXPKT2H 0x10 -+#define DSI1_TXPKT_PIX_FIFO 0x20 -+#define DSI1_RXPKT_FIFO 0x24 -+#define DSI1_DISP0_CTRL 0x28 -+#define DSI1_INT_STAT 0x30 -+#define DSI1_INT_EN 0x34 -+/* State reporting bits. These mostly behave like INT_STAT, where -+ * writing a 1 clears the bit. -+ */ -+#define DSI1_STAT 0x38 -+# define DSI1_STAT_PHY_D3_ULPS BIT(31) -+# define DSI1_STAT_PHY_D3_STOP BIT(30) -+# define DSI1_STAT_PHY_D2_ULPS BIT(29) -+# define DSI1_STAT_PHY_D2_STOP BIT(28) -+# define DSI1_STAT_PHY_D1_ULPS BIT(27) -+# define DSI1_STAT_PHY_D1_STOP BIT(26) -+# define DSI1_STAT_PHY_D0_ULPS BIT(25) -+# define DSI1_STAT_PHY_D0_STOP BIT(24) -+# define DSI1_STAT_FIFO_ERR BIT(23) -+# define DSI1_STAT_PHY_RXLPDT BIT(22) -+# define DSI1_STAT_PHY_RXTRIG BIT(21) -+# define DSI1_STAT_PHY_D0_LPDT BIT(20) -+/* Set when in forward direction */ -+# define DSI1_STAT_PHY_DIR BIT(19) -+# define DSI1_STAT_PHY_CLOCK_ULPS BIT(18) -+# define DSI1_STAT_PHY_CLOCK_HS BIT(17) -+# define DSI1_STAT_PHY_CLOCK_STOP BIT(16) -+# define DSI1_STAT_PR_TO BIT(15) -+# define DSI1_STAT_TA_TO BIT(14) -+# define DSI1_STAT_LPRX_TO BIT(13) -+# define DSI1_STAT_HSTX_TO BIT(12) -+# define DSI1_STAT_ERR_CONT_LP1 BIT(11) -+# define DSI1_STAT_ERR_CONT_LP0 BIT(10) -+# define DSI1_STAT_ERR_CONTROL BIT(9) -+# define DSI1_STAT_ERR_SYNC_ESC BIT(8) -+# define DSI1_STAT_RXPKT2 BIT(7) -+# define DSI1_STAT_RXPKT1 BIT(6) -+# define DSI1_STAT_TXPKT2_BUSY BIT(5) -+# define DSI1_STAT_TXPKT2_DONE BIT(4) -+# define DSI1_STAT_TXPKT2_END BIT(3) -+# define DSI1_STAT_TXPKT1_BUSY BIT(2) -+# define DSI1_STAT_TXPKT1_DONE BIT(1) -+# define DSI1_STAT_TXPKT1_END BIT(0) -+ -+#define DSI1_HSTX_TO_CNT 0x3c -+#define DSI1_LPRX_TO_CNT 0x40 -+#define DSI1_TA_TO_CNT 0x44 -+#define DSI1_PR_TO_CNT 0x48 -+#define DSI1_PHYC 0x4c -+ -+#define DSI1_HS_CLT0 0x50 -+# define DSI_HS_CLT0_CZERO_MASK VC4_MASK(26, 18) -+# define DSI_HS_CLT0_CZERO_SHIFT 18 -+# define DSI_HS_CLT0_CPRE_MASK VC4_MASK(17, 9) -+# define DSI_HS_CLT0_CPRE_SHIFT 9 -+# define DSI_HS_CLT0_CPREP_MASK VC4_MASK(8, 0) -+# define DSI_HS_CLT0_CPREP_SHIFT 0 -+ -+#define DSI1_HS_CLT1 0x54 -+# define DSI_HS_CLT1_CTRAIL_MASK VC4_MASK(17, 9) -+# define DSI_HS_CLT1_CTRAIL_SHIFT 9 -+# define DSI_HS_CLT1_CPOST_MASK VC4_MASK(8, 0) -+# define DSI_HS_CLT1_CPOST_SHIFT 0 -+ -+#define DSI1_HS_CLT2 0x58 -+# define DSI_HS_CLT2_WUP_MASK VC4_MASK(23, 0) -+# define DSI_HS_CLT2_WUP_SHIFT 0 -+ -+#define DSI1_HS_DLT3 0x5c -+# define DSI_HS_DLT3_EXIT_MASK VC4_MASK(26, 18) -+# define DSI_HS_DLT3_EXIT_SHIFT 18 -+# define DSI_HS_DLT3_ZERO_MASK VC4_MASK(17, 9) -+# define DSI_HS_DLT3_ZERO_SHIFT 9 -+# define DSI_HS_DLT3_PRE_MASK VC4_MASK(8, 0) -+# define DSI_HS_DLT3_PRE_SHIFT 0 -+ -+#define DSI1_HS_DLT4 0x60 -+# define DSI_HS_DLT4_ANLAT_MASK VC4_MASK(22, 18) -+# define DSI_HS_DLT4_ANLAT_SHIFT 18 -+# define DSI_HS_DLT4_TRAIL_MASK VC4_MASK(17, 9) -+# define DSI_HS_DLT4_TRAIL_SHIFT 9 -+# define DSI_HS_DLT4_LPX_MASK VC4_MASK(8, 0) -+# define DSI_HS_DLT4_LPX_SHIFT 0 -+ -+#define DSI1_HS_DLT5 0x64 -+# define DSI_HS_DLT5_INIT_MASK VC4_MASK(23, 0) -+# define DSI_HS_DLT5_INIT_SHIFT 0 -+ -+#define DSI1_HS_DLT6 0x68 -+# define DSI_HS_DLT6_TA_GET_MASK VC4_MASK(31, 24) -+# define DSI_HS_DLT6_TA_GET_SHIFT 24 -+# define DSI_HS_DLT6_TA_SURE_MASK VC4_MASK(23, 16) -+# define DSI_HS_DLT6_TA_SURE_SHIFT 16 -+# define DSI_HS_DLT6_TA_GO_MASK VC4_MASK(15, 8) -+# define DSI_HS_DLT6_TA_GO_SHIFT 8 -+# define DSI_HS_DLT6_LP_LPX_MASK VC4_MASK(7, 0) -+# define DSI_HS_DLT6_LP_LPX_SHIFT 0 -+ -+#define DSI1_HS_DLT7 0x6c -+# define DSI_HS_DLT7_LP_WUP_MASK VC4_MASK(23, 0) -+# define DSI_HS_DLT7_LP_WUP_SHIFT 0 -+ -+#define DSI1_PHY_AFEC0 0x70 -+ -+#define DSI1_PHY_AFEC1 0x74 -+# define DSI1_PHY_AFEC1_ACTRL_DLANE3_MASK VC4_MASK(19, 16) -+# define DSI1_PHY_AFEC1_ACTRL_DLANE3_SHIFT 16 -+# define DSI1_PHY_AFEC1_ACTRL_DLANE2_MASK VC4_MASK(15, 12) -+# define DSI1_PHY_AFEC1_ACTRL_DLANE2_SHIFT 12 -+# define DSI1_PHY_AFEC1_ACTRL_DLANE1_MASK VC4_MASK(11, 8) -+# define DSI1_PHY_AFEC1_ACTRL_DLANE1_SHIFT 8 -+# define DSI1_PHY_AFEC1_ACTRL_DLANE0_MASK VC4_MASK(7, 4) -+# define DSI1_PHY_AFEC1_ACTRL_DLANE0_SHIFT 4 -+# define DSI1_PHY_AFEC1_ACTRL_CLANE_MASK VC4_MASK(3, 0) -+# define DSI1_PHY_AFEC1_ACTRL_CLANE_SHIFT 0 -+ -+#define DSI1_TST_SEL 0x78 -+#define DSI1_TST_MON 0x7c -+#define DSI1_PHY_TST1 0x80 -+#define DSI1_PHY_TST2 0x84 -+#define DSI1_PHY_FIFO_STAT 0x88 -+/* Actually, all registers in the range that aren't otherwise claimed -+ * will return the ID. -+ */ -+#define DSI1_ID 0x8c -+ -+/* General DSI hardware state. */ -+struct vc4_dsi { -+ struct platform_device *pdev; -+ -+ struct mipi_dsi_host dsi_host; -+ struct drm_encoder *encoder; -+ struct drm_connector *connector; -+ struct drm_panel *panel; -+ -+ void __iomem *regs; -+ -+ struct dma_chan *reg_dma_chan; -+ dma_addr_t reg_dma_paddr; -+ u32 *reg_dma_mem; -+ dma_addr_t reg_paddr; -+ -+ /* Whether we're on bcm2835's DSI0 or DSI1. */ -+ int port; -+ -+ /* DSI channel for the panel we're connected to. */ -+ u32 channel; -+ u32 lanes; -+ enum mipi_dsi_pixel_format format; -+ u32 mode_flags; -+ -+ /* Input clock from CPRMAN to the digital PHY, for the DSI -+ * escape clock. -+ */ -+ struct clk *escape_clock; -+ -+ /* Input clock to the analog PHY, used to generate the DSI bit -+ * clock. -+ */ -+ struct clk *pll_phy_clock; -+ -+ /* HS Clocks generated within the DSI analog PHY. */ -+ struct clk_fixed_factor phy_clocks[3]; -+ -+ struct clk_onecell_data clk_onecell; -+ -+ /* Pixel clock output to the pixelvalve, generated from the HS -+ * clock. -+ */ -+ struct clk *pixel_clock; -+ -+ struct completion xfer_completion; -+ int xfer_result; -+}; -+ -+#define host_to_dsi(host) container_of(host, struct vc4_dsi, dsi_host) -+ -+static inline void -+dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) -+{ -+ struct dma_chan *chan = dsi->reg_dma_chan; -+ struct dma_async_tx_descriptor *tx; -+ dma_cookie_t cookie; -+ int ret; -+ -+ /* DSI0 should be able to write normally. */ -+ if (!chan) { -+ writel(val, dsi->regs + offset); -+ return; -+ } -+ -+ *dsi->reg_dma_mem = val; -+ -+ tx = chan->device->device_prep_dma_memcpy(chan, -+ dsi->reg_paddr + offset, -+ dsi->reg_dma_paddr, -+ 4, 0); -+ if (!tx) { -+ DRM_ERROR("Failed to set up DMA register write\n"); -+ return; -+ } -+ -+ cookie = tx->tx_submit(tx); -+ ret = dma_submit_error(cookie); -+ if (ret) { -+ DRM_ERROR("Failed to submit DMA: %d\n", ret); -+ return; -+ } -+ ret = dma_sync_wait(chan, cookie); -+ if (ret) -+ DRM_ERROR("Failed to wait for DMA: %d\n", ret); -+} -+ -+#define DSI_READ(offset) readl(dsi->regs + (offset)) -+#define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val) -+#define DSI_PORT_READ(offset) \ -+ DSI_READ(dsi->port ? DSI1_##offset : DSI0_##offset) -+#define DSI_PORT_WRITE(offset, val) \ -+ DSI_WRITE(dsi->port ? DSI1_##offset : DSI0_##offset, val) -+#define DSI_PORT_BIT(bit) (dsi->port ? DSI1_##bit : DSI0_##bit) -+ -+/* VC4 DSI encoder KMS struct */ -+struct vc4_dsi_encoder { -+ struct vc4_encoder base; -+ struct vc4_dsi *dsi; -+}; -+ -+static inline struct vc4_dsi_encoder * -+to_vc4_dsi_encoder(struct drm_encoder *encoder) -+{ -+ return container_of(encoder, struct vc4_dsi_encoder, base.base); -+} -+ -+/* VC4 DSI connector KMS struct */ -+struct vc4_dsi_connector { -+ struct drm_connector base; -+ struct vc4_dsi *dsi; -+}; -+ -+static inline struct vc4_dsi_connector * -+to_vc4_dsi_connector(struct drm_connector *connector) -+{ -+ return container_of(connector, struct vc4_dsi_connector, base); -+} -+ -+#define DSI_REG(reg) { reg, #reg } -+static const struct { -+ u32 reg; -+ const char *name; -+} dsi0_regs[] = { -+ DSI_REG(DSI0_CTRL), -+ DSI_REG(DSI0_STAT), -+ DSI_REG(DSI0_HSTX_TO_CNT), -+ DSI_REG(DSI0_LPRX_TO_CNT), -+ DSI_REG(DSI0_TA_TO_CNT), -+ DSI_REG(DSI0_PR_TO_CNT), -+ DSI_REG(DSI0_DISP0_CTRL), -+ DSI_REG(DSI0_DISP1_CTRL), -+ DSI_REG(DSI0_INT_STAT), -+ DSI_REG(DSI0_INT_EN), -+ DSI_REG(DSI0_PHYC), -+ DSI_REG(DSI0_HS_CLT0), -+ DSI_REG(DSI0_HS_CLT1), -+ DSI_REG(DSI0_HS_CLT2), -+ DSI_REG(DSI0_HS_DLT3), -+ DSI_REG(DSI0_HS_DLT4), -+ DSI_REG(DSI0_HS_DLT5), -+ DSI_REG(DSI0_HS_DLT6), -+ DSI_REG(DSI0_HS_DLT7), -+ DSI_REG(DSI0_PHY_AFEC0), -+ DSI_REG(DSI0_PHY_AFEC1), -+ DSI_REG(DSI0_ID), -+}; -+ -+static const struct { -+ u32 reg; -+ const char *name; -+} dsi1_regs[] = { -+ DSI_REG(DSI1_CTRL), -+ DSI_REG(DSI1_STAT), -+ DSI_REG(DSI1_HSTX_TO_CNT), -+ DSI_REG(DSI1_LPRX_TO_CNT), -+ DSI_REG(DSI1_TA_TO_CNT), -+ DSI_REG(DSI1_PR_TO_CNT), -+ DSI_REG(DSI1_DISP0_CTRL), -+ DSI_REG(DSI1_DISP1_CTRL), -+ DSI_REG(DSI1_INT_STAT), -+ DSI_REG(DSI1_INT_EN), -+ DSI_REG(DSI1_PHYC), -+ DSI_REG(DSI1_HS_CLT0), -+ DSI_REG(DSI1_HS_CLT1), -+ DSI_REG(DSI1_HS_CLT2), -+ DSI_REG(DSI1_HS_DLT3), -+ DSI_REG(DSI1_HS_DLT4), -+ DSI_REG(DSI1_HS_DLT5), -+ DSI_REG(DSI1_HS_DLT6), -+ DSI_REG(DSI1_HS_DLT7), -+ DSI_REG(DSI1_PHY_AFEC0), -+ DSI_REG(DSI1_PHY_AFEC1), -+ DSI_REG(DSI1_ID), -+}; -+ -+static void vc4_dsi_dump_regs(struct vc4_dsi *dsi) -+{ -+ int i; -+ -+ if (dsi->port == 0) { -+ for (i = 0; i < ARRAY_SIZE(dsi0_regs); i++) { -+ DRM_INFO("0x%04x (%s): 0x%08x\n", -+ dsi0_regs[i].reg, dsi0_regs[i].name, -+ DSI_READ(dsi0_regs[i].reg)); -+ } -+ } else { -+ for (i = 0; i < ARRAY_SIZE(dsi1_regs); i++) { -+ DRM_INFO("0x%04x (%s): 0x%08x\n", -+ dsi1_regs[i].reg, dsi1_regs[i].name, -+ DSI_READ(dsi1_regs[i].reg)); -+ } -+ } -+} -+ -+#ifdef CONFIG_DEBUG_FS -+int vc4_dsi_debugfs_regs(struct seq_file *m, void *unused) -+{ -+ struct drm_info_node *node = (struct drm_info_node *)m->private; -+ struct drm_device *drm = node->minor->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ int dsi_index = (uintptr_t)node->info_ent->data; -+ struct vc4_dsi *dsi = (dsi_index == 1 ? vc4->dsi1 : NULL); -+ int i; -+ -+ if (!dsi) -+ return 0; -+ -+ if (dsi->port == 0) { -+ for (i = 0; i < ARRAY_SIZE(dsi0_regs); i++) { -+ seq_printf(m, "0x%04x (%s): 0x%08x\n", -+ dsi0_regs[i].reg, dsi0_regs[i].name, -+ DSI_READ(dsi0_regs[i].reg)); -+ } -+ } else { -+ for (i = 0; i < ARRAY_SIZE(dsi1_regs); i++) { -+ seq_printf(m, "0x%04x (%s): 0x%08x\n", -+ dsi1_regs[i].reg, dsi1_regs[i].name, -+ DSI_READ(dsi1_regs[i].reg)); -+ } -+ } -+ -+ return 0; -+} -+#endif -+ -+static enum drm_connector_status -+vc4_dsi_connector_detect(struct drm_connector *connector, bool force) -+{ -+ struct vc4_dsi_connector *vc4_connector = -+ to_vc4_dsi_connector(connector); -+ struct vc4_dsi *dsi = vc4_connector->dsi; -+ -+ if (dsi->panel) -+ return connector_status_connected; -+ else -+ return connector_status_disconnected; -+} -+ -+static void vc4_dsi_connector_destroy(struct drm_connector *connector) -+{ -+ drm_connector_unregister(connector); -+ drm_connector_cleanup(connector); -+} -+ -+static int vc4_dsi_connector_get_modes(struct drm_connector *connector) -+{ -+ struct vc4_dsi_connector *vc4_connector = -+ to_vc4_dsi_connector(connector); -+ struct vc4_dsi *dsi = vc4_connector->dsi; -+ -+ if (dsi->panel) -+ return drm_panel_get_modes(dsi->panel); -+ -+ return 0; -+} -+ -+static const struct drm_connector_funcs vc4_dsi_connector_funcs = { -+ .dpms = drm_atomic_helper_connector_dpms, -+ .detect = vc4_dsi_connector_detect, -+ .fill_modes = drm_helper_probe_single_connector_modes, -+ .destroy = vc4_dsi_connector_destroy, -+ .reset = drm_atomic_helper_connector_reset, -+ .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, -+}; -+ -+static const struct drm_connector_helper_funcs vc4_dsi_connector_helper_funcs = { -+ .get_modes = vc4_dsi_connector_get_modes, -+}; -+ -+static struct drm_connector *vc4_dsi_connector_init(struct drm_device *dev, -+ struct vc4_dsi *dsi) -+{ -+ struct drm_connector *connector = NULL; -+ struct vc4_dsi_connector *dsi_connector; -+ int ret = 0; -+ -+ dsi_connector = devm_kzalloc(dev->dev, sizeof(*dsi_connector), -+ GFP_KERNEL); -+ if (!dsi_connector) { -+ ret = -ENOMEM; -+ goto fail; -+ } -+ connector = &dsi_connector->base; -+ -+ dsi_connector->dsi = dsi; -+ -+ drm_connector_init(dev, connector, &vc4_dsi_connector_funcs, -+ DRM_MODE_CONNECTOR_DSI); -+ drm_connector_helper_add(connector, &vc4_dsi_connector_helper_funcs); -+ -+ connector->polled = 0; -+ connector->interlace_allowed = 0; -+ connector->doublescan_allowed = 0; -+ -+ drm_mode_connector_attach_encoder(connector, dsi->encoder); -+ -+ return connector; -+ -+fail: -+ if (connector) -+ vc4_dsi_connector_destroy(connector); -+ -+ return ERR_PTR(ret); -+} -+ -+static void vc4_dsi_encoder_destroy(struct drm_encoder *encoder) -+{ -+ drm_encoder_cleanup(encoder); -+} -+ -+static const struct drm_encoder_funcs vc4_dsi_encoder_funcs = { -+ .destroy = vc4_dsi_encoder_destroy, -+}; -+ -+static void vc4_dsi_latch_ulps(struct vc4_dsi *dsi, bool latch) -+{ -+ u32 afec0 = DSI_PORT_READ(PHY_AFEC0); -+ -+ if (latch) -+ afec0 |= DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); -+ else -+ afec0 &= ~DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); -+ -+ DSI_PORT_WRITE(PHY_AFEC0, afec0); -+} -+ -+/* Enters or exits Ultra Low Power State. */ -+static void vc4_dsi_ulps(struct vc4_dsi *dsi, bool ulps) -+{ -+ bool continuous = dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS; -+ u32 phyc_ulps = ((continuous ? DSI_PORT_BIT(PHYC_CLANE_ULPS) : 0) | -+ DSI_PHYC_DLANE0_ULPS | -+ (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) | -+ (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) | -+ (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0)); -+ u32 stat_ulps = ((continuous ? DSI1_STAT_PHY_CLOCK_ULPS : 0) | -+ DSI1_STAT_PHY_D0_ULPS | -+ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) | -+ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) | -+ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0)); -+ u32 stat_stop = ((continuous ? DSI1_STAT_PHY_CLOCK_STOP : 0) | -+ DSI1_STAT_PHY_D0_STOP | -+ (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) | -+ (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) | -+ (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0)); -+ int ret; -+ -+ DSI_PORT_WRITE(STAT, stat_ulps); -+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) | phyc_ulps); -+ ret = wait_for((DSI_PORT_READ(STAT) & stat_ulps) == stat_ulps, 200); -+ if (ret) { -+ dev_warn(&dsi->pdev->dev, -+ "Timeout waiting for DSI ULPS entry: STAT 0x%08x", -+ DSI_PORT_READ(STAT)); -+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps); -+ vc4_dsi_latch_ulps(dsi, false); -+ return; -+ } -+ -+ /* The DSI module can't be disabled while the module is -+ * generating ULPS state. So, to be able to disable the -+ * module, we have the AFE latch the ULPS state and continue -+ * on to having the module enter STOP. -+ */ -+ vc4_dsi_latch_ulps(dsi, ulps); -+ -+ DSI_PORT_WRITE(STAT, stat_stop); -+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps); -+ ret = wait_for((DSI_PORT_READ(STAT) & stat_stop) == stat_stop, 200); -+ if (ret) { -+ dev_warn(&dsi->pdev->dev, -+ "Timeout waiting for DSI STOP entry: STAT 0x%08x", -+ DSI_PORT_READ(STAT)); -+ DSI_PORT_WRITE(PHYC, DSI_PORT_READ(PHYC) & ~phyc_ulps); -+ return; -+ } -+} -+ -+static u32 -+dsi_hs_timing(u32 ui_ns, u32 ns, u32 ui) -+{ -+ /* The HS timings have to be rounded up to a multiple of 8 -+ * because we're using the byte clock. -+ */ -+ return roundup(ui + DIV_ROUND_UP(ns, ui_ns), 8); -+} -+ -+/* ESC always runs at 100Mhz. */ -+#define ESC_TIME_NS 10 -+ -+static u32 -+dsi_esc_timing(u32 ns) -+{ -+ return DIV_ROUND_UP(ns, ESC_TIME_NS); -+} -+ -+static void vc4_dsi_encoder_disable(struct drm_encoder *encoder) -+{ -+ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder); -+ struct vc4_dsi *dsi = vc4_encoder->dsi; -+ struct device *dev = &dsi->pdev->dev; -+ -+ drm_panel_disable(dsi->panel); -+ -+ vc4_dsi_ulps(dsi, true); -+ -+ drm_panel_unprepare(dsi->panel); -+ -+ clk_disable_unprepare(dsi->pll_phy_clock); -+ clk_disable_unprepare(dsi->escape_clock); -+ clk_disable_unprepare(dsi->pixel_clock); -+ -+ pm_runtime_put(dev); -+} -+ -+static void vc4_dsi_encoder_enable(struct drm_encoder *encoder) -+{ -+ struct drm_display_mode *mode = &encoder->crtc->mode; -+ struct vc4_dsi_encoder *vc4_encoder = to_vc4_dsi_encoder(encoder); -+ struct vc4_dsi *dsi = vc4_encoder->dsi; -+ struct device *dev = &dsi->pdev->dev; -+ u32 format = 0, divider = 0; -+ bool debug_dump_regs = false; -+ unsigned long hs_clock; -+ u32 ui_ns; -+ /* Minimum LP state duration in escape clock cycles. */ -+ u32 lpx = dsi_esc_timing(60); -+ unsigned long pixel_clock_hz = mode->clock * 1000; -+ unsigned long dsip_clock; -+ unsigned long phy_clock; -+ int ret; -+ -+ ret = pm_runtime_get_sync(dev); -+ if (ret) { -+ DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port); -+ return; -+ } -+ -+ ret = drm_panel_prepare(dsi->panel); -+ if (ret) { -+ DRM_ERROR("Panel failed to prepare\n"); -+ return; -+ } -+ -+ if (debug_dump_regs) { -+ DRM_INFO("DSI regs before:\n"); -+ vc4_dsi_dump_regs(dsi); -+ } -+ -+ switch (dsi->format) { -+ case MIPI_DSI_FMT_RGB888: -+ format = DSI_PFORMAT_RGB888; -+ divider = 24 / dsi->lanes; -+ break; -+ case MIPI_DSI_FMT_RGB666: -+ format = DSI_PFORMAT_RGB666; -+ divider = 24 / dsi->lanes; -+ break; -+ case MIPI_DSI_FMT_RGB666_PACKED: -+ format = DSI_PFORMAT_RGB666_PACKED; -+ divider = 18 / dsi->lanes; -+ break; -+ case MIPI_DSI_FMT_RGB565: -+ format = DSI_PFORMAT_RGB565; -+ divider = 16 / dsi->lanes; -+ break; -+ } -+ -+ phy_clock = pixel_clock_hz * divider; -+ ret = clk_set_rate(dsi->pll_phy_clock, phy_clock); -+ if (ret) { -+ dev_err(&dsi->pdev->dev, -+ "Failed to set phy clock to %ld: %d\n", phy_clock, ret); -+ } -+ -+ /* Reset the DSI and all its fifos. */ -+ DSI_PORT_WRITE(CTRL, -+ DSI_CTRL_SOFT_RESET_CFG | -+ DSI_PORT_BIT(CTRL_RESET_FIFOS)); -+ -+ DSI_PORT_WRITE(CTRL, -+ DSI_CTRL_HSDT_EOT_DISABLE | -+ DSI_CTRL_RX_LPDT_EOT_DISABLE); -+ -+ /* Clear all stat bits so we see what has happened during enable. */ -+ DSI_PORT_WRITE(STAT, DSI_PORT_READ(STAT)); -+ -+ /* Set AFE CTR00/CTR1 to release powerdown of analog. */ -+ if (dsi->port == 0) { -+ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | -+ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ)); -+ -+ if (dsi->lanes < 2) -+ afec0 |= DSI0_PHY_AFEC0_PD_DLANE1; -+ -+ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) -+ afec0 |= DSI0_PHY_AFEC0_RESET; -+ -+ DSI_PORT_WRITE(PHY_AFEC0, afec0); -+ -+ DSI_PORT_WRITE(PHY_AFEC1, -+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE1) | -+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_DLANE0) | -+ VC4_SET_FIELD(6, DSI0_PHY_AFEC1_IDR_CLANE)); -+ } else { -+ u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | -+ VC4_SET_FIELD(7, DSI_PHY_AFEC0_CTATADJ) | -+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_CLANE) | -+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE0) | -+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE1) | -+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE2) | -+ VC4_SET_FIELD(6, DSI1_PHY_AFEC0_IDR_DLANE3)); -+ -+ if (dsi->lanes < 4) -+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE3; -+ if (dsi->lanes < 3) -+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE2; -+ if (dsi->lanes < 2) -+ afec0 |= DSI1_PHY_AFEC0_PD_DLANE1; -+ -+ afec0 |= DSI1_PHY_AFEC0_RESET; -+ -+ DSI_PORT_WRITE(PHY_AFEC0, afec0); -+ -+ DSI_PORT_WRITE(PHY_AFEC1, 0); -+ -+ /* AFEC reset hold time */ -+ mdelay(1); -+ } -+ -+ ret = clk_prepare_enable(dsi->escape_clock); -+ if (ret) { -+ DRM_ERROR("Failed to turn on DSI escape clock: %d\n", ret); -+ return; -+ } -+ -+ ret = clk_prepare_enable(dsi->pll_phy_clock); -+ if (ret) { -+ DRM_ERROR("Failed to turn on DSI PLL: %d\n", ret); -+ return; -+ } -+ -+ hs_clock = clk_get_rate(dsi->pll_phy_clock); -+ -+ /* Yes, we set the DSI0P/DSI1P pixel clock to the byte rate, -+ * not the pixel clock rate. DSIxP take from the APHY's byte, -+ * DDR2, or DDR4 clock (we use byte) and feed into the PV at -+ * that rate. Separately, a value derived from PIX_CLK_DIV -+ * and HS_CLKC is fed into the PV to divide down to the actual -+ * pixel clock for pushing pixels into DSI. -+ */ -+ dsip_clock = phy_clock / 8; -+ ret = clk_set_rate(dsi->pixel_clock, dsip_clock); -+ if (ret) { -+ dev_err(dev, "Failed to set pixel clock to %ldHz: %d\n", -+ dsip_clock, ret); -+ } -+ -+ ret = clk_prepare_enable(dsi->pixel_clock); -+ if (ret) { -+ DRM_ERROR("Failed to turn on DSI pixel clock: %d\n", ret); -+ return; -+ } -+ -+ /* How many ns one DSI unit interval is. Note that the clock -+ * is DDR, so there's an extra divide by 2. -+ */ -+ ui_ns = DIV_ROUND_UP(500000000, hs_clock); -+ -+ DSI_PORT_WRITE(HS_CLT0, -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 262, 0), -+ DSI_HS_CLT0_CZERO) | -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 0, 8), -+ DSI_HS_CLT0_CPRE) | -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 38, 0), -+ DSI_HS_CLT0_CPREP)); -+ -+ DSI_PORT_WRITE(HS_CLT1, -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 0), -+ DSI_HS_CLT1_CTRAIL) | -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 60, 52), -+ DSI_HS_CLT1_CPOST)); -+ -+ DSI_PORT_WRITE(HS_CLT2, -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000000, 0), -+ DSI_HS_CLT2_WUP)); -+ -+ DSI_PORT_WRITE(HS_DLT3, -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 100, 0), -+ DSI_HS_DLT3_EXIT) | -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 105, 6), -+ DSI_HS_DLT3_ZERO) | -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, 40, 4), -+ DSI_HS_DLT3_PRE)); -+ -+ DSI_PORT_WRITE(HS_DLT4, -+ VC4_SET_FIELD(dsi_hs_timing(ui_ns, lpx * ESC_TIME_NS, 0), -+ DSI_HS_DLT4_LPX) | -+ VC4_SET_FIELD(max(dsi_hs_timing(ui_ns, 0, 8), -+ dsi_hs_timing(ui_ns, 60, 4)), -+ DSI_HS_DLT4_TRAIL) | -+ VC4_SET_FIELD(0, DSI_HS_DLT4_ANLAT)); -+ -+ DSI_PORT_WRITE(HS_DLT5, VC4_SET_FIELD(dsi_hs_timing(ui_ns, 1000, 5000), -+ DSI_HS_DLT5_INIT)); -+ -+ DSI_PORT_WRITE(HS_DLT6, -+ VC4_SET_FIELD(lpx * 5, DSI_HS_DLT6_TA_GET) | -+ VC4_SET_FIELD(lpx, DSI_HS_DLT6_TA_SURE) | -+ VC4_SET_FIELD(lpx * 4, DSI_HS_DLT6_TA_GO) | -+ VC4_SET_FIELD(lpx, DSI_HS_DLT6_LP_LPX)); -+ -+ DSI_PORT_WRITE(HS_DLT7, -+ VC4_SET_FIELD(dsi_esc_timing(1000000), -+ DSI_HS_DLT7_LP_WUP)); -+ -+ DSI_PORT_WRITE(PHYC, -+ DSI_PHYC_DLANE0_ENABLE | -+ (dsi->lanes >= 2 ? DSI_PHYC_DLANE1_ENABLE : 0) | -+ (dsi->lanes >= 3 ? DSI_PHYC_DLANE2_ENABLE : 0) | -+ (dsi->lanes >= 4 ? DSI_PHYC_DLANE3_ENABLE : 0) | -+ DSI_PORT_BIT(PHYC_CLANE_ENABLE) | -+ ((dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? -+ 0 : DSI_PORT_BIT(PHYC_HS_CLK_CONTINUOUS)) | -+ (dsi->port == 0 ? -+ VC4_SET_FIELD(lpx - 1, DSI0_PHYC_ESC_CLK_LPDT) : -+ VC4_SET_FIELD(lpx - 1, DSI1_PHYC_ESC_CLK_LPDT))); -+ -+ DSI_PORT_WRITE(CTRL, -+ DSI_PORT_READ(CTRL) | -+ DSI_CTRL_CAL_BYTE); -+ -+ /* HS timeout in HS clock cycles: disabled. */ -+ DSI_PORT_WRITE(HSTX_TO_CNT, 0); -+ /* LP receive timeout in HS clocks. */ -+ DSI_PORT_WRITE(LPRX_TO_CNT, 0xffffff); -+ /* Bus turnaround timeout */ -+ DSI_PORT_WRITE(TA_TO_CNT, 100000); -+ /* Display reset sequence timeout */ -+ DSI_PORT_WRITE(PR_TO_CNT, 100000); -+ -+ if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { -+ DSI_PORT_WRITE(DISP0_CTRL, -+ VC4_SET_FIELD(divider, DSI_DISP0_PIX_CLK_DIV) | -+ VC4_SET_FIELD(format, DSI_DISP0_PFORMAT) | -+ VC4_SET_FIELD(DSI_DISP0_LP_STOP_PERFRAME, -+ DSI_DISP0_LP_STOP_CTRL) | -+ DSI_DISP0_ST_END | -+ DSI_DISP0_ENABLE); -+ } else { -+ DSI_PORT_WRITE(DISP0_CTRL, -+ DSI_DISP0_COMMAND_MODE | -+ DSI_DISP0_ENABLE); -+ } -+ -+ /* Set up DISP1 for transferring long command payloads through -+ * the pixfifo. -+ */ -+ DSI_PORT_WRITE(DISP1_CTRL, -+ VC4_SET_FIELD(DSI_DISP1_PFORMAT_32BIT_LE, -+ DSI_DISP1_PFORMAT) | -+ DSI_DISP1_ENABLE); -+ -+ /* Ungate the block. */ -+ if (dsi->port == 0) -+ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI0_CTRL_CTRL0); -+ else -+ DSI_PORT_WRITE(CTRL, DSI_PORT_READ(CTRL) | DSI1_CTRL_EN); -+ -+ /* Bring AFE out of reset. */ -+ if (dsi->port == 0) { -+ } else { -+ DSI_PORT_WRITE(PHY_AFEC0, -+ DSI_PORT_READ(PHY_AFEC0) & -+ ~DSI1_PHY_AFEC0_RESET); -+ } -+ -+ vc4_dsi_ulps(dsi, false); -+ -+ if (debug_dump_regs) { -+ DRM_INFO("DSI regs after:\n"); -+ vc4_dsi_dump_regs(dsi); -+ } -+ -+ ret = drm_panel_enable(dsi->panel); -+ if (ret) { -+ DRM_ERROR("Panel failed to enable\n"); -+ drm_panel_unprepare(dsi->panel); -+ return; -+ } -+} -+ -+static ssize_t vc4_dsi_host_transfer(struct mipi_dsi_host *host, -+ const struct mipi_dsi_msg *msg) -+{ -+ struct vc4_dsi *dsi = host_to_dsi(host); -+ struct mipi_dsi_packet packet; -+ u32 pkth = 0, pktc = 0; -+ int i, ret; -+ bool is_long = mipi_dsi_packet_format_is_long(msg->type); -+ u32 cmd_fifo_len = 0, pix_fifo_len = 0; -+ -+ mipi_dsi_create_packet(&packet, msg); -+ -+ pkth |= VC4_SET_FIELD(packet.header[0], DSI_TXPKT1H_BC_DT); -+ pkth |= VC4_SET_FIELD(packet.header[1] | -+ (packet.header[2] << 8), -+ DSI_TXPKT1H_BC_PARAM); -+ if (is_long) { -+ /* Divide data across the various FIFOs we have available. -+ * The command FIFO takes byte-oriented data, but is of -+ * limited size. The pixel FIFO (never actually used for -+ * pixel data in reality) is word oriented, and substantially -+ * larger. So, we use the pixel FIFO for most of the data, -+ * sending the residual bytes in the command FIFO at the start. -+ * -+ * With this arrangement, the command FIFO will never get full. -+ */ -+ if (packet.payload_length <= 16) { -+ cmd_fifo_len = packet.payload_length; -+ pix_fifo_len = 0; -+ } else { -+ cmd_fifo_len = (packet.payload_length % -+ DSI_PIX_FIFO_WIDTH); -+ pix_fifo_len = ((packet.payload_length - cmd_fifo_len) / -+ DSI_PIX_FIFO_WIDTH); -+ } -+ -+ WARN_ON_ONCE(pix_fifo_len >= DSI_PIX_FIFO_DEPTH); -+ -+ pkth |= VC4_SET_FIELD(cmd_fifo_len, DSI_TXPKT1H_BC_CMDFIFO); -+ } -+ -+ if (msg->rx_len) { -+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_RX, -+ DSI_TXPKT1C_CMD_CTRL); -+ } else { -+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_CMD_CTRL_TX, -+ DSI_TXPKT1C_CMD_CTRL); -+ } -+ -+ for (i = 0; i < cmd_fifo_len; i++) -+ DSI_PORT_WRITE(TXPKT_CMD_FIFO, packet.payload[i]); -+ for (i = 0; i < pix_fifo_len; i++) { -+ const u8 *pix = packet.payload + cmd_fifo_len + i * 4; -+ -+ DSI_PORT_WRITE(TXPKT_PIX_FIFO, -+ pix[0] | -+ pix[1] << 8 | -+ pix[2] << 16 | -+ pix[3] << 24); -+ } -+ -+ if (msg->flags & MIPI_DSI_MSG_USE_LPM) -+ pktc |= DSI_TXPKT1C_CMD_MODE_LP; -+ if (is_long) -+ pktc |= DSI_TXPKT1C_CMD_TYPE_LONG; -+ -+ /* Send one copy of the packet. Larger repeats are used for pixel -+ * data in command mode. -+ */ -+ pktc |= VC4_SET_FIELD(1, DSI_TXPKT1C_CMD_REPEAT); -+ -+ pktc |= DSI_TXPKT1C_CMD_EN; -+ if (pix_fifo_len) { -+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SECONDARY, -+ DSI_TXPKT1C_DISPLAY_NO); -+ } else { -+ pktc |= VC4_SET_FIELD(DSI_TXPKT1C_DISPLAY_NO_SHORT, -+ DSI_TXPKT1C_DISPLAY_NO); -+ } -+ -+ /* Enable the appropriate interrupt for the transfer completion. */ -+ dsi->xfer_result = 0; -+ reinit_completion(&dsi->xfer_completion); -+ DSI_PORT_WRITE(INT_STAT, DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF); -+ if (msg->rx_len) { -+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | -+ DSI1_INT_PHY_DIR_RTF)); -+ } else { -+ DSI_PORT_WRITE(INT_EN, (DSI1_INTERRUPTS_ALWAYS_ENABLED | -+ DSI1_INT_TXPKT1_DONE)); -+ } -+ -+ /* Send the packet. */ -+ DSI_PORT_WRITE(TXPKT1H, pkth); -+ DSI_PORT_WRITE(TXPKT1C, pktc); -+ -+ if (!wait_for_completion_timeout(&dsi->xfer_completion, -+ msecs_to_jiffies(1000))) { -+ dev_err(&dsi->pdev->dev, "transfer interrupt wait timeout"); -+ dev_err(&dsi->pdev->dev, "instat: 0x%08x\n", -+ DSI_PORT_READ(INT_STAT)); -+ ret = -ETIMEDOUT; -+ } else { -+ ret = dsi->xfer_result; -+ } -+ -+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED); -+ -+ if (ret) -+ goto reset_fifo_and_return; -+ -+ if (ret == 0 && msg->rx_len) { -+ u32 rxpkt1h = DSI_PORT_READ(RXPKT1H); -+ u8 *msg_rx = msg->rx_buf; -+ -+ if (rxpkt1h & DSI_RXPKT1H_PKT_TYPE_LONG) { -+ u32 rxlen = VC4_GET_FIELD(rxpkt1h, -+ DSI_RXPKT1H_BC_PARAM); -+ -+ if (rxlen != msg->rx_len) { -+ DRM_ERROR("DSI returned %db, expecting %db\n", -+ rxlen, (int)msg->rx_len); -+ ret = -ENXIO; -+ goto reset_fifo_and_return; -+ } -+ -+ for (i = 0; i < msg->rx_len; i++) -+ msg_rx[i] = DSI_READ(DSI1_RXPKT_FIFO); -+ } else { -+ /* FINISHME: Handle AWER */ -+ -+ msg_rx[0] = VC4_GET_FIELD(rxpkt1h, -+ DSI_RXPKT1H_SHORT_0); -+ if (msg->rx_len > 1) { -+ msg_rx[1] = VC4_GET_FIELD(rxpkt1h, -+ DSI_RXPKT1H_SHORT_1); -+ } -+ } -+ } -+ -+ return ret; -+ -+reset_fifo_and_return: -+ DRM_ERROR("DSI transfer failed, resetting: %d\n", ret); -+ -+ DSI_PORT_WRITE(TXPKT1C, DSI_PORT_READ(TXPKT1C) & ~DSI_TXPKT1C_CMD_EN); -+ udelay(1); -+ DSI_PORT_WRITE(CTRL, -+ DSI_PORT_READ(CTRL) | -+ DSI_PORT_BIT(CTRL_RESET_FIFOS)); -+ -+ DSI_PORT_WRITE(TXPKT1C, 0); -+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED); -+ return ret; -+} -+ -+static int vc4_dsi_host_attach(struct mipi_dsi_host *host, -+ struct mipi_dsi_device *device) -+{ -+ struct vc4_dsi *dsi = host_to_dsi(host); -+ int ret = 0; -+ -+ dsi->lanes = device->lanes; -+ dsi->channel = device->channel; -+ dsi->format = device->format; -+ dsi->mode_flags = device->mode_flags; -+ -+ if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO)) { -+ dev_err(&dsi->pdev->dev, -+ "Only VIDEO mode panels supported currently.\n"); -+ return 0; -+ } -+ -+ dsi->panel = of_drm_find_panel(device->dev.of_node); -+ if (!dsi->panel) -+ return 0; -+ -+ ret = drm_panel_attach(dsi->panel, dsi->connector); -+ if (ret != 0) -+ return ret; -+ -+ drm_helper_hpd_irq_event(dsi->connector->dev); -+ -+ return 0; -+} -+ -+static int vc4_dsi_host_detach(struct mipi_dsi_host *host, -+ struct mipi_dsi_device *device) -+{ -+ struct vc4_dsi *dsi = host_to_dsi(host); -+ -+ if (dsi->panel) { -+ int ret = drm_panel_detach(dsi->panel); -+ -+ if (ret) -+ return ret; -+ -+ dsi->panel = NULL; -+ -+ drm_helper_hpd_irq_event(dsi->connector->dev); -+ } -+ -+ return 0; -+} -+ -+static const struct mipi_dsi_host_ops vc4_dsi_host_ops = { -+ .attach = vc4_dsi_host_attach, -+ .detach = vc4_dsi_host_detach, -+ .transfer = vc4_dsi_host_transfer, -+}; -+ -+static const struct drm_encoder_helper_funcs vc4_dsi_encoder_helper_funcs = { -+ .disable = vc4_dsi_encoder_disable, -+ .enable = vc4_dsi_encoder_enable, -+}; -+ -+static const struct of_device_id vc4_dsi_dt_match[] = { -+ { .compatible = "brcm,bcm2835-dsi1", (void *)(uintptr_t)1 }, -+ {} -+}; -+ -+static void dsi_handle_error(struct vc4_dsi *dsi, -+ irqreturn_t *ret, u32 stat, u32 bit, -+ const char *type) -+{ -+ if (!(stat & bit)) -+ return; -+ -+ DRM_ERROR("DSI%d: %s error\n", dsi->port, type); -+ *ret = IRQ_HANDLED; -+} -+ -+static irqreturn_t vc4_dsi_irq_handler(int irq, void *data) -+{ -+ struct vc4_dsi *dsi = data; -+ u32 stat = DSI_PORT_READ(INT_STAT); -+ irqreturn_t ret = IRQ_NONE; -+ -+ DSI_PORT_WRITE(INT_STAT, stat); -+ -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_ERR_SYNC_ESC, "LPDT sync"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_ERR_CONTROL, "data lane 0 sequence"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_ERR_CONT_LP0, "LP0 contention"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_ERR_CONT_LP1, "LP1 contention"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_HSTX_TO, "HSTX timeout"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_LPRX_TO, "LPRX timeout"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_TA_TO, "turnaround timeout"); -+ dsi_handle_error(dsi, &ret, stat, -+ DSI1_INT_PR_TO, "peripheral reset timeout"); -+ -+ if (stat & (DSI1_INT_TXPKT1_DONE | DSI1_INT_PHY_DIR_RTF)) { -+ complete(&dsi->xfer_completion); -+ ret = IRQ_HANDLED; -+ } else if (stat & DSI1_INT_HSTX_TO) { -+ complete(&dsi->xfer_completion); -+ dsi->xfer_result = -ETIMEDOUT; -+ ret = IRQ_HANDLED; -+ } -+ -+ return ret; -+} -+ -+/** -+ * Exposes clocks generated by the analog PHY that are consumed by -+ * CPRMAN (clk-bcm2835.c). -+ */ -+static int -+vc4_dsi_init_phy_clocks(struct vc4_dsi *dsi) -+{ -+ struct device *dev = &dsi->pdev->dev; -+ const char *parent_name = __clk_get_name(dsi->pll_phy_clock); -+ static const struct { -+ const char *dsi0_name, *dsi1_name; -+ int div; -+ } phy_clocks[] = { -+ { "dsi0_byte", "dsi1_byte", 8 }, -+ { "dsi0_ddr2", "dsi1_ddr2", 4 }, -+ { "dsi0_ddr", "dsi1_ddr", 2 }, -+ }; -+ int i; -+ -+ dsi->clk_onecell.clk_num = ARRAY_SIZE(phy_clocks); -+ dsi->clk_onecell.clks = devm_kcalloc(dev, -+ dsi->clk_onecell.clk_num, -+ sizeof(*dsi->clk_onecell.clks), -+ GFP_KERNEL); -+ if (!dsi->clk_onecell.clks) -+ return -ENOMEM; -+ -+ for (i = 0; i < ARRAY_SIZE(phy_clocks); i++) { -+ struct clk_fixed_factor *fix = &dsi->phy_clocks[i]; -+ struct clk_init_data init; -+ struct clk *clk; -+ -+ /* We just use core fixed factor clock ops for the PHY -+ * clocks. The clocks are actually gated by the -+ * PHY_AFEC0_DDRCLK_EN bits, which we should be -+ * setting if we use the DDR/DDR2 clocks. However, -+ * vc4_dsi_encoder_enable() is setting up both AFEC0, -+ * setting both our parent DSI PLL's rate and this -+ * clock's rate, so it knows if DDR/DDR2 are going to -+ * be used and could enable the gates itself. -+ */ -+ fix->mult = 1; -+ fix->div = phy_clocks[i].div; -+ fix->hw.init = &init; -+ -+ memset(&init, 0, sizeof(init)); -+ init.parent_names = &parent_name; -+ init.num_parents = 1; -+ if (dsi->port == 1) -+ init.name = phy_clocks[i].dsi1_name; -+ else -+ init.name = phy_clocks[i].dsi0_name; -+ init.ops = &clk_fixed_factor_ops; -+ init.flags = CLK_IS_BASIC; -+ -+ clk = devm_clk_register(dev, &fix->hw); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ -+ dsi->clk_onecell.clks[i] = clk; -+ } -+ -+ return of_clk_add_provider(dev->of_node, -+ of_clk_src_onecell_get, -+ &dsi->clk_onecell); -+} -+ -+static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) -+{ -+ struct platform_device *pdev = to_platform_device(dev); -+ struct drm_device *drm = dev_get_drvdata(master); -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct vc4_dsi *dsi; -+ struct vc4_dsi_encoder *vc4_dsi_encoder; -+ const struct of_device_id *match; -+ dma_cap_mask_t dma_mask; -+ int ret; -+ -+ dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); -+ if (!dsi) -+ return -ENOMEM; -+ -+ match = of_match_device(vc4_dsi_dt_match, dev); -+ if (!match) -+ return -ENODEV; -+ -+ dsi->port = (uintptr_t)match->data; -+ -+ vc4_dsi_encoder = devm_kzalloc(dev, sizeof(*vc4_dsi_encoder), -+ GFP_KERNEL); -+ if (!vc4_dsi_encoder) -+ return -ENOMEM; -+ vc4_dsi_encoder->base.type = VC4_ENCODER_TYPE_DSI1; -+ vc4_dsi_encoder->dsi = dsi; -+ dsi->encoder = &vc4_dsi_encoder->base.base; -+ -+ dsi->pdev = pdev; -+ dsi->regs = vc4_ioremap_regs(pdev, 0); -+ if (IS_ERR(dsi->regs)) -+ return PTR_ERR(dsi->regs); -+ -+ if (DSI_PORT_READ(ID) != DSI_ID_VALUE) { -+ dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", -+ DSI_PORT_READ(ID), DSI_ID_VALUE); -+ return -ENODEV; -+ } -+ -+ /* DSI1 has a broken AXI slave that doesn't respond to writes -+ * from the ARM. It does handle writes from the DMA engine, -+ * so set up a channel for talking to it. -+ */ -+ if (dsi->port == 1) { -+ dsi->reg_dma_mem = dma_alloc_coherent(dev, 4, -+ &dsi->reg_dma_paddr, -+ GFP_KERNEL); -+ if (!dsi->reg_dma_mem) { -+ DRM_ERROR("Failed to get DMA memory\n"); -+ return -ENOMEM; -+ } -+ -+ dma_cap_zero(dma_mask); -+ dma_cap_set(DMA_MEMCPY, dma_mask); -+ dsi->reg_dma_chan = dma_request_chan_by_mask(&dma_mask); -+ if (IS_ERR(dsi->reg_dma_chan)) { -+ ret = PTR_ERR(dsi->reg_dma_chan); -+ if (ret != -EPROBE_DEFER) -+ DRM_ERROR("Failed to get DMA channel: %d\n", -+ ret); -+ return ret; -+ } -+ -+ /* Get the physical address of the device's registers. The -+ * struct resource for the regs gives us the bus address -+ * instead. -+ */ -+ dsi->reg_paddr = be32_to_cpup(of_get_address(dev->of_node, -+ 0, NULL, NULL)); -+ } -+ -+ init_completion(&dsi->xfer_completion); -+ /* At startup enable error-reporting interrupts and nothing else. */ -+ DSI_PORT_WRITE(INT_EN, DSI1_INTERRUPTS_ALWAYS_ENABLED); -+ /* Clear any existing interrupt state. */ -+ DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT)); -+ -+ ret = devm_request_irq(dev, platform_get_irq(pdev, 0), -+ vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); -+ if (ret) { -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get interrupt: %d\n", ret); -+ return ret; -+ } -+ -+ dsi->escape_clock = devm_clk_get(dev, "escape"); -+ if (IS_ERR(dsi->escape_clock)) { -+ ret = PTR_ERR(dsi->escape_clock); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get escape clock: %d\n", ret); -+ return ret; -+ } -+ -+ dsi->pll_phy_clock = devm_clk_get(dev, "phy"); -+ if (IS_ERR(dsi->pll_phy_clock)) { -+ ret = PTR_ERR(dsi->pll_phy_clock); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get phy clock: %d\n", ret); -+ return ret; -+ } -+ -+ dsi->pixel_clock = devm_clk_get(dev, "pixel"); -+ if (IS_ERR(dsi->pixel_clock)) { -+ ret = PTR_ERR(dsi->pixel_clock); -+ if (ret != -EPROBE_DEFER) -+ dev_err(dev, "Failed to get pixel clock: %d\n", ret); -+ return ret; -+ } -+ -+ /* The esc clock rate is supposed to always be 100Mhz. */ -+ ret = clk_set_rate(dsi->escape_clock, 100 * 1000000); -+ if (ret) { -+ dev_err(dev, "Failed to set esc clock: %d\n", ret); -+ return ret; -+ } -+ -+ ret = vc4_dsi_init_phy_clocks(dsi); -+ if (ret) -+ return ret; -+ -+ if (dsi->port == 1) -+ vc4->dsi1 = dsi; -+ -+ drm_encoder_init(drm, dsi->encoder, &vc4_dsi_encoder_funcs, -+ DRM_MODE_ENCODER_DSI, NULL); -+ drm_encoder_helper_add(dsi->encoder, &vc4_dsi_encoder_helper_funcs); -+ -+ dsi->connector = vc4_dsi_connector_init(drm, dsi); -+ if (IS_ERR(dsi->connector)) { -+ ret = PTR_ERR(dsi->connector); -+ goto err_destroy_encoder; -+ } -+ -+ dsi->dsi_host.ops = &vc4_dsi_host_ops; -+ dsi->dsi_host.dev = dev; -+ -+ mipi_dsi_host_register(&dsi->dsi_host); -+ -+ dev_set_drvdata(dev, dsi); -+ -+ pm_runtime_enable(dev); -+ -+ return 0; -+ -+err_destroy_encoder: -+ vc4_dsi_encoder_destroy(dsi->encoder); -+ -+ return ret; -+} -+ -+static void vc4_dsi_unbind(struct device *dev, struct device *master, -+ void *data) -+{ -+ struct drm_device *drm = dev_get_drvdata(master); -+ struct vc4_dev *vc4 = to_vc4_dev(drm); -+ struct vc4_dsi *dsi = dev_get_drvdata(dev); -+ -+ pm_runtime_disable(dev); -+ -+ vc4_dsi_connector_destroy(dsi->connector); -+ vc4_dsi_encoder_destroy(dsi->encoder); -+ -+ mipi_dsi_host_unregister(&dsi->dsi_host); -+ -+ clk_disable_unprepare(dsi->pll_phy_clock); -+ clk_disable_unprepare(dsi->escape_clock); -+ -+ if (dsi->port == 1) -+ vc4->dsi1 = NULL; -+} -+ -+static const struct component_ops vc4_dsi_ops = { -+ .bind = vc4_dsi_bind, -+ .unbind = vc4_dsi_unbind, -+}; -+ -+static int vc4_dsi_dev_probe(struct platform_device *pdev) -+{ -+ return component_add(&pdev->dev, &vc4_dsi_ops); -+} -+ -+static int vc4_dsi_dev_remove(struct platform_device *pdev) -+{ -+ component_del(&pdev->dev, &vc4_dsi_ops); -+ return 0; -+} -+ -+struct platform_driver vc4_dsi_driver = { -+ .probe = vc4_dsi_dev_probe, -+ .remove = vc4_dsi_dev_remove, -+ .driver = { -+ .name = "vc4_dsi", -+ .of_match_table = vc4_dsi_dt_match, -+ }, -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0180-drm-vc4-Fulfill-user-BO-creation-requests-from-the-k.patch b/target/linux/brcm2708/patches-4.9/950-0180-drm-vc4-Fulfill-user-BO-creation-requests-from-the-k.patch deleted file mode 100644 index 71118e26c..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0180-drm-vc4-Fulfill-user-BO-creation-requests-from-the-k.patch +++ /dev/null @@ -1,53 +0,0 @@ -From cb8a5a1cf8cfd5b88fe641ada9a2dfb318d43c3f Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 8 Feb 2017 15:00:54 -0800 -Subject: [PATCH] drm/vc4: Fulfill user BO creation requests from the kernel BO - cache. - -The from_cache flag was actually "the BO is invisible to userspace", -so we can repurpose to just zero out a cached BO and return it to -userspace. - -Improves wall time for a loop of 5 glsl-algebraic-add-add-1 by --1.44989% +/- 0.862891% (n=28, 1 outlier removed from each that -appeared to be other system noise) - -Note that there's an intel-gpu-tools test to check for the proper -zeroing behavior here, which we continue to pass. - -Signed-off-by: Eric Anholt ---- - drivers/gpu/drm/vc4/vc4_bo.c | 13 +++++++------ - 1 file changed, 7 insertions(+), 6 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -209,21 +209,22 @@ struct drm_gem_object *vc4_create_object - } - - struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, -- bool from_cache) -+ bool allow_unzeroed) - { - size_t size = roundup(unaligned_size, PAGE_SIZE); - struct vc4_dev *vc4 = to_vc4_dev(dev); - struct drm_gem_cma_object *cma_obj; -+ struct vc4_bo *bo; - - if (size == 0) - return ERR_PTR(-EINVAL); - - /* First, try to get a vc4_bo from the kernel BO cache. */ -- if (from_cache) { -- struct vc4_bo *bo = vc4_bo_get_from_cache(dev, size); -- -- if (bo) -- return bo; -+ bo = vc4_bo_get_from_cache(dev, size); -+ if (bo) { -+ if (!allow_unzeroed) -+ memset(bo->base.vaddr, 0, bo->base.base.size); -+ return bo; - } - - cma_obj = drm_gem_cma_create(dev, size); diff --git a/target/linux/brcm2708/patches-4.9/950-0181-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-.patch b/target/linux/brcm2708/patches-4.9/950-0181-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-.patch deleted file mode 100644 index 52d0de391..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0181-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 3f131f18e76bb3fa56158adea3abddeaac68e860 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Thu, 9 Feb 2017 09:23:34 -0800 -Subject: [PATCH] drm/vc4: Fix OOPSes from trying to cache a partially - constructed BO. - -If a CMA allocation failed, the partially constructed BO would be -unreferenced through the normal path, and we might choose to put it in -the BO cache. If we then reused it before it expired from the cache, -the kernel would OOPS. - -Signed-off-by: Eric Anholt -Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") ---- - drivers/gpu/drm/vc4/vc4_bo.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -323,6 +323,14 @@ void vc4_free_object(struct drm_gem_obje - goto out; - } - -+ /* If this object was partially constructed but CMA allocation -+ * had failed, just free it. -+ */ -+ if (!bo->base.vaddr) { -+ vc4_bo_destroy(bo); -+ goto out; -+ } -+ - cache_list = vc4_get_cache_list_for_size(dev, gem_bo->size); - if (!cache_list) { - vc4_bo_destroy(bo); diff --git a/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch b/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch deleted file mode 100644 index f17293ce7..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch +++ /dev/null @@ -1,79 +0,0 @@ -From b280acf3c32746106c81419390f5b1869d644f66 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Mon, 12 Oct 2015 08:58:08 -0700 -Subject: [PATCH] drm/vc4: Verify at boot that CMA doesn't cross a 256MB - boundary. - -I've seen lots of users cranking CMA up higher, so throw an error if -they do. - -Signed-off-by: Eric Anholt ---- - drivers/base/dma-contiguous.c | 1 + - drivers/gpu/drm/vc4/vc4_v3d.c | 18 ++++++++++++++++++ - mm/cma.c | 2 ++ - 3 files changed, 21 insertions(+) - ---- a/drivers/base/dma-contiguous.c -+++ b/drivers/base/dma-contiguous.c -@@ -35,6 +35,7 @@ - #endif - - struct cma *dma_contiguous_default_area; -+EXPORT_SYMBOL(dma_contiguous_default_area); - - /* - * Default global CMA area size can be defined in kernel's .config. ---- a/drivers/gpu/drm/vc4/vc4_v3d.c -+++ b/drivers/gpu/drm/vc4/vc4_v3d.c -@@ -16,7 +16,10 @@ - * this program. If not, see . - */ - -+#include "linux/init.h" -+#include "linux/cma.h" - #include "linux/component.h" -+#include "linux/dma-contiguous.h" - #include "linux/pm_runtime.h" - #include "vc4_drv.h" - #include "vc4_regs.h" -@@ -188,8 +191,23 @@ static int vc4_v3d_bind(struct device *d - struct drm_device *drm = dev_get_drvdata(master); - struct vc4_dev *vc4 = to_vc4_dev(drm); - struct vc4_v3d *v3d = NULL; -+ struct cma *cma; - int ret; - -+ cma = dev_get_cma_area(dev); -+ if (!cma) -+ return -EINVAL; -+ -+ if ((cma_get_base(cma) & 0xf0000000) != -+ ((cma_get_base(cma) + cma_get_size(cma) - 1) & 0xf0000000)) { -+ DRM_ERROR("V3D requires that the CMA area (0x%08lx - 0x%08lx) " -+ "not span a 256MB boundary, or memory corruption " -+ "would happen.\n", -+ (long)cma_get_base(cma), -+ cma_get_base(cma) + cma_get_size(cma)); -+ return -EINVAL; -+ } -+ - v3d = devm_kzalloc(&pdev->dev, sizeof(*v3d), GFP_KERNEL); - if (!v3d) - return -ENOMEM; ---- a/mm/cma.c -+++ b/mm/cma.c -@@ -47,11 +47,13 @@ phys_addr_t cma_get_base(const struct cm - { - return PFN_PHYS(cma->base_pfn); - } -+EXPORT_SYMBOL(cma_get_base); - - unsigned long cma_get_size(const struct cma *cma) - { - return cma->count << PAGE_SHIFT; - } -+EXPORT_SYMBOL(cma_get_size); - - static unsigned long cma_bitmap_aligned_mask(const struct cma *cma, - unsigned int align_order) diff --git a/target/linux/brcm2708/patches-4.9/950-0183-BCM270X_DT-Add-SMSC-ethernet-controller-to-DT.patch b/target/linux/brcm2708/patches-4.9/950-0183-BCM270X_DT-Add-SMSC-ethernet-controller-to-DT.patch deleted file mode 100644 index 76b1bf3bb..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0183-BCM270X_DT-Add-SMSC-ethernet-controller-to-DT.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 35a2c1524b21318228f0566d9a4ac53bf3138bdc Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 17 Feb 2017 09:47:11 +0000 -Subject: [PATCH] BCM270X_DT: Add SMSC ethernet controller to DT - -With an ethernet node in the DT, a suitable firmware can populate the -local-mac-address property, removing the need for a downstream patch -to the driver to read its MAC address from a module parameter. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 1 + - arch/arm/boot/dts/bcm2708-rpi-b.dts | 1 + - arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 1 + - arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 1 + - 4 files changed, 4 insertions(+) - ---- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -@@ -1,6 +1,7 @@ - /dts-v1/; - - #include "bcm2708.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" - - / { - model = "Raspberry Pi Model B+"; ---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts -@@ -1,6 +1,7 @@ - /dts-v1/; - - #include "bcm2708.dtsi" -+#include "bcm283x-rpi-smsc9512.dtsi" - - / { - model = "Raspberry Pi Model B"; ---- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -@@ -1,6 +1,7 @@ - /dts-v1/; - - #include "bcm2709.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" - - / { - model = "Raspberry Pi 2 Model B"; ---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -@@ -5,6 +5,7 @@ - #endif - - #include "bcm2710.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" - - / { - model = "Raspberry Pi 3 Model B"; diff --git a/target/linux/brcm2708/patches-4.9/950-0188-Add-ads1015-driver-to-config.patch b/target/linux/brcm2708/patches-4.9/950-0188-Add-ads1015-driver-to-config.patch deleted file mode 100644 index 1303bdc10..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0188-Add-ads1015-driver-to-config.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 9e638878dd33652b34e51746d369afba6103d77e Mon Sep 17 00:00:00 2001 -From: Scott Ellis -Date: Thu, 23 Feb 2017 11:56:20 -0500 -Subject: [PATCH] Add ads1015 driver to config - ---- - arch/arm/configs/bcm2709_defconfig | 3 ++- - arch/arm/configs/bcmrpi_defconfig | 3 ++- - 2 files changed, 4 insertions(+), 2 deletions(-) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -653,6 +653,7 @@ CONFIG_HWMON=m - CONFIG_SENSORS_LM75=m - CONFIG_SENSORS_SHT21=m - CONFIG_SENSORS_SHTC1=m -+CONFIG_SENSORS_ADS1015=m - CONFIG_SENSORS_INA2XX=m - CONFIG_THERMAL=y - CONFIG_THERMAL_BCM2835=y -@@ -833,9 +834,9 @@ CONFIG_VIDEO_OV7640=m - CONFIG_VIDEO_MT9V011=m - CONFIG_DRM=m - CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_UDL=m - CONFIG_DRM_PANEL_SIMPLE=m - CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m --CONFIG_DRM_UDL=m - CONFIG_DRM_VC4=m - CONFIG_FB=y - CONFIG_FB_BCM2708=y ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -647,6 +647,7 @@ CONFIG_HWMON=m - CONFIG_SENSORS_LM75=m - CONFIG_SENSORS_SHT21=m - CONFIG_SENSORS_SHTC1=m -+CONFIG_SENSORS_ADS1015=m - CONFIG_SENSORS_INA2XX=m - CONFIG_THERMAL=y - CONFIG_THERMAL_BCM2835=y -@@ -827,9 +828,9 @@ CONFIG_VIDEO_OV7640=m - CONFIG_VIDEO_MT9V011=m - CONFIG_DRM=m - CONFIG_DRM_LOAD_EDID_FIRMWARE=y -+CONFIG_DRM_UDL=m - CONFIG_DRM_PANEL_SIMPLE=m - CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m --CONFIG_DRM_UDL=m - CONFIG_DRM_VC4=m - CONFIG_FB=y - CONFIG_FB_BCM2708=y diff --git a/target/linux/brcm2708/patches-4.9/950-0189-config-add-slcan-kernel-module.patch b/target/linux/brcm2708/patches-4.9/950-0189-config-add-slcan-kernel-module.patch deleted file mode 100644 index 021eb014c..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0189-config-add-slcan-kernel-module.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 2fd423706eb3afde2a36845488e18d194b18b0c6 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Fri, 27 Jan 2017 18:49:30 +0000 -Subject: [PATCH] config: add slcan kernel module - -See: https://github.com/raspberrypi/linux/issues/1819 ---- - arch/arm/configs/bcm2709_defconfig | 1 + - arch/arm/configs/bcmrpi_defconfig | 1 + - 2 files changed, 2 insertions(+) - ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -361,6 +361,7 @@ CONFIG_BAYCOM_SER_HDX=m - CONFIG_YAM=m - CONFIG_CAN=m - CONFIG_CAN_VCAN=m -+CONFIG_CAN_SLCAN=m - CONFIG_CAN_MCP251X=m - CONFIG_IRDA=m - CONFIG_IRLAN=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -357,6 +357,7 @@ CONFIG_BAYCOM_SER_HDX=m - CONFIG_YAM=m - CONFIG_CAN=m - CONFIG_CAN_VCAN=m -+CONFIG_CAN_SLCAN=m - CONFIG_CAN_MCP251X=m - CONFIG_IRDA=m - CONFIG_IRLAN=m diff --git a/target/linux/brcm2708/patches-4.9/950-0190-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch b/target/linux/brcm2708/patches-4.9/950-0190-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch deleted file mode 100644 index eb6422a46..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0190-sound-Support-for-Dion-Audio-LOCO-V2-DAC-AMP-HAT.patch +++ /dev/null @@ -1,251 +0,0 @@ -From a20dbe4972ea3df27f24c5397102e1346462a4f4 Mon Sep 17 00:00:00 2001 -From: Miquel -Date: Fri, 24 Feb 2017 20:51:06 +0100 -Subject: [PATCH] sound: Support for Dion Audio LOCO-V2 DAC-AMP HAT - -Signed-off-by: Miquel Blauw ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 19 +++++ - arch/arm/configs/bcm2709_defconfig | 1 + - arch/arm/configs/bcmrpi_defconfig | 1 + - sound/soc/bcm/Kconfig | 7 ++ - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/dionaudio_loco-v2.c | 140 ++++++++++++++++++++++++++++++++++++ - 7 files changed, 171 insertions(+) - create mode 100644 sound/soc/bcm/dionaudio_loco-v2.c - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -13,6 +13,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - bmp085_i2c-sensor.dtbo \ - dht11.dtbo \ - dionaudio-loco.dtbo \ -+ dionaudio-loco-v2.dtbo \ - dpi18.dtbo \ - dpi24.dtbo \ - dwc-otg.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -308,6 +308,25 @@ Load: dtoverlay=dionaudio-loco - Params: - - -+Name: dionaudio-loco-v2 -+Info: Configures the Dion Audio LOCO-V2 DAC-AMP -+Load: dtoverlay=dionaudio-loco-v2,= -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. Enable with -+ "dtoverlay=hifiberry-dacplus,24db_digital_gain" -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24dB_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ -+ - Name: dpi18 - Info: Overlay for a generic 18-bit DPI display - This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -889,6 +889,7 @@ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m - CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m - CONFIG_SND_DIGIDAC1_SOUNDCARD=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m -+CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -883,6 +883,7 @@ CONFIG_SND_BCM2708_SOC_ADAU1977_ADC=m - CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD=m - CONFIG_SND_DIGIDAC1_SOUNDCARD=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m -+CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -133,6 +133,13 @@ config SND_BCM2708_SOC_DIONAUDIO_LOCO - help - Say Y or M if you want to add support for Dion Audio LOCO. - -+config SND_BCM2708_SOC_DIONAUDIO_LOCO_V2 -+ tristate "Support for Dion Audio LOCO-V2 DAC-AMP" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM5122 -+ help -+ Say Y or M if you want to add support for Dion Audio LOCO-V2. -+ - config SND_BCM2708_SOC_ALLO_PIANO_DAC - tristate "Support for Allo Piano DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -25,6 +25,7 @@ snd-soc-raspidac3-objs := raspidac3.o - snd-soc-audioinjector-pi-soundcard-objs := audioinjector-pi-soundcard.o - snd-soc-digidac1-soundcard-objs := digidac1-soundcard.o - snd-soc-dionaudio-loco-objs := dionaudio_loco.o -+snd-soc-dionaudio-loco-v2-objs := dionaudio_loco-v2.o - snd-soc-allo-piano-dac-objs := allo-piano-dac.o - snd-soc-pisound-objs := pisound.o - -@@ -44,5 +45,6 @@ obj-$(CONFIG_SND_BCM2708_SOC_RASPIDAC3) - obj-$(CONFIG_SND_AUDIOINJECTOR_PI_SOUNDCARD) += snd-soc-audioinjector-pi-soundcard.o - obj-$(CONFIG_SND_DIGIDAC1_SOUNDCARD) += snd-soc-digidac1-soundcard.o - obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO) += snd-soc-dionaudio-loco.o -+obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2) += snd-soc-dionaudio-loco-v2.o - obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o - obj-$(CONFIG_SND_PISOUND) += snd-soc-pisound.o ---- /dev/null -+++ b/sound/soc/bcm/dionaudio_loco-v2.c -@@ -0,0 +1,140 @@ -+/* -+ * ASoC Driver for Dion Audio LOCO-V2 DAC-AMP -+ * -+ * Author: Miquel Blauw -+ * Copyright 2017 -+ * -+ * Based on the software of the RPi-DAC writen by Florian Meier -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static bool digital_gain_0db_limit = true; -+ -+static int snd_rpi_dionaudio_loco_v2_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ if (digital_gain_0db_limit) { -+ int ret; -+ struct snd_soc_card *card = rtd->card; -+ -+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", 207); -+ if (ret < 0) -+ dev_warn(card->dev, "Failed to set volume limit: %d\n", ret); -+ } -+ -+ return 0; -+} -+ -+static int snd_rpi_dionaudio_loco_v2_hw_params( -+ struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ unsigned int sample_bits = -+ snd_pcm_format_physical_width(params_format(params)); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, sample_bits * 2); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_dionaudio_loco_v2_ops = { -+ .hw_params = snd_rpi_dionaudio_loco_v2_hw_params, -+}; -+ -+static struct snd_soc_dai_link snd_rpi_dionaudio_loco_v2_dai[] = { -+{ -+ .name = "DionAudio LOCO-V2", -+ .stream_name = "DionAudio LOCO-V2 DAC-AMP", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "pcm512x-hifi", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "pcm512x.1-004d", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_dionaudio_loco_v2_ops, -+ .init = snd_rpi_dionaudio_loco_v2_init, -+},}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_dionaudio_loco_v2 = { -+ .name = "Dion Audio LOCO-V2", -+ .dai_link = snd_rpi_dionaudio_loco_v2_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_dionaudio_loco_v2_dai), -+}; -+ -+static int snd_rpi_dionaudio_loco_v2_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ -+ snd_rpi_dionaudio_loco_v2.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = -+ &snd_rpi_dionaudio_loco_v2_dai[0]; -+ -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ if (i2s_node) { -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ } -+ -+ digital_gain_0db_limit = !of_property_read_bool( -+ pdev->dev.of_node, "dionaudio,24db_digital_gain"); -+ } -+ -+ ret = snd_soc_register_card(&snd_rpi_dionaudio_loco_v2); -+ if (ret) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", -+ ret); -+ -+ return ret; -+} -+ -+static int snd_rpi_dionaudio_loco_v2_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_dionaudio_loco_v2); -+} -+ -+static const struct of_device_id dionaudio_of_match[] = { -+ { .compatible = "dionaudio,dionaudio-loco-v2", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, dionaudio_of_match); -+ -+static struct platform_driver snd_rpi_dionaudio_loco_v2_driver = { -+ .driver = { -+ .name = "snd-rpi-dionaudio-loco-v2", -+ .owner = THIS_MODULE, -+ .of_match_table = dionaudio_of_match, -+ }, -+ .probe = snd_rpi_dionaudio_loco_v2_probe, -+ .remove = snd_rpi_dionaudio_loco_v2_remove, -+}; -+ -+module_platform_driver(snd_rpi_dionaudio_loco_v2_driver); -+ -+MODULE_AUTHOR("Miquel Blauw "); -+MODULE_DESCRIPTION("ASoC Driver for DionAudio LOCO-V2"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0191-SQUASH-Add-LOCO-V2-overlay-from-last-commit.patch b/target/linux/brcm2708/patches-4.9/950-0191-SQUASH-Add-LOCO-V2-overlay-from-last-commit.patch deleted file mode 100644 index be3618a0b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0191-SQUASH-Add-LOCO-V2-overlay-from-last-commit.patch +++ /dev/null @@ -1,62 +0,0 @@ -From e3b5ca5cb69c36f41436ab8be96710e39442ce28 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Sun, 26 Feb 2017 01:13:02 +0000 -Subject: [PATCH] SQUASH: Add LOCO-V2 overlay from last commit - ---- - .../dts/overlays/dionaudio-loco-v2-overlay.dts | 49 ++++++++++++++++++++++ - 1 file changed, 49 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts - ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts -@@ -0,0 +1,49 @@ -+/* -+ * Definitions for Dion Audio LOCO-V2 DAC-AMP -+ * eg. dtoverlay=dionaudio-loco-v2 -+ * -+ * PCM5242 DAC (in software mode) and TPA3255 AMP. -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target = <&sound>; -+ frag0: __overlay__ { -+ compatible = "dionaudio,dionaudio-loco-v2"; -+ i2s-controller = <&i2s>; -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&i2c1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pcm5122@4c { -+ #sound-dai-cells = <0>; -+ compatible = "ti,pcm5122"; -+ reg = <0x4d>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0192-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch b/target/linux/brcm2708/patches-4.9/950-0192-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch deleted file mode 100644 index 262dc14bc..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0192-Add-support-for-Fe-Pi-audio-sound-card.-1867.patch +++ /dev/null @@ -1,333 +0,0 @@ -From c646d023c75607a9ebc7296fe424d6eb4e804164 Mon Sep 17 00:00:00 2001 -From: Fe-Pi -Date: Wed, 1 Mar 2017 04:42:43 -0700 -Subject: [PATCH] Add support for Fe-Pi audio sound card. (#1867) - -Fe-Pi Audio Sound Card is based on NXP SGTL5000 codec. -Mechanical specification of the board is the same the Raspberry Pi Zero. -3.5mm jacks for Headphone/Mic, Line In, and Line Out. - -Signed-off-by: Henry Kupis ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 + - arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +++++++++ - arch/arm/configs/bcm2709_defconfig | 1 + - arch/arm/configs/bcmrpi_defconfig | 1 + - sound/soc/bcm/Kconfig | 7 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/fe-pi-audio.c | 158 +++++++++++++++++++++ - 8 files changed, 246 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts - create mode 100644 sound/soc/bcm/fe-pi-audio.c - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -20,6 +20,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - dwc2.dtbo \ - enc28j60.dtbo \ - enc28j60-spi2.dtbo \ -+ fe-pi-audio.dtbo \ - gpio-ir.dtbo \ - gpio-poweroff.dtbo \ - hifiberry-amp.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -383,6 +383,12 @@ Params: int_pin GPIO use - speed SPI bus speed (default 12000000) - - -+Name: fe-pi-audio -+Info: Configures the Fe-Pi Audio Sound Card -+Load: dtoverlay=fe-pi-audio -+Params: -+ -+ - Name: gpio-ir - Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core- - based gpio_ir_recv driver maps received keys directly to a ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts -@@ -0,0 +1,70 @@ -+// Definitions for Fe-Pi Audio -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target = <&clocks>; -+ __overlay__ { -+ sgtl5000_mclk: sgtl5000_mclk { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <12288000>; -+ clock-output-names = "sgtl5000-mclk"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&soc>; -+ __overlay__ { -+ reg_1v8: reg_1v8@0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&i2c1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ sgtl5000@0a { -+ #sound-dai-cells = <0>; -+ compatible = "fepi,sgtl5000"; -+ reg = <0x0a>; -+ clocks = <&sgtl5000_mclk>; -+ micbias-resistor-k-ohms = <2>; -+ micbias-voltage-m-volts = <3000>; -+ VDDA-supply = <&vdd_3v3_reg>; -+ VDDIO-supply = <&vdd_3v3_reg>; -+ VDDD-supply = <®_1v8>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&sound>; -+ __overlay__ { -+ compatible = "fe-pi,fe-pi-audio"; -+ i2s-controller = <&i2s>; -+ status = "okay"; -+ }; -+ }; -+}; ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -891,6 +891,7 @@ CONFIG_SND_DIGIDAC1_SOUNDCARD=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m -+CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m - CONFIG_SND_SOC_ADAU7002=m ---- a/arch/arm/configs/bcmrpi_defconfig -+++ b/arch/arm/configs/bcmrpi_defconfig -@@ -885,6 +885,7 @@ CONFIG_SND_DIGIDAC1_SOUNDCARD=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO=m - CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2=m - CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC=m -+CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO=m - CONFIG_SND_PISOUND=m - CONFIG_SND_SOC_ADAU1701=m - CONFIG_SND_SOC_ADAU7002=m ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -147,6 +147,13 @@ config SND_BCM2708_SOC_ALLO_PIANO_DAC - help - Say Y or M if you want to add support for Allo Piano DAC. - -+config SND_BCM2708_SOC_FE_PI_AUDIO -+ tristate "Support for Fe-Pi-Audio" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_SGTL5000 -+ help -+ Say Y or M if you want to add support for Fe-Pi-Audio. -+ - config SND_PISOUND - tristate "Support for Blokas Labs pisound" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -28,6 +28,7 @@ snd-soc-dionaudio-loco-objs := dionaudio - snd-soc-dionaudio-loco-v2-objs := dionaudio_loco-v2.o - snd-soc-allo-piano-dac-objs := allo-piano-dac.o - snd-soc-pisound-objs := pisound.o -+snd-soc-fe-pi-audio-objs := fe-pi-audio.o - - obj-$(CONFIG_SND_BCM2708_SOC_ADAU1977_ADC) += snd-soc-adau1977-adc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) += snd-soc-hifiberry-amp.o -@@ -48,3 +49,4 @@ obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_L - obj-$(CONFIG_SND_BCM2708_SOC_DIONAUDIO_LOCO_V2) += snd-soc-dionaudio-loco-v2.o - obj-$(CONFIG_SND_BCM2708_SOC_ALLO_PIANO_DAC) += snd-soc-allo-piano-dac.o - obj-$(CONFIG_SND_PISOUND) += snd-soc-pisound.o -+obj-$(CONFIG_SND_BCM2708_SOC_FE_PI_AUDIO) += snd-soc-fe-pi-audio.o ---- /dev/null -+++ b/sound/soc/bcm/fe-pi-audio.c -@@ -0,0 +1,158 @@ -+/* -+ * ASoC Driver for Fe-Pi Audio Sound Card -+ * -+ * Author: Henry Kupis -+ * Copyright 2016 -+ * based on code by Florian Meier -+ * based on code by Shawn Guo -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/sgtl5000.h" -+ -+static int snd_fe_pi_audio_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_card *card = rtd->card; -+ struct snd_soc_codec *codec = rtd->codec; -+ -+ snd_soc_dapm_force_enable_pin(&card->dapm, "LO"); -+ snd_soc_dapm_force_enable_pin(&card->dapm, "ADC"); -+ snd_soc_dapm_force_enable_pin(&card->dapm, "DAC"); -+ snd_soc_dapm_force_enable_pin(&card->dapm, "HP"); -+ snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, -+ SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP); -+ -+ return 0; -+} -+ -+static int snd_fe_pi_audio_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct device *dev = rtd->card->dev; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ -+ int ret; -+ -+ /* Set SGTL5000's SYSCLK */ -+ ret = snd_soc_dai_set_sysclk(codec_dai, SGTL5000_SYSCLK, 12288000, SND_SOC_CLOCK_IN); -+ if (ret) { -+ dev_err(dev, "could not set codec driver clock params\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+ -+static struct snd_soc_ops snd_fe_pi_audio_ops = { -+ .hw_params = snd_fe_pi_audio_hw_params, -+}; -+ -+static struct snd_soc_dai_link snd_fe_pi_audio_dai[] = { -+ { -+ .name = "FE-PI", -+ .stream_name = "Fe-Pi HiFi", -+ .cpu_dai_name = "bcm2708-i2s.0", -+ .codec_dai_name = "sgtl5000", -+ .platform_name = "bcm2708-i2s.0", -+ .codec_name = "sgtl5000.1-000a", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ .ops = &snd_fe_pi_audio_ops, -+ .init = snd_fe_pi_audio_init, -+ }, -+}; -+ -+static const struct snd_soc_dapm_route fe_pi_audio_dapm_routes[] = { -+ {"ADC", NULL, "Mic Bias"}, -+}; -+ -+ -+static struct snd_soc_card fe_pi_audio = { -+ .name = "Fe-Pi Audio", -+ .owner = THIS_MODULE, -+ .dai_link = snd_fe_pi_audio_dai, -+ .num_links = ARRAY_SIZE(snd_fe_pi_audio_dai), -+ -+ .dapm_routes = fe_pi_audio_dapm_routes, -+ .num_dapm_routes = ARRAY_SIZE(fe_pi_audio_dapm_routes), -+}; -+ -+static int snd_fe_pi_audio_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ struct snd_soc_card *card = &fe_pi_audio; -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_fe_pi_audio_dai[0]; -+ -+ fe_pi_audio.dev = &pdev->dev; -+ -+ i2s_node = of_parse_phandle(np, "i2s-controller", 0); -+ if (!i2s_node) { -+ dev_err(&pdev->dev, "i2s_node phandle missing or invalid\n"); -+ return -EINVAL; -+ } -+ -+ dai->cpu_dai_name = NULL; -+ dai->cpu_of_node = i2s_node; -+ dai->platform_name = NULL; -+ dai->platform_of_node = i2s_node; -+ -+ of_node_put(i2s_node); -+ -+ card->dev = &pdev->dev; -+ platform_set_drvdata(pdev, card); -+ -+ ret = snd_soc_register_card(card); -+ if (ret && ret != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", ret); -+ -+ return ret; -+} -+ -+static int snd_fe_pi_audio_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&fe_pi_audio); -+} -+ -+static const struct of_device_id snd_fe_pi_audio_of_match[] = { -+ { .compatible = "fe-pi,fe-pi-audio", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_fe_pi_audio_of_match); -+ -+static struct platform_driver snd_fe_pi_audio_driver = { -+ .driver = { -+ .name = "snd-fe-pi-audio", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_fe_pi_audio_of_match, -+ }, -+ .probe = snd_fe_pi_audio_probe, -+ .remove = snd_fe_pi_audio_remove, -+}; -+ -+module_platform_driver(snd_fe_pi_audio_driver); -+ -+MODULE_AUTHOR("Henry Kupis "); -+MODULE_DESCRIPTION("ASoC Driver for Fe-Pi Audio"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/brcm2708/patches-4.9/950-0193-Add-overlay-for-ads1115-ADCs-1864.patch b/target/linux/brcm2708/patches-4.9/950-0193-Add-overlay-for-ads1115-ADCs-1864.patch deleted file mode 100644 index 39d48e60b..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0193-Add-overlay-for-ads1115-ADCs-1864.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 6d5e32067cf3f3169ec15097c175878de365d247 Mon Sep 17 00:00:00 2001 -From: Scott Ellis -Date: Wed, 1 Mar 2017 07:22:24 -0500 -Subject: [PATCH] Add overlay for ads1115 ADCs (#1864) - ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 22 ++++++ - arch/arm/boot/dts/overlays/ads1115-overlay.dts | 103 +++++++++++++++++++++++++ - 3 files changed, 126 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -4,6 +4,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - adau1977-adc.dtbo \ - adau7002-simple.dtbo \ - ads1015.dtbo \ -+ ads1115.dtbo \ - ads7846.dtbo \ - akkordion-iqdacplus.dtbo \ - allo-piano-dac-pcm512x-audio.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -196,6 +196,28 @@ Params: addr I2C bus - http://www.ti.com/lit/ds/symlink/ads1015.pdf - - -+Name: ads1115 -+Info: Texas Instruments ADS1115 ADC -+Load: dtoverlay=ads1115,[=] -+Params: addr I2C bus address of device. Set based on how the -+ addr pin is wired. (default=0x48 assumes addr -+ is pulled to GND) -+ cha_enable Enable virtual channel a. -+ cha_cfg Set the configuration for virtual channel a. -+ (default=4 configures this channel for the -+ voltage at A0 with respect to GND) -+ cha_datarate Set the datarate (samples/sec) for this channel. -+ (default=7 sets 860 sps) -+ cha_gain Set the gain of the Programmable Gain -+ Amplifier for this channel. (Default 1 sets the -+ full scale of the channel to 4.096 Volts) -+ -+ Channel parameters can be set for each enabled channel. -+ A maximum of 4 channels can be enabled (letters a thru d). -+ For more information refer to the device datasheet at: -+ http://www.ti.com/lit/ds/symlink/ads1115.pdf -+ -+ - Name: ads7846 - Info: ADS7846 Touch controller - Load: dtoverlay=ads7846,= ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts -@@ -0,0 +1,103 @@ -+/* -+ * TI ADS1115 multi-channel ADC overlay -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2708"; -+ -+ fragment@0 { -+ target = <&i2c_arm>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ ads1115: ads1115 { -+ compatible = "ti,ads1115"; -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0x48>; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "i2c_arm/ads1115"; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel_a: channel_a { -+ reg = <4>; -+ ti,gain = <1>; -+ ti,datarate = <7>; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target-path = "i2c_arm/ads1115"; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel_b: channel_b { -+ reg = <5>; -+ ti,gain = <1>; -+ ti,datarate = <7>; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target-path = "i2c_arm/ads1115"; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel_c: channel_c { -+ reg = <6>; -+ ti,gain = <1>; -+ ti,datarate = <7>; -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target-path = "i2c_arm/ads1115"; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel_d: channel_d { -+ reg = <7>; -+ ti,gain = <1>; -+ ti,datarate = <7>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ addr = <&ads1115>,"reg:0"; -+ cha_enable = <0>,"=1"; -+ cha_cfg = <&channel_a>,"reg:0"; -+ cha_gain = <&channel_a>,"ti,gain:0"; -+ cha_datarate = <&channel_a>,"ti,datarate:0"; -+ chb_enable = <0>,"=2"; -+ chb_cfg = <&channel_b>,"reg:0"; -+ chb_gain = <&channel_b>,"ti,gain:0"; -+ chb_datarate = <&channel_b>,"ti,datarate:0"; -+ chc_enable = <0>,"=3"; -+ chc_cfg = <&channel_c>,"reg:0"; -+ chc_gain = <&channel_c>,"ti,gain:0"; -+ chc_datarate = <&channel_c>,"ti,datarate:0"; -+ chd_enable = <0>,"=4"; -+ chd_cfg = <&channel_d>,"reg:0"; -+ chd_gain = <&channel_d>,"ti,gain:0"; -+ chd_datarate = <&channel_d>,"ti,datarate:0"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-0194-clk-bcm2835-Correct-the-prediv-logic.patch b/target/linux/brcm2708/patches-4.9/950-0194-clk-bcm2835-Correct-the-prediv-logic.patch deleted file mode 100644 index c81194fe6..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0194-clk-bcm2835-Correct-the-prediv-logic.patch +++ /dev/null @@ -1,27 +0,0 @@ -From a9913dccdeaabca37343d0d8b0a48cda1e434e02 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 1 Mar 2017 16:06:53 +0000 -Subject: [PATCH] clk-bcm2835: Correct the prediv logic - -If a clock has the prediv flag set, both the integer and fractional -parts must be scaled when calculating the resulting frequency. - -Signed-off-by: Phil Elwell ---- - drivers/clk/bcm/clk-bcm2835.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -616,8 +616,10 @@ static unsigned long bcm2835_pll_get_rat - using_prediv = cprman_read(cprman, data->ana_reg_base + 4) & - data->ana->fb_prediv_mask; - -- if (using_prediv) -+ if (using_prediv) { - ndiv *= 2; -+ fdiv *= 2; -+ } - - return bcm2835_pll_rate_from_divisors(parent_rate, ndiv, fdiv, pdiv); - } diff --git a/target/linux/brcm2708/patches-4.9/950-0196-BCM2835-V4L2-Ensure-H264-header-bytes-get-a-sensible.patch b/target/linux/brcm2708/patches-4.9/950-0196-BCM2835-V4L2-Ensure-H264-header-bytes-get-a-sensible.patch deleted file mode 100644 index df8d4b4a4..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0196-BCM2835-V4L2-Ensure-H264-header-bytes-get-a-sensible.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 02ceda02182f6cb538be397b8d8f34b64a254559 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 13 Feb 2017 11:10:50 +0000 -Subject: [PATCH] BCM2835-V4L2: Ensure H264 header bytes get a sensible - timestamp - -H264 header come off VC with 0 timestamps, which means they get a -strange timestamp when processed with VC/kernel start times, -particularly if used with the inline header option. -Remember the last frame timestamp and use that if set, or otherwise -use the kernel start time. - -https://github.com/raspberrypi/linux/issues/1836 - -Signed-off-by: Dave Stevenson ---- - drivers/media/platform/bcm2835/bcm2835-camera.c | 30 ++++++++++++++++++++++--- - drivers/media/platform/bcm2835/bcm2835-camera.h | 2 ++ - 2 files changed, 29 insertions(+), 3 deletions(-) - ---- a/drivers/media/platform/bcm2835/bcm2835-camera.c -+++ b/drivers/media/platform/bcm2835/bcm2835-camera.c -@@ -356,8 +356,13 @@ static void buffer_cb(struct vchiq_mmal_ - } - } else { - if (dev->capture.frame_count) { -- if (dev->capture.vc_start_timestamp != -1 && -- pts != 0) { -+ if (dev->capture.vc_start_timestamp == -1) { -+ buf->vb.vb2_buf.timestamp = ktime_get_ns(); -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Buffer time set as current time - %lld", -+ buf->vb.vb2_buf.timestamp); -+ -+ } else if(pts != 0) { - struct timeval timestamp; - s64 runtime_us = pts - - dev->capture.vc_start_timestamp; -@@ -390,10 +395,27 @@ static void buffer_cb(struct vchiq_mmal_ - buf->vb.vb2_buf.timestamp = timestamp.tv_sec * 1000000000ULL + - timestamp.tv_usec * 1000ULL; - } else { -- buf->vb.vb2_buf.timestamp = ktime_get_ns(); -+ if (dev->capture.last_timestamp) { -+ buf->vb.vb2_buf.timestamp = dev->capture.last_timestamp; -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Buffer time set as last timestamp - %lld", -+ buf->vb.vb2_buf.timestamp); -+ } -+ else { -+ buf->vb.vb2_buf.timestamp = -+ dev->capture.kernel_start_ts.tv_sec * 1000000000ULL + -+ dev->capture.kernel_start_ts.tv_usec * 1000ULL; -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Buffer time set as start timestamp - %lld", -+ buf->vb.vb2_buf.timestamp); -+ } - } -+ dev->capture.last_timestamp = buf->vb.vb2_buf.timestamp; - - vb2_set_plane_payload(&buf->vb.vb2_buf, 0, length); -+ v4l2_dbg(1, bcm2835_v4l2_debug, &dev->v4l2_dev, -+ "Buffer has ts %llu", -+ dev->capture.last_timestamp); - vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); - - if (mmal_flags & MMAL_BUFFER_HEADER_FLAG_EOS && -@@ -559,6 +581,8 @@ static int start_streaming(struct vb2_qu - "Start time %lld size %d\n", - dev->capture.vc_start_timestamp, parameter_size); - -+ dev->capture.last_timestamp = 0; -+ - v4l2_get_timestamp(&dev->capture.kernel_start_ts); - - /* enable the camera port */ ---- a/drivers/media/platform/bcm2835/bcm2835-camera.h -+++ b/drivers/media/platform/bcm2835/bcm2835-camera.h -@@ -93,6 +93,8 @@ struct bm2835_mmal_dev { - s64 vc_start_timestamp; - /* Kernel start timestamp for streaming */ - struct timeval kernel_start_ts; -+ /* Timestamp of last frame */ -+ u64 last_timestamp; - - struct vchiq_mmal_port *port; /* port being used for capture */ - /* camera port being used for capture */ diff --git a/target/linux/brcm2708/patches-4.9/950-0198-bcm2835-gpio-exp-Driver-for-GPIO-expander-via-mailbo.patch b/target/linux/brcm2708/patches-4.9/950-0198-bcm2835-gpio-exp-Driver-for-GPIO-expander-via-mailbo.patch deleted file mode 100644 index 3d09d1dc3..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0198-bcm2835-gpio-exp-Driver-for-GPIO-expander-via-mailbo.patch +++ /dev/null @@ -1,405 +0,0 @@ -From 2f8f62fbd42a55825da437faba4b6164f2e0bee9 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Mon, 20 Feb 2017 17:01:21 +0000 -Subject: [PATCH] bcm2835-gpio-exp: Driver for GPIO expander via mailbox - service - -Pi3 and Compute Module 3 have a GPIO expander that the -VPU communicates with. -There is a mailbox service that now allows control of this -expander, so add a kernel driver that can make use of it. - -Pwr_led node added to device-tree for Pi3. - -Signed-off-by: Dave Stevenson ---- - arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 22 +++ - arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 10 +- - arch/arm/configs/bcm2709_defconfig | 1 + - drivers/gpio/Kconfig | 7 + - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-bcm-exp.c | 256 +++++++++++++++++++++++++++++ - include/soc/bcm2835/raspberrypi-firmware.h | 4 + - 7 files changed, 300 insertions(+), 1 deletion(-) - create mode 100644 drivers/gpio/gpio-bcm-exp.c - ---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -@@ -96,6 +96,14 @@ - firmware = <&firmware>; - status = "okay"; - }; -+ -+ expgpio: expgpio { -+ compatible = "brcm,bcm2835-expgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; - }; - - &fb { -@@ -163,6 +171,16 @@ - linux,default-trigger = "mmc0"; - gpios = <&virtgpio 0 0>; - }; -+ -+ pwr_led: pwr { -+ label = "led1"; -+ linux,default-trigger = "input"; -+ gpios = <&expgpio 7 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; - }; - - &audio { -@@ -193,6 +211,10 @@ - act_led_activelow = <&act_led>,"gpios:8"; - act_led_trigger = <&act_led>,"linux,default-trigger"; - -+ pwr_led_gpio = <&pwr_led>,"gpios:4"; -+ pwr_led_activelow = <&pwr_led>,"gpios:8"; -+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ - audio = <&audio>,"status"; - watchdog = <&watchdog>,"status"; - random = <&random>,"status"; ---- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -@@ -65,6 +65,14 @@ - firmware = <&firmware>; - status = "okay"; - }; -+ -+ expgpio: expgpio { -+ compatible = "brcm,bcm2835-expgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; - }; - - &fb { -@@ -123,7 +131,7 @@ - }; - - &hdmi { -- hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>; - }; - - &audio { ---- a/arch/arm/configs/bcm2709_defconfig -+++ b/arch/arm/configs/bcm2709_defconfig -@@ -625,6 +625,7 @@ CONFIG_PPS=m - CONFIG_PPS_CLIENT_LDISC=m - CONFIG_PPS_CLIENT_GPIO=m - CONFIG_GPIO_SYSFS=y -+CONFIG_GPIO_BCM_EXP=y - CONFIG_GPIO_BCM_VIRT=y - CONFIG_GPIO_ARIZONA=m - CONFIG_GPIO_STMPE=y ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -128,6 +128,13 @@ config GPIO_AXP209 - help - Say yes to enable GPIO support for the AXP209 PMIC - -+config GPIO_BCM_EXP -+ bool "Broadcom Exp GPIO" -+ depends on OF_GPIO && RASPBERRYPI_FIRMWARE && (ARCH_BCM2835 || COMPILE_TEST) -+ help -+ Turn on GPIO support for Broadcom chips using the firmware mailbox -+ to communicate with VideoCore on BCM283x chips. -+ - config GPIO_BCM_KONA - bool "Broadcom Kona GPIO" - depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST) ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -30,6 +30,7 @@ obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizo - obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o - obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o - obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o -+obj-$(CONFIG_GPIO_BCM_EXP) += gpio-bcm-exp.o - obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o - obj-$(CONFIG_GPIO_BCM_VIRT) += gpio-bcm-virt.o - obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o ---- /dev/null -+++ b/drivers/gpio/gpio-bcm-exp.c -@@ -0,0 +1,256 @@ -+/* -+ * Broadcom expander GPIO driver -+ * -+ * Uses the firmware mailbox service to communicate with the -+ * GPIO expander on the VPU. -+ * -+ * Copyright (C) 2017 Raspberry Pi Trading Ltd. -+ * -+ * Author: Dave Stevenson -+ * Based on gpio-bcm-virt.c by Dom Cobley -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MODULE_NAME "brcmexp-gpio" -+#define NUM_GPIO 8 -+ -+struct brcmexp_gpio { -+ struct gpio_chip gc; -+ struct device *dev; -+ struct rpi_firmware *fw; -+}; -+ -+struct gpio_set_config { -+ u32 gpio, direction, polarity, term_en, term_pull_up, state; -+}; -+ -+struct gpio_get_config { -+ u32 gpio, direction, polarity, term_en, term_pull_up; -+}; -+ -+struct gpio_get_set_state { -+ u32 gpio, state; -+}; -+ -+static int brcmexp_gpio_get_polarity(struct gpio_chip *gc, unsigned int off) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_get_config get; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ get.gpio = off + gpio->gc.base; /* GPIO to update */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG, -+ &get, sizeof(get)); -+ if (ret) { -+ dev_err(gpio->dev, -+ "Failed to get GPIO %u config (%d)\n", off, ret); -+ return ret; -+ } -+ return get.polarity; -+} -+ -+static int brcmexp_gpio_dir_in(struct gpio_chip *gc, unsigned int off) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_set_config set_in; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ set_in.gpio = off + gpio->gc.base; /* GPIO to update */ -+ set_in.direction = 0; /* Input */ -+ set_in.polarity = brcmexp_gpio_get_polarity(gc, off); -+ /* Retain existing setting */ -+ set_in.term_en = 0; /* termination disabled */ -+ set_in.term_pull_up = 0; /* n/a as termination disabled */ -+ set_in.state = 0; /* n/a as configured as an input */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG, -+ &set_in, sizeof(set_in)); -+ if (ret) { -+ dev_err(gpio->dev, -+ "Failed to set GPIO %u to input (%d)\n", -+ off, ret); -+ return ret; -+ } -+ return 0; -+} -+ -+static int brcmexp_gpio_dir_out(struct gpio_chip *gc, unsigned int off, int val) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_set_config set_out; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ set_out.gpio = off + gpio->gc.base; /* GPIO to update */ -+ set_out.direction = 1; /* Output */ -+ set_out.polarity = brcmexp_gpio_get_polarity(gc, off); -+ /* Retain existing setting */ -+ set_out.term_en = 0; /* n/a as an output */ -+ set_out.term_pull_up = 0; /* n/a as termination disabled */ -+ set_out.state = val; /* Output state */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_CONFIG, -+ &set_out, sizeof(set_out)); -+ if (ret) { -+ dev_err(gpio->dev, -+ "Failed to set GPIO %u to output (%d)\n", off, ret); -+ return ret; -+ } -+ return 0; -+} -+ -+static int brcmexp_gpio_get_direction(struct gpio_chip *gc, unsigned int off) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_get_config get; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ get.gpio = off + gpio->gc.base; /* GPIO to update */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_CONFIG, -+ &get, sizeof(get)); -+ if (ret) { -+ dev_err(gpio->dev, -+ "Failed to get GPIO %u config (%d)\n", off, ret); -+ return ret; -+ } -+ return get.direction ? GPIOF_DIR_OUT : GPIOF_DIR_IN; -+} -+ -+static int brcmexp_gpio_get(struct gpio_chip *gc, unsigned int off) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_get_set_state get; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ get.gpio = off + gpio->gc.base; /* GPIO to update */ -+ get.state = 0; /* storage for returned value */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_GET_GPIO_STATE, -+ &get, sizeof(get)); -+ if (ret) { -+ dev_err(gpio->dev, -+ "Failed to get GPIO %u state (%d)\n", off, ret); -+ return ret; -+ } -+ return !!get.state; -+} -+ -+static void brcmexp_gpio_set(struct gpio_chip *gc, unsigned int off, int val) -+{ -+ struct brcmexp_gpio *gpio; -+ struct gpio_get_set_state set; -+ int ret; -+ -+ gpio = container_of(gc, struct brcmexp_gpio, gc); -+ -+ off += gpio->gc.base; -+ -+ set.gpio = off + gpio->gc.base; /* GPIO to update */ -+ set.state = val; /* Output state */ -+ -+ ret = rpi_firmware_property(gpio->fw, RPI_FIRMWARE_SET_GPIO_STATE, -+ &set, sizeof(set)); -+ if (ret) -+ dev_err(gpio->dev, -+ "Failed to set GPIO %u state (%d)\n", off, ret); -+} -+ -+static int brcmexp_gpio_probe(struct platform_device *pdev) -+{ -+ int err = 0; -+ struct device *dev = &pdev->dev; -+ struct device_node *np = dev->of_node; -+ struct device_node *fw_node; -+ struct rpi_firmware *fw; -+ struct brcmexp_gpio *ucb; -+ -+ fw_node = of_parse_phandle(np, "firmware", 0); -+ if (!fw_node) { -+ dev_err(dev, "Missing firmware node\n"); -+ return -ENOENT; -+ } -+ -+ fw = rpi_firmware_get(fw_node); -+ if (!fw) -+ return -EPROBE_DEFER; -+ -+ ucb = devm_kzalloc(dev, sizeof(*ucb), GFP_KERNEL); -+ if (!ucb) -+ return -EINVAL; -+ -+ ucb->fw = fw; -+ ucb->dev = dev; -+ ucb->gc.label = MODULE_NAME; -+ ucb->gc.owner = THIS_MODULE; -+ ucb->gc.of_node = np; -+ ucb->gc.base = 128; -+ ucb->gc.ngpio = NUM_GPIO; -+ -+ ucb->gc.direction_input = brcmexp_gpio_dir_in; -+ ucb->gc.direction_output = brcmexp_gpio_dir_out; -+ ucb->gc.get_direction = brcmexp_gpio_get_direction; -+ ucb->gc.get = brcmexp_gpio_get; -+ ucb->gc.set = brcmexp_gpio_set; -+ ucb->gc.can_sleep = true; -+ -+ err = gpiochip_add(&ucb->gc); -+ if (err) -+ return err; -+ -+ platform_set_drvdata(pdev, ucb); -+ -+ return 0; -+} -+ -+static int brcmexp_gpio_remove(struct platform_device *pdev) -+{ -+ struct brcmexp_gpio *ucb = platform_get_drvdata(pdev); -+ -+ gpiochip_remove(&ucb->gc); -+ -+ return 0; -+} -+ -+static const struct of_device_id __maybe_unused brcmexp_gpio_ids[] = { -+ { .compatible = "brcm,bcm2835-expgpio" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, brcmexp_gpio_ids); -+ -+static struct platform_driver brcmexp_gpio_driver = { -+ .driver = { -+ .name = MODULE_NAME, -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(brcmexp_gpio_ids), -+ }, -+ .probe = brcmexp_gpio_probe, -+ .remove = brcmexp_gpio_remove, -+}; -+module_platform_driver(brcmexp_gpio_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Dave Stevenson "); -+MODULE_DESCRIPTION("brcm-exp GPIO driver"); -+MODULE_ALIAS("platform:brcmexp-gpio"); ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -83,7 +83,11 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_SET_TURBO = 0x00038009, - RPI_FIRMWARE_SET_CUSTOMER_OTP = 0x00038021, - RPI_FIRMWARE_SET_DOMAIN_STATE = 0x00038030, -+ RPI_FIRMWARE_GET_GPIO_STATE = 0x00030041, -+ RPI_FIRMWARE_SET_GPIO_STATE = 0x00038041, - RPI_FIRMWARE_SET_SDHOST_CLOCK = 0x00038042, -+ RPI_FIRMWARE_GET_GPIO_CONFIG = 0x00030043, -+ RPI_FIRMWARE_SET_GPIO_CONFIG = 0x00038043, - - /* Dispmanx TAGS */ - RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, diff --git a/target/linux/brcm2708/patches-4.9/950-0199-BCM270X_DT-Add-bcm2708-rpi-0-w.dts.patch b/target/linux/brcm2708/patches-4.9/950-0199-BCM270X_DT-Add-bcm2708-rpi-0-w.dts.patch deleted file mode 100644 index c3a87517e..000000000 --- a/target/linux/brcm2708/patches-4.9/950-0199-BCM270X_DT-Add-bcm2708-rpi-0-w.dts.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 41620ad7f4b059be162f615a7be423df78406d29 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 24 May 2016 16:30:05 +0100 -Subject: [PATCH] BCM270X_DT: Add bcm2708-rpi-0-w.dts - -Add DT support for the Pi Zero W. N.B. It will not be loaded -automatically without a corresponding change to the firmware. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2708-rpi-0-w.dts | 197 ++++++++++++++++++++++++++++++++++ - 2 files changed, 198 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2708-rpi-0-w.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2708-rpi-b.dtb \ - bcm2708-rpi-b-plus.dtb \ - bcm2708-rpi-cm.dtb \ -+ bcm2708-rpi-0-w.dtb \ - bcm2709-rpi-2-b.dtb \ - bcm2710-rpi-3-b.dtb \ - bcm2710-rpi-cm3.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts -@@ -0,0 +1,197 @@ -+/dts-v1/; -+ -+#include "bcm2708.dtsi" -+ -+/ { -+ model = "Raspberry Pi Zero W"; -+}; -+ -+&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; /* ALT3 = SD1 */ -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; /* none */ -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <30 31 32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <2 0 0 2>; /* up none none up */ -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <>; -+ brcm,function = <>; -+ }; -+}; -+ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <500000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <500000>; -+ }; -+}; -+ -+&i2c0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&random { -+ status = "okay"; -+}; -+ -+&leds { -+ act_led: act { -+ label = "led0"; -+ linux,default-trigger = "mmc0"; -+ gpios = <&gpio 47 0>; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; -+}; -+ -+&audio { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+/ { -+ chosen { -+ bootargs = "8250.nr_uarts=1"; -+ }; -+}; -+ -+/ { -+ __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ -+ act_led_gpio = <&act_led>,"gpios:4"; -+ act_led_activelow = <&act_led>,"gpios:8"; -+ act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; -+ }; -+}; diff --git a/target/linux/brcm2708/patches-4.9/950-1000-mfd-rpisense-disable.patch b/target/linux/brcm2708/patches-4.9/950-1000-mfd-rpisense-disable.patch deleted file mode 100644 index 164e8447f..000000000 --- a/target/linux/brcm2708/patches-4.9/950-1000-mfd-rpisense-disable.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -13,6 +13,7 @@ config MFD_CORE - config MFD_RPISENSE_CORE - tristate "Raspberry Pi Sense HAT core functions" - depends on I2C -+ depends on BROKEN - select MFD_CORE - help - This is the core driver for the Raspberry Pi Sense HAT. This provides diff --git a/target/linux/brcm2708/patches-4.9/950-1001-sound-soc-rpi-cirrus-disable.patch b/target/linux/brcm2708/patches-4.9/950-1001-sound-soc-rpi-cirrus-disable.patch deleted file mode 100644 index 87a57a831..000000000 --- a/target/linux/brcm2708/patches-4.9/950-1001-sound-soc-rpi-cirrus-disable.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -48,6 +48,7 @@ config SND_BCM2708_SOC_HIFIBERRY_AMP - config SND_BCM2708_SOC_RPI_CIRRUS - tristate "Support for Cirrus Logic Audio Card" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ depends on BROKEN - select SND_SOC_WM5102 - select SND_SOC_WM8804 - help diff --git a/target/linux/brcm2708/patches-4.9/950-1002-bcm2708-raspberry-pi-3-b-plus.patch b/target/linux/brcm2708/patches-4.9/950-1002-bcm2708-raspberry-pi-3-b-plus.patch deleted file mode 100644 index 5eb129fda..000000000 --- a/target/linux/brcm2708/patches-4.9/950-1002-bcm2708-raspberry-pi-3-b-plus.patch +++ /dev/null @@ -1,298 +0,0 @@ ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2708-rpi-0-w.dtb \ - bcm2709-rpi-2-b.dtb \ - bcm2710-rpi-3-b.dtb \ -+ bcm2710-rpi-3-b-plus.dtb \ - bcm2710-rpi-cm3.dtb - - dtb-$(CONFIG_ARCH_ALPINE) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts -@@ -0,0 +1,220 @@ -+/dts-v1/; -+ -+#include "bcm2710.dtsi" -+#include "bcm283x-rpi-lan7515.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837", "brcm,bcm2836"; -+ model = "Raspberry Pi 3 Model B+"; -+}; -+ -+&gpio { -+ sdhost_pins: sdhost_pins { -+ brcm,pins = <48 49 50 51 52 53>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = <1>; /* output */ -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = <4>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = <4>; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = <4>; /* alt0 */ -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = <7>; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = <43>; -+ brcm,function = <4>; /* alt0:GPCLK2 */ -+ brcm,pull = <0>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = <7>; /* alt3=UART0 */ -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ audio_pins: audio_pins { -+ brcm,pins = <40 41>; -+ brcm,function = <4>; -+ }; -+}; -+ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&mmc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+ brcm,overclock-50 = <0>; -+}; -+ -+&soc { -+ expgpio: expgpio { -+ compatible = "brcm,bcm2835-expgpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+}; -+ -+&fb { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&i2c0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+&leds { -+ act_led: act { -+ label = "led0"; -+ linux,default-trigger = "mmc0"; -+ gpios = <&gpio 29 0>; -+ }; -+ -+ pwr_led: pwr { -+ label = "led1"; -+ linux,default-trigger = "default-on"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&hdmi { -+ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>; -+}; -+ -+&audio { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+/ { -+ chosen { -+ bootargs = "8250.nr_uarts=1"; -+ }; -+}; -+ -+/ { -+ __overrides__ { -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c2_iknowwhatimdoing = <&i2c2>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -+ -+ act_led_gpio = <&act_led>,"gpios:4"; -+ act_led_activelow = <&act_led>,"gpios:8"; -+ act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&pwr_led>,"gpios:4"; -+ pwr_led_activelow = <&pwr_led>,"gpios:8"; -+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; -+ }; -+}; -+ -+&i2c_dsi { -+ gpios = <&gpio 44 0 -+ &gpio 45 0>; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi -@@ -0,0 +1,36 @@ -+/ { -+ aliases { -+ ethernet = ðernet; -+ }; -+}; -+ -+&usb { -+ usb1@1 { -+ compatible = "usb424,2514"; -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ usb1_1@1 { -+ compatible = "usb424,2514"; -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ethernet: usbether@1 { -+ compatible = "usb424,7800"; -+ reg = <1>; -+ microchip,eee-enabled; -+ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ -+ }; -+ }; -+ }; -+}; -+ -+ -+/ { -+ __overrides__ { -+ eee = <ðernet>,"microchip,eee-enabled?"; -+ tx_lpi_timer = <ðernet>,"microchip,tx-lpi-timer:0"; -+ }; -+}; ---- a/arch/arm64/boot/dts/broadcom/Makefile -+++ b/arch/arm64/boot/dts/broadcom/Makefile -@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rp - dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb - dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb - dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb -+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb - - dts-dirs += ../overlays - ---- /dev/null -+++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts -@@ -0,0 +1,3 @@ -+#define RPI364 -+ -+#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts" ---- a/arch/arm64/configs/bcmrpi3_defconfig -+++ b/arch/arm64/configs/bcmrpi3_defconfig -@@ -482,6 +482,7 @@ CONFIG_USB_NET_SR9700=m - CONFIG_USB_NET_SR9800=m - CONFIG_USB_NET_SMSC75XX=m - CONFIG_USB_NET_SMSC95XX=y -+CONFIG_USB_LAN78XX=y - CONFIG_USB_NET_GL620A=m - CONFIG_USB_NET_NET1080=m - CONFIG_USB_NET_PLUSB=m diff --git a/target/linux/brcm2708/patches-4.9/960-add-rasbperrypi-compatible.patch b/target/linux/brcm2708/patches-4.9/960-add-rasbperrypi-compatible.patch deleted file mode 100644 index 0be65916a..000000000 --- a/target/linux/brcm2708/patches-4.9/960-add-rasbperrypi-compatible.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/arch/arm/boot/dts/bcm2708-rpi-0-w.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-0-w.dts -@@ -3,6 +3,7 @@ - #include "bcm2708.dtsi" - - / { -+ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835"; - model = "Raspberry Pi Zero W"; - }; - ---- a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts -@@ -8,6 +8,7 @@ - #include "bcm283x-rpi-smsc9514.dtsi" - - / { -+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837", "brcm,bcm2836"; - model = "Raspberry Pi 3 Model B"; - }; - ---- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts -@@ -4,6 +4,7 @@ - #include "bcm283x-rpi-smsc9514.dtsi" - - / { -+ compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; - model = "Raspberry Pi 2 Model B"; - }; - ---- a/arch/arm/boot/dts/bcm2708-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts -@@ -4,6 +4,7 @@ - #include "bcm283x-rpi-smsc9512.dtsi" - - / { -+ compatible = "raspberrypi,model-b", "brcm,bcm2835"; - model = "Raspberry Pi Model B"; - }; - ---- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts -@@ -4,6 +4,7 @@ - #include "bcm283x-rpi-smsc9514.dtsi" - - / { -+ compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; - model = "Raspberry Pi Model B+"; - }; - ---- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts -+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts -@@ -3,6 +3,7 @@ - #include "bcm2708-rpi-cm.dtsi" - - / { -+ compatible = "raspberrypi,compute-module-1", "brcm,bcm2835"; - model = "Raspberry Pi Compute Module"; - }; - ---- a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts -@@ -3,6 +3,7 @@ - #include "bcm2710.dtsi" - - / { -+ compatible = "raspberrypi,compute-module-3", "brcm,bcm2837", "brcm,bcm2836"; - model = "Raspberry Pi Compute Module 3"; - }; -